java -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata ./data -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/default/automizer/svcomp-Reach-32bit-Automizer_Default.epf -i ../../../trunk/examples/svcomp/systemc/transmitter.03.cil.c -------------------------------------------------------------------------------- This is Ultimate 0.1.24-efa34d5 [2019-09-16 16:40:27,635 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-09-16 16:40:27,637 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-09-16 16:40:27,654 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-09-16 16:40:27,655 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-09-16 16:40:27,656 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-09-16 16:40:27,659 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-09-16 16:40:27,665 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-09-16 16:40:27,667 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-09-16 16:40:27,668 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-09-16 16:40:27,670 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-09-16 16:40:27,672 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-09-16 16:40:27,673 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-09-16 16:40:27,673 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-09-16 16:40:27,676 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-09-16 16:40:27,679 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-09-16 16:40:27,679 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-09-16 16:40:27,683 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-09-16 16:40:27,684 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-09-16 16:40:27,688 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-09-16 16:40:27,692 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-09-16 16:40:27,693 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-09-16 16:40:27,694 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-09-16 16:40:27,695 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-09-16 16:40:27,697 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-09-16 16:40:27,697 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-09-16 16:40:27,697 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-09-16 16:40:27,699 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-09-16 16:40:27,700 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-09-16 16:40:27,701 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-09-16 16:40:27,701 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-09-16 16:40:27,701 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-09-16 16:40:27,703 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-09-16 16:40:27,704 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-09-16 16:40:27,707 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-09-16 16:40:27,707 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-09-16 16:40:27,708 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-09-16 16:40:27,708 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-09-16 16:40:27,708 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-09-16 16:40:27,709 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-09-16 16:40:27,710 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-09-16 16:40:27,711 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/default/automizer/svcomp-Reach-32bit-Automizer_Default.epf [2019-09-16 16:40:27,731 INFO L113 SettingsManager]: Loading preferences was successful [2019-09-16 16:40:27,731 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-09-16 16:40:27,733 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-09-16 16:40:27,733 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-09-16 16:40:27,733 INFO L138 SettingsManager]: * Use SBE=true [2019-09-16 16:40:27,734 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-09-16 16:40:27,734 INFO L138 SettingsManager]: * sizeof long=4 [2019-09-16 16:40:27,735 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-09-16 16:40:27,735 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-09-16 16:40:27,735 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-09-16 16:40:27,735 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-09-16 16:40:27,736 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-09-16 16:40:27,736 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-09-16 16:40:27,736 INFO L138 SettingsManager]: * sizeof long double=12 [2019-09-16 16:40:27,736 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-09-16 16:40:27,736 INFO L138 SettingsManager]: * Use constant arrays=true [2019-09-16 16:40:27,737 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-09-16 16:40:27,737 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-09-16 16:40:27,738 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-09-16 16:40:27,738 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-09-16 16:40:27,739 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-09-16 16:40:27,739 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-09-16 16:40:27,739 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-09-16 16:40:27,739 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-09-16 16:40:27,740 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-09-16 16:40:27,740 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-09-16 16:40:27,740 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-09-16 16:40:27,740 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-09-16 16:40:27,740 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2019-09-16 16:40:27,776 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-09-16 16:40:27,793 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-09-16 16:40:27,798 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-09-16 16:40:27,799 INFO L271 PluginConnector]: Initializing CDTParser... [2019-09-16 16:40:27,800 INFO L275 PluginConnector]: CDTParser initialized [2019-09-16 16:40:27,801 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/systemc/transmitter.03.cil.c [2019-09-16 16:40:27,879 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/9eb32fe09/f29ba184f1334235844fe9e5a22f7a1c/FLAGa0d481787 [2019-09-16 16:40:28,370 INFO L306 CDTParser]: Found 1 translation units. [2019-09-16 16:40:28,371 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/systemc/transmitter.03.cil.c [2019-09-16 16:40:28,381 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/9eb32fe09/f29ba184f1334235844fe9e5a22f7a1c/FLAGa0d481787 [2019-09-16 16:40:28,729 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/9eb32fe09/f29ba184f1334235844fe9e5a22f7a1c [2019-09-16 16:40:28,743 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-09-16 16:40:28,744 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2019-09-16 16:40:28,746 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-09-16 16:40:28,746 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-09-16 16:40:28,749 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-09-16 16:40:28,750 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 16.09 04:40:28" (1/1) ... [2019-09-16 16:40:28,753 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@5ead048d and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.09 04:40:28, skipping insertion in model container [2019-09-16 16:40:28,754 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 16.09 04:40:28" (1/1) ... [2019-09-16 16:40:28,761 INFO L142 MainTranslator]: Starting translation in SV-COMP mode [2019-09-16 16:40:28,815 INFO L173 MainTranslator]: Built tables and reachable declarations [2019-09-16 16:40:29,075 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-09-16 16:40:29,084 INFO L188 MainTranslator]: Completed pre-run [2019-09-16 16:40:29,237 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-09-16 16:40:29,258 INFO L192 MainTranslator]: Completed translation [2019-09-16 16:40:29,258 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.09 04:40:29 WrapperNode [2019-09-16 16:40:29,259 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-09-16 16:40:29,259 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-09-16 16:40:29,259 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-09-16 16:40:29,259 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-09-16 16:40:29,273 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.09 04:40:29" (1/1) ... [2019-09-16 16:40:29,273 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.09 04:40:29" (1/1) ... [2019-09-16 16:40:29,292 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.09 04:40:29" (1/1) ... [2019-09-16 16:40:29,292 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.09 04:40:29" (1/1) ... [2019-09-16 16:40:29,314 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.09 04:40:29" (1/1) ... [2019-09-16 16:40:29,331 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.09 04:40:29" (1/1) ... [2019-09-16 16:40:29,334 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.09 04:40:29" (1/1) ... [2019-09-16 16:40:29,338 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-09-16 16:40:29,338 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-09-16 16:40:29,338 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-09-16 16:40:29,338 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-09-16 16:40:29,339 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.09 04:40:29" (1/1) ... No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-09-16 16:40:29,387 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2019-09-16 16:40:29,387 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-09-16 16:40:29,388 INFO L138 BoogieDeclarations]: Found implementation of procedure error [2019-09-16 16:40:29,388 INFO L138 BoogieDeclarations]: Found implementation of procedure master [2019-09-16 16:40:29,388 INFO L138 BoogieDeclarations]: Found implementation of procedure transmit1 [2019-09-16 16:40:29,388 INFO L138 BoogieDeclarations]: Found implementation of procedure transmit2 [2019-09-16 16:40:29,388 INFO L138 BoogieDeclarations]: Found implementation of procedure transmit3 [2019-09-16 16:40:29,388 INFO L138 BoogieDeclarations]: Found implementation of procedure is_master_triggered [2019-09-16 16:40:29,389 INFO L138 BoogieDeclarations]: Found implementation of procedure is_transmit1_triggered [2019-09-16 16:40:29,389 INFO L138 BoogieDeclarations]: Found implementation of procedure is_transmit2_triggered [2019-09-16 16:40:29,389 INFO L138 BoogieDeclarations]: Found implementation of procedure is_transmit3_triggered [2019-09-16 16:40:29,389 INFO L138 BoogieDeclarations]: Found implementation of procedure update_channels [2019-09-16 16:40:29,389 INFO L138 BoogieDeclarations]: Found implementation of procedure init_threads [2019-09-16 16:40:29,389 INFO L138 BoogieDeclarations]: Found implementation of procedure exists_runnable_thread [2019-09-16 16:40:29,390 INFO L138 BoogieDeclarations]: Found implementation of procedure eval [2019-09-16 16:40:29,390 INFO L138 BoogieDeclarations]: Found implementation of procedure fire_delta_events [2019-09-16 16:40:29,390 INFO L138 BoogieDeclarations]: Found implementation of procedure reset_delta_events [2019-09-16 16:40:29,390 INFO L138 BoogieDeclarations]: Found implementation of procedure activate_threads [2019-09-16 16:40:29,390 INFO L138 BoogieDeclarations]: Found implementation of procedure immediate_notify [2019-09-16 16:40:29,391 INFO L138 BoogieDeclarations]: Found implementation of procedure fire_time_events [2019-09-16 16:40:29,391 INFO L138 BoogieDeclarations]: Found implementation of procedure reset_time_events [2019-09-16 16:40:29,391 INFO L138 BoogieDeclarations]: Found implementation of procedure init_model [2019-09-16 16:40:29,391 INFO L138 BoogieDeclarations]: Found implementation of procedure stop_simulation [2019-09-16 16:40:29,391 INFO L138 BoogieDeclarations]: Found implementation of procedure start_simulation [2019-09-16 16:40:29,391 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2019-09-16 16:40:29,392 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_error [2019-09-16 16:40:29,392 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_int [2019-09-16 16:40:29,392 INFO L130 BoogieDeclarations]: Found specification of procedure error [2019-09-16 16:40:29,392 INFO L130 BoogieDeclarations]: Found specification of procedure is_master_triggered [2019-09-16 16:40:29,392 INFO L130 BoogieDeclarations]: Found specification of procedure is_transmit1_triggered [2019-09-16 16:40:29,393 INFO L130 BoogieDeclarations]: Found specification of procedure is_transmit2_triggered [2019-09-16 16:40:29,393 INFO L130 BoogieDeclarations]: Found specification of procedure is_transmit3_triggered [2019-09-16 16:40:29,393 INFO L130 BoogieDeclarations]: Found specification of procedure immediate_notify [2019-09-16 16:40:29,393 INFO L130 BoogieDeclarations]: Found specification of procedure master [2019-09-16 16:40:29,393 INFO L130 BoogieDeclarations]: Found specification of procedure transmit1 [2019-09-16 16:40:29,393 INFO L130 BoogieDeclarations]: Found specification of procedure transmit2 [2019-09-16 16:40:29,393 INFO L130 BoogieDeclarations]: Found specification of procedure transmit3 [2019-09-16 16:40:29,394 INFO L130 BoogieDeclarations]: Found specification of procedure update_channels [2019-09-16 16:40:29,394 INFO L130 BoogieDeclarations]: Found specification of procedure init_threads [2019-09-16 16:40:29,394 INFO L130 BoogieDeclarations]: Found specification of procedure exists_runnable_thread [2019-09-16 16:40:29,394 INFO L130 BoogieDeclarations]: Found specification of procedure eval [2019-09-16 16:40:29,394 INFO L130 BoogieDeclarations]: Found specification of procedure fire_delta_events [2019-09-16 16:40:29,394 INFO L130 BoogieDeclarations]: Found specification of procedure reset_delta_events [2019-09-16 16:40:29,394 INFO L130 BoogieDeclarations]: Found specification of procedure activate_threads [2019-09-16 16:40:29,395 INFO L130 BoogieDeclarations]: Found specification of procedure fire_time_events [2019-09-16 16:40:29,395 INFO L130 BoogieDeclarations]: Found specification of procedure reset_time_events [2019-09-16 16:40:29,395 INFO L130 BoogieDeclarations]: Found specification of procedure init_model [2019-09-16 16:40:29,395 INFO L130 BoogieDeclarations]: Found specification of procedure stop_simulation [2019-09-16 16:40:29,395 INFO L130 BoogieDeclarations]: Found specification of procedure start_simulation [2019-09-16 16:40:29,395 INFO L130 BoogieDeclarations]: Found specification of procedure main [2019-09-16 16:40:29,396 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2019-09-16 16:40:29,396 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-09-16 16:40:30,050 INFO L278 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-09-16 16:40:30,050 INFO L283 CfgBuilder]: Removed 7 assume(true) statements. [2019-09-16 16:40:30,052 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 16.09 04:40:30 BoogieIcfgContainer [2019-09-16 16:40:30,052 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-09-16 16:40:30,053 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-09-16 16:40:30,053 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-09-16 16:40:30,057 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-09-16 16:40:30,057 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 16.09 04:40:28" (1/3) ... [2019-09-16 16:40:30,058 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@1965f00d and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 16.09 04:40:30, skipping insertion in model container [2019-09-16 16:40:30,058 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.09 04:40:29" (2/3) ... [2019-09-16 16:40:30,059 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@1965f00d and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 16.09 04:40:30, skipping insertion in model container [2019-09-16 16:40:30,059 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 16.09 04:40:30" (3/3) ... [2019-09-16 16:40:30,061 INFO L109 eAbstractionObserver]: Analyzing ICFG transmitter.03.cil.c [2019-09-16 16:40:30,071 INFO L152 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-09-16 16:40:30,080 INFO L164 ceAbstractionStarter]: Appying trace abstraction to program that has 1 error locations. [2019-09-16 16:40:30,099 INFO L252 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2019-09-16 16:40:30,148 INFO L128 ementStrategyFactory]: Using default assertion order modulation [2019-09-16 16:40:30,149 INFO L377 AbstractCegarLoop]: Interprodecural is true [2019-09-16 16:40:30,149 INFO L378 AbstractCegarLoop]: Hoare is true [2019-09-16 16:40:30,149 INFO L379 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-09-16 16:40:30,150 INFO L380 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-09-16 16:40:30,150 INFO L381 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-09-16 16:40:30,151 INFO L382 AbstractCegarLoop]: Difference is false [2019-09-16 16:40:30,151 INFO L383 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-09-16 16:40:30,152 INFO L388 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-09-16 16:40:30,182 INFO L276 IsEmpty]: Start isEmpty. Operand 199 states. [2019-09-16 16:40:30,195 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 106 [2019-09-16 16:40:30,195 INFO L399 BasicCegarLoop]: Found error trace [2019-09-16 16:40:30,197 INFO L407 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-09-16 16:40:30,199 INFO L418 AbstractCegarLoop]: === Iteration 1 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-09-16 16:40:30,205 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-09-16 16:40:30,206 INFO L82 PathProgramCache]: Analyzing trace with hash 1961190691, now seen corresponding path program 1 times [2019-09-16 16:40:30,208 INFO L224 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-09-16 16:40:30,208 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-09-16 16:40:30,262 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-16 16:40:30,262 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-09-16 16:40:30,262 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-16 16:40:30,388 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-09-16 16:40:30,601 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-09-16 16:40:30,603 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-09-16 16:40:30,604 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-09-16 16:40:30,609 INFO L454 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-09-16 16:40:30,624 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-09-16 16:40:30,625 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-09-16 16:40:30,627 INFO L87 Difference]: Start difference. First operand 199 states. Second operand 5 states. [2019-09-16 16:40:31,378 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-09-16 16:40:31,379 INFO L93 Difference]: Finished difference Result 412 states and 610 transitions. [2019-09-16 16:40:31,379 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-09-16 16:40:31,381 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 105 [2019-09-16 16:40:31,382 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-09-16 16:40:31,412 INFO L225 Difference]: With dead ends: 412 [2019-09-16 16:40:31,413 INFO L226 Difference]: Without dead ends: 222 [2019-09-16 16:40:31,418 INFO L636 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-09-16 16:40:31,436 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 222 states. [2019-09-16 16:40:31,505 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 222 to 190. [2019-09-16 16:40:31,506 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 190 states. [2019-09-16 16:40:31,510 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 190 states to 190 states and 258 transitions. [2019-09-16 16:40:31,513 INFO L78 Accepts]: Start accepts. Automaton has 190 states and 258 transitions. Word has length 105 [2019-09-16 16:40:31,514 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-09-16 16:40:31,514 INFO L475 AbstractCegarLoop]: Abstraction has 190 states and 258 transitions. [2019-09-16 16:40:31,514 INFO L476 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-09-16 16:40:31,514 INFO L276 IsEmpty]: Start isEmpty. Operand 190 states and 258 transitions. [2019-09-16 16:40:31,523 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 106 [2019-09-16 16:40:31,523 INFO L399 BasicCegarLoop]: Found error trace [2019-09-16 16:40:31,523 INFO L407 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-09-16 16:40:31,524 INFO L418 AbstractCegarLoop]: === Iteration 2 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-09-16 16:40:31,524 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-09-16 16:40:31,525 INFO L82 PathProgramCache]: Analyzing trace with hash -767018655, now seen corresponding path program 1 times [2019-09-16 16:40:31,525 INFO L224 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-09-16 16:40:31,526 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-09-16 16:40:31,531 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-16 16:40:31,532 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-09-16 16:40:31,532 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-16 16:40:31,585 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-09-16 16:40:31,690 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-09-16 16:40:31,690 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-09-16 16:40:31,691 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-09-16 16:40:31,695 INFO L454 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-09-16 16:40:31,696 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-09-16 16:40:31,696 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-09-16 16:40:31,697 INFO L87 Difference]: Start difference. First operand 190 states and 258 transitions. Second operand 5 states. [2019-09-16 16:40:32,309 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-09-16 16:40:32,309 INFO L93 Difference]: Finished difference Result 391 states and 548 transitions. [2019-09-16 16:40:32,310 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-09-16 16:40:32,310 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 105 [2019-09-16 16:40:32,310 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-09-16 16:40:32,313 INFO L225 Difference]: With dead ends: 391 [2019-09-16 16:40:32,313 INFO L226 Difference]: Without dead ends: 222 [2019-09-16 16:40:32,315 INFO L636 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-09-16 16:40:32,316 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 222 states. [2019-09-16 16:40:32,337 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 222 to 190. [2019-09-16 16:40:32,337 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 190 states. [2019-09-16 16:40:32,339 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 190 states to 190 states and 257 transitions. [2019-09-16 16:40:32,339 INFO L78 Accepts]: Start accepts. Automaton has 190 states and 257 transitions. Word has length 105 [2019-09-16 16:40:32,340 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-09-16 16:40:32,340 INFO L475 AbstractCegarLoop]: Abstraction has 190 states and 257 transitions. [2019-09-16 16:40:32,340 INFO L476 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-09-16 16:40:32,340 INFO L276 IsEmpty]: Start isEmpty. Operand 190 states and 257 transitions. [2019-09-16 16:40:32,342 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 106 [2019-09-16 16:40:32,342 INFO L399 BasicCegarLoop]: Found error trace [2019-09-16 16:40:32,342 INFO L407 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-09-16 16:40:32,343 INFO L418 AbstractCegarLoop]: === Iteration 3 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-09-16 16:40:32,343 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-09-16 16:40:32,343 INFO L82 PathProgramCache]: Analyzing trace with hash -1824856733, now seen corresponding path program 1 times [2019-09-16 16:40:32,343 INFO L224 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-09-16 16:40:32,343 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-09-16 16:40:32,345 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-16 16:40:32,345 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-09-16 16:40:32,345 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-16 16:40:32,363 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-09-16 16:40:32,453 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-09-16 16:40:32,453 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-09-16 16:40:32,453 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-09-16 16:40:32,454 INFO L454 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-09-16 16:40:32,454 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-09-16 16:40:32,454 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-09-16 16:40:32,454 INFO L87 Difference]: Start difference. First operand 190 states and 257 transitions. Second operand 5 states. [2019-09-16 16:40:32,856 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-09-16 16:40:32,856 INFO L93 Difference]: Finished difference Result 389 states and 542 transitions. [2019-09-16 16:40:32,857 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-09-16 16:40:32,857 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 105 [2019-09-16 16:40:32,858 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-09-16 16:40:32,860 INFO L225 Difference]: With dead ends: 389 [2019-09-16 16:40:32,861 INFO L226 Difference]: Without dead ends: 220 [2019-09-16 16:40:32,862 INFO L636 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-09-16 16:40:32,863 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 220 states. [2019-09-16 16:40:32,883 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 220 to 190. [2019-09-16 16:40:32,883 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 190 states. [2019-09-16 16:40:32,885 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 190 states to 190 states and 256 transitions. [2019-09-16 16:40:32,886 INFO L78 Accepts]: Start accepts. Automaton has 190 states and 256 transitions. Word has length 105 [2019-09-16 16:40:32,886 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-09-16 16:40:32,886 INFO L475 AbstractCegarLoop]: Abstraction has 190 states and 256 transitions. [2019-09-16 16:40:32,887 INFO L476 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-09-16 16:40:32,887 INFO L276 IsEmpty]: Start isEmpty. Operand 190 states and 256 transitions. [2019-09-16 16:40:32,889 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 106 [2019-09-16 16:40:32,889 INFO L399 BasicCegarLoop]: Found error trace [2019-09-16 16:40:32,889 INFO L407 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-09-16 16:40:32,890 INFO L418 AbstractCegarLoop]: === Iteration 4 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-09-16 16:40:32,890 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-09-16 16:40:32,890 INFO L82 PathProgramCache]: Analyzing trace with hash 1327608097, now seen corresponding path program 1 times [2019-09-16 16:40:32,890 INFO L224 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-09-16 16:40:32,891 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-09-16 16:40:32,892 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-16 16:40:32,892 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-09-16 16:40:32,892 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-16 16:40:32,918 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-09-16 16:40:33,017 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-09-16 16:40:33,018 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-09-16 16:40:33,018 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-09-16 16:40:33,018 INFO L454 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-09-16 16:40:33,019 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-09-16 16:40:33,019 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-09-16 16:40:33,019 INFO L87 Difference]: Start difference. First operand 190 states and 256 transitions. Second operand 5 states. [2019-09-16 16:40:33,471 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-09-16 16:40:33,471 INFO L93 Difference]: Finished difference Result 387 states and 536 transitions. [2019-09-16 16:40:33,472 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-09-16 16:40:33,472 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 105 [2019-09-16 16:40:33,472 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-09-16 16:40:33,474 INFO L225 Difference]: With dead ends: 387 [2019-09-16 16:40:33,475 INFO L226 Difference]: Without dead ends: 218 [2019-09-16 16:40:33,476 INFO L636 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-09-16 16:40:33,477 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 218 states. [2019-09-16 16:40:33,493 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 218 to 190. [2019-09-16 16:40:33,493 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 190 states. [2019-09-16 16:40:33,495 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 190 states to 190 states and 255 transitions. [2019-09-16 16:40:33,496 INFO L78 Accepts]: Start accepts. Automaton has 190 states and 255 transitions. Word has length 105 [2019-09-16 16:40:33,496 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-09-16 16:40:33,496 INFO L475 AbstractCegarLoop]: Abstraction has 190 states and 255 transitions. [2019-09-16 16:40:33,497 INFO L476 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-09-16 16:40:33,497 INFO L276 IsEmpty]: Start isEmpty. Operand 190 states and 255 transitions. [2019-09-16 16:40:33,499 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 106 [2019-09-16 16:40:33,499 INFO L399 BasicCegarLoop]: Found error trace [2019-09-16 16:40:33,499 INFO L407 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-09-16 16:40:33,499 INFO L418 AbstractCegarLoop]: === Iteration 5 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-09-16 16:40:33,500 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-09-16 16:40:33,500 INFO L82 PathProgramCache]: Analyzing trace with hash 1567847843, now seen corresponding path program 1 times [2019-09-16 16:40:33,500 INFO L224 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-09-16 16:40:33,500 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-09-16 16:40:33,501 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-16 16:40:33,502 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-09-16 16:40:33,502 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-16 16:40:33,514 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-09-16 16:40:33,569 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-09-16 16:40:33,569 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-09-16 16:40:33,569 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-09-16 16:40:33,570 INFO L454 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-09-16 16:40:33,570 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-09-16 16:40:33,570 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-09-16 16:40:33,571 INFO L87 Difference]: Start difference. First operand 190 states and 255 transitions. Second operand 5 states. [2019-09-16 16:40:33,966 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-09-16 16:40:33,967 INFO L93 Difference]: Finished difference Result 407 states and 568 transitions. [2019-09-16 16:40:33,967 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-09-16 16:40:33,967 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 105 [2019-09-16 16:40:33,968 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-09-16 16:40:33,970 INFO L225 Difference]: With dead ends: 407 [2019-09-16 16:40:33,970 INFO L226 Difference]: Without dead ends: 238 [2019-09-16 16:40:33,971 INFO L636 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-09-16 16:40:33,972 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 238 states. [2019-09-16 16:40:33,988 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 238 to 190. [2019-09-16 16:40:33,988 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 190 states. [2019-09-16 16:40:33,990 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 190 states to 190 states and 254 transitions. [2019-09-16 16:40:33,990 INFO L78 Accepts]: Start accepts. Automaton has 190 states and 254 transitions. Word has length 105 [2019-09-16 16:40:33,990 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-09-16 16:40:33,991 INFO L475 AbstractCegarLoop]: Abstraction has 190 states and 254 transitions. [2019-09-16 16:40:33,991 INFO L476 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-09-16 16:40:33,991 INFO L276 IsEmpty]: Start isEmpty. Operand 190 states and 254 transitions. [2019-09-16 16:40:33,992 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 106 [2019-09-16 16:40:33,992 INFO L399 BasicCegarLoop]: Found error trace [2019-09-16 16:40:33,993 INFO L407 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-09-16 16:40:33,993 INFO L418 AbstractCegarLoop]: === Iteration 6 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-09-16 16:40:33,993 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-09-16 16:40:33,993 INFO L82 PathProgramCache]: Analyzing trace with hash -1888085791, now seen corresponding path program 1 times [2019-09-16 16:40:33,994 INFO L224 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-09-16 16:40:33,994 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-09-16 16:40:33,995 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-16 16:40:33,995 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-09-16 16:40:33,995 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-16 16:40:34,006 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-09-16 16:40:34,086 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-09-16 16:40:34,088 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-09-16 16:40:34,095 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-09-16 16:40:34,096 INFO L454 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-09-16 16:40:34,096 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-09-16 16:40:34,097 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-09-16 16:40:34,097 INFO L87 Difference]: Start difference. First operand 190 states and 254 transitions. Second operand 5 states. [2019-09-16 16:40:34,507 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-09-16 16:40:34,507 INFO L93 Difference]: Finished difference Result 405 states and 562 transitions. [2019-09-16 16:40:34,507 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-09-16 16:40:34,508 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 105 [2019-09-16 16:40:34,508 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-09-16 16:40:34,512 INFO L225 Difference]: With dead ends: 405 [2019-09-16 16:40:34,513 INFO L226 Difference]: Without dead ends: 236 [2019-09-16 16:40:34,514 INFO L636 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-09-16 16:40:34,515 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 236 states. [2019-09-16 16:40:34,536 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 236 to 190. [2019-09-16 16:40:34,536 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 190 states. [2019-09-16 16:40:34,537 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 190 states to 190 states and 253 transitions. [2019-09-16 16:40:34,538 INFO L78 Accepts]: Start accepts. Automaton has 190 states and 253 transitions. Word has length 105 [2019-09-16 16:40:34,538 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-09-16 16:40:34,538 INFO L475 AbstractCegarLoop]: Abstraction has 190 states and 253 transitions. [2019-09-16 16:40:34,538 INFO L476 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-09-16 16:40:34,538 INFO L276 IsEmpty]: Start isEmpty. Operand 190 states and 253 transitions. [2019-09-16 16:40:34,540 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 106 [2019-09-16 16:40:34,540 INFO L399 BasicCegarLoop]: Found error trace [2019-09-16 16:40:34,540 INFO L407 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-09-16 16:40:34,540 INFO L418 AbstractCegarLoop]: === Iteration 7 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-09-16 16:40:34,541 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-09-16 16:40:34,541 INFO L82 PathProgramCache]: Analyzing trace with hash -1861020189, now seen corresponding path program 1 times [2019-09-16 16:40:34,541 INFO L224 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-09-16 16:40:34,541 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-09-16 16:40:34,542 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-16 16:40:34,542 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-09-16 16:40:34,543 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-16 16:40:34,552 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-09-16 16:40:34,596 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-09-16 16:40:34,596 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-09-16 16:40:34,596 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-09-16 16:40:34,597 INFO L454 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-09-16 16:40:34,597 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-09-16 16:40:34,597 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-09-16 16:40:34,598 INFO L87 Difference]: Start difference. First operand 190 states and 253 transitions. Second operand 4 states. [2019-09-16 16:40:34,849 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-09-16 16:40:34,850 INFO L93 Difference]: Finished difference Result 518 states and 714 transitions. [2019-09-16 16:40:34,850 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-09-16 16:40:34,850 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 105 [2019-09-16 16:40:34,851 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-09-16 16:40:34,853 INFO L225 Difference]: With dead ends: 518 [2019-09-16 16:40:34,854 INFO L226 Difference]: Without dead ends: 350 [2019-09-16 16:40:34,855 INFO L636 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-09-16 16:40:34,856 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 350 states. [2019-09-16 16:40:34,894 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 350 to 345. [2019-09-16 16:40:34,894 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 345 states. [2019-09-16 16:40:34,897 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 345 states to 345 states and 459 transitions. [2019-09-16 16:40:34,897 INFO L78 Accepts]: Start accepts. Automaton has 345 states and 459 transitions. Word has length 105 [2019-09-16 16:40:34,898 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-09-16 16:40:34,898 INFO L475 AbstractCegarLoop]: Abstraction has 345 states and 459 transitions. [2019-09-16 16:40:34,898 INFO L476 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-09-16 16:40:34,898 INFO L276 IsEmpty]: Start isEmpty. Operand 345 states and 459 transitions. [2019-09-16 16:40:34,900 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 106 [2019-09-16 16:40:34,900 INFO L399 BasicCegarLoop]: Found error trace [2019-09-16 16:40:34,900 INFO L407 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-09-16 16:40:34,901 INFO L418 AbstractCegarLoop]: === Iteration 8 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-09-16 16:40:34,901 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-09-16 16:40:34,901 INFO L82 PathProgramCache]: Analyzing trace with hash -723391324, now seen corresponding path program 1 times [2019-09-16 16:40:34,901 INFO L224 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-09-16 16:40:34,902 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-09-16 16:40:34,903 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-16 16:40:34,903 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-09-16 16:40:34,903 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-16 16:40:34,915 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-09-16 16:40:34,992 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-09-16 16:40:34,992 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-09-16 16:40:34,992 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-09-16 16:40:34,993 INFO L454 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-09-16 16:40:34,993 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-09-16 16:40:34,994 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-09-16 16:40:34,994 INFO L87 Difference]: Start difference. First operand 345 states and 459 transitions. Second operand 6 states. [2019-09-16 16:40:35,076 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-09-16 16:40:35,077 INFO L93 Difference]: Finished difference Result 684 states and 934 transitions. [2019-09-16 16:40:35,077 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-09-16 16:40:35,077 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 105 [2019-09-16 16:40:35,078 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-09-16 16:40:35,082 INFO L225 Difference]: With dead ends: 684 [2019-09-16 16:40:35,082 INFO L226 Difference]: Without dead ends: 361 [2019-09-16 16:40:35,085 INFO L636 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2019-09-16 16:40:35,086 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 361 states. [2019-09-16 16:40:35,131 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 361 to 350. [2019-09-16 16:40:35,131 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 350 states. [2019-09-16 16:40:35,135 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 350 states to 350 states and 463 transitions. [2019-09-16 16:40:35,137 INFO L78 Accepts]: Start accepts. Automaton has 350 states and 463 transitions. Word has length 105 [2019-09-16 16:40:35,137 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-09-16 16:40:35,137 INFO L475 AbstractCegarLoop]: Abstraction has 350 states and 463 transitions. [2019-09-16 16:40:35,138 INFO L476 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-09-16 16:40:35,138 INFO L276 IsEmpty]: Start isEmpty. Operand 350 states and 463 transitions. [2019-09-16 16:40:35,142 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 106 [2019-09-16 16:40:35,142 INFO L399 BasicCegarLoop]: Found error trace [2019-09-16 16:40:35,142 INFO L407 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-09-16 16:40:35,142 INFO L418 AbstractCegarLoop]: === Iteration 9 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-09-16 16:40:35,143 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-09-16 16:40:35,143 INFO L82 PathProgramCache]: Analyzing trace with hash -1140787930, now seen corresponding path program 1 times [2019-09-16 16:40:35,143 INFO L224 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-09-16 16:40:35,143 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-09-16 16:40:35,145 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-16 16:40:35,145 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-09-16 16:40:35,145 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-16 16:40:35,161 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-09-16 16:40:35,212 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-09-16 16:40:35,213 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-09-16 16:40:35,213 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-09-16 16:40:35,213 INFO L454 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-09-16 16:40:35,214 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-09-16 16:40:35,214 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-09-16 16:40:35,214 INFO L87 Difference]: Start difference. First operand 350 states and 463 transitions. Second operand 6 states. [2019-09-16 16:40:35,280 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-09-16 16:40:35,280 INFO L93 Difference]: Finished difference Result 704 states and 958 transitions. [2019-09-16 16:40:35,280 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-09-16 16:40:35,280 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 105 [2019-09-16 16:40:35,282 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-09-16 16:40:35,285 INFO L225 Difference]: With dead ends: 704 [2019-09-16 16:40:35,285 INFO L226 Difference]: Without dead ends: 376 [2019-09-16 16:40:35,287 INFO L636 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2019-09-16 16:40:35,288 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 376 states. [2019-09-16 16:40:35,318 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 376 to 360. [2019-09-16 16:40:35,318 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 360 states. [2019-09-16 16:40:35,323 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 360 states to 360 states and 473 transitions. [2019-09-16 16:40:35,324 INFO L78 Accepts]: Start accepts. Automaton has 360 states and 473 transitions. Word has length 105 [2019-09-16 16:40:35,325 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-09-16 16:40:35,326 INFO L475 AbstractCegarLoop]: Abstraction has 360 states and 473 transitions. [2019-09-16 16:40:35,328 INFO L476 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-09-16 16:40:35,328 INFO L276 IsEmpty]: Start isEmpty. Operand 360 states and 473 transitions. [2019-09-16 16:40:35,330 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 106 [2019-09-16 16:40:35,330 INFO L399 BasicCegarLoop]: Found error trace [2019-09-16 16:40:35,331 INFO L407 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-09-16 16:40:35,331 INFO L418 AbstractCegarLoop]: === Iteration 10 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-09-16 16:40:35,331 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-09-16 16:40:35,331 INFO L82 PathProgramCache]: Analyzing trace with hash -264768924, now seen corresponding path program 1 times [2019-09-16 16:40:35,332 INFO L224 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-09-16 16:40:35,332 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-09-16 16:40:35,334 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-16 16:40:35,334 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-09-16 16:40:35,334 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-16 16:40:35,348 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-09-16 16:40:35,389 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-09-16 16:40:35,389 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-09-16 16:40:35,389 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-09-16 16:40:35,390 INFO L454 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-09-16 16:40:35,390 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-09-16 16:40:35,390 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-09-16 16:40:35,390 INFO L87 Difference]: Start difference. First operand 360 states and 473 transitions. Second operand 6 states. [2019-09-16 16:40:35,444 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-09-16 16:40:35,444 INFO L93 Difference]: Finished difference Result 718 states and 968 transitions. [2019-09-16 16:40:35,444 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-09-16 16:40:35,444 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 105 [2019-09-16 16:40:35,445 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-09-16 16:40:35,448 INFO L225 Difference]: With dead ends: 718 [2019-09-16 16:40:35,448 INFO L226 Difference]: Without dead ends: 380 [2019-09-16 16:40:35,450 INFO L636 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2019-09-16 16:40:35,450 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 380 states. [2019-09-16 16:40:35,480 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 380 to 370. [2019-09-16 16:40:35,480 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 370 states. [2019-09-16 16:40:35,482 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 370 states to 370 states and 483 transitions. [2019-09-16 16:40:35,483 INFO L78 Accepts]: Start accepts. Automaton has 370 states and 483 transitions. Word has length 105 [2019-09-16 16:40:35,483 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-09-16 16:40:35,483 INFO L475 AbstractCegarLoop]: Abstraction has 370 states and 483 transitions. [2019-09-16 16:40:35,484 INFO L476 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-09-16 16:40:35,484 INFO L276 IsEmpty]: Start isEmpty. Operand 370 states and 483 transitions. [2019-09-16 16:40:35,485 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 106 [2019-09-16 16:40:35,485 INFO L399 BasicCegarLoop]: Found error trace [2019-09-16 16:40:35,485 INFO L407 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-09-16 16:40:35,485 INFO L418 AbstractCegarLoop]: === Iteration 11 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-09-16 16:40:35,486 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-09-16 16:40:35,486 INFO L82 PathProgramCache]: Analyzing trace with hash 628717414, now seen corresponding path program 1 times [2019-09-16 16:40:35,486 INFO L224 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-09-16 16:40:35,486 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-09-16 16:40:35,487 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-16 16:40:35,488 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-09-16 16:40:35,488 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-16 16:40:35,502 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-09-16 16:40:35,547 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-09-16 16:40:35,548 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-09-16 16:40:35,548 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-09-16 16:40:35,548 INFO L454 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-09-16 16:40:35,549 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-09-16 16:40:35,549 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-09-16 16:40:35,549 INFO L87 Difference]: Start difference. First operand 370 states and 483 transitions. Second operand 6 states. [2019-09-16 16:40:35,603 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-09-16 16:40:35,603 INFO L93 Difference]: Finished difference Result 732 states and 978 transitions. [2019-09-16 16:40:35,603 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-09-16 16:40:35,604 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 105 [2019-09-16 16:40:35,604 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-09-16 16:40:35,607 INFO L225 Difference]: With dead ends: 732 [2019-09-16 16:40:35,607 INFO L226 Difference]: Without dead ends: 384 [2019-09-16 16:40:35,610 INFO L636 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2019-09-16 16:40:35,610 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 384 states. [2019-09-16 16:40:35,639 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 384 to 380. [2019-09-16 16:40:35,639 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 380 states. [2019-09-16 16:40:35,642 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 380 states to 380 states and 493 transitions. [2019-09-16 16:40:35,642 INFO L78 Accepts]: Start accepts. Automaton has 380 states and 493 transitions. Word has length 105 [2019-09-16 16:40:35,644 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-09-16 16:40:35,644 INFO L475 AbstractCegarLoop]: Abstraction has 380 states and 493 transitions. [2019-09-16 16:40:35,644 INFO L476 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-09-16 16:40:35,644 INFO L276 IsEmpty]: Start isEmpty. Operand 380 states and 493 transitions. [2019-09-16 16:40:35,646 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 106 [2019-09-16 16:40:35,646 INFO L399 BasicCegarLoop]: Found error trace [2019-09-16 16:40:35,646 INFO L407 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-09-16 16:40:35,646 INFO L418 AbstractCegarLoop]: === Iteration 12 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-09-16 16:40:35,647 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-09-16 16:40:35,647 INFO L82 PathProgramCache]: Analyzing trace with hash 234350628, now seen corresponding path program 1 times [2019-09-16 16:40:35,647 INFO L224 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-09-16 16:40:35,647 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-09-16 16:40:35,649 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-16 16:40:35,649 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-09-16 16:40:35,649 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-16 16:40:35,662 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-09-16 16:40:35,752 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-09-16 16:40:35,753 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-09-16 16:40:35,753 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-09-16 16:40:35,754 INFO L454 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-09-16 16:40:35,754 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-09-16 16:40:35,755 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-09-16 16:40:35,755 INFO L87 Difference]: Start difference. First operand 380 states and 493 transitions. Second operand 5 states. [2019-09-16 16:40:36,353 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-09-16 16:40:36,353 INFO L93 Difference]: Finished difference Result 896 states and 1184 transitions. [2019-09-16 16:40:36,354 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-09-16 16:40:36,354 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 105 [2019-09-16 16:40:36,354 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-09-16 16:40:36,358 INFO L225 Difference]: With dead ends: 896 [2019-09-16 16:40:36,359 INFO L226 Difference]: Without dead ends: 539 [2019-09-16 16:40:36,361 INFO L636 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 5 SyntacticMatches, 3 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2019-09-16 16:40:36,362 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 539 states. [2019-09-16 16:40:36,396 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 539 to 499. [2019-09-16 16:40:36,397 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 499 states. [2019-09-16 16:40:36,400 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 499 states to 499 states and 635 transitions. [2019-09-16 16:40:36,400 INFO L78 Accepts]: Start accepts. Automaton has 499 states and 635 transitions. Word has length 105 [2019-09-16 16:40:36,401 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-09-16 16:40:36,401 INFO L475 AbstractCegarLoop]: Abstraction has 499 states and 635 transitions. [2019-09-16 16:40:36,401 INFO L476 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-09-16 16:40:36,401 INFO L276 IsEmpty]: Start isEmpty. Operand 499 states and 635 transitions. [2019-09-16 16:40:36,402 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 106 [2019-09-16 16:40:36,402 INFO L399 BasicCegarLoop]: Found error trace [2019-09-16 16:40:36,403 INFO L407 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-09-16 16:40:36,403 INFO L418 AbstractCegarLoop]: === Iteration 13 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-09-16 16:40:36,403 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-09-16 16:40:36,403 INFO L82 PathProgramCache]: Analyzing trace with hash 509110242, now seen corresponding path program 1 times [2019-09-16 16:40:36,404 INFO L224 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-09-16 16:40:36,404 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-09-16 16:40:36,405 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-16 16:40:36,405 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-09-16 16:40:36,406 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-16 16:40:36,417 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-09-16 16:40:36,474 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-09-16 16:40:36,477 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-09-16 16:40:36,477 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-09-16 16:40:36,478 INFO L454 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-09-16 16:40:36,478 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-09-16 16:40:36,479 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-09-16 16:40:36,479 INFO L87 Difference]: Start difference. First operand 499 states and 635 transitions. Second operand 5 states. [2019-09-16 16:40:36,857 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-09-16 16:40:36,858 INFO L93 Difference]: Finished difference Result 975 states and 1246 transitions. [2019-09-16 16:40:36,858 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-09-16 16:40:36,859 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 105 [2019-09-16 16:40:36,859 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-09-16 16:40:36,864 INFO L225 Difference]: With dead ends: 975 [2019-09-16 16:40:36,864 INFO L226 Difference]: Without dead ends: 499 [2019-09-16 16:40:36,866 INFO L636 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 7 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-09-16 16:40:36,867 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 499 states. [2019-09-16 16:40:36,906 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 499 to 499. [2019-09-16 16:40:36,907 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 499 states. [2019-09-16 16:40:36,911 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 499 states to 499 states and 630 transitions. [2019-09-16 16:40:36,912 INFO L78 Accepts]: Start accepts. Automaton has 499 states and 630 transitions. Word has length 105 [2019-09-16 16:40:36,912 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-09-16 16:40:36,912 INFO L475 AbstractCegarLoop]: Abstraction has 499 states and 630 transitions. [2019-09-16 16:40:36,913 INFO L476 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-09-16 16:40:36,913 INFO L276 IsEmpty]: Start isEmpty. Operand 499 states and 630 transitions. [2019-09-16 16:40:36,915 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 106 [2019-09-16 16:40:36,915 INFO L399 BasicCegarLoop]: Found error trace [2019-09-16 16:40:36,915 INFO L407 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-09-16 16:40:36,916 INFO L418 AbstractCegarLoop]: === Iteration 14 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-09-16 16:40:36,916 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-09-16 16:40:36,916 INFO L82 PathProgramCache]: Analyzing trace with hash 1210710116, now seen corresponding path program 1 times [2019-09-16 16:40:36,916 INFO L224 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-09-16 16:40:36,917 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-09-16 16:40:36,918 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-16 16:40:36,918 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-09-16 16:40:36,919 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-16 16:40:36,933 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-09-16 16:40:37,009 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-09-16 16:40:37,010 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-09-16 16:40:37,010 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-09-16 16:40:37,011 INFO L454 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-09-16 16:40:37,011 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-09-16 16:40:37,012 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-09-16 16:40:37,012 INFO L87 Difference]: Start difference. First operand 499 states and 630 transitions. Second operand 5 states. [2019-09-16 16:40:37,682 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-09-16 16:40:37,683 INFO L93 Difference]: Finished difference Result 975 states and 1236 transitions. [2019-09-16 16:40:37,683 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-09-16 16:40:37,683 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 105 [2019-09-16 16:40:37,684 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-09-16 16:40:37,686 INFO L225 Difference]: With dead ends: 975 [2019-09-16 16:40:37,686 INFO L226 Difference]: Without dead ends: 499 [2019-09-16 16:40:37,688 INFO L636 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 4 SyntacticMatches, 3 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-09-16 16:40:37,689 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 499 states. [2019-09-16 16:40:37,720 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 499 to 499. [2019-09-16 16:40:37,720 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 499 states. [2019-09-16 16:40:37,723 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 499 states to 499 states and 625 transitions. [2019-09-16 16:40:37,724 INFO L78 Accepts]: Start accepts. Automaton has 499 states and 625 transitions. Word has length 105 [2019-09-16 16:40:37,724 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-09-16 16:40:37,724 INFO L475 AbstractCegarLoop]: Abstraction has 499 states and 625 transitions. [2019-09-16 16:40:37,724 INFO L476 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-09-16 16:40:37,724 INFO L276 IsEmpty]: Start isEmpty. Operand 499 states and 625 transitions. [2019-09-16 16:40:37,726 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 106 [2019-09-16 16:40:37,726 INFO L399 BasicCegarLoop]: Found error trace [2019-09-16 16:40:37,726 INFO L407 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-09-16 16:40:37,726 INFO L418 AbstractCegarLoop]: === Iteration 15 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-09-16 16:40:37,727 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-09-16 16:40:37,727 INFO L82 PathProgramCache]: Analyzing trace with hash 1233342370, now seen corresponding path program 1 times [2019-09-16 16:40:37,727 INFO L224 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-09-16 16:40:37,727 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-09-16 16:40:37,728 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-16 16:40:37,728 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-09-16 16:40:37,728 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-16 16:40:37,741 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-09-16 16:40:37,793 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-09-16 16:40:37,793 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-09-16 16:40:37,793 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-09-16 16:40:37,794 INFO L454 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-09-16 16:40:37,794 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-09-16 16:40:37,794 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-09-16 16:40:37,795 INFO L87 Difference]: Start difference. First operand 499 states and 625 transitions. Second operand 5 states. [2019-09-16 16:40:38,340 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-09-16 16:40:38,341 INFO L93 Difference]: Finished difference Result 1073 states and 1375 transitions. [2019-09-16 16:40:38,342 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-09-16 16:40:38,342 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 105 [2019-09-16 16:40:38,342 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-09-16 16:40:38,346 INFO L225 Difference]: With dead ends: 1073 [2019-09-16 16:40:38,347 INFO L226 Difference]: Without dead ends: 596 [2019-09-16 16:40:38,353 INFO L636 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-09-16 16:40:38,355 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 596 states. [2019-09-16 16:40:38,416 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 596 to 561. [2019-09-16 16:40:38,416 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 561 states. [2019-09-16 16:40:38,420 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 561 states to 561 states and 697 transitions. [2019-09-16 16:40:38,421 INFO L78 Accepts]: Start accepts. Automaton has 561 states and 697 transitions. Word has length 105 [2019-09-16 16:40:38,422 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-09-16 16:40:38,422 INFO L475 AbstractCegarLoop]: Abstraction has 561 states and 697 transitions. [2019-09-16 16:40:38,422 INFO L476 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-09-16 16:40:38,422 INFO L276 IsEmpty]: Start isEmpty. Operand 561 states and 697 transitions. [2019-09-16 16:40:38,424 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 106 [2019-09-16 16:40:38,424 INFO L399 BasicCegarLoop]: Found error trace [2019-09-16 16:40:38,424 INFO L407 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-09-16 16:40:38,424 INFO L418 AbstractCegarLoop]: === Iteration 16 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-09-16 16:40:38,425 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-09-16 16:40:38,425 INFO L82 PathProgramCache]: Analyzing trace with hash 723869280, now seen corresponding path program 1 times [2019-09-16 16:40:38,425 INFO L224 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-09-16 16:40:38,425 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-09-16 16:40:38,426 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-16 16:40:38,426 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-09-16 16:40:38,427 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-16 16:40:38,442 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-09-16 16:40:38,522 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-09-16 16:40:38,526 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-09-16 16:40:38,526 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-09-16 16:40:38,527 INFO L454 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-09-16 16:40:38,527 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-09-16 16:40:38,528 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-09-16 16:40:38,528 INFO L87 Difference]: Start difference. First operand 561 states and 697 transitions. Second operand 5 states. [2019-09-16 16:40:39,230 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-09-16 16:40:39,231 INFO L93 Difference]: Finished difference Result 1325 states and 1735 transitions. [2019-09-16 16:40:39,231 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-09-16 16:40:39,231 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 105 [2019-09-16 16:40:39,232 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-09-16 16:40:39,240 INFO L225 Difference]: With dead ends: 1325 [2019-09-16 16:40:39,240 INFO L226 Difference]: Without dead ends: 786 [2019-09-16 16:40:39,243 INFO L636 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 5 SyntacticMatches, 3 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-09-16 16:40:39,244 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 786 states. [2019-09-16 16:40:39,293 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 786 to 647. [2019-09-16 16:40:39,293 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 647 states. [2019-09-16 16:40:39,296 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 647 states to 647 states and 786 transitions. [2019-09-16 16:40:39,297 INFO L78 Accepts]: Start accepts. Automaton has 647 states and 786 transitions. Word has length 105 [2019-09-16 16:40:39,298 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-09-16 16:40:39,298 INFO L475 AbstractCegarLoop]: Abstraction has 647 states and 786 transitions. [2019-09-16 16:40:39,298 INFO L476 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-09-16 16:40:39,298 INFO L276 IsEmpty]: Start isEmpty. Operand 647 states and 786 transitions. [2019-09-16 16:40:39,299 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 106 [2019-09-16 16:40:39,299 INFO L399 BasicCegarLoop]: Found error trace [2019-09-16 16:40:39,299 INFO L407 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-09-16 16:40:39,300 INFO L418 AbstractCegarLoop]: === Iteration 17 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-09-16 16:40:39,300 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-09-16 16:40:39,300 INFO L82 PathProgramCache]: Analyzing trace with hash -1647869982, now seen corresponding path program 1 times [2019-09-16 16:40:39,300 INFO L224 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-09-16 16:40:39,300 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-09-16 16:40:39,301 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-16 16:40:39,301 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-09-16 16:40:39,301 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-16 16:40:39,315 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-09-16 16:40:39,384 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-09-16 16:40:39,385 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-09-16 16:40:39,385 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-09-16 16:40:39,385 INFO L454 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-09-16 16:40:39,385 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-09-16 16:40:39,386 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-09-16 16:40:39,386 INFO L87 Difference]: Start difference. First operand 647 states and 786 transitions. Second operand 5 states. [2019-09-16 16:40:40,064 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-09-16 16:40:40,065 INFO L93 Difference]: Finished difference Result 1474 states and 1904 transitions. [2019-09-16 16:40:40,065 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-09-16 16:40:40,065 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 105 [2019-09-16 16:40:40,066 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-09-16 16:40:40,073 INFO L225 Difference]: With dead ends: 1474 [2019-09-16 16:40:40,073 INFO L226 Difference]: Without dead ends: 849 [2019-09-16 16:40:40,076 INFO L636 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 5 SyntacticMatches, 3 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2019-09-16 16:40:40,078 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 849 states. [2019-09-16 16:40:40,136 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 849 to 739. [2019-09-16 16:40:40,136 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 739 states. [2019-09-16 16:40:40,140 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 739 states to 739 states and 886 transitions. [2019-09-16 16:40:40,140 INFO L78 Accepts]: Start accepts. Automaton has 739 states and 886 transitions. Word has length 105 [2019-09-16 16:40:40,141 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-09-16 16:40:40,141 INFO L475 AbstractCegarLoop]: Abstraction has 739 states and 886 transitions. [2019-09-16 16:40:40,141 INFO L476 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-09-16 16:40:40,141 INFO L276 IsEmpty]: Start isEmpty. Operand 739 states and 886 transitions. [2019-09-16 16:40:40,142 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 106 [2019-09-16 16:40:40,142 INFO L399 BasicCegarLoop]: Found error trace [2019-09-16 16:40:40,143 INFO L407 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-09-16 16:40:40,143 INFO L418 AbstractCegarLoop]: === Iteration 18 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-09-16 16:40:40,143 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-09-16 16:40:40,143 INFO L82 PathProgramCache]: Analyzing trace with hash -1585830368, now seen corresponding path program 1 times [2019-09-16 16:40:40,144 INFO L224 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-09-16 16:40:40,144 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-09-16 16:40:40,145 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-16 16:40:40,145 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-09-16 16:40:40,145 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-16 16:40:40,156 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-09-16 16:40:40,195 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-09-16 16:40:40,195 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-09-16 16:40:40,196 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-09-16 16:40:40,196 INFO L454 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-09-16 16:40:40,196 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-09-16 16:40:40,197 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-09-16 16:40:40,197 INFO L87 Difference]: Start difference. First operand 739 states and 886 transitions. Second operand 3 states. [2019-09-16 16:40:40,338 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-09-16 16:40:40,338 INFO L93 Difference]: Finished difference Result 2099 states and 2536 transitions. [2019-09-16 16:40:40,338 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-09-16 16:40:40,339 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 105 [2019-09-16 16:40:40,339 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-09-16 16:40:40,348 INFO L225 Difference]: With dead ends: 2099 [2019-09-16 16:40:40,349 INFO L226 Difference]: Without dead ends: 1385 [2019-09-16 16:40:40,352 INFO L636 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-09-16 16:40:40,354 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1385 states. [2019-09-16 16:40:40,484 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1385 to 1382. [2019-09-16 16:40:40,485 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1382 states. [2019-09-16 16:40:40,492 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1382 states to 1382 states and 1666 transitions. [2019-09-16 16:40:40,492 INFO L78 Accepts]: Start accepts. Automaton has 1382 states and 1666 transitions. Word has length 105 [2019-09-16 16:40:40,493 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-09-16 16:40:40,493 INFO L475 AbstractCegarLoop]: Abstraction has 1382 states and 1666 transitions. [2019-09-16 16:40:40,493 INFO L476 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-09-16 16:40:40,493 INFO L276 IsEmpty]: Start isEmpty. Operand 1382 states and 1666 transitions. [2019-09-16 16:40:40,498 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 107 [2019-09-16 16:40:40,498 INFO L399 BasicCegarLoop]: Found error trace [2019-09-16 16:40:40,498 INFO L407 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-09-16 16:40:40,498 INFO L418 AbstractCegarLoop]: === Iteration 19 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-09-16 16:40:40,499 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-09-16 16:40:40,499 INFO L82 PathProgramCache]: Analyzing trace with hash -1038281626, now seen corresponding path program 1 times [2019-09-16 16:40:40,499 INFO L224 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-09-16 16:40:40,499 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-09-16 16:40:40,501 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-16 16:40:40,501 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-09-16 16:40:40,501 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-16 16:40:40,522 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-09-16 16:40:40,563 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-09-16 16:40:40,563 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-09-16 16:40:40,563 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-09-16 16:40:40,567 INFO L454 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-09-16 16:40:40,568 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-09-16 16:40:40,568 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-09-16 16:40:40,568 INFO L87 Difference]: Start difference. First operand 1382 states and 1666 transitions. Second operand 3 states. [2019-09-16 16:40:40,751 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-09-16 16:40:40,752 INFO L93 Difference]: Finished difference Result 4000 states and 5001 transitions. [2019-09-16 16:40:40,752 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-09-16 16:40:40,752 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 106 [2019-09-16 16:40:40,753 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-09-16 16:40:40,771 INFO L225 Difference]: With dead ends: 4000 [2019-09-16 16:40:40,771 INFO L226 Difference]: Without dead ends: 2649 [2019-09-16 16:40:40,780 INFO L636 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-09-16 16:40:40,783 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2649 states. [2019-09-16 16:40:40,989 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2649 to 2643. [2019-09-16 16:40:40,989 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2643 states. [2019-09-16 16:40:40,999 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2643 states to 2643 states and 3237 transitions. [2019-09-16 16:40:41,000 INFO L78 Accepts]: Start accepts. Automaton has 2643 states and 3237 transitions. Word has length 106 [2019-09-16 16:40:41,003 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-09-16 16:40:41,003 INFO L475 AbstractCegarLoop]: Abstraction has 2643 states and 3237 transitions. [2019-09-16 16:40:41,003 INFO L476 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-09-16 16:40:41,003 INFO L276 IsEmpty]: Start isEmpty. Operand 2643 states and 3237 transitions. [2019-09-16 16:40:41,006 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 128 [2019-09-16 16:40:41,006 INFO L399 BasicCegarLoop]: Found error trace [2019-09-16 16:40:41,007 INFO L407 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-09-16 16:40:41,007 INFO L418 AbstractCegarLoop]: === Iteration 20 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-09-16 16:40:41,007 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-09-16 16:40:41,007 INFO L82 PathProgramCache]: Analyzing trace with hash -941553424, now seen corresponding path program 1 times [2019-09-16 16:40:41,007 INFO L224 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-09-16 16:40:41,008 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-09-16 16:40:41,009 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-16 16:40:41,009 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-09-16 16:40:41,009 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-16 16:40:41,025 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-09-16 16:40:41,060 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 12 proven. 0 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2019-09-16 16:40:41,060 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-09-16 16:40:41,060 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-09-16 16:40:41,061 INFO L454 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-09-16 16:40:41,061 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-09-16 16:40:41,061 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-09-16 16:40:41,062 INFO L87 Difference]: Start difference. First operand 2643 states and 3237 transitions. Second operand 3 states. [2019-09-16 16:40:41,396 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-09-16 16:40:41,396 INFO L93 Difference]: Finished difference Result 7814 states and 9714 transitions. [2019-09-16 16:40:41,396 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-09-16 16:40:41,397 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 127 [2019-09-16 16:40:41,397 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-09-16 16:40:41,422 INFO L225 Difference]: With dead ends: 7814 [2019-09-16 16:40:41,422 INFO L226 Difference]: Without dead ends: 3927 [2019-09-16 16:40:41,438 INFO L636 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-09-16 16:40:41,443 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3927 states. [2019-09-16 16:40:41,789 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3927 to 3927. [2019-09-16 16:40:41,790 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3927 states. [2019-09-16 16:40:41,810 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3927 states to 3927 states and 4801 transitions. [2019-09-16 16:40:41,812 INFO L78 Accepts]: Start accepts. Automaton has 3927 states and 4801 transitions. Word has length 127 [2019-09-16 16:40:41,813 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-09-16 16:40:41,813 INFO L475 AbstractCegarLoop]: Abstraction has 3927 states and 4801 transitions. [2019-09-16 16:40:41,813 INFO L476 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-09-16 16:40:41,813 INFO L276 IsEmpty]: Start isEmpty. Operand 3927 states and 4801 transitions. [2019-09-16 16:40:41,822 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 181 [2019-09-16 16:40:41,822 INFO L399 BasicCegarLoop]: Found error trace [2019-09-16 16:40:41,823 INFO L407 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-09-16 16:40:41,823 INFO L418 AbstractCegarLoop]: === Iteration 21 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-09-16 16:40:41,823 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-09-16 16:40:41,824 INFO L82 PathProgramCache]: Analyzing trace with hash -1911837015, now seen corresponding path program 1 times [2019-09-16 16:40:41,824 INFO L224 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-09-16 16:40:41,824 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-09-16 16:40:41,826 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-16 16:40:41,826 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-09-16 16:40:41,826 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-16 16:40:41,846 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-09-16 16:40:41,899 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 12 proven. 0 refuted. 0 times theorem prover too weak. 43 trivial. 0 not checked. [2019-09-16 16:40:41,900 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-09-16 16:40:41,900 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-09-16 16:40:41,901 INFO L454 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-09-16 16:40:41,902 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-09-16 16:40:41,902 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-09-16 16:40:41,902 INFO L87 Difference]: Start difference. First operand 3927 states and 4801 transitions. Second operand 3 states. [2019-09-16 16:40:42,504 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-09-16 16:40:42,504 INFO L93 Difference]: Finished difference Result 11541 states and 14535 transitions. [2019-09-16 16:40:42,505 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-09-16 16:40:42,505 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 180 [2019-09-16 16:40:42,505 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-09-16 16:40:42,558 INFO L225 Difference]: With dead ends: 11541 [2019-09-16 16:40:42,558 INFO L226 Difference]: Without dead ends: 7649 [2019-09-16 16:40:42,576 INFO L636 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-09-16 16:40:42,586 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7649 states. [2019-09-16 16:40:43,204 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7649 to 7646. [2019-09-16 16:40:43,204 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7646 states. [2019-09-16 16:40:43,231 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7646 states to 7646 states and 9538 transitions. [2019-09-16 16:40:43,234 INFO L78 Accepts]: Start accepts. Automaton has 7646 states and 9538 transitions. Word has length 180 [2019-09-16 16:40:43,235 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-09-16 16:40:43,235 INFO L475 AbstractCegarLoop]: Abstraction has 7646 states and 9538 transitions. [2019-09-16 16:40:43,235 INFO L476 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-09-16 16:40:43,236 INFO L276 IsEmpty]: Start isEmpty. Operand 7646 states and 9538 transitions. [2019-09-16 16:40:43,250 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 182 [2019-09-16 16:40:43,250 INFO L399 BasicCegarLoop]: Found error trace [2019-09-16 16:40:43,251 INFO L407 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-09-16 16:40:43,251 INFO L418 AbstractCegarLoop]: === Iteration 22 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-09-16 16:40:43,251 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-09-16 16:40:43,251 INFO L82 PathProgramCache]: Analyzing trace with hash -875605821, now seen corresponding path program 1 times [2019-09-16 16:40:43,251 INFO L224 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-09-16 16:40:43,252 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-09-16 16:40:43,253 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-16 16:40:43,254 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-09-16 16:40:43,254 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-16 16:40:43,274 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-09-16 16:40:43,357 INFO L134 CoverageAnalysis]: Checked inductivity of 56 backedges. 4 proven. 11 refuted. 0 times theorem prover too weak. 41 trivial. 0 not checked. [2019-09-16 16:40:43,357 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2019-09-16 16:40:43,357 INFO L224 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2019-09-16 16:40:43,406 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-09-16 16:40:43,555 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-09-16 16:40:43,560 INFO L256 TraceCheckSpWp]: Trace formula consists of 823 conjuncts, 3 conjunts are in the unsatisfiable core [2019-09-16 16:40:43,596 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2019-09-16 16:40:43,686 INFO L134 CoverageAnalysis]: Checked inductivity of 56 backedges. 42 proven. 0 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2019-09-16 16:40:43,700 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2019-09-16 16:40:43,700 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [6] total 7 [2019-09-16 16:40:43,701 INFO L454 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-09-16 16:40:43,701 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-09-16 16:40:43,702 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=28, Unknown=0, NotChecked=0, Total=42 [2019-09-16 16:40:43,702 INFO L87 Difference]: Start difference. First operand 7646 states and 9538 transitions. Second operand 7 states. [2019-09-16 16:40:45,650 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-09-16 16:40:45,650 INFO L93 Difference]: Finished difference Result 22934 states and 30661 transitions. [2019-09-16 16:40:45,651 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-09-16 16:40:45,651 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 181 [2019-09-16 16:40:45,651 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-09-16 16:40:45,740 INFO L225 Difference]: With dead ends: 22934 [2019-09-16 16:40:45,740 INFO L226 Difference]: Without dead ends: 15331 [2019-09-16 16:40:45,908 INFO L636 BasicCegarLoop]: 0 DeclaredPredicates, 189 GetRequests, 183 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=38, Unknown=0, NotChecked=0, Total=56 [2019-09-16 16:40:45,925 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15331 states. [2019-09-16 16:40:47,559 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15331 to 15316. [2019-09-16 16:40:47,559 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15316 states. [2019-09-16 16:40:47,612 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15316 states to 15316 states and 19002 transitions. [2019-09-16 16:40:47,618 INFO L78 Accepts]: Start accepts. Automaton has 15316 states and 19002 transitions. Word has length 181 [2019-09-16 16:40:47,618 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-09-16 16:40:47,619 INFO L475 AbstractCegarLoop]: Abstraction has 15316 states and 19002 transitions. [2019-09-16 16:40:47,619 INFO L476 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-09-16 16:40:47,619 INFO L276 IsEmpty]: Start isEmpty. Operand 15316 states and 19002 transitions. [2019-09-16 16:40:47,645 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 243 [2019-09-16 16:40:47,646 INFO L399 BasicCegarLoop]: Found error trace [2019-09-16 16:40:47,646 INFO L407 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-09-16 16:40:47,646 INFO L418 AbstractCegarLoop]: === Iteration 23 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-09-16 16:40:47,647 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-09-16 16:40:47,647 INFO L82 PathProgramCache]: Analyzing trace with hash -248422449, now seen corresponding path program 1 times [2019-09-16 16:40:47,647 INFO L224 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-09-16 16:40:47,647 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-09-16 16:40:47,648 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-16 16:40:47,649 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-09-16 16:40:47,649 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-16 16:40:47,660 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-09-16 16:40:47,719 INFO L134 CoverageAnalysis]: Checked inductivity of 142 backedges. 1 proven. 0 refuted. 0 times theorem prover too weak. 141 trivial. 0 not checked. [2019-09-16 16:40:47,720 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-09-16 16:40:47,720 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-09-16 16:40:47,720 INFO L454 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-09-16 16:40:47,721 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-09-16 16:40:47,721 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-09-16 16:40:47,721 INFO L87 Difference]: Start difference. First operand 15316 states and 19002 transitions. Second operand 4 states. [2019-09-16 16:40:48,496 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-09-16 16:40:48,497 INFO L93 Difference]: Finished difference Result 27515 states and 33937 transitions. [2019-09-16 16:40:48,497 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-09-16 16:40:48,497 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 242 [2019-09-16 16:40:48,497 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-09-16 16:40:48,562 INFO L225 Difference]: With dead ends: 27515 [2019-09-16 16:40:48,562 INFO L226 Difference]: Without dead ends: 12232 [2019-09-16 16:40:48,593 INFO L636 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-09-16 16:40:48,607 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12232 states. [2019-09-16 16:40:49,297 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12232 to 11894. [2019-09-16 16:40:49,298 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11894 states. [2019-09-16 16:40:49,324 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11894 states to 11894 states and 14633 transitions. [2019-09-16 16:40:49,330 INFO L78 Accepts]: Start accepts. Automaton has 11894 states and 14633 transitions. Word has length 242 [2019-09-16 16:40:49,330 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-09-16 16:40:49,330 INFO L475 AbstractCegarLoop]: Abstraction has 11894 states and 14633 transitions. [2019-09-16 16:40:49,330 INFO L476 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-09-16 16:40:49,331 INFO L276 IsEmpty]: Start isEmpty. Operand 11894 states and 14633 transitions. [2019-09-16 16:40:49,347 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 243 [2019-09-16 16:40:49,347 INFO L399 BasicCegarLoop]: Found error trace [2019-09-16 16:40:49,348 INFO L407 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-09-16 16:40:49,348 INFO L418 AbstractCegarLoop]: === Iteration 24 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-09-16 16:40:49,348 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-09-16 16:40:49,348 INFO L82 PathProgramCache]: Analyzing trace with hash -1139497071, now seen corresponding path program 1 times [2019-09-16 16:40:49,349 INFO L224 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-09-16 16:40:49,349 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-09-16 16:40:49,350 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-16 16:40:49,350 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-09-16 16:40:49,350 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-16 16:40:49,368 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-09-16 16:40:49,448 INFO L134 CoverageAnalysis]: Checked inductivity of 142 backedges. 14 proven. 5 refuted. 0 times theorem prover too weak. 123 trivial. 0 not checked. [2019-09-16 16:40:49,448 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2019-09-16 16:40:49,449 INFO L224 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) [2019-09-16 16:40:49,476 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY Waiting until toolchain timeout for monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2019-09-16 16:40:49,712 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-09-16 16:40:49,715 INFO L256 TraceCheckSpWp]: Trace formula consists of 1024 conjuncts, 3 conjunts are in the unsatisfiable core [2019-09-16 16:40:49,733 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2019-09-16 16:40:49,782 INFO L134 CoverageAnalysis]: Checked inductivity of 142 backedges. 102 proven. 0 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2019-09-16 16:40:49,786 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2019-09-16 16:40:49,787 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [4] total 5 [2019-09-16 16:40:49,789 INFO L454 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-09-16 16:40:49,789 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-09-16 16:40:49,790 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-09-16 16:40:49,790 INFO L87 Difference]: Start difference. First operand 11894 states and 14633 transitions. Second operand 5 states. [2019-09-16 16:40:52,615 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-09-16 16:40:52,615 INFO L93 Difference]: Finished difference Result 48053 states and 64785 transitions. [2019-09-16 16:40:52,615 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-09-16 16:40:52,615 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 242 [2019-09-16 16:40:52,616 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-09-16 16:40:52,756 INFO L225 Difference]: With dead ends: 48053 [2019-09-16 16:40:52,757 INFO L226 Difference]: Without dead ends: 36192 [2019-09-16 16:40:52,810 INFO L636 BasicCegarLoop]: 0 DeclaredPredicates, 254 GetRequests, 247 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-09-16 16:40:52,855 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 36192 states. [2019-09-16 16:40:55,067 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 36192 to 35955. [2019-09-16 16:40:55,068 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 35955 states. [2019-09-16 16:40:55,166 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 35955 states to 35955 states and 45858 transitions. [2019-09-16 16:40:55,176 INFO L78 Accepts]: Start accepts. Automaton has 35955 states and 45858 transitions. Word has length 242 [2019-09-16 16:40:55,176 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-09-16 16:40:55,176 INFO L475 AbstractCegarLoop]: Abstraction has 35955 states and 45858 transitions. [2019-09-16 16:40:55,176 INFO L476 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-09-16 16:40:55,177 INFO L276 IsEmpty]: Start isEmpty. Operand 35955 states and 45858 transitions. [2019-09-16 16:40:55,229 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 246 [2019-09-16 16:40:55,230 INFO L399 BasicCegarLoop]: Found error trace [2019-09-16 16:40:55,230 INFO L407 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-09-16 16:40:55,230 INFO L418 AbstractCegarLoop]: === Iteration 25 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-09-16 16:40:55,230 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-09-16 16:40:55,231 INFO L82 PathProgramCache]: Analyzing trace with hash 1709096844, now seen corresponding path program 1 times [2019-09-16 16:40:55,231 INFO L224 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-09-16 16:40:55,231 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-09-16 16:40:55,232 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-16 16:40:55,232 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-09-16 16:40:55,232 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-16 16:40:55,251 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-09-16 16:40:55,334 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 7 proven. 28 refuted. 0 times theorem prover too weak. 109 trivial. 0 not checked. [2019-09-16 16:40:55,335 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2019-09-16 16:40:55,335 INFO L224 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) [2019-09-16 16:40:55,362 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2019-09-16 16:40:55,482 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-09-16 16:40:55,486 INFO L256 TraceCheckSpWp]: Trace formula consists of 1035 conjuncts, 10 conjunts are in the unsatisfiable core [2019-09-16 16:40:55,498 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2019-09-16 16:40:55,668 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 93 proven. 38 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [MP z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (4)] Exception during sending of exit command (exit): Stream closed [2019-09-16 16:40:55,682 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-09-16 16:40:55,683 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 8 [2019-09-16 16:40:55,684 INFO L454 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-09-16 16:40:55,684 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-09-16 16:40:55,684 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=40, Unknown=0, NotChecked=0, Total=56 [2019-09-16 16:40:55,685 INFO L87 Difference]: Start difference. First operand 35955 states and 45858 transitions. Second operand 8 states. [2019-09-16 16:41:00,941 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-09-16 16:41:00,942 INFO L93 Difference]: Finished difference Result 53504 states and 67984 transitions. [2019-09-16 16:41:00,943 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-09-16 16:41:00,943 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 245 [2019-09-16 16:41:00,943 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-09-16 16:41:01,143 INFO L225 Difference]: With dead ends: 53504 [2019-09-16 16:41:01,143 INFO L226 Difference]: Without dead ends: 31664 [2019-09-16 16:41:01,251 INFO L636 BasicCegarLoop]: 0 DeclaredPredicates, 254 GetRequests, 246 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=28, Invalid=62, Unknown=0, NotChecked=0, Total=90 [2019-09-16 16:41:01,282 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 31664 states. [2019-09-16 16:41:04,302 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 31664 to 31436. [2019-09-16 16:41:04,302 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 31436 states. [2019-09-16 16:41:04,374 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 31436 states to 31436 states and 38693 transitions. [2019-09-16 16:41:04,386 INFO L78 Accepts]: Start accepts. Automaton has 31436 states and 38693 transitions. Word has length 245 [2019-09-16 16:41:04,386 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-09-16 16:41:04,387 INFO L475 AbstractCegarLoop]: Abstraction has 31436 states and 38693 transitions. [2019-09-16 16:41:04,387 INFO L476 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-09-16 16:41:04,387 INFO L276 IsEmpty]: Start isEmpty. Operand 31436 states and 38693 transitions. [2019-09-16 16:41:04,447 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 231 [2019-09-16 16:41:04,447 INFO L399 BasicCegarLoop]: Found error trace [2019-09-16 16:41:04,447 INFO L407 BasicCegarLoop]: trace histogram [5, 5, 5, 5, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-09-16 16:41:04,448 INFO L418 AbstractCegarLoop]: === Iteration 26 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-09-16 16:41:04,448 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-09-16 16:41:04,448 INFO L82 PathProgramCache]: Analyzing trace with hash 979102379, now seen corresponding path program 1 times [2019-09-16 16:41:04,448 INFO L224 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-09-16 16:41:04,448 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-09-16 16:41:04,449 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-16 16:41:04,449 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-09-16 16:41:04,449 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-16 16:41:04,467 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-09-16 16:41:04,553 INFO L134 CoverageAnalysis]: Checked inductivity of 132 backedges. 20 proven. 20 refuted. 0 times theorem prover too weak. 92 trivial. 0 not checked. [2019-09-16 16:41:04,553 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2019-09-16 16:41:04,553 INFO L224 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2019-09-16 16:41:04,583 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-09-16 16:41:04,698 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-09-16 16:41:04,701 INFO L256 TraceCheckSpWp]: Trace formula consists of 965 conjuncts, 5 conjunts are in the unsatisfiable core [2019-09-16 16:41:04,707 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2019-09-16 16:41:04,779 INFO L134 CoverageAnalysis]: Checked inductivity of 132 backedges. 113 proven. 0 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2019-09-16 16:41:04,789 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2019-09-16 16:41:04,790 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [8] total 12 [2019-09-16 16:41:04,791 INFO L454 AbstractCegarLoop]: Interpolant automaton has 12 states [2019-09-16 16:41:04,791 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-09-16 16:41:04,791 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=29, Invalid=103, Unknown=0, NotChecked=0, Total=132 [2019-09-16 16:41:04,792 INFO L87 Difference]: Start difference. First operand 31436 states and 38693 transitions. Second operand 12 states. [2019-09-16 16:41:05,581 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-09-16 16:41:05,582 INFO L93 Difference]: Finished difference Result 40531 states and 49464 transitions. [2019-09-16 16:41:05,582 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-09-16 16:41:05,582 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 230 [2019-09-16 16:41:05,583 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-09-16 16:41:05,632 INFO L225 Difference]: With dead ends: 40531 [2019-09-16 16:41:05,633 INFO L226 Difference]: Without dead ends: 9145 [2019-09-16 16:41:05,688 INFO L636 BasicCegarLoop]: 0 DeclaredPredicates, 243 GetRequests, 230 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 19 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=50, Invalid=160, Unknown=0, NotChecked=0, Total=210 [2019-09-16 16:41:05,697 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9145 states. [2019-09-16 16:41:07,381 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9145 to 8681. [2019-09-16 16:41:07,382 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8681 states. [2019-09-16 16:41:07,395 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8681 states to 8681 states and 9879 transitions. [2019-09-16 16:41:07,399 INFO L78 Accepts]: Start accepts. Automaton has 8681 states and 9879 transitions. Word has length 230 [2019-09-16 16:41:07,400 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-09-16 16:41:07,400 INFO L475 AbstractCegarLoop]: Abstraction has 8681 states and 9879 transitions. [2019-09-16 16:41:07,400 INFO L476 AbstractCegarLoop]: Interpolant automaton has 12 states. [2019-09-16 16:41:07,400 INFO L276 IsEmpty]: Start isEmpty. Operand 8681 states and 9879 transitions. [2019-09-16 16:41:07,415 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 308 [2019-09-16 16:41:07,415 INFO L399 BasicCegarLoop]: Found error trace [2019-09-16 16:41:07,416 INFO L407 BasicCegarLoop]: trace histogram [4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-09-16 16:41:07,416 INFO L418 AbstractCegarLoop]: === Iteration 27 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-09-16 16:41:07,416 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-09-16 16:41:07,416 INFO L82 PathProgramCache]: Analyzing trace with hash -1766313989, now seen corresponding path program 1 times [2019-09-16 16:41:07,416 INFO L224 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-09-16 16:41:07,417 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-09-16 16:41:07,418 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-16 16:41:07,418 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-09-16 16:41:07,418 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-16 16:41:07,449 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-09-16 16:41:07,484 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-09-16 16:41:07,618 INFO L474 BasicCegarLoop]: Counterexample might be feasible [2019-09-16 16:41:07,822 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 16.09 04:41:07 BoogieIcfgContainer [2019-09-16 16:41:07,822 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-09-16 16:41:07,825 INFO L168 Benchmark]: Toolchain (without parser) took 39079.53 ms. Allocated memory was 138.9 MB in the beginning and 2.2 GB in the end (delta: 2.1 GB). Free memory was 86.4 MB in the beginning and 1.6 GB in the end (delta: -1.6 GB). Peak memory consumption was 511.0 MB. Max. memory is 7.1 GB. [2019-09-16 16:41:07,826 INFO L168 Benchmark]: CDTParser took 0.53 ms. Allocated memory is still 138.9 MB. Free memory was 104.9 MB in the beginning and 104.7 MB in the end (delta: 212.8 kB). Peak memory consumption was 212.8 kB. Max. memory is 7.1 GB. [2019-09-16 16:41:07,826 INFO L168 Benchmark]: CACSL2BoogieTranslator took 513.45 ms. Allocated memory was 138.9 MB in the beginning and 198.2 MB in the end (delta: 59.2 MB). Free memory was 86.2 MB in the beginning and 173.1 MB in the end (delta: -86.9 MB). Peak memory consumption was 22.7 MB. Max. memory is 7.1 GB. [2019-09-16 16:41:07,827 INFO L168 Benchmark]: Boogie Preprocessor took 78.47 ms. Allocated memory is still 198.2 MB. Free memory was 173.1 MB in the beginning and 170.6 MB in the end (delta: 2.5 MB). Peak memory consumption was 2.5 MB. Max. memory is 7.1 GB. [2019-09-16 16:41:07,828 INFO L168 Benchmark]: RCFGBuilder took 713.90 ms. Allocated memory is still 198.2 MB. Free memory was 170.6 MB in the beginning and 129.5 MB in the end (delta: 41.1 MB). Peak memory consumption was 41.1 MB. Max. memory is 7.1 GB. [2019-09-16 16:41:07,829 INFO L168 Benchmark]: TraceAbstraction took 37768.97 ms. Allocated memory was 198.2 MB in the beginning and 2.2 GB in the end (delta: 2.0 GB). Free memory was 128.8 MB in the beginning and 1.6 GB in the end (delta: -1.5 GB). Peak memory consumption was 494.2 MB. Max. memory is 7.1 GB. [2019-09-16 16:41:07,832 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.53 ms. Allocated memory is still 138.9 MB. Free memory was 104.9 MB in the beginning and 104.7 MB in the end (delta: 212.8 kB). Peak memory consumption was 212.8 kB. Max. memory is 7.1 GB. * CACSL2BoogieTranslator took 513.45 ms. Allocated memory was 138.9 MB in the beginning and 198.2 MB in the end (delta: 59.2 MB). Free memory was 86.2 MB in the beginning and 173.1 MB in the end (delta: -86.9 MB). Peak memory consumption was 22.7 MB. Max. memory is 7.1 GB. * Boogie Preprocessor took 78.47 ms. Allocated memory is still 198.2 MB. Free memory was 173.1 MB in the beginning and 170.6 MB in the end (delta: 2.5 MB). Peak memory consumption was 2.5 MB. Max. memory is 7.1 GB. * RCFGBuilder took 713.90 ms. Allocated memory is still 198.2 MB. Free memory was 170.6 MB in the beginning and 129.5 MB in the end (delta: 41.1 MB). Peak memory consumption was 41.1 MB. Max. memory is 7.1 GB. * TraceAbstraction took 37768.97 ms. Allocated memory was 198.2 MB in the beginning and 2.2 GB in the end (delta: 2.0 GB). Free memory was 128.8 MB in the beginning and 1.6 GB in the end (delta: -1.5 GB). Peak memory consumption was 494.2 MB. Max. memory is 7.1 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 11]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L15] int m_pc = 0; [L16] int t1_pc = 0; [L17] int t2_pc = 0; [L18] int t3_pc = 0; [L19] int m_st ; [L20] int t1_st ; [L21] int t2_st ; [L22] int t3_st ; [L23] int m_i ; [L24] int t1_i ; [L25] int t2_i ; [L26] int t3_i ; [L27] int M_E = 2; [L28] int T1_E = 2; [L29] int T2_E = 2; [L30] int T3_E = 2; [L31] int E_1 = 2; [L32] int E_2 = 2; [L33] int E_3 = 2; VAL [\old(E_1)=18, \old(E_2)=5, \old(E_3)=21, \old(M_E)=15, \old(m_i)=7, \old(m_pc)=13, \old(m_st)=14, \old(T1_E)=3, \old(t1_i)=17, \old(t1_pc)=9, \old(t1_st)=4, \old(T2_E)=16, \old(t2_i)=6, \old(t2_pc)=10, \old(t2_st)=11, \old(T3_E)=19, \old(t3_i)=20, \old(t3_pc)=8, \old(t3_st)=12, E_1=2, E_2=2, E_3=2, M_E=2, m_i=0, m_pc=0, m_st=0, T1_E=2, t1_i=0, t1_pc=0, t1_st=0, T2_E=2, t2_i=0, t2_pc=0, t2_st=0, T3_E=2, t3_i=0, t3_pc=0, t3_st=0] [L687] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=0, m_pc=0, m_st=0, T1_E=2, t1_i=0, t1_pc=0, t1_st=0, T2_E=2, t2_i=0, t2_pc=0, t2_st=0, T3_E=2, t3_i=0, t3_pc=0, t3_st=0] [L691] CALL init_model() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=0, m_pc=0, m_st=0, T1_E=2, t1_i=0, t1_pc=0, t1_st=0, T2_E=2, t2_i=0, t2_pc=0, t2_st=0, T3_E=2, t3_i=0, t3_pc=0, t3_st=0] [L600] m_i = 1 [L601] t1_i = 1 [L602] t2_i = 1 [L603] t3_i = 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L691] RET init_model() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L692] CALL start_simulation() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L628] int kernel_st ; [L629] int tmp ; [L630] int tmp___0 ; [L634] kernel_st = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, kernel_st=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L635] FCALL update_channels() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, kernel_st=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L636] CALL init_threads() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L271] COND TRUE m_i == 1 [L272] m_st = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L276] COND TRUE t1_i == 1 [L277] t1_st = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L281] COND TRUE t2_i == 1 [L282] t2_st = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L286] COND TRUE t3_i == 1 [L287] t3_st = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L636] RET init_threads() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, kernel_st=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L637] CALL fire_delta_events() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L408] COND FALSE !(M_E == 0) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L413] COND FALSE !(T1_E == 0) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L418] COND FALSE !(T2_E == 0) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L423] COND FALSE !(T3_E == 0) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L428] COND FALSE !(E_1 == 0) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L433] COND FALSE !(E_2 == 0) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L438] COND FALSE !(E_3 == 0) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L637] RET fire_delta_events() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, kernel_st=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L638] CALL activate_threads() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L491] int tmp ; [L492] int tmp___0 ; [L493] int tmp___1 ; [L494] int tmp___2 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L498] CALL, EXPR is_master_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L184] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L187] COND FALSE !(m_pc == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L197] __retres1 = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, __retres1=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L199] return (__retres1); VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \result=0, __retres1=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L498] RET, EXPR is_master_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, is_master_triggered()=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L498] tmp = is_master_triggered() [L500] COND FALSE !(\read(tmp)) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, tmp=0] [L506] CALL, EXPR is_transmit1_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L203] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L206] COND FALSE !(t1_pc == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L216] __retres1 = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, __retres1=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L218] return (__retres1); VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \result=0, __retres1=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L506] RET, EXPR is_transmit1_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, is_transmit1_triggered()=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, tmp=0] [L506] tmp___0 = is_transmit1_triggered() [L508] COND FALSE !(\read(tmp___0)) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, tmp=0, tmp___0=0] [L514] CALL, EXPR is_transmit2_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L222] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L225] COND FALSE !(t2_pc == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L235] __retres1 = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, __retres1=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L237] return (__retres1); VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \result=0, __retres1=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L514] RET, EXPR is_transmit2_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, is_transmit2_triggered()=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, tmp=0, tmp___0=0] [L514] tmp___1 = is_transmit2_triggered() [L516] COND FALSE !(\read(tmp___1)) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, tmp=0, tmp___0=0, tmp___1=0] [L522] CALL, EXPR is_transmit3_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L241] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L244] COND FALSE !(t3_pc == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L254] __retres1 = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, __retres1=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L256] return (__retres1); VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \result=0, __retres1=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L522] RET, EXPR is_transmit3_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, is_transmit3_triggered()=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, tmp=0, tmp___0=0, tmp___1=0] [L522] tmp___2 = is_transmit3_triggered() [L524] COND FALSE !(\read(tmp___2)) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, tmp=0, tmp___0=0, tmp___1=0, tmp___2=0] [L638] RET activate_threads() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, kernel_st=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L639] CALL reset_delta_events() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L451] COND FALSE !(M_E == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L456] COND FALSE !(T1_E == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L461] COND FALSE !(T2_E == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L466] COND FALSE !(T3_E == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L471] COND FALSE !(E_1 == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L476] COND FALSE !(E_2 == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L481] COND FALSE !(E_3 == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L639] RET reset_delta_events() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, kernel_st=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L642] COND TRUE 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, kernel_st=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L645] kernel_st = 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, kernel_st=1, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L646] CALL eval() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L327] int tmp ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L331] COND TRUE 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L334] CALL, EXPR exists_runnable_thread() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L296] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L299] COND TRUE m_st == 0 [L300] __retres1 = 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, __retres1=1, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L322] return (__retres1); VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \result=1, __retres1=1, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L334] RET, EXPR exists_runnable_thread() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, exists_runnable_thread()=1, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L334] tmp = exists_runnable_thread() [L336] COND TRUE \read(tmp) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, tmp=1] [L341] COND TRUE m_st == 0 [L342] int tmp_ndt_1; [L343] tmp_ndt_1 = __VERIFIER_nondet_int() [L344] COND FALSE !(\read(tmp_ndt_1)) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, tmp=1, tmp_ndt_1=0] [L355] COND TRUE t1_st == 0 [L356] int tmp_ndt_2; [L357] tmp_ndt_2 = __VERIFIER_nondet_int() [L358] COND TRUE \read(tmp_ndt_2) [L360] t1_st = 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=1, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, tmp=1, tmp_ndt_1=0, tmp_ndt_2=1] [L361] CALL transmit1() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=1, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L84] COND TRUE t1_pc == 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=1, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L95] COND TRUE 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=1, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L97] t1_pc = 1 [L98] t1_st = 2 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L361] RET transmit1() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, tmp=1, tmp_ndt_1=0, tmp_ndt_2=1] [L369] COND TRUE t2_st == 0 [L370] int tmp_ndt_3; [L371] tmp_ndt_3 = __VERIFIER_nondet_int() [L372] COND TRUE \read(tmp_ndt_3) [L374] t2_st = 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=0, t2_st=1, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, tmp=1, tmp_ndt_1=0, tmp_ndt_2=1, tmp_ndt_3=1] [L375] CALL transmit2() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=0, t2_st=1, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L119] COND TRUE t2_pc == 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=0, t2_st=1, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L130] COND TRUE 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=0, t2_st=1, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L132] t2_pc = 1 [L133] t2_st = 2 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L375] RET transmit2() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, tmp=1, tmp_ndt_1=0, tmp_ndt_2=1, tmp_ndt_3=1] [L383] COND TRUE t3_st == 0 [L384] int tmp_ndt_4; [L385] tmp_ndt_4 = __VERIFIER_nondet_int() [L386] COND TRUE \read(tmp_ndt_4) [L388] t3_st = 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=0, t3_st=1, tmp=1, tmp_ndt_1=0, tmp_ndt_2=1, tmp_ndt_3=1, tmp_ndt_4=1] [L389] CALL transmit3() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=1, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=0, t3_st=1] [L154] COND TRUE t3_pc == 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=1, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=0, t3_st=1] [L165] COND TRUE 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=1, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=0, t3_st=1] [L167] t3_pc = 1 [L168] t3_st = 2 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=1, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L389] RET transmit3() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, tmp=1, tmp_ndt_1=0, tmp_ndt_2=1, tmp_ndt_3=1, tmp_ndt_4=1] [L331] COND TRUE 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, tmp=1, tmp_ndt_1=0, tmp_ndt_2=1, tmp_ndt_3=1, tmp_ndt_4=1] [L334] CALL, EXPR exists_runnable_thread() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L296] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L299] COND TRUE m_st == 0 [L300] __retres1 = 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, __retres1=1, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L322] return (__retres1); VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \result=1, __retres1=1, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L334] RET, EXPR exists_runnable_thread() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, exists_runnable_thread()=1, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, tmp=1, tmp_ndt_1=0, tmp_ndt_2=1, tmp_ndt_3=1, tmp_ndt_4=1] [L334] tmp = exists_runnable_thread() [L336] COND TRUE \read(tmp) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, tmp=1, tmp_ndt_1=0, tmp_ndt_2=1, tmp_ndt_3=1, tmp_ndt_4=1] [L341] COND TRUE m_st == 0 [L342] int tmp_ndt_1; [L343] tmp_ndt_1 = __VERIFIER_nondet_int() [L344] COND TRUE \read(tmp_ndt_1) [L346] m_st = 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, tmp=1, tmp_ndt_1=1, tmp_ndt_2=1, tmp_ndt_3=1, tmp_ndt_4=1] [L347] CALL master() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L43] COND TRUE m_pc == 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L54] COND TRUE 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L57] E_1 = 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=1, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L58] CALL immediate_notify() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=1, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L538] CALL activate_threads() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=1, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L491] int tmp ; [L492] int tmp___0 ; [L493] int tmp___1 ; [L494] int tmp___2 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=1, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L498] CALL, EXPR is_master_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=1, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L184] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=1, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L187] COND FALSE !(m_pc == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=1, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L197] __retres1 = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, __retres1=0, E_1=1, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L199] return (__retres1); VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \result=0, __retres1=0, E_1=1, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L498] RET, EXPR is_master_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=1, E_2=2, E_3=2, is_master_triggered()=0, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L498] tmp = is_master_triggered() [L500] COND FALSE !(\read(tmp)) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=1, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, tmp=0] [L506] CALL, EXPR is_transmit1_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=1, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L203] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=1, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L206] COND TRUE t1_pc == 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=1, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L207] COND TRUE E_1 == 1 [L208] __retres1 = 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, __retres1=1, E_1=1, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L218] return (__retres1); VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \result=1, __retres1=1, E_1=1, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L506] RET, EXPR is_transmit1_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=1, E_2=2, E_3=2, is_transmit1_triggered()=1, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, tmp=0] [L506] tmp___0 = is_transmit1_triggered() [L508] COND TRUE \read(tmp___0) [L509] t1_st = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=1, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, tmp=0, tmp___0=1] [L514] CALL, EXPR is_transmit2_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=1, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L222] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=1, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L225] COND TRUE t2_pc == 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=1, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L226] COND FALSE !(E_2 == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=1, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L235] __retres1 = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, __retres1=0, E_1=1, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L237] return (__retres1); VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \result=0, __retres1=0, E_1=1, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L514] RET, EXPR is_transmit2_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=1, E_2=2, E_3=2, is_transmit2_triggered()=0, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, tmp=0, tmp___0=1] [L514] tmp___1 = is_transmit2_triggered() [L516] COND FALSE !(\read(tmp___1)) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=1, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, tmp=0, tmp___0=1, tmp___1=0] [L522] CALL, EXPR is_transmit3_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=1, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L241] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=1, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L244] COND TRUE t3_pc == 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=1, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L245] COND FALSE !(E_3 == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=1, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L254] __retres1 = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, __retres1=0, E_1=1, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L256] return (__retres1); VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \result=0, __retres1=0, E_1=1, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L522] RET, EXPR is_transmit3_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=1, E_2=2, E_3=2, is_transmit3_triggered()=0, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, tmp=0, tmp___0=1, tmp___1=0] [L522] tmp___2 = is_transmit3_triggered() [L524] COND FALSE !(\read(tmp___2)) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=1, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, tmp=0, tmp___0=1, tmp___1=0, tmp___2=0] [L538] RET activate_threads() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=1, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L58] RET immediate_notify() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=1, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L59] E_1 = 2 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L62] COND TRUE 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L64] m_pc = 1 [L65] m_st = 2 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L347] RET master() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, tmp=1, tmp_ndt_1=1, tmp_ndt_2=1, tmp_ndt_3=1, tmp_ndt_4=1] [L355] COND TRUE t1_st == 0 [L356] int tmp_ndt_2; [L357] tmp_ndt_2 = __VERIFIER_nondet_int() [L358] COND TRUE \read(tmp_ndt_2) [L360] t1_st = 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, tmp=1, tmp_ndt_1=1, tmp_ndt_2=1, tmp_ndt_3=1, tmp_ndt_4=1] [L361] CALL transmit1() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L84] COND FALSE !(t1_pc == 0) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L87] COND TRUE t1_pc == 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L103] E_2 = 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=1, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L104] CALL immediate_notify() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=1, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L538] CALL activate_threads() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=1, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L491] int tmp ; [L492] int tmp___0 ; [L493] int tmp___1 ; [L494] int tmp___2 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=1, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L498] CALL, EXPR is_master_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=1, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L184] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=1, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L187] COND TRUE m_pc == 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=1, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L188] COND FALSE !(M_E == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=1, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L197] __retres1 = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, __retres1=0, E_1=2, E_2=1, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L199] return (__retres1); VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \result=0, __retres1=0, E_1=2, E_2=1, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L498] RET, EXPR is_master_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=1, E_3=2, is_master_triggered()=0, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L498] tmp = is_master_triggered() [L500] COND FALSE !(\read(tmp)) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=1, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, tmp=0] [L506] CALL, EXPR is_transmit1_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=1, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L203] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=1, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L206] COND TRUE t1_pc == 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=1, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L207] COND FALSE !(E_1 == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=1, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L216] __retres1 = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, __retres1=0, E_1=2, E_2=1, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L218] return (__retres1); VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \result=0, __retres1=0, E_1=2, E_2=1, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L506] RET, EXPR is_transmit1_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=1, E_3=2, is_transmit1_triggered()=0, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, tmp=0] [L506] tmp___0 = is_transmit1_triggered() [L508] COND FALSE !(\read(tmp___0)) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=1, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, tmp=0, tmp___0=0] [L514] CALL, EXPR is_transmit2_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=1, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L222] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=1, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L225] COND TRUE t2_pc == 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=1, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L226] COND TRUE E_2 == 1 [L227] __retres1 = 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, __retres1=1, E_1=2, E_2=1, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L237] return (__retres1); VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \result=1, __retres1=1, E_1=2, E_2=1, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L514] RET, EXPR is_transmit2_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=1, E_3=2, is_transmit2_triggered()=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, tmp=0, tmp___0=0] [L514] tmp___1 = is_transmit2_triggered() [L516] COND TRUE \read(tmp___1) [L517] t2_st = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=1, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, tmp=0, tmp___0=0, tmp___1=1] [L522] CALL, EXPR is_transmit3_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=1, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L241] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=1, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L244] COND TRUE t3_pc == 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=1, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L245] COND FALSE !(E_3 == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=1, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L254] __retres1 = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, __retres1=0, E_1=2, E_2=1, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L256] return (__retres1); VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \result=0, __retres1=0, E_1=2, E_2=1, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L522] RET, EXPR is_transmit3_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=1, E_3=2, is_transmit3_triggered()=0, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, tmp=0, tmp___0=0, tmp___1=1] [L522] tmp___2 = is_transmit3_triggered() [L524] COND FALSE !(\read(tmp___2)) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=1, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, tmp=0, tmp___0=0, tmp___1=1, tmp___2=0] [L538] RET activate_threads() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=1, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L104] RET immediate_notify() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=1, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L105] E_2 = 2 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L95] COND TRUE 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L97] t1_pc = 1 [L98] t1_st = 2 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L361] RET transmit1() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, tmp=1, tmp_ndt_1=1, tmp_ndt_2=1, tmp_ndt_3=1, tmp_ndt_4=1] [L369] COND TRUE t2_st == 0 [L370] int tmp_ndt_3; [L371] tmp_ndt_3 = __VERIFIER_nondet_int() [L372] COND TRUE \read(tmp_ndt_3) [L374] t2_st = 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, tmp=1, tmp_ndt_1=1, tmp_ndt_2=1, tmp_ndt_3=1, tmp_ndt_4=1] [L375] CALL transmit2() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L119] COND FALSE !(t2_pc == 0) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L122] COND TRUE t2_pc == 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L138] E_3 = 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=2, E_3=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L139] CALL immediate_notify() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=2, E_3=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L538] CALL activate_threads() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=2, E_3=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L491] int tmp ; [L492] int tmp___0 ; [L493] int tmp___1 ; [L494] int tmp___2 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=2, E_3=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L498] CALL, EXPR is_master_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=2, E_3=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L184] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=2, E_3=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L187] COND TRUE m_pc == 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=2, E_3=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L188] COND FALSE !(M_E == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=2, E_3=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L197] __retres1 = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, __retres1=0, E_1=2, E_2=2, E_3=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L199] return (__retres1); VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \result=0, __retres1=0, E_1=2, E_2=2, E_3=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L498] RET, EXPR is_master_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=2, E_3=1, is_master_triggered()=0, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L498] tmp = is_master_triggered() [L500] COND FALSE !(\read(tmp)) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=2, E_3=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, tmp=0] [L506] CALL, EXPR is_transmit1_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=2, E_3=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L203] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=2, E_3=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L206] COND TRUE t1_pc == 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=2, E_3=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L207] COND FALSE !(E_1 == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=2, E_3=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L216] __retres1 = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, __retres1=0, E_1=2, E_2=2, E_3=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L218] return (__retres1); VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \result=0, __retres1=0, E_1=2, E_2=2, E_3=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L506] RET, EXPR is_transmit1_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=2, E_3=1, is_transmit1_triggered()=0, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, tmp=0] [L506] tmp___0 = is_transmit1_triggered() [L508] COND FALSE !(\read(tmp___0)) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=2, E_3=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, tmp=0, tmp___0=0] [L514] CALL, EXPR is_transmit2_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=2, E_3=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L222] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=2, E_3=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L225] COND TRUE t2_pc == 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=2, E_3=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L226] COND FALSE !(E_2 == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=2, E_3=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L235] __retres1 = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, __retres1=0, E_1=2, E_2=2, E_3=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L237] return (__retres1); VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \result=0, __retres1=0, E_1=2, E_2=2, E_3=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L514] RET, EXPR is_transmit2_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=2, E_3=1, is_transmit2_triggered()=0, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, tmp=0, tmp___0=0] [L514] tmp___1 = is_transmit2_triggered() [L516] COND FALSE !(\read(tmp___1)) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=2, E_3=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, tmp=0, tmp___0=0, tmp___1=0] [L522] CALL, EXPR is_transmit3_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=2, E_3=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L241] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=2, E_3=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L244] COND TRUE t3_pc == 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=2, E_3=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L245] COND TRUE E_3 == 1 [L246] __retres1 = 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, __retres1=1, E_1=2, E_2=2, E_3=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L256] return (__retres1); VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \result=1, __retres1=1, E_1=2, E_2=2, E_3=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L522] RET, EXPR is_transmit3_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=2, E_3=1, is_transmit3_triggered()=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, tmp=0, tmp___0=0, tmp___1=0] [L522] tmp___2 = is_transmit3_triggered() [L524] COND TRUE \read(tmp___2) [L525] t3_st = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=2, E_3=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=0, tmp=0, tmp___0=0, tmp___1=0, tmp___2=1] [L538] RET activate_threads() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=2, E_3=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=0] [L139] RET immediate_notify() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=2, E_3=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=0] [L140] E_3 = 2 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=0] [L130] COND TRUE 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=0] [L132] t2_pc = 1 [L133] t2_st = 2 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=0] [L375] RET transmit2() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=0, tmp=1, tmp_ndt_1=1, tmp_ndt_2=1, tmp_ndt_3=1, tmp_ndt_4=1] [L383] COND TRUE t3_st == 0 [L384] int tmp_ndt_4; [L385] tmp_ndt_4 = __VERIFIER_nondet_int() [L386] COND TRUE \read(tmp_ndt_4) [L388] t3_st = 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, tmp=1, tmp_ndt_1=1, tmp_ndt_2=1, tmp_ndt_3=1, tmp_ndt_4=1] [L389] CALL transmit3() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=1, \old(t3_st)=1, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1] [L154] COND FALSE !(t3_pc == 0) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=1, \old(t3_st)=1, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1] [L157] COND TRUE t3_pc == 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=1, \old(t3_st)=1, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1] [L173] CALL error() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=1, \old(t3_st)=1, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1] [L11] __VERIFIER_error() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=1, \old(t3_st)=1, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1] - StatisticsResult: Ultimate Automizer benchmark data CFG has 25 procedures, 199 locations, 1 error locations. UNSAFE Result, 37.6s OverallTime, 27 OverallIterations, 5 TraceHistogramMax, 21.2s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 7657 SDtfs, 9103 SDslu, 8790 SDs, 0 SdLazy, 5990 SolverSat, 2449 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 7.8s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 1122 GetRequests, 994 SyntacticMatches, 12 SemanticMatches, 116 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 38 ImplicationChecksByTransitivity, 0.7s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=35955occurred in iteration=24, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 11.6s AutomataMinimizationTime, 26 MinimizatonAttempts, 1880 StatesRemovedByMinimization, 23 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.3s SsaConstructionTime, 0.8s SatisfiabilityAnalysisTime, 1.9s InterpolantComputationTime, 4648 NumberOfCodeBlocks, 4648 NumberOfCodeBlocksAsserted, 31 NumberOfCheckSat, 4311 ConstructedInterpolants, 0 QuantifiedInterpolants, 989812 SizeOfPredicates, 6 NumberOfNonLiveVariables, 3847 ConjunctsInSsa, 21 ConjunctsInUnsatCore, 30 InterpolantComputations, 25 PerfectInterpolantSequences, 1060/1162 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...