java -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata ./data -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/default/automizer/svcomp-Reach-32bit-Automizer_Default.epf -i ../../../trunk/examples/svcomp/ldv-validator-v0.8/linux-stable-1b0b0ac-1-108_1a-drivers--net--slip.ko-entry_point_ldv-val-v0.8.cil.out.i -------------------------------------------------------------------------------- This is Ultimate 0.1.24-673a906-m [2019-10-02 10:27:49,035 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-10-02 10:27:49,037 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-10-02 10:27:49,048 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-10-02 10:27:49,049 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-10-02 10:27:49,050 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-10-02 10:27:49,051 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-10-02 10:27:49,053 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-10-02 10:27:49,054 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-10-02 10:27:49,055 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-10-02 10:27:49,056 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-10-02 10:27:49,057 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-10-02 10:27:49,057 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-10-02 10:27:49,058 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-10-02 10:27:49,059 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-10-02 10:27:49,060 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-10-02 10:27:49,061 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-10-02 10:27:49,062 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-10-02 10:27:49,063 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-10-02 10:27:49,065 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-10-02 10:27:49,067 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-10-02 10:27:49,068 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-10-02 10:27:49,069 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-10-02 10:27:49,069 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-10-02 10:27:49,072 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-10-02 10:27:49,072 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-10-02 10:27:49,072 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-10-02 10:27:49,073 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-10-02 10:27:49,073 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-10-02 10:27:49,074 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-10-02 10:27:49,075 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-10-02 10:27:49,075 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-10-02 10:27:49,076 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-10-02 10:27:49,077 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-10-02 10:27:49,078 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-10-02 10:27:49,078 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-10-02 10:27:49,079 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-10-02 10:27:49,079 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-10-02 10:27:49,079 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-10-02 10:27:49,080 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-10-02 10:27:49,080 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-10-02 10:27:49,081 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/default/automizer/svcomp-Reach-32bit-Automizer_Default.epf [2019-10-02 10:27:49,095 INFO L113 SettingsManager]: Loading preferences was successful [2019-10-02 10:27:49,096 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-10-02 10:27:49,097 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-10-02 10:27:49,097 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-10-02 10:27:49,097 INFO L138 SettingsManager]: * Use SBE=true [2019-10-02 10:27:49,097 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-10-02 10:27:49,098 INFO L138 SettingsManager]: * sizeof long=4 [2019-10-02 10:27:49,098 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-10-02 10:27:49,098 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-10-02 10:27:49,098 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-10-02 10:27:49,098 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-10-02 10:27:49,098 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-10-02 10:27:49,099 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-10-02 10:27:49,099 INFO L138 SettingsManager]: * sizeof long double=12 [2019-10-02 10:27:49,099 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-10-02 10:27:49,099 INFO L138 SettingsManager]: * Use constant arrays=true [2019-10-02 10:27:49,099 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-10-02 10:27:49,100 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-10-02 10:27:49,100 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-10-02 10:27:49,100 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-10-02 10:27:49,100 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-10-02 10:27:49,100 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-10-02 10:27:49,101 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-10-02 10:27:49,101 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-10-02 10:27:49,101 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-10-02 10:27:49,101 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-10-02 10:27:49,101 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-10-02 10:27:49,102 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-10-02 10:27:49,102 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2019-10-02 10:27:49,131 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-10-02 10:27:49,143 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-10-02 10:27:49,146 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-10-02 10:27:49,148 INFO L271 PluginConnector]: Initializing CDTParser... [2019-10-02 10:27:49,148 INFO L275 PluginConnector]: CDTParser initialized [2019-10-02 10:27:49,149 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/ldv-validator-v0.8/linux-stable-1b0b0ac-1-108_1a-drivers--net--slip.ko-entry_point_ldv-val-v0.8.cil.out.i [2019-10-02 10:27:49,208 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/cdd3e5218/5c63287447374ff7bd8b224acc05c1d1/FLAGc1803ac32 [2019-10-02 10:27:50,002 INFO L306 CDTParser]: Found 1 translation units. [2019-10-02 10:27:50,005 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/ldv-validator-v0.8/linux-stable-1b0b0ac-1-108_1a-drivers--net--slip.ko-entry_point_ldv-val-v0.8.cil.out.i [2019-10-02 10:27:50,049 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/cdd3e5218/5c63287447374ff7bd8b224acc05c1d1/FLAGc1803ac32 [2019-10-02 10:27:50,546 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/cdd3e5218/5c63287447374ff7bd8b224acc05c1d1 [2019-10-02 10:27:50,556 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-10-02 10:27:50,558 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2019-10-02 10:27:50,559 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-10-02 10:27:50,559 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-10-02 10:27:50,563 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-10-02 10:27:50,564 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 02.10 10:27:50" (1/1) ... [2019-10-02 10:27:50,566 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@5213aeef and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.10 10:27:50, skipping insertion in model container [2019-10-02 10:27:50,567 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 02.10 10:27:50" (1/1) ... [2019-10-02 10:27:50,574 INFO L142 MainTranslator]: Starting translation in SV-COMP mode [2019-10-02 10:27:50,719 INFO L173 MainTranslator]: Built tables and reachable declarations [2019-10-02 10:27:52,425 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-10-02 10:27:52,455 INFO L188 MainTranslator]: Completed pre-run [2019-10-02 10:27:52,853 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-10-02 10:27:53,159 INFO L192 MainTranslator]: Completed translation [2019-10-02 10:27:53,160 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.10 10:27:53 WrapperNode [2019-10-02 10:27:53,160 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-10-02 10:27:53,161 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-10-02 10:27:53,161 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-10-02 10:27:53,161 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-10-02 10:27:53,175 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.10 10:27:53" (1/1) ... [2019-10-02 10:27:53,175 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.10 10:27:53" (1/1) ... [2019-10-02 10:27:53,264 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.10 10:27:53" (1/1) ... [2019-10-02 10:27:53,265 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.10 10:27:53" (1/1) ... [2019-10-02 10:27:53,419 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.10 10:27:53" (1/1) ... [2019-10-02 10:27:53,455 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.10 10:27:53" (1/1) ... [2019-10-02 10:27:53,483 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.10 10:27:53" (1/1) ... [2019-10-02 10:27:53,517 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-10-02 10:27:53,518 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-10-02 10:27:53,518 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-10-02 10:27:53,518 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-10-02 10:27:53,519 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.10 10:27:53" (1/1) ... No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-10-02 10:27:53,595 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2019-10-02 10:27:53,595 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-10-02 10:27:53,596 INFO L138 BoogieDeclarations]: Found implementation of procedure ##fun~$Pointer$~X~$Pointer$~X~int~TO~int [2019-10-02 10:27:53,596 INFO L138 BoogieDeclarations]: Found implementation of procedure ##fun~int~TO~VOID [2019-10-02 10:27:53,598 INFO L138 BoogieDeclarations]: Found implementation of procedure set_bit [2019-10-02 10:27:53,598 INFO L138 BoogieDeclarations]: Found implementation of procedure clear_bit [2019-10-02 10:27:53,598 INFO L138 BoogieDeclarations]: Found implementation of procedure test_and_set_bit [2019-10-02 10:27:53,598 INFO L138 BoogieDeclarations]: Found implementation of procedure test_and_clear_bit [2019-10-02 10:27:53,601 INFO L138 BoogieDeclarations]: Found implementation of procedure constant_test_bit [2019-10-02 10:27:53,601 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_malloc [2019-10-02 10:27:53,601 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_zalloc [2019-10-02 10:27:53,602 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_init_zalloc [2019-10-02 10:27:53,604 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_memset [2019-10-02 10:27:53,605 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_undef_int [2019-10-02 10:27:53,607 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_undef_ptr [2019-10-02 10:27:53,608 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_undef_ulong [2019-10-02 10:27:53,611 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_stop [2019-10-02 10:27:53,612 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_undef_int_nonpositive [2019-10-02 10:27:53,612 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv__builtin_expect [2019-10-02 10:27:53,613 INFO L138 BoogieDeclarations]: Found implementation of procedure get_current [2019-10-02 10:27:53,613 INFO L138 BoogieDeclarations]: Found implementation of procedure spinlock_check [2019-10-02 10:27:53,613 INFO L138 BoogieDeclarations]: Found implementation of procedure spin_lock [2019-10-02 10:27:53,613 INFO L138 BoogieDeclarations]: Found implementation of procedure spin_lock_bh [2019-10-02 10:27:53,614 INFO L138 BoogieDeclarations]: Found implementation of procedure spin_unlock [2019-10-02 10:27:53,614 INFO L138 BoogieDeclarations]: Found implementation of procedure spin_unlock_bh [2019-10-02 10:27:53,614 INFO L138 BoogieDeclarations]: Found implementation of procedure __kmalloc [2019-10-02 10:27:53,614 INFO L138 BoogieDeclarations]: Found implementation of procedure kmalloc [2019-10-02 10:27:53,614 INFO L138 BoogieDeclarations]: Found implementation of procedure kzalloc [2019-10-02 10:27:53,615 INFO L138 BoogieDeclarations]: Found implementation of procedure copy_to_user [2019-10-02 10:27:53,615 INFO L138 BoogieDeclarations]: Found implementation of procedure skb_reset_mac_header [2019-10-02 10:27:53,615 INFO L138 BoogieDeclarations]: Found implementation of procedure compat_ptr [2019-10-02 10:27:53,616 INFO L138 BoogieDeclarations]: Found implementation of procedure netdev_get_tx_queue [2019-10-02 10:27:53,616 INFO L138 BoogieDeclarations]: Found implementation of procedure netdev_priv [2019-10-02 10:27:53,616 INFO L138 BoogieDeclarations]: Found implementation of procedure unregister_netdevice [2019-10-02 10:27:53,616 INFO L138 BoogieDeclarations]: Found implementation of procedure netif_tx_start_queue [2019-10-02 10:27:53,617 INFO L138 BoogieDeclarations]: Found implementation of procedure netif_start_queue [2019-10-02 10:27:53,617 INFO L138 BoogieDeclarations]: Found implementation of procedure netif_tx_wake_queue [2019-10-02 10:27:53,617 INFO L138 BoogieDeclarations]: Found implementation of procedure netif_wake_queue [2019-10-02 10:27:53,617 INFO L138 BoogieDeclarations]: Found implementation of procedure netif_tx_stop_queue [2019-10-02 10:27:53,618 INFO L138 BoogieDeclarations]: Found implementation of procedure netif_stop_queue [2019-10-02 10:27:53,618 INFO L138 BoogieDeclarations]: Found implementation of procedure netif_tx_queue_stopped [2019-10-02 10:27:53,618 INFO L138 BoogieDeclarations]: Found implementation of procedure netif_queue_stopped [2019-10-02 10:27:53,618 INFO L138 BoogieDeclarations]: Found implementation of procedure netif_running [2019-10-02 10:27:53,619 INFO L138 BoogieDeclarations]: Found implementation of procedure sl_alloc_bufs [2019-10-02 10:27:53,619 INFO L138 BoogieDeclarations]: Found implementation of procedure sl_free_bufs [2019-10-02 10:27:53,619 INFO L138 BoogieDeclarations]: Found implementation of procedure sl_realloc_bufs [2019-10-02 10:27:53,620 INFO L138 BoogieDeclarations]: Found implementation of procedure sl_lock [2019-10-02 10:27:53,620 INFO L138 BoogieDeclarations]: Found implementation of procedure sl_unlock [2019-10-02 10:27:53,620 INFO L138 BoogieDeclarations]: Found implementation of procedure sl_bump [2019-10-02 10:27:53,620 INFO L138 BoogieDeclarations]: Found implementation of procedure sl_encaps [2019-10-02 10:27:53,621 INFO L138 BoogieDeclarations]: Found implementation of procedure slip_write_wakeup [2019-10-02 10:27:53,621 INFO L138 BoogieDeclarations]: Found implementation of procedure sl_tx_timeout [2019-10-02 10:27:53,621 INFO L138 BoogieDeclarations]: Found implementation of procedure sl_xmit [2019-10-02 10:27:53,621 INFO L138 BoogieDeclarations]: Found implementation of procedure sl_close [2019-10-02 10:27:53,622 INFO L138 BoogieDeclarations]: Found implementation of procedure sl_open [2019-10-02 10:27:53,622 INFO L138 BoogieDeclarations]: Found implementation of procedure sl_change_mtu [2019-10-02 10:27:53,622 INFO L138 BoogieDeclarations]: Found implementation of procedure sl_get_stats64 [2019-10-02 10:27:53,622 INFO L138 BoogieDeclarations]: Found implementation of procedure sl_init [2019-10-02 10:27:53,622 INFO L138 BoogieDeclarations]: Found implementation of procedure sl_uninit [2019-10-02 10:27:53,622 INFO L138 BoogieDeclarations]: Found implementation of procedure sl_free_netdev [2019-10-02 10:27:53,623 INFO L138 BoogieDeclarations]: Found implementation of procedure sl_setup [2019-10-02 10:27:53,623 INFO L138 BoogieDeclarations]: Found implementation of procedure slip_receive_buf [2019-10-02 10:27:53,623 INFO L138 BoogieDeclarations]: Found implementation of procedure sl_sync [2019-10-02 10:27:53,623 INFO L138 BoogieDeclarations]: Found implementation of procedure sl_alloc [2019-10-02 10:27:53,623 INFO L138 BoogieDeclarations]: Found implementation of procedure slip_open [2019-10-02 10:27:53,623 INFO L138 BoogieDeclarations]: Found implementation of procedure slip_close [2019-10-02 10:27:53,624 INFO L138 BoogieDeclarations]: Found implementation of procedure slip_hangup [2019-10-02 10:27:53,624 INFO L138 BoogieDeclarations]: Found implementation of procedure slip_esc [2019-10-02 10:27:53,625 INFO L138 BoogieDeclarations]: Found implementation of procedure slip_unesc [2019-10-02 10:27:53,625 INFO L138 BoogieDeclarations]: Found implementation of procedure slip_esc6 [2019-10-02 10:27:53,625 INFO L138 BoogieDeclarations]: Found implementation of procedure slip_unesc6 [2019-10-02 10:27:53,625 INFO L138 BoogieDeclarations]: Found implementation of procedure slip_ioctl [2019-10-02 10:27:53,625 INFO L138 BoogieDeclarations]: Found implementation of procedure slip_compat_ioctl [2019-10-02 10:27:53,625 INFO L138 BoogieDeclarations]: Found implementation of procedure sl_ioctl [2019-10-02 10:27:53,626 INFO L138 BoogieDeclarations]: Found implementation of procedure slip_init [2019-10-02 10:27:53,626 INFO L138 BoogieDeclarations]: Found implementation of procedure slip_exit [2019-10-02 10:27:53,626 INFO L138 BoogieDeclarations]: Found implementation of procedure sl_outfill [2019-10-02 10:27:53,627 INFO L138 BoogieDeclarations]: Found implementation of procedure sl_keepalive [2019-10-02 10:27:53,627 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_target_type_3 [2019-10-02 10:27:53,627 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_net_device_ops_4 [2019-10-02 10:27:53,627 INFO L138 BoogieDeclarations]: Found implementation of procedure activate_pending_timer_1 [2019-10-02 10:27:53,627 INFO L138 BoogieDeclarations]: Found implementation of procedure choose_timer_1 [2019-10-02 10:27:53,628 INFO L138 BoogieDeclarations]: Found implementation of procedure reg_timer_1 [2019-10-02 10:27:53,628 INFO L138 BoogieDeclarations]: Found implementation of procedure choose_timer_2 [2019-10-02 10:27:53,628 INFO L138 BoogieDeclarations]: Found implementation of procedure reg_timer_2 [2019-10-02 10:27:53,628 INFO L138 BoogieDeclarations]: Found implementation of procedure activate_pending_timer_2 [2019-10-02 10:27:53,628 INFO L138 BoogieDeclarations]: Found implementation of procedure disable_suitable_timer_2 [2019-10-02 10:27:53,629 INFO L138 BoogieDeclarations]: Found implementation of procedure disable_suitable_timer_1 [2019-10-02 10:27:53,629 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2019-10-02 10:27:53,630 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_del_timer_sync_1 [2019-10-02 10:27:53,630 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_del_timer_2 [2019-10-02 10:27:53,630 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_sl_alloc_bufs_3 [2019-10-02 10:27:53,630 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_register_netdevice_4 [2019-10-02 10:27:53,631 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_del_timer_sync_5 [2019-10-02 10:27:53,631 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_del_timer_sync_6 [2019-10-02 10:27:53,631 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mod_timer_7 [2019-10-02 10:27:53,631 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_del_timer_8 [2019-10-02 10:27:53,631 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mod_timer_9 [2019-10-02 10:27:53,632 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_del_timer_10 [2019-10-02 10:27:53,632 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mod_timer_11 [2019-10-02 10:27:53,632 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_del_timer_12 [2019-10-02 10:27:53,632 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mod_timer_13 [2019-10-02 10:27:53,633 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_del_timer_14 [2019-10-02 10:27:53,633 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mod_timer_15 [2019-10-02 10:27:53,633 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_del_timer_16 [2019-10-02 10:27:53,633 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mod_timer_17 [2019-10-02 10:27:53,634 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_slip_open_18 [2019-10-02 10:27:53,634 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_error [2019-10-02 10:27:53,634 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_check_callback_ret_val [2019-10-02 10:27:53,634 INFO L138 BoogieDeclarations]: Found implementation of procedure __netif_schedule [2019-10-02 10:27:53,635 INFO L138 BoogieDeclarations]: Found implementation of procedure __raw_spin_lock_init [2019-10-02 10:27:53,635 INFO L138 BoogieDeclarations]: Found implementation of procedure _copy_to_user [2019-10-02 10:27:53,635 INFO L138 BoogieDeclarations]: Found implementation of procedure _raw_spin_lock [2019-10-02 10:27:53,635 INFO L138 BoogieDeclarations]: Found implementation of procedure _raw_spin_lock_bh [2019-10-02 10:27:53,636 INFO L138 BoogieDeclarations]: Found implementation of procedure _raw_spin_unlock [2019-10-02 10:27:53,636 INFO L138 BoogieDeclarations]: Found implementation of procedure _raw_spin_unlock_bh [2019-10-02 10:27:53,636 INFO L138 BoogieDeclarations]: Found implementation of procedure add_timer [2019-10-02 10:27:53,637 INFO L138 BoogieDeclarations]: Found implementation of procedure alloc_netdev_mqs [2019-10-02 10:27:53,637 INFO L138 BoogieDeclarations]: Found implementation of procedure capable [2019-10-02 10:27:53,637 INFO L138 BoogieDeclarations]: Found implementation of procedure consume_skb [2019-10-02 10:27:53,638 INFO L138 BoogieDeclarations]: Found implementation of procedure del_timer [2019-10-02 10:27:53,638 INFO L138 BoogieDeclarations]: Found implementation of procedure del_timer_sync [2019-10-02 10:27:53,638 INFO L138 BoogieDeclarations]: Found implementation of procedure dev_alloc_skb [2019-10-02 10:27:53,638 INFO L138 BoogieDeclarations]: Found implementation of procedure dev_close [2019-10-02 10:27:53,640 INFO L138 BoogieDeclarations]: Found implementation of procedure dev_trans_start [2019-10-02 10:27:53,640 INFO L138 BoogieDeclarations]: Found implementation of procedure free_netdev [2019-10-02 10:27:53,640 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_check_final_state [2019-10-02 10:27:53,640 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_initialize [2019-10-02 10:27:53,641 INFO L138 BoogieDeclarations]: Found implementation of procedure might_fault [2019-10-02 10:27:53,641 INFO L138 BoogieDeclarations]: Found implementation of procedure mod_timer [2019-10-02 10:27:53,641 INFO L138 BoogieDeclarations]: Found implementation of procedure msleep_interruptible [2019-10-02 10:27:53,642 INFO L138 BoogieDeclarations]: Found implementation of procedure netif_rx [2019-10-02 10:27:53,642 INFO L138 BoogieDeclarations]: Found implementation of procedure netpoll_trap [2019-10-02 10:27:53,642 INFO L138 BoogieDeclarations]: Found implementation of procedure printk [2019-10-02 10:27:53,642 INFO L138 BoogieDeclarations]: Found implementation of procedure register_netdevice [2019-10-02 10:27:53,642 INFO L138 BoogieDeclarations]: Found implementation of procedure rtnl_lock [2019-10-02 10:27:53,643 INFO L138 BoogieDeclarations]: Found implementation of procedure rtnl_unlock [2019-10-02 10:27:53,643 INFO L138 BoogieDeclarations]: Found implementation of procedure skb_put [2019-10-02 10:27:53,643 INFO L138 BoogieDeclarations]: Found implementation of procedure slhc_compress [2019-10-02 10:27:53,644 INFO L138 BoogieDeclarations]: Found implementation of procedure slhc_free [2019-10-02 10:27:53,648 INFO L138 BoogieDeclarations]: Found implementation of procedure slhc_init [2019-10-02 10:27:53,649 INFO L138 BoogieDeclarations]: Found implementation of procedure slhc_remember [2019-10-02 10:27:53,650 INFO L138 BoogieDeclarations]: Found implementation of procedure slhc_uncompress [2019-10-02 10:27:53,650 INFO L138 BoogieDeclarations]: Found implementation of procedure tty_chars_in_buffer [2019-10-02 10:27:53,659 INFO L138 BoogieDeclarations]: Found implementation of procedure tty_devnum [2019-10-02 10:27:53,659 INFO L138 BoogieDeclarations]: Found implementation of procedure tty_hangup [2019-10-02 10:27:53,659 INFO L138 BoogieDeclarations]: Found implementation of procedure tty_mode_ioctl [2019-10-02 10:27:53,660 INFO L138 BoogieDeclarations]: Found implementation of procedure tty_register_ldisc [2019-10-02 10:27:53,660 INFO L138 BoogieDeclarations]: Found implementation of procedure tty_unregister_ldisc [2019-10-02 10:27:53,661 INFO L138 BoogieDeclarations]: Found implementation of procedure unregister_netdev [2019-10-02 10:27:53,661 INFO L138 BoogieDeclarations]: Found implementation of procedure unregister_netdevice_queue [2019-10-02 10:27:53,662 INFO L138 BoogieDeclarations]: Found implementation of procedure warn_slowpath_null [2019-10-02 10:27:53,662 INFO L138 BoogieDeclarations]: Found implementation of procedure external_alloc [2019-10-02 10:27:53,662 INFO L138 BoogieDeclarations]: Found implementation of procedure kfree [2019-10-02 10:27:53,662 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset [2019-10-02 10:27:53,663 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.meminit [2019-10-02 10:27:53,663 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memcpy [2019-10-02 10:27:53,663 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_error [2019-10-02 10:27:53,663 INFO L130 BoogieDeclarations]: Found specification of procedure ldv__builtin_expect [2019-10-02 10:27:53,663 INFO L130 BoogieDeclarations]: Found specification of procedure set_bit [2019-10-02 10:27:53,664 INFO L130 BoogieDeclarations]: Found specification of procedure clear_bit [2019-10-02 10:27:53,664 INFO L130 BoogieDeclarations]: Found specification of procedure test_and_set_bit [2019-10-02 10:27:53,664 INFO L130 BoogieDeclarations]: Found specification of procedure test_and_clear_bit [2019-10-02 10:27:53,664 INFO L130 BoogieDeclarations]: Found specification of procedure constant_test_bit [2019-10-02 10:27:53,664 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2019-10-02 10:27:53,664 INFO L130 BoogieDeclarations]: Found specification of procedure printk [2019-10-02 10:27:53,665 INFO L130 BoogieDeclarations]: Found specification of procedure warn_slowpath_null [2019-10-02 10:27:53,665 INFO L130 BoogieDeclarations]: Found specification of procedure might_fault [2019-10-02 10:27:53,665 INFO L130 BoogieDeclarations]: Found specification of procedure sprintf [2019-10-02 10:27:53,665 INFO L130 BoogieDeclarations]: Found specification of procedure malloc [2019-10-02 10:27:53,665 INFO L130 BoogieDeclarations]: Found specification of procedure calloc [2019-10-02 10:27:53,665 INFO L130 BoogieDeclarations]: Found specification of procedure memset [2019-10-02 10:27:53,665 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_int [2019-10-02 10:27:53,666 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_ulong [2019-10-02 10:27:53,666 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_pointer [2019-10-02 10:27:53,666 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_assume [2019-10-02 10:27:53,666 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_malloc [2019-10-02 10:27:53,666 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnHeap [2019-10-02 10:27:53,666 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_zalloc [2019-10-02 10:27:53,666 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.meminit [2019-10-02 10:27:53,666 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_init_zalloc [2019-10-02 10:27:53,667 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_memset [2019-10-02 10:27:53,667 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset [2019-10-02 10:27:53,667 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_undef_int [2019-10-02 10:27:53,667 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_undef_ptr [2019-10-02 10:27:53,667 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_undef_ulong [2019-10-02 10:27:53,667 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_stop [2019-10-02 10:27:53,667 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_undef_int_nonpositive [2019-10-02 10:27:53,668 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_check_callback_ret_val [2019-10-02 10:27:53,668 INFO L130 BoogieDeclarations]: Found specification of procedure __bad_percpu_size [2019-10-02 10:27:53,668 INFO L130 BoogieDeclarations]: Found specification of procedure get_current [2019-10-02 10:27:53,668 INFO L130 BoogieDeclarations]: Found specification of procedure __xchg_wrong_size [2019-10-02 10:27:53,668 INFO L130 BoogieDeclarations]: Found specification of procedure strlen [2019-10-02 10:27:53,669 INFO L130 BoogieDeclarations]: Found specification of procedure __raw_spin_lock_init [2019-10-02 10:27:53,669 INFO L130 BoogieDeclarations]: Found specification of procedure _raw_spin_lock [2019-10-02 10:27:53,669 INFO L130 BoogieDeclarations]: Found specification of procedure _raw_spin_lock_bh [2019-10-02 10:27:53,669 INFO L130 BoogieDeclarations]: Found specification of procedure _raw_spin_unlock [2019-10-02 10:27:53,669 INFO L130 BoogieDeclarations]: Found specification of procedure _raw_spin_unlock_bh [2019-10-02 10:27:53,669 INFO L130 BoogieDeclarations]: Found specification of procedure spinlock_check [2019-10-02 10:27:53,670 INFO L130 BoogieDeclarations]: Found specification of procedure spin_lock [2019-10-02 10:27:53,670 INFO L130 BoogieDeclarations]: Found specification of procedure spin_lock_bh [2019-10-02 10:27:53,670 INFO L130 BoogieDeclarations]: Found specification of procedure spin_unlock [2019-10-02 10:27:53,670 INFO L130 BoogieDeclarations]: Found specification of procedure spin_unlock_bh [2019-10-02 10:27:53,671 INFO L130 BoogieDeclarations]: Found specification of procedure msleep_interruptible [2019-10-02 10:27:53,671 INFO L130 BoogieDeclarations]: Found specification of procedure del_timer [2019-10-02 10:27:53,671 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_del_timer_2 [2019-10-02 10:27:53,671 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_del_timer_8 [2019-10-02 10:27:53,671 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_del_timer_10 [2019-10-02 10:27:53,672 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_del_timer_12 [2019-10-02 10:27:53,672 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_del_timer_14 [2019-10-02 10:27:53,672 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_del_timer_16 [2019-10-02 10:27:53,672 INFO L130 BoogieDeclarations]: Found specification of procedure mod_timer [2019-10-02 10:27:53,673 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mod_timer_7 [2019-10-02 10:27:53,673 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mod_timer_9 [2019-10-02 10:27:53,673 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mod_timer_11 [2019-10-02 10:27:53,673 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mod_timer_13 [2019-10-02 10:27:53,673 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mod_timer_15 [2019-10-02 10:27:53,674 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mod_timer_17 [2019-10-02 10:27:53,674 INFO L130 BoogieDeclarations]: Found specification of procedure add_timer [2019-10-02 10:27:53,674 INFO L130 BoogieDeclarations]: Found specification of procedure del_timer_sync [2019-10-02 10:27:53,674 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_del_timer_sync_1 [2019-10-02 10:27:53,674 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_del_timer_sync_5 [2019-10-02 10:27:53,675 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_del_timer_sync_6 [2019-10-02 10:27:53,675 INFO L130 BoogieDeclarations]: Found specification of procedure kfree [2019-10-02 10:27:53,675 INFO L130 BoogieDeclarations]: Found specification of procedure __kmalloc [2019-10-02 10:27:53,675 INFO L130 BoogieDeclarations]: Found specification of procedure kmalloc [2019-10-02 10:27:53,675 INFO L130 BoogieDeclarations]: Found specification of procedure kzalloc [2019-10-02 10:27:53,676 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_target_type_3 [2019-10-02 10:27:53,676 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_net_device_ops_4 [2019-10-02 10:27:53,676 INFO L130 BoogieDeclarations]: Found specification of procedure activate_pending_timer_1 [2019-10-02 10:27:53,676 INFO L130 BoogieDeclarations]: Found specification of procedure choose_timer_1 [2019-10-02 10:27:53,677 INFO L130 BoogieDeclarations]: Found specification of procedure reg_timer_1 [2019-10-02 10:27:53,677 INFO L130 BoogieDeclarations]: Found specification of procedure choose_timer_2 [2019-10-02 10:27:53,677 INFO L130 BoogieDeclarations]: Found specification of procedure reg_timer_2 [2019-10-02 10:27:53,677 INFO L130 BoogieDeclarations]: Found specification of procedure activate_pending_timer_2 [2019-10-02 10:27:53,677 INFO L130 BoogieDeclarations]: Found specification of procedure disable_suitable_timer_2 [2019-10-02 10:27:53,678 INFO L130 BoogieDeclarations]: Found specification of procedure disable_suitable_timer_1 [2019-10-02 10:27:53,678 INFO L130 BoogieDeclarations]: Found specification of procedure _copy_to_user [2019-10-02 10:27:53,678 INFO L130 BoogieDeclarations]: Found specification of procedure copy_to_user [2019-10-02 10:27:53,678 INFO L130 BoogieDeclarations]: Found specification of procedure capable [2019-10-02 10:27:53,678 INFO L130 BoogieDeclarations]: Found specification of procedure tty_chars_in_buffer [2019-10-02 10:27:53,679 INFO L130 BoogieDeclarations]: Found specification of procedure tty_hangup [2019-10-02 10:27:53,679 INFO L130 BoogieDeclarations]: Found specification of procedure tty_mode_ioctl [2019-10-02 10:27:53,679 INFO L130 BoogieDeclarations]: Found specification of procedure tty_devnum [2019-10-02 10:27:53,679 INFO L130 BoogieDeclarations]: Found specification of procedure tty_register_ldisc [2019-10-02 10:27:53,680 INFO L130 BoogieDeclarations]: Found specification of procedure tty_unregister_ldisc [2019-10-02 10:27:53,680 INFO L130 BoogieDeclarations]: Found specification of procedure consume_skb [2019-10-02 10:27:53,680 INFO L130 BoogieDeclarations]: Found specification of procedure skb_put [2019-10-02 10:27:53,680 INFO L130 BoogieDeclarations]: Found specification of procedure skb_reset_mac_header [2019-10-02 10:27:53,680 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2019-10-02 10:27:53,680 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-10-02 10:27:53,681 INFO L130 BoogieDeclarations]: Found specification of procedure dev_alloc_skb [2019-10-02 10:27:53,681 INFO L130 BoogieDeclarations]: Found specification of procedure compat_ptr [2019-10-02 10:27:53,681 INFO L130 BoogieDeclarations]: Found specification of procedure netdev_get_tx_queue [2019-10-02 10:27:53,681 INFO L130 BoogieDeclarations]: Found specification of procedure netdev_priv [2019-10-02 10:27:53,682 INFO L130 BoogieDeclarations]: Found specification of procedure dev_close [2019-10-02 10:27:53,682 INFO L130 BoogieDeclarations]: Found specification of procedure register_netdevice [2019-10-02 10:27:53,682 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_register_netdevice_4 [2019-10-02 10:27:53,682 INFO L130 BoogieDeclarations]: Found specification of procedure unregister_netdevice_queue [2019-10-02 10:27:53,682 INFO L130 BoogieDeclarations]: Found specification of procedure unregister_netdevice [2019-10-02 10:27:53,683 INFO L130 BoogieDeclarations]: Found specification of procedure free_netdev [2019-10-02 10:27:53,683 INFO L130 BoogieDeclarations]: Found specification of procedure netpoll_trap [2019-10-02 10:27:53,683 INFO L130 BoogieDeclarations]: Found specification of procedure __netif_schedule [2019-10-02 10:27:53,683 INFO L130 BoogieDeclarations]: Found specification of procedure netif_tx_start_queue [2019-10-02 10:27:53,683 INFO L130 BoogieDeclarations]: Found specification of procedure netif_start_queue [2019-10-02 10:27:53,684 INFO L130 BoogieDeclarations]: Found specification of procedure netif_tx_wake_queue [2019-10-02 10:27:53,685 INFO L130 BoogieDeclarations]: Found specification of procedure netif_wake_queue [2019-10-02 10:27:53,690 INFO L130 BoogieDeclarations]: Found specification of procedure netif_tx_stop_queue [2019-10-02 10:27:53,690 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-10-02 10:27:53,691 INFO L130 BoogieDeclarations]: Found specification of procedure netif_stop_queue [2019-10-02 10:27:53,691 INFO L130 BoogieDeclarations]: Found specification of procedure netif_tx_queue_stopped [2019-10-02 10:27:53,691 INFO L130 BoogieDeclarations]: Found specification of procedure netif_queue_stopped [2019-10-02 10:27:53,695 INFO L130 BoogieDeclarations]: Found specification of procedure netif_running [2019-10-02 10:27:53,696 INFO L130 BoogieDeclarations]: Found specification of procedure netif_rx [2019-10-02 10:27:53,696 INFO L130 BoogieDeclarations]: Found specification of procedure dev_trans_start [2019-10-02 10:27:53,696 INFO L130 BoogieDeclarations]: Found specification of procedure alloc_netdev_mqs [2019-10-02 10:27:53,697 INFO L130 BoogieDeclarations]: Found specification of procedure unregister_netdev [2019-10-02 10:27:53,697 INFO L130 BoogieDeclarations]: Found specification of procedure rtnl_lock [2019-10-02 10:27:53,697 INFO L130 BoogieDeclarations]: Found specification of procedure rtnl_unlock [2019-10-02 10:27:53,698 INFO L130 BoogieDeclarations]: Found specification of procedure slhc_init [2019-10-02 10:27:53,698 INFO L130 BoogieDeclarations]: Found specification of procedure slhc_free [2019-10-02 10:27:53,698 INFO L130 BoogieDeclarations]: Found specification of procedure slhc_compress [2019-10-02 10:27:53,698 INFO L130 BoogieDeclarations]: Found specification of procedure slhc_uncompress [2019-10-02 10:27:53,698 INFO L130 BoogieDeclarations]: Found specification of procedure slhc_remember [2019-10-02 10:27:53,699 INFO L130 BoogieDeclarations]: Found specification of procedure slip_esc [2019-10-02 10:27:53,699 INFO L130 BoogieDeclarations]: Found specification of procedure slip_unesc [2019-10-02 10:27:53,699 INFO L130 BoogieDeclarations]: Found specification of procedure slip_esc6 [2019-10-02 10:27:53,699 INFO L130 BoogieDeclarations]: Found specification of procedure slip_unesc6 [2019-10-02 10:27:53,699 INFO L130 BoogieDeclarations]: Found specification of procedure sl_keepalive [2019-10-02 10:27:53,700 INFO L130 BoogieDeclarations]: Found specification of procedure sl_outfill [2019-10-02 10:27:53,700 INFO L130 BoogieDeclarations]: Found specification of procedure sl_ioctl [2019-10-02 10:27:53,700 INFO L130 BoogieDeclarations]: Found specification of procedure sl_alloc_bufs [2019-10-02 10:27:53,700 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_sl_alloc_bufs_3 [2019-10-02 10:27:53,700 INFO L130 BoogieDeclarations]: Found specification of procedure sl_free_bufs [2019-10-02 10:27:53,701 INFO L130 BoogieDeclarations]: Found specification of procedure memcpy [2019-10-02 10:27:53,701 INFO L130 BoogieDeclarations]: Found specification of procedure sl_realloc_bufs [2019-10-02 10:27:53,701 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memcpy [2019-10-02 10:27:53,701 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2019-10-02 10:27:53,701 INFO L130 BoogieDeclarations]: Found specification of procedure sl_lock [2019-10-02 10:27:53,701 INFO L130 BoogieDeclarations]: Found specification of procedure sl_unlock [2019-10-02 10:27:53,702 INFO L130 BoogieDeclarations]: Found specification of procedure sl_bump [2019-10-02 10:27:53,702 INFO L130 BoogieDeclarations]: Found specification of procedure sl_encaps [2019-10-02 10:27:53,702 INFO L130 BoogieDeclarations]: Found specification of procedure ##fun~$Pointer$~X~$Pointer$~X~int~TO~int [2019-10-02 10:27:53,702 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-10-02 10:27:53,702 INFO L130 BoogieDeclarations]: Found specification of procedure slip_write_wakeup [2019-10-02 10:27:53,702 INFO L130 BoogieDeclarations]: Found specification of procedure sl_tx_timeout [2019-10-02 10:27:53,702 INFO L130 BoogieDeclarations]: Found specification of procedure sl_xmit [2019-10-02 10:27:53,703 INFO L130 BoogieDeclarations]: Found specification of procedure sl_close [2019-10-02 10:27:53,703 INFO L130 BoogieDeclarations]: Found specification of procedure sl_open [2019-10-02 10:27:53,703 INFO L130 BoogieDeclarations]: Found specification of procedure sl_change_mtu [2019-10-02 10:27:53,703 INFO L130 BoogieDeclarations]: Found specification of procedure sl_get_stats64 [2019-10-02 10:27:53,703 INFO L130 BoogieDeclarations]: Found specification of procedure sl_init [2019-10-02 10:27:53,703 INFO L130 BoogieDeclarations]: Found specification of procedure sl_uninit [2019-10-02 10:27:53,703 INFO L130 BoogieDeclarations]: Found specification of procedure sl_free_netdev [2019-10-02 10:27:53,703 INFO L130 BoogieDeclarations]: Found specification of procedure sl_setup [2019-10-02 10:27:53,704 INFO L130 BoogieDeclarations]: Found specification of procedure slip_receive_buf [2019-10-02 10:27:53,704 INFO L130 BoogieDeclarations]: Found specification of procedure sl_sync [2019-10-02 10:27:53,704 INFO L130 BoogieDeclarations]: Found specification of procedure sl_alloc [2019-10-02 10:27:53,704 INFO L130 BoogieDeclarations]: Found specification of procedure slip_open [2019-10-02 10:27:53,704 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_slip_open_18 [2019-10-02 10:27:53,704 INFO L130 BoogieDeclarations]: Found specification of procedure slip_close [2019-10-02 10:27:53,704 INFO L130 BoogieDeclarations]: Found specification of procedure slip_hangup [2019-10-02 10:27:53,704 INFO L130 BoogieDeclarations]: Found specification of procedure slip_ioctl [2019-10-02 10:27:53,705 INFO L130 BoogieDeclarations]: Found specification of procedure slip_compat_ioctl [2019-10-02 10:27:53,705 INFO L130 BoogieDeclarations]: Found specification of procedure slip_init [2019-10-02 10:27:53,705 INFO L130 BoogieDeclarations]: Found specification of procedure slip_exit [2019-10-02 10:27:53,705 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_initialize [2019-10-02 10:27:53,705 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_check_final_state [2019-10-02 10:27:53,705 INFO L130 BoogieDeclarations]: Found specification of procedure ##fun~int~TO~VOID [2019-10-02 10:27:53,705 INFO L130 BoogieDeclarations]: Found specification of procedure main [2019-10-02 10:27:53,705 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_error [2019-10-02 10:27:53,706 INFO L130 BoogieDeclarations]: Found specification of procedure external_alloc [2019-10-02 10:27:53,706 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_uint [2019-10-02 10:27:53,706 INFO L130 BoogieDeclarations]: Found specification of procedure free [2019-10-02 10:27:53,706 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2019-10-02 10:27:53,706 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~$Pointer$ [2019-10-02 10:27:53,706 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2019-10-02 10:27:53,706 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-10-02 10:27:53,706 INFO L130 BoogieDeclarations]: Found specification of procedure write~unchecked~int [2019-10-02 10:27:53,706 INFO L130 BoogieDeclarations]: Found specification of procedure read~unchecked~int [2019-10-02 10:27:53,707 INFO L130 BoogieDeclarations]: Found specification of procedure write~unchecked~$Pointer$ [2019-10-02 10:27:53,707 INFO L130 BoogieDeclarations]: Found specification of procedure read~unchecked~$Pointer$ [2019-10-02 10:27:55,137 INFO L683 $ProcedureCfgBuilder]: dead code at ProgramPoint ldv_stopFINAL: assume true; [2019-10-02 10:27:58,781 INFO L278 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-10-02 10:27:58,782 INFO L283 CfgBuilder]: Removed 0 assume(true) statements. [2019-10-02 10:27:58,784 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 02.10 10:27:58 BoogieIcfgContainer [2019-10-02 10:27:58,784 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-10-02 10:27:58,786 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-10-02 10:27:58,786 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-10-02 10:27:58,789 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-10-02 10:27:58,790 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 02.10 10:27:50" (1/3) ... [2019-10-02 10:27:58,791 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@6ed57362 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 02.10 10:27:58, skipping insertion in model container [2019-10-02 10:27:58,791 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.10 10:27:53" (2/3) ... [2019-10-02 10:27:58,791 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@6ed57362 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 02.10 10:27:58, skipping insertion in model container [2019-10-02 10:27:58,792 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 02.10 10:27:58" (3/3) ... [2019-10-02 10:27:58,793 INFO L109 eAbstractionObserver]: Analyzing ICFG linux-stable-1b0b0ac-1-108_1a-drivers--net--slip.ko-entry_point_ldv-val-v0.8.cil.out.i [2019-10-02 10:27:58,805 INFO L152 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-10-02 10:27:58,815 INFO L164 ceAbstractionStarter]: Appying trace abstraction to program that has 1 error locations. [2019-10-02 10:27:58,833 INFO L252 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2019-10-02 10:27:58,870 INFO L128 ementStrategyFactory]: Using default assertion order modulation [2019-10-02 10:27:58,871 INFO L377 AbstractCegarLoop]: Interprodecural is true [2019-10-02 10:27:58,871 INFO L378 AbstractCegarLoop]: Hoare is true [2019-10-02 10:27:58,871 INFO L379 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-10-02 10:27:58,872 INFO L380 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-10-02 10:27:58,872 INFO L381 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-10-02 10:27:58,872 INFO L382 AbstractCegarLoop]: Difference is false [2019-10-02 10:27:58,872 INFO L383 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-10-02 10:27:58,872 INFO L388 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-10-02 10:27:58,917 INFO L276 IsEmpty]: Start isEmpty. Operand 1450 states. [2019-10-02 10:27:58,948 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 167 [2019-10-02 10:27:58,949 INFO L403 BasicCegarLoop]: Found error trace [2019-10-02 10:27:58,950 INFO L411 BasicCegarLoop]: trace histogram [7, 7, 7, 7, 7, 7, 7, 7, 5, 5, 5, 5, 5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-02 10:27:58,952 INFO L418 AbstractCegarLoop]: === Iteration 1 === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-02 10:27:58,957 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-02 10:27:58,958 INFO L82 PathProgramCache]: Analyzing trace with hash 1003017911, now seen corresponding path program 1 times [2019-10-02 10:27:58,960 INFO L224 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-10-02 10:27:58,960 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-10-02 10:27:59,056 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-02 10:27:59,056 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-02 10:27:59,057 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-02 10:27:59,529 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-02 10:27:59,869 INFO L134 CoverageAnalysis]: Checked inductivity of 269 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 269 trivial. 0 not checked. [2019-10-02 10:27:59,872 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-10-02 10:27:59,872 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-10-02 10:27:59,876 INFO L454 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-10-02 10:27:59,890 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-10-02 10:27:59,890 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-10-02 10:27:59,893 INFO L87 Difference]: Start difference. First operand 1450 states. Second operand 3 states. [2019-10-02 10:28:00,219 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-02 10:28:00,220 INFO L93 Difference]: Finished difference Result 3588 states and 4861 transitions. [2019-10-02 10:28:00,220 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-10-02 10:28:00,222 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 166 [2019-10-02 10:28:00,223 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-02 10:28:00,262 INFO L225 Difference]: With dead ends: 3588 [2019-10-02 10:28:00,262 INFO L226 Difference]: Without dead ends: 2080 [2019-10-02 10:28:00,275 INFO L640 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-10-02 10:28:00,298 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2080 states. [2019-10-02 10:28:00,483 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2080 to 2080. [2019-10-02 10:28:00,485 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2080 states. [2019-10-02 10:28:00,499 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2080 states to 2080 states and 2799 transitions. [2019-10-02 10:28:00,501 INFO L78 Accepts]: Start accepts. Automaton has 2080 states and 2799 transitions. Word has length 166 [2019-10-02 10:28:00,502 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-02 10:28:00,502 INFO L475 AbstractCegarLoop]: Abstraction has 2080 states and 2799 transitions. [2019-10-02 10:28:00,503 INFO L476 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-10-02 10:28:00,503 INFO L276 IsEmpty]: Start isEmpty. Operand 2080 states and 2799 transitions. [2019-10-02 10:28:00,522 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 235 [2019-10-02 10:28:00,522 INFO L403 BasicCegarLoop]: Found error trace [2019-10-02 10:28:00,523 INFO L411 BasicCegarLoop]: trace histogram [7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-02 10:28:00,523 INFO L418 AbstractCegarLoop]: === Iteration 2 === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-02 10:28:00,523 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-02 10:28:00,524 INFO L82 PathProgramCache]: Analyzing trace with hash -1537564376, now seen corresponding path program 1 times [2019-10-02 10:28:00,524 INFO L224 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-10-02 10:28:00,524 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-10-02 10:28:00,546 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-02 10:28:00,546 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-02 10:28:00,546 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-02 10:28:00,617 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-02 10:28:00,940 INFO L134 CoverageAnalysis]: Checked inductivity of 361 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 357 trivial. 0 not checked. [2019-10-02 10:28:00,941 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-10-02 10:28:00,943 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-10-02 10:28:00,946 INFO L454 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-10-02 10:28:00,946 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-10-02 10:28:00,946 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-10-02 10:28:00,947 INFO L87 Difference]: Start difference. First operand 2080 states and 2799 transitions. Second operand 5 states. [2019-10-02 10:28:06,966 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-02 10:28:06,967 INFO L93 Difference]: Finished difference Result 4110 states and 5539 transitions. [2019-10-02 10:28:06,967 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-10-02 10:28:06,967 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 234 [2019-10-02 10:28:06,968 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-02 10:28:06,981 INFO L225 Difference]: With dead ends: 4110 [2019-10-02 10:28:06,981 INFO L226 Difference]: Without dead ends: 2080 [2019-10-02 10:28:06,989 INFO L640 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-10-02 10:28:06,994 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2080 states. [2019-10-02 10:28:07,098 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2080 to 2080. [2019-10-02 10:28:07,099 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2080 states. [2019-10-02 10:28:07,114 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2080 states to 2080 states and 2797 transitions. [2019-10-02 10:28:07,115 INFO L78 Accepts]: Start accepts. Automaton has 2080 states and 2797 transitions. Word has length 234 [2019-10-02 10:28:07,117 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-02 10:28:07,117 INFO L475 AbstractCegarLoop]: Abstraction has 2080 states and 2797 transitions. [2019-10-02 10:28:07,117 INFO L476 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-10-02 10:28:07,118 INFO L276 IsEmpty]: Start isEmpty. Operand 2080 states and 2797 transitions. [2019-10-02 10:28:07,125 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 235 [2019-10-02 10:28:07,125 INFO L403 BasicCegarLoop]: Found error trace [2019-10-02 10:28:07,126 INFO L411 BasicCegarLoop]: trace histogram [7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-02 10:28:07,126 INFO L418 AbstractCegarLoop]: === Iteration 3 === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-02 10:28:07,126 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-02 10:28:07,126 INFO L82 PathProgramCache]: Analyzing trace with hash 1762709222, now seen corresponding path program 1 times [2019-10-02 10:28:07,127 INFO L224 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-10-02 10:28:07,127 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-10-02 10:28:07,136 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-02 10:28:07,137 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-02 10:28:07,137 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-02 10:28:07,323 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-02 10:28:07,618 INFO L134 CoverageAnalysis]: Checked inductivity of 361 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 357 trivial. 0 not checked. [2019-10-02 10:28:07,619 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-10-02 10:28:07,619 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2019-10-02 10:28:07,619 INFO L454 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-10-02 10:28:07,620 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-10-02 10:28:07,620 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=73, Unknown=0, NotChecked=0, Total=90 [2019-10-02 10:28:07,620 INFO L87 Difference]: Start difference. First operand 2080 states and 2797 transitions. Second operand 10 states. [2019-10-02 10:28:07,839 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-02 10:28:07,840 INFO L93 Difference]: Finished difference Result 4120 states and 5543 transitions. [2019-10-02 10:28:07,840 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-10-02 10:28:07,841 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 234 [2019-10-02 10:28:07,842 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-02 10:28:07,856 INFO L225 Difference]: With dead ends: 4120 [2019-10-02 10:28:07,856 INFO L226 Difference]: Without dead ends: 2082 [2019-10-02 10:28:07,865 INFO L640 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=73, Unknown=0, NotChecked=0, Total=90 [2019-10-02 10:28:07,870 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2082 states. [2019-10-02 10:28:07,963 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2082 to 2080. [2019-10-02 10:28:07,963 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2080 states. [2019-10-02 10:28:07,978 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2080 states to 2080 states and 2795 transitions. [2019-10-02 10:28:07,979 INFO L78 Accepts]: Start accepts. Automaton has 2080 states and 2795 transitions. Word has length 234 [2019-10-02 10:28:07,980 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-02 10:28:07,980 INFO L475 AbstractCegarLoop]: Abstraction has 2080 states and 2795 transitions. [2019-10-02 10:28:07,980 INFO L476 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-10-02 10:28:07,980 INFO L276 IsEmpty]: Start isEmpty. Operand 2080 states and 2795 transitions. [2019-10-02 10:28:07,989 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 242 [2019-10-02 10:28:07,989 INFO L403 BasicCegarLoop]: Found error trace [2019-10-02 10:28:07,989 INFO L411 BasicCegarLoop]: trace histogram [7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-02 10:28:07,989 INFO L418 AbstractCegarLoop]: === Iteration 4 === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-02 10:28:07,990 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-02 10:28:07,990 INFO L82 PathProgramCache]: Analyzing trace with hash 666500382, now seen corresponding path program 1 times [2019-10-02 10:28:07,990 INFO L224 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-10-02 10:28:07,990 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-10-02 10:28:07,997 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-02 10:28:07,998 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-02 10:28:07,998 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-02 10:28:08,123 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-02 10:28:08,319 INFO L134 CoverageAnalysis]: Checked inductivity of 361 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 361 trivial. 0 not checked. [2019-10-02 10:28:08,320 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-10-02 10:28:08,320 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-10-02 10:28:08,320 INFO L454 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-10-02 10:28:08,321 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-10-02 10:28:08,322 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-10-02 10:28:08,322 INFO L87 Difference]: Start difference. First operand 2080 states and 2795 transitions. Second operand 7 states. [2019-10-02 10:28:08,462 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-02 10:28:08,462 INFO L93 Difference]: Finished difference Result 2094 states and 2809 transitions. [2019-10-02 10:28:08,463 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-10-02 10:28:08,463 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 241 [2019-10-02 10:28:08,464 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-02 10:28:08,479 INFO L225 Difference]: With dead ends: 2094 [2019-10-02 10:28:08,479 INFO L226 Difference]: Without dead ends: 2091 [2019-10-02 10:28:08,481 INFO L640 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2019-10-02 10:28:08,485 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2091 states. [2019-10-02 10:28:08,572 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2091 to 2088. [2019-10-02 10:28:08,572 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2088 states. [2019-10-02 10:28:08,590 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2088 states to 2088 states and 2803 transitions. [2019-10-02 10:28:08,590 INFO L78 Accepts]: Start accepts. Automaton has 2088 states and 2803 transitions. Word has length 241 [2019-10-02 10:28:08,591 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-02 10:28:08,591 INFO L475 AbstractCegarLoop]: Abstraction has 2088 states and 2803 transitions. [2019-10-02 10:28:08,591 INFO L476 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-10-02 10:28:08,591 INFO L276 IsEmpty]: Start isEmpty. Operand 2088 states and 2803 transitions. [2019-10-02 10:28:08,603 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 258 [2019-10-02 10:28:08,604 INFO L403 BasicCegarLoop]: Found error trace [2019-10-02 10:28:08,604 INFO L411 BasicCegarLoop]: trace histogram [7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-02 10:28:08,604 INFO L418 AbstractCegarLoop]: === Iteration 5 === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-02 10:28:08,604 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-02 10:28:08,605 INFO L82 PathProgramCache]: Analyzing trace with hash 457310605, now seen corresponding path program 1 times [2019-10-02 10:28:08,605 INFO L224 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-10-02 10:28:08,605 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-10-02 10:28:08,614 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-02 10:28:08,615 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-02 10:28:08,615 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-02 10:28:08,716 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-02 10:28:08,985 INFO L134 CoverageAnalysis]: Checked inductivity of 361 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 361 trivial. 0 not checked. [2019-10-02 10:28:08,985 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-10-02 10:28:08,986 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-10-02 10:28:08,986 INFO L454 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-10-02 10:28:08,986 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-10-02 10:28:08,987 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=43, Unknown=0, NotChecked=0, Total=56 [2019-10-02 10:28:08,987 INFO L87 Difference]: Start difference. First operand 2088 states and 2803 transitions. Second operand 8 states. [2019-10-02 10:28:09,148 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-02 10:28:09,149 INFO L93 Difference]: Finished difference Result 2122 states and 2843 transitions. [2019-10-02 10:28:09,149 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-10-02 10:28:09,149 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 257 [2019-10-02 10:28:09,150 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-02 10:28:09,161 INFO L225 Difference]: With dead ends: 2122 [2019-10-02 10:28:09,162 INFO L226 Difference]: Without dead ends: 2119 [2019-10-02 10:28:09,163 INFO L640 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=69, Unknown=0, NotChecked=0, Total=90 [2019-10-02 10:28:09,167 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2119 states. [2019-10-02 10:28:09,234 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2119 to 2090. [2019-10-02 10:28:09,235 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2090 states. [2019-10-02 10:28:09,243 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2090 states to 2090 states and 2806 transitions. [2019-10-02 10:28:09,243 INFO L78 Accepts]: Start accepts. Automaton has 2090 states and 2806 transitions. Word has length 257 [2019-10-02 10:28:09,244 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-02 10:28:09,244 INFO L475 AbstractCegarLoop]: Abstraction has 2090 states and 2806 transitions. [2019-10-02 10:28:09,244 INFO L476 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-10-02 10:28:09,244 INFO L276 IsEmpty]: Start isEmpty. Operand 2090 states and 2806 transitions. [2019-10-02 10:28:09,255 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 292 [2019-10-02 10:28:09,256 INFO L403 BasicCegarLoop]: Found error trace [2019-10-02 10:28:09,256 INFO L411 BasicCegarLoop]: trace histogram [7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-02 10:28:09,256 INFO L418 AbstractCegarLoop]: === Iteration 6 === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-02 10:28:09,257 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-02 10:28:09,257 INFO L82 PathProgramCache]: Analyzing trace with hash 903680251, now seen corresponding path program 1 times [2019-10-02 10:28:09,257 INFO L224 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-10-02 10:28:09,257 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-10-02 10:28:09,264 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-02 10:28:09,265 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-02 10:28:09,265 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-02 10:28:09,333 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-02 10:28:09,596 INFO L134 CoverageAnalysis]: Checked inductivity of 364 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 360 trivial. 0 not checked. [2019-10-02 10:28:09,597 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-10-02 10:28:09,597 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-10-02 10:28:09,598 INFO L454 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-10-02 10:28:09,598 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-10-02 10:28:09,599 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-10-02 10:28:09,599 INFO L87 Difference]: Start difference. First operand 2090 states and 2806 transitions. Second operand 4 states. [2019-10-02 10:28:12,435 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-02 10:28:12,435 INFO L93 Difference]: Finished difference Result 4809 states and 6456 transitions. [2019-10-02 10:28:12,435 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-10-02 10:28:12,436 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 291 [2019-10-02 10:28:12,436 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-02 10:28:12,451 INFO L225 Difference]: With dead ends: 4809 [2019-10-02 10:28:12,452 INFO L226 Difference]: Without dead ends: 2769 [2019-10-02 10:28:12,460 INFO L640 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-10-02 10:28:12,466 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2769 states. [2019-10-02 10:28:12,583 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2769 to 2768. [2019-10-02 10:28:12,583 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2768 states. [2019-10-02 10:28:12,593 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2768 states to 2768 states and 3705 transitions. [2019-10-02 10:28:12,594 INFO L78 Accepts]: Start accepts. Automaton has 2768 states and 3705 transitions. Word has length 291 [2019-10-02 10:28:12,594 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-02 10:28:12,594 INFO L475 AbstractCegarLoop]: Abstraction has 2768 states and 3705 transitions. [2019-10-02 10:28:12,595 INFO L476 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-10-02 10:28:12,595 INFO L276 IsEmpty]: Start isEmpty. Operand 2768 states and 3705 transitions. [2019-10-02 10:28:12,610 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 294 [2019-10-02 10:28:12,610 INFO L403 BasicCegarLoop]: Found error trace [2019-10-02 10:28:12,611 INFO L411 BasicCegarLoop]: trace histogram [7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-02 10:28:12,611 INFO L418 AbstractCegarLoop]: === Iteration 7 === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-02 10:28:12,611 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-02 10:28:12,611 INFO L82 PathProgramCache]: Analyzing trace with hash 592433216, now seen corresponding path program 1 times [2019-10-02 10:28:12,611 INFO L224 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-10-02 10:28:12,612 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-10-02 10:28:12,619 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-02 10:28:12,619 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-02 10:28:12,619 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-02 10:28:12,679 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-02 10:28:12,821 INFO L134 CoverageAnalysis]: Checked inductivity of 364 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 364 trivial. 0 not checked. [2019-10-02 10:28:12,822 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-10-02 10:28:12,822 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-10-02 10:28:12,822 INFO L454 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-10-02 10:28:12,823 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-10-02 10:28:12,823 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-10-02 10:28:12,823 INFO L87 Difference]: Start difference. First operand 2768 states and 3705 transitions. Second operand 3 states. [2019-10-02 10:28:12,970 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-02 10:28:12,971 INFO L93 Difference]: Finished difference Result 5489 states and 7402 transitions. [2019-10-02 10:28:12,971 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-10-02 10:28:12,971 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 293 [2019-10-02 10:28:12,972 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-02 10:28:12,989 INFO L225 Difference]: With dead ends: 5489 [2019-10-02 10:28:12,990 INFO L226 Difference]: Without dead ends: 2771 [2019-10-02 10:28:13,004 INFO L640 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-10-02 10:28:13,010 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2771 states. [2019-10-02 10:28:13,213 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2771 to 2768. [2019-10-02 10:28:13,214 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2768 states. [2019-10-02 10:28:13,223 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2768 states to 2768 states and 3696 transitions. [2019-10-02 10:28:13,224 INFO L78 Accepts]: Start accepts. Automaton has 2768 states and 3696 transitions. Word has length 293 [2019-10-02 10:28:13,225 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-02 10:28:13,225 INFO L475 AbstractCegarLoop]: Abstraction has 2768 states and 3696 transitions. [2019-10-02 10:28:13,225 INFO L476 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-10-02 10:28:13,225 INFO L276 IsEmpty]: Start isEmpty. Operand 2768 states and 3696 transitions. [2019-10-02 10:28:13,239 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 297 [2019-10-02 10:28:13,239 INFO L403 BasicCegarLoop]: Found error trace [2019-10-02 10:28:13,240 INFO L411 BasicCegarLoop]: trace histogram [7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-02 10:28:13,240 INFO L418 AbstractCegarLoop]: === Iteration 8 === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-02 10:28:13,241 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-02 10:28:13,241 INFO L82 PathProgramCache]: Analyzing trace with hash 1176691019, now seen corresponding path program 1 times [2019-10-02 10:28:13,241 INFO L224 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-10-02 10:28:13,241 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-10-02 10:28:13,248 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-02 10:28:13,249 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-02 10:28:13,249 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-02 10:28:13,333 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-02 10:28:13,603 INFO L134 CoverageAnalysis]: Checked inductivity of 364 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 360 trivial. 0 not checked. [2019-10-02 10:28:13,604 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-10-02 10:28:13,604 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2019-10-02 10:28:13,604 INFO L454 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-10-02 10:28:13,605 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-10-02 10:28:13,606 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=91, Unknown=0, NotChecked=0, Total=110 [2019-10-02 10:28:13,606 INFO L87 Difference]: Start difference. First operand 2768 states and 3696 transitions. Second operand 11 states. [2019-10-02 10:28:13,972 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-02 10:28:13,972 INFO L93 Difference]: Finished difference Result 4847 states and 6488 transitions. [2019-10-02 10:28:13,973 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2019-10-02 10:28:13,973 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 296 [2019-10-02 10:28:13,974 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-02 10:28:13,990 INFO L225 Difference]: With dead ends: 4847 [2019-10-02 10:28:13,990 INFO L226 Difference]: Without dead ends: 2793 [2019-10-02 10:28:14,000 INFO L640 BasicCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 28 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=51, Invalid=291, Unknown=0, NotChecked=0, Total=342 [2019-10-02 10:28:14,004 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2793 states. [2019-10-02 10:28:14,120 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2793 to 2792. [2019-10-02 10:28:14,120 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2792 states. [2019-10-02 10:28:14,128 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2792 states to 2792 states and 3729 transitions. [2019-10-02 10:28:14,129 INFO L78 Accepts]: Start accepts. Automaton has 2792 states and 3729 transitions. Word has length 296 [2019-10-02 10:28:14,130 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-02 10:28:14,130 INFO L475 AbstractCegarLoop]: Abstraction has 2792 states and 3729 transitions. [2019-10-02 10:28:14,130 INFO L476 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-10-02 10:28:14,130 INFO L276 IsEmpty]: Start isEmpty. Operand 2792 states and 3729 transitions. [2019-10-02 10:28:14,145 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 297 [2019-10-02 10:28:14,145 INFO L403 BasicCegarLoop]: Found error trace [2019-10-02 10:28:14,145 INFO L411 BasicCegarLoop]: trace histogram [7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-02 10:28:14,146 INFO L418 AbstractCegarLoop]: === Iteration 9 === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-02 10:28:14,146 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-02 10:28:14,146 INFO L82 PathProgramCache]: Analyzing trace with hash -765487446, now seen corresponding path program 1 times [2019-10-02 10:28:14,146 INFO L224 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-10-02 10:28:14,146 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-10-02 10:28:14,154 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-02 10:28:14,154 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-02 10:28:14,154 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-02 10:28:14,277 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-02 10:28:14,471 INFO L134 CoverageAnalysis]: Checked inductivity of 364 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 364 trivial. 0 not checked. [2019-10-02 10:28:14,471 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-10-02 10:28:14,471 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-10-02 10:28:14,472 INFO L454 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-10-02 10:28:14,472 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-10-02 10:28:14,473 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-10-02 10:28:14,473 INFO L87 Difference]: Start difference. First operand 2792 states and 3729 transitions. Second operand 5 states. [2019-10-02 10:28:14,679 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-02 10:28:14,680 INFO L93 Difference]: Finished difference Result 4856 states and 6502 transitions. [2019-10-02 10:28:14,680 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-10-02 10:28:14,681 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 296 [2019-10-02 10:28:14,682 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-02 10:28:14,701 INFO L225 Difference]: With dead ends: 4856 [2019-10-02 10:28:14,701 INFO L226 Difference]: Without dead ends: 2800 [2019-10-02 10:28:14,713 INFO L640 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-10-02 10:28:14,718 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2800 states. [2019-10-02 10:28:14,838 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2800 to 2796. [2019-10-02 10:28:14,838 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2796 states. [2019-10-02 10:28:14,846 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2796 states to 2796 states and 3733 transitions. [2019-10-02 10:28:14,847 INFO L78 Accepts]: Start accepts. Automaton has 2796 states and 3733 transitions. Word has length 296 [2019-10-02 10:28:14,848 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-02 10:28:14,848 INFO L475 AbstractCegarLoop]: Abstraction has 2796 states and 3733 transitions. [2019-10-02 10:28:14,848 INFO L476 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-10-02 10:28:14,848 INFO L276 IsEmpty]: Start isEmpty. Operand 2796 states and 3733 transitions. [2019-10-02 10:28:14,859 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 324 [2019-10-02 10:28:14,860 INFO L403 BasicCegarLoop]: Found error trace [2019-10-02 10:28:14,860 INFO L411 BasicCegarLoop]: trace histogram [7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-02 10:28:14,860 INFO L418 AbstractCegarLoop]: === Iteration 10 === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-02 10:28:14,861 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-02 10:28:14,861 INFO L82 PathProgramCache]: Analyzing trace with hash 1523846816, now seen corresponding path program 1 times [2019-10-02 10:28:14,861 INFO L224 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-10-02 10:28:14,861 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-10-02 10:28:14,870 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-02 10:28:14,870 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-02 10:28:14,870 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-02 10:28:14,944 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-02 10:28:15,110 INFO L134 CoverageAnalysis]: Checked inductivity of 367 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 367 trivial. 0 not checked. [2019-10-02 10:28:15,111 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-10-02 10:28:15,111 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-10-02 10:28:15,112 INFO L454 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-10-02 10:28:15,112 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-10-02 10:28:15,112 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-10-02 10:28:15,112 INFO L87 Difference]: Start difference. First operand 2796 states and 3733 transitions. Second operand 3 states. [2019-10-02 10:28:15,284 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-02 10:28:15,284 INFO L93 Difference]: Finished difference Result 4859 states and 6507 transitions. [2019-10-02 10:28:15,285 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-10-02 10:28:15,285 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 323 [2019-10-02 10:28:15,286 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-02 10:28:15,301 INFO L225 Difference]: With dead ends: 4859 [2019-10-02 10:28:15,301 INFO L226 Difference]: Without dead ends: 2799 [2019-10-02 10:28:15,309 INFO L640 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-10-02 10:28:15,313 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2799 states. [2019-10-02 10:28:15,437 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2799 to 2797. [2019-10-02 10:28:15,437 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2797 states. [2019-10-02 10:28:15,446 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2797 states to 2797 states and 3734 transitions. [2019-10-02 10:28:15,447 INFO L78 Accepts]: Start accepts. Automaton has 2797 states and 3734 transitions. Word has length 323 [2019-10-02 10:28:15,448 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-02 10:28:15,448 INFO L475 AbstractCegarLoop]: Abstraction has 2797 states and 3734 transitions. [2019-10-02 10:28:15,448 INFO L476 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-10-02 10:28:15,449 INFO L276 IsEmpty]: Start isEmpty. Operand 2797 states and 3734 transitions. [2019-10-02 10:28:15,465 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 326 [2019-10-02 10:28:15,465 INFO L403 BasicCegarLoop]: Found error trace [2019-10-02 10:28:15,466 INFO L411 BasicCegarLoop]: trace histogram [7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-02 10:28:15,466 INFO L418 AbstractCegarLoop]: === Iteration 11 === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-02 10:28:15,466 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-02 10:28:15,466 INFO L82 PathProgramCache]: Analyzing trace with hash -1895822625, now seen corresponding path program 1 times [2019-10-02 10:28:15,467 INFO L224 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-10-02 10:28:15,467 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-10-02 10:28:15,478 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-02 10:28:15,478 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-02 10:28:15,479 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-02 10:28:15,570 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-02 10:28:15,744 INFO L134 CoverageAnalysis]: Checked inductivity of 367 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 367 trivial. 0 not checked. [2019-10-02 10:28:15,745 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-10-02 10:28:15,745 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-10-02 10:28:15,746 INFO L454 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-10-02 10:28:15,746 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-10-02 10:28:15,746 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-10-02 10:28:15,746 INFO L87 Difference]: Start difference. First operand 2797 states and 3734 transitions. Second operand 3 states. [2019-10-02 10:28:15,898 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-02 10:28:15,899 INFO L93 Difference]: Finished difference Result 4849 states and 6494 transitions. [2019-10-02 10:28:15,900 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-10-02 10:28:15,901 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 325 [2019-10-02 10:28:15,902 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-02 10:28:15,935 INFO L225 Difference]: With dead ends: 4849 [2019-10-02 10:28:15,935 INFO L226 Difference]: Without dead ends: 2788 [2019-10-02 10:28:15,946 INFO L640 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-10-02 10:28:15,952 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2788 states. [2019-10-02 10:28:16,078 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2788 to 2783. [2019-10-02 10:28:16,078 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2783 states. [2019-10-02 10:28:16,089 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2783 states to 2783 states and 3715 transitions. [2019-10-02 10:28:16,090 INFO L78 Accepts]: Start accepts. Automaton has 2783 states and 3715 transitions. Word has length 325 [2019-10-02 10:28:16,090 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-02 10:28:16,091 INFO L475 AbstractCegarLoop]: Abstraction has 2783 states and 3715 transitions. [2019-10-02 10:28:16,091 INFO L476 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-10-02 10:28:16,091 INFO L276 IsEmpty]: Start isEmpty. Operand 2783 states and 3715 transitions. [2019-10-02 10:28:16,105 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 337 [2019-10-02 10:28:16,105 INFO L403 BasicCegarLoop]: Found error trace [2019-10-02 10:28:16,105 INFO L411 BasicCegarLoop]: trace histogram [7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-02 10:28:16,106 INFO L418 AbstractCegarLoop]: === Iteration 12 === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-02 10:28:16,106 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-02 10:28:16,107 INFO L82 PathProgramCache]: Analyzing trace with hash 823889841, now seen corresponding path program 1 times [2019-10-02 10:28:16,107 INFO L224 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-10-02 10:28:16,107 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-10-02 10:28:16,116 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-02 10:28:16,117 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-02 10:28:16,117 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-02 10:28:16,325 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-02 10:28:16,594 INFO L134 CoverageAnalysis]: Checked inductivity of 367 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 367 trivial. 0 not checked. [2019-10-02 10:28:16,594 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-10-02 10:28:16,595 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-10-02 10:28:16,595 INFO L454 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-10-02 10:28:16,595 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-10-02 10:28:16,596 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-10-02 10:28:16,596 INFO L87 Difference]: Start difference. First operand 2783 states and 3715 transitions. Second operand 6 states. [2019-10-02 10:28:24,181 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-02 10:28:24,181 INFO L93 Difference]: Finished difference Result 4843 states and 6486 transitions. [2019-10-02 10:28:24,182 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-10-02 10:28:24,182 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 336 [2019-10-02 10:28:24,183 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-02 10:28:24,196 INFO L225 Difference]: With dead ends: 4843 [2019-10-02 10:28:24,196 INFO L226 Difference]: Without dead ends: 2796 [2019-10-02 10:28:24,204 INFO L640 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2019-10-02 10:28:24,207 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2796 states. [2019-10-02 10:28:24,297 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2796 to 2784. [2019-10-02 10:28:24,297 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2784 states. [2019-10-02 10:28:24,309 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2784 states to 2784 states and 3716 transitions. [2019-10-02 10:28:24,310 INFO L78 Accepts]: Start accepts. Automaton has 2784 states and 3716 transitions. Word has length 336 [2019-10-02 10:28:24,310 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-02 10:28:24,311 INFO L475 AbstractCegarLoop]: Abstraction has 2784 states and 3716 transitions. [2019-10-02 10:28:24,311 INFO L476 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-10-02 10:28:24,311 INFO L276 IsEmpty]: Start isEmpty. Operand 2784 states and 3716 transitions. [2019-10-02 10:28:24,322 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 339 [2019-10-02 10:28:24,323 INFO L403 BasicCegarLoop]: Found error trace [2019-10-02 10:28:24,323 INFO L411 BasicCegarLoop]: trace histogram [7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-02 10:28:24,323 INFO L418 AbstractCegarLoop]: === Iteration 13 === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-02 10:28:24,324 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-02 10:28:24,324 INFO L82 PathProgramCache]: Analyzing trace with hash -813730862, now seen corresponding path program 1 times [2019-10-02 10:28:24,324 INFO L224 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-10-02 10:28:24,324 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-10-02 10:28:24,333 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-02 10:28:24,333 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-02 10:28:24,334 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-02 10:28:24,701 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-02 10:28:24,907 INFO L134 CoverageAnalysis]: Checked inductivity of 367 backedges. 0 proven. 42 refuted. 0 times theorem prover too weak. 325 trivial. 0 not checked. [2019-10-02 10:28:24,908 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2019-10-02 10:28:24,908 INFO L224 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2019-10-02 10:28:25,220 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-02 10:28:26,300 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-02 10:28:26,312 INFO L256 TraceCheckSpWp]: Trace formula consists of 2573 conjuncts, 11 conjunts are in the unsatisfiable core [2019-10-02 10:28:26,341 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2019-10-02 10:28:26,399 INFO L319 QuantifierPusher]: Applying distributivity, recursing on 2 terms [2019-10-02 10:28:26,618 INFO L134 CoverageAnalysis]: Checked inductivity of 367 backedges. 134 proven. 0 refuted. 0 times theorem prover too weak. 233 trivial. 0 not checked. [2019-10-02 10:28:26,629 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2019-10-02 10:28:26,630 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [6] total 9 [2019-10-02 10:28:26,631 INFO L454 AbstractCegarLoop]: Interpolant automaton has 9 states [2019-10-02 10:28:26,631 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2019-10-02 10:28:26,632 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=54, Unknown=0, NotChecked=0, Total=72 [2019-10-02 10:28:26,632 INFO L87 Difference]: Start difference. First operand 2784 states and 3716 transitions. Second operand 9 states. [2019-10-02 10:28:27,091 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-02 10:28:27,091 INFO L93 Difference]: Finished difference Result 5551 states and 7418 transitions. [2019-10-02 10:28:27,091 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-10-02 10:28:27,092 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 338 [2019-10-02 10:28:27,092 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-02 10:28:27,107 INFO L225 Difference]: With dead ends: 5551 [2019-10-02 10:28:27,108 INFO L226 Difference]: Without dead ends: 2790 [2019-10-02 10:28:27,121 INFO L640 BasicCegarLoop]: 0 DeclaredPredicates, 346 GetRequests, 336 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=35, Invalid=97, Unknown=0, NotChecked=0, Total=132 [2019-10-02 10:28:27,130 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2790 states. [2019-10-02 10:28:27,326 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2790 to 2790. [2019-10-02 10:28:27,326 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2790 states. [2019-10-02 10:28:27,337 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2790 states to 2790 states and 3722 transitions. [2019-10-02 10:28:27,338 INFO L78 Accepts]: Start accepts. Automaton has 2790 states and 3722 transitions. Word has length 338 [2019-10-02 10:28:27,338 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-02 10:28:27,338 INFO L475 AbstractCegarLoop]: Abstraction has 2790 states and 3722 transitions. [2019-10-02 10:28:27,338 INFO L476 AbstractCegarLoop]: Interpolant automaton has 9 states. [2019-10-02 10:28:27,339 INFO L276 IsEmpty]: Start isEmpty. Operand 2790 states and 3722 transitions. [2019-10-02 10:28:27,352 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 346 [2019-10-02 10:28:27,352 INFO L403 BasicCegarLoop]: Found error trace [2019-10-02 10:28:27,353 INFO L411 BasicCegarLoop]: trace histogram [7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-02 10:28:27,353 INFO L418 AbstractCegarLoop]: === Iteration 14 === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-02 10:28:27,353 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-02 10:28:27,354 INFO L82 PathProgramCache]: Analyzing trace with hash 1651443938, now seen corresponding path program 1 times [2019-10-02 10:28:27,354 INFO L224 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-10-02 10:28:27,354 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-10-02 10:28:27,363 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-02 10:28:27,364 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-02 10:28:27,364 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-02 10:28:27,687 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-02 10:28:27,963 INFO L134 CoverageAnalysis]: Checked inductivity of 437 backedges. 0 proven. 61 refuted. 0 times theorem prover too weak. 376 trivial. 0 not checked. [2019-10-02 10:28:27,964 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2019-10-02 10:28:27,964 INFO L224 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2019-10-02 10:28:28,307 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-02 10:28:30,116 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-02 10:28:30,129 INFO L256 TraceCheckSpWp]: Trace formula consists of 2615 conjuncts, 15 conjunts are in the unsatisfiable core [2019-10-02 10:28:30,151 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2019-10-02 10:28:30,398 INFO L134 CoverageAnalysis]: Checked inductivity of 437 backedges. 244 proven. 1 refuted. 0 times theorem prover too weak. 192 trivial. 0 not checked. [2019-10-02 10:28:30,408 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-10-02 10:28:30,409 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 9 [2019-10-02 10:28:30,410 INFO L454 AbstractCegarLoop]: Interpolant automaton has 9 states [2019-10-02 10:28:30,410 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2019-10-02 10:28:30,410 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=55, Unknown=0, NotChecked=0, Total=72 [2019-10-02 10:28:30,410 INFO L87 Difference]: Start difference. First operand 2790 states and 3722 transitions. Second operand 9 states. [2019-10-02 10:28:30,804 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-02 10:28:30,805 INFO L93 Difference]: Finished difference Result 5561 states and 7427 transitions. [2019-10-02 10:28:30,807 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-10-02 10:28:30,807 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 345 [2019-10-02 10:28:30,807 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-02 10:28:30,819 INFO L225 Difference]: With dead ends: 5561 [2019-10-02 10:28:30,819 INFO L226 Difference]: Without dead ends: 2791 [2019-10-02 10:28:30,829 INFO L640 BasicCegarLoop]: 0 DeclaredPredicates, 354 GetRequests, 343 SyntacticMatches, 1 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=33, Invalid=99, Unknown=0, NotChecked=0, Total=132 [2019-10-02 10:28:30,834 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2791 states. [2019-10-02 10:28:30,965 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2791 to 2791. [2019-10-02 10:28:30,966 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2791 states. [2019-10-02 10:28:30,980 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2791 states to 2791 states and 3723 transitions. [2019-10-02 10:28:30,981 INFO L78 Accepts]: Start accepts. Automaton has 2791 states and 3723 transitions. Word has length 345 [2019-10-02 10:28:30,982 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-02 10:28:30,982 INFO L475 AbstractCegarLoop]: Abstraction has 2791 states and 3723 transitions. [2019-10-02 10:28:30,982 INFO L476 AbstractCegarLoop]: Interpolant automaton has 9 states. [2019-10-02 10:28:30,982 INFO L276 IsEmpty]: Start isEmpty. Operand 2791 states and 3723 transitions. [2019-10-02 10:28:30,996 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 353 [2019-10-02 10:28:30,997 INFO L403 BasicCegarLoop]: Found error trace [2019-10-02 10:28:30,997 INFO L411 BasicCegarLoop]: trace histogram [14, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-02 10:28:30,998 INFO L418 AbstractCegarLoop]: === Iteration 15 === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-02 10:28:30,998 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-02 10:28:30,998 INFO L82 PathProgramCache]: Analyzing trace with hash 1013425106, now seen corresponding path program 2 times [2019-10-02 10:28:30,998 INFO L224 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-10-02 10:28:30,998 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-10-02 10:28:31,005 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-02 10:28:31,005 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-02 10:28:31,005 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-02 10:28:31,319 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-02 10:28:31,571 INFO L134 CoverageAnalysis]: Checked inductivity of 556 backedges. 0 proven. 93 refuted. 0 times theorem prover too weak. 463 trivial. 0 not checked. [2019-10-02 10:28:31,572 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2019-10-02 10:28:31,572 INFO L224 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2019-10-02 10:28:31,930 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2019-10-02 10:28:33,740 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2019-10-02 10:28:33,740 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-10-02 10:28:33,751 INFO L256 TraceCheckSpWp]: Trace formula consists of 2657 conjuncts, 12 conjunts are in the unsatisfiable core [2019-10-02 10:28:33,760 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2019-10-02 10:28:33,965 INFO L134 CoverageAnalysis]: Checked inductivity of 556 backedges. 314 proven. 3 refuted. 0 times theorem prover too weak. 239 trivial. 0 not checked. [2019-10-02 10:28:33,975 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-10-02 10:28:33,975 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8] total 13 [2019-10-02 10:28:33,976 INFO L454 AbstractCegarLoop]: Interpolant automaton has 13 states [2019-10-02 10:28:33,976 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2019-10-02 10:28:33,977 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=28, Invalid=128, Unknown=0, NotChecked=0, Total=156 [2019-10-02 10:28:33,977 INFO L87 Difference]: Start difference. First operand 2791 states and 3723 transitions. Second operand 13 states. [2019-10-02 10:28:34,452 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-02 10:28:34,453 INFO L93 Difference]: Finished difference Result 5563 states and 7429 transitions. [2019-10-02 10:28:34,453 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-10-02 10:28:34,453 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 352 [2019-10-02 10:28:34,454 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-02 10:28:34,465 INFO L225 Difference]: With dead ends: 5563 [2019-10-02 10:28:34,465 INFO L226 Difference]: Without dead ends: 2792 [2019-10-02 10:28:34,475 INFO L640 BasicCegarLoop]: 0 DeclaredPredicates, 363 GetRequests, 348 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=51, Invalid=221, Unknown=0, NotChecked=0, Total=272 [2019-10-02 10:28:34,479 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2792 states. [2019-10-02 10:28:34,588 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2792 to 2792. [2019-10-02 10:28:34,588 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2792 states. [2019-10-02 10:28:34,598 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2792 states to 2792 states and 3724 transitions. [2019-10-02 10:28:34,600 INFO L78 Accepts]: Start accepts. Automaton has 2792 states and 3724 transitions. Word has length 352 [2019-10-02 10:28:34,600 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-02 10:28:34,600 INFO L475 AbstractCegarLoop]: Abstraction has 2792 states and 3724 transitions. [2019-10-02 10:28:34,600 INFO L476 AbstractCegarLoop]: Interpolant automaton has 13 states. [2019-10-02 10:28:34,601 INFO L276 IsEmpty]: Start isEmpty. Operand 2792 states and 3724 transitions. [2019-10-02 10:28:34,615 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 360 [2019-10-02 10:28:34,615 INFO L403 BasicCegarLoop]: Found error trace [2019-10-02 10:28:34,616 INFO L411 BasicCegarLoop]: trace histogram [21, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-02 10:28:34,616 INFO L418 AbstractCegarLoop]: === Iteration 16 === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-02 10:28:34,616 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-02 10:28:34,616 INFO L82 PathProgramCache]: Analyzing trace with hash 1155206370, now seen corresponding path program 3 times [2019-10-02 10:28:34,617 INFO L224 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-10-02 10:28:34,617 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-10-02 10:28:34,625 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-02 10:28:34,625 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2019-10-02 10:28:34,625 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-02 10:28:35,044 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-02 10:28:35,321 INFO L134 CoverageAnalysis]: Checked inductivity of 724 backedges. 0 proven. 138 refuted. 0 times theorem prover too weak. 586 trivial. 0 not checked. [2019-10-02 10:28:35,321 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2019-10-02 10:28:35,321 INFO L224 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2019-10-02 10:28:35,661 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2019-10-02 10:29:12,362 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 5 check-sat command(s) [2019-10-02 10:29:12,363 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-10-02 10:29:12,391 INFO L256 TraceCheckSpWp]: Trace formula consists of 2241 conjuncts, 18 conjunts are in the unsatisfiable core [2019-10-02 10:29:12,400 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2019-10-02 10:29:12,643 INFO L134 CoverageAnalysis]: Checked inductivity of 724 backedges. 212 proven. 6 refuted. 0 times theorem prover too weak. 506 trivial. 0 not checked. [2019-10-02 10:29:12,664 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-10-02 10:29:12,664 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9] total 15 [2019-10-02 10:29:12,665 INFO L454 AbstractCegarLoop]: Interpolant automaton has 15 states [2019-10-02 10:29:12,665 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2019-10-02 10:29:12,666 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=34, Invalid=176, Unknown=0, NotChecked=0, Total=210 [2019-10-02 10:29:12,666 INFO L87 Difference]: Start difference. First operand 2792 states and 3724 transitions. Second operand 15 states. [2019-10-02 10:29:13,125 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-02 10:29:13,125 INFO L93 Difference]: Finished difference Result 5565 states and 7431 transitions. [2019-10-02 10:29:13,126 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2019-10-02 10:29:13,126 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 359 [2019-10-02 10:29:13,126 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-02 10:29:13,153 INFO L225 Difference]: With dead ends: 5565 [2019-10-02 10:29:13,153 INFO L226 Difference]: Without dead ends: 2793 [2019-10-02 10:29:13,161 INFO L640 BasicCegarLoop]: 0 DeclaredPredicates, 372 GetRequests, 354 SyntacticMatches, 0 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 26 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=63, Invalid=317, Unknown=0, NotChecked=0, Total=380 [2019-10-02 10:29:13,169 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2793 states. [2019-10-02 10:29:13,263 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2793 to 2793. [2019-10-02 10:29:13,263 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2793 states. [2019-10-02 10:29:13,270 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2793 states to 2793 states and 3725 transitions. [2019-10-02 10:29:13,272 INFO L78 Accepts]: Start accepts. Automaton has 2793 states and 3725 transitions. Word has length 359 [2019-10-02 10:29:13,273 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-02 10:29:13,273 INFO L475 AbstractCegarLoop]: Abstraction has 2793 states and 3725 transitions. [2019-10-02 10:29:13,273 INFO L476 AbstractCegarLoop]: Interpolant automaton has 15 states. [2019-10-02 10:29:13,273 INFO L276 IsEmpty]: Start isEmpty. Operand 2793 states and 3725 transitions. [2019-10-02 10:29:13,289 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 367 [2019-10-02 10:29:13,290 INFO L403 BasicCegarLoop]: Found error trace [2019-10-02 10:29:13,290 INFO L411 BasicCegarLoop]: trace histogram [28, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-02 10:29:13,290 INFO L418 AbstractCegarLoop]: === Iteration 17 === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-02 10:29:13,291 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-02 10:29:13,291 INFO L82 PathProgramCache]: Analyzing trace with hash 1624921042, now seen corresponding path program 4 times [2019-10-02 10:29:13,291 INFO L224 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-10-02 10:29:13,291 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-10-02 10:29:13,299 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-02 10:29:13,299 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2019-10-02 10:29:13,299 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-02 10:29:13,754 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-02 10:29:14,136 INFO L134 CoverageAnalysis]: Checked inductivity of 941 backedges. 62 proven. 134 refuted. 0 times theorem prover too weak. 745 trivial. 0 not checked. [2019-10-02 10:29:14,136 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2019-10-02 10:29:14,137 INFO L224 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2019-10-02 10:29:14,451 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2019-10-02 10:29:17,676 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2019-10-02 10:29:17,676 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-10-02 10:29:17,692 INFO L256 TraceCheckSpWp]: Trace formula consists of 2741 conjuncts, 14 conjunts are in the unsatisfiable core [2019-10-02 10:29:17,703 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2019-10-02 10:29:18,081 INFO L134 CoverageAnalysis]: Checked inductivity of 941 backedges. 538 proven. 10 refuted. 0 times theorem prover too weak. 393 trivial. 0 not checked. [2019-10-02 10:29:18,117 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-10-02 10:29:18,117 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10] total 17 [2019-10-02 10:29:18,119 INFO L454 AbstractCegarLoop]: Interpolant automaton has 17 states [2019-10-02 10:29:18,119 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2019-10-02 10:29:18,119 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=40, Invalid=232, Unknown=0, NotChecked=0, Total=272 [2019-10-02 10:29:18,120 INFO L87 Difference]: Start difference. First operand 2793 states and 3725 transitions. Second operand 17 states. [2019-10-02 10:29:19,079 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-02 10:29:19,080 INFO L93 Difference]: Finished difference Result 5566 states and 7426 transitions. [2019-10-02 10:29:19,080 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2019-10-02 10:29:19,080 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 366 [2019-10-02 10:29:19,081 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-02 10:29:19,095 INFO L225 Difference]: With dead ends: 5566 [2019-10-02 10:29:19,095 INFO L226 Difference]: Without dead ends: 2802 [2019-10-02 10:29:19,108 INFO L640 BasicCegarLoop]: 0 DeclaredPredicates, 386 GetRequests, 361 SyntacticMatches, 0 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 66 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=107, Invalid=595, Unknown=0, NotChecked=0, Total=702 [2019-10-02 10:29:19,112 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2802 states. [2019-10-02 10:29:19,218 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2802 to 2802. [2019-10-02 10:29:19,219 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2802 states. [2019-10-02 10:29:19,229 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2802 states to 2802 states and 3735 transitions. [2019-10-02 10:29:19,230 INFO L78 Accepts]: Start accepts. Automaton has 2802 states and 3735 transitions. Word has length 366 [2019-10-02 10:29:19,230 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-02 10:29:19,231 INFO L475 AbstractCegarLoop]: Abstraction has 2802 states and 3735 transitions. [2019-10-02 10:29:19,231 INFO L476 AbstractCegarLoop]: Interpolant automaton has 17 states. [2019-10-02 10:29:19,231 INFO L276 IsEmpty]: Start isEmpty. Operand 2802 states and 3735 transitions. [2019-10-02 10:29:19,242 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 369 [2019-10-02 10:29:19,243 INFO L403 BasicCegarLoop]: Found error trace [2019-10-02 10:29:19,243 INFO L411 BasicCegarLoop]: trace histogram [30, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-02 10:29:19,243 INFO L418 AbstractCegarLoop]: === Iteration 18 === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-02 10:29:19,244 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-02 10:29:19,244 INFO L82 PathProgramCache]: Analyzing trace with hash -641405810, now seen corresponding path program 5 times [2019-10-02 10:29:19,244 INFO L224 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-10-02 10:29:19,244 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-10-02 10:29:19,252 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-02 10:29:19,253 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2019-10-02 10:29:19,253 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-02 10:29:19,655 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-02 10:29:19,993 INFO L134 CoverageAnalysis]: Checked inductivity of 1012 backedges. 72 proven. 165 refuted. 0 times theorem prover too weak. 775 trivial. 0 not checked. [2019-10-02 10:29:19,993 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2019-10-02 10:29:19,993 INFO L224 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2019-10-02 10:29:20,289 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2019-10-02 10:29:20,612 INFO L249 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 4 check-sat command(s) [2019-10-02 10:29:20,613 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-10-02 10:29:20,616 INFO L256 TraceCheckSpWp]: Trace formula consists of 178 conjuncts, 20 conjunts are in the unsatisfiable core [2019-10-02 10:29:20,624 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2019-10-02 10:29:20,872 INFO L134 CoverageAnalysis]: Checked inductivity of 1012 backedges. 584 proven. 15 refuted. 0 times theorem prover too weak. 413 trivial. 0 not checked. [2019-10-02 10:29:20,887 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-10-02 10:29:20,887 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11] total 15 [2019-10-02 10:29:20,888 INFO L454 AbstractCegarLoop]: Interpolant automaton has 15 states [2019-10-02 10:29:20,889 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2019-10-02 10:29:20,889 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=31, Invalid=179, Unknown=0, NotChecked=0, Total=210 [2019-10-02 10:29:20,889 INFO L87 Difference]: Start difference. First operand 2802 states and 3735 transitions. Second operand 15 states. [2019-10-02 10:29:21,424 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-02 10:29:21,424 INFO L93 Difference]: Finished difference Result 5591 states and 7460 transitions. [2019-10-02 10:29:21,425 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-10-02 10:29:21,425 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 368 [2019-10-02 10:29:21,425 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-02 10:29:21,436 INFO L225 Difference]: With dead ends: 5591 [2019-10-02 10:29:21,436 INFO L226 Difference]: Without dead ends: 2807 [2019-10-02 10:29:21,442 INFO L640 BasicCegarLoop]: 0 DeclaredPredicates, 381 GetRequests, 363 SyntacticMatches, 2 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 20 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=47, Invalid=259, Unknown=0, NotChecked=0, Total=306 [2019-10-02 10:29:21,446 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2807 states. [2019-10-02 10:29:21,542 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2807 to 2805. [2019-10-02 10:29:21,542 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2805 states. [2019-10-02 10:29:21,555 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2805 states to 2805 states and 3739 transitions. [2019-10-02 10:29:21,556 INFO L78 Accepts]: Start accepts. Automaton has 2805 states and 3739 transitions. Word has length 368 [2019-10-02 10:29:21,556 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-02 10:29:21,556 INFO L475 AbstractCegarLoop]: Abstraction has 2805 states and 3739 transitions. [2019-10-02 10:29:21,557 INFO L476 AbstractCegarLoop]: Interpolant automaton has 15 states. [2019-10-02 10:29:21,557 INFO L276 IsEmpty]: Start isEmpty. Operand 2805 states and 3739 transitions. [2019-10-02 10:29:21,571 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 371 [2019-10-02 10:29:21,572 INFO L403 BasicCegarLoop]: Found error trace [2019-10-02 10:29:21,572 INFO L411 BasicCegarLoop]: trace histogram [32, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-02 10:29:21,573 INFO L418 AbstractCegarLoop]: === Iteration 19 === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-02 10:29:21,573 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-02 10:29:21,573 INFO L82 PathProgramCache]: Analyzing trace with hash 1853276242, now seen corresponding path program 6 times [2019-10-02 10:29:21,573 INFO L224 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-10-02 10:29:21,573 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-10-02 10:29:21,580 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-02 10:29:21,580 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2019-10-02 10:29:21,581 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-02 10:29:21,997 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-02 10:29:22,473 INFO L134 CoverageAnalysis]: Checked inductivity of 1087 backedges. 82 proven. 199 refuted. 0 times theorem prover too weak. 806 trivial. 0 not checked. [2019-10-02 10:29:22,473 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2019-10-02 10:29:22,474 INFO L224 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2019-10-02 10:29:22,817 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2019-10-02 10:30:24,185 INFO L249 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 8 check-sat command(s) [2019-10-02 10:30:24,186 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-10-02 10:30:24,219 INFO L256 TraceCheckSpWp]: Trace formula consists of 2269 conjuncts, 22 conjunts are in the unsatisfiable core [2019-10-02 10:30:24,227 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2019-10-02 10:30:24,415 INFO L134 CoverageAnalysis]: Checked inductivity of 1087 backedges. 632 proven. 21 refuted. 0 times theorem prover too weak. 434 trivial. 0 not checked. [2019-10-02 10:30:24,436 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-10-02 10:30:24,436 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12] total 16 [2019-10-02 10:30:24,437 INFO L454 AbstractCegarLoop]: Interpolant automaton has 16 states [2019-10-02 10:30:24,437 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2019-10-02 10:30:24,438 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=33, Invalid=207, Unknown=0, NotChecked=0, Total=240 [2019-10-02 10:30:24,438 INFO L87 Difference]: Start difference. First operand 2805 states and 3739 transitions. Second operand 16 states. [2019-10-02 10:30:24,981 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-02 10:30:24,981 INFO L93 Difference]: Finished difference Result 5596 states and 7466 transitions. [2019-10-02 10:30:24,982 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2019-10-02 10:30:24,982 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 370 [2019-10-02 10:30:24,982 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-02 10:30:24,992 INFO L225 Difference]: With dead ends: 5596 [2019-10-02 10:30:24,992 INFO L226 Difference]: Without dead ends: 2809 [2019-10-02 10:30:24,998 INFO L640 BasicCegarLoop]: 0 DeclaredPredicates, 384 GetRequests, 365 SyntacticMatches, 2 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 20 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=49, Invalid=293, Unknown=0, NotChecked=0, Total=342 [2019-10-02 10:30:25,002 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2809 states. [2019-10-02 10:30:25,093 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2809 to 2807. [2019-10-02 10:30:25,093 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2807 states. [2019-10-02 10:30:25,100 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2807 states to 2807 states and 3741 transitions. [2019-10-02 10:30:25,101 INFO L78 Accepts]: Start accepts. Automaton has 2807 states and 3741 transitions. Word has length 370 [2019-10-02 10:30:25,102 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-02 10:30:25,102 INFO L475 AbstractCegarLoop]: Abstraction has 2807 states and 3741 transitions. [2019-10-02 10:30:25,102 INFO L476 AbstractCegarLoop]: Interpolant automaton has 16 states. [2019-10-02 10:30:25,102 INFO L276 IsEmpty]: Start isEmpty. Operand 2807 states and 3741 transitions. [2019-10-02 10:30:25,111 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 373 [2019-10-02 10:30:25,111 INFO L403 BasicCegarLoop]: Found error trace [2019-10-02 10:30:25,111 INFO L411 BasicCegarLoop]: trace histogram [34, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-02 10:30:25,112 INFO L418 AbstractCegarLoop]: === Iteration 20 === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-02 10:30:25,112 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-02 10:30:25,112 INFO L82 PathProgramCache]: Analyzing trace with hash 1934064142, now seen corresponding path program 7 times [2019-10-02 10:30:25,112 INFO L224 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-10-02 10:30:25,112 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-10-02 10:30:25,119 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-02 10:30:25,119 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2019-10-02 10:30:25,120 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-02 10:30:25,551 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-02 10:30:25,970 INFO L134 CoverageAnalysis]: Checked inductivity of 1166 backedges. 92 proven. 236 refuted. 0 times theorem prover too weak. 838 trivial. 0 not checked. [2019-10-02 10:30:25,970 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2019-10-02 10:30:25,970 INFO L224 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2019-10-02 10:30:26,402 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-02 10:30:27,899 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-02 10:30:27,912 INFO L256 TraceCheckSpWp]: Trace formula consists of 2777 conjuncts, 34 conjunts are in the unsatisfiable core [2019-10-02 10:30:27,920 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2019-10-02 10:30:28,148 INFO L319 QuantifierPusher]: Applying distributivity, recursing on 2 terms [2019-10-02 10:30:28,239 INFO L134 CoverageAnalysis]: Checked inductivity of 1166 backedges. 682 proven. 28 refuted. 0 times theorem prover too weak. 456 trivial. 0 not checked. [2019-10-02 10:30:28,248 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-10-02 10:30:28,249 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13] total 24 [2019-10-02 10:30:28,250 INFO L454 AbstractCegarLoop]: Interpolant automaton has 24 states [2019-10-02 10:30:28,250 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2019-10-02 10:30:28,251 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=112, Invalid=440, Unknown=0, NotChecked=0, Total=552 [2019-10-02 10:30:28,251 INFO L87 Difference]: Start difference. First operand 2807 states and 3741 transitions. Second operand 24 states. [2019-10-02 10:30:28,855 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-02 10:30:28,855 INFO L93 Difference]: Finished difference Result 5590 states and 7453 transitions. [2019-10-02 10:30:28,856 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2019-10-02 10:30:28,856 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 372 [2019-10-02 10:30:28,856 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-02 10:30:28,866 INFO L225 Difference]: With dead ends: 5590 [2019-10-02 10:30:28,866 INFO L226 Difference]: Without dead ends: 2810 [2019-10-02 10:30:28,872 INFO L640 BasicCegarLoop]: 0 DeclaredPredicates, 393 GetRequests, 362 SyntacticMatches, 0 SemanticMatches, 31 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 79 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=187, Invalid=869, Unknown=0, NotChecked=0, Total=1056 [2019-10-02 10:30:28,875 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2810 states. [2019-10-02 10:30:28,963 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2810 to 2808. [2019-10-02 10:30:28,964 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2808 states. [2019-10-02 10:30:28,975 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2808 states to 2808 states and 3742 transitions. [2019-10-02 10:30:28,976 INFO L78 Accepts]: Start accepts. Automaton has 2808 states and 3742 transitions. Word has length 372 [2019-10-02 10:30:28,977 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-02 10:30:28,977 INFO L475 AbstractCegarLoop]: Abstraction has 2808 states and 3742 transitions. [2019-10-02 10:30:28,977 INFO L476 AbstractCegarLoop]: Interpolant automaton has 24 states. [2019-10-02 10:30:28,977 INFO L276 IsEmpty]: Start isEmpty. Operand 2808 states and 3742 transitions. [2019-10-02 10:30:28,988 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 375 [2019-10-02 10:30:28,988 INFO L403 BasicCegarLoop]: Found error trace [2019-10-02 10:30:28,989 INFO L411 BasicCegarLoop]: trace histogram [36, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-02 10:30:28,989 INFO L418 AbstractCegarLoop]: === Iteration 21 === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-02 10:30:28,989 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-02 10:30:28,990 INFO L82 PathProgramCache]: Analyzing trace with hash 1512361170, now seen corresponding path program 8 times [2019-10-02 10:30:28,990 INFO L224 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-10-02 10:30:28,990 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-10-02 10:30:28,996 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-02 10:30:28,996 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-02 10:30:28,997 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-02 10:30:30,975 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-10-02 10:30:32,661 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-10-02 10:30:33,551 INFO L478 BasicCegarLoop]: Counterexample might be feasible [2019-10-02 10:30:33,638 WARN L417 cessorBacktranslator]: Generated EnsuresSpecification free ensures #res.base == #ptr.base && #res.offset == #ptr.offset; is not ensure(true) [2019-10-02 10:30:33,644 WARN L417 cessorBacktranslator]: Generated EnsuresSpecification free ensures #res.base == #ptr.base && #res.offset == #ptr.offset; is not ensure(true) [2019-10-02 10:30:33,649 WARN L417 cessorBacktranslator]: Generated EnsuresSpecification free ensures #res.base == #ptr.base && #res.offset == #ptr.offset; is not ensure(true) [2019-10-02 10:30:33,653 WARN L417 cessorBacktranslator]: Generated EnsuresSpecification free ensures #res.base == #ptr.base && #res.offset == #ptr.offset; is not ensure(true) [2019-10-02 10:30:33,659 WARN L417 cessorBacktranslator]: Generated EnsuresSpecification free ensures #res.base == #ptr.base && #res.offset == #ptr.offset; is not ensure(true) [2019-10-02 10:30:33,664 WARN L417 cessorBacktranslator]: Generated EnsuresSpecification free ensures #res.base == #ptr.base && #res.offset == #ptr.offset; is not ensure(true) [2019-10-02 10:30:33,669 WARN L417 cessorBacktranslator]: Generated EnsuresSpecification free ensures #res.base == #ptr.base && #res.offset == #ptr.offset; is not ensure(true) [2019-10-02 10:30:33,751 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: IntegerLiteral 4294967331 could not be translated for associated CType STRUCT~~tty_ldisc_ops?magic~INT?name~*CHAR?num~INT?flags~INT?open~*((*tty_struct ) : INT)?close~*((*tty_struct ) : VOID)?flush_buffer~*((*tty_struct ) : VOID)?chars_in_buffer~*((*tty_struct ) : UINT)?read~*((*tty_struct *file *UCHAR UINT ) : UINT)?write~*((*tty_struct *file *UCHAR UINT ) : UINT)?ioctl~*((*tty_struct *file UINT ULONG ) : INT)?compat_ioctl~*((*tty_struct *file UINT ULONG ) : LONG)?set_termios~*((*tty_struct *ktermios ) : VOID)?poll~*((*tty_struct *file *poll_table_struct ) : UINT)?hangup~*((*tty_struct ) : INT)?receive_buf~*((*tty_struct *UCHAR *CHAR INT ) : VOID)?write_wakeup~*((*tty_struct ) : VOID)?dcd_change~*((*tty_struct UINT *pps_event_time ) : VOID)?owner~*module?refcount~INT# [2019-10-02 10:30:33,752 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: IntegerLiteral 4294967335 could not be translated for associated CType STRUCT~~net_device_ops?ndo_init~*((*net_device ) : INT)?ndo_uninit~*((*net_device ) : VOID)?ndo_open~*((*net_device ) : INT)?ndo_stop~*((*net_device ) : INT)?ndo_start_xmit~*((*sk_buff *net_device ) : ~netdev_tx_t~0)?ndo_select_queue~*((*net_device *sk_buff ) : ~u16~0)?ndo_change_rx_flags~*((*net_device INT ) : VOID)?ndo_set_rx_mode~*((*net_device ) : VOID)?ndo_set_multicast_list~*((*net_device ) : VOID)?ndo_set_mac_address~*((*net_device *VOID ) : INT)?ndo_validate_addr~*((*net_device ) : INT)?ndo_do_ioctl~*((*net_device *ifreq INT ) : INT)?ndo_set_config~*((*net_device *ifmap ) : INT)?ndo_change_mtu~*((*net_device INT ) : INT)?ndo_neigh_setup~*((*net_device *neigh_parms ) : INT)?ndo_tx_timeout~*((*net_device ) : VOID)?ndo_get_stats64~*((*net_device *rtnl_link_stats64 ) : *rtnl_link_stats64)?ndo_get_stats~*((*net_device ) : *net_device_stats)?ndo_vlan_rx_register~*((*net_device *vlan_group ) : VOID)?ndo_vlan_rx_add_vid~*((*net_device USHORT ) : VOID)?ndo_vlan_rx_kill_vid~*((*net_device USHORT ) : VOID)?ndo_poll_controller~*((*net_device ) : VOID)?ndo_netpoll_setup~*((*net_device *netpoll_info ) : INT)?ndo_netpoll_cleanup~*((*net_device ) : VOID)?ndo_set_vf_mac~*((*net_device INT *~u8~0 ) : INT)?ndo_set_vf_vlan~*((*net_device INT ~u16~0 ~u8~0 ) : INT)?ndo_set_vf_tx_rate~*((*net_device INT INT ) : INT)?ndo_get_vf_config~*((*net_device INT *ifla_vf_info ) : INT)?ndo_set_vf_port~*((*net_device INT **nlattr ) : INT)?ndo_get_vf_port~*((*net_device INT *sk_buff ) : INT)?ndo_fcoe_enable~*((*net_device ) : INT)?ndo_fcoe_disable~*((*net_device ) : INT)?ndo_fcoe_ddp_setup~*((*net_device ~u16~0 *scatterlist UINT ) : INT)?ndo_fcoe_ddp_done~*((*net_device ~u16~0 ) : INT)?ndo_fcoe_get_wwn~*((*net_device *~u64~0 INT ) : INT)# [2019-10-02 10:30:33,753 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: IntegerLiteral 4294967326 could not be translated for associated CType STRUCT~~net_device_ops?ndo_init~*((*net_device ) : INT)?ndo_uninit~*((*net_device ) : VOID)?ndo_open~*((*net_device ) : INT)?ndo_stop~*((*net_device ) : INT)?ndo_start_xmit~*((*sk_buff *net_device ) : ~netdev_tx_t~0)?ndo_select_queue~*((*net_device *sk_buff ) : ~u16~0)?ndo_change_rx_flags~*((*net_device INT ) : VOID)?ndo_set_rx_mode~*((*net_device ) : VOID)?ndo_set_multicast_list~*((*net_device ) : VOID)?ndo_set_mac_address~*((*net_device *VOID ) : INT)?ndo_validate_addr~*((*net_device ) : INT)?ndo_do_ioctl~*((*net_device *ifreq INT ) : INT)?ndo_set_config~*((*net_device *ifmap ) : INT)?ndo_change_mtu~*((*net_device INT ) : INT)?ndo_neigh_setup~*((*net_device *neigh_parms ) : INT)?ndo_tx_timeout~*((*net_device ) : VOID)?ndo_get_stats64~*((*net_device *rtnl_link_stats64 ) : *rtnl_link_stats64)?ndo_get_stats~*((*net_device ) : *net_device_stats)?ndo_vlan_rx_register~*((*net_device *vlan_group ) : VOID)?ndo_vlan_rx_add_vid~*((*net_device USHORT ) : VOID)?ndo_vlan_rx_kill_vid~*((*net_device USHORT ) : VOID)?ndo_poll_controller~*((*net_device ) : VOID)?ndo_netpoll_setup~*((*net_device *netpoll_info ) : INT)?ndo_netpoll_cleanup~*((*net_device ) : VOID)?ndo_set_vf_mac~*((*net_device INT *~u8~0 ) : INT)?ndo_set_vf_vlan~*((*net_device INT ~u16~0 ~u8~0 ) : INT)?ndo_set_vf_tx_rate~*((*net_device INT INT ) : INT)?ndo_get_vf_config~*((*net_device INT *ifla_vf_info ) : INT)?ndo_set_vf_port~*((*net_device INT **nlattr ) : INT)?ndo_get_vf_port~*((*net_device INT *sk_buff ) : INT)?ndo_fcoe_enable~*((*net_device ) : INT)?ndo_fcoe_disable~*((*net_device ) : INT)?ndo_fcoe_ddp_setup~*((*net_device ~u16~0 *scatterlist UINT ) : INT)?ndo_fcoe_ddp_done~*((*net_device ~u16~0 ) : INT)?ndo_fcoe_get_wwn~*((*net_device *~u64~0 INT ) : INT)# [2019-10-02 10:30:33,754 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: IntegerLiteral 4294967383 could not be translated for associated CType STRUCT~~tty_ldisc_ops?magic~INT?name~*CHAR?num~INT?flags~INT?open~*((*tty_struct ) : INT)?close~*((*tty_struct ) : VOID)?flush_buffer~*((*tty_struct ) : VOID)?chars_in_buffer~*((*tty_struct ) : UINT)?read~*((*tty_struct *file *UCHAR UINT ) : UINT)?write~*((*tty_struct *file *UCHAR UINT ) : UINT)?ioctl~*((*tty_struct *file UINT ULONG ) : INT)?compat_ioctl~*((*tty_struct *file UINT ULONG ) : LONG)?set_termios~*((*tty_struct *ktermios ) : VOID)?poll~*((*tty_struct *file *poll_table_struct ) : UINT)?hangup~*((*tty_struct ) : INT)?receive_buf~*((*tty_struct *UCHAR *CHAR INT ) : VOID)?write_wakeup~*((*tty_struct ) : VOID)?dcd_change~*((*tty_struct UINT *pps_event_time ) : VOID)?owner~*module?refcount~INT# [2019-10-02 10:30:33,878 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: Expression #t~switch540 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement [2019-10-02 10:30:33,881 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: Expression #t~switch540 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement [2019-10-02 10:30:33,881 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: Expression #t~switch561 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement [2019-10-02 10:30:33,884 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: Expression #t~switch540 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement [2019-10-02 10:30:33,884 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: Expression #t~switch561 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement [2019-10-02 10:30:33,909 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: Expression #t~switch540 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement [2019-10-02 10:30:33,909 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: Expression #t~switch561 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement [2019-10-02 10:30:33,911 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: Expression #t~switch540 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement [2019-10-02 10:30:33,912 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: Expression #t~switch561 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement [2019-10-02 10:30:33,913 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: Expression #t~switch540 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement [2019-10-02 10:30:33,914 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: Expression #t~switch561 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement [2019-10-02 10:30:33,922 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: Expression #t~switch540 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement [2019-10-02 10:30:33,923 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: Expression #t~switch561 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement [2019-10-02 10:30:33,925 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: Expression #t~switch540 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement [2019-10-02 10:30:33,925 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: Expression #t~switch561 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement [2019-10-02 10:30:33,934 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: Expression #t~switch540 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement [2019-10-02 10:30:33,934 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: Expression #t~switch561 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement [2019-10-02 10:30:33,936 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: Expression #t~switch540 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement [2019-10-02 10:30:33,936 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: Expression #t~switch561 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement [2019-10-02 10:30:33,938 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: Expression #t~switch540 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement [2019-10-02 10:30:33,938 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: Expression #t~switch564 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement [2019-10-02 10:30:33,938 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: Expression #t~switch561 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement [2019-10-02 10:30:33,940 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: Expression #t~switch540 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement [2019-10-02 10:30:33,940 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: Expression #t~switch564 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement [2019-10-02 10:30:33,941 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: Expression #t~switch561 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement [2019-10-02 10:30:33,992 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: Expression #t~switch23 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement [2019-10-02 10:30:33,993 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: Expression #t~switch23 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement [2019-10-02 10:30:34,057 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 02.10 10:30:34 BoogieIcfgContainer [2019-10-02 10:30:34,057 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-10-02 10:30:34,060 INFO L168 Benchmark]: Toolchain (without parser) took 163501.19 ms. Allocated memory was 133.2 MB in the beginning and 1.4 GB in the end (delta: 1.3 GB). Free memory was 77.4 MB in the beginning and 387.4 MB in the end (delta: -310.0 MB). Peak memory consumption was 1.2 GB. Max. memory is 7.1 GB. [2019-10-02 10:30:34,061 INFO L168 Benchmark]: CDTParser took 0.21 ms. Allocated memory is still 133.2 MB. Free memory was 106.0 MB in the beginning and 105.8 MB in the end (delta: 209.8 kB). Peak memory consumption was 209.8 kB. Max. memory is 7.1 GB. [2019-10-02 10:30:34,062 INFO L168 Benchmark]: CACSL2BoogieTranslator took 2601.90 ms. Allocated memory was 133.2 MB in the beginning and 264.2 MB in the end (delta: 131.1 MB). Free memory was 77.2 MB in the beginning and 172.4 MB in the end (delta: -95.2 MB). Peak memory consumption was 111.2 MB. Max. memory is 7.1 GB. [2019-10-02 10:30:34,062 INFO L168 Benchmark]: Boogie Preprocessor took 356.30 ms. Allocated memory is still 264.2 MB. Free memory was 172.4 MB in the beginning and 153.4 MB in the end (delta: 19.0 MB). Peak memory consumption was 19.0 MB. Max. memory is 7.1 GB. [2019-10-02 10:30:34,063 INFO L168 Benchmark]: RCFGBuilder took 5266.80 ms. Allocated memory was 264.2 MB in the beginning and 360.2 MB in the end (delta: 95.9 MB). Free memory was 153.4 MB in the beginning and 88.8 MB in the end (delta: 64.5 MB). Peak memory consumption was 160.5 MB. Max. memory is 7.1 GB. [2019-10-02 10:30:34,064 INFO L168 Benchmark]: TraceAbstraction took 155271.31 ms. Allocated memory was 360.2 MB in the beginning and 1.4 GB in the end (delta: 1.1 GB). Free memory was 88.8 MB in the beginning and 387.4 MB in the end (delta: -298.6 MB). Peak memory consumption was 976.5 MB. Max. memory is 7.1 GB. [2019-10-02 10:30:34,067 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.21 ms. Allocated memory is still 133.2 MB. Free memory was 106.0 MB in the beginning and 105.8 MB in the end (delta: 209.8 kB). Peak memory consumption was 209.8 kB. Max. memory is 7.1 GB. * CACSL2BoogieTranslator took 2601.90 ms. Allocated memory was 133.2 MB in the beginning and 264.2 MB in the end (delta: 131.1 MB). Free memory was 77.2 MB in the beginning and 172.4 MB in the end (delta: -95.2 MB). Peak memory consumption was 111.2 MB. Max. memory is 7.1 GB. * Boogie Preprocessor took 356.30 ms. Allocated memory is still 264.2 MB. Free memory was 172.4 MB in the beginning and 153.4 MB in the end (delta: 19.0 MB). Peak memory consumption was 19.0 MB. Max. memory is 7.1 GB. * RCFGBuilder took 5266.80 ms. Allocated memory was 264.2 MB in the beginning and 360.2 MB in the end (delta: 95.9 MB). Free memory was 153.4 MB in the beginning and 88.8 MB in the end (delta: 64.5 MB). Peak memory consumption was 160.5 MB. Max. memory is 7.1 GB. * TraceAbstraction took 155271.31 ms. Allocated memory was 360.2 MB in the beginning and 1.4 GB in the end (delta: 1.1 GB). Free memory was 88.8 MB in the beginning and 387.4 MB in the end (delta: -298.6 MB). Peak memory consumption was 976.5 MB. Max. memory is 7.1 GB. * Results from de.uni_freiburg.informatik.ultimate.boogie.preprocessor: - GenericResult: Unfinished Backtranslation Generated EnsuresSpecification free ensures #res.base == #ptr.base && #res.offset == #ptr.offset; is not ensure(true) - GenericResult: Unfinished Backtranslation Generated EnsuresSpecification free ensures #res.base == #ptr.base && #res.offset == #ptr.offset; is not ensure(true) - GenericResult: Unfinished Backtranslation Generated EnsuresSpecification free ensures #res.base == #ptr.base && #res.offset == #ptr.offset; is not ensure(true) - GenericResult: Unfinished Backtranslation Generated EnsuresSpecification free ensures #res.base == #ptr.base && #res.offset == #ptr.offset; is not ensure(true) - GenericResult: Unfinished Backtranslation Generated EnsuresSpecification free ensures #res.base == #ptr.base && #res.offset == #ptr.offset; is not ensure(true) - GenericResult: Unfinished Backtranslation Generated EnsuresSpecification free ensures #res.base == #ptr.base && #res.offset == #ptr.offset; is not ensure(true) - GenericResult: Unfinished Backtranslation Generated EnsuresSpecification free ensures #res.base == #ptr.base && #res.offset == #ptr.offset; is not ensure(true) * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: IntegerLiteral 4294967331 could not be translated for associated CType STRUCT~~tty_ldisc_ops?magic~INT?name~*CHAR?num~INT?flags~INT?open~*((*tty_struct ) : INT)?close~*((*tty_struct ) : VOID)?flush_buffer~*((*tty_struct ) : VOID)?chars_in_buffer~*((*tty_struct ) : UINT)?read~*((*tty_struct *file *UCHAR UINT ) : UINT)?write~*((*tty_struct *file *UCHAR UINT ) : UINT)?ioctl~*((*tty_struct *file UINT ULONG ) : INT)?compat_ioctl~*((*tty_struct *file UINT ULONG ) : LONG)?set_termios~*((*tty_struct *ktermios ) : VOID)?poll~*((*tty_struct *file *poll_table_struct ) : UINT)?hangup~*((*tty_struct ) : INT)?receive_buf~*((*tty_struct *UCHAR *CHAR INT ) : VOID)?write_wakeup~*((*tty_struct ) : VOID)?dcd_change~*((*tty_struct UINT *pps_event_time ) : VOID)?owner~*module?refcount~INT# - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: IntegerLiteral 4294967335 could not be translated for associated CType STRUCT~~net_device_ops?ndo_init~*((*net_device ) : INT)?ndo_uninit~*((*net_device ) : VOID)?ndo_open~*((*net_device ) : INT)?ndo_stop~*((*net_device ) : INT)?ndo_start_xmit~*((*sk_buff *net_device ) : ~netdev_tx_t~0)?ndo_select_queue~*((*net_device *sk_buff ) : ~u16~0)?ndo_change_rx_flags~*((*net_device INT ) : VOID)?ndo_set_rx_mode~*((*net_device ) : VOID)?ndo_set_multicast_list~*((*net_device ) : VOID)?ndo_set_mac_address~*((*net_device *VOID ) : INT)?ndo_validate_addr~*((*net_device ) : INT)?ndo_do_ioctl~*((*net_device *ifreq INT ) : INT)?ndo_set_config~*((*net_device *ifmap ) : INT)?ndo_change_mtu~*((*net_device INT ) : INT)?ndo_neigh_setup~*((*net_device *neigh_parms ) : INT)?ndo_tx_timeout~*((*net_device ) : VOID)?ndo_get_stats64~*((*net_device *rtnl_link_stats64 ) : *rtnl_link_stats64)?ndo_get_stats~*((*net_device ) : *net_device_stats)?ndo_vlan_rx_register~*((*net_device *vlan_group ) : VOID)?ndo_vlan_rx_add_vid~*((*net_device USHORT ) : VOID)?ndo_vlan_rx_kill_vid~*((*net_device USHORT ) : VOID)?ndo_poll_controller~*((*net_device ) : VOID)?ndo_netpoll_setup~*((*net_device *netpoll_info ) : INT)?ndo_netpoll_cleanup~*((*net_device ) : VOID)?ndo_set_vf_mac~*((*net_device INT *~u8~0 ) : INT)?ndo_set_vf_vlan~*((*net_device INT ~u16~0 ~u8~0 ) : INT)?ndo_set_vf_tx_rate~*((*net_device INT INT ) : INT)?ndo_get_vf_config~*((*net_device INT *ifla_vf_info ) : INT)?ndo_set_vf_port~*((*net_device INT **nlattr ) : INT)?ndo_get_vf_port~*((*net_device INT *sk_buff ) : INT)?ndo_fcoe_enable~*((*net_device ) : INT)?ndo_fcoe_disable~*((*net_device ) : INT)?ndo_fcoe_ddp_setup~*((*net_device ~u16~0 *scatterlist UINT ) : INT)?ndo_fcoe_ddp_done~*((*net_device ~u16~0 ) : INT)?ndo_fcoe_get_wwn~*((*net_device *~u64~0 INT ) : INT)# - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: IntegerLiteral 4294967326 could not be translated for associated CType STRUCT~~net_device_ops?ndo_init~*((*net_device ) : INT)?ndo_uninit~*((*net_device ) : VOID)?ndo_open~*((*net_device ) : INT)?ndo_stop~*((*net_device ) : INT)?ndo_start_xmit~*((*sk_buff *net_device ) : ~netdev_tx_t~0)?ndo_select_queue~*((*net_device *sk_buff ) : ~u16~0)?ndo_change_rx_flags~*((*net_device INT ) : VOID)?ndo_set_rx_mode~*((*net_device ) : VOID)?ndo_set_multicast_list~*((*net_device ) : VOID)?ndo_set_mac_address~*((*net_device *VOID ) : INT)?ndo_validate_addr~*((*net_device ) : INT)?ndo_do_ioctl~*((*net_device *ifreq INT ) : INT)?ndo_set_config~*((*net_device *ifmap ) : INT)?ndo_change_mtu~*((*net_device INT ) : INT)?ndo_neigh_setup~*((*net_device *neigh_parms ) : INT)?ndo_tx_timeout~*((*net_device ) : VOID)?ndo_get_stats64~*((*net_device *rtnl_link_stats64 ) : *rtnl_link_stats64)?ndo_get_stats~*((*net_device ) : *net_device_stats)?ndo_vlan_rx_register~*((*net_device *vlan_group ) : VOID)?ndo_vlan_rx_add_vid~*((*net_device USHORT ) : VOID)?ndo_vlan_rx_kill_vid~*((*net_device USHORT ) : VOID)?ndo_poll_controller~*((*net_device ) : VOID)?ndo_netpoll_setup~*((*net_device *netpoll_info ) : INT)?ndo_netpoll_cleanup~*((*net_device ) : VOID)?ndo_set_vf_mac~*((*net_device INT *~u8~0 ) : INT)?ndo_set_vf_vlan~*((*net_device INT ~u16~0 ~u8~0 ) : INT)?ndo_set_vf_tx_rate~*((*net_device INT INT ) : INT)?ndo_get_vf_config~*((*net_device INT *ifla_vf_info ) : INT)?ndo_set_vf_port~*((*net_device INT **nlattr ) : INT)?ndo_get_vf_port~*((*net_device INT *sk_buff ) : INT)?ndo_fcoe_enable~*((*net_device ) : INT)?ndo_fcoe_disable~*((*net_device ) : INT)?ndo_fcoe_ddp_setup~*((*net_device ~u16~0 *scatterlist UINT ) : INT)?ndo_fcoe_ddp_done~*((*net_device ~u16~0 ) : INT)?ndo_fcoe_get_wwn~*((*net_device *~u64~0 INT ) : INT)# - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: IntegerLiteral 4294967383 could not be translated for associated CType STRUCT~~tty_ldisc_ops?magic~INT?name~*CHAR?num~INT?flags~INT?open~*((*tty_struct ) : INT)?close~*((*tty_struct ) : VOID)?flush_buffer~*((*tty_struct ) : VOID)?chars_in_buffer~*((*tty_struct ) : UINT)?read~*((*tty_struct *file *UCHAR UINT ) : UINT)?write~*((*tty_struct *file *UCHAR UINT ) : UINT)?ioctl~*((*tty_struct *file UINT ULONG ) : INT)?compat_ioctl~*((*tty_struct *file UINT ULONG ) : LONG)?set_termios~*((*tty_struct *ktermios ) : VOID)?poll~*((*tty_struct *file *poll_table_struct ) : UINT)?hangup~*((*tty_struct ) : INT)?receive_buf~*((*tty_struct *UCHAR *CHAR INT ) : VOID)?write_wakeup~*((*tty_struct ) : VOID)?dcd_change~*((*tty_struct UINT *pps_event_time ) : VOID)?owner~*module?refcount~INT# - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Expression #t~switch540 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Expression #t~switch540 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Expression #t~switch561 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Expression #t~switch540 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Expression #t~switch561 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Expression #t~switch540 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Expression #t~switch561 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Expression #t~switch540 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Expression #t~switch561 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Expression #t~switch540 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Expression #t~switch561 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Expression #t~switch540 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Expression #t~switch561 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Expression #t~switch540 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Expression #t~switch561 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Expression #t~switch540 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Expression #t~switch561 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Expression #t~switch540 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Expression #t~switch561 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Expression #t~switch540 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Expression #t~switch564 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Expression #t~switch561 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Expression #t~switch540 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Expression #t~switch564 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Expression #t~switch561 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Expression #t~switch23 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Expression #t~switch23 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - UnprovableResult [Line: 7649]: Unable to prove that call of __VERIFIER_error() unreachable Unable to prove that call of __VERIFIER_error() unreachable Reason: overapproximation of bitwiseOr at line 4936, overapproximation of bitwiseAnd at line 4711. Possible FailurePath: [L4940] int LDV_IN_INTERRUPT = 1; [L4941] int ldv_timer_state_2 = 0; [L4942] int ldv_state_variable_0 ; [L4943] struct tty_struct *sl_ldisc_group1 ; [L4944] int ldv_state_variable_3 ; [L4945] struct timer_list *ldv_timer_list_2 ; [L4946] int ldv_timer_state_1 = 0; [L4947] int ldv_state_variable_2 ; [L4948] int ref_cnt ; [L4949] int ldv_state_variable_1 ; [L4950] struct timer_list *ldv_timer_list_1 ; [L4951] struct net_device *sl_netdev_ops_group1 ; [L4952] int ldv_state_variable_4 ; [L5138] static struct net_device **slip_devs ; [L5139] static int slip_maxdev = 256; [L5954-L5957] static struct net_device_ops const sl_netdev_ops = {& sl_init, & sl_uninit, & sl_open, & sl_close, & sl_xmit, 0, 0, 0, 0, 0, 0, & sl_ioctl, 0, & sl_change_mtu, 0, & sl_tx_timeout, & sl_get_stats64, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}; [L6826-L6829] static struct tty_ldisc_ops sl_ldisc = {21507, (char *)"slip", 0, 0, & slip_open, & slip_close, 0, 0, 0, 0, & slip_ioctl, & slip_compat_ioctl, 0, 0, & slip_hangup, & slip_receive_buf, & slip_write_wakeup, 0, & __this_module, 0}; [L7008] int ldv_retval_0 ; [L7009] int ldv_retval_1 ; [L7012] int ldv_retval_3 ; [L7013] int ldv_retval_2 ; VAL [\old(LDV_IN_INTERRUPT)=4294967309, \old(ldv_retval_0)=4294967353, \old(ldv_retval_1)=4294967301, \old(ldv_retval_2)=4294967361, \old(ldv_retval_3)=4294967310, \old(ldv_state_variable_0)=4294967320, \old(ldv_state_variable_1)=4294967330, \old(ldv_state_variable_2)=4294967376, \old(ldv_state_variable_3)=4294967344, \old(ldv_state_variable_4)=4294967375, \old(ldv_timer_list_1)=4294967334, \old(ldv_timer_list_1)=4294967385, \old(ldv_timer_list_2)=4294967347, \old(ldv_timer_list_2)=4294967337, \old(ldv_timer_state_1)=4294967341, \old(ldv_timer_state_2)=4294967372, \old(ref_cnt)=4294967373, \old(sl_ldisc)=null, \old(sl_ldisc)=null, \old(sl_ldisc_group1)=4294967371, \old(sl_ldisc_group1)=4294967398, \old(sl_netdev_ops)=null, \old(sl_netdev_ops)=null, \old(sl_netdev_ops_group1)=4294967362, \old(sl_netdev_ops_group1)=4294967316, \old(slip_devs)=4294967329, \old(slip_devs)=4294967379, \old(slip_maxdev)=4294967338, __this_module={4294967350:4294967346}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ref_cnt=0, sl_ldisc={-4294967301:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={0:0}, slip_devs={0:0}, slip_maxdev=256] [L7128] struct sk_buff *ldvarg1 ; [L7129] void *tmp ; [L7130] struct ifreq *ldvarg4 ; [L7131] void *tmp___0 ; [L7132] int ldvarg3 ; [L7133] struct rtnl_link_stats64 *ldvarg0 ; [L7134] void *tmp___1 ; [L7135] int ldvarg2 ; [L7136] unsigned long ldvarg11 ; [L7137] struct file *ldvarg7 ; [L7138] void *tmp___2 ; [L7139] unsigned int ldvarg12 ; [L7140] unsigned long ldvarg5 ; [L7141] unsigned int ldvarg6 ; [L7142] int ldvarg8 ; [L7143] struct file *ldvarg13 ; [L7144] void *tmp___3 ; [L7145] unsigned char *ldvarg10 ; [L7146] void *tmp___4 ; [L7147] char *ldvarg9 ; [L7148] void *tmp___5 ; [L7149] int tmp___6 ; [L7150] int tmp___7 ; [L7151] int tmp___8 ; [L7152] int tmp___9 ; VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967350:4294967346}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ldvarg11={-4294967327:0}, ldvarg12={-4294967329:0}, ldvarg2={-4294967324:0}, ldvarg3={-4294967323:0}, ldvarg5={-4294967326:0}, ldvarg6={-4294967328:0}, ldvarg8={-4294967325:0}, ref_cnt=0, sl_ldisc={-4294967301:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={0:0}, slip_devs={0:0}, slip_maxdev=256] [L7154] CALL, EXPR ldv_init_zalloc(240UL) VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(size)=240, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967350:4294967346}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ref_cnt=0, sl_ldisc={-4294967301:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={0:0}, slip_devs={0:0}, slip_maxdev=256] [L4761] void *p ; [L4762] void *tmp ; [L4764] EXPR, FCALL calloc(1UL, size) VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(size)=240, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967350:4294967346}, calloc(1UL, size)={-4294967295:0}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ref_cnt=0, size=240, sl_ldisc={-4294967301:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={0:0}, slip_devs={0:0}, slip_maxdev=256] [L4764] tmp = calloc(1UL, size) [L4765] p = tmp [L4767] return (p); VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(size)=240, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, \result={-4294967295:0}, __this_module={4294967350:4294967346}, calloc(1UL, size)={-4294967295:0}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, p={-4294967295:0}, ref_cnt=0, size=240, sl_ldisc={-4294967301:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={0:0}, slip_devs={0:0}, slip_maxdev=256, tmp={-4294967295:0}] [L7154] RET, EXPR ldv_init_zalloc(240UL) VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967350:4294967346}, LDV_IN_INTERRUPT=1, ldv_init_zalloc(240UL)={-4294967295:0}, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ldvarg11={-4294967327:0}, ldvarg12={-4294967329:0}, ldvarg2={-4294967324:0}, ldvarg3={-4294967323:0}, ldvarg5={-4294967326:0}, ldvarg6={-4294967328:0}, ldvarg8={-4294967325:0}, ref_cnt=0, sl_ldisc={-4294967301:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={0:0}, slip_devs={0:0}, slip_maxdev=256] [L7154] tmp = ldv_init_zalloc(240UL) [L7155] ldvarg1 = (struct sk_buff *)tmp VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967350:4294967346}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ldvarg1={-4294967295:0}, ldvarg11={-4294967327:0}, ldvarg12={-4294967329:0}, ldvarg2={-4294967324:0}, ldvarg3={-4294967323:0}, ldvarg5={-4294967326:0}, ldvarg6={-4294967328:0}, ldvarg8={-4294967325:0}, ref_cnt=0, sl_ldisc={-4294967301:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={0:0}, slip_devs={0:0}, slip_maxdev=256, tmp={-4294967295:0}] [L7156] CALL, EXPR ldv_init_zalloc(40UL) VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(size)=40, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967350:4294967346}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ref_cnt=0, sl_ldisc={-4294967301:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={0:0}, slip_devs={0:0}, slip_maxdev=256] [L4761] void *p ; [L4762] void *tmp ; [L4764] EXPR, FCALL calloc(1UL, size) VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(size)=40, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967350:4294967346}, calloc(1UL, size)={-2:0}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ref_cnt=0, size=40, sl_ldisc={-4294967301:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={0:0}, slip_devs={0:0}, slip_maxdev=256] [L4764] tmp = calloc(1UL, size) [L4765] p = tmp [L4767] return (p); VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(size)=40, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, \result={-2:0}, __this_module={4294967350:4294967346}, calloc(1UL, size)={-2:0}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, p={-2:0}, ref_cnt=0, size=40, sl_ldisc={-4294967301:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={0:0}, slip_devs={0:0}, slip_maxdev=256, tmp={-2:0}] [L7156] RET, EXPR ldv_init_zalloc(40UL) VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967350:4294967346}, LDV_IN_INTERRUPT=1, ldv_init_zalloc(40UL)={-2:0}, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ldvarg1={-4294967295:0}, ldvarg11={-4294967327:0}, ldvarg12={-4294967329:0}, ldvarg2={-4294967324:0}, ldvarg3={-4294967323:0}, ldvarg5={-4294967326:0}, ldvarg6={-4294967328:0}, ldvarg8={-4294967325:0}, ref_cnt=0, sl_ldisc={-4294967301:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={0:0}, slip_devs={0:0}, slip_maxdev=256, tmp={-4294967295:0}] [L7156] tmp___0 = ldv_init_zalloc(40UL) [L7157] ldvarg4 = (struct ifreq *)tmp___0 VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967350:4294967346}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ldvarg1={-4294967295:0}, ldvarg11={-4294967327:0}, ldvarg12={-4294967329:0}, ldvarg2={-4294967324:0}, ldvarg3={-4294967323:0}, ldvarg4={-2:0}, ldvarg5={-4294967326:0}, ldvarg6={-4294967328:0}, ldvarg8={-4294967325:0}, ref_cnt=0, sl_ldisc={-4294967301:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={0:0}, slip_devs={0:0}, slip_maxdev=256, tmp={-4294967295:0}, tmp___0={-2:0}] [L7158] CALL, EXPR ldv_init_zalloc(184UL) VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(size)=184, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967350:4294967346}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ref_cnt=0, sl_ldisc={-4294967301:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={0:0}, slip_devs={0:0}, slip_maxdev=256] [L4761] void *p ; [L4762] void *tmp ; [L4764] EXPR, FCALL calloc(1UL, size) VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(size)=184, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967350:4294967346}, calloc(1UL, size)={-3:0}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ref_cnt=0, size=184, sl_ldisc={-4294967301:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={0:0}, slip_devs={0:0}, slip_maxdev=256] [L4764] tmp = calloc(1UL, size) [L4765] p = tmp [L4767] return (p); VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(size)=184, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, \result={-3:0}, __this_module={4294967350:4294967346}, calloc(1UL, size)={-3:0}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, p={-3:0}, ref_cnt=0, size=184, sl_ldisc={-4294967301:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={0:0}, slip_devs={0:0}, slip_maxdev=256, tmp={-3:0}] [L7158] RET, EXPR ldv_init_zalloc(184UL) VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967350:4294967346}, LDV_IN_INTERRUPT=1, ldv_init_zalloc(184UL)={-3:0}, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ldvarg1={-4294967295:0}, ldvarg11={-4294967327:0}, ldvarg12={-4294967329:0}, ldvarg2={-4294967324:0}, ldvarg3={-4294967323:0}, ldvarg4={-2:0}, ldvarg5={-4294967326:0}, ldvarg6={-4294967328:0}, ldvarg8={-4294967325:0}, ref_cnt=0, sl_ldisc={-4294967301:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={0:0}, slip_devs={0:0}, slip_maxdev=256, tmp={-4294967295:0}, tmp___0={-2:0}] [L7158] tmp___1 = ldv_init_zalloc(184UL) [L7159] ldvarg0 = (struct rtnl_link_stats64 *)tmp___1 [L7160] tmp___2 = __VERIFIER_nondet_pointer() [L7161] ldvarg7 = (struct file *)tmp___2 [L7162] tmp___3 = __VERIFIER_nondet_pointer() [L7163] ldvarg13 = (struct file *)tmp___3 VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967350:4294967346}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ldvarg0={-3:0}, ldvarg1={-4294967295:0}, ldvarg11={-4294967327:0}, ldvarg12={-4294967329:0}, ldvarg13={4294967325:4294967378}, ldvarg2={-4294967324:0}, ldvarg3={-4294967323:0}, ldvarg4={-2:0}, ldvarg5={-4294967326:0}, ldvarg6={-4294967328:0}, ldvarg7={4294967397:4294967359}, ldvarg8={-4294967325:0}, ref_cnt=0, sl_ldisc={-4294967301:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={0:0}, slip_devs={0:0}, slip_maxdev=256, tmp={-4294967295:0}, tmp___0={-2:0}, tmp___1={-3:0}, tmp___2={4294967397:4294967359}, tmp___3={4294967325:4294967378}] [L7164] CALL, EXPR ldv_init_zalloc(1UL) VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(size)=1, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967350:4294967346}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ref_cnt=0, sl_ldisc={-4294967301:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={0:0}, slip_devs={0:0}, slip_maxdev=256] [L4761] void *p ; [L4762] void *tmp ; [L4764] EXPR, FCALL calloc(1UL, size) VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(size)=1, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967350:4294967346}, calloc(1UL, size)={-9:0}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ref_cnt=0, size=1, sl_ldisc={-4294967301:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={0:0}, slip_devs={0:0}, slip_maxdev=256] [L4764] tmp = calloc(1UL, size) [L4765] p = tmp [L4767] return (p); VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(size)=1, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, \result={-9:0}, __this_module={4294967350:4294967346}, calloc(1UL, size)={-9:0}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, p={-9:0}, ref_cnt=0, size=1, sl_ldisc={-4294967301:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={0:0}, slip_devs={0:0}, slip_maxdev=256, tmp={-9:0}] [L7164] RET, EXPR ldv_init_zalloc(1UL) VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967350:4294967346}, LDV_IN_INTERRUPT=1, ldv_init_zalloc(1UL)={-9:0}, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ldvarg0={-3:0}, ldvarg1={-4294967295:0}, ldvarg11={-4294967327:0}, ldvarg12={-4294967329:0}, ldvarg13={4294967325:4294967378}, ldvarg2={-4294967324:0}, ldvarg3={-4294967323:0}, ldvarg4={-2:0}, ldvarg5={-4294967326:0}, ldvarg6={-4294967328:0}, ldvarg7={4294967397:4294967359}, ldvarg8={-4294967325:0}, ref_cnt=0, sl_ldisc={-4294967301:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={0:0}, slip_devs={0:0}, slip_maxdev=256, tmp={-4294967295:0}, tmp___0={-2:0}, tmp___1={-3:0}, tmp___2={4294967397:4294967359}, tmp___3={4294967325:4294967378}] [L7164] tmp___4 = ldv_init_zalloc(1UL) [L7165] ldvarg10 = (unsigned char *)tmp___4 VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967350:4294967346}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ldvarg0={-3:0}, ldvarg1={-4294967295:0}, ldvarg10={-9:0}, ldvarg11={-4294967327:0}, ldvarg12={-4294967329:0}, ldvarg13={4294967325:4294967378}, ldvarg2={-4294967324:0}, ldvarg3={-4294967323:0}, ldvarg4={-2:0}, ldvarg5={-4294967326:0}, ldvarg6={-4294967328:0}, ldvarg7={4294967397:4294967359}, ldvarg8={-4294967325:0}, ref_cnt=0, sl_ldisc={-4294967301:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={0:0}, slip_devs={0:0}, slip_maxdev=256, tmp={-4294967295:0}, tmp___0={-2:0}, tmp___1={-3:0}, tmp___2={4294967397:4294967359}, tmp___3={4294967325:4294967378}, tmp___4={-9:0}] [L7166] CALL, EXPR ldv_init_zalloc(1UL) VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(size)=1, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967350:4294967346}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ref_cnt=0, sl_ldisc={-4294967301:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={0:0}, slip_devs={0:0}, slip_maxdev=256] [L4761] void *p ; [L4762] void *tmp ; [L4764] EXPR, FCALL calloc(1UL, size) VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(size)=1, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967350:4294967346}, calloc(1UL, size)={-5:0}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ref_cnt=0, size=1, sl_ldisc={-4294967301:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={0:0}, slip_devs={0:0}, slip_maxdev=256] [L4764] tmp = calloc(1UL, size) [L4765] p = tmp [L4767] return (p); VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(size)=1, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, \result={-5:0}, __this_module={4294967350:4294967346}, calloc(1UL, size)={-5:0}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, p={-5:0}, ref_cnt=0, size=1, sl_ldisc={-4294967301:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={0:0}, slip_devs={0:0}, slip_maxdev=256, tmp={-5:0}] [L7166] RET, EXPR ldv_init_zalloc(1UL) VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967350:4294967346}, LDV_IN_INTERRUPT=1, ldv_init_zalloc(1UL)={-5:0}, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ldvarg0={-3:0}, ldvarg1={-4294967295:0}, ldvarg10={-9:0}, ldvarg11={-4294967327:0}, ldvarg12={-4294967329:0}, ldvarg13={4294967325:4294967378}, ldvarg2={-4294967324:0}, ldvarg3={-4294967323:0}, ldvarg4={-2:0}, ldvarg5={-4294967326:0}, ldvarg6={-4294967328:0}, ldvarg7={4294967397:4294967359}, ldvarg8={-4294967325:0}, ref_cnt=0, sl_ldisc={-4294967301:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={0:0}, slip_devs={0:0}, slip_maxdev=256, tmp={-4294967295:0}, tmp___0={-2:0}, tmp___1={-3:0}, tmp___2={4294967397:4294967359}, tmp___3={4294967325:4294967378}, tmp___4={-9:0}] [L7166] tmp___5 = ldv_init_zalloc(1UL) [L7167] ldvarg9 = (char *)tmp___5 VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967350:4294967346}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ldvarg0={-3:0}, ldvarg1={-4294967295:0}, ldvarg10={-9:0}, ldvarg11={-4294967327:0}, ldvarg12={-4294967329:0}, ldvarg13={4294967325:4294967378}, ldvarg2={-4294967324:0}, ldvarg3={-4294967323:0}, ldvarg4={-2:0}, ldvarg5={-4294967326:0}, ldvarg6={-4294967328:0}, ldvarg7={4294967397:4294967359}, ldvarg8={-4294967325:0}, ldvarg9={-5:0}, ref_cnt=0, sl_ldisc={-4294967301:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={0:0}, slip_devs={0:0}, slip_maxdev=256, tmp={-4294967295:0}, tmp___0={-2:0}, tmp___1={-3:0}, tmp___2={4294967397:4294967359}, tmp___3={4294967325:4294967378}, tmp___4={-9:0}, tmp___5={-5:0}] [L7168] FCALL ldv_initialize() VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967350:4294967346}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ldvarg0={-3:0}, ldvarg1={-4294967295:0}, ldvarg10={-9:0}, ldvarg11={-4294967327:0}, ldvarg12={-4294967329:0}, ldvarg13={4294967325:4294967378}, ldvarg2={-4294967324:0}, ldvarg3={-4294967323:0}, ldvarg4={-2:0}, ldvarg5={-4294967326:0}, ldvarg6={-4294967328:0}, ldvarg7={4294967397:4294967359}, ldvarg8={-4294967325:0}, ldvarg9={-5:0}, ref_cnt=0, sl_ldisc={-4294967301:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={0:0}, slip_devs={0:0}, slip_maxdev=256, tmp={-4294967295:0}, tmp___0={-2:0}, tmp___1={-3:0}, tmp___2={4294967397:4294967359}, tmp___3={4294967325:4294967378}, tmp___4={-9:0}, tmp___5={-5:0}] [L7169] CALL ldv_memset((void *)(& ldvarg3), 0, 4UL) VAL [\old(c)=0, \old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(n)=4, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967350:4294967346}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ref_cnt=0, s={-4294967323:0}, sl_ldisc={-4294967301:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={0:0}, slip_devs={0:0}, slip_maxdev=256] [L4772] void *tmp ; VAL [\old(c)=0, \old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(n)=4, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967350:4294967346}, c=0, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, n=4, ref_cnt=0, s={-4294967323:0}, s={-4294967323:0}, sl_ldisc={-4294967301:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={0:0}, slip_devs={0:0}, slip_maxdev=256] [L4774] EXPR, FCALL memset(s, c, n) VAL [\old(c)=0, \old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(n)=4, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967350:4294967346}, c=0, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, memset(s, c, n)={-4294967323:0}, n=4, ref_cnt=0, s={-4294967323:0}, s={-4294967323:0}, sl_ldisc={-4294967301:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={0:0}, slip_devs={0:0}, slip_maxdev=256] [L4774] tmp = memset(s, c, n) [L4775] return (tmp); VAL [\old(c)=0, \old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(n)=4, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, \result={-4294967323:0}, __this_module={4294967350:4294967346}, c=0, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, n=4, ref_cnt=0, s={-4294967323:0}, s={-4294967323:0}, sl_ldisc={-4294967301:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={0:0}, slip_devs={0:0}, slip_maxdev=256, tmp={-4294967323:0}] [L7169] RET ldv_memset((void *)(& ldvarg3), 0, 4UL) VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967350:4294967346}, LDV_IN_INTERRUPT=1, ldv_memset((void *)(& ldvarg3), 0, 4UL)={-4294967323:0}, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ldvarg0={-3:0}, ldvarg1={-4294967295:0}, ldvarg10={-9:0}, ldvarg11={-4294967327:0}, ldvarg12={-4294967329:0}, ldvarg13={4294967325:4294967378}, ldvarg2={-4294967324:0}, ldvarg3={-4294967323:0}, ldvarg4={-2:0}, ldvarg5={-4294967326:0}, ldvarg6={-4294967328:0}, ldvarg7={4294967397:4294967359}, ldvarg8={-4294967325:0}, ldvarg9={-5:0}, ref_cnt=0, sl_ldisc={-4294967301:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={0:0}, slip_devs={0:0}, slip_maxdev=256, tmp={-4294967295:0}, tmp___0={-2:0}, tmp___1={-3:0}, tmp___2={4294967397:4294967359}, tmp___3={4294967325:4294967378}, tmp___4={-9:0}, tmp___5={-5:0}] [L7170] CALL ldv_memset((void *)(& ldvarg2), 0, 4UL) VAL [\old(c)=0, \old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(n)=4, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967350:4294967346}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ref_cnt=0, s={-4294967324:0}, sl_ldisc={-4294967301:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={0:0}, slip_devs={0:0}, slip_maxdev=256] [L4772] void *tmp ; VAL [\old(c)=0, \old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(n)=4, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967350:4294967346}, c=0, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, n=4, ref_cnt=0, s={-4294967324:0}, s={-4294967324:0}, sl_ldisc={-4294967301:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={0:0}, slip_devs={0:0}, slip_maxdev=256] [L4774] EXPR, FCALL memset(s, c, n) VAL [\old(c)=0, \old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(n)=4, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967350:4294967346}, c=0, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, memset(s, c, n)={-4294967324:0}, n=4, ref_cnt=0, s={-4294967324:0}, s={-4294967324:0}, sl_ldisc={-4294967301:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={0:0}, slip_devs={0:0}, slip_maxdev=256] [L4774] tmp = memset(s, c, n) [L4775] return (tmp); VAL [\old(c)=0, \old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(n)=4, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, \result={-4294967324:0}, __this_module={4294967350:4294967346}, c=0, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, n=4, ref_cnt=0, s={-4294967324:0}, s={-4294967324:0}, sl_ldisc={-4294967301:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={0:0}, slip_devs={0:0}, slip_maxdev=256, tmp={-4294967324:0}] [L7170] RET ldv_memset((void *)(& ldvarg2), 0, 4UL) VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967350:4294967346}, LDV_IN_INTERRUPT=1, ldv_memset((void *)(& ldvarg2), 0, 4UL)={-4294967324:0}, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ldvarg0={-3:0}, ldvarg1={-4294967295:0}, ldvarg10={-9:0}, ldvarg11={-4294967327:0}, ldvarg12={-4294967329:0}, ldvarg13={4294967325:4294967378}, ldvarg2={-4294967324:0}, ldvarg3={-4294967323:0}, ldvarg4={-2:0}, ldvarg5={-4294967326:0}, ldvarg6={-4294967328:0}, ldvarg7={4294967397:4294967359}, ldvarg8={-4294967325:0}, ldvarg9={-5:0}, ref_cnt=0, sl_ldisc={-4294967301:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={0:0}, slip_devs={0:0}, slip_maxdev=256, tmp={-4294967295:0}, tmp___0={-2:0}, tmp___1={-3:0}, tmp___2={4294967397:4294967359}, tmp___3={4294967325:4294967378}, tmp___4={-9:0}, tmp___5={-5:0}] [L7171] CALL ldv_memset((void *)(& ldvarg11), 0, 8UL) VAL [\old(c)=0, \old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(n)=8, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967350:4294967346}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ref_cnt=0, s={-4294967327:0}, sl_ldisc={-4294967301:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={0:0}, slip_devs={0:0}, slip_maxdev=256] [L4772] void *tmp ; VAL [\old(c)=0, \old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(n)=8, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967350:4294967346}, c=0, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, n=8, ref_cnt=0, s={-4294967327:0}, s={-4294967327:0}, sl_ldisc={-4294967301:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={0:0}, slip_devs={0:0}, slip_maxdev=256] [L4774] EXPR, FCALL memset(s, c, n) VAL [\old(c)=0, \old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(n)=8, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967350:4294967346}, c=0, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, memset(s, c, n)={-4294967327:0}, n=8, ref_cnt=0, s={-4294967327:0}, s={-4294967327:0}, sl_ldisc={-4294967301:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={0:0}, slip_devs={0:0}, slip_maxdev=256] [L4774] tmp = memset(s, c, n) [L4775] return (tmp); VAL [\old(c)=0, \old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(n)=8, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, \result={-4294967327:0}, __this_module={4294967350:4294967346}, c=0, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, n=8, ref_cnt=0, s={-4294967327:0}, s={-4294967327:0}, sl_ldisc={-4294967301:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={0:0}, slip_devs={0:0}, slip_maxdev=256, tmp={-4294967327:0}] [L7171] RET ldv_memset((void *)(& ldvarg11), 0, 8UL) VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967350:4294967346}, LDV_IN_INTERRUPT=1, ldv_memset((void *)(& ldvarg11), 0, 8UL)={-4294967327:0}, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ldvarg0={-3:0}, ldvarg1={-4294967295:0}, ldvarg10={-9:0}, ldvarg11={-4294967327:0}, ldvarg12={-4294967329:0}, ldvarg13={4294967325:4294967378}, ldvarg2={-4294967324:0}, ldvarg3={-4294967323:0}, ldvarg4={-2:0}, ldvarg5={-4294967326:0}, ldvarg6={-4294967328:0}, ldvarg7={4294967397:4294967359}, ldvarg8={-4294967325:0}, ldvarg9={-5:0}, ref_cnt=0, sl_ldisc={-4294967301:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={0:0}, slip_devs={0:0}, slip_maxdev=256, tmp={-4294967295:0}, tmp___0={-2:0}, tmp___1={-3:0}, tmp___2={4294967397:4294967359}, tmp___3={4294967325:4294967378}, tmp___4={-9:0}, tmp___5={-5:0}] [L7172] CALL ldv_memset((void *)(& ldvarg12), 0, 4UL) VAL [\old(c)=0, \old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(n)=4, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967350:4294967346}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ref_cnt=0, s={-4294967329:0}, sl_ldisc={-4294967301:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={0:0}, slip_devs={0:0}, slip_maxdev=256] [L4772] void *tmp ; VAL [\old(c)=0, \old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(n)=4, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967350:4294967346}, c=0, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, n=4, ref_cnt=0, s={-4294967329:0}, s={-4294967329:0}, sl_ldisc={-4294967301:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={0:0}, slip_devs={0:0}, slip_maxdev=256] [L4774] EXPR, FCALL memset(s, c, n) VAL [\old(c)=0, \old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(n)=4, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967350:4294967346}, c=0, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, memset(s, c, n)={-4294967329:0}, n=4, ref_cnt=0, s={-4294967329:0}, s={-4294967329:0}, sl_ldisc={-4294967301:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={0:0}, slip_devs={0:0}, slip_maxdev=256] [L4774] tmp = memset(s, c, n) [L4775] return (tmp); VAL [\old(c)=0, \old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(n)=4, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, \result={-4294967329:0}, __this_module={4294967350:4294967346}, c=0, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, n=4, ref_cnt=0, s={-4294967329:0}, s={-4294967329:0}, sl_ldisc={-4294967301:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={0:0}, slip_devs={0:0}, slip_maxdev=256, tmp={-4294967329:0}] [L7172] RET ldv_memset((void *)(& ldvarg12), 0, 4UL) VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967350:4294967346}, LDV_IN_INTERRUPT=1, ldv_memset((void *)(& ldvarg12), 0, 4UL)={-4294967329:0}, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ldvarg0={-3:0}, ldvarg1={-4294967295:0}, ldvarg10={-9:0}, ldvarg11={-4294967327:0}, ldvarg12={-4294967329:0}, ldvarg13={4294967325:4294967378}, ldvarg2={-4294967324:0}, ldvarg3={-4294967323:0}, ldvarg4={-2:0}, ldvarg5={-4294967326:0}, ldvarg6={-4294967328:0}, ldvarg7={4294967397:4294967359}, ldvarg8={-4294967325:0}, ldvarg9={-5:0}, ref_cnt=0, sl_ldisc={-4294967301:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={0:0}, slip_devs={0:0}, slip_maxdev=256, tmp={-4294967295:0}, tmp___0={-2:0}, tmp___1={-3:0}, tmp___2={4294967397:4294967359}, tmp___3={4294967325:4294967378}, tmp___4={-9:0}, tmp___5={-5:0}] [L7173] CALL ldv_memset((void *)(& ldvarg5), 0, 8UL) VAL [\old(c)=0, \old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(n)=8, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967350:4294967346}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ref_cnt=0, s={-4294967326:0}, sl_ldisc={-4294967301:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={0:0}, slip_devs={0:0}, slip_maxdev=256] [L4772] void *tmp ; VAL [\old(c)=0, \old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(n)=8, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967350:4294967346}, c=0, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, n=8, ref_cnt=0, s={-4294967326:0}, s={-4294967326:0}, sl_ldisc={-4294967301:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={0:0}, slip_devs={0:0}, slip_maxdev=256] [L4774] EXPR, FCALL memset(s, c, n) VAL [\old(c)=0, \old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(n)=8, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967350:4294967346}, c=0, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, memset(s, c, n)={-4294967326:0}, n=8, ref_cnt=0, s={-4294967326:0}, s={-4294967326:0}, sl_ldisc={-4294967301:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={0:0}, slip_devs={0:0}, slip_maxdev=256] [L4774] tmp = memset(s, c, n) [L4775] return (tmp); VAL [\old(c)=0, \old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(n)=8, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, \result={-4294967326:0}, __this_module={4294967350:4294967346}, c=0, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, n=8, ref_cnt=0, s={-4294967326:0}, s={-4294967326:0}, sl_ldisc={-4294967301:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={0:0}, slip_devs={0:0}, slip_maxdev=256, tmp={-4294967326:0}] [L7173] RET ldv_memset((void *)(& ldvarg5), 0, 8UL) VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967350:4294967346}, LDV_IN_INTERRUPT=1, ldv_memset((void *)(& ldvarg5), 0, 8UL)={-4294967326:0}, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ldvarg0={-3:0}, ldvarg1={-4294967295:0}, ldvarg10={-9:0}, ldvarg11={-4294967327:0}, ldvarg12={-4294967329:0}, ldvarg13={4294967325:4294967378}, ldvarg2={-4294967324:0}, ldvarg3={-4294967323:0}, ldvarg4={-2:0}, ldvarg5={-4294967326:0}, ldvarg6={-4294967328:0}, ldvarg7={4294967397:4294967359}, ldvarg8={-4294967325:0}, ldvarg9={-5:0}, ref_cnt=0, sl_ldisc={-4294967301:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={0:0}, slip_devs={0:0}, slip_maxdev=256, tmp={-4294967295:0}, tmp___0={-2:0}, tmp___1={-3:0}, tmp___2={4294967397:4294967359}, tmp___3={4294967325:4294967378}, tmp___4={-9:0}, tmp___5={-5:0}] [L7174] CALL ldv_memset((void *)(& ldvarg6), 0, 4UL) VAL [\old(c)=0, \old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(n)=4, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967350:4294967346}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ref_cnt=0, s={-4294967328:0}, sl_ldisc={-4294967301:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={0:0}, slip_devs={0:0}, slip_maxdev=256] [L4772] void *tmp ; VAL [\old(c)=0, \old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(n)=4, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967350:4294967346}, c=0, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, n=4, ref_cnt=0, s={-4294967328:0}, s={-4294967328:0}, sl_ldisc={-4294967301:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={0:0}, slip_devs={0:0}, slip_maxdev=256] [L4774] EXPR, FCALL memset(s, c, n) VAL [\old(c)=0, \old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(n)=4, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967350:4294967346}, c=0, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, memset(s, c, n)={-4294967328:0}, n=4, ref_cnt=0, s={-4294967328:0}, s={-4294967328:0}, sl_ldisc={-4294967301:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={0:0}, slip_devs={0:0}, slip_maxdev=256] [L4774] tmp = memset(s, c, n) [L4775] return (tmp); VAL [\old(c)=0, \old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(n)=4, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, \result={-4294967328:0}, __this_module={4294967350:4294967346}, c=0, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, n=4, ref_cnt=0, s={-4294967328:0}, s={-4294967328:0}, sl_ldisc={-4294967301:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={0:0}, slip_devs={0:0}, slip_maxdev=256, tmp={-4294967328:0}] [L7174] RET ldv_memset((void *)(& ldvarg6), 0, 4UL) VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967350:4294967346}, LDV_IN_INTERRUPT=1, ldv_memset((void *)(& ldvarg6), 0, 4UL)={-4294967328:0}, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ldvarg0={-3:0}, ldvarg1={-4294967295:0}, ldvarg10={-9:0}, ldvarg11={-4294967327:0}, ldvarg12={-4294967329:0}, ldvarg13={4294967325:4294967378}, ldvarg2={-4294967324:0}, ldvarg3={-4294967323:0}, ldvarg4={-2:0}, ldvarg5={-4294967326:0}, ldvarg6={-4294967328:0}, ldvarg7={4294967397:4294967359}, ldvarg8={-4294967325:0}, ldvarg9={-5:0}, ref_cnt=0, sl_ldisc={-4294967301:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={0:0}, slip_devs={0:0}, slip_maxdev=256, tmp={-4294967295:0}, tmp___0={-2:0}, tmp___1={-3:0}, tmp___2={4294967397:4294967359}, tmp___3={4294967325:4294967378}, tmp___4={-9:0}, tmp___5={-5:0}] [L7175] CALL ldv_memset((void *)(& ldvarg8), 0, 4UL) VAL [\old(c)=0, \old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(n)=4, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967350:4294967346}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ref_cnt=0, s={-4294967325:0}, sl_ldisc={-4294967301:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={0:0}, slip_devs={0:0}, slip_maxdev=256] [L4772] void *tmp ; VAL [\old(c)=0, \old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(n)=4, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967350:4294967346}, c=0, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, n=4, ref_cnt=0, s={-4294967325:0}, s={-4294967325:0}, sl_ldisc={-4294967301:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={0:0}, slip_devs={0:0}, slip_maxdev=256] [L4774] EXPR, FCALL memset(s, c, n) VAL [\old(c)=0, \old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(n)=4, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967350:4294967346}, c=0, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, memset(s, c, n)={-4294967325:0}, n=4, ref_cnt=0, s={-4294967325:0}, s={-4294967325:0}, sl_ldisc={-4294967301:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={0:0}, slip_devs={0:0}, slip_maxdev=256] [L4774] tmp = memset(s, c, n) [L4775] return (tmp); VAL [\old(c)=0, \old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(n)=4, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, \result={-4294967325:0}, __this_module={4294967350:4294967346}, c=0, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, n=4, ref_cnt=0, s={-4294967325:0}, s={-4294967325:0}, sl_ldisc={-4294967301:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={0:0}, slip_devs={0:0}, slip_maxdev=256, tmp={-4294967325:0}] [L7175] RET ldv_memset((void *)(& ldvarg8), 0, 4UL) VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967350:4294967346}, LDV_IN_INTERRUPT=1, ldv_memset((void *)(& ldvarg8), 0, 4UL)={-4294967325:0}, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ldvarg0={-3:0}, ldvarg1={-4294967295:0}, ldvarg10={-9:0}, ldvarg11={-4294967327:0}, ldvarg12={-4294967329:0}, ldvarg13={4294967325:4294967378}, ldvarg2={-4294967324:0}, ldvarg3={-4294967323:0}, ldvarg4={-2:0}, ldvarg5={-4294967326:0}, ldvarg6={-4294967328:0}, ldvarg7={4294967397:4294967359}, ldvarg8={-4294967325:0}, ldvarg9={-5:0}, ref_cnt=0, sl_ldisc={-4294967301:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={0:0}, slip_devs={0:0}, slip_maxdev=256, tmp={-4294967295:0}, tmp___0={-2:0}, tmp___1={-3:0}, tmp___2={4294967397:4294967359}, tmp___3={4294967325:4294967378}, tmp___4={-9:0}, tmp___5={-5:0}] [L7176] ldv_state_variable_4 = 0 [L7177] ldv_state_variable_1 = 1 [L7178] ref_cnt = 0 [L7179] ldv_state_variable_0 = 1 [L7180] ldv_state_variable_3 = 0 [L7181] ldv_state_variable_2 = 1 VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967350:4294967346}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=1, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ldvarg0={-3:0}, ldvarg1={-4294967295:0}, ldvarg10={-9:0}, ldvarg11={-4294967327:0}, ldvarg12={-4294967329:0}, ldvarg13={4294967325:4294967378}, ldvarg2={-4294967324:0}, ldvarg3={-4294967323:0}, ldvarg4={-2:0}, ldvarg5={-4294967326:0}, ldvarg6={-4294967328:0}, ldvarg7={4294967397:4294967359}, ldvarg8={-4294967325:0}, ldvarg9={-5:0}, ref_cnt=0, sl_ldisc={-4294967301:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={0:0}, slip_devs={0:0}, slip_maxdev=256, tmp={-4294967295:0}, tmp___0={-2:0}, tmp___1={-3:0}, tmp___2={4294967397:4294967359}, tmp___3={4294967325:4294967378}, tmp___4={-9:0}, tmp___5={-5:0}] [L7183] tmp___6 = __VERIFIER_nondet_int() [L7185] case 0: [L7302] case 1: [L7308] case 2: VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967350:4294967346}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=1, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ldvarg0={-3:0}, ldvarg1={-4294967295:0}, ldvarg10={-9:0}, ldvarg11={-4294967327:0}, ldvarg12={-4294967329:0}, ldvarg13={4294967325:4294967378}, ldvarg2={-4294967324:0}, ldvarg3={-4294967323:0}, ldvarg4={-2:0}, ldvarg5={-4294967326:0}, ldvarg6={-4294967328:0}, ldvarg7={4294967397:4294967359}, ldvarg8={-4294967325:0}, ldvarg9={-5:0}, ref_cnt=0, sl_ldisc={-4294967301:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={0:0}, slip_devs={0:0}, slip_maxdev=256, tmp={-4294967295:0}, tmp___0={-2:0}, tmp___1={-3:0}, tmp___2={4294967397:4294967359}, tmp___3={4294967325:4294967378}, tmp___4={-9:0}, tmp___5={-5:0}, tmp___6=2] [L7309] COND TRUE ldv_state_variable_0 != 0 [L7310] tmp___8 = __VERIFIER_nondet_int() [L7312] case 0: [L7320] case 1: VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967350:4294967346}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=1, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ldvarg0={-3:0}, ldvarg1={-4294967295:0}, ldvarg10={-9:0}, ldvarg11={-4294967327:0}, ldvarg12={-4294967329:0}, ldvarg13={4294967325:4294967378}, ldvarg2={-4294967324:0}, ldvarg3={-4294967323:0}, ldvarg4={-2:0}, ldvarg5={-4294967326:0}, ldvarg6={-4294967328:0}, ldvarg7={4294967397:4294967359}, ldvarg8={-4294967325:0}, ldvarg9={-5:0}, ref_cnt=0, sl_ldisc={-4294967301:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={0:0}, slip_devs={0:0}, slip_maxdev=256, tmp={-4294967295:0}, tmp___0={-2:0}, tmp___1={-3:0}, tmp___2={4294967397:4294967359}, tmp___3={4294967325:4294967378}, tmp___4={-9:0}, tmp___5={-5:0}, tmp___6=2, tmp___8=1] [L7321] COND TRUE ldv_state_variable_0 == 1 VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967350:4294967346}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=1, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ldvarg0={-3:0}, ldvarg1={-4294967295:0}, ldvarg10={-9:0}, ldvarg11={-4294967327:0}, ldvarg12={-4294967329:0}, ldvarg13={4294967325:4294967378}, ldvarg2={-4294967324:0}, ldvarg3={-4294967323:0}, ldvarg4={-2:0}, ldvarg5={-4294967326:0}, ldvarg6={-4294967328:0}, ldvarg7={4294967397:4294967359}, ldvarg8={-4294967325:0}, ldvarg9={-5:0}, ref_cnt=0, sl_ldisc={-4294967301:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={0:0}, slip_devs={0:0}, slip_maxdev=256, tmp={-4294967295:0}, tmp___0={-2:0}, tmp___1={-3:0}, tmp___2={4294967397:4294967359}, tmp___3={4294967325:4294967378}, tmp___4={-9:0}, tmp___5={-5:0}, tmp___6=2, tmp___8=1] [L7322] CALL, EXPR slip_init() VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967350:4294967346}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=1, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ref_cnt=0, sl_ldisc={-4294967301:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={0:0}, slip_devs={0:0}, slip_maxdev=256] [L6832] int status ; [L6833] void *tmp ; VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967350:4294967346}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=1, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ref_cnt=0, sl_ldisc={-4294967301:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={0:0}, slip_devs={0:0}, slip_maxdev=256] [L6835] COND FALSE !(slip_maxdev <= 3) VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967350:4294967346}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=1, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ref_cnt=0, sl_ldisc={-4294967301:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={0:0}, slip_devs={0:0}, slip_maxdev=256] [L6843] CALL, EXPR kzalloc((unsigned long )slip_maxdev * 8UL, 208U) VAL [\old(flags)=208, \old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(size)=2048, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967350:4294967346}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=1, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ref_cnt=0, sl_ldisc={-4294967301:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={0:0}, slip_devs={0:0}, slip_maxdev=256] [L4934] void *tmp ; VAL [\old(flags)=208, \old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(size)=2048, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967350:4294967346}, flags=208, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=1, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ref_cnt=0, size=2048, sl_ldisc={-4294967301:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={0:0}, slip_devs={0:0}, slip_maxdev=256] [L4936] CALL, EXPR kmalloc(size, flags | 32768U) VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(size)=2048, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967350:4294967346}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=1, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ref_cnt=0, sl_ldisc={-4294967301:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={0:0}, slip_devs={0:0}, slip_maxdev=256] [L4926] void *tmp___2 ; VAL [\old(flags)=85, \old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(size)=2048, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967350:4294967346}, flags=85, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=1, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ref_cnt=0, size=2048, sl_ldisc={-4294967301:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={0:0}, slip_devs={0:0}, slip_maxdev=256] [L4928] CALL, EXPR __kmalloc(size, flags) VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(size)=2048, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, \old(t)=85, __this_module={4294967350:4294967346}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=1, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ref_cnt=0, sl_ldisc={-4294967301:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={0:0}, slip_devs={0:0}, slip_maxdev=256] [L4922] CALL, EXPR ldv_malloc(size) VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(size)=2048, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967350:4294967346}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=1, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ref_cnt=0, sl_ldisc={-4294967301:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={0:0}, slip_devs={0:0}, slip_maxdev=256] [L4727] void *p ; [L4728] void *tmp ; [L4729] int tmp___0 ; [L4731] tmp___0 = __VERIFIER_nondet_int() [L4732] COND FALSE !(tmp___0 != 0) [L4735] tmp = malloc(size) [L4736] p = tmp [L4738] return (p); VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(size)=2048, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, \result={4294967297:0}, __this_module={4294967350:4294967346}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=1, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, malloc(size)={4294967297:0}, p={4294967297:0}, ref_cnt=0, size=2048, sl_ldisc={-4294967301:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={0:0}, slip_devs={0:0}, slip_maxdev=256, tmp={4294967297:0}, tmp___0=0] [L4922] RET, EXPR ldv_malloc(size) VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(size)=2048, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, \old(t)=85, __this_module={4294967350:4294967346}, LDV_IN_INTERRUPT=1, ldv_malloc(size)={4294967297:0}, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=1, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ref_cnt=0, size=2048, sl_ldisc={-4294967301:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={0:0}, slip_devs={0:0}, slip_maxdev=256, t=85] [L4922] return ldv_malloc(size); [L4928] RET, EXPR __kmalloc(size, flags) VAL [\old(flags)=85, \old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(size)=2048, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __kmalloc(size, flags)={4294967297:0}, __this_module={4294967350:4294967346}, flags=85, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=1, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ref_cnt=0, size=2048, sl_ldisc={-4294967301:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={0:0}, slip_devs={0:0}, slip_maxdev=256] [L4928] tmp___2 = __kmalloc(size, flags) [L4929] return (tmp___2); VAL [\old(flags)=85, \old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(size)=2048, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, \result={4294967297:0}, __this_module={4294967350:4294967346}, flags=85, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=1, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ref_cnt=0, size=2048, sl_ldisc={-4294967301:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={0:0}, slip_devs={0:0}, slip_maxdev=256, tmp___2={4294967297:0}] [L4936] RET, EXPR kmalloc(size, flags | 32768U) VAL [\old(flags)=208, \old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(size)=2048, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967350:4294967346}, flags=208, kmalloc(size, flags | 32768U)={4294967297:0}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=1, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ref_cnt=0, size=2048, sl_ldisc={-4294967301:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={0:0}, slip_devs={0:0}, slip_maxdev=256] [L4936] tmp = kmalloc(size, flags | 32768U) [L4937] return (tmp); VAL [\old(flags)=208, \old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(size)=2048, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, \result={4294967297:0}, __this_module={4294967350:4294967346}, flags=208, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=1, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ref_cnt=0, size=2048, sl_ldisc={-4294967301:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={0:0}, slip_devs={0:0}, slip_maxdev=256, tmp={4294967297:0}] [L6843] RET, EXPR kzalloc((unsigned long )slip_maxdev * 8UL, 208U) VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967350:4294967346}, kzalloc((unsigned long )slip_maxdev * 8UL, 208U)={4294967297:0}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=1, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ref_cnt=0, sl_ldisc={-4294967301:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={0:0}, slip_devs={0:0}, slip_maxdev=256] [L6843] tmp = kzalloc((unsigned long )slip_maxdev * 8UL, 208U) [L6844] slip_devs = (struct net_device **)tmp VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967350:4294967346}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=1, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ref_cnt=0, sl_ldisc={-4294967301:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={0:0}, slip_devs={4294967297:0}, slip_maxdev=256, tmp={4294967297:0}] [L6845] COND FALSE !((unsigned long )slip_devs == (unsigned long )((struct net_device **)0)) VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967350:4294967346}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=1, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ref_cnt=0, sl_ldisc={-4294967301:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={0:0}, slip_devs={4294967297:0}, slip_maxdev=256, tmp={4294967297:0}] [L6850] CALL, EXPR tty_register_ldisc(1, & sl_ldisc) VAL [\old(arg0)=1, \old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967350:4294967346}, arg1={-4294967301:0}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=1, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ref_cnt=0, sl_ldisc={-4294967301:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={0:0}, slip_devs={4294967297:0}, slip_maxdev=256] [L7800] return __VERIFIER_nondet_int(); [L6850] RET, EXPR tty_register_ldisc(1, & sl_ldisc) VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967350:4294967346}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=1, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ref_cnt=0, sl_ldisc={-4294967301:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={0:0}, slip_devs={4294967297:0}, slip_maxdev=256, tmp={4294967297:0}, tty_register_ldisc(1, & sl_ldisc)=0] [L6850] status = tty_register_ldisc(1, & sl_ldisc) [L6851] COND FALSE !(status != 0) VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967350:4294967346}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=1, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ref_cnt=0, sl_ldisc={-4294967301:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={0:0}, slip_devs={4294967297:0}, slip_maxdev=256, status=0, tmp={4294967297:0}] [L6856] return (status); VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, \result=0, __this_module={4294967350:4294967346}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=1, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ref_cnt=0, sl_ldisc={-4294967301:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={0:0}, slip_devs={4294967297:0}, slip_maxdev=256, status=0, tmp={4294967297:0}] [L7322] RET, EXPR slip_init() VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967350:4294967346}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=1, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ldvarg0={-3:0}, ldvarg1={-4294967295:0}, ldvarg10={-9:0}, ldvarg11={-4294967327:0}, ldvarg12={-4294967329:0}, ldvarg13={4294967325:4294967378}, ldvarg2={-4294967324:0}, ldvarg3={-4294967323:0}, ldvarg4={-2:0}, ldvarg5={-4294967326:0}, ldvarg6={-4294967328:0}, ldvarg7={4294967397:4294967359}, ldvarg8={-4294967325:0}, ldvarg9={-5:0}, ref_cnt=0, sl_ldisc={-4294967301:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={0:0}, slip_devs={4294967297:0}, slip_init()=0, slip_maxdev=256, tmp={-4294967295:0}, tmp___0={-2:0}, tmp___1={-3:0}, tmp___2={4294967397:4294967359}, tmp___3={4294967325:4294967378}, tmp___4={-9:0}, tmp___5={-5:0}, tmp___6=2, tmp___8=1] [L7322] ldv_retval_2 = slip_init() [L7323] COND FALSE !(ldv_retval_2 != 0) VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967350:4294967346}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=1, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ldvarg0={-3:0}, ldvarg1={-4294967295:0}, ldvarg10={-9:0}, ldvarg11={-4294967327:0}, ldvarg12={-4294967329:0}, ldvarg13={4294967325:4294967378}, ldvarg2={-4294967324:0}, ldvarg3={-4294967323:0}, ldvarg4={-2:0}, ldvarg5={-4294967326:0}, ldvarg6={-4294967328:0}, ldvarg7={4294967397:4294967359}, ldvarg8={-4294967325:0}, ldvarg9={-5:0}, ref_cnt=0, sl_ldisc={-4294967301:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={0:0}, slip_devs={4294967297:0}, slip_maxdev=256, tmp={-4294967295:0}, tmp___0={-2:0}, tmp___1={-3:0}, tmp___2={4294967397:4294967359}, tmp___3={4294967325:4294967378}, tmp___4={-9:0}, tmp___5={-5:0}, tmp___6=2, tmp___8=1] [L7328] COND TRUE ldv_retval_2 == 0 [L7329] ldv_state_variable_0 = 2 [L7330] ldv_state_variable_3 = 1 VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967350:4294967346}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ldvarg0={-3:0}, ldvarg1={-4294967295:0}, ldvarg10={-9:0}, ldvarg11={-4294967327:0}, ldvarg12={-4294967329:0}, ldvarg13={4294967325:4294967378}, ldvarg2={-4294967324:0}, ldvarg3={-4294967323:0}, ldvarg4={-2:0}, ldvarg5={-4294967326:0}, ldvarg6={-4294967328:0}, ldvarg7={4294967397:4294967359}, ldvarg8={-4294967325:0}, ldvarg9={-5:0}, ref_cnt=0, sl_ldisc={-4294967301:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={0:0}, slip_devs={4294967297:0}, slip_maxdev=256, tmp={-4294967295:0}, tmp___0={-2:0}, tmp___1={-3:0}, tmp___2={4294967397:4294967359}, tmp___3={4294967325:4294967378}, tmp___4={-9:0}, tmp___5={-5:0}, tmp___6=2, tmp___8=1] [L7331] CALL ldv_target_type_3() VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967350:4294967346}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ref_cnt=0, sl_ldisc={-4294967301:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={0:0}, slip_devs={4294967297:0}, slip_maxdev=256] [L7016] void *tmp ; VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967350:4294967346}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ref_cnt=0, sl_ldisc={-4294967301:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={0:0}, slip_devs={4294967297:0}, slip_maxdev=256] [L7018] CALL, EXPR ldv_init_zalloc(2696UL) VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(size)=2696, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967350:4294967346}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ref_cnt=0, sl_ldisc={-4294967301:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={0:0}, slip_devs={4294967297:0}, slip_maxdev=256] [L4761] void *p ; [L4762] void *tmp ; [L4764] EXPR, FCALL calloc(1UL, size) VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(size)=2696, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967350:4294967346}, calloc(1UL, size)={-6:0}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ref_cnt=0, size=2696, sl_ldisc={-4294967301:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={0:0}, slip_devs={4294967297:0}, slip_maxdev=256] [L4764] tmp = calloc(1UL, size) [L4765] p = tmp [L4767] return (p); VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(size)=2696, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, \result={-6:0}, __this_module={4294967350:4294967346}, calloc(1UL, size)={-6:0}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, p={-6:0}, ref_cnt=0, size=2696, sl_ldisc={-4294967301:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={0:0}, slip_devs={4294967297:0}, slip_maxdev=256, tmp={-6:0}] [L7018] RET, EXPR ldv_init_zalloc(2696UL) VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967350:4294967346}, LDV_IN_INTERRUPT=1, ldv_init_zalloc(2696UL)={-6:0}, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ref_cnt=0, sl_ldisc={-4294967301:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={0:0}, slip_devs={4294967297:0}, slip_maxdev=256] [L7018] tmp = ldv_init_zalloc(2696UL) [L7019] sl_ldisc_group1 = (struct tty_struct *)tmp VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967350:4294967346}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ref_cnt=0, sl_ldisc={-4294967301:0}, sl_ldisc_group1={-6:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={0:0}, slip_devs={4294967297:0}, slip_maxdev=256, tmp={-6:0}] [L7331] RET ldv_target_type_3() VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967350:4294967346}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ldvarg0={-3:0}, ldvarg1={-4294967295:0}, ldvarg10={-9:0}, ldvarg11={-4294967327:0}, ldvarg12={-4294967329:0}, ldvarg13={4294967325:4294967378}, ldvarg2={-4294967324:0}, ldvarg3={-4294967323:0}, ldvarg4={-2:0}, ldvarg5={-4294967326:0}, ldvarg6={-4294967328:0}, ldvarg7={4294967397:4294967359}, ldvarg8={-4294967325:0}, ldvarg9={-5:0}, ref_cnt=0, sl_ldisc={-4294967301:0}, sl_ldisc_group1={-6:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={0:0}, slip_devs={4294967297:0}, slip_maxdev=256, tmp={-4294967295:0}, tmp___0={-2:0}, tmp___1={-3:0}, tmp___2={4294967397:4294967359}, tmp___3={4294967325:4294967378}, tmp___4={-9:0}, tmp___5={-5:0}, tmp___6=2, tmp___8=1] [L7332] ldv_state_variable_4 = 1 VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967350:4294967346}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ldvarg0={-3:0}, ldvarg1={-4294967295:0}, ldvarg10={-9:0}, ldvarg11={-4294967327:0}, ldvarg12={-4294967329:0}, ldvarg13={4294967325:4294967378}, ldvarg2={-4294967324:0}, ldvarg3={-4294967323:0}, ldvarg4={-2:0}, ldvarg5={-4294967326:0}, ldvarg6={-4294967328:0}, ldvarg7={4294967397:4294967359}, ldvarg8={-4294967325:0}, ldvarg9={-5:0}, ref_cnt=0, sl_ldisc={-4294967301:0}, sl_ldisc_group1={-6:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={0:0}, slip_devs={4294967297:0}, slip_maxdev=256, tmp={-4294967295:0}, tmp___0={-2:0}, tmp___1={-3:0}, tmp___2={4294967397:4294967359}, tmp___3={4294967325:4294967378}, tmp___4={-9:0}, tmp___5={-5:0}, tmp___6=2, tmp___8=1] [L7333] CALL ldv_net_device_ops_4() VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967350:4294967346}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ref_cnt=0, sl_ldisc={-4294967301:0}, sl_ldisc_group1={-6:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={0:0}, slip_devs={4294967297:0}, slip_maxdev=256] [L7025] void *tmp ; VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967350:4294967346}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ref_cnt=0, sl_ldisc={-4294967301:0}, sl_ldisc_group1={-6:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={0:0}, slip_devs={4294967297:0}, slip_maxdev=256] [L7027] CALL, EXPR ldv_init_zalloc(2496UL) VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(size)=2496, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967350:4294967346}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ref_cnt=0, sl_ldisc={-4294967301:0}, sl_ldisc_group1={-6:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={0:0}, slip_devs={4294967297:0}, slip_maxdev=256] [L4761] void *p ; [L4762] void *tmp ; [L4764] EXPR, FCALL calloc(1UL, size) VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(size)=2496, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967350:4294967346}, calloc(1UL, size)={-7:0}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ref_cnt=0, size=2496, sl_ldisc={-4294967301:0}, sl_ldisc_group1={-6:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={0:0}, slip_devs={4294967297:0}, slip_maxdev=256] [L4764] tmp = calloc(1UL, size) [L4765] p = tmp [L4767] return (p); VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(size)=2496, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, \result={-7:0}, __this_module={4294967350:4294967346}, calloc(1UL, size)={-7:0}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, p={-7:0}, ref_cnt=0, size=2496, sl_ldisc={-4294967301:0}, sl_ldisc_group1={-6:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={0:0}, slip_devs={4294967297:0}, slip_maxdev=256, tmp={-7:0}] [L7027] RET, EXPR ldv_init_zalloc(2496UL) VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967350:4294967346}, LDV_IN_INTERRUPT=1, ldv_init_zalloc(2496UL)={-7:0}, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ref_cnt=0, sl_ldisc={-4294967301:0}, sl_ldisc_group1={-6:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={0:0}, slip_devs={4294967297:0}, slip_maxdev=256] [L7027] tmp = ldv_init_zalloc(2496UL) [L7028] sl_netdev_ops_group1 = (struct net_device *)tmp VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967350:4294967346}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ref_cnt=0, sl_ldisc={-4294967301:0}, sl_ldisc_group1={-6:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={-7:0}, slip_devs={4294967297:0}, slip_maxdev=256, tmp={-7:0}] [L7333] RET ldv_net_device_ops_4() VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967350:4294967346}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ldvarg0={-3:0}, ldvarg1={-4294967295:0}, ldvarg10={-9:0}, ldvarg11={-4294967327:0}, ldvarg12={-4294967329:0}, ldvarg13={4294967325:4294967378}, ldvarg2={-4294967324:0}, ldvarg3={-4294967323:0}, ldvarg4={-2:0}, ldvarg5={-4294967326:0}, ldvarg6={-4294967328:0}, ldvarg7={4294967397:4294967359}, ldvarg8={-4294967325:0}, ldvarg9={-5:0}, ref_cnt=0, sl_ldisc={-4294967301:0}, sl_ldisc_group1={-6:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={-7:0}, slip_devs={4294967297:0}, slip_maxdev=256, tmp={-4294967295:0}, tmp___0={-2:0}, tmp___1={-3:0}, tmp___2={4294967397:4294967359}, tmp___3={4294967325:4294967378}, tmp___4={-9:0}, tmp___5={-5:0}, tmp___6=2, tmp___8=1] [L7183] tmp___6 = __VERIFIER_nondet_int() [L7185] case 0: [L7302] case 1: [L7308] case 2: [L7346] case 3: VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967350:4294967346}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ldvarg0={-3:0}, ldvarg1={-4294967295:0}, ldvarg10={-9:0}, ldvarg11={-4294967327:0}, ldvarg12={-4294967329:0}, ldvarg13={4294967325:4294967378}, ldvarg2={-4294967324:0}, ldvarg3={-4294967323:0}, ldvarg4={-2:0}, ldvarg5={-4294967326:0}, ldvarg6={-4294967328:0}, ldvarg7={4294967397:4294967359}, ldvarg8={-4294967325:0}, ldvarg9={-5:0}, ref_cnt=0, sl_ldisc={-4294967301:0}, sl_ldisc_group1={-6:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={-7:0}, slip_devs={4294967297:0}, slip_maxdev=256, tmp={-4294967295:0}, tmp___0={-2:0}, tmp___1={-3:0}, tmp___2={4294967397:4294967359}, tmp___3={4294967325:4294967378}, tmp___4={-9:0}, tmp___5={-5:0}, tmp___6=3, tmp___8=1] [L7347] COND TRUE ldv_state_variable_3 != 0 [L7348] tmp___9 = __VERIFIER_nondet_int() [L7350] case 0: [L7362] case 1: [L7374] case 2: [L7382] case 3: [L7389] case 4: VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967350:4294967346}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ldvarg0={-3:0}, ldvarg1={-4294967295:0}, ldvarg10={-9:0}, ldvarg11={-4294967327:0}, ldvarg12={-4294967329:0}, ldvarg13={4294967325:4294967378}, ldvarg2={-4294967324:0}, ldvarg3={-4294967323:0}, ldvarg4={-2:0}, ldvarg5={-4294967326:0}, ldvarg6={-4294967328:0}, ldvarg7={4294967397:4294967359}, ldvarg8={-4294967325:0}, ldvarg9={-5:0}, ref_cnt=0, sl_ldisc={-4294967301:0}, sl_ldisc_group1={-6:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={-7:0}, slip_devs={4294967297:0}, slip_maxdev=256, tmp={-4294967295:0}, tmp___0={-2:0}, tmp___1={-3:0}, tmp___2={4294967397:4294967359}, tmp___3={4294967325:4294967378}, tmp___4={-9:0}, tmp___5={-5:0}, tmp___6=3, tmp___8=1, tmp___9=4] [L7390] COND TRUE ldv_state_variable_3 == 1 VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967350:4294967346}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ldvarg0={-3:0}, ldvarg1={-4294967295:0}, ldvarg10={-9:0}, ldvarg11={-4294967327:0}, ldvarg12={-4294967329:0}, ldvarg13={4294967325:4294967378}, ldvarg2={-4294967324:0}, ldvarg3={-4294967323:0}, ldvarg4={-2:0}, ldvarg5={-4294967326:0}, ldvarg6={-4294967328:0}, ldvarg7={4294967397:4294967359}, ldvarg8={-4294967325:0}, ldvarg9={-5:0}, ref_cnt=0, sl_ldisc={-4294967301:0}, sl_ldisc_group1={-6:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={-7:0}, slip_devs={4294967297:0}, slip_maxdev=256, tmp={-4294967295:0}, tmp___0={-2:0}, tmp___1={-3:0}, tmp___2={4294967397:4294967359}, tmp___3={4294967325:4294967378}, tmp___4={-9:0}, tmp___5={-5:0}, tmp___6=3, tmp___8=1, tmp___9=4] [L7391] CALL ldv_slip_open_18(sl_ldisc_group1) VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967350:4294967346}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ref_cnt=0, sl_ldisc={-4294967301:0}, sl_ldisc_group1={-6:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={-7:0}, slip_devs={4294967297:0}, slip_maxdev=256, tty={-6:0}] [L7636] ldv_func_ret_type___16 ldv_func_res ; [L7637] int tmp ; VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967350:4294967346}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ref_cnt=0, sl_ldisc={-4294967301:0}, sl_ldisc_group1={-6:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={-7:0}, slip_devs={4294967297:0}, slip_maxdev=256, tty={-6:0}, tty={-6:0}] [L7639] CALL, EXPR slip_open(tty) VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967350:4294967346}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ref_cnt=0, sl_ldisc={-4294967301:0}, sl_ldisc_group1={-6:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={-7:0}, slip_devs={4294967297:0}, slip_maxdev=256, tty={-6:0}] [L6140] struct slip *sl ; [L6141] int err ; [L6142] int tmp ; [L6143] dev_t tmp___0 ; [L6144] struct task_struct *tmp___1 ; [L6145] int tmp___2 ; VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967350:4294967346}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ref_cnt=0, sl_ldisc={-4294967301:0}, sl_ldisc_group1={-6:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={-7:0}, slip_devs={4294967297:0}, slip_maxdev=256, tty={-6:0}, tty={-6:0}] [L6147] CALL, EXPR capable(12) VAL [\old(arg0)=12, \old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967350:4294967346}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ref_cnt=0, sl_ldisc={-4294967301:0}, sl_ldisc_group1={-6:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={-7:0}, slip_devs={4294967297:0}, slip_maxdev=256] [L7693] return __VERIFIER_nondet_int(); [L6147] RET, EXPR capable(12) VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967350:4294967346}, capable(12)=10, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ref_cnt=0, sl_ldisc={-4294967301:0}, sl_ldisc_group1={-6:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={-7:0}, slip_devs={4294967297:0}, slip_maxdev=256, tty={-6:0}, tty={-6:0}] [L6147] tmp = capable(12) [L6148] COND FALSE !(tmp == 0) [L6152] EXPR tty->ops [L6152] EXPR (tty->ops)->write VAL [(tty->ops)->write={-2778:2779}, \old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967350:4294967346}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ref_cnt=0, sl_ldisc={-4294967301:0}, sl_ldisc_group1={-6:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={-7:0}, slip_devs={4294967297:0}, slip_maxdev=256, tmp=10, tty={-6:0}, tty={-6:0}, tty->ops={4294967315:0}] [L6152-L6154] COND FALSE !((unsigned long )(tty->ops)->write == (unsigned long )((int (* )(struct tty_struct * , unsigned char const * , int ))0)) [L6158] FCALL rtnl_lock() VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967350:4294967346}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ref_cnt=0, sl_ldisc={-4294967301:0}, sl_ldisc_group1={-6:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={-7:0}, slip_devs={4294967297:0}, slip_maxdev=256, tmp=10, tty={-6:0}, tty={-6:0}] [L6159] CALL sl_sync() VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967350:4294967346}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ref_cnt=0, sl_ldisc={-4294967301:0}, sl_ldisc_group1={-6:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={-7:0}, slip_devs={4294967297:0}, slip_maxdev=256] [L6029] int i ; [L6030] struct net_device *dev ; [L6031] struct slip *sl ; [L6032] void *tmp ; [L6034] i = 0 VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967350:4294967346}, i=0, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ref_cnt=0, sl_ldisc={-4294967301:0}, sl_ldisc_group1={-6:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={-7:0}, slip_devs={4294967297:0}, slip_maxdev=256] [L6055] COND TRUE i < slip_maxdev VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967350:4294967346}, i=0, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ref_cnt=0, sl_ldisc={-4294967301:0}, sl_ldisc_group1={-6:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={-7:0}, slip_devs={4294967297:0}, slip_maxdev=256] [L6037] EXPR slip_devs + (unsigned long )i [L6037] dev = *(slip_devs + (unsigned long )i) [L6038] COND TRUE (unsigned long )dev == (unsigned long )((struct net_device *)0) VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967350:4294967346}, dev={0:0}, i=0, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ref_cnt=0, sl_ldisc={-4294967301:0}, sl_ldisc_group1={-6:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={-7:0}, slip_devs={4294967297:0}, slip_maxdev=256] [L6159] RET sl_sync() VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967350:4294967346}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ref_cnt=0, sl_ldisc={-4294967301:0}, sl_ldisc_group1={-6:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={-7:0}, slip_devs={4294967297:0}, slip_maxdev=256, tmp=10, tty={-6:0}, tty={-6:0}] [L6160] EXPR tty->disc_data [L6160] sl = (struct slip *)tty->disc_data [L6161] err = -17 [L6162] (unsigned long )sl != (unsigned long )((struct slip *)0) && sl->magic == 21250 [L6162] EXPR sl->magic [L6162] (unsigned long )sl != (unsigned long )((struct slip *)0) && sl->magic == 21250 VAL [(unsigned long )sl != (unsigned long )((struct slip *)0) && sl->magic == 21250=0, \old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967350:4294967346}, err=-17, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ref_cnt=0, sl={-6:2779}, sl->magic=0, sl_ldisc={-4294967301:0}, sl_ldisc_group1={-6:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={-7:0}, slip_devs={4294967297:0}, slip_maxdev=256, tmp=10, tty={-6:0}, tty={-6:0}] [L6162] COND FALSE !((unsigned long )sl != (unsigned long )((struct slip *)0) && sl->magic == 21250) [L6166] err = -23 VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967350:4294967346}, err=-23, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ref_cnt=0, sl={-6:2779}, sl_ldisc={-4294967301:0}, sl_ldisc_group1={-6:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={-7:0}, slip_devs={4294967297:0}, slip_maxdev=256, tmp=10, tty={-6:0}, tty={-6:0}] [L6167] CALL, EXPR tty_devnum(tty) VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967350:4294967346}, arg0={-6:0}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ref_cnt=0, sl_ldisc={-4294967301:0}, sl_ldisc_group1={-6:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={-7:0}, slip_devs={4294967297:0}, slip_maxdev=256] [L7789] return __VERIFIER_nondet_uint(); [L6167] RET, EXPR tty_devnum(tty) VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967350:4294967346}, err=-23, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ref_cnt=0, sl={-6:2779}, sl_ldisc={-4294967301:0}, sl_ldisc_group1={-6:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={-7:0}, slip_devs={4294967297:0}, slip_maxdev=256, tmp=10, tty={-6:0}, tty={-6:0}, tty_devnum(tty)=4294967395] [L6167] tmp___0 = tty_devnum(tty) [L6168] CALL, EXPR sl_alloc(tmp___0) VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(line)=99, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967350:4294967346}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ref_cnt=0, sl_ldisc={-4294967301:0}, sl_ldisc_group1={-6:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={-7:0}, slip_devs={4294967297:0}, slip_maxdev=256] [L6065] int i ; [L6066] struct net_device *dev ; [L6067] struct slip *sl ; [L6068] void *tmp ; [L6069] int tmp___0 ; [L6070] char name[16U] ; [L6071] void *tmp___1 ; [L6072] struct lock_class_key __key ; [L6074] dev = (struct net_device *)0 VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(line)=99, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __key={-4294967297:0}, __this_module={4294967350:4294967346}, dev={0:0}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, line=99, name={-4294967330:0}, ref_cnt=0, sl_ldisc={-4294967301:0}, sl_ldisc_group1={-6:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={-7:0}, slip_devs={4294967297:0}, slip_maxdev=256] [L6075] COND FALSE !((unsigned long )slip_devs == (unsigned long )((struct net_device **)0)) [L6079] i = 0 VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(line)=99, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __key={-4294967297:0}, __this_module={4294967350:4294967346}, dev={0:0}, i=0, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, line=99, name={-4294967330:0}, ref_cnt=0, sl_ldisc={-4294967301:0}, sl_ldisc_group1={-6:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={-7:0}, slip_devs={4294967297:0}, slip_maxdev=256] [L6089] COND TRUE i < slip_maxdev VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(line)=99, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __key={-4294967297:0}, __this_module={4294967350:4294967346}, dev={0:0}, i=0, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, line=99, name={-4294967330:0}, ref_cnt=0, sl_ldisc={-4294967301:0}, sl_ldisc_group1={-6:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={-7:0}, slip_devs={4294967297:0}, slip_maxdev=256] [L6082] EXPR slip_devs + (unsigned long )i [L6082] dev = *(slip_devs + (unsigned long )i) [L6083] COND TRUE (unsigned long )dev == (unsigned long )((struct net_device *)0) VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(line)=99, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __key={-4294967297:0}, __this_module={4294967350:4294967346}, dev={0:0}, i=0, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, line=99, name={-4294967330:0}, ref_cnt=0, sl_ldisc={-4294967301:0}, sl_ldisc_group1={-6:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={-7:0}, slip_devs={4294967297:0}, slip_maxdev=256] [L6094] COND FALSE !(i >= slip_maxdev) VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(line)=99, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __key={-4294967297:0}, __this_module={4294967350:4294967346}, dev={0:0}, i=0, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, line=99, name={-4294967330:0}, ref_cnt=0, sl_ldisc={-4294967301:0}, sl_ldisc_group1={-6:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={-7:0}, slip_devs={4294967297:0}, slip_maxdev=256] [L6098] COND FALSE !((unsigned long )dev != (unsigned long )((struct net_device *)0)) VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(line)=99, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __key={-4294967297:0}, __this_module={4294967350:4294967346}, dev={0:0}, i=0, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, line=99, name={-4294967330:0}, ref_cnt=0, sl_ldisc={-4294967301:0}, sl_ldisc_group1={-6:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={-7:0}, slip_devs={4294967297:0}, slip_maxdev=256] [L6110] COND TRUE (unsigned long )dev == (unsigned long )((struct net_device *)0) [L6112] CALL, EXPR alloc_netdev_mqs(472, (char const *)(& name), & sl_setup, 1U, 1U) VAL [\old(arg0)=472, \old(arg3)=1, \old(arg4)=1, \old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967350:4294967346}, arg1={-4294967330:0}, arg2={-1:10}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ref_cnt=0, sl_ldisc={-4294967301:0}, sl_ldisc_group1={-6:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={-7:0}, slip_devs={4294967297:0}, slip_maxdev=256] [L7689] CALL, EXPR external_alloc() VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967350:4294967346}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ref_cnt=0, sl_ldisc={-4294967301:0}, sl_ldisc_group1={-6:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={-7:0}, slip_devs={4294967297:0}, slip_maxdev=256] [L7817] return __VERIFIER_nondet_pointer(); [L7689] RET, EXPR external_alloc() VAL [\old(arg0)=472, \old(arg3)=1, \old(arg4)=1, \old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967350:4294967346}, arg0=472, arg1={-4294967330:0}, arg1={-4294967330:0}, arg2={-1:10}, arg2={-1:10}, arg3=1, arg4=1, external_alloc()={-6:283}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ref_cnt=0, sl_ldisc={-4294967301:0}, sl_ldisc_group1={-6:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={-7:0}, slip_devs={4294967297:0}, slip_maxdev=256] [L7689] return (struct net_device *)external_alloc(); [L6112] RET, EXPR alloc_netdev_mqs(472, (char const *)(& name), & sl_setup, 1U, 1U) VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(line)=99, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __key={-4294967297:0}, __this_module={4294967350:4294967346}, alloc_netdev_mqs(472, (char const *)(& name), & sl_setup, 1U, 1U)={-6:283}, dev={0:0}, i=0, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, line=99, name={-4294967330:0}, ref_cnt=0, sl_ldisc={-4294967301:0}, sl_ldisc_group1={-6:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={-7:0}, slip_devs={4294967297:0}, slip_maxdev=256] [L6112] dev = alloc_netdev_mqs(472, (char const *)(& name), & sl_setup, 1U, 1U) [L6113] COND FALSE !((unsigned long )dev == (unsigned long )((struct net_device *)0)) [L6117] dev->base_addr = (unsigned long )i VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(line)=99, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __key={-4294967297:0}, __this_module={4294967350:4294967346}, dev={-6:283}, i=0, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, line=99, name={-4294967330:0}, ref_cnt=0, sl_ldisc={-4294967301:0}, sl_ldisc_group1={-6:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={-7:0}, slip_devs={4294967297:0}, slip_maxdev=256] [L6120] CALL, EXPR netdev_priv((struct net_device const *)dev) VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967350:4294967346}, dev={-6:283}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ref_cnt=0, sl_ldisc={-4294967301:0}, sl_ldisc_group1={-6:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={-7:0}, slip_devs={4294967297:0}, slip_maxdev=256] [L5007] return ((void *)dev + 2496U); VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, \result={-6:2779}, __this_module={4294967350:4294967346}, dev={-6:283}, dev={-6:283}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ref_cnt=0, sl_ldisc={-4294967301:0}, sl_ldisc_group1={-6:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={-7:0}, slip_devs={4294967297:0}, slip_maxdev=256] [L6120] RET, EXPR netdev_priv((struct net_device const *)dev) VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(line)=99, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __key={-4294967297:0}, __this_module={4294967350:4294967346}, dev={-6:283}, i=0, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, line=99, name={-4294967330:0}, netdev_priv((struct net_device const *)dev)={-6:2779}, ref_cnt=0, sl_ldisc={-4294967301:0}, sl_ldisc_group1={-6:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={-7:0}, slip_devs={4294967297:0}, slip_maxdev=256] [L6120] tmp___1 = netdev_priv((struct net_device const *)dev) [L6121] sl = (struct slip *)tmp___1 [L6122] sl->magic = 21250 [L6123] sl->dev = dev VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(line)=99, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __key={-4294967297:0}, __this_module={4294967350:4294967346}, dev={-6:283}, i=0, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, line=99, name={-4294967330:0}, ref_cnt=0, sl={-6:2779}, sl_ldisc={-4294967301:0}, sl_ldisc_group1={-6:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={-7:0}, slip_devs={4294967297:0}, slip_maxdev=256, tmp___1={-6:2779}] [L6124] CALL spinlock_check(& sl->lock) VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967350:4294967346}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, lock={-6:2791}, ref_cnt=0, sl_ldisc={-4294967301:0}, sl_ldisc_group1={-6:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={-7:0}, slip_devs={4294967297:0}, slip_maxdev=256] [L4866] return (& lock->__annonCompField19.rlock); VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, \result={-6:2791}, __this_module={4294967350:4294967346}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, lock={-6:2791}, lock={-6:2791}, ref_cnt=0, sl_ldisc={-4294967301:0}, sl_ldisc_group1={-6:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={-7:0}, slip_devs={4294967297:0}, slip_maxdev=256] [L6124] RET spinlock_check(& sl->lock) VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(line)=99, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __key={-4294967297:0}, __this_module={4294967350:4294967346}, dev={-6:283}, i=0, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, line=99, name={-4294967330:0}, ref_cnt=0, sl={-6:2779}, sl_ldisc={-4294967301:0}, sl_ldisc_group1={-6:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={-7:0}, slip_devs={4294967297:0}, slip_maxdev=256, spinlock_check(& sl->lock)={-6:2791}, tmp___1={-6:2779}] [L6125-L6126] FCALL __raw_spin_lock_init(& sl->lock.__annonCompField19.rlock, "&(&sl->lock)->rlock", & __key) VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(line)=99, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __key={-4294967297:0}, __this_module={4294967350:4294967346}, dev={-6:283}, i=0, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, line=99, name={-4294967330:0}, ref_cnt=0, sl={-6:2779}, sl_ldisc={-4294967301:0}, sl_ldisc_group1={-6:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={-7:0}, slip_devs={4294967297:0}, slip_maxdev=256, tmp___1={-6:2779}] [L6127] sl->mode = 8U VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(line)=99, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __key={-4294967297:0}, __this_module={4294967350:4294967346}, dev={-6:283}, i=0, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, line=99, name={-4294967330:0}, ref_cnt=0, sl={-6:2779}, sl_ldisc={-4294967301:0}, sl_ldisc_group1={-6:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={-7:0}, slip_devs={4294967297:0}, slip_maxdev=256, tmp___1={-6:2779}] [L6128] CALL reg_timer_1(& sl->keepalive_timer) VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967350:4294967346}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ref_cnt=0, sl_ldisc={-4294967301:0}, sl_ldisc_group1={-6:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={-7:0}, slip_devs={4294967297:0}, slip_maxdev=256, timer={-6:2979}] [L7063] ldv_timer_list_1 = timer [L7064] ldv_timer_state_1 = 1 [L7065] return (0); VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, \result=0, __this_module={4294967350:4294967346}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, ldv_timer_list_1={-6:2979}, ldv_timer_list_2={0:0}, ldv_timer_state_1=1, ldv_timer_state_2=0, ref_cnt=0, sl_ldisc={-4294967301:0}, sl_ldisc_group1={-6:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={-7:0}, slip_devs={4294967297:0}, slip_maxdev=256, timer={-6:2979}, timer={-6:2979}] [L6128] RET reg_timer_1(& sl->keepalive_timer) VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(line)=99, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __key={-4294967297:0}, __this_module={4294967350:4294967346}, dev={-6:283}, i=0, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, ldv_timer_list_1={-6:2979}, ldv_timer_list_2={0:0}, ldv_timer_state_1=1, ldv_timer_state_2=0, line=99, name={-4294967330:0}, ref_cnt=0, reg_timer_1(& sl->keepalive_timer)=0, sl={-6:2779}, sl_ldisc={-4294967301:0}, sl_ldisc_group1={-6:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={-7:0}, slip_devs={4294967297:0}, slip_maxdev=256, tmp___1={-6:2779}] [L6129] sl->keepalive_timer.data = (unsigned long )sl [L6130] sl->keepalive_timer.function = & sl_keepalive VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(line)=99, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __key={-4294967297:0}, __this_module={4294967350:4294967346}, dev={-6:283}, i=0, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, ldv_timer_list_1={-6:2979}, ldv_timer_list_2={0:0}, ldv_timer_state_1=1, ldv_timer_state_2=0, line=99, name={-4294967330:0}, ref_cnt=0, sl={-6:2779}, sl_ldisc={-4294967301:0}, sl_ldisc_group1={-6:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={-7:0}, slip_devs={4294967297:0}, slip_maxdev=256, tmp___1={-6:2779}] [L6131] CALL reg_timer_1(& sl->outfill_timer) VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=-6, \old(ldv_timer_list_1)=2979, \old(ldv_timer_state_1)=1, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967350:4294967346}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, ldv_timer_list_1={-6:2979}, ldv_timer_list_2={0:0}, ldv_timer_state_1=1, ldv_timer_state_2=0, ref_cnt=0, sl_ldisc={-4294967301:0}, sl_ldisc_group1={-6:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={-7:0}, slip_devs={4294967297:0}, slip_maxdev=256, timer={-6:2903}] [L7063] ldv_timer_list_1 = timer [L7064] ldv_timer_state_1 = 1 [L7065] return (0); VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=2979, \old(ldv_timer_list_1)=-6, \old(ldv_timer_state_1)=1, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, \result=0, __this_module={4294967350:4294967346}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, ldv_timer_list_1={-6:2903}, ldv_timer_list_2={0:0}, ldv_timer_state_1=1, ldv_timer_state_2=0, ref_cnt=0, sl_ldisc={-4294967301:0}, sl_ldisc_group1={-6:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={-7:0}, slip_devs={4294967297:0}, slip_maxdev=256, timer={-6:2903}, timer={-6:2903}] [L6131] RET reg_timer_1(& sl->outfill_timer) VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(line)=99, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __key={-4294967297:0}, __this_module={4294967350:4294967346}, dev={-6:283}, i=0, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, ldv_timer_list_1={-6:2903}, ldv_timer_list_2={0:0}, ldv_timer_state_1=1, ldv_timer_state_2=0, line=99, name={-4294967330:0}, ref_cnt=0, reg_timer_1(& sl->outfill_timer)=0, sl={-6:2779}, sl_ldisc={-4294967301:0}, sl_ldisc_group1={-6:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={-7:0}, slip_devs={4294967297:0}, slip_maxdev=256, tmp___1={-6:2779}] [L6132] sl->outfill_timer.data = (unsigned long )sl [L6133] sl->outfill_timer.function = & sl_outfill [L6134] *(slip_devs + (unsigned long )i) = dev [L6135] return (sl); [L6135] return (sl); [L6135] return (sl); VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(line)=99, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, \result={-6:2779}, __this_module={4294967350:4294967346}, dev={-6:283}, i=0, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, ldv_timer_list_1={-6:2903}, ldv_timer_list_2={0:0}, ldv_timer_state_1=1, ldv_timer_state_2=0, line=99, ref_cnt=0, sl={-6:2779}, sl_ldisc={-4294967301:0}, sl_ldisc_group1={-6:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={-7:0}, slip_devs={4294967297:0}, slip_maxdev=256, tmp___1={-6:2779}] [L6168] RET, EXPR sl_alloc(tmp___0) VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967350:4294967346}, err=-23, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, ldv_timer_list_1={-6:2903}, ldv_timer_list_2={0:0}, ldv_timer_state_1=1, ldv_timer_state_2=0, ref_cnt=0, sl={-6:2779}, sl_alloc(tmp___0)={-6:2779}, sl_ldisc={-4294967301:0}, sl_ldisc_group1={-6:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={-7:0}, slip_devs={4294967297:0}, slip_maxdev=256, tmp=10, tmp___0=99, tty={-6:0}, tty={-6:0}] [L6168] sl = sl_alloc(tmp___0) [L6169] COND FALSE !((unsigned long )sl == (unsigned long )((struct slip *)0)) [L6173] sl->tty = tty [L6174] tty->disc_data = (void *)sl VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967350:4294967346}, err=-23, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, ldv_timer_list_1={-6:2903}, ldv_timer_list_2={0:0}, ldv_timer_state_1=1, ldv_timer_state_2=0, ref_cnt=0, sl={-6:2779}, sl_ldisc={-4294967301:0}, sl_ldisc_group1={-6:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={-7:0}, slip_devs={4294967297:0}, slip_maxdev=256, tmp=10, tmp___0=99, tty={-6:0}, tty={-6:0}] [L6175] CALL, EXPR tty_devnum(tty) VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967350:4294967346}, arg0={-6:0}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, ldv_timer_list_1={-6:2903}, ldv_timer_list_2={0:0}, ldv_timer_state_1=1, ldv_timer_state_2=0, ref_cnt=0, sl_ldisc={-4294967301:0}, sl_ldisc_group1={-6:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={-7:0}, slip_devs={4294967297:0}, slip_maxdev=256] [L7789] return __VERIFIER_nondet_uint(); [L6175] RET, EXPR tty_devnum(tty) VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967350:4294967346}, err=-23, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, ldv_timer_list_1={-6:2903}, ldv_timer_list_2={0:0}, ldv_timer_state_1=1, ldv_timer_state_2=0, ref_cnt=0, sl={-6:2779}, sl_ldisc={-4294967301:0}, sl_ldisc_group1={-6:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={-7:0}, slip_devs={4294967297:0}, slip_maxdev=256, tmp=10, tmp___0=99, tty={-6:0}, tty={-6:0}, tty_devnum(tty)=0] [L6175] sl->line = tty_devnum(tty) [L6176] CALL, EXPR get_current() VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967350:4294967346}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, ldv_timer_list_1={-6:2903}, ldv_timer_list_2={0:0}, ldv_timer_state_1=1, ldv_timer_state_2=0, ref_cnt=0, sl_ldisc={-4294967301:0}, sl_ldisc_group1={-6:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={-7:0}, slip_devs={4294967297:0}, slip_maxdev=256] [L4834] struct task_struct *pfo_ret__ ; [L4837] case 1UL: [L4840] case 2UL: [L4843] case 4UL: [L4846] case 8UL: VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967350:4294967346}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, ldv_timer_list_1={-6:2903}, ldv_timer_list_2={0:0}, ldv_timer_state_1=1, ldv_timer_state_2=0, ref_cnt=0, sl_ldisc={-4294967301:0}, sl_ldisc_group1={-6:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={-7:0}, slip_devs={4294967297:0}, slip_maxdev=256] [L4853] return (pfo_ret__); VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, \result={4294967323:0}, __this_module={4294967350:4294967346}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, ldv_timer_list_1={-6:2903}, ldv_timer_list_2={0:0}, ldv_timer_state_1=1, ldv_timer_state_2=0, pfo_ret__={4294967323:0}, ref_cnt=0, sl_ldisc={-4294967301:0}, sl_ldisc_group1={-6:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={-7:0}, slip_devs={4294967297:0}, slip_maxdev=256] [L6176] RET, EXPR get_current() VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967350:4294967346}, err=-23, get_current()={4294967323:0}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, ldv_timer_list_1={-6:2903}, ldv_timer_list_2={0:0}, ldv_timer_state_1=1, ldv_timer_state_2=0, ref_cnt=0, sl={-6:2779}, sl_ldisc={-4294967301:0}, sl_ldisc_group1={-6:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={-7:0}, slip_devs={4294967297:0}, slip_maxdev=256, tmp=10, tmp___0=99, tty={-6:0}, tty={-6:0}] [L6176] tmp___1 = get_current() [L6177] EXPR tmp___1->pid [L6177] sl->pid = tmp___1->pid [L6178] CALL, EXPR constant_test_bit(0U, (unsigned long const volatile *)(& sl->flags)) VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(nr)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967350:4294967346}, addr={-6:2887}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, ldv_timer_list_1={-6:2903}, ldv_timer_list_2={0:0}, ldv_timer_state_1=1, ldv_timer_state_2=0, ref_cnt=0, sl_ldisc={-4294967301:0}, sl_ldisc_group1={-6:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={-7:0}, slip_devs={4294967297:0}, slip_maxdev=256] [L4711] EXPR addr + (unsigned long )(nr / 64U) [L4711] return ((int )((unsigned long )*(addr + (unsigned long )(nr / 64U)) >> ((int )nr & 63)) & 1); [L6178] RET, EXPR constant_test_bit(0U, (unsigned long const volatile *)(& sl->flags)) VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967350:4294967346}, constant_test_bit(0U, (unsigned long const volatile *)(& sl->flags))=1, err=-23, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, ldv_timer_list_1={-6:2903}, ldv_timer_list_2={0:0}, ldv_timer_state_1=1, ldv_timer_state_2=0, ref_cnt=0, sl={-6:2779}, sl_ldisc={-4294967301:0}, sl_ldisc_group1={-6:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={-7:0}, slip_devs={4294967297:0}, slip_maxdev=256, tmp=10, tmp___0=99, tmp___1={4294967323:0}, tty={-6:0}, tty={-6:0}] [L6178] tmp___2 = constant_test_bit(0U, (unsigned long const volatile *)(& sl->flags)) [L6179] COND FALSE !(tmp___2 == 0) VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967350:4294967346}, err=-23, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, ldv_timer_list_1={-6:2903}, ldv_timer_list_2={0:0}, ldv_timer_state_1=1, ldv_timer_state_2=0, ref_cnt=0, sl={-6:2779}, sl_ldisc={-4294967301:0}, sl_ldisc_group1={-6:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={-7:0}, slip_devs={4294967297:0}, slip_maxdev=256, tmp=10, tmp___0=99, tmp___1={4294967323:0}, tmp___2=1, tty={-6:0}, tty={-6:0}] [L6193] EXPR sl->keepalive VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967350:4294967346}, err=-23, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, ldv_timer_list_1={-6:2903}, ldv_timer_list_2={0:0}, ldv_timer_state_1=1, ldv_timer_state_2=0, ref_cnt=0, sl={-6:2779}, sl->keepalive=0, sl_ldisc={-4294967301:0}, sl_ldisc_group1={-6:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={-7:0}, slip_devs={4294967297:0}, slip_maxdev=256, tmp=10, tmp___0=99, tmp___1={4294967323:0}, tmp___2=1, tty={-6:0}, tty={-6:0}] [L6193] COND FALSE !((unsigned int )sl->keepalive != 0U) [L6198] EXPR sl->outfill VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967350:4294967346}, err=-23, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, ldv_timer_list_1={-6:2903}, ldv_timer_list_2={0:0}, ldv_timer_state_1=1, ldv_timer_state_2=0, ref_cnt=0, sl={-6:2779}, sl->outfill=0, sl_ldisc={-4294967301:0}, sl_ldisc_group1={-6:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={-7:0}, slip_devs={4294967297:0}, slip_maxdev=256, tmp=10, tmp___0=99, tmp___1={4294967323:0}, tmp___2=1, tty={-6:0}, tty={-6:0}] [L6198] COND FALSE !((unsigned int )sl->outfill != 0U) [L6203] FCALL rtnl_unlock() VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967350:4294967346}, err=-23, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, ldv_timer_list_1={-6:2903}, ldv_timer_list_2={0:0}, ldv_timer_state_1=1, ldv_timer_state_2=0, ref_cnt=0, sl={-6:2779}, sl_ldisc={-4294967301:0}, sl_ldisc_group1={-6:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={-7:0}, slip_devs={4294967297:0}, slip_maxdev=256, tmp=10, tmp___0=99, tmp___1={4294967323:0}, tmp___2=1, tty={-6:0}, tty={-6:0}] [L6204] tty->receive_room = 65536U [L6205] EXPR sl->dev [L6205] EXPR (sl->dev)->base_addr [L6205] return ((int )(sl->dev)->base_addr); [L7639] RET, EXPR slip_open(tty) VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967350:4294967346}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, ldv_timer_list_1={-6:2903}, ldv_timer_list_2={0:0}, ldv_timer_state_1=1, ldv_timer_state_2=0, ref_cnt=0, sl_ldisc={-4294967301:0}, sl_ldisc_group1={-6:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={-7:0}, slip_devs={4294967297:0}, slip_maxdev=256, slip_open(tty)=65536, tty={-6:0}, tty={-6:0}] [L7639] tmp = slip_open(tty) [L7640] ldv_func_res = tmp VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967350:4294967346}, ldv_func_res=65536, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, ldv_timer_list_1={-6:2903}, ldv_timer_list_2={0:0}, ldv_timer_state_1=1, ldv_timer_state_2=0, ref_cnt=0, sl_ldisc={-4294967301:0}, sl_ldisc_group1={-6:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={-7:0}, slip_devs={4294967297:0}, slip_maxdev=256, tmp=65536, tty={-6:0}, tty={-6:0}] [L7641] CALL ldv_check_callback_ret_val(ldv_func_res) VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(ret_val)=65536, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967350:4294967346}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, ldv_timer_list_1={-6:2903}, ldv_timer_list_2={0:0}, ldv_timer_state_1=1, ldv_timer_state_2=0, ref_cnt=0, sl_ldisc={-4294967301:0}, sl_ldisc_group1={-6:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={-7:0}, slip_devs={4294967297:0}, slip_maxdev=256] [L7655] COND TRUE ret_val > 0 VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(ret_val)=65536, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967350:4294967346}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, ldv_timer_list_1={-6:2903}, ldv_timer_list_2={0:0}, ldv_timer_state_1=1, ldv_timer_state_2=0, ref_cnt=0, ret_val=65536, sl_ldisc={-4294967301:0}, sl_ldisc_group1={-6:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={-7:0}, slip_devs={4294967297:0}, slip_maxdev=256] [L7656] CALL ldv_error() VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967350:4294967346}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, ldv_timer_list_1={-6:2903}, ldv_timer_list_2={0:0}, ldv_timer_state_1=1, ldv_timer_state_2=0, ref_cnt=0, sl_ldisc={-4294967301:0}, sl_ldisc_group1={-6:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={-7:0}, slip_devs={4294967297:0}, slip_maxdev=256] [L7649] __VERIFIER_error() VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967350:4294967346}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, ldv_timer_list_1={-6:2903}, ldv_timer_list_2={0:0}, ldv_timer_state_1=1, ldv_timer_state_2=0, ref_cnt=0, sl_ldisc={-4294967301:0}, sl_ldisc_group1={-6:0}, sl_netdev_ops={-4294967300:0}, sl_netdev_ops_group1={-7:0}, slip_devs={4294967297:0}, slip_maxdev=256] - StatisticsResult: Ultimate Automizer benchmark data CFG has 157 procedures, 1492 locations, 1 error locations. UNSAFE Result, 155.1s OverallTime, 21 OverallIterations, 36 TraceHistogramMax, 23.3s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 37859 SDtfs, 9846 SDslu, 216268 SDs, 0 SdLazy, 8194 SolverSat, 2565 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 15.5s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 3067 GetRequests, 2861 SyntacticMatches, 6 SemanticMatches, 200 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 272 ImplicationChecksByTransitivity, 3.4s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=2808occurred in iteration=20, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 2.6s AutomataMinimizationTime, 20 MinimizatonAttempts, 68 StatesRemovedByMinimization, 13 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 1.6s SsaConstructionTime, 112.8s SatisfiabilityAnalysisTime, 6.5s InterpolantComputationTime, 9406 NumberOfCodeBlocks, 8906 NumberOfCodeBlocksAsserted, 45 NumberOfCheckSat, 9004 ConstructedInterpolants, 0 QuantifiedInterpolants, 3626540 SizeOfPredicates, 17 NumberOfNonLiveVariables, 18051 ConjunctsInSsa, 146 ConjunctsInUnsatCore, 28 InterpolantComputations, 13 PerfectInterpolantSequences, 15698/16850 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate could not prove your program: unable to determine feasibility of some traces Received shutdown request...