java -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata ./data -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/default/automizer/svcomp-Reach-32bit-Automizer_Default.epf -i ../../../trunk/examples/svcomp/systemc/transmitter.02.cil.c -------------------------------------------------------------------------------- This is Ultimate 0.1.24-673a906-m [2019-10-02 16:21:15,531 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-10-02 16:21:15,533 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-10-02 16:21:15,545 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-10-02 16:21:15,545 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-10-02 16:21:15,547 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-10-02 16:21:15,548 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-10-02 16:21:15,550 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-10-02 16:21:15,551 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-10-02 16:21:15,552 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-10-02 16:21:15,553 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-10-02 16:21:15,554 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-10-02 16:21:15,554 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-10-02 16:21:15,555 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-10-02 16:21:15,556 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-10-02 16:21:15,557 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-10-02 16:21:15,558 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-10-02 16:21:15,559 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-10-02 16:21:15,560 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-10-02 16:21:15,562 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-10-02 16:21:15,564 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-10-02 16:21:15,565 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-10-02 16:21:15,565 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-10-02 16:21:15,566 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-10-02 16:21:15,568 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-10-02 16:21:15,568 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-10-02 16:21:15,569 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-10-02 16:21:15,569 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-10-02 16:21:15,570 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-10-02 16:21:15,571 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-10-02 16:21:15,571 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-10-02 16:21:15,572 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-10-02 16:21:15,573 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-10-02 16:21:15,573 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-10-02 16:21:15,574 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-10-02 16:21:15,574 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-10-02 16:21:15,575 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-10-02 16:21:15,575 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-10-02 16:21:15,576 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-10-02 16:21:15,577 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-10-02 16:21:15,577 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-10-02 16:21:15,578 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/default/automizer/svcomp-Reach-32bit-Automizer_Default.epf [2019-10-02 16:21:15,592 INFO L113 SettingsManager]: Loading preferences was successful [2019-10-02 16:21:15,592 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-10-02 16:21:15,594 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-10-02 16:21:15,594 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-10-02 16:21:15,594 INFO L138 SettingsManager]: * Use SBE=true [2019-10-02 16:21:15,595 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-10-02 16:21:15,595 INFO L138 SettingsManager]: * sizeof long=4 [2019-10-02 16:21:15,595 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-10-02 16:21:15,595 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-10-02 16:21:15,595 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-10-02 16:21:15,596 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-10-02 16:21:15,596 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-10-02 16:21:15,596 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-10-02 16:21:15,596 INFO L138 SettingsManager]: * sizeof long double=12 [2019-10-02 16:21:15,596 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-10-02 16:21:15,597 INFO L138 SettingsManager]: * Use constant arrays=true [2019-10-02 16:21:15,597 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-10-02 16:21:15,597 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-10-02 16:21:15,597 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-10-02 16:21:15,597 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-10-02 16:21:15,598 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-10-02 16:21:15,598 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-10-02 16:21:15,598 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-10-02 16:21:15,598 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-10-02 16:21:15,599 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-10-02 16:21:15,599 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-10-02 16:21:15,599 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-10-02 16:21:15,599 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-10-02 16:21:15,599 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2019-10-02 16:21:15,630 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-10-02 16:21:15,643 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-10-02 16:21:15,647 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-10-02 16:21:15,648 INFO L271 PluginConnector]: Initializing CDTParser... [2019-10-02 16:21:15,649 INFO L275 PluginConnector]: CDTParser initialized [2019-10-02 16:21:15,649 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/systemc/transmitter.02.cil.c [2019-10-02 16:21:15,710 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/62bc67e87/56ba7b0a9af343bb825820225e682f08/FLAGb17517ad3 [2019-10-02 16:21:16,198 INFO L306 CDTParser]: Found 1 translation units. [2019-10-02 16:21:16,199 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/systemc/transmitter.02.cil.c [2019-10-02 16:21:16,218 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/62bc67e87/56ba7b0a9af343bb825820225e682f08/FLAGb17517ad3 [2019-10-02 16:21:16,506 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/62bc67e87/56ba7b0a9af343bb825820225e682f08 [2019-10-02 16:21:16,516 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-10-02 16:21:16,518 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2019-10-02 16:21:16,519 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-10-02 16:21:16,519 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-10-02 16:21:16,524 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-10-02 16:21:16,525 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 02.10 04:21:16" (1/1) ... [2019-10-02 16:21:16,528 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@5287bcf9 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.10 04:21:16, skipping insertion in model container [2019-10-02 16:21:16,528 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 02.10 04:21:16" (1/1) ... [2019-10-02 16:21:16,535 INFO L142 MainTranslator]: Starting translation in SV-COMP mode [2019-10-02 16:21:16,590 INFO L173 MainTranslator]: Built tables and reachable declarations [2019-10-02 16:21:16,812 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-10-02 16:21:16,819 INFO L188 MainTranslator]: Completed pre-run [2019-10-02 16:21:16,981 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-10-02 16:21:17,004 INFO L192 MainTranslator]: Completed translation [2019-10-02 16:21:17,005 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.10 04:21:17 WrapperNode [2019-10-02 16:21:17,005 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-10-02 16:21:17,005 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-10-02 16:21:17,005 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-10-02 16:21:17,006 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-10-02 16:21:17,019 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.10 04:21:17" (1/1) ... [2019-10-02 16:21:17,020 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.10 04:21:17" (1/1) ... [2019-10-02 16:21:17,029 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.10 04:21:17" (1/1) ... [2019-10-02 16:21:17,029 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.10 04:21:17" (1/1) ... [2019-10-02 16:21:17,039 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.10 04:21:17" (1/1) ... [2019-10-02 16:21:17,050 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.10 04:21:17" (1/1) ... [2019-10-02 16:21:17,052 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.10 04:21:17" (1/1) ... [2019-10-02 16:21:17,056 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-10-02 16:21:17,057 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-10-02 16:21:17,057 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-10-02 16:21:17,057 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-10-02 16:21:17,058 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.10 04:21:17" (1/1) ... No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-10-02 16:21:17,113 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2019-10-02 16:21:17,113 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-10-02 16:21:17,113 INFO L138 BoogieDeclarations]: Found implementation of procedure error [2019-10-02 16:21:17,113 INFO L138 BoogieDeclarations]: Found implementation of procedure master [2019-10-02 16:21:17,114 INFO L138 BoogieDeclarations]: Found implementation of procedure transmit1 [2019-10-02 16:21:17,114 INFO L138 BoogieDeclarations]: Found implementation of procedure transmit2 [2019-10-02 16:21:17,114 INFO L138 BoogieDeclarations]: Found implementation of procedure is_master_triggered [2019-10-02 16:21:17,114 INFO L138 BoogieDeclarations]: Found implementation of procedure is_transmit1_triggered [2019-10-02 16:21:17,114 INFO L138 BoogieDeclarations]: Found implementation of procedure is_transmit2_triggered [2019-10-02 16:21:17,114 INFO L138 BoogieDeclarations]: Found implementation of procedure update_channels [2019-10-02 16:21:17,115 INFO L138 BoogieDeclarations]: Found implementation of procedure init_threads [2019-10-02 16:21:17,115 INFO L138 BoogieDeclarations]: Found implementation of procedure exists_runnable_thread [2019-10-02 16:21:17,115 INFO L138 BoogieDeclarations]: Found implementation of procedure eval [2019-10-02 16:21:17,115 INFO L138 BoogieDeclarations]: Found implementation of procedure fire_delta_events [2019-10-02 16:21:17,115 INFO L138 BoogieDeclarations]: Found implementation of procedure reset_delta_events [2019-10-02 16:21:17,115 INFO L138 BoogieDeclarations]: Found implementation of procedure activate_threads [2019-10-02 16:21:17,116 INFO L138 BoogieDeclarations]: Found implementation of procedure immediate_notify [2019-10-02 16:21:17,116 INFO L138 BoogieDeclarations]: Found implementation of procedure fire_time_events [2019-10-02 16:21:17,116 INFO L138 BoogieDeclarations]: Found implementation of procedure reset_time_events [2019-10-02 16:21:17,116 INFO L138 BoogieDeclarations]: Found implementation of procedure init_model [2019-10-02 16:21:17,116 INFO L138 BoogieDeclarations]: Found implementation of procedure stop_simulation [2019-10-02 16:21:17,117 INFO L138 BoogieDeclarations]: Found implementation of procedure start_simulation [2019-10-02 16:21:17,117 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2019-10-02 16:21:17,117 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_error [2019-10-02 16:21:17,117 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_int [2019-10-02 16:21:17,117 INFO L130 BoogieDeclarations]: Found specification of procedure error [2019-10-02 16:21:17,117 INFO L130 BoogieDeclarations]: Found specification of procedure is_master_triggered [2019-10-02 16:21:17,118 INFO L130 BoogieDeclarations]: Found specification of procedure is_transmit1_triggered [2019-10-02 16:21:17,118 INFO L130 BoogieDeclarations]: Found specification of procedure is_transmit2_triggered [2019-10-02 16:21:17,118 INFO L130 BoogieDeclarations]: Found specification of procedure immediate_notify [2019-10-02 16:21:17,118 INFO L130 BoogieDeclarations]: Found specification of procedure master [2019-10-02 16:21:17,118 INFO L130 BoogieDeclarations]: Found specification of procedure transmit1 [2019-10-02 16:21:17,118 INFO L130 BoogieDeclarations]: Found specification of procedure transmit2 [2019-10-02 16:21:17,118 INFO L130 BoogieDeclarations]: Found specification of procedure update_channels [2019-10-02 16:21:17,119 INFO L130 BoogieDeclarations]: Found specification of procedure init_threads [2019-10-02 16:21:17,119 INFO L130 BoogieDeclarations]: Found specification of procedure exists_runnable_thread [2019-10-02 16:21:17,119 INFO L130 BoogieDeclarations]: Found specification of procedure eval [2019-10-02 16:21:17,119 INFO L130 BoogieDeclarations]: Found specification of procedure fire_delta_events [2019-10-02 16:21:17,119 INFO L130 BoogieDeclarations]: Found specification of procedure reset_delta_events [2019-10-02 16:21:17,119 INFO L130 BoogieDeclarations]: Found specification of procedure activate_threads [2019-10-02 16:21:17,120 INFO L130 BoogieDeclarations]: Found specification of procedure fire_time_events [2019-10-02 16:21:17,120 INFO L130 BoogieDeclarations]: Found specification of procedure reset_time_events [2019-10-02 16:21:17,120 INFO L130 BoogieDeclarations]: Found specification of procedure init_model [2019-10-02 16:21:17,120 INFO L130 BoogieDeclarations]: Found specification of procedure stop_simulation [2019-10-02 16:21:17,120 INFO L130 BoogieDeclarations]: Found specification of procedure start_simulation [2019-10-02 16:21:17,120 INFO L130 BoogieDeclarations]: Found specification of procedure main [2019-10-02 16:21:17,121 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2019-10-02 16:21:17,121 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-10-02 16:21:17,669 INFO L278 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-10-02 16:21:17,670 INFO L283 CfgBuilder]: Removed 6 assume(true) statements. [2019-10-02 16:21:17,671 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 02.10 04:21:17 BoogieIcfgContainer [2019-10-02 16:21:17,671 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-10-02 16:21:17,672 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-10-02 16:21:17,672 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-10-02 16:21:17,676 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-10-02 16:21:17,676 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 02.10 04:21:16" (1/3) ... [2019-10-02 16:21:17,677 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@7f556e62 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 02.10 04:21:17, skipping insertion in model container [2019-10-02 16:21:17,677 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.10 04:21:17" (2/3) ... [2019-10-02 16:21:17,677 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@7f556e62 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 02.10 04:21:17, skipping insertion in model container [2019-10-02 16:21:17,678 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 02.10 04:21:17" (3/3) ... [2019-10-02 16:21:17,679 INFO L109 eAbstractionObserver]: Analyzing ICFG transmitter.02.cil.c [2019-10-02 16:21:17,689 INFO L152 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-10-02 16:21:17,697 INFO L164 ceAbstractionStarter]: Appying trace abstraction to program that has 1 error locations. [2019-10-02 16:21:17,714 INFO L252 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2019-10-02 16:21:17,747 INFO L128 ementStrategyFactory]: Using default assertion order modulation [2019-10-02 16:21:17,748 INFO L377 AbstractCegarLoop]: Interprodecural is true [2019-10-02 16:21:17,748 INFO L378 AbstractCegarLoop]: Hoare is true [2019-10-02 16:21:17,748 INFO L379 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-10-02 16:21:17,749 INFO L380 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-10-02 16:21:17,749 INFO L381 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-10-02 16:21:17,749 INFO L382 AbstractCegarLoop]: Difference is false [2019-10-02 16:21:17,749 INFO L383 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-10-02 16:21:17,749 INFO L388 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-10-02 16:21:17,770 INFO L276 IsEmpty]: Start isEmpty. Operand 169 states. [2019-10-02 16:21:17,780 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 91 [2019-10-02 16:21:17,781 INFO L403 BasicCegarLoop]: Found error trace [2019-10-02 16:21:17,782 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-02 16:21:17,784 INFO L418 AbstractCegarLoop]: === Iteration 1 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-02 16:21:17,788 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-02 16:21:17,789 INFO L82 PathProgramCache]: Analyzing trace with hash 1996614335, now seen corresponding path program 1 times [2019-10-02 16:21:17,790 INFO L224 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-10-02 16:21:17,791 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-10-02 16:21:17,843 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-02 16:21:17,843 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-02 16:21:17,844 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-02 16:21:17,918 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-02 16:21:18,111 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-10-02 16:21:18,114 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-10-02 16:21:18,114 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-10-02 16:21:18,121 INFO L454 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-10-02 16:21:18,137 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-10-02 16:21:18,138 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-10-02 16:21:18,140 INFO L87 Difference]: Start difference. First operand 169 states. Second operand 4 states. [2019-10-02 16:21:18,438 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-02 16:21:18,439 INFO L93 Difference]: Finished difference Result 320 states and 454 transitions. [2019-10-02 16:21:18,440 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-10-02 16:21:18,441 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 90 [2019-10-02 16:21:18,442 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-02 16:21:18,464 INFO L225 Difference]: With dead ends: 320 [2019-10-02 16:21:18,464 INFO L226 Difference]: Without dead ends: 160 [2019-10-02 16:21:18,475 INFO L640 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-10-02 16:21:18,496 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 160 states. [2019-10-02 16:21:18,573 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 160 to 160. [2019-10-02 16:21:18,574 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 160 states. [2019-10-02 16:21:18,591 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 160 states to 160 states and 212 transitions. [2019-10-02 16:21:18,593 INFO L78 Accepts]: Start accepts. Automaton has 160 states and 212 transitions. Word has length 90 [2019-10-02 16:21:18,595 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-02 16:21:18,595 INFO L475 AbstractCegarLoop]: Abstraction has 160 states and 212 transitions. [2019-10-02 16:21:18,595 INFO L476 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-10-02 16:21:18,595 INFO L276 IsEmpty]: Start isEmpty. Operand 160 states and 212 transitions. [2019-10-02 16:21:18,599 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 91 [2019-10-02 16:21:18,600 INFO L403 BasicCegarLoop]: Found error trace [2019-10-02 16:21:18,600 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-02 16:21:18,600 INFO L418 AbstractCegarLoop]: === Iteration 2 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-02 16:21:18,601 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-02 16:21:18,601 INFO L82 PathProgramCache]: Analyzing trace with hash -387310403, now seen corresponding path program 1 times [2019-10-02 16:21:18,601 INFO L224 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-10-02 16:21:18,602 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-10-02 16:21:18,603 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-02 16:21:18,604 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-02 16:21:18,604 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-02 16:21:18,637 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-02 16:21:18,756 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-10-02 16:21:18,757 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-10-02 16:21:18,757 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-10-02 16:21:18,760 INFO L454 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-10-02 16:21:18,761 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-10-02 16:21:18,761 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-10-02 16:21:18,761 INFO L87 Difference]: Start difference. First operand 160 states and 212 transitions. Second operand 5 states. [2019-10-02 16:21:19,250 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-02 16:21:19,251 INFO L93 Difference]: Finished difference Result 328 states and 450 transitions. [2019-10-02 16:21:19,251 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-10-02 16:21:19,251 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 90 [2019-10-02 16:21:19,252 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-02 16:21:19,255 INFO L225 Difference]: With dead ends: 328 [2019-10-02 16:21:19,255 INFO L226 Difference]: Without dead ends: 188 [2019-10-02 16:21:19,257 INFO L640 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-10-02 16:21:19,257 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 188 states. [2019-10-02 16:21:19,297 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 188 to 160. [2019-10-02 16:21:19,297 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 160 states. [2019-10-02 16:21:19,300 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 160 states to 160 states and 211 transitions. [2019-10-02 16:21:19,300 INFO L78 Accepts]: Start accepts. Automaton has 160 states and 211 transitions. Word has length 90 [2019-10-02 16:21:19,300 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-02 16:21:19,301 INFO L475 AbstractCegarLoop]: Abstraction has 160 states and 211 transitions. [2019-10-02 16:21:19,301 INFO L476 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-10-02 16:21:19,301 INFO L276 IsEmpty]: Start isEmpty. Operand 160 states and 211 transitions. [2019-10-02 16:21:19,305 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 91 [2019-10-02 16:21:19,305 INFO L403 BasicCegarLoop]: Found error trace [2019-10-02 16:21:19,305 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-02 16:21:19,306 INFO L418 AbstractCegarLoop]: === Iteration 3 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-02 16:21:19,306 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-02 16:21:19,306 INFO L82 PathProgramCache]: Analyzing trace with hash 566629755, now seen corresponding path program 1 times [2019-10-02 16:21:19,310 INFO L224 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-10-02 16:21:19,310 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-10-02 16:21:19,311 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-02 16:21:19,311 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-02 16:21:19,312 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-02 16:21:19,361 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-02 16:21:19,457 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-10-02 16:21:19,457 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-10-02 16:21:19,458 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-10-02 16:21:19,461 INFO L454 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-10-02 16:21:19,461 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-10-02 16:21:19,462 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-10-02 16:21:19,462 INFO L87 Difference]: Start difference. First operand 160 states and 211 transitions. Second operand 5 states. [2019-10-02 16:21:19,911 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-02 16:21:19,912 INFO L93 Difference]: Finished difference Result 328 states and 449 transitions. [2019-10-02 16:21:19,912 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-10-02 16:21:19,912 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 90 [2019-10-02 16:21:19,913 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-02 16:21:19,915 INFO L225 Difference]: With dead ends: 328 [2019-10-02 16:21:19,915 INFO L226 Difference]: Without dead ends: 188 [2019-10-02 16:21:19,916 INFO L640 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-10-02 16:21:19,919 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 188 states. [2019-10-02 16:21:19,953 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 188 to 160. [2019-10-02 16:21:19,954 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 160 states. [2019-10-02 16:21:19,955 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 160 states to 160 states and 210 transitions. [2019-10-02 16:21:19,955 INFO L78 Accepts]: Start accepts. Automaton has 160 states and 210 transitions. Word has length 90 [2019-10-02 16:21:19,956 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-02 16:21:19,956 INFO L475 AbstractCegarLoop]: Abstraction has 160 states and 210 transitions. [2019-10-02 16:21:19,958 INFO L476 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-10-02 16:21:19,958 INFO L276 IsEmpty]: Start isEmpty. Operand 160 states and 210 transitions. [2019-10-02 16:21:19,960 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 91 [2019-10-02 16:21:19,960 INFO L403 BasicCegarLoop]: Found error trace [2019-10-02 16:21:19,962 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-02 16:21:19,962 INFO L418 AbstractCegarLoop]: === Iteration 4 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-02 16:21:19,962 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-02 16:21:19,962 INFO L82 PathProgramCache]: Analyzing trace with hash -649523971, now seen corresponding path program 1 times [2019-10-02 16:21:19,963 INFO L224 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-10-02 16:21:19,963 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-10-02 16:21:19,964 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-02 16:21:19,965 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-02 16:21:19,965 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-02 16:21:19,980 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-02 16:21:20,043 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-10-02 16:21:20,043 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-10-02 16:21:20,043 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-10-02 16:21:20,044 INFO L454 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-10-02 16:21:20,044 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-10-02 16:21:20,045 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-10-02 16:21:20,045 INFO L87 Difference]: Start difference. First operand 160 states and 210 transitions. Second operand 5 states. [2019-10-02 16:21:20,402 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-02 16:21:20,402 INFO L93 Difference]: Finished difference Result 326 states and 443 transitions. [2019-10-02 16:21:20,403 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-10-02 16:21:20,403 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 90 [2019-10-02 16:21:20,403 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-02 16:21:20,405 INFO L225 Difference]: With dead ends: 326 [2019-10-02 16:21:20,405 INFO L226 Difference]: Without dead ends: 186 [2019-10-02 16:21:20,406 INFO L640 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-10-02 16:21:20,407 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 186 states. [2019-10-02 16:21:20,423 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 186 to 160. [2019-10-02 16:21:20,423 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 160 states. [2019-10-02 16:21:20,425 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 160 states to 160 states and 209 transitions. [2019-10-02 16:21:20,425 INFO L78 Accepts]: Start accepts. Automaton has 160 states and 209 transitions. Word has length 90 [2019-10-02 16:21:20,425 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-02 16:21:20,425 INFO L475 AbstractCegarLoop]: Abstraction has 160 states and 209 transitions. [2019-10-02 16:21:20,426 INFO L476 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-10-02 16:21:20,426 INFO L276 IsEmpty]: Start isEmpty. Operand 160 states and 209 transitions. [2019-10-02 16:21:20,427 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 91 [2019-10-02 16:21:20,427 INFO L403 BasicCegarLoop]: Found error trace [2019-10-02 16:21:20,427 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-02 16:21:20,428 INFO L418 AbstractCegarLoop]: === Iteration 5 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-02 16:21:20,428 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-02 16:21:20,428 INFO L82 PathProgramCache]: Analyzing trace with hash -1381491397, now seen corresponding path program 1 times [2019-10-02 16:21:20,428 INFO L224 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-10-02 16:21:20,428 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-10-02 16:21:20,430 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-02 16:21:20,430 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-02 16:21:20,430 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-02 16:21:20,454 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-02 16:21:20,553 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-10-02 16:21:20,554 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-10-02 16:21:20,554 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-10-02 16:21:20,554 INFO L454 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-10-02 16:21:20,555 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-10-02 16:21:20,556 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-10-02 16:21:20,556 INFO L87 Difference]: Start difference. First operand 160 states and 209 transitions. Second operand 5 states. [2019-10-02 16:21:20,912 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-02 16:21:20,913 INFO L93 Difference]: Finished difference Result 341 states and 465 transitions. [2019-10-02 16:21:20,913 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-10-02 16:21:20,913 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 90 [2019-10-02 16:21:20,913 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-02 16:21:20,915 INFO L225 Difference]: With dead ends: 341 [2019-10-02 16:21:20,915 INFO L226 Difference]: Without dead ends: 201 [2019-10-02 16:21:20,916 INFO L640 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-10-02 16:21:20,917 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 201 states. [2019-10-02 16:21:20,934 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 201 to 160. [2019-10-02 16:21:20,934 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 160 states. [2019-10-02 16:21:20,935 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 160 states to 160 states and 208 transitions. [2019-10-02 16:21:20,936 INFO L78 Accepts]: Start accepts. Automaton has 160 states and 208 transitions. Word has length 90 [2019-10-02 16:21:20,936 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-02 16:21:20,936 INFO L475 AbstractCegarLoop]: Abstraction has 160 states and 208 transitions. [2019-10-02 16:21:20,936 INFO L476 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-10-02 16:21:20,936 INFO L276 IsEmpty]: Start isEmpty. Operand 160 states and 208 transitions. [2019-10-02 16:21:20,937 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 91 [2019-10-02 16:21:20,937 INFO L403 BasicCegarLoop]: Found error trace [2019-10-02 16:21:20,938 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-02 16:21:20,938 INFO L418 AbstractCegarLoop]: === Iteration 6 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-02 16:21:20,938 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-02 16:21:20,938 INFO L82 PathProgramCache]: Analyzing trace with hash -1435884295, now seen corresponding path program 1 times [2019-10-02 16:21:20,938 INFO L224 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-10-02 16:21:20,938 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-10-02 16:21:20,940 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-02 16:21:20,940 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-02 16:21:20,940 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-02 16:21:20,951 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-02 16:21:20,991 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-10-02 16:21:20,992 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-10-02 16:21:20,992 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-10-02 16:21:20,993 INFO L454 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-10-02 16:21:20,993 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-10-02 16:21:20,993 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-10-02 16:21:20,993 INFO L87 Difference]: Start difference. First operand 160 states and 208 transitions. Second operand 6 states. [2019-10-02 16:21:21,032 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-02 16:21:21,032 INFO L93 Difference]: Finished difference Result 312 states and 420 transitions. [2019-10-02 16:21:21,032 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-10-02 16:21:21,033 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 90 [2019-10-02 16:21:21,033 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-02 16:21:21,035 INFO L225 Difference]: With dead ends: 312 [2019-10-02 16:21:21,035 INFO L226 Difference]: Without dead ends: 173 [2019-10-02 16:21:21,036 INFO L640 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2019-10-02 16:21:21,036 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 173 states. [2019-10-02 16:21:21,050 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 173 to 165. [2019-10-02 16:21:21,050 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 165 states. [2019-10-02 16:21:21,052 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 165 states to 165 states and 213 transitions. [2019-10-02 16:21:21,052 INFO L78 Accepts]: Start accepts. Automaton has 165 states and 213 transitions. Word has length 90 [2019-10-02 16:21:21,053 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-02 16:21:21,053 INFO L475 AbstractCegarLoop]: Abstraction has 165 states and 213 transitions. [2019-10-02 16:21:21,053 INFO L476 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-10-02 16:21:21,053 INFO L276 IsEmpty]: Start isEmpty. Operand 165 states and 213 transitions. [2019-10-02 16:21:21,054 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 91 [2019-10-02 16:21:21,054 INFO L403 BasicCegarLoop]: Found error trace [2019-10-02 16:21:21,054 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-02 16:21:21,055 INFO L418 AbstractCegarLoop]: === Iteration 7 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-02 16:21:21,055 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-02 16:21:21,055 INFO L82 PathProgramCache]: Analyzing trace with hash 830496891, now seen corresponding path program 1 times [2019-10-02 16:21:21,055 INFO L224 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-10-02 16:21:21,055 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-10-02 16:21:21,056 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-02 16:21:21,056 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-02 16:21:21,057 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-02 16:21:21,075 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-02 16:21:21,122 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-10-02 16:21:21,122 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-10-02 16:21:21,122 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-10-02 16:21:21,123 INFO L454 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-10-02 16:21:21,123 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-10-02 16:21:21,123 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-10-02 16:21:21,124 INFO L87 Difference]: Start difference. First operand 165 states and 213 transitions. Second operand 6 states. [2019-10-02 16:21:21,164 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-02 16:21:21,164 INFO L93 Difference]: Finished difference Result 319 states and 425 transitions. [2019-10-02 16:21:21,166 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-10-02 16:21:21,166 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 90 [2019-10-02 16:21:21,167 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-02 16:21:21,170 INFO L225 Difference]: With dead ends: 319 [2019-10-02 16:21:21,170 INFO L226 Difference]: Without dead ends: 175 [2019-10-02 16:21:21,172 INFO L640 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2019-10-02 16:21:21,173 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 175 states. [2019-10-02 16:21:21,191 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 175 to 170. [2019-10-02 16:21:21,192 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 170 states. [2019-10-02 16:21:21,194 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 170 states to 170 states and 218 transitions. [2019-10-02 16:21:21,195 INFO L78 Accepts]: Start accepts. Automaton has 170 states and 218 transitions. Word has length 90 [2019-10-02 16:21:21,195 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-02 16:21:21,195 INFO L475 AbstractCegarLoop]: Abstraction has 170 states and 218 transitions. [2019-10-02 16:21:21,195 INFO L476 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-10-02 16:21:21,195 INFO L276 IsEmpty]: Start isEmpty. Operand 170 states and 218 transitions. [2019-10-02 16:21:21,197 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 91 [2019-10-02 16:21:21,197 INFO L403 BasicCegarLoop]: Found error trace [2019-10-02 16:21:21,197 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-02 16:21:21,198 INFO L418 AbstractCegarLoop]: === Iteration 8 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-02 16:21:21,198 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-02 16:21:21,198 INFO L82 PathProgramCache]: Analyzing trace with hash 1078643385, now seen corresponding path program 1 times [2019-10-02 16:21:21,199 INFO L224 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-10-02 16:21:21,199 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-10-02 16:21:21,200 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-02 16:21:21,200 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-02 16:21:21,201 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-02 16:21:21,230 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-02 16:21:21,282 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-10-02 16:21:21,282 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-10-02 16:21:21,283 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-10-02 16:21:21,283 INFO L454 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-10-02 16:21:21,283 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-10-02 16:21:21,284 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-10-02 16:21:21,284 INFO L87 Difference]: Start difference. First operand 170 states and 218 transitions. Second operand 6 states. [2019-10-02 16:21:21,321 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-02 16:21:21,321 INFO L93 Difference]: Finished difference Result 326 states and 430 transitions. [2019-10-02 16:21:21,322 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-10-02 16:21:21,322 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 90 [2019-10-02 16:21:21,322 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-02 16:21:21,324 INFO L225 Difference]: With dead ends: 326 [2019-10-02 16:21:21,324 INFO L226 Difference]: Without dead ends: 177 [2019-10-02 16:21:21,325 INFO L640 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2019-10-02 16:21:21,326 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 177 states. [2019-10-02 16:21:21,340 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 177 to 175. [2019-10-02 16:21:21,341 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 175 states. [2019-10-02 16:21:21,342 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 175 states to 175 states and 223 transitions. [2019-10-02 16:21:21,342 INFO L78 Accepts]: Start accepts. Automaton has 175 states and 223 transitions. Word has length 90 [2019-10-02 16:21:21,343 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-02 16:21:21,343 INFO L475 AbstractCegarLoop]: Abstraction has 175 states and 223 transitions. [2019-10-02 16:21:21,343 INFO L476 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-10-02 16:21:21,343 INFO L276 IsEmpty]: Start isEmpty. Operand 175 states and 223 transitions. [2019-10-02 16:21:21,344 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 91 [2019-10-02 16:21:21,344 INFO L403 BasicCegarLoop]: Found error trace [2019-10-02 16:21:21,345 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-02 16:21:21,345 INFO L418 AbstractCegarLoop]: === Iteration 9 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-02 16:21:21,345 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-02 16:21:21,345 INFO L82 PathProgramCache]: Analyzing trace with hash 1006256827, now seen corresponding path program 1 times [2019-10-02 16:21:21,346 INFO L224 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-10-02 16:21:21,346 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-10-02 16:21:21,347 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-02 16:21:21,347 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-02 16:21:21,347 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-02 16:21:21,359 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-02 16:21:21,410 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-10-02 16:21:21,411 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-10-02 16:21:21,411 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-10-02 16:21:21,411 INFO L454 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-10-02 16:21:21,411 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-10-02 16:21:21,412 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-10-02 16:21:21,412 INFO L87 Difference]: Start difference. First operand 175 states and 223 transitions. Second operand 5 states. [2019-10-02 16:21:21,884 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-02 16:21:21,884 INFO L93 Difference]: Finished difference Result 428 states and 564 transitions. [2019-10-02 16:21:21,884 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-10-02 16:21:21,884 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 90 [2019-10-02 16:21:21,885 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-02 16:21:21,887 INFO L225 Difference]: With dead ends: 428 [2019-10-02 16:21:21,887 INFO L226 Difference]: Without dead ends: 274 [2019-10-02 16:21:21,888 INFO L640 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 5 SyntacticMatches, 3 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2019-10-02 16:21:21,889 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 274 states. [2019-10-02 16:21:21,907 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 274 to 226. [2019-10-02 16:21:21,907 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 226 states. [2019-10-02 16:21:21,909 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 226 states to 226 states and 286 transitions. [2019-10-02 16:21:21,909 INFO L78 Accepts]: Start accepts. Automaton has 226 states and 286 transitions. Word has length 90 [2019-10-02 16:21:21,910 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-02 16:21:21,910 INFO L475 AbstractCegarLoop]: Abstraction has 226 states and 286 transitions. [2019-10-02 16:21:21,910 INFO L476 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-10-02 16:21:21,910 INFO L276 IsEmpty]: Start isEmpty. Operand 226 states and 286 transitions. [2019-10-02 16:21:21,911 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 91 [2019-10-02 16:21:21,911 INFO L403 BasicCegarLoop]: Found error trace [2019-10-02 16:21:21,912 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-02 16:21:21,912 INFO L418 AbstractCegarLoop]: === Iteration 10 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-02 16:21:21,912 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-02 16:21:21,912 INFO L82 PathProgramCache]: Analyzing trace with hash -1902507075, now seen corresponding path program 1 times [2019-10-02 16:21:21,912 INFO L224 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-10-02 16:21:21,913 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-10-02 16:21:21,914 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-02 16:21:21,914 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-02 16:21:21,914 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-02 16:21:21,925 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-02 16:21:21,969 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-10-02 16:21:21,969 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-10-02 16:21:21,970 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-10-02 16:21:21,970 INFO L454 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-10-02 16:21:21,970 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-10-02 16:21:21,971 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-10-02 16:21:21,971 INFO L87 Difference]: Start difference. First operand 226 states and 286 transitions. Second operand 5 states. [2019-10-02 16:21:22,398 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-02 16:21:22,399 INFO L93 Difference]: Finished difference Result 430 states and 549 transitions. [2019-10-02 16:21:22,399 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-10-02 16:21:22,399 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 90 [2019-10-02 16:21:22,400 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-02 16:21:22,401 INFO L225 Difference]: With dead ends: 430 [2019-10-02 16:21:22,402 INFO L226 Difference]: Without dead ends: 226 [2019-10-02 16:21:22,403 INFO L640 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 7 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-10-02 16:21:22,403 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 226 states. [2019-10-02 16:21:22,420 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 226 to 226. [2019-10-02 16:21:22,420 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 226 states. [2019-10-02 16:21:22,422 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 226 states to 226 states and 283 transitions. [2019-10-02 16:21:22,422 INFO L78 Accepts]: Start accepts. Automaton has 226 states and 283 transitions. Word has length 90 [2019-10-02 16:21:22,423 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-02 16:21:22,423 INFO L475 AbstractCegarLoop]: Abstraction has 226 states and 283 transitions. [2019-10-02 16:21:22,423 INFO L476 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-10-02 16:21:22,423 INFO L276 IsEmpty]: Start isEmpty. Operand 226 states and 283 transitions. [2019-10-02 16:21:22,424 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 91 [2019-10-02 16:21:22,424 INFO L403 BasicCegarLoop]: Found error trace [2019-10-02 16:21:22,424 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-02 16:21:22,425 INFO L418 AbstractCegarLoop]: === Iteration 11 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-02 16:21:22,425 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-02 16:21:22,425 INFO L82 PathProgramCache]: Analyzing trace with hash 1882987131, now seen corresponding path program 1 times [2019-10-02 16:21:22,425 INFO L224 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-10-02 16:21:22,425 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-10-02 16:21:22,427 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-02 16:21:22,427 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-02 16:21:22,427 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-02 16:21:22,440 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-02 16:21:22,504 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-10-02 16:21:22,505 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-10-02 16:21:22,505 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-10-02 16:21:22,506 INFO L454 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-10-02 16:21:22,506 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-10-02 16:21:22,506 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-10-02 16:21:22,507 INFO L87 Difference]: Start difference. First operand 226 states and 283 transitions. Second operand 5 states. [2019-10-02 16:21:22,888 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-02 16:21:22,888 INFO L93 Difference]: Finished difference Result 430 states and 543 transitions. [2019-10-02 16:21:22,888 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-10-02 16:21:22,889 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 90 [2019-10-02 16:21:22,889 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-02 16:21:22,891 INFO L225 Difference]: With dead ends: 430 [2019-10-02 16:21:22,891 INFO L226 Difference]: Without dead ends: 226 [2019-10-02 16:21:22,892 INFO L640 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 4 SyntacticMatches, 3 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-10-02 16:21:22,893 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 226 states. [2019-10-02 16:21:22,913 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 226 to 226. [2019-10-02 16:21:22,913 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 226 states. [2019-10-02 16:21:22,915 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 226 states to 226 states and 280 transitions. [2019-10-02 16:21:22,915 INFO L78 Accepts]: Start accepts. Automaton has 226 states and 280 transitions. Word has length 90 [2019-10-02 16:21:22,916 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-02 16:21:22,916 INFO L475 AbstractCegarLoop]: Abstraction has 226 states and 280 transitions. [2019-10-02 16:21:22,916 INFO L476 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-10-02 16:21:22,916 INFO L276 IsEmpty]: Start isEmpty. Operand 226 states and 280 transitions. [2019-10-02 16:21:22,917 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 91 [2019-10-02 16:21:22,917 INFO L403 BasicCegarLoop]: Found error trace [2019-10-02 16:21:22,918 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-02 16:21:22,918 INFO L418 AbstractCegarLoop]: === Iteration 12 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-02 16:21:22,918 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-02 16:21:22,918 INFO L82 PathProgramCache]: Analyzing trace with hash -488752131, now seen corresponding path program 1 times [2019-10-02 16:21:22,918 INFO L224 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-10-02 16:21:22,919 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-10-02 16:21:22,920 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-02 16:21:22,920 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-02 16:21:22,920 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-02 16:21:22,931 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-02 16:21:22,989 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-10-02 16:21:22,989 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-10-02 16:21:22,990 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-10-02 16:21:22,990 INFO L454 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-10-02 16:21:22,990 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-10-02 16:21:22,991 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-10-02 16:21:22,991 INFO L87 Difference]: Start difference. First operand 226 states and 280 transitions. Second operand 5 states. [2019-10-02 16:21:23,444 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-02 16:21:23,444 INFO L93 Difference]: Finished difference Result 540 states and 719 transitions. [2019-10-02 16:21:23,445 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-10-02 16:21:23,445 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 90 [2019-10-02 16:21:23,445 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-02 16:21:23,448 INFO L225 Difference]: With dead ends: 540 [2019-10-02 16:21:23,448 INFO L226 Difference]: Without dead ends: 335 [2019-10-02 16:21:23,449 INFO L640 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2019-10-02 16:21:23,450 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 335 states. [2019-10-02 16:21:23,493 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 335 to 276. [2019-10-02 16:21:23,493 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 276 states. [2019-10-02 16:21:23,496 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 276 states to 276 states and 342 transitions. [2019-10-02 16:21:23,496 INFO L78 Accepts]: Start accepts. Automaton has 276 states and 342 transitions. Word has length 90 [2019-10-02 16:21:23,497 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-02 16:21:23,497 INFO L475 AbstractCegarLoop]: Abstraction has 276 states and 342 transitions. [2019-10-02 16:21:23,497 INFO L476 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-10-02 16:21:23,498 INFO L276 IsEmpty]: Start isEmpty. Operand 276 states and 342 transitions. [2019-10-02 16:21:23,499 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 91 [2019-10-02 16:21:23,500 INFO L403 BasicCegarLoop]: Found error trace [2019-10-02 16:21:23,500 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-02 16:21:23,500 INFO L418 AbstractCegarLoop]: === Iteration 13 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-02 16:21:23,500 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-02 16:21:23,501 INFO L82 PathProgramCache]: Analyzing trace with hash -426712517, now seen corresponding path program 1 times [2019-10-02 16:21:23,501 INFO L224 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-10-02 16:21:23,501 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-10-02 16:21:23,503 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-02 16:21:23,504 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-02 16:21:23,504 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-02 16:21:23,517 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-02 16:21:23,598 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-10-02 16:21:23,599 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-10-02 16:21:23,599 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-10-02 16:21:23,600 INFO L454 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-10-02 16:21:23,600 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-10-02 16:21:23,601 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-10-02 16:21:23,601 INFO L87 Difference]: Start difference. First operand 276 states and 342 transitions. Second operand 5 states. [2019-10-02 16:21:24,095 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-02 16:21:24,095 INFO L93 Difference]: Finished difference Result 600 states and 798 transitions. [2019-10-02 16:21:24,096 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-10-02 16:21:24,096 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 90 [2019-10-02 16:21:24,096 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-02 16:21:24,102 INFO L225 Difference]: With dead ends: 600 [2019-10-02 16:21:24,102 INFO L226 Difference]: Without dead ends: 346 [2019-10-02 16:21:24,104 INFO L640 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 5 SyntacticMatches, 3 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-10-02 16:21:24,105 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 346 states. [2019-10-02 16:21:24,133 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 346 to 301. [2019-10-02 16:21:24,133 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 301 states. [2019-10-02 16:21:24,135 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 301 states to 301 states and 363 transitions. [2019-10-02 16:21:24,136 INFO L78 Accepts]: Start accepts. Automaton has 301 states and 363 transitions. Word has length 90 [2019-10-02 16:21:24,136 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-02 16:21:24,136 INFO L475 AbstractCegarLoop]: Abstraction has 301 states and 363 transitions. [2019-10-02 16:21:24,136 INFO L476 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-10-02 16:21:24,137 INFO L276 IsEmpty]: Start isEmpty. Operand 301 states and 363 transitions. [2019-10-02 16:21:24,138 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 91 [2019-10-02 16:21:24,138 INFO L403 BasicCegarLoop]: Found error trace [2019-10-02 16:21:24,138 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-02 16:21:24,138 INFO L418 AbstractCegarLoop]: === Iteration 14 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-02 16:21:24,139 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-02 16:21:24,139 INFO L82 PathProgramCache]: Analyzing trace with hash -286163907, now seen corresponding path program 1 times [2019-10-02 16:21:24,139 INFO L224 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-10-02 16:21:24,139 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-10-02 16:21:24,140 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-02 16:21:24,140 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-02 16:21:24,140 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-02 16:21:24,152 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-02 16:21:24,181 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-10-02 16:21:24,181 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-10-02 16:21:24,181 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-10-02 16:21:24,182 INFO L454 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-10-02 16:21:24,182 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-10-02 16:21:24,182 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-10-02 16:21:24,183 INFO L87 Difference]: Start difference. First operand 301 states and 363 transitions. Second operand 3 states. [2019-10-02 16:21:24,237 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-02 16:21:24,237 INFO L93 Difference]: Finished difference Result 847 states and 1025 transitions. [2019-10-02 16:21:24,237 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-10-02 16:21:24,238 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 90 [2019-10-02 16:21:24,238 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-02 16:21:24,242 INFO L225 Difference]: With dead ends: 847 [2019-10-02 16:21:24,242 INFO L226 Difference]: Without dead ends: 570 [2019-10-02 16:21:24,244 INFO L640 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-10-02 16:21:24,245 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 570 states. [2019-10-02 16:21:24,297 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 570 to 565. [2019-10-02 16:21:24,297 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 565 states. [2019-10-02 16:21:24,302 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 565 states to 565 states and 685 transitions. [2019-10-02 16:21:24,303 INFO L78 Accepts]: Start accepts. Automaton has 565 states and 685 transitions. Word has length 90 [2019-10-02 16:21:24,303 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-02 16:21:24,303 INFO L475 AbstractCegarLoop]: Abstraction has 565 states and 685 transitions. [2019-10-02 16:21:24,303 INFO L476 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-10-02 16:21:24,304 INFO L276 IsEmpty]: Start isEmpty. Operand 565 states and 685 transitions. [2019-10-02 16:21:24,307 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 93 [2019-10-02 16:21:24,307 INFO L403 BasicCegarLoop]: Found error trace [2019-10-02 16:21:24,308 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-02 16:21:24,308 INFO L418 AbstractCegarLoop]: === Iteration 15 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-02 16:21:24,308 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-02 16:21:24,308 INFO L82 PathProgramCache]: Analyzing trace with hash -2074368014, now seen corresponding path program 1 times [2019-10-02 16:21:24,309 INFO L224 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-10-02 16:21:24,309 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-10-02 16:21:24,310 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-02 16:21:24,311 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-02 16:21:24,311 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-02 16:21:24,320 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-02 16:21:24,372 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-10-02 16:21:24,372 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-10-02 16:21:24,372 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-10-02 16:21:24,373 INFO L454 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-10-02 16:21:24,373 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-10-02 16:21:24,373 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-10-02 16:21:24,374 INFO L87 Difference]: Start difference. First operand 565 states and 685 transitions. Second operand 5 states. [2019-10-02 16:21:24,816 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-02 16:21:24,817 INFO L93 Difference]: Finished difference Result 1107 states and 1380 transitions. [2019-10-02 16:21:24,817 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-10-02 16:21:24,818 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 92 [2019-10-02 16:21:24,818 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-02 16:21:24,824 INFO L225 Difference]: With dead ends: 1107 [2019-10-02 16:21:24,824 INFO L226 Difference]: Without dead ends: 569 [2019-10-02 16:21:24,831 INFO L640 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-10-02 16:21:24,833 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 569 states. [2019-10-02 16:21:24,891 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 569 to 499. [2019-10-02 16:21:24,891 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 499 states. [2019-10-02 16:21:24,896 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 499 states to 499 states and 594 transitions. [2019-10-02 16:21:24,896 INFO L78 Accepts]: Start accepts. Automaton has 499 states and 594 transitions. Word has length 92 [2019-10-02 16:21:24,897 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-02 16:21:24,897 INFO L475 AbstractCegarLoop]: Abstraction has 499 states and 594 transitions. [2019-10-02 16:21:24,897 INFO L476 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-10-02 16:21:24,897 INFO L276 IsEmpty]: Start isEmpty. Operand 499 states and 594 transitions. [2019-10-02 16:21:24,901 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 92 [2019-10-02 16:21:24,901 INFO L403 BasicCegarLoop]: Found error trace [2019-10-02 16:21:24,901 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-02 16:21:24,902 INFO L418 AbstractCegarLoop]: === Iteration 16 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-02 16:21:24,902 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-02 16:21:24,902 INFO L82 PathProgramCache]: Analyzing trace with hash 1417763379, now seen corresponding path program 1 times [2019-10-02 16:21:24,903 INFO L224 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-10-02 16:21:24,903 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-10-02 16:21:24,905 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-02 16:21:24,905 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-02 16:21:24,905 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-02 16:21:24,927 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-02 16:21:24,981 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-10-02 16:21:24,983 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-10-02 16:21:24,984 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-10-02 16:21:24,984 INFO L454 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-10-02 16:21:24,985 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-10-02 16:21:24,985 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-10-02 16:21:24,985 INFO L87 Difference]: Start difference. First operand 499 states and 594 transitions. Second operand 3 states. [2019-10-02 16:21:25,106 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-02 16:21:25,107 INFO L93 Difference]: Finished difference Result 1401 states and 1735 transitions. [2019-10-02 16:21:25,107 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-10-02 16:21:25,108 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 91 [2019-10-02 16:21:25,110 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-02 16:21:25,120 INFO L225 Difference]: With dead ends: 1401 [2019-10-02 16:21:25,120 INFO L226 Difference]: Without dead ends: 929 [2019-10-02 16:21:25,123 INFO L640 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-10-02 16:21:25,126 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 929 states. [2019-10-02 16:21:25,239 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 929 to 927. [2019-10-02 16:21:25,239 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 927 states. [2019-10-02 16:21:25,248 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 927 states to 927 states and 1124 transitions. [2019-10-02 16:21:25,249 INFO L78 Accepts]: Start accepts. Automaton has 927 states and 1124 transitions. Word has length 91 [2019-10-02 16:21:25,250 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-02 16:21:25,250 INFO L475 AbstractCegarLoop]: Abstraction has 927 states and 1124 transitions. [2019-10-02 16:21:25,250 INFO L476 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-10-02 16:21:25,250 INFO L276 IsEmpty]: Start isEmpty. Operand 927 states and 1124 transitions. [2019-10-02 16:21:25,252 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 112 [2019-10-02 16:21:25,252 INFO L403 BasicCegarLoop]: Found error trace [2019-10-02 16:21:25,253 INFO L411 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-02 16:21:25,253 INFO L418 AbstractCegarLoop]: === Iteration 17 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-02 16:21:25,253 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-02 16:21:25,253 INFO L82 PathProgramCache]: Analyzing trace with hash 36587625, now seen corresponding path program 1 times [2019-10-02 16:21:25,254 INFO L224 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-10-02 16:21:25,254 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-10-02 16:21:25,256 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-02 16:21:25,256 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-02 16:21:25,256 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-02 16:21:25,273 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-02 16:21:25,317 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 11 proven. 0 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2019-10-02 16:21:25,317 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-10-02 16:21:25,317 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-10-02 16:21:25,318 INFO L454 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-10-02 16:21:25,318 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-10-02 16:21:25,319 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-10-02 16:21:25,319 INFO L87 Difference]: Start difference. First operand 927 states and 1124 transitions. Second operand 3 states. [2019-10-02 16:21:25,590 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-02 16:21:25,590 INFO L93 Difference]: Finished difference Result 2706 states and 3338 transitions. [2019-10-02 16:21:25,591 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-10-02 16:21:25,591 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 111 [2019-10-02 16:21:25,592 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-02 16:21:25,604 INFO L225 Difference]: With dead ends: 2706 [2019-10-02 16:21:25,605 INFO L226 Difference]: Without dead ends: 1366 [2019-10-02 16:21:25,616 INFO L640 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-10-02 16:21:25,619 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1366 states. [2019-10-02 16:21:25,785 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1366 to 1366. [2019-10-02 16:21:25,785 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1366 states. [2019-10-02 16:21:25,799 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1366 states to 1366 states and 1653 transitions. [2019-10-02 16:21:25,799 INFO L78 Accepts]: Start accepts. Automaton has 1366 states and 1653 transitions. Word has length 111 [2019-10-02 16:21:25,800 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-02 16:21:25,800 INFO L475 AbstractCegarLoop]: Abstraction has 1366 states and 1653 transitions. [2019-10-02 16:21:25,800 INFO L476 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-10-02 16:21:25,801 INFO L276 IsEmpty]: Start isEmpty. Operand 1366 states and 1653 transitions. [2019-10-02 16:21:25,805 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 156 [2019-10-02 16:21:25,805 INFO L403 BasicCegarLoop]: Found error trace [2019-10-02 16:21:25,805 INFO L411 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-02 16:21:25,806 INFO L418 AbstractCegarLoop]: === Iteration 18 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-02 16:21:25,806 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-02 16:21:25,806 INFO L82 PathProgramCache]: Analyzing trace with hash -1178118941, now seen corresponding path program 1 times [2019-10-02 16:21:25,806 INFO L224 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-10-02 16:21:25,806 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-10-02 16:21:25,807 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-02 16:21:25,808 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-02 16:21:25,808 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-02 16:21:25,828 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-02 16:21:25,890 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 11 proven. 0 refuted. 0 times theorem prover too weak. 34 trivial. 0 not checked. [2019-10-02 16:21:25,890 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-10-02 16:21:25,891 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-10-02 16:21:25,891 INFO L454 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-10-02 16:21:25,892 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-10-02 16:21:25,892 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-10-02 16:21:25,892 INFO L87 Difference]: Start difference. First operand 1366 states and 1653 transitions. Second operand 3 states. [2019-10-02 16:21:26,122 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-02 16:21:26,123 INFO L93 Difference]: Finished difference Result 3761 states and 4720 transitions. [2019-10-02 16:21:26,123 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-10-02 16:21:26,123 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 155 [2019-10-02 16:21:26,124 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-02 16:21:26,141 INFO L225 Difference]: With dead ends: 3761 [2019-10-02 16:21:26,141 INFO L226 Difference]: Without dead ends: 2424 [2019-10-02 16:21:26,149 INFO L640 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-10-02 16:21:26,152 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2424 states. [2019-10-02 16:21:26,379 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2424 to 2421. [2019-10-02 16:21:26,380 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2421 states. [2019-10-02 16:21:26,440 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2421 states to 2421 states and 3009 transitions. [2019-10-02 16:21:26,441 INFO L78 Accepts]: Start accepts. Automaton has 2421 states and 3009 transitions. Word has length 155 [2019-10-02 16:21:26,441 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-02 16:21:26,441 INFO L475 AbstractCegarLoop]: Abstraction has 2421 states and 3009 transitions. [2019-10-02 16:21:26,442 INFO L476 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-10-02 16:21:26,442 INFO L276 IsEmpty]: Start isEmpty. Operand 2421 states and 3009 transitions. [2019-10-02 16:21:26,448 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 157 [2019-10-02 16:21:26,448 INFO L403 BasicCegarLoop]: Found error trace [2019-10-02 16:21:26,448 INFO L411 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-02 16:21:26,449 INFO L418 AbstractCegarLoop]: === Iteration 19 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-02 16:21:26,449 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-02 16:21:26,449 INFO L82 PathProgramCache]: Analyzing trace with hash -390866386, now seen corresponding path program 1 times [2019-10-02 16:21:26,449 INFO L224 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-10-02 16:21:26,449 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-10-02 16:21:26,450 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-02 16:21:26,451 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-02 16:21:26,451 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-02 16:21:26,466 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-02 16:21:26,550 INFO L134 CoverageAnalysis]: Checked inductivity of 46 backedges. 4 proven. 11 refuted. 0 times theorem prover too weak. 31 trivial. 0 not checked. [2019-10-02 16:21:26,550 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2019-10-02 16:21:26,550 INFO L224 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2019-10-02 16:21:26,578 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-02 16:21:26,714 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-02 16:21:26,717 INFO L256 TraceCheckSpWp]: Trace formula consists of 657 conjuncts, 3 conjunts are in the unsatisfiable core [2019-10-02 16:21:26,740 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2019-10-02 16:21:26,803 INFO L134 CoverageAnalysis]: Checked inductivity of 46 backedges. 33 proven. 0 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2019-10-02 16:21:26,817 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2019-10-02 16:21:26,818 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [6] total 7 [2019-10-02 16:21:26,819 INFO L454 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-10-02 16:21:26,820 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-10-02 16:21:26,820 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=28, Unknown=0, NotChecked=0, Total=42 [2019-10-02 16:21:26,821 INFO L87 Difference]: Start difference. First operand 2421 states and 3009 transitions. Second operand 7 states. [2019-10-02 16:21:27,928 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-02 16:21:27,928 INFO L93 Difference]: Finished difference Result 6319 states and 8357 transitions. [2019-10-02 16:21:27,928 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-10-02 16:21:27,929 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 156 [2019-10-02 16:21:27,929 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-02 16:21:27,950 INFO L225 Difference]: With dead ends: 6319 [2019-10-02 16:21:27,951 INFO L226 Difference]: Without dead ends: 3244 [2019-10-02 16:21:27,968 INFO L640 BasicCegarLoop]: 0 DeclaredPredicates, 164 GetRequests, 158 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=38, Unknown=0, NotChecked=0, Total=56 [2019-10-02 16:21:27,973 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3244 states. [2019-10-02 16:21:28,238 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3244 to 3244. [2019-10-02 16:21:28,239 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3244 states. [2019-10-02 16:21:28,255 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3244 states to 3244 states and 4019 transitions. [2019-10-02 16:21:28,256 INFO L78 Accepts]: Start accepts. Automaton has 3244 states and 4019 transitions. Word has length 156 [2019-10-02 16:21:28,257 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-02 16:21:28,257 INFO L475 AbstractCegarLoop]: Abstraction has 3244 states and 4019 transitions. [2019-10-02 16:21:28,257 INFO L476 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-10-02 16:21:28,257 INFO L276 IsEmpty]: Start isEmpty. Operand 3244 states and 4019 transitions. [2019-10-02 16:21:28,267 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 208 [2019-10-02 16:21:28,267 INFO L403 BasicCegarLoop]: Found error trace [2019-10-02 16:21:28,267 INFO L411 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-02 16:21:28,268 INFO L418 AbstractCegarLoop]: === Iteration 20 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-02 16:21:28,268 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-02 16:21:28,268 INFO L82 PathProgramCache]: Analyzing trace with hash 1127440364, now seen corresponding path program 1 times [2019-10-02 16:21:28,268 INFO L224 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-10-02 16:21:28,268 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-10-02 16:21:28,269 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-02 16:21:28,270 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-02 16:21:28,270 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-02 16:21:28,279 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-02 16:21:28,326 INFO L134 CoverageAnalysis]: Checked inductivity of 114 backedges. 1 proven. 0 refuted. 0 times theorem prover too weak. 113 trivial. 0 not checked. [2019-10-02 16:21:28,327 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-10-02 16:21:28,327 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-10-02 16:21:28,327 INFO L454 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-10-02 16:21:28,328 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-10-02 16:21:28,328 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-10-02 16:21:28,328 INFO L87 Difference]: Start difference. First operand 3244 states and 4019 transitions. Second operand 4 states. [2019-10-02 16:21:28,773 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-02 16:21:28,773 INFO L93 Difference]: Finished difference Result 6459 states and 8001 transitions. [2019-10-02 16:21:28,774 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-10-02 16:21:28,774 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 207 [2019-10-02 16:21:28,774 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-02 16:21:28,803 INFO L225 Difference]: With dead ends: 6459 [2019-10-02 16:21:28,803 INFO L226 Difference]: Without dead ends: 3237 [2019-10-02 16:21:28,820 INFO L640 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-10-02 16:21:28,824 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3237 states. [2019-10-02 16:21:29,162 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3237 to 3237. [2019-10-02 16:21:29,163 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3237 states. [2019-10-02 16:21:29,178 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3237 states to 3237 states and 4008 transitions. [2019-10-02 16:21:29,180 INFO L78 Accepts]: Start accepts. Automaton has 3237 states and 4008 transitions. Word has length 207 [2019-10-02 16:21:29,181 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-02 16:21:29,181 INFO L475 AbstractCegarLoop]: Abstraction has 3237 states and 4008 transitions. [2019-10-02 16:21:29,181 INFO L476 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-10-02 16:21:29,181 INFO L276 IsEmpty]: Start isEmpty. Operand 3237 states and 4008 transitions. [2019-10-02 16:21:29,193 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 208 [2019-10-02 16:21:29,193 INFO L403 BasicCegarLoop]: Found error trace [2019-10-02 16:21:29,193 INFO L411 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-02 16:21:29,194 INFO L418 AbstractCegarLoop]: === Iteration 21 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-02 16:21:29,195 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-02 16:21:29,195 INFO L82 PathProgramCache]: Analyzing trace with hash -1382123670, now seen corresponding path program 1 times [2019-10-02 16:21:29,195 INFO L224 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-10-02 16:21:29,195 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-10-02 16:21:29,199 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-02 16:21:29,199 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-02 16:21:29,199 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-02 16:21:29,218 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-02 16:21:29,279 INFO L134 CoverageAnalysis]: Checked inductivity of 114 backedges. 41 proven. 0 refuted. 0 times theorem prover too weak. 73 trivial. 0 not checked. [2019-10-02 16:21:29,279 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-10-02 16:21:29,280 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-10-02 16:21:29,282 INFO L454 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-10-02 16:21:29,282 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-10-02 16:21:29,282 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-10-02 16:21:29,283 INFO L87 Difference]: Start difference. First operand 3237 states and 4008 transitions. Second operand 4 states. [2019-10-02 16:21:29,770 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-02 16:21:29,770 INFO L93 Difference]: Finished difference Result 6481 states and 8236 transitions. [2019-10-02 16:21:29,770 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-10-02 16:21:29,771 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 207 [2019-10-02 16:21:29,771 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-02 16:21:29,783 INFO L225 Difference]: With dead ends: 6481 [2019-10-02 16:21:29,783 INFO L226 Difference]: Without dead ends: 1756 [2019-10-02 16:21:29,804 INFO L640 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-10-02 16:21:29,807 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1756 states. [2019-10-02 16:21:29,946 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1756 to 1723. [2019-10-02 16:21:29,946 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1723 states. [2019-10-02 16:21:29,953 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1723 states to 1723 states and 1953 transitions. [2019-10-02 16:21:29,955 INFO L78 Accepts]: Start accepts. Automaton has 1723 states and 1953 transitions. Word has length 207 [2019-10-02 16:21:29,955 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-02 16:21:29,955 INFO L475 AbstractCegarLoop]: Abstraction has 1723 states and 1953 transitions. [2019-10-02 16:21:29,955 INFO L476 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-10-02 16:21:29,956 INFO L276 IsEmpty]: Start isEmpty. Operand 1723 states and 1953 transitions. [2019-10-02 16:21:29,961 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 209 [2019-10-02 16:21:29,961 INFO L403 BasicCegarLoop]: Found error trace [2019-10-02 16:21:29,961 INFO L411 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-02 16:21:29,961 INFO L418 AbstractCegarLoop]: === Iteration 22 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-02 16:21:29,962 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-02 16:21:29,962 INFO L82 PathProgramCache]: Analyzing trace with hash 89354437, now seen corresponding path program 1 times [2019-10-02 16:21:29,962 INFO L224 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-10-02 16:21:29,962 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-10-02 16:21:29,963 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-02 16:21:29,964 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-02 16:21:29,964 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-02 16:21:29,998 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-10-02 16:21:30,027 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-10-02 16:21:30,120 INFO L478 BasicCegarLoop]: Counterexample might be feasible [2019-10-02 16:21:30,296 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 02.10 04:21:30 BoogieIcfgContainer [2019-10-02 16:21:30,296 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-10-02 16:21:30,308 INFO L168 Benchmark]: Toolchain (without parser) took 13780.63 ms. Allocated memory was 133.2 MB in the beginning and 562.6 MB in the end (delta: 429.4 MB). Free memory was 88.0 MB in the beginning and 283.9 MB in the end (delta: -195.8 MB). Peak memory consumption was 233.6 MB. Max. memory is 7.1 GB. [2019-10-02 16:21:30,309 INFO L168 Benchmark]: CDTParser took 0.22 ms. Allocated memory is still 133.2 MB. Free memory was 107.3 MB in the beginning and 107.1 MB in the end (delta: 212.8 kB). Peak memory consumption was 212.8 kB. Max. memory is 7.1 GB. [2019-10-02 16:21:30,310 INFO L168 Benchmark]: CACSL2BoogieTranslator took 485.98 ms. Allocated memory was 133.2 MB in the beginning and 201.3 MB in the end (delta: 68.2 MB). Free memory was 87.6 MB in the beginning and 175.2 MB in the end (delta: -87.6 MB). Peak memory consumption was 27.1 MB. Max. memory is 7.1 GB. [2019-10-02 16:21:30,311 INFO L168 Benchmark]: Boogie Preprocessor took 51.16 ms. Allocated memory is still 201.3 MB. Free memory was 175.2 MB in the beginning and 172.8 MB in the end (delta: 2.5 MB). Peak memory consumption was 2.5 MB. Max. memory is 7.1 GB. [2019-10-02 16:21:30,313 INFO L168 Benchmark]: RCFGBuilder took 614.43 ms. Allocated memory is still 201.3 MB. Free memory was 172.8 MB in the beginning and 137.5 MB in the end (delta: 35.2 MB). Peak memory consumption was 35.2 MB. Max. memory is 7.1 GB. [2019-10-02 16:21:30,317 INFO L168 Benchmark]: TraceAbstraction took 12624.28 ms. Allocated memory was 201.3 MB in the beginning and 562.6 MB in the end (delta: 361.2 MB). Free memory was 136.9 MB in the beginning and 283.9 MB in the end (delta: -146.9 MB). Peak memory consumption was 214.3 MB. Max. memory is 7.1 GB. [2019-10-02 16:21:30,327 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.22 ms. Allocated memory is still 133.2 MB. Free memory was 107.3 MB in the beginning and 107.1 MB in the end (delta: 212.8 kB). Peak memory consumption was 212.8 kB. Max. memory is 7.1 GB. * CACSL2BoogieTranslator took 485.98 ms. Allocated memory was 133.2 MB in the beginning and 201.3 MB in the end (delta: 68.2 MB). Free memory was 87.6 MB in the beginning and 175.2 MB in the end (delta: -87.6 MB). Peak memory consumption was 27.1 MB. Max. memory is 7.1 GB. * Boogie Preprocessor took 51.16 ms. Allocated memory is still 201.3 MB. Free memory was 175.2 MB in the beginning and 172.8 MB in the end (delta: 2.5 MB). Peak memory consumption was 2.5 MB. Max. memory is 7.1 GB. * RCFGBuilder took 614.43 ms. Allocated memory is still 201.3 MB. Free memory was 172.8 MB in the beginning and 137.5 MB in the end (delta: 35.2 MB). Peak memory consumption was 35.2 MB. Max. memory is 7.1 GB. * TraceAbstraction took 12624.28 ms. Allocated memory was 201.3 MB in the beginning and 562.6 MB in the end (delta: 361.2 MB). Free memory was 136.9 MB in the beginning and 283.9 MB in the end (delta: -146.9 MB). Peak memory consumption was 214.3 MB. Max. memory is 7.1 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 11]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L15] int m_pc = 0; [L16] int t1_pc = 0; [L17] int t2_pc = 0; [L18] int m_st ; [L19] int t1_st ; [L20] int t2_st ; [L21] int m_i ; [L22] int t1_i ; [L23] int t2_i ; [L24] int M_E = 2; [L25] int T1_E = 2; [L26] int T2_E = 2; [L27] int E_1 = 2; [L28] int E_2 = 2; VAL [\old(E_1)=16, \old(E_2)=5, \old(M_E)=13, \old(m_i)=7, \old(m_pc)=11, \old(m_st)=12, \old(T1_E)=3, \old(t1_i)=15, \old(t1_pc)=8, \old(t1_st)=4, \old(T2_E)=14, \old(t2_i)=6, \old(t2_pc)=9, \old(t2_st)=10, E_1=2, E_2=2, M_E=2, m_i=0, m_pc=0, m_st=0, T1_E=2, t1_i=0, t1_pc=0, t1_st=0, T2_E=2, t2_i=0, t2_pc=0, t2_st=0] [L563] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=0, m_pc=0, m_st=0, T1_E=2, t1_i=0, t1_pc=0, t1_st=0, T2_E=2, t2_i=0, t2_pc=0, t2_st=0] [L567] CALL init_model() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=0, m_pc=0, m_st=0, T1_E=2, t1_i=0, t1_pc=0, t1_st=0, T2_E=2, t2_i=0, t2_pc=0, t2_st=0] [L477] m_i = 1 [L478] t1_i = 1 [L479] t2_i = 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L567] RET init_model() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L568] CALL start_simulation() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L504] int kernel_st ; [L505] int tmp ; [L506] int tmp___0 ; [L510] kernel_st = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, kernel_st=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L511] FCALL update_channels() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, kernel_st=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L512] CALL init_threads() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L211] COND TRUE m_i == 1 [L212] m_st = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L216] COND TRUE t1_i == 1 [L217] t1_st = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L221] COND TRUE t2_i == 1 [L222] t2_st = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L512] RET init_threads() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, kernel_st=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L513] CALL fire_delta_events() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L324] COND FALSE !(M_E == 0) VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L329] COND FALSE !(T1_E == 0) VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L334] COND FALSE !(T2_E == 0) VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L339] COND FALSE !(E_1 == 0) VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L344] COND FALSE !(E_2 == 0) VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L513] RET fire_delta_events() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, kernel_st=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L514] CALL activate_threads() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L387] int tmp ; [L388] int tmp___0 ; [L389] int tmp___1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L393] CALL, EXPR is_master_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L143] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L146] COND FALSE !(m_pc == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L156] __retres1 = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, __retres1=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L158] return (__retres1); VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \result=0, __retres1=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L393] RET, EXPR is_master_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, is_master_triggered()=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L393] tmp = is_master_triggered() [L395] COND FALSE !(\read(tmp)) VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, tmp=0] [L401] CALL, EXPR is_transmit1_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L162] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L165] COND FALSE !(t1_pc == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L175] __retres1 = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, __retres1=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L177] return (__retres1); VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \result=0, __retres1=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L401] RET, EXPR is_transmit1_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, is_transmit1_triggered()=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, tmp=0] [L401] tmp___0 = is_transmit1_triggered() [L403] COND FALSE !(\read(tmp___0)) VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, tmp=0, tmp___0=0] [L409] CALL, EXPR is_transmit2_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L181] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L184] COND FALSE !(t2_pc == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L194] __retres1 = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, __retres1=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L196] return (__retres1); VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \result=0, __retres1=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L409] RET, EXPR is_transmit2_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, is_transmit2_triggered()=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, tmp=0, tmp___0=0] [L409] tmp___1 = is_transmit2_triggered() [L411] COND FALSE !(\read(tmp___1)) VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, tmp=0, tmp___0=0, tmp___1=0] [L514] RET activate_threads() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, kernel_st=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L515] CALL reset_delta_events() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L357] COND FALSE !(M_E == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L362] COND FALSE !(T1_E == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L367] COND FALSE !(T2_E == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L372] COND FALSE !(E_1 == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L377] COND FALSE !(E_2 == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L515] RET reset_delta_events() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, kernel_st=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L518] COND TRUE 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, kernel_st=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L521] kernel_st = 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, kernel_st=1, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L522] CALL eval() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L257] int tmp ; VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L261] COND TRUE 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L264] CALL, EXPR exists_runnable_thread() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L231] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L234] COND TRUE m_st == 0 [L235] __retres1 = 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, __retres1=1, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L252] return (__retres1); VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \result=1, __retres1=1, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L264] RET, EXPR exists_runnable_thread() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, exists_runnable_thread()=1, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L264] tmp = exists_runnable_thread() [L266] COND TRUE \read(tmp) VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, tmp=1] [L271] COND TRUE m_st == 0 [L272] int tmp_ndt_1; [L273] tmp_ndt_1 = __VERIFIER_nondet_int() [L274] COND FALSE !(\read(tmp_ndt_1)) VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, tmp=1, tmp_ndt_1=0] [L285] COND TRUE t1_st == 0 [L286] int tmp_ndt_2; [L287] tmp_ndt_2 = __VERIFIER_nondet_int() [L288] COND TRUE \read(tmp_ndt_2) [L290] t1_st = 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=1, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, tmp=1, tmp_ndt_1=0, tmp_ndt_2=1] [L291] CALL transmit1() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=1, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L78] COND TRUE t1_pc == 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=1, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L89] COND TRUE 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=1, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L91] t1_pc = 1 [L92] t1_st = 2 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L291] RET transmit1() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, tmp=1, tmp_ndt_1=0, tmp_ndt_2=1] [L299] COND TRUE t2_st == 0 [L300] int tmp_ndt_3; [L301] tmp_ndt_3 = __VERIFIER_nondet_int() [L302] COND TRUE \read(tmp_ndt_3) [L304] t2_st = 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=0, t2_st=1, tmp=1, tmp_ndt_1=0, tmp_ndt_2=1, tmp_ndt_3=1] [L305] CALL transmit2() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=1, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=0, t2_st=1] [L113] COND TRUE t2_pc == 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=1, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=0, t2_st=1] [L124] COND TRUE 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=1, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=0, t2_st=1] [L126] t2_pc = 1 [L127] t2_st = 2 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=1, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L305] RET transmit2() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, tmp=1, tmp_ndt_1=0, tmp_ndt_2=1, tmp_ndt_3=1] [L261] COND TRUE 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, tmp=1, tmp_ndt_1=0, tmp_ndt_2=1, tmp_ndt_3=1] [L264] CALL, EXPR exists_runnable_thread() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L231] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L234] COND TRUE m_st == 0 [L235] __retres1 = 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, __retres1=1, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L252] return (__retres1); VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \result=1, __retres1=1, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L264] RET, EXPR exists_runnable_thread() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, exists_runnable_thread()=1, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, tmp=1, tmp_ndt_1=0, tmp_ndt_2=1, tmp_ndt_3=1] [L264] tmp = exists_runnable_thread() [L266] COND TRUE \read(tmp) VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, tmp=1, tmp_ndt_1=0, tmp_ndt_2=1, tmp_ndt_3=1] [L271] COND TRUE m_st == 0 [L272] int tmp_ndt_1; [L273] tmp_ndt_1 = __VERIFIER_nondet_int() [L274] COND TRUE \read(tmp_ndt_1) [L276] m_st = 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, tmp=1, tmp_ndt_1=1, tmp_ndt_2=1, tmp_ndt_3=1] [L277] CALL master() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L37] COND TRUE m_pc == 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L48] COND TRUE 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L51] E_1 = 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=1, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L52] CALL immediate_notify() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=1, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L425] CALL activate_threads() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=1, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L387] int tmp ; [L388] int tmp___0 ; [L389] int tmp___1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=1, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L393] CALL, EXPR is_master_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=1, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L143] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=1, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L146] COND FALSE !(m_pc == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=1, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L156] __retres1 = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, __retres1=0, E_1=1, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L158] return (__retres1); VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \result=0, __retres1=0, E_1=1, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L393] RET, EXPR is_master_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=1, E_2=2, is_master_triggered()=0, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L393] tmp = is_master_triggered() [L395] COND FALSE !(\read(tmp)) VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=1, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, tmp=0] [L401] CALL, EXPR is_transmit1_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=1, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L162] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=1, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L165] COND TRUE t1_pc == 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=1, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L166] COND TRUE E_1 == 1 [L167] __retres1 = 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, __retres1=1, E_1=1, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L177] return (__retres1); VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \result=1, __retres1=1, E_1=1, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L401] RET, EXPR is_transmit1_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=1, E_2=2, is_transmit1_triggered()=1, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, tmp=0] [L401] tmp___0 = is_transmit1_triggered() [L403] COND TRUE \read(tmp___0) [L404] t1_st = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=1, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, tmp=0, tmp___0=1] [L409] CALL, EXPR is_transmit2_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=1, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L181] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=1, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L184] COND TRUE t2_pc == 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=1, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L185] COND FALSE !(E_2 == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=1, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L194] __retres1 = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, __retres1=0, E_1=1, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L196] return (__retres1); VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \result=0, __retres1=0, E_1=1, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L409] RET, EXPR is_transmit2_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=1, E_2=2, is_transmit2_triggered()=0, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, tmp=0, tmp___0=1] [L409] tmp___1 = is_transmit2_triggered() [L411] COND FALSE !(\read(tmp___1)) VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=1, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, tmp=0, tmp___0=1, tmp___1=0] [L425] RET activate_threads() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=1, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L52] RET immediate_notify() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=1, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L53] E_1 = 2 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L56] COND TRUE 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L58] m_pc = 1 [L59] m_st = 2 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L277] RET master() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, tmp=1, tmp_ndt_1=1, tmp_ndt_2=1, tmp_ndt_3=1] [L285] COND TRUE t1_st == 0 [L286] int tmp_ndt_2; [L287] tmp_ndt_2 = __VERIFIER_nondet_int() [L288] COND TRUE \read(tmp_ndt_2) [L290] t1_st = 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, tmp=1, tmp_ndt_1=1, tmp_ndt_2=1, tmp_ndt_3=1] [L291] CALL transmit1() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L78] COND FALSE !(t1_pc == 0) VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L81] COND TRUE t1_pc == 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L97] E_2 = 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=2, E_2=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L98] CALL immediate_notify() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=2, E_2=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L425] CALL activate_threads() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=2, E_2=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L387] int tmp ; [L388] int tmp___0 ; [L389] int tmp___1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=2, E_2=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L393] CALL, EXPR is_master_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=2, E_2=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L143] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=2, E_2=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L146] COND TRUE m_pc == 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=2, E_2=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L147] COND FALSE !(M_E == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=2, E_2=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L156] __retres1 = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, __retres1=0, E_1=2, E_2=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L158] return (__retres1); VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \result=0, __retres1=0, E_1=2, E_2=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L393] RET, EXPR is_master_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=2, E_2=1, is_master_triggered()=0, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L393] tmp = is_master_triggered() [L395] COND FALSE !(\read(tmp)) VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=2, E_2=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, tmp=0] [L401] CALL, EXPR is_transmit1_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=2, E_2=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L162] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=2, E_2=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L165] COND TRUE t1_pc == 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=2, E_2=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L166] COND FALSE !(E_1 == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=2, E_2=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L175] __retres1 = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, __retres1=0, E_1=2, E_2=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L177] return (__retres1); VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \result=0, __retres1=0, E_1=2, E_2=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L401] RET, EXPR is_transmit1_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=2, E_2=1, is_transmit1_triggered()=0, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, tmp=0] [L401] tmp___0 = is_transmit1_triggered() [L403] COND FALSE !(\read(tmp___0)) VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=2, E_2=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, tmp=0, tmp___0=0] [L409] CALL, EXPR is_transmit2_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=2, E_2=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L181] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=2, E_2=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L184] COND TRUE t2_pc == 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=2, E_2=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L185] COND TRUE E_2 == 1 [L186] __retres1 = 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, __retres1=1, E_1=2, E_2=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L196] return (__retres1); VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \result=1, __retres1=1, E_1=2, E_2=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L409] RET, EXPR is_transmit2_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=2, E_2=1, is_transmit2_triggered()=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, tmp=0, tmp___0=0] [L409] tmp___1 = is_transmit2_triggered() [L411] COND TRUE \read(tmp___1) [L412] t2_st = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=2, E_2=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, tmp=0, tmp___0=0, tmp___1=1] [L425] RET activate_threads() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=2, E_2=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0] [L98] RET immediate_notify() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=2, E_2=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0] [L99] E_2 = 2 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0] [L89] COND TRUE 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0] [L91] t1_pc = 1 [L92] t1_st = 2 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=0] [L291] RET transmit1() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, tmp=1, tmp_ndt_1=1, tmp_ndt_2=1, tmp_ndt_3=1] [L299] COND TRUE t2_st == 0 [L300] int tmp_ndt_3; [L301] tmp_ndt_3 = __VERIFIER_nondet_int() [L302] COND TRUE \read(tmp_ndt_3) [L304] t2_st = 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, tmp=1, tmp_ndt_1=1, tmp_ndt_2=1, tmp_ndt_3=1] [L305] CALL transmit2() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1] [L113] COND FALSE !(t2_pc == 0) VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1] [L116] COND TRUE t2_pc == 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1] [L132] CALL error() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1] [L11] __VERIFIER_error() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1] - StatisticsResult: Ultimate Automizer benchmark data CFG has 23 procedures, 169 locations, 1 error locations. UNSAFE Result, 12.5s OverallTime, 22 OverallIterations, 3 TraceHistogramMax, 7.7s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 4752 SDtfs, 4937 SDslu, 4791 SDs, 0 SdLazy, 3573 SolverSat, 1324 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 4.0s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 319 GetRequests, 234 SyntacticMatches, 9 SemanticMatches, 76 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 0.4s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=3244occurred in iteration=19, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 1.9s AutomataMinimizationTime, 21 MinimizatonAttempts, 403 StatesRemovedByMinimization, 15 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.1s SsaConstructionTime, 0.4s SatisfiabilityAnalysisTime, 1.2s InterpolantComputationTime, 2643 NumberOfCodeBlocks, 2643 NumberOfCodeBlocksAsserted, 23 NumberOfCheckSat, 2413 ConstructedInterpolants, 0 QuantifiedInterpolants, 409050 SizeOfPredicates, 0 NumberOfNonLiveVariables, 657 ConjunctsInSsa, 3 ConjunctsInUnsatCore, 22 InterpolantComputations, 21 PerfectInterpolantSequences, 370/381 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...