java -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata ./data -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/default/automizer/svcomp-Reach-32bit-Automizer_Default.epf --traceabstraction.trace.refinement.strategy SIFA_TAIPAN --sifa.abstract.domain CompoundDomain --rcfgbuilder.size.of.a.code.block LoopFreeBlock --sifa.call.summarizer TopInputCallSummarizer --sifa.fluid SizeLimitFluid --sifa.simplification.technique SIMPLIFY_QUICK -i ../../../trunk/examples/svcomp/reducercommutativity/avg05-1.i -------------------------------------------------------------------------------- This is Ultimate 0.1.24-36ac518-m [2019-10-07 15:23:23,674 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-10-07 15:23:23,677 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-10-07 15:23:23,689 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-10-07 15:23:23,689 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-10-07 15:23:23,690 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-10-07 15:23:23,692 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-10-07 15:23:23,693 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-10-07 15:23:23,695 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-10-07 15:23:23,696 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-10-07 15:23:23,697 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-10-07 15:23:23,698 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-10-07 15:23:23,698 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-10-07 15:23:23,699 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-10-07 15:23:23,700 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-10-07 15:23:23,701 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-10-07 15:23:23,702 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-10-07 15:23:23,703 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-10-07 15:23:23,704 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-10-07 15:23:23,706 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-10-07 15:23:23,708 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-10-07 15:23:23,709 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-10-07 15:23:23,710 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-10-07 15:23:23,711 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-10-07 15:23:23,713 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... 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[2019-10-07 15:23:23,725 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-10-07 15:23:23,727 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-10-07 15:23:23,728 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-10-07 15:23:23,728 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/default/automizer/svcomp-Reach-32bit-Automizer_Default.epf [2019-10-07 15:23:23,753 INFO L113 SettingsManager]: Loading preferences was successful [2019-10-07 15:23:23,753 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-10-07 15:23:23,755 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-10-07 15:23:23,755 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-10-07 15:23:23,755 INFO L138 SettingsManager]: * Use SBE=true [2019-10-07 15:23:23,756 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-10-07 15:23:23,756 INFO L138 SettingsManager]: * sizeof long=4 [2019-10-07 15:23:23,756 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-10-07 15:23:23,756 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-10-07 15:23:23,757 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-10-07 15:23:23,757 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-10-07 15:23:23,758 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-10-07 15:23:23,758 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-10-07 15:23:23,758 INFO L138 SettingsManager]: * sizeof long double=12 [2019-10-07 15:23:23,759 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-10-07 15:23:23,759 INFO L138 SettingsManager]: * Use constant arrays=true [2019-10-07 15:23:23,759 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-10-07 15:23:23,759 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-10-07 15:23:23,759 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-10-07 15:23:23,760 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-10-07 15:23:23,760 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-10-07 15:23:23,760 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-10-07 15:23:23,761 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-10-07 15:23:23,761 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-10-07 15:23:23,761 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-10-07 15:23:23,761 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-10-07 15:23:23,761 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-10-07 15:23:23,761 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-10-07 15:23:23,762 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: Trace refinement strategy -> SIFA_TAIPAN Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.sifa: Abstract Domain -> CompoundDomain Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder: Size of a code block -> LoopFreeBlock Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.sifa: Call Summarizer -> TopInputCallSummarizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.sifa: Fluid -> SizeLimitFluid Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.sifa: Simplification Technique -> SIMPLIFY_QUICK [2019-10-07 15:23:24,030 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-10-07 15:23:24,048 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-10-07 15:23:24,051 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-10-07 15:23:24,053 INFO L271 PluginConnector]: Initializing CDTParser... [2019-10-07 15:23:24,053 INFO L275 PluginConnector]: CDTParser initialized [2019-10-07 15:23:24,054 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/reducercommutativity/avg05-1.i [2019-10-07 15:23:24,132 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/bd3237777/b9f00a723d7e4cc681307ccb24b37f29/FLAGf55f7c8c4 [2019-10-07 15:23:24,556 INFO L306 CDTParser]: Found 1 translation units. [2019-10-07 15:23:24,557 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/reducercommutativity/avg05-1.i [2019-10-07 15:23:24,563 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/bd3237777/b9f00a723d7e4cc681307ccb24b37f29/FLAGf55f7c8c4 [2019-10-07 15:23:24,959 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/bd3237777/b9f00a723d7e4cc681307ccb24b37f29 [2019-10-07 15:23:24,969 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-10-07 15:23:24,970 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2019-10-07 15:23:24,971 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-10-07 15:23:24,971 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-10-07 15:23:24,975 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-10-07 15:23:24,976 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.10 03:23:24" (1/1) ... [2019-10-07 15:23:24,979 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@209cf8 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.10 03:23:24, skipping insertion in model container [2019-10-07 15:23:24,979 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.10 03:23:24" (1/1) ... [2019-10-07 15:23:24,986 INFO L142 MainTranslator]: Starting translation in SV-COMP mode [2019-10-07 15:23:25,003 INFO L173 MainTranslator]: Built tables and reachable declarations [2019-10-07 15:23:25,171 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-10-07 15:23:25,180 INFO L188 MainTranslator]: Completed pre-run [2019-10-07 15:23:25,203 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-10-07 15:23:25,224 INFO L192 MainTranslator]: Completed translation [2019-10-07 15:23:25,224 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.10 03:23:25 WrapperNode [2019-10-07 15:23:25,225 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-10-07 15:23:25,225 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-10-07 15:23:25,226 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-10-07 15:23:25,226 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-10-07 15:23:25,315 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.10 03:23:25" (1/1) ... [2019-10-07 15:23:25,316 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.10 03:23:25" (1/1) ... [2019-10-07 15:23:25,323 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.10 03:23:25" (1/1) ... [2019-10-07 15:23:25,324 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.10 03:23:25" (1/1) ... [2019-10-07 15:23:25,339 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.10 03:23:25" (1/1) ... [2019-10-07 15:23:25,344 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.10 03:23:25" (1/1) ... [2019-10-07 15:23:25,345 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.10 03:23:25" (1/1) ... [2019-10-07 15:23:25,348 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-10-07 15:23:25,348 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-10-07 15:23:25,348 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-10-07 15:23:25,348 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-10-07 15:23:25,349 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.10 03:23:25" (1/1) ... No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-10-07 15:23:25,409 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2019-10-07 15:23:25,409 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-10-07 15:23:25,409 INFO L138 BoogieDeclarations]: Found implementation of procedure avg [2019-10-07 15:23:25,409 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2019-10-07 15:23:25,409 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_error [2019-10-07 15:23:25,410 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_int [2019-10-07 15:23:25,410 INFO L130 BoogieDeclarations]: Found specification of procedure avg [2019-10-07 15:23:25,410 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2019-10-07 15:23:25,410 INFO L130 BoogieDeclarations]: Found specification of procedure main [2019-10-07 15:23:25,410 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-10-07 15:23:25,411 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-10-07 15:23:25,411 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-10-07 15:23:25,411 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2019-10-07 15:23:25,411 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-10-07 15:23:25,789 INFO L279 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-10-07 15:23:25,790 INFO L284 CfgBuilder]: Removed 3 assume(true) statements. [2019-10-07 15:23:25,791 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.10 03:23:25 BoogieIcfgContainer [2019-10-07 15:23:25,791 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-10-07 15:23:25,792 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-10-07 15:23:25,792 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-10-07 15:23:25,796 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-10-07 15:23:25,796 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.10 03:23:24" (1/3) ... [2019-10-07 15:23:25,797 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@2f63cd98 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.10 03:23:25, skipping insertion in model container [2019-10-07 15:23:25,797 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.10 03:23:25" (2/3) ... [2019-10-07 15:23:25,798 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@2f63cd98 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.10 03:23:25, skipping insertion in model container [2019-10-07 15:23:25,798 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.10 03:23:25" (3/3) ... [2019-10-07 15:23:25,799 INFO L109 eAbstractionObserver]: Analyzing ICFG avg05-1.i [2019-10-07 15:23:25,808 INFO L152 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-10-07 15:23:25,815 INFO L164 ceAbstractionStarter]: Appying trace abstraction to program that has 1 error locations. [2019-10-07 15:23:25,826 INFO L249 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2019-10-07 15:23:25,850 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-10-07 15:23:25,850 INFO L374 AbstractCegarLoop]: Hoare is true [2019-10-07 15:23:25,850 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-10-07 15:23:25,851 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-10-07 15:23:25,851 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-10-07 15:23:25,851 INFO L378 AbstractCegarLoop]: Difference is false [2019-10-07 15:23:25,851 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-10-07 15:23:25,851 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-10-07 15:23:25,868 INFO L276 IsEmpty]: Start isEmpty. Operand 23 states. [2019-10-07 15:23:25,874 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2019-10-07 15:23:25,874 INFO L377 BasicCegarLoop]: Found error trace [2019-10-07 15:23:25,875 INFO L385 BasicCegarLoop]: trace histogram [3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-07 15:23:25,877 INFO L410 AbstractCegarLoop]: === Iteration 1 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-07 15:23:25,882 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-07 15:23:25,882 INFO L82 PathProgramCache]: Analyzing trace with hash 2112018211, now seen corresponding path program 1 times [2019-10-07 15:23:25,889 INFO L150 tionRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-10-07 15:23:25,890 INFO L231 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2019-10-07 15:23:25,890 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-07 15:23:25,890 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-07 15:23:25,890 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-07 15:23:25,977 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-07 15:23:26,083 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2019-10-07 15:23:26,084 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2019-10-07 15:23:26,088 INFO L211 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-10-07 15:23:26,088 INFO L224 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-10-07 15:23:26,093 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-10-07 15:23:26,112 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-10-07 15:23:26,114 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-10-07 15:23:26,116 INFO L87 Difference]: Start difference. First operand 23 states. Second operand 3 states. [2019-10-07 15:23:26,173 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-07 15:23:26,174 INFO L93 Difference]: Finished difference Result 41 states and 51 transitions. [2019-10-07 15:23:26,179 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-10-07 15:23:26,181 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 24 [2019-10-07 15:23:26,181 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-07 15:23:26,192 INFO L225 Difference]: With dead ends: 41 [2019-10-07 15:23:26,193 INFO L226 Difference]: Without dead ends: 20 [2019-10-07 15:23:26,199 INFO L606 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-10-07 15:23:26,220 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20 states. [2019-10-07 15:23:26,250 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20 to 20. [2019-10-07 15:23:26,252 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20 states. [2019-10-07 15:23:26,255 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20 states to 20 states and 24 transitions. [2019-10-07 15:23:26,257 INFO L78 Accepts]: Start accepts. Automaton has 20 states and 24 transitions. Word has length 24 [2019-10-07 15:23:26,258 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-07 15:23:26,259 INFO L462 AbstractCegarLoop]: Abstraction has 20 states and 24 transitions. [2019-10-07 15:23:26,260 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-10-07 15:23:26,260 INFO L276 IsEmpty]: Start isEmpty. Operand 20 states and 24 transitions. [2019-10-07 15:23:26,264 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2019-10-07 15:23:26,264 INFO L377 BasicCegarLoop]: Found error trace [2019-10-07 15:23:26,265 INFO L385 BasicCegarLoop]: trace histogram [3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-07 15:23:26,265 INFO L410 AbstractCegarLoop]: === Iteration 2 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-07 15:23:26,266 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-07 15:23:26,267 INFO L82 PathProgramCache]: Analyzing trace with hash -2049651994, now seen corresponding path program 1 times [2019-10-07 15:23:26,267 INFO L150 tionRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-10-07 15:23:26,267 INFO L231 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2019-10-07 15:23:26,268 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-07 15:23:26,268 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-07 15:23:26,268 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-07 15:23:26,326 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-07 15:23:26,382 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2019-10-07 15:23:26,382 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2019-10-07 15:23:26,383 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2019-10-07 15:23:26,383 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-07 15:23:26,455 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-07 15:23:26,458 INFO L256 TraceCheckSpWp]: Trace formula consists of 123 conjuncts, 2 conjunts are in the unsatisfiable core [2019-10-07 15:23:26,465 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2019-10-07 15:23:26,494 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2019-10-07 15:23:26,495 INFO L322 TraceCheckSpWp]: Computing backward predicates... [2019-10-07 15:23:26,549 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2019-10-07 15:23:26,549 INFO L211 tionRefinementEngine]: Constructing automaton from 1 perfect and 2 imperfect interpolant sequences. [2019-10-07 15:23:26,550 INFO L224 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [3, 3] total 5 [2019-10-07 15:23:26,551 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-10-07 15:23:26,552 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-10-07 15:23:26,552 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-10-07 15:23:26,552 INFO L87 Difference]: Start difference. First operand 20 states and 24 transitions. Second operand 3 states. [2019-10-07 15:23:26,563 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-07 15:23:26,563 INFO L93 Difference]: Finished difference Result 33 states and 43 transitions. [2019-10-07 15:23:26,564 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-10-07 15:23:26,564 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 25 [2019-10-07 15:23:26,564 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-07 15:23:26,565 INFO L225 Difference]: With dead ends: 33 [2019-10-07 15:23:26,565 INFO L226 Difference]: Without dead ends: 21 [2019-10-07 15:23:26,567 INFO L606 BasicCegarLoop]: 0 DeclaredPredicates, 52 GetRequests, 49 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-10-07 15:23:26,567 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21 states. [2019-10-07 15:23:26,571 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21 to 21. [2019-10-07 15:23:26,571 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21 states. [2019-10-07 15:23:26,572 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21 states to 21 states and 25 transitions. [2019-10-07 15:23:26,573 INFO L78 Accepts]: Start accepts. Automaton has 21 states and 25 transitions. Word has length 25 [2019-10-07 15:23:26,573 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-07 15:23:26,573 INFO L462 AbstractCegarLoop]: Abstraction has 21 states and 25 transitions. [2019-10-07 15:23:26,573 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-10-07 15:23:26,573 INFO L276 IsEmpty]: Start isEmpty. Operand 21 states and 25 transitions. [2019-10-07 15:23:26,574 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2019-10-07 15:23:26,574 INFO L377 BasicCegarLoop]: Found error trace [2019-10-07 15:23:26,575 INFO L385 BasicCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-07 15:23:26,780 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 2 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-07 15:23:26,780 INFO L410 AbstractCegarLoop]: === Iteration 3 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-07 15:23:26,780 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-07 15:23:26,781 INFO L82 PathProgramCache]: Analyzing trace with hash -575014574, now seen corresponding path program 1 times [2019-10-07 15:23:26,781 INFO L150 tionRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-10-07 15:23:26,782 INFO L231 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2019-10-07 15:23:26,782 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-07 15:23:26,782 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-07 15:23:26,783 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-07 15:23:26,848 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-07 15:23:26,920 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2019-10-07 15:23:26,921 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2019-10-07 15:23:26,921 INFO L211 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-10-07 15:23:26,921 INFO L224 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-10-07 15:23:26,922 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-10-07 15:23:26,922 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-10-07 15:23:26,923 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-10-07 15:23:26,923 INFO L87 Difference]: Start difference. First operand 21 states and 25 transitions. Second operand 3 states. [2019-10-07 15:23:26,939 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-07 15:23:26,939 INFO L93 Difference]: Finished difference Result 31 states and 36 transitions. [2019-10-07 15:23:26,940 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-10-07 15:23:26,941 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 28 [2019-10-07 15:23:26,941 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-07 15:23:26,942 INFO L225 Difference]: With dead ends: 31 [2019-10-07 15:23:26,942 INFO L226 Difference]: Without dead ends: 22 [2019-10-07 15:23:26,943 INFO L606 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-10-07 15:23:26,943 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22 states. [2019-10-07 15:23:26,947 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22 to 22. [2019-10-07 15:23:26,948 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22 states. [2019-10-07 15:23:26,949 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22 states to 22 states and 26 transitions. [2019-10-07 15:23:26,949 INFO L78 Accepts]: Start accepts. Automaton has 22 states and 26 transitions. Word has length 28 [2019-10-07 15:23:26,951 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-07 15:23:26,951 INFO L462 AbstractCegarLoop]: Abstraction has 22 states and 26 transitions. [2019-10-07 15:23:26,951 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-10-07 15:23:26,951 INFO L276 IsEmpty]: Start isEmpty. Operand 22 states and 26 transitions. [2019-10-07 15:23:26,952 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2019-10-07 15:23:26,952 INFO L377 BasicCegarLoop]: Found error trace [2019-10-07 15:23:26,953 INFO L385 BasicCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-07 15:23:26,953 INFO L410 AbstractCegarLoop]: === Iteration 4 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-07 15:23:26,953 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-07 15:23:26,954 INFO L82 PathProgramCache]: Analyzing trace with hash -202958309, now seen corresponding path program 1 times [2019-10-07 15:23:26,954 INFO L150 tionRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-10-07 15:23:26,954 INFO L231 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2019-10-07 15:23:26,954 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-07 15:23:26,955 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-07 15:23:26,955 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-07 15:23:26,994 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-07 15:23:27,055 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2019-10-07 15:23:27,056 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2019-10-07 15:23:27,056 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2019-10-07 15:23:27,056 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-07 15:23:27,152 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-07 15:23:27,153 INFO L256 TraceCheckSpWp]: Trace formula consists of 142 conjuncts, 3 conjunts are in the unsatisfiable core [2019-10-07 15:23:27,158 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2019-10-07 15:23:27,177 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2019-10-07 15:23:27,177 INFO L322 TraceCheckSpWp]: Computing backward predicates... [2019-10-07 15:23:27,221 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2019-10-07 15:23:27,222 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSifa [2019-10-07 15:23:27,248 INFO L162 IcfgInterpreter]: Started Sifa with 19 locations of interest [2019-10-07 15:23:27,248 INFO L169 IcfgInterpreter]: Building call graph [2019-10-07 15:23:27,254 INFO L174 IcfgInterpreter]: Initial procedures are [ULTIMATE.start] [2019-10-07 15:23:27,262 INFO L179 IcfgInterpreter]: Starting interpretation [2019-10-07 15:23:27,263 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.start with input of size 1 for LOIs [2019-10-07 15:23:27,468 INFO L199 IcfgInterpreter]: Interpreting procedure main with input of size 21 for LOIs [2019-10-07 15:23:45,846 INFO L199 IcfgInterpreter]: Interpreting procedure avg with input of size 1 for LOIs [2019-10-07 15:23:45,884 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.init with input of size 10 for LOIs [2019-10-07 15:23:45,888 INFO L183 IcfgInterpreter]: Interpretation finished [2019-10-07 15:23:45,888 INFO L191 IcfgInterpreter]: Final predicates for locations of interest are: [2019-10-07 15:23:45,888 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initENTRY satisfy 695#(and (= |old(#NULL.base)| |#NULL.base|) (= |#valid| |old(#valid)|) (= |#NULL.offset| |old(#NULL.offset)|)) [2019-10-07 15:23:45,889 INFO L193 IcfgInterpreter]: Reachable states at location L36-1 satisfy 460#true [2019-10-07 15:23:45,889 INFO L193 IcfgInterpreter]: Reachable states at location L36 satisfy 602#(and (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 16))) (<= 4 main_~i~2) (not (< main_~i~2 4))) [2019-10-07 15:23:45,889 INFO L193 IcfgInterpreter]: Reachable states at location L9-3 satisfy 686#(<= 0 avg_~i~0) [2019-10-07 15:23:45,889 INFO L193 IcfgInterpreter]: Reachable states at location L-1 satisfy 23#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= 0 (select |#valid| 0)) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-07 15:23:45,890 INFO L193 IcfgInterpreter]: Reachable states at location mainENTRY satisfy 33#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= |#valid| |old(#valid)|) (<= 0 |#NULL.base|) (= |#memory_int| |old(#memory_int)|) (= |#NULL.offset| 0) (= |old(#length)| |#length|) (= 0 (select |old(#valid)| 0)) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-07 15:23:45,890 INFO L193 IcfgInterpreter]: Reachable states at location L27 satisfy 120#(or (exists ((v_avg_~ret~0_BEFORE_RETURN_1 Int) (v_prenex_1 Int)) (or (and (< v_prenex_1 0) (not (< main_~i~1 5)) (<= (mod (+ (div v_prenex_1 5) 1) 4294967296) 2147483647) (= (mod (+ (div v_prenex_1 5) 1) 4294967296) |main_#t~ret4|) (not (= (mod v_prenex_1 5) 0))) (and (not (< v_avg_~ret~0_BEFORE_RETURN_1 0)) (= |main_#t~ret4| (+ (mod (div v_avg_~ret~0_BEFORE_RETURN_1 5) 4294967296) (- 4294967296))) (not (<= (mod (div v_avg_~ret~0_BEFORE_RETURN_1 5) 4294967296) 2147483647)) (not (< main_~i~1 5))) (and (= |main_#t~ret4| (+ (mod (div v_avg_~ret~0_BEFORE_RETURN_1 5) 4294967296) (- 4294967296))) (not (<= (mod (div v_avg_~ret~0_BEFORE_RETURN_1 5) 4294967296) 2147483647)) (not (< main_~i~1 5)) (= (mod v_avg_~ret~0_BEFORE_RETURN_1 5) 0)) (and (= |main_#t~ret4| (mod (div v_avg_~ret~0_BEFORE_RETURN_1 5) 4294967296)) (not (< v_avg_~ret~0_BEFORE_RETURN_1 0)) (not (< main_~i~1 5)) (<= (mod (div v_avg_~ret~0_BEFORE_RETURN_1 5) 4294967296) 2147483647)) (and (< v_prenex_1 0) (not (< main_~i~1 5)) (not (<= (mod (+ (div v_prenex_1 5) 1) 4294967296) 2147483647)) (= (+ (mod (+ (div v_prenex_1 5) 1) 4294967296) (- 4294967296)) |main_#t~ret4|) (not (= (mod v_prenex_1 5) 0))) (and (= |main_#t~ret4| (mod (div v_avg_~ret~0_BEFORE_RETURN_1 5) 4294967296)) (not (< main_~i~1 5)) (<= (mod (div v_avg_~ret~0_BEFORE_RETURN_1 5) 4294967296) 2147483647) (= (mod v_avg_~ret~0_BEFORE_RETURN_1 5) 0)))) (exists ((v_avg_~ret~0_BEFORE_RETURN_2 Int) (v_prenex_2 Int)) (or (and (not (< v_prenex_2 0)) (not (< main_~i~1 5)) (<= (mod (+ (div v_prenex_2 5) 1) 4294967296) 2147483647) (= |main_#t~ret4| (+ (mod (div v_prenex_2 5) 4294967296) (- 4294967296))) (not (<= (mod (div v_prenex_2 5) 4294967296) 2147483647))) (and (<= (mod (div v_avg_~ret~0_BEFORE_RETURN_2 5) 4294967296) 2147483647) (< v_avg_~ret~0_BEFORE_RETURN_2 0) (= |main_#t~ret4| (mod (+ (div v_avg_~ret~0_BEFORE_RETURN_2 5) 1) 4294967296)) (not (< main_~i~1 5)) (not (= 0 (mod v_avg_~ret~0_BEFORE_RETURN_2 5))) (<= (mod (+ (div v_avg_~ret~0_BEFORE_RETURN_2 5) 1) 4294967296) 2147483647)) (and (<= (mod (div v_avg_~ret~0_BEFORE_RETURN_2 5) 4294967296) 2147483647) (= (mod (div v_avg_~ret~0_BEFORE_RETURN_2 5) 4294967296) |main_#t~ret4|) (= 0 (mod v_avg_~ret~0_BEFORE_RETURN_2 5)) (not (< main_~i~1 5)) (<= (mod (+ (div v_avg_~ret~0_BEFORE_RETURN_2 5) 1) 4294967296) 2147483647)) (and (not (< main_~i~1 5)) (not (<= (mod (+ (div v_prenex_2 5) 1) 4294967296) 2147483647)) (< v_prenex_2 0) (not (= 0 (mod v_prenex_2 5))) (not (<= (mod (div v_prenex_2 5) 4294967296) 2147483647)) (= (+ (mod (+ (div v_prenex_2 5) 1) 4294967296) (- 4294967296)) |main_#t~ret4|)) (and (<= (mod (div v_avg_~ret~0_BEFORE_RETURN_2 5) 4294967296) 2147483647) (not (< v_avg_~ret~0_BEFORE_RETURN_2 0)) (= (mod (div v_avg_~ret~0_BEFORE_RETURN_2 5) 4294967296) |main_#t~ret4|) (not (< main_~i~1 5)) (not (<= (mod (+ (div v_avg_~ret~0_BEFORE_RETURN_2 5) 1) 4294967296) 2147483647))) (and (= 0 (mod v_prenex_2 5)) (not (< main_~i~1 5)) (not (<= (mod (+ (div v_prenex_2 5) 1) 4294967296) 2147483647)) (= |main_#t~ret4| (+ (mod (div v_prenex_2 5) 4294967296) (- 4294967296))) (not (<= (mod (div v_prenex_2 5) 4294967296) 2147483647))) (and (not (< main_~i~1 5)) (< v_prenex_2 0) (<= (mod (+ (div v_prenex_2 5) 1) 4294967296) 2147483647) (= |main_#t~ret4| (mod (+ (div v_prenex_2 5) 1) 4294967296)) (not (= 0 (mod v_prenex_2 5))) (not (<= (mod (div v_prenex_2 5) 4294967296) 2147483647))) (and (<= (mod (div v_avg_~ret~0_BEFORE_RETURN_2 5) 4294967296) 2147483647) (not (< v_avg_~ret~0_BEFORE_RETURN_2 0)) (= (mod (div v_avg_~ret~0_BEFORE_RETURN_2 5) 4294967296) |main_#t~ret4|) (not (< main_~i~1 5)) (<= (mod (+ (div v_avg_~ret~0_BEFORE_RETURN_2 5) 1) 4294967296) 2147483647)) (and (= 0 (mod v_prenex_2 5)) (not (< main_~i~1 5)) (<= (mod (+ (div v_prenex_2 5) 1) 4294967296) 2147483647) (= |main_#t~ret4| (+ (mod (div v_prenex_2 5) 4294967296) (- 4294967296))) (not (<= (mod (div v_prenex_2 5) 4294967296) 2147483647))) (and (<= (mod (div v_avg_~ret~0_BEFORE_RETURN_2 5) 4294967296) 2147483647) (= (mod (div v_avg_~ret~0_BEFORE_RETURN_2 5) 4294967296) |main_#t~ret4|) (= 0 (mod v_avg_~ret~0_BEFORE_RETURN_2 5)) (not (< main_~i~1 5)) (not (<= (mod (+ (div v_avg_~ret~0_BEFORE_RETURN_2 5) 1) 4294967296) 2147483647))) (and (not (< v_prenex_2 0)) (not (< main_~i~1 5)) (not (<= (mod (+ (div v_prenex_2 5) 1) 4294967296) 2147483647)) (= |main_#t~ret4| (+ (mod (div v_prenex_2 5) 4294967296) (- 4294967296))) (not (<= (mod (div v_prenex_2 5) 4294967296) 2147483647))) (and (<= (mod (div v_avg_~ret~0_BEFORE_RETURN_2 5) 4294967296) 2147483647) (= (+ (mod (+ (div v_avg_~ret~0_BEFORE_RETURN_2 5) 1) 4294967296) (- 4294967296)) |main_#t~ret4|) (< v_avg_~ret~0_BEFORE_RETURN_2 0) (not (< main_~i~1 5)) (not (<= (mod (+ (div v_avg_~ret~0_BEFORE_RETURN_2 5) 1) 4294967296) 2147483647)) (not (= 0 (mod v_avg_~ret~0_BEFORE_RETURN_2 5))))))) [2019-10-07 15:23:45,890 INFO L193 IcfgInterpreter]: Reachable states at location L38 satisfy 399#true [2019-10-07 15:23:45,891 INFO L193 IcfgInterpreter]: Reachable states at location mainErr0ASSERT_VIOLATIONERROR_FUNCTION satisfy 239#(or (not (= main_~ret~1 main_~ret2~0)) (not (= main_~ret~1 main_~ret5~0))) [2019-10-07 15:23:45,891 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initEXIT satisfy 700#(and (= |#valid| (store |old(#valid)| 0 0)) (= 0 |#NULL.base|) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-07 15:23:45,891 INFO L193 IcfgInterpreter]: Reachable states at location avgEXIT satisfy 691#(and (<= 5 avg_~i~0) (<= 0 avg_~i~0) (= (ite (<= (mod (ite (and (not (= 0 (mod avg_~ret~0 5))) (< avg_~ret~0 0)) (+ (div avg_~ret~0 5) 1) (div avg_~ret~0 5)) 4294967296) 2147483647) (mod (ite (and (not (= 0 (mod avg_~ret~0 5))) (< avg_~ret~0 0)) (+ (div avg_~ret~0 5) 1) (div avg_~ret~0 5)) 4294967296) (+ (mod (ite (and (not (= 0 (mod avg_~ret~0 5))) (< avg_~ret~0 0)) (+ (div avg_~ret~0 5) 1) (div avg_~ret~0 5)) 4294967296) (- 4294967296))) |avg_#res|) (not (< avg_~i~0 5))) [2019-10-07 15:23:45,892 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.startENTRY satisfy 6#true [2019-10-07 15:23:45,892 INFO L193 IcfgInterpreter]: Reachable states at location L39 satisfy 323#(or (not (= main_~ret~1 main_~ret2~0)) (not (= main_~ret~1 main_~ret5~0))) [2019-10-07 15:23:45,892 INFO L193 IcfgInterpreter]: Reachable states at location L30-1 satisfy 634#true [2019-10-07 15:23:45,892 INFO L193 IcfgInterpreter]: Reachable states at location L32-3 satisfy 597#true [2019-10-07 15:23:45,893 INFO L193 IcfgInterpreter]: Reachable states at location L23-4 satisfy 73#(and (not (< main_~i~1 5)) (<= 5 main_~i~1)) [2019-10-07 15:23:45,894 INFO L193 IcfgInterpreter]: Reachable states at location avgENTRY satisfy 648#true [2019-10-07 15:23:45,895 INFO L193 IcfgInterpreter]: Reachable states at location L30 satisfy 639#true [2019-10-07 15:23:45,895 INFO L193 IcfgInterpreter]: Reachable states at location L23-3 satisfy 68#true [2019-10-07 15:23:46,185 INFO L211 tionRefinementEngine]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2019-10-07 15:23:46,185 INFO L224 tionRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4, 4, 11] total 17 [2019-10-07 15:23:46,187 INFO L442 AbstractCegarLoop]: Interpolant automaton has 17 states [2019-10-07 15:23:46,187 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2019-10-07 15:23:46,188 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=46, Invalid=226, Unknown=0, NotChecked=0, Total=272 [2019-10-07 15:23:46,188 INFO L87 Difference]: Start difference. First operand 22 states and 26 transitions. Second operand 17 states. [2019-10-07 15:24:00,730 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-07 15:24:00,731 INFO L93 Difference]: Finished difference Result 40 states and 50 transitions. [2019-10-07 15:24:00,733 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2019-10-07 15:24:00,733 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 29 [2019-10-07 15:24:00,734 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-07 15:24:00,734 INFO L225 Difference]: With dead ends: 40 [2019-10-07 15:24:00,735 INFO L226 Difference]: Without dead ends: 25 [2019-10-07 15:24:00,736 INFO L606 BasicCegarLoop]: 0 DeclaredPredicates, 103 GetRequests, 77 SyntacticMatches, 0 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 165 ImplicationChecksByTransitivity, 8.6s TimeCoverageRelationStatistics Valid=123, Invalid=629, Unknown=4, NotChecked=0, Total=756 [2019-10-07 15:24:00,737 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25 states. [2019-10-07 15:24:00,743 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25 to 25. [2019-10-07 15:24:00,744 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 25 states. [2019-10-07 15:24:00,746 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25 states to 25 states and 29 transitions. [2019-10-07 15:24:00,746 INFO L78 Accepts]: Start accepts. Automaton has 25 states and 29 transitions. Word has length 29 [2019-10-07 15:24:00,746 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-07 15:24:00,747 INFO L462 AbstractCegarLoop]: Abstraction has 25 states and 29 transitions. [2019-10-07 15:24:00,747 INFO L463 AbstractCegarLoop]: Interpolant automaton has 17 states. [2019-10-07 15:24:00,747 INFO L276 IsEmpty]: Start isEmpty. Operand 25 states and 29 transitions. [2019-10-07 15:24:00,749 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2019-10-07 15:24:00,750 INFO L377 BasicCegarLoop]: Found error trace [2019-10-07 15:24:00,750 INFO L385 BasicCegarLoop]: trace histogram [4, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-07 15:24:00,959 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-07 15:24:00,960 INFO L410 AbstractCegarLoop]: === Iteration 5 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-07 15:24:00,960 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-07 15:24:00,960 INFO L82 PathProgramCache]: Analyzing trace with hash -892290920, now seen corresponding path program 2 times [2019-10-07 15:24:00,960 INFO L150 tionRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-10-07 15:24:00,960 INFO L231 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2019-10-07 15:24:00,960 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-07 15:24:00,960 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-07 15:24:00,961 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-07 15:24:01,005 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-07 15:24:01,078 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2019-10-07 15:24:01,079 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2019-10-07 15:24:01,079 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2019-10-07 15:24:01,079 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-07 15:24:01,149 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 2 check-sat command(s) [2019-10-07 15:24:01,149 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-10-07 15:24:01,150 INFO L256 TraceCheckSpWp]: Trace formula consists of 108 conjuncts, 3 conjunts are in the unsatisfiable core [2019-10-07 15:24:01,153 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2019-10-07 15:24:01,169 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 10 proven. 1 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2019-10-07 15:24:01,170 INFO L322 TraceCheckSpWp]: Computing backward predicates... [2019-10-07 15:24:01,196 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 10 proven. 1 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2019-10-07 15:24:01,197 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSifa [2019-10-07 15:24:01,198 INFO L162 IcfgInterpreter]: Started Sifa with 19 locations of interest [2019-10-07 15:24:01,198 INFO L169 IcfgInterpreter]: Building call graph [2019-10-07 15:24:01,199 INFO L174 IcfgInterpreter]: Initial procedures are [ULTIMATE.start] [2019-10-07 15:24:01,199 INFO L179 IcfgInterpreter]: Starting interpretation [2019-10-07 15:24:01,200 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.start with input of size 1 for LOIs [2019-10-07 15:24:01,221 INFO L199 IcfgInterpreter]: Interpreting procedure main with input of size 21 for LOIs [2019-10-07 15:24:19,049 INFO L199 IcfgInterpreter]: Interpreting procedure avg with input of size 1 for LOIs [2019-10-07 15:24:19,083 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.init with input of size 10 for LOIs [2019-10-07 15:24:19,086 INFO L183 IcfgInterpreter]: Interpretation finished [2019-10-07 15:24:19,086 INFO L191 IcfgInterpreter]: Final predicates for locations of interest are: [2019-10-07 15:24:19,086 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initENTRY satisfy 695#(and (= |old(#NULL.base)| |#NULL.base|) (= |#valid| |old(#valid)|) (= |#NULL.offset| |old(#NULL.offset)|)) [2019-10-07 15:24:19,087 INFO L193 IcfgInterpreter]: Reachable states at location L36-1 satisfy 460#true [2019-10-07 15:24:19,087 INFO L193 IcfgInterpreter]: Reachable states at location L36 satisfy 602#(and (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 16))) (<= 4 main_~i~2) (not (< main_~i~2 4))) [2019-10-07 15:24:19,087 INFO L193 IcfgInterpreter]: Reachable states at location L9-3 satisfy 686#(<= 0 avg_~i~0) [2019-10-07 15:24:19,087 INFO L193 IcfgInterpreter]: Reachable states at location L-1 satisfy 23#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= 0 (select |#valid| 0)) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-07 15:24:19,087 INFO L193 IcfgInterpreter]: Reachable states at location mainENTRY satisfy 33#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= |#valid| |old(#valid)|) (<= 0 |#NULL.base|) (= |#memory_int| |old(#memory_int)|) (= |#NULL.offset| 0) (= |old(#length)| |#length|) (= 0 (select |old(#valid)| 0)) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-07 15:24:19,088 INFO L193 IcfgInterpreter]: Reachable states at location L27 satisfy 120#(or (exists ((v_avg_~ret~0_BEFORE_RETURN_28 Int) (v_prenex_306 Int)) (or (and (<= (mod (div v_prenex_306 5) 4294967296) 2147483647) (= |main_#t~ret4| (mod (div v_prenex_306 5) 4294967296)) (not (< v_prenex_306 0)) (not (< main_~i~1 5))) (and (not (= (mod v_avg_~ret~0_BEFORE_RETURN_28 5) 0)) (not (< main_~i~1 5)) (< v_avg_~ret~0_BEFORE_RETURN_28 0) (= (mod (+ (div v_avg_~ret~0_BEFORE_RETURN_28 5) 1) 4294967296) |main_#t~ret4|) (<= (mod (+ (div v_avg_~ret~0_BEFORE_RETURN_28 5) 1) 4294967296) 2147483647)) (and (not (<= (mod (div v_prenex_306 5) 4294967296) 2147483647)) (not (< main_~i~1 5)) (= (+ (mod (div v_prenex_306 5) 4294967296) (- 4294967296)) |main_#t~ret4|) (= (mod v_prenex_306 5) 0)) (and (not (<= (mod (+ (div v_avg_~ret~0_BEFORE_RETURN_28 5) 1) 4294967296) 2147483647)) (not (= (mod v_avg_~ret~0_BEFORE_RETURN_28 5) 0)) (not (< main_~i~1 5)) (= (+ (mod (+ (div v_avg_~ret~0_BEFORE_RETURN_28 5) 1) 4294967296) (- 4294967296)) |main_#t~ret4|) (< v_avg_~ret~0_BEFORE_RETURN_28 0)) (and (not (<= (mod (div v_prenex_306 5) 4294967296) 2147483647)) (not (< v_prenex_306 0)) (not (< main_~i~1 5)) (= (+ (mod (div v_prenex_306 5) 4294967296) (- 4294967296)) |main_#t~ret4|)) (and (<= (mod (div v_prenex_306 5) 4294967296) 2147483647) (= |main_#t~ret4| (mod (div v_prenex_306 5) 4294967296)) (not (< main_~i~1 5)) (= (mod v_prenex_306 5) 0)))) (exists ((v_avg_~ret~0_BEFORE_RETURN_27 Int) (v_prenex_305 Int)) (or (and (= |main_#t~ret4| (+ (mod (div v_avg_~ret~0_BEFORE_RETURN_27 5) 4294967296) (- 4294967296))) (not (< main_~i~1 5)) (not (<= (mod (div v_avg_~ret~0_BEFORE_RETURN_27 5) 4294967296) 2147483647)) (= 0 (mod v_avg_~ret~0_BEFORE_RETURN_27 5)) (<= (mod (+ (div v_avg_~ret~0_BEFORE_RETURN_27 5) 1) 4294967296) 2147483647)) (and (<= (mod (div v_avg_~ret~0_BEFORE_RETURN_27 5) 4294967296) 2147483647) (not (< main_~i~1 5)) (not (= 0 (mod v_avg_~ret~0_BEFORE_RETURN_27 5))) (< v_avg_~ret~0_BEFORE_RETURN_27 0) (= (mod (+ (div v_avg_~ret~0_BEFORE_RETURN_27 5) 1) 4294967296) |main_#t~ret4|) (<= (mod (+ (div v_avg_~ret~0_BEFORE_RETURN_27 5) 1) 4294967296) 2147483647)) (and (not (<= (mod (+ (div v_prenex_305 5) 1) 4294967296) 2147483647)) (not (< main_~i~1 5)) (<= (mod (div v_prenex_305 5) 4294967296) 2147483647) (= (mod (div v_prenex_305 5) 4294967296) |main_#t~ret4|) (not (< v_prenex_305 0))) (and (not (<= (mod (+ (div v_prenex_305 5) 1) 4294967296) 2147483647)) (not (< main_~i~1 5)) (<= (mod (div v_prenex_305 5) 4294967296) 2147483647) (= (mod (div v_prenex_305 5) 4294967296) |main_#t~ret4|) (= 0 (mod v_prenex_305 5))) (and (= |main_#t~ret4| (+ (mod (div v_prenex_305 5) 4294967296) (- 4294967296))) (not (<= (mod (div v_prenex_305 5) 4294967296) 2147483647)) (not (<= (mod (+ (div v_prenex_305 5) 1) 4294967296) 2147483647)) (not (< main_~i~1 5)) (= 0 (mod v_prenex_305 5))) (and (not (< v_avg_~ret~0_BEFORE_RETURN_27 0)) (= |main_#t~ret4| (+ (mod (div v_avg_~ret~0_BEFORE_RETURN_27 5) 4294967296) (- 4294967296))) (not (< main_~i~1 5)) (not (<= (mod (div v_avg_~ret~0_BEFORE_RETURN_27 5) 4294967296) 2147483647)) (<= (mod (+ (div v_avg_~ret~0_BEFORE_RETURN_27 5) 1) 4294967296) 2147483647)) (and (not (<= (mod (+ (div v_prenex_305 5) 1) 4294967296) 2147483647)) (not (= 0 (mod v_prenex_305 5))) (= (+ (mod (+ (div v_prenex_305 5) 1) 4294967296) (- 4294967296)) |main_#t~ret4|) (not (< main_~i~1 5)) (<= (mod (div v_prenex_305 5) 4294967296) 2147483647) (< v_prenex_305 0)) (and (not (< main_~i~1 5)) (not (<= (mod (div v_avg_~ret~0_BEFORE_RETURN_27 5) 4294967296) 2147483647)) (not (= 0 (mod v_avg_~ret~0_BEFORE_RETURN_27 5))) (< v_avg_~ret~0_BEFORE_RETURN_27 0) (= (mod (+ (div v_avg_~ret~0_BEFORE_RETURN_27 5) 1) 4294967296) |main_#t~ret4|) (<= (mod (+ (div v_avg_~ret~0_BEFORE_RETURN_27 5) 1) 4294967296) 2147483647)) (and (not (<= (mod (div v_prenex_305 5) 4294967296) 2147483647)) (not (<= (mod (+ (div v_prenex_305 5) 1) 4294967296) 2147483647)) (not (= 0 (mod v_prenex_305 5))) (= (+ (mod (+ (div v_prenex_305 5) 1) 4294967296) (- 4294967296)) |main_#t~ret4|) (not (< main_~i~1 5)) (< v_prenex_305 0)) (and (= |main_#t~ret4| (+ (mod (div v_prenex_305 5) 4294967296) (- 4294967296))) (not (<= (mod (div v_prenex_305 5) 4294967296) 2147483647)) (not (<= (mod (+ (div v_prenex_305 5) 1) 4294967296) 2147483647)) (not (< main_~i~1 5)) (not (< v_prenex_305 0))) (and (<= (mod (div v_avg_~ret~0_BEFORE_RETURN_27 5) 4294967296) 2147483647) (= (mod (div v_avg_~ret~0_BEFORE_RETURN_27 5) 4294967296) |main_#t~ret4|) (not (< main_~i~1 5)) (= 0 (mod v_avg_~ret~0_BEFORE_RETURN_27 5)) (<= (mod (+ (div v_avg_~ret~0_BEFORE_RETURN_27 5) 1) 4294967296) 2147483647)) (and (<= (mod (div v_avg_~ret~0_BEFORE_RETURN_27 5) 4294967296) 2147483647) (not (< v_avg_~ret~0_BEFORE_RETURN_27 0)) (= (mod (div v_avg_~ret~0_BEFORE_RETURN_27 5) 4294967296) |main_#t~ret4|) (not (< main_~i~1 5)) (<= (mod (+ (div v_avg_~ret~0_BEFORE_RETURN_27 5) 1) 4294967296) 2147483647))))) [2019-10-07 15:24:19,088 INFO L193 IcfgInterpreter]: Reachable states at location L38 satisfy 399#true [2019-10-07 15:24:19,088 INFO L193 IcfgInterpreter]: Reachable states at location mainErr0ASSERT_VIOLATIONERROR_FUNCTION satisfy 239#(or (not (= main_~ret~1 main_~ret2~0)) (not (= main_~ret~1 main_~ret5~0))) [2019-10-07 15:24:19,088 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initEXIT satisfy 700#(and (= |#valid| (store |old(#valid)| 0 0)) (= 0 |#NULL.base|) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-07 15:24:19,089 INFO L193 IcfgInterpreter]: Reachable states at location avgEXIT satisfy 691#(and (<= 5 avg_~i~0) (<= 0 avg_~i~0) (= (ite (<= (mod (ite (and (not (= 0 (mod avg_~ret~0 5))) (< avg_~ret~0 0)) (+ (div avg_~ret~0 5) 1) (div avg_~ret~0 5)) 4294967296) 2147483647) (mod (ite (and (not (= 0 (mod avg_~ret~0 5))) (< avg_~ret~0 0)) (+ (div avg_~ret~0 5) 1) (div avg_~ret~0 5)) 4294967296) (+ (mod (ite (and (not (= 0 (mod avg_~ret~0 5))) (< avg_~ret~0 0)) (+ (div avg_~ret~0 5) 1) (div avg_~ret~0 5)) 4294967296) (- 4294967296))) |avg_#res|) (not (< avg_~i~0 5))) [2019-10-07 15:24:19,089 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.startENTRY satisfy 6#true [2019-10-07 15:24:19,089 INFO L193 IcfgInterpreter]: Reachable states at location L39 satisfy 323#(or (not (= main_~ret~1 main_~ret2~0)) (not (= main_~ret~1 main_~ret5~0))) [2019-10-07 15:24:19,089 INFO L193 IcfgInterpreter]: Reachable states at location L30-1 satisfy 634#true [2019-10-07 15:24:19,089 INFO L193 IcfgInterpreter]: Reachable states at location L32-3 satisfy 597#true [2019-10-07 15:24:19,089 INFO L193 IcfgInterpreter]: Reachable states at location L23-4 satisfy 73#(and (not (< main_~i~1 5)) (<= 5 main_~i~1)) [2019-10-07 15:24:19,090 INFO L193 IcfgInterpreter]: Reachable states at location avgENTRY satisfy 648#true [2019-10-07 15:24:19,090 INFO L193 IcfgInterpreter]: Reachable states at location L30 satisfy 639#true [2019-10-07 15:24:19,090 INFO L193 IcfgInterpreter]: Reachable states at location L23-3 satisfy 68#true [2019-10-07 15:24:21,392 INFO L211 tionRefinementEngine]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2019-10-07 15:24:21,392 INFO L224 tionRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 4, 4, 11] total 21 [2019-10-07 15:24:21,393 INFO L442 AbstractCegarLoop]: Interpolant automaton has 21 states [2019-10-07 15:24:21,394 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2019-10-07 15:24:21,394 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=60, Invalid=359, Unknown=1, NotChecked=0, Total=420 [2019-10-07 15:24:21,395 INFO L87 Difference]: Start difference. First operand 25 states and 29 transitions. Second operand 21 states. [2019-10-07 15:24:48,171 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-07 15:24:48,171 INFO L93 Difference]: Finished difference Result 44 states and 58 transitions. [2019-10-07 15:24:48,173 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2019-10-07 15:24:48,173 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 32 [2019-10-07 15:24:48,174 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-07 15:24:48,174 INFO L225 Difference]: With dead ends: 44 [2019-10-07 15:24:48,174 INFO L226 Difference]: Without dead ends: 29 [2019-10-07 15:24:48,175 INFO L606 BasicCegarLoop]: 0 DeclaredPredicates, 118 GetRequests, 83 SyntacticMatches, 0 SemanticMatches, 35 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 261 ImplicationChecksByTransitivity, 14.8s TimeCoverageRelationStatistics Valid=200, Invalid=1125, Unknown=7, NotChecked=0, Total=1332 [2019-10-07 15:24:48,176 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 29 states. [2019-10-07 15:24:48,183 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 29 to 29. [2019-10-07 15:24:48,183 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 29 states. [2019-10-07 15:24:48,184 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29 states to 29 states and 33 transitions. [2019-10-07 15:24:48,184 INFO L78 Accepts]: Start accepts. Automaton has 29 states and 33 transitions. Word has length 32 [2019-10-07 15:24:48,185 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-07 15:24:48,185 INFO L462 AbstractCegarLoop]: Abstraction has 29 states and 33 transitions. [2019-10-07 15:24:48,185 INFO L463 AbstractCegarLoop]: Interpolant automaton has 21 states. [2019-10-07 15:24:48,185 INFO L276 IsEmpty]: Start isEmpty. Operand 29 states and 33 transitions. [2019-10-07 15:24:48,186 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2019-10-07 15:24:48,186 INFO L377 BasicCegarLoop]: Found error trace [2019-10-07 15:24:48,187 INFO L385 BasicCegarLoop]: trace histogram [12, 5, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-07 15:24:48,388 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 4 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-07 15:24:48,389 INFO L410 AbstractCegarLoop]: === Iteration 6 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-07 15:24:48,389 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-07 15:24:48,390 INFO L82 PathProgramCache]: Analyzing trace with hash -337812683, now seen corresponding path program 3 times [2019-10-07 15:24:48,390 INFO L150 tionRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-10-07 15:24:48,390 INFO L231 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2019-10-07 15:24:48,390 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-07 15:24:48,391 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-07 15:24:48,391 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-07 15:24:48,444 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-07 15:24:48,510 INFO L134 CoverageAnalysis]: Checked inductivity of 127 backedges. 52 proven. 10 refuted. 0 times theorem prover too weak. 65 trivial. 0 not checked. [2019-10-07 15:24:48,510 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2019-10-07 15:24:48,510 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2019-10-07 15:24:48,511 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-07 15:24:48,634 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2019-10-07 15:24:48,635 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-10-07 15:24:48,636 INFO L256 TraceCheckSpWp]: Trace formula consists of 211 conjuncts, 6 conjunts are in the unsatisfiable core [2019-10-07 15:24:48,649 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2019-10-07 15:24:48,685 INFO L134 CoverageAnalysis]: Checked inductivity of 127 backedges. 52 proven. 10 refuted. 0 times theorem prover too weak. 65 trivial. 0 not checked. [2019-10-07 15:24:48,685 INFO L322 TraceCheckSpWp]: Computing backward predicates... [2019-10-07 15:24:48,725 INFO L134 CoverageAnalysis]: Checked inductivity of 127 backedges. 0 proven. 62 refuted. 0 times theorem prover too weak. 65 trivial. 0 not checked. [2019-10-07 15:24:48,725 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSifa [2019-10-07 15:24:48,727 INFO L162 IcfgInterpreter]: Started Sifa with 19 locations of interest [2019-10-07 15:24:48,728 INFO L169 IcfgInterpreter]: Building call graph [2019-10-07 15:24:48,728 INFO L174 IcfgInterpreter]: Initial procedures are [ULTIMATE.start] [2019-10-07 15:24:48,729 INFO L179 IcfgInterpreter]: Starting interpretation [2019-10-07 15:24:48,729 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.start with input of size 1 for LOIs [2019-10-07 15:24:48,747 INFO L199 IcfgInterpreter]: Interpreting procedure main with input of size 21 for LOIs [2019-10-07 15:25:06,489 INFO L199 IcfgInterpreter]: Interpreting procedure avg with input of size 1 for LOIs [2019-10-07 15:25:06,518 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.init with input of size 10 for LOIs [2019-10-07 15:25:06,520 INFO L183 IcfgInterpreter]: Interpretation finished [2019-10-07 15:25:06,520 INFO L191 IcfgInterpreter]: Final predicates for locations of interest are: [2019-10-07 15:25:06,520 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initENTRY satisfy 695#(and (= |old(#NULL.base)| |#NULL.base|) (= |#valid| |old(#valid)|) (= |#NULL.offset| |old(#NULL.offset)|)) [2019-10-07 15:25:06,521 INFO L193 IcfgInterpreter]: Reachable states at location L36-1 satisfy 460#true [2019-10-07 15:25:06,521 INFO L193 IcfgInterpreter]: Reachable states at location L36 satisfy 602#(and (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 16))) (<= 4 main_~i~2) (not (< main_~i~2 4))) [2019-10-07 15:25:06,521 INFO L193 IcfgInterpreter]: Reachable states at location L9-3 satisfy 686#(<= 0 avg_~i~0) [2019-10-07 15:25:06,521 INFO L193 IcfgInterpreter]: Reachable states at location L-1 satisfy 23#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= 0 (select |#valid| 0)) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-07 15:25:06,522 INFO L193 IcfgInterpreter]: Reachable states at location mainENTRY satisfy 33#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= |#valid| |old(#valid)|) (<= 0 |#NULL.base|) (= |#memory_int| |old(#memory_int)|) (= |#NULL.offset| 0) (= |old(#length)| |#length|) (= 0 (select |old(#valid)| 0)) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-07 15:25:06,522 INFO L193 IcfgInterpreter]: Reachable states at location L27 satisfy 120#(or (exists ((v_avg_~ret~0_BEFORE_RETURN_53 Int) (v_prenex_597 Int)) (or (and (not (<= (mod (+ (div v_prenex_597 5) 1) 4294967296) 2147483647)) (not (< main_~i~1 5)) (not (<= (mod (div v_prenex_597 5) 4294967296) 2147483647)) (= (+ (mod (div v_prenex_597 5) 4294967296) (- 4294967296)) |main_#t~ret4|) (= (mod v_prenex_597 5) 0)) (and (= (+ (mod (+ (div v_prenex_597 5) 1) 4294967296) (- 4294967296)) |main_#t~ret4|) (not (<= (mod (+ (div v_prenex_597 5) 1) 4294967296) 2147483647)) (not (< main_~i~1 5)) (<= (mod (div v_prenex_597 5) 4294967296) 2147483647) (< v_prenex_597 0) (not (= (mod v_prenex_597 5) 0))) (and (not (< v_avg_~ret~0_BEFORE_RETURN_53 0)) (<= (mod (+ (div v_avg_~ret~0_BEFORE_RETURN_53 5) 1) 4294967296) 2147483647) (not (<= (mod (div v_avg_~ret~0_BEFORE_RETURN_53 5) 4294967296) 2147483647)) (not (< main_~i~1 5)) (= (+ (mod (div v_avg_~ret~0_BEFORE_RETURN_53 5) 4294967296) (- 4294967296)) |main_#t~ret4|)) (and (not (<= (mod (+ (div v_prenex_597 5) 1) 4294967296) 2147483647)) (not (< main_~i~1 5)) (not (< v_prenex_597 0)) (not (<= (mod (div v_prenex_597 5) 4294967296) 2147483647)) (= (+ (mod (div v_prenex_597 5) 4294967296) (- 4294967296)) |main_#t~ret4|)) (and (= (mod (div v_avg_~ret~0_BEFORE_RETURN_53 5) 4294967296) |main_#t~ret4|) (<= (mod (+ (div v_avg_~ret~0_BEFORE_RETURN_53 5) 1) 4294967296) 2147483647) (not (< main_~i~1 5)) (<= (mod (div v_avg_~ret~0_BEFORE_RETURN_53 5) 4294967296) 2147483647) (= (mod v_avg_~ret~0_BEFORE_RETURN_53 5) 0)) (and (not (< v_avg_~ret~0_BEFORE_RETURN_53 0)) (= (mod (div v_avg_~ret~0_BEFORE_RETURN_53 5) 4294967296) |main_#t~ret4|) (<= (mod (+ (div v_avg_~ret~0_BEFORE_RETURN_53 5) 1) 4294967296) 2147483647) (not (< main_~i~1 5)) (<= (mod (div v_avg_~ret~0_BEFORE_RETURN_53 5) 4294967296) 2147483647)) (and (= (+ (mod (+ (div v_prenex_597 5) 1) 4294967296) (- 4294967296)) |main_#t~ret4|) (not (<= (mod (+ (div v_prenex_597 5) 1) 4294967296) 2147483647)) (not (< main_~i~1 5)) (not (<= (mod (div v_prenex_597 5) 4294967296) 2147483647)) (< v_prenex_597 0) (not (= (mod v_prenex_597 5) 0))) (and (< v_avg_~ret~0_BEFORE_RETURN_53 0) (<= (mod (+ (div v_avg_~ret~0_BEFORE_RETURN_53 5) 1) 4294967296) 2147483647) (not (<= (mod (div v_avg_~ret~0_BEFORE_RETURN_53 5) 4294967296) 2147483647)) (not (< main_~i~1 5)) (= |main_#t~ret4| (mod (+ (div v_avg_~ret~0_BEFORE_RETURN_53 5) 1) 4294967296)) (not (= (mod v_avg_~ret~0_BEFORE_RETURN_53 5) 0))) (and (= (mod (div v_prenex_597 5) 4294967296) |main_#t~ret4|) (not (<= (mod (+ (div v_prenex_597 5) 1) 4294967296) 2147483647)) (not (< main_~i~1 5)) (not (< v_prenex_597 0)) (<= (mod (div v_prenex_597 5) 4294967296) 2147483647)) (and (<= (mod (+ (div v_avg_~ret~0_BEFORE_RETURN_53 5) 1) 4294967296) 2147483647) (not (<= (mod (div v_avg_~ret~0_BEFORE_RETURN_53 5) 4294967296) 2147483647)) (not (< main_~i~1 5)) (= (+ (mod (div v_avg_~ret~0_BEFORE_RETURN_53 5) 4294967296) (- 4294967296)) |main_#t~ret4|) (= (mod v_avg_~ret~0_BEFORE_RETURN_53 5) 0)) (and (= (mod (div v_prenex_597 5) 4294967296) |main_#t~ret4|) (not (<= (mod (+ (div v_prenex_597 5) 1) 4294967296) 2147483647)) (not (< main_~i~1 5)) (<= (mod (div v_prenex_597 5) 4294967296) 2147483647) (= (mod v_prenex_597 5) 0)) (and (< v_avg_~ret~0_BEFORE_RETURN_53 0) (<= (mod (+ (div v_avg_~ret~0_BEFORE_RETURN_53 5) 1) 4294967296) 2147483647) (not (< main_~i~1 5)) (= |main_#t~ret4| (mod (+ (div v_avg_~ret~0_BEFORE_RETURN_53 5) 1) 4294967296)) (<= (mod (div v_avg_~ret~0_BEFORE_RETURN_53 5) 4294967296) 2147483647) (not (= (mod v_avg_~ret~0_BEFORE_RETURN_53 5) 0))))) (exists ((v_prenex_598 Int) (v_avg_~ret~0_BEFORE_RETURN_54 Int)) (or (and (not (< main_~i~1 5)) (not (= 0 (mod v_prenex_598 5))) (= (mod (+ (div v_prenex_598 5) 1) 4294967296) |main_#t~ret4|) (< v_prenex_598 0) (<= (mod (+ (div v_prenex_598 5) 1) 4294967296) 2147483647)) (and (= 0 (mod v_avg_~ret~0_BEFORE_RETURN_54 5)) (= (+ (mod (div v_avg_~ret~0_BEFORE_RETURN_54 5) 4294967296) (- 4294967296)) |main_#t~ret4|) (not (<= (mod (div v_avg_~ret~0_BEFORE_RETURN_54 5) 4294967296) 2147483647)) (not (< main_~i~1 5))) (and (= (+ (mod (+ (div v_prenex_598 5) 1) 4294967296) (- 4294967296)) |main_#t~ret4|) (not (<= (mod (+ (div v_prenex_598 5) 1) 4294967296) 2147483647)) (not (< main_~i~1 5)) (not (= 0 (mod v_prenex_598 5))) (< v_prenex_598 0)) (and (= (+ (mod (div v_avg_~ret~0_BEFORE_RETURN_54 5) 4294967296) (- 4294967296)) |main_#t~ret4|) (not (<= (mod (div v_avg_~ret~0_BEFORE_RETURN_54 5) 4294967296) 2147483647)) (not (< v_avg_~ret~0_BEFORE_RETURN_54 0)) (not (< main_~i~1 5))) (and (= 0 (mod v_avg_~ret~0_BEFORE_RETURN_54 5)) (<= (mod (div v_avg_~ret~0_BEFORE_RETURN_54 5) 4294967296) 2147483647) (not (< main_~i~1 5)) (= (mod (div v_avg_~ret~0_BEFORE_RETURN_54 5) 4294967296) |main_#t~ret4|)) (and (<= (mod (div v_avg_~ret~0_BEFORE_RETURN_54 5) 4294967296) 2147483647) (not (< v_avg_~ret~0_BEFORE_RETURN_54 0)) (not (< main_~i~1 5)) (= (mod (div v_avg_~ret~0_BEFORE_RETURN_54 5) 4294967296) |main_#t~ret4|))))) [2019-10-07 15:25:06,522 INFO L193 IcfgInterpreter]: Reachable states at location L38 satisfy 399#true [2019-10-07 15:25:06,523 INFO L193 IcfgInterpreter]: Reachable states at location mainErr0ASSERT_VIOLATIONERROR_FUNCTION satisfy 239#(or (not (= main_~ret~1 main_~ret2~0)) (not (= main_~ret~1 main_~ret5~0))) [2019-10-07 15:25:06,523 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initEXIT satisfy 700#(and (= |#valid| (store |old(#valid)| 0 0)) (= 0 |#NULL.base|) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-07 15:25:06,523 INFO L193 IcfgInterpreter]: Reachable states at location avgEXIT satisfy 691#(and (<= 5 avg_~i~0) (<= 0 avg_~i~0) (= (ite (<= (mod (ite (and (not (= 0 (mod avg_~ret~0 5))) (< avg_~ret~0 0)) (+ (div avg_~ret~0 5) 1) (div avg_~ret~0 5)) 4294967296) 2147483647) (mod (ite (and (not (= 0 (mod avg_~ret~0 5))) (< avg_~ret~0 0)) (+ (div avg_~ret~0 5) 1) (div avg_~ret~0 5)) 4294967296) (+ (mod (ite (and (not (= 0 (mod avg_~ret~0 5))) (< avg_~ret~0 0)) (+ (div avg_~ret~0 5) 1) (div avg_~ret~0 5)) 4294967296) (- 4294967296))) |avg_#res|) (not (< avg_~i~0 5))) [2019-10-07 15:25:06,523 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.startENTRY satisfy 6#true [2019-10-07 15:25:06,523 INFO L193 IcfgInterpreter]: Reachable states at location L39 satisfy 323#(or (not (= main_~ret~1 main_~ret2~0)) (not (= main_~ret~1 main_~ret5~0))) [2019-10-07 15:25:06,524 INFO L193 IcfgInterpreter]: Reachable states at location L30-1 satisfy 634#true [2019-10-07 15:25:06,524 INFO L193 IcfgInterpreter]: Reachable states at location L32-3 satisfy 597#true [2019-10-07 15:25:06,524 INFO L193 IcfgInterpreter]: Reachable states at location L23-4 satisfy 73#(and (not (< main_~i~1 5)) (<= 5 main_~i~1)) [2019-10-07 15:25:06,524 INFO L193 IcfgInterpreter]: Reachable states at location avgENTRY satisfy 648#true [2019-10-07 15:25:06,524 INFO L193 IcfgInterpreter]: Reachable states at location L30 satisfy 639#true [2019-10-07 15:25:06,524 INFO L193 IcfgInterpreter]: Reachable states at location L23-3 satisfy 68#true [2019-10-07 15:25:08,798 INFO L211 tionRefinementEngine]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2019-10-07 15:25:08,798 INFO L224 tionRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 7, 11] total 18 [2019-10-07 15:25:08,800 INFO L442 AbstractCegarLoop]: Interpolant automaton has 18 states [2019-10-07 15:25:08,800 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2019-10-07 15:25:08,801 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=54, Invalid=251, Unknown=1, NotChecked=0, Total=306 [2019-10-07 15:25:08,801 INFO L87 Difference]: Start difference. First operand 29 states and 33 transitions. Second operand 18 states. [2019-10-07 15:25:22,616 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-07 15:25:22,617 INFO L93 Difference]: Finished difference Result 47 states and 57 transitions. [2019-10-07 15:25:22,617 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2019-10-07 15:25:22,617 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 42 [2019-10-07 15:25:22,618 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-07 15:25:22,618 INFO L225 Difference]: With dead ends: 47 [2019-10-07 15:25:22,619 INFO L226 Difference]: Without dead ends: 30 [2019-10-07 15:25:22,620 INFO L606 BasicCegarLoop]: 0 DeclaredPredicates, 144 GetRequests, 111 SyntacticMatches, 5 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 182 ImplicationChecksByTransitivity, 7.8s TimeCoverageRelationStatistics Valid=173, Invalid=694, Unknown=3, NotChecked=0, Total=870 [2019-10-07 15:25:22,620 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30 states. [2019-10-07 15:25:22,624 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30 to 30. [2019-10-07 15:25:22,625 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 30 states. [2019-10-07 15:25:22,626 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 30 states to 30 states and 34 transitions. [2019-10-07 15:25:22,626 INFO L78 Accepts]: Start accepts. Automaton has 30 states and 34 transitions. Word has length 42 [2019-10-07 15:25:22,626 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-07 15:25:22,626 INFO L462 AbstractCegarLoop]: Abstraction has 30 states and 34 transitions. [2019-10-07 15:25:22,626 INFO L463 AbstractCegarLoop]: Interpolant automaton has 18 states. [2019-10-07 15:25:22,626 INFO L276 IsEmpty]: Start isEmpty. Operand 30 states and 34 transitions. [2019-10-07 15:25:22,627 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 46 [2019-10-07 15:25:22,627 INFO L377 BasicCegarLoop]: Found error trace [2019-10-07 15:25:22,628 INFO L385 BasicCegarLoop]: trace histogram [15, 5, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-07 15:25:22,828 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 5 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-07 15:25:22,829 INFO L410 AbstractCegarLoop]: === Iteration 7 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-07 15:25:22,829 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-07 15:25:22,830 INFO L82 PathProgramCache]: Analyzing trace with hash -201150501, now seen corresponding path program 4 times [2019-10-07 15:25:22,830 INFO L150 tionRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-10-07 15:25:22,830 INFO L231 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2019-10-07 15:25:22,830 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-07 15:25:22,831 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-07 15:25:22,831 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-07 15:25:22,907 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-07 15:25:22,975 INFO L134 CoverageAnalysis]: Checked inductivity of 175 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 174 trivial. 0 not checked. [2019-10-07 15:25:22,975 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2019-10-07 15:25:22,975 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2019-10-07 15:25:22,975 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-07 15:25:23,121 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-07 15:25:23,123 INFO L256 TraceCheckSpWp]: Trace formula consists of 226 conjuncts, 3 conjunts are in the unsatisfiable core [2019-10-07 15:25:23,128 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2019-10-07 15:25:23,144 INFO L134 CoverageAnalysis]: Checked inductivity of 175 backedges. 76 proven. 1 refuted. 0 times theorem prover too weak. 98 trivial. 0 not checked. [2019-10-07 15:25:23,144 INFO L322 TraceCheckSpWp]: Computing backward predicates... [2019-10-07 15:25:23,167 INFO L134 CoverageAnalysis]: Checked inductivity of 175 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 174 trivial. 0 not checked. [2019-10-07 15:25:23,168 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSifa [2019-10-07 15:25:23,171 INFO L162 IcfgInterpreter]: Started Sifa with 19 locations of interest [2019-10-07 15:25:23,171 INFO L169 IcfgInterpreter]: Building call graph [2019-10-07 15:25:23,171 INFO L174 IcfgInterpreter]: Initial procedures are [ULTIMATE.start] [2019-10-07 15:25:23,172 INFO L179 IcfgInterpreter]: Starting interpretation [2019-10-07 15:25:23,172 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.start with input of size 1 for LOIs [2019-10-07 15:25:23,191 INFO L199 IcfgInterpreter]: Interpreting procedure main with input of size 21 for LOIs [2019-10-07 15:25:57,844 INFO L199 IcfgInterpreter]: Interpreting procedure avg with input of size 1 for LOIs [2019-10-07 15:25:57,867 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.init with input of size 10 for LOIs [2019-10-07 15:25:57,869 INFO L183 IcfgInterpreter]: Interpretation finished [2019-10-07 15:25:57,869 INFO L191 IcfgInterpreter]: Final predicates for locations of interest are: [2019-10-07 15:25:57,869 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initENTRY satisfy 695#(and (= |old(#NULL.base)| |#NULL.base|) (= |#valid| |old(#valid)|) (= |#NULL.offset| |old(#NULL.offset)|)) [2019-10-07 15:25:57,870 INFO L193 IcfgInterpreter]: Reachable states at location L36-1 satisfy 460#true [2019-10-07 15:25:57,870 INFO L193 IcfgInterpreter]: Reachable states at location L36 satisfy 602#(and (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 16))) (<= 4 main_~i~2) (not (< main_~i~2 4))) [2019-10-07 15:25:57,870 INFO L193 IcfgInterpreter]: Reachable states at location L9-3 satisfy 686#(<= 0 avg_~i~0) [2019-10-07 15:25:57,870 INFO L193 IcfgInterpreter]: Reachable states at location L-1 satisfy 23#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= 0 (select |#valid| 0)) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-07 15:25:57,870 INFO L193 IcfgInterpreter]: Reachable states at location mainENTRY satisfy 33#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= |#valid| |old(#valid)|) (<= 0 |#NULL.base|) (= |#memory_int| |old(#memory_int)|) (= |#NULL.offset| 0) (= |old(#length)| |#length|) (= 0 (select |old(#valid)| 0)) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-07 15:25:57,871 INFO L193 IcfgInterpreter]: Reachable states at location L27 satisfy 120#(or (exists ((v_prenex_902 Int) (v_avg_~ret~0_BEFORE_RETURN_80 Int)) (or (and (= (+ (mod (div v_avg_~ret~0_BEFORE_RETURN_80 5) 4294967296) (- 4294967296)) |main_#t~ret4|) (not (<= (mod (div v_avg_~ret~0_BEFORE_RETURN_80 5) 4294967296) 2147483647)) (not (< main_~i~1 5)) (<= (mod (+ (div v_avg_~ret~0_BEFORE_RETURN_80 5) 1) 4294967296) 2147483647) (not (< v_avg_~ret~0_BEFORE_RETURN_80 0))) (and (< v_prenex_902 0) (<= (mod (div v_prenex_902 5) 4294967296) 2147483647) (= |main_#t~ret4| (+ (mod (+ (div v_prenex_902 5) 1) 4294967296) (- 4294967296))) (not (< main_~i~1 5)) (not (<= (mod (+ (div v_prenex_902 5) 1) 4294967296) 2147483647)) (not (= (mod v_prenex_902 5) 0))) (and (= (mod v_prenex_902 5) 0) (<= (mod (div v_prenex_902 5) 4294967296) 2147483647) (not (< main_~i~1 5)) (<= (mod (+ (div v_prenex_902 5) 1) 4294967296) 2147483647) (= (mod (div v_prenex_902 5) 4294967296) |main_#t~ret4|)) (and (not (= (mod v_avg_~ret~0_BEFORE_RETURN_80 5) 0)) (not (<= (mod (div v_avg_~ret~0_BEFORE_RETURN_80 5) 4294967296) 2147483647)) (= (mod (+ (div v_avg_~ret~0_BEFORE_RETURN_80 5) 1) 4294967296) |main_#t~ret4|) (not (< main_~i~1 5)) (<= (mod (+ (div v_avg_~ret~0_BEFORE_RETURN_80 5) 1) 4294967296) 2147483647) (< v_avg_~ret~0_BEFORE_RETURN_80 0)) (and (= (+ (mod (div v_avg_~ret~0_BEFORE_RETURN_80 5) 4294967296) (- 4294967296)) |main_#t~ret4|) (not (<= (mod (div v_avg_~ret~0_BEFORE_RETURN_80 5) 4294967296) 2147483647)) (= (mod v_avg_~ret~0_BEFORE_RETURN_80 5) 0) (not (< main_~i~1 5)) (<= (mod (+ (div v_avg_~ret~0_BEFORE_RETURN_80 5) 1) 4294967296) 2147483647)) (and (<= (mod (div v_prenex_902 5) 4294967296) 2147483647) (not (< main_~i~1 5)) (not (<= (mod (+ (div v_prenex_902 5) 1) 4294967296) 2147483647)) (= (mod (div v_prenex_902 5) 4294967296) |main_#t~ret4|) (not (< v_prenex_902 0))) (and (= (mod (+ (div v_prenex_902 5) 1) 4294967296) |main_#t~ret4|) (< v_prenex_902 0) (<= (mod (div v_prenex_902 5) 4294967296) 2147483647) (not (< main_~i~1 5)) (<= (mod (+ (div v_prenex_902 5) 1) 4294967296) 2147483647) (not (= (mod v_prenex_902 5) 0))) (and (not (= (mod v_avg_~ret~0_BEFORE_RETURN_80 5) 0)) (not (<= (mod (+ (div v_avg_~ret~0_BEFORE_RETURN_80 5) 1) 4294967296) 2147483647)) (not (<= (mod (div v_avg_~ret~0_BEFORE_RETURN_80 5) 4294967296) 2147483647)) (not (< main_~i~1 5)) (= |main_#t~ret4| (+ (mod (+ (div v_avg_~ret~0_BEFORE_RETURN_80 5) 1) 4294967296) (- 4294967296))) (< v_avg_~ret~0_BEFORE_RETURN_80 0)) (and (<= (mod (div v_prenex_902 5) 4294967296) 2147483647) (not (< main_~i~1 5)) (<= (mod (+ (div v_prenex_902 5) 1) 4294967296) 2147483647) (= (mod (div v_prenex_902 5) 4294967296) |main_#t~ret4|) (not (< v_prenex_902 0))) (and (= (+ (mod (div v_avg_~ret~0_BEFORE_RETURN_80 5) 4294967296) (- 4294967296)) |main_#t~ret4|) (not (<= (mod (+ (div v_avg_~ret~0_BEFORE_RETURN_80 5) 1) 4294967296) 2147483647)) (not (<= (mod (div v_avg_~ret~0_BEFORE_RETURN_80 5) 4294967296) 2147483647)) (= (mod v_avg_~ret~0_BEFORE_RETURN_80 5) 0) (not (< main_~i~1 5))) (and (= (+ (mod (div v_avg_~ret~0_BEFORE_RETURN_80 5) 4294967296) (- 4294967296)) |main_#t~ret4|) (not (<= (mod (+ (div v_avg_~ret~0_BEFORE_RETURN_80 5) 1) 4294967296) 2147483647)) (not (<= (mod (div v_avg_~ret~0_BEFORE_RETURN_80 5) 4294967296) 2147483647)) (not (< main_~i~1 5)) (not (< v_avg_~ret~0_BEFORE_RETURN_80 0))) (and (= (mod v_prenex_902 5) 0) (<= (mod (div v_prenex_902 5) 4294967296) 2147483647) (not (< main_~i~1 5)) (not (<= (mod (+ (div v_prenex_902 5) 1) 4294967296) 2147483647)) (= (mod (div v_prenex_902 5) 4294967296) |main_#t~ret4|)))) (exists ((v_avg_~ret~0_BEFORE_RETURN_79 Int) (v_prenex_901 Int)) (or (and (not (< main_~i~1 5)) (not (<= (mod (div v_avg_~ret~0_BEFORE_RETURN_79 5) 4294967296) 2147483647)) (= (mod v_avg_~ret~0_BEFORE_RETURN_79 5) 0) (= |main_#t~ret4| (+ (mod (div v_avg_~ret~0_BEFORE_RETURN_79 5) 4294967296) (- 4294967296))) (<= (mod (+ (div v_avg_~ret~0_BEFORE_RETURN_79 5) 1) 4294967296) 2147483647)) (and (<= (mod (div v_avg_~ret~0_BEFORE_RETURN_79 5) 4294967296) 2147483647) (< v_avg_~ret~0_BEFORE_RETURN_79 0) (not (< main_~i~1 5)) (not (= (mod v_avg_~ret~0_BEFORE_RETURN_79 5) 0)) (<= (mod (+ (div v_avg_~ret~0_BEFORE_RETURN_79 5) 1) 4294967296) 2147483647) (= (mod (+ (div v_avg_~ret~0_BEFORE_RETURN_79 5) 1) 4294967296) |main_#t~ret4|)) (and (< v_avg_~ret~0_BEFORE_RETURN_79 0) (not (< main_~i~1 5)) (not (<= (mod (div v_avg_~ret~0_BEFORE_RETURN_79 5) 4294967296) 2147483647)) (not (= (mod v_avg_~ret~0_BEFORE_RETURN_79 5) 0)) (= (mod (+ (div v_avg_~ret~0_BEFORE_RETURN_79 5) 1) 4294967296) |main_#t~ret4|) (<= (mod (+ (div v_avg_~ret~0_BEFORE_RETURN_79 5) 1) 4294967296) 2147483647)) (and (= (mod v_prenex_901 5) 0) (not (<= (mod (+ (div v_prenex_901 5) 1) 4294967296) 2147483647)) (not (< main_~i~1 5)) (<= (mod (div v_prenex_901 5) 4294967296) 2147483647) (= |main_#t~ret4| (mod (div v_prenex_901 5) 4294967296))) (and (not (<= (mod (+ (div v_prenex_901 5) 1) 4294967296) 2147483647)) (not (< main_~i~1 5)) (not (< v_prenex_901 0)) (<= (mod (div v_prenex_901 5) 4294967296) 2147483647) (= |main_#t~ret4| (mod (div v_prenex_901 5) 4294967296))) (and (= |main_#t~ret4| (+ (mod (div v_prenex_901 5) 4294967296) (- 4294967296))) (not (<= (mod (+ (div v_prenex_901 5) 1) 4294967296) 2147483647)) (not (< main_~i~1 5)) (not (< v_prenex_901 0)) (not (<= (mod (div v_prenex_901 5) 4294967296) 2147483647))) (and (= |main_#t~ret4| (mod (div v_avg_~ret~0_BEFORE_RETURN_79 5) 4294967296)) (<= (mod (div v_avg_~ret~0_BEFORE_RETURN_79 5) 4294967296) 2147483647) (not (< main_~i~1 5)) (= (mod v_avg_~ret~0_BEFORE_RETURN_79 5) 0) (<= (mod (+ (div v_avg_~ret~0_BEFORE_RETURN_79 5) 1) 4294967296) 2147483647)) (and (not (= (mod v_prenex_901 5) 0)) (< v_prenex_901 0) (not (<= (mod (+ (div v_prenex_901 5) 1) 4294967296) 2147483647)) (not (< main_~i~1 5)) (= (+ (mod (+ (div v_prenex_901 5) 1) 4294967296) (- 4294967296)) |main_#t~ret4|) (<= (mod (div v_prenex_901 5) 4294967296) 2147483647)) (and (= |main_#t~ret4| (mod (div v_avg_~ret~0_BEFORE_RETURN_79 5) 4294967296)) (<= (mod (div v_avg_~ret~0_BEFORE_RETURN_79 5) 4294967296) 2147483647) (not (< v_avg_~ret~0_BEFORE_RETURN_79 0)) (not (< main_~i~1 5)) (<= (mod (+ (div v_avg_~ret~0_BEFORE_RETURN_79 5) 1) 4294967296) 2147483647)) (and (= (mod v_prenex_901 5) 0) (= |main_#t~ret4| (+ (mod (div v_prenex_901 5) 4294967296) (- 4294967296))) (not (<= (mod (+ (div v_prenex_901 5) 1) 4294967296) 2147483647)) (not (< main_~i~1 5)) (not (<= (mod (div v_prenex_901 5) 4294967296) 2147483647))) (and (not (= (mod v_prenex_901 5) 0)) (< v_prenex_901 0) (not (<= (mod (+ (div v_prenex_901 5) 1) 4294967296) 2147483647)) (not (< main_~i~1 5)) (not (<= (mod (div v_prenex_901 5) 4294967296) 2147483647)) (= (+ (mod (+ (div v_prenex_901 5) 1) 4294967296) (- 4294967296)) |main_#t~ret4|)) (and (not (< v_avg_~ret~0_BEFORE_RETURN_79 0)) (not (< main_~i~1 5)) (not (<= (mod (div v_avg_~ret~0_BEFORE_RETURN_79 5) 4294967296) 2147483647)) (<= (mod (+ (div v_avg_~ret~0_BEFORE_RETURN_79 5) 1) 4294967296) 2147483647) (= |main_#t~ret4| (+ (mod (div v_avg_~ret~0_BEFORE_RETURN_79 5) 4294967296) (- 4294967296))))))) [2019-10-07 15:25:57,871 INFO L193 IcfgInterpreter]: Reachable states at location L38 satisfy 399#true [2019-10-07 15:25:57,871 INFO L193 IcfgInterpreter]: Reachable states at location mainErr0ASSERT_VIOLATIONERROR_FUNCTION satisfy 239#(or (not (= main_~ret~1 main_~ret2~0)) (not (= main_~ret~1 main_~ret5~0))) [2019-10-07 15:25:57,871 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initEXIT satisfy 700#(and (= |#valid| (store |old(#valid)| 0 0)) (= 0 |#NULL.base|) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-07 15:25:57,871 INFO L193 IcfgInterpreter]: Reachable states at location avgEXIT satisfy 691#(and (<= 5 avg_~i~0) (<= 0 avg_~i~0) (= (ite (<= (mod (ite (and (not (= 0 (mod avg_~ret~0 5))) (< avg_~ret~0 0)) (+ (div avg_~ret~0 5) 1) (div avg_~ret~0 5)) 4294967296) 2147483647) (mod (ite (and (not (= 0 (mod avg_~ret~0 5))) (< avg_~ret~0 0)) (+ (div avg_~ret~0 5) 1) (div avg_~ret~0 5)) 4294967296) (+ (mod (ite (and (not (= 0 (mod avg_~ret~0 5))) (< avg_~ret~0 0)) (+ (div avg_~ret~0 5) 1) (div avg_~ret~0 5)) 4294967296) (- 4294967296))) |avg_#res|) (not (< avg_~i~0 5))) [2019-10-07 15:25:57,872 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.startENTRY satisfy 6#true [2019-10-07 15:25:57,872 INFO L193 IcfgInterpreter]: Reachable states at location L39 satisfy 323#(or (not (= main_~ret~1 main_~ret2~0)) (not (= main_~ret~1 main_~ret5~0))) [2019-10-07 15:25:57,872 INFO L193 IcfgInterpreter]: Reachable states at location L30-1 satisfy 634#true [2019-10-07 15:25:57,872 INFO L193 IcfgInterpreter]: Reachable states at location L32-3 satisfy 597#true [2019-10-07 15:25:57,872 INFO L193 IcfgInterpreter]: Reachable states at location L23-4 satisfy 73#(and (not (< main_~i~1 5)) (<= 5 main_~i~1)) [2019-10-07 15:25:57,872 INFO L193 IcfgInterpreter]: Reachable states at location avgENTRY satisfy 648#true [2019-10-07 15:25:57,872 INFO L193 IcfgInterpreter]: Reachable states at location L30 satisfy 639#true [2019-10-07 15:25:57,872 INFO L193 IcfgInterpreter]: Reachable states at location L23-3 satisfy 68#true [2019-10-07 15:26:00,140 INFO L211 tionRefinementEngine]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2019-10-07 15:26:00,140 INFO L224 tionRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4, 4, 11] total 17 [2019-10-07 15:26:00,141 INFO L442 AbstractCegarLoop]: Interpolant automaton has 17 states [2019-10-07 15:26:00,142 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2019-10-07 15:26:00,142 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=46, Invalid=225, Unknown=1, NotChecked=0, Total=272 [2019-10-07 15:26:00,143 INFO L87 Difference]: Start difference. First operand 30 states and 34 transitions. Second operand 17 states. [2019-10-07 15:26:28,964 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-07 15:26:28,965 INFO L93 Difference]: Finished difference Result 46 states and 53 transitions. [2019-10-07 15:26:28,965 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2019-10-07 15:26:28,965 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 45 [2019-10-07 15:26:28,966 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-07 15:26:28,967 INFO L225 Difference]: With dead ends: 46 [2019-10-07 15:26:28,967 INFO L226 Difference]: Without dead ends: 33 [2019-10-07 15:26:28,968 INFO L606 BasicCegarLoop]: 0 DeclaredPredicates, 150 GetRequests, 124 SyntacticMatches, 0 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 155 ImplicationChecksByTransitivity, 22.8s TimeCoverageRelationStatistics Valid=131, Invalid=614, Unknown=11, NotChecked=0, Total=756 [2019-10-07 15:26:28,968 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 33 states. [2019-10-07 15:26:28,973 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 33 to 33. [2019-10-07 15:26:28,973 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 33 states. [2019-10-07 15:26:28,974 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33 states to 33 states and 37 transitions. [2019-10-07 15:26:28,975 INFO L78 Accepts]: Start accepts. Automaton has 33 states and 37 transitions. Word has length 45 [2019-10-07 15:26:28,983 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-07 15:26:28,984 INFO L462 AbstractCegarLoop]: Abstraction has 33 states and 37 transitions. [2019-10-07 15:26:28,984 INFO L463 AbstractCegarLoop]: Interpolant automaton has 17 states. [2019-10-07 15:26:28,984 INFO L276 IsEmpty]: Start isEmpty. Operand 33 states and 37 transitions. [2019-10-07 15:26:28,985 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2019-10-07 15:26:28,985 INFO L377 BasicCegarLoop]: Found error trace [2019-10-07 15:26:28,986 INFO L385 BasicCegarLoop]: trace histogram [15, 5, 4, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-07 15:26:29,190 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 6 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-07 15:26:29,191 INFO L410 AbstractCegarLoop]: === Iteration 8 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-07 15:26:29,191 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-07 15:26:29,191 INFO L82 PathProgramCache]: Analyzing trace with hash -1649860270, now seen corresponding path program 5 times [2019-10-07 15:26:29,191 INFO L150 tionRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-10-07 15:26:29,192 INFO L231 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2019-10-07 15:26:29,192 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-07 15:26:29,192 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-07 15:26:29,192 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-07 15:26:29,915 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-07 15:26:40,428 WARN L191 SmtUtils]: Spent 135.00 ms on a formula simplification. DAG size of input: 88 DAG size of output: 22 [2019-10-07 15:27:00,554 WARN L191 SmtUtils]: Spent 18.96 s on a formula simplification. DAG size of input: 338 DAG size of output: 56 [2019-10-07 15:27:52,362 WARN L191 SmtUtils]: Spent 47.12 s on a formula simplification. DAG size of input: 359 DAG size of output: 71 [2019-10-07 15:28:24,889 WARN L191 SmtUtils]: Spent 29.44 s on a formula simplification. DAG size of input: 326 DAG size of output: 53 [2019-10-07 15:28:34,865 WARN L191 SmtUtils]: Spent 7.55 s on a formula simplification. DAG size of input: 169 DAG size of output: 123 [2019-10-07 15:28:43,404 WARN L191 SmtUtils]: Spent 8.17 s on a formula simplification. DAG size of input: 246 DAG size of output: 59 [2019-10-07 15:28:48,264 WARN L191 SmtUtils]: Spent 4.46 s on a formula simplification. DAG size of input: 240 DAG size of output: 74 [2019-10-07 15:28:50,720 WARN L191 SmtUtils]: Spent 2.19 s on a formula simplification. DAG size of input: 249 DAG size of output: 80 [2019-10-07 15:28:55,027 WARN L191 SmtUtils]: Spent 3.79 s on a formula simplification. DAG size of input: 247 DAG size of output: 58 [2019-10-07 15:29:04,380 WARN L191 SmtUtils]: Spent 9.03 s on a formula simplification. DAG size of input: 234 DAG size of output: 80 [2019-10-07 15:29:10,083 WARN L191 SmtUtils]: Spent 2.02 s on a formula simplification. DAG size of input: 213 DAG size of output: 78 [2019-10-07 15:29:16,509 WARN L191 SmtUtils]: Spent 5.20 s on a formula simplification. DAG size of input: 213 DAG size of output: 63 [2019-10-07 15:29:22,010 WARN L191 SmtUtils]: Spent 1.37 s on a formula simplification. DAG size of input: 163 DAG size of output: 65 [2019-10-07 15:29:22,181 INFO L134 CoverageAnalysis]: Checked inductivity of 184 backedges. 2 proven. 162 refuted. 1 times theorem prover too weak. 19 trivial. 0 not checked. [2019-10-07 15:29:22,181 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2019-10-07 15:29:22,181 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2019-10-07 15:29:22,182 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-07 15:29:22,433 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 8 check-sat command(s) [2019-10-07 15:29:22,434 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-10-07 15:29:22,437 WARN L254 TraceCheckSpWp]: Trace formula consists of 238 conjuncts, 144 conjunts are in the unsatisfiable core [2019-10-07 15:29:22,441 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2019-10-07 15:29:26,314 WARN L191 SmtUtils]: Spent 311.00 ms on a formula simplification that was a NOOP. DAG size: 51 [2019-10-07 15:29:26,887 WARN L191 SmtUtils]: Spent 245.00 ms on a formula simplification that was a NOOP. DAG size: 51 [2019-10-07 15:29:31,000 WARN L191 SmtUtils]: Spent 412.00 ms on a formula simplification that was a NOOP. DAG size: 68 [2019-10-07 15:29:31,745 WARN L191 SmtUtils]: Spent 355.00 ms on a formula simplification that was a NOOP. DAG size: 72 [2019-10-07 15:29:41,538 WARN L191 SmtUtils]: Spent 7.78 s on a formula simplification. DAG size of input: 145 DAG size of output: 75 [2019-10-07 15:29:43,041 WARN L191 SmtUtils]: Spent 910.00 ms on a formula simplification that was a NOOP. DAG size: 75 [2019-10-07 15:29:44,421 WARN L191 SmtUtils]: Spent 1.00 s on a formula simplification that was a NOOP. DAG size: 76 [2019-10-07 15:29:46,909 WARN L191 SmtUtils]: Spent 2.21 s on a formula simplification that was a NOOP. DAG size: 75 [2019-10-07 15:29:47,723 WARN L191 SmtUtils]: Spent 743.00 ms on a formula simplification that was a NOOP. DAG size: 147 [2019-10-07 15:29:49,573 WARN L191 SmtUtils]: Spent 1.79 s on a formula simplification that was a NOOP. DAG size: 136 [2019-10-07 15:29:52,134 WARN L191 SmtUtils]: Spent 2.51 s on a formula simplification that was a NOOP. DAG size: 122 [2019-10-07 15:29:53,897 WARN L191 SmtUtils]: Spent 1.74 s on a formula simplification that was a NOOP. DAG size: 111 [2019-10-07 15:29:56,262 WARN L191 SmtUtils]: Spent 2.34 s on a formula simplification that was a NOOP. DAG size: 98 [2019-10-07 15:29:57,722 WARN L191 SmtUtils]: Spent 1.42 s on a formula simplification that was a NOOP. DAG size: 78 [2019-10-07 15:29:58,531 WARN L191 SmtUtils]: Spent 481.00 ms on a formula simplification that was a NOOP. DAG size: 78 [2019-10-07 15:30:05,337 WARN L191 SmtUtils]: Spent 3.52 s on a formula simplification. DAG size of input: 248 DAG size of output: 164 [2019-10-07 15:30:27,213 WARN L191 SmtUtils]: Spent 21.26 s on a formula simplification that was a NOOP. DAG size: 224 [2019-10-07 15:30:33,261 WARN L160 IndexEqualityManager]: solver failed to check if following equality is implied: (= (+ |main_~#x~0.offset| 4) 0) [2019-10-07 15:30:35,553 WARN L176 IndexEqualityManager]: solver failed to check if following not equals relation is implied: (let ((.cse0 (select |v_#memory_int_145| |main_~#x~0.base|))) (= (select .cse0 (+ |main_~#x~0.offset| 12)) (select .cse0 (+ |main_~#x~0.offset| 4)))) [2019-10-07 15:30:37,630 WARN L176 IndexEqualityManager]: solver failed to check if following not equals relation is implied: (let ((.cse0 (select |v_#memory_int_145| |main_~#x~0.base|))) (= (select .cse0 (+ |main_~#x~0.offset| 16)) (select .cse0 (+ |main_~#x~0.offset| 12)))) [2019-10-07 15:30:39,640 WARN L160 IndexEqualityManager]: solver failed to check if following equality is implied: (= (select (select |v_#memory_int_145| |main_~#x~0.base|) (+ |main_~#x~0.offset| 16)) main_~temp~0) [2019-10-07 15:30:42,834 WARN L160 IndexEqualityManager]: solver failed to check if following equality is implied: (= main_~temp~0 (select (select |v_#memory_int_145| |main_~#x~0.base|) (+ |main_~#x~0.offset| 8))) [2019-10-07 15:30:45,617 WARN L176 IndexEqualityManager]: solver failed to check if following not equals relation is implied: (let ((.cse0 (select |v_#memory_int_145| |main_~#x~0.base|))) (= (select .cse0 |main_~#x~0.offset|) (select .cse0 (+ (* 4 v_prenex_1263) |main_~#x~0.offset|)))) [2019-10-07 15:30:47,845 WARN L160 IndexEqualityManager]: solver failed to check if following equality is implied: (= main_~temp~0 (select (select |v_#memory_int_145| |main_~#x~0.base|) |main_~#x~0.offset|)) [2019-10-07 15:30:49,940 WARN L176 IndexEqualityManager]: solver failed to check if following not equals relation is implied: (let ((.cse0 (select |v_#memory_int_145| |main_~#x~0.base|))) (= (select .cse0 (+ |main_~#x~0.offset| 16)) (select .cse0 (+ |main_~#x~0.offset| 4)))) [2019-10-07 15:30:52,252 WARN L176 IndexEqualityManager]: solver failed to check if following not equals relation is implied: (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) [2019-10-07 15:30:54,394 WARN L160 IndexEqualityManager]: solver failed to check if following equality is implied: (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ (* 4 v_prenex_1263) |main_~#x~0.offset|))) [2019-10-07 15:31:10,332 WARN L191 SmtUtils]: Spent 15.80 s on a formula simplification. DAG size of input: 202 DAG size of output: 75 [2019-10-07 15:31:12,047 WARN L191 SmtUtils]: Spent 393.00 ms on a formula simplification that was a NOOP. DAG size: 57 [2019-10-07 15:31:15,899 WARN L191 SmtUtils]: Spent 593.00 ms on a formula simplification. DAG size of input: 435 DAG size of output: 125 [2019-10-07 15:31:16,114 WARN L191 SmtUtils]: Spent 203.00 ms on a formula simplification that was a NOOP. DAG size: 122 [2019-10-07 15:31:16,340 WARN L191 SmtUtils]: Spent 213.00 ms on a formula simplification that was a NOOP. DAG size: 120 [2019-10-07 15:31:16,550 WARN L191 SmtUtils]: Spent 199.00 ms on a formula simplification that was a NOOP. DAG size: 117 [2019-10-07 15:31:16,755 WARN L191 SmtUtils]: Spent 192.00 ms on a formula simplification that was a NOOP. DAG size: 114 [2019-10-07 15:31:16,955 WARN L191 SmtUtils]: Spent 185.00 ms on a formula simplification that was a NOOP. DAG size: 108 [2019-10-07 15:31:33,668 WARN L191 SmtUtils]: Spent 14.54 s on a formula simplification. DAG size of input: 114 DAG size of output: 79 [2019-10-07 15:31:42,594 WARN L191 SmtUtils]: Spent 6.40 s on a formula simplification that was a NOOP. DAG size: 79 [2019-10-07 15:31:42,629 INFO L134 CoverageAnalysis]: Checked inductivity of 184 backedges. 3 proven. 172 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2019-10-07 15:31:42,629 INFO L322 TraceCheckSpWp]: Computing backward predicates... [2019-10-07 15:31:44,870 WARN L191 SmtUtils]: Spent 327.00 ms on a formula simplification. DAG size of input: 126 DAG size of output: 108 [2019-10-07 15:32:28,950 WARN L191 SmtUtils]: Spent 100.00 ms on a formula simplification that was a NOOP. DAG size: 141 [2019-10-07 15:32:31,326 WARN L138 XnfTransformerHelper]: expecting exponential blowup for input size 4158