java -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata ./data -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/default/automizer/svcomp-Reach-32bit-Automizer_Default.epf --traceabstraction.trace.refinement.strategy SIFA_TAIPAN --sifa.abstract.domain CompoundDomain --rcfgbuilder.size.of.a.code.block LoopFreeBlock --sifa.call.summarizer TopInputCallSummarizer --sifa.fluid SizeLimitFluid --sifa.simplification.technique SIMPLIFY_QUICK -i ../../../trunk/examples/svcomp/loops/linear_sea.ch.c -------------------------------------------------------------------------------- This is Ultimate 0.1.24-36ac518-m [2019-10-07 13:44:30,501 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-10-07 13:44:30,503 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-10-07 13:44:30,515 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-10-07 13:44:30,516 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-10-07 13:44:30,517 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-10-07 13:44:30,518 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-10-07 13:44:30,520 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-10-07 13:44:30,522 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-10-07 13:44:30,523 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-10-07 13:44:30,523 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-10-07 13:44:30,525 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-10-07 13:44:30,525 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-10-07 13:44:30,526 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-10-07 13:44:30,527 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-10-07 13:44:30,528 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-10-07 13:44:30,529 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-10-07 13:44:30,530 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-10-07 13:44:30,531 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-10-07 13:44:30,533 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-10-07 13:44:30,535 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-10-07 13:44:30,536 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-10-07 13:44:30,537 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-10-07 13:44:30,538 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-10-07 13:44:30,540 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... 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[2019-10-07 13:44:30,543 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-10-07 13:44:30,544 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-10-07 13:44:30,545 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-10-07 13:44:30,546 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-10-07 13:44:30,547 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-10-07 13:44:30,547 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-10-07 13:44:30,548 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-10-07 13:44:30,548 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-10-07 13:44:30,548 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-10-07 13:44:30,549 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-10-07 13:44:30,550 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-10-07 13:44:30,551 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/default/automizer/svcomp-Reach-32bit-Automizer_Default.epf [2019-10-07 13:44:30,569 INFO L113 SettingsManager]: Loading preferences was successful [2019-10-07 13:44:30,570 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-10-07 13:44:30,571 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-10-07 13:44:30,571 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-10-07 13:44:30,571 INFO L138 SettingsManager]: * Use SBE=true [2019-10-07 13:44:30,571 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-10-07 13:44:30,572 INFO L138 SettingsManager]: * sizeof long=4 [2019-10-07 13:44:30,572 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-10-07 13:44:30,573 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-10-07 13:44:30,573 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-10-07 13:44:30,573 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-10-07 13:44:30,573 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-10-07 13:44:30,574 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-10-07 13:44:30,574 INFO L138 SettingsManager]: * sizeof long double=12 [2019-10-07 13:44:30,574 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-10-07 13:44:30,576 INFO L138 SettingsManager]: * Use constant arrays=true [2019-10-07 13:44:30,576 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-10-07 13:44:30,576 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-10-07 13:44:30,576 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-10-07 13:44:30,577 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-10-07 13:44:30,577 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-10-07 13:44:30,577 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-10-07 13:44:30,577 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-10-07 13:44:30,578 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-10-07 13:44:30,578 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-10-07 13:44:30,578 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-10-07 13:44:30,578 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-10-07 13:44:30,578 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-10-07 13:44:30,579 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: Trace refinement strategy -> SIFA_TAIPAN Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.sifa: Abstract Domain -> CompoundDomain Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder: Size of a code block -> LoopFreeBlock Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.sifa: Call Summarizer -> TopInputCallSummarizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.sifa: Fluid -> SizeLimitFluid Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.sifa: Simplification Technique -> SIMPLIFY_QUICK [2019-10-07 13:44:30,908 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-10-07 13:44:30,930 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-10-07 13:44:30,935 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-10-07 13:44:30,936 INFO L271 PluginConnector]: Initializing CDTParser... [2019-10-07 13:44:30,937 INFO L275 PluginConnector]: CDTParser initialized [2019-10-07 13:44:30,937 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/loops/linear_sea.ch.c [2019-10-07 13:44:31,006 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/edeb2fe03/f4f6fdd6382d47a5998b468ea4f07941/FLAGf899c3df8 [2019-10-07 13:44:31,420 INFO L306 CDTParser]: Found 1 translation units. [2019-10-07 13:44:31,421 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/loops/linear_sea.ch.c [2019-10-07 13:44:31,428 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/edeb2fe03/f4f6fdd6382d47a5998b468ea4f07941/FLAGf899c3df8 [2019-10-07 13:44:31,838 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/edeb2fe03/f4f6fdd6382d47a5998b468ea4f07941 [2019-10-07 13:44:31,848 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-10-07 13:44:31,850 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2019-10-07 13:44:31,851 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-10-07 13:44:31,851 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-10-07 13:44:31,855 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-10-07 13:44:31,856 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.10 01:44:31" (1/1) ... [2019-10-07 13:44:31,859 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@53c3b94a and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.10 01:44:31, skipping insertion in model container [2019-10-07 13:44:31,859 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.10 01:44:31" (1/1) ... [2019-10-07 13:44:31,867 INFO L142 MainTranslator]: Starting translation in SV-COMP mode [2019-10-07 13:44:31,883 INFO L173 MainTranslator]: Built tables and reachable declarations [2019-10-07 13:44:32,104 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-10-07 13:44:32,124 INFO L188 MainTranslator]: Completed pre-run [2019-10-07 13:44:32,151 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-10-07 13:44:32,171 INFO L192 MainTranslator]: Completed translation [2019-10-07 13:44:32,172 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.10 01:44:32 WrapperNode [2019-10-07 13:44:32,172 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-10-07 13:44:32,173 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-10-07 13:44:32,173 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-10-07 13:44:32,173 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-10-07 13:44:32,256 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.10 01:44:32" (1/1) ... [2019-10-07 13:44:32,256 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.10 01:44:32" (1/1) ... [2019-10-07 13:44:32,266 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.10 01:44:32" (1/1) ... [2019-10-07 13:44:32,268 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.10 01:44:32" (1/1) ... [2019-10-07 13:44:32,287 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.10 01:44:32" (1/1) ... [2019-10-07 13:44:32,294 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.10 01:44:32" (1/1) ... [2019-10-07 13:44:32,297 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.10 01:44:32" (1/1) ... [2019-10-07 13:44:32,303 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-10-07 13:44:32,303 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-10-07 13:44:32,304 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-10-07 13:44:32,304 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-10-07 13:44:32,305 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.10 01:44:32" (1/1) ... No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-10-07 13:44:32,361 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2019-10-07 13:44:32,361 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-10-07 13:44:32,362 INFO L138 BoogieDeclarations]: Found implementation of procedure __VERIFIER_assert [2019-10-07 13:44:32,362 INFO L138 BoogieDeclarations]: Found implementation of procedure linear_search [2019-10-07 13:44:32,362 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2019-10-07 13:44:32,362 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_error [2019-10-07 13:44:32,362 INFO L130 BoogieDeclarations]: Found specification of procedure malloc [2019-10-07 13:44:32,362 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_assert [2019-10-07 13:44:32,362 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_uint [2019-10-07 13:44:32,363 INFO L130 BoogieDeclarations]: Found specification of procedure linear_search [2019-10-07 13:44:32,363 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2019-10-07 13:44:32,363 INFO L130 BoogieDeclarations]: Found specification of procedure main [2019-10-07 13:44:32,363 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnHeap [2019-10-07 13:44:32,363 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-10-07 13:44:32,363 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2019-10-07 13:44:32,364 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-10-07 13:44:32,364 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-10-07 13:44:32,705 INFO L279 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-10-07 13:44:32,705 INFO L284 CfgBuilder]: Removed 1 assume(true) statements. [2019-10-07 13:44:32,706 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.10 01:44:32 BoogieIcfgContainer [2019-10-07 13:44:32,706 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-10-07 13:44:32,708 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-10-07 13:44:32,708 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-10-07 13:44:32,716 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-10-07 13:44:32,716 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.10 01:44:31" (1/3) ... [2019-10-07 13:44:32,717 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@44424be7 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.10 01:44:32, skipping insertion in model container [2019-10-07 13:44:32,717 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.10 01:44:32" (2/3) ... [2019-10-07 13:44:32,718 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@44424be7 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.10 01:44:32, skipping insertion in model container [2019-10-07 13:44:32,718 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.10 01:44:32" (3/3) ... [2019-10-07 13:44:32,725 INFO L109 eAbstractionObserver]: Analyzing ICFG linear_sea.ch.c [2019-10-07 13:44:32,733 INFO L152 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-10-07 13:44:32,739 INFO L164 ceAbstractionStarter]: Appying trace abstraction to program that has 1 error locations. [2019-10-07 13:44:32,749 INFO L249 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2019-10-07 13:44:32,772 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-10-07 13:44:32,772 INFO L374 AbstractCegarLoop]: Hoare is true [2019-10-07 13:44:32,772 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-10-07 13:44:32,772 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-10-07 13:44:32,772 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-10-07 13:44:32,772 INFO L378 AbstractCegarLoop]: Difference is false [2019-10-07 13:44:32,773 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-10-07 13:44:32,773 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-10-07 13:44:32,786 INFO L276 IsEmpty]: Start isEmpty. Operand 25 states. [2019-10-07 13:44:32,791 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2019-10-07 13:44:32,791 INFO L377 BasicCegarLoop]: Found error trace [2019-10-07 13:44:32,792 INFO L385 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-07 13:44:32,793 INFO L410 AbstractCegarLoop]: === Iteration 1 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-07 13:44:32,797 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-07 13:44:32,798 INFO L82 PathProgramCache]: Analyzing trace with hash -2076564389, now seen corresponding path program 1 times [2019-10-07 13:44:32,805 INFO L150 tionRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-10-07 13:44:32,806 INFO L231 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2019-10-07 13:44:32,806 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-07 13:44:32,806 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-07 13:44:32,806 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-07 13:44:32,962 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-07 13:44:33,017 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-10-07 13:44:33,018 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2019-10-07 13:44:33,019 INFO L211 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-10-07 13:44:33,019 INFO L224 tionRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-10-07 13:44:33,023 INFO L442 AbstractCegarLoop]: Interpolant automaton has 2 states [2019-10-07 13:44:33,033 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2019-10-07 13:44:33,034 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2019-10-07 13:44:33,036 INFO L87 Difference]: Start difference. First operand 25 states. Second operand 2 states. [2019-10-07 13:44:33,059 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-07 13:44:33,060 INFO L93 Difference]: Finished difference Result 40 states and 44 transitions. [2019-10-07 13:44:33,060 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2019-10-07 13:44:33,061 INFO L78 Accepts]: Start accepts. Automaton has 2 states. Word has length 16 [2019-10-07 13:44:33,061 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-07 13:44:33,068 INFO L225 Difference]: With dead ends: 40 [2019-10-07 13:44:33,068 INFO L226 Difference]: Without dead ends: 18 [2019-10-07 13:44:33,072 INFO L606 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 0 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2019-10-07 13:44:33,088 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18 states. [2019-10-07 13:44:33,102 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18 to 18. [2019-10-07 13:44:33,104 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18 states. [2019-10-07 13:44:33,105 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18 states to 18 states and 18 transitions. [2019-10-07 13:44:33,106 INFO L78 Accepts]: Start accepts. Automaton has 18 states and 18 transitions. Word has length 16 [2019-10-07 13:44:33,107 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-07 13:44:33,107 INFO L462 AbstractCegarLoop]: Abstraction has 18 states and 18 transitions. [2019-10-07 13:44:33,107 INFO L463 AbstractCegarLoop]: Interpolant automaton has 2 states. [2019-10-07 13:44:33,107 INFO L276 IsEmpty]: Start isEmpty. Operand 18 states and 18 transitions. [2019-10-07 13:44:33,108 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2019-10-07 13:44:33,108 INFO L377 BasicCegarLoop]: Found error trace [2019-10-07 13:44:33,108 INFO L385 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-07 13:44:33,109 INFO L410 AbstractCegarLoop]: === Iteration 2 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-07 13:44:33,109 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-07 13:44:33,109 INFO L82 PathProgramCache]: Analyzing trace with hash -2013967624, now seen corresponding path program 1 times [2019-10-07 13:44:33,110 INFO L150 tionRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-10-07 13:44:33,110 INFO L231 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2019-10-07 13:44:33,110 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-07 13:44:33,110 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-07 13:44:33,110 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-07 13:44:33,189 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-07 13:44:33,386 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-10-07 13:44:33,387 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2019-10-07 13:44:33,390 INFO L211 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-10-07 13:44:33,390 INFO L224 tionRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-10-07 13:44:33,392 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-10-07 13:44:33,394 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-10-07 13:44:33,395 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=43, Unknown=0, NotChecked=0, Total=56 [2019-10-07 13:44:33,395 INFO L87 Difference]: Start difference. First operand 18 states and 18 transitions. Second operand 8 states. [2019-10-07 13:44:33,574 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-07 13:44:33,574 INFO L93 Difference]: Finished difference Result 28 states and 28 transitions. [2019-10-07 13:44:33,575 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-10-07 13:44:33,575 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 17 [2019-10-07 13:44:33,576 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-07 13:44:33,577 INFO L225 Difference]: With dead ends: 28 [2019-10-07 13:44:33,577 INFO L226 Difference]: Without dead ends: 20 [2019-10-07 13:44:33,579 INFO L606 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=37, Invalid=119, Unknown=0, NotChecked=0, Total=156 [2019-10-07 13:44:33,579 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20 states. [2019-10-07 13:44:33,587 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20 to 20. [2019-10-07 13:44:33,588 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20 states. [2019-10-07 13:44:33,588 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20 states to 20 states and 20 transitions. [2019-10-07 13:44:33,589 INFO L78 Accepts]: Start accepts. Automaton has 20 states and 20 transitions. Word has length 17 [2019-10-07 13:44:33,589 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-07 13:44:33,589 INFO L462 AbstractCegarLoop]: Abstraction has 20 states and 20 transitions. [2019-10-07 13:44:33,589 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-10-07 13:44:33,589 INFO L276 IsEmpty]: Start isEmpty. Operand 20 states and 20 transitions. [2019-10-07 13:44:33,592 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-10-07 13:44:33,592 INFO L377 BasicCegarLoop]: Found error trace [2019-10-07 13:44:33,593 INFO L385 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-07 13:44:33,594 INFO L410 AbstractCegarLoop]: === Iteration 3 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-07 13:44:33,595 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-07 13:44:33,595 INFO L82 PathProgramCache]: Analyzing trace with hash 1565770985, now seen corresponding path program 1 times [2019-10-07 13:44:33,595 INFO L150 tionRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-10-07 13:44:33,596 INFO L231 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2019-10-07 13:44:33,597 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-07 13:44:33,597 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-07 13:44:33,597 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-07 13:44:33,689 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-07 13:44:33,881 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-10-07 13:44:33,882 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2019-10-07 13:44:33,882 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2019-10-07 13:44:33,882 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-07 13:44:33,982 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-07 13:44:33,985 INFO L256 TraceCheckSpWp]: Trace formula consists of 101 conjuncts, 14 conjunts are in the unsatisfiable core [2019-10-07 13:44:33,994 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2019-10-07 13:44:34,158 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-10-07 13:44:34,159 INFO L322 TraceCheckSpWp]: Computing backward predicates... [2019-10-07 13:44:34,497 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-10-07 13:44:34,502 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSifa [2019-10-07 13:44:34,557 INFO L162 IcfgInterpreter]: Started Sifa with 18 locations of interest [2019-10-07 13:44:34,558 INFO L169 IcfgInterpreter]: Building call graph [2019-10-07 13:44:34,569 INFO L174 IcfgInterpreter]: Initial procedures are [ULTIMATE.start] [2019-10-07 13:44:34,578 INFO L179 IcfgInterpreter]: Starting interpretation [2019-10-07 13:44:34,579 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.start with input of size 1 for LOIs [2019-10-07 13:44:34,837 INFO L199 IcfgInterpreter]: Interpreting procedure main with input of size 30 for LOIs [2019-10-07 13:44:35,106 INFO L199 IcfgInterpreter]: Interpreting procedure __VERIFIER_assert with input of size 11 for LOIs [2019-10-07 13:44:35,136 INFO L199 IcfgInterpreter]: Interpreting procedure linear_search with input of size 18 for LOIs [2019-10-07 13:44:35,284 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.init with input of size 16 for LOIs [2019-10-07 13:44:35,293 INFO L183 IcfgInterpreter]: Interpretation finished [2019-10-07 13:44:35,294 INFO L191 IcfgInterpreter]: Final predicates for locations of interest are: [2019-10-07 13:44:35,294 INFO L193 IcfgInterpreter]: Reachable states at location linear_searchENTRY satisfy 154#(and (or (and (= (+ (mod ~SIZE~0 4294967296) (- 4294967296)) |linear_search_#in~n|) (= 3 |linear_search_#in~q|) (not (<= (mod ~SIZE~0 4294967296) 2147483647))) (and (= (mod ~SIZE~0 4294967296) |linear_search_#in~n|) (= 3 |linear_search_#in~q|) (<= (mod ~SIZE~0 4294967296) 2147483647))) (<= 3 |linear_search_#in~q|) (<= |linear_search_#in~q| 3)) [2019-10-07 13:44:35,294 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initENTRY satisfy 236#(and (= |old(#NULL.base)| |#NULL.base|) (= |#valid| |old(#valid)|) (= ~MAX~0 |old(~MAX~0)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(~SIZE~0)| ~SIZE~0)) [2019-10-07 13:44:35,295 INFO L193 IcfgInterpreter]: Reachable states at location L24 satisfy 38#(exists ((v_prenex_1 Int) (|v_main_#t~nondet3_3| Int)) (or (and (<= ~MAX~0 100000) (= |old(~SIZE~0)| 0) (= 0 (mod v_prenex_1 8)) (= ~SIZE~0 (+ (div (mod v_prenex_1 4294967296) 8) 1)) (= 0 |#NULL.base|) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (= ~MAX~0 100000) (= 0 (select |old(#valid)| 0)) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (= |#valid| |old(#valid)|) (= |#memory_int| |old(#memory_int)|) (= |#NULL.offset| 0) (= |old(#length)| |#length|) (<= 100000 ~MAX~0)) (and (<= ~MAX~0 100000) (= |old(~SIZE~0)| 0) (= ~SIZE~0 (+ (div (mod v_prenex_1 4294967296) 8) 1)) (= 0 |#NULL.base|) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (= ~MAX~0 100000) (not (< (mod v_prenex_1 4294967296) 0)) (= 0 (select |old(#valid)| 0)) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (= |#valid| |old(#valid)|) (= |#memory_int| |old(#memory_int)|) (= |#NULL.offset| 0) (= |old(#length)| |#length|) (<= 100000 ~MAX~0)) (and (<= ~MAX~0 100000) (= |old(~SIZE~0)| 0) (= 0 |#NULL.base|) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (= ~MAX~0 100000) (= 0 (select |old(#valid)| 0)) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (= ~SIZE~0 (+ (div (mod |v_main_#t~nondet3_3| 4294967296) 8) 2)) (= |#valid| |old(#valid)|) (not (= 0 (mod |v_main_#t~nondet3_3| 8))) (= |#memory_int| |old(#memory_int)|) (= |#NULL.offset| 0) (= |old(#length)| |#length|) (< (mod |v_main_#t~nondet3_3| 4294967296) 0) (<= 100000 ~MAX~0)))) [2019-10-07 13:44:35,295 INFO L193 IcfgInterpreter]: Reachable states at location L27-2 satisfy 127#(and (<= |main_#t~ret5| 2147483647) (<= |main_#t~ret5| 1) (<= 0 |main_#t~ret5|) (<= 0 (+ |main_#t~ret5| 2147483648))) [2019-10-07 13:44:35,296 INFO L193 IcfgInterpreter]: Reachable states at location L15-3 satisfy 213#(and (<= 0 linear_search_~j~0) (<= 3 |linear_search_#in~q|) (<= 3 linear_search_~q) (= |linear_search_#in~q| 3) (<= linear_search_~q 3) (<= |linear_search_#in~q| 3)) [2019-10-07 13:44:35,296 INFO L193 IcfgInterpreter]: Reachable states at location L15-5 satisfy 203#(and (<= 0 linear_search_~j~0) (<= 3 |linear_search_#in~q|) (<= 3 linear_search_~q) (= |linear_search_#in~q| 3) (<= linear_search_~q 3) (<= |linear_search_#in~q| 3)) [2019-10-07 13:44:35,296 INFO L193 IcfgInterpreter]: Reachable states at location linear_searchEXIT satisfy 232#(and (<= 0 linear_search_~j~0) (<= 3 |linear_search_#in~q|) (<= |linear_search_#res| 1) (<= 3 linear_search_~q) (= |linear_search_#in~q| 3) (<= linear_search_~q 3) (<= |linear_search_#in~q| 3) (<= 0 |linear_search_#res|)) [2019-10-07 13:44:35,296 INFO L193 IcfgInterpreter]: Reachable states at location L27-1 satisfy 108#(and (<= |main_#t~ret5| 1) (<= 0 |main_#t~ret5|)) [2019-10-07 13:44:35,297 INFO L193 IcfgInterpreter]: Reachable states at location L-1 satisfy 23#(and (<= ~MAX~0 100000) (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= ~SIZE~0 0) (<= 0 |#NULL.base|) (= ~MAX~0 100000) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (= 0 (select |#valid| 0)) (<= 0 ~SIZE~0) (= |#NULL.offset| 0) (<= ~SIZE~0 0) (<= 100000 ~MAX~0)) [2019-10-07 13:44:35,297 INFO L193 IcfgInterpreter]: Reachable states at location mainENTRY satisfy 33#(and (<= ~MAX~0 100000) (= |old(~SIZE~0)| 0) (= 0 |#NULL.base|) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (= ~MAX~0 100000) (= 0 (select |old(#valid)| 0)) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (<= 0 |old(~SIZE~0)|) (= |#valid| |old(#valid)|) (<= |old(~SIZE~0)| 0) (<= 0 ~SIZE~0) (= |#memory_int| |old(#memory_int)|) (= |#NULL.offset| 0) (= |old(#length)| |#length|) (<= ~SIZE~0 0) (= |old(~SIZE~0)| ~SIZE~0) (<= 100000 ~MAX~0)) [2019-10-07 13:44:35,299 INFO L193 IcfgInterpreter]: Reachable states at location L27 satisfy 43#(exists ((v_prenex_2 Int) (v_prenex_1 Int) (|v_main_#t~nondet3_3| Int)) (or (and (= 0 (mod v_prenex_1 8)) (<= ~MAX~0 100000) (= |old(~SIZE~0)| 0) (= ~SIZE~0 (+ (div (mod v_prenex_1 4294967296) 8) 1)) (= 0 |#NULL.base|) (= 0 (select |old(#valid)| |main_#t~malloc4.base|)) (<= 0 |#NULL.base|) (< (mod ~SIZE~0 4294967296) 0) (= ~MAX~0 100000) (< 1 (mod ~SIZE~0 4294967296)) (= |#length| (store |old(#length)| |main_#t~malloc4.base| (* 4 ~SIZE~0))) (= 0 |main_#t~malloc4.offset|) (<= 0 |#NULL.offset|) (not (= |main_#t~malloc4.base| 0)) (< (mod ~SIZE~0 4294967296) (mod ~MAX~0 4294967296)) (< |#StackHeapBarrier| |main_#t~malloc4.base|) (<= 100000 ~MAX~0) (not (= (mod ~SIZE~0 2) 0)) (not (<= (mod (+ (div (mod ~SIZE~0 4294967296) 2) 1) 4294967296) 2147483647)) (= main_~a~0.offset |main_#t~malloc4.offset|) (<= |#NULL.base| 0) (= (store |old(#memory_int)| main_~a~0.base (store (select |old(#memory_int)| main_~a~0.base) (+ main_~a~0.offset (* 4 (mod (+ (div (mod ~SIZE~0 4294967296) 2) 1) 4294967296)) (- 17179869184)) 3)) |#memory_int|) (= |main_#t~malloc4.base| main_~a~0.base) (= 0 (select |old(#valid)| 0)) (<= |#NULL.offset| 0) (= |#valid| (store |old(#valid)| |main_#t~malloc4.base| 1)) (= |#NULL.offset| 0)) (and (<= ~MAX~0 100000) (= |old(~SIZE~0)| 0) (= 0 |#NULL.base|) (not (< (mod v_prenex_2 4294967296) 0)) (= 0 (select |old(#valid)| |main_#t~malloc4.base|)) (<= 0 |#NULL.base|) (= ~MAX~0 100000) (< 1 (mod ~SIZE~0 4294967296)) (= ~SIZE~0 (+ (div (mod v_prenex_2 4294967296) 8) 1)) (= |#length| (store |old(#length)| |main_#t~malloc4.base| (* 4 ~SIZE~0))) (<= 0 |#NULL.offset|) (= 0 |main_#t~malloc4.offset|) (not (= |main_#t~malloc4.base| 0)) (< (mod ~SIZE~0 4294967296) (mod ~MAX~0 4294967296)) (< |#StackHeapBarrier| |main_#t~malloc4.base|) (<= 100000 ~MAX~0) (<= (mod (div (mod ~SIZE~0 4294967296) 2) 4294967296) 2147483647) (= (store |old(#memory_int)| main_~a~0.base (store (select |old(#memory_int)| main_~a~0.base) (+ (* 4 (mod (div (mod ~SIZE~0 4294967296) 2) 4294967296)) main_~a~0.offset) 3)) |#memory_int|) (= main_~a~0.offset |main_#t~malloc4.offset|) (<= |#NULL.base| 0) (= |main_#t~malloc4.base| main_~a~0.base) (not (< (mod ~SIZE~0 4294967296) 0)) (= 0 (select |old(#valid)| 0)) (<= |#NULL.offset| 0) (= |#valid| (store |old(#valid)| |main_#t~malloc4.base| 1)) (= |#NULL.offset| 0)) (and (<= ~MAX~0 100000) (= |old(~SIZE~0)| 0) (= 0 |#NULL.base|) (not (< (mod v_prenex_2 4294967296) 0)) (= 0 (select |old(#valid)| |main_#t~malloc4.base|)) (<= 0 |#NULL.base|) (= ~MAX~0 100000) (< 1 (mod ~SIZE~0 4294967296)) (= ~SIZE~0 (+ (div (mod v_prenex_2 4294967296) 8) 1)) (= |#length| (store |old(#length)| |main_#t~malloc4.base| (* 4 ~SIZE~0))) (<= 0 |#NULL.offset|) (= 0 |main_#t~malloc4.offset|) (not (= |main_#t~malloc4.base| 0)) (< (mod ~SIZE~0 4294967296) (mod ~MAX~0 4294967296)) (= (store |old(#memory_int)| main_~a~0.base (store (select |old(#memory_int)| main_~a~0.base) (+ (* 4 (mod (div (mod ~SIZE~0 4294967296) 2) 4294967296)) main_~a~0.offset (- 17179869184)) 3)) |#memory_int|) (< |#StackHeapBarrier| |main_#t~malloc4.base|) (<= 100000 ~MAX~0) (= main_~a~0.offset |main_#t~malloc4.offset|) (<= |#NULL.base| 0) (= |main_#t~malloc4.base| main_~a~0.base) (= 0 (select |old(#valid)| 0)) (<= |#NULL.offset| 0) (= |#valid| (store |old(#valid)| |main_#t~malloc4.base| 1)) (= (mod ~SIZE~0 2) 0) (not (<= (mod (div (mod ~SIZE~0 4294967296) 2) 4294967296) 2147483647)) (= |#NULL.offset| 0)) (and (<= ~MAX~0 100000) (= |old(~SIZE~0)| 0) (= 0 |#NULL.base|) (= 0 (select |old(#valid)| |main_#t~malloc4.base|)) (<= 0 |#NULL.base|) (= ~MAX~0 100000) (< 1 (mod ~SIZE~0 4294967296)) (= |#length| (store |old(#length)| |main_#t~malloc4.base| (* 4 ~SIZE~0))) (<= 0 |#NULL.offset|) (= 0 |main_#t~malloc4.offset|) (= ~SIZE~0 (+ (div (mod |v_main_#t~nondet3_3| 4294967296) 8) 2)) (not (= |main_#t~malloc4.base| 0)) (< (mod ~SIZE~0 4294967296) (mod ~MAX~0 4294967296)) (= (store |old(#memory_int)| main_~a~0.base (store (select |old(#memory_int)| main_~a~0.base) (+ (* 4 (mod (div (mod ~SIZE~0 4294967296) 2) 4294967296)) main_~a~0.offset (- 17179869184)) 3)) |#memory_int|) (< |#StackHeapBarrier| |main_#t~malloc4.base|) (< (mod |v_main_#t~nondet3_3| 4294967296) 0) (<= 100000 ~MAX~0) (= main_~a~0.offset |main_#t~malloc4.offset|) (<= |#NULL.base| 0) (= |main_#t~malloc4.base| main_~a~0.base) (not (< (mod ~SIZE~0 4294967296) 0)) (= 0 (select |old(#valid)| 0)) (<= |#NULL.offset| 0) (= |#valid| (store |old(#valid)| |main_#t~malloc4.base| 1)) (not (= 0 (mod |v_main_#t~nondet3_3| 8))) (not (<= (mod (div (mod ~SIZE~0 4294967296) 2) 4294967296) 2147483647)) (= |#NULL.offset| 0)) (and (<= ~MAX~0 100000) (= |old(~SIZE~0)| 0) (= 0 |#NULL.base|) (= 0 (select |old(#valid)| |main_#t~malloc4.base|)) (<= 0 |#NULL.base|) (= ~MAX~0 100000) (< 1 (mod ~SIZE~0 4294967296)) (= |#length| (store |old(#length)| |main_#t~malloc4.base| (* 4 ~SIZE~0))) (<= 0 |#NULL.offset|) (= 0 |main_#t~malloc4.offset|) (= ~SIZE~0 (+ (div (mod |v_main_#t~nondet3_3| 4294967296) 8) 2)) (not (= |main_#t~malloc4.base| 0)) (< (mod ~SIZE~0 4294967296) (mod ~MAX~0 4294967296)) (< |#StackHeapBarrier| |main_#t~malloc4.base|) (< (mod |v_main_#t~nondet3_3| 4294967296) 0) (<= 100000 ~MAX~0) (<= (mod (div (mod ~SIZE~0 4294967296) 2) 4294967296) 2147483647) (= (store |old(#memory_int)| main_~a~0.base (store (select |old(#memory_int)| main_~a~0.base) (+ (* 4 (mod (div (mod ~SIZE~0 4294967296) 2) 4294967296)) main_~a~0.offset) 3)) |#memory_int|) (= main_~a~0.offset |main_#t~malloc4.offset|) (<= |#NULL.base| 0) (= |main_#t~malloc4.base| main_~a~0.base) (not (< (mod ~SIZE~0 4294967296) 0)) (= 0 (select |old(#valid)| 0)) (<= |#NULL.offset| 0) (= |#valid| (store |old(#valid)| |main_#t~malloc4.base| 1)) (not (= 0 (mod |v_main_#t~nondet3_3| 8))) (= |#NULL.offset| 0)) (and (= 0 (mod v_prenex_1 8)) (<= ~MAX~0 100000) (= |old(~SIZE~0)| 0) (= ~SIZE~0 (+ (div (mod v_prenex_1 4294967296) 8) 1)) (= 0 |#NULL.base|) (= 0 (select |old(#valid)| |main_#t~malloc4.base|)) (<= 0 |#NULL.base|) (= ~MAX~0 100000) (< 1 (mod ~SIZE~0 4294967296)) (= |#length| (store |old(#length)| |main_#t~malloc4.base| (* 4 ~SIZE~0))) (= 0 |main_#t~malloc4.offset|) (<= 0 |#NULL.offset|) (not (= |main_#t~malloc4.base| 0)) (< (mod ~SIZE~0 4294967296) (mod ~MAX~0 4294967296)) (= (store |old(#memory_int)| main_~a~0.base (store (select |old(#memory_int)| main_~a~0.base) (+ (* 4 (mod (div (mod ~SIZE~0 4294967296) 2) 4294967296)) main_~a~0.offset (- 17179869184)) 3)) |#memory_int|) (< |#StackHeapBarrier| |main_#t~malloc4.base|) (<= 100000 ~MAX~0) (= main_~a~0.offset |main_#t~malloc4.offset|) (<= |#NULL.base| 0) (= |main_#t~malloc4.base| main_~a~0.base) (not (< (mod ~SIZE~0 4294967296) 0)) (= 0 (select |old(#valid)| 0)) (<= |#NULL.offset| 0) (= |#valid| (store |old(#valid)| |main_#t~malloc4.base| 1)) (not (<= (mod (div (mod ~SIZE~0 4294967296) 2) 4294967296) 2147483647)) (= |#NULL.offset| 0)) (and (= 0 (mod v_prenex_1 8)) (<= ~MAX~0 100000) (= |old(~SIZE~0)| 0) (= ~SIZE~0 (+ (div (mod v_prenex_1 4294967296) 8) 1)) (= 0 |#NULL.base|) (= 0 (select |old(#valid)| |main_#t~malloc4.base|)) (<= 0 |#NULL.base|) (= ~MAX~0 100000) (< 1 (mod ~SIZE~0 4294967296)) (= |#length| (store |old(#length)| |main_#t~malloc4.base| (* 4 ~SIZE~0))) (= 0 |main_#t~malloc4.offset|) (<= 0 |#NULL.offset|) (not (= |main_#t~malloc4.base| 0)) (< (mod ~SIZE~0 4294967296) (mod ~MAX~0 4294967296)) (= (store |old(#memory_int)| main_~a~0.base (store (select |old(#memory_int)| main_~a~0.base) (+ (* 4 (mod (div (mod ~SIZE~0 4294967296) 2) 4294967296)) main_~a~0.offset (- 17179869184)) 3)) |#memory_int|) (< |#StackHeapBarrier| |main_#t~malloc4.base|) (<= 100000 ~MAX~0) (= main_~a~0.offset |main_#t~malloc4.offset|) (<= |#NULL.base| 0) (= |main_#t~malloc4.base| main_~a~0.base) (= 0 (select |old(#valid)| 0)) (<= |#NULL.offset| 0) (= |#valid| (store |old(#valid)| |main_#t~malloc4.base| 1)) (= (mod ~SIZE~0 2) 0) (not (<= (mod (div (mod ~SIZE~0 4294967296) 2) 4294967296) 2147483647)) (= |#NULL.offset| 0)) (and (= 0 (mod v_prenex_1 8)) (<= ~MAX~0 100000) (= |old(~SIZE~0)| 0) (= ~SIZE~0 (+ (div (mod v_prenex_1 4294967296) 8) 1)) (= 0 |#NULL.base|) (= 0 (select |old(#valid)| |main_#t~malloc4.base|)) (<= 0 |#NULL.base|) (< (mod ~SIZE~0 4294967296) 0) (= ~MAX~0 100000) (< 1 (mod ~SIZE~0 4294967296)) (= |#length| (store |old(#length)| |main_#t~malloc4.base| (* 4 ~SIZE~0))) (= (store |old(#memory_int)| main_~a~0.base (store (select |old(#memory_int)| main_~a~0.base) (+ main_~a~0.offset (* 4 (mod (+ (div (mod ~SIZE~0 4294967296) 2) 1) 4294967296))) 3)) |#memory_int|) (= 0 |main_#t~malloc4.offset|) (<= 0 |#NULL.offset|) (<= (mod (+ (div (mod ~SIZE~0 4294967296) 2) 1) 4294967296) 2147483647) (not (= |main_#t~malloc4.base| 0)) (< (mod ~SIZE~0 4294967296) (mod ~MAX~0 4294967296)) (< |#StackHeapBarrier| |main_#t~malloc4.base|) (<= 100000 ~MAX~0) (not (= (mod ~SIZE~0 2) 0)) (= main_~a~0.offset |main_#t~malloc4.offset|) (<= |#NULL.base| 0) (= |main_#t~malloc4.base| main_~a~0.base) (= 0 (select |old(#valid)| 0)) (<= |#NULL.offset| 0) (= |#valid| (store |old(#valid)| |main_#t~malloc4.base| 1)) (= |#NULL.offset| 0)) (and (<= ~MAX~0 100000) (= |old(~SIZE~0)| 0) (= 0 |#NULL.base|) (= 0 (select |old(#valid)| |main_#t~malloc4.base|)) (<= 0 |#NULL.base|) (= ~MAX~0 100000) (< 1 (mod ~SIZE~0 4294967296)) (= |#length| (store |old(#length)| |main_#t~malloc4.base| (* 4 ~SIZE~0))) (<= 0 |#NULL.offset|) (= 0 |main_#t~malloc4.offset|) (= ~SIZE~0 (+ (div (mod |v_main_#t~nondet3_3| 4294967296) 8) 2)) (not (= |main_#t~malloc4.base| 0)) (< (mod ~SIZE~0 4294967296) (mod ~MAX~0 4294967296)) (= (store |old(#memory_int)| main_~a~0.base (store (select |old(#memory_int)| main_~a~0.base) (+ (* 4 (mod (div (mod ~SIZE~0 4294967296) 2) 4294967296)) main_~a~0.offset (- 17179869184)) 3)) |#memory_int|) (< |#StackHeapBarrier| |main_#t~malloc4.base|) (< (mod |v_main_#t~nondet3_3| 4294967296) 0) (<= 100000 ~MAX~0) (= main_~a~0.offset |main_#t~malloc4.offset|) (<= |#NULL.base| 0) (= |main_#t~malloc4.base| main_~a~0.base) (= 0 (select |old(#valid)| 0)) (<= |#NULL.offset| 0) (= |#valid| (store |old(#valid)| |main_#t~malloc4.base| 1)) (= (mod ~SIZE~0 2) 0) (not (= 0 (mod |v_main_#t~nondet3_3| 8))) (not (<= (mod (div (mod ~SIZE~0 4294967296) 2) 4294967296) 2147483647)) (= |#NULL.offset| 0)) (and (<= ~MAX~0 100000) (= |old(~SIZE~0)| 0) (= 0 |#NULL.base|) (= 0 (select |old(#valid)| |main_#t~malloc4.base|)) (<= 0 |#NULL.base|) (< (mod ~SIZE~0 4294967296) 0) (= ~MAX~0 100000) (< 1 (mod ~SIZE~0 4294967296)) (= |#length| (store |old(#length)| |main_#t~malloc4.base| (* 4 ~SIZE~0))) (<= 0 |#NULL.offset|) (= 0 |main_#t~malloc4.offset|) (= ~SIZE~0 (+ (div (mod |v_main_#t~nondet3_3| 4294967296) 8) 2)) (not (= |main_#t~malloc4.base| 0)) (< (mod ~SIZE~0 4294967296) (mod ~MAX~0 4294967296)) (< |#StackHeapBarrier| |main_#t~malloc4.base|) (< (mod |v_main_#t~nondet3_3| 4294967296) 0) (<= 100000 ~MAX~0) (not (= (mod ~SIZE~0 2) 0)) (not (<= (mod (+ (div (mod ~SIZE~0 4294967296) 2) 1) 4294967296) 2147483647)) (= main_~a~0.offset |main_#t~malloc4.offset|) (<= |#NULL.base| 0) (= (store |old(#memory_int)| main_~a~0.base (store (select |old(#memory_int)| main_~a~0.base) (+ main_~a~0.offset (* 4 (mod (+ (div (mod ~SIZE~0 4294967296) 2) 1) 4294967296)) (- 17179869184)) 3)) |#memory_int|) (= |main_#t~malloc4.base| main_~a~0.base) (= 0 (select |old(#valid)| 0)) (<= |#NULL.offset| 0) (= |#valid| (store |old(#valid)| |main_#t~malloc4.base| 1)) (not (= 0 (mod |v_main_#t~nondet3_3| 8))) (= |#NULL.offset| 0)) (and (= 0 (mod v_prenex_1 8)) (<= ~MAX~0 100000) (= |old(~SIZE~0)| 0) (= ~SIZE~0 (+ (div (mod v_prenex_1 4294967296) 8) 1)) (= 0 |#NULL.base|) (= 0 (select |old(#valid)| |main_#t~malloc4.base|)) (<= 0 |#NULL.base|) (= ~MAX~0 100000) (< 1 (mod ~SIZE~0 4294967296)) (= |#length| (store |old(#length)| |main_#t~malloc4.base| (* 4 ~SIZE~0))) (= 0 |main_#t~malloc4.offset|) (<= 0 |#NULL.offset|) (not (= |main_#t~malloc4.base| 0)) (< (mod ~SIZE~0 4294967296) (mod ~MAX~0 4294967296)) (< |#StackHeapBarrier| |main_#t~malloc4.base|) (<= 100000 ~MAX~0) (<= (mod (div (mod ~SIZE~0 4294967296) 2) 4294967296) 2147483647) (= (store |old(#memory_int)| main_~a~0.base (store (select |old(#memory_int)| main_~a~0.base) (+ (* 4 (mod (div (mod ~SIZE~0 4294967296) 2) 4294967296)) main_~a~0.offset) 3)) |#memory_int|) (= main_~a~0.offset |main_#t~malloc4.offset|) (<= |#NULL.base| 0) (= |main_#t~malloc4.base| main_~a~0.base) (= 0 (select |old(#valid)| 0)) (<= |#NULL.offset| 0) (= |#valid| (store |old(#valid)| |main_#t~malloc4.base| 1)) (= (mod ~SIZE~0 2) 0) (= |#NULL.offset| 0)) (and (<= ~MAX~0 100000) (= |old(~SIZE~0)| 0) (= 0 |#NULL.base|) (not (< (mod v_prenex_2 4294967296) 0)) (= 0 (select |old(#valid)| |main_#t~malloc4.base|)) (<= 0 |#NULL.base|) (< (mod ~SIZE~0 4294967296) 0) (= ~MAX~0 100000) (< 1 (mod ~SIZE~0 4294967296)) (= ~SIZE~0 (+ (div (mod v_prenex_2 4294967296) 8) 1)) (= |#length| (store |old(#length)| |main_#t~malloc4.base| (* 4 ~SIZE~0))) (<= 0 |#NULL.offset|) (= 0 |main_#t~malloc4.offset|) (not (= |main_#t~malloc4.base| 0)) (< (mod ~SIZE~0 4294967296) (mod ~MAX~0 4294967296)) (< |#StackHeapBarrier| |main_#t~malloc4.base|) (<= 100000 ~MAX~0) (not (= (mod ~SIZE~0 2) 0)) (not (<= (mod (+ (div (mod ~SIZE~0 4294967296) 2) 1) 4294967296) 2147483647)) (= main_~a~0.offset |main_#t~malloc4.offset|) (<= |#NULL.base| 0) (= (store |old(#memory_int)| main_~a~0.base (store (select |old(#memory_int)| main_~a~0.base) (+ main_~a~0.offset (* 4 (mod (+ (div (mod ~SIZE~0 4294967296) 2) 1) 4294967296)) (- 17179869184)) 3)) |#memory_int|) (= |main_#t~malloc4.base| main_~a~0.base) (= 0 (select |old(#valid)| 0)) (<= |#NULL.offset| 0) (= |#valid| (store |old(#valid)| |main_#t~malloc4.base| 1)) (= |#NULL.offset| 0)) (and (<= ~MAX~0 100000) (= |old(~SIZE~0)| 0) (= 0 |#NULL.base|) (not (< (mod v_prenex_2 4294967296) 0)) (= 0 (select |old(#valid)| |main_#t~malloc4.base|)) (<= 0 |#NULL.base|) (< (mod ~SIZE~0 4294967296) 0) (= ~MAX~0 100000) (< 1 (mod ~SIZE~0 4294967296)) (= ~SIZE~0 (+ (div (mod v_prenex_2 4294967296) 8) 1)) (= |#length| (store |old(#length)| |main_#t~malloc4.base| (* 4 ~SIZE~0))) (= (store |old(#memory_int)| main_~a~0.base (store (select |old(#memory_int)| main_~a~0.base) (+ main_~a~0.offset (* 4 (mod (+ (div (mod ~SIZE~0 4294967296) 2) 1) 4294967296))) 3)) |#memory_int|) (<= 0 |#NULL.offset|) (= 0 |main_#t~malloc4.offset|) (<= (mod (+ (div (mod ~SIZE~0 4294967296) 2) 1) 4294967296) 2147483647) (not (= |main_#t~malloc4.base| 0)) (< (mod ~SIZE~0 4294967296) (mod ~MAX~0 4294967296)) (< |#StackHeapBarrier| |main_#t~malloc4.base|) (<= 100000 ~MAX~0) (not (= (mod ~SIZE~0 2) 0)) (= main_~a~0.offset |main_#t~malloc4.offset|) (<= |#NULL.base| 0) (= |main_#t~malloc4.base| main_~a~0.base) (= 0 (select |old(#valid)| 0)) (<= |#NULL.offset| 0) (= |#valid| (store |old(#valid)| |main_#t~malloc4.base| 1)) (= |#NULL.offset| 0)) (and (<= ~MAX~0 100000) (= |old(~SIZE~0)| 0) (= 0 |#NULL.base|) (= 0 (select |old(#valid)| |main_#t~malloc4.base|)) (<= 0 |#NULL.base|) (< (mod ~SIZE~0 4294967296) 0) (= ~MAX~0 100000) (< 1 (mod ~SIZE~0 4294967296)) (= |#length| (store |old(#length)| |main_#t~malloc4.base| (* 4 ~SIZE~0))) (= (store |old(#memory_int)| main_~a~0.base (store (select |old(#memory_int)| main_~a~0.base) (+ main_~a~0.offset (* 4 (mod (+ (div (mod ~SIZE~0 4294967296) 2) 1) 4294967296))) 3)) |#memory_int|) (<= 0 |#NULL.offset|) (= 0 |main_#t~malloc4.offset|) (= ~SIZE~0 (+ (div (mod |v_main_#t~nondet3_3| 4294967296) 8) 2)) (<= (mod (+ (div (mod ~SIZE~0 4294967296) 2) 1) 4294967296) 2147483647) (not (= |main_#t~malloc4.base| 0)) (< (mod ~SIZE~0 4294967296) (mod ~MAX~0 4294967296)) (< |#StackHeapBarrier| |main_#t~malloc4.base|) (< (mod |v_main_#t~nondet3_3| 4294967296) 0) (<= 100000 ~MAX~0) (not (= (mod ~SIZE~0 2) 0)) (= main_~a~0.offset |main_#t~malloc4.offset|) (<= |#NULL.base| 0) (= |main_#t~malloc4.base| main_~a~0.base) (= 0 (select |old(#valid)| 0)) (<= |#NULL.offset| 0) (= |#valid| (store |old(#valid)| |main_#t~malloc4.base| 1)) (not (= 0 (mod |v_main_#t~nondet3_3| 8))) (= |#NULL.offset| 0)) (and (<= ~MAX~0 100000) (= |old(~SIZE~0)| 0) (= 0 |#NULL.base|) (not (< (mod v_prenex_2 4294967296) 0)) (= 0 (select |old(#valid)| |main_#t~malloc4.base|)) (<= 0 |#NULL.base|) (= ~MAX~0 100000) (< 1 (mod ~SIZE~0 4294967296)) (= ~SIZE~0 (+ (div (mod v_prenex_2 4294967296) 8) 1)) (= |#length| (store |old(#length)| |main_#t~malloc4.base| (* 4 ~SIZE~0))) (<= 0 |#NULL.offset|) (= 0 |main_#t~malloc4.offset|) (not (= |main_#t~malloc4.base| 0)) (< (mod ~SIZE~0 4294967296) (mod ~MAX~0 4294967296)) (= (store |old(#memory_int)| main_~a~0.base (store (select |old(#memory_int)| main_~a~0.base) (+ (* 4 (mod (div (mod ~SIZE~0 4294967296) 2) 4294967296)) main_~a~0.offset (- 17179869184)) 3)) |#memory_int|) (< |#StackHeapBarrier| |main_#t~malloc4.base|) (<= 100000 ~MAX~0) (= main_~a~0.offset |main_#t~malloc4.offset|) (<= |#NULL.base| 0) (= |main_#t~malloc4.base| main_~a~0.base) (not (< (mod ~SIZE~0 4294967296) 0)) (= 0 (select |old(#valid)| 0)) (<= |#NULL.offset| 0) (= |#valid| (store |old(#valid)| |main_#t~malloc4.base| 1)) (not (<= (mod (div (mod ~SIZE~0 4294967296) 2) 4294967296) 2147483647)) (= |#NULL.offset| 0)) (and (<= ~MAX~0 100000) (= |old(~SIZE~0)| 0) (= 0 |#NULL.base|) (not (< (mod v_prenex_2 4294967296) 0)) (= 0 (select |old(#valid)| |main_#t~malloc4.base|)) (<= 0 |#NULL.base|) (= ~MAX~0 100000) (< 1 (mod ~SIZE~0 4294967296)) (= ~SIZE~0 (+ (div (mod v_prenex_2 4294967296) 8) 1)) (= |#length| (store |old(#length)| |main_#t~malloc4.base| (* 4 ~SIZE~0))) (<= 0 |#NULL.offset|) (= 0 |main_#t~malloc4.offset|) (not (= |main_#t~malloc4.base| 0)) (< (mod ~SIZE~0 4294967296) (mod ~MAX~0 4294967296)) (< |#StackHeapBarrier| |main_#t~malloc4.base|) (<= 100000 ~MAX~0) (<= (mod (div (mod ~SIZE~0 4294967296) 2) 4294967296) 2147483647) (= (store |old(#memory_int)| main_~a~0.base (store (select |old(#memory_int)| main_~a~0.base) (+ (* 4 (mod (div (mod ~SIZE~0 4294967296) 2) 4294967296)) main_~a~0.offset) 3)) |#memory_int|) (= main_~a~0.offset |main_#t~malloc4.offset|) (<= |#NULL.base| 0) (= |main_#t~malloc4.base| main_~a~0.base) (= 0 (select |old(#valid)| 0)) (<= |#NULL.offset| 0) (= |#valid| (store |old(#valid)| |main_#t~malloc4.base| 1)) (= (mod ~SIZE~0 2) 0) (= |#NULL.offset| 0)) (and (<= ~MAX~0 100000) (= |old(~SIZE~0)| 0) (= 0 |#NULL.base|) (= 0 (select |old(#valid)| |main_#t~malloc4.base|)) (<= 0 |#NULL.base|) (= ~MAX~0 100000) (< 1 (mod ~SIZE~0 4294967296)) (= |#length| (store |old(#length)| |main_#t~malloc4.base| (* 4 ~SIZE~0))) (<= 0 |#NULL.offset|) (= 0 |main_#t~malloc4.offset|) (= ~SIZE~0 (+ (div (mod |v_main_#t~nondet3_3| 4294967296) 8) 2)) (not (= |main_#t~malloc4.base| 0)) (< (mod ~SIZE~0 4294967296) (mod ~MAX~0 4294967296)) (< |#StackHeapBarrier| |main_#t~malloc4.base|) (< (mod |v_main_#t~nondet3_3| 4294967296) 0) (<= 100000 ~MAX~0) (<= (mod (div (mod ~SIZE~0 4294967296) 2) 4294967296) 2147483647) (= (store |old(#memory_int)| main_~a~0.base (store (select |old(#memory_int)| main_~a~0.base) (+ (* 4 (mod (div (mod ~SIZE~0 4294967296) 2) 4294967296)) main_~a~0.offset) 3)) |#memory_int|) (= main_~a~0.offset |main_#t~malloc4.offset|) (<= |#NULL.base| 0) (= |main_#t~malloc4.base| main_~a~0.base) (= 0 (select |old(#valid)| 0)) (<= |#NULL.offset| 0) (= |#valid| (store |old(#valid)| |main_#t~malloc4.base| 1)) (= (mod ~SIZE~0 2) 0) (not (= 0 (mod |v_main_#t~nondet3_3| 8))) (= |#NULL.offset| 0)) (and (= 0 (mod v_prenex_1 8)) (<= ~MAX~0 100000) (= |old(~SIZE~0)| 0) (= ~SIZE~0 (+ (div (mod v_prenex_1 4294967296) 8) 1)) (= 0 |#NULL.base|) (= 0 (select |old(#valid)| |main_#t~malloc4.base|)) (<= 0 |#NULL.base|) (= ~MAX~0 100000) (< 1 (mod ~SIZE~0 4294967296)) (= |#length| (store |old(#length)| |main_#t~malloc4.base| (* 4 ~SIZE~0))) (= 0 |main_#t~malloc4.offset|) (<= 0 |#NULL.offset|) (not (= |main_#t~malloc4.base| 0)) (< (mod ~SIZE~0 4294967296) (mod ~MAX~0 4294967296)) (< |#StackHeapBarrier| |main_#t~malloc4.base|) (<= 100000 ~MAX~0) (<= (mod (div (mod ~SIZE~0 4294967296) 2) 4294967296) 2147483647) (= (store |old(#memory_int)| main_~a~0.base (store (select |old(#memory_int)| main_~a~0.base) (+ (* 4 (mod (div (mod ~SIZE~0 4294967296) 2) 4294967296)) main_~a~0.offset) 3)) |#memory_int|) (= main_~a~0.offset |main_#t~malloc4.offset|) (<= |#NULL.base| 0) (= |main_#t~malloc4.base| main_~a~0.base) (not (< (mod ~SIZE~0 4294967296) 0)) (= 0 (select |old(#valid)| 0)) (<= |#NULL.offset| 0) (= |#valid| (store |old(#valid)| |main_#t~malloc4.base| 1)) (= |#NULL.offset| 0)))) [2019-10-07 13:44:35,300 INFO L193 IcfgInterpreter]: Reachable states at location L15-6 satisfy 221#(and (<= 0 linear_search_~j~0) (<= 3 |linear_search_#in~q|) (<= 3 linear_search_~q) (= |linear_search_#in~q| 3) (<= linear_search_~q 3) (<= |linear_search_#in~q| 3)) [2019-10-07 13:44:35,300 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initEXIT satisfy 241#(and (<= ~MAX~0 100000) (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= ~SIZE~0 0) (<= 0 |#NULL.base|) (= ~MAX~0 100000) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (= |#valid| (store |old(#valid)| 0 0)) (<= 0 ~SIZE~0) (= |#NULL.offset| 0) (<= ~SIZE~0 0) (<= 100000 ~MAX~0)) [2019-10-07 13:44:35,301 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.startENTRY satisfy 6#true [2019-10-07 13:44:35,301 INFO L193 IcfgInterpreter]: Reachable states at location L6 satisfy 145#(and (<= 0 (+ |__VERIFIER_assert_#in~cond| 2147483648)) (<= __VERIFIER_assert_~cond 0) (<= 0 |__VERIFIER_assert_#in~cond|) (<= |__VERIFIER_assert_#in~cond| 0) (<= |__VERIFIER_assert_#in~cond| 2147483647) (<= |__VERIFIER_assert_#in~cond| 1) (<= 0 __VERIFIER_assert_~cond) (= 0 __VERIFIER_assert_~cond) (= |__VERIFIER_assert_#in~cond| __VERIFIER_assert_~cond)) [2019-10-07 13:44:35,301 INFO L193 IcfgInterpreter]: Reachable states at location __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION satisfy 150#(and (<= 0 (+ |__VERIFIER_assert_#in~cond| 2147483648)) (<= __VERIFIER_assert_~cond 0) (<= 0 |__VERIFIER_assert_#in~cond|) (<= |__VERIFIER_assert_#in~cond| 0) (<= |__VERIFIER_assert_#in~cond| 2147483647) (<= |__VERIFIER_assert_#in~cond| 1) (<= 0 __VERIFIER_assert_~cond) (= 0 __VERIFIER_assert_~cond) (= |__VERIFIER_assert_#in~cond| __VERIFIER_assert_~cond)) [2019-10-07 13:44:35,302 INFO L193 IcfgInterpreter]: Reachable states at location L5 satisfy 140#(and (<= 0 (+ |__VERIFIER_assert_#in~cond| 2147483648)) (<= 0 |__VERIFIER_assert_#in~cond|) (<= |__VERIFIER_assert_#in~cond| 2147483647) (<= __VERIFIER_assert_~cond 1) (<= |__VERIFIER_assert_#in~cond| 1) (<= 0 __VERIFIER_assert_~cond) (= |__VERIFIER_assert_#in~cond| __VERIFIER_assert_~cond)) [2019-10-07 13:44:35,302 INFO L193 IcfgInterpreter]: Reachable states at location __VERIFIER_assertENTRY satisfy 135#(and (<= 0 (+ |__VERIFIER_assert_#in~cond| 2147483648)) (<= 0 |__VERIFIER_assert_#in~cond|) (<= |__VERIFIER_assert_#in~cond| 2147483647) (<= |__VERIFIER_assert_#in~cond| 1)) [2019-10-07 13:44:36,464 INFO L211 tionRefinementEngine]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2019-10-07 13:44:36,464 INFO L224 tionRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9, 9, 14] total 30 [2019-10-07 13:44:36,466 INFO L442 AbstractCegarLoop]: Interpolant automaton has 30 states [2019-10-07 13:44:36,466 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 30 interpolants. [2019-10-07 13:44:36,468 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=98, Invalid=772, Unknown=0, NotChecked=0, Total=870 [2019-10-07 13:44:36,468 INFO L87 Difference]: Start difference. First operand 20 states and 20 transitions. Second operand 30 states. [2019-10-07 13:44:43,455 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-07 13:44:43,456 INFO L93 Difference]: Finished difference Result 31 states and 31 transitions. [2019-10-07 13:44:43,456 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2019-10-07 13:44:43,456 INFO L78 Accepts]: Start accepts. Automaton has 30 states. Word has length 19 [2019-10-07 13:44:43,457 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-07 13:44:43,457 INFO L225 Difference]: With dead ends: 31 [2019-10-07 13:44:43,457 INFO L226 Difference]: Without dead ends: 23 [2019-10-07 13:44:43,459 INFO L606 BasicCegarLoop]: 0 DeclaredPredicates, 78 GetRequests, 30 SyntacticMatches, 5 SemanticMatches, 43 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 428 ImplicationChecksByTransitivity, 4.9s TimeCoverageRelationStatistics Valid=256, Invalid=1723, Unknown=1, NotChecked=0, Total=1980 [2019-10-07 13:44:43,460 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23 states. [2019-10-07 13:44:43,469 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23 to 22. [2019-10-07 13:44:43,469 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22 states. [2019-10-07 13:44:43,472 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22 states to 22 states and 22 transitions. [2019-10-07 13:44:43,472 INFO L78 Accepts]: Start accepts. Automaton has 22 states and 22 transitions. Word has length 19 [2019-10-07 13:44:43,472 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-07 13:44:43,473 INFO L462 AbstractCegarLoop]: Abstraction has 22 states and 22 transitions. [2019-10-07 13:44:43,473 INFO L463 AbstractCegarLoop]: Interpolant automaton has 30 states. [2019-10-07 13:44:43,473 INFO L276 IsEmpty]: Start isEmpty. Operand 22 states and 22 transitions. [2019-10-07 13:44:43,474 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2019-10-07 13:44:43,475 INFO L377 BasicCegarLoop]: Found error trace [2019-10-07 13:44:43,475 INFO L385 BasicCegarLoop]: trace histogram [3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-07 13:44:43,679 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 2 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-07 13:44:43,680 INFO L410 AbstractCegarLoop]: === Iteration 4 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-07 13:44:43,681 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-07 13:44:43,681 INFO L82 PathProgramCache]: Analyzing trace with hash 1425770138, now seen corresponding path program 2 times [2019-10-07 13:44:43,682 INFO L150 tionRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-10-07 13:44:43,682 INFO L231 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2019-10-07 13:44:43,682 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-07 13:44:43,682 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-07 13:44:43,683 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-07 13:44:43,786 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-07 13:44:44,114 WARN L191 SmtUtils]: Spent 169.00 ms on a formula simplification. DAG size of input: 167 DAG size of output: 27 [2019-10-07 13:44:46,635 WARN L191 SmtUtils]: Spent 2.13 s on a formula simplification. DAG size of input: 92 DAG size of output: 35 [2019-10-07 13:44:46,683 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-10-07 13:44:46,684 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2019-10-07 13:44:46,684 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2019-10-07 13:44:46,684 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-07 13:44:46,803 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 3 check-sat command(s) [2019-10-07 13:44:46,803 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-10-07 13:44:46,806 INFO L256 TraceCheckSpWp]: Trace formula consists of 106 conjuncts, 49 conjunts are in the unsatisfiable core [2019-10-07 13:44:46,813 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2019-10-07 13:44:50,907 WARN L191 SmtUtils]: Spent 2.01 s on a formula simplification. DAG size of input: 30 DAG size of output: 13 [2019-10-07 13:44:50,932 WARN L225 Elim1Store]: Array PQE input equivalent to false [2019-10-07 13:44:53,093 WARN L191 SmtUtils]: Spent 2.02 s on a formula simplification that was a NOOP. DAG size: 28 [2019-10-07 13:44:53,653 WARN L191 SmtUtils]: Spent 508.00 ms on a formula simplification that was a NOOP. DAG size: 25 [2019-10-07 13:44:55,726 WARN L191 SmtUtils]: Spent 2.04 s on a formula simplification that was a NOOP. DAG size: 40 [2019-10-07 13:44:58,847 WARN L191 SmtUtils]: Spent 3.01 s on a formula simplification. DAG size of input: 65 DAG size of output: 55 [2019-10-07 13:45:03,012 WARN L191 SmtUtils]: Spent 3.98 s on a formula simplification. DAG size of input: 65 DAG size of output: 55 [2019-10-07 13:45:05,353 WARN L191 SmtUtils]: Spent 2.17 s on a formula simplification. DAG size of input: 47 DAG size of output: 47 [2019-10-07 13:45:05,376 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-10-07 13:45:05,376 INFO L322 TraceCheckSpWp]: Computing backward predicates... [2019-10-07 13:45:05,747 WARN L191 SmtUtils]: Spent 273.00 ms on a formula simplification. DAG size of input: 99 DAG size of output: 70 [2019-10-07 13:45:05,975 WARN L191 SmtUtils]: Spent 159.00 ms on a formula simplification. DAG size of input: 64 DAG size of output: 63 [2019-10-07 13:45:12,809 WARN L191 SmtUtils]: Spent 2.81 s on a formula simplification that was a NOOP. DAG size: 77 [2019-10-07 13:45:12,908 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-10-07 13:45:12,909 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSifa [2019-10-07 13:45:12,910 INFO L162 IcfgInterpreter]: Started Sifa with 18 locations of interest [2019-10-07 13:45:12,910 INFO L169 IcfgInterpreter]: Building call graph [2019-10-07 13:45:12,911 INFO L174 IcfgInterpreter]: Initial procedures are [ULTIMATE.start] [2019-10-07 13:45:12,911 INFO L179 IcfgInterpreter]: Starting interpretation [2019-10-07 13:45:12,911 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.start with input of size 1 for LOIs [2019-10-07 13:45:12,952 INFO L199 IcfgInterpreter]: Interpreting procedure main with input of size 30 for LOIs [2019-10-07 13:45:13,060 INFO L199 IcfgInterpreter]: Interpreting procedure __VERIFIER_assert with input of size 11 for LOIs [2019-10-07 13:45:13,071 INFO L199 IcfgInterpreter]: Interpreting procedure linear_search with input of size 18 for LOIs [2019-10-07 13:45:13,136 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.init with input of size 16 for LOIs [2019-10-07 13:45:13,141 INFO L183 IcfgInterpreter]: Interpretation finished [2019-10-07 13:45:13,142 INFO L191 IcfgInterpreter]: Final predicates for locations of interest are: [2019-10-07 13:45:13,142 INFO L193 IcfgInterpreter]: Reachable states at location linear_searchENTRY satisfy 154#(and (or (and (= (+ (mod ~SIZE~0 4294967296) (- 4294967296)) |linear_search_#in~n|) (= 3 |linear_search_#in~q|) (not (<= (mod ~SIZE~0 4294967296) 2147483647))) (and (= (mod ~SIZE~0 4294967296) |linear_search_#in~n|) (= 3 |linear_search_#in~q|) (<= (mod ~SIZE~0 4294967296) 2147483647))) (<= 3 |linear_search_#in~q|) (<= |linear_search_#in~q| 3)) [2019-10-07 13:45:13,142 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initENTRY satisfy 222#(and (= |old(#NULL.base)| |#NULL.base|) (= |#valid| |old(#valid)|) (= ~MAX~0 |old(~MAX~0)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(~SIZE~0)| ~SIZE~0)) [2019-10-07 13:45:13,142 INFO L193 IcfgInterpreter]: Reachable states at location L24 satisfy 38#(exists ((v_prenex_13 Int) (|v_main_#t~nondet3_5| Int)) (or (and (<= ~MAX~0 100000) (= |old(~SIZE~0)| 0) (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= (mod |v_main_#t~nondet3_5| 8) 0) (<= 0 |#NULL.base|) (= ~MAX~0 100000) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (= 0 (select |old(#valid)| 0)) (= |#valid| |old(#valid)|) (= ~SIZE~0 (+ (div (mod |v_main_#t~nondet3_5| 4294967296) 8) 1)) (= |#memory_int| |old(#memory_int)|) (= |#NULL.offset| 0) (= |old(#length)| |#length|) (<= 100000 ~MAX~0)) (and (<= ~MAX~0 100000) (= |old(~SIZE~0)| 0) (= 0 |#NULL.base|) (not (< (mod |v_main_#t~nondet3_5| 4294967296) 0)) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (= ~MAX~0 100000) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (= 0 (select |old(#valid)| 0)) (= |#valid| |old(#valid)|) (= ~SIZE~0 (+ (div (mod |v_main_#t~nondet3_5| 4294967296) 8) 1)) (= |#memory_int| |old(#memory_int)|) (= |#NULL.offset| 0) (= |old(#length)| |#length|) (<= 100000 ~MAX~0)) (and (<= ~MAX~0 100000) (= |old(~SIZE~0)| 0) (= 0 |#NULL.base|) (< (mod v_prenex_13 4294967296) 0) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (= ~MAX~0 100000) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (= 0 (select |old(#valid)| 0)) (= |#valid| |old(#valid)|) (= |#memory_int| |old(#memory_int)|) (not (= (mod v_prenex_13 8) 0)) (= ~SIZE~0 (+ (div (mod v_prenex_13 4294967296) 8) 2)) (= |#NULL.offset| 0) (= |old(#length)| |#length|) (<= 100000 ~MAX~0)))) [2019-10-07 13:45:13,143 INFO L193 IcfgInterpreter]: Reachable states at location L27-2 satisfy 127#(and (<= |main_#t~ret5| 2147483647) (<= 0 |main_#t~ret5|) (<= |main_#t~ret5| 1) (<= 0 (+ |main_#t~ret5| 2147483648))) [2019-10-07 13:45:13,143 INFO L193 IcfgInterpreter]: Reachable states at location L15-3 satisfy 199#(and (<= 0 linear_search_~j~0) (<= 3 |linear_search_#in~q|) (<= 3 linear_search_~q) (= |linear_search_#in~q| 3) (<= linear_search_~q 3) (<= |linear_search_#in~q| 3)) [2019-10-07 13:45:13,143 INFO L193 IcfgInterpreter]: Reachable states at location L15-5 satisfy 189#(and (<= 0 linear_search_~j~0) (<= 3 |linear_search_#in~q|) (<= 3 linear_search_~q) (= |linear_search_#in~q| 3) (<= linear_search_~q 3) (<= |linear_search_#in~q| 3)) [2019-10-07 13:45:13,143 INFO L193 IcfgInterpreter]: Reachable states at location linear_searchEXIT satisfy 218#(and (<= 0 linear_search_~j~0) (<= 3 |linear_search_#in~q|) (<= |linear_search_#res| 1) (<= 3 linear_search_~q) (= |linear_search_#in~q| 3) (<= linear_search_~q 3) (<= |linear_search_#in~q| 3) (<= 0 |linear_search_#res|)) [2019-10-07 13:45:13,144 INFO L193 IcfgInterpreter]: Reachable states at location L27-1 satisfy 108#(and (<= 0 |main_#t~ret5|) (<= |main_#t~ret5| 1)) [2019-10-07 13:45:13,144 INFO L193 IcfgInterpreter]: Reachable states at location L-1 satisfy 23#(and (<= ~MAX~0 100000) (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= ~SIZE~0 0) (<= 0 |#NULL.base|) (= ~MAX~0 100000) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (= 0 (select |#valid| 0)) (<= 0 ~SIZE~0) (= |#NULL.offset| 0) (<= ~SIZE~0 0) (<= 100000 ~MAX~0)) [2019-10-07 13:45:13,144 INFO L193 IcfgInterpreter]: Reachable states at location mainENTRY satisfy 33#(and (<= ~MAX~0 100000) (= |old(~SIZE~0)| 0) (= 0 |#NULL.base|) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (= ~MAX~0 100000) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (= 0 (select |old(#valid)| 0)) (<= 0 |old(~SIZE~0)|) (= |#valid| |old(#valid)|) (<= |old(~SIZE~0)| 0) (<= 0 ~SIZE~0) (= |#memory_int| |old(#memory_int)|) (= |#NULL.offset| 0) (= |old(#length)| |#length|) (<= ~SIZE~0 0) (= |old(~SIZE~0)| ~SIZE~0) (<= 100000 ~MAX~0)) [2019-10-07 13:45:13,145 INFO L193 IcfgInterpreter]: Reachable states at location L27 satisfy 43#(exists ((v_prenex_14 Int) (v_prenex_13 Int) (|v_main_#t~nondet3_5| Int)) (or (and (<= ~MAX~0 100000) (= |old(~SIZE~0)| 0) (< (mod v_prenex_13 4294967296) 0) (= 0 |#NULL.base|) (= 0 (select |old(#valid)| |main_#t~malloc4.base|)) (<= 0 |#NULL.base|) (= ~MAX~0 100000) (< (mod ~SIZE~0 4294967296) 0) (< 1 (mod ~SIZE~0 4294967296)) (= |#length| (store |old(#length)| |main_#t~malloc4.base| (* 4 ~SIZE~0))) (<= 0 |#NULL.offset|) (= 0 |main_#t~malloc4.offset|) (not (= |main_#t~malloc4.base| 0)) (not (= (mod v_prenex_13 8) 0)) (= ~SIZE~0 (+ (div (mod v_prenex_13 4294967296) 8) 2)) (< (mod ~SIZE~0 4294967296) (mod ~MAX~0 4294967296)) (< |#StackHeapBarrier| |main_#t~malloc4.base|) (<= 100000 ~MAX~0) (not (= (mod ~SIZE~0 2) 0)) (not (<= (mod (+ (div (mod ~SIZE~0 4294967296) 2) 1) 4294967296) 2147483647)) (= (store |old(#memory_int)| main_~a~0.base (store (select |old(#memory_int)| main_~a~0.base) (+ main_~a~0.offset (* 4 (mod (+ (div (mod ~SIZE~0 4294967296) 2) 1) 4294967296)) (- 17179869184)) 3)) |#memory_int|) (<= |#NULL.base| 0) (= main_~a~0.offset |main_#t~malloc4.offset|) (= |main_#t~malloc4.base| main_~a~0.base) (<= |#NULL.offset| 0) (= 0 (select |old(#valid)| 0)) (= |#valid| (store |old(#valid)| |main_#t~malloc4.base| 1)) (= |#NULL.offset| 0)) (and (<= ~MAX~0 100000) (= |old(~SIZE~0)| 0) (= 0 |#NULL.base|) (= 0 (select |old(#valid)| |main_#t~malloc4.base|)) (<= 0 |#NULL.base|) (= ~MAX~0 100000) (< 1 (mod ~SIZE~0 4294967296)) (= |#length| (store |old(#length)| |main_#t~malloc4.base| (* 4 ~SIZE~0))) (<= 0 |#NULL.offset|) (= 0 |main_#t~malloc4.offset|) (= ~SIZE~0 (+ (div (mod v_prenex_14 4294967296) 8) 1)) (not (= |main_#t~malloc4.base| 0)) (< (mod ~SIZE~0 4294967296) (mod ~MAX~0 4294967296)) (< |#StackHeapBarrier| |main_#t~malloc4.base|) (<= 100000 ~MAX~0) (<= (mod (div (mod ~SIZE~0 4294967296) 2) 4294967296) 2147483647) (= (store |old(#memory_int)| main_~a~0.base (store (select |old(#memory_int)| main_~a~0.base) (+ (* 4 (mod (div (mod ~SIZE~0 4294967296) 2) 4294967296)) main_~a~0.offset) 3)) |#memory_int|) (= main_~a~0.offset |main_#t~malloc4.offset|) (<= |#NULL.base| 0) (= (mod v_prenex_14 8) 0) (= |main_#t~malloc4.base| main_~a~0.base) (<= |#NULL.offset| 0) (= 0 (select |old(#valid)| 0)) (= |#valid| (store |old(#valid)| |main_#t~malloc4.base| 1)) (= (mod ~SIZE~0 2) 0) (= |#NULL.offset| 0)) (and (<= ~MAX~0 100000) (= |old(~SIZE~0)| 0) (= 0 |#NULL.base|) (not (< (mod |v_main_#t~nondet3_5| 4294967296) 0)) (= 0 (select |old(#valid)| |main_#t~malloc4.base|)) (<= 0 |#NULL.base|) (= ~MAX~0 100000) (< 1 (mod ~SIZE~0 4294967296)) (= |#length| (store |old(#length)| |main_#t~malloc4.base| (* 4 ~SIZE~0))) (<= 0 |#NULL.offset|) (= 0 |main_#t~malloc4.offset|) (not (= |main_#t~malloc4.base| 0)) (< (mod ~SIZE~0 4294967296) (mod ~MAX~0 4294967296)) (< |#StackHeapBarrier| |main_#t~malloc4.base|) (<= 100000 ~MAX~0) (<= (mod (div (mod ~SIZE~0 4294967296) 2) 4294967296) 2147483647) (= (store |old(#memory_int)| main_~a~0.base (store (select |old(#memory_int)| main_~a~0.base) (+ (* 4 (mod (div (mod ~SIZE~0 4294967296) 2) 4294967296)) main_~a~0.offset) 3)) |#memory_int|) (= main_~a~0.offset |main_#t~malloc4.offset|) (<= |#NULL.base| 0) (= |main_#t~malloc4.base| main_~a~0.base) (<= |#NULL.offset| 0) (= 0 (select |old(#valid)| 0)) (= |#valid| (store |old(#valid)| |main_#t~malloc4.base| 1)) (= (mod ~SIZE~0 2) 0) (= ~SIZE~0 (+ (div (mod |v_main_#t~nondet3_5| 4294967296) 8) 1)) (= |#NULL.offset| 0)) (and (<= ~MAX~0 100000) (= |old(~SIZE~0)| 0) (< (mod v_prenex_13 4294967296) 0) (= 0 |#NULL.base|) (= 0 (select |old(#valid)| |main_#t~malloc4.base|)) (<= 0 |#NULL.base|) (= ~MAX~0 100000) (< (mod ~SIZE~0 4294967296) 0) (< 1 (mod ~SIZE~0 4294967296)) (= (store |old(#memory_int)| main_~a~0.base (store (select |old(#memory_int)| main_~a~0.base) (+ main_~a~0.offset (* 4 (mod (+ (div (mod ~SIZE~0 4294967296) 2) 1) 4294967296))) 3)) |#memory_int|) (= |#length| (store |old(#length)| |main_#t~malloc4.base| (* 4 ~SIZE~0))) (<= 0 |#NULL.offset|) (= 0 |main_#t~malloc4.offset|) (<= (mod (+ (div (mod ~SIZE~0 4294967296) 2) 1) 4294967296) 2147483647) (not (= |main_#t~malloc4.base| 0)) (not (= (mod v_prenex_13 8) 0)) (= ~SIZE~0 (+ (div (mod v_prenex_13 4294967296) 8) 2)) (< (mod ~SIZE~0 4294967296) (mod ~MAX~0 4294967296)) (< |#StackHeapBarrier| |main_#t~malloc4.base|) (<= 100000 ~MAX~0) (not (= (mod ~SIZE~0 2) 0)) (<= |#NULL.base| 0) (= main_~a~0.offset |main_#t~malloc4.offset|) (= |main_#t~malloc4.base| main_~a~0.base) (<= |#NULL.offset| 0) (= 0 (select |old(#valid)| 0)) (= |#valid| (store |old(#valid)| |main_#t~malloc4.base| 1)) (= |#NULL.offset| 0)) (and (<= ~MAX~0 100000) (= |old(~SIZE~0)| 0) (= 0 |#NULL.base|) (not (< (mod |v_main_#t~nondet3_5| 4294967296) 0)) (= 0 (select |old(#valid)| |main_#t~malloc4.base|)) (<= 0 |#NULL.base|) (= ~MAX~0 100000) (< 1 (mod ~SIZE~0 4294967296)) (= |#length| (store |old(#length)| |main_#t~malloc4.base| (* 4 ~SIZE~0))) (<= 0 |#NULL.offset|) (= 0 |main_#t~malloc4.offset|) (not (= |main_#t~malloc4.base| 0)) (< (mod ~SIZE~0 4294967296) (mod ~MAX~0 4294967296)) (< |#StackHeapBarrier| |main_#t~malloc4.base|) (<= 100000 ~MAX~0) (<= (mod (div (mod ~SIZE~0 4294967296) 2) 4294967296) 2147483647) (= (store |old(#memory_int)| main_~a~0.base (store (select |old(#memory_int)| main_~a~0.base) (+ (* 4 (mod (div (mod ~SIZE~0 4294967296) 2) 4294967296)) main_~a~0.offset) 3)) |#memory_int|) (= main_~a~0.offset |main_#t~malloc4.offset|) (<= |#NULL.base| 0) (= |main_#t~malloc4.base| main_~a~0.base) (not (< (mod ~SIZE~0 4294967296) 0)) (<= |#NULL.offset| 0) (= 0 (select |old(#valid)| 0)) (= |#valid| (store |old(#valid)| |main_#t~malloc4.base| 1)) (= ~SIZE~0 (+ (div (mod |v_main_#t~nondet3_5| 4294967296) 8) 1)) (= |#NULL.offset| 0)) (and (<= ~MAX~0 100000) (= |old(~SIZE~0)| 0) (= 0 |#NULL.base|) (not (< (mod |v_main_#t~nondet3_5| 4294967296) 0)) (= 0 (select |old(#valid)| |main_#t~malloc4.base|)) (<= 0 |#NULL.base|) (= ~MAX~0 100000) (< 1 (mod ~SIZE~0 4294967296)) (= |#length| (store |old(#length)| |main_#t~malloc4.base| (* 4 ~SIZE~0))) (<= 0 |#NULL.offset|) (= 0 |main_#t~malloc4.offset|) (not (= |main_#t~malloc4.base| 0)) (= (store |old(#memory_int)| main_~a~0.base (store (select |old(#memory_int)| main_~a~0.base) (+ (* 4 (mod (div (mod ~SIZE~0 4294967296) 2) 4294967296)) main_~a~0.offset (- 17179869184)) 3)) |#memory_int|) (< (mod ~SIZE~0 4294967296) (mod ~MAX~0 4294967296)) (< |#StackHeapBarrier| |main_#t~malloc4.base|) (<= 100000 ~MAX~0) (= main_~a~0.offset |main_#t~malloc4.offset|) (<= |#NULL.base| 0) (= |main_#t~malloc4.base| main_~a~0.base) (not (< (mod ~SIZE~0 4294967296) 0)) (<= |#NULL.offset| 0) (= 0 (select |old(#valid)| 0)) (= |#valid| (store |old(#valid)| |main_#t~malloc4.base| 1)) (= ~SIZE~0 (+ (div (mod |v_main_#t~nondet3_5| 4294967296) 8) 1)) (not (<= (mod (div (mod ~SIZE~0 4294967296) 2) 4294967296) 2147483647)) (= |#NULL.offset| 0)) (and (<= ~MAX~0 100000) (= |old(~SIZE~0)| 0) (= 0 |#NULL.base|) (= 0 (select |old(#valid)| |main_#t~malloc4.base|)) (<= 0 |#NULL.base|) (= ~MAX~0 100000) (< 1 (mod ~SIZE~0 4294967296)) (= |#length| (store |old(#length)| |main_#t~malloc4.base| (* 4 ~SIZE~0))) (<= 0 |#NULL.offset|) (= 0 |main_#t~malloc4.offset|) (= ~SIZE~0 (+ (div (mod v_prenex_14 4294967296) 8) 1)) (not (= |main_#t~malloc4.base| 0)) (< (mod ~SIZE~0 4294967296) (mod ~MAX~0 4294967296)) (< |#StackHeapBarrier| |main_#t~malloc4.base|) (<= 100000 ~MAX~0) (<= (mod (div (mod ~SIZE~0 4294967296) 2) 4294967296) 2147483647) (= (store |old(#memory_int)| main_~a~0.base (store (select |old(#memory_int)| main_~a~0.base) (+ (* 4 (mod (div (mod ~SIZE~0 4294967296) 2) 4294967296)) main_~a~0.offset) 3)) |#memory_int|) (= main_~a~0.offset |main_#t~malloc4.offset|) (<= |#NULL.base| 0) (= (mod v_prenex_14 8) 0) (= |main_#t~malloc4.base| main_~a~0.base) (not (< (mod ~SIZE~0 4294967296) 0)) (<= |#NULL.offset| 0) (= 0 (select |old(#valid)| 0)) (= |#valid| (store |old(#valid)| |main_#t~malloc4.base| 1)) (= |#NULL.offset| 0)) (and (<= ~MAX~0 100000) (= |old(~SIZE~0)| 0) (= 0 |#NULL.base|) (not (< (mod |v_main_#t~nondet3_5| 4294967296) 0)) (= 0 (select |old(#valid)| |main_#t~malloc4.base|)) (<= 0 |#NULL.base|) (< (mod ~SIZE~0 4294967296) 0) (= ~MAX~0 100000) (< 1 (mod ~SIZE~0 4294967296)) (= (store |old(#memory_int)| main_~a~0.base (store (select |old(#memory_int)| main_~a~0.base) (+ main_~a~0.offset (* 4 (mod (+ (div (mod ~SIZE~0 4294967296) 2) 1) 4294967296))) 3)) |#memory_int|) (= |#length| (store |old(#length)| |main_#t~malloc4.base| (* 4 ~SIZE~0))) (<= 0 |#NULL.offset|) (= 0 |main_#t~malloc4.offset|) (<= (mod (+ (div (mod ~SIZE~0 4294967296) 2) 1) 4294967296) 2147483647) (not (= |main_#t~malloc4.base| 0)) (< (mod ~SIZE~0 4294967296) (mod ~MAX~0 4294967296)) (< |#StackHeapBarrier| |main_#t~malloc4.base|) (<= 100000 ~MAX~0) (not (= (mod ~SIZE~0 2) 0)) (= main_~a~0.offset |main_#t~malloc4.offset|) (<= |#NULL.base| 0) (= |main_#t~malloc4.base| main_~a~0.base) (<= |#NULL.offset| 0) (= 0 (select |old(#valid)| 0)) (= |#valid| (store |old(#valid)| |main_#t~malloc4.base| 1)) (= ~SIZE~0 (+ (div (mod |v_main_#t~nondet3_5| 4294967296) 8) 1)) (= |#NULL.offset| 0)) (and (<= ~MAX~0 100000) (= |old(~SIZE~0)| 0) (= 0 |#NULL.base|) (not (< (mod |v_main_#t~nondet3_5| 4294967296) 0)) (= 0 (select |old(#valid)| |main_#t~malloc4.base|)) (<= 0 |#NULL.base|) (< (mod ~SIZE~0 4294967296) 0) (= ~MAX~0 100000) (< 1 (mod ~SIZE~0 4294967296)) (= |#length| (store |old(#length)| |main_#t~malloc4.base| (* 4 ~SIZE~0))) (<= 0 |#NULL.offset|) (= 0 |main_#t~malloc4.offset|) (not (= |main_#t~malloc4.base| 0)) (< (mod ~SIZE~0 4294967296) (mod ~MAX~0 4294967296)) (< |#StackHeapBarrier| |main_#t~malloc4.base|) (<= 100000 ~MAX~0) (not (= (mod ~SIZE~0 2) 0)) (not (<= (mod (+ (div (mod ~SIZE~0 4294967296) 2) 1) 4294967296) 2147483647)) (= (store |old(#memory_int)| main_~a~0.base (store (select |old(#memory_int)| main_~a~0.base) (+ main_~a~0.offset (* 4 (mod (+ (div (mod ~SIZE~0 4294967296) 2) 1) 4294967296)) (- 17179869184)) 3)) |#memory_int|) (= main_~a~0.offset |main_#t~malloc4.offset|) (<= |#NULL.base| 0) (= |main_#t~malloc4.base| main_~a~0.base) (<= |#NULL.offset| 0) (= 0 (select |old(#valid)| 0)) (= |#valid| (store |old(#valid)| |main_#t~malloc4.base| 1)) (= ~SIZE~0 (+ (div (mod |v_main_#t~nondet3_5| 4294967296) 8) 1)) (= |#NULL.offset| 0)) (and (<= ~MAX~0 100000) (= |old(~SIZE~0)| 0) (= 0 |#NULL.base|) (not (< (mod |v_main_#t~nondet3_5| 4294967296) 0)) (= 0 (select |old(#valid)| |main_#t~malloc4.base|)) (<= 0 |#NULL.base|) (= ~MAX~0 100000) (< 1 (mod ~SIZE~0 4294967296)) (= |#length| (store |old(#length)| |main_#t~malloc4.base| (* 4 ~SIZE~0))) (<= 0 |#NULL.offset|) (= 0 |main_#t~malloc4.offset|) (not (= |main_#t~malloc4.base| 0)) (= (store |old(#memory_int)| main_~a~0.base (store (select |old(#memory_int)| main_~a~0.base) (+ (* 4 (mod (div (mod ~SIZE~0 4294967296) 2) 4294967296)) main_~a~0.offset (- 17179869184)) 3)) |#memory_int|) (< (mod ~SIZE~0 4294967296) (mod ~MAX~0 4294967296)) (< |#StackHeapBarrier| |main_#t~malloc4.base|) (<= 100000 ~MAX~0) (= main_~a~0.offset |main_#t~malloc4.offset|) (<= |#NULL.base| 0) (= |main_#t~malloc4.base| main_~a~0.base) (<= |#NULL.offset| 0) (= 0 (select |old(#valid)| 0)) (= |#valid| (store |old(#valid)| |main_#t~malloc4.base| 1)) (= (mod ~SIZE~0 2) 0) (= ~SIZE~0 (+ (div (mod |v_main_#t~nondet3_5| 4294967296) 8) 1)) (not (<= (mod (div (mod ~SIZE~0 4294967296) 2) 4294967296) 2147483647)) (= |#NULL.offset| 0)) (and (<= ~MAX~0 100000) (= |old(~SIZE~0)| 0) (< (mod v_prenex_13 4294967296) 0) (= 0 |#NULL.base|) (= 0 (select |old(#valid)| |main_#t~malloc4.base|)) (<= 0 |#NULL.base|) (= ~MAX~0 100000) (< 1 (mod ~SIZE~0 4294967296)) (= |#length| (store |old(#length)| |main_#t~malloc4.base| (* 4 ~SIZE~0))) (<= 0 |#NULL.offset|) (= 0 |main_#t~malloc4.offset|) (not (= |main_#t~malloc4.base| 0)) (not (= (mod v_prenex_13 8) 0)) (= ~SIZE~0 (+ (div (mod v_prenex_13 4294967296) 8) 2)) (< (mod ~SIZE~0 4294967296) (mod ~MAX~0 4294967296)) (< |#StackHeapBarrier| |main_#t~malloc4.base|) (<= 100000 ~MAX~0) (<= (mod (div (mod ~SIZE~0 4294967296) 2) 4294967296) 2147483647) (= (store |old(#memory_int)| main_~a~0.base (store (select |old(#memory_int)| main_~a~0.base) (+ (* 4 (mod (div (mod ~SIZE~0 4294967296) 2) 4294967296)) main_~a~0.offset) 3)) |#memory_int|) (<= |#NULL.base| 0) (= main_~a~0.offset |main_#t~malloc4.offset|) (= |main_#t~malloc4.base| main_~a~0.base) (<= |#NULL.offset| 0) (= 0 (select |old(#valid)| 0)) (= |#valid| (store |old(#valid)| |main_#t~malloc4.base| 1)) (= (mod ~SIZE~0 2) 0) (= |#NULL.offset| 0)) (and (<= ~MAX~0 100000) (= |old(~SIZE~0)| 0) (= 0 |#NULL.base|) (= 0 (select |old(#valid)| |main_#t~malloc4.base|)) (<= 0 |#NULL.base|) (= ~MAX~0 100000) (< 1 (mod ~SIZE~0 4294967296)) (= |#length| (store |old(#length)| |main_#t~malloc4.base| (* 4 ~SIZE~0))) (<= 0 |#NULL.offset|) (= 0 |main_#t~malloc4.offset|) (= ~SIZE~0 (+ (div (mod v_prenex_14 4294967296) 8) 1)) (not (= |main_#t~malloc4.base| 0)) (= (store |old(#memory_int)| main_~a~0.base (store (select |old(#memory_int)| main_~a~0.base) (+ (* 4 (mod (div (mod ~SIZE~0 4294967296) 2) 4294967296)) main_~a~0.offset (- 17179869184)) 3)) |#memory_int|) (< (mod ~SIZE~0 4294967296) (mod ~MAX~0 4294967296)) (< |#StackHeapBarrier| |main_#t~malloc4.base|) (<= 100000 ~MAX~0) (= main_~a~0.offset |main_#t~malloc4.offset|) (<= |#NULL.base| 0) (= (mod v_prenex_14 8) 0) (= |main_#t~malloc4.base| main_~a~0.base) (not (< (mod ~SIZE~0 4294967296) 0)) (<= |#NULL.offset| 0) (= 0 (select |old(#valid)| 0)) (= |#valid| (store |old(#valid)| |main_#t~malloc4.base| 1)) (not (<= (mod (div (mod ~SIZE~0 4294967296) 2) 4294967296) 2147483647)) (= |#NULL.offset| 0)) (and (<= ~MAX~0 100000) (= |old(~SIZE~0)| 0) (= 0 |#NULL.base|) (= 0 (select |old(#valid)| |main_#t~malloc4.base|)) (<= 0 |#NULL.base|) (< (mod ~SIZE~0 4294967296) 0) (= ~MAX~0 100000) (< 1 (mod ~SIZE~0 4294967296)) (= (store |old(#memory_int)| main_~a~0.base (store (select |old(#memory_int)| main_~a~0.base) (+ main_~a~0.offset (* 4 (mod (+ (div (mod ~SIZE~0 4294967296) 2) 1) 4294967296))) 3)) |#memory_int|) (= |#length| (store |old(#length)| |main_#t~malloc4.base| (* 4 ~SIZE~0))) (<= 0 |#NULL.offset|) (= 0 |main_#t~malloc4.offset|) (<= (mod (+ (div (mod ~SIZE~0 4294967296) 2) 1) 4294967296) 2147483647) (= ~SIZE~0 (+ (div (mod v_prenex_14 4294967296) 8) 1)) (not (= |main_#t~malloc4.base| 0)) (< (mod ~SIZE~0 4294967296) (mod ~MAX~0 4294967296)) (< |#StackHeapBarrier| |main_#t~malloc4.base|) (<= 100000 ~MAX~0) (not (= (mod ~SIZE~0 2) 0)) (= main_~a~0.offset |main_#t~malloc4.offset|) (<= |#NULL.base| 0) (= (mod v_prenex_14 8) 0) (= |main_#t~malloc4.base| main_~a~0.base) (<= |#NULL.offset| 0) (= 0 (select |old(#valid)| 0)) (= |#valid| (store |old(#valid)| |main_#t~malloc4.base| 1)) (= |#NULL.offset| 0)) (and (<= ~MAX~0 100000) (= |old(~SIZE~0)| 0) (< (mod v_prenex_13 4294967296) 0) (= 0 |#NULL.base|) (= 0 (select |old(#valid)| |main_#t~malloc4.base|)) (<= 0 |#NULL.base|) (= ~MAX~0 100000) (< 1 (mod ~SIZE~0 4294967296)) (= |#length| (store |old(#length)| |main_#t~malloc4.base| (* 4 ~SIZE~0))) (<= 0 |#NULL.offset|) (= 0 |main_#t~malloc4.offset|) (not (= |main_#t~malloc4.base| 0)) (not (= (mod v_prenex_13 8) 0)) (= ~SIZE~0 (+ (div (mod v_prenex_13 4294967296) 8) 2)) (= (store |old(#memory_int)| main_~a~0.base (store (select |old(#memory_int)| main_~a~0.base) (+ (* 4 (mod (div (mod ~SIZE~0 4294967296) 2) 4294967296)) main_~a~0.offset (- 17179869184)) 3)) |#memory_int|) (< (mod ~SIZE~0 4294967296) (mod ~MAX~0 4294967296)) (< |#StackHeapBarrier| |main_#t~malloc4.base|) (<= 100000 ~MAX~0) (<= |#NULL.base| 0) (= main_~a~0.offset |main_#t~malloc4.offset|) (= |main_#t~malloc4.base| main_~a~0.base) (<= |#NULL.offset| 0) (= 0 (select |old(#valid)| 0)) (= |#valid| (store |old(#valid)| |main_#t~malloc4.base| 1)) (= (mod ~SIZE~0 2) 0) (not (<= (mod (div (mod ~SIZE~0 4294967296) 2) 4294967296) 2147483647)) (= |#NULL.offset| 0)) (and (<= ~MAX~0 100000) (= |old(~SIZE~0)| 0) (= 0 |#NULL.base|) (= 0 (select |old(#valid)| |main_#t~malloc4.base|)) (<= 0 |#NULL.base|) (< (mod ~SIZE~0 4294967296) 0) (= ~MAX~0 100000) (< 1 (mod ~SIZE~0 4294967296)) (= |#length| (store |old(#length)| |main_#t~malloc4.base| (* 4 ~SIZE~0))) (<= 0 |#NULL.offset|) (= 0 |main_#t~malloc4.offset|) (= ~SIZE~0 (+ (div (mod v_prenex_14 4294967296) 8) 1)) (not (= |main_#t~malloc4.base| 0)) (< (mod ~SIZE~0 4294967296) (mod ~MAX~0 4294967296)) (< |#StackHeapBarrier| |main_#t~malloc4.base|) (<= 100000 ~MAX~0) (not (= (mod ~SIZE~0 2) 0)) (not (<= (mod (+ (div (mod ~SIZE~0 4294967296) 2) 1) 4294967296) 2147483647)) (= (store |old(#memory_int)| main_~a~0.base (store (select |old(#memory_int)| main_~a~0.base) (+ main_~a~0.offset (* 4 (mod (+ (div (mod ~SIZE~0 4294967296) 2) 1) 4294967296)) (- 17179869184)) 3)) |#memory_int|) (= main_~a~0.offset |main_#t~malloc4.offset|) (<= |#NULL.base| 0) (= (mod v_prenex_14 8) 0) (= |main_#t~malloc4.base| main_~a~0.base) (<= |#NULL.offset| 0) (= 0 (select |old(#valid)| 0)) (= |#valid| (store |old(#valid)| |main_#t~malloc4.base| 1)) (= |#NULL.offset| 0)) (and (<= ~MAX~0 100000) (= |old(~SIZE~0)| 0) (< (mod v_prenex_13 4294967296) 0) (= 0 |#NULL.base|) (= 0 (select |old(#valid)| |main_#t~malloc4.base|)) (<= 0 |#NULL.base|) (= ~MAX~0 100000) (< 1 (mod ~SIZE~0 4294967296)) (= |#length| (store |old(#length)| |main_#t~malloc4.base| (* 4 ~SIZE~0))) (<= 0 |#NULL.offset|) (= 0 |main_#t~malloc4.offset|) (not (= |main_#t~malloc4.base| 0)) (not (= (mod v_prenex_13 8) 0)) (= ~SIZE~0 (+ (div (mod v_prenex_13 4294967296) 8) 2)) (< (mod ~SIZE~0 4294967296) (mod ~MAX~0 4294967296)) (< |#StackHeapBarrier| |main_#t~malloc4.base|) (<= 100000 ~MAX~0) (<= (mod (div (mod ~SIZE~0 4294967296) 2) 4294967296) 2147483647) (= (store |old(#memory_int)| main_~a~0.base (store (select |old(#memory_int)| main_~a~0.base) (+ (* 4 (mod (div (mod ~SIZE~0 4294967296) 2) 4294967296)) main_~a~0.offset) 3)) |#memory_int|) (<= |#NULL.base| 0) (= main_~a~0.offset |main_#t~malloc4.offset|) (= |main_#t~malloc4.base| main_~a~0.base) (not (< (mod ~SIZE~0 4294967296) 0)) (<= |#NULL.offset| 0) (= 0 (select |old(#valid)| 0)) (= |#valid| (store |old(#valid)| |main_#t~malloc4.base| 1)) (= |#NULL.offset| 0)) (and (<= ~MAX~0 100000) (= |old(~SIZE~0)| 0) (< (mod v_prenex_13 4294967296) 0) (= 0 |#NULL.base|) (= 0 (select |old(#valid)| |main_#t~malloc4.base|)) (<= 0 |#NULL.base|) (= ~MAX~0 100000) (< 1 (mod ~SIZE~0 4294967296)) (= |#length| (store |old(#length)| |main_#t~malloc4.base| (* 4 ~SIZE~0))) (<= 0 |#NULL.offset|) (= 0 |main_#t~malloc4.offset|) (not (= |main_#t~malloc4.base| 0)) (not (= (mod v_prenex_13 8) 0)) (= ~SIZE~0 (+ (div (mod v_prenex_13 4294967296) 8) 2)) (= (store |old(#memory_int)| main_~a~0.base (store (select |old(#memory_int)| main_~a~0.base) (+ (* 4 (mod (div (mod ~SIZE~0 4294967296) 2) 4294967296)) main_~a~0.offset (- 17179869184)) 3)) |#memory_int|) (< (mod ~SIZE~0 4294967296) (mod ~MAX~0 4294967296)) (< |#StackHeapBarrier| |main_#t~malloc4.base|) (<= 100000 ~MAX~0) (<= |#NULL.base| 0) (= main_~a~0.offset |main_#t~malloc4.offset|) (= |main_#t~malloc4.base| main_~a~0.base) (not (< (mod ~SIZE~0 4294967296) 0)) (<= |#NULL.offset| 0) (= 0 (select |old(#valid)| 0)) (= |#valid| (store |old(#valid)| |main_#t~malloc4.base| 1)) (not (<= (mod (div (mod ~SIZE~0 4294967296) 2) 4294967296) 2147483647)) (= |#NULL.offset| 0)) (and (<= ~MAX~0 100000) (= |old(~SIZE~0)| 0) (= 0 |#NULL.base|) (= 0 (select |old(#valid)| |main_#t~malloc4.base|)) (<= 0 |#NULL.base|) (= ~MAX~0 100000) (< 1 (mod ~SIZE~0 4294967296)) (= |#length| (store |old(#length)| |main_#t~malloc4.base| (* 4 ~SIZE~0))) (<= 0 |#NULL.offset|) (= 0 |main_#t~malloc4.offset|) (= ~SIZE~0 (+ (div (mod v_prenex_14 4294967296) 8) 1)) (not (= |main_#t~malloc4.base| 0)) (= (store |old(#memory_int)| main_~a~0.base (store (select |old(#memory_int)| main_~a~0.base) (+ (* 4 (mod (div (mod ~SIZE~0 4294967296) 2) 4294967296)) main_~a~0.offset (- 17179869184)) 3)) |#memory_int|) (< (mod ~SIZE~0 4294967296) (mod ~MAX~0 4294967296)) (< |#StackHeapBarrier| |main_#t~malloc4.base|) (<= 100000 ~MAX~0) (= main_~a~0.offset |main_#t~malloc4.offset|) (<= |#NULL.base| 0) (= (mod v_prenex_14 8) 0) (= |main_#t~malloc4.base| main_~a~0.base) (<= |#NULL.offset| 0) (= 0 (select |old(#valid)| 0)) (= |#valid| (store |old(#valid)| |main_#t~malloc4.base| 1)) (= (mod ~SIZE~0 2) 0) (not (<= (mod (div (mod ~SIZE~0 4294967296) 2) 4294967296) 2147483647)) (= |#NULL.offset| 0)))) [2019-10-07 13:45:13,145 INFO L193 IcfgInterpreter]: Reachable states at location L15-6 satisfy 207#(and (<= 0 linear_search_~j~0) (<= 3 |linear_search_#in~q|) (<= 3 linear_search_~q) (= |linear_search_#in~q| 3) (<= linear_search_~q 3) (<= |linear_search_#in~q| 3)) [2019-10-07 13:45:13,146 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initEXIT satisfy 227#(and (<= ~MAX~0 100000) (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= ~SIZE~0 0) (<= 0 |#NULL.base|) (= ~MAX~0 100000) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (= |#valid| (store |old(#valid)| 0 0)) (<= 0 ~SIZE~0) (= |#NULL.offset| 0) (<= ~SIZE~0 0) (<= 100000 ~MAX~0)) [2019-10-07 13:45:13,146 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.startENTRY satisfy 6#true [2019-10-07 13:45:13,146 INFO L193 IcfgInterpreter]: Reachable states at location L6 satisfy 145#(and (<= 0 (+ |__VERIFIER_assert_#in~cond| 2147483648)) (<= __VERIFIER_assert_~cond 0) (<= 0 |__VERIFIER_assert_#in~cond|) (<= |__VERIFIER_assert_#in~cond| 0) (<= |__VERIFIER_assert_#in~cond| 2147483647) (<= |__VERIFIER_assert_#in~cond| 1) (<= 0 __VERIFIER_assert_~cond) (= 0 __VERIFIER_assert_~cond) (= |__VERIFIER_assert_#in~cond| __VERIFIER_assert_~cond)) [2019-10-07 13:45:13,146 INFO L193 IcfgInterpreter]: Reachable states at location __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION satisfy 150#(and (<= 0 (+ |__VERIFIER_assert_#in~cond| 2147483648)) (<= __VERIFIER_assert_~cond 0) (<= 0 |__VERIFIER_assert_#in~cond|) (<= |__VERIFIER_assert_#in~cond| 0) (<= |__VERIFIER_assert_#in~cond| 2147483647) (<= |__VERIFIER_assert_#in~cond| 1) (<= 0 __VERIFIER_assert_~cond) (= 0 __VERIFIER_assert_~cond) (= |__VERIFIER_assert_#in~cond| __VERIFIER_assert_~cond)) [2019-10-07 13:45:13,147 INFO L193 IcfgInterpreter]: Reachable states at location L5 satisfy 140#(and (<= 0 (+ |__VERIFIER_assert_#in~cond| 2147483648)) (<= 0 |__VERIFIER_assert_#in~cond|) (<= |__VERIFIER_assert_#in~cond| 2147483647) (<= __VERIFIER_assert_~cond 1) (<= |__VERIFIER_assert_#in~cond| 1) (<= 0 __VERIFIER_assert_~cond) (= |__VERIFIER_assert_#in~cond| __VERIFIER_assert_~cond)) [2019-10-07 13:45:13,147 INFO L193 IcfgInterpreter]: Reachable states at location __VERIFIER_assertENTRY satisfy 135#(and (<= 0 (+ |__VERIFIER_assert_#in~cond| 2147483648)) (<= 0 |__VERIFIER_assert_#in~cond|) (<= |__VERIFIER_assert_#in~cond| 2147483647) (<= |__VERIFIER_assert_#in~cond| 1)) [2019-10-07 13:45:20,099 INFO L211 tionRefinementEngine]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2019-10-07 13:45:20,099 INFO L224 tionRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 14, 12, 13] total 44 [2019-10-07 13:45:20,101 INFO L442 AbstractCegarLoop]: Interpolant automaton has 44 states [2019-10-07 13:45:20,101 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 44 interpolants. [2019-10-07 13:45:20,102 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=160, Invalid=1727, Unknown=5, NotChecked=0, Total=1892 [2019-10-07 13:45:20,103 INFO L87 Difference]: Start difference. First operand 22 states and 22 transitions. Second operand 44 states. [2019-10-07 13:45:22,949 WARN L191 SmtUtils]: Spent 2.07 s on a formula simplification. DAG size of input: 51 DAG size of output: 44 [2019-10-07 13:45:23,157 WARN L191 SmtUtils]: Spent 120.00 ms on a formula simplification. DAG size of input: 68 DAG size of output: 56 [2019-10-07 13:45:26,320 WARN L191 SmtUtils]: Spent 2.96 s on a formula simplification. DAG size of input: 84 DAG size of output: 68 [2019-10-07 13:45:26,651 WARN L191 SmtUtils]: Spent 173.00 ms on a formula simplification. DAG size of input: 79 DAG size of output: 64 [2019-10-07 13:45:27,720 WARN L191 SmtUtils]: Spent 929.00 ms on a formula simplification. DAG size of input: 117 DAG size of output: 76 [2019-10-07 13:45:28,201 WARN L191 SmtUtils]: Spent 299.00 ms on a formula simplification. DAG size of input: 102 DAG size of output: 84 [2019-10-07 13:45:29,010 WARN L191 SmtUtils]: Spent 593.00 ms on a formula simplification. DAG size of input: 58 DAG size of output: 49 [2019-10-07 13:45:31,321 WARN L191 SmtUtils]: Spent 2.09 s on a formula simplification. DAG size of input: 120 DAG size of output: 92 [2019-10-07 13:45:33,098 WARN L191 SmtUtils]: Spent 951.00 ms on a formula simplification. DAG size of input: 61 DAG size of output: 52 [2019-10-07 13:45:37,218 WARN L191 SmtUtils]: Spent 1.17 s on a formula simplification. DAG size of input: 47 DAG size of output: 43 [2019-10-07 13:45:39,424 WARN L191 SmtUtils]: Spent 2.04 s on a formula simplification that was a NOOP. DAG size: 45 [2019-10-07 13:45:39,652 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-07 13:45:39,652 INFO L93 Difference]: Finished difference Result 32 states and 32 transitions. [2019-10-07 13:45:39,653 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2019-10-07 13:45:39,653 INFO L78 Accepts]: Start accepts. Automaton has 44 states. Word has length 21 [2019-10-07 13:45:39,653 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-07 13:45:39,654 INFO L225 Difference]: With dead ends: 32 [2019-10-07 13:45:39,654 INFO L226 Difference]: Without dead ends: 24 [2019-10-07 13:45:39,655 INFO L606 BasicCegarLoop]: 0 DeclaredPredicates, 91 GetRequests, 30 SyntacticMatches, 2 SemanticMatches, 59 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 866 ImplicationChecksByTransitivity, 52.4s TimeCoverageRelationStatistics Valid=363, Invalid=3291, Unknown=6, NotChecked=0, Total=3660 [2019-10-07 13:45:39,655 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24 states. [2019-10-07 13:45:39,668 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24 to 24. [2019-10-07 13:45:39,668 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24 states. [2019-10-07 13:45:39,669 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24 states to 24 states and 24 transitions. [2019-10-07 13:45:39,669 INFO L78 Accepts]: Start accepts. Automaton has 24 states and 24 transitions. Word has length 21 [2019-10-07 13:45:39,670 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-07 13:45:39,670 INFO L462 AbstractCegarLoop]: Abstraction has 24 states and 24 transitions. [2019-10-07 13:45:39,670 INFO L463 AbstractCegarLoop]: Interpolant automaton has 44 states. [2019-10-07 13:45:39,670 INFO L276 IsEmpty]: Start isEmpty. Operand 24 states and 24 transitions. [2019-10-07 13:45:39,671 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2019-10-07 13:45:39,671 INFO L377 BasicCegarLoop]: Found error trace [2019-10-07 13:45:39,671 INFO L385 BasicCegarLoop]: trace histogram [4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-07 13:45:39,880 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-07 13:45:39,880 INFO L410 AbstractCegarLoop]: === Iteration 5 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-07 13:45:39,881 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-07 13:45:39,881 INFO L82 PathProgramCache]: Analyzing trace with hash 28942347, now seen corresponding path program 3 times [2019-10-07 13:45:39,882 INFO L150 tionRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-10-07 13:45:39,882 INFO L231 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2019-10-07 13:45:39,882 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-07 13:45:39,883 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-07 13:45:39,883 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-07 13:45:39,993 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-07 13:45:42,464 WARN L191 SmtUtils]: Spent 2.17 s on a formula simplification. DAG size of input: 139 DAG size of output: 27 [2019-10-07 13:45:42,691 WARN L191 SmtUtils]: Spent 109.00 ms on a formula simplification. DAG size of input: 48 DAG size of output: 30 [2019-10-07 13:45:42,828 WARN L191 SmtUtils]: Spent 107.00 ms on a formula simplification. DAG size of input: 78 DAG size of output: 41 [2019-10-07 13:45:43,031 WARN L191 SmtUtils]: Spent 173.00 ms on a formula simplification. DAG size of input: 78 DAG size of output: 63 [2019-10-07 13:45:43,312 WARN L191 SmtUtils]: Spent 250.00 ms on a formula simplification. DAG size of input: 93 DAG size of output: 84 [2019-10-07 13:45:43,767 WARN L191 SmtUtils]: Spent 394.00 ms on a formula simplification. DAG size of input: 91 DAG size of output: 80 [2019-10-07 13:45:48,747 WARN L191 SmtUtils]: Spent 4.32 s on a formula simplification. DAG size of input: 72 DAG size of output: 69 [2019-10-07 13:45:48,968 WARN L191 SmtUtils]: Spent 155.00 ms on a formula simplification. DAG size of input: 144 DAG size of output: 56 [2019-10-07 13:45:49,053 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-10-07 13:45:49,053 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2019-10-07 13:45:49,053 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2019-10-07 13:45:49,053 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-07 13:45:49,219 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2019-10-07 13:45:49,219 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-10-07 13:45:49,221 INFO L256 TraceCheckSpWp]: Trace formula consists of 111 conjuncts, 45 conjunts are in the unsatisfiable core [2019-10-07 13:45:49,223 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2019-10-07 13:45:49,240 WARN L225 Elim1Store]: Array PQE input equivalent to false [2019-10-07 13:45:49,748 WARN L191 SmtUtils]: Spent 239.00 ms on a formula simplification. DAG size of input: 64 DAG size of output: 55 [2019-10-07 13:45:50,209 WARN L191 SmtUtils]: Spent 244.00 ms on a formula simplification. DAG size of input: 72 DAG size of output: 61 [2019-10-07 13:45:50,798 WARN L191 SmtUtils]: Spent 325.00 ms on a formula simplification. DAG size of input: 72 DAG size of output: 63 [2019-10-07 13:45:51,095 WARN L191 SmtUtils]: Spent 123.00 ms on a formula simplification. DAG size of input: 54 DAG size of output: 54 [2019-10-07 13:45:51,248 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-10-07 13:45:51,248 INFO L322 TraceCheckSpWp]: Computing backward predicates... [2019-10-07 13:45:53,742 WARN L191 SmtUtils]: Spent 2.36 s on a formula simplification. DAG size of input: 126 DAG size of output: 87 [2019-10-07 13:45:54,017 WARN L191 SmtUtils]: Spent 196.00 ms on a formula simplification. DAG size of input: 78 DAG size of output: 77 [2019-10-07 13:45:56,061 WARN L191 SmtUtils]: Spent 622.00 ms on a formula simplification that was a NOOP. DAG size: 81 [2019-10-07 13:46:02,983 WARN L191 SmtUtils]: Spent 2.35 s on a formula simplification that was a NOOP. DAG size: 84 [2019-10-07 13:46:22,937 WARN L191 SmtUtils]: Spent 10.74 s on a formula simplification that was a NOOP. DAG size: 96 [2019-10-07 13:46:22,956 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-10-07 13:46:22,956 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSifa [2019-10-07 13:46:22,957 INFO L162 IcfgInterpreter]: Started Sifa with 18 locations of interest [2019-10-07 13:46:22,957 INFO L169 IcfgInterpreter]: Building call graph [2019-10-07 13:46:22,958 INFO L174 IcfgInterpreter]: Initial procedures are [ULTIMATE.start] [2019-10-07 13:46:22,958 INFO L179 IcfgInterpreter]: Starting interpretation [2019-10-07 13:46:22,958 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.start with input of size 1 for LOIs [2019-10-07 13:46:22,987 INFO L199 IcfgInterpreter]: Interpreting procedure main with input of size 30 for LOIs [2019-10-07 13:46:23,083 INFO L199 IcfgInterpreter]: Interpreting procedure __VERIFIER_assert with input of size 11 for LOIs [2019-10-07 13:46:23,096 INFO L199 IcfgInterpreter]: Interpreting procedure linear_search with input of size 18 for LOIs [2019-10-07 13:46:23,175 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.init with input of size 16 for LOIs [2019-10-07 13:46:23,180 INFO L183 IcfgInterpreter]: Interpretation finished [2019-10-07 13:46:23,180 INFO L191 IcfgInterpreter]: Final predicates for locations of interest are: [2019-10-07 13:46:23,181 INFO L193 IcfgInterpreter]: Reachable states at location linear_searchENTRY satisfy 154#(and (or (and (= (+ (mod ~SIZE~0 4294967296) (- 4294967296)) |linear_search_#in~n|) (= 3 |linear_search_#in~q|) (not (<= (mod ~SIZE~0 4294967296) 2147483647))) (and (= (mod ~SIZE~0 4294967296) |linear_search_#in~n|) (= 3 |linear_search_#in~q|) (<= (mod ~SIZE~0 4294967296) 2147483647))) (<= 3 |linear_search_#in~q|) (<= |linear_search_#in~q| 3)) [2019-10-07 13:46:23,181 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initENTRY satisfy 219#(and (= |old(#NULL.base)| |#NULL.base|) (= |#valid| |old(#valid)|) (= ~MAX~0 |old(~MAX~0)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(~SIZE~0)| ~SIZE~0)) [2019-10-07 13:46:23,181 INFO L193 IcfgInterpreter]: Reachable states at location L24 satisfy 38#(exists ((|v_main_#t~nondet3_6| Int) (v_prenex_19 Int)) (or (and (<= ~MAX~0 100000) (= |old(~SIZE~0)| 0) (= 0 |#NULL.base|) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (= ~MAX~0 100000) (= 0 (select |old(#valid)| 0)) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (not (< (mod v_prenex_19 4294967296) 0)) (= |#valid| |old(#valid)|) (= ~SIZE~0 (+ (div (mod v_prenex_19 4294967296) 8) 1)) (= |#memory_int| |old(#memory_int)|) (= |#NULL.offset| 0) (= |old(#length)| |#length|) (<= 100000 ~MAX~0)) (and (<= ~MAX~0 100000) (= |old(~SIZE~0)| 0) (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= (mod v_prenex_19 8) 0) (<= 0 |#NULL.base|) (= ~MAX~0 100000) (= 0 (select |old(#valid)| 0)) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (= |#valid| |old(#valid)|) (= ~SIZE~0 (+ (div (mod v_prenex_19 4294967296) 8) 1)) (= |#memory_int| |old(#memory_int)|) (= |#NULL.offset| 0) (= |old(#length)| |#length|) (<= 100000 ~MAX~0)) (and (<= ~MAX~0 100000) (= |old(~SIZE~0)| 0) (= 0 |#NULL.base|) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (= ~MAX~0 100000) (< (mod |v_main_#t~nondet3_6| 4294967296) 0) (not (= (mod |v_main_#t~nondet3_6| 8) 0)) (= 0 (select |old(#valid)| 0)) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (= ~SIZE~0 (+ (div (mod |v_main_#t~nondet3_6| 4294967296) 8) 2)) (= |#valid| |old(#valid)|) (= |#memory_int| |old(#memory_int)|) (= |#NULL.offset| 0) (= |old(#length)| |#length|) (<= 100000 ~MAX~0)))) [2019-10-07 13:46:23,181 INFO L193 IcfgInterpreter]: Reachable states at location L27-2 satisfy 127#(and (<= |main_#t~ret5| 2147483647) (<= |main_#t~ret5| 1) (<= 0 |main_#t~ret5|) (<= 0 (+ |main_#t~ret5| 2147483648))) [2019-10-07 13:46:23,182 INFO L193 IcfgInterpreter]: Reachable states at location L15-3 satisfy 196#(and (<= 0 linear_search_~j~0) (<= 3 |linear_search_#in~q|) (<= 3 linear_search_~q) (= |linear_search_#in~q| 3) (<= linear_search_~q 3) (<= |linear_search_#in~q| 3)) [2019-10-07 13:46:23,182 INFO L193 IcfgInterpreter]: Reachable states at location L15-5 satisfy 186#(and (<= 0 linear_search_~j~0) (<= 3 |linear_search_#in~q|) (<= 3 linear_search_~q) (= |linear_search_#in~q| 3) (<= linear_search_~q 3) (<= |linear_search_#in~q| 3)) [2019-10-07 13:46:23,182 INFO L193 IcfgInterpreter]: Reachable states at location L27-1 satisfy 108#(and (<= |main_#t~ret5| 1) (<= 0 |main_#t~ret5|)) [2019-10-07 13:46:23,182 INFO L193 IcfgInterpreter]: Reachable states at location linear_searchEXIT satisfy 215#(and (<= 0 linear_search_~j~0) (<= 3 |linear_search_#in~q|) (<= |linear_search_#res| 1) (<= 3 linear_search_~q) (= |linear_search_#in~q| 3) (<= linear_search_~q 3) (<= |linear_search_#in~q| 3) (<= 0 |linear_search_#res|)) [2019-10-07 13:46:23,182 INFO L193 IcfgInterpreter]: Reachable states at location L-1 satisfy 23#(and (<= ~MAX~0 100000) (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= ~SIZE~0 0) (<= 0 |#NULL.base|) (= ~MAX~0 100000) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (= 0 (select |#valid| 0)) (<= 0 ~SIZE~0) (= |#NULL.offset| 0) (<= ~SIZE~0 0) (<= 100000 ~MAX~0)) [2019-10-07 13:46:23,183 INFO L193 IcfgInterpreter]: Reachable states at location mainENTRY satisfy 33#(and (<= ~MAX~0 100000) (= |old(~SIZE~0)| 0) (= 0 |#NULL.base|) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (= ~MAX~0 100000) (= 0 (select |old(#valid)| 0)) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (<= 0 |old(~SIZE~0)|) (= |#valid| |old(#valid)|) (<= |old(~SIZE~0)| 0) (<= 0 ~SIZE~0) (= |#memory_int| |old(#memory_int)|) (= |#NULL.offset| 0) (= |old(#length)| |#length|) (<= ~SIZE~0 0) (= |old(~SIZE~0)| ~SIZE~0) (<= 100000 ~MAX~0)) [2019-10-07 13:46:23,183 INFO L193 IcfgInterpreter]: Reachable states at location L27 satisfy 43#(exists ((|v_main_#t~nondet3_6| Int) (v_prenex_20 Int) (v_prenex_19 Int)) (or (and (<= ~MAX~0 100000) (= |old(~SIZE~0)| 0) (= 0 |#NULL.base|) (= 0 (select |old(#valid)| |main_#t~malloc4.base|)) (<= 0 |#NULL.base|) (= ~MAX~0 100000) (< 1 (mod ~SIZE~0 4294967296)) (< (mod |v_main_#t~nondet3_6| 4294967296) 0) (= |#length| (store |old(#length)| |main_#t~malloc4.base| (* 4 ~SIZE~0))) (<= 0 |#NULL.offset|) (= 0 |main_#t~malloc4.offset|) (not (= (mod |v_main_#t~nondet3_6| 8) 0)) (not (= |main_#t~malloc4.base| 0)) (< (mod ~SIZE~0 4294967296) (mod ~MAX~0 4294967296)) (< |#StackHeapBarrier| |main_#t~malloc4.base|) (<= 100000 ~MAX~0) (= (store |old(#memory_int)| main_~a~0.base (store (select |old(#memory_int)| main_~a~0.base) (+ (* 4 (mod (div (mod ~SIZE~0 4294967296) 2) 4294967296)) main_~a~0.offset) 3)) |#memory_int|) (<= (mod (div (mod ~SIZE~0 4294967296) 2) 4294967296) 2147483647) (<= |#NULL.base| 0) (= main_~a~0.offset |main_#t~malloc4.offset|) (= |main_#t~malloc4.base| main_~a~0.base) (not (< (mod ~SIZE~0 4294967296) 0)) (= 0 (select |old(#valid)| 0)) (<= |#NULL.offset| 0) (= ~SIZE~0 (+ (div (mod |v_main_#t~nondet3_6| 4294967296) 8) 2)) (= |#valid| (store |old(#valid)| |main_#t~malloc4.base| 1)) (= |#NULL.offset| 0)) (and (<= ~MAX~0 100000) (= |old(~SIZE~0)| 0) (= 0 |#NULL.base|) (= 0 (select |old(#valid)| |main_#t~malloc4.base|)) (= (mod v_prenex_19 8) 0) (<= 0 |#NULL.base|) (= ~MAX~0 100000) (< (mod ~SIZE~0 4294967296) 0) (< 1 (mod ~SIZE~0 4294967296)) (= (store |old(#memory_int)| main_~a~0.base (store (select |old(#memory_int)| main_~a~0.base) (+ main_~a~0.offset (* 4 (mod (+ (div (mod ~SIZE~0 4294967296) 2) 1) 4294967296))) 3)) |#memory_int|) (= |#length| (store |old(#length)| |main_#t~malloc4.base| (* 4 ~SIZE~0))) (= 0 |main_#t~malloc4.offset|) (<= 0 |#NULL.offset|) (<= (mod (+ (div (mod ~SIZE~0 4294967296) 2) 1) 4294967296) 2147483647) (not (= |main_#t~malloc4.base| 0)) (< (mod ~SIZE~0 4294967296) (mod ~MAX~0 4294967296)) (< |#StackHeapBarrier| |main_#t~malloc4.base|) (<= 100000 ~MAX~0) (not (= (mod ~SIZE~0 2) 0)) (= main_~a~0.offset |main_#t~malloc4.offset|) (<= |#NULL.base| 0) (= |main_#t~malloc4.base| main_~a~0.base) (= 0 (select |old(#valid)| 0)) (<= |#NULL.offset| 0) (= |#valid| (store |old(#valid)| |main_#t~malloc4.base| 1)) (= ~SIZE~0 (+ (div (mod v_prenex_19 4294967296) 8) 1)) (= |#NULL.offset| 0)) (and (<= ~MAX~0 100000) (= |old(~SIZE~0)| 0) (= ~SIZE~0 (+ (div (mod v_prenex_20 4294967296) 8) 1)) (= 0 |#NULL.base|) (= 0 (select |old(#valid)| |main_#t~malloc4.base|)) (<= 0 |#NULL.base|) (= ~MAX~0 100000) (< 1 (mod ~SIZE~0 4294967296)) (= |#length| (store |old(#length)| |main_#t~malloc4.base| (* 4 ~SIZE~0))) (<= 0 |#NULL.offset|) (= 0 |main_#t~malloc4.offset|) (not (= |main_#t~malloc4.base| 0)) (< (mod ~SIZE~0 4294967296) (mod ~MAX~0 4294967296)) (< |#StackHeapBarrier| |main_#t~malloc4.base|) (<= 100000 ~MAX~0) (= (store |old(#memory_int)| main_~a~0.base (store (select |old(#memory_int)| main_~a~0.base) (+ (* 4 (mod (div (mod ~SIZE~0 4294967296) 2) 4294967296)) main_~a~0.offset) 3)) |#memory_int|) (<= (mod (div (mod ~SIZE~0 4294967296) 2) 4294967296) 2147483647) (= main_~a~0.offset |main_#t~malloc4.offset|) (<= |#NULL.base| 0) (= |main_#t~malloc4.base| main_~a~0.base) (not (< (mod v_prenex_20 4294967296) 0)) (not (< (mod ~SIZE~0 4294967296) 0)) (= 0 (select |old(#valid)| 0)) (<= |#NULL.offset| 0) (= |#valid| (store |old(#valid)| |main_#t~malloc4.base| 1)) (= |#NULL.offset| 0)) (and (<= ~MAX~0 100000) (= |old(~SIZE~0)| 0) (= ~SIZE~0 (+ (div (mod v_prenex_20 4294967296) 8) 1)) (= 0 |#NULL.base|) (= 0 (select |old(#valid)| |main_#t~malloc4.base|)) (<= 0 |#NULL.base|) (= ~MAX~0 100000) (< 1 (mod ~SIZE~0 4294967296)) (= |#length| (store |old(#length)| |main_#t~malloc4.base| (* 4 ~SIZE~0))) (<= 0 |#NULL.offset|) (= 0 |main_#t~malloc4.offset|) (not (= |main_#t~malloc4.base| 0)) (< (mod ~SIZE~0 4294967296) (mod ~MAX~0 4294967296)) (< |#StackHeapBarrier| |main_#t~malloc4.base|) (<= 100000 ~MAX~0) (= (store |old(#memory_int)| main_~a~0.base (store (select |old(#memory_int)| main_~a~0.base) (+ (* 4 (mod (div (mod ~SIZE~0 4294967296) 2) 4294967296)) main_~a~0.offset) 3)) |#memory_int|) (<= (mod (div (mod ~SIZE~0 4294967296) 2) 4294967296) 2147483647) (= main_~a~0.offset |main_#t~malloc4.offset|) (<= |#NULL.base| 0) (= |main_#t~malloc4.base| main_~a~0.base) (not (< (mod v_prenex_20 4294967296) 0)) (= 0 (select |old(#valid)| 0)) (<= |#NULL.offset| 0) (= |#valid| (store |old(#valid)| |main_#t~malloc4.base| 1)) (= (mod ~SIZE~0 2) 0) (= |#NULL.offset| 0)) (and (<= ~MAX~0 100000) (= |old(~SIZE~0)| 0) (= 0 |#NULL.base|) (= 0 (select |old(#valid)| |main_#t~malloc4.base|)) (<= 0 |#NULL.base|) (= ~MAX~0 100000) (< 1 (mod ~SIZE~0 4294967296)) (< (mod |v_main_#t~nondet3_6| 4294967296) 0) (= |#length| (store |old(#length)| |main_#t~malloc4.base| (* 4 ~SIZE~0))) (<= 0 |#NULL.offset|) (= 0 |main_#t~malloc4.offset|) (not (= (mod |v_main_#t~nondet3_6| 8) 0)) (not (= |main_#t~malloc4.base| 0)) (< (mod ~SIZE~0 4294967296) (mod ~MAX~0 4294967296)) (= (store |old(#memory_int)| main_~a~0.base (store (select |old(#memory_int)| main_~a~0.base) (+ (* 4 (mod (div (mod ~SIZE~0 4294967296) 2) 4294967296)) main_~a~0.offset (- 17179869184)) 3)) |#memory_int|) (< |#StackHeapBarrier| |main_#t~malloc4.base|) (<= 100000 ~MAX~0) (<= |#NULL.base| 0) (= main_~a~0.offset |main_#t~malloc4.offset|) (= |main_#t~malloc4.base| main_~a~0.base) (not (< (mod ~SIZE~0 4294967296) 0)) (= 0 (select |old(#valid)| 0)) (<= |#NULL.offset| 0) (= ~SIZE~0 (+ (div (mod |v_main_#t~nondet3_6| 4294967296) 8) 2)) (= |#valid| (store |old(#valid)| |main_#t~malloc4.base| 1)) (not (<= (mod (div (mod ~SIZE~0 4294967296) 2) 4294967296) 2147483647)) (= |#NULL.offset| 0)) (and (<= ~MAX~0 100000) (= |old(~SIZE~0)| 0) (= ~SIZE~0 (+ (div (mod v_prenex_20 4294967296) 8) 1)) (= 0 |#NULL.base|) (= 0 (select |old(#valid)| |main_#t~malloc4.base|)) (<= 0 |#NULL.base|) (= ~MAX~0 100000) (< 1 (mod ~SIZE~0 4294967296)) (= |#length| (store |old(#length)| |main_#t~malloc4.base| (* 4 ~SIZE~0))) (<= 0 |#NULL.offset|) (= 0 |main_#t~malloc4.offset|) (not (= |main_#t~malloc4.base| 0)) (< (mod ~SIZE~0 4294967296) (mod ~MAX~0 4294967296)) (= (store |old(#memory_int)| main_~a~0.base (store (select |old(#memory_int)| main_~a~0.base) (+ (* 4 (mod (div (mod ~SIZE~0 4294967296) 2) 4294967296)) main_~a~0.offset (- 17179869184)) 3)) |#memory_int|) (< |#StackHeapBarrier| |main_#t~malloc4.base|) (<= 100000 ~MAX~0) (= main_~a~0.offset |main_#t~malloc4.offset|) (<= |#NULL.base| 0) (= |main_#t~malloc4.base| main_~a~0.base) (not (< (mod v_prenex_20 4294967296) 0)) (= 0 (select |old(#valid)| 0)) (<= |#NULL.offset| 0) (= |#valid| (store |old(#valid)| |main_#t~malloc4.base| 1)) (= (mod ~SIZE~0 2) 0) (not (<= (mod (div (mod ~SIZE~0 4294967296) 2) 4294967296) 2147483647)) (= |#NULL.offset| 0)) (and (<= ~MAX~0 100000) (= |old(~SIZE~0)| 0) (= 0 |#NULL.base|) (= 0 (select |old(#valid)| |main_#t~malloc4.base|)) (<= 0 |#NULL.base|) (= ~MAX~0 100000) (< (mod ~SIZE~0 4294967296) 0) (< 1 (mod ~SIZE~0 4294967296)) (= (store |old(#memory_int)| main_~a~0.base (store (select |old(#memory_int)| main_~a~0.base) (+ main_~a~0.offset (* 4 (mod (+ (div (mod ~SIZE~0 4294967296) 2) 1) 4294967296))) 3)) |#memory_int|) (< (mod |v_main_#t~nondet3_6| 4294967296) 0) (= |#length| (store |old(#length)| |main_#t~malloc4.base| (* 4 ~SIZE~0))) (<= 0 |#NULL.offset|) (= 0 |main_#t~malloc4.offset|) (not (= (mod |v_main_#t~nondet3_6| 8) 0)) (<= (mod (+ (div (mod ~SIZE~0 4294967296) 2) 1) 4294967296) 2147483647) (not (= |main_#t~malloc4.base| 0)) (< (mod ~SIZE~0 4294967296) (mod ~MAX~0 4294967296)) (< |#StackHeapBarrier| |main_#t~malloc4.base|) (<= 100000 ~MAX~0) (not (= (mod ~SIZE~0 2) 0)) (<= |#NULL.base| 0) (= main_~a~0.offset |main_#t~malloc4.offset|) (= |main_#t~malloc4.base| main_~a~0.base) (= 0 (select |old(#valid)| 0)) (<= |#NULL.offset| 0) (= ~SIZE~0 (+ (div (mod |v_main_#t~nondet3_6| 4294967296) 8) 2)) (= |#valid| (store |old(#valid)| |main_#t~malloc4.base| 1)) (= |#NULL.offset| 0)) (and (<= ~MAX~0 100000) (= |old(~SIZE~0)| 0) (= 0 |#NULL.base|) (= 0 (select |old(#valid)| |main_#t~malloc4.base|)) (= (mod v_prenex_19 8) 0) (<= 0 |#NULL.base|) (< (mod ~SIZE~0 4294967296) 0) (= ~MAX~0 100000) (< 1 (mod ~SIZE~0 4294967296)) (= |#length| (store |old(#length)| |main_#t~malloc4.base| (* 4 ~SIZE~0))) (= 0 |main_#t~malloc4.offset|) (<= 0 |#NULL.offset|) (not (= |main_#t~malloc4.base| 0)) (< (mod ~SIZE~0 4294967296) (mod ~MAX~0 4294967296)) (< |#StackHeapBarrier| |main_#t~malloc4.base|) (<= 100000 ~MAX~0) (not (= (mod ~SIZE~0 2) 0)) (not (<= (mod (+ (div (mod ~SIZE~0 4294967296) 2) 1) 4294967296) 2147483647)) (= (store |old(#memory_int)| main_~a~0.base (store (select |old(#memory_int)| main_~a~0.base) (+ main_~a~0.offset (* 4 (mod (+ (div (mod ~SIZE~0 4294967296) 2) 1) 4294967296)) (- 17179869184)) 3)) |#memory_int|) (= main_~a~0.offset |main_#t~malloc4.offset|) (<= |#NULL.base| 0) (= |main_#t~malloc4.base| main_~a~0.base) (= 0 (select |old(#valid)| 0)) (<= |#NULL.offset| 0) (= |#valid| (store |old(#valid)| |main_#t~malloc4.base| 1)) (= ~SIZE~0 (+ (div (mod v_prenex_19 4294967296) 8) 1)) (= |#NULL.offset| 0)) (and (<= ~MAX~0 100000) (= |old(~SIZE~0)| 0) (= ~SIZE~0 (+ (div (mod v_prenex_20 4294967296) 8) 1)) (= 0 |#NULL.base|) (= 0 (select |old(#valid)| |main_#t~malloc4.base|)) (<= 0 |#NULL.base|) (< (mod ~SIZE~0 4294967296) 0) (= ~MAX~0 100000) (< 1 (mod ~SIZE~0 4294967296)) (= |#length| (store |old(#length)| |main_#t~malloc4.base| (* 4 ~SIZE~0))) (<= 0 |#NULL.offset|) (= 0 |main_#t~malloc4.offset|) (not (= |main_#t~malloc4.base| 0)) (< (mod ~SIZE~0 4294967296) (mod ~MAX~0 4294967296)) (< |#StackHeapBarrier| |main_#t~malloc4.base|) (<= 100000 ~MAX~0) (not (= (mod ~SIZE~0 2) 0)) (not (<= (mod (+ (div (mod ~SIZE~0 4294967296) 2) 1) 4294967296) 2147483647)) (= (store |old(#memory_int)| main_~a~0.base (store (select |old(#memory_int)| main_~a~0.base) (+ main_~a~0.offset (* 4 (mod (+ (div (mod ~SIZE~0 4294967296) 2) 1) 4294967296)) (- 17179869184)) 3)) |#memory_int|) (= main_~a~0.offset |main_#t~malloc4.offset|) (<= |#NULL.base| 0) (= |main_#t~malloc4.base| main_~a~0.base) (not (< (mod v_prenex_20 4294967296) 0)) (= 0 (select |old(#valid)| 0)) (<= |#NULL.offset| 0) (= |#valid| (store |old(#valid)| |main_#t~malloc4.base| 1)) (= |#NULL.offset| 0)) (and (<= ~MAX~0 100000) (= |old(~SIZE~0)| 0) (= ~SIZE~0 (+ (div (mod v_prenex_20 4294967296) 8) 1)) (= 0 |#NULL.base|) (= 0 (select |old(#valid)| |main_#t~malloc4.base|)) (<= 0 |#NULL.base|) (= ~MAX~0 100000) (< (mod ~SIZE~0 4294967296) 0) (< 1 (mod ~SIZE~0 4294967296)) (= (store |old(#memory_int)| main_~a~0.base (store (select |old(#memory_int)| main_~a~0.base) (+ main_~a~0.offset (* 4 (mod (+ (div (mod ~SIZE~0 4294967296) 2) 1) 4294967296))) 3)) |#memory_int|) (= |#length| (store |old(#length)| |main_#t~malloc4.base| (* 4 ~SIZE~0))) (<= 0 |#NULL.offset|) (= 0 |main_#t~malloc4.offset|) (<= (mod (+ (div (mod ~SIZE~0 4294967296) 2) 1) 4294967296) 2147483647) (not (= |main_#t~malloc4.base| 0)) (< (mod ~SIZE~0 4294967296) (mod ~MAX~0 4294967296)) (< |#StackHeapBarrier| |main_#t~malloc4.base|) (<= 100000 ~MAX~0) (not (= (mod ~SIZE~0 2) 0)) (= main_~a~0.offset |main_#t~malloc4.offset|) (<= |#NULL.base| 0) (= |main_#t~malloc4.base| main_~a~0.base) (not (< (mod v_prenex_20 4294967296) 0)) (= 0 (select |old(#valid)| 0)) (<= |#NULL.offset| 0) (= |#valid| (store |old(#valid)| |main_#t~malloc4.base| 1)) (= |#NULL.offset| 0)) (and (<= ~MAX~0 100000) (= |old(~SIZE~0)| 0) (= 0 |#NULL.base|) (= 0 (select |old(#valid)| |main_#t~malloc4.base|)) (<= 0 |#NULL.base|) (= ~MAX~0 100000) (< 1 (mod ~SIZE~0 4294967296)) (< (mod |v_main_#t~nondet3_6| 4294967296) 0) (= |#length| (store |old(#length)| |main_#t~malloc4.base| (* 4 ~SIZE~0))) (<= 0 |#NULL.offset|) (= 0 |main_#t~malloc4.offset|) (not (= (mod |v_main_#t~nondet3_6| 8) 0)) (not (= |main_#t~malloc4.base| 0)) (< (mod ~SIZE~0 4294967296) (mod ~MAX~0 4294967296)) (< |#StackHeapBarrier| |main_#t~malloc4.base|) (<= 100000 ~MAX~0) (= (store |old(#memory_int)| main_~a~0.base (store (select |old(#memory_int)| main_~a~0.base) (+ (* 4 (mod (div (mod ~SIZE~0 4294967296) 2) 4294967296)) main_~a~0.offset) 3)) |#memory_int|) (<= (mod (div (mod ~SIZE~0 4294967296) 2) 4294967296) 2147483647) (<= |#NULL.base| 0) (= main_~a~0.offset |main_#t~malloc4.offset|) (= |main_#t~malloc4.base| main_~a~0.base) (= 0 (select |old(#valid)| 0)) (<= |#NULL.offset| 0) (= ~SIZE~0 (+ (div (mod |v_main_#t~nondet3_6| 4294967296) 8) 2)) (= |#valid| (store |old(#valid)| |main_#t~malloc4.base| 1)) (= (mod ~SIZE~0 2) 0) (= |#NULL.offset| 0)) (and (<= ~MAX~0 100000) (= |old(~SIZE~0)| 0) (= ~SIZE~0 (+ (div (mod v_prenex_20 4294967296) 8) 1)) (= 0 |#NULL.base|) (= 0 (select |old(#valid)| |main_#t~malloc4.base|)) (<= 0 |#NULL.base|) (= ~MAX~0 100000) (< 1 (mod ~SIZE~0 4294967296)) (= |#length| (store |old(#length)| |main_#t~malloc4.base| (* 4 ~SIZE~0))) (<= 0 |#NULL.offset|) (= 0 |main_#t~malloc4.offset|) (not (= |main_#t~malloc4.base| 0)) (< (mod ~SIZE~0 4294967296) (mod ~MAX~0 4294967296)) (= (store |old(#memory_int)| main_~a~0.base (store (select |old(#memory_int)| main_~a~0.base) (+ (* 4 (mod (div (mod ~SIZE~0 4294967296) 2) 4294967296)) main_~a~0.offset (- 17179869184)) 3)) |#memory_int|) (< |#StackHeapBarrier| |main_#t~malloc4.base|) (<= 100000 ~MAX~0) (= main_~a~0.offset |main_#t~malloc4.offset|) (<= |#NULL.base| 0) (= |main_#t~malloc4.base| main_~a~0.base) (not (< (mod v_prenex_20 4294967296) 0)) (not (< (mod ~SIZE~0 4294967296) 0)) (= 0 (select |old(#valid)| 0)) (<= |#NULL.offset| 0) (= |#valid| (store |old(#valid)| |main_#t~malloc4.base| 1)) (not (<= (mod (div (mod ~SIZE~0 4294967296) 2) 4294967296) 2147483647)) (= |#NULL.offset| 0)) (and (<= ~MAX~0 100000) (= |old(~SIZE~0)| 0) (= 0 |#NULL.base|) (= 0 (select |old(#valid)| |main_#t~malloc4.base|)) (<= 0 |#NULL.base|) (= ~MAX~0 100000) (< 1 (mod ~SIZE~0 4294967296)) (< (mod |v_main_#t~nondet3_6| 4294967296) 0) (= |#length| (store |old(#length)| |main_#t~malloc4.base| (* 4 ~SIZE~0))) (<= 0 |#NULL.offset|) (= 0 |main_#t~malloc4.offset|) (not (= (mod |v_main_#t~nondet3_6| 8) 0)) (not (= |main_#t~malloc4.base| 0)) (< (mod ~SIZE~0 4294967296) (mod ~MAX~0 4294967296)) (= (store |old(#memory_int)| main_~a~0.base (store (select |old(#memory_int)| main_~a~0.base) (+ (* 4 (mod (div (mod ~SIZE~0 4294967296) 2) 4294967296)) main_~a~0.offset (- 17179869184)) 3)) |#memory_int|) (< |#StackHeapBarrier| |main_#t~malloc4.base|) (<= 100000 ~MAX~0) (<= |#NULL.base| 0) (= main_~a~0.offset |main_#t~malloc4.offset|) (= |main_#t~malloc4.base| main_~a~0.base) (= 0 (select |old(#valid)| 0)) (<= |#NULL.offset| 0) (= ~SIZE~0 (+ (div (mod |v_main_#t~nondet3_6| 4294967296) 8) 2)) (= |#valid| (store |old(#valid)| |main_#t~malloc4.base| 1)) (= (mod ~SIZE~0 2) 0) (not (<= (mod (div (mod ~SIZE~0 4294967296) 2) 4294967296) 2147483647)) (= |#NULL.offset| 0)) (and (<= ~MAX~0 100000) (= |old(~SIZE~0)| 0) (= 0 |#NULL.base|) (= 0 (select |old(#valid)| |main_#t~malloc4.base|)) (= (mod v_prenex_19 8) 0) (<= 0 |#NULL.base|) (= ~MAX~0 100000) (< 1 (mod ~SIZE~0 4294967296)) (= |#length| (store |old(#length)| |main_#t~malloc4.base| (* 4 ~SIZE~0))) (= 0 |main_#t~malloc4.offset|) (<= 0 |#NULL.offset|) (not (= |main_#t~malloc4.base| 0)) (< (mod ~SIZE~0 4294967296) (mod ~MAX~0 4294967296)) (< |#StackHeapBarrier| |main_#t~malloc4.base|) (<= 100000 ~MAX~0) (= (store |old(#memory_int)| main_~a~0.base (store (select |old(#memory_int)| main_~a~0.base) (+ (* 4 (mod (div (mod ~SIZE~0 4294967296) 2) 4294967296)) main_~a~0.offset) 3)) |#memory_int|) (<= (mod (div (mod ~SIZE~0 4294967296) 2) 4294967296) 2147483647) (= main_~a~0.offset |main_#t~malloc4.offset|) (<= |#NULL.base| 0) (= |main_#t~malloc4.base| main_~a~0.base) (not (< (mod ~SIZE~0 4294967296) 0)) (= 0 (select |old(#valid)| 0)) (<= |#NULL.offset| 0) (= |#valid| (store |old(#valid)| |main_#t~malloc4.base| 1)) (= ~SIZE~0 (+ (div (mod v_prenex_19 4294967296) 8) 1)) (= |#NULL.offset| 0)) (and (<= ~MAX~0 100000) (= |old(~SIZE~0)| 0) (= 0 |#NULL.base|) (= 0 (select |old(#valid)| |main_#t~malloc4.base|)) (= (mod v_prenex_19 8) 0) (<= 0 |#NULL.base|) (= ~MAX~0 100000) (< 1 (mod ~SIZE~0 4294967296)) (= |#length| (store |old(#length)| |main_#t~malloc4.base| (* 4 ~SIZE~0))) (= 0 |main_#t~malloc4.offset|) (<= 0 |#NULL.offset|) (not (= |main_#t~malloc4.base| 0)) (< (mod ~SIZE~0 4294967296) (mod ~MAX~0 4294967296)) (= (store |old(#memory_int)| main_~a~0.base (store (select |old(#memory_int)| main_~a~0.base) (+ (* 4 (mod (div (mod ~SIZE~0 4294967296) 2) 4294967296)) main_~a~0.offset (- 17179869184)) 3)) |#memory_int|) (< |#StackHeapBarrier| |main_#t~malloc4.base|) (<= 100000 ~MAX~0) (= main_~a~0.offset |main_#t~malloc4.offset|) (<= |#NULL.base| 0) (= |main_#t~malloc4.base| main_~a~0.base) (= 0 (select |old(#valid)| 0)) (<= |#NULL.offset| 0) (= |#valid| (store |old(#valid)| |main_#t~malloc4.base| 1)) (= (mod ~SIZE~0 2) 0) (= ~SIZE~0 (+ (div (mod v_prenex_19 4294967296) 8) 1)) (not (<= (mod (div (mod ~SIZE~0 4294967296) 2) 4294967296) 2147483647)) (= |#NULL.offset| 0)) (and (<= ~MAX~0 100000) (= |old(~SIZE~0)| 0) (= 0 |#NULL.base|) (= 0 (select |old(#valid)| |main_#t~malloc4.base|)) (<= 0 |#NULL.base|) (= ~MAX~0 100000) (< (mod ~SIZE~0 4294967296) 0) (< 1 (mod ~SIZE~0 4294967296)) (< (mod |v_main_#t~nondet3_6| 4294967296) 0) (= |#length| (store |old(#length)| |main_#t~malloc4.base| (* 4 ~SIZE~0))) (<= 0 |#NULL.offset|) (= 0 |main_#t~malloc4.offset|) (not (= (mod |v_main_#t~nondet3_6| 8) 0)) (not (= |main_#t~malloc4.base| 0)) (< (mod ~SIZE~0 4294967296) (mod ~MAX~0 4294967296)) (< |#StackHeapBarrier| |main_#t~malloc4.base|) (<= 100000 ~MAX~0) (not (= (mod ~SIZE~0 2) 0)) (not (<= (mod (+ (div (mod ~SIZE~0 4294967296) 2) 1) 4294967296) 2147483647)) (= (store |old(#memory_int)| main_~a~0.base (store (select |old(#memory_int)| main_~a~0.base) (+ main_~a~0.offset (* 4 (mod (+ (div (mod ~SIZE~0 4294967296) 2) 1) 4294967296)) (- 17179869184)) 3)) |#memory_int|) (<= |#NULL.base| 0) (= main_~a~0.offset |main_#t~malloc4.offset|) (= |main_#t~malloc4.base| main_~a~0.base) (= 0 (select |old(#valid)| 0)) (<= |#NULL.offset| 0) (= ~SIZE~0 (+ (div (mod |v_main_#t~nondet3_6| 4294967296) 8) 2)) (= |#valid| (store |old(#valid)| |main_#t~malloc4.base| 1)) (= |#NULL.offset| 0)) (and (<= ~MAX~0 100000) (= |old(~SIZE~0)| 0) (= 0 |#NULL.base|) (= 0 (select |old(#valid)| |main_#t~malloc4.base|)) (= (mod v_prenex_19 8) 0) (<= 0 |#NULL.base|) (= ~MAX~0 100000) (< 1 (mod ~SIZE~0 4294967296)) (= |#length| (store |old(#length)| |main_#t~malloc4.base| (* 4 ~SIZE~0))) (= 0 |main_#t~malloc4.offset|) (<= 0 |#NULL.offset|) (not (= |main_#t~malloc4.base| 0)) (< (mod ~SIZE~0 4294967296) (mod ~MAX~0 4294967296)) (< |#StackHeapBarrier| |main_#t~malloc4.base|) (<= 100000 ~MAX~0) (= (store |old(#memory_int)| main_~a~0.base (store (select |old(#memory_int)| main_~a~0.base) (+ (* 4 (mod (div (mod ~SIZE~0 4294967296) 2) 4294967296)) main_~a~0.offset) 3)) |#memory_int|) (<= (mod (div (mod ~SIZE~0 4294967296) 2) 4294967296) 2147483647) (= main_~a~0.offset |main_#t~malloc4.offset|) (<= |#NULL.base| 0) (= |main_#t~malloc4.base| main_~a~0.base) (= 0 (select |old(#valid)| 0)) (<= |#NULL.offset| 0) (= |#valid| (store |old(#valid)| |main_#t~malloc4.base| 1)) (= (mod ~SIZE~0 2) 0) (= ~SIZE~0 (+ (div (mod v_prenex_19 4294967296) 8) 1)) (= |#NULL.offset| 0)) (and (<= ~MAX~0 100000) (= |old(~SIZE~0)| 0) (= 0 |#NULL.base|) (= 0 (select |old(#valid)| |main_#t~malloc4.base|)) (= (mod v_prenex_19 8) 0) (<= 0 |#NULL.base|) (= ~MAX~0 100000) (< 1 (mod ~SIZE~0 4294967296)) (= |#length| (store |old(#length)| |main_#t~malloc4.base| (* 4 ~SIZE~0))) (= 0 |main_#t~malloc4.offset|) (<= 0 |#NULL.offset|) (not (= |main_#t~malloc4.base| 0)) (< (mod ~SIZE~0 4294967296) (mod ~MAX~0 4294967296)) (= (store |old(#memory_int)| main_~a~0.base (store (select |old(#memory_int)| main_~a~0.base) (+ (* 4 (mod (div (mod ~SIZE~0 4294967296) 2) 4294967296)) main_~a~0.offset (- 17179869184)) 3)) |#memory_int|) (< |#StackHeapBarrier| |main_#t~malloc4.base|) (<= 100000 ~MAX~0) (= main_~a~0.offset |main_#t~malloc4.offset|) (<= |#NULL.base| 0) (= |main_#t~malloc4.base| main_~a~0.base) (not (< (mod ~SIZE~0 4294967296) 0)) (= 0 (select |old(#valid)| 0)) (<= |#NULL.offset| 0) (= |#valid| (store |old(#valid)| |main_#t~malloc4.base| 1)) (= ~SIZE~0 (+ (div (mod v_prenex_19 4294967296) 8) 1)) (not (<= (mod (div (mod ~SIZE~0 4294967296) 2) 4294967296) 2147483647)) (= |#NULL.offset| 0)))) [2019-10-07 13:46:23,184 INFO L193 IcfgInterpreter]: Reachable states at location L15-6 satisfy 204#(and (<= 0 linear_search_~j~0) (<= 3 |linear_search_#in~q|) (<= 3 linear_search_~q) (= |linear_search_#in~q| 3) (<= linear_search_~q 3) (<= |linear_search_#in~q| 3)) [2019-10-07 13:46:23,184 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initEXIT satisfy 224#(and (<= ~MAX~0 100000) (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= ~SIZE~0 0) (<= 0 |#NULL.base|) (= ~MAX~0 100000) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (= |#valid| (store |old(#valid)| 0 0)) (<= 0 ~SIZE~0) (= |#NULL.offset| 0) (<= ~SIZE~0 0) (<= 100000 ~MAX~0)) [2019-10-07 13:46:23,185 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.startENTRY satisfy 6#true [2019-10-07 13:46:23,185 INFO L193 IcfgInterpreter]: Reachable states at location L6 satisfy 145#(and (<= 0 (+ |__VERIFIER_assert_#in~cond| 2147483648)) (<= __VERIFIER_assert_~cond 0) (<= 0 |__VERIFIER_assert_#in~cond|) (<= |__VERIFIER_assert_#in~cond| 0) (<= |__VERIFIER_assert_#in~cond| 2147483647) (<= |__VERIFIER_assert_#in~cond| 1) (<= 0 __VERIFIER_assert_~cond) (= 0 __VERIFIER_assert_~cond) (= |__VERIFIER_assert_#in~cond| __VERIFIER_assert_~cond)) [2019-10-07 13:46:23,185 INFO L193 IcfgInterpreter]: Reachable states at location __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION satisfy 150#(and (<= 0 (+ |__VERIFIER_assert_#in~cond| 2147483648)) (<= __VERIFIER_assert_~cond 0) (<= 0 |__VERIFIER_assert_#in~cond|) (<= |__VERIFIER_assert_#in~cond| 0) (<= |__VERIFIER_assert_#in~cond| 2147483647) (<= |__VERIFIER_assert_#in~cond| 1) (<= 0 __VERIFIER_assert_~cond) (= 0 __VERIFIER_assert_~cond) (= |__VERIFIER_assert_#in~cond| __VERIFIER_assert_~cond)) [2019-10-07 13:46:23,185 INFO L193 IcfgInterpreter]: Reachable states at location L5 satisfy 140#(and (<= 0 (+ |__VERIFIER_assert_#in~cond| 2147483648)) (<= 0 |__VERIFIER_assert_#in~cond|) (<= |__VERIFIER_assert_#in~cond| 2147483647) (<= __VERIFIER_assert_~cond 1) (<= |__VERIFIER_assert_#in~cond| 1) (<= 0 __VERIFIER_assert_~cond) (= |__VERIFIER_assert_#in~cond| __VERIFIER_assert_~cond)) [2019-10-07 13:46:23,186 INFO L193 IcfgInterpreter]: Reachable states at location __VERIFIER_assertENTRY satisfy 135#(and (<= 0 (+ |__VERIFIER_assert_#in~cond| 2147483648)) (<= 0 |__VERIFIER_assert_#in~cond|) (<= |__VERIFIER_assert_#in~cond| 2147483647) (<= |__VERIFIER_assert_#in~cond| 1)) [2019-10-07 13:46:41,983 INFO L211 tionRefinementEngine]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2019-10-07 13:46:41,983 INFO L224 tionRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 15, 14, 13] total 48 [2019-10-07 13:46:41,985 INFO L442 AbstractCegarLoop]: Interpolant automaton has 48 states [2019-10-07 13:46:41,985 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 48 interpolants. [2019-10-07 13:46:41,986 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=150, Invalid=2097, Unknown=9, NotChecked=0, Total=2256 [2019-10-07 13:46:41,986 INFO L87 Difference]: Start difference. First operand 24 states and 24 transitions. Second operand 48 states. [2019-10-07 13:46:52,079 WARN L191 SmtUtils]: Spent 154.00 ms on a formula simplification. DAG size of input: 129 DAG size of output: 65 [2019-10-07 13:46:52,827 WARN L191 SmtUtils]: Spent 340.00 ms on a formula simplification. DAG size of input: 144 DAG size of output: 77 [2019-10-07 13:46:53,160 WARN L191 SmtUtils]: Spent 169.00 ms on a formula simplification. DAG size of input: 139 DAG size of output: 74 [2019-10-07 13:46:53,962 WARN L191 SmtUtils]: Spent 449.00 ms on a formula simplification. DAG size of input: 150 DAG size of output: 86 [2019-10-07 13:46:54,280 WARN L191 SmtUtils]: Spent 160.00 ms on a formula simplification. DAG size of input: 88 DAG size of output: 81 [2019-10-07 13:46:56,161 WARN L191 SmtUtils]: Spent 837.00 ms on a formula simplification. DAG size of input: 175 DAG size of output: 97 [2019-10-07 13:46:58,105 WARN L191 SmtUtils]: Spent 1.69 s on a formula simplification. DAG size of input: 155 DAG size of output: 139 [2019-10-07 13:46:59,719 WARN L191 SmtUtils]: Spent 740.00 ms on a formula simplification. DAG size of input: 177 DAG size of output: 147 [2019-10-07 13:47:06,584 WARN L191 SmtUtils]: Spent 119.00 ms on a formula simplification. DAG size of input: 63 DAG size of output: 62 [2019-10-07 13:47:13,315 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-07 13:47:13,315 INFO L93 Difference]: Finished difference Result 34 states and 34 transitions. [2019-10-07 13:47:13,316 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2019-10-07 13:47:13,317 INFO L78 Accepts]: Start accepts. Automaton has 48 states. Word has length 23 [2019-10-07 13:47:13,317 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-07 13:47:13,318 INFO L225 Difference]: With dead ends: 34 [2019-10-07 13:47:13,318 INFO L226 Difference]: Without dead ends: 26 [2019-10-07 13:47:13,320 INFO L606 BasicCegarLoop]: 0 DeclaredPredicates, 102 GetRequests, 30 SyntacticMatches, 7 SemanticMatches, 65 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 986 ImplicationChecksByTransitivity, 68.2s TimeCoverageRelationStatistics Valid=360, Invalid=4053, Unknown=9, NotChecked=0, Total=4422 [2019-10-07 13:47:13,323 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26 states. [2019-10-07 13:47:13,334 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26 to 26. [2019-10-07 13:47:13,335 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 26 states. [2019-10-07 13:47:13,337 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26 states to 26 states and 26 transitions. [2019-10-07 13:47:13,338 INFO L78 Accepts]: Start accepts. Automaton has 26 states and 26 transitions. Word has length 23 [2019-10-07 13:47:13,338 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-07 13:47:13,338 INFO L462 AbstractCegarLoop]: Abstraction has 26 states and 26 transitions. [2019-10-07 13:47:13,338 INFO L463 AbstractCegarLoop]: Interpolant automaton has 48 states. [2019-10-07 13:47:13,338 INFO L276 IsEmpty]: Start isEmpty. Operand 26 states and 26 transitions. [2019-10-07 13:47:13,340 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2019-10-07 13:47:13,340 INFO L377 BasicCegarLoop]: Found error trace [2019-10-07 13:47:13,340 INFO L385 BasicCegarLoop]: trace histogram [5, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-07 13:47:13,543 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 4 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-07 13:47:13,544 INFO L410 AbstractCegarLoop]: === Iteration 6 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-07 13:47:13,545 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-07 13:47:13,545 INFO L82 PathProgramCache]: Analyzing trace with hash 2002198844, now seen corresponding path program 4 times [2019-10-07 13:47:13,546 INFO L150 tionRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-10-07 13:47:13,546 INFO L231 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2019-10-07 13:47:13,546 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-07 13:47:13,547 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-07 13:47:13,547 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-07 13:47:13,593 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-07 13:47:15,725 WARN L838 $PredicateComparison]: unable to prove that (let ((.cse32 (div c_~SIZE~0 4294967296))) (let ((.cse22 (div (+ c_~SIZE~0 (* (- 4294967296) .cse32)) 2))) (let ((.cse5 (div (+ .cse22 1) 4294967296)) (.cse3 (div .cse22 4294967296))) (let ((.cse23 (* 4294967296 .cse3)) (.cse24 (* 4294967296 .cse5)) (.cse0 (* 4294967296 .cse32))) (let ((.cse4 (= (* 2 (div c_~SIZE~0 2)) c_~SIZE~0)) (.cse6 (<= .cse0 c_~SIZE~0)) (.cse31 (+ .cse24 2147483646)) (.cse30 (+ .cse23 2147483647))) (let ((.cse16 (< .cse30 .cse22)) (.cse10 (<= .cse22 .cse31)) (.cse7 (< .cse31 .cse22)) (.cse18 (<= .cse22 .cse30)) (.cse1 (* 2 .cse22)) (.cse15 (or .cse4 .cse6)) (.cse20 (not .cse4)) (.cse21 (< c_~SIZE~0 .cse0))) (and (<= c_~SIZE~0 (+ .cse0 .cse1 1)) (or (and (let ((.cse2 (and .cse20 .cse21))) (or (and (or .cse2 (< 0 .cse3)) (or .cse4 (< 0 .cse5) .cse6)) (and (let ((.cse12 (select |c_#memory_int| c_main_~a~0.base)) (.cse19 (* (- 17179869184) .cse5)) (.cse14 (* 4 .cse22))) (let ((.cse11 (and .cse20 (= 3 (select .cse12 (+ .cse19 c_main_~a~0.offset .cse14 4))) .cse21)) (.cse8 (and (= (select .cse12 (+ .cse19 c_main_~a~0.offset .cse14 (- 17179869180))) 3) .cse20 .cse21)) (.cse13 (* (- 17179869184) .cse3))) (or (and (let ((.cse9 (and (= (select .cse12 (+ .cse13 c_main_~a~0.offset .cse14 (- 17179869184))) 3) .cse15))) (or (and .cse7 (or .cse8 .cse9)) (and .cse10 (or .cse11 .cse9)))) .cse16) (and (let ((.cse17 (and (= 3 (select .cse12 (+ .cse13 c_main_~a~0.offset .cse14))) .cse15))) (or (and (or .cse11 .cse17) .cse10) (and (or .cse8 .cse17) .cse7))) .cse18)))) (or (and (or (and (or .cse4 .cse6 .cse2) .cse10) (and .cse7 .cse15)) .cse18) (and .cse20 .cse10 .cse16 .cse21))))) (or (and (<= (+ .cse23 .cse22 .cse0) c_~SIZE~0) .cse15) (and (<= .cse3 0) .cse15) (and .cse20 (<= .cse5 0) .cse21) (and (<= (+ .cse24 .cse22 .cse0) c_~SIZE~0) .cse20 .cse21))) (and (<= (+ .cse23 .cse22 .cse0 2147483648) c_~SIZE~0) .cse15) (and (<= (+ .cse24 .cse22 .cse0 2147483648) c_~SIZE~0) .cse20 .cse21)) (= c_main_~a~0.offset 0) (<= (+ .cse0 2) c_~SIZE~0) (let ((.cse28 (+ .cse1 .cse0))) (let ((.cse25 (and .cse20 (<= (+ .cse1 .cse0 1) c_~SIZE~0) .cse21)) (.cse27 (and (<= .cse28 (+ c_~SIZE~0 4294967295)) .cse20 .cse21))) (or (and .cse16 (let ((.cse26 (and (<= .cse28 (+ c_~SIZE~0 4294967296)) .cse15))) (or (and (or .cse25 .cse26) .cse10) (and (or .cse27 .cse26) .cse7)))) (and (let ((.cse29 (and (<= .cse28 c_~SIZE~0) .cse15))) (or (and (or .cse25 .cse29) .cse10) (and (or .cse27 .cse29) .cse7))) .cse18)))) (or (and (<= .cse22 (+ .cse23 4294967295)) .cse15) (and (<= .cse22 (+ .cse24 4294967295)) .cse20 .cse21))))))))) is different from false [2019-10-07 13:47:16,126 WARN L191 SmtUtils]: Spent 131.00 ms on a formula simplification. DAG size of input: 80 DAG size of output: 41 [2019-10-07 13:47:16,322 WARN L191 SmtUtils]: Spent 166.00 ms on a formula simplification. DAG size of input: 80 DAG size of output: 58 [2019-10-07 13:47:16,615 WARN L191 SmtUtils]: Spent 253.00 ms on a formula simplification. DAG size of input: 83 DAG size of output: 76 [2019-10-07 13:47:16,826 WARN L191 SmtUtils]: Spent 167.00 ms on a formula simplification. DAG size of input: 75 DAG size of output: 65 [2019-10-07 13:47:17,210 WARN L191 SmtUtils]: Spent 188.00 ms on a formula simplification. DAG size of input: 134 DAG size of output: 59 [2019-10-07 13:47:17,289 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 0 proven. 20 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-10-07 13:47:17,289 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2019-10-07 13:47:17,289 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2019-10-07 13:47:17,289 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-07 13:47:17,447 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-07 13:47:17,449 INFO L256 TraceCheckSpWp]: Trace formula consists of 116 conjuncts, 57 conjunts are in the unsatisfiable core [2019-10-07 13:47:17,452 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2019-10-07 13:47:29,634 WARN L191 SmtUtils]: Spent 2.04 s on a formula simplification. DAG size of input: 30 DAG size of output: 13 [2019-10-07 13:47:29,645 WARN L225 Elim1Store]: Array PQE input equivalent to false [2019-10-07 13:47:29,653 WARN L225 Elim1Store]: Array PQE input equivalent to false [2019-10-07 13:47:31,306 WARN L191 SmtUtils]: Spent 1.38 s on a formula simplification that was a NOOP. DAG size: 40 [2019-10-07 13:47:34,845 WARN L191 SmtUtils]: Spent 3.43 s on a formula simplification. DAG size of input: 65 DAG size of output: 55 [2019-10-07 13:47:37,080 WARN L191 SmtUtils]: Spent 2.04 s on a formula simplification that was a NOOP. DAG size: 50 [2019-10-07 13:47:38,404 WARN L191 SmtUtils]: Spent 1.19 s on a formula simplification. DAG size of input: 73 DAG size of output: 63 [2019-10-07 13:47:40,874 WARN L191 SmtUtils]: Spent 2.08 s on a formula simplification. DAG size of input: 81 DAG size of output: 71 [2019-10-07 13:47:43,077 WARN L191 SmtUtils]: Spent 2.04 s on a formula simplification that was a NOOP. DAG size: 66 [2019-10-07 13:47:47,235 WARN L191 SmtUtils]: Spent 3.87 s on a formula simplification. DAG size of input: 81 DAG size of output: 71 [2019-10-07 13:47:47,666 WARN L191 SmtUtils]: Spent 309.00 ms on a formula simplification that was a NOOP. DAG size: 66 [2019-10-07 13:47:48,758 WARN L191 SmtUtils]: Spent 985.00 ms on a formula simplification. DAG size of input: 56 DAG size of output: 56 [2019-10-07 13:47:48,778 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 0 proven. 20 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-10-07 13:47:48,778 INFO L322 TraceCheckSpWp]: Computing backward predicates... [2019-10-07 13:47:49,629 WARN L191 SmtUtils]: Spent 697.00 ms on a formula simplification. DAG size of input: 163 DAG size of output: 104 [2019-10-07 13:47:49,966 WARN L191 SmtUtils]: Spent 240.00 ms on a formula simplification. DAG size of input: 87 DAG size of output: 86 [2019-10-07 13:47:54,368 WARN L191 SmtUtils]: Spent 924.00 ms on a formula simplification that was a NOOP. DAG size: 87 [2019-10-07 13:47:56,851 WARN L191 SmtUtils]: Spent 356.00 ms on a formula simplification that was a NOOP. DAG size: 90 [2019-10-07 13:48:08,297 WARN L191 SmtUtils]: Spent 6.21 s on a formula simplification that was a NOOP. DAG size: 102 [2019-10-07 13:48:19,555 WARN L191 SmtUtils]: Spent 4.05 s on a formula simplification that was a NOOP. DAG size: 105 [2019-10-07 13:48:41,411 WARN L191 SmtUtils]: Spent 16.46 s on a formula simplification that was a NOOP. DAG size: 117 [2019-10-07 13:48:41,429 WARN L225 Elim1Store]: Array PQE input equivalent to true [2019-10-07 13:48:41,483 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 0 proven. 20 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-10-07 13:48:41,483 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSifa [2019-10-07 13:48:41,485 INFO L162 IcfgInterpreter]: Started Sifa with 18 locations of interest [2019-10-07 13:48:41,486 INFO L169 IcfgInterpreter]: Building call graph [2019-10-07 13:48:41,486 INFO L174 IcfgInterpreter]: Initial procedures are [ULTIMATE.start] [2019-10-07 13:48:41,487 INFO L179 IcfgInterpreter]: Starting interpretation [2019-10-07 13:48:41,487 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.start with input of size 1 for LOIs [2019-10-07 13:48:41,523 INFO L199 IcfgInterpreter]: Interpreting procedure main with input of size 32 for LOIs [2019-10-07 13:48:41,604 INFO L199 IcfgInterpreter]: Interpreting procedure __VERIFIER_assert with input of size 11 for LOIs [2019-10-07 13:48:41,613 INFO L199 IcfgInterpreter]: Interpreting procedure linear_search with input of size 18 for LOIs [2019-10-07 13:48:41,664 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.init with input of size 16 for LOIs [2019-10-07 13:48:41,669 INFO L183 IcfgInterpreter]: Interpretation finished [2019-10-07 13:48:41,669 INFO L191 IcfgInterpreter]: Final predicates for locations of interest are: [2019-10-07 13:48:41,669 INFO L193 IcfgInterpreter]: Reachable states at location linear_searchENTRY satisfy 157#(and (or (and (= (+ (mod ~SIZE~0 4294967296) (- 4294967296)) |linear_search_#in~n|) (= 3 |linear_search_#in~q|) (not (<= (mod ~SIZE~0 4294967296) 2147483647))) (and (= (mod ~SIZE~0 4294967296) |linear_search_#in~n|) (= 3 |linear_search_#in~q|) (<= (mod ~SIZE~0 4294967296) 2147483647))) (<= 3 |linear_search_#in~q|) (<= |linear_search_#in~q| 3)) [2019-10-07 13:48:41,669 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initENTRY satisfy 225#(and (= |old(#NULL.base)| |#NULL.base|) (= |#valid| |old(#valid)|) (= ~MAX~0 |old(~MAX~0)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(~SIZE~0)| ~SIZE~0)) [2019-10-07 13:48:41,670 INFO L193 IcfgInterpreter]: Reachable states at location L24 satisfy 38#(exists ((|v_main_#t~nondet3_8| Int) (v_prenex_31 Int)) (or (and (<= ~MAX~0 100000) (= |old(~SIZE~0)| 0) (not (< (mod |v_main_#t~nondet3_8| 4294967296) 0)) (= 0 |#NULL.base|) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (= ~MAX~0 100000) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (<= 0 |old(~SIZE~0)|) (= 0 (select |old(#valid)| 0)) (= |#valid| |old(#valid)|) (= ~SIZE~0 (+ (div (mod |v_main_#t~nondet3_8| 4294967296) 8) 1)) (<= |old(~SIZE~0)| 0) (= |#memory_int| |old(#memory_int)|) (= |#NULL.offset| 0) (= |old(#length)| |#length|) (<= 100000 ~MAX~0)) (and (<= ~MAX~0 100000) (= |old(~SIZE~0)| 0) (= 0 |#NULL.base|) (<= |#NULL.base| 0) (not (= (mod v_prenex_31 8) 0)) (<= 0 |#NULL.base|) (= ~MAX~0 100000) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (<= 0 |old(~SIZE~0)|) (= 0 (select |old(#valid)| 0)) (= |#valid| |old(#valid)|) (= (+ (div (mod v_prenex_31 4294967296) 8) 2) ~SIZE~0) (< (mod v_prenex_31 4294967296) 0) (<= |old(~SIZE~0)| 0) (= |#memory_int| |old(#memory_int)|) (= |#NULL.offset| 0) (= |old(#length)| |#length|) (<= 100000 ~MAX~0)) (and (<= ~MAX~0 100000) (= |old(~SIZE~0)| 0) (= 0 |#NULL.base|) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (= ~MAX~0 100000) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (<= 0 |old(~SIZE~0)|) (= 0 (select |old(#valid)| 0)) (= (mod |v_main_#t~nondet3_8| 8) 0) (= |#valid| |old(#valid)|) (= ~SIZE~0 (+ (div (mod |v_main_#t~nondet3_8| 4294967296) 8) 1)) (<= |old(~SIZE~0)| 0) (= |#memory_int| |old(#memory_int)|) (= |#NULL.offset| 0) (= |old(#length)| |#length|) (<= 100000 ~MAX~0)))) [2019-10-07 13:48:41,670 INFO L193 IcfgInterpreter]: Reachable states at location L27-2 satisfy 130#(and (<= |main_#t~ret5| 2147483647) (<= |main_#t~ret5| 1) (<= 0 |main_#t~ret5|) (<= 0 (+ |main_#t~ret5| 2147483648))) [2019-10-07 13:48:41,670 INFO L193 IcfgInterpreter]: Reachable states at location L15-3 satisfy 202#(and (<= 0 linear_search_~j~0) (<= 3 |linear_search_#in~q|) (<= 3 linear_search_~q) (= |linear_search_#in~q| 3) (<= linear_search_~q 3) (<= |linear_search_#in~q| 3)) [2019-10-07 13:48:41,670 INFO L193 IcfgInterpreter]: Reachable states at location L15-5 satisfy 192#(and (<= 0 linear_search_~j~0) (<= 3 |linear_search_#in~q|) (<= 3 linear_search_~q) (= |linear_search_#in~q| 3) (<= linear_search_~q 3) (<= |linear_search_#in~q| 3)) [2019-10-07 13:48:41,670 INFO L193 IcfgInterpreter]: Reachable states at location L27-1 satisfy 111#(and (<= |main_#t~ret5| 1) (<= 0 |main_#t~ret5|)) [2019-10-07 13:48:41,670 INFO L193 IcfgInterpreter]: Reachable states at location linear_searchEXIT satisfy 221#(and (<= 0 linear_search_~j~0) (<= 3 |linear_search_#in~q|) (<= |linear_search_#res| 1) (<= 3 linear_search_~q) (= |linear_search_#in~q| 3) (<= linear_search_~q 3) (<= |linear_search_#in~q| 3) (<= 0 |linear_search_#res|)) [2019-10-07 13:48:41,671 INFO L193 IcfgInterpreter]: Reachable states at location L-1 satisfy 23#(and (<= ~MAX~0 100000) (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= ~SIZE~0 0) (<= 0 |#NULL.base|) (= ~MAX~0 100000) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (= 0 (select |#valid| 0)) (<= 0 ~SIZE~0) (= |#NULL.offset| 0) (<= ~SIZE~0 0) (<= 100000 ~MAX~0)) [2019-10-07 13:48:41,671 INFO L193 IcfgInterpreter]: Reachable states at location mainENTRY satisfy 33#(and (<= ~MAX~0 100000) (= |old(~SIZE~0)| 0) (= 0 |#NULL.base|) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (= ~MAX~0 100000) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (<= 0 |old(~SIZE~0)|) (= 0 (select |old(#valid)| 0)) (= |#valid| |old(#valid)|) (<= |old(~SIZE~0)| 0) (<= 0 ~SIZE~0) (= |#memory_int| |old(#memory_int)|) (= |#NULL.offset| 0) (= |old(#length)| |#length|) (<= ~SIZE~0 0) (= |old(~SIZE~0)| ~SIZE~0) (<= 100000 ~MAX~0)) [2019-10-07 13:48:41,672 INFO L193 IcfgInterpreter]: Reachable states at location L27 satisfy 43#(exists ((|v_main_#t~nondet3_8| Int) (v_prenex_32 Int) (v_prenex_31 Int)) (or (and (<= ~MAX~0 100000) (= |old(~SIZE~0)| 0) (= 0 |#NULL.base|) (not (= (mod v_prenex_31 8) 0)) (= 0 (select |old(#valid)| |main_#t~malloc4.base|)) (<= 0 |#NULL.base|) (= ~MAX~0 100000) (< 1 (mod ~SIZE~0 4294967296)) (= |#length| (store |old(#length)| |main_#t~malloc4.base| (* 4 ~SIZE~0))) (= 0 |main_#t~malloc4.offset|) (<= 0 |#NULL.offset|) (= (+ (div (mod v_prenex_31 4294967296) 8) 2) ~SIZE~0) (< (mod v_prenex_31 4294967296) 0) (not (= |main_#t~malloc4.base| 0)) (< (mod ~SIZE~0 4294967296) (mod ~MAX~0 4294967296)) (= (store |old(#memory_int)| main_~a~0.base (store (select |old(#memory_int)| main_~a~0.base) (+ (* 4 (mod (div (mod ~SIZE~0 4294967296) 2) 4294967296)) main_~a~0.offset (- 17179869184)) 3)) |#memory_int|) (< |#StackHeapBarrier| |main_#t~malloc4.base|) (<= 100000 ~MAX~0) (= main_~a~0.offset |main_#t~malloc4.offset|) (<= |#NULL.base| 0) (= |main_#t~malloc4.base| main_~a~0.base) (not (< (mod ~SIZE~0 4294967296) 0)) (<= |#NULL.offset| 0) (<= 0 |old(~SIZE~0)|) (= 0 (select |old(#valid)| 0)) (= |#valid| (store |old(#valid)| |main_#t~malloc4.base| 1)) (<= |old(~SIZE~0)| 0) (not (<= (mod (div (mod ~SIZE~0 4294967296) 2) 4294967296) 2147483647)) (= |#NULL.offset| 0)) (and (<= ~MAX~0 100000) (= |old(~SIZE~0)| 0) (not (< (mod |v_main_#t~nondet3_8| 4294967296) 0)) (= 0 |#NULL.base|) (= 0 (select |old(#valid)| |main_#t~malloc4.base|)) (<= 0 |#NULL.base|) (= ~MAX~0 100000) (< 1 (mod ~SIZE~0 4294967296)) (= |#length| (store |old(#length)| |main_#t~malloc4.base| (* 4 ~SIZE~0))) (<= 0 |#NULL.offset|) (= 0 |main_#t~malloc4.offset|) (= ~SIZE~0 (+ (div (mod |v_main_#t~nondet3_8| 4294967296) 8) 1)) (not (= |main_#t~malloc4.base| 0)) (< (mod ~SIZE~0 4294967296) (mod ~MAX~0 4294967296)) (= (store |old(#memory_int)| main_~a~0.base (store (select |old(#memory_int)| main_~a~0.base) (+ (* 4 (mod (div (mod ~SIZE~0 4294967296) 2) 4294967296)) main_~a~0.offset (- 17179869184)) 3)) |#memory_int|) (< |#StackHeapBarrier| |main_#t~malloc4.base|) (<= 100000 ~MAX~0) (= main_~a~0.offset |main_#t~malloc4.offset|) (<= |#NULL.base| 0) (= |main_#t~malloc4.base| main_~a~0.base) (<= |#NULL.offset| 0) (<= 0 |old(~SIZE~0)|) (= 0 (select |old(#valid)| 0)) (= |#valid| (store |old(#valid)| |main_#t~malloc4.base| 1)) (= (mod ~SIZE~0 2) 0) (<= |old(~SIZE~0)| 0) (not (<= (mod (div (mod ~SIZE~0 4294967296) 2) 4294967296) 2147483647)) (= |#NULL.offset| 0)) (and (<= ~MAX~0 100000) (= |old(~SIZE~0)| 0) (= 0 |#NULL.base|) (not (= (mod v_prenex_31 8) 0)) (= 0 (select |old(#valid)| |main_#t~malloc4.base|)) (<= 0 |#NULL.base|) (< (mod ~SIZE~0 4294967296) 0) (= ~MAX~0 100000) (< 1 (mod ~SIZE~0 4294967296)) (= |#length| (store |old(#length)| |main_#t~malloc4.base| (* 4 ~SIZE~0))) (= 0 |main_#t~malloc4.offset|) (<= 0 |#NULL.offset|) (= (+ (div (mod v_prenex_31 4294967296) 8) 2) ~SIZE~0) (< (mod v_prenex_31 4294967296) 0) (not (= |main_#t~malloc4.base| 0)) (< (mod ~SIZE~0 4294967296) (mod ~MAX~0 4294967296)) (< |#StackHeapBarrier| |main_#t~malloc4.base|) (<= 100000 ~MAX~0) (not (= (mod ~SIZE~0 2) 0)) (not (<= (mod (+ (div (mod ~SIZE~0 4294967296) 2) 1) 4294967296) 2147483647)) (= (store |old(#memory_int)| main_~a~0.base (store (select |old(#memory_int)| main_~a~0.base) (+ main_~a~0.offset (* 4 (mod (+ (div (mod ~SIZE~0 4294967296) 2) 1) 4294967296)) (- 17179869184)) 3)) |#memory_int|) (= main_~a~0.offset |main_#t~malloc4.offset|) (<= |#NULL.base| 0) (= |main_#t~malloc4.base| main_~a~0.base) (<= |#NULL.offset| 0) (<= 0 |old(~SIZE~0)|) (= 0 (select |old(#valid)| 0)) (= |#valid| (store |old(#valid)| |main_#t~malloc4.base| 1)) (<= |old(~SIZE~0)| 0) (= |#NULL.offset| 0)) (and (<= ~MAX~0 100000) (= |old(~SIZE~0)| 0) (not (< (mod |v_main_#t~nondet3_8| 4294967296) 0)) (= 0 |#NULL.base|) (= 0 (select |old(#valid)| |main_#t~malloc4.base|)) (<= 0 |#NULL.base|) (< (mod ~SIZE~0 4294967296) 0) (= ~MAX~0 100000) (< 1 (mod ~SIZE~0 4294967296)) (= (store |old(#memory_int)| main_~a~0.base (store (select |old(#memory_int)| main_~a~0.base) (+ main_~a~0.offset (* 4 (mod (+ (div (mod ~SIZE~0 4294967296) 2) 1) 4294967296))) 3)) |#memory_int|) (= |#length| (store |old(#length)| |main_#t~malloc4.base| (* 4 ~SIZE~0))) (<= 0 |#NULL.offset|) (= 0 |main_#t~malloc4.offset|) (<= (mod (+ (div (mod ~SIZE~0 4294967296) 2) 1) 4294967296) 2147483647) (= ~SIZE~0 (+ (div (mod |v_main_#t~nondet3_8| 4294967296) 8) 1)) (not (= |main_#t~malloc4.base| 0)) (< (mod ~SIZE~0 4294967296) (mod ~MAX~0 4294967296)) (< |#StackHeapBarrier| |main_#t~malloc4.base|) (<= 100000 ~MAX~0) (not (= (mod ~SIZE~0 2) 0)) (= main_~a~0.offset |main_#t~malloc4.offset|) (<= |#NULL.base| 0) (= |main_#t~malloc4.base| main_~a~0.base) (<= |#NULL.offset| 0) (<= 0 |old(~SIZE~0)|) (= 0 (select |old(#valid)| 0)) (= |#valid| (store |old(#valid)| |main_#t~malloc4.base| 1)) (<= |old(~SIZE~0)| 0) (= |#NULL.offset| 0)) (and (<= ~MAX~0 100000) (= |old(~SIZE~0)| 0) (= 0 |#NULL.base|) (not (= (mod v_prenex_31 8) 0)) (= 0 (select |old(#valid)| |main_#t~malloc4.base|)) (<= 0 |#NULL.base|) (= ~MAX~0 100000) (< 1 (mod ~SIZE~0 4294967296)) (= |#length| (store |old(#length)| |main_#t~malloc4.base| (* 4 ~SIZE~0))) (= 0 |main_#t~malloc4.offset|) (<= 0 |#NULL.offset|) (= (+ (div (mod v_prenex_31 4294967296) 8) 2) ~SIZE~0) (< (mod v_prenex_31 4294967296) 0) (not (= |main_#t~malloc4.base| 0)) (< (mod ~SIZE~0 4294967296) (mod ~MAX~0 4294967296)) (< |#StackHeapBarrier| |main_#t~malloc4.base|) (<= 100000 ~MAX~0) (= (store |old(#memory_int)| main_~a~0.base (store (select |old(#memory_int)| main_~a~0.base) (+ (* 4 (mod (div (mod ~SIZE~0 4294967296) 2) 4294967296)) main_~a~0.offset) 3)) |#memory_int|) (<= (mod (div (mod ~SIZE~0 4294967296) 2) 4294967296) 2147483647) (= main_~a~0.offset |main_#t~malloc4.offset|) (<= |#NULL.base| 0) (= |main_#t~malloc4.base| main_~a~0.base) (not (< (mod ~SIZE~0 4294967296) 0)) (<= |#NULL.offset| 0) (<= 0 |old(~SIZE~0)|) (= 0 (select |old(#valid)| 0)) (= |#valid| (store |old(#valid)| |main_#t~malloc4.base| 1)) (<= |old(~SIZE~0)| 0) (= |#NULL.offset| 0)) (and (<= ~MAX~0 100000) (= |old(~SIZE~0)| 0) (not (< (mod |v_main_#t~nondet3_8| 4294967296) 0)) (= 0 |#NULL.base|) (= 0 (select |old(#valid)| |main_#t~malloc4.base|)) (<= 0 |#NULL.base|) (= ~MAX~0 100000) (< (mod ~SIZE~0 4294967296) 0) (< 1 (mod ~SIZE~0 4294967296)) (= |#length| (store |old(#length)| |main_#t~malloc4.base| (* 4 ~SIZE~0))) (<= 0 |#NULL.offset|) (= 0 |main_#t~malloc4.offset|) (= ~SIZE~0 (+ (div (mod |v_main_#t~nondet3_8| 4294967296) 8) 1)) (not (= |main_#t~malloc4.base| 0)) (< (mod ~SIZE~0 4294967296) (mod ~MAX~0 4294967296)) (< |#StackHeapBarrier| |main_#t~malloc4.base|) (<= 100000 ~MAX~0) (not (= (mod ~SIZE~0 2) 0)) (not (<= (mod (+ (div (mod ~SIZE~0 4294967296) 2) 1) 4294967296) 2147483647)) (= (store |old(#memory_int)| main_~a~0.base (store (select |old(#memory_int)| main_~a~0.base) (+ main_~a~0.offset (* 4 (mod (+ (div (mod ~SIZE~0 4294967296) 2) 1) 4294967296)) (- 17179869184)) 3)) |#memory_int|) (= main_~a~0.offset |main_#t~malloc4.offset|) (<= |#NULL.base| 0) (= |main_#t~malloc4.base| main_~a~0.base) (<= |#NULL.offset| 0) (<= 0 |old(~SIZE~0)|) (= 0 (select |old(#valid)| 0)) (= |#valid| (store |old(#valid)| |main_#t~malloc4.base| 1)) (<= |old(~SIZE~0)| 0) (= |#NULL.offset| 0)) (and (<= ~MAX~0 100000) (= |old(~SIZE~0)| 0) (= 0 |#NULL.base|) (= 0 (select |old(#valid)| |main_#t~malloc4.base|)) (<= 0 |#NULL.base|) (= ~MAX~0 100000) (< (mod ~SIZE~0 4294967296) 0) (< 1 (mod ~SIZE~0 4294967296)) (= (store |old(#memory_int)| main_~a~0.base (store (select |old(#memory_int)| main_~a~0.base) (+ main_~a~0.offset (* 4 (mod (+ (div (mod ~SIZE~0 4294967296) 2) 1) 4294967296))) 3)) |#memory_int|) (= |#length| (store |old(#length)| |main_#t~malloc4.base| (* 4 ~SIZE~0))) (<= 0 |#NULL.offset|) (= 0 |main_#t~malloc4.offset|) (= ~SIZE~0 (+ (div (mod v_prenex_32 4294967296) 8) 1)) (<= (mod (+ (div (mod ~SIZE~0 4294967296) 2) 1) 4294967296) 2147483647) (= (mod v_prenex_32 8) 0) (not (= |main_#t~malloc4.base| 0)) (< (mod ~SIZE~0 4294967296) (mod ~MAX~0 4294967296)) (< |#StackHeapBarrier| |main_#t~malloc4.base|) (<= 100000 ~MAX~0) (not (= (mod ~SIZE~0 2) 0)) (<= |#NULL.base| 0) (= main_~a~0.offset |main_#t~malloc4.offset|) (= |main_#t~malloc4.base| main_~a~0.base) (<= |#NULL.offset| 0) (<= 0 |old(~SIZE~0)|) (= 0 (select |old(#valid)| 0)) (= |#valid| (store |old(#valid)| |main_#t~malloc4.base| 1)) (<= |old(~SIZE~0)| 0) (= |#NULL.offset| 0)) (and (<= ~MAX~0 100000) (= |old(~SIZE~0)| 0) (= 0 |#NULL.base|) (not (= (mod v_prenex_31 8) 0)) (= 0 (select |old(#valid)| |main_#t~malloc4.base|)) (<= 0 |#NULL.base|) (< (mod ~SIZE~0 4294967296) 0) (= ~MAX~0 100000) (< 1 (mod ~SIZE~0 4294967296)) (= (store |old(#memory_int)| main_~a~0.base (store (select |old(#memory_int)| main_~a~0.base) (+ main_~a~0.offset (* 4 (mod (+ (div (mod ~SIZE~0 4294967296) 2) 1) 4294967296))) 3)) |#memory_int|) (= |#length| (store |old(#length)| |main_#t~malloc4.base| (* 4 ~SIZE~0))) (= 0 |main_#t~malloc4.offset|) (<= 0 |#NULL.offset|) (= (+ (div (mod v_prenex_31 4294967296) 8) 2) ~SIZE~0) (<= (mod (+ (div (mod ~SIZE~0 4294967296) 2) 1) 4294967296) 2147483647) (< (mod v_prenex_31 4294967296) 0) (not (= |main_#t~malloc4.base| 0)) (< (mod ~SIZE~0 4294967296) (mod ~MAX~0 4294967296)) (< |#StackHeapBarrier| |main_#t~malloc4.base|) (<= 100000 ~MAX~0) (not (= (mod ~SIZE~0 2) 0)) (= main_~a~0.offset |main_#t~malloc4.offset|) (<= |#NULL.base| 0) (= |main_#t~malloc4.base| main_~a~0.base) (<= |#NULL.offset| 0) (<= 0 |old(~SIZE~0)|) (= 0 (select |old(#valid)| 0)) (= |#valid| (store |old(#valid)| |main_#t~malloc4.base| 1)) (<= |old(~SIZE~0)| 0) (= |#NULL.offset| 0)) (and (<= ~MAX~0 100000) (= |old(~SIZE~0)| 0) (= 0 |#NULL.base|) (= 0 (select |old(#valid)| |main_#t~malloc4.base|)) (<= 0 |#NULL.base|) (= ~MAX~0 100000) (< 1 (mod ~SIZE~0 4294967296)) (= |#length| (store |old(#length)| |main_#t~malloc4.base| (* 4 ~SIZE~0))) (<= 0 |#NULL.offset|) (= 0 |main_#t~malloc4.offset|) (= ~SIZE~0 (+ (div (mod v_prenex_32 4294967296) 8) 1)) (= (mod v_prenex_32 8) 0) (not (= |main_#t~malloc4.base| 0)) (< (mod ~SIZE~0 4294967296) (mod ~MAX~0 4294967296)) (= (store |old(#memory_int)| main_~a~0.base (store (select |old(#memory_int)| main_~a~0.base) (+ (* 4 (mod (div (mod ~SIZE~0 4294967296) 2) 4294967296)) main_~a~0.offset (- 17179869184)) 3)) |#memory_int|) (< |#StackHeapBarrier| |main_#t~malloc4.base|) (<= 100000 ~MAX~0) (<= |#NULL.base| 0) (= main_~a~0.offset |main_#t~malloc4.offset|) (= |main_#t~malloc4.base| main_~a~0.base) (<= |#NULL.offset| 0) (<= 0 |old(~SIZE~0)|) (= 0 (select |old(#valid)| 0)) (= |#valid| (store |old(#valid)| |main_#t~malloc4.base| 1)) (= (mod ~SIZE~0 2) 0) (<= |old(~SIZE~0)| 0) (not (<= (mod (div (mod ~SIZE~0 4294967296) 2) 4294967296) 2147483647)) (= |#NULL.offset| 0)) (and (<= ~MAX~0 100000) (= |old(~SIZE~0)| 0) (not (< (mod |v_main_#t~nondet3_8| 4294967296) 0)) (= 0 |#NULL.base|) (= 0 (select |old(#valid)| |main_#t~malloc4.base|)) (<= 0 |#NULL.base|) (= ~MAX~0 100000) (< 1 (mod ~SIZE~0 4294967296)) (= |#length| (store |old(#length)| |main_#t~malloc4.base| (* 4 ~SIZE~0))) (<= 0 |#NULL.offset|) (= 0 |main_#t~malloc4.offset|) (= ~SIZE~0 (+ (div (mod |v_main_#t~nondet3_8| 4294967296) 8) 1)) (not (= |main_#t~malloc4.base| 0)) (< (mod ~SIZE~0 4294967296) (mod ~MAX~0 4294967296)) (= (store |old(#memory_int)| main_~a~0.base (store (select |old(#memory_int)| main_~a~0.base) (+ (* 4 (mod (div (mod ~SIZE~0 4294967296) 2) 4294967296)) main_~a~0.offset (- 17179869184)) 3)) |#memory_int|) (< |#StackHeapBarrier| |main_#t~malloc4.base|) (<= 100000 ~MAX~0) (= main_~a~0.offset |main_#t~malloc4.offset|) (<= |#NULL.base| 0) (= |main_#t~malloc4.base| main_~a~0.base) (not (< (mod ~SIZE~0 4294967296) 0)) (<= |#NULL.offset| 0) (<= 0 |old(~SIZE~0)|) (= 0 (select |old(#valid)| 0)) (= |#valid| (store |old(#valid)| |main_#t~malloc4.base| 1)) (<= |old(~SIZE~0)| 0) (not (<= (mod (div (mod ~SIZE~0 4294967296) 2) 4294967296) 2147483647)) (= |#NULL.offset| 0)) (and (<= ~MAX~0 100000) (= |old(~SIZE~0)| 0) (= 0 |#NULL.base|) (= 0 (select |old(#valid)| |main_#t~malloc4.base|)) (<= 0 |#NULL.base|) (= ~MAX~0 100000) (< 1 (mod ~SIZE~0 4294967296)) (= |#length| (store |old(#length)| |main_#t~malloc4.base| (* 4 ~SIZE~0))) (<= 0 |#NULL.offset|) (= 0 |main_#t~malloc4.offset|) (= ~SIZE~0 (+ (div (mod v_prenex_32 4294967296) 8) 1)) (= (mod v_prenex_32 8) 0) (not (= |main_#t~malloc4.base| 0)) (< (mod ~SIZE~0 4294967296) (mod ~MAX~0 4294967296)) (< |#StackHeapBarrier| |main_#t~malloc4.base|) (<= 100000 ~MAX~0) (= (store |old(#memory_int)| main_~a~0.base (store (select |old(#memory_int)| main_~a~0.base) (+ (* 4 (mod (div (mod ~SIZE~0 4294967296) 2) 4294967296)) main_~a~0.offset) 3)) |#memory_int|) (<= (mod (div (mod ~SIZE~0 4294967296) 2) 4294967296) 2147483647) (<= |#NULL.base| 0) (= main_~a~0.offset |main_#t~malloc4.offset|) (= |main_#t~malloc4.base| main_~a~0.base) (<= |#NULL.offset| 0) (<= 0 |old(~SIZE~0)|) (= 0 (select |old(#valid)| 0)) (= |#valid| (store |old(#valid)| |main_#t~malloc4.base| 1)) (= (mod ~SIZE~0 2) 0) (<= |old(~SIZE~0)| 0) (= |#NULL.offset| 0)) (and (<= ~MAX~0 100000) (= |old(~SIZE~0)| 0) (= 0 |#NULL.base|) (= 0 (select |old(#valid)| |main_#t~malloc4.base|)) (<= 0 |#NULL.base|) (= ~MAX~0 100000) (< (mod ~SIZE~0 4294967296) 0) (< 1 (mod ~SIZE~0 4294967296)) (= |#length| (store |old(#length)| |main_#t~malloc4.base| (* 4 ~SIZE~0))) (<= 0 |#NULL.offset|) (= 0 |main_#t~malloc4.offset|) (= ~SIZE~0 (+ (div (mod v_prenex_32 4294967296) 8) 1)) (= (mod v_prenex_32 8) 0) (not (= |main_#t~malloc4.base| 0)) (< (mod ~SIZE~0 4294967296) (mod ~MAX~0 4294967296)) (< |#StackHeapBarrier| |main_#t~malloc4.base|) (<= 100000 ~MAX~0) (not (= (mod ~SIZE~0 2) 0)) (not (<= (mod (+ (div (mod ~SIZE~0 4294967296) 2) 1) 4294967296) 2147483647)) (= (store |old(#memory_int)| main_~a~0.base (store (select |old(#memory_int)| main_~a~0.base) (+ main_~a~0.offset (* 4 (mod (+ (div (mod ~SIZE~0 4294967296) 2) 1) 4294967296)) (- 17179869184)) 3)) |#memory_int|) (<= |#NULL.base| 0) (= main_~a~0.offset |main_#t~malloc4.offset|) (= |main_#t~malloc4.base| main_~a~0.base) (<= |#NULL.offset| 0) (<= 0 |old(~SIZE~0)|) (= 0 (select |old(#valid)| 0)) (= |#valid| (store |old(#valid)| |main_#t~malloc4.base| 1)) (<= |old(~SIZE~0)| 0) (= |#NULL.offset| 0)) (and (<= ~MAX~0 100000) (= |old(~SIZE~0)| 0) (= 0 |#NULL.base|) (= 0 (select |old(#valid)| |main_#t~malloc4.base|)) (<= 0 |#NULL.base|) (= ~MAX~0 100000) (< 1 (mod ~SIZE~0 4294967296)) (= |#length| (store |old(#length)| |main_#t~malloc4.base| (* 4 ~SIZE~0))) (<= 0 |#NULL.offset|) (= 0 |main_#t~malloc4.offset|) (= ~SIZE~0 (+ (div (mod v_prenex_32 4294967296) 8) 1)) (= (mod v_prenex_32 8) 0) (not (= |main_#t~malloc4.base| 0)) (< (mod ~SIZE~0 4294967296) (mod ~MAX~0 4294967296)) (= (store |old(#memory_int)| main_~a~0.base (store (select |old(#memory_int)| main_~a~0.base) (+ (* 4 (mod (div (mod ~SIZE~0 4294967296) 2) 4294967296)) main_~a~0.offset (- 17179869184)) 3)) |#memory_int|) (< |#StackHeapBarrier| |main_#t~malloc4.base|) (<= 100000 ~MAX~0) (<= |#NULL.base| 0) (= main_~a~0.offset |main_#t~malloc4.offset|) (= |main_#t~malloc4.base| main_~a~0.base) (not (< (mod ~SIZE~0 4294967296) 0)) (<= |#NULL.offset| 0) (<= 0 |old(~SIZE~0)|) (= 0 (select |old(#valid)| 0)) (= |#valid| (store |old(#valid)| |main_#t~malloc4.base| 1)) (<= |old(~SIZE~0)| 0) (not (<= (mod (div (mod ~SIZE~0 4294967296) 2) 4294967296) 2147483647)) (= |#NULL.offset| 0)) (and (<= ~MAX~0 100000) (= |old(~SIZE~0)| 0) (= 0 |#NULL.base|) (not (= (mod v_prenex_31 8) 0)) (= 0 (select |old(#valid)| |main_#t~malloc4.base|)) (<= 0 |#NULL.base|) (= ~MAX~0 100000) (< 1 (mod ~SIZE~0 4294967296)) (= |#length| (store |old(#length)| |main_#t~malloc4.base| (* 4 ~SIZE~0))) (= 0 |main_#t~malloc4.offset|) (<= 0 |#NULL.offset|) (= (+ (div (mod v_prenex_31 4294967296) 8) 2) ~SIZE~0) (< (mod v_prenex_31 4294967296) 0) (not (= |main_#t~malloc4.base| 0)) (< (mod ~SIZE~0 4294967296) (mod ~MAX~0 4294967296)) (= (store |old(#memory_int)| main_~a~0.base (store (select |old(#memory_int)| main_~a~0.base) (+ (* 4 (mod (div (mod ~SIZE~0 4294967296) 2) 4294967296)) main_~a~0.offset (- 17179869184)) 3)) |#memory_int|) (< |#StackHeapBarrier| |main_#t~malloc4.base|) (<= 100000 ~MAX~0) (= main_~a~0.offset |main_#t~malloc4.offset|) (<= |#NULL.base| 0) (= |main_#t~malloc4.base| main_~a~0.base) (<= |#NULL.offset| 0) (<= 0 |old(~SIZE~0)|) (= 0 (select |old(#valid)| 0)) (= |#valid| (store |old(#valid)| |main_#t~malloc4.base| 1)) (= (mod ~SIZE~0 2) 0) (<= |old(~SIZE~0)| 0) (not (<= (mod (div (mod ~SIZE~0 4294967296) 2) 4294967296) 2147483647)) (= |#NULL.offset| 0)) (and (<= ~MAX~0 100000) (= |old(~SIZE~0)| 0) (not (< (mod |v_main_#t~nondet3_8| 4294967296) 0)) (= 0 |#NULL.base|) (= 0 (select |old(#valid)| |main_#t~malloc4.base|)) (<= 0 |#NULL.base|) (= ~MAX~0 100000) (< 1 (mod ~SIZE~0 4294967296)) (= |#length| (store |old(#length)| |main_#t~malloc4.base| (* 4 ~SIZE~0))) (<= 0 |#NULL.offset|) (= 0 |main_#t~malloc4.offset|) (= ~SIZE~0 (+ (div (mod |v_main_#t~nondet3_8| 4294967296) 8) 1)) (not (= |main_#t~malloc4.base| 0)) (< (mod ~SIZE~0 4294967296) (mod ~MAX~0 4294967296)) (< |#StackHeapBarrier| |main_#t~malloc4.base|) (<= 100000 ~MAX~0) (= (store |old(#memory_int)| main_~a~0.base (store (select |old(#memory_int)| main_~a~0.base) (+ (* 4 (mod (div (mod ~SIZE~0 4294967296) 2) 4294967296)) main_~a~0.offset) 3)) |#memory_int|) (<= (mod (div (mod ~SIZE~0 4294967296) 2) 4294967296) 2147483647) (= main_~a~0.offset |main_#t~malloc4.offset|) (<= |#NULL.base| 0) (= |main_#t~malloc4.base| main_~a~0.base) (<= |#NULL.offset| 0) (<= 0 |old(~SIZE~0)|) (= 0 (select |old(#valid)| 0)) (= |#valid| (store |old(#valid)| |main_#t~malloc4.base| 1)) (= (mod ~SIZE~0 2) 0) (<= |old(~SIZE~0)| 0) (= |#NULL.offset| 0)) (and (<= ~MAX~0 100000) (= |old(~SIZE~0)| 0) (not (< (mod |v_main_#t~nondet3_8| 4294967296) 0)) (= 0 |#NULL.base|) (= 0 (select |old(#valid)| |main_#t~malloc4.base|)) (<= 0 |#NULL.base|) (= ~MAX~0 100000) (< 1 (mod ~SIZE~0 4294967296)) (= |#length| (store |old(#length)| |main_#t~malloc4.base| (* 4 ~SIZE~0))) (<= 0 |#NULL.offset|) (= 0 |main_#t~malloc4.offset|) (= ~SIZE~0 (+ (div (mod |v_main_#t~nondet3_8| 4294967296) 8) 1)) (not (= |main_#t~malloc4.base| 0)) (< (mod ~SIZE~0 4294967296) (mod ~MAX~0 4294967296)) (< |#StackHeapBarrier| |main_#t~malloc4.base|) (<= 100000 ~MAX~0) (= (store |old(#memory_int)| main_~a~0.base (store (select |old(#memory_int)| main_~a~0.base) (+ (* 4 (mod (div (mod ~SIZE~0 4294967296) 2) 4294967296)) main_~a~0.offset) 3)) |#memory_int|) (<= (mod (div (mod ~SIZE~0 4294967296) 2) 4294967296) 2147483647) (= main_~a~0.offset |main_#t~malloc4.offset|) (<= |#NULL.base| 0) (= |main_#t~malloc4.base| main_~a~0.base) (not (< (mod ~SIZE~0 4294967296) 0)) (<= |#NULL.offset| 0) (<= 0 |old(~SIZE~0)|) (= 0 (select |old(#valid)| 0)) (= |#valid| (store |old(#valid)| |main_#t~malloc4.base| 1)) (<= |old(~SIZE~0)| 0) (= |#NULL.offset| 0)) (and (<= ~MAX~0 100000) (= |old(~SIZE~0)| 0) (= 0 |#NULL.base|) (= 0 (select |old(#valid)| |main_#t~malloc4.base|)) (<= 0 |#NULL.base|) (= ~MAX~0 100000) (< 1 (mod ~SIZE~0 4294967296)) (= |#length| (store |old(#length)| |main_#t~malloc4.base| (* 4 ~SIZE~0))) (<= 0 |#NULL.offset|) (= 0 |main_#t~malloc4.offset|) (= ~SIZE~0 (+ (div (mod v_prenex_32 4294967296) 8) 1)) (= (mod v_prenex_32 8) 0) (not (= |main_#t~malloc4.base| 0)) (< (mod ~SIZE~0 4294967296) (mod ~MAX~0 4294967296)) (< |#StackHeapBarrier| |main_#t~malloc4.base|) (<= 100000 ~MAX~0) (= (store |old(#memory_int)| main_~a~0.base (store (select |old(#memory_int)| main_~a~0.base) (+ (* 4 (mod (div (mod ~SIZE~0 4294967296) 2) 4294967296)) main_~a~0.offset) 3)) |#memory_int|) (<= (mod (div (mod ~SIZE~0 4294967296) 2) 4294967296) 2147483647) (<= |#NULL.base| 0) (= main_~a~0.offset |main_#t~malloc4.offset|) (= |main_#t~malloc4.base| main_~a~0.base) (not (< (mod ~SIZE~0 4294967296) 0)) (<= |#NULL.offset| 0) (<= 0 |old(~SIZE~0)|) (= 0 (select |old(#valid)| 0)) (= |#valid| (store |old(#valid)| |main_#t~malloc4.base| 1)) (<= |old(~SIZE~0)| 0) (= |#NULL.offset| 0)) (and (<= ~MAX~0 100000) (= |old(~SIZE~0)| 0) (= 0 |#NULL.base|) (not (= (mod v_prenex_31 8) 0)) (= 0 (select |old(#valid)| |main_#t~malloc4.base|)) (<= 0 |#NULL.base|) (= ~MAX~0 100000) (< 1 (mod ~SIZE~0 4294967296)) (= |#length| (store |old(#length)| |main_#t~malloc4.base| (* 4 ~SIZE~0))) (= 0 |main_#t~malloc4.offset|) (<= 0 |#NULL.offset|) (= (+ (div (mod v_prenex_31 4294967296) 8) 2) ~SIZE~0) (< (mod v_prenex_31 4294967296) 0) (not (= |main_#t~malloc4.base| 0)) (< (mod ~SIZE~0 4294967296) (mod ~MAX~0 4294967296)) (< |#StackHeapBarrier| |main_#t~malloc4.base|) (<= 100000 ~MAX~0) (= (store |old(#memory_int)| main_~a~0.base (store (select |old(#memory_int)| main_~a~0.base) (+ (* 4 (mod (div (mod ~SIZE~0 4294967296) 2) 4294967296)) main_~a~0.offset) 3)) |#memory_int|) (<= (mod (div (mod ~SIZE~0 4294967296) 2) 4294967296) 2147483647) (= main_~a~0.offset |main_#t~malloc4.offset|) (<= |#NULL.base| 0) (= |main_#t~malloc4.base| main_~a~0.base) (<= |#NULL.offset| 0) (<= 0 |old(~SIZE~0)|) (= 0 (select |old(#valid)| 0)) (= |#valid| (store |old(#valid)| |main_#t~malloc4.base| 1)) (= (mod ~SIZE~0 2) 0) (<= |old(~SIZE~0)| 0) (= |#NULL.offset| 0)))) [2019-10-07 13:48:41,672 INFO L193 IcfgInterpreter]: Reachable states at location L15-6 satisfy 210#(and (<= 0 linear_search_~j~0) (<= 3 |linear_search_#in~q|) (<= 3 linear_search_~q) (= |linear_search_#in~q| 3) (<= linear_search_~q 3) (<= |linear_search_#in~q| 3)) [2019-10-07 13:48:41,672 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initEXIT satisfy 230#(and (<= ~MAX~0 100000) (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= ~SIZE~0 0) (<= 0 |#NULL.base|) (= ~MAX~0 100000) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (= |#valid| (store |old(#valid)| 0 0)) (<= 0 ~SIZE~0) (= |#NULL.offset| 0) (<= ~SIZE~0 0) (<= 100000 ~MAX~0)) [2019-10-07 13:48:41,672 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.startENTRY satisfy 6#true [2019-10-07 13:48:41,672 INFO L193 IcfgInterpreter]: Reachable states at location L6 satisfy 148#(and (<= 0 (+ |__VERIFIER_assert_#in~cond| 2147483648)) (<= __VERIFIER_assert_~cond 0) (<= 0 |__VERIFIER_assert_#in~cond|) (<= |__VERIFIER_assert_#in~cond| 0) (<= |__VERIFIER_assert_#in~cond| 2147483647) (<= |__VERIFIER_assert_#in~cond| 1) (<= 0 __VERIFIER_assert_~cond) (= 0 __VERIFIER_assert_~cond) (= |__VERIFIER_assert_#in~cond| __VERIFIER_assert_~cond)) [2019-10-07 13:48:41,673 INFO L193 IcfgInterpreter]: Reachable states at location __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION satisfy 153#(and (<= 0 (+ |__VERIFIER_assert_#in~cond| 2147483648)) (<= __VERIFIER_assert_~cond 0) (<= 0 |__VERIFIER_assert_#in~cond|) (<= |__VERIFIER_assert_#in~cond| 0) (<= |__VERIFIER_assert_#in~cond| 2147483647) (<= |__VERIFIER_assert_#in~cond| 1) (<= 0 __VERIFIER_assert_~cond) (= 0 __VERIFIER_assert_~cond) (= |__VERIFIER_assert_#in~cond| __VERIFIER_assert_~cond)) [2019-10-07 13:48:41,673 INFO L193 IcfgInterpreter]: Reachable states at location L5 satisfy 143#(and (<= 0 (+ |__VERIFIER_assert_#in~cond| 2147483648)) (<= 0 |__VERIFIER_assert_#in~cond|) (<= |__VERIFIER_assert_#in~cond| 2147483647) (<= __VERIFIER_assert_~cond 1) (<= |__VERIFIER_assert_#in~cond| 1) (<= 0 __VERIFIER_assert_~cond) (= |__VERIFIER_assert_#in~cond| __VERIFIER_assert_~cond)) [2019-10-07 13:48:41,673 INFO L193 IcfgInterpreter]: Reachable states at location __VERIFIER_assertENTRY satisfy 138#(and (<= 0 (+ |__VERIFIER_assert_#in~cond| 2147483648)) (<= 0 |__VERIFIER_assert_#in~cond|) (<= |__VERIFIER_assert_#in~cond| 2147483647) (<= |__VERIFIER_assert_#in~cond| 1)) [2019-10-07 13:49:03,992 INFO L211 tionRefinementEngine]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2019-10-07 13:49:03,992 INFO L224 tionRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 18, 16, 13] total 55 [2019-10-07 13:49:03,994 INFO L442 AbstractCegarLoop]: Interpolant automaton has 55 states [2019-10-07 13:49:03,995 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 55 interpolants. [2019-10-07 13:49:03,996 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=186, Invalid=2663, Unknown=17, NotChecked=104, Total=2970 [2019-10-07 13:49:03,996 INFO L87 Difference]: Start difference. First operand 26 states and 26 transitions. Second operand 55 states. [2019-10-07 13:49:12,554 WARN L191 SmtUtils]: Spent 140.00 ms on a formula simplification. DAG size of input: 68 DAG size of output: 56 [2019-10-07 13:49:14,155 WARN L191 SmtUtils]: Spent 1.36 s on a formula simplification. DAG size of input: 84 DAG size of output: 68 [2019-10-07 13:49:15,866 WARN L191 SmtUtils]: Spent 1.52 s on a formula simplification. DAG size of input: 79 DAG size of output: 64 [2019-10-07 13:49:19,742 WARN L191 SmtUtils]: Spent 3.53 s on a formula simplification. DAG size of input: 93 DAG size of output: 75 [2019-10-07 13:49:20,221 WARN L191 SmtUtils]: Spent 255.00 ms on a formula simplification. DAG size of input: 87 DAG size of output: 73 [2019-10-07 13:49:25,708 WARN L191 SmtUtils]: Spent 4.83 s on a formula simplification. DAG size of input: 101 DAG size of output: 87 [2019-10-07 13:49:28,356 WARN L191 SmtUtils]: Spent 2.32 s on a formula simplification. DAG size of input: 95 DAG size of output: 81 [2019-10-07 13:49:36,901 WARN L191 SmtUtils]: Spent 7.99 s on a formula simplification. DAG size of input: 177 DAG size of output: 96 [2019-10-07 13:49:42,311 WARN L191 SmtUtils]: Spent 4.99 s on a formula simplification. DAG size of input: 147 DAG size of output: 124 [2019-10-07 13:49:48,384 WARN L191 SmtUtils]: Spent 4.71 s on a formula simplification. DAG size of input: 173 DAG size of output: 123 [2019-10-07 13:49:51,529 WARN L191 SmtUtils]: Spent 648.00 ms on a formula simplification. DAG size of input: 61 DAG size of output: 52 [2019-10-07 13:50:19,019 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-07 13:50:19,019 INFO L93 Difference]: Finished difference Result 36 states and 36 transitions. [2019-10-07 13:50:19,019 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2019-10-07 13:50:19,020 INFO L78 Accepts]: Start accepts. Automaton has 55 states. Word has length 25 [2019-10-07 13:50:19,020 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-07 13:50:19,021 INFO L225 Difference]: With dead ends: 36 [2019-10-07 13:50:19,021 INFO L226 Difference]: Without dead ends: 28 [2019-10-07 13:50:19,024 INFO L606 BasicCegarLoop]: 0 DeclaredPredicates, 110 GetRequests, 34 SyntacticMatches, 4 SemanticMatches, 72 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 1215 ImplicationChecksByTransitivity, 164.6s TimeCoverageRelationStatistics Valid=404, Invalid=4832, Unknown=24, NotChecked=142, Total=5402 [2019-10-07 13:50:19,025 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28 states. [2019-10-07 13:50:19,034 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28 to 28. [2019-10-07 13:50:19,034 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 28 states. [2019-10-07 13:50:19,035 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28 states to 28 states and 28 transitions. [2019-10-07 13:50:19,035 INFO L78 Accepts]: Start accepts. Automaton has 28 states and 28 transitions. Word has length 25 [2019-10-07 13:50:19,035 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-07 13:50:19,035 INFO L462 AbstractCegarLoop]: Abstraction has 28 states and 28 transitions. [2019-10-07 13:50:19,036 INFO L463 AbstractCegarLoop]: Interpolant automaton has 55 states. [2019-10-07 13:50:19,036 INFO L276 IsEmpty]: Start isEmpty. Operand 28 states and 28 transitions. [2019-10-07 13:50:19,036 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2019-10-07 13:50:19,036 INFO L377 BasicCegarLoop]: Found error trace [2019-10-07 13:50:19,037 INFO L385 BasicCegarLoop]: trace histogram [6, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-07 13:50:19,238 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 5 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-07 13:50:19,238 INFO L410 AbstractCegarLoop]: === Iteration 7 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-07 13:50:19,239 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-07 13:50:19,239 INFO L82 PathProgramCache]: Analyzing trace with hash -73852371, now seen corresponding path program 5 times [2019-10-07 13:50:19,239 INFO L150 tionRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-10-07 13:50:19,239 INFO L231 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2019-10-07 13:50:19,240 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-07 13:50:19,240 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-07 13:50:19,240 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-07 13:50:19,285 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-07 13:50:21,767 WARN L191 SmtUtils]: Spent 2.20 s on a formula simplification. DAG size of input: 139 DAG size of output: 34 [2019-10-07 13:50:22,187 WARN L191 SmtUtils]: Spent 156.00 ms on a formula simplification. DAG size of input: 88 DAG size of output: 55 [2019-10-07 13:50:22,392 WARN L191 SmtUtils]: Spent 176.00 ms on a formula simplification. DAG size of input: 86 DAG size of output: 70 [2019-10-07 13:50:22,949 WARN L191 SmtUtils]: Spent 490.00 ms on a formula simplification. DAG size of input: 93 DAG size of output: 69 [2019-10-07 13:50:24,153 WARN L191 SmtUtils]: Spent 1.14 s on a formula simplification. DAG size of input: 100 DAG size of output: 81 [2019-10-07 13:50:24,588 WARN L191 SmtUtils]: Spent 347.00 ms on a formula simplification. DAG size of input: 97 DAG size of output: 81 [2019-10-07 13:50:27,616 WARN L191 SmtUtils]: Spent 229.00 ms on a formula simplification. DAG size of input: 79 DAG size of output: 66 [2019-10-07 13:50:27,931 WARN L191 SmtUtils]: Spent 205.00 ms on a formula simplification. DAG size of input: 155 DAG size of output: 57 [2019-10-07 13:50:28,059 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 0 proven. 30 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-10-07 13:50:28,060 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2019-10-07 13:50:28,060 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2019-10-07 13:50:28,060 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-07 13:57:53,056 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 6 check-sat command(s) [2019-10-07 13:57:53,058 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-10-07 13:57:53,246 WARN L254 TraceCheckSpWp]: Trace formula consists of 121 conjuncts, 63 conjunts are in the unsatisfiable core [2019-10-07 13:57:53,249 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2019-10-07 13:57:53,368 WARN L225 Elim1Store]: Array PQE input equivalent to false [2019-10-07 13:57:54,083 WARN L191 SmtUtils]: Spent 533.00 ms on a formula simplification that was a NOOP. DAG size: 30 [2019-10-07 13:57:56,167 WARN L191 SmtUtils]: Spent 2.02 s on a formula simplification that was a NOOP. DAG size: 27 [2019-10-07 13:57:57,395 WARN L191 SmtUtils]: Spent 1.13 s on a formula simplification that was a NOOP. DAG size: 42 [2019-10-07 13:57:59,507 WARN L191 SmtUtils]: Spent 2.05 s on a formula simplification that was a NOOP. DAG size: 41 [2019-10-07 13:58:02,473 WARN L191 SmtUtils]: Spent 2.85 s on a formula simplification. DAG size of input: 66 DAG size of output: 56 [2019-10-07 13:58:03,134 WARN L191 SmtUtils]: Spent 583.00 ms on a formula simplification that was a NOOP. DAG size: 52 [2019-10-07 13:58:04,156 WARN L191 SmtUtils]: Spent 874.00 ms on a formula simplification. DAG size of input: 74 DAG size of output: 62 [2019-10-07 13:58:06,867 WARN L191 SmtUtils]: Spent 2.21 s on a formula simplification. DAG size of input: 83 DAG size of output: 73 [2019-10-07 13:58:09,066 WARN L191 SmtUtils]: Spent 2.05 s on a formula simplification that was a NOOP. DAG size: 68 [2019-10-07 13:58:13,724 WARN L191 SmtUtils]: Spent 4.38 s on a formula simplification. DAG size of input: 83 DAG size of output: 73 [2019-10-07 13:58:14,577 WARN L191 SmtUtils]: Spent 712.00 ms on a formula simplification that was a NOOP. DAG size: 69 [2019-10-07 13:58:15,060 WARN L191 SmtUtils]: Spent 311.00 ms on a formula simplification. DAG size of input: 61 DAG size of output: 61 [2019-10-07 13:58:15,081 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 0 proven. 30 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-10-07 13:58:15,081 INFO L322 TraceCheckSpWp]: Computing backward predicates... [2019-10-07 13:58:18,822 WARN L191 SmtUtils]: Spent 3.52 s on a formula simplification. DAG size of input: 161 DAG size of output: 107 [2019-10-07 13:58:18,943 WARN L191 SmtUtils]: Spent 118.00 ms on a formula simplification that was a NOOP. DAG size: 90 [2019-10-07 13:58:19,290 WARN L191 SmtUtils]: Spent 344.00 ms on a formula simplification. DAG size of input: 102 DAG size of output: 101 [2019-10-07 13:58:21,473 WARN L191 SmtUtils]: Spent 2.18 s on a formula simplification that was a NOOP. DAG size: 93 [2019-10-07 13:58:25,547 WARN L191 SmtUtils]: Spent 2.32 s on a formula simplification that was a NOOP. DAG size: 90 [2019-10-07 13:58:28,663 WARN L191 SmtUtils]: Spent 2.68 s on a formula simplification that was a NOOP. DAG size: 93 [2019-10-07 13:58:30,729 WARN L860 $PredicateComparison]: unable to prove that (let ((.cse2 (select |c_#memory_int| c_linear_search_~a.base)) (.cse0 (mod c_~SIZE~0 4294967296)) (.cse4 (mod (+ c_linear_search_~j~0 2) 4294967296)) (.cse9 (mod c_linear_search_~n 4294967296)) (.cse8 (mod (+ c_linear_search_~j~0 1) 4294967296))) (or (let ((.cse1 (select |c_#memory_int| |c_linear_search_#in~a.base|))) (and (<= .cse0 5) (not (= (select .cse1 (+ |c_linear_search_#in~a.offset| 8)) 3)) (not (= (select .cse1 (+ |c_linear_search_#in~a.offset| 12)) 3)) (< 4 .cse0) (not (= 3 (select .cse1 (+ |c_linear_search_#in~a.offset| 4)))) (not (= (select .cse1 (+ |c_linear_search_#in~a.offset| 16)) 3)))) (let ((.cse3 (* 4 .cse4))) (and (or (= (select .cse2 (+ .cse3 c_linear_search_~a.offset)) c_linear_search_~q) (< 2147483647 .cse4)) (or (= (select .cse2 (+ .cse3 c_linear_search_~a.offset (- 17179869184))) c_linear_search_~q) (<= .cse4 2147483647)))) (< (mod (+ c_linear_search_~j~0 3) 4294967296) .cse0) (let ((.cse5 (mod c_linear_search_~j~0 4294967296))) (let ((.cse6 (* 4 .cse5))) (and (or (< 2147483647 .cse5) (= (select .cse2 (+ c_linear_search_~a.offset .cse6)) c_linear_search_~q)) (or (<= .cse5 2147483647) (= (select .cse2 (+ c_linear_search_~a.offset .cse6 (- 17179869184))) c_linear_search_~q))))) (not (= 3 |c_linear_search_#in~q|)) (let ((.cse7 (* 4 .cse8))) (and (or (= (select .cse2 (+ .cse7 c_linear_search_~a.offset (- 17179869184))) c_linear_search_~q) (<= .cse8 2147483647)) (or (< 2147483647 .cse8) (= (select .cse2 (+ .cse7 c_linear_search_~a.offset)) c_linear_search_~q)))) (and (or (not (= .cse0 (+ |c_linear_search_#in~n| 4294967296))) (<= .cse0 2147483647)) (or (not (= .cse0 |c_linear_search_#in~n|)) (< 2147483647 .cse0))) (<= .cse9 .cse4) (<= .cse9 .cse8))) is different from true [2019-10-07 13:58:32,883 WARN L860 $PredicateComparison]: unable to prove that (let ((.cse3 (mod (+ c_linear_search_~j~0 3) 4294967296)) (.cse4 (select |c_#memory_int| c_linear_search_~a.base)) (.cse0 (mod c_~SIZE~0 4294967296)) (.cse2 (mod c_linear_search_~n 4294967296)) (.cse6 (mod (+ c_linear_search_~j~0 2) 4294967296))) (or (let ((.cse1 (select |c_#memory_int| |c_linear_search_#in~a.base|))) (and (<= .cse0 5) (not (= (select .cse1 (+ |c_linear_search_#in~a.offset| 8)) 3)) (not (= (select .cse1 (+ |c_linear_search_#in~a.offset| 12)) 3)) (< 4 .cse0) (not (= 3 (select .cse1 (+ |c_linear_search_#in~a.offset| 4)))) (not (= (select .cse1 (+ |c_linear_search_#in~a.offset| 16)) 3)))) (<= .cse2 .cse3) (let ((.cse5 (* 4 .cse6))) (and (or (= (select .cse4 (+ .cse5 c_linear_search_~a.offset)) c_linear_search_~q) (< 2147483647 .cse6)) (or (= (select .cse4 (+ .cse5 c_linear_search_~a.offset (- 17179869184))) c_linear_search_~q) (<= .cse6 2147483647)))) (< (mod (+ c_linear_search_~j~0 4) 4294967296) .cse0) (not (= 3 |c_linear_search_#in~q|)) (let ((.cse7 (* 4 .cse3))) (and (or (= (select .cse4 (+ .cse7 c_linear_search_~a.offset (- 17179869184))) c_linear_search_~q) (<= .cse3 2147483647)) (or (= (select .cse4 (+ .cse7 c_linear_search_~a.offset)) c_linear_search_~q) (< 2147483647 .cse3)))) (not |c_linear_search_#t~short1|) (let ((.cse9 (mod (+ c_linear_search_~j~0 1) 4294967296))) (let ((.cse8 (* 4 .cse9))) (and (or (= (select .cse4 (+ .cse8 c_linear_search_~a.offset (- 17179869184))) c_linear_search_~q) (<= .cse9 2147483647)) (or (< 2147483647 .cse9) (= (select .cse4 (+ .cse8 c_linear_search_~a.offset)) c_linear_search_~q))))) (and (or (not (= .cse0 (+ |c_linear_search_#in~n| 4294967296))) (<= .cse0 2147483647)) (or (not (= .cse0 |c_linear_search_#in~n|)) (< 2147483647 .cse0))) (<= .cse2 .cse6))) is different from true [2019-10-07 13:58:35,225 WARN L860 $PredicateComparison]: unable to prove that (let ((.cse7 (mod c_linear_search_~j~0 4294967296)) (.cse3 (mod (+ c_linear_search_~j~0 3) 4294967296)) (.cse4 (select |c_#memory_int| c_linear_search_~a.base)) (.cse0 (mod c_~SIZE~0 4294967296)) (.cse2 (mod c_linear_search_~n 4294967296)) (.cse6 (mod (+ c_linear_search_~j~0 2) 4294967296))) (or (let ((.cse1 (select |c_#memory_int| |c_linear_search_#in~a.base|))) (and (<= .cse0 5) (not (= (select .cse1 (+ |c_linear_search_#in~a.offset| 8)) 3)) (not (= (select .cse1 (+ |c_linear_search_#in~a.offset| 12)) 3)) (< 4 .cse0) (not (= 3 (select .cse1 (+ |c_linear_search_#in~a.offset| 4)))) (not (= (select .cse1 (+ |c_linear_search_#in~a.offset| 16)) 3)))) (<= .cse2 .cse3) (let ((.cse5 (* 4 .cse6))) (and (or (= (select .cse4 (+ .cse5 c_linear_search_~a.offset)) c_linear_search_~q) (< 2147483647 .cse6)) (or (= (select .cse4 (+ .cse5 c_linear_search_~a.offset (- 17179869184))) c_linear_search_~q) (<= .cse6 2147483647)))) (< (mod (+ c_linear_search_~j~0 4) 4294967296) .cse0) (let ((.cse8 (* 4 .cse7))) (and (or (< 2147483647 .cse7) (= (select .cse4 (+ c_linear_search_~a.offset .cse8)) c_linear_search_~q)) (or (<= .cse7 2147483647) (= (select .cse4 (+ c_linear_search_~a.offset .cse8 (- 17179869184))) c_linear_search_~q)))) (<= .cse2 .cse7) (not (= 3 |c_linear_search_#in~q|)) (let ((.cse9 (* 4 .cse3))) (and (or (= (select .cse4 (+ .cse9 c_linear_search_~a.offset (- 17179869184))) c_linear_search_~q) (<= .cse3 2147483647)) (or (= (select .cse4 (+ .cse9 c_linear_search_~a.offset)) c_linear_search_~q) (< 2147483647 .cse3)))) (let ((.cse11 (mod (+ c_linear_search_~j~0 1) 4294967296))) (let ((.cse10 (* 4 .cse11))) (and (or (= (select .cse4 (+ .cse10 c_linear_search_~a.offset (- 17179869184))) c_linear_search_~q) (<= .cse11 2147483647)) (or (< 2147483647 .cse11) (= (select .cse4 (+ .cse10 c_linear_search_~a.offset)) c_linear_search_~q))))) (and (or (not (= .cse0 (+ |c_linear_search_#in~n| 4294967296))) (<= .cse0 2147483647)) (or (not (= .cse0 |c_linear_search_#in~n|)) (< 2147483647 .cse0))) (<= .cse2 .cse6))) is different from true