java -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata ./data -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/default/automizer/svcomp-Reach-32bit-Automizer_Default.epf --traceabstraction.trace.refinement.strategy SIFA_TAIPAN --sifa.abstract.domain CompoundDomain --rcfgbuilder.size.of.a.code.block LoopFreeBlock --sifa.call.summarizer TopInputCallSummarizer --sifa.fluid SizeLimitFluid --sifa.simplification.technique SIMPLIFY_QUICK -i ../../../trunk/examples/svcomp/array-crafted/mapsum1.i -------------------------------------------------------------------------------- This is Ultimate 0.1.24-36ac518-m [2019-10-06 22:48:46,868 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-10-06 22:48:46,871 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-10-06 22:48:46,884 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-10-06 22:48:46,884 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-10-06 22:48:46,885 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-10-06 22:48:46,887 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-10-06 22:48:46,888 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-10-06 22:48:46,890 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-10-06 22:48:46,891 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-10-06 22:48:46,892 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-10-06 22:48:46,893 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-10-06 22:48:46,893 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-10-06 22:48:46,894 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-10-06 22:48:46,896 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-10-06 22:48:46,897 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-10-06 22:48:46,898 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-10-06 22:48:46,899 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-10-06 22:48:46,900 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-10-06 22:48:46,902 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-10-06 22:48:46,904 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-10-06 22:48:46,905 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-10-06 22:48:46,906 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-10-06 22:48:46,907 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-10-06 22:48:46,909 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... 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[2019-10-06 22:48:46,917 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-10-06 22:48:46,917 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-10-06 22:48:46,918 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-10-06 22:48:46,919 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/default/automizer/svcomp-Reach-32bit-Automizer_Default.epf [2019-10-06 22:48:46,933 INFO L113 SettingsManager]: Loading preferences was successful [2019-10-06 22:48:46,934 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-10-06 22:48:46,935 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-10-06 22:48:46,935 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-10-06 22:48:46,935 INFO L138 SettingsManager]: * Use SBE=true [2019-10-06 22:48:46,936 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-10-06 22:48:46,936 INFO L138 SettingsManager]: * sizeof long=4 [2019-10-06 22:48:46,936 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-10-06 22:48:46,936 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-10-06 22:48:46,937 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-10-06 22:48:46,937 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-10-06 22:48:46,937 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-10-06 22:48:46,937 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-10-06 22:48:46,937 INFO L138 SettingsManager]: * sizeof long double=12 [2019-10-06 22:48:46,938 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-10-06 22:48:46,938 INFO L138 SettingsManager]: * Use constant arrays=true [2019-10-06 22:48:46,938 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-10-06 22:48:46,938 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-10-06 22:48:46,938 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-10-06 22:48:46,939 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-10-06 22:48:46,939 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-10-06 22:48:46,939 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-10-06 22:48:46,939 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-10-06 22:48:46,939 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-10-06 22:48:46,940 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-10-06 22:48:46,940 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-10-06 22:48:46,940 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-10-06 22:48:46,940 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-10-06 22:48:46,940 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: Trace refinement strategy -> SIFA_TAIPAN Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.sifa: Abstract Domain -> CompoundDomain Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder: Size of a code block -> LoopFreeBlock Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.sifa: Call Summarizer -> TopInputCallSummarizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.sifa: Fluid -> SizeLimitFluid Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.sifa: Simplification Technique -> SIMPLIFY_QUICK [2019-10-06 22:48:47,210 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-10-06 22:48:47,231 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-10-06 22:48:47,234 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-10-06 22:48:47,236 INFO L271 PluginConnector]: Initializing CDTParser... [2019-10-06 22:48:47,236 INFO L275 PluginConnector]: CDTParser initialized [2019-10-06 22:48:47,237 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/array-crafted/mapsum1.i [2019-10-06 22:48:47,311 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/baa64eb23/94a4936ef27b496e8bcdbf057e9777cb/FLAG92d85742b [2019-10-06 22:48:47,829 INFO L306 CDTParser]: Found 1 translation units. [2019-10-06 22:48:47,829 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/array-crafted/mapsum1.i [2019-10-06 22:48:47,835 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/baa64eb23/94a4936ef27b496e8bcdbf057e9777cb/FLAG92d85742b [2019-10-06 22:48:48,219 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/baa64eb23/94a4936ef27b496e8bcdbf057e9777cb [2019-10-06 22:48:48,227 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-10-06 22:48:48,228 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2019-10-06 22:48:48,229 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-10-06 22:48:48,229 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-10-06 22:48:48,233 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-10-06 22:48:48,233 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 06.10 10:48:48" (1/1) ... [2019-10-06 22:48:48,236 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@209cf8 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.10 10:48:48, skipping insertion in model container [2019-10-06 22:48:48,237 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 06.10 10:48:48" (1/1) ... [2019-10-06 22:48:48,244 INFO L142 MainTranslator]: Starting translation in SV-COMP mode [2019-10-06 22:48:48,262 INFO L173 MainTranslator]: Built tables and reachable declarations [2019-10-06 22:48:48,437 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-10-06 22:48:48,448 INFO L188 MainTranslator]: Completed pre-run [2019-10-06 22:48:48,471 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-10-06 22:48:48,489 INFO L192 MainTranslator]: Completed translation [2019-10-06 22:48:48,489 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.10 10:48:48 WrapperNode [2019-10-06 22:48:48,489 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-10-06 22:48:48,490 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-10-06 22:48:48,490 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-10-06 22:48:48,490 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-10-06 22:48:48,582 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.10 10:48:48" (1/1) ... [2019-10-06 22:48:48,583 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.10 10:48:48" (1/1) ... [2019-10-06 22:48:48,592 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.10 10:48:48" (1/1) ... [2019-10-06 22:48:48,594 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.10 10:48:48" (1/1) ... [2019-10-06 22:48:48,608 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.10 10:48:48" (1/1) ... [2019-10-06 22:48:48,613 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.10 10:48:48" (1/1) ... [2019-10-06 22:48:48,615 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.10 10:48:48" (1/1) ... [2019-10-06 22:48:48,617 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-10-06 22:48:48,618 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-10-06 22:48:48,618 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-10-06 22:48:48,618 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-10-06 22:48:48,619 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.10 10:48:48" (1/1) ... No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-10-06 22:48:48,673 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2019-10-06 22:48:48,673 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-10-06 22:48:48,673 INFO L138 BoogieDeclarations]: Found implementation of procedure mapsum [2019-10-06 22:48:48,673 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2019-10-06 22:48:48,673 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_error [2019-10-06 22:48:48,673 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_int [2019-10-06 22:48:48,674 INFO L130 BoogieDeclarations]: Found specification of procedure mapsum [2019-10-06 22:48:48,674 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2019-10-06 22:48:48,674 INFO L130 BoogieDeclarations]: Found specification of procedure main [2019-10-06 22:48:48,674 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-10-06 22:48:48,674 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-10-06 22:48:48,674 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-10-06 22:48:48,674 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2019-10-06 22:48:48,675 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-10-06 22:48:49,068 INFO L279 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-10-06 22:48:49,068 INFO L284 CfgBuilder]: Removed 3 assume(true) statements. [2019-10-06 22:48:49,070 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 06.10 10:48:49 BoogieIcfgContainer [2019-10-06 22:48:49,070 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-10-06 22:48:49,071 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-10-06 22:48:49,071 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-10-06 22:48:49,075 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-10-06 22:48:49,076 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 06.10 10:48:48" (1/3) ... [2019-10-06 22:48:49,076 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@5c72f4f3 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 06.10 10:48:49, skipping insertion in model container [2019-10-06 22:48:49,076 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.10 10:48:48" (2/3) ... [2019-10-06 22:48:49,077 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@5c72f4f3 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 06.10 10:48:49, skipping insertion in model container [2019-10-06 22:48:49,077 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 06.10 10:48:49" (3/3) ... [2019-10-06 22:48:49,079 INFO L109 eAbstractionObserver]: Analyzing ICFG mapsum1.i [2019-10-06 22:48:49,089 INFO L152 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-10-06 22:48:49,098 INFO L164 ceAbstractionStarter]: Appying trace abstraction to program that has 1 error locations. [2019-10-06 22:48:49,111 INFO L249 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2019-10-06 22:48:49,143 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-10-06 22:48:49,144 INFO L374 AbstractCegarLoop]: Hoare is true [2019-10-06 22:48:49,144 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-10-06 22:48:49,144 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-10-06 22:48:49,144 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-10-06 22:48:49,144 INFO L378 AbstractCegarLoop]: Difference is false [2019-10-06 22:48:49,144 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-10-06 22:48:49,144 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-10-06 22:48:49,160 INFO L276 IsEmpty]: Start isEmpty. Operand 23 states. [2019-10-06 22:48:49,165 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2019-10-06 22:48:49,165 INFO L377 BasicCegarLoop]: Found error trace [2019-10-06 22:48:49,166 INFO L385 BasicCegarLoop]: trace histogram [3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-06 22:48:49,167 INFO L410 AbstractCegarLoop]: === Iteration 1 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-06 22:48:49,172 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-06 22:48:49,172 INFO L82 PathProgramCache]: Analyzing trace with hash 2002379581, now seen corresponding path program 1 times [2019-10-06 22:48:49,179 INFO L150 tionRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-10-06 22:48:49,179 INFO L231 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2019-10-06 22:48:49,180 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-06 22:48:49,180 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-06 22:48:49,180 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-06 22:48:49,267 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-06 22:48:49,357 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2019-10-06 22:48:49,358 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2019-10-06 22:48:49,359 INFO L211 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-10-06 22:48:49,359 INFO L224 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-10-06 22:48:49,364 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-10-06 22:48:49,378 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-10-06 22:48:49,379 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-10-06 22:48:49,382 INFO L87 Difference]: Start difference. First operand 23 states. Second operand 3 states. [2019-10-06 22:48:49,419 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-06 22:48:49,420 INFO L93 Difference]: Finished difference Result 41 states and 51 transitions. [2019-10-06 22:48:49,420 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-10-06 22:48:49,422 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 24 [2019-10-06 22:48:49,423 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-06 22:48:49,431 INFO L225 Difference]: With dead ends: 41 [2019-10-06 22:48:49,432 INFO L226 Difference]: Without dead ends: 20 [2019-10-06 22:48:49,435 INFO L606 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-10-06 22:48:49,450 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20 states. [2019-10-06 22:48:49,467 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20 to 20. [2019-10-06 22:48:49,469 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20 states. [2019-10-06 22:48:49,471 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20 states to 20 states and 24 transitions. [2019-10-06 22:48:49,472 INFO L78 Accepts]: Start accepts. Automaton has 20 states and 24 transitions. Word has length 24 [2019-10-06 22:48:49,473 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-06 22:48:49,473 INFO L462 AbstractCegarLoop]: Abstraction has 20 states and 24 transitions. [2019-10-06 22:48:49,473 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-10-06 22:48:49,474 INFO L276 IsEmpty]: Start isEmpty. Operand 20 states and 24 transitions. [2019-10-06 22:48:49,476 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2019-10-06 22:48:49,476 INFO L377 BasicCegarLoop]: Found error trace [2019-10-06 22:48:49,476 INFO L385 BasicCegarLoop]: trace histogram [3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-06 22:48:49,477 INFO L410 AbstractCegarLoop]: === Iteration 2 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-06 22:48:49,477 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-06 22:48:49,477 INFO L82 PathProgramCache]: Analyzing trace with hash 1641553888, now seen corresponding path program 1 times [2019-10-06 22:48:49,478 INFO L150 tionRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-10-06 22:48:49,478 INFO L231 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2019-10-06 22:48:49,478 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-06 22:48:49,478 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-06 22:48:49,479 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-06 22:48:49,509 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-06 22:48:49,568 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2019-10-06 22:48:49,568 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2019-10-06 22:48:49,569 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2019-10-06 22:48:49,569 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-06 22:48:49,653 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-06 22:48:49,655 INFO L256 TraceCheckSpWp]: Trace formula consists of 123 conjuncts, 2 conjunts are in the unsatisfiable core [2019-10-06 22:48:49,663 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2019-10-06 22:48:49,705 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2019-10-06 22:48:49,706 INFO L322 TraceCheckSpWp]: Computing backward predicates... [2019-10-06 22:48:49,750 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2019-10-06 22:48:49,750 INFO L211 tionRefinementEngine]: Constructing automaton from 1 perfect and 2 imperfect interpolant sequences. [2019-10-06 22:48:49,751 INFO L224 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [3, 3] total 5 [2019-10-06 22:48:49,752 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-10-06 22:48:49,753 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-10-06 22:48:49,753 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-10-06 22:48:49,753 INFO L87 Difference]: Start difference. First operand 20 states and 24 transitions. Second operand 3 states. [2019-10-06 22:48:49,765 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-06 22:48:49,765 INFO L93 Difference]: Finished difference Result 33 states and 43 transitions. [2019-10-06 22:48:49,766 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-10-06 22:48:49,766 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 25 [2019-10-06 22:48:49,766 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-06 22:48:49,767 INFO L225 Difference]: With dead ends: 33 [2019-10-06 22:48:49,767 INFO L226 Difference]: Without dead ends: 21 [2019-10-06 22:48:49,768 INFO L606 BasicCegarLoop]: 0 DeclaredPredicates, 52 GetRequests, 49 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-10-06 22:48:49,769 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21 states. [2019-10-06 22:48:49,773 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21 to 21. [2019-10-06 22:48:49,773 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21 states. [2019-10-06 22:48:49,774 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21 states to 21 states and 25 transitions. [2019-10-06 22:48:49,774 INFO L78 Accepts]: Start accepts. Automaton has 21 states and 25 transitions. Word has length 25 [2019-10-06 22:48:49,775 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-06 22:48:49,775 INFO L462 AbstractCegarLoop]: Abstraction has 21 states and 25 transitions. [2019-10-06 22:48:49,775 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-10-06 22:48:49,775 INFO L276 IsEmpty]: Start isEmpty. Operand 21 states and 25 transitions. [2019-10-06 22:48:49,776 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2019-10-06 22:48:49,776 INFO L377 BasicCegarLoop]: Found error trace [2019-10-06 22:48:49,777 INFO L385 BasicCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-06 22:48:49,977 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 2 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-06 22:48:49,978 INFO L410 AbstractCegarLoop]: === Iteration 3 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-06 22:48:49,979 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-06 22:48:49,979 INFO L82 PathProgramCache]: Analyzing trace with hash -1715048104, now seen corresponding path program 1 times [2019-10-06 22:48:49,979 INFO L150 tionRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-10-06 22:48:49,980 INFO L231 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2019-10-06 22:48:49,980 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-06 22:48:49,980 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-06 22:48:49,980 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-06 22:48:50,017 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-06 22:48:50,087 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2019-10-06 22:48:50,087 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2019-10-06 22:48:50,088 INFO L211 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-10-06 22:48:50,088 INFO L224 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-10-06 22:48:50,088 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-10-06 22:48:50,089 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-10-06 22:48:50,089 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-10-06 22:48:50,089 INFO L87 Difference]: Start difference. First operand 21 states and 25 transitions. Second operand 3 states. [2019-10-06 22:48:50,099 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-06 22:48:50,099 INFO L93 Difference]: Finished difference Result 31 states and 36 transitions. [2019-10-06 22:48:50,101 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-10-06 22:48:50,101 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 28 [2019-10-06 22:48:50,101 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-06 22:48:50,102 INFO L225 Difference]: With dead ends: 31 [2019-10-06 22:48:50,102 INFO L226 Difference]: Without dead ends: 22 [2019-10-06 22:48:50,103 INFO L606 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-10-06 22:48:50,103 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22 states. [2019-10-06 22:48:50,108 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22 to 22. [2019-10-06 22:48:50,109 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22 states. [2019-10-06 22:48:50,110 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22 states to 22 states and 26 transitions. [2019-10-06 22:48:50,110 INFO L78 Accepts]: Start accepts. Automaton has 22 states and 26 transitions. Word has length 28 [2019-10-06 22:48:50,113 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-06 22:48:50,113 INFO L462 AbstractCegarLoop]: Abstraction has 22 states and 26 transitions. [2019-10-06 22:48:50,113 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-10-06 22:48:50,113 INFO L276 IsEmpty]: Start isEmpty. Operand 22 states and 26 transitions. [2019-10-06 22:48:50,114 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2019-10-06 22:48:50,115 INFO L377 BasicCegarLoop]: Found error trace [2019-10-06 22:48:50,115 INFO L385 BasicCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-06 22:48:50,115 INFO L410 AbstractCegarLoop]: === Iteration 4 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-06 22:48:50,115 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-06 22:48:50,115 INFO L82 PathProgramCache]: Analyzing trace with hash -1273676679, now seen corresponding path program 1 times [2019-10-06 22:48:50,116 INFO L150 tionRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-10-06 22:48:50,116 INFO L231 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2019-10-06 22:48:50,116 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-06 22:48:50,116 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-06 22:48:50,116 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-06 22:48:50,166 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-06 22:48:50,200 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2019-10-06 22:48:50,200 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2019-10-06 22:48:50,201 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2019-10-06 22:48:50,201 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-06 22:48:50,265 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-06 22:48:50,266 INFO L256 TraceCheckSpWp]: Trace formula consists of 142 conjuncts, 3 conjunts are in the unsatisfiable core [2019-10-06 22:48:50,269 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2019-10-06 22:48:50,305 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2019-10-06 22:48:50,306 INFO L322 TraceCheckSpWp]: Computing backward predicates... [2019-10-06 22:48:50,345 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2019-10-06 22:48:50,346 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSifa [2019-10-06 22:48:50,374 INFO L162 IcfgInterpreter]: Started Sifa with 19 locations of interest [2019-10-06 22:48:50,375 INFO L169 IcfgInterpreter]: Building call graph [2019-10-06 22:48:50,381 INFO L174 IcfgInterpreter]: Initial procedures are [ULTIMATE.start] [2019-10-06 22:48:50,389 INFO L179 IcfgInterpreter]: Starting interpretation [2019-10-06 22:48:50,390 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.start with input of size 1 for LOIs [2019-10-06 22:48:50,544 INFO L199 IcfgInterpreter]: Interpreting procedure main with input of size 21 for LOIs [2019-10-06 22:48:52,586 INFO L199 IcfgInterpreter]: Interpreting procedure mapsum with input of size 1 for LOIs [2019-10-06 22:48:52,659 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.init with input of size 10 for LOIs [2019-10-06 22:48:52,663 INFO L183 IcfgInterpreter]: Interpretation finished [2019-10-06 22:48:52,664 INFO L191 IcfgInterpreter]: Final predicates for locations of interest are: [2019-10-06 22:48:52,664 INFO L193 IcfgInterpreter]: Reachable states at location mapsumENTRY satisfy 601#true [2019-10-06 22:48:52,664 INFO L193 IcfgInterpreter]: Reachable states at location L26-4 satisfy 73#(and (not (< main_~i~1 100)) (<= 100 main_~i~1)) [2019-10-06 22:48:52,665 INFO L193 IcfgInterpreter]: Reachable states at location L33 satisfy 592#(exists ((v_prenex_2 Int) (v_mapsum_~ret~0_BEFORE_RETURN_1 Int) (v_prenex_1 Int) (v_mapsum_~ret~0_BEFORE_RETURN_2 Int)) (or (and (not (< main_~i~1 100)) (<= main_~ret~1 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (= main_~ret~1 (+ (mod v_prenex_1 4294967296) (- 4294967296))) (not (<= (mod v_prenex_1 4294967296) 2147483647)) (<= 0 (+ main_~ret~1 2147483648))) (and (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_1 4294967296) 2147483647) (not (< main_~i~1 100)) (<= main_~ret~1 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (= (mod v_mapsum_~ret~0_BEFORE_RETURN_1 4294967296) main_~ret~1) (<= 0 (+ main_~ret~1 2147483648))) (and (not (< main_~i~1 100)) (<= main_~ret~1 2147483647) (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_2 4294967296) 2147483647)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (= (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_2 4294967296) (- 4294967296)) main_~ret~1) (<= 0 (+ main_~ret~1 2147483648))) (and (not (< main_~i~1 100)) (<= main_~ret~1 2147483647) (= main_~ret~1 (mod v_prenex_2 4294967296)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (<= (mod v_prenex_2 4294967296) 2147483647) (<= 0 (+ main_~ret~1 2147483648))))) [2019-10-06 22:48:52,665 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initENTRY satisfy 648#(and (= |old(#NULL.base)| |#NULL.base|) (= |#valid| |old(#valid)|) (= |#NULL.offset| |old(#NULL.offset)|)) [2019-10-06 22:48:52,665 INFO L193 IcfgInterpreter]: Reachable states at location L26-3 satisfy 68#true [2019-10-06 22:48:52,665 INFO L193 IcfgInterpreter]: Reachable states at location L12-3 satisfy 639#(<= 0 mapsum_~i~0) [2019-10-06 22:48:52,665 INFO L193 IcfgInterpreter]: Reachable states at location L-1 satisfy 23#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= 0 (select |#valid| 0)) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-06 22:48:52,666 INFO L193 IcfgInterpreter]: Reachable states at location mainENTRY satisfy 33#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= |#valid| |old(#valid)|) (<= 0 |#NULL.base|) (= |#memory_int| |old(#memory_int)|) (= |#NULL.offset| 0) (= |old(#length)| |#length|) (= 0 (select |old(#valid)| 0)) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-06 22:48:52,666 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initEXIT satisfy 653#(and (= |#valid| (store |old(#valid)| 0 0)) (= 0 |#NULL.base|) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-06 22:48:52,666 INFO L193 IcfgInterpreter]: Reachable states at location L39-1 satisfy 479#true [2019-10-06 22:48:52,666 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.startENTRY satisfy 6#true [2019-10-06 22:48:52,667 INFO L193 IcfgInterpreter]: Reachable states at location L39 satisfy 522#(and (<= 99 main_~i~2) (not (< main_~i~2 99)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396)))) [2019-10-06 22:48:52,667 INFO L193 IcfgInterpreter]: Reachable states at location L30 satisfy 120#(or (exists ((v_mapsum_~ret~0_BEFORE_RETURN_1 Int) (v_prenex_1 Int)) (or (and (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_1 4294967296) 2147483647) (not (< main_~i~1 100)) (= (mod v_mapsum_~ret~0_BEFORE_RETURN_1 4294967296) |main_#t~ret4|)) (and (not (< main_~i~1 100)) (= (+ (mod v_prenex_1 4294967296) (- 4294967296)) |main_#t~ret4|) (not (<= (mod v_prenex_1 4294967296) 2147483647))))) (exists ((v_prenex_2 Int) (v_mapsum_~ret~0_BEFORE_RETURN_2 Int)) (or (and (not (< main_~i~1 100)) (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_2 4294967296) 2147483647)) (= (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_2 4294967296) (- 4294967296)) |main_#t~ret4|)) (and (not (< main_~i~1 100)) (= |main_#t~ret4| (mod v_prenex_2 4294967296)) (<= (mod v_prenex_2 4294967296) 2147483647))))) [2019-10-06 22:48:52,667 INFO L193 IcfgInterpreter]: Reachable states at location L41 satisfy 424#true [2019-10-06 22:48:52,668 INFO L193 IcfgInterpreter]: Reachable states at location mainErr0ASSERT_VIOLATIONERROR_FUNCTION satisfy 234#(or (and (exists ((v_prenex_29 Int) (v_prenex_30 Int) (v_mapsum_~ret~0_BEFORE_RETURN_5 Int) (v_mapsum_~ret~0_BEFORE_RETURN_6 Int)) (or (and (not (< main_~i~2 99)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= main_~ret5~0 (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_6 4294967296) (- 4294967296))) (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_6 4294967296) 2147483647))) (and (not (< main_~i~2 99)) (<= (mod v_prenex_29 4294967296) 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (mod v_prenex_29 4294967296) main_~ret5~0)) (and (= main_~ret5~0 (mod v_prenex_30 4294967296)) (not (< main_~i~2 99)) (<= (mod v_prenex_30 4294967296) 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648))) (and (not (< main_~i~2 99)) (= (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_5 4294967296) (- 4294967296)) main_~ret5~0) (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_5 4294967296) 2147483647)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648))))) (not (= main_~ret~1 main_~ret5~0))) (and (not (= main_~ret~1 main_~ret2~0)) (exists ((v_prenex_29 Int) (v_prenex_30 Int) (v_mapsum_~ret~0_BEFORE_RETURN_5 Int) (v_mapsum_~ret~0_BEFORE_RETURN_6 Int)) (or (and (not (< main_~i~2 99)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= main_~ret5~0 (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_6 4294967296) (- 4294967296))) (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_6 4294967296) 2147483647))) (and (not (< main_~i~2 99)) (<= (mod v_prenex_29 4294967296) 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (mod v_prenex_29 4294967296) main_~ret5~0)) (and (= main_~ret5~0 (mod v_prenex_30 4294967296)) (not (< main_~i~2 99)) (<= (mod v_prenex_30 4294967296) 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648))) (and (not (< main_~i~2 99)) (= (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_5 4294967296) (- 4294967296)) main_~ret5~0) (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_5 4294967296) 2147483647)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648))))))) [2019-10-06 22:48:52,668 INFO L193 IcfgInterpreter]: Reachable states at location L42 satisfy 313#true [2019-10-06 22:48:52,669 INFO L193 IcfgInterpreter]: Reachable states at location mapsumEXIT satisfy 644#(and (<= 100 mapsum_~i~0) (= (ite (<= (mod mapsum_~ret~0 4294967296) 2147483647) (mod mapsum_~ret~0 4294967296) (+ (mod mapsum_~ret~0 4294967296) (- 4294967296))) |mapsum_#res|) (<= 0 mapsum_~i~0) (not (< mapsum_~i~0 100))) [2019-10-06 22:48:52,669 INFO L193 IcfgInterpreter]: Reachable states at location L33-1 satisfy 587#true [2019-10-06 22:48:52,670 INFO L193 IcfgInterpreter]: Reachable states at location L35-3 satisfy 560#true [2019-10-06 22:48:53,052 INFO L211 tionRefinementEngine]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2019-10-06 22:48:53,052 INFO L224 tionRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4, 4, 11] total 17 [2019-10-06 22:48:53,054 INFO L442 AbstractCegarLoop]: Interpolant automaton has 18 states [2019-10-06 22:48:53,055 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2019-10-06 22:48:53,056 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=50, Invalid=256, Unknown=0, NotChecked=0, Total=306 [2019-10-06 22:48:53,056 INFO L87 Difference]: Start difference. First operand 22 states and 26 transitions. Second operand 18 states. [2019-10-06 22:48:53,684 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-06 22:48:53,684 INFO L93 Difference]: Finished difference Result 40 states and 50 transitions. [2019-10-06 22:48:53,685 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2019-10-06 22:48:53,685 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 29 [2019-10-06 22:48:53,685 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-06 22:48:53,686 INFO L225 Difference]: With dead ends: 40 [2019-10-06 22:48:53,686 INFO L226 Difference]: Without dead ends: 25 [2019-10-06 22:48:53,688 INFO L606 BasicCegarLoop]: 0 DeclaredPredicates, 105 GetRequests, 77 SyntacticMatches, 0 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 198 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=133, Invalid=737, Unknown=0, NotChecked=0, Total=870 [2019-10-06 22:48:53,688 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25 states. [2019-10-06 22:48:53,693 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25 to 25. [2019-10-06 22:48:53,693 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 25 states. [2019-10-06 22:48:53,694 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25 states to 25 states and 29 transitions. [2019-10-06 22:48:53,694 INFO L78 Accepts]: Start accepts. Automaton has 25 states and 29 transitions. Word has length 29 [2019-10-06 22:48:53,695 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-06 22:48:53,695 INFO L462 AbstractCegarLoop]: Abstraction has 25 states and 29 transitions. [2019-10-06 22:48:53,695 INFO L463 AbstractCegarLoop]: Interpolant automaton has 18 states. [2019-10-06 22:48:53,695 INFO L276 IsEmpty]: Start isEmpty. Operand 25 states and 29 transitions. [2019-10-06 22:48:53,696 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2019-10-06 22:48:53,696 INFO L377 BasicCegarLoop]: Found error trace [2019-10-06 22:48:53,697 INFO L385 BasicCegarLoop]: trace histogram [4, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-06 22:48:53,909 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-06 22:48:53,909 INFO L410 AbstractCegarLoop]: === Iteration 5 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-06 22:48:53,909 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-06 22:48:53,910 INFO L82 PathProgramCache]: Analyzing trace with hash 811678230, now seen corresponding path program 2 times [2019-10-06 22:48:53,910 INFO L150 tionRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-10-06 22:48:53,910 INFO L231 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2019-10-06 22:48:53,911 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-06 22:48:53,911 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-06 22:48:53,911 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-06 22:48:53,944 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-06 22:48:53,997 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2019-10-06 22:48:53,998 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2019-10-06 22:48:53,998 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2019-10-06 22:48:53,998 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-06 22:48:54,075 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 2 check-sat command(s) [2019-10-06 22:48:54,075 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-10-06 22:48:54,077 INFO L256 TraceCheckSpWp]: Trace formula consists of 108 conjuncts, 3 conjunts are in the unsatisfiable core [2019-10-06 22:48:54,079 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2019-10-06 22:48:54,095 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 10 proven. 1 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2019-10-06 22:48:54,095 INFO L322 TraceCheckSpWp]: Computing backward predicates... [2019-10-06 22:48:54,126 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 10 proven. 1 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2019-10-06 22:48:54,127 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSifa [2019-10-06 22:48:54,129 INFO L162 IcfgInterpreter]: Started Sifa with 19 locations of interest [2019-10-06 22:48:54,129 INFO L169 IcfgInterpreter]: Building call graph [2019-10-06 22:48:54,130 INFO L174 IcfgInterpreter]: Initial procedures are [ULTIMATE.start] [2019-10-06 22:48:54,132 INFO L179 IcfgInterpreter]: Starting interpretation [2019-10-06 22:48:54,132 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.start with input of size 1 for LOIs [2019-10-06 22:48:54,158 INFO L199 IcfgInterpreter]: Interpreting procedure main with input of size 21 for LOIs [2019-10-06 22:48:55,667 INFO L199 IcfgInterpreter]: Interpreting procedure mapsum with input of size 1 for LOIs [2019-10-06 22:48:55,704 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.init with input of size 10 for LOIs [2019-10-06 22:48:55,708 INFO L183 IcfgInterpreter]: Interpretation finished [2019-10-06 22:48:55,709 INFO L191 IcfgInterpreter]: Final predicates for locations of interest are: [2019-10-06 22:48:55,709 INFO L193 IcfgInterpreter]: Reachable states at location mapsumENTRY satisfy 601#true [2019-10-06 22:48:55,709 INFO L193 IcfgInterpreter]: Reachable states at location L26-4 satisfy 73#(and (not (< main_~i~1 100)) (<= 100 main_~i~1)) [2019-10-06 22:48:55,709 INFO L193 IcfgInterpreter]: Reachable states at location L33 satisfy 592#(exists ((v_mapsum_~ret~0_BEFORE_RETURN_27 Int) (v_prenex_196 Int) (v_mapsum_~ret~0_BEFORE_RETURN_28 Int) (v_prenex_195 Int)) (or (and (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_28 4294967296) 2147483647) (not (< main_~i~1 100)) (<= main_~ret~1 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (= (mod v_mapsum_~ret~0_BEFORE_RETURN_28 4294967296) main_~ret~1) (<= 0 (+ main_~ret~1 2147483648))) (and (= (+ (mod v_prenex_196 4294967296) (- 4294967296)) main_~ret~1) (not (< main_~i~1 100)) (not (<= (mod v_prenex_196 4294967296) 2147483647)) (<= main_~ret~1 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (<= 0 (+ main_~ret~1 2147483648))) (and (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_27 4294967296) 2147483647)) (not (< main_~i~1 100)) (<= main_~ret~1 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (= (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_27 4294967296) (- 4294967296)) main_~ret~1) (<= 0 (+ main_~ret~1 2147483648))) (and (not (< main_~i~1 100)) (<= main_~ret~1 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (= (mod v_prenex_195 4294967296) main_~ret~1) (<= (mod v_prenex_195 4294967296) 2147483647) (<= 0 (+ main_~ret~1 2147483648))))) [2019-10-06 22:48:55,715 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initENTRY satisfy 648#(and (= |old(#NULL.base)| |#NULL.base|) (= |#valid| |old(#valid)|) (= |#NULL.offset| |old(#NULL.offset)|)) [2019-10-06 22:48:55,716 INFO L193 IcfgInterpreter]: Reachable states at location L26-3 satisfy 68#true [2019-10-06 22:48:55,716 INFO L193 IcfgInterpreter]: Reachable states at location L12-3 satisfy 639#(<= 0 mapsum_~i~0) [2019-10-06 22:48:55,716 INFO L193 IcfgInterpreter]: Reachable states at location L-1 satisfy 23#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= 0 (select |#valid| 0)) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-06 22:48:55,717 INFO L193 IcfgInterpreter]: Reachable states at location mainENTRY satisfy 33#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= |#valid| |old(#valid)|) (<= 0 |#NULL.base|) (= |#memory_int| |old(#memory_int)|) (= |#NULL.offset| 0) (= |old(#length)| |#length|) (= 0 (select |old(#valid)| 0)) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-06 22:48:55,717 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initEXIT satisfy 653#(and (= |#valid| (store |old(#valid)| 0 0)) (= 0 |#NULL.base|) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-06 22:48:55,717 INFO L193 IcfgInterpreter]: Reachable states at location L39-1 satisfy 479#true [2019-10-06 22:48:55,718 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.startENTRY satisfy 6#true [2019-10-06 22:48:55,718 INFO L193 IcfgInterpreter]: Reachable states at location L39 satisfy 522#(and (<= 99 main_~i~2) (not (< main_~i~2 99)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396)))) [2019-10-06 22:48:55,718 INFO L193 IcfgInterpreter]: Reachable states at location L30 satisfy 120#(or (exists ((v_mapsum_~ret~0_BEFORE_RETURN_27 Int) (v_prenex_195 Int)) (or (and (not (< main_~i~1 100)) (= (mod v_prenex_195 4294967296) |main_#t~ret4|) (<= (mod v_prenex_195 4294967296) 2147483647)) (and (not (< main_~i~1 100)) (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_27 4294967296) 2147483647)) (= (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_27 4294967296) (- 4294967296)) |main_#t~ret4|)))) (exists ((v_prenex_196 Int) (v_mapsum_~ret~0_BEFORE_RETURN_28 Int)) (or (and (not (< main_~i~1 100)) (= (+ (mod v_prenex_196 4294967296) (- 4294967296)) |main_#t~ret4|) (not (<= (mod v_prenex_196 4294967296) 2147483647))) (and (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_28 4294967296) 2147483647) (not (< main_~i~1 100)) (= (mod v_mapsum_~ret~0_BEFORE_RETURN_28 4294967296) |main_#t~ret4|))))) [2019-10-06 22:48:55,718 INFO L193 IcfgInterpreter]: Reachable states at location L41 satisfy 424#true [2019-10-06 22:48:55,719 INFO L193 IcfgInterpreter]: Reachable states at location mainErr0ASSERT_VIOLATIONERROR_FUNCTION satisfy 234#(or (and (not (= main_~ret~1 main_~ret2~0)) (exists ((v_mapsum_~ret~0_BEFORE_RETURN_32 Int) (v_mapsum_~ret~0_BEFORE_RETURN_31 Int) (v_prenex_224 Int) (v_prenex_223 Int)) (or (and (not (< main_~i~2 99)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (= main_~ret5~0 (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_31 4294967296) (- 4294967296))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_31 4294967296) 2147483647))) (and (not (< main_~i~2 99)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (<= (mod v_prenex_223 4294967296) 2147483647) (= (mod v_prenex_223 4294967296) main_~ret5~0)) (and (= (mod v_mapsum_~ret~0_BEFORE_RETURN_32 4294967296) main_~ret5~0) (not (< main_~i~2 99)) (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_32 4294967296) 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648))) (and (not (< main_~i~2 99)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (not (<= (mod v_prenex_224 4294967296) 2147483647)) (<= main_~ret5~0 2147483647) (= main_~ret5~0 (+ (mod v_prenex_224 4294967296) (- 4294967296))) (<= 0 (+ main_~ret5~0 2147483648)))))) (and (exists ((v_mapsum_~ret~0_BEFORE_RETURN_32 Int) (v_mapsum_~ret~0_BEFORE_RETURN_31 Int) (v_prenex_224 Int) (v_prenex_223 Int)) (or (and (not (< main_~i~2 99)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (= main_~ret5~0 (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_31 4294967296) (- 4294967296))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_31 4294967296) 2147483647))) (and (not (< main_~i~2 99)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (<= (mod v_prenex_223 4294967296) 2147483647) (= (mod v_prenex_223 4294967296) main_~ret5~0)) (and (= (mod v_mapsum_~ret~0_BEFORE_RETURN_32 4294967296) main_~ret5~0) (not (< main_~i~2 99)) (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_32 4294967296) 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648))) (and (not (< main_~i~2 99)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (not (<= (mod v_prenex_224 4294967296) 2147483647)) (<= main_~ret5~0 2147483647) (= main_~ret5~0 (+ (mod v_prenex_224 4294967296) (- 4294967296))) (<= 0 (+ main_~ret5~0 2147483648))))) (not (= main_~ret~1 main_~ret5~0)))) [2019-10-06 22:48:55,719 INFO L193 IcfgInterpreter]: Reachable states at location L42 satisfy 313#true [2019-10-06 22:48:55,719 INFO L193 IcfgInterpreter]: Reachable states at location mapsumEXIT satisfy 644#(and (<= 100 mapsum_~i~0) (= (ite (<= (mod mapsum_~ret~0 4294967296) 2147483647) (mod mapsum_~ret~0 4294967296) (+ (mod mapsum_~ret~0 4294967296) (- 4294967296))) |mapsum_#res|) (<= 0 mapsum_~i~0) (not (< mapsum_~i~0 100))) [2019-10-06 22:48:55,719 INFO L193 IcfgInterpreter]: Reachable states at location L33-1 satisfy 587#true [2019-10-06 22:48:55,719 INFO L193 IcfgInterpreter]: Reachable states at location L35-3 satisfy 560#true [2019-10-06 22:48:56,095 INFO L211 tionRefinementEngine]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2019-10-06 22:48:56,096 INFO L224 tionRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 4, 4, 11] total 21 [2019-10-06 22:48:56,097 INFO L442 AbstractCegarLoop]: Interpolant automaton has 22 states [2019-10-06 22:48:56,098 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2019-10-06 22:48:56,099 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=64, Invalid=398, Unknown=0, NotChecked=0, Total=462 [2019-10-06 22:48:56,099 INFO L87 Difference]: Start difference. First operand 25 states and 29 transitions. Second operand 22 states. [2019-10-06 22:48:58,953 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-06 22:48:58,954 INFO L93 Difference]: Finished difference Result 44 states and 58 transitions. [2019-10-06 22:48:58,954 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2019-10-06 22:48:58,954 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 32 [2019-10-06 22:48:58,955 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-06 22:48:58,956 INFO L225 Difference]: With dead ends: 44 [2019-10-06 22:48:58,956 INFO L226 Difference]: Without dead ends: 29 [2019-10-06 22:48:58,957 INFO L606 BasicCegarLoop]: 0 DeclaredPredicates, 119 GetRequests, 82 SyntacticMatches, 0 SemanticMatches, 37 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 305 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=210, Invalid=1272, Unknown=0, NotChecked=0, Total=1482 [2019-10-06 22:48:58,957 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 29 states. [2019-10-06 22:48:58,963 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 29 to 29. [2019-10-06 22:48:58,963 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 29 states. [2019-10-06 22:48:58,964 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29 states to 29 states and 33 transitions. [2019-10-06 22:48:58,964 INFO L78 Accepts]: Start accepts. Automaton has 29 states and 33 transitions. Word has length 32 [2019-10-06 22:48:58,964 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-06 22:48:58,964 INFO L462 AbstractCegarLoop]: Abstraction has 29 states and 33 transitions. [2019-10-06 22:48:58,965 INFO L463 AbstractCegarLoop]: Interpolant automaton has 22 states. [2019-10-06 22:48:58,965 INFO L276 IsEmpty]: Start isEmpty. Operand 29 states and 33 transitions. [2019-10-06 22:48:58,966 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2019-10-06 22:48:58,966 INFO L377 BasicCegarLoop]: Found error trace [2019-10-06 22:48:58,966 INFO L385 BasicCegarLoop]: trace histogram [12, 5, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-06 22:48:59,170 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 4 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-06 22:48:59,171 INFO L410 AbstractCegarLoop]: === Iteration 6 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-06 22:48:59,172 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-06 22:48:59,172 INFO L82 PathProgramCache]: Analyzing trace with hash -2095262385, now seen corresponding path program 3 times [2019-10-06 22:48:59,172 INFO L150 tionRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-10-06 22:48:59,173 INFO L231 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2019-10-06 22:48:59,173 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-06 22:48:59,173 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-06 22:48:59,173 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-06 22:48:59,256 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-06 22:48:59,336 INFO L134 CoverageAnalysis]: Checked inductivity of 127 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2019-10-06 22:48:59,336 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2019-10-06 22:48:59,336 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2019-10-06 22:48:59,337 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-06 22:48:59,460 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2019-10-06 22:48:59,460 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-10-06 22:48:59,461 INFO L256 TraceCheckSpWp]: Trace formula consists of 211 conjuncts, 7 conjunts are in the unsatisfiable core [2019-10-06 22:48:59,475 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2019-10-06 22:48:59,506 INFO L134 CoverageAnalysis]: Checked inductivity of 127 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2019-10-06 22:48:59,506 INFO L322 TraceCheckSpWp]: Computing backward predicates... [2019-10-06 22:48:59,586 INFO L134 CoverageAnalysis]: Checked inductivity of 127 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2019-10-06 22:48:59,586 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSifa [2019-10-06 22:48:59,588 INFO L162 IcfgInterpreter]: Started Sifa with 19 locations of interest [2019-10-06 22:48:59,588 INFO L169 IcfgInterpreter]: Building call graph [2019-10-06 22:48:59,589 INFO L174 IcfgInterpreter]: Initial procedures are [ULTIMATE.start] [2019-10-06 22:48:59,589 INFO L179 IcfgInterpreter]: Starting interpretation [2019-10-06 22:48:59,590 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.start with input of size 1 for LOIs [2019-10-06 22:48:59,610 INFO L199 IcfgInterpreter]: Interpreting procedure main with input of size 21 for LOIs [2019-10-06 22:49:01,331 INFO L199 IcfgInterpreter]: Interpreting procedure mapsum with input of size 1 for LOIs [2019-10-06 22:49:01,366 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.init with input of size 10 for LOIs [2019-10-06 22:49:01,370 INFO L183 IcfgInterpreter]: Interpretation finished [2019-10-06 22:49:01,371 INFO L191 IcfgInterpreter]: Final predicates for locations of interest are: [2019-10-06 22:49:01,371 INFO L193 IcfgInterpreter]: Reachable states at location mapsumENTRY satisfy 601#true [2019-10-06 22:49:01,372 INFO L193 IcfgInterpreter]: Reachable states at location L26-4 satisfy 73#(and (not (< main_~i~1 100)) (<= 100 main_~i~1)) [2019-10-06 22:49:01,372 INFO L193 IcfgInterpreter]: Reachable states at location L33 satisfy 592#(exists ((v_mapsum_~ret~0_BEFORE_RETURN_54 Int) (v_mapsum_~ret~0_BEFORE_RETURN_53 Int) (v_prenex_389 Int) (v_prenex_390 Int)) (or (and (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_53 4294967296) 2147483647)) (not (< main_~i~1 100)) (<= main_~ret~1 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (= main_~ret~1 (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_53 4294967296) (- 4294967296))) (<= 0 (+ main_~ret~1 2147483648))) (and (not (< main_~i~1 100)) (<= main_~ret~1 2147483647) (= (mod v_prenex_389 4294967296) main_~ret~1) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (<= (mod v_prenex_389 4294967296) 2147483647) (<= 0 (+ main_~ret~1 2147483648))) (and (not (< main_~i~1 100)) (<= main_~ret~1 2147483647) (= main_~ret~1 (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_54 4294967296) (- 4294967296))) (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_54 4294967296) 2147483647)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (<= 0 (+ main_~ret~1 2147483648))) (and (<= (mod v_prenex_390 4294967296) 2147483647) (not (< main_~i~1 100)) (<= main_~ret~1 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (= (mod v_prenex_390 4294967296) main_~ret~1) (<= 0 (+ main_~ret~1 2147483648))))) [2019-10-06 22:49:01,372 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initENTRY satisfy 648#(and (= |old(#NULL.base)| |#NULL.base|) (= |#valid| |old(#valid)|) (= |#NULL.offset| |old(#NULL.offset)|)) [2019-10-06 22:49:01,373 INFO L193 IcfgInterpreter]: Reachable states at location L26-3 satisfy 68#true [2019-10-06 22:49:01,373 INFO L193 IcfgInterpreter]: Reachable states at location L12-3 satisfy 639#(<= 0 mapsum_~i~0) [2019-10-06 22:49:01,373 INFO L193 IcfgInterpreter]: Reachable states at location L-1 satisfy 23#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= 0 (select |#valid| 0)) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-06 22:49:01,373 INFO L193 IcfgInterpreter]: Reachable states at location mainENTRY satisfy 33#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= |#valid| |old(#valid)|) (<= 0 |#NULL.base|) (= |#memory_int| |old(#memory_int)|) (= |#NULL.offset| 0) (= |old(#length)| |#length|) (= 0 (select |old(#valid)| 0)) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-06 22:49:01,374 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initEXIT satisfy 653#(and (= |#valid| (store |old(#valid)| 0 0)) (= 0 |#NULL.base|) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-06 22:49:01,374 INFO L193 IcfgInterpreter]: Reachable states at location L39-1 satisfy 479#true [2019-10-06 22:49:01,374 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.startENTRY satisfy 6#true [2019-10-06 22:49:01,375 INFO L193 IcfgInterpreter]: Reachable states at location L39 satisfy 522#(and (<= 99 main_~i~2) (not (< main_~i~2 99)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396)))) [2019-10-06 22:49:01,375 INFO L193 IcfgInterpreter]: Reachable states at location L30 satisfy 120#(or (exists ((v_mapsum_~ret~0_BEFORE_RETURN_54 Int) (v_prenex_390 Int)) (or (and (<= (mod v_prenex_390 4294967296) 2147483647) (not (< main_~i~1 100)) (= (mod v_prenex_390 4294967296) |main_#t~ret4|)) (and (not (< main_~i~1 100)) (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_54 4294967296) 2147483647)) (= |main_#t~ret4| (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_54 4294967296) (- 4294967296)))))) (exists ((v_mapsum_~ret~0_BEFORE_RETURN_53 Int) (v_prenex_389 Int)) (or (and (= |main_#t~ret4| (mod v_prenex_389 4294967296)) (not (< main_~i~1 100)) (<= (mod v_prenex_389 4294967296) 2147483647)) (and (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_53 4294967296) 2147483647)) (not (< main_~i~1 100)) (= (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_53 4294967296) (- 4294967296)) |main_#t~ret4|))))) [2019-10-06 22:49:01,375 INFO L193 IcfgInterpreter]: Reachable states at location L41 satisfy 424#true [2019-10-06 22:49:01,376 INFO L193 IcfgInterpreter]: Reachable states at location mainErr0ASSERT_VIOLATIONERROR_FUNCTION satisfy 234#(or (and (not (= main_~ret~1 main_~ret2~0)) (exists ((v_mapsum_~ret~0_BEFORE_RETURN_58 Int) (v_mapsum_~ret~0_BEFORE_RETURN_57 Int) (v_prenex_417 Int) (v_prenex_418 Int)) (or (and (not (< main_~i~2 99)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_58 4294967296) (- 4294967296)) main_~ret5~0) (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_58 4294967296) 2147483647))) (and (= main_~ret5~0 (mod v_mapsum_~ret~0_BEFORE_RETURN_57 4294967296)) (not (< main_~i~2 99)) (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_57 4294967296) 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648))) (and (= main_~ret5~0 (+ (mod v_prenex_417 4294967296) (- 4294967296))) (not (< main_~i~2 99)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (not (<= (mod v_prenex_417 4294967296) 2147483647))) (and (not (< main_~i~2 99)) (= main_~ret5~0 (mod v_prenex_418 4294967296)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (<= (mod v_prenex_418 4294967296) 2147483647))))) (and (exists ((v_mapsum_~ret~0_BEFORE_RETURN_58 Int) (v_mapsum_~ret~0_BEFORE_RETURN_57 Int) (v_prenex_417 Int) (v_prenex_418 Int)) (or (and (not (< main_~i~2 99)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_58 4294967296) (- 4294967296)) main_~ret5~0) (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_58 4294967296) 2147483647))) (and (= main_~ret5~0 (mod v_mapsum_~ret~0_BEFORE_RETURN_57 4294967296)) (not (< main_~i~2 99)) (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_57 4294967296) 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648))) (and (= main_~ret5~0 (+ (mod v_prenex_417 4294967296) (- 4294967296))) (not (< main_~i~2 99)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (not (<= (mod v_prenex_417 4294967296) 2147483647))) (and (not (< main_~i~2 99)) (= main_~ret5~0 (mod v_prenex_418 4294967296)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (<= (mod v_prenex_418 4294967296) 2147483647)))) (not (= main_~ret~1 main_~ret5~0)))) [2019-10-06 22:49:01,376 INFO L193 IcfgInterpreter]: Reachable states at location L42 satisfy 313#true [2019-10-06 22:49:01,377 INFO L193 IcfgInterpreter]: Reachable states at location mapsumEXIT satisfy 644#(and (<= 100 mapsum_~i~0) (= (ite (<= (mod mapsum_~ret~0 4294967296) 2147483647) (mod mapsum_~ret~0 4294967296) (+ (mod mapsum_~ret~0 4294967296) (- 4294967296))) |mapsum_#res|) (<= 0 mapsum_~i~0) (not (< mapsum_~i~0 100))) [2019-10-06 22:49:01,377 INFO L193 IcfgInterpreter]: Reachable states at location L33-1 satisfy 587#true [2019-10-06 22:49:01,377 INFO L193 IcfgInterpreter]: Reachable states at location L35-3 satisfy 560#true [2019-10-06 22:49:01,773 INFO L211 tionRefinementEngine]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2019-10-06 22:49:01,773 INFO L224 tionRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8, 8, 11] total 25 [2019-10-06 22:49:01,774 INFO L442 AbstractCegarLoop]: Interpolant automaton has 26 states [2019-10-06 22:49:01,775 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2019-10-06 22:49:01,775 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=134, Invalid=516, Unknown=0, NotChecked=0, Total=650 [2019-10-06 22:49:01,775 INFO L87 Difference]: Start difference. First operand 29 states and 33 transitions. Second operand 26 states. [2019-10-06 22:49:02,809 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-06 22:49:02,809 INFO L93 Difference]: Finished difference Result 54 states and 68 transitions. [2019-10-06 22:49:02,809 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2019-10-06 22:49:02,809 INFO L78 Accepts]: Start accepts. Automaton has 26 states. Word has length 42 [2019-10-06 22:49:02,810 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-06 22:49:02,811 INFO L225 Difference]: With dead ends: 54 [2019-10-06 22:49:02,811 INFO L226 Difference]: Without dead ends: 36 [2019-10-06 22:49:02,813 INFO L606 BasicCegarLoop]: 0 DeclaredPredicates, 156 GetRequests, 112 SyntacticMatches, 0 SemanticMatches, 44 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 552 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=369, Invalid=1701, Unknown=0, NotChecked=0, Total=2070 [2019-10-06 22:49:02,813 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 36 states. [2019-10-06 22:49:02,819 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 36 to 36. [2019-10-06 22:49:02,819 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 36 states. [2019-10-06 22:49:02,820 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 36 states to 36 states and 40 transitions. [2019-10-06 22:49:02,820 INFO L78 Accepts]: Start accepts. Automaton has 36 states and 40 transitions. Word has length 42 [2019-10-06 22:49:02,821 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-06 22:49:02,821 INFO L462 AbstractCegarLoop]: Abstraction has 36 states and 40 transitions. [2019-10-06 22:49:02,821 INFO L463 AbstractCegarLoop]: Interpolant automaton has 26 states. [2019-10-06 22:49:02,821 INFO L276 IsEmpty]: Start isEmpty. Operand 36 states and 40 transitions. [2019-10-06 22:49:02,822 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2019-10-06 22:49:02,822 INFO L377 BasicCegarLoop]: Found error trace [2019-10-06 22:49:02,822 INFO L385 BasicCegarLoop]: trace histogram [12, 12, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-06 22:49:03,026 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 5 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-06 22:49:03,027 INFO L410 AbstractCegarLoop]: === Iteration 7 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-06 22:49:03,027 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-06 22:49:03,028 INFO L82 PathProgramCache]: Analyzing trace with hash 2049115666, now seen corresponding path program 4 times [2019-10-06 22:49:03,028 INFO L150 tionRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-10-06 22:49:03,028 INFO L231 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2019-10-06 22:49:03,028 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-06 22:49:03,029 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-06 22:49:03,029 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-06 22:49:03,068 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-06 22:49:03,197 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2019-10-06 22:49:03,197 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2019-10-06 22:49:03,197 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2019-10-06 22:49:03,197 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-06 22:49:03,361 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-06 22:49:03,363 INFO L256 TraceCheckSpWp]: Trace formula consists of 253 conjuncts, 14 conjunts are in the unsatisfiable core [2019-10-06 22:49:03,366 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2019-10-06 22:49:03,382 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2019-10-06 22:49:03,382 INFO L322 TraceCheckSpWp]: Computing backward predicates... [2019-10-06 22:49:03,617 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2019-10-06 22:49:03,618 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSifa [2019-10-06 22:49:03,619 INFO L162 IcfgInterpreter]: Started Sifa with 19 locations of interest [2019-10-06 22:49:03,620 INFO L169 IcfgInterpreter]: Building call graph [2019-10-06 22:49:03,620 INFO L174 IcfgInterpreter]: Initial procedures are [ULTIMATE.start] [2019-10-06 22:49:03,620 INFO L179 IcfgInterpreter]: Starting interpretation [2019-10-06 22:49:03,620 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.start with input of size 1 for LOIs [2019-10-06 22:49:03,668 INFO L199 IcfgInterpreter]: Interpreting procedure main with input of size 21 for LOIs [2019-10-06 22:49:04,871 INFO L199 IcfgInterpreter]: Interpreting procedure mapsum with input of size 1 for LOIs [2019-10-06 22:49:04,893 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.init with input of size 10 for LOIs [2019-10-06 22:49:04,897 INFO L183 IcfgInterpreter]: Interpretation finished [2019-10-06 22:49:04,897 INFO L191 IcfgInterpreter]: Final predicates for locations of interest are: [2019-10-06 22:49:04,897 INFO L193 IcfgInterpreter]: Reachable states at location mapsumENTRY satisfy 601#true [2019-10-06 22:49:04,898 INFO L193 IcfgInterpreter]: Reachable states at location L26-4 satisfy 73#(and (not (< main_~i~1 100)) (<= 100 main_~i~1)) [2019-10-06 22:49:04,898 INFO L193 IcfgInterpreter]: Reachable states at location L33 satisfy 592#(exists ((v_mapsum_~ret~0_BEFORE_RETURN_79 Int) (v_prenex_583 Int) (v_prenex_584 Int) (v_mapsum_~ret~0_BEFORE_RETURN_80 Int)) (or (and (not (< main_~i~1 100)) (= main_~ret~1 (mod v_mapsum_~ret~0_BEFORE_RETURN_80 4294967296)) (<= main_~ret~1 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_80 4294967296) 2147483647) (<= 0 (+ main_~ret~1 2147483648))) (and (not (< main_~i~1 100)) (<= main_~ret~1 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (not (<= (mod v_prenex_584 4294967296) 2147483647)) (= main_~ret~1 (+ (mod v_prenex_584 4294967296) (- 4294967296))) (<= 0 (+ main_~ret~1 2147483648))) (and (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_79 4294967296) 2147483647)) (not (< main_~i~1 100)) (<= main_~ret~1 2147483647) (= (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_79 4294967296) (- 4294967296)) main_~ret~1) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (<= 0 (+ main_~ret~1 2147483648))) (and (not (< main_~i~1 100)) (<= main_~ret~1 2147483647) (<= (mod v_prenex_583 4294967296) 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (= main_~ret~1 (mod v_prenex_583 4294967296)) (<= 0 (+ main_~ret~1 2147483648))))) [2019-10-06 22:49:04,898 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initENTRY satisfy 648#(and (= |old(#NULL.base)| |#NULL.base|) (= |#valid| |old(#valid)|) (= |#NULL.offset| |old(#NULL.offset)|)) [2019-10-06 22:49:04,898 INFO L193 IcfgInterpreter]: Reachable states at location L26-3 satisfy 68#true [2019-10-06 22:49:04,898 INFO L193 IcfgInterpreter]: Reachable states at location L12-3 satisfy 639#(<= 0 mapsum_~i~0) [2019-10-06 22:49:04,899 INFO L193 IcfgInterpreter]: Reachable states at location L-1 satisfy 23#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= 0 (select |#valid| 0)) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-06 22:49:04,899 INFO L193 IcfgInterpreter]: Reachable states at location mainENTRY satisfy 33#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= |#valid| |old(#valid)|) (<= 0 |#NULL.base|) (= |#memory_int| |old(#memory_int)|) (= |#NULL.offset| 0) (= |old(#length)| |#length|) (= 0 (select |old(#valid)| 0)) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-06 22:49:04,899 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initEXIT satisfy 653#(and (= |#valid| (store |old(#valid)| 0 0)) (= 0 |#NULL.base|) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-06 22:49:04,899 INFO L193 IcfgInterpreter]: Reachable states at location L39-1 satisfy 479#true [2019-10-06 22:49:04,899 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.startENTRY satisfy 6#true [2019-10-06 22:49:04,899 INFO L193 IcfgInterpreter]: Reachable states at location L39 satisfy 522#(and (<= 99 main_~i~2) (not (< main_~i~2 99)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396)))) [2019-10-06 22:49:04,900 INFO L193 IcfgInterpreter]: Reachable states at location L30 satisfy 120#(or (exists ((v_prenex_584 Int) (v_mapsum_~ret~0_BEFORE_RETURN_80 Int)) (or (and (not (< main_~i~1 100)) (not (<= (mod v_prenex_584 4294967296) 2147483647)) (= (+ (mod v_prenex_584 4294967296) (- 4294967296)) |main_#t~ret4|)) (and (not (< main_~i~1 100)) (= |main_#t~ret4| (mod v_mapsum_~ret~0_BEFORE_RETURN_80 4294967296)) (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_80 4294967296) 2147483647)))) (exists ((v_mapsum_~ret~0_BEFORE_RETURN_79 Int) (v_prenex_583 Int)) (or (and (= (mod v_prenex_583 4294967296) |main_#t~ret4|) (not (< main_~i~1 100)) (<= (mod v_prenex_583 4294967296) 2147483647)) (and (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_79 4294967296) 2147483647)) (not (< main_~i~1 100)) (= (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_79 4294967296) (- 4294967296)) |main_#t~ret4|))))) [2019-10-06 22:49:04,900 INFO L193 IcfgInterpreter]: Reachable states at location L41 satisfy 424#true [2019-10-06 22:49:04,900 INFO L193 IcfgInterpreter]: Reachable states at location mainErr0ASSERT_VIOLATIONERROR_FUNCTION satisfy 234#(or (and (not (= main_~ret~1 main_~ret2~0)) (exists ((v_prenex_611 Int) (v_prenex_612 Int) (v_mapsum_~ret~0_BEFORE_RETURN_83 Int) (v_mapsum_~ret~0_BEFORE_RETURN_84 Int)) (or (and (= (+ (mod v_prenex_612 4294967296) (- 4294967296)) main_~ret5~0) (not (< main_~i~2 99)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (not (<= (mod v_prenex_612 4294967296) 2147483647))) (and (not (< main_~i~2 99)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (<= main_~ret5~0 2147483647) (= main_~ret5~0 (mod v_mapsum_~ret~0_BEFORE_RETURN_84 4294967296)) (<= 0 (+ main_~ret5~0 2147483648)) (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_84 4294967296) 2147483647)) (and (not (< main_~i~2 99)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= main_~ret5~0 (mod v_mapsum_~ret~0_BEFORE_RETURN_83 4294967296)) (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_83 4294967296) 2147483647)) (and (not (< main_~i~2 99)) (not (<= (mod v_prenex_611 4294967296) 2147483647)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (<= main_~ret5~0 2147483647) (= main_~ret5~0 (+ (mod v_prenex_611 4294967296) (- 4294967296))) (<= 0 (+ main_~ret5~0 2147483648)))))) (and (exists ((v_prenex_611 Int) (v_prenex_612 Int) (v_mapsum_~ret~0_BEFORE_RETURN_83 Int) (v_mapsum_~ret~0_BEFORE_RETURN_84 Int)) (or (and (= (+ (mod v_prenex_612 4294967296) (- 4294967296)) main_~ret5~0) (not (< main_~i~2 99)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (not (<= (mod v_prenex_612 4294967296) 2147483647))) (and (not (< main_~i~2 99)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (<= main_~ret5~0 2147483647) (= main_~ret5~0 (mod v_mapsum_~ret~0_BEFORE_RETURN_84 4294967296)) (<= 0 (+ main_~ret5~0 2147483648)) (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_84 4294967296) 2147483647)) (and (not (< main_~i~2 99)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= main_~ret5~0 (mod v_mapsum_~ret~0_BEFORE_RETURN_83 4294967296)) (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_83 4294967296) 2147483647)) (and (not (< main_~i~2 99)) (not (<= (mod v_prenex_611 4294967296) 2147483647)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (<= main_~ret5~0 2147483647) (= main_~ret5~0 (+ (mod v_prenex_611 4294967296) (- 4294967296))) (<= 0 (+ main_~ret5~0 2147483648))))) (not (= main_~ret~1 main_~ret5~0)))) [2019-10-06 22:49:04,900 INFO L193 IcfgInterpreter]: Reachable states at location L42 satisfy 313#true [2019-10-06 22:49:04,900 INFO L193 IcfgInterpreter]: Reachable states at location mapsumEXIT satisfy 644#(and (<= 100 mapsum_~i~0) (= (ite (<= (mod mapsum_~ret~0 4294967296) 2147483647) (mod mapsum_~ret~0 4294967296) (+ (mod mapsum_~ret~0 4294967296) (- 4294967296))) |mapsum_#res|) (<= 0 mapsum_~i~0) (not (< mapsum_~i~0 100))) [2019-10-06 22:49:04,901 INFO L193 IcfgInterpreter]: Reachable states at location L33-1 satisfy 587#true [2019-10-06 22:49:04,901 INFO L193 IcfgInterpreter]: Reachable states at location L35-3 satisfy 560#true [2019-10-06 22:49:05,270 INFO L211 tionRefinementEngine]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2019-10-06 22:49:05,271 INFO L224 tionRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 15, 15, 11] total 39 [2019-10-06 22:49:05,272 INFO L442 AbstractCegarLoop]: Interpolant automaton has 40 states [2019-10-06 22:49:05,272 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 40 interpolants. [2019-10-06 22:49:05,273 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=435, Invalid=1125, Unknown=0, NotChecked=0, Total=1560 [2019-10-06 22:49:05,273 INFO L87 Difference]: Start difference. First operand 36 states and 40 transitions. Second operand 40 states. [2019-10-06 22:49:08,840 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-06 22:49:08,840 INFO L93 Difference]: Finished difference Result 68 states and 89 transitions. [2019-10-06 22:49:08,840 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 39 states. [2019-10-06 22:49:08,841 INFO L78 Accepts]: Start accepts. Automaton has 40 states. Word has length 49 [2019-10-06 22:49:08,841 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-06 22:49:08,842 INFO L225 Difference]: With dead ends: 68 [2019-10-06 22:49:08,843 INFO L226 Difference]: Without dead ends: 50 [2019-10-06 22:49:08,845 INFO L606 BasicCegarLoop]: 0 DeclaredPredicates, 198 GetRequests, 126 SyntacticMatches, 0 SemanticMatches, 72 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1363 ImplicationChecksByTransitivity, 3.9s TimeCoverageRelationStatistics Valid=1244, Invalid=4157, Unknown=1, NotChecked=0, Total=5402 [2019-10-06 22:49:08,845 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 50 states. [2019-10-06 22:49:08,852 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 50 to 50. [2019-10-06 22:49:08,852 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 50 states. [2019-10-06 22:49:08,853 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 50 states to 50 states and 54 transitions. [2019-10-06 22:49:08,854 INFO L78 Accepts]: Start accepts. Automaton has 50 states and 54 transitions. Word has length 49 [2019-10-06 22:49:08,854 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-06 22:49:08,854 INFO L462 AbstractCegarLoop]: Abstraction has 50 states and 54 transitions. [2019-10-06 22:49:08,854 INFO L463 AbstractCegarLoop]: Interpolant automaton has 40 states. [2019-10-06 22:49:08,854 INFO L276 IsEmpty]: Start isEmpty. Operand 50 states and 54 transitions. [2019-10-06 22:49:08,856 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 64 [2019-10-06 22:49:08,856 INFO L377 BasicCegarLoop]: Found error trace [2019-10-06 22:49:08,856 INFO L385 BasicCegarLoop]: trace histogram [26, 12, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-06 22:49:09,059 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 6 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-06 22:49:09,060 INFO L410 AbstractCegarLoop]: === Iteration 8 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-06 22:49:09,061 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-06 22:49:09,061 INFO L82 PathProgramCache]: Analyzing trace with hash -740285582, now seen corresponding path program 5 times [2019-10-06 22:49:09,061 INFO L150 tionRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-10-06 22:49:09,062 INFO L231 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2019-10-06 22:49:09,062 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-06 22:49:09,062 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-06 22:49:09,062 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-06 22:49:09,132 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-06 22:49:09,544 INFO L134 CoverageAnalysis]: Checked inductivity of 463 backedges. 0 proven. 351 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2019-10-06 22:49:09,544 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2019-10-06 22:49:09,544 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2019-10-06 22:49:09,544 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-06 22:49:09,704 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 3 check-sat command(s) [2019-10-06 22:49:09,705 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-10-06 22:49:09,706 INFO L256 TraceCheckSpWp]: Trace formula consists of 149 conjuncts, 3 conjunts are in the unsatisfiable core [2019-10-06 22:49:09,708 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2019-10-06 22:49:09,768 INFO L134 CoverageAnalysis]: Checked inductivity of 463 backedges. 54 proven. 1 refuted. 0 times theorem prover too weak. 408 trivial. 0 not checked. [2019-10-06 22:49:09,768 INFO L322 TraceCheckSpWp]: Computing backward predicates... [2019-10-06 22:49:09,835 INFO L134 CoverageAnalysis]: Checked inductivity of 463 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 462 trivial. 0 not checked. [2019-10-06 22:49:09,835 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSifa [2019-10-06 22:49:09,836 INFO L162 IcfgInterpreter]: Started Sifa with 19 locations of interest [2019-10-06 22:49:09,837 INFO L169 IcfgInterpreter]: Building call graph [2019-10-06 22:49:09,837 INFO L174 IcfgInterpreter]: Initial procedures are [ULTIMATE.start] [2019-10-06 22:49:09,837 INFO L179 IcfgInterpreter]: Starting interpretation [2019-10-06 22:49:09,837 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.start with input of size 1 for LOIs [2019-10-06 22:49:09,860 INFO L199 IcfgInterpreter]: Interpreting procedure main with input of size 21 for LOIs [2019-10-06 22:49:11,052 INFO L199 IcfgInterpreter]: Interpreting procedure mapsum with input of size 1 for LOIs [2019-10-06 22:49:11,094 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.init with input of size 10 for LOIs [2019-10-06 22:49:11,096 INFO L183 IcfgInterpreter]: Interpretation finished [2019-10-06 22:49:11,096 INFO L191 IcfgInterpreter]: Final predicates for locations of interest are: [2019-10-06 22:49:11,096 INFO L193 IcfgInterpreter]: Reachable states at location mapsumENTRY satisfy 601#true [2019-10-06 22:49:11,097 INFO L193 IcfgInterpreter]: Reachable states at location L26-4 satisfy 73#(and (not (< main_~i~1 100)) (<= 100 main_~i~1)) [2019-10-06 22:49:11,097 INFO L193 IcfgInterpreter]: Reachable states at location L33 satisfy 592#(exists ((v_prenex_777 Int) (v_mapsum_~ret~0_BEFORE_RETURN_106 Int) (v_mapsum_~ret~0_BEFORE_RETURN_105 Int) (v_prenex_778 Int)) (or (and (not (< main_~i~1 100)) (<= main_~ret~1 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_105 4294967296) 2147483647) (= (mod v_mapsum_~ret~0_BEFORE_RETURN_105 4294967296) main_~ret~1) (<= 0 (+ main_~ret~1 2147483648))) (and (not (< main_~i~1 100)) (<= main_~ret~1 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (= main_~ret~1 (mod v_prenex_778 4294967296)) (<= (mod v_prenex_778 4294967296) 2147483647) (<= 0 (+ main_~ret~1 2147483648))) (and (not (< main_~i~1 100)) (<= main_~ret~1 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (= (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_106 4294967296) (- 4294967296)) main_~ret~1) (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_106 4294967296) 2147483647)) (<= 0 (+ main_~ret~1 2147483648))) (and (not (< main_~i~1 100)) (not (<= (mod v_prenex_777 4294967296) 2147483647)) (<= main_~ret~1 2147483647) (= main_~ret~1 (+ (mod v_prenex_777 4294967296) (- 4294967296))) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (<= 0 (+ main_~ret~1 2147483648))))) [2019-10-06 22:49:11,097 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initENTRY satisfy 648#(and (= |old(#NULL.base)| |#NULL.base|) (= |#valid| |old(#valid)|) (= |#NULL.offset| |old(#NULL.offset)|)) [2019-10-06 22:49:11,097 INFO L193 IcfgInterpreter]: Reachable states at location L26-3 satisfy 68#true [2019-10-06 22:49:11,097 INFO L193 IcfgInterpreter]: Reachable states at location L12-3 satisfy 639#(<= 0 mapsum_~i~0) [2019-10-06 22:49:11,098 INFO L193 IcfgInterpreter]: Reachable states at location L-1 satisfy 23#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= 0 (select |#valid| 0)) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-06 22:49:11,098 INFO L193 IcfgInterpreter]: Reachable states at location mainENTRY satisfy 33#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= |#valid| |old(#valid)|) (<= 0 |#NULL.base|) (= |#memory_int| |old(#memory_int)|) (= |#NULL.offset| 0) (= |old(#length)| |#length|) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (= 0 (select |old(#valid)| 0))) [2019-10-06 22:49:11,098 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initEXIT satisfy 653#(and (= |#valid| (store |old(#valid)| 0 0)) (= 0 |#NULL.base|) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-06 22:49:11,098 INFO L193 IcfgInterpreter]: Reachable states at location L39-1 satisfy 479#true [2019-10-06 22:49:11,098 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.startENTRY satisfy 6#true [2019-10-06 22:49:11,098 INFO L193 IcfgInterpreter]: Reachable states at location L39 satisfy 522#(and (<= 99 main_~i~2) (not (< main_~i~2 99)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396)))) [2019-10-06 22:49:11,099 INFO L193 IcfgInterpreter]: Reachable states at location L30 satisfy 120#(or (exists ((v_mapsum_~ret~0_BEFORE_RETURN_106 Int) (v_prenex_778 Int)) (or (and (not (< main_~i~1 100)) (= (mod v_prenex_778 4294967296) |main_#t~ret4|) (<= (mod v_prenex_778 4294967296) 2147483647)) (and (not (< main_~i~1 100)) (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_106 4294967296) 2147483647)) (= (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_106 4294967296) (- 4294967296)) |main_#t~ret4|)))) (exists ((v_prenex_777 Int) (v_mapsum_~ret~0_BEFORE_RETURN_105 Int)) (or (and (= (+ (mod v_prenex_777 4294967296) (- 4294967296)) |main_#t~ret4|) (not (< main_~i~1 100)) (not (<= (mod v_prenex_777 4294967296) 2147483647))) (and (not (< main_~i~1 100)) (= (mod v_mapsum_~ret~0_BEFORE_RETURN_105 4294967296) |main_#t~ret4|) (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_105 4294967296) 2147483647))))) [2019-10-06 22:49:11,099 INFO L193 IcfgInterpreter]: Reachable states at location L41 satisfy 424#true [2019-10-06 22:49:11,099 INFO L193 IcfgInterpreter]: Reachable states at location mainErr0ASSERT_VIOLATIONERROR_FUNCTION satisfy 234#(or (and (not (= main_~ret~1 main_~ret2~0)) (exists ((v_prenex_806 Int) (v_mapsum_~ret~0_BEFORE_RETURN_109 Int) (v_prenex_805 Int) (v_mapsum_~ret~0_BEFORE_RETURN_110 Int)) (or (and (not (< main_~i~2 99)) (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_109 4294967296) 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (<= main_~ret5~0 2147483647) (= (mod v_mapsum_~ret~0_BEFORE_RETURN_109 4294967296) main_~ret5~0) (<= 0 (+ main_~ret5~0 2147483648))) (and (not (< main_~i~2 99)) (= main_~ret5~0 (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_110 4294967296) (- 4294967296))) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_110 4294967296) 2147483647)) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648))) (and (not (< main_~i~2 99)) (= main_~ret5~0 (mod v_prenex_806 4294967296)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (<= (mod v_prenex_806 4294967296) 2147483647)) (and (not (< main_~i~2 99)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (= (+ (mod v_prenex_805 4294967296) (- 4294967296)) main_~ret5~0) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (not (<= (mod v_prenex_805 4294967296) 2147483647)))))) (and (exists ((v_prenex_806 Int) (v_mapsum_~ret~0_BEFORE_RETURN_109 Int) (v_prenex_805 Int) (v_mapsum_~ret~0_BEFORE_RETURN_110 Int)) (or (and (not (< main_~i~2 99)) (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_109 4294967296) 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (<= main_~ret5~0 2147483647) (= (mod v_mapsum_~ret~0_BEFORE_RETURN_109 4294967296) main_~ret5~0) (<= 0 (+ main_~ret5~0 2147483648))) (and (not (< main_~i~2 99)) (= main_~ret5~0 (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_110 4294967296) (- 4294967296))) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_110 4294967296) 2147483647)) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648))) (and (not (< main_~i~2 99)) (= main_~ret5~0 (mod v_prenex_806 4294967296)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (<= (mod v_prenex_806 4294967296) 2147483647)) (and (not (< main_~i~2 99)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (= (+ (mod v_prenex_805 4294967296) (- 4294967296)) main_~ret5~0) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (not (<= (mod v_prenex_805 4294967296) 2147483647))))) (not (= main_~ret~1 main_~ret5~0)))) [2019-10-06 22:49:11,099 INFO L193 IcfgInterpreter]: Reachable states at location L42 satisfy 313#true [2019-10-06 22:49:11,099 INFO L193 IcfgInterpreter]: Reachable states at location mapsumEXIT satisfy 644#(and (<= 100 mapsum_~i~0) (= (ite (<= (mod mapsum_~ret~0 4294967296) 2147483647) (mod mapsum_~ret~0 4294967296) (+ (mod mapsum_~ret~0 4294967296) (- 4294967296))) |mapsum_#res|) (<= 0 mapsum_~i~0) (not (< mapsum_~i~0 100))) [2019-10-06 22:49:11,100 INFO L193 IcfgInterpreter]: Reachable states at location L33-1 satisfy 587#true [2019-10-06 22:49:11,100 INFO L193 IcfgInterpreter]: Reachable states at location L35-3 satisfy 560#true [2019-10-06 22:49:11,758 INFO L211 tionRefinementEngine]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2019-10-06 22:49:11,758 INFO L224 tionRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [29, 4, 4, 11] total 43 [2019-10-06 22:49:11,759 INFO L442 AbstractCegarLoop]: Interpolant automaton has 44 states [2019-10-06 22:49:11,760 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 44 interpolants. [2019-10-06 22:49:11,761 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=449, Invalid=1443, Unknown=0, NotChecked=0, Total=1892 [2019-10-06 22:49:11,761 INFO L87 Difference]: Start difference. First operand 50 states and 54 transitions. Second operand 44 states. [2019-10-06 22:49:13,798 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-06 22:49:13,799 INFO L93 Difference]: Finished difference Result 72 states and 83 transitions. [2019-10-06 22:49:13,799 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 44 states. [2019-10-06 22:49:13,799 INFO L78 Accepts]: Start accepts. Automaton has 44 states. Word has length 63 [2019-10-06 22:49:13,799 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-06 22:49:13,800 INFO L225 Difference]: With dead ends: 72 [2019-10-06 22:49:13,800 INFO L226 Difference]: Without dead ends: 54 [2019-10-06 22:49:13,803 INFO L606 BasicCegarLoop]: 0 DeclaredPredicates, 257 GetRequests, 176 SyntacticMatches, 0 SemanticMatches, 81 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1350 ImplicationChecksByTransitivity, 2.6s TimeCoverageRelationStatistics Valid=1349, Invalid=5457, Unknown=0, NotChecked=0, Total=6806 [2019-10-06 22:49:13,803 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 54 states. [2019-10-06 22:49:13,810 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 54 to 54. [2019-10-06 22:49:13,811 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 54 states. [2019-10-06 22:49:13,812 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 54 states to 54 states and 58 transitions. [2019-10-06 22:49:13,812 INFO L78 Accepts]: Start accepts. Automaton has 54 states and 58 transitions. Word has length 63 [2019-10-06 22:49:13,812 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-06 22:49:13,812 INFO L462 AbstractCegarLoop]: Abstraction has 54 states and 58 transitions. [2019-10-06 22:49:13,812 INFO L463 AbstractCegarLoop]: Interpolant automaton has 44 states. [2019-10-06 22:49:13,813 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 58 transitions. [2019-10-06 22:49:13,814 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-10-06 22:49:13,814 INFO L377 BasicCegarLoop]: Found error trace [2019-10-06 22:49:13,814 INFO L385 BasicCegarLoop]: trace histogram [27, 12, 4, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-06 22:49:14,018 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 7 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-06 22:49:14,018 INFO L410 AbstractCegarLoop]: === Iteration 9 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-06 22:49:14,019 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-06 22:49:14,019 INFO L82 PathProgramCache]: Analyzing trace with hash -1983049792, now seen corresponding path program 6 times [2019-10-06 22:49:14,019 INFO L150 tionRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-10-06 22:49:14,019 INFO L231 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2019-10-06 22:49:14,020 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-06 22:49:14,020 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-06 22:49:14,020 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-06 22:49:14,058 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-06 22:49:14,786 INFO L134 CoverageAnalysis]: Checked inductivity of 499 backedges. 0 proven. 378 refuted. 0 times theorem prover too weak. 121 trivial. 0 not checked. [2019-10-06 22:49:14,786 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2019-10-06 22:49:14,786 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2019-10-06 22:49:14,787 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-06 22:49:15,013 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2019-10-06 22:49:15,013 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-10-06 22:49:15,015 INFO L256 TraceCheckSpWp]: Trace formula consists of 355 conjuncts, 29 conjunts are in the unsatisfiable core [2019-10-06 22:49:15,017 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2019-10-06 22:49:15,033 INFO L134 CoverageAnalysis]: Checked inductivity of 499 backedges. 0 proven. 378 refuted. 0 times theorem prover too weak. 121 trivial. 0 not checked. [2019-10-06 22:49:15,033 INFO L322 TraceCheckSpWp]: Computing backward predicates... [2019-10-06 22:49:16,093 INFO L134 CoverageAnalysis]: Checked inductivity of 499 backedges. 0 proven. 378 refuted. 0 times theorem prover too weak. 121 trivial. 0 not checked. [2019-10-06 22:49:16,093 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSifa [2019-10-06 22:49:16,094 INFO L162 IcfgInterpreter]: Started Sifa with 19 locations of interest [2019-10-06 22:49:16,095 INFO L169 IcfgInterpreter]: Building call graph [2019-10-06 22:49:16,095 INFO L174 IcfgInterpreter]: Initial procedures are [ULTIMATE.start] [2019-10-06 22:49:16,095 INFO L179 IcfgInterpreter]: Starting interpretation [2019-10-06 22:49:16,096 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.start with input of size 1 for LOIs [2019-10-06 22:49:16,124 INFO L199 IcfgInterpreter]: Interpreting procedure main with input of size 21 for LOIs [2019-10-06 22:49:17,364 INFO L199 IcfgInterpreter]: Interpreting procedure mapsum with input of size 1 for LOIs [2019-10-06 22:49:17,393 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.init with input of size 10 for LOIs [2019-10-06 22:49:17,396 INFO L183 IcfgInterpreter]: Interpretation finished [2019-10-06 22:49:17,396 INFO L191 IcfgInterpreter]: Final predicates for locations of interest are: [2019-10-06 22:49:17,397 INFO L193 IcfgInterpreter]: Reachable states at location mapsumENTRY satisfy 601#true [2019-10-06 22:49:17,397 INFO L193 IcfgInterpreter]: Reachable states at location L26-4 satisfy 73#(and (not (< main_~i~1 100)) (<= 100 main_~i~1)) [2019-10-06 22:49:17,397 INFO L193 IcfgInterpreter]: Reachable states at location L33 satisfy 592#(exists ((v_prenex_972 Int) (v_prenex_971 Int) (v_mapsum_~ret~0_BEFORE_RETURN_132 Int) (v_mapsum_~ret~0_BEFORE_RETURN_131 Int)) (or (and (= main_~ret~1 (mod v_prenex_972 4294967296)) (not (< main_~i~1 100)) (<= main_~ret~1 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (<= (mod v_prenex_972 4294967296) 2147483647) (<= 0 (+ main_~ret~1 2147483648))) (and (not (< main_~i~1 100)) (<= main_~ret~1 2147483647) (= (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_131 4294967296) (- 4294967296)) main_~ret~1) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_131 4294967296) 2147483647)) (<= 0 (+ main_~ret~1 2147483648))) (and (not (< main_~i~1 100)) (<= main_~ret~1 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_132 4294967296) 2147483647)) (= main_~ret~1 (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_132 4294967296) (- 4294967296))) (<= 0 (+ main_~ret~1 2147483648))) (and (<= (mod v_prenex_971 4294967296) 2147483647) (not (< main_~i~1 100)) (<= main_~ret~1 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (= main_~ret~1 (mod v_prenex_971 4294967296)) (<= 0 (+ main_~ret~1 2147483648))))) [2019-10-06 22:49:17,398 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initENTRY satisfy 648#(and (= |old(#NULL.base)| |#NULL.base|) (= |#valid| |old(#valid)|) (= |#NULL.offset| |old(#NULL.offset)|)) [2019-10-06 22:49:17,398 INFO L193 IcfgInterpreter]: Reachable states at location L26-3 satisfy 68#true [2019-10-06 22:49:17,398 INFO L193 IcfgInterpreter]: Reachable states at location L12-3 satisfy 639#(<= 0 mapsum_~i~0) [2019-10-06 22:49:17,398 INFO L193 IcfgInterpreter]: Reachable states at location L-1 satisfy 23#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= 0 (select |#valid| 0)) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-06 22:49:17,399 INFO L193 IcfgInterpreter]: Reachable states at location mainENTRY satisfy 33#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= |#valid| |old(#valid)|) (<= 0 |#NULL.base|) (= |#memory_int| |old(#memory_int)|) (= |#NULL.offset| 0) (= |old(#length)| |#length|) (= 0 (select |old(#valid)| 0)) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-06 22:49:17,399 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initEXIT satisfy 653#(and (= |#valid| (store |old(#valid)| 0 0)) (= 0 |#NULL.base|) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-06 22:49:17,399 INFO L193 IcfgInterpreter]: Reachable states at location L39-1 satisfy 479#true [2019-10-06 22:49:17,399 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.startENTRY satisfy 6#true [2019-10-06 22:49:17,400 INFO L193 IcfgInterpreter]: Reachable states at location L39 satisfy 522#(and (<= 99 main_~i~2) (not (< main_~i~2 99)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396)))) [2019-10-06 22:49:17,400 INFO L193 IcfgInterpreter]: Reachable states at location L30 satisfy 120#(or (exists ((v_prenex_972 Int) (v_mapsum_~ret~0_BEFORE_RETURN_132 Int)) (or (and (not (< main_~i~1 100)) (= (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_132 4294967296) (- 4294967296)) |main_#t~ret4|) (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_132 4294967296) 2147483647))) (and (= (mod v_prenex_972 4294967296) |main_#t~ret4|) (not (< main_~i~1 100)) (<= (mod v_prenex_972 4294967296) 2147483647)))) (exists ((v_prenex_971 Int) (v_mapsum_~ret~0_BEFORE_RETURN_131 Int)) (or (and (not (< main_~i~1 100)) (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_131 4294967296) 2147483647)) (= (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_131 4294967296) (- 4294967296)) |main_#t~ret4|)) (and (<= (mod v_prenex_971 4294967296) 2147483647) (not (< main_~i~1 100)) (= (mod v_prenex_971 4294967296) |main_#t~ret4|))))) [2019-10-06 22:49:17,400 INFO L193 IcfgInterpreter]: Reachable states at location L41 satisfy 424#true [2019-10-06 22:49:17,400 INFO L193 IcfgInterpreter]: Reachable states at location mainErr0ASSERT_VIOLATIONERROR_FUNCTION satisfy 234#(or (and (exists ((v_mapsum_~ret~0_BEFORE_RETURN_136 Int) (v_mapsum_~ret~0_BEFORE_RETURN_135 Int) (v_prenex_1000 Int) (v_prenex_999 Int)) (or (and (not (< main_~i~2 99)) (not (<= (mod v_prenex_999 4294967296) 2147483647)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (+ (mod v_prenex_999 4294967296) (- 4294967296)) main_~ret5~0)) (and (= (mod v_mapsum_~ret~0_BEFORE_RETURN_135 4294967296) main_~ret5~0) (not (< main_~i~2 99)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_135 4294967296) 2147483647)) (and (not (< main_~i~2 99)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (<= (mod v_prenex_1000 4294967296) 2147483647) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (mod v_prenex_1000 4294967296) main_~ret5~0)) (and (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_136 4294967296) 2147483647)) (not (< main_~i~2 99)) (= (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_136 4294967296) (- 4294967296)) main_~ret5~0) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648))))) (not (= main_~ret~1 main_~ret5~0))) (and (not (= main_~ret~1 main_~ret2~0)) (exists ((v_mapsum_~ret~0_BEFORE_RETURN_136 Int) (v_mapsum_~ret~0_BEFORE_RETURN_135 Int) (v_prenex_1000 Int) (v_prenex_999 Int)) (or (and (not (< main_~i~2 99)) (not (<= (mod v_prenex_999 4294967296) 2147483647)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (+ (mod v_prenex_999 4294967296) (- 4294967296)) main_~ret5~0)) (and (= (mod v_mapsum_~ret~0_BEFORE_RETURN_135 4294967296) main_~ret5~0) (not (< main_~i~2 99)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_135 4294967296) 2147483647)) (and (not (< main_~i~2 99)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (<= (mod v_prenex_1000 4294967296) 2147483647) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (mod v_prenex_1000 4294967296) main_~ret5~0)) (and (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_136 4294967296) 2147483647)) (not (< main_~i~2 99)) (= (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_136 4294967296) (- 4294967296)) main_~ret5~0) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648))))))) [2019-10-06 22:49:17,401 INFO L193 IcfgInterpreter]: Reachable states at location L42 satisfy 313#true [2019-10-06 22:49:17,401 INFO L193 IcfgInterpreter]: Reachable states at location mapsumEXIT satisfy 644#(and (<= 100 mapsum_~i~0) (= (ite (<= (mod mapsum_~ret~0 4294967296) 2147483647) (mod mapsum_~ret~0 4294967296) (+ (mod mapsum_~ret~0 4294967296) (- 4294967296))) |mapsum_#res|) (<= 0 mapsum_~i~0) (not (< mapsum_~i~0 100))) [2019-10-06 22:49:17,401 INFO L193 IcfgInterpreter]: Reachable states at location L33-1 satisfy 587#true [2019-10-06 22:49:17,402 INFO L193 IcfgInterpreter]: Reachable states at location L35-3 satisfy 560#true [2019-10-06 22:49:17,870 INFO L211 tionRefinementEngine]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2019-10-06 22:49:17,871 INFO L224 tionRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [30, 30, 30, 11] total 69 [2019-10-06 22:49:17,872 INFO L442 AbstractCegarLoop]: Interpolant automaton has 70 states [2019-10-06 22:49:17,873 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 70 interpolants. [2019-10-06 22:49:17,875 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=1740, Invalid=3090, Unknown=0, NotChecked=0, Total=4830 [2019-10-06 22:49:17,875 INFO L87 Difference]: Start difference. First operand 54 states and 58 transitions. Second operand 70 states. [2019-10-06 22:49:21,294 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-06 22:49:21,295 INFO L93 Difference]: Finished difference Result 104 states and 140 transitions. [2019-10-06 22:49:21,295 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 69 states. [2019-10-06 22:49:21,295 INFO L78 Accepts]: Start accepts. Automaton has 70 states. Word has length 67 [2019-10-06 22:49:21,295 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-06 22:49:21,296 INFO L225 Difference]: With dead ends: 104 [2019-10-06 22:49:21,297 INFO L226 Difference]: Without dead ends: 83 [2019-10-06 22:49:21,301 INFO L606 BasicCegarLoop]: 0 DeclaredPredicates, 297 GetRequests, 165 SyntacticMatches, 0 SemanticMatches, 132 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3929 ImplicationChecksByTransitivity, 5.2s TimeCoverageRelationStatistics Valid=5099, Invalid=12723, Unknown=0, NotChecked=0, Total=17822 [2019-10-06 22:49:21,302 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 83 states. [2019-10-06 22:49:21,309 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 83 to 83. [2019-10-06 22:49:21,310 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 83 states. [2019-10-06 22:49:21,311 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 83 states to 83 states and 87 transitions. [2019-10-06 22:49:21,311 INFO L78 Accepts]: Start accepts. Automaton has 83 states and 87 transitions. Word has length 67 [2019-10-06 22:49:21,312 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-06 22:49:21,312 INFO L462 AbstractCegarLoop]: Abstraction has 83 states and 87 transitions. [2019-10-06 22:49:21,312 INFO L463 AbstractCegarLoop]: Interpolant automaton has 70 states. [2019-10-06 22:49:21,312 INFO L276 IsEmpty]: Start isEmpty. Operand 83 states and 87 transitions. [2019-10-06 22:49:21,314 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 97 [2019-10-06 22:49:21,314 INFO L377 BasicCegarLoop]: Found error trace [2019-10-06 22:49:21,314 INFO L385 BasicCegarLoop]: trace histogram [56, 12, 4, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-06 22:49:21,533 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 8 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-06 22:49:21,534 INFO L410 AbstractCegarLoop]: === Iteration 10 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-06 22:49:21,534 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-06 22:49:21,534 INFO L82 PathProgramCache]: Analyzing trace with hash 1441308797, now seen corresponding path program 7 times [2019-10-06 22:49:21,535 INFO L150 tionRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-10-06 22:49:21,535 INFO L231 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2019-10-06 22:49:21,536 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-06 22:49:21,536 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-06 22:49:21,536 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-06 22:49:21,592 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-06 22:49:23,010 INFO L134 CoverageAnalysis]: Checked inductivity of 1717 backedges. 0 proven. 1596 refuted. 0 times theorem prover too weak. 121 trivial. 0 not checked. [2019-10-06 22:49:23,010 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2019-10-06 22:49:23,011 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2019-10-06 22:49:23,011 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-06 22:49:23,299 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-06 22:49:23,301 INFO L256 TraceCheckSpWp]: Trace formula consists of 529 conjuncts, 58 conjunts are in the unsatisfiable core [2019-10-06 22:49:23,305 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2019-10-06 22:49:23,335 INFO L134 CoverageAnalysis]: Checked inductivity of 1717 backedges. 0 proven. 1596 refuted. 0 times theorem prover too weak. 121 trivial. 0 not checked. [2019-10-06 22:49:23,335 INFO L322 TraceCheckSpWp]: Computing backward predicates... [2019-10-06 22:49:26,389 INFO L134 CoverageAnalysis]: Checked inductivity of 1717 backedges. 0 proven. 1596 refuted. 0 times theorem prover too weak. 121 trivial. 0 not checked. [2019-10-06 22:49:26,390 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSifa [2019-10-06 22:49:26,391 INFO L162 IcfgInterpreter]: Started Sifa with 19 locations of interest [2019-10-06 22:49:26,391 INFO L169 IcfgInterpreter]: Building call graph [2019-10-06 22:49:26,392 INFO L174 IcfgInterpreter]: Initial procedures are [ULTIMATE.start] [2019-10-06 22:49:26,392 INFO L179 IcfgInterpreter]: Starting interpretation [2019-10-06 22:49:26,392 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.start with input of size 1 for LOIs [2019-10-06 22:49:26,414 INFO L199 IcfgInterpreter]: Interpreting procedure main with input of size 21 for LOIs [2019-10-06 22:49:27,633 INFO L199 IcfgInterpreter]: Interpreting procedure mapsum with input of size 1 for LOIs [2019-10-06 22:49:27,679 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.init with input of size 10 for LOIs [2019-10-06 22:49:27,681 INFO L183 IcfgInterpreter]: Interpretation finished [2019-10-06 22:49:27,682 INFO L191 IcfgInterpreter]: Final predicates for locations of interest are: [2019-10-06 22:49:27,682 INFO L193 IcfgInterpreter]: Reachable states at location mapsumENTRY satisfy 601#true [2019-10-06 22:49:27,682 INFO L193 IcfgInterpreter]: Reachable states at location L26-4 satisfy 73#(and (not (< main_~i~1 100)) (<= 100 main_~i~1)) [2019-10-06 22:49:27,682 INFO L193 IcfgInterpreter]: Reachable states at location L33 satisfy 592#(exists ((v_mapsum_~ret~0_BEFORE_RETURN_158 Int) (v_mapsum_~ret~0_BEFORE_RETURN_157 Int) (v_prenex_1166 Int) (v_prenex_1165 Int)) (or (and (not (< main_~i~1 100)) (= (+ (mod v_prenex_1165 4294967296) (- 4294967296)) main_~ret~1) (<= main_~ret~1 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (not (<= (mod v_prenex_1165 4294967296) 2147483647)) (<= 0 (+ main_~ret~1 2147483648))) (and (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_158 4294967296) 2147483647) (= (mod v_mapsum_~ret~0_BEFORE_RETURN_158 4294967296) main_~ret~1) (not (< main_~i~1 100)) (<= main_~ret~1 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (<= 0 (+ main_~ret~1 2147483648))) (and (not (< main_~i~1 100)) (<= main_~ret~1 2147483647) (= main_~ret~1 (+ (mod v_prenex_1166 4294967296) (- 4294967296))) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (not (<= (mod v_prenex_1166 4294967296) 2147483647)) (<= 0 (+ main_~ret~1 2147483648))) (and (not (< main_~i~1 100)) (<= main_~ret~1 2147483647) (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_157 4294967296) 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (= main_~ret~1 (mod v_mapsum_~ret~0_BEFORE_RETURN_157 4294967296)) (<= 0 (+ main_~ret~1 2147483648))))) [2019-10-06 22:49:27,682 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initENTRY satisfy 648#(and (= |old(#NULL.base)| |#NULL.base|) (= |#valid| |old(#valid)|) (= |#NULL.offset| |old(#NULL.offset)|)) [2019-10-06 22:49:27,683 INFO L193 IcfgInterpreter]: Reachable states at location L26-3 satisfy 68#true [2019-10-06 22:49:27,683 INFO L193 IcfgInterpreter]: Reachable states at location L12-3 satisfy 639#(<= 0 mapsum_~i~0) [2019-10-06 22:49:27,683 INFO L193 IcfgInterpreter]: Reachable states at location L-1 satisfy 23#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= 0 (select |#valid| 0)) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-06 22:49:27,683 INFO L193 IcfgInterpreter]: Reachable states at location mainENTRY satisfy 33#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= |#valid| |old(#valid)|) (<= 0 |#NULL.base|) (= |#memory_int| |old(#memory_int)|) (= |#NULL.offset| 0) (= |old(#length)| |#length|) (= 0 (select |old(#valid)| 0)) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-06 22:49:27,683 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initEXIT satisfy 653#(and (= |#valid| (store |old(#valid)| 0 0)) (= 0 |#NULL.base|) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-06 22:49:27,683 INFO L193 IcfgInterpreter]: Reachable states at location L39-1 satisfy 479#true [2019-10-06 22:49:27,684 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.startENTRY satisfy 6#true [2019-10-06 22:49:27,684 INFO L193 IcfgInterpreter]: Reachable states at location L39 satisfy 522#(and (<= 99 main_~i~2) (not (< main_~i~2 99)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396)))) [2019-10-06 22:49:27,684 INFO L193 IcfgInterpreter]: Reachable states at location L30 satisfy 120#(or (exists ((v_mapsum_~ret~0_BEFORE_RETURN_158 Int) (v_prenex_1166 Int)) (or (and (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_158 4294967296) 2147483647) (not (< main_~i~1 100)) (= (mod v_mapsum_~ret~0_BEFORE_RETURN_158 4294967296) |main_#t~ret4|)) (and (not (< main_~i~1 100)) (= (+ (mod v_prenex_1166 4294967296) (- 4294967296)) |main_#t~ret4|) (not (<= (mod v_prenex_1166 4294967296) 2147483647))))) (exists ((v_mapsum_~ret~0_BEFORE_RETURN_157 Int) (v_prenex_1165 Int)) (or (and (not (< main_~i~1 100)) (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_157 4294967296) 2147483647) (= (mod v_mapsum_~ret~0_BEFORE_RETURN_157 4294967296) |main_#t~ret4|)) (and (not (< main_~i~1 100)) (not (<= (mod v_prenex_1165 4294967296) 2147483647)) (= (+ (mod v_prenex_1165 4294967296) (- 4294967296)) |main_#t~ret4|))))) [2019-10-06 22:49:27,684 INFO L193 IcfgInterpreter]: Reachable states at location L41 satisfy 424#true [2019-10-06 22:49:27,684 INFO L193 IcfgInterpreter]: Reachable states at location mainErr0ASSERT_VIOLATIONERROR_FUNCTION satisfy 234#(or (and (not (= main_~ret~1 main_~ret2~0)) (exists ((v_mapsum_~ret~0_BEFORE_RETURN_162 Int) (v_mapsum_~ret~0_BEFORE_RETURN_161 Int) (v_prenex_1194 Int) (v_prenex_1193 Int)) (or (and (not (< main_~i~2 99)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (<= main_~ret5~0 2147483647) (not (<= (mod v_prenex_1194 4294967296) 2147483647)) (<= 0 (+ main_~ret5~0 2147483648)) (= (+ (mod v_prenex_1194 4294967296) (- 4294967296)) main_~ret5~0)) (and (not (< main_~i~2 99)) (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_162 4294967296) 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= main_~ret5~0 (mod v_mapsum_~ret~0_BEFORE_RETURN_162 4294967296))) (and (not (< main_~i~2 99)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (<= main_~ret5~0 2147483647) (= (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_161 4294967296) (- 4294967296)) main_~ret5~0) (<= 0 (+ main_~ret5~0 2147483648)) (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_161 4294967296) 2147483647))) (and (not (< main_~i~2 99)) (<= (mod v_prenex_1193 4294967296) 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (= (mod v_prenex_1193 4294967296) main_~ret5~0) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)))))) (and (exists ((v_mapsum_~ret~0_BEFORE_RETURN_162 Int) (v_mapsum_~ret~0_BEFORE_RETURN_161 Int) (v_prenex_1194 Int) (v_prenex_1193 Int)) (or (and (not (< main_~i~2 99)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (<= main_~ret5~0 2147483647) (not (<= (mod v_prenex_1194 4294967296) 2147483647)) (<= 0 (+ main_~ret5~0 2147483648)) (= (+ (mod v_prenex_1194 4294967296) (- 4294967296)) main_~ret5~0)) (and (not (< main_~i~2 99)) (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_162 4294967296) 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= main_~ret5~0 (mod v_mapsum_~ret~0_BEFORE_RETURN_162 4294967296))) (and (not (< main_~i~2 99)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (<= main_~ret5~0 2147483647) (= (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_161 4294967296) (- 4294967296)) main_~ret5~0) (<= 0 (+ main_~ret5~0 2147483648)) (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_161 4294967296) 2147483647))) (and (not (< main_~i~2 99)) (<= (mod v_prenex_1193 4294967296) 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (= (mod v_prenex_1193 4294967296) main_~ret5~0) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648))))) (not (= main_~ret~1 main_~ret5~0)))) [2019-10-06 22:49:27,685 INFO L193 IcfgInterpreter]: Reachable states at location L42 satisfy 313#true [2019-10-06 22:49:27,685 INFO L193 IcfgInterpreter]: Reachable states at location mapsumEXIT satisfy 644#(and (<= 100 mapsum_~i~0) (= (ite (<= (mod mapsum_~ret~0 4294967296) 2147483647) (mod mapsum_~ret~0 4294967296) (+ (mod mapsum_~ret~0 4294967296) (- 4294967296))) |mapsum_#res|) (<= 0 mapsum_~i~0) (not (< mapsum_~i~0 100))) [2019-10-06 22:49:27,685 INFO L193 IcfgInterpreter]: Reachable states at location L33-1 satisfy 587#true [2019-10-06 22:49:27,685 INFO L193 IcfgInterpreter]: Reachable states at location L35-3 satisfy 560#true [2019-10-06 22:49:28,380 INFO L211 tionRefinementEngine]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2019-10-06 22:49:28,381 INFO L224 tionRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [59, 59, 59, 11] total 113 [2019-10-06 22:49:28,382 INFO L442 AbstractCegarLoop]: Interpolant automaton has 114 states [2019-10-06 22:49:28,383 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 114 interpolants. [2019-10-06 22:49:28,386 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5282, Invalid=7600, Unknown=0, NotChecked=0, Total=12882 [2019-10-06 22:49:28,387 INFO L87 Difference]: Start difference. First operand 83 states and 87 transitions. Second operand 114 states. [2019-10-06 22:49:36,746 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-06 22:49:36,747 INFO L93 Difference]: Finished difference Result 148 states and 199 transitions. [2019-10-06 22:49:36,747 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 113 states. [2019-10-06 22:49:36,747 INFO L78 Accepts]: Start accepts. Automaton has 114 states. Word has length 96 [2019-10-06 22:49:36,747 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-06 22:49:36,748 INFO L225 Difference]: With dead ends: 148 [2019-10-06 22:49:36,748 INFO L226 Difference]: Without dead ends: 127 [2019-10-06 22:49:36,756 INFO L606 BasicCegarLoop]: 0 DeclaredPredicates, 457 GetRequests, 223 SyntacticMatches, 14 SemanticMatches, 220 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9999 ImplicationChecksByTransitivity, 12.8s TimeCoverageRelationStatistics Valid=15637, Invalid=33425, Unknown=0, NotChecked=0, Total=49062 [2019-10-06 22:49:36,756 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 127 states. [2019-10-06 22:49:36,768 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 127 to 127. [2019-10-06 22:49:36,768 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 127 states. [2019-10-06 22:49:36,770 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 127 states to 127 states and 131 transitions. [2019-10-06 22:49:36,771 INFO L78 Accepts]: Start accepts. Automaton has 127 states and 131 transitions. Word has length 96 [2019-10-06 22:49:36,771 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-06 22:49:36,771 INFO L462 AbstractCegarLoop]: Abstraction has 127 states and 131 transitions. [2019-10-06 22:49:36,771 INFO L463 AbstractCegarLoop]: Interpolant automaton has 114 states. [2019-10-06 22:49:36,771 INFO L276 IsEmpty]: Start isEmpty. Operand 127 states and 131 transitions. [2019-10-06 22:49:36,774 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 141 [2019-10-06 22:49:36,774 INFO L377 BasicCegarLoop]: Found error trace [2019-10-06 22:49:36,774 INFO L385 BasicCegarLoop]: trace histogram [100, 12, 4, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-06 22:49:36,979 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 9 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-06 22:49:36,980 INFO L410 AbstractCegarLoop]: === Iteration 11 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-06 22:49:36,980 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-06 22:49:36,980 INFO L82 PathProgramCache]: Analyzing trace with hash -728041283, now seen corresponding path program 8 times [2019-10-06 22:49:36,980 INFO L150 tionRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-10-06 22:49:36,980 INFO L231 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2019-10-06 22:49:36,981 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-06 22:49:36,981 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-06 22:49:36,981 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-06 22:49:37,106 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-06 22:49:37,250 INFO L134 CoverageAnalysis]: Checked inductivity of 5171 backedges. 52 proven. 10 refuted. 0 times theorem prover too weak. 5109 trivial. 0 not checked. [2019-10-06 22:49:37,250 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2019-10-06 22:49:37,251 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2019-10-06 22:49:37,251 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-06 22:49:37,493 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 3 check-sat command(s) [2019-10-06 22:49:37,494 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-10-06 22:49:37,495 INFO L256 TraceCheckSpWp]: Trace formula consists of 153 conjuncts, 6 conjunts are in the unsatisfiable core [2019-10-06 22:49:37,502 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2019-10-06 22:49:37,525 INFO L134 CoverageAnalysis]: Checked inductivity of 5171 backedges. 52 proven. 10 refuted. 0 times theorem prover too weak. 5109 trivial. 0 not checked. [2019-10-06 22:49:37,525 INFO L322 TraceCheckSpWp]: Computing backward predicates... [2019-10-06 22:49:37,585 INFO L134 CoverageAnalysis]: Checked inductivity of 5171 backedges. 52 proven. 10 refuted. 0 times theorem prover too weak. 5109 trivial. 0 not checked. [2019-10-06 22:49:37,586 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSifa [2019-10-06 22:49:37,587 INFO L162 IcfgInterpreter]: Started Sifa with 19 locations of interest [2019-10-06 22:49:37,587 INFO L169 IcfgInterpreter]: Building call graph [2019-10-06 22:49:37,587 INFO L174 IcfgInterpreter]: Initial procedures are [ULTIMATE.start] [2019-10-06 22:49:37,588 INFO L179 IcfgInterpreter]: Starting interpretation [2019-10-06 22:49:37,588 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.start with input of size 1 for LOIs [2019-10-06 22:49:37,599 INFO L199 IcfgInterpreter]: Interpreting procedure main with input of size 21 for LOIs [2019-10-06 22:49:38,736 INFO L199 IcfgInterpreter]: Interpreting procedure mapsum with input of size 1 for LOIs [2019-10-06 22:49:38,759 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.init with input of size 10 for LOIs [2019-10-06 22:49:38,762 INFO L183 IcfgInterpreter]: Interpretation finished [2019-10-06 22:49:38,762 INFO L191 IcfgInterpreter]: Final predicates for locations of interest are: [2019-10-06 22:49:38,762 INFO L193 IcfgInterpreter]: Reachable states at location mapsumENTRY satisfy 601#true [2019-10-06 22:49:38,763 INFO L193 IcfgInterpreter]: Reachable states at location L26-4 satisfy 73#(and (not (< main_~i~1 100)) (<= 100 main_~i~1)) [2019-10-06 22:49:38,763 INFO L193 IcfgInterpreter]: Reachable states at location L33 satisfy 592#(exists ((v_prenex_1359 Int) (v_mapsum_~ret~0_BEFORE_RETURN_184 Int) (v_mapsum_~ret~0_BEFORE_RETURN_183 Int) (v_prenex_1360 Int)) (or (and (not (< main_~i~1 100)) (<= main_~ret~1 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (= (+ (mod v_prenex_1360 4294967296) (- 4294967296)) main_~ret~1) (not (<= (mod v_prenex_1360 4294967296) 2147483647)) (<= 0 (+ main_~ret~1 2147483648))) (and (not (< main_~i~1 100)) (<= main_~ret~1 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_184 4294967296) 2147483647) (= (mod v_mapsum_~ret~0_BEFORE_RETURN_184 4294967296) main_~ret~1) (<= 0 (+ main_~ret~1 2147483648))) (and (not (<= (mod v_prenex_1359 4294967296) 2147483647)) (not (< main_~i~1 100)) (<= main_~ret~1 2147483647) (= main_~ret~1 (+ (mod v_prenex_1359 4294967296) (- 4294967296))) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (<= 0 (+ main_~ret~1 2147483648))) (and (= main_~ret~1 (mod v_mapsum_~ret~0_BEFORE_RETURN_183 4294967296)) (not (< main_~i~1 100)) (<= main_~ret~1 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_183 4294967296) 2147483647) (<= 0 (+ main_~ret~1 2147483648))))) [2019-10-06 22:49:38,763 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initENTRY satisfy 648#(and (= |old(#NULL.base)| |#NULL.base|) (= |#valid| |old(#valid)|) (= |#NULL.offset| |old(#NULL.offset)|)) [2019-10-06 22:49:38,763 INFO L193 IcfgInterpreter]: Reachable states at location L26-3 satisfy 68#true [2019-10-06 22:49:38,763 INFO L193 IcfgInterpreter]: Reachable states at location L12-3 satisfy 639#(<= 0 mapsum_~i~0) [2019-10-06 22:49:38,764 INFO L193 IcfgInterpreter]: Reachable states at location L-1 satisfy 23#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= 0 (select |#valid| 0)) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-06 22:49:38,764 INFO L193 IcfgInterpreter]: Reachable states at location mainENTRY satisfy 33#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= |#valid| |old(#valid)|) (<= 0 |#NULL.base|) (= |#memory_int| |old(#memory_int)|) (= |#NULL.offset| 0) (= |old(#length)| |#length|) (= 0 (select |old(#valid)| 0)) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-06 22:49:38,764 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initEXIT satisfy 653#(and (= |#valid| (store |old(#valid)| 0 0)) (= 0 |#NULL.base|) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-06 22:49:38,764 INFO L193 IcfgInterpreter]: Reachable states at location L39-1 satisfy 479#true [2019-10-06 22:49:38,764 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.startENTRY satisfy 6#true [2019-10-06 22:49:38,764 INFO L193 IcfgInterpreter]: Reachable states at location L39 satisfy 522#(and (<= 99 main_~i~2) (not (< main_~i~2 99)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396)))) [2019-10-06 22:49:38,765 INFO L193 IcfgInterpreter]: Reachable states at location L30 satisfy 120#(or (exists ((v_mapsum_~ret~0_BEFORE_RETURN_184 Int) (v_prenex_1360 Int)) (or (and (not (< main_~i~1 100)) (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_184 4294967296) 2147483647) (= (mod v_mapsum_~ret~0_BEFORE_RETURN_184 4294967296) |main_#t~ret4|)) (and (not (< main_~i~1 100)) (= (+ (mod v_prenex_1360 4294967296) (- 4294967296)) |main_#t~ret4|) (not (<= (mod v_prenex_1360 4294967296) 2147483647))))) (exists ((v_prenex_1359 Int) (v_mapsum_~ret~0_BEFORE_RETURN_183 Int)) (or (and (not (< main_~i~1 100)) (= |main_#t~ret4| (mod v_mapsum_~ret~0_BEFORE_RETURN_183 4294967296)) (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_183 4294967296) 2147483647)) (and (not (<= (mod v_prenex_1359 4294967296) 2147483647)) (not (< main_~i~1 100)) (= (+ (mod v_prenex_1359 4294967296) (- 4294967296)) |main_#t~ret4|))))) [2019-10-06 22:49:38,765 INFO L193 IcfgInterpreter]: Reachable states at location L41 satisfy 424#true [2019-10-06 22:49:38,765 INFO L193 IcfgInterpreter]: Reachable states at location mainErr0ASSERT_VIOLATIONERROR_FUNCTION satisfy 234#(or (and (not (= main_~ret~1 main_~ret2~0)) (exists ((v_prenex_1388 Int) (v_prenex_1387 Int) (v_mapsum_~ret~0_BEFORE_RETURN_188 Int) (v_mapsum_~ret~0_BEFORE_RETURN_187 Int)) (or (and (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_187 4294967296) 2147483647) (not (< main_~i~2 99)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (mod v_mapsum_~ret~0_BEFORE_RETURN_187 4294967296) main_~ret5~0)) (and (not (< main_~i~2 99)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (mod v_prenex_1388 4294967296) main_~ret5~0) (<= (mod v_prenex_1388 4294967296) 2147483647)) (and (not (<= (mod v_prenex_1387 4294967296) 2147483647)) (= main_~ret5~0 (+ (mod v_prenex_1387 4294967296) (- 4294967296))) (not (< main_~i~2 99)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648))) (and (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_188 4294967296) 2147483647)) (not (< main_~i~2 99)) (= main_~ret5~0 (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_188 4294967296) (- 4294967296))) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)))))) (and (exists ((v_prenex_1388 Int) (v_prenex_1387 Int) (v_mapsum_~ret~0_BEFORE_RETURN_188 Int) (v_mapsum_~ret~0_BEFORE_RETURN_187 Int)) (or (and (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_187 4294967296) 2147483647) (not (< main_~i~2 99)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (mod v_mapsum_~ret~0_BEFORE_RETURN_187 4294967296) main_~ret5~0)) (and (not (< main_~i~2 99)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (mod v_prenex_1388 4294967296) main_~ret5~0) (<= (mod v_prenex_1388 4294967296) 2147483647)) (and (not (<= (mod v_prenex_1387 4294967296) 2147483647)) (= main_~ret5~0 (+ (mod v_prenex_1387 4294967296) (- 4294967296))) (not (< main_~i~2 99)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648))) (and (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_188 4294967296) 2147483647)) (not (< main_~i~2 99)) (= main_~ret5~0 (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_188 4294967296) (- 4294967296))) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648))))) (not (= main_~ret~1 main_~ret5~0)))) [2019-10-06 22:49:38,765 INFO L193 IcfgInterpreter]: Reachable states at location L42 satisfy 313#true [2019-10-06 22:49:38,765 INFO L193 IcfgInterpreter]: Reachable states at location mapsumEXIT satisfy 644#(and (<= 100 mapsum_~i~0) (= (ite (<= (mod mapsum_~ret~0 4294967296) 2147483647) (mod mapsum_~ret~0 4294967296) (+ (mod mapsum_~ret~0 4294967296) (- 4294967296))) |mapsum_#res|) (<= 0 mapsum_~i~0) (not (< mapsum_~i~0 100))) [2019-10-06 22:49:38,766 INFO L193 IcfgInterpreter]: Reachable states at location L33-1 satisfy 587#true [2019-10-06 22:49:38,766 INFO L193 IcfgInterpreter]: Reachable states at location L35-3 satisfy 560#true [2019-10-06 22:49:39,054 INFO L211 tionRefinementEngine]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2019-10-06 22:49:39,054 INFO L224 tionRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 7, 11] total 23 [2019-10-06 22:49:39,055 INFO L442 AbstractCegarLoop]: Interpolant automaton has 24 states [2019-10-06 22:49:39,056 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2019-10-06 22:49:39,056 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=108, Invalid=444, Unknown=0, NotChecked=0, Total=552 [2019-10-06 22:49:39,057 INFO L87 Difference]: Start difference. First operand 127 states and 131 transitions. Second operand 24 states. [2019-10-06 22:49:42,013 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-06 22:49:42,013 INFO L93 Difference]: Finished difference Result 153 states and 168 transitions. [2019-10-06 22:49:42,013 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2019-10-06 22:49:42,014 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 140 [2019-10-06 22:49:42,015 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-06 22:49:42,016 INFO L225 Difference]: With dead ends: 153 [2019-10-06 22:49:42,016 INFO L226 Difference]: Without dead ends: 133 [2019-10-06 22:49:42,017 INFO L606 BasicCegarLoop]: 0 DeclaredPredicates, 444 GetRequests, 404 SyntacticMatches, 0 SemanticMatches, 40 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 428 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=353, Invalid=1369, Unknown=0, NotChecked=0, Total=1722 [2019-10-06 22:49:42,017 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 133 states. [2019-10-06 22:49:42,030 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 133 to 133. [2019-10-06 22:49:42,030 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 133 states. [2019-10-06 22:49:42,031 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 133 states to 133 states and 137 transitions. [2019-10-06 22:49:42,031 INFO L78 Accepts]: Start accepts. Automaton has 133 states and 137 transitions. Word has length 140 [2019-10-06 22:49:42,032 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-06 22:49:42,032 INFO L462 AbstractCegarLoop]: Abstraction has 133 states and 137 transitions. [2019-10-06 22:49:42,032 INFO L463 AbstractCegarLoop]: Interpolant automaton has 24 states. [2019-10-06 22:49:42,032 INFO L276 IsEmpty]: Start isEmpty. Operand 133 states and 137 transitions. [2019-10-06 22:49:42,034 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 159 [2019-10-06 22:49:42,035 INFO L377 BasicCegarLoop]: Found error trace [2019-10-06 22:49:42,035 INFO L385 BasicCegarLoop]: trace histogram [100, 30, 4, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-06 22:49:42,238 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 10 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-06 22:49:42,239 INFO L410 AbstractCegarLoop]: === Iteration 12 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-06 22:49:42,239 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-06 22:49:42,239 INFO L82 PathProgramCache]: Analyzing trace with hash -1948933891, now seen corresponding path program 9 times [2019-10-06 22:49:42,240 INFO L150 tionRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-10-06 22:49:42,240 INFO L231 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2019-10-06 22:49:42,240 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-06 22:49:42,240 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-06 22:49:42,240 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-06 22:49:42,387 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-06 22:49:42,482 INFO L134 CoverageAnalysis]: Checked inductivity of 5594 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 5584 trivial. 0 not checked. [2019-10-06 22:49:42,483 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2019-10-06 22:49:42,483 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2019-10-06 22:49:42,483 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-06 22:49:42,864 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2019-10-06 22:49:42,864 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-10-06 22:49:42,867 INFO L256 TraceCheckSpWp]: Trace formula consists of 883 conjuncts, 12 conjunts are in the unsatisfiable core [2019-10-06 22:49:42,871 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2019-10-06 22:49:42,997 INFO L134 CoverageAnalysis]: Checked inductivity of 5594 backedges. 244 proven. 55 refuted. 0 times theorem prover too weak. 5295 trivial. 0 not checked. [2019-10-06 22:49:42,997 INFO L322 TraceCheckSpWp]: Computing backward predicates... [2019-10-06 22:49:43,258 INFO L134 CoverageAnalysis]: Checked inductivity of 5594 backedges. 0 proven. 299 refuted. 0 times theorem prover too weak. 5295 trivial. 0 not checked. [2019-10-06 22:49:43,258 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSifa [2019-10-06 22:49:43,259 INFO L162 IcfgInterpreter]: Started Sifa with 19 locations of interest [2019-10-06 22:49:43,259 INFO L169 IcfgInterpreter]: Building call graph [2019-10-06 22:49:43,260 INFO L174 IcfgInterpreter]: Initial procedures are [ULTIMATE.start] [2019-10-06 22:49:43,260 INFO L179 IcfgInterpreter]: Starting interpretation [2019-10-06 22:49:43,260 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.start with input of size 1 for LOIs [2019-10-06 22:49:43,272 INFO L199 IcfgInterpreter]: Interpreting procedure main with input of size 21 for LOIs [2019-10-06 22:49:44,341 INFO L199 IcfgInterpreter]: Interpreting procedure mapsum with input of size 1 for LOIs [2019-10-06 22:49:44,362 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.init with input of size 10 for LOIs [2019-10-06 22:49:44,365 INFO L183 IcfgInterpreter]: Interpretation finished [2019-10-06 22:49:44,365 INFO L191 IcfgInterpreter]: Final predicates for locations of interest are: [2019-10-06 22:49:44,365 INFO L193 IcfgInterpreter]: Reachable states at location mapsumENTRY satisfy 601#true [2019-10-06 22:49:44,365 INFO L193 IcfgInterpreter]: Reachable states at location L26-4 satisfy 73#(and (not (< main_~i~1 100)) (<= 100 main_~i~1)) [2019-10-06 22:49:44,366 INFO L193 IcfgInterpreter]: Reachable states at location L33 satisfy 592#(or (exists ((v_prenex_1554 Int) (v_prenex_1553 Int) (v_mapsum_~ret~0_BEFORE_RETURN_209 Int) (v_mapsum_~ret~0_BEFORE_RETURN_210 Int)) (or (and (not (< main_~i~1 100)) (<= main_~ret~1 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (= main_~ret~1 (mod v_prenex_1553 4294967296)) (<= (mod v_prenex_1553 4294967296) 2147483647) (<= 0 (+ main_~ret~1 2147483648))) (and (= (mod v_mapsum_~ret~0_BEFORE_RETURN_210 4294967296) main_~ret~1) (not (< main_~i~1 100)) (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_210 4294967296) 2147483647) (<= main_~ret~1 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (<= 0 (+ main_~ret~1 2147483648))) (and (= (+ (mod v_prenex_1554 4294967296) (- 4294967296)) main_~ret~1) (not (< main_~i~1 100)) (<= main_~ret~1 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (not (<= (mod v_prenex_1554 4294967296) 2147483647)) (<= 0 (+ main_~ret~1 2147483648))) (and (not (< main_~i~1 100)) (<= main_~ret~1 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_209 4294967296) 2147483647)) (= main_~ret~1 (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_209 4294967296) (- 4294967296))) (<= 0 (+ main_~ret~1 2147483648))))) (exists ((v_prenex_1554 Int) (v_prenex_1553 Int) (v_mapsum_~ret~0_BEFORE_RETURN_209 Int) (v_mapsum_~ret~0_BEFORE_RETURN_210 Int)) (or (and (not (< main_~i~1 100)) (<= main_~ret~1 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (<= (mod v_prenex_1553 4294967296) 2147483647) (= main_~ret~1 (mod v_prenex_1553 4294967296)) (<= 0 (+ main_~ret~1 2147483648))) (and (= (mod v_mapsum_~ret~0_BEFORE_RETURN_210 4294967296) main_~ret~1) (not (< main_~i~1 100)) (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_210 4294967296) 2147483647) (<= main_~ret~1 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (<= 0 (+ main_~ret~1 2147483648))) (and (= (+ (mod v_prenex_1554 4294967296) (- 4294967296)) main_~ret~1) (not (< main_~i~1 100)) (<= main_~ret~1 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (not (<= (mod v_prenex_1554 4294967296) 2147483647)) (<= 0 (+ main_~ret~1 2147483648))) (and (not (< main_~i~1 100)) (<= main_~ret~1 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_209 4294967296) 2147483647)) (= main_~ret~1 (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_209 4294967296) (- 4294967296))) (<= 0 (+ main_~ret~1 2147483648)))))) [2019-10-06 22:49:44,366 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initENTRY satisfy 648#(and (= |old(#NULL.base)| |#NULL.base|) (= |#valid| |old(#valid)|) (= |#NULL.offset| |old(#NULL.offset)|)) [2019-10-06 22:49:44,366 INFO L193 IcfgInterpreter]: Reachable states at location L26-3 satisfy 68#true [2019-10-06 22:49:44,366 INFO L193 IcfgInterpreter]: Reachable states at location L12-3 satisfy 639#(<= 0 mapsum_~i~0) [2019-10-06 22:49:44,366 INFO L193 IcfgInterpreter]: Reachable states at location L-1 satisfy 23#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= 0 (select |#valid| 0)) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-06 22:49:44,367 INFO L193 IcfgInterpreter]: Reachable states at location mainENTRY satisfy 33#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= |#valid| |old(#valid)|) (<= 0 |#NULL.base|) (= |#memory_int| |old(#memory_int)|) (= |#NULL.offset| 0) (= |old(#length)| |#length|) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (= 0 (select |old(#valid)| 0))) [2019-10-06 22:49:44,367 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initEXIT satisfy 653#(and (= |#valid| (store |old(#valid)| 0 0)) (= 0 |#NULL.base|) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-06 22:49:44,367 INFO L193 IcfgInterpreter]: Reachable states at location L39-1 satisfy 479#true [2019-10-06 22:49:44,367 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.startENTRY satisfy 6#true [2019-10-06 22:49:44,367 INFO L193 IcfgInterpreter]: Reachable states at location L39 satisfy 522#(and (<= 99 main_~i~2) (not (< main_~i~2 99)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396)))) [2019-10-06 22:49:44,367 INFO L193 IcfgInterpreter]: Reachable states at location L30 satisfy 120#(or (exists ((v_prenex_1554 Int) (v_mapsum_~ret~0_BEFORE_RETURN_210 Int)) (or (and (not (< main_~i~1 100)) (not (<= (mod v_prenex_1554 4294967296) 2147483647)) (= (+ (mod v_prenex_1554 4294967296) (- 4294967296)) |main_#t~ret4|)) (and (not (< main_~i~1 100)) (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_210 4294967296) 2147483647) (= (mod v_mapsum_~ret~0_BEFORE_RETURN_210 4294967296) |main_#t~ret4|)))) (exists ((v_prenex_1553 Int) (v_mapsum_~ret~0_BEFORE_RETURN_209 Int)) (or (and (not (< main_~i~1 100)) (= (mod v_prenex_1553 4294967296) |main_#t~ret4|) (<= (mod v_prenex_1553 4294967296) 2147483647)) (and (not (< main_~i~1 100)) (= |main_#t~ret4| (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_209 4294967296) (- 4294967296))) (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_209 4294967296) 2147483647)))))) [2019-10-06 22:49:44,367 INFO L193 IcfgInterpreter]: Reachable states at location L41 satisfy 424#true [2019-10-06 22:49:44,368 INFO L193 IcfgInterpreter]: Reachable states at location mainErr0ASSERT_VIOLATIONERROR_FUNCTION satisfy 234#(or (and (exists ((v_mapsum_~ret~0_BEFORE_RETURN_214 Int) (v_mapsum_~ret~0_BEFORE_RETURN_213 Int) (v_prenex_1582 Int) (v_prenex_1581 Int)) (or (and (= main_~ret5~0 (+ (mod v_prenex_1582 4294967296) (- 4294967296))) (not (< main_~i~2 99)) (not (<= (mod v_prenex_1582 4294967296) 2147483647)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648))) (and (= main_~ret5~0 (mod v_mapsum_~ret~0_BEFORE_RETURN_214 4294967296)) (not (< main_~i~2 99)) (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_214 4294967296) 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648))) (and (= main_~ret5~0 (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_213 4294967296) (- 4294967296))) (not (< main_~i~2 99)) (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_213 4294967296) 2147483647)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648))) (and (= main_~ret5~0 (mod v_prenex_1581 4294967296)) (not (< main_~i~2 99)) (<= (mod v_prenex_1581 4294967296) 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648))))) (not (= main_~ret~1 main_~ret5~0))) (and (not (= main_~ret~1 main_~ret2~0)) (exists ((v_mapsum_~ret~0_BEFORE_RETURN_214 Int) (v_mapsum_~ret~0_BEFORE_RETURN_213 Int) (v_prenex_1582 Int) (v_prenex_1581 Int)) (or (and (= main_~ret5~0 (+ (mod v_prenex_1582 4294967296) (- 4294967296))) (not (< main_~i~2 99)) (not (<= (mod v_prenex_1582 4294967296) 2147483647)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648))) (and (= main_~ret5~0 (mod v_mapsum_~ret~0_BEFORE_RETURN_214 4294967296)) (not (< main_~i~2 99)) (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_214 4294967296) 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648))) (and (= main_~ret5~0 (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_213 4294967296) (- 4294967296))) (not (< main_~i~2 99)) (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_213 4294967296) 2147483647)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648))) (and (= main_~ret5~0 (mod v_prenex_1581 4294967296)) (not (< main_~i~2 99)) (<= (mod v_prenex_1581 4294967296) 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648))))))) [2019-10-06 22:49:44,368 INFO L193 IcfgInterpreter]: Reachable states at location L42 satisfy 313#true [2019-10-06 22:49:44,368 INFO L193 IcfgInterpreter]: Reachable states at location mapsumEXIT satisfy 644#(and (<= 100 mapsum_~i~0) (= (ite (<= (mod mapsum_~ret~0 4294967296) 2147483647) (mod mapsum_~ret~0 4294967296) (+ (mod mapsum_~ret~0 4294967296) (- 4294967296))) |mapsum_#res|) (<= 0 mapsum_~i~0) (not (< mapsum_~i~0 100))) [2019-10-06 22:49:44,368 INFO L193 IcfgInterpreter]: Reachable states at location L33-1 satisfy 587#true [2019-10-06 22:49:44,368 INFO L193 IcfgInterpreter]: Reachable states at location L35-3 satisfy 560#true [2019-10-06 22:49:44,760 INFO L211 tionRefinementEngine]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2019-10-06 22:49:44,761 INFO L224 tionRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 13, 13, 11] total 39 [2019-10-06 22:49:44,762 INFO L442 AbstractCegarLoop]: Interpolant automaton has 40 states [2019-10-06 22:49:44,762 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 40 interpolants. [2019-10-06 22:49:44,763 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=325, Invalid=1235, Unknown=0, NotChecked=0, Total=1560 [2019-10-06 22:49:44,763 INFO L87 Difference]: Start difference. First operand 133 states and 137 transitions. Second operand 40 states. [2019-10-06 22:49:46,765 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-06 22:49:46,765 INFO L93 Difference]: Finished difference Result 172 states and 194 transitions. [2019-10-06 22:49:46,766 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 40 states. [2019-10-06 22:49:46,766 INFO L78 Accepts]: Start accepts. Automaton has 40 states. Word has length 158 [2019-10-06 22:49:46,767 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-06 22:49:46,768 INFO L225 Difference]: With dead ends: 172 [2019-10-06 22:49:46,768 INFO L226 Difference]: Without dead ends: 146 [2019-10-06 22:49:46,769 INFO L606 BasicCegarLoop]: 0 DeclaredPredicates, 516 GetRequests, 443 SyntacticMatches, 0 SemanticMatches, 73 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1298 ImplicationChecksByTransitivity, 2.3s TimeCoverageRelationStatistics Valid=1111, Invalid=4439, Unknown=0, NotChecked=0, Total=5550 [2019-10-06 22:49:46,769 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 146 states. [2019-10-06 22:49:46,784 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 146 to 146. [2019-10-06 22:49:46,784 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 146 states. [2019-10-06 22:49:46,785 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 146 states to 146 states and 150 transitions. [2019-10-06 22:49:46,785 INFO L78 Accepts]: Start accepts. Automaton has 146 states and 150 transitions. Word has length 158 [2019-10-06 22:49:46,785 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-06 22:49:46,785 INFO L462 AbstractCegarLoop]: Abstraction has 146 states and 150 transitions. [2019-10-06 22:49:46,786 INFO L463 AbstractCegarLoop]: Interpolant automaton has 40 states. [2019-10-06 22:49:46,786 INFO L276 IsEmpty]: Start isEmpty. Operand 146 states and 150 transitions. [2019-10-06 22:49:46,788 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 196 [2019-10-06 22:49:46,788 INFO L377 BasicCegarLoop]: Found error trace [2019-10-06 22:49:46,789 INFO L385 BasicCegarLoop]: trace histogram [100, 66, 5, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-06 22:49:46,994 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 11 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-06 22:49:46,994 INFO L410 AbstractCegarLoop]: === Iteration 13 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-06 22:49:46,994 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-06 22:49:46,994 INFO L82 PathProgramCache]: Analyzing trace with hash 2120433106, now seen corresponding path program 10 times [2019-10-06 22:49:46,995 INFO L150 tionRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-10-06 22:49:46,995 INFO L231 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2019-10-06 22:49:46,995 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-06 22:49:46,995 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-06 22:49:46,996 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-06 22:49:47,275 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-06 22:49:47,432 INFO L134 CoverageAnalysis]: Checked inductivity of 7417 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 7402 trivial. 0 not checked. [2019-10-06 22:49:47,433 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2019-10-06 22:49:47,433 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2019-10-06 22:49:47,433 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-06 22:49:47,904 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-06 22:49:47,909 INFO L256 TraceCheckSpWp]: Trace formula consists of 1067 conjuncts, 24 conjunts are in the unsatisfiable core [2019-10-06 22:49:47,913 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2019-10-06 22:49:48,281 INFO L134 CoverageAnalysis]: Checked inductivity of 7417 backedges. 1060 proven. 253 refuted. 0 times theorem prover too weak. 6104 trivial. 0 not checked. [2019-10-06 22:49:48,281 INFO L322 TraceCheckSpWp]: Computing backward predicates... [2019-10-06 22:49:48,989 INFO L134 CoverageAnalysis]: Checked inductivity of 7417 backedges. 0 proven. 1313 refuted. 0 times theorem prover too weak. 6104 trivial. 0 not checked. [2019-10-06 22:49:48,989 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSifa [2019-10-06 22:49:48,990 INFO L162 IcfgInterpreter]: Started Sifa with 19 locations of interest [2019-10-06 22:49:48,991 INFO L169 IcfgInterpreter]: Building call graph [2019-10-06 22:49:48,991 INFO L174 IcfgInterpreter]: Initial procedures are [ULTIMATE.start] [2019-10-06 22:49:48,991 INFO L179 IcfgInterpreter]: Starting interpretation [2019-10-06 22:49:48,991 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.start with input of size 1 for LOIs [2019-10-06 22:49:49,001 INFO L199 IcfgInterpreter]: Interpreting procedure main with input of size 21 for LOIs [2019-10-06 22:49:50,246 INFO L199 IcfgInterpreter]: Interpreting procedure mapsum with input of size 1 for LOIs [2019-10-06 22:49:50,267 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.init with input of size 10 for LOIs [2019-10-06 22:49:50,269 INFO L183 IcfgInterpreter]: Interpretation finished [2019-10-06 22:49:50,269 INFO L191 IcfgInterpreter]: Final predicates for locations of interest are: [2019-10-06 22:49:50,270 INFO L193 IcfgInterpreter]: Reachable states at location mapsumENTRY satisfy 601#true [2019-10-06 22:49:50,270 INFO L193 IcfgInterpreter]: Reachable states at location L26-4 satisfy 73#(and (not (< main_~i~1 100)) (<= 100 main_~i~1)) [2019-10-06 22:49:50,270 INFO L193 IcfgInterpreter]: Reachable states at location L33 satisfy 592#(exists ((v_mapsum_~ret~0_BEFORE_RETURN_236 Int) (v_mapsum_~ret~0_BEFORE_RETURN_235 Int) (v_prenex_1748 Int) (v_prenex_1747 Int)) (or (and (= (mod v_prenex_1748 4294967296) main_~ret~1) (not (< main_~i~1 100)) (<= main_~ret~1 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (<= (mod v_prenex_1748 4294967296) 2147483647) (<= 0 (+ main_~ret~1 2147483648))) (and (not (< main_~i~1 100)) (<= main_~ret~1 2147483647) (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_236 4294967296) 2147483647)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (= main_~ret~1 (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_236 4294967296) (- 4294967296))) (<= 0 (+ main_~ret~1 2147483648))) (and (not (< main_~i~1 100)) (<= main_~ret~1 2147483647) (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_235 4294967296) 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (= main_~ret~1 (mod v_mapsum_~ret~0_BEFORE_RETURN_235 4294967296)) (<= 0 (+ main_~ret~1 2147483648))) (and (not (<= (mod v_prenex_1747 4294967296) 2147483647)) (= main_~ret~1 (+ (mod v_prenex_1747 4294967296) (- 4294967296))) (not (< main_~i~1 100)) (<= main_~ret~1 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (<= 0 (+ main_~ret~1 2147483648))))) [2019-10-06 22:49:50,270 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initENTRY satisfy 648#(and (= |old(#NULL.base)| |#NULL.base|) (= |#valid| |old(#valid)|) (= |#NULL.offset| |old(#NULL.offset)|)) [2019-10-06 22:49:50,270 INFO L193 IcfgInterpreter]: Reachable states at location L26-3 satisfy 68#true [2019-10-06 22:49:50,270 INFO L193 IcfgInterpreter]: Reachable states at location L12-3 satisfy 639#(<= 0 mapsum_~i~0) [2019-10-06 22:49:50,271 INFO L193 IcfgInterpreter]: Reachable states at location L-1 satisfy 23#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= 0 (select |#valid| 0)) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-06 22:49:50,271 INFO L193 IcfgInterpreter]: Reachable states at location mainENTRY satisfy 33#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= |#valid| |old(#valid)|) (<= 0 |#NULL.base|) (= |#memory_int| |old(#memory_int)|) (= |#NULL.offset| 0) (= |old(#length)| |#length|) (= 0 (select |old(#valid)| 0)) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-06 22:49:50,271 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initEXIT satisfy 653#(and (= |#valid| (store |old(#valid)| 0 0)) (= 0 |#NULL.base|) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-06 22:49:50,271 INFO L193 IcfgInterpreter]: Reachable states at location L39-1 satisfy 479#true [2019-10-06 22:49:50,271 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.startENTRY satisfy 6#true [2019-10-06 22:49:50,271 INFO L193 IcfgInterpreter]: Reachable states at location L39 satisfy 522#(and (<= 99 main_~i~2) (not (< main_~i~2 99)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396)))) [2019-10-06 22:49:50,272 INFO L193 IcfgInterpreter]: Reachable states at location L30 satisfy 120#(or (exists ((v_mapsum_~ret~0_BEFORE_RETURN_235 Int) (v_prenex_1747 Int)) (or (and (not (<= (mod v_prenex_1747 4294967296) 2147483647)) (not (< main_~i~1 100)) (= (+ (mod v_prenex_1747 4294967296) (- 4294967296)) |main_#t~ret4|)) (and (not (< main_~i~1 100)) (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_235 4294967296) 2147483647) (= |main_#t~ret4| (mod v_mapsum_~ret~0_BEFORE_RETURN_235 4294967296))))) (exists ((v_mapsum_~ret~0_BEFORE_RETURN_236 Int) (v_prenex_1748 Int)) (or (and (not (< main_~i~1 100)) (<= (mod v_prenex_1748 4294967296) 2147483647) (= |main_#t~ret4| (mod v_prenex_1748 4294967296))) (and (not (< main_~i~1 100)) (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_236 4294967296) 2147483647)) (= |main_#t~ret4| (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_236 4294967296) (- 4294967296))))))) [2019-10-06 22:49:50,272 INFO L193 IcfgInterpreter]: Reachable states at location L41 satisfy 424#true [2019-10-06 22:49:50,272 INFO L193 IcfgInterpreter]: Reachable states at location mainErr0ASSERT_VIOLATIONERROR_FUNCTION satisfy 234#(or (and (exists ((v_prenex_1776 Int) (v_prenex_1775 Int) (v_mapsum_~ret~0_BEFORE_RETURN_239 Int) (v_mapsum_~ret~0_BEFORE_RETURN_240 Int)) (or (and (not (< main_~i~2 99)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (<= main_~ret5~0 2147483647) (= (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_239 4294967296) (- 4294967296)) main_~ret5~0) (<= 0 (+ main_~ret5~0 2147483648)) (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_239 4294967296) 2147483647))) (and (not (< main_~i~2 99)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (<= main_~ret5~0 2147483647) (= main_~ret5~0 (mod v_prenex_1776 4294967296)) (<= 0 (+ main_~ret5~0 2147483648)) (<= (mod v_prenex_1776 4294967296) 2147483647)) (and (not (< main_~i~2 99)) (<= (mod v_prenex_1775 4294967296) 2147483647) (= main_~ret5~0 (mod v_prenex_1775 4294967296)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648))) (and (not (< main_~i~2 99)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (= main_~ret5~0 (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_240 4294967296) (- 4294967296))) (<= main_~ret5~0 2147483647) (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_240 4294967296) 2147483647)) (<= 0 (+ main_~ret5~0 2147483648))))) (not (= main_~ret~1 main_~ret5~0))) (and (not (= main_~ret~1 main_~ret2~0)) (exists ((v_prenex_1776 Int) (v_prenex_1775 Int) (v_mapsum_~ret~0_BEFORE_RETURN_239 Int) (v_mapsum_~ret~0_BEFORE_RETURN_240 Int)) (or (and (not (< main_~i~2 99)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (<= main_~ret5~0 2147483647) (= (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_239 4294967296) (- 4294967296)) main_~ret5~0) (<= 0 (+ main_~ret5~0 2147483648)) (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_239 4294967296) 2147483647))) (and (not (< main_~i~2 99)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (<= main_~ret5~0 2147483647) (= main_~ret5~0 (mod v_prenex_1776 4294967296)) (<= 0 (+ main_~ret5~0 2147483648)) (<= (mod v_prenex_1776 4294967296) 2147483647)) (and (not (< main_~i~2 99)) (<= (mod v_prenex_1775 4294967296) 2147483647) (= main_~ret5~0 (mod v_prenex_1775 4294967296)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648))) (and (not (< main_~i~2 99)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (= main_~ret5~0 (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_240 4294967296) (- 4294967296))) (<= main_~ret5~0 2147483647) (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_240 4294967296) 2147483647)) (<= 0 (+ main_~ret5~0 2147483648))))))) [2019-10-06 22:49:50,272 INFO L193 IcfgInterpreter]: Reachable states at location L42 satisfy 313#true [2019-10-06 22:49:50,272 INFO L193 IcfgInterpreter]: Reachable states at location mapsumEXIT satisfy 644#(and (<= 100 mapsum_~i~0) (= (ite (<= (mod mapsum_~ret~0 4294967296) 2147483647) (mod mapsum_~ret~0 4294967296) (+ (mod mapsum_~ret~0 4294967296) (- 4294967296))) |mapsum_#res|) (<= 0 mapsum_~i~0) (not (< mapsum_~i~0 100))) [2019-10-06 22:49:50,272 INFO L193 IcfgInterpreter]: Reachable states at location L35-3 satisfy 560#true [2019-10-06 22:49:50,273 INFO L193 IcfgInterpreter]: Reachable states at location L33-1 satisfy 587#true [2019-10-06 22:49:50,747 INFO L211 tionRefinementEngine]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2019-10-06 22:49:50,748 INFO L224 tionRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 25, 25, 11] total 64 [2019-10-06 22:49:50,749 INFO L442 AbstractCegarLoop]: Interpolant automaton has 65 states [2019-10-06 22:49:50,750 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 65 interpolants. [2019-10-06 22:49:50,751 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=1184, Invalid=2976, Unknown=0, NotChecked=0, Total=4160 [2019-10-06 22:49:50,751 INFO L87 Difference]: Start difference. First operand 146 states and 150 transitions. Second operand 65 states. [2019-10-06 22:49:55,010 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-06 22:49:55,010 INFO L93 Difference]: Finished difference Result 210 states and 244 transitions. [2019-10-06 22:49:55,010 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 65 states. [2019-10-06 22:49:55,010 INFO L78 Accepts]: Start accepts. Automaton has 65 states. Word has length 195 [2019-10-06 22:49:55,011 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-06 22:49:55,013 INFO L225 Difference]: With dead ends: 210 [2019-10-06 22:49:55,013 INFO L226 Difference]: Without dead ends: 171 [2019-10-06 22:49:55,015 INFO L606 BasicCegarLoop]: 0 DeclaredPredicates, 653 GetRequests, 530 SyntacticMatches, 0 SemanticMatches, 123 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3411 ImplicationChecksByTransitivity, 5.2s TimeCoverageRelationStatistics Valid=3834, Invalid=11666, Unknown=0, NotChecked=0, Total=15500 [2019-10-06 22:49:55,015 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 171 states. [2019-10-06 22:49:55,033 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 171 to 171. [2019-10-06 22:49:55,033 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 171 states. [2019-10-06 22:49:55,034 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 171 states to 171 states and 175 transitions. [2019-10-06 22:49:55,035 INFO L78 Accepts]: Start accepts. Automaton has 171 states and 175 transitions. Word has length 195 [2019-10-06 22:49:55,035 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-06 22:49:55,035 INFO L462 AbstractCegarLoop]: Abstraction has 171 states and 175 transitions. [2019-10-06 22:49:55,035 INFO L463 AbstractCegarLoop]: Interpolant automaton has 65 states. [2019-10-06 22:49:55,035 INFO L276 IsEmpty]: Start isEmpty. Operand 171 states and 175 transitions. [2019-10-06 22:49:55,039 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 269 [2019-10-06 22:49:55,039 INFO L377 BasicCegarLoop]: Found error trace [2019-10-06 22:49:55,039 INFO L385 BasicCegarLoop]: trace histogram [138, 100, 6, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-06 22:49:55,248 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 12 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-06 22:49:55,249 INFO L410 AbstractCegarLoop]: === Iteration 14 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-06 22:49:55,250 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-06 22:49:55,250 INFO L82 PathProgramCache]: Analyzing trace with hash -384758499, now seen corresponding path program 11 times [2019-10-06 22:49:55,250 INFO L150 tionRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-10-06 22:49:55,250 INFO L231 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2019-10-06 22:49:55,251 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-06 22:49:55,251 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-06 22:49:55,251 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-06 22:49:55,678 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-06 22:49:56,999 INFO L134 CoverageAnalysis]: Checked inductivity of 14947 backedges. 4420 proven. 1081 refuted. 0 times theorem prover too weak. 9446 trivial. 0 not checked. [2019-10-06 22:49:57,000 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2019-10-06 22:49:57,000 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2019-10-06 22:49:57,000 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-06 22:49:57,447 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 5 check-sat command(s) [2019-10-06 22:49:57,447 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-10-06 22:49:57,449 INFO L256 TraceCheckSpWp]: Trace formula consists of 233 conjuncts, 8 conjunts are in the unsatisfiable core [2019-10-06 22:49:57,452 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2019-10-06 22:49:57,625 INFO L134 CoverageAnalysis]: Checked inductivity of 14947 backedges. 4422 proven. 21 refuted. 0 times theorem prover too weak. 10504 trivial. 0 not checked. [2019-10-06 22:49:57,625 INFO L322 TraceCheckSpWp]: Computing backward predicates... [2019-10-06 22:49:57,910 INFO L134 CoverageAnalysis]: Checked inductivity of 14947 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 14926 trivial. 0 not checked. [2019-10-06 22:49:57,910 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSifa [2019-10-06 22:49:57,913 INFO L162 IcfgInterpreter]: Started Sifa with 19 locations of interest [2019-10-06 22:49:57,913 INFO L169 IcfgInterpreter]: Building call graph [2019-10-06 22:49:57,914 INFO L174 IcfgInterpreter]: Initial procedures are [ULTIMATE.start] [2019-10-06 22:49:57,914 INFO L179 IcfgInterpreter]: Starting interpretation [2019-10-06 22:49:57,914 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.start with input of size 1 for LOIs [2019-10-06 22:49:57,937 INFO L199 IcfgInterpreter]: Interpreting procedure main with input of size 21 for LOIs [2019-10-06 22:49:59,061 INFO L199 IcfgInterpreter]: Interpreting procedure mapsum with input of size 1 for LOIs [2019-10-06 22:49:59,092 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.init with input of size 10 for LOIs [2019-10-06 22:49:59,096 INFO L183 IcfgInterpreter]: Interpretation finished [2019-10-06 22:49:59,096 INFO L191 IcfgInterpreter]: Final predicates for locations of interest are: [2019-10-06 22:49:59,096 INFO L193 IcfgInterpreter]: Reachable states at location mapsumENTRY satisfy 601#true [2019-10-06 22:49:59,096 INFO L193 IcfgInterpreter]: Reachable states at location L26-4 satisfy 73#(and (not (< main_~i~1 100)) (<= 100 main_~i~1)) [2019-10-06 22:49:59,096 INFO L193 IcfgInterpreter]: Reachable states at location L33 satisfy 592#(exists ((v_prenex_1942 Int) (v_prenex_1941 Int) (v_mapsum_~ret~0_BEFORE_RETURN_261 Int) (v_mapsum_~ret~0_BEFORE_RETURN_262 Int)) (or (and (not (< main_~i~1 100)) (<= main_~ret~1 2147483647) (= (mod v_prenex_1942 4294967296) main_~ret~1) (<= (mod v_prenex_1942 4294967296) 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (<= 0 (+ main_~ret~1 2147483648))) (and (not (< main_~i~1 100)) (<= main_~ret~1 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (= main_~ret~1 (mod v_prenex_1941 4294967296)) (<= (mod v_prenex_1941 4294967296) 2147483647) (<= 0 (+ main_~ret~1 2147483648))) (and (not (< main_~i~1 100)) (<= main_~ret~1 2147483647) (= (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_262 4294967296) (- 4294967296)) main_~ret~1) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_262 4294967296) 2147483647)) (<= 0 (+ main_~ret~1 2147483648))) (and (not (< main_~i~1 100)) (<= main_~ret~1 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_261 4294967296) 2147483647)) (= main_~ret~1 (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_261 4294967296) (- 4294967296))) (<= 0 (+ main_~ret~1 2147483648))))) [2019-10-06 22:49:59,096 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initENTRY satisfy 648#(and (= |old(#NULL.base)| |#NULL.base|) (= |#valid| |old(#valid)|) (= |#NULL.offset| |old(#NULL.offset)|)) [2019-10-06 22:49:59,096 INFO L193 IcfgInterpreter]: Reachable states at location L26-3 satisfy 68#true [2019-10-06 22:49:59,097 INFO L193 IcfgInterpreter]: Reachable states at location L12-3 satisfy 639#(<= 0 mapsum_~i~0) [2019-10-06 22:49:59,097 INFO L193 IcfgInterpreter]: Reachable states at location L-1 satisfy 23#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= 0 (select |#valid| 0)) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-06 22:49:59,097 INFO L193 IcfgInterpreter]: Reachable states at location mainENTRY satisfy 33#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= |#valid| |old(#valid)|) (<= 0 |#NULL.base|) (= |#memory_int| |old(#memory_int)|) (= |#NULL.offset| 0) (= |old(#length)| |#length|) (= 0 (select |old(#valid)| 0)) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-06 22:49:59,097 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initEXIT satisfy 653#(and (= |#valid| (store |old(#valid)| 0 0)) (= 0 |#NULL.base|) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-06 22:49:59,097 INFO L193 IcfgInterpreter]: Reachable states at location L39-1 satisfy 479#true [2019-10-06 22:49:59,097 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.startENTRY satisfy 6#true [2019-10-06 22:49:59,097 INFO L193 IcfgInterpreter]: Reachable states at location L39 satisfy 522#(and (<= 99 main_~i~2) (not (< main_~i~2 99)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396)))) [2019-10-06 22:49:59,097 INFO L193 IcfgInterpreter]: Reachable states at location L30 satisfy 120#(or (exists ((v_prenex_1942 Int) (v_mapsum_~ret~0_BEFORE_RETURN_262 Int)) (or (and (not (< main_~i~1 100)) (= (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_262 4294967296) (- 4294967296)) |main_#t~ret4|) (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_262 4294967296) 2147483647))) (and (not (< main_~i~1 100)) (<= (mod v_prenex_1942 4294967296) 2147483647) (= |main_#t~ret4| (mod v_prenex_1942 4294967296))))) (exists ((v_prenex_1941 Int) (v_mapsum_~ret~0_BEFORE_RETURN_261 Int)) (or (and (not (< main_~i~1 100)) (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_261 4294967296) 2147483647)) (= (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_261 4294967296) (- 4294967296)) |main_#t~ret4|)) (and (not (< main_~i~1 100)) (= (mod v_prenex_1941 4294967296) |main_#t~ret4|) (<= (mod v_prenex_1941 4294967296) 2147483647))))) [2019-10-06 22:49:59,097 INFO L193 IcfgInterpreter]: Reachable states at location L41 satisfy 424#true [2019-10-06 22:49:59,098 INFO L193 IcfgInterpreter]: Reachable states at location mainErr0ASSERT_VIOLATIONERROR_FUNCTION satisfy 234#(or (and (not (= main_~ret~1 main_~ret2~0)) (exists ((v_mapsum_~ret~0_BEFORE_RETURN_266 Int) (v_prenex_1970 Int) (v_prenex_1969 Int) (v_mapsum_~ret~0_BEFORE_RETURN_265 Int)) (or (and (not (<= (mod v_prenex_1970 4294967296) 2147483647)) (not (< main_~i~2 99)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (<= main_~ret5~0 2147483647) (= main_~ret5~0 (+ (mod v_prenex_1970 4294967296) (- 4294967296))) (<= 0 (+ main_~ret5~0 2147483648))) (and (not (< main_~i~2 99)) (= (mod v_mapsum_~ret~0_BEFORE_RETURN_266 4294967296) main_~ret5~0) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_266 4294967296) 2147483647)) (and (not (< main_~i~2 99)) (= main_~ret5~0 (+ (mod v_prenex_1969 4294967296) (- 4294967296))) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (not (<= (mod v_prenex_1969 4294967296) 2147483647)) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648))) (and (= main_~ret5~0 (mod v_mapsum_~ret~0_BEFORE_RETURN_265 4294967296)) (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_265 4294967296) 2147483647) (not (< main_~i~2 99)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)))))) (and (exists ((v_mapsum_~ret~0_BEFORE_RETURN_266 Int) (v_prenex_1970 Int) (v_prenex_1969 Int) (v_mapsum_~ret~0_BEFORE_RETURN_265 Int)) (or (and (not (<= (mod v_prenex_1970 4294967296) 2147483647)) (not (< main_~i~2 99)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (<= main_~ret5~0 2147483647) (= main_~ret5~0 (+ (mod v_prenex_1970 4294967296) (- 4294967296))) (<= 0 (+ main_~ret5~0 2147483648))) (and (not (< main_~i~2 99)) (= (mod v_mapsum_~ret~0_BEFORE_RETURN_266 4294967296) main_~ret5~0) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_266 4294967296) 2147483647)) (and (not (< main_~i~2 99)) (= main_~ret5~0 (+ (mod v_prenex_1969 4294967296) (- 4294967296))) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (not (<= (mod v_prenex_1969 4294967296) 2147483647)) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648))) (and (= main_~ret5~0 (mod v_mapsum_~ret~0_BEFORE_RETURN_265 4294967296)) (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_265 4294967296) 2147483647) (not (< main_~i~2 99)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648))))) (not (= main_~ret~1 main_~ret5~0)))) [2019-10-06 22:49:59,098 INFO L193 IcfgInterpreter]: Reachable states at location L42 satisfy 313#true [2019-10-06 22:49:59,098 INFO L193 IcfgInterpreter]: Reachable states at location mapsumEXIT satisfy 644#(and (<= 100 mapsum_~i~0) (= (ite (<= (mod mapsum_~ret~0 4294967296) 2147483647) (mod mapsum_~ret~0 4294967296) (+ (mod mapsum_~ret~0 4294967296) (- 4294967296))) |mapsum_#res|) (<= 0 mapsum_~i~0) (not (< mapsum_~i~0 100))) [2019-10-06 22:49:59,098 INFO L193 IcfgInterpreter]: Reachable states at location L35-3 satisfy 560#true [2019-10-06 22:49:59,098 INFO L193 IcfgInterpreter]: Reachable states at location L33-1 satisfy 587#true [2019-10-06 22:49:59,800 INFO L211 tionRefinementEngine]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2019-10-06 22:49:59,800 INFO L224 tionRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [49, 9, 9, 11] total 73 [2019-10-06 22:49:59,802 INFO L442 AbstractCegarLoop]: Interpolant automaton has 74 states [2019-10-06 22:49:59,802 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 74 interpolants. [2019-10-06 22:49:59,803 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=1325, Invalid=4077, Unknown=0, NotChecked=0, Total=5402 [2019-10-06 22:49:59,803 INFO L87 Difference]: Start difference. First operand 171 states and 175 transitions. Second operand 74 states. [2019-10-06 22:50:05,493 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-06 22:50:05,494 INFO L93 Difference]: Finished difference Result 244 states and 262 transitions. [2019-10-06 22:50:05,494 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 74 states. [2019-10-06 22:50:05,494 INFO L78 Accepts]: Start accepts. Automaton has 74 states. Word has length 268 [2019-10-06 22:50:05,495 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-06 22:50:05,496 INFO L225 Difference]: With dead ends: 244 [2019-10-06 22:50:05,496 INFO L226 Difference]: Without dead ends: 180 [2019-10-06 22:50:05,498 INFO L606 BasicCegarLoop]: 0 DeclaredPredicates, 921 GetRequests, 780 SyntacticMatches, 0 SemanticMatches, 141 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4142 ImplicationChecksByTransitivity, 7.1s TimeCoverageRelationStatistics Valid=4277, Invalid=16029, Unknown=0, NotChecked=0, Total=20306 [2019-10-06 22:50:05,498 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 180 states. [2019-10-06 22:50:05,510 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 180 to 180. [2019-10-06 22:50:05,510 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 180 states. [2019-10-06 22:50:05,511 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 180 states to 180 states and 184 transitions. [2019-10-06 22:50:05,512 INFO L78 Accepts]: Start accepts. Automaton has 180 states and 184 transitions. Word has length 268 [2019-10-06 22:50:05,512 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-06 22:50:05,512 INFO L462 AbstractCegarLoop]: Abstraction has 180 states and 184 transitions. [2019-10-06 22:50:05,512 INFO L463 AbstractCegarLoop]: Interpolant automaton has 74 states. [2019-10-06 22:50:05,512 INFO L276 IsEmpty]: Start isEmpty. Operand 180 states and 184 transitions. [2019-10-06 22:50:05,516 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 280 [2019-10-06 22:50:05,516 INFO L377 BasicCegarLoop]: Found error trace [2019-10-06 22:50:05,516 INFO L385 BasicCegarLoop]: trace histogram [141, 100, 14, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-06 22:50:05,721 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 13 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-06 22:50:05,721 INFO L410 AbstractCegarLoop]: === Iteration 15 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-06 22:50:05,722 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-06 22:50:05,722 INFO L82 PathProgramCache]: Analyzing trace with hash 1166344827, now seen corresponding path program 12 times [2019-10-06 22:50:05,722 INFO L150 tionRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-10-06 22:50:05,722 INFO L231 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2019-10-06 22:50:05,723 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-06 22:50:05,723 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-06 22:50:05,723 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-06 22:50:06,095 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-06 22:50:07,453 INFO L134 CoverageAnalysis]: Checked inductivity of 15457 backedges. 4610 proven. 1128 refuted. 0 times theorem prover too weak. 9719 trivial. 0 not checked. [2019-10-06 22:50:07,453 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2019-10-06 22:50:07,453 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2019-10-06 22:50:07,453 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-06 22:50:08,076 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2019-10-06 22:50:08,076 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-10-06 22:50:08,080 INFO L256 TraceCheckSpWp]: Trace formula consists of 1478 conjuncts, 49 conjunts are in the unsatisfiable core [2019-10-06 22:50:08,086 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2019-10-06 22:50:08,159 INFO L134 CoverageAnalysis]: Checked inductivity of 15457 backedges. 4610 proven. 1128 refuted. 0 times theorem prover too weak. 9719 trivial. 0 not checked. [2019-10-06 22:50:08,159 INFO L322 TraceCheckSpWp]: Computing backward predicates... [2019-10-06 22:50:11,159 INFO L134 CoverageAnalysis]: Checked inductivity of 15457 backedges. 0 proven. 5738 refuted. 0 times theorem prover too weak. 9719 trivial. 0 not checked. [2019-10-06 22:50:11,160 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSifa [2019-10-06 22:50:11,162 INFO L162 IcfgInterpreter]: Started Sifa with 19 locations of interest [2019-10-06 22:50:11,162 INFO L169 IcfgInterpreter]: Building call graph [2019-10-06 22:50:11,162 INFO L174 IcfgInterpreter]: Initial procedures are [ULTIMATE.start] [2019-10-06 22:50:11,162 INFO L179 IcfgInterpreter]: Starting interpretation [2019-10-06 22:50:11,163 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.start with input of size 1 for LOIs [2019-10-06 22:50:11,174 INFO L199 IcfgInterpreter]: Interpreting procedure main with input of size 21 for LOIs [2019-10-06 22:50:12,391 INFO L199 IcfgInterpreter]: Interpreting procedure mapsum with input of size 1 for LOIs [2019-10-06 22:50:12,421 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.init with input of size 10 for LOIs [2019-10-06 22:50:12,424 INFO L183 IcfgInterpreter]: Interpretation finished [2019-10-06 22:50:12,424 INFO L191 IcfgInterpreter]: Final predicates for locations of interest are: [2019-10-06 22:50:12,424 INFO L193 IcfgInterpreter]: Reachable states at location mapsumENTRY satisfy 601#true [2019-10-06 22:50:12,425 INFO L193 IcfgInterpreter]: Reachable states at location L26-4 satisfy 73#(and (not (< main_~i~1 100)) (<= 100 main_~i~1)) [2019-10-06 22:50:12,425 INFO L193 IcfgInterpreter]: Reachable states at location L33 satisfy 592#(exists ((v_mapsum_~ret~0_BEFORE_RETURN_288 Int) (v_prenex_2135 Int) (v_prenex_2136 Int) (v_mapsum_~ret~0_BEFORE_RETURN_287 Int)) (or (and (= (mod v_prenex_2135 4294967296) main_~ret~1) (not (< main_~i~1 100)) (<= main_~ret~1 2147483647) (<= (mod v_prenex_2135 4294967296) 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (<= 0 (+ main_~ret~1 2147483648))) (and (not (< main_~i~1 100)) (= (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_287 4294967296) (- 4294967296)) main_~ret~1) (<= main_~ret~1 2147483647) (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_287 4294967296) 2147483647)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (<= 0 (+ main_~ret~1 2147483648))) (and (not (< main_~i~1 100)) (<= main_~ret~1 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (= (+ (mod v_prenex_2136 4294967296) (- 4294967296)) main_~ret~1) (not (<= (mod v_prenex_2136 4294967296) 2147483647)) (<= 0 (+ main_~ret~1 2147483648))) (and (not (< main_~i~1 100)) (<= main_~ret~1 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_288 4294967296) 2147483647) (= main_~ret~1 (mod v_mapsum_~ret~0_BEFORE_RETURN_288 4294967296)) (<= 0 (+ main_~ret~1 2147483648))))) [2019-10-06 22:50:12,425 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initENTRY satisfy 648#(and (= |old(#NULL.base)| |#NULL.base|) (= |#valid| |old(#valid)|) (= |#NULL.offset| |old(#NULL.offset)|)) [2019-10-06 22:50:12,426 INFO L193 IcfgInterpreter]: Reachable states at location L26-3 satisfy 68#true [2019-10-06 22:50:12,426 INFO L193 IcfgInterpreter]: Reachable states at location L12-3 satisfy 639#(<= 0 mapsum_~i~0) [2019-10-06 22:50:12,426 INFO L193 IcfgInterpreter]: Reachable states at location L-1 satisfy 23#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= 0 (select |#valid| 0)) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-06 22:50:12,426 INFO L193 IcfgInterpreter]: Reachable states at location mainENTRY satisfy 33#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= |#valid| |old(#valid)|) (<= 0 |#NULL.base|) (= |#memory_int| |old(#memory_int)|) (= |#NULL.offset| 0) (= |old(#length)| |#length|) (= 0 (select |old(#valid)| 0)) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-06 22:50:12,426 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initEXIT satisfy 653#(and (= |#valid| (store |old(#valid)| 0 0)) (= 0 |#NULL.base|) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-06 22:50:12,426 INFO L193 IcfgInterpreter]: Reachable states at location L39-1 satisfy 479#true [2019-10-06 22:50:12,427 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.startENTRY satisfy 6#true [2019-10-06 22:50:12,427 INFO L193 IcfgInterpreter]: Reachable states at location L39 satisfy 522#(and (<= 99 main_~i~2) (not (< main_~i~2 99)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396)))) [2019-10-06 22:50:12,427 INFO L193 IcfgInterpreter]: Reachable states at location L30 satisfy 120#(or (exists ((v_prenex_2135 Int) (v_mapsum_~ret~0_BEFORE_RETURN_287 Int)) (or (and (not (< main_~i~1 100)) (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_287 4294967296) 2147483647)) (= (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_287 4294967296) (- 4294967296)) |main_#t~ret4|)) (and (not (< main_~i~1 100)) (<= (mod v_prenex_2135 4294967296) 2147483647) (= (mod v_prenex_2135 4294967296) |main_#t~ret4|)))) (exists ((v_mapsum_~ret~0_BEFORE_RETURN_288 Int) (v_prenex_2136 Int)) (or (and (not (< main_~i~1 100)) (= |main_#t~ret4| (mod v_mapsum_~ret~0_BEFORE_RETURN_288 4294967296)) (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_288 4294967296) 2147483647)) (and (not (< main_~i~1 100)) (not (<= (mod v_prenex_2136 4294967296) 2147483647)) (= |main_#t~ret4| (+ (mod v_prenex_2136 4294967296) (- 4294967296))))))) [2019-10-06 22:50:12,428 INFO L193 IcfgInterpreter]: Reachable states at location L41 satisfy 424#true [2019-10-06 22:50:12,434 INFO L193 IcfgInterpreter]: Reachable states at location mainErr0ASSERT_VIOLATIONERROR_FUNCTION satisfy 234#(or (and (not (= main_~ret~1 main_~ret5~0)) (exists ((v_prenex_2163 Int) (v_prenex_2164 Int) (v_mapsum_~ret~0_BEFORE_RETURN_292 Int) (v_mapsum_~ret~0_BEFORE_RETURN_291 Int)) (or (and (= main_~ret5~0 (mod v_prenex_2163 4294967296)) (not (< main_~i~2 99)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (<= main_~ret5~0 2147483647) (<= (mod v_prenex_2163 4294967296) 2147483647) (<= 0 (+ main_~ret5~0 2147483648))) (and (not (< main_~i~2 99)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_291 4294967296) 2147483647)) (<= main_~ret5~0 2147483647) (= (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_291 4294967296) (- 4294967296)) main_~ret5~0) (<= 0 (+ main_~ret5~0 2147483648))) (and (not (< main_~i~2 99)) (= (mod v_prenex_2164 4294967296) main_~ret5~0) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (<= main_~ret5~0 2147483647) (<= (mod v_prenex_2164 4294967296) 2147483647) (<= 0 (+ main_~ret5~0 2147483648))) (and (= (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_292 4294967296) (- 4294967296)) main_~ret5~0) (not (< main_~i~2 99)) (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_292 4294967296) 2147483647)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)))))) (and (not (= main_~ret~1 main_~ret2~0)) (exists ((v_prenex_2163 Int) (v_prenex_2164 Int) (v_mapsum_~ret~0_BEFORE_RETURN_292 Int) (v_mapsum_~ret~0_BEFORE_RETURN_291 Int)) (or (and (= main_~ret5~0 (mod v_prenex_2163 4294967296)) (not (< main_~i~2 99)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (<= main_~ret5~0 2147483647) (<= (mod v_prenex_2163 4294967296) 2147483647) (<= 0 (+ main_~ret5~0 2147483648))) (and (not (< main_~i~2 99)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_291 4294967296) 2147483647)) (<= main_~ret5~0 2147483647) (= (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_291 4294967296) (- 4294967296)) main_~ret5~0) (<= 0 (+ main_~ret5~0 2147483648))) (and (not (< main_~i~2 99)) (= (mod v_prenex_2164 4294967296) main_~ret5~0) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (<= main_~ret5~0 2147483647) (<= (mod v_prenex_2164 4294967296) 2147483647) (<= 0 (+ main_~ret5~0 2147483648))) (and (= (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_292 4294967296) (- 4294967296)) main_~ret5~0) (not (< main_~i~2 99)) (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_292 4294967296) 2147483647)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648))))))) [2019-10-06 22:50:12,436 INFO L193 IcfgInterpreter]: Reachable states at location L42 satisfy 313#true [2019-10-06 22:50:12,436 INFO L193 IcfgInterpreter]: Reachable states at location mapsumEXIT satisfy 644#(and (<= 100 mapsum_~i~0) (= (ite (<= (mod mapsum_~ret~0 4294967296) 2147483647) (mod mapsum_~ret~0 4294967296) (+ (mod mapsum_~ret~0 4294967296) (- 4294967296))) |mapsum_#res|) (<= 0 mapsum_~i~0) (not (< mapsum_~i~0 100))) [2019-10-06 22:50:12,436 INFO L193 IcfgInterpreter]: Reachable states at location L35-3 satisfy 560#true [2019-10-06 22:50:12,437 INFO L193 IcfgInterpreter]: Reachable states at location L33-1 satisfy 587#true [2019-10-06 22:50:13,161 INFO L211 tionRefinementEngine]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2019-10-06 22:50:13,161 INFO L224 tionRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [50, 50, 50, 11] total 109 [2019-10-06 22:50:13,162 INFO L442 AbstractCegarLoop]: Interpolant automaton has 110 states [2019-10-06 22:50:13,164 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 110 interpolants. [2019-10-06 22:50:13,165 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=4881, Invalid=7109, Unknown=0, NotChecked=0, Total=11990 [2019-10-06 22:50:13,165 INFO L87 Difference]: Start difference. First operand 180 states and 184 transitions. Second operand 110 states. [2019-10-06 22:50:23,742 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-06 22:50:23,743 INFO L93 Difference]: Finished difference Result 302 states and 360 transitions. [2019-10-06 22:50:23,743 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 109 states. [2019-10-06 22:50:23,743 INFO L78 Accepts]: Start accepts. Automaton has 110 states. Word has length 279 [2019-10-06 22:50:23,743 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-06 22:50:23,745 INFO L225 Difference]: With dead ends: 302 [2019-10-06 22:50:23,745 INFO L226 Difference]: Without dead ends: 229 [2019-10-06 22:50:23,748 INFO L606 BasicCegarLoop]: 0 DeclaredPredicates, 990 GetRequests, 778 SyntacticMatches, 0 SemanticMatches, 212 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8813 ImplicationChecksByTransitivity, 14.7s TimeCoverageRelationStatistics Valid=15016, Invalid=30566, Unknown=0, NotChecked=0, Total=45582 [2019-10-06 22:50:23,748 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 229 states. [2019-10-06 22:50:23,763 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 229 to 229. [2019-10-06 22:50:23,763 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 229 states. [2019-10-06 22:50:23,764 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 229 states to 229 states and 233 transitions. [2019-10-06 22:50:23,765 INFO L78 Accepts]: Start accepts. Automaton has 229 states and 233 transitions. Word has length 279 [2019-10-06 22:50:23,765 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-06 22:50:23,765 INFO L462 AbstractCegarLoop]: Abstraction has 229 states and 233 transitions. [2019-10-06 22:50:23,765 INFO L463 AbstractCegarLoop]: Interpolant automaton has 110 states. [2019-10-06 22:50:23,765 INFO L276 IsEmpty]: Start isEmpty. Operand 229 states and 233 transitions. [2019-10-06 22:50:23,768 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 427 [2019-10-06 22:50:23,768 INFO L377 BasicCegarLoop]: Found error trace [2019-10-06 22:50:23,769 INFO L385 BasicCegarLoop]: trace histogram [288, 100, 14, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-06 22:50:23,974 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 14 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-06 22:50:23,975 INFO L410 AbstractCegarLoop]: === Iteration 16 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-06 22:50:23,975 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-06 22:50:23,975 INFO L82 PathProgramCache]: Analyzing trace with hash 1264763997, now seen corresponding path program 13 times [2019-10-06 22:50:23,975 INFO L150 tionRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-10-06 22:50:23,976 INFO L231 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2019-10-06 22:50:23,976 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-06 22:50:23,976 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-06 22:50:23,976 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-06 22:50:24,774 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-06 22:50:28,583 INFO L134 CoverageAnalysis]: Checked inductivity of 47356 backedges. 18820 proven. 4656 refuted. 0 times theorem prover too weak. 23880 trivial. 0 not checked. [2019-10-06 22:50:28,584 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2019-10-06 22:50:28,584 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2019-10-06 22:50:28,584 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-06 22:50:29,315 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-06 22:50:29,323 INFO L256 TraceCheckSpWp]: Trace formula consists of 2213 conjuncts, 98 conjunts are in the unsatisfiable core [2019-10-06 22:50:29,331 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2019-10-06 22:50:29,487 INFO L134 CoverageAnalysis]: Checked inductivity of 47356 backedges. 18820 proven. 4656 refuted. 0 times theorem prover too weak. 23880 trivial. 0 not checked. [2019-10-06 22:50:29,487 INFO L322 TraceCheckSpWp]: Computing backward predicates... [2019-10-06 22:50:33,118 INFO L134 CoverageAnalysis]: Checked inductivity of 47356 backedges. 0 proven. 23476 refuted. 0 times theorem prover too weak. 23880 trivial. 0 not checked. [2019-10-06 22:50:33,119 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSifa [2019-10-06 22:50:33,120 INFO L162 IcfgInterpreter]: Started Sifa with 19 locations of interest [2019-10-06 22:50:33,120 INFO L169 IcfgInterpreter]: Building call graph [2019-10-06 22:50:33,121 INFO L174 IcfgInterpreter]: Initial procedures are [ULTIMATE.start] [2019-10-06 22:50:33,121 INFO L179 IcfgInterpreter]: Starting interpretation [2019-10-06 22:50:33,121 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.start with input of size 1 for LOIs [2019-10-06 22:50:33,143 INFO L199 IcfgInterpreter]: Interpreting procedure main with input of size 21 for LOIs [2019-10-06 22:50:34,281 INFO L199 IcfgInterpreter]: Interpreting procedure mapsum with input of size 1 for LOIs [2019-10-06 22:50:34,308 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.init with input of size 10 for LOIs [2019-10-06 22:50:34,310 INFO L183 IcfgInterpreter]: Interpretation finished [2019-10-06 22:50:34,310 INFO L191 IcfgInterpreter]: Final predicates for locations of interest are: [2019-10-06 22:50:34,310 INFO L193 IcfgInterpreter]: Reachable states at location mapsumENTRY satisfy 601#true [2019-10-06 22:50:34,310 INFO L193 IcfgInterpreter]: Reachable states at location L26-4 satisfy 73#(and (not (< main_~i~1 100)) (<= 100 main_~i~1)) [2019-10-06 22:50:34,310 INFO L193 IcfgInterpreter]: Reachable states at location L33 satisfy 592#(exists ((v_mapsum_~ret~0_BEFORE_RETURN_313 Int) (v_mapsum_~ret~0_BEFORE_RETURN_314 Int) (v_prenex_2330 Int) (v_prenex_2329 Int)) (or (and (not (< main_~i~1 100)) (<= main_~ret~1 2147483647) (= main_~ret~1 (+ (mod v_prenex_2329 4294967296) (- 4294967296))) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (not (<= (mod v_prenex_2329 4294967296) 2147483647)) (<= 0 (+ main_~ret~1 2147483648))) (and (= main_~ret~1 (mod v_mapsum_~ret~0_BEFORE_RETURN_314 4294967296)) (not (< main_~i~1 100)) (<= main_~ret~1 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_314 4294967296) 2147483647) (<= 0 (+ main_~ret~1 2147483648))) (and (not (< main_~i~1 100)) (= main_~ret~1 (mod v_mapsum_~ret~0_BEFORE_RETURN_313 4294967296)) (<= main_~ret~1 2147483647) (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_313 4294967296) 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (<= 0 (+ main_~ret~1 2147483648))) (and (= main_~ret~1 (+ (mod v_prenex_2330 4294967296) (- 4294967296))) (not (< main_~i~1 100)) (<= main_~ret~1 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (not (<= (mod v_prenex_2330 4294967296) 2147483647)) (<= 0 (+ main_~ret~1 2147483648))))) [2019-10-06 22:50:34,310 INFO L193 IcfgInterpreter]: Reachable states at location L26-3 satisfy 68#true [2019-10-06 22:50:34,311 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initENTRY satisfy 648#(and (= |old(#NULL.base)| |#NULL.base|) (= |#valid| |old(#valid)|) (= |#NULL.offset| |old(#NULL.offset)|)) [2019-10-06 22:50:34,311 INFO L193 IcfgInterpreter]: Reachable states at location L12-3 satisfy 639#(<= 0 mapsum_~i~0) [2019-10-06 22:50:34,311 INFO L193 IcfgInterpreter]: Reachable states at location L-1 satisfy 23#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= 0 (select |#valid| 0)) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-06 22:50:34,311 INFO L193 IcfgInterpreter]: Reachable states at location mainENTRY satisfy 33#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= |#valid| |old(#valid)|) (<= 0 |#NULL.base|) (= |#memory_int| |old(#memory_int)|) (= |#NULL.offset| 0) (= |old(#length)| |#length|) (= 0 (select |old(#valid)| 0)) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-06 22:50:34,311 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initEXIT satisfy 653#(and (= |#valid| (store |old(#valid)| 0 0)) (= 0 |#NULL.base|) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-06 22:50:34,311 INFO L193 IcfgInterpreter]: Reachable states at location L39-1 satisfy 479#true [2019-10-06 22:50:34,312 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.startENTRY satisfy 6#true [2019-10-06 22:50:34,312 INFO L193 IcfgInterpreter]: Reachable states at location L39 satisfy 522#(and (<= 99 main_~i~2) (not (< main_~i~2 99)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396)))) [2019-10-06 22:50:34,312 INFO L193 IcfgInterpreter]: Reachable states at location L30 satisfy 120#(or (exists ((v_mapsum_~ret~0_BEFORE_RETURN_313 Int) (v_prenex_2329 Int)) (or (and (not (< main_~i~1 100)) (not (<= (mod v_prenex_2329 4294967296) 2147483647)) (= (+ (mod v_prenex_2329 4294967296) (- 4294967296)) |main_#t~ret4|)) (and (not (< main_~i~1 100)) (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_313 4294967296) 2147483647) (= |main_#t~ret4| (mod v_mapsum_~ret~0_BEFORE_RETURN_313 4294967296))))) (exists ((v_mapsum_~ret~0_BEFORE_RETURN_314 Int) (v_prenex_2330 Int)) (or (and (= |main_#t~ret4| (+ (mod v_prenex_2330 4294967296) (- 4294967296))) (not (< main_~i~1 100)) (not (<= (mod v_prenex_2330 4294967296) 2147483647))) (and (not (< main_~i~1 100)) (= (mod v_mapsum_~ret~0_BEFORE_RETURN_314 4294967296) |main_#t~ret4|) (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_314 4294967296) 2147483647))))) [2019-10-06 22:50:34,312 INFO L193 IcfgInterpreter]: Reachable states at location L41 satisfy 424#true [2019-10-06 22:50:34,312 INFO L193 IcfgInterpreter]: Reachable states at location mainErr0ASSERT_VIOLATIONERROR_FUNCTION satisfy 234#(or (and (not (= main_~ret~1 main_~ret2~0)) (exists ((v_prenex_2358 Int) (v_mapsum_~ret~0_BEFORE_RETURN_317 Int) (v_prenex_2357 Int) (v_mapsum_~ret~0_BEFORE_RETURN_318 Int)) (or (and (<= (mod v_prenex_2357 4294967296) 2147483647) (not (< main_~i~2 99)) (= main_~ret5~0 (mod v_prenex_2357 4294967296)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648))) (and (not (< main_~i~2 99)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (= (mod v_prenex_2358 4294967296) main_~ret5~0) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (<= (mod v_prenex_2358 4294967296) 2147483647)) (and (not (< main_~i~2 99)) (= (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_318 4294967296) (- 4294967296)) main_~ret5~0) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_318 4294967296) 2147483647))) (and (not (< main_~i~2 99)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_317 4294967296) 2147483647)) (<= main_~ret5~0 2147483647) (= main_~ret5~0 (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_317 4294967296) (- 4294967296))) (<= 0 (+ main_~ret5~0 2147483648)))))) (and (exists ((v_prenex_2358 Int) (v_mapsum_~ret~0_BEFORE_RETURN_317 Int) (v_prenex_2357 Int) (v_mapsum_~ret~0_BEFORE_RETURN_318 Int)) (or (and (<= (mod v_prenex_2357 4294967296) 2147483647) (not (< main_~i~2 99)) (= main_~ret5~0 (mod v_prenex_2357 4294967296)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648))) (and (not (< main_~i~2 99)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (= (mod v_prenex_2358 4294967296) main_~ret5~0) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (<= (mod v_prenex_2358 4294967296) 2147483647)) (and (not (< main_~i~2 99)) (= (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_318 4294967296) (- 4294967296)) main_~ret5~0) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_318 4294967296) 2147483647))) (and (not (< main_~i~2 99)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_317 4294967296) 2147483647)) (<= main_~ret5~0 2147483647) (= main_~ret5~0 (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_317 4294967296) (- 4294967296))) (<= 0 (+ main_~ret5~0 2147483648))))) (not (= main_~ret~1 main_~ret5~0)))) [2019-10-06 22:50:34,313 INFO L193 IcfgInterpreter]: Reachable states at location L42 satisfy 313#true [2019-10-06 22:50:34,313 INFO L193 IcfgInterpreter]: Reachable states at location mapsumEXIT satisfy 644#(and (<= 100 mapsum_~i~0) (= (ite (<= (mod mapsum_~ret~0 4294967296) 2147483647) (mod mapsum_~ret~0 4294967296) (+ (mod mapsum_~ret~0 4294967296) (- 4294967296))) |mapsum_#res|) (<= 0 mapsum_~i~0) (not (< mapsum_~i~0 100))) [2019-10-06 22:50:34,313 INFO L193 IcfgInterpreter]: Reachable states at location L35-3 satisfy 560#true [2019-10-06 22:50:34,313 INFO L193 IcfgInterpreter]: Reachable states at location L33-1 satisfy 587#true [2019-10-06 22:50:35,261 INFO L211 tionRefinementEngine]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2019-10-06 22:50:35,262 INFO L224 tionRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [99, 99, 99, 11] total 113 [2019-10-06 22:50:35,263 INFO L442 AbstractCegarLoop]: Interpolant automaton has 114 states [2019-10-06 22:50:35,264 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 114 interpolants. [2019-10-06 22:50:35,265 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5283, Invalid=7599, Unknown=0, NotChecked=0, Total=12882 [2019-10-06 22:50:35,265 INFO L87 Difference]: Start difference. First operand 229 states and 233 transitions. Second operand 114 states. [2019-10-06 22:50:49,389 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-06 22:50:49,390 INFO L93 Difference]: Finished difference Result 355 states and 368 transitions. [2019-10-06 22:50:49,390 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 113 states. [2019-10-06 22:50:49,390 INFO L78 Accepts]: Start accepts. Automaton has 114 states. Word has length 426 [2019-10-06 22:50:49,391 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-06 22:50:49,393 INFO L225 Difference]: With dead ends: 355 [2019-10-06 22:50:49,393 INFO L226 Difference]: Without dead ends: 233 [2019-10-06 22:50:49,396 INFO L606 BasicCegarLoop]: 0 DeclaredPredicates, 1484 GetRequests, 1170 SyntacticMatches, 94 SemanticMatches, 220 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 12200 ImplicationChecksByTransitivity, 21.4s TimeCoverageRelationStatistics Valid=16238, Invalid=32823, Unknown=1, NotChecked=0, Total=49062 [2019-10-06 22:50:49,396 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 233 states. [2019-10-06 22:50:49,410 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 233 to 233. [2019-10-06 22:50:49,410 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 233 states. [2019-10-06 22:50:49,412 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 233 states to 233 states and 237 transitions. [2019-10-06 22:50:49,412 INFO L78 Accepts]: Start accepts. Automaton has 233 states and 237 transitions. Word has length 426 [2019-10-06 22:50:49,412 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-06 22:50:49,413 INFO L462 AbstractCegarLoop]: Abstraction has 233 states and 237 transitions. [2019-10-06 22:50:49,413 INFO L463 AbstractCegarLoop]: Interpolant automaton has 114 states. [2019-10-06 22:50:49,413 INFO L276 IsEmpty]: Start isEmpty. Operand 233 states and 237 transitions. [2019-10-06 22:50:49,416 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 439 [2019-10-06 22:50:49,416 INFO L377 BasicCegarLoop]: Found error trace [2019-10-06 22:50:49,416 INFO L385 BasicCegarLoop]: trace histogram [300, 100, 14, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-06 22:50:49,623 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 15 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-06 22:50:49,623 INFO L410 AbstractCegarLoop]: === Iteration 17 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-06 22:50:49,623 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-06 22:50:49,624 INFO L82 PathProgramCache]: Analyzing trace with hash 1589684701, now seen corresponding path program 14 times [2019-10-06 22:50:49,624 INFO L150 tionRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-10-06 22:50:49,624 INFO L231 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2019-10-06 22:50:49,624 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-06 22:50:49,625 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-06 22:50:49,625 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-06 22:50:50,098 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-06 22:50:50,557 INFO L134 CoverageAnalysis]: Checked inductivity of 50914 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 50809 trivial. 0 not checked. [2019-10-06 22:50:50,557 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2019-10-06 22:50:50,557 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2019-10-06 22:50:50,558 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-06 22:50:52,328 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 9 check-sat command(s) [2019-10-06 22:50:52,328 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-10-06 22:50:52,332 INFO L256 TraceCheckSpWp]: Trace formula consists of 393 conjuncts, 16 conjunts are in the unsatisfiable core [2019-10-06 22:50:52,338 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2019-10-06 22:50:52,411 INFO L134 CoverageAnalysis]: Checked inductivity of 50914 backedges. 20406 proven. 105 refuted. 0 times theorem prover too weak. 30403 trivial. 0 not checked. [2019-10-06 22:50:52,412 INFO L322 TraceCheckSpWp]: Computing backward predicates... [2019-10-06 22:50:52,956 INFO L134 CoverageAnalysis]: Checked inductivity of 50914 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 50809 trivial. 0 not checked. [2019-10-06 22:50:52,957 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSifa [2019-10-06 22:50:52,958 INFO L162 IcfgInterpreter]: Started Sifa with 19 locations of interest [2019-10-06 22:50:52,958 INFO L169 IcfgInterpreter]: Building call graph [2019-10-06 22:50:52,958 INFO L174 IcfgInterpreter]: Initial procedures are [ULTIMATE.start] [2019-10-06 22:50:52,958 INFO L179 IcfgInterpreter]: Starting interpretation [2019-10-06 22:50:52,959 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.start with input of size 1 for LOIs [2019-10-06 22:50:52,972 INFO L199 IcfgInterpreter]: Interpreting procedure main with input of size 21 for LOIs [2019-10-06 22:50:54,036 INFO L199 IcfgInterpreter]: Interpreting procedure mapsum with input of size 1 for LOIs [2019-10-06 22:50:54,061 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.init with input of size 10 for LOIs [2019-10-06 22:50:54,064 INFO L183 IcfgInterpreter]: Interpretation finished [2019-10-06 22:50:54,064 INFO L191 IcfgInterpreter]: Final predicates for locations of interest are: [2019-10-06 22:50:54,064 INFO L193 IcfgInterpreter]: Reachable states at location mapsumENTRY satisfy 601#true [2019-10-06 22:50:54,064 INFO L193 IcfgInterpreter]: Reachable states at location L26-4 satisfy 73#(and (not (< main_~i~1 100)) (<= 100 main_~i~1)) [2019-10-06 22:50:54,065 INFO L193 IcfgInterpreter]: Reachable states at location L33 satisfy 592#(exists ((v_prenex_2523 Int) (v_prenex_2524 Int) (v_mapsum_~ret~0_BEFORE_RETURN_339 Int) (v_mapsum_~ret~0_BEFORE_RETURN_340 Int)) (or (and (not (< main_~i~1 100)) (<= main_~ret~1 2147483647) (= (mod v_mapsum_~ret~0_BEFORE_RETURN_340 4294967296) main_~ret~1) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_340 4294967296) 2147483647) (<= 0 (+ main_~ret~1 2147483648))) (and (not (< main_~i~1 100)) (<= main_~ret~1 2147483647) (= main_~ret~1 (mod v_prenex_2523 4294967296)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (<= (mod v_prenex_2523 4294967296) 2147483647) (<= 0 (+ main_~ret~1 2147483648))) (and (= (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_339 4294967296) (- 4294967296)) main_~ret~1) (not (< main_~i~1 100)) (<= main_~ret~1 2147483647) (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_339 4294967296) 2147483647)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (<= 0 (+ main_~ret~1 2147483648))) (and (not (< main_~i~1 100)) (<= main_~ret~1 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (not (<= (mod v_prenex_2524 4294967296) 2147483647)) (= (+ (mod v_prenex_2524 4294967296) (- 4294967296)) main_~ret~1) (<= 0 (+ main_~ret~1 2147483648))))) [2019-10-06 22:50:54,065 INFO L193 IcfgInterpreter]: Reachable states at location L26-3 satisfy 68#true [2019-10-06 22:50:54,065 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initENTRY satisfy 648#(and (= |old(#NULL.base)| |#NULL.base|) (= |#valid| |old(#valid)|) (= |#NULL.offset| |old(#NULL.offset)|)) [2019-10-06 22:50:54,065 INFO L193 IcfgInterpreter]: Reachable states at location L12-3 satisfy 639#(<= 0 mapsum_~i~0) [2019-10-06 22:50:54,065 INFO L193 IcfgInterpreter]: Reachable states at location L-1 satisfy 23#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= 0 (select |#valid| 0)) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-06 22:50:54,065 INFO L193 IcfgInterpreter]: Reachable states at location mainENTRY satisfy 33#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= |#valid| |old(#valid)|) (<= 0 |#NULL.base|) (= |#memory_int| |old(#memory_int)|) (= |#NULL.offset| 0) (= |old(#length)| |#length|) (= 0 (select |old(#valid)| 0)) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-06 22:50:54,066 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initEXIT satisfy 653#(and (= |#valid| (store |old(#valid)| 0 0)) (= 0 |#NULL.base|) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-06 22:50:54,066 INFO L193 IcfgInterpreter]: Reachable states at location L39-1 satisfy 479#true [2019-10-06 22:50:54,066 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.startENTRY satisfy 6#true [2019-10-06 22:50:54,066 INFO L193 IcfgInterpreter]: Reachable states at location L39 satisfy 522#(and (<= 99 main_~i~2) (not (< main_~i~2 99)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396)))) [2019-10-06 22:50:54,066 INFO L193 IcfgInterpreter]: Reachable states at location L30 satisfy 120#(or (exists ((v_prenex_2523 Int) (v_mapsum_~ret~0_BEFORE_RETURN_339 Int)) (or (and (not (< main_~i~1 100)) (<= (mod v_prenex_2523 4294967296) 2147483647) (= |main_#t~ret4| (mod v_prenex_2523 4294967296))) (and (not (< main_~i~1 100)) (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_339 4294967296) 2147483647)) (= (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_339 4294967296) (- 4294967296)) |main_#t~ret4|)))) (exists ((v_prenex_2524 Int) (v_mapsum_~ret~0_BEFORE_RETURN_340 Int)) (or (and (not (< main_~i~1 100)) (= (mod v_mapsum_~ret~0_BEFORE_RETURN_340 4294967296) |main_#t~ret4|) (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_340 4294967296) 2147483647)) (and (not (< main_~i~1 100)) (not (<= (mod v_prenex_2524 4294967296) 2147483647)) (= (+ (mod v_prenex_2524 4294967296) (- 4294967296)) |main_#t~ret4|))))) [2019-10-06 22:50:54,067 INFO L193 IcfgInterpreter]: Reachable states at location L41 satisfy 424#true [2019-10-06 22:50:54,067 INFO L193 IcfgInterpreter]: Reachable states at location mainErr0ASSERT_VIOLATIONERROR_FUNCTION satisfy 234#(or (and (not (= main_~ret~1 main_~ret2~0)) (exists ((v_mapsum_~ret~0_BEFORE_RETURN_344 Int) (v_mapsum_~ret~0_BEFORE_RETURN_343 Int) (v_prenex_2552 Int) (v_prenex_2551 Int)) (or (and (not (< main_~i~2 99)) (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_344 4294967296) 2147483647)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (= (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_344 4294967296) (- 4294967296)) main_~ret5~0) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648))) (and (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_343 4294967296) 2147483647) (not (< main_~i~2 99)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (<= main_~ret5~0 2147483647) (= main_~ret5~0 (mod v_mapsum_~ret~0_BEFORE_RETURN_343 4294967296)) (<= 0 (+ main_~ret5~0 2147483648))) (and (not (<= (mod v_prenex_2551 4294967296) 2147483647)) (not (< main_~i~2 99)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (+ (mod v_prenex_2551 4294967296) (- 4294967296)) main_~ret5~0)) (and (not (< main_~i~2 99)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (<= (mod v_prenex_2552 4294967296) 2147483647) (= main_~ret5~0 (mod v_prenex_2552 4294967296)))))) (and (exists ((v_mapsum_~ret~0_BEFORE_RETURN_344 Int) (v_mapsum_~ret~0_BEFORE_RETURN_343 Int) (v_prenex_2552 Int) (v_prenex_2551 Int)) (or (and (not (< main_~i~2 99)) (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_344 4294967296) 2147483647)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (= (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_344 4294967296) (- 4294967296)) main_~ret5~0) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648))) (and (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_343 4294967296) 2147483647) (not (< main_~i~2 99)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (<= main_~ret5~0 2147483647) (= main_~ret5~0 (mod v_mapsum_~ret~0_BEFORE_RETURN_343 4294967296)) (<= 0 (+ main_~ret5~0 2147483648))) (and (not (<= (mod v_prenex_2551 4294967296) 2147483647)) (not (< main_~i~2 99)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (+ (mod v_prenex_2551 4294967296) (- 4294967296)) main_~ret5~0)) (and (not (< main_~i~2 99)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (<= (mod v_prenex_2552 4294967296) 2147483647) (= main_~ret5~0 (mod v_prenex_2552 4294967296))))) (not (= main_~ret~1 main_~ret5~0)))) [2019-10-06 22:50:54,067 INFO L193 IcfgInterpreter]: Reachable states at location L42 satisfy 313#true [2019-10-06 22:50:54,067 INFO L193 IcfgInterpreter]: Reachable states at location mapsumEXIT satisfy 644#(and (<= 100 mapsum_~i~0) (= (ite (<= (mod mapsum_~ret~0 4294967296) 2147483647) (mod mapsum_~ret~0 4294967296) (+ (mod mapsum_~ret~0 4294967296) (- 4294967296))) |mapsum_#res|) (<= 0 mapsum_~i~0) (not (< mapsum_~i~0 100))) [2019-10-06 22:50:54,067 INFO L193 IcfgInterpreter]: Reachable states at location L35-3 satisfy 560#true [2019-10-06 22:50:54,068 INFO L193 IcfgInterpreter]: Reachable states at location L33-1 satisfy 587#true [2019-10-06 22:50:54,444 INFO L211 tionRefinementEngine]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2019-10-06 22:50:54,444 INFO L224 tionRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 17, 17, 11] total 43 [2019-10-06 22:50:54,446 INFO L442 AbstractCegarLoop]: Interpolant automaton has 44 states [2019-10-06 22:50:54,446 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 44 interpolants. [2019-10-06 22:50:54,447 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=557, Invalid=1335, Unknown=0, NotChecked=0, Total=1892 [2019-10-06 22:50:54,447 INFO L87 Difference]: Start difference. First operand 233 states and 237 transitions. Second operand 44 states. [2019-10-06 22:50:56,315 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-06 22:50:56,315 INFO L93 Difference]: Finished difference Result 357 states and 377 transitions. [2019-10-06 22:50:56,315 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 43 states. [2019-10-06 22:50:56,316 INFO L78 Accepts]: Start accepts. Automaton has 44 states. Word has length 438 [2019-10-06 22:50:56,317 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-06 22:50:56,319 INFO L225 Difference]: With dead ends: 357 [2019-10-06 22:50:56,319 INFO L226 Difference]: Without dead ends: 249 [2019-10-06 22:50:56,320 INFO L606 BasicCegarLoop]: 0 DeclaredPredicates, 1369 GetRequests, 1289 SyntacticMatches, 0 SemanticMatches, 80 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1551 ImplicationChecksByTransitivity, 2.4s TimeCoverageRelationStatistics Valid=1662, Invalid=4980, Unknown=0, NotChecked=0, Total=6642 [2019-10-06 22:50:56,321 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 249 states. [2019-10-06 22:50:56,336 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 249 to 249. [2019-10-06 22:50:56,336 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 249 states. [2019-10-06 22:50:56,337 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 249 states to 249 states and 253 transitions. [2019-10-06 22:50:56,337 INFO L78 Accepts]: Start accepts. Automaton has 249 states and 253 transitions. Word has length 438 [2019-10-06 22:50:56,338 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-06 22:50:56,338 INFO L462 AbstractCegarLoop]: Abstraction has 249 states and 253 transitions. [2019-10-06 22:50:56,338 INFO L463 AbstractCegarLoop]: Interpolant automaton has 44 states. [2019-10-06 22:50:56,338 INFO L276 IsEmpty]: Start isEmpty. Operand 249 states and 253 transitions. [2019-10-06 22:50:56,341 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 455 [2019-10-06 22:50:56,341 INFO L377 BasicCegarLoop]: Found error trace [2019-10-06 22:50:56,341 INFO L385 BasicCegarLoop]: trace histogram [300, 100, 30, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-06 22:50:56,542 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 16 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-06 22:50:56,542 INFO L410 AbstractCegarLoop]: === Iteration 18 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-06 22:50:56,543 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-06 22:50:56,543 INFO L82 PathProgramCache]: Analyzing trace with hash 1200725725, now seen corresponding path program 15 times [2019-10-06 22:50:56,543 INFO L150 tionRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-10-06 22:50:56,543 INFO L231 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2019-10-06 22:50:56,544 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-06 22:50:56,544 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-06 22:50:56,544 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-06 22:50:57,159 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-06 22:50:57,813 INFO L134 CoverageAnalysis]: Checked inductivity of 51274 backedges. 0 proven. 465 refuted. 0 times theorem prover too weak. 50809 trivial. 0 not checked. [2019-10-06 22:50:57,813 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2019-10-06 22:50:57,813 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2019-10-06 22:50:57,814 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 17 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 17 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-06 22:50:58,639 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2019-10-06 22:50:58,640 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-10-06 22:50:58,647 INFO L256 TraceCheckSpWp]: Trace formula consists of 2337 conjuncts, 32 conjunts are in the unsatisfiable core [2019-10-06 22:50:58,652 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2019-10-06 22:50:58,936 INFO L134 CoverageAnalysis]: Checked inductivity of 51274 backedges. 20406 proven. 465 refuted. 0 times theorem prover too weak. 30403 trivial. 0 not checked. [2019-10-06 22:50:58,937 INFO L322 TraceCheckSpWp]: Computing backward predicates... [2019-10-06 22:51:00,344 INFO L134 CoverageAnalysis]: Checked inductivity of 51274 backedges. 0 proven. 465 refuted. 0 times theorem prover too weak. 50809 trivial. 0 not checked. [2019-10-06 22:51:00,345 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSifa [2019-10-06 22:51:00,345 INFO L162 IcfgInterpreter]: Started Sifa with 19 locations of interest [2019-10-06 22:51:00,346 INFO L169 IcfgInterpreter]: Building call graph [2019-10-06 22:51:00,346 INFO L174 IcfgInterpreter]: Initial procedures are [ULTIMATE.start] [2019-10-06 22:51:00,346 INFO L179 IcfgInterpreter]: Starting interpretation [2019-10-06 22:51:00,346 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.start with input of size 1 for LOIs [2019-10-06 22:51:00,357 INFO L199 IcfgInterpreter]: Interpreting procedure main with input of size 21 for LOIs [2019-10-06 22:51:01,400 INFO L199 IcfgInterpreter]: Interpreting procedure mapsum with input of size 1 for LOIs [2019-10-06 22:51:01,419 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.init with input of size 10 for LOIs [2019-10-06 22:51:01,421 INFO L183 IcfgInterpreter]: Interpretation finished [2019-10-06 22:51:01,421 INFO L191 IcfgInterpreter]: Final predicates for locations of interest are: [2019-10-06 22:51:01,421 INFO L193 IcfgInterpreter]: Reachable states at location mapsumENTRY satisfy 601#true [2019-10-06 22:51:01,421 INFO L193 IcfgInterpreter]: Reachable states at location L26-4 satisfy 73#(and (not (< main_~i~1 100)) (<= 100 main_~i~1)) [2019-10-06 22:51:01,421 INFO L193 IcfgInterpreter]: Reachable states at location L33 satisfy 592#(exists ((v_mapsum_~ret~0_BEFORE_RETURN_366 Int) (v_mapsum_~ret~0_BEFORE_RETURN_365 Int) (v_prenex_2718 Int) (v_prenex_2717 Int)) (or (and (not (< main_~i~1 100)) (= main_~ret~1 (mod v_mapsum_~ret~0_BEFORE_RETURN_366 4294967296)) (<= main_~ret~1 2147483647) (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_366 4294967296) 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (<= 0 (+ main_~ret~1 2147483648))) (and (not (< main_~i~1 100)) (<= (mod v_prenex_2717 4294967296) 2147483647) (<= main_~ret~1 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (= main_~ret~1 (mod v_prenex_2717 4294967296)) (<= 0 (+ main_~ret~1 2147483648))) (and (not (< main_~i~1 100)) (<= main_~ret~1 2147483647) (= main_~ret~1 (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_365 4294967296) (- 4294967296))) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_365 4294967296) 2147483647)) (<= 0 (+ main_~ret~1 2147483648))) (and (not (< main_~i~1 100)) (<= main_~ret~1 2147483647) (= (+ (mod v_prenex_2718 4294967296) (- 4294967296)) main_~ret~1) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (not (<= (mod v_prenex_2718 4294967296) 2147483647)) (<= 0 (+ main_~ret~1 2147483648))))) [2019-10-06 22:51:01,421 INFO L193 IcfgInterpreter]: Reachable states at location L26-3 satisfy 68#true [2019-10-06 22:51:01,421 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initENTRY satisfy 648#(and (= |old(#NULL.base)| |#NULL.base|) (= |#valid| |old(#valid)|) (= |#NULL.offset| |old(#NULL.offset)|)) [2019-10-06 22:51:01,421 INFO L193 IcfgInterpreter]: Reachable states at location L12-3 satisfy 639#(<= 0 mapsum_~i~0) [2019-10-06 22:51:01,422 INFO L193 IcfgInterpreter]: Reachable states at location L-1 satisfy 23#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= 0 (select |#valid| 0)) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-06 22:51:01,422 INFO L193 IcfgInterpreter]: Reachable states at location mainENTRY satisfy 33#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= |#valid| |old(#valid)|) (<= 0 |#NULL.base|) (= |#memory_int| |old(#memory_int)|) (= |#NULL.offset| 0) (= |old(#length)| |#length|) (= 0 (select |old(#valid)| 0)) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-06 22:51:01,422 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initEXIT satisfy 653#(and (= |#valid| (store |old(#valid)| 0 0)) (= 0 |#NULL.base|) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-06 22:51:01,422 INFO L193 IcfgInterpreter]: Reachable states at location L39-1 satisfy 479#true [2019-10-06 22:51:01,422 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.startENTRY satisfy 6#true [2019-10-06 22:51:01,423 INFO L193 IcfgInterpreter]: Reachable states at location L39 satisfy 522#(and (<= 99 main_~i~2) (not (< main_~i~2 99)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396)))) [2019-10-06 22:51:01,423 INFO L193 IcfgInterpreter]: Reachable states at location L30 satisfy 120#(or (exists ((v_mapsum_~ret~0_BEFORE_RETURN_366 Int) (v_prenex_2718 Int)) (or (and (not (< main_~i~1 100)) (= |main_#t~ret4| (+ (mod v_prenex_2718 4294967296) (- 4294967296))) (not (<= (mod v_prenex_2718 4294967296) 2147483647))) (and (not (< main_~i~1 100)) (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_366 4294967296) 2147483647) (= |main_#t~ret4| (mod v_mapsum_~ret~0_BEFORE_RETURN_366 4294967296))))) (exists ((v_mapsum_~ret~0_BEFORE_RETURN_365 Int) (v_prenex_2717 Int)) (or (and (not (< main_~i~1 100)) (= (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_365 4294967296) (- 4294967296)) |main_#t~ret4|) (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_365 4294967296) 2147483647))) (and (not (< main_~i~1 100)) (<= (mod v_prenex_2717 4294967296) 2147483647) (= |main_#t~ret4| (mod v_prenex_2717 4294967296)))))) [2019-10-06 22:51:01,423 INFO L193 IcfgInterpreter]: Reachable states at location L41 satisfy 424#true [2019-10-06 22:51:01,424 INFO L193 IcfgInterpreter]: Reachable states at location mainErr0ASSERT_VIOLATIONERROR_FUNCTION satisfy 234#(or (and (not (= main_~ret~1 main_~ret2~0)) (exists ((v_prenex_2745 Int) (v_prenex_2746 Int) (v_mapsum_~ret~0_BEFORE_RETURN_369 Int) (v_mapsum_~ret~0_BEFORE_RETURN_370 Int)) (or (and (not (< main_~i~2 99)) (= (mod v_mapsum_~ret~0_BEFORE_RETURN_369 4294967296) main_~ret5~0) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (<= main_~ret5~0 2147483647) (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_369 4294967296) 2147483647) (<= 0 (+ main_~ret5~0 2147483648))) (and (not (< main_~i~2 99)) (= main_~ret5~0 (+ (mod v_prenex_2745 4294967296) (- 4294967296))) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (not (<= (mod v_prenex_2745 4294967296) 2147483647)) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648))) (and (not (<= (mod v_prenex_2746 4294967296) 2147483647)) (not (< main_~i~2 99)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= main_~ret5~0 (+ (mod v_prenex_2746 4294967296) (- 4294967296)))) (and (not (< main_~i~2 99)) (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_370 4294967296) 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (mod v_mapsum_~ret~0_BEFORE_RETURN_370 4294967296) main_~ret5~0))))) (and (exists ((v_prenex_2745 Int) (v_prenex_2746 Int) (v_mapsum_~ret~0_BEFORE_RETURN_369 Int) (v_mapsum_~ret~0_BEFORE_RETURN_370 Int)) (or (and (not (< main_~i~2 99)) (= (mod v_mapsum_~ret~0_BEFORE_RETURN_369 4294967296) main_~ret5~0) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (<= main_~ret5~0 2147483647) (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_369 4294967296) 2147483647) (<= 0 (+ main_~ret5~0 2147483648))) (and (not (< main_~i~2 99)) (= main_~ret5~0 (+ (mod v_prenex_2745 4294967296) (- 4294967296))) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (not (<= (mod v_prenex_2745 4294967296) 2147483647)) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648))) (and (not (<= (mod v_prenex_2746 4294967296) 2147483647)) (not (< main_~i~2 99)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= main_~ret5~0 (+ (mod v_prenex_2746 4294967296) (- 4294967296)))) (and (not (< main_~i~2 99)) (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_370 4294967296) 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (mod v_mapsum_~ret~0_BEFORE_RETURN_370 4294967296) main_~ret5~0)))) (not (= main_~ret~1 main_~ret5~0)))) [2019-10-06 22:51:01,424 INFO L193 IcfgInterpreter]: Reachable states at location L42 satisfy 313#true [2019-10-06 22:51:01,424 INFO L193 IcfgInterpreter]: Reachable states at location mapsumEXIT satisfy 644#(and (<= 100 mapsum_~i~0) (= (ite (<= (mod mapsum_~ret~0 4294967296) 2147483647) (mod mapsum_~ret~0 4294967296) (+ (mod mapsum_~ret~0 4294967296) (- 4294967296))) |mapsum_#res|) (<= 0 mapsum_~i~0) (not (< mapsum_~i~0 100))) [2019-10-06 22:51:01,424 INFO L193 IcfgInterpreter]: Reachable states at location L35-3 satisfy 560#true [2019-10-06 22:51:01,425 INFO L193 IcfgInterpreter]: Reachable states at location L33-1 satisfy 587#true [2019-10-06 22:51:01,908 INFO L211 tionRefinementEngine]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2019-10-06 22:51:01,908 INFO L224 tionRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [33, 33, 33, 11] total 75 [2019-10-06 22:51:01,910 INFO L442 AbstractCegarLoop]: Interpolant automaton has 76 states [2019-10-06 22:51:01,911 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 76 interpolants. [2019-10-06 22:51:01,911 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=2109, Invalid=3591, Unknown=0, NotChecked=0, Total=5700 [2019-10-06 22:51:01,912 INFO L87 Difference]: Start difference. First operand 249 states and 253 transitions. Second operand 76 states. [2019-10-06 22:51:06,535 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-06 22:51:06,536 INFO L93 Difference]: Finished difference Result 389 states and 425 transitions. [2019-10-06 22:51:06,536 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 75 states. [2019-10-06 22:51:06,536 INFO L78 Accepts]: Start accepts. Automaton has 76 states. Word has length 454 [2019-10-06 22:51:06,537 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-06 22:51:06,538 INFO L225 Difference]: With dead ends: 389 [2019-10-06 22:51:06,539 INFO L226 Difference]: Without dead ends: 281 [2019-10-06 22:51:06,541 INFO L606 BasicCegarLoop]: 0 DeclaredPredicates, 1465 GetRequests, 1321 SyntacticMatches, 0 SemanticMatches, 144 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4391 ImplicationChecksByTransitivity, 6.4s TimeCoverageRelationStatistics Valid=6318, Invalid=14852, Unknown=0, NotChecked=0, Total=21170 [2019-10-06 22:51:06,541 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 281 states. [2019-10-06 22:51:06,560 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 281 to 281. [2019-10-06 22:51:06,561 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 281 states. [2019-10-06 22:51:06,562 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 281 states to 281 states and 285 transitions. [2019-10-06 22:51:06,562 INFO L78 Accepts]: Start accepts. Automaton has 281 states and 285 transitions. Word has length 454 [2019-10-06 22:51:06,563 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-06 22:51:06,563 INFO L462 AbstractCegarLoop]: Abstraction has 281 states and 285 transitions. [2019-10-06 22:51:06,563 INFO L463 AbstractCegarLoop]: Interpolant automaton has 76 states. [2019-10-06 22:51:06,564 INFO L276 IsEmpty]: Start isEmpty. Operand 281 states and 285 transitions. [2019-10-06 22:51:06,567 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 487 [2019-10-06 22:51:06,567 INFO L377 BasicCegarLoop]: Found error trace [2019-10-06 22:51:06,567 INFO L385 BasicCegarLoop]: trace histogram [300, 100, 62, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-06 22:51:06,775 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 17 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-06 22:51:06,775 INFO L410 AbstractCegarLoop]: === Iteration 19 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-06 22:51:06,776 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-06 22:51:06,776 INFO L82 PathProgramCache]: Analyzing trace with hash 1100318941, now seen corresponding path program 16 times [2019-10-06 22:51:06,776 INFO L150 tionRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-10-06 22:51:06,776 INFO L231 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2019-10-06 22:51:06,777 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-06 22:51:06,777 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-06 22:51:06,777 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-06 22:51:07,356 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-06 22:51:09,150 INFO L134 CoverageAnalysis]: Checked inductivity of 52762 backedges. 0 proven. 1953 refuted. 0 times theorem prover too weak. 50809 trivial. 0 not checked. [2019-10-06 22:51:09,151 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2019-10-06 22:51:09,151 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2019-10-06 22:51:09,151 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-06 22:51:10,038 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-06 22:51:10,046 INFO L256 TraceCheckSpWp]: Trace formula consists of 2465 conjuncts, 64 conjunts are in the unsatisfiable core [2019-10-06 22:51:10,053 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2019-10-06 22:51:10,240 INFO L134 CoverageAnalysis]: Checked inductivity of 52762 backedges. 20406 proven. 1953 refuted. 0 times theorem prover too weak. 30403 trivial. 0 not checked. [2019-10-06 22:51:10,240 INFO L322 TraceCheckSpWp]: Computing backward predicates... [2019-10-06 22:51:13,558 INFO L134 CoverageAnalysis]: Checked inductivity of 52762 backedges. 0 proven. 1953 refuted. 0 times theorem prover too weak. 50809 trivial. 0 not checked. [2019-10-06 22:51:13,558 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSifa [2019-10-06 22:51:13,559 INFO L162 IcfgInterpreter]: Started Sifa with 19 locations of interest [2019-10-06 22:51:13,560 INFO L169 IcfgInterpreter]: Building call graph [2019-10-06 22:51:13,560 INFO L174 IcfgInterpreter]: Initial procedures are [ULTIMATE.start] [2019-10-06 22:51:13,560 INFO L179 IcfgInterpreter]: Starting interpretation [2019-10-06 22:51:13,561 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.start with input of size 1 for LOIs [2019-10-06 22:51:13,570 INFO L199 IcfgInterpreter]: Interpreting procedure main with input of size 21 for LOIs [2019-10-06 22:51:14,888 INFO L199 IcfgInterpreter]: Interpreting procedure mapsum with input of size 1 for LOIs [2019-10-06 22:51:14,917 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.init with input of size 10 for LOIs [2019-10-06 22:51:14,920 INFO L183 IcfgInterpreter]: Interpretation finished [2019-10-06 22:51:14,920 INFO L191 IcfgInterpreter]: Final predicates for locations of interest are: [2019-10-06 22:51:14,920 INFO L193 IcfgInterpreter]: Reachable states at location mapsumENTRY satisfy 601#true [2019-10-06 22:51:14,920 INFO L193 IcfgInterpreter]: Reachable states at location L26-4 satisfy 73#(and (not (< main_~i~1 100)) (<= 100 main_~i~1)) [2019-10-06 22:51:14,920 INFO L193 IcfgInterpreter]: Reachable states at location L33 satisfy 592#(exists ((v_prenex_2911 Int) (v_mapsum_~ret~0_BEFORE_RETURN_392 Int) (v_mapsum_~ret~0_BEFORE_RETURN_391 Int) (v_prenex_2912 Int)) (or (and (not (< main_~i~1 100)) (<= main_~ret~1 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (= (+ (mod v_prenex_2912 4294967296) (- 4294967296)) main_~ret~1) (not (<= (mod v_prenex_2912 4294967296) 2147483647)) (<= 0 (+ main_~ret~1 2147483648))) (and (not (< main_~i~1 100)) (<= main_~ret~1 2147483647) (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_392 4294967296) 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (= main_~ret~1 (mod v_mapsum_~ret~0_BEFORE_RETURN_392 4294967296)) (<= 0 (+ main_~ret~1 2147483648))) (and (= (mod v_prenex_2911 4294967296) main_~ret~1) (not (< main_~i~1 100)) (<= (mod v_prenex_2911 4294967296) 2147483647) (<= main_~ret~1 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (<= 0 (+ main_~ret~1 2147483648))) (and (not (< main_~i~1 100)) (<= main_~ret~1 2147483647) (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_391 4294967296) 2147483647)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (= (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_391 4294967296) (- 4294967296)) main_~ret~1) (<= 0 (+ main_~ret~1 2147483648))))) [2019-10-06 22:51:14,921 INFO L193 IcfgInterpreter]: Reachable states at location L26-3 satisfy 68#true [2019-10-06 22:51:14,921 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initENTRY satisfy 648#(and (= |old(#NULL.base)| |#NULL.base|) (= |#valid| |old(#valid)|) (= |#NULL.offset| |old(#NULL.offset)|)) [2019-10-06 22:51:14,921 INFO L193 IcfgInterpreter]: Reachable states at location L12-3 satisfy 639#(<= 0 mapsum_~i~0) [2019-10-06 22:51:14,921 INFO L193 IcfgInterpreter]: Reachable states at location L-1 satisfy 23#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= 0 (select |#valid| 0)) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-06 22:51:14,921 INFO L193 IcfgInterpreter]: Reachable states at location mainENTRY satisfy 33#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= |#valid| |old(#valid)|) (<= 0 |#NULL.base|) (= |#memory_int| |old(#memory_int)|) (= |#NULL.offset| 0) (= |old(#length)| |#length|) (= 0 (select |old(#valid)| 0)) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-06 22:51:14,921 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initEXIT satisfy 653#(and (= |#valid| (store |old(#valid)| 0 0)) (= 0 |#NULL.base|) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-06 22:51:14,922 INFO L193 IcfgInterpreter]: Reachable states at location L39-1 satisfy 479#true [2019-10-06 22:51:14,922 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.startENTRY satisfy 6#true [2019-10-06 22:51:14,922 INFO L193 IcfgInterpreter]: Reachable states at location L39 satisfy 522#(and (<= 99 main_~i~2) (not (< main_~i~2 99)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396)))) [2019-10-06 22:51:14,922 INFO L193 IcfgInterpreter]: Reachable states at location L30 satisfy 120#(or (exists ((v_mapsum_~ret~0_BEFORE_RETURN_392 Int) (v_prenex_2912 Int)) (or (and (not (< main_~i~1 100)) (= (+ (mod v_prenex_2912 4294967296) (- 4294967296)) |main_#t~ret4|) (not (<= (mod v_prenex_2912 4294967296) 2147483647))) (and (not (< main_~i~1 100)) (= (mod v_mapsum_~ret~0_BEFORE_RETURN_392 4294967296) |main_#t~ret4|) (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_392 4294967296) 2147483647)))) (exists ((v_prenex_2911 Int) (v_mapsum_~ret~0_BEFORE_RETURN_391 Int)) (or (and (not (< main_~i~1 100)) (<= (mod v_prenex_2911 4294967296) 2147483647) (= (mod v_prenex_2911 4294967296) |main_#t~ret4|)) (and (= (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_391 4294967296) (- 4294967296)) |main_#t~ret4|) (not (< main_~i~1 100)) (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_391 4294967296) 2147483647)))))) [2019-10-06 22:51:14,922 INFO L193 IcfgInterpreter]: Reachable states at location L41 satisfy 424#true [2019-10-06 22:51:14,923 INFO L193 IcfgInterpreter]: Reachable states at location mainErr0ASSERT_VIOLATIONERROR_FUNCTION satisfy 234#(or (and (not (= main_~ret~1 main_~ret2~0)) (exists ((v_prenex_2940 Int) (v_prenex_2939 Int) (v_mapsum_~ret~0_BEFORE_RETURN_396 Int) (v_mapsum_~ret~0_BEFORE_RETURN_395 Int)) (or (and (not (< main_~i~2 99)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (mod v_prenex_2940 4294967296) main_~ret5~0) (<= (mod v_prenex_2940 4294967296) 2147483647)) (and (not (< main_~i~2 99)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (mod v_prenex_2939 4294967296) main_~ret5~0) (<= (mod v_prenex_2939 4294967296) 2147483647)) (and (not (< main_~i~2 99)) (= main_~ret5~0 (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_395 4294967296) (- 4294967296))) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (<= main_~ret5~0 2147483647) (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_395 4294967296) 2147483647)) (<= 0 (+ main_~ret5~0 2147483648))) (and (not (< main_~i~2 99)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_396 4294967296) (- 4294967296)) main_~ret5~0) (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_396 4294967296) 2147483647)))))) (and (exists ((v_prenex_2940 Int) (v_prenex_2939 Int) (v_mapsum_~ret~0_BEFORE_RETURN_396 Int) (v_mapsum_~ret~0_BEFORE_RETURN_395 Int)) (or (and (not (< main_~i~2 99)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (mod v_prenex_2940 4294967296) main_~ret5~0) (<= (mod v_prenex_2940 4294967296) 2147483647)) (and (not (< main_~i~2 99)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (mod v_prenex_2939 4294967296) main_~ret5~0) (<= (mod v_prenex_2939 4294967296) 2147483647)) (and (not (< main_~i~2 99)) (= main_~ret5~0 (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_395 4294967296) (- 4294967296))) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (<= main_~ret5~0 2147483647) (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_395 4294967296) 2147483647)) (<= 0 (+ main_~ret5~0 2147483648))) (and (not (< main_~i~2 99)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_396 4294967296) (- 4294967296)) main_~ret5~0) (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_396 4294967296) 2147483647))))) (not (= main_~ret~1 main_~ret5~0)))) [2019-10-06 22:51:14,923 INFO L193 IcfgInterpreter]: Reachable states at location L42 satisfy 313#true [2019-10-06 22:51:14,923 INFO L193 IcfgInterpreter]: Reachable states at location mapsumEXIT satisfy 644#(and (<= 100 mapsum_~i~0) (= (ite (<= (mod mapsum_~ret~0 4294967296) 2147483647) (mod mapsum_~ret~0 4294967296) (+ (mod mapsum_~ret~0 4294967296) (- 4294967296))) |mapsum_#res|) (<= 0 mapsum_~i~0) (not (< mapsum_~i~0 100))) [2019-10-06 22:51:14,923 INFO L193 IcfgInterpreter]: Reachable states at location L35-3 satisfy 560#true [2019-10-06 22:51:14,923 INFO L193 IcfgInterpreter]: Reachable states at location L33-1 satisfy 587#true [2019-10-06 22:51:15,644 INFO L211 tionRefinementEngine]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2019-10-06 22:51:15,644 INFO L224 tionRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [65, 65, 65, 11] total 112 [2019-10-06 22:51:15,646 INFO L442 AbstractCegarLoop]: Interpolant automaton has 113 states [2019-10-06 22:51:15,647 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 113 interpolants. [2019-10-06 22:51:15,648 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5180, Invalid=7476, Unknown=0, NotChecked=0, Total=12656 [2019-10-06 22:51:15,649 INFO L87 Difference]: Start difference. First operand 281 states and 285 transitions. Second operand 113 states. [2019-10-06 22:51:25,290 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-06 22:51:25,291 INFO L93 Difference]: Finished difference Result 426 states and 467 transitions. [2019-10-06 22:51:25,291 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 112 states. [2019-10-06 22:51:25,291 INFO L78 Accepts]: Start accepts. Automaton has 113 states. Word has length 486 [2019-10-06 22:51:25,291 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-06 22:51:25,293 INFO L225 Difference]: With dead ends: 426 [2019-10-06 22:51:25,294 INFO L226 Difference]: Without dead ends: 318 [2019-10-06 22:51:25,297 INFO L606 BasicCegarLoop]: 0 DeclaredPredicates, 1630 GetRequests, 1385 SyntacticMatches, 27 SemanticMatches, 218 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9834 ImplicationChecksByTransitivity, 14.1s TimeCoverageRelationStatistics Valid=15531, Invalid=32649, Unknown=0, NotChecked=0, Total=48180 [2019-10-06 22:51:25,298 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 318 states. [2019-10-06 22:51:25,316 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 318 to 318. [2019-10-06 22:51:25,317 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 318 states. [2019-10-06 22:51:25,318 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 318 states to 318 states and 322 transitions. [2019-10-06 22:51:25,319 INFO L78 Accepts]: Start accepts. Automaton has 318 states and 322 transitions. Word has length 486 [2019-10-06 22:51:25,319 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-06 22:51:25,319 INFO L462 AbstractCegarLoop]: Abstraction has 318 states and 322 transitions. [2019-10-06 22:51:25,320 INFO L463 AbstractCegarLoop]: Interpolant automaton has 113 states. [2019-10-06 22:51:25,320 INFO L276 IsEmpty]: Start isEmpty. Operand 318 states and 322 transitions. [2019-10-06 22:51:25,323 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 524 [2019-10-06 22:51:25,324 INFO L377 BasicCegarLoop]: Found error trace [2019-10-06 22:51:25,324 INFO L385 BasicCegarLoop]: trace histogram [300, 100, 99, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-06 22:51:25,531 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 18 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-06 22:51:25,532 INFO L410 AbstractCegarLoop]: === Iteration 20 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-06 22:51:25,532 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-06 22:51:25,532 INFO L82 PathProgramCache]: Analyzing trace with hash -423583502, now seen corresponding path program 17 times [2019-10-06 22:51:25,533 INFO L150 tionRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-10-06 22:51:25,533 INFO L231 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2019-10-06 22:51:25,533 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-06 22:51:25,533 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-06 22:51:25,533 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-06 22:59:42,420 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat