java -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata ./data -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/default/automizer/svcomp-Reach-32bit-Automizer_Default.epf --traceabstraction.trace.refinement.strategy SIFA_TAIPAN --sifa.abstract.domain CompoundDomain --rcfgbuilder.size.of.a.code.block LoopFreeBlock --sifa.call.summarizer TopInputCallSummarizer --sifa.fluid SizeLimitFluid --sifa.simplification.technique SIMPLIFY_QUICK -i ../../../trunk/examples/svcomp/array-crafted/mapsum2.i -------------------------------------------------------------------------------- This is Ultimate 0.1.24-36ac518-m [2019-10-06 22:48:51,371 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-10-06 22:48:51,374 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-10-06 22:48:51,387 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-10-06 22:48:51,388 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-10-06 22:48:51,389 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-10-06 22:48:51,390 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-10-06 22:48:51,392 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-10-06 22:48:51,394 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-10-06 22:48:51,395 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-10-06 22:48:51,396 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-10-06 22:48:51,397 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-10-06 22:48:51,397 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-10-06 22:48:51,398 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-10-06 22:48:51,399 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-10-06 22:48:51,400 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-10-06 22:48:51,401 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-10-06 22:48:51,402 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-10-06 22:48:51,404 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-10-06 22:48:51,405 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-10-06 22:48:51,407 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-10-06 22:48:51,408 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-10-06 22:48:51,409 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-10-06 22:48:51,410 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-10-06 22:48:51,412 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... 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[2019-10-06 22:48:51,420 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-10-06 22:48:51,421 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-10-06 22:48:51,422 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-10-06 22:48:51,422 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/default/automizer/svcomp-Reach-32bit-Automizer_Default.epf [2019-10-06 22:48:51,436 INFO L113 SettingsManager]: Loading preferences was successful [2019-10-06 22:48:51,437 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-10-06 22:48:51,438 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-10-06 22:48:51,439 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-10-06 22:48:51,439 INFO L138 SettingsManager]: * Use SBE=true [2019-10-06 22:48:51,439 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-10-06 22:48:51,439 INFO L138 SettingsManager]: * sizeof long=4 [2019-10-06 22:48:51,440 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-10-06 22:48:51,440 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-10-06 22:48:51,440 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-10-06 22:48:51,440 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-10-06 22:48:51,440 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-10-06 22:48:51,441 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-10-06 22:48:51,441 INFO L138 SettingsManager]: * sizeof long double=12 [2019-10-06 22:48:51,441 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-10-06 22:48:51,442 INFO L138 SettingsManager]: * Use constant arrays=true [2019-10-06 22:48:51,443 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-10-06 22:48:51,443 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-10-06 22:48:51,443 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-10-06 22:48:51,443 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-10-06 22:48:51,443 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-10-06 22:48:51,444 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-10-06 22:48:51,444 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-10-06 22:48:51,444 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-10-06 22:48:51,444 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-10-06 22:48:51,444 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-10-06 22:48:51,445 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-10-06 22:48:51,445 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-10-06 22:48:51,445 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: Trace refinement strategy -> SIFA_TAIPAN Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.sifa: Abstract Domain -> CompoundDomain Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder: Size of a code block -> LoopFreeBlock Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.sifa: Call Summarizer -> TopInputCallSummarizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.sifa: Fluid -> SizeLimitFluid Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.sifa: Simplification Technique -> SIMPLIFY_QUICK [2019-10-06 22:48:51,765 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-10-06 22:48:51,779 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-10-06 22:48:51,782 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-10-06 22:48:51,784 INFO L271 PluginConnector]: Initializing CDTParser... [2019-10-06 22:48:51,784 INFO L275 PluginConnector]: CDTParser initialized [2019-10-06 22:48:51,785 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/array-crafted/mapsum2.i [2019-10-06 22:48:51,849 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/bea296e3a/421ce16a6d004a4bbc8dbfb127acd21f/FLAG12a031dac [2019-10-06 22:48:52,264 INFO L306 CDTParser]: Found 1 translation units. [2019-10-06 22:48:52,265 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/array-crafted/mapsum2.i [2019-10-06 22:48:52,272 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/bea296e3a/421ce16a6d004a4bbc8dbfb127acd21f/FLAG12a031dac [2019-10-06 22:48:52,681 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/bea296e3a/421ce16a6d004a4bbc8dbfb127acd21f [2019-10-06 22:48:52,692 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-10-06 22:48:52,695 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2019-10-06 22:48:52,696 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-10-06 22:48:52,697 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-10-06 22:48:52,701 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-10-06 22:48:52,702 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 06.10 10:48:52" (1/1) ... [2019-10-06 22:48:52,705 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@6b0f51fe and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.10 10:48:52, skipping insertion in model container [2019-10-06 22:48:52,706 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 06.10 10:48:52" (1/1) ... [2019-10-06 22:48:52,714 INFO L142 MainTranslator]: Starting translation in SV-COMP mode [2019-10-06 22:48:52,737 INFO L173 MainTranslator]: Built tables and reachable declarations [2019-10-06 22:48:52,978 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-10-06 22:48:52,987 INFO L188 MainTranslator]: Completed pre-run [2019-10-06 22:48:53,011 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-10-06 22:48:53,031 INFO L192 MainTranslator]: Completed translation [2019-10-06 22:48:53,031 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.10 10:48:53 WrapperNode [2019-10-06 22:48:53,031 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-10-06 22:48:53,032 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-10-06 22:48:53,032 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-10-06 22:48:53,032 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-10-06 22:48:53,130 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.10 10:48:53" (1/1) ... [2019-10-06 22:48:53,130 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.10 10:48:53" (1/1) ... [2019-10-06 22:48:53,139 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.10 10:48:53" (1/1) ... [2019-10-06 22:48:53,139 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.10 10:48:53" (1/1) ... [2019-10-06 22:48:53,147 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.10 10:48:53" (1/1) ... [2019-10-06 22:48:53,157 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.10 10:48:53" (1/1) ... [2019-10-06 22:48:53,159 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.10 10:48:53" (1/1) ... [2019-10-06 22:48:53,161 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-10-06 22:48:53,162 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-10-06 22:48:53,162 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-10-06 22:48:53,162 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-10-06 22:48:53,163 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.10 10:48:53" (1/1) ... No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-10-06 22:48:53,221 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2019-10-06 22:48:53,221 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-10-06 22:48:53,221 INFO L138 BoogieDeclarations]: Found implementation of procedure mapsum [2019-10-06 22:48:53,222 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2019-10-06 22:48:53,222 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_error [2019-10-06 22:48:53,222 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_int [2019-10-06 22:48:53,222 INFO L130 BoogieDeclarations]: Found specification of procedure mapsum [2019-10-06 22:48:53,222 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2019-10-06 22:48:53,222 INFO L130 BoogieDeclarations]: Found specification of procedure main [2019-10-06 22:48:53,222 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-10-06 22:48:53,223 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-10-06 22:48:53,223 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-10-06 22:48:53,223 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2019-10-06 22:48:53,223 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-10-06 22:48:53,596 INFO L279 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-10-06 22:48:53,596 INFO L284 CfgBuilder]: Removed 3 assume(true) statements. [2019-10-06 22:48:53,599 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 06.10 10:48:53 BoogieIcfgContainer [2019-10-06 22:48:53,600 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-10-06 22:48:53,601 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-10-06 22:48:53,601 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-10-06 22:48:53,605 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-10-06 22:48:53,605 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 06.10 10:48:52" (1/3) ... [2019-10-06 22:48:53,607 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@43c99d68 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 06.10 10:48:53, skipping insertion in model container [2019-10-06 22:48:53,607 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.10 10:48:53" (2/3) ... [2019-10-06 22:48:53,608 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@43c99d68 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 06.10 10:48:53, skipping insertion in model container [2019-10-06 22:48:53,608 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 06.10 10:48:53" (3/3) ... [2019-10-06 22:48:53,610 INFO L109 eAbstractionObserver]: Analyzing ICFG mapsum2.i [2019-10-06 22:48:53,623 INFO L152 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-10-06 22:48:53,632 INFO L164 ceAbstractionStarter]: Appying trace abstraction to program that has 1 error locations. [2019-10-06 22:48:53,645 INFO L249 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2019-10-06 22:48:53,675 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-10-06 22:48:53,676 INFO L374 AbstractCegarLoop]: Hoare is true [2019-10-06 22:48:53,676 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-10-06 22:48:53,676 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-10-06 22:48:53,676 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-10-06 22:48:53,677 INFO L378 AbstractCegarLoop]: Difference is false [2019-10-06 22:48:53,677 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-10-06 22:48:53,677 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-10-06 22:48:53,694 INFO L276 IsEmpty]: Start isEmpty. Operand 23 states. [2019-10-06 22:48:53,699 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2019-10-06 22:48:53,700 INFO L377 BasicCegarLoop]: Found error trace [2019-10-06 22:48:53,701 INFO L385 BasicCegarLoop]: trace histogram [3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-06 22:48:53,702 INFO L410 AbstractCegarLoop]: === Iteration 1 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-06 22:48:53,707 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-06 22:48:53,707 INFO L82 PathProgramCache]: Analyzing trace with hash 2002379581, now seen corresponding path program 1 times [2019-10-06 22:48:53,714 INFO L150 tionRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-10-06 22:48:53,714 INFO L231 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2019-10-06 22:48:53,715 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-06 22:48:53,715 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-06 22:48:53,715 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-06 22:48:53,803 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-06 22:48:53,877 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2019-10-06 22:48:53,878 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2019-10-06 22:48:53,879 INFO L211 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-10-06 22:48:53,879 INFO L224 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-10-06 22:48:53,883 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-10-06 22:48:53,898 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-10-06 22:48:53,899 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-10-06 22:48:53,901 INFO L87 Difference]: Start difference. First operand 23 states. Second operand 3 states. [2019-10-06 22:48:53,936 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-06 22:48:53,936 INFO L93 Difference]: Finished difference Result 41 states and 51 transitions. [2019-10-06 22:48:53,937 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-10-06 22:48:53,939 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 24 [2019-10-06 22:48:53,939 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-06 22:48:53,948 INFO L225 Difference]: With dead ends: 41 [2019-10-06 22:48:53,948 INFO L226 Difference]: Without dead ends: 20 [2019-10-06 22:48:53,952 INFO L606 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-10-06 22:48:53,966 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20 states. [2019-10-06 22:48:53,986 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20 to 20. [2019-10-06 22:48:53,987 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20 states. [2019-10-06 22:48:53,988 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20 states to 20 states and 24 transitions. [2019-10-06 22:48:53,989 INFO L78 Accepts]: Start accepts. Automaton has 20 states and 24 transitions. Word has length 24 [2019-10-06 22:48:53,990 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-06 22:48:53,990 INFO L462 AbstractCegarLoop]: Abstraction has 20 states and 24 transitions. [2019-10-06 22:48:53,990 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-10-06 22:48:53,990 INFO L276 IsEmpty]: Start isEmpty. Operand 20 states and 24 transitions. [2019-10-06 22:48:53,992 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2019-10-06 22:48:53,992 INFO L377 BasicCegarLoop]: Found error trace [2019-10-06 22:48:53,993 INFO L385 BasicCegarLoop]: trace histogram [3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-06 22:48:53,993 INFO L410 AbstractCegarLoop]: === Iteration 2 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-06 22:48:53,993 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-06 22:48:53,994 INFO L82 PathProgramCache]: Analyzing trace with hash 1641553888, now seen corresponding path program 1 times [2019-10-06 22:48:53,994 INFO L150 tionRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-10-06 22:48:53,994 INFO L231 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2019-10-06 22:48:53,994 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-06 22:48:53,995 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-06 22:48:53,995 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-06 22:48:54,027 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-06 22:48:54,067 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2019-10-06 22:48:54,068 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2019-10-06 22:48:54,068 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2019-10-06 22:48:54,068 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-06 22:48:54,143 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-06 22:48:54,145 INFO L256 TraceCheckSpWp]: Trace formula consists of 123 conjuncts, 2 conjunts are in the unsatisfiable core [2019-10-06 22:48:54,152 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2019-10-06 22:48:54,203 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2019-10-06 22:48:54,204 INFO L322 TraceCheckSpWp]: Computing backward predicates... [2019-10-06 22:48:54,261 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2019-10-06 22:48:54,262 INFO L211 tionRefinementEngine]: Constructing automaton from 1 perfect and 2 imperfect interpolant sequences. [2019-10-06 22:48:54,262 INFO L224 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [3, 3] total 5 [2019-10-06 22:48:54,264 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-10-06 22:48:54,264 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-10-06 22:48:54,264 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-10-06 22:48:54,265 INFO L87 Difference]: Start difference. First operand 20 states and 24 transitions. Second operand 3 states. [2019-10-06 22:48:54,275 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-06 22:48:54,275 INFO L93 Difference]: Finished difference Result 33 states and 43 transitions. [2019-10-06 22:48:54,276 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-10-06 22:48:54,276 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 25 [2019-10-06 22:48:54,276 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-06 22:48:54,277 INFO L225 Difference]: With dead ends: 33 [2019-10-06 22:48:54,277 INFO L226 Difference]: Without dead ends: 21 [2019-10-06 22:48:54,279 INFO L606 BasicCegarLoop]: 0 DeclaredPredicates, 52 GetRequests, 49 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-10-06 22:48:54,279 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21 states. [2019-10-06 22:48:54,283 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21 to 21. [2019-10-06 22:48:54,283 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21 states. [2019-10-06 22:48:54,287 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21 states to 21 states and 25 transitions. [2019-10-06 22:48:54,288 INFO L78 Accepts]: Start accepts. Automaton has 21 states and 25 transitions. Word has length 25 [2019-10-06 22:48:54,288 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-06 22:48:54,288 INFO L462 AbstractCegarLoop]: Abstraction has 21 states and 25 transitions. [2019-10-06 22:48:54,288 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-10-06 22:48:54,289 INFO L276 IsEmpty]: Start isEmpty. Operand 21 states and 25 transitions. [2019-10-06 22:48:54,290 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2019-10-06 22:48:54,290 INFO L377 BasicCegarLoop]: Found error trace [2019-10-06 22:48:54,290 INFO L385 BasicCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-06 22:48:54,494 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 2 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-06 22:48:54,495 INFO L410 AbstractCegarLoop]: === Iteration 3 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-06 22:48:54,495 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-06 22:48:54,495 INFO L82 PathProgramCache]: Analyzing trace with hash -1715048104, now seen corresponding path program 1 times [2019-10-06 22:48:54,496 INFO L150 tionRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-10-06 22:48:54,496 INFO L231 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2019-10-06 22:48:54,497 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-06 22:48:54,497 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-06 22:48:54,497 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-06 22:48:54,546 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-06 22:48:54,610 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2019-10-06 22:48:54,610 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2019-10-06 22:48:54,611 INFO L211 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-10-06 22:48:54,612 INFO L224 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-10-06 22:48:54,613 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-10-06 22:48:54,613 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-10-06 22:48:54,614 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-10-06 22:48:54,614 INFO L87 Difference]: Start difference. First operand 21 states and 25 transitions. Second operand 3 states. [2019-10-06 22:48:54,630 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-06 22:48:54,630 INFO L93 Difference]: Finished difference Result 31 states and 36 transitions. [2019-10-06 22:48:54,631 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-10-06 22:48:54,631 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 28 [2019-10-06 22:48:54,632 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-06 22:48:54,632 INFO L225 Difference]: With dead ends: 31 [2019-10-06 22:48:54,633 INFO L226 Difference]: Without dead ends: 22 [2019-10-06 22:48:54,633 INFO L606 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-10-06 22:48:54,634 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22 states. [2019-10-06 22:48:54,638 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22 to 22. [2019-10-06 22:48:54,638 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22 states. [2019-10-06 22:48:54,639 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22 states to 22 states and 26 transitions. [2019-10-06 22:48:54,640 INFO L78 Accepts]: Start accepts. Automaton has 22 states and 26 transitions. Word has length 28 [2019-10-06 22:48:54,642 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-06 22:48:54,642 INFO L462 AbstractCegarLoop]: Abstraction has 22 states and 26 transitions. [2019-10-06 22:48:54,642 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-10-06 22:48:54,642 INFO L276 IsEmpty]: Start isEmpty. Operand 22 states and 26 transitions. [2019-10-06 22:48:54,643 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2019-10-06 22:48:54,644 INFO L377 BasicCegarLoop]: Found error trace [2019-10-06 22:48:54,644 INFO L385 BasicCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-06 22:48:54,644 INFO L410 AbstractCegarLoop]: === Iteration 4 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-06 22:48:54,644 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-06 22:48:54,645 INFO L82 PathProgramCache]: Analyzing trace with hash -1273676679, now seen corresponding path program 1 times [2019-10-06 22:48:54,645 INFO L150 tionRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-10-06 22:48:54,645 INFO L231 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2019-10-06 22:48:54,645 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-06 22:48:54,646 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-06 22:48:54,646 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-06 22:48:54,714 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-06 22:48:54,752 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2019-10-06 22:48:54,752 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2019-10-06 22:48:54,752 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2019-10-06 22:48:54,753 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-06 22:48:54,835 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-06 22:48:54,836 INFO L256 TraceCheckSpWp]: Trace formula consists of 142 conjuncts, 3 conjunts are in the unsatisfiable core [2019-10-06 22:48:54,839 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2019-10-06 22:48:54,860 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2019-10-06 22:48:54,860 INFO L322 TraceCheckSpWp]: Computing backward predicates... [2019-10-06 22:48:54,913 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2019-10-06 22:48:54,913 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSifa [2019-10-06 22:48:54,950 INFO L162 IcfgInterpreter]: Started Sifa with 19 locations of interest [2019-10-06 22:48:54,951 INFO L169 IcfgInterpreter]: Building call graph [2019-10-06 22:48:54,962 INFO L174 IcfgInterpreter]: Initial procedures are [ULTIMATE.start] [2019-10-06 22:48:54,976 INFO L179 IcfgInterpreter]: Starting interpretation [2019-10-06 22:48:54,976 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.start with input of size 1 for LOIs [2019-10-06 22:48:55,145 INFO L199 IcfgInterpreter]: Interpreting procedure main with input of size 21 for LOIs [2019-10-06 22:48:57,379 INFO L199 IcfgInterpreter]: Interpreting procedure mapsum with input of size 1 for LOIs [2019-10-06 22:48:57,435 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.init with input of size 10 for LOIs [2019-10-06 22:48:57,439 INFO L183 IcfgInterpreter]: Interpretation finished [2019-10-06 22:48:57,440 INFO L191 IcfgInterpreter]: Final predicates for locations of interest are: [2019-10-06 22:48:57,440 INFO L193 IcfgInterpreter]: Reachable states at location mapsumENTRY satisfy 601#true [2019-10-06 22:48:57,440 INFO L193 IcfgInterpreter]: Reachable states at location L26-4 satisfy 73#(and (<= 1000 main_~i~1) (not (< main_~i~1 1000))) [2019-10-06 22:48:57,441 INFO L193 IcfgInterpreter]: Reachable states at location L33 satisfy 592#(exists ((v_prenex_2 Int) (v_mapsum_~ret~0_BEFORE_RETURN_1 Int) (v_prenex_1 Int) (v_mapsum_~ret~0_BEFORE_RETURN_2 Int)) (or (and (<= main_~ret~1 2147483647) (= main_~ret~1 (mod v_prenex_2 4294967296)) (not (< main_~i~1 1000)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (<= (mod v_prenex_2 4294967296) 2147483647) (<= 0 (+ main_~ret~1 2147483648))) (and (<= main_~ret~1 2147483647) (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_2 4294967296) 2147483647)) (not (< main_~i~1 1000)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (= (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_2 4294967296) (- 4294967296)) main_~ret~1) (<= 0 (+ main_~ret~1 2147483648))) (and (<= main_~ret~1 2147483647) (not (< main_~i~1 1000)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (= main_~ret~1 (+ (mod v_prenex_1 4294967296) (- 4294967296))) (not (<= (mod v_prenex_1 4294967296) 2147483647)) (<= 0 (+ main_~ret~1 2147483648))) (and (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_1 4294967296) 2147483647) (<= main_~ret~1 2147483647) (not (< main_~i~1 1000)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (= (mod v_mapsum_~ret~0_BEFORE_RETURN_1 4294967296) main_~ret~1) (<= 0 (+ main_~ret~1 2147483648))))) [2019-10-06 22:48:57,441 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initENTRY satisfy 648#(and (= |old(#NULL.base)| |#NULL.base|) (= |#valid| |old(#valid)|) (= |#NULL.offset| |old(#NULL.offset)|)) [2019-10-06 22:48:57,441 INFO L193 IcfgInterpreter]: Reachable states at location L26-3 satisfy 68#true [2019-10-06 22:48:57,441 INFO L193 IcfgInterpreter]: Reachable states at location L12-3 satisfy 639#(<= 0 mapsum_~i~0) [2019-10-06 22:48:57,442 INFO L193 IcfgInterpreter]: Reachable states at location L-1 satisfy 23#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= 0 (select |#valid| 0)) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-06 22:48:57,442 INFO L193 IcfgInterpreter]: Reachable states at location mainENTRY satisfy 33#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= |#valid| |old(#valid)|) (<= 0 |#NULL.base|) (= |#memory_int| |old(#memory_int)|) (= |#NULL.offset| 0) (= |old(#length)| |#length|) (= 0 (select |old(#valid)| 0)) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-06 22:48:57,442 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initEXIT satisfy 653#(and (= |#valid| (store |old(#valid)| 0 0)) (= 0 |#NULL.base|) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-06 22:48:57,442 INFO L193 IcfgInterpreter]: Reachable states at location L39-1 satisfy 479#true [2019-10-06 22:48:57,442 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.startENTRY satisfy 6#true [2019-10-06 22:48:57,443 INFO L193 IcfgInterpreter]: Reachable states at location L39 satisfy 522#(and (not (< main_~i~2 999)) (<= 999 main_~i~2) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 3996)) main_~temp~0)) [2019-10-06 22:48:57,443 INFO L193 IcfgInterpreter]: Reachable states at location L30 satisfy 120#(or (exists ((v_mapsum_~ret~0_BEFORE_RETURN_1 Int) (v_prenex_1 Int)) (or (and (= (+ (mod v_prenex_1 4294967296) (- 4294967296)) |main_#t~ret4|) (not (< main_~i~1 1000)) (not (<= (mod v_prenex_1 4294967296) 2147483647))) (and (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_1 4294967296) 2147483647) (not (< main_~i~1 1000)) (= (mod v_mapsum_~ret~0_BEFORE_RETURN_1 4294967296) |main_#t~ret4|)))) (exists ((v_prenex_2 Int) (v_mapsum_~ret~0_BEFORE_RETURN_2 Int)) (or (and (not (< main_~i~1 1000)) (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_2 4294967296) 2147483647)) (= (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_2 4294967296) (- 4294967296)) |main_#t~ret4|)) (and (not (< main_~i~1 1000)) (= |main_#t~ret4| (mod v_prenex_2 4294967296)) (<= (mod v_prenex_2 4294967296) 2147483647))))) [2019-10-06 22:48:57,443 INFO L193 IcfgInterpreter]: Reachable states at location L41 satisfy 424#true [2019-10-06 22:48:57,444 INFO L193 IcfgInterpreter]: Reachable states at location mainErr0ASSERT_VIOLATIONERROR_FUNCTION satisfy 234#(or (and (not (= main_~ret~1 main_~ret2~0)) (exists ((v_prenex_29 Int) (v_prenex_30 Int) (v_mapsum_~ret~0_BEFORE_RETURN_5 Int) (v_mapsum_~ret~0_BEFORE_RETURN_6 Int)) (or (and (= (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_5 4294967296) (- 4294967296)) main_~ret5~0) (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_5 4294967296) 2147483647)) (not (< main_~i~2 999)) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 3996)) main_~temp~0)) (and (<= (mod v_prenex_29 4294967296) 2147483647) (not (< main_~i~2 999)) (<= main_~ret5~0 2147483647) (= (mod v_prenex_29 4294967296) main_~ret5~0) (<= 0 (+ main_~ret5~0 2147483648)) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 3996)) main_~temp~0)) (and (= main_~ret5~0 (mod v_prenex_30 4294967296)) (<= (mod v_prenex_30 4294967296) 2147483647) (not (< main_~i~2 999)) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 3996)) main_~temp~0)) (and (not (< main_~i~2 999)) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= main_~ret5~0 (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_6 4294967296) (- 4294967296))) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 3996)) main_~temp~0) (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_6 4294967296) 2147483647)))))) (and (exists ((v_prenex_29 Int) (v_prenex_30 Int) (v_mapsum_~ret~0_BEFORE_RETURN_5 Int) (v_mapsum_~ret~0_BEFORE_RETURN_6 Int)) (or (and (= (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_5 4294967296) (- 4294967296)) main_~ret5~0) (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_5 4294967296) 2147483647)) (not (< main_~i~2 999)) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 3996)) main_~temp~0)) (and (<= (mod v_prenex_29 4294967296) 2147483647) (not (< main_~i~2 999)) (<= main_~ret5~0 2147483647) (= (mod v_prenex_29 4294967296) main_~ret5~0) (<= 0 (+ main_~ret5~0 2147483648)) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 3996)) main_~temp~0)) (and (= main_~ret5~0 (mod v_prenex_30 4294967296)) (<= (mod v_prenex_30 4294967296) 2147483647) (not (< main_~i~2 999)) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 3996)) main_~temp~0)) (and (not (< main_~i~2 999)) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= main_~ret5~0 (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_6 4294967296) (- 4294967296))) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 3996)) main_~temp~0) (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_6 4294967296) 2147483647))))) (not (= main_~ret~1 main_~ret5~0)))) [2019-10-06 22:48:57,444 INFO L193 IcfgInterpreter]: Reachable states at location L42 satisfy 313#true [2019-10-06 22:48:57,444 INFO L193 IcfgInterpreter]: Reachable states at location mapsumEXIT satisfy 644#(and (= (ite (<= (mod mapsum_~ret~0 4294967296) 2147483647) (mod mapsum_~ret~0 4294967296) (+ (mod mapsum_~ret~0 4294967296) (- 4294967296))) |mapsum_#res|) (<= 1000 mapsum_~i~0) (not (< mapsum_~i~0 1000)) (<= 0 mapsum_~i~0)) [2019-10-06 22:48:57,444 INFO L193 IcfgInterpreter]: Reachable states at location L33-1 satisfy 587#true [2019-10-06 22:48:57,444 INFO L193 IcfgInterpreter]: Reachable states at location L35-3 satisfy 560#true [2019-10-06 22:48:57,825 INFO L211 tionRefinementEngine]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2019-10-06 22:48:57,825 INFO L224 tionRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4, 4, 11] total 17 [2019-10-06 22:48:57,827 INFO L442 AbstractCegarLoop]: Interpolant automaton has 18 states [2019-10-06 22:48:57,827 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2019-10-06 22:48:57,829 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=50, Invalid=256, Unknown=0, NotChecked=0, Total=306 [2019-10-06 22:48:57,829 INFO L87 Difference]: Start difference. First operand 22 states and 26 transitions. Second operand 18 states. [2019-10-06 22:48:58,680 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-06 22:48:58,680 INFO L93 Difference]: Finished difference Result 40 states and 50 transitions. [2019-10-06 22:48:58,680 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2019-10-06 22:48:58,680 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 29 [2019-10-06 22:48:58,681 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-06 22:48:58,681 INFO L225 Difference]: With dead ends: 40 [2019-10-06 22:48:58,682 INFO L226 Difference]: Without dead ends: 25 [2019-10-06 22:48:58,683 INFO L606 BasicCegarLoop]: 0 DeclaredPredicates, 105 GetRequests, 77 SyntacticMatches, 0 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 198 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=133, Invalid=737, Unknown=0, NotChecked=0, Total=870 [2019-10-06 22:48:58,683 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25 states. [2019-10-06 22:48:58,688 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25 to 25. [2019-10-06 22:48:58,688 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 25 states. [2019-10-06 22:48:58,689 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25 states to 25 states and 29 transitions. [2019-10-06 22:48:58,689 INFO L78 Accepts]: Start accepts. Automaton has 25 states and 29 transitions. Word has length 29 [2019-10-06 22:48:58,690 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-06 22:48:58,690 INFO L462 AbstractCegarLoop]: Abstraction has 25 states and 29 transitions. [2019-10-06 22:48:58,690 INFO L463 AbstractCegarLoop]: Interpolant automaton has 18 states. [2019-10-06 22:48:58,690 INFO L276 IsEmpty]: Start isEmpty. Operand 25 states and 29 transitions. [2019-10-06 22:48:58,691 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2019-10-06 22:48:58,691 INFO L377 BasicCegarLoop]: Found error trace [2019-10-06 22:48:58,691 INFO L385 BasicCegarLoop]: trace histogram [4, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-06 22:48:58,892 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-06 22:48:58,893 INFO L410 AbstractCegarLoop]: === Iteration 5 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-06 22:48:58,893 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-06 22:48:58,894 INFO L82 PathProgramCache]: Analyzing trace with hash 811678230, now seen corresponding path program 2 times [2019-10-06 22:48:58,894 INFO L150 tionRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-10-06 22:48:58,894 INFO L231 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2019-10-06 22:48:58,895 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-06 22:48:58,895 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-06 22:48:58,896 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-06 22:48:58,929 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-06 22:48:59,072 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2019-10-06 22:48:59,073 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2019-10-06 22:48:59,073 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2019-10-06 22:48:59,073 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-06 22:48:59,159 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 2 check-sat command(s) [2019-10-06 22:48:59,160 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-10-06 22:48:59,166 INFO L256 TraceCheckSpWp]: Trace formula consists of 108 conjuncts, 3 conjunts are in the unsatisfiable core [2019-10-06 22:48:59,172 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2019-10-06 22:48:59,191 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 10 proven. 1 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2019-10-06 22:48:59,192 INFO L322 TraceCheckSpWp]: Computing backward predicates... [2019-10-06 22:48:59,225 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 10 proven. 1 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2019-10-06 22:48:59,226 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSifa [2019-10-06 22:48:59,229 INFO L162 IcfgInterpreter]: Started Sifa with 19 locations of interest [2019-10-06 22:48:59,230 INFO L169 IcfgInterpreter]: Building call graph [2019-10-06 22:48:59,231 INFO L174 IcfgInterpreter]: Initial procedures are [ULTIMATE.start] [2019-10-06 22:48:59,232 INFO L179 IcfgInterpreter]: Starting interpretation [2019-10-06 22:48:59,232 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.start with input of size 1 for LOIs [2019-10-06 22:48:59,263 INFO L199 IcfgInterpreter]: Interpreting procedure main with input of size 21 for LOIs [2019-10-06 22:49:00,756 INFO L199 IcfgInterpreter]: Interpreting procedure mapsum with input of size 1 for LOIs [2019-10-06 22:49:00,786 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.init with input of size 10 for LOIs [2019-10-06 22:49:00,790 INFO L183 IcfgInterpreter]: Interpretation finished [2019-10-06 22:49:00,790 INFO L191 IcfgInterpreter]: Final predicates for locations of interest are: [2019-10-06 22:49:00,790 INFO L193 IcfgInterpreter]: Reachable states at location mapsumENTRY satisfy 601#true [2019-10-06 22:49:00,790 INFO L193 IcfgInterpreter]: Reachable states at location L26-4 satisfy 73#(and (<= 1000 main_~i~1) (not (< main_~i~1 1000))) [2019-10-06 22:49:00,791 INFO L193 IcfgInterpreter]: Reachable states at location L33 satisfy 592#(exists ((v_mapsum_~ret~0_BEFORE_RETURN_27 Int) (v_prenex_196 Int) (v_mapsum_~ret~0_BEFORE_RETURN_28 Int) (v_prenex_195 Int)) (or (and (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_27 4294967296) 2147483647)) (<= main_~ret~1 2147483647) (not (< main_~i~1 1000)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (= (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_27 4294967296) (- 4294967296)) main_~ret~1) (<= 0 (+ main_~ret~1 2147483648))) (and (= (+ (mod v_prenex_196 4294967296) (- 4294967296)) main_~ret~1) (not (<= (mod v_prenex_196 4294967296) 2147483647)) (<= main_~ret~1 2147483647) (not (< main_~i~1 1000)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (<= 0 (+ main_~ret~1 2147483648))) (and (<= main_~ret~1 2147483647) (not (< main_~i~1 1000)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (= (mod v_prenex_195 4294967296) main_~ret~1) (<= (mod v_prenex_195 4294967296) 2147483647) (<= 0 (+ main_~ret~1 2147483648))) (and (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_28 4294967296) 2147483647) (<= main_~ret~1 2147483647) (not (< main_~i~1 1000)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (= (mod v_mapsum_~ret~0_BEFORE_RETURN_28 4294967296) main_~ret~1) (<= 0 (+ main_~ret~1 2147483648))))) [2019-10-06 22:49:00,791 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initENTRY satisfy 648#(and (= |old(#NULL.base)| |#NULL.base|) (= |#valid| |old(#valid)|) (= |#NULL.offset| |old(#NULL.offset)|)) [2019-10-06 22:49:00,791 INFO L193 IcfgInterpreter]: Reachable states at location L26-3 satisfy 68#true [2019-10-06 22:49:00,791 INFO L193 IcfgInterpreter]: Reachable states at location L12-3 satisfy 639#(<= 0 mapsum_~i~0) [2019-10-06 22:49:00,792 INFO L193 IcfgInterpreter]: Reachable states at location L-1 satisfy 23#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= 0 (select |#valid| 0)) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-06 22:49:00,792 INFO L193 IcfgInterpreter]: Reachable states at location mainENTRY satisfy 33#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= |#valid| |old(#valid)|) (<= 0 |#NULL.base|) (= |#memory_int| |old(#memory_int)|) (= |#NULL.offset| 0) (= |old(#length)| |#length|) (= 0 (select |old(#valid)| 0)) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-06 22:49:00,792 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initEXIT satisfy 653#(and (= |#valid| (store |old(#valid)| 0 0)) (= 0 |#NULL.base|) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-06 22:49:00,792 INFO L193 IcfgInterpreter]: Reachable states at location L39-1 satisfy 479#true [2019-10-06 22:49:00,792 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.startENTRY satisfy 6#true [2019-10-06 22:49:00,793 INFO L193 IcfgInterpreter]: Reachable states at location L39 satisfy 522#(and (not (< main_~i~2 999)) (<= 999 main_~i~2) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 3996)) main_~temp~0)) [2019-10-06 22:49:00,793 INFO L193 IcfgInterpreter]: Reachable states at location L30 satisfy 120#(or (exists ((v_mapsum_~ret~0_BEFORE_RETURN_27 Int) (v_prenex_195 Int)) (or (and (= (mod v_prenex_195 4294967296) |main_#t~ret4|) (not (< main_~i~1 1000)) (<= (mod v_prenex_195 4294967296) 2147483647)) (and (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_27 4294967296) 2147483647)) (not (< main_~i~1 1000)) (= (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_27 4294967296) (- 4294967296)) |main_#t~ret4|)))) (exists ((v_prenex_196 Int) (v_mapsum_~ret~0_BEFORE_RETURN_28 Int)) (or (and (= (+ (mod v_prenex_196 4294967296) (- 4294967296)) |main_#t~ret4|) (not (<= (mod v_prenex_196 4294967296) 2147483647)) (not (< main_~i~1 1000))) (and (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_28 4294967296) 2147483647) (not (< main_~i~1 1000)) (= (mod v_mapsum_~ret~0_BEFORE_RETURN_28 4294967296) |main_#t~ret4|))))) [2019-10-06 22:49:00,793 INFO L193 IcfgInterpreter]: Reachable states at location L41 satisfy 424#true [2019-10-06 22:49:00,793 INFO L193 IcfgInterpreter]: Reachable states at location mainErr0ASSERT_VIOLATIONERROR_FUNCTION satisfy 234#(or (and (exists ((v_mapsum_~ret~0_BEFORE_RETURN_32 Int) (v_mapsum_~ret~0_BEFORE_RETURN_31 Int) (v_prenex_224 Int) (v_prenex_223 Int)) (or (and (= (mod v_mapsum_~ret~0_BEFORE_RETURN_32 4294967296) main_~ret5~0) (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_32 4294967296) 2147483647) (not (< main_~i~2 999)) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 3996)) main_~temp~0)) (and (not (< main_~i~2 999)) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 3996)) main_~temp~0) (<= (mod v_prenex_223 4294967296) 2147483647) (= (mod v_prenex_223 4294967296) main_~ret5~0)) (and (not (<= (mod v_prenex_224 4294967296) 2147483647)) (not (< main_~i~2 999)) (<= main_~ret5~0 2147483647) (= main_~ret5~0 (+ (mod v_prenex_224 4294967296) (- 4294967296))) (<= 0 (+ main_~ret5~0 2147483648)) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 3996)) main_~temp~0)) (and (= main_~ret5~0 (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_31 4294967296) (- 4294967296))) (not (< main_~i~2 999)) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 3996)) main_~temp~0) (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_31 4294967296) 2147483647))))) (not (= main_~ret~1 main_~ret5~0))) (and (not (= main_~ret~1 main_~ret2~0)) (exists ((v_mapsum_~ret~0_BEFORE_RETURN_32 Int) (v_mapsum_~ret~0_BEFORE_RETURN_31 Int) (v_prenex_224 Int) (v_prenex_223 Int)) (or (and (= (mod v_mapsum_~ret~0_BEFORE_RETURN_32 4294967296) main_~ret5~0) (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_32 4294967296) 2147483647) (not (< main_~i~2 999)) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 3996)) main_~temp~0)) (and (not (< main_~i~2 999)) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 3996)) main_~temp~0) (<= (mod v_prenex_223 4294967296) 2147483647) (= (mod v_prenex_223 4294967296) main_~ret5~0)) (and (not (<= (mod v_prenex_224 4294967296) 2147483647)) (not (< main_~i~2 999)) (<= main_~ret5~0 2147483647) (= main_~ret5~0 (+ (mod v_prenex_224 4294967296) (- 4294967296))) (<= 0 (+ main_~ret5~0 2147483648)) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 3996)) main_~temp~0)) (and (= main_~ret5~0 (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_31 4294967296) (- 4294967296))) (not (< main_~i~2 999)) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 3996)) main_~temp~0) (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_31 4294967296) 2147483647))))))) [2019-10-06 22:49:00,794 INFO L193 IcfgInterpreter]: Reachable states at location L42 satisfy 313#true [2019-10-06 22:49:00,794 INFO L193 IcfgInterpreter]: Reachable states at location mapsumEXIT satisfy 644#(and (= (ite (<= (mod mapsum_~ret~0 4294967296) 2147483647) (mod mapsum_~ret~0 4294967296) (+ (mod mapsum_~ret~0 4294967296) (- 4294967296))) |mapsum_#res|) (<= 1000 mapsum_~i~0) (not (< mapsum_~i~0 1000)) (<= 0 mapsum_~i~0)) [2019-10-06 22:49:00,794 INFO L193 IcfgInterpreter]: Reachable states at location L33-1 satisfy 587#true [2019-10-06 22:49:00,794 INFO L193 IcfgInterpreter]: Reachable states at location L35-3 satisfy 560#true [2019-10-06 22:49:01,191 INFO L211 tionRefinementEngine]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2019-10-06 22:49:01,191 INFO L224 tionRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 4, 4, 11] total 21 [2019-10-06 22:49:01,192 INFO L442 AbstractCegarLoop]: Interpolant automaton has 22 states [2019-10-06 22:49:01,193 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2019-10-06 22:49:01,193 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=64, Invalid=398, Unknown=0, NotChecked=0, Total=462 [2019-10-06 22:49:01,194 INFO L87 Difference]: Start difference. First operand 25 states and 29 transitions. Second operand 22 states. [2019-10-06 22:49:02,154 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-06 22:49:02,155 INFO L93 Difference]: Finished difference Result 44 states and 58 transitions. [2019-10-06 22:49:02,155 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2019-10-06 22:49:02,155 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 32 [2019-10-06 22:49:02,156 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-06 22:49:02,157 INFO L225 Difference]: With dead ends: 44 [2019-10-06 22:49:02,157 INFO L226 Difference]: Without dead ends: 29 [2019-10-06 22:49:02,158 INFO L606 BasicCegarLoop]: 0 DeclaredPredicates, 119 GetRequests, 82 SyntacticMatches, 0 SemanticMatches, 37 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 305 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=210, Invalid=1272, Unknown=0, NotChecked=0, Total=1482 [2019-10-06 22:49:02,159 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 29 states. [2019-10-06 22:49:02,164 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 29 to 29. [2019-10-06 22:49:02,164 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 29 states. [2019-10-06 22:49:02,165 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29 states to 29 states and 33 transitions. [2019-10-06 22:49:02,165 INFO L78 Accepts]: Start accepts. Automaton has 29 states and 33 transitions. Word has length 32 [2019-10-06 22:49:02,165 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-06 22:49:02,166 INFO L462 AbstractCegarLoop]: Abstraction has 29 states and 33 transitions. [2019-10-06 22:49:02,166 INFO L463 AbstractCegarLoop]: Interpolant automaton has 22 states. [2019-10-06 22:49:02,166 INFO L276 IsEmpty]: Start isEmpty. Operand 29 states and 33 transitions. [2019-10-06 22:49:02,167 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2019-10-06 22:49:02,167 INFO L377 BasicCegarLoop]: Found error trace [2019-10-06 22:49:02,167 INFO L385 BasicCegarLoop]: trace histogram [12, 5, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-06 22:49:02,372 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 4 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-06 22:49:02,373 INFO L410 AbstractCegarLoop]: === Iteration 6 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-06 22:49:02,373 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-06 22:49:02,374 INFO L82 PathProgramCache]: Analyzing trace with hash -2095262385, now seen corresponding path program 3 times [2019-10-06 22:49:02,374 INFO L150 tionRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-10-06 22:49:02,374 INFO L231 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2019-10-06 22:49:02,374 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-06 22:49:02,375 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-06 22:49:02,375 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-06 22:49:02,417 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-06 22:49:02,469 INFO L134 CoverageAnalysis]: Checked inductivity of 127 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2019-10-06 22:49:02,469 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2019-10-06 22:49:02,469 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2019-10-06 22:49:02,469 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-06 22:49:02,582 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2019-10-06 22:49:02,582 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-10-06 22:49:02,584 INFO L256 TraceCheckSpWp]: Trace formula consists of 211 conjuncts, 7 conjunts are in the unsatisfiable core [2019-10-06 22:49:02,597 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2019-10-06 22:49:02,609 INFO L134 CoverageAnalysis]: Checked inductivity of 127 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2019-10-06 22:49:02,609 INFO L322 TraceCheckSpWp]: Computing backward predicates... [2019-10-06 22:49:02,680 INFO L134 CoverageAnalysis]: Checked inductivity of 127 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2019-10-06 22:49:02,680 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSifa [2019-10-06 22:49:02,682 INFO L162 IcfgInterpreter]: Started Sifa with 19 locations of interest [2019-10-06 22:49:02,682 INFO L169 IcfgInterpreter]: Building call graph [2019-10-06 22:49:02,682 INFO L174 IcfgInterpreter]: Initial procedures are [ULTIMATE.start] [2019-10-06 22:49:02,683 INFO L179 IcfgInterpreter]: Starting interpretation [2019-10-06 22:49:02,683 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.start with input of size 1 for LOIs [2019-10-06 22:49:02,701 INFO L199 IcfgInterpreter]: Interpreting procedure main with input of size 21 for LOIs [2019-10-06 22:49:04,300 INFO L199 IcfgInterpreter]: Interpreting procedure mapsum with input of size 1 for LOIs [2019-10-06 22:49:04,328 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.init with input of size 10 for LOIs [2019-10-06 22:49:04,331 INFO L183 IcfgInterpreter]: Interpretation finished [2019-10-06 22:49:04,331 INFO L191 IcfgInterpreter]: Final predicates for locations of interest are: [2019-10-06 22:49:04,331 INFO L193 IcfgInterpreter]: Reachable states at location mapsumENTRY satisfy 601#true [2019-10-06 22:49:04,331 INFO L193 IcfgInterpreter]: Reachable states at location L26-4 satisfy 73#(and (<= 1000 main_~i~1) (not (< main_~i~1 1000))) [2019-10-06 22:49:04,332 INFO L193 IcfgInterpreter]: Reachable states at location L33 satisfy 592#(exists ((v_mapsum_~ret~0_BEFORE_RETURN_54 Int) (v_mapsum_~ret~0_BEFORE_RETURN_53 Int) (v_prenex_389 Int) (v_prenex_390 Int)) (or (and (<= (mod v_prenex_390 4294967296) 2147483647) (<= main_~ret~1 2147483647) (not (< main_~i~1 1000)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (= (mod v_prenex_390 4294967296) main_~ret~1) (<= 0 (+ main_~ret~1 2147483648))) (and (<= main_~ret~1 2147483647) (= (mod v_prenex_389 4294967296) main_~ret~1) (not (< main_~i~1 1000)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (<= (mod v_prenex_389 4294967296) 2147483647) (<= 0 (+ main_~ret~1 2147483648))) (and (<= main_~ret~1 2147483647) (= main_~ret~1 (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_54 4294967296) (- 4294967296))) (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_54 4294967296) 2147483647)) (not (< main_~i~1 1000)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (<= 0 (+ main_~ret~1 2147483648))) (and (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_53 4294967296) 2147483647)) (<= main_~ret~1 2147483647) (not (< main_~i~1 1000)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (= main_~ret~1 (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_53 4294967296) (- 4294967296))) (<= 0 (+ main_~ret~1 2147483648))))) [2019-10-06 22:49:04,332 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initENTRY satisfy 648#(and (= |old(#NULL.base)| |#NULL.base|) (= |#valid| |old(#valid)|) (= |#NULL.offset| |old(#NULL.offset)|)) [2019-10-06 22:49:04,332 INFO L193 IcfgInterpreter]: Reachable states at location L26-3 satisfy 68#true [2019-10-06 22:49:04,332 INFO L193 IcfgInterpreter]: Reachable states at location L12-3 satisfy 639#(<= 0 mapsum_~i~0) [2019-10-06 22:49:04,332 INFO L193 IcfgInterpreter]: Reachable states at location L-1 satisfy 23#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= 0 (select |#valid| 0)) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-06 22:49:04,333 INFO L193 IcfgInterpreter]: Reachable states at location mainENTRY satisfy 33#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= |#valid| |old(#valid)|) (<= 0 |#NULL.base|) (= |#memory_int| |old(#memory_int)|) (= |#NULL.offset| 0) (= |old(#length)| |#length|) (= 0 (select |old(#valid)| 0)) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-06 22:49:04,333 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initEXIT satisfy 653#(and (= |#valid| (store |old(#valid)| 0 0)) (= 0 |#NULL.base|) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-06 22:49:04,333 INFO L193 IcfgInterpreter]: Reachable states at location L39-1 satisfy 479#true [2019-10-06 22:49:04,333 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.startENTRY satisfy 6#true [2019-10-06 22:49:04,333 INFO L193 IcfgInterpreter]: Reachable states at location L39 satisfy 522#(and (not (< main_~i~2 999)) (<= 999 main_~i~2) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 3996)) main_~temp~0)) [2019-10-06 22:49:04,333 INFO L193 IcfgInterpreter]: Reachable states at location L30 satisfy 120#(or (exists ((v_mapsum_~ret~0_BEFORE_RETURN_53 Int) (v_prenex_389 Int)) (or (and (= |main_#t~ret4| (mod v_prenex_389 4294967296)) (not (< main_~i~1 1000)) (<= (mod v_prenex_389 4294967296) 2147483647)) (and (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_53 4294967296) 2147483647)) (not (< main_~i~1 1000)) (= (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_53 4294967296) (- 4294967296)) |main_#t~ret4|)))) (exists ((v_mapsum_~ret~0_BEFORE_RETURN_54 Int) (v_prenex_390 Int)) (or (and (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_54 4294967296) 2147483647)) (= |main_#t~ret4| (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_54 4294967296) (- 4294967296))) (not (< main_~i~1 1000))) (and (<= (mod v_prenex_390 4294967296) 2147483647) (not (< main_~i~1 1000)) (= (mod v_prenex_390 4294967296) |main_#t~ret4|))))) [2019-10-06 22:49:04,334 INFO L193 IcfgInterpreter]: Reachable states at location L41 satisfy 424#true [2019-10-06 22:49:04,334 INFO L193 IcfgInterpreter]: Reachable states at location mainErr0ASSERT_VIOLATIONERROR_FUNCTION satisfy 234#(or (and (not (= main_~ret~1 main_~ret2~0)) (exists ((v_mapsum_~ret~0_BEFORE_RETURN_58 Int) (v_mapsum_~ret~0_BEFORE_RETURN_57 Int) (v_prenex_417 Int) (v_prenex_418 Int)) (or (and (not (< main_~i~2 999)) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 3996)) main_~temp~0) (= (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_58 4294967296) (- 4294967296)) main_~ret5~0) (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_58 4294967296) 2147483647))) (and (= main_~ret5~0 (+ (mod v_prenex_417 4294967296) (- 4294967296))) (not (< main_~i~2 999)) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 3996)) main_~temp~0) (not (<= (mod v_prenex_417 4294967296) 2147483647))) (and (= main_~ret5~0 (mod v_prenex_418 4294967296)) (not (< main_~i~2 999)) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 3996)) main_~temp~0) (<= (mod v_prenex_418 4294967296) 2147483647)) (and (= main_~ret5~0 (mod v_mapsum_~ret~0_BEFORE_RETURN_57 4294967296)) (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_57 4294967296) 2147483647) (not (< main_~i~2 999)) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 3996)) main_~temp~0))))) (and (exists ((v_mapsum_~ret~0_BEFORE_RETURN_58 Int) (v_mapsum_~ret~0_BEFORE_RETURN_57 Int) (v_prenex_417 Int) (v_prenex_418 Int)) (or (and (not (< main_~i~2 999)) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 3996)) main_~temp~0) (= (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_58 4294967296) (- 4294967296)) main_~ret5~0) (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_58 4294967296) 2147483647))) (and (= main_~ret5~0 (+ (mod v_prenex_417 4294967296) (- 4294967296))) (not (< main_~i~2 999)) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 3996)) main_~temp~0) (not (<= (mod v_prenex_417 4294967296) 2147483647))) (and (= main_~ret5~0 (mod v_prenex_418 4294967296)) (not (< main_~i~2 999)) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 3996)) main_~temp~0) (<= (mod v_prenex_418 4294967296) 2147483647)) (and (= main_~ret5~0 (mod v_mapsum_~ret~0_BEFORE_RETURN_57 4294967296)) (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_57 4294967296) 2147483647) (not (< main_~i~2 999)) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 3996)) main_~temp~0)))) (not (= main_~ret~1 main_~ret5~0)))) [2019-10-06 22:49:04,334 INFO L193 IcfgInterpreter]: Reachable states at location L42 satisfy 313#true [2019-10-06 22:49:04,334 INFO L193 IcfgInterpreter]: Reachable states at location mapsumEXIT satisfy 644#(and (= (ite (<= (mod mapsum_~ret~0 4294967296) 2147483647) (mod mapsum_~ret~0 4294967296) (+ (mod mapsum_~ret~0 4294967296) (- 4294967296))) |mapsum_#res|) (<= 1000 mapsum_~i~0) (not (< mapsum_~i~0 1000)) (<= 0 mapsum_~i~0)) [2019-10-06 22:49:04,335 INFO L193 IcfgInterpreter]: Reachable states at location L33-1 satisfy 587#true [2019-10-06 22:49:04,335 INFO L193 IcfgInterpreter]: Reachable states at location L35-3 satisfy 560#true [2019-10-06 22:49:04,676 INFO L211 tionRefinementEngine]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2019-10-06 22:49:04,676 INFO L224 tionRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8, 8, 11] total 25 [2019-10-06 22:49:04,678 INFO L442 AbstractCegarLoop]: Interpolant automaton has 26 states [2019-10-06 22:49:04,678 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2019-10-06 22:49:04,679 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=134, Invalid=516, Unknown=0, NotChecked=0, Total=650 [2019-10-06 22:49:04,679 INFO L87 Difference]: Start difference. First operand 29 states and 33 transitions. Second operand 26 states. [2019-10-06 22:49:05,688 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-06 22:49:05,689 INFO L93 Difference]: Finished difference Result 54 states and 68 transitions. [2019-10-06 22:49:05,689 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2019-10-06 22:49:05,689 INFO L78 Accepts]: Start accepts. Automaton has 26 states. Word has length 42 [2019-10-06 22:49:05,690 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-06 22:49:05,691 INFO L225 Difference]: With dead ends: 54 [2019-10-06 22:49:05,691 INFO L226 Difference]: Without dead ends: 36 [2019-10-06 22:49:05,693 INFO L606 BasicCegarLoop]: 0 DeclaredPredicates, 156 GetRequests, 112 SyntacticMatches, 0 SemanticMatches, 44 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 552 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=369, Invalid=1701, Unknown=0, NotChecked=0, Total=2070 [2019-10-06 22:49:05,694 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 36 states. [2019-10-06 22:49:05,707 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 36 to 36. [2019-10-06 22:49:05,707 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 36 states. [2019-10-06 22:49:05,708 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 36 states to 36 states and 40 transitions. [2019-10-06 22:49:05,708 INFO L78 Accepts]: Start accepts. Automaton has 36 states and 40 transitions. Word has length 42 [2019-10-06 22:49:05,709 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-06 22:49:05,709 INFO L462 AbstractCegarLoop]: Abstraction has 36 states and 40 transitions. [2019-10-06 22:49:05,709 INFO L463 AbstractCegarLoop]: Interpolant automaton has 26 states. [2019-10-06 22:49:05,709 INFO L276 IsEmpty]: Start isEmpty. Operand 36 states and 40 transitions. [2019-10-06 22:49:05,714 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2019-10-06 22:49:05,715 INFO L377 BasicCegarLoop]: Found error trace [2019-10-06 22:49:05,715 INFO L385 BasicCegarLoop]: trace histogram [12, 12, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-06 22:49:05,915 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 5 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-06 22:49:05,916 INFO L410 AbstractCegarLoop]: === Iteration 7 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-06 22:49:05,916 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-06 22:49:05,916 INFO L82 PathProgramCache]: Analyzing trace with hash 2049115666, now seen corresponding path program 4 times [2019-10-06 22:49:05,917 INFO L150 tionRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-10-06 22:49:05,917 INFO L231 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2019-10-06 22:49:05,917 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-06 22:49:05,917 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-06 22:49:05,917 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-06 22:49:05,956 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-06 22:49:06,092 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2019-10-06 22:49:06,092 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2019-10-06 22:49:06,092 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2019-10-06 22:49:06,092 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-06 22:49:06,223 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-06 22:49:06,225 INFO L256 TraceCheckSpWp]: Trace formula consists of 253 conjuncts, 14 conjunts are in the unsatisfiable core [2019-10-06 22:49:06,227 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2019-10-06 22:49:06,242 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2019-10-06 22:49:06,243 INFO L322 TraceCheckSpWp]: Computing backward predicates... [2019-10-06 22:49:06,493 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2019-10-06 22:49:06,493 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSifa [2019-10-06 22:49:06,495 INFO L162 IcfgInterpreter]: Started Sifa with 19 locations of interest [2019-10-06 22:49:06,495 INFO L169 IcfgInterpreter]: Building call graph [2019-10-06 22:49:06,496 INFO L174 IcfgInterpreter]: Initial procedures are [ULTIMATE.start] [2019-10-06 22:49:06,496 INFO L179 IcfgInterpreter]: Starting interpretation [2019-10-06 22:49:06,497 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.start with input of size 1 for LOIs [2019-10-06 22:49:06,533 INFO L199 IcfgInterpreter]: Interpreting procedure main with input of size 21 for LOIs [2019-10-06 22:49:07,817 INFO L199 IcfgInterpreter]: Interpreting procedure mapsum with input of size 1 for LOIs [2019-10-06 22:49:07,838 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.init with input of size 10 for LOIs [2019-10-06 22:49:07,844 INFO L183 IcfgInterpreter]: Interpretation finished [2019-10-06 22:49:07,844 INFO L191 IcfgInterpreter]: Final predicates for locations of interest are: [2019-10-06 22:49:07,844 INFO L193 IcfgInterpreter]: Reachable states at location mapsumENTRY satisfy 601#true [2019-10-06 22:49:07,846 INFO L193 IcfgInterpreter]: Reachable states at location L26-4 satisfy 73#(and (<= 1000 main_~i~1) (not (< main_~i~1 1000))) [2019-10-06 22:49:07,846 INFO L193 IcfgInterpreter]: Reachable states at location L33 satisfy 592#(exists ((v_mapsum_~ret~0_BEFORE_RETURN_79 Int) (v_prenex_583 Int) (v_prenex_584 Int) (v_mapsum_~ret~0_BEFORE_RETURN_80 Int)) (or (and (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_79 4294967296) 2147483647)) (<= main_~ret~1 2147483647) (= (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_79 4294967296) (- 4294967296)) main_~ret~1) (not (< main_~i~1 1000)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (<= 0 (+ main_~ret~1 2147483648))) (and (<= main_~ret~1 2147483647) (not (< main_~i~1 1000)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (not (<= (mod v_prenex_584 4294967296) 2147483647)) (= main_~ret~1 (+ (mod v_prenex_584 4294967296) (- 4294967296))) (<= 0 (+ main_~ret~1 2147483648))) (and (<= main_~ret~1 2147483647) (<= (mod v_prenex_583 4294967296) 2147483647) (not (< main_~i~1 1000)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (= main_~ret~1 (mod v_prenex_583 4294967296)) (<= 0 (+ main_~ret~1 2147483648))) (and (= main_~ret~1 (mod v_mapsum_~ret~0_BEFORE_RETURN_80 4294967296)) (<= main_~ret~1 2147483647) (not (< main_~i~1 1000)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_80 4294967296) 2147483647) (<= 0 (+ main_~ret~1 2147483648))))) [2019-10-06 22:49:07,846 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initENTRY satisfy 648#(and (= |old(#NULL.base)| |#NULL.base|) (= |#valid| |old(#valid)|) (= |#NULL.offset| |old(#NULL.offset)|)) [2019-10-06 22:49:07,846 INFO L193 IcfgInterpreter]: Reachable states at location L26-3 satisfy 68#true [2019-10-06 22:49:07,847 INFO L193 IcfgInterpreter]: Reachable states at location L12-3 satisfy 639#(<= 0 mapsum_~i~0) [2019-10-06 22:49:07,847 INFO L193 IcfgInterpreter]: Reachable states at location L-1 satisfy 23#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= 0 (select |#valid| 0)) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-06 22:49:07,847 INFO L193 IcfgInterpreter]: Reachable states at location mainENTRY satisfy 33#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= |#valid| |old(#valid)|) (<= 0 |#NULL.base|) (= |#memory_int| |old(#memory_int)|) (= |#NULL.offset| 0) (= |old(#length)| |#length|) (= 0 (select |old(#valid)| 0)) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-06 22:49:07,847 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initEXIT satisfy 653#(and (= |#valid| (store |old(#valid)| 0 0)) (= 0 |#NULL.base|) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-06 22:49:07,847 INFO L193 IcfgInterpreter]: Reachable states at location L39-1 satisfy 479#true [2019-10-06 22:49:07,847 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.startENTRY satisfy 6#true [2019-10-06 22:49:07,848 INFO L193 IcfgInterpreter]: Reachable states at location L39 satisfy 522#(and (not (< main_~i~2 999)) (<= 999 main_~i~2) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 3996)) main_~temp~0)) [2019-10-06 22:49:07,848 INFO L193 IcfgInterpreter]: Reachable states at location L30 satisfy 120#(or (exists ((v_prenex_584 Int) (v_mapsum_~ret~0_BEFORE_RETURN_80 Int)) (or (and (= |main_#t~ret4| (mod v_mapsum_~ret~0_BEFORE_RETURN_80 4294967296)) (not (< main_~i~1 1000)) (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_80 4294967296) 2147483647)) (and (not (< main_~i~1 1000)) (not (<= (mod v_prenex_584 4294967296) 2147483647)) (= (+ (mod v_prenex_584 4294967296) (- 4294967296)) |main_#t~ret4|)))) (exists ((v_mapsum_~ret~0_BEFORE_RETURN_79 Int) (v_prenex_583 Int)) (or (and (= (mod v_prenex_583 4294967296) |main_#t~ret4|) (not (< main_~i~1 1000)) (<= (mod v_prenex_583 4294967296) 2147483647)) (and (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_79 4294967296) 2147483647)) (not (< main_~i~1 1000)) (= (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_79 4294967296) (- 4294967296)) |main_#t~ret4|))))) [2019-10-06 22:49:07,848 INFO L193 IcfgInterpreter]: Reachable states at location L41 satisfy 424#true [2019-10-06 22:49:07,848 INFO L193 IcfgInterpreter]: Reachable states at location mainErr0ASSERT_VIOLATIONERROR_FUNCTION satisfy 234#(or (and (not (= main_~ret~1 main_~ret2~0)) (exists ((v_prenex_611 Int) (v_prenex_612 Int) (v_mapsum_~ret~0_BEFORE_RETURN_83 Int) (v_mapsum_~ret~0_BEFORE_RETURN_84 Int)) (or (and (= (+ (mod v_prenex_612 4294967296) (- 4294967296)) main_~ret5~0) (not (< main_~i~2 999)) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 3996)) main_~temp~0) (not (<= (mod v_prenex_612 4294967296) 2147483647))) (and (not (<= (mod v_prenex_611 4294967296) 2147483647)) (not (< main_~i~2 999)) (<= main_~ret5~0 2147483647) (= main_~ret5~0 (+ (mod v_prenex_611 4294967296) (- 4294967296))) (<= 0 (+ main_~ret5~0 2147483648)) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 3996)) main_~temp~0)) (and (not (< main_~i~2 999)) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 3996)) main_~temp~0) (= main_~ret5~0 (mod v_mapsum_~ret~0_BEFORE_RETURN_83 4294967296)) (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_83 4294967296) 2147483647)) (and (not (< main_~i~2 999)) (<= main_~ret5~0 2147483647) (= main_~ret5~0 (mod v_mapsum_~ret~0_BEFORE_RETURN_84 4294967296)) (<= 0 (+ main_~ret5~0 2147483648)) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 3996)) main_~temp~0) (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_84 4294967296) 2147483647))))) (and (exists ((v_prenex_611 Int) (v_prenex_612 Int) (v_mapsum_~ret~0_BEFORE_RETURN_83 Int) (v_mapsum_~ret~0_BEFORE_RETURN_84 Int)) (or (and (= (+ (mod v_prenex_612 4294967296) (- 4294967296)) main_~ret5~0) (not (< main_~i~2 999)) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 3996)) main_~temp~0) (not (<= (mod v_prenex_612 4294967296) 2147483647))) (and (not (<= (mod v_prenex_611 4294967296) 2147483647)) (not (< main_~i~2 999)) (<= main_~ret5~0 2147483647) (= main_~ret5~0 (+ (mod v_prenex_611 4294967296) (- 4294967296))) (<= 0 (+ main_~ret5~0 2147483648)) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 3996)) main_~temp~0)) (and (not (< main_~i~2 999)) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 3996)) main_~temp~0) (= main_~ret5~0 (mod v_mapsum_~ret~0_BEFORE_RETURN_83 4294967296)) (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_83 4294967296) 2147483647)) (and (not (< main_~i~2 999)) (<= main_~ret5~0 2147483647) (= main_~ret5~0 (mod v_mapsum_~ret~0_BEFORE_RETURN_84 4294967296)) (<= 0 (+ main_~ret5~0 2147483648)) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 3996)) main_~temp~0) (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_84 4294967296) 2147483647)))) (not (= main_~ret~1 main_~ret5~0)))) [2019-10-06 22:49:07,849 INFO L193 IcfgInterpreter]: Reachable states at location L42 satisfy 313#true [2019-10-06 22:49:07,849 INFO L193 IcfgInterpreter]: Reachable states at location mapsumEXIT satisfy 644#(and (= (ite (<= (mod mapsum_~ret~0 4294967296) 2147483647) (mod mapsum_~ret~0 4294967296) (+ (mod mapsum_~ret~0 4294967296) (- 4294967296))) |mapsum_#res|) (<= 1000 mapsum_~i~0) (not (< mapsum_~i~0 1000)) (<= 0 mapsum_~i~0)) [2019-10-06 22:49:07,849 INFO L193 IcfgInterpreter]: Reachable states at location L33-1 satisfy 587#true [2019-10-06 22:49:07,849 INFO L193 IcfgInterpreter]: Reachable states at location L35-3 satisfy 560#true [2019-10-06 22:49:08,246 INFO L211 tionRefinementEngine]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2019-10-06 22:49:08,247 INFO L224 tionRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 15, 15, 11] total 39 [2019-10-06 22:49:08,248 INFO L442 AbstractCegarLoop]: Interpolant automaton has 40 states [2019-10-06 22:49:08,248 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 40 interpolants. [2019-10-06 22:49:08,250 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=435, Invalid=1125, Unknown=0, NotChecked=0, Total=1560 [2019-10-06 22:49:08,250 INFO L87 Difference]: Start difference. First operand 36 states and 40 transitions. Second operand 40 states. [2019-10-06 22:49:09,728 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-06 22:49:09,729 INFO L93 Difference]: Finished difference Result 68 states and 89 transitions. [2019-10-06 22:49:09,729 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 39 states. [2019-10-06 22:49:09,729 INFO L78 Accepts]: Start accepts. Automaton has 40 states. Word has length 49 [2019-10-06 22:49:09,729 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-06 22:49:09,731 INFO L225 Difference]: With dead ends: 68 [2019-10-06 22:49:09,731 INFO L226 Difference]: Without dead ends: 50 [2019-10-06 22:49:09,733 INFO L606 BasicCegarLoop]: 0 DeclaredPredicates, 198 GetRequests, 126 SyntacticMatches, 0 SemanticMatches, 72 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1364 ImplicationChecksByTransitivity, 1.9s TimeCoverageRelationStatistics Valid=1244, Invalid=4158, Unknown=0, NotChecked=0, Total=5402 [2019-10-06 22:49:09,734 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 50 states. [2019-10-06 22:49:09,740 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 50 to 50. [2019-10-06 22:49:09,740 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 50 states. [2019-10-06 22:49:09,741 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 50 states to 50 states and 54 transitions. [2019-10-06 22:49:09,742 INFO L78 Accepts]: Start accepts. Automaton has 50 states and 54 transitions. Word has length 49 [2019-10-06 22:49:09,742 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-06 22:49:09,742 INFO L462 AbstractCegarLoop]: Abstraction has 50 states and 54 transitions. [2019-10-06 22:49:09,742 INFO L463 AbstractCegarLoop]: Interpolant automaton has 40 states. [2019-10-06 22:49:09,742 INFO L276 IsEmpty]: Start isEmpty. Operand 50 states and 54 transitions. [2019-10-06 22:49:09,744 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 64 [2019-10-06 22:49:09,744 INFO L377 BasicCegarLoop]: Found error trace [2019-10-06 22:49:09,744 INFO L385 BasicCegarLoop]: trace histogram [26, 12, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-06 22:49:09,952 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 6 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-06 22:49:09,953 INFO L410 AbstractCegarLoop]: === Iteration 8 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-06 22:49:09,954 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-06 22:49:09,954 INFO L82 PathProgramCache]: Analyzing trace with hash -740285582, now seen corresponding path program 5 times [2019-10-06 22:49:09,954 INFO L150 tionRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-10-06 22:49:09,955 INFO L231 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2019-10-06 22:49:09,955 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-06 22:49:09,955 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-06 22:49:09,955 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-06 22:49:10,003 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-06 22:49:10,379 INFO L134 CoverageAnalysis]: Checked inductivity of 463 backedges. 0 proven. 351 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2019-10-06 22:49:10,379 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2019-10-06 22:49:10,379 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2019-10-06 22:49:10,379 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-06 22:49:10,540 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 3 check-sat command(s) [2019-10-06 22:49:10,540 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-10-06 22:49:10,542 INFO L256 TraceCheckSpWp]: Trace formula consists of 149 conjuncts, 3 conjunts are in the unsatisfiable core [2019-10-06 22:49:10,545 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2019-10-06 22:49:10,589 INFO L134 CoverageAnalysis]: Checked inductivity of 463 backedges. 54 proven. 1 refuted. 0 times theorem prover too weak. 408 trivial. 0 not checked. [2019-10-06 22:49:10,590 INFO L322 TraceCheckSpWp]: Computing backward predicates... [2019-10-06 22:49:10,634 INFO L134 CoverageAnalysis]: Checked inductivity of 463 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 462 trivial. 0 not checked. [2019-10-06 22:49:10,634 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSifa [2019-10-06 22:49:10,635 INFO L162 IcfgInterpreter]: Started Sifa with 19 locations of interest [2019-10-06 22:49:10,636 INFO L169 IcfgInterpreter]: Building call graph [2019-10-06 22:49:10,636 INFO L174 IcfgInterpreter]: Initial procedures are [ULTIMATE.start] [2019-10-06 22:49:10,636 INFO L179 IcfgInterpreter]: Starting interpretation [2019-10-06 22:49:10,637 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.start with input of size 1 for LOIs [2019-10-06 22:49:10,652 INFO L199 IcfgInterpreter]: Interpreting procedure main with input of size 21 for LOIs [2019-10-06 22:49:11,839 INFO L199 IcfgInterpreter]: Interpreting procedure mapsum with input of size 1 for LOIs [2019-10-06 22:49:11,870 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.init with input of size 10 for LOIs [2019-10-06 22:49:11,873 INFO L183 IcfgInterpreter]: Interpretation finished [2019-10-06 22:49:11,873 INFO L191 IcfgInterpreter]: Final predicates for locations of interest are: [2019-10-06 22:49:11,873 INFO L193 IcfgInterpreter]: Reachable states at location mapsumENTRY satisfy 601#true [2019-10-06 22:49:11,874 INFO L193 IcfgInterpreter]: Reachable states at location L26-4 satisfy 73#(and (<= 1000 main_~i~1) (not (< main_~i~1 1000))) [2019-10-06 22:49:11,874 INFO L193 IcfgInterpreter]: Reachable states at location L33 satisfy 592#(exists ((v_prenex_777 Int) (v_mapsum_~ret~0_BEFORE_RETURN_106 Int) (v_mapsum_~ret~0_BEFORE_RETURN_105 Int) (v_prenex_778 Int)) (or (and (<= main_~ret~1 2147483647) (not (< main_~i~1 1000)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_105 4294967296) 2147483647) (= (mod v_mapsum_~ret~0_BEFORE_RETURN_105 4294967296) main_~ret~1) (<= 0 (+ main_~ret~1 2147483648))) (and (<= main_~ret~1 2147483647) (not (< main_~i~1 1000)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (= (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_106 4294967296) (- 4294967296)) main_~ret~1) (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_106 4294967296) 2147483647)) (<= 0 (+ main_~ret~1 2147483648))) (and (not (<= (mod v_prenex_777 4294967296) 2147483647)) (<= main_~ret~1 2147483647) (= main_~ret~1 (+ (mod v_prenex_777 4294967296) (- 4294967296))) (not (< main_~i~1 1000)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (<= 0 (+ main_~ret~1 2147483648))) (and (<= main_~ret~1 2147483647) (not (< main_~i~1 1000)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (= main_~ret~1 (mod v_prenex_778 4294967296)) (<= (mod v_prenex_778 4294967296) 2147483647) (<= 0 (+ main_~ret~1 2147483648))))) [2019-10-06 22:49:11,874 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initENTRY satisfy 648#(and (= |old(#NULL.base)| |#NULL.base|) (= |#valid| |old(#valid)|) (= |#NULL.offset| |old(#NULL.offset)|)) [2019-10-06 22:49:11,874 INFO L193 IcfgInterpreter]: Reachable states at location L26-3 satisfy 68#true [2019-10-06 22:49:11,874 INFO L193 IcfgInterpreter]: Reachable states at location L12-3 satisfy 639#(<= 0 mapsum_~i~0) [2019-10-06 22:49:11,875 INFO L193 IcfgInterpreter]: Reachable states at location L-1 satisfy 23#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= 0 (select |#valid| 0)) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-06 22:49:11,875 INFO L193 IcfgInterpreter]: Reachable states at location mainENTRY satisfy 33#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= |#valid| |old(#valid)|) (<= 0 |#NULL.base|) (= |#memory_int| |old(#memory_int)|) (= |#NULL.offset| 0) (= |old(#length)| |#length|) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (= 0 (select |old(#valid)| 0))) [2019-10-06 22:49:11,875 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initEXIT satisfy 653#(and (= |#valid| (store |old(#valid)| 0 0)) (= 0 |#NULL.base|) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-06 22:49:11,875 INFO L193 IcfgInterpreter]: Reachable states at location L39-1 satisfy 479#true [2019-10-06 22:49:11,875 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.startENTRY satisfy 6#true [2019-10-06 22:49:11,875 INFO L193 IcfgInterpreter]: Reachable states at location L39 satisfy 522#(and (not (< main_~i~2 999)) (<= 999 main_~i~2) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 3996)) main_~temp~0)) [2019-10-06 22:49:11,876 INFO L193 IcfgInterpreter]: Reachable states at location L30 satisfy 120#(or (exists ((v_prenex_777 Int) (v_mapsum_~ret~0_BEFORE_RETURN_105 Int)) (or (and (= (+ (mod v_prenex_777 4294967296) (- 4294967296)) |main_#t~ret4|) (not (<= (mod v_prenex_777 4294967296) 2147483647)) (not (< main_~i~1 1000))) (and (not (< main_~i~1 1000)) (= (mod v_mapsum_~ret~0_BEFORE_RETURN_105 4294967296) |main_#t~ret4|) (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_105 4294967296) 2147483647)))) (exists ((v_mapsum_~ret~0_BEFORE_RETURN_106 Int) (v_prenex_778 Int)) (or (and (not (< main_~i~1 1000)) (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_106 4294967296) 2147483647)) (= (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_106 4294967296) (- 4294967296)) |main_#t~ret4|)) (and (= (mod v_prenex_778 4294967296) |main_#t~ret4|) (not (< main_~i~1 1000)) (<= (mod v_prenex_778 4294967296) 2147483647))))) [2019-10-06 22:49:11,876 INFO L193 IcfgInterpreter]: Reachable states at location L41 satisfy 424#true [2019-10-06 22:49:11,876 INFO L193 IcfgInterpreter]: Reachable states at location mainErr0ASSERT_VIOLATIONERROR_FUNCTION satisfy 234#(or (and (not (= main_~ret~1 main_~ret2~0)) (exists ((v_prenex_806 Int) (v_prenex_805 Int) (v_mapsum_~ret~0_BEFORE_RETURN_109 Int) (v_mapsum_~ret~0_BEFORE_RETURN_110 Int)) (or (and (= main_~ret5~0 (mod v_prenex_806 4294967296)) (not (< main_~i~2 999)) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 3996)) main_~temp~0) (<= (mod v_prenex_806 4294967296) 2147483647)) (and (= main_~ret5~0 (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_110 4294967296) (- 4294967296))) (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_110 4294967296) 2147483647)) (not (< main_~i~2 999)) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 3996)) main_~temp~0)) (and (= (+ (mod v_prenex_805 4294967296) (- 4294967296)) main_~ret5~0) (not (< main_~i~2 999)) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (not (<= (mod v_prenex_805 4294967296) 2147483647)) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 3996)) main_~temp~0)) (and (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_109 4294967296) 2147483647) (not (< main_~i~2 999)) (<= main_~ret5~0 2147483647) (= (mod v_mapsum_~ret~0_BEFORE_RETURN_109 4294967296) main_~ret5~0) (<= 0 (+ main_~ret5~0 2147483648)) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 3996)) main_~temp~0))))) (and (exists ((v_prenex_806 Int) (v_prenex_805 Int) (v_mapsum_~ret~0_BEFORE_RETURN_109 Int) (v_mapsum_~ret~0_BEFORE_RETURN_110 Int)) (or (and (= main_~ret5~0 (mod v_prenex_806 4294967296)) (not (< main_~i~2 999)) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 3996)) main_~temp~0) (<= (mod v_prenex_806 4294967296) 2147483647)) (and (= main_~ret5~0 (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_110 4294967296) (- 4294967296))) (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_110 4294967296) 2147483647)) (not (< main_~i~2 999)) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 3996)) main_~temp~0)) (and (= (+ (mod v_prenex_805 4294967296) (- 4294967296)) main_~ret5~0) (not (< main_~i~2 999)) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (not (<= (mod v_prenex_805 4294967296) 2147483647)) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 3996)) main_~temp~0)) (and (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_109 4294967296) 2147483647) (not (< main_~i~2 999)) (<= main_~ret5~0 2147483647) (= (mod v_mapsum_~ret~0_BEFORE_RETURN_109 4294967296) main_~ret5~0) (<= 0 (+ main_~ret5~0 2147483648)) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 3996)) main_~temp~0)))) (not (= main_~ret~1 main_~ret5~0)))) [2019-10-06 22:49:11,876 INFO L193 IcfgInterpreter]: Reachable states at location L42 satisfy 313#true [2019-10-06 22:49:11,876 INFO L193 IcfgInterpreter]: Reachable states at location mapsumEXIT satisfy 644#(and (= (ite (<= (mod mapsum_~ret~0 4294967296) 2147483647) (mod mapsum_~ret~0 4294967296) (+ (mod mapsum_~ret~0 4294967296) (- 4294967296))) |mapsum_#res|) (<= 1000 mapsum_~i~0) (not (< mapsum_~i~0 1000)) (<= 0 mapsum_~i~0)) [2019-10-06 22:49:11,877 INFO L193 IcfgInterpreter]: Reachable states at location L33-1 satisfy 587#true [2019-10-06 22:49:11,877 INFO L193 IcfgInterpreter]: Reachable states at location L35-3 satisfy 560#true [2019-10-06 22:49:12,368 INFO L211 tionRefinementEngine]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2019-10-06 22:49:12,369 INFO L224 tionRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [29, 4, 4, 11] total 43 [2019-10-06 22:49:12,370 INFO L442 AbstractCegarLoop]: Interpolant automaton has 44 states [2019-10-06 22:49:12,371 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 44 interpolants. [2019-10-06 22:49:12,371 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=449, Invalid=1443, Unknown=0, NotChecked=0, Total=1892 [2019-10-06 22:49:12,371 INFO L87 Difference]: Start difference. First operand 50 states and 54 transitions. Second operand 44 states. [2019-10-06 22:49:16,651 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-06 22:49:16,651 INFO L93 Difference]: Finished difference Result 72 states and 83 transitions. [2019-10-06 22:49:16,651 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 44 states. [2019-10-06 22:49:16,651 INFO L78 Accepts]: Start accepts. Automaton has 44 states. Word has length 63 [2019-10-06 22:49:16,652 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-06 22:49:16,653 INFO L225 Difference]: With dead ends: 72 [2019-10-06 22:49:16,653 INFO L226 Difference]: Without dead ends: 54 [2019-10-06 22:49:16,656 INFO L606 BasicCegarLoop]: 0 DeclaredPredicates, 257 GetRequests, 176 SyntacticMatches, 0 SemanticMatches, 81 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1350 ImplicationChecksByTransitivity, 2.5s TimeCoverageRelationStatistics Valid=1349, Invalid=5457, Unknown=0, NotChecked=0, Total=6806 [2019-10-06 22:49:16,656 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 54 states. [2019-10-06 22:49:16,663 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 54 to 54. [2019-10-06 22:49:16,663 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 54 states. [2019-10-06 22:49:16,664 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 54 states to 54 states and 58 transitions. [2019-10-06 22:49:16,664 INFO L78 Accepts]: Start accepts. Automaton has 54 states and 58 transitions. Word has length 63 [2019-10-06 22:49:16,664 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-06 22:49:16,664 INFO L462 AbstractCegarLoop]: Abstraction has 54 states and 58 transitions. [2019-10-06 22:49:16,665 INFO L463 AbstractCegarLoop]: Interpolant automaton has 44 states. [2019-10-06 22:49:16,665 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 58 transitions. [2019-10-06 22:49:16,666 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-10-06 22:49:16,666 INFO L377 BasicCegarLoop]: Found error trace [2019-10-06 22:49:16,666 INFO L385 BasicCegarLoop]: trace histogram [27, 12, 4, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-06 22:49:16,869 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 7 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-06 22:49:16,870 INFO L410 AbstractCegarLoop]: === Iteration 9 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-06 22:49:16,871 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-06 22:49:16,871 INFO L82 PathProgramCache]: Analyzing trace with hash -1983049792, now seen corresponding path program 6 times [2019-10-06 22:49:16,871 INFO L150 tionRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-10-06 22:49:16,871 INFO L231 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2019-10-06 22:49:16,872 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-06 22:49:16,872 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-06 22:49:16,872 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-06 22:49:16,932 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-06 22:49:17,332 INFO L134 CoverageAnalysis]: Checked inductivity of 499 backedges. 0 proven. 378 refuted. 0 times theorem prover too weak. 121 trivial. 0 not checked. [2019-10-06 22:49:17,332 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2019-10-06 22:49:17,332 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2019-10-06 22:49:17,333 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-06 22:49:17,540 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2019-10-06 22:49:17,540 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-10-06 22:49:17,542 INFO L256 TraceCheckSpWp]: Trace formula consists of 355 conjuncts, 29 conjunts are in the unsatisfiable core [2019-10-06 22:49:17,545 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2019-10-06 22:49:17,590 INFO L134 CoverageAnalysis]: Checked inductivity of 499 backedges. 0 proven. 378 refuted. 0 times theorem prover too weak. 121 trivial. 0 not checked. [2019-10-06 22:49:17,590 INFO L322 TraceCheckSpWp]: Computing backward predicates... [2019-10-06 22:49:18,476 INFO L134 CoverageAnalysis]: Checked inductivity of 499 backedges. 0 proven. 378 refuted. 0 times theorem prover too weak. 121 trivial. 0 not checked. [2019-10-06 22:49:18,476 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSifa [2019-10-06 22:49:18,478 INFO L162 IcfgInterpreter]: Started Sifa with 19 locations of interest [2019-10-06 22:49:18,478 INFO L169 IcfgInterpreter]: Building call graph [2019-10-06 22:49:18,478 INFO L174 IcfgInterpreter]: Initial procedures are [ULTIMATE.start] [2019-10-06 22:49:18,478 INFO L179 IcfgInterpreter]: Starting interpretation [2019-10-06 22:49:18,479 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.start with input of size 1 for LOIs [2019-10-06 22:49:18,496 INFO L199 IcfgInterpreter]: Interpreting procedure main with input of size 21 for LOIs [2019-10-06 22:49:19,797 INFO L199 IcfgInterpreter]: Interpreting procedure mapsum with input of size 1 for LOIs [2019-10-06 22:49:19,819 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.init with input of size 10 for LOIs [2019-10-06 22:49:19,821 INFO L183 IcfgInterpreter]: Interpretation finished [2019-10-06 22:49:19,822 INFO L191 IcfgInterpreter]: Final predicates for locations of interest are: [2019-10-06 22:49:19,822 INFO L193 IcfgInterpreter]: Reachable states at location mapsumENTRY satisfy 601#true [2019-10-06 22:49:19,822 INFO L193 IcfgInterpreter]: Reachable states at location L26-4 satisfy 73#(and (<= 1000 main_~i~1) (not (< main_~i~1 1000))) [2019-10-06 22:49:19,822 INFO L193 IcfgInterpreter]: Reachable states at location L33 satisfy 592#(exists ((v_prenex_972 Int) (v_prenex_971 Int) (v_mapsum_~ret~0_BEFORE_RETURN_132 Int) (v_mapsum_~ret~0_BEFORE_RETURN_131 Int)) (or (and (<= (mod v_prenex_971 4294967296) 2147483647) (<= main_~ret~1 2147483647) (not (< main_~i~1 1000)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (= main_~ret~1 (mod v_prenex_971 4294967296)) (<= 0 (+ main_~ret~1 2147483648))) (and (= main_~ret~1 (mod v_prenex_972 4294967296)) (<= main_~ret~1 2147483647) (not (< main_~i~1 1000)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (<= (mod v_prenex_972 4294967296) 2147483647) (<= 0 (+ main_~ret~1 2147483648))) (and (<= main_~ret~1 2147483647) (not (< main_~i~1 1000)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_132 4294967296) 2147483647)) (= main_~ret~1 (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_132 4294967296) (- 4294967296))) (<= 0 (+ main_~ret~1 2147483648))) (and (<= main_~ret~1 2147483647) (= (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_131 4294967296) (- 4294967296)) main_~ret~1) (not (< main_~i~1 1000)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_131 4294967296) 2147483647)) (<= 0 (+ main_~ret~1 2147483648))))) [2019-10-06 22:49:19,822 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initENTRY satisfy 648#(and (= |old(#NULL.base)| |#NULL.base|) (= |#valid| |old(#valid)|) (= |#NULL.offset| |old(#NULL.offset)|)) [2019-10-06 22:49:19,823 INFO L193 IcfgInterpreter]: Reachable states at location L26-3 satisfy 68#true [2019-10-06 22:49:19,823 INFO L193 IcfgInterpreter]: Reachable states at location L12-3 satisfy 639#(<= 0 mapsum_~i~0) [2019-10-06 22:49:19,823 INFO L193 IcfgInterpreter]: Reachable states at location L-1 satisfy 23#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= 0 (select |#valid| 0)) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-06 22:49:19,823 INFO L193 IcfgInterpreter]: Reachable states at location mainENTRY satisfy 33#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= |#valid| |old(#valid)|) (<= 0 |#NULL.base|) (= |#memory_int| |old(#memory_int)|) (= |#NULL.offset| 0) (= |old(#length)| |#length|) (= 0 (select |old(#valid)| 0)) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-06 22:49:19,823 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initEXIT satisfy 653#(and (= |#valid| (store |old(#valid)| 0 0)) (= 0 |#NULL.base|) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-06 22:49:19,823 INFO L193 IcfgInterpreter]: Reachable states at location L39-1 satisfy 479#true [2019-10-06 22:49:19,824 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.startENTRY satisfy 6#true [2019-10-06 22:49:19,824 INFO L193 IcfgInterpreter]: Reachable states at location L39 satisfy 522#(and (not (< main_~i~2 999)) (<= 999 main_~i~2) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 3996)) main_~temp~0)) [2019-10-06 22:49:19,824 INFO L193 IcfgInterpreter]: Reachable states at location L30 satisfy 120#(or (exists ((v_prenex_972 Int) (v_mapsum_~ret~0_BEFORE_RETURN_132 Int)) (or (and (= (mod v_prenex_972 4294967296) |main_#t~ret4|) (not (< main_~i~1 1000)) (<= (mod v_prenex_972 4294967296) 2147483647)) (and (not (< main_~i~1 1000)) (= (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_132 4294967296) (- 4294967296)) |main_#t~ret4|) (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_132 4294967296) 2147483647))))) (exists ((v_prenex_971 Int) (v_mapsum_~ret~0_BEFORE_RETURN_131 Int)) (or (and (<= (mod v_prenex_971 4294967296) 2147483647) (not (< main_~i~1 1000)) (= (mod v_prenex_971 4294967296) |main_#t~ret4|)) (and (not (< main_~i~1 1000)) (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_131 4294967296) 2147483647)) (= (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_131 4294967296) (- 4294967296)) |main_#t~ret4|))))) [2019-10-06 22:49:19,824 INFO L193 IcfgInterpreter]: Reachable states at location L41 satisfy 424#true [2019-10-06 22:49:19,825 INFO L193 IcfgInterpreter]: Reachable states at location mainErr0ASSERT_VIOLATIONERROR_FUNCTION satisfy 234#(or (and (not (= main_~ret~1 main_~ret2~0)) (exists ((v_mapsum_~ret~0_BEFORE_RETURN_136 Int) (v_mapsum_~ret~0_BEFORE_RETURN_135 Int) (v_prenex_1000 Int) (v_prenex_999 Int)) (or (and (= (mod v_mapsum_~ret~0_BEFORE_RETURN_135 4294967296) main_~ret5~0) (not (< main_~i~2 999)) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 3996)) main_~temp~0) (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_135 4294967296) 2147483647)) (and (<= (mod v_prenex_1000 4294967296) 2147483647) (not (< main_~i~2 999)) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (mod v_prenex_1000 4294967296) main_~ret5~0) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 3996)) main_~temp~0)) (and (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_136 4294967296) 2147483647)) (= (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_136 4294967296) (- 4294967296)) main_~ret5~0) (not (< main_~i~2 999)) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 3996)) main_~temp~0)) (and (not (<= (mod v_prenex_999 4294967296) 2147483647)) (not (< main_~i~2 999)) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 3996)) main_~temp~0) (= (+ (mod v_prenex_999 4294967296) (- 4294967296)) main_~ret5~0))))) (and (exists ((v_mapsum_~ret~0_BEFORE_RETURN_136 Int) (v_mapsum_~ret~0_BEFORE_RETURN_135 Int) (v_prenex_1000 Int) (v_prenex_999 Int)) (or (and (= (mod v_mapsum_~ret~0_BEFORE_RETURN_135 4294967296) main_~ret5~0) (not (< main_~i~2 999)) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 3996)) main_~temp~0) (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_135 4294967296) 2147483647)) (and (<= (mod v_prenex_1000 4294967296) 2147483647) (not (< main_~i~2 999)) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (mod v_prenex_1000 4294967296) main_~ret5~0) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 3996)) main_~temp~0)) (and (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_136 4294967296) 2147483647)) (= (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_136 4294967296) (- 4294967296)) main_~ret5~0) (not (< main_~i~2 999)) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 3996)) main_~temp~0)) (and (not (<= (mod v_prenex_999 4294967296) 2147483647)) (not (< main_~i~2 999)) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 3996)) main_~temp~0) (= (+ (mod v_prenex_999 4294967296) (- 4294967296)) main_~ret5~0)))) (not (= main_~ret~1 main_~ret5~0)))) [2019-10-06 22:49:19,825 INFO L193 IcfgInterpreter]: Reachable states at location L42 satisfy 313#true [2019-10-06 22:49:19,825 INFO L193 IcfgInterpreter]: Reachable states at location mapsumEXIT satisfy 644#(and (= (ite (<= (mod mapsum_~ret~0 4294967296) 2147483647) (mod mapsum_~ret~0 4294967296) (+ (mod mapsum_~ret~0 4294967296) (- 4294967296))) |mapsum_#res|) (<= 1000 mapsum_~i~0) (not (< mapsum_~i~0 1000)) (<= 0 mapsum_~i~0)) [2019-10-06 22:49:19,825 INFO L193 IcfgInterpreter]: Reachable states at location L33-1 satisfy 587#true [2019-10-06 22:49:19,825 INFO L193 IcfgInterpreter]: Reachable states at location L35-3 satisfy 560#true [2019-10-06 22:49:20,282 INFO L211 tionRefinementEngine]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2019-10-06 22:49:20,283 INFO L224 tionRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [30, 30, 30, 11] total 69 [2019-10-06 22:49:20,284 INFO L442 AbstractCegarLoop]: Interpolant automaton has 70 states [2019-10-06 22:49:20,285 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 70 interpolants. [2019-10-06 22:49:20,286 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=1740, Invalid=3090, Unknown=0, NotChecked=0, Total=4830 [2019-10-06 22:49:20,287 INFO L87 Difference]: Start difference. First operand 54 states and 58 transitions. Second operand 70 states. [2019-10-06 22:49:23,695 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-06 22:49:23,695 INFO L93 Difference]: Finished difference Result 104 states and 140 transitions. [2019-10-06 22:49:23,695 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 69 states. [2019-10-06 22:49:23,695 INFO L78 Accepts]: Start accepts. Automaton has 70 states. Word has length 67 [2019-10-06 22:49:23,695 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-06 22:49:23,696 INFO L225 Difference]: With dead ends: 104 [2019-10-06 22:49:23,696 INFO L226 Difference]: Without dead ends: 83 [2019-10-06 22:49:23,701 INFO L606 BasicCegarLoop]: 0 DeclaredPredicates, 297 GetRequests, 165 SyntacticMatches, 0 SemanticMatches, 132 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3929 ImplicationChecksByTransitivity, 4.7s TimeCoverageRelationStatistics Valid=5099, Invalid=12723, Unknown=0, NotChecked=0, Total=17822 [2019-10-06 22:49:23,701 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 83 states. [2019-10-06 22:49:23,709 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 83 to 83. [2019-10-06 22:49:23,709 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 83 states. [2019-10-06 22:49:23,710 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 83 states to 83 states and 87 transitions. [2019-10-06 22:49:23,711 INFO L78 Accepts]: Start accepts. Automaton has 83 states and 87 transitions. Word has length 67 [2019-10-06 22:49:23,711 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-06 22:49:23,711 INFO L462 AbstractCegarLoop]: Abstraction has 83 states and 87 transitions. [2019-10-06 22:49:23,711 INFO L463 AbstractCegarLoop]: Interpolant automaton has 70 states. [2019-10-06 22:49:23,711 INFO L276 IsEmpty]: Start isEmpty. Operand 83 states and 87 transitions. [2019-10-06 22:49:23,713 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 97 [2019-10-06 22:49:23,713 INFO L377 BasicCegarLoop]: Found error trace [2019-10-06 22:49:23,713 INFO L385 BasicCegarLoop]: trace histogram [56, 12, 4, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-06 22:49:23,915 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 8 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-06 22:49:23,916 INFO L410 AbstractCegarLoop]: === Iteration 10 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-06 22:49:23,916 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-06 22:49:23,917 INFO L82 PathProgramCache]: Analyzing trace with hash 1441308797, now seen corresponding path program 7 times [2019-10-06 22:49:23,917 INFO L150 tionRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-10-06 22:49:23,917 INFO L231 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2019-10-06 22:49:23,918 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-06 22:49:23,918 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-06 22:49:23,918 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-06 22:49:23,978 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-06 22:49:25,331 INFO L134 CoverageAnalysis]: Checked inductivity of 1717 backedges. 0 proven. 1596 refuted. 0 times theorem prover too weak. 121 trivial. 0 not checked. [2019-10-06 22:49:25,331 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2019-10-06 22:49:25,331 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2019-10-06 22:49:25,331 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-06 22:49:25,609 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-06 22:49:25,611 INFO L256 TraceCheckSpWp]: Trace formula consists of 529 conjuncts, 58 conjunts are in the unsatisfiable core [2019-10-06 22:49:25,614 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2019-10-06 22:49:25,639 INFO L134 CoverageAnalysis]: Checked inductivity of 1717 backedges. 0 proven. 1596 refuted. 0 times theorem prover too weak. 121 trivial. 0 not checked. [2019-10-06 22:49:25,640 INFO L322 TraceCheckSpWp]: Computing backward predicates... [2019-10-06 22:49:29,221 INFO L134 CoverageAnalysis]: Checked inductivity of 1717 backedges. 0 proven. 1596 refuted. 0 times theorem prover too weak. 121 trivial. 0 not checked. [2019-10-06 22:49:29,221 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSifa [2019-10-06 22:49:29,222 INFO L162 IcfgInterpreter]: Started Sifa with 19 locations of interest [2019-10-06 22:49:29,222 INFO L169 IcfgInterpreter]: Building call graph [2019-10-06 22:49:29,223 INFO L174 IcfgInterpreter]: Initial procedures are [ULTIMATE.start] [2019-10-06 22:49:29,223 INFO L179 IcfgInterpreter]: Starting interpretation [2019-10-06 22:49:29,223 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.start with input of size 1 for LOIs [2019-10-06 22:49:29,241 INFO L199 IcfgInterpreter]: Interpreting procedure main with input of size 21 for LOIs [2019-10-06 22:49:30,396 INFO L199 IcfgInterpreter]: Interpreting procedure mapsum with input of size 1 for LOIs [2019-10-06 22:49:30,425 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.init with input of size 10 for LOIs [2019-10-06 22:49:30,427 INFO L183 IcfgInterpreter]: Interpretation finished [2019-10-06 22:49:30,427 INFO L191 IcfgInterpreter]: Final predicates for locations of interest are: [2019-10-06 22:49:30,427 INFO L193 IcfgInterpreter]: Reachable states at location mapsumENTRY satisfy 601#true [2019-10-06 22:49:30,427 INFO L193 IcfgInterpreter]: Reachable states at location L26-4 satisfy 73#(and (<= 1000 main_~i~1) (not (< main_~i~1 1000))) [2019-10-06 22:49:30,428 INFO L193 IcfgInterpreter]: Reachable states at location L33 satisfy 592#(exists ((v_mapsum_~ret~0_BEFORE_RETURN_158 Int) (v_mapsum_~ret~0_BEFORE_RETURN_157 Int) (v_prenex_1166 Int) (v_prenex_1165 Int)) (or (and (<= main_~ret~1 2147483647) (= main_~ret~1 (+ (mod v_prenex_1166 4294967296) (- 4294967296))) (not (< main_~i~1 1000)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (not (<= (mod v_prenex_1166 4294967296) 2147483647)) (<= 0 (+ main_~ret~1 2147483648))) (and (<= main_~ret~1 2147483647) (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_157 4294967296) 2147483647) (not (< main_~i~1 1000)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (= main_~ret~1 (mod v_mapsum_~ret~0_BEFORE_RETURN_157 4294967296)) (<= 0 (+ main_~ret~1 2147483648))) (and (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_158 4294967296) 2147483647) (= (mod v_mapsum_~ret~0_BEFORE_RETURN_158 4294967296) main_~ret~1) (<= main_~ret~1 2147483647) (not (< main_~i~1 1000)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (<= 0 (+ main_~ret~1 2147483648))) (and (= (+ (mod v_prenex_1165 4294967296) (- 4294967296)) main_~ret~1) (<= main_~ret~1 2147483647) (not (< main_~i~1 1000)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (not (<= (mod v_prenex_1165 4294967296) 2147483647)) (<= 0 (+ main_~ret~1 2147483648))))) [2019-10-06 22:49:30,428 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initENTRY satisfy 648#(and (= |old(#NULL.base)| |#NULL.base|) (= |#valid| |old(#valid)|) (= |#NULL.offset| |old(#NULL.offset)|)) [2019-10-06 22:49:30,428 INFO L193 IcfgInterpreter]: Reachable states at location L26-3 satisfy 68#true [2019-10-06 22:49:30,428 INFO L193 IcfgInterpreter]: Reachable states at location L12-3 satisfy 639#(<= 0 mapsum_~i~0) [2019-10-06 22:49:30,428 INFO L193 IcfgInterpreter]: Reachable states at location L-1 satisfy 23#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= 0 (select |#valid| 0)) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-06 22:49:30,428 INFO L193 IcfgInterpreter]: Reachable states at location mainENTRY satisfy 33#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= |#valid| |old(#valid)|) (<= 0 |#NULL.base|) (= |#memory_int| |old(#memory_int)|) (= |#NULL.offset| 0) (= |old(#length)| |#length|) (= 0 (select |old(#valid)| 0)) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-06 22:49:30,429 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initEXIT satisfy 653#(and (= |#valid| (store |old(#valid)| 0 0)) (= 0 |#NULL.base|) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-06 22:49:30,429 INFO L193 IcfgInterpreter]: Reachable states at location L39-1 satisfy 479#true [2019-10-06 22:49:30,429 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.startENTRY satisfy 6#true [2019-10-06 22:49:30,429 INFO L193 IcfgInterpreter]: Reachable states at location L39 satisfy 522#(and (not (< main_~i~2 999)) (<= 999 main_~i~2) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 3996)) main_~temp~0)) [2019-10-06 22:49:30,429 INFO L193 IcfgInterpreter]: Reachable states at location L30 satisfy 120#(or (exists ((v_mapsum_~ret~0_BEFORE_RETURN_158 Int) (v_prenex_1166 Int)) (or (and (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_158 4294967296) 2147483647) (not (< main_~i~1 1000)) (= (mod v_mapsum_~ret~0_BEFORE_RETURN_158 4294967296) |main_#t~ret4|)) (and (= (+ (mod v_prenex_1166 4294967296) (- 4294967296)) |main_#t~ret4|) (not (< main_~i~1 1000)) (not (<= (mod v_prenex_1166 4294967296) 2147483647))))) (exists ((v_mapsum_~ret~0_BEFORE_RETURN_157 Int) (v_prenex_1165 Int)) (or (and (not (< main_~i~1 1000)) (not (<= (mod v_prenex_1165 4294967296) 2147483647)) (= (+ (mod v_prenex_1165 4294967296) (- 4294967296)) |main_#t~ret4|)) (and (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_157 4294967296) 2147483647) (= (mod v_mapsum_~ret~0_BEFORE_RETURN_157 4294967296) |main_#t~ret4|) (not (< main_~i~1 1000)))))) [2019-10-06 22:49:30,429 INFO L193 IcfgInterpreter]: Reachable states at location L41 satisfy 424#true [2019-10-06 22:49:30,430 INFO L193 IcfgInterpreter]: Reachable states at location mainErr0ASSERT_VIOLATIONERROR_FUNCTION satisfy 234#(or (and (not (= main_~ret~1 main_~ret2~0)) (exists ((v_mapsum_~ret~0_BEFORE_RETURN_162 Int) (v_mapsum_~ret~0_BEFORE_RETURN_161 Int) (v_prenex_1194 Int) (v_prenex_1193 Int)) (or (and (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_162 4294967296) 2147483647) (not (< main_~i~2 999)) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 3996)) main_~temp~0) (= main_~ret5~0 (mod v_mapsum_~ret~0_BEFORE_RETURN_162 4294967296))) (and (not (< main_~i~2 999)) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_161 4294967296) (- 4294967296)) main_~ret5~0) (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_161 4294967296) 2147483647)) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 3996)) main_~temp~0)) (and (<= (mod v_prenex_1193 4294967296) 2147483647) (= (mod v_prenex_1193 4294967296) main_~ret5~0) (not (< main_~i~2 999)) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 3996)) main_~temp~0)) (and (not (< main_~i~2 999)) (<= main_~ret5~0 2147483647) (not (<= (mod v_prenex_1194 4294967296) 2147483647)) (<= 0 (+ main_~ret5~0 2147483648)) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 3996)) main_~temp~0) (= (+ (mod v_prenex_1194 4294967296) (- 4294967296)) main_~ret5~0))))) (and (exists ((v_mapsum_~ret~0_BEFORE_RETURN_162 Int) (v_mapsum_~ret~0_BEFORE_RETURN_161 Int) (v_prenex_1194 Int) (v_prenex_1193 Int)) (or (and (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_162 4294967296) 2147483647) (not (< main_~i~2 999)) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 3996)) main_~temp~0) (= main_~ret5~0 (mod v_mapsum_~ret~0_BEFORE_RETURN_162 4294967296))) (and (not (< main_~i~2 999)) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_161 4294967296) (- 4294967296)) main_~ret5~0) (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_161 4294967296) 2147483647)) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 3996)) main_~temp~0)) (and (<= (mod v_prenex_1193 4294967296) 2147483647) (= (mod v_prenex_1193 4294967296) main_~ret5~0) (not (< main_~i~2 999)) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 3996)) main_~temp~0)) (and (not (< main_~i~2 999)) (<= main_~ret5~0 2147483647) (not (<= (mod v_prenex_1194 4294967296) 2147483647)) (<= 0 (+ main_~ret5~0 2147483648)) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 3996)) main_~temp~0) (= (+ (mod v_prenex_1194 4294967296) (- 4294967296)) main_~ret5~0)))) (not (= main_~ret~1 main_~ret5~0)))) [2019-10-06 22:49:30,430 INFO L193 IcfgInterpreter]: Reachable states at location L42 satisfy 313#true [2019-10-06 22:49:30,430 INFO L193 IcfgInterpreter]: Reachable states at location mapsumEXIT satisfy 644#(and (= (ite (<= (mod mapsum_~ret~0 4294967296) 2147483647) (mod mapsum_~ret~0 4294967296) (+ (mod mapsum_~ret~0 4294967296) (- 4294967296))) |mapsum_#res|) (<= 1000 mapsum_~i~0) (not (< mapsum_~i~0 1000)) (<= 0 mapsum_~i~0)) [2019-10-06 22:49:30,430 INFO L193 IcfgInterpreter]: Reachable states at location L33-1 satisfy 587#true [2019-10-06 22:49:30,431 INFO L193 IcfgInterpreter]: Reachable states at location L35-3 satisfy 560#true [2019-10-06 22:49:31,146 INFO L211 tionRefinementEngine]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2019-10-06 22:49:31,146 INFO L224 tionRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [59, 59, 59, 11] total 127 [2019-10-06 22:49:31,148 INFO L442 AbstractCegarLoop]: Interpolant automaton has 128 states [2019-10-06 22:49:31,150 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 128 interpolants. [2019-10-06 22:49:31,153 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6815, Invalid=9441, Unknown=0, NotChecked=0, Total=16256 [2019-10-06 22:49:31,153 INFO L87 Difference]: Start difference. First operand 83 states and 87 transitions. Second operand 128 states. [2019-10-06 22:49:41,093 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-06 22:49:41,093 INFO L93 Difference]: Finished difference Result 162 states and 227 transitions. [2019-10-06 22:49:41,093 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 127 states. [2019-10-06 22:49:41,093 INFO L78 Accepts]: Start accepts. Automaton has 128 states. Word has length 96 [2019-10-06 22:49:41,094 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-06 22:49:41,095 INFO L225 Difference]: With dead ends: 162 [2019-10-06 22:49:41,096 INFO L226 Difference]: Without dead ends: 141 [2019-10-06 22:49:41,101 INFO L606 BasicCegarLoop]: 0 DeclaredPredicates, 471 GetRequests, 223 SyntacticMatches, 0 SemanticMatches, 248 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 12078 ImplicationChecksByTransitivity, 14.7s TimeCoverageRelationStatistics Valid=20208, Invalid=42042, Unknown=0, NotChecked=0, Total=62250 [2019-10-06 22:49:41,102 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 141 states. [2019-10-06 22:49:41,114 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 141 to 141. [2019-10-06 22:49:41,114 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 141 states. [2019-10-06 22:49:41,116 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 141 states to 141 states and 145 transitions. [2019-10-06 22:49:41,116 INFO L78 Accepts]: Start accepts. Automaton has 141 states and 145 transitions. Word has length 96 [2019-10-06 22:49:41,116 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-06 22:49:41,116 INFO L462 AbstractCegarLoop]: Abstraction has 141 states and 145 transitions. [2019-10-06 22:49:41,116 INFO L463 AbstractCegarLoop]: Interpolant automaton has 128 states. [2019-10-06 22:49:41,117 INFO L276 IsEmpty]: Start isEmpty. Operand 141 states and 145 transitions. [2019-10-06 22:49:41,119 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 155 [2019-10-06 22:49:41,119 INFO L377 BasicCegarLoop]: Found error trace [2019-10-06 22:49:41,119 INFO L385 BasicCegarLoop]: trace histogram [114, 12, 4, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-06 22:49:41,322 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 9 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-06 22:49:41,323 INFO L410 AbstractCegarLoop]: === Iteration 11 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-06 22:49:41,323 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-06 22:49:41,324 INFO L82 PathProgramCache]: Analyzing trace with hash -1049526435, now seen corresponding path program 8 times [2019-10-06 22:49:41,324 INFO L150 tionRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-10-06 22:49:41,324 INFO L231 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2019-10-06 22:49:41,324 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-06 22:49:41,325 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-06 22:49:41,325 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-06 22:49:41,449 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-06 22:49:46,317 INFO L134 CoverageAnalysis]: Checked inductivity of 6676 backedges. 0 proven. 6555 refuted. 0 times theorem prover too weak. 121 trivial. 0 not checked. [2019-10-06 22:49:46,317 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2019-10-06 22:49:46,317 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2019-10-06 22:49:46,317 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-06 22:49:46,615 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 3 check-sat command(s) [2019-10-06 22:49:46,616 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-10-06 22:49:46,617 INFO L256 TraceCheckSpWp]: Trace formula consists of 153 conjuncts, 6 conjunts are in the unsatisfiable core [2019-10-06 22:49:46,620 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2019-10-06 22:49:46,878 INFO L134 CoverageAnalysis]: Checked inductivity of 6676 backedges. 52 proven. 10 refuted. 0 times theorem prover too weak. 6614 trivial. 0 not checked. [2019-10-06 22:49:46,878 INFO L322 TraceCheckSpWp]: Computing backward predicates... [2019-10-06 22:49:47,153 INFO L134 CoverageAnalysis]: Checked inductivity of 6676 backedges. 52 proven. 10 refuted. 0 times theorem prover too weak. 6614 trivial. 0 not checked. [2019-10-06 22:49:47,154 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSifa [2019-10-06 22:49:47,155 INFO L162 IcfgInterpreter]: Started Sifa with 19 locations of interest [2019-10-06 22:49:47,155 INFO L169 IcfgInterpreter]: Building call graph [2019-10-06 22:49:47,155 INFO L174 IcfgInterpreter]: Initial procedures are [ULTIMATE.start] [2019-10-06 22:49:47,156 INFO L179 IcfgInterpreter]: Starting interpretation [2019-10-06 22:49:47,156 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.start with input of size 1 for LOIs [2019-10-06 22:49:47,174 INFO L199 IcfgInterpreter]: Interpreting procedure main with input of size 21 for LOIs [2019-10-06 22:49:48,301 INFO L199 IcfgInterpreter]: Interpreting procedure mapsum with input of size 1 for LOIs [2019-10-06 22:49:48,331 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.init with input of size 10 for LOIs [2019-10-06 22:49:48,333 INFO L183 IcfgInterpreter]: Interpretation finished [2019-10-06 22:49:48,333 INFO L191 IcfgInterpreter]: Final predicates for locations of interest are: [2019-10-06 22:49:48,334 INFO L193 IcfgInterpreter]: Reachable states at location mapsumENTRY satisfy 601#true [2019-10-06 22:49:48,334 INFO L193 IcfgInterpreter]: Reachable states at location L26-4 satisfy 73#(and (<= 1000 main_~i~1) (not (< main_~i~1 1000))) [2019-10-06 22:49:48,334 INFO L193 IcfgInterpreter]: Reachable states at location L33 satisfy 592#(exists ((v_prenex_1359 Int) (v_mapsum_~ret~0_BEFORE_RETURN_184 Int) (v_mapsum_~ret~0_BEFORE_RETURN_183 Int) (v_prenex_1360 Int)) (or (and (<= main_~ret~1 2147483647) (not (< main_~i~1 1000)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (= (+ (mod v_prenex_1360 4294967296) (- 4294967296)) main_~ret~1) (not (<= (mod v_prenex_1360 4294967296) 2147483647)) (<= 0 (+ main_~ret~1 2147483648))) (and (not (<= (mod v_prenex_1359 4294967296) 2147483647)) (<= main_~ret~1 2147483647) (= main_~ret~1 (+ (mod v_prenex_1359 4294967296) (- 4294967296))) (not (< main_~i~1 1000)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (<= 0 (+ main_~ret~1 2147483648))) (and (= main_~ret~1 (mod v_mapsum_~ret~0_BEFORE_RETURN_183 4294967296)) (<= main_~ret~1 2147483647) (not (< main_~i~1 1000)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_183 4294967296) 2147483647) (<= 0 (+ main_~ret~1 2147483648))) (and (<= main_~ret~1 2147483647) (not (< main_~i~1 1000)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_184 4294967296) 2147483647) (= (mod v_mapsum_~ret~0_BEFORE_RETURN_184 4294967296) main_~ret~1) (<= 0 (+ main_~ret~1 2147483648))))) [2019-10-06 22:49:48,334 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initENTRY satisfy 648#(and (= |old(#NULL.base)| |#NULL.base|) (= |#valid| |old(#valid)|) (= |#NULL.offset| |old(#NULL.offset)|)) [2019-10-06 22:49:48,334 INFO L193 IcfgInterpreter]: Reachable states at location L26-3 satisfy 68#true [2019-10-06 22:49:48,334 INFO L193 IcfgInterpreter]: Reachable states at location L12-3 satisfy 639#(<= 0 mapsum_~i~0) [2019-10-06 22:49:48,334 INFO L193 IcfgInterpreter]: Reachable states at location L-1 satisfy 23#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= 0 (select |#valid| 0)) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-06 22:49:48,334 INFO L193 IcfgInterpreter]: Reachable states at location mainENTRY satisfy 33#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= |#valid| |old(#valid)|) (<= 0 |#NULL.base|) (= |#memory_int| |old(#memory_int)|) (= |#NULL.offset| 0) (= |old(#length)| |#length|) (= 0 (select |old(#valid)| 0)) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-06 22:49:48,335 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initEXIT satisfy 653#(and (= |#valid| (store |old(#valid)| 0 0)) (= 0 |#NULL.base|) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-06 22:49:48,335 INFO L193 IcfgInterpreter]: Reachable states at location L39-1 satisfy 479#true [2019-10-06 22:49:48,335 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.startENTRY satisfy 6#true [2019-10-06 22:49:48,335 INFO L193 IcfgInterpreter]: Reachable states at location L39 satisfy 522#(and (not (< main_~i~2 999)) (<= 999 main_~i~2) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 3996)) main_~temp~0)) [2019-10-06 22:49:48,335 INFO L193 IcfgInterpreter]: Reachable states at location L30 satisfy 120#(or (exists ((v_mapsum_~ret~0_BEFORE_RETURN_184 Int) (v_prenex_1360 Int)) (or (and (not (< main_~i~1 1000)) (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_184 4294967296) 2147483647) (= (mod v_mapsum_~ret~0_BEFORE_RETURN_184 4294967296) |main_#t~ret4|)) (and (not (< main_~i~1 1000)) (= (+ (mod v_prenex_1360 4294967296) (- 4294967296)) |main_#t~ret4|) (not (<= (mod v_prenex_1360 4294967296) 2147483647))))) (exists ((v_prenex_1359 Int) (v_mapsum_~ret~0_BEFORE_RETURN_183 Int)) (or (and (not (<= (mod v_prenex_1359 4294967296) 2147483647)) (= (+ (mod v_prenex_1359 4294967296) (- 4294967296)) |main_#t~ret4|) (not (< main_~i~1 1000))) (and (= |main_#t~ret4| (mod v_mapsum_~ret~0_BEFORE_RETURN_183 4294967296)) (not (< main_~i~1 1000)) (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_183 4294967296) 2147483647))))) [2019-10-06 22:49:48,335 INFO L193 IcfgInterpreter]: Reachable states at location L41 satisfy 424#true [2019-10-06 22:49:48,335 INFO L193 IcfgInterpreter]: Reachable states at location mainErr0ASSERT_VIOLATIONERROR_FUNCTION satisfy 234#(or (and (not (= main_~ret~1 main_~ret2~0)) (exists ((v_prenex_1388 Int) (v_prenex_1387 Int) (v_mapsum_~ret~0_BEFORE_RETURN_188 Int) (v_mapsum_~ret~0_BEFORE_RETURN_187 Int)) (or (and (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_188 4294967296) 2147483647)) (= main_~ret5~0 (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_188 4294967296) (- 4294967296))) (not (< main_~i~2 999)) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 3996)) main_~temp~0)) (and (not (< main_~i~2 999)) (<= main_~ret5~0 2147483647) (= (mod v_prenex_1388 4294967296) main_~ret5~0) (<= 0 (+ main_~ret5~0 2147483648)) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 3996)) main_~temp~0) (<= (mod v_prenex_1388 4294967296) 2147483647)) (and (not (<= (mod v_prenex_1387 4294967296) 2147483647)) (= main_~ret5~0 (+ (mod v_prenex_1387 4294967296) (- 4294967296))) (not (< main_~i~2 999)) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 3996)) main_~temp~0)) (and (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_187 4294967296) 2147483647) (not (< main_~i~2 999)) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 3996)) main_~temp~0) (= (mod v_mapsum_~ret~0_BEFORE_RETURN_187 4294967296) main_~ret5~0))))) (and (exists ((v_prenex_1388 Int) (v_prenex_1387 Int) (v_mapsum_~ret~0_BEFORE_RETURN_188 Int) (v_mapsum_~ret~0_BEFORE_RETURN_187 Int)) (or (and (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_188 4294967296) 2147483647)) (= main_~ret5~0 (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_188 4294967296) (- 4294967296))) (not (< main_~i~2 999)) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 3996)) main_~temp~0)) (and (not (< main_~i~2 999)) (<= main_~ret5~0 2147483647) (= (mod v_prenex_1388 4294967296) main_~ret5~0) (<= 0 (+ main_~ret5~0 2147483648)) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 3996)) main_~temp~0) (<= (mod v_prenex_1388 4294967296) 2147483647)) (and (not (<= (mod v_prenex_1387 4294967296) 2147483647)) (= main_~ret5~0 (+ (mod v_prenex_1387 4294967296) (- 4294967296))) (not (< main_~i~2 999)) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 3996)) main_~temp~0)) (and (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_187 4294967296) 2147483647) (not (< main_~i~2 999)) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 3996)) main_~temp~0) (= (mod v_mapsum_~ret~0_BEFORE_RETURN_187 4294967296) main_~ret5~0)))) (not (= main_~ret~1 main_~ret5~0)))) [2019-10-06 22:49:48,335 INFO L193 IcfgInterpreter]: Reachable states at location L42 satisfy 313#true [2019-10-06 22:49:48,336 INFO L193 IcfgInterpreter]: Reachable states at location mapsumEXIT satisfy 644#(and (= (ite (<= (mod mapsum_~ret~0 4294967296) 2147483647) (mod mapsum_~ret~0 4294967296) (+ (mod mapsum_~ret~0 4294967296) (- 4294967296))) |mapsum_#res|) (<= 1000 mapsum_~i~0) (not (< mapsum_~i~0 1000)) (<= 0 mapsum_~i~0)) [2019-10-06 22:49:48,336 INFO L193 IcfgInterpreter]: Reachable states at location L33-1 satisfy 587#true [2019-10-06 22:49:48,336 INFO L193 IcfgInterpreter]: Reachable states at location L35-3 satisfy 560#true [2019-10-06 22:49:49,469 INFO L211 tionRefinementEngine]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2019-10-06 22:49:49,470 INFO L224 tionRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [117, 7, 7, 11] total 137 [2019-10-06 22:49:49,471 INFO L442 AbstractCegarLoop]: Interpolant automaton has 138 states [2019-10-06 22:49:49,472 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 138 interpolants. [2019-10-06 22:49:49,474 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6880, Invalid=12026, Unknown=0, NotChecked=0, Total=18906 [2019-10-06 22:49:49,474 INFO L87 Difference]: Start difference. First operand 141 states and 145 transitions. Second operand 138 states. [2019-10-06 22:50:02,798 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-06 22:50:02,799 INFO L93 Difference]: Finished difference Result 169 states and 186 transitions. [2019-10-06 22:50:02,799 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 138 states. [2019-10-06 22:50:02,799 INFO L78 Accepts]: Start accepts. Automaton has 138 states. Word has length 154 [2019-10-06 22:50:02,800 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-06 22:50:02,801 INFO L225 Difference]: With dead ends: 169 [2019-10-06 22:50:02,801 INFO L226 Difference]: Without dead ends: 148 [2019-10-06 22:50:02,805 INFO L606 BasicCegarLoop]: 0 DeclaredPredicates, 711 GetRequests, 442 SyntacticMatches, 0 SemanticMatches, 269 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 12311 ImplicationChecksByTransitivity, 18.0s TimeCoverageRelationStatistics Valid=20694, Invalid=52476, Unknown=0, NotChecked=0, Total=73170 [2019-10-06 22:50:02,805 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 148 states. [2019-10-06 22:50:02,819 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 148 to 148. [2019-10-06 22:50:02,819 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 148 states. [2019-10-06 22:50:02,821 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 148 states to 148 states and 152 transitions. [2019-10-06 22:50:02,821 INFO L78 Accepts]: Start accepts. Automaton has 148 states and 152 transitions. Word has length 154 [2019-10-06 22:50:02,821 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-06 22:50:02,821 INFO L462 AbstractCegarLoop]: Abstraction has 148 states and 152 transitions. [2019-10-06 22:50:02,822 INFO L463 AbstractCegarLoop]: Interpolant automaton has 138 states. [2019-10-06 22:50:02,822 INFO L276 IsEmpty]: Start isEmpty. Operand 148 states and 152 transitions. [2019-10-06 22:50:02,824 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 174 [2019-10-06 22:50:02,824 INFO L377 BasicCegarLoop]: Found error trace [2019-10-06 22:50:02,824 INFO L385 BasicCegarLoop]: trace histogram [115, 30, 4, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-06 22:50:03,033 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 10 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-06 22:50:03,034 INFO L410 AbstractCegarLoop]: === Iteration 12 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-06 22:50:03,034 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-06 22:50:03,035 INFO L82 PathProgramCache]: Analyzing trace with hash 344661184, now seen corresponding path program 9 times [2019-10-06 22:50:03,035 INFO L150 tionRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-10-06 22:50:03,035 INFO L231 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2019-10-06 22:50:03,036 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-06 22:50:03,036 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-06 22:50:03,036 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-06 22:50:03,193 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-06 22:50:08,047 INFO L134 CoverageAnalysis]: Checked inductivity of 7214 backedges. 0 proven. 6670 refuted. 0 times theorem prover too weak. 544 trivial. 0 not checked. [2019-10-06 22:50:08,047 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2019-10-06 22:50:08,048 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2019-10-06 22:50:08,048 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-06 22:50:08,444 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2019-10-06 22:50:08,445 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-10-06 22:50:08,448 INFO L256 TraceCheckSpWp]: Trace formula consists of 973 conjuncts, 117 conjunts are in the unsatisfiable core [2019-10-06 22:50:08,452 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2019-10-06 22:50:08,495 INFO L134 CoverageAnalysis]: Checked inductivity of 7214 backedges. 0 proven. 6670 refuted. 0 times theorem prover too weak. 544 trivial. 0 not checked. [2019-10-06 22:50:08,495 INFO L322 TraceCheckSpWp]: Computing backward predicates... [2019-10-06 22:50:23,115 INFO L134 CoverageAnalysis]: Checked inductivity of 7214 backedges. 0 proven. 6670 refuted. 0 times theorem prover too weak. 544 trivial. 0 not checked. [2019-10-06 22:50:23,115 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSifa [2019-10-06 22:50:23,117 INFO L162 IcfgInterpreter]: Started Sifa with 19 locations of interest [2019-10-06 22:50:23,117 INFO L169 IcfgInterpreter]: Building call graph [2019-10-06 22:50:23,117 INFO L174 IcfgInterpreter]: Initial procedures are [ULTIMATE.start] [2019-10-06 22:50:23,118 INFO L179 IcfgInterpreter]: Starting interpretation [2019-10-06 22:50:23,118 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.start with input of size 1 for LOIs [2019-10-06 22:50:23,136 INFO L199 IcfgInterpreter]: Interpreting procedure main with input of size 21 for LOIs [2019-10-06 22:50:24,312 INFO L199 IcfgInterpreter]: Interpreting procedure mapsum with input of size 1 for LOIs [2019-10-06 22:50:24,337 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.init with input of size 10 for LOIs [2019-10-06 22:50:24,339 INFO L183 IcfgInterpreter]: Interpretation finished [2019-10-06 22:50:24,340 INFO L191 IcfgInterpreter]: Final predicates for locations of interest are: [2019-10-06 22:50:24,340 INFO L193 IcfgInterpreter]: Reachable states at location mapsumENTRY satisfy 601#true [2019-10-06 22:50:24,340 INFO L193 IcfgInterpreter]: Reachable states at location L26-4 satisfy 73#(and (<= 1000 main_~i~1) (not (< main_~i~1 1000))) [2019-10-06 22:50:24,340 INFO L193 IcfgInterpreter]: Reachable states at location L33 satisfy 592#(or (exists ((v_prenex_1554 Int) (v_prenex_1553 Int) (v_mapsum_~ret~0_BEFORE_RETURN_209 Int) (v_mapsum_~ret~0_BEFORE_RETURN_210 Int)) (or (and (<= main_~ret~1 2147483647) (not (< main_~i~1 1000)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (<= (mod v_prenex_1553 4294967296) 2147483647) (= main_~ret~1 (mod v_prenex_1553 4294967296)) (<= 0 (+ main_~ret~1 2147483648))) (and (= (+ (mod v_prenex_1554 4294967296) (- 4294967296)) main_~ret~1) (<= main_~ret~1 2147483647) (not (< main_~i~1 1000)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (not (<= (mod v_prenex_1554 4294967296) 2147483647)) (<= 0 (+ main_~ret~1 2147483648))) (and (<= main_~ret~1 2147483647) (not (< main_~i~1 1000)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_209 4294967296) 2147483647)) (= main_~ret~1 (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_209 4294967296) (- 4294967296))) (<= 0 (+ main_~ret~1 2147483648))) (and (= (mod v_mapsum_~ret~0_BEFORE_RETURN_210 4294967296) main_~ret~1) (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_210 4294967296) 2147483647) (<= main_~ret~1 2147483647) (not (< main_~i~1 1000)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (<= 0 (+ main_~ret~1 2147483648))))) (exists ((v_prenex_1554 Int) (v_prenex_1553 Int) (v_mapsum_~ret~0_BEFORE_RETURN_209 Int) (v_mapsum_~ret~0_BEFORE_RETURN_210 Int)) (or (and (= (+ (mod v_prenex_1554 4294967296) (- 4294967296)) main_~ret~1) (<= main_~ret~1 2147483647) (not (< main_~i~1 1000)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (not (<= (mod v_prenex_1554 4294967296) 2147483647)) (<= 0 (+ main_~ret~1 2147483648))) (and (<= main_~ret~1 2147483647) (not (< main_~i~1 1000)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (= main_~ret~1 (mod v_prenex_1553 4294967296)) (<= (mod v_prenex_1553 4294967296) 2147483647) (<= 0 (+ main_~ret~1 2147483648))) (and (<= main_~ret~1 2147483647) (not (< main_~i~1 1000)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_209 4294967296) 2147483647)) (= main_~ret~1 (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_209 4294967296) (- 4294967296))) (<= 0 (+ main_~ret~1 2147483648))) (and (= (mod v_mapsum_~ret~0_BEFORE_RETURN_210 4294967296) main_~ret~1) (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_210 4294967296) 2147483647) (<= main_~ret~1 2147483647) (not (< main_~i~1 1000)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (<= 0 (+ main_~ret~1 2147483648)))))) [2019-10-06 22:50:24,341 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initENTRY satisfy 648#(and (= |old(#NULL.base)| |#NULL.base|) (= |#valid| |old(#valid)|) (= |#NULL.offset| |old(#NULL.offset)|)) [2019-10-06 22:50:24,341 INFO L193 IcfgInterpreter]: Reachable states at location L26-3 satisfy 68#true [2019-10-06 22:50:24,341 INFO L193 IcfgInterpreter]: Reachable states at location L12-3 satisfy 639#(<= 0 mapsum_~i~0) [2019-10-06 22:50:24,341 INFO L193 IcfgInterpreter]: Reachable states at location L-1 satisfy 23#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= 0 (select |#valid| 0)) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-06 22:50:24,341 INFO L193 IcfgInterpreter]: Reachable states at location mainENTRY satisfy 33#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= |#valid| |old(#valid)|) (<= 0 |#NULL.base|) (= |#memory_int| |old(#memory_int)|) (= |#NULL.offset| 0) (= |old(#length)| |#length|) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (= 0 (select |old(#valid)| 0))) [2019-10-06 22:50:24,342 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initEXIT satisfy 653#(and (= |#valid| (store |old(#valid)| 0 0)) (= 0 |#NULL.base|) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-06 22:50:24,342 INFO L193 IcfgInterpreter]: Reachable states at location L39-1 satisfy 479#true [2019-10-06 22:50:24,342 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.startENTRY satisfy 6#true [2019-10-06 22:50:24,342 INFO L193 IcfgInterpreter]: Reachable states at location L39 satisfy 522#(and (not (< main_~i~2 999)) (<= 999 main_~i~2) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 3996)) main_~temp~0)) [2019-10-06 22:50:24,342 INFO L193 IcfgInterpreter]: Reachable states at location L30 satisfy 120#(or (exists ((v_prenex_1554 Int) (v_mapsum_~ret~0_BEFORE_RETURN_210 Int)) (or (and (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_210 4294967296) 2147483647) (not (< main_~i~1 1000)) (= (mod v_mapsum_~ret~0_BEFORE_RETURN_210 4294967296) |main_#t~ret4|)) (and (not (< main_~i~1 1000)) (not (<= (mod v_prenex_1554 4294967296) 2147483647)) (= (+ (mod v_prenex_1554 4294967296) (- 4294967296)) |main_#t~ret4|)))) (exists ((v_prenex_1553 Int) (v_mapsum_~ret~0_BEFORE_RETURN_209 Int)) (or (and (not (< main_~i~1 1000)) (= (mod v_prenex_1553 4294967296) |main_#t~ret4|) (<= (mod v_prenex_1553 4294967296) 2147483647)) (and (= |main_#t~ret4| (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_209 4294967296) (- 4294967296))) (not (< main_~i~1 1000)) (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_209 4294967296) 2147483647)))))) [2019-10-06 22:50:24,343 INFO L193 IcfgInterpreter]: Reachable states at location L41 satisfy 424#true [2019-10-06 22:50:24,343 INFO L193 IcfgInterpreter]: Reachable states at location mainErr0ASSERT_VIOLATIONERROR_FUNCTION satisfy 234#(or (and (not (= main_~ret~1 main_~ret2~0)) (exists ((v_mapsum_~ret~0_BEFORE_RETURN_214 Int) (v_mapsum_~ret~0_BEFORE_RETURN_213 Int) (v_prenex_1582 Int) (v_prenex_1581 Int)) (or (and (= main_~ret5~0 (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_213 4294967296) (- 4294967296))) (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_213 4294967296) 2147483647)) (not (< main_~i~2 999)) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 3996)) main_~temp~0)) (and (= main_~ret5~0 (mod v_prenex_1581 4294967296)) (<= (mod v_prenex_1581 4294967296) 2147483647) (not (< main_~i~2 999)) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 3996)) main_~temp~0)) (and (= main_~ret5~0 (mod v_mapsum_~ret~0_BEFORE_RETURN_214 4294967296)) (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_214 4294967296) 2147483647) (not (< main_~i~2 999)) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 3996)) main_~temp~0)) (and (= main_~ret5~0 (+ (mod v_prenex_1582 4294967296) (- 4294967296))) (not (<= (mod v_prenex_1582 4294967296) 2147483647)) (not (< main_~i~2 999)) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 3996)) main_~temp~0))))) (and (not (= main_~ret~1 main_~ret5~0)) (exists ((v_mapsum_~ret~0_BEFORE_RETURN_214 Int) (v_mapsum_~ret~0_BEFORE_RETURN_213 Int) (v_prenex_1582 Int) (v_prenex_1581 Int)) (or (and (= main_~ret5~0 (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_213 4294967296) (- 4294967296))) (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_213 4294967296) 2147483647)) (not (< main_~i~2 999)) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 3996)) main_~temp~0)) (and (= main_~ret5~0 (mod v_prenex_1581 4294967296)) (<= (mod v_prenex_1581 4294967296) 2147483647) (not (< main_~i~2 999)) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 3996)) main_~temp~0)) (and (= main_~ret5~0 (mod v_mapsum_~ret~0_BEFORE_RETURN_214 4294967296)) (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_214 4294967296) 2147483647) (not (< main_~i~2 999)) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 3996)) main_~temp~0)) (and (= main_~ret5~0 (+ (mod v_prenex_1582 4294967296) (- 4294967296))) (not (<= (mod v_prenex_1582 4294967296) 2147483647)) (not (< main_~i~2 999)) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 3996)) main_~temp~0)))))) [2019-10-06 22:50:24,343 INFO L193 IcfgInterpreter]: Reachable states at location L42 satisfy 313#true [2019-10-06 22:50:24,343 INFO L193 IcfgInterpreter]: Reachable states at location mapsumEXIT satisfy 644#(and (= (ite (<= (mod mapsum_~ret~0 4294967296) 2147483647) (mod mapsum_~ret~0 4294967296) (+ (mod mapsum_~ret~0 4294967296) (- 4294967296))) |mapsum_#res|) (<= 1000 mapsum_~i~0) (not (< mapsum_~i~0 1000)) (<= 0 mapsum_~i~0)) [2019-10-06 22:50:24,343 INFO L193 IcfgInterpreter]: Reachable states at location L33-1 satisfy 587#true [2019-10-06 22:50:24,344 INFO L193 IcfgInterpreter]: Reachable states at location L35-3 satisfy 560#true [2019-10-06 22:50:25,633 INFO L211 tionRefinementEngine]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2019-10-06 22:50:25,633 INFO L224 tionRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [118, 118, 118, 11] total 245 [2019-10-06 22:50:25,634 INFO L442 AbstractCegarLoop]: Interpolant automaton has 246 states [2019-10-06 22:50:25,640 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 246 interpolants. [2019-10-06 22:50:25,643 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=27524, Invalid=32746, Unknown=0, NotChecked=0, Total=60270 [2019-10-06 22:50:25,643 INFO L87 Difference]: Start difference. First operand 148 states and 152 transitions. Second operand 246 states. [2019-10-06 22:51:00,088 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-06 22:51:00,088 INFO L93 Difference]: Finished difference Result 292 states and 416 transitions. [2019-10-06 22:51:00,088 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 245 states. [2019-10-06 22:51:00,089 INFO L78 Accepts]: Start accepts. Automaton has 246 states. Word has length 173 [2019-10-06 22:51:00,089 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-06 22:51:00,091 INFO L225 Difference]: With dead ends: 292 [2019-10-06 22:51:00,092 INFO L226 Difference]: Without dead ends: 265 [2019-10-06 22:51:00,099 INFO L606 BasicCegarLoop]: 0 DeclaredPredicates, 879 GetRequests, 395 SyntacticMatches, 0 SemanticMatches, 484 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 41637 ImplicationChecksByTransitivity, 53.1s TimeCoverageRelationStatistics Valid=82099, Invalid=153611, Unknown=0, NotChecked=0, Total=235710 [2019-10-06 22:51:00,099 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 265 states. [2019-10-06 22:51:00,125 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 265 to 265. [2019-10-06 22:51:00,125 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 265 states. [2019-10-06 22:51:00,127 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 265 states to 265 states and 269 transitions. [2019-10-06 22:51:00,127 INFO L78 Accepts]: Start accepts. Automaton has 265 states and 269 transitions. Word has length 173 [2019-10-06 22:51:00,127 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-06 22:51:00,127 INFO L462 AbstractCegarLoop]: Abstraction has 265 states and 269 transitions. [2019-10-06 22:51:00,128 INFO L463 AbstractCegarLoop]: Interpolant automaton has 246 states. [2019-10-06 22:51:00,128 INFO L276 IsEmpty]: Start isEmpty. Operand 265 states and 269 transitions. [2019-10-06 22:51:00,131 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 291 [2019-10-06 22:51:00,132 INFO L377 BasicCegarLoop]: Found error trace [2019-10-06 22:51:00,132 INFO L385 BasicCegarLoop]: trace histogram [232, 30, 4, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-06 22:51:00,337 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 11 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-06 22:51:00,338 INFO L410 AbstractCegarLoop]: === Iteration 13 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-06 22:51:00,338 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-06 22:51:00,338 INFO L82 PathProgramCache]: Analyzing trace with hash -165692995, now seen corresponding path program 10 times [2019-10-06 22:51:00,339 INFO L150 tionRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-10-06 22:51:00,339 INFO L231 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2019-10-06 22:51:00,339 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-06 22:51:00,339 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-06 22:51:00,339 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-06 22:51:00,836 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-06 22:51:20,059 INFO L134 CoverageAnalysis]: Checked inductivity of 27572 backedges. 0 proven. 27028 refuted. 0 times theorem prover too weak. 544 trivial. 0 not checked. [2019-10-06 22:51:20,059 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2019-10-06 22:51:20,059 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2019-10-06 22:51:20,060 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-06 22:51:20,646 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-06 22:51:20,659 INFO L256 TraceCheckSpWp]: Trace formula consists of 1675 conjuncts, 234 conjunts are in the unsatisfiable core [2019-10-06 22:51:20,667 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2019-10-06 22:51:20,850 INFO L134 CoverageAnalysis]: Checked inductivity of 27572 backedges. 0 proven. 27028 refuted. 0 times theorem prover too weak. 544 trivial. 0 not checked. [2019-10-06 22:51:20,850 INFO L322 TraceCheckSpWp]: Computing backward predicates... [2019-10-06 22:52:20,030 INFO L134 CoverageAnalysis]: Checked inductivity of 27572 backedges. 0 proven. 27028 refuted. 0 times theorem prover too weak. 544 trivial. 0 not checked. [2019-10-06 22:52:20,031 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSifa [2019-10-06 22:52:20,032 INFO L162 IcfgInterpreter]: Started Sifa with 19 locations of interest [2019-10-06 22:52:20,033 INFO L169 IcfgInterpreter]: Building call graph [2019-10-06 22:52:20,033 INFO L174 IcfgInterpreter]: Initial procedures are [ULTIMATE.start] [2019-10-06 22:52:20,033 INFO L179 IcfgInterpreter]: Starting interpretation [2019-10-06 22:52:20,033 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.start with input of size 1 for LOIs [2019-10-06 22:52:20,060 INFO L199 IcfgInterpreter]: Interpreting procedure main with input of size 21 for LOIs [2019-10-06 22:52:21,164 INFO L199 IcfgInterpreter]: Interpreting procedure mapsum with input of size 1 for LOIs [2019-10-06 22:52:21,185 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.init with input of size 10 for LOIs [2019-10-06 22:52:21,188 INFO L183 IcfgInterpreter]: Interpretation finished [2019-10-06 22:52:21,188 INFO L191 IcfgInterpreter]: Final predicates for locations of interest are: [2019-10-06 22:52:21,188 INFO L193 IcfgInterpreter]: Reachable states at location mapsumENTRY satisfy 601#true [2019-10-06 22:52:21,189 INFO L193 IcfgInterpreter]: Reachable states at location L26-4 satisfy 73#(and (<= 1000 main_~i~1) (not (< main_~i~1 1000))) [2019-10-06 22:52:21,189 INFO L193 IcfgInterpreter]: Reachable states at location L33 satisfy 592#(exists ((v_mapsum_~ret~0_BEFORE_RETURN_236 Int) (v_mapsum_~ret~0_BEFORE_RETURN_235 Int) (v_prenex_1748 Int) (v_prenex_1747 Int)) (or (and (<= main_~ret~1 2147483647) (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_235 4294967296) 2147483647) (not (< main_~i~1 1000)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (= main_~ret~1 (mod v_mapsum_~ret~0_BEFORE_RETURN_235 4294967296)) (<= 0 (+ main_~ret~1 2147483648))) (and (= (mod v_prenex_1748 4294967296) main_~ret~1) (<= main_~ret~1 2147483647) (not (< main_~i~1 1000)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (<= (mod v_prenex_1748 4294967296) 2147483647) (<= 0 (+ main_~ret~1 2147483648))) (and (not (<= (mod v_prenex_1747 4294967296) 2147483647)) (= main_~ret~1 (+ (mod v_prenex_1747 4294967296) (- 4294967296))) (<= main_~ret~1 2147483647) (not (< main_~i~1 1000)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (<= 0 (+ main_~ret~1 2147483648))) (and (<= main_~ret~1 2147483647) (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_236 4294967296) 2147483647)) (not (< main_~i~1 1000)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (= main_~ret~1 (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_236 4294967296) (- 4294967296))) (<= 0 (+ main_~ret~1 2147483648))))) [2019-10-06 22:52:21,189 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initENTRY satisfy 648#(and (= |old(#NULL.base)| |#NULL.base|) (= |#valid| |old(#valid)|) (= |#NULL.offset| |old(#NULL.offset)|)) [2019-10-06 22:52:21,189 INFO L193 IcfgInterpreter]: Reachable states at location L26-3 satisfy 68#true [2019-10-06 22:52:21,189 INFO L193 IcfgInterpreter]: Reachable states at location L12-3 satisfy 639#(<= 0 mapsum_~i~0) [2019-10-06 22:52:21,190 INFO L193 IcfgInterpreter]: Reachable states at location L-1 satisfy 23#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= 0 (select |#valid| 0)) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-06 22:52:21,190 INFO L193 IcfgInterpreter]: Reachable states at location mainENTRY satisfy 33#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= |#valid| |old(#valid)|) (<= 0 |#NULL.base|) (= |#memory_int| |old(#memory_int)|) (= |#NULL.offset| 0) (= |old(#length)| |#length|) (= 0 (select |old(#valid)| 0)) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-06 22:52:21,190 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initEXIT satisfy 653#(and (= |#valid| (store |old(#valid)| 0 0)) (= 0 |#NULL.base|) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-06 22:52:21,190 INFO L193 IcfgInterpreter]: Reachable states at location L39-1 satisfy 479#true [2019-10-06 22:52:21,190 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.startENTRY satisfy 6#true [2019-10-06 22:52:21,191 INFO L193 IcfgInterpreter]: Reachable states at location L39 satisfy 522#(and (not (< main_~i~2 999)) (<= 999 main_~i~2) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 3996)) main_~temp~0)) [2019-10-06 22:52:21,191 INFO L193 IcfgInterpreter]: Reachable states at location L30 satisfy 120#(or (exists ((v_mapsum_~ret~0_BEFORE_RETURN_235 Int) (v_prenex_1747 Int)) (or (and (not (<= (mod v_prenex_1747 4294967296) 2147483647)) (not (< main_~i~1 1000)) (= (+ (mod v_prenex_1747 4294967296) (- 4294967296)) |main_#t~ret4|)) (and (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_235 4294967296) 2147483647) (= |main_#t~ret4| (mod v_mapsum_~ret~0_BEFORE_RETURN_235 4294967296)) (not (< main_~i~1 1000))))) (exists ((v_mapsum_~ret~0_BEFORE_RETURN_236 Int) (v_prenex_1748 Int)) (or (and (not (< main_~i~1 1000)) (<= (mod v_prenex_1748 4294967296) 2147483647) (= |main_#t~ret4| (mod v_prenex_1748 4294967296))) (and (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_236 4294967296) 2147483647)) (not (< main_~i~1 1000)) (= |main_#t~ret4| (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_236 4294967296) (- 4294967296))))))) [2019-10-06 22:52:21,191 INFO L193 IcfgInterpreter]: Reachable states at location L41 satisfy 424#true [2019-10-06 22:52:21,191 INFO L193 IcfgInterpreter]: Reachable states at location mainErr0ASSERT_VIOLATIONERROR_FUNCTION satisfy 234#(or (and (not (= main_~ret~1 main_~ret2~0)) (exists ((v_prenex_1776 Int) (v_prenex_1775 Int) (v_mapsum_~ret~0_BEFORE_RETURN_239 Int) (v_mapsum_~ret~0_BEFORE_RETURN_240 Int)) (or (and (= main_~ret5~0 (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_240 4294967296) (- 4294967296))) (not (< main_~i~2 999)) (<= main_~ret5~0 2147483647) (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_240 4294967296) 2147483647)) (<= 0 (+ main_~ret5~0 2147483648)) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 3996)) main_~temp~0)) (and (<= (mod v_prenex_1775 4294967296) 2147483647) (= main_~ret5~0 (mod v_prenex_1775 4294967296)) (not (< main_~i~2 999)) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 3996)) main_~temp~0)) (and (not (< main_~i~2 999)) (<= main_~ret5~0 2147483647) (= main_~ret5~0 (mod v_prenex_1776 4294967296)) (<= 0 (+ main_~ret5~0 2147483648)) (<= (mod v_prenex_1776 4294967296) 2147483647) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 3996)) main_~temp~0)) (and (not (< main_~i~2 999)) (<= main_~ret5~0 2147483647) (= (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_239 4294967296) (- 4294967296)) main_~ret5~0) (<= 0 (+ main_~ret5~0 2147483648)) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 3996)) main_~temp~0) (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_239 4294967296) 2147483647)))))) (and (exists ((v_prenex_1776 Int) (v_prenex_1775 Int) (v_mapsum_~ret~0_BEFORE_RETURN_239 Int) (v_mapsum_~ret~0_BEFORE_RETURN_240 Int)) (or (and (= main_~ret5~0 (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_240 4294967296) (- 4294967296))) (not (< main_~i~2 999)) (<= main_~ret5~0 2147483647) (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_240 4294967296) 2147483647)) (<= 0 (+ main_~ret5~0 2147483648)) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 3996)) main_~temp~0)) (and (<= (mod v_prenex_1775 4294967296) 2147483647) (= main_~ret5~0 (mod v_prenex_1775 4294967296)) (not (< main_~i~2 999)) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 3996)) main_~temp~0)) (and (not (< main_~i~2 999)) (<= main_~ret5~0 2147483647) (= main_~ret5~0 (mod v_prenex_1776 4294967296)) (<= 0 (+ main_~ret5~0 2147483648)) (<= (mod v_prenex_1776 4294967296) 2147483647) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 3996)) main_~temp~0)) (and (not (< main_~i~2 999)) (<= main_~ret5~0 2147483647) (= (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_239 4294967296) (- 4294967296)) main_~ret5~0) (<= 0 (+ main_~ret5~0 2147483648)) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 3996)) main_~temp~0) (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_239 4294967296) 2147483647))))) (not (= main_~ret~1 main_~ret5~0)))) [2019-10-06 22:52:21,191 INFO L193 IcfgInterpreter]: Reachable states at location L42 satisfy 313#true [2019-10-06 22:52:21,191 INFO L193 IcfgInterpreter]: Reachable states at location mapsumEXIT satisfy 644#(and (= (ite (<= (mod mapsum_~ret~0 4294967296) 2147483647) (mod mapsum_~ret~0 4294967296) (+ (mod mapsum_~ret~0 4294967296) (- 4294967296))) |mapsum_#res|) (<= 1000 mapsum_~i~0) (not (< mapsum_~i~0 1000)) (<= 0 mapsum_~i~0)) [2019-10-06 22:52:21,192 INFO L193 IcfgInterpreter]: Reachable states at location L35-3 satisfy 560#true [2019-10-06 22:52:21,192 INFO L193 IcfgInterpreter]: Reachable states at location L33-1 satisfy 587#true [2019-10-06 22:52:23,039 INFO L211 tionRefinementEngine]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2019-10-06 22:52:23,040 INFO L224 tionRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [235, 235, 235, 11] total 479 [2019-10-06 22:52:23,041 INFO L442 AbstractCegarLoop]: Interpolant automaton has 480 states [2019-10-06 22:52:23,050 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 480 interpolants. [2019-10-06 22:52:23,057 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=109775, Invalid=120145, Unknown=0, NotChecked=0, Total=229920 [2019-10-06 22:52:23,058 INFO L87 Difference]: Start difference. First operand 265 states and 269 transitions. Second operand 480 states. [2019-10-06 22:54:36,353 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-06 22:54:36,354 INFO L93 Difference]: Finished difference Result 526 states and 767 transitions. [2019-10-06 22:54:36,354 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 479 states. [2019-10-06 22:54:36,354 INFO L78 Accepts]: Start accepts. Automaton has 480 states. Word has length 290 [2019-10-06 22:54:36,355 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-06 22:54:36,358 INFO L225 Difference]: With dead ends: 526 [2019-10-06 22:54:36,358 INFO L226 Difference]: Without dead ends: 499 [2019-10-06 22:54:36,384 INFO L606 BasicCegarLoop]: 0 DeclaredPredicates, 1581 GetRequests, 629 SyntacticMatches, 0 SemanticMatches, 952 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 151734 ImplicationChecksByTransitivity, 200.2s TimeCoverageRelationStatistics Valid=328384, Invalid=580778, Unknown=0, NotChecked=0, Total=909162 [2019-10-06 22:54:36,385 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 499 states. [2019-10-06 22:54:36,407 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 499 to 499. [2019-10-06 22:54:36,407 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 499 states. [2019-10-06 22:54:36,409 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 499 states to 499 states and 503 transitions. [2019-10-06 22:54:36,410 INFO L78 Accepts]: Start accepts. Automaton has 499 states and 503 transitions. Word has length 290 [2019-10-06 22:54:36,410 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-06 22:54:36,410 INFO L462 AbstractCegarLoop]: Abstraction has 499 states and 503 transitions. [2019-10-06 22:54:36,410 INFO L463 AbstractCegarLoop]: Interpolant automaton has 480 states. [2019-10-06 22:54:36,410 INFO L276 IsEmpty]: Start isEmpty. Operand 499 states and 503 transitions. [2019-10-06 22:54:36,421 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 525 [2019-10-06 22:54:36,421 INFO L377 BasicCegarLoop]: Found error trace [2019-10-06 22:54:36,422 INFO L385 BasicCegarLoop]: trace histogram [466, 30, 4, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-06 22:54:36,627 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 12 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-06 22:54:36,628 INFO L410 AbstractCegarLoop]: === Iteration 14 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-06 22:54:36,628 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-06 22:54:36,628 INFO L82 PathProgramCache]: Analyzing trace with hash 1709506973, now seen corresponding path program 11 times [2019-10-06 22:54:36,628 INFO L150 tionRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-10-06 22:54:36,629 INFO L231 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2019-10-06 22:54:36,629 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-06 22:54:36,629 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-06 22:54:36,630 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-06 22:54:38,206 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-06 22:55:55,190 INFO L134 CoverageAnalysis]: Checked inductivity of 109355 backedges. 0 proven. 108811 refuted. 0 times theorem prover too weak. 544 trivial. 0 not checked. [2019-10-06 22:55:55,191 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2019-10-06 22:55:55,191 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2019-10-06 22:55:55,191 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-06 22:55:55,715 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 4 check-sat command(s) [2019-10-06 22:55:55,716 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-10-06 22:55:55,717 INFO L256 TraceCheckSpWp]: Trace formula consists of 193 conjuncts, 6 conjunts are in the unsatisfiable core [2019-10-06 22:55:55,725 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2019-10-06 22:55:57,098 INFO L134 CoverageAnalysis]: Checked inductivity of 109355 backedges. 246 proven. 10 refuted. 0 times theorem prover too weak. 109099 trivial. 0 not checked. [2019-10-06 22:55:57,099 INFO L322 TraceCheckSpWp]: Computing backward predicates... [2019-10-06 22:55:58,133 INFO L134 CoverageAnalysis]: Checked inductivity of 109355 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 109345 trivial. 0 not checked. [2019-10-06 22:55:58,133 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSifa [2019-10-06 22:55:58,134 INFO L162 IcfgInterpreter]: Started Sifa with 19 locations of interest [2019-10-06 22:55:58,135 INFO L169 IcfgInterpreter]: Building call graph [2019-10-06 22:55:58,135 INFO L174 IcfgInterpreter]: Initial procedures are [ULTIMATE.start] [2019-10-06 22:55:58,135 INFO L179 IcfgInterpreter]: Starting interpretation [2019-10-06 22:55:58,135 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.start with input of size 1 for LOIs [2019-10-06 22:55:58,152 INFO L199 IcfgInterpreter]: Interpreting procedure main with input of size 21 for LOIs [2019-10-06 22:55:59,308 INFO L199 IcfgInterpreter]: Interpreting procedure mapsum with input of size 1 for LOIs [2019-10-06 22:55:59,331 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.init with input of size 10 for LOIs [2019-10-06 22:55:59,333 INFO L183 IcfgInterpreter]: Interpretation finished [2019-10-06 22:55:59,334 INFO L191 IcfgInterpreter]: Final predicates for locations of interest are: [2019-10-06 22:55:59,334 INFO L193 IcfgInterpreter]: Reachable states at location mapsumENTRY satisfy 601#true [2019-10-06 22:55:59,334 INFO L193 IcfgInterpreter]: Reachable states at location L26-4 satisfy 73#(and (<= 1000 main_~i~1) (not (< main_~i~1 1000))) [2019-10-06 22:55:59,334 INFO L193 IcfgInterpreter]: Reachable states at location L33 satisfy 592#(exists ((v_prenex_1942 Int) (v_prenex_1941 Int) (v_mapsum_~ret~0_BEFORE_RETURN_261 Int) (v_mapsum_~ret~0_BEFORE_RETURN_262 Int)) (or (and (<= main_~ret~1 2147483647) (not (< main_~i~1 1000)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_261 4294967296) 2147483647)) (= main_~ret~1 (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_261 4294967296) (- 4294967296))) (<= 0 (+ main_~ret~1 2147483648))) (and (<= main_~ret~1 2147483647) (not (< main_~i~1 1000)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (= main_~ret~1 (mod v_prenex_1941 4294967296)) (<= (mod v_prenex_1941 4294967296) 2147483647) (<= 0 (+ main_~ret~1 2147483648))) (and (<= main_~ret~1 2147483647) (= (mod v_prenex_1942 4294967296) main_~ret~1) (<= (mod v_prenex_1942 4294967296) 2147483647) (not (< main_~i~1 1000)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (<= 0 (+ main_~ret~1 2147483648))) (and (<= main_~ret~1 2147483647) (= (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_262 4294967296) (- 4294967296)) main_~ret~1) (not (< main_~i~1 1000)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_262 4294967296) 2147483647)) (<= 0 (+ main_~ret~1 2147483648))))) [2019-10-06 22:55:59,334 INFO L193 IcfgInterpreter]: Reachable states at location L26-3 satisfy 68#true [2019-10-06 22:55:59,334 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initENTRY satisfy 648#(and (= |old(#NULL.base)| |#NULL.base|) (= |#valid| |old(#valid)|) (= |#NULL.offset| |old(#NULL.offset)|)) [2019-10-06 22:55:59,335 INFO L193 IcfgInterpreter]: Reachable states at location L12-3 satisfy 639#(<= 0 mapsum_~i~0) [2019-10-06 22:55:59,335 INFO L193 IcfgInterpreter]: Reachable states at location L-1 satisfy 23#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= 0 (select |#valid| 0)) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-06 22:55:59,335 INFO L193 IcfgInterpreter]: Reachable states at location mainENTRY satisfy 33#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= |#valid| |old(#valid)|) (<= 0 |#NULL.base|) (= |#memory_int| |old(#memory_int)|) (= |#NULL.offset| 0) (= |old(#length)| |#length|) (= 0 (select |old(#valid)| 0)) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-06 22:55:59,335 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initEXIT satisfy 653#(and (= |#valid| (store |old(#valid)| 0 0)) (= 0 |#NULL.base|) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-06 22:55:59,335 INFO L193 IcfgInterpreter]: Reachable states at location L39-1 satisfy 479#true [2019-10-06 22:55:59,335 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.startENTRY satisfy 6#true [2019-10-06 22:55:59,336 INFO L193 IcfgInterpreter]: Reachable states at location L39 satisfy 522#(and (not (< main_~i~2 999)) (<= 999 main_~i~2) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 3996)) main_~temp~0)) [2019-10-06 22:55:59,336 INFO L193 IcfgInterpreter]: Reachable states at location L30 satisfy 120#(or (exists ((v_prenex_1942 Int) (v_mapsum_~ret~0_BEFORE_RETURN_262 Int)) (or (and (= (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_262 4294967296) (- 4294967296)) |main_#t~ret4|) (not (< main_~i~1 1000)) (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_262 4294967296) 2147483647))) (and (not (< main_~i~1 1000)) (<= (mod v_prenex_1942 4294967296) 2147483647) (= |main_#t~ret4| (mod v_prenex_1942 4294967296))))) (exists ((v_prenex_1941 Int) (v_mapsum_~ret~0_BEFORE_RETURN_261 Int)) (or (and (= (mod v_prenex_1941 4294967296) |main_#t~ret4|) (not (< main_~i~1 1000)) (<= (mod v_prenex_1941 4294967296) 2147483647)) (and (not (< main_~i~1 1000)) (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_261 4294967296) 2147483647)) (= (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_261 4294967296) (- 4294967296)) |main_#t~ret4|))))) [2019-10-06 22:55:59,336 INFO L193 IcfgInterpreter]: Reachable states at location L41 satisfy 424#true [2019-10-06 22:55:59,336 INFO L193 IcfgInterpreter]: Reachable states at location mainErr0ASSERT_VIOLATIONERROR_FUNCTION satisfy 234#(or (and (not (= main_~ret~1 main_~ret2~0)) (exists ((v_mapsum_~ret~0_BEFORE_RETURN_266 Int) (v_prenex_1970 Int) (v_prenex_1969 Int) (v_mapsum_~ret~0_BEFORE_RETURN_265 Int)) (or (and (not (<= (mod v_prenex_1970 4294967296) 2147483647)) (not (< main_~i~2 999)) (<= main_~ret5~0 2147483647) (= main_~ret5~0 (+ (mod v_prenex_1970 4294967296) (- 4294967296))) (<= 0 (+ main_~ret5~0 2147483648)) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 3996)) main_~temp~0)) (and (= main_~ret5~0 (+ (mod v_prenex_1969 4294967296) (- 4294967296))) (not (<= (mod v_prenex_1969 4294967296) 2147483647)) (not (< main_~i~2 999)) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 3996)) main_~temp~0)) (and (= main_~ret5~0 (mod v_mapsum_~ret~0_BEFORE_RETURN_265 4294967296)) (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_265 4294967296) 2147483647) (not (< main_~i~2 999)) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 3996)) main_~temp~0)) (and (= (mod v_mapsum_~ret~0_BEFORE_RETURN_266 4294967296) main_~ret5~0) (not (< main_~i~2 999)) (<= main_~ret5~0 2147483647) (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_266 4294967296) 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 3996)) main_~temp~0))))) (and (not (= main_~ret~1 main_~ret5~0)) (exists ((v_mapsum_~ret~0_BEFORE_RETURN_266 Int) (v_prenex_1970 Int) (v_prenex_1969 Int) (v_mapsum_~ret~0_BEFORE_RETURN_265 Int)) (or (and (not (<= (mod v_prenex_1970 4294967296) 2147483647)) (not (< main_~i~2 999)) (<= main_~ret5~0 2147483647) (= main_~ret5~0 (+ (mod v_prenex_1970 4294967296) (- 4294967296))) (<= 0 (+ main_~ret5~0 2147483648)) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 3996)) main_~temp~0)) (and (= main_~ret5~0 (+ (mod v_prenex_1969 4294967296) (- 4294967296))) (not (<= (mod v_prenex_1969 4294967296) 2147483647)) (not (< main_~i~2 999)) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 3996)) main_~temp~0)) (and (= main_~ret5~0 (mod v_mapsum_~ret~0_BEFORE_RETURN_265 4294967296)) (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_265 4294967296) 2147483647) (not (< main_~i~2 999)) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 3996)) main_~temp~0)) (and (= (mod v_mapsum_~ret~0_BEFORE_RETURN_266 4294967296) main_~ret5~0) (not (< main_~i~2 999)) (<= main_~ret5~0 2147483647) (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_266 4294967296) 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 3996)) main_~temp~0)))))) [2019-10-06 22:55:59,336 INFO L193 IcfgInterpreter]: Reachable states at location L42 satisfy 313#true [2019-10-06 22:55:59,336 INFO L193 IcfgInterpreter]: Reachable states at location mapsumEXIT satisfy 644#(and (= (ite (<= (mod mapsum_~ret~0 4294967296) 2147483647) (mod mapsum_~ret~0 4294967296) (+ (mod mapsum_~ret~0 4294967296) (- 4294967296))) |mapsum_#res|) (<= 1000 mapsum_~i~0) (not (< mapsum_~i~0 1000)) (<= 0 mapsum_~i~0)) [2019-10-06 22:55:59,337 INFO L193 IcfgInterpreter]: Reachable states at location L35-3 satisfy 560#true [2019-10-06 22:55:59,337 INFO L193 IcfgInterpreter]: Reachable states at location L33-1 satisfy 587#true [2019-10-06 22:56:02,941 INFO L211 tionRefinementEngine]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2019-10-06 22:56:02,942 INFO L224 tionRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [469, 7, 7, 11] total 489 [2019-10-06 22:56:02,944 INFO L442 AbstractCegarLoop]: Interpolant automaton has 490 states [2019-10-06 22:56:02,954 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 490 interpolants. [2019-10-06 22:56:02,964 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=109840, Invalid=129770, Unknown=0, NotChecked=0, Total=239610 [2019-10-06 22:56:02,964 INFO L87 Difference]: Start difference. First operand 499 states and 503 transitions. Second operand 490 states. [2019-10-06 22:58:25,980 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-06 22:58:25,981 INFO L93 Difference]: Finished difference Result 533 states and 547 transitions. [2019-10-06 22:58:25,981 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 490 states. [2019-10-06 22:58:25,981 INFO L78 Accepts]: Start accepts. Automaton has 490 states. Word has length 524 [2019-10-06 22:58:25,982 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-06 22:58:25,985 INFO L225 Difference]: With dead ends: 533 [2019-10-06 22:58:25,985 INFO L226 Difference]: Without dead ends: 506 [2019-10-06 22:58:26,017 INFO L606 BasicCegarLoop]: 0 DeclaredPredicates, 2526 GetRequests, 1553 SyntacticMatches, 0 SemanticMatches, 973 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 131111 ImplicationChecksByTransitivity, 213.7s TimeCoverageRelationStatistics Valid=329534, Invalid=620116, Unknown=0, NotChecked=0, Total=949650 [2019-10-06 22:58:26,018 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 506 states. [2019-10-06 22:58:26,043 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 506 to 506. [2019-10-06 22:58:26,044 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 506 states. [2019-10-06 22:58:26,046 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 506 states to 506 states and 510 transitions. [2019-10-06 22:58:26,046 INFO L78 Accepts]: Start accepts. Automaton has 506 states and 510 transitions. Word has length 524 [2019-10-06 22:58:26,047 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-06 22:58:26,047 INFO L462 AbstractCegarLoop]: Abstraction has 506 states and 510 transitions. [2019-10-06 22:58:26,047 INFO L463 AbstractCegarLoop]: Interpolant automaton has 490 states. [2019-10-06 22:58:26,047 INFO L276 IsEmpty]: Start isEmpty. Operand 506 states and 510 transitions. [2019-10-06 22:58:26,051 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 532 [2019-10-06 22:58:26,051 INFO L377 BasicCegarLoop]: Found error trace [2019-10-06 22:58:26,051 INFO L385 BasicCegarLoop]: trace histogram [467, 30, 10, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-06 22:58:26,253 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 13 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-06 22:58:26,254 INFO L410 AbstractCegarLoop]: === Iteration 15 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-06 22:58:26,254 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-06 22:58:26,254 INFO L82 PathProgramCache]: Analyzing trace with hash -1244957600, now seen corresponding path program 12 times [2019-10-06 22:58:26,255 INFO L150 tionRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-10-06 22:58:26,255 INFO L231 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2019-10-06 22:58:26,255 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-06 22:58:26,255 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-06 22:58:26,256 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-06 22:58:27,526 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-06 22:59:44,245 INFO L134 CoverageAnalysis]: Checked inductivity of 109867 backedges. 0 proven. 109278 refuted. 0 times theorem prover too weak. 589 trivial. 0 not checked. [2019-10-06 22:59:44,245 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2019-10-06 22:59:44,245 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2019-10-06 22:59:44,245 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-06 22:59:45,202 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2019-10-06 22:59:45,203 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-10-06 22:59:45,218 INFO L256 TraceCheckSpWp]: Trace formula consists of 3109 conjuncts, 469 conjunts are in the unsatisfiable core [2019-10-06 22:59:45,230 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2019-10-06 22:59:45,495 INFO L134 CoverageAnalysis]: Checked inductivity of 109867 backedges. 0 proven. 109278 refuted. 0 times theorem prover too weak. 589 trivial. 0 not checked. [2019-10-06 22:59:45,495 INFO L322 TraceCheckSpWp]: Computing backward predicates...