java -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata ./data -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/default/automizer/svcomp-Reach-32bit-Automizer_Default.epf --traceabstraction.trace.refinement.strategy SIFA_TAIPAN --sifa.abstract.domain CompoundDomain --rcfgbuilder.size.of.a.code.block LoopFreeBlock --sifa.call.summarizer TopInputCallSummarizer --sifa.fluid SizeLimitFluid --sifa.simplification.technique SIMPLIFY_QUICK -i ../../../trunk/examples/svcomp/array-crafted/mapsum3.i -------------------------------------------------------------------------------- This is Ultimate 0.1.24-36ac518-m [2019-10-06 22:51:30,343 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-10-06 22:51:30,344 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-10-06 22:51:30,356 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-10-06 22:51:30,356 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-10-06 22:51:30,357 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-10-06 22:51:30,359 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-10-06 22:51:30,361 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-10-06 22:51:30,362 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-10-06 22:51:30,363 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-10-06 22:51:30,364 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-10-06 22:51:30,365 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-10-06 22:51:30,366 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-10-06 22:51:30,367 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-10-06 22:51:30,368 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-10-06 22:51:30,369 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-10-06 22:51:30,370 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-10-06 22:51:30,371 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-10-06 22:51:30,373 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-10-06 22:51:30,375 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-10-06 22:51:30,376 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-10-06 22:51:30,377 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-10-06 22:51:30,379 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-10-06 22:51:30,379 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-10-06 22:51:30,382 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... 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[2019-10-06 22:51:30,390 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-10-06 22:51:30,391 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-10-06 22:51:30,391 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-10-06 22:51:30,392 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/default/automizer/svcomp-Reach-32bit-Automizer_Default.epf [2019-10-06 22:51:30,410 INFO L113 SettingsManager]: Loading preferences was successful [2019-10-06 22:51:30,411 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-10-06 22:51:30,412 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-10-06 22:51:30,412 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-10-06 22:51:30,412 INFO L138 SettingsManager]: * Use SBE=true [2019-10-06 22:51:30,412 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-10-06 22:51:30,413 INFO L138 SettingsManager]: * sizeof long=4 [2019-10-06 22:51:30,413 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-10-06 22:51:30,413 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-10-06 22:51:30,413 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-10-06 22:51:30,413 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-10-06 22:51:30,414 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-10-06 22:51:30,414 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-10-06 22:51:30,414 INFO L138 SettingsManager]: * sizeof long double=12 [2019-10-06 22:51:30,414 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-10-06 22:51:30,414 INFO L138 SettingsManager]: * Use constant arrays=true [2019-10-06 22:51:30,415 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-10-06 22:51:30,415 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-10-06 22:51:30,415 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-10-06 22:51:30,415 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-10-06 22:51:30,415 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-10-06 22:51:30,416 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-10-06 22:51:30,416 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-10-06 22:51:30,416 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-10-06 22:51:30,416 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-10-06 22:51:30,416 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-10-06 22:51:30,417 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-10-06 22:51:30,417 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-10-06 22:51:30,417 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: Trace refinement strategy -> SIFA_TAIPAN Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.sifa: Abstract Domain -> CompoundDomain Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder: Size of a code block -> LoopFreeBlock Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.sifa: Call Summarizer -> TopInputCallSummarizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.sifa: Fluid -> SizeLimitFluid Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.sifa: Simplification Technique -> SIMPLIFY_QUICK [2019-10-06 22:51:30,733 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-10-06 22:51:30,756 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-10-06 22:51:30,760 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-10-06 22:51:30,761 INFO L271 PluginConnector]: Initializing CDTParser... [2019-10-06 22:51:30,762 INFO L275 PluginConnector]: CDTParser initialized [2019-10-06 22:51:30,762 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/array-crafted/mapsum3.i [2019-10-06 22:51:30,838 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/2d6c493c4/f4617f5d724e4e2b9d8ba04f93315bfb/FLAGf07a5e9ae [2019-10-06 22:51:31,292 INFO L306 CDTParser]: Found 1 translation units. [2019-10-06 22:51:31,292 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/array-crafted/mapsum3.i [2019-10-06 22:51:31,298 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/2d6c493c4/f4617f5d724e4e2b9d8ba04f93315bfb/FLAGf07a5e9ae [2019-10-06 22:51:31,667 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/2d6c493c4/f4617f5d724e4e2b9d8ba04f93315bfb [2019-10-06 22:51:31,674 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-10-06 22:51:31,676 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2019-10-06 22:51:31,677 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-10-06 22:51:31,677 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-10-06 22:51:31,680 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-10-06 22:51:31,681 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 06.10 10:51:31" (1/1) ... [2019-10-06 22:51:31,684 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@65982a3d and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.10 10:51:31, skipping insertion in model container [2019-10-06 22:51:31,684 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 06.10 10:51:31" (1/1) ... [2019-10-06 22:51:31,692 INFO L142 MainTranslator]: Starting translation in SV-COMP mode [2019-10-06 22:51:31,711 INFO L173 MainTranslator]: Built tables and reachable declarations [2019-10-06 22:51:31,913 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-10-06 22:51:31,922 INFO L188 MainTranslator]: Completed pre-run [2019-10-06 22:51:31,943 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-10-06 22:51:31,957 INFO L192 MainTranslator]: Completed translation [2019-10-06 22:51:31,957 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.10 10:51:31 WrapperNode [2019-10-06 22:51:31,958 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-10-06 22:51:31,958 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-10-06 22:51:31,958 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-10-06 22:51:31,958 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-10-06 22:51:32,052 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.10 10:51:31" (1/1) ... [2019-10-06 22:51:32,052 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.10 10:51:31" (1/1) ... [2019-10-06 22:51:32,059 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.10 10:51:31" (1/1) ... [2019-10-06 22:51:32,060 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.10 10:51:31" (1/1) ... [2019-10-06 22:51:32,070 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.10 10:51:31" (1/1) ... [2019-10-06 22:51:32,075 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.10 10:51:31" (1/1) ... [2019-10-06 22:51:32,077 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.10 10:51:31" (1/1) ... [2019-10-06 22:51:32,079 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-10-06 22:51:32,080 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-10-06 22:51:32,080 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-10-06 22:51:32,080 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-10-06 22:51:32,081 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.10 10:51:31" (1/1) ... No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-10-06 22:51:32,140 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2019-10-06 22:51:32,141 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-10-06 22:51:32,141 INFO L138 BoogieDeclarations]: Found implementation of procedure mapsum [2019-10-06 22:51:32,141 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2019-10-06 22:51:32,141 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_error [2019-10-06 22:51:32,141 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_int [2019-10-06 22:51:32,142 INFO L130 BoogieDeclarations]: Found specification of procedure mapsum [2019-10-06 22:51:32,142 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2019-10-06 22:51:32,142 INFO L130 BoogieDeclarations]: Found specification of procedure main [2019-10-06 22:51:32,142 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-10-06 22:51:32,142 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-10-06 22:51:32,143 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-10-06 22:51:32,143 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2019-10-06 22:51:32,143 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-10-06 22:51:32,498 INFO L279 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-10-06 22:51:32,498 INFO L284 CfgBuilder]: Removed 3 assume(true) statements. [2019-10-06 22:51:32,499 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 06.10 10:51:32 BoogieIcfgContainer [2019-10-06 22:51:32,500 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-10-06 22:51:32,501 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-10-06 22:51:32,501 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-10-06 22:51:32,504 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-10-06 22:51:32,504 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 06.10 10:51:31" (1/3) ... [2019-10-06 22:51:32,505 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@7e5eb499 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 06.10 10:51:32, skipping insertion in model container [2019-10-06 22:51:32,505 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.10 10:51:31" (2/3) ... [2019-10-06 22:51:32,506 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@7e5eb499 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 06.10 10:51:32, skipping insertion in model container [2019-10-06 22:51:32,506 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 06.10 10:51:32" (3/3) ... [2019-10-06 22:51:32,508 INFO L109 eAbstractionObserver]: Analyzing ICFG mapsum3.i [2019-10-06 22:51:32,518 INFO L152 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-10-06 22:51:32,527 INFO L164 ceAbstractionStarter]: Appying trace abstraction to program that has 1 error locations. [2019-10-06 22:51:32,539 INFO L249 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2019-10-06 22:51:32,564 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-10-06 22:51:32,565 INFO L374 AbstractCegarLoop]: Hoare is true [2019-10-06 22:51:32,565 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-10-06 22:51:32,565 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-10-06 22:51:32,565 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-10-06 22:51:32,565 INFO L378 AbstractCegarLoop]: Difference is false [2019-10-06 22:51:32,565 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-10-06 22:51:32,566 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-10-06 22:51:32,584 INFO L276 IsEmpty]: Start isEmpty. Operand 23 states. [2019-10-06 22:51:32,590 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2019-10-06 22:51:32,590 INFO L377 BasicCegarLoop]: Found error trace [2019-10-06 22:51:32,591 INFO L385 BasicCegarLoop]: trace histogram [3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-06 22:51:32,593 INFO L410 AbstractCegarLoop]: === Iteration 1 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-06 22:51:32,599 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-06 22:51:32,599 INFO L82 PathProgramCache]: Analyzing trace with hash 2002379581, now seen corresponding path program 1 times [2019-10-06 22:51:32,608 INFO L150 tionRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-10-06 22:51:32,608 INFO L231 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2019-10-06 22:51:32,609 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-06 22:51:32,609 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-06 22:51:32,609 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-06 22:51:32,700 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-06 22:51:32,794 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2019-10-06 22:51:32,795 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2019-10-06 22:51:32,795 INFO L211 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-10-06 22:51:32,796 INFO L224 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-10-06 22:51:32,800 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-10-06 22:51:32,810 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-10-06 22:51:32,811 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-10-06 22:51:32,812 INFO L87 Difference]: Start difference. First operand 23 states. Second operand 3 states. [2019-10-06 22:51:32,849 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-06 22:51:32,850 INFO L93 Difference]: Finished difference Result 41 states and 51 transitions. [2019-10-06 22:51:32,850 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-10-06 22:51:32,851 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 24 [2019-10-06 22:51:32,852 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-06 22:51:32,861 INFO L225 Difference]: With dead ends: 41 [2019-10-06 22:51:32,861 INFO L226 Difference]: Without dead ends: 20 [2019-10-06 22:51:32,865 INFO L606 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-10-06 22:51:32,883 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20 states. [2019-10-06 22:51:32,901 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20 to 20. [2019-10-06 22:51:32,903 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20 states. [2019-10-06 22:51:32,904 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20 states to 20 states and 24 transitions. [2019-10-06 22:51:32,906 INFO L78 Accepts]: Start accepts. Automaton has 20 states and 24 transitions. Word has length 24 [2019-10-06 22:51:32,906 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-06 22:51:32,907 INFO L462 AbstractCegarLoop]: Abstraction has 20 states and 24 transitions. [2019-10-06 22:51:32,907 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-10-06 22:51:32,907 INFO L276 IsEmpty]: Start isEmpty. Operand 20 states and 24 transitions. [2019-10-06 22:51:32,909 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2019-10-06 22:51:32,909 INFO L377 BasicCegarLoop]: Found error trace [2019-10-06 22:51:32,910 INFO L385 BasicCegarLoop]: trace histogram [3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-06 22:51:32,910 INFO L410 AbstractCegarLoop]: === Iteration 2 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-06 22:51:32,910 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-06 22:51:32,911 INFO L82 PathProgramCache]: Analyzing trace with hash 1641553888, now seen corresponding path program 1 times [2019-10-06 22:51:32,911 INFO L150 tionRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-10-06 22:51:32,911 INFO L231 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2019-10-06 22:51:32,911 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-06 22:51:32,912 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-06 22:51:32,912 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-06 22:51:32,943 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-06 22:51:32,994 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2019-10-06 22:51:32,994 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2019-10-06 22:51:32,995 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2019-10-06 22:51:32,995 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-06 22:51:33,087 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-06 22:51:33,090 INFO L256 TraceCheckSpWp]: Trace formula consists of 123 conjuncts, 2 conjunts are in the unsatisfiable core [2019-10-06 22:51:33,103 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2019-10-06 22:51:33,138 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2019-10-06 22:51:33,139 INFO L322 TraceCheckSpWp]: Computing backward predicates... [2019-10-06 22:51:33,184 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2019-10-06 22:51:33,184 INFO L211 tionRefinementEngine]: Constructing automaton from 1 perfect and 2 imperfect interpolant sequences. [2019-10-06 22:51:33,184 INFO L224 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [3, 3] total 5 [2019-10-06 22:51:33,186 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-10-06 22:51:33,186 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-10-06 22:51:33,187 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-10-06 22:51:33,187 INFO L87 Difference]: Start difference. First operand 20 states and 24 transitions. Second operand 3 states. [2019-10-06 22:51:33,197 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-06 22:51:33,197 INFO L93 Difference]: Finished difference Result 33 states and 43 transitions. [2019-10-06 22:51:33,198 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-10-06 22:51:33,198 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 25 [2019-10-06 22:51:33,199 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-06 22:51:33,201 INFO L225 Difference]: With dead ends: 33 [2019-10-06 22:51:33,202 INFO L226 Difference]: Without dead ends: 21 [2019-10-06 22:51:33,203 INFO L606 BasicCegarLoop]: 0 DeclaredPredicates, 52 GetRequests, 49 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-10-06 22:51:33,204 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21 states. [2019-10-06 22:51:33,214 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21 to 21. [2019-10-06 22:51:33,214 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21 states. [2019-10-06 22:51:33,216 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21 states to 21 states and 25 transitions. [2019-10-06 22:51:33,217 INFO L78 Accepts]: Start accepts. Automaton has 21 states and 25 transitions. Word has length 25 [2019-10-06 22:51:33,217 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-06 22:51:33,217 INFO L462 AbstractCegarLoop]: Abstraction has 21 states and 25 transitions. [2019-10-06 22:51:33,218 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-10-06 22:51:33,218 INFO L276 IsEmpty]: Start isEmpty. Operand 21 states and 25 transitions. [2019-10-06 22:51:33,220 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2019-10-06 22:51:33,220 INFO L377 BasicCegarLoop]: Found error trace [2019-10-06 22:51:33,221 INFO L385 BasicCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-06 22:51:33,424 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 2 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-06 22:51:33,425 INFO L410 AbstractCegarLoop]: === Iteration 3 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-06 22:51:33,425 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-06 22:51:33,425 INFO L82 PathProgramCache]: Analyzing trace with hash -1715048104, now seen corresponding path program 1 times [2019-10-06 22:51:33,426 INFO L150 tionRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-10-06 22:51:33,426 INFO L231 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2019-10-06 22:51:33,426 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-06 22:51:33,426 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-06 22:51:33,426 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-06 22:51:33,472 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-06 22:51:33,530 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2019-10-06 22:51:33,531 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2019-10-06 22:51:33,531 INFO L211 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-10-06 22:51:33,531 INFO L224 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-10-06 22:51:33,532 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-10-06 22:51:33,532 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-10-06 22:51:33,532 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-10-06 22:51:33,532 INFO L87 Difference]: Start difference. First operand 21 states and 25 transitions. Second operand 3 states. [2019-10-06 22:51:33,542 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-06 22:51:33,542 INFO L93 Difference]: Finished difference Result 31 states and 36 transitions. [2019-10-06 22:51:33,542 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-10-06 22:51:33,543 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 28 [2019-10-06 22:51:33,543 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-06 22:51:33,544 INFO L225 Difference]: With dead ends: 31 [2019-10-06 22:51:33,544 INFO L226 Difference]: Without dead ends: 22 [2019-10-06 22:51:33,545 INFO L606 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-10-06 22:51:33,545 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22 states. [2019-10-06 22:51:33,549 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22 to 22. [2019-10-06 22:51:33,549 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22 states. [2019-10-06 22:51:33,550 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22 states to 22 states and 26 transitions. [2019-10-06 22:51:33,551 INFO L78 Accepts]: Start accepts. Automaton has 22 states and 26 transitions. Word has length 28 [2019-10-06 22:51:33,555 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-06 22:51:33,555 INFO L462 AbstractCegarLoop]: Abstraction has 22 states and 26 transitions. [2019-10-06 22:51:33,555 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-10-06 22:51:33,555 INFO L276 IsEmpty]: Start isEmpty. Operand 22 states and 26 transitions. [2019-10-06 22:51:33,556 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2019-10-06 22:51:33,557 INFO L377 BasicCegarLoop]: Found error trace [2019-10-06 22:51:33,557 INFO L385 BasicCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-06 22:51:33,557 INFO L410 AbstractCegarLoop]: === Iteration 4 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-06 22:51:33,557 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-06 22:51:33,558 INFO L82 PathProgramCache]: Analyzing trace with hash -1273676679, now seen corresponding path program 1 times [2019-10-06 22:51:33,558 INFO L150 tionRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-10-06 22:51:33,558 INFO L231 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2019-10-06 22:51:33,558 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-06 22:51:33,558 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-06 22:51:33,559 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-06 22:51:33,598 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-06 22:51:33,649 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2019-10-06 22:51:33,650 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2019-10-06 22:51:33,650 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2019-10-06 22:51:33,650 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-06 22:51:33,715 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-06 22:51:33,716 INFO L256 TraceCheckSpWp]: Trace formula consists of 142 conjuncts, 3 conjunts are in the unsatisfiable core [2019-10-06 22:51:33,719 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2019-10-06 22:51:33,737 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2019-10-06 22:51:33,737 INFO L322 TraceCheckSpWp]: Computing backward predicates... [2019-10-06 22:51:33,794 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2019-10-06 22:51:33,795 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSifa [2019-10-06 22:51:33,827 INFO L162 IcfgInterpreter]: Started Sifa with 19 locations of interest [2019-10-06 22:51:33,827 INFO L169 IcfgInterpreter]: Building call graph [2019-10-06 22:51:33,836 INFO L174 IcfgInterpreter]: Initial procedures are [ULTIMATE.start] [2019-10-06 22:51:33,850 INFO L179 IcfgInterpreter]: Starting interpretation [2019-10-06 22:51:33,851 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.start with input of size 1 for LOIs [2019-10-06 22:51:33,995 INFO L199 IcfgInterpreter]: Interpreting procedure main with input of size 21 for LOIs [2019-10-06 22:51:36,169 INFO L199 IcfgInterpreter]: Interpreting procedure mapsum with input of size 1 for LOIs [2019-10-06 22:51:36,225 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.init with input of size 10 for LOIs [2019-10-06 22:51:36,230 INFO L183 IcfgInterpreter]: Interpretation finished [2019-10-06 22:51:36,231 INFO L191 IcfgInterpreter]: Final predicates for locations of interest are: [2019-10-06 22:51:36,231 INFO L193 IcfgInterpreter]: Reachable states at location mapsumENTRY satisfy 601#true [2019-10-06 22:51:36,231 INFO L193 IcfgInterpreter]: Reachable states at location L26-4 satisfy 73#(and (not (< main_~i~1 10000)) (<= 10000 main_~i~1)) [2019-10-06 22:51:36,232 INFO L193 IcfgInterpreter]: Reachable states at location L33 satisfy 592#(exists ((v_prenex_2 Int) (v_mapsum_~ret~0_BEFORE_RETURN_1 Int) (v_prenex_1 Int) (v_mapsum_~ret~0_BEFORE_RETURN_2 Int)) (or (and (not (< main_~i~1 10000)) (<= main_~ret~1 2147483647) (= main_~ret~1 (mod v_prenex_2 4294967296)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (<= (mod v_prenex_2 4294967296) 2147483647) (<= 0 (+ main_~ret~1 2147483648))) (and (not (< main_~i~1 10000)) (<= main_~ret~1 2147483647) (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_2 4294967296) 2147483647)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (= (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_2 4294967296) (- 4294967296)) main_~ret~1) (<= 0 (+ main_~ret~1 2147483648))) (and (not (< main_~i~1 10000)) (<= main_~ret~1 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (= main_~ret~1 (+ (mod v_prenex_1 4294967296) (- 4294967296))) (not (<= (mod v_prenex_1 4294967296) 2147483647)) (<= 0 (+ main_~ret~1 2147483648))) (and (not (< main_~i~1 10000)) (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_1 4294967296) 2147483647) (<= main_~ret~1 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (= (mod v_mapsum_~ret~0_BEFORE_RETURN_1 4294967296) main_~ret~1) (<= 0 (+ main_~ret~1 2147483648))))) [2019-10-06 22:51:36,232 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initENTRY satisfy 648#(and (= |old(#NULL.base)| |#NULL.base|) (= |#valid| |old(#valid)|) (= |#NULL.offset| |old(#NULL.offset)|)) [2019-10-06 22:51:36,232 INFO L193 IcfgInterpreter]: Reachable states at location L26-3 satisfy 68#true [2019-10-06 22:51:36,232 INFO L193 IcfgInterpreter]: Reachable states at location mainErr0ASSERT_VIOLATIONERROR_FUNCTION satisfy 234#(or (and (not (= main_~ret~1 main_~ret5~0)) (exists ((v_prenex_29 Int) (v_prenex_30 Int) (v_mapsum_~ret~0_BEFORE_RETURN_5 Int) (v_mapsum_~ret~0_BEFORE_RETURN_6 Int)) (or (and (not (< main_~i~2 9999)) (= (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_5 4294967296) (- 4294967296)) main_~ret5~0) (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_5 4294967296) 2147483647)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 39996))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648))) (and (not (< main_~i~2 9999)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 39996))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= main_~ret5~0 (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_6 4294967296) (- 4294967296))) (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_6 4294967296) 2147483647))) (and (= main_~ret5~0 (mod v_prenex_30 4294967296)) (not (< main_~i~2 9999)) (<= (mod v_prenex_30 4294967296) 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 39996))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648))) (and (<= (mod v_prenex_29 4294967296) 2147483647) (not (< main_~i~2 9999)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 39996))) (<= main_~ret5~0 2147483647) (= (mod v_prenex_29 4294967296) main_~ret5~0) (<= 0 (+ main_~ret5~0 2147483648)))))) (and (not (= main_~ret~1 main_~ret2~0)) (exists ((v_prenex_29 Int) (v_prenex_30 Int) (v_mapsum_~ret~0_BEFORE_RETURN_5 Int) (v_mapsum_~ret~0_BEFORE_RETURN_6 Int)) (or (and (not (< main_~i~2 9999)) (= (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_5 4294967296) (- 4294967296)) main_~ret5~0) (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_5 4294967296) 2147483647)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 39996))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648))) (and (not (< main_~i~2 9999)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 39996))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= main_~ret5~0 (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_6 4294967296) (- 4294967296))) (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_6 4294967296) 2147483647))) (and (= main_~ret5~0 (mod v_prenex_30 4294967296)) (not (< main_~i~2 9999)) (<= (mod v_prenex_30 4294967296) 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 39996))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648))) (and (<= (mod v_prenex_29 4294967296) 2147483647) (not (< main_~i~2 9999)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 39996))) (<= main_~ret5~0 2147483647) (= (mod v_prenex_29 4294967296) main_~ret5~0) (<= 0 (+ main_~ret5~0 2147483648))))))) [2019-10-06 22:51:36,233 INFO L193 IcfgInterpreter]: Reachable states at location L12-3 satisfy 639#(<= 0 mapsum_~i~0) [2019-10-06 22:51:36,233 INFO L193 IcfgInterpreter]: Reachable states at location L-1 satisfy 23#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= 0 (select |#valid| 0)) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-06 22:51:36,233 INFO L193 IcfgInterpreter]: Reachable states at location mainENTRY satisfy 33#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= |#valid| |old(#valid)|) (<= 0 |#NULL.base|) (= |#memory_int| |old(#memory_int)|) (= |#NULL.offset| 0) (= |old(#length)| |#length|) (= 0 (select |old(#valid)| 0)) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-06 22:51:36,233 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initEXIT satisfy 653#(and (= |#valid| (store |old(#valid)| 0 0)) (= 0 |#NULL.base|) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-06 22:51:36,233 INFO L193 IcfgInterpreter]: Reachable states at location L39-1 satisfy 479#true [2019-10-06 22:51:36,234 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.startENTRY satisfy 6#true [2019-10-06 22:51:36,234 INFO L193 IcfgInterpreter]: Reachable states at location L39 satisfy 522#(and (not (< main_~i~2 9999)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 39996))) (<= 9999 main_~i~2)) [2019-10-06 22:51:36,234 INFO L193 IcfgInterpreter]: Reachable states at location L30 satisfy 120#(or (exists ((v_prenex_2 Int) (v_mapsum_~ret~0_BEFORE_RETURN_2 Int)) (or (and (not (< main_~i~1 10000)) (= |main_#t~ret4| (mod v_prenex_2 4294967296)) (<= (mod v_prenex_2 4294967296) 2147483647)) (and (not (< main_~i~1 10000)) (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_2 4294967296) 2147483647)) (= (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_2 4294967296) (- 4294967296)) |main_#t~ret4|)))) (exists ((v_mapsum_~ret~0_BEFORE_RETURN_1 Int) (v_prenex_1 Int)) (or (and (not (< main_~i~1 10000)) (= (+ (mod v_prenex_1 4294967296) (- 4294967296)) |main_#t~ret4|) (not (<= (mod v_prenex_1 4294967296) 2147483647))) (and (not (< main_~i~1 10000)) (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_1 4294967296) 2147483647) (= (mod v_mapsum_~ret~0_BEFORE_RETURN_1 4294967296) |main_#t~ret4|))))) [2019-10-06 22:51:36,234 INFO L193 IcfgInterpreter]: Reachable states at location L41 satisfy 424#true [2019-10-06 22:51:36,234 INFO L193 IcfgInterpreter]: Reachable states at location L42 satisfy 313#true [2019-10-06 22:51:36,248 INFO L193 IcfgInterpreter]: Reachable states at location mapsumEXIT satisfy 644#(and (= (ite (<= (mod mapsum_~ret~0 4294967296) 2147483647) (mod mapsum_~ret~0 4294967296) (+ (mod mapsum_~ret~0 4294967296) (- 4294967296))) |mapsum_#res|) (<= 0 mapsum_~i~0) (not (< mapsum_~i~0 10000)) (<= 10000 mapsum_~i~0)) [2019-10-06 22:51:36,249 INFO L193 IcfgInterpreter]: Reachable states at location L33-1 satisfy 587#true [2019-10-06 22:51:36,249 INFO L193 IcfgInterpreter]: Reachable states at location L35-3 satisfy 560#true [2019-10-06 22:51:36,633 INFO L211 tionRefinementEngine]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2019-10-06 22:51:36,634 INFO L224 tionRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4, 4, 11] total 17 [2019-10-06 22:51:36,635 INFO L442 AbstractCegarLoop]: Interpolant automaton has 18 states [2019-10-06 22:51:36,636 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2019-10-06 22:51:36,636 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=50, Invalid=256, Unknown=0, NotChecked=0, Total=306 [2019-10-06 22:51:36,637 INFO L87 Difference]: Start difference. First operand 22 states and 26 transitions. Second operand 18 states. [2019-10-06 22:51:37,267 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-06 22:51:37,267 INFO L93 Difference]: Finished difference Result 40 states and 50 transitions. [2019-10-06 22:51:37,267 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2019-10-06 22:51:37,267 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 29 [2019-10-06 22:51:37,268 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-06 22:51:37,271 INFO L225 Difference]: With dead ends: 40 [2019-10-06 22:51:37,273 INFO L226 Difference]: Without dead ends: 25 [2019-10-06 22:51:37,274 INFO L606 BasicCegarLoop]: 0 DeclaredPredicates, 105 GetRequests, 77 SyntacticMatches, 0 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 198 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=133, Invalid=737, Unknown=0, NotChecked=0, Total=870 [2019-10-06 22:51:37,275 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25 states. [2019-10-06 22:51:37,281 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25 to 25. [2019-10-06 22:51:37,282 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 25 states. [2019-10-06 22:51:37,283 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25 states to 25 states and 29 transitions. [2019-10-06 22:51:37,285 INFO L78 Accepts]: Start accepts. Automaton has 25 states and 29 transitions. Word has length 29 [2019-10-06 22:51:37,286 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-06 22:51:37,286 INFO L462 AbstractCegarLoop]: Abstraction has 25 states and 29 transitions. [2019-10-06 22:51:37,286 INFO L463 AbstractCegarLoop]: Interpolant automaton has 18 states. [2019-10-06 22:51:37,286 INFO L276 IsEmpty]: Start isEmpty. Operand 25 states and 29 transitions. [2019-10-06 22:51:37,288 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2019-10-06 22:51:37,289 INFO L377 BasicCegarLoop]: Found error trace [2019-10-06 22:51:37,289 INFO L385 BasicCegarLoop]: trace histogram [4, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-06 22:51:37,493 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-06 22:51:37,494 INFO L410 AbstractCegarLoop]: === Iteration 5 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-06 22:51:37,494 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-06 22:51:37,494 INFO L82 PathProgramCache]: Analyzing trace with hash 811678230, now seen corresponding path program 2 times [2019-10-06 22:51:37,495 INFO L150 tionRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-10-06 22:51:37,495 INFO L231 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2019-10-06 22:51:37,495 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-06 22:51:37,495 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-06 22:51:37,496 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-06 22:51:37,535 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-06 22:51:37,617 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2019-10-06 22:51:37,618 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2019-10-06 22:51:37,618 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2019-10-06 22:51:37,618 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-06 22:51:37,711 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 2 check-sat command(s) [2019-10-06 22:51:37,711 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-10-06 22:51:37,720 INFO L256 TraceCheckSpWp]: Trace formula consists of 108 conjuncts, 3 conjunts are in the unsatisfiable core [2019-10-06 22:51:37,728 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2019-10-06 22:51:37,747 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 10 proven. 1 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2019-10-06 22:51:37,747 INFO L322 TraceCheckSpWp]: Computing backward predicates... [2019-10-06 22:51:37,787 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 10 proven. 1 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2019-10-06 22:51:37,788 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSifa [2019-10-06 22:51:37,791 INFO L162 IcfgInterpreter]: Started Sifa with 19 locations of interest [2019-10-06 22:51:37,794 INFO L169 IcfgInterpreter]: Building call graph [2019-10-06 22:51:37,794 INFO L174 IcfgInterpreter]: Initial procedures are [ULTIMATE.start] [2019-10-06 22:51:37,795 INFO L179 IcfgInterpreter]: Starting interpretation [2019-10-06 22:51:37,795 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.start with input of size 1 for LOIs [2019-10-06 22:51:37,828 INFO L199 IcfgInterpreter]: Interpreting procedure main with input of size 21 for LOIs [2019-10-06 22:51:39,344 INFO L199 IcfgInterpreter]: Interpreting procedure mapsum with input of size 1 for LOIs [2019-10-06 22:51:39,377 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.init with input of size 10 for LOIs [2019-10-06 22:51:39,381 INFO L183 IcfgInterpreter]: Interpretation finished [2019-10-06 22:51:39,381 INFO L191 IcfgInterpreter]: Final predicates for locations of interest are: [2019-10-06 22:51:39,382 INFO L193 IcfgInterpreter]: Reachable states at location mapsumENTRY satisfy 601#true [2019-10-06 22:51:39,382 INFO L193 IcfgInterpreter]: Reachable states at location L26-4 satisfy 73#(and (not (< main_~i~1 10000)) (<= 10000 main_~i~1)) [2019-10-06 22:51:39,382 INFO L193 IcfgInterpreter]: Reachable states at location L33 satisfy 592#(exists ((v_mapsum_~ret~0_BEFORE_RETURN_27 Int) (v_prenex_196 Int) (v_mapsum_~ret~0_BEFORE_RETURN_28 Int) (v_prenex_195 Int)) (or (and (not (< main_~i~1 10000)) (<= main_~ret~1 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (= (mod v_prenex_195 4294967296) main_~ret~1) (<= (mod v_prenex_195 4294967296) 2147483647) (<= 0 (+ main_~ret~1 2147483648))) (and (not (< main_~i~1 10000)) (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_27 4294967296) 2147483647)) (<= main_~ret~1 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (= (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_27 4294967296) (- 4294967296)) main_~ret~1) (<= 0 (+ main_~ret~1 2147483648))) (and (not (< main_~i~1 10000)) (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_28 4294967296) 2147483647) (<= main_~ret~1 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (= (mod v_mapsum_~ret~0_BEFORE_RETURN_28 4294967296) main_~ret~1) (<= 0 (+ main_~ret~1 2147483648))) (and (= (+ (mod v_prenex_196 4294967296) (- 4294967296)) main_~ret~1) (not (< main_~i~1 10000)) (not (<= (mod v_prenex_196 4294967296) 2147483647)) (<= main_~ret~1 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (<= 0 (+ main_~ret~1 2147483648))))) [2019-10-06 22:51:39,388 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initENTRY satisfy 648#(and (= |old(#NULL.base)| |#NULL.base|) (= |#valid| |old(#valid)|) (= |#NULL.offset| |old(#NULL.offset)|)) [2019-10-06 22:51:39,388 INFO L193 IcfgInterpreter]: Reachable states at location L26-3 satisfy 68#true [2019-10-06 22:51:39,389 INFO L193 IcfgInterpreter]: Reachable states at location mainErr0ASSERT_VIOLATIONERROR_FUNCTION satisfy 234#(or (and (not (= main_~ret~1 main_~ret2~0)) (exists ((v_mapsum_~ret~0_BEFORE_RETURN_32 Int) (v_mapsum_~ret~0_BEFORE_RETURN_31 Int) (v_prenex_224 Int) (v_prenex_223 Int)) (or (and (not (< main_~i~2 9999)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 39996))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (<= (mod v_prenex_223 4294967296) 2147483647) (= (mod v_prenex_223 4294967296) main_~ret5~0)) (and (= (mod v_mapsum_~ret~0_BEFORE_RETURN_32 4294967296) main_~ret5~0) (not (< main_~i~2 9999)) (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_32 4294967296) 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 39996))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648))) (and (not (< main_~i~2 9999)) (= main_~ret5~0 (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_31 4294967296) (- 4294967296))) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 39996))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_31 4294967296) 2147483647))) (and (not (< main_~i~2 9999)) (not (<= (mod v_prenex_224 4294967296) 2147483647)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 39996))) (<= main_~ret5~0 2147483647) (= main_~ret5~0 (+ (mod v_prenex_224 4294967296) (- 4294967296))) (<= 0 (+ main_~ret5~0 2147483648)))))) (and (exists ((v_mapsum_~ret~0_BEFORE_RETURN_32 Int) (v_mapsum_~ret~0_BEFORE_RETURN_31 Int) (v_prenex_224 Int) (v_prenex_223 Int)) (or (and (not (< main_~i~2 9999)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 39996))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (<= (mod v_prenex_223 4294967296) 2147483647) (= (mod v_prenex_223 4294967296) main_~ret5~0)) (and (= (mod v_mapsum_~ret~0_BEFORE_RETURN_32 4294967296) main_~ret5~0) (not (< main_~i~2 9999)) (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_32 4294967296) 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 39996))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648))) (and (not (< main_~i~2 9999)) (= main_~ret5~0 (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_31 4294967296) (- 4294967296))) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 39996))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_31 4294967296) 2147483647))) (and (not (< main_~i~2 9999)) (not (<= (mod v_prenex_224 4294967296) 2147483647)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 39996))) (<= main_~ret5~0 2147483647) (= main_~ret5~0 (+ (mod v_prenex_224 4294967296) (- 4294967296))) (<= 0 (+ main_~ret5~0 2147483648))))) (not (= main_~ret~1 main_~ret5~0)))) [2019-10-06 22:51:39,390 INFO L193 IcfgInterpreter]: Reachable states at location L12-3 satisfy 639#(<= 0 mapsum_~i~0) [2019-10-06 22:51:39,390 INFO L193 IcfgInterpreter]: Reachable states at location L-1 satisfy 23#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= 0 (select |#valid| 0)) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-06 22:51:39,390 INFO L193 IcfgInterpreter]: Reachable states at location mainENTRY satisfy 33#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= |#valid| |old(#valid)|) (<= 0 |#NULL.base|) (= |#memory_int| |old(#memory_int)|) (= |#NULL.offset| 0) (= |old(#length)| |#length|) (= 0 (select |old(#valid)| 0)) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-06 22:51:39,390 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initEXIT satisfy 653#(and (= |#valid| (store |old(#valid)| 0 0)) (= 0 |#NULL.base|) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-06 22:51:39,390 INFO L193 IcfgInterpreter]: Reachable states at location L39-1 satisfy 479#true [2019-10-06 22:51:39,391 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.startENTRY satisfy 6#true [2019-10-06 22:51:39,391 INFO L193 IcfgInterpreter]: Reachable states at location L39 satisfy 522#(and (not (< main_~i~2 9999)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 39996))) (<= 9999 main_~i~2)) [2019-10-06 22:51:39,391 INFO L193 IcfgInterpreter]: Reachable states at location L30 satisfy 120#(or (exists ((v_prenex_196 Int) (v_mapsum_~ret~0_BEFORE_RETURN_28 Int)) (or (and (not (< main_~i~1 10000)) (= (+ (mod v_prenex_196 4294967296) (- 4294967296)) |main_#t~ret4|) (not (<= (mod v_prenex_196 4294967296) 2147483647))) (and (not (< main_~i~1 10000)) (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_28 4294967296) 2147483647) (= (mod v_mapsum_~ret~0_BEFORE_RETURN_28 4294967296) |main_#t~ret4|)))) (exists ((v_mapsum_~ret~0_BEFORE_RETURN_27 Int) (v_prenex_195 Int)) (or (and (not (< main_~i~1 10000)) (= (mod v_prenex_195 4294967296) |main_#t~ret4|) (<= (mod v_prenex_195 4294967296) 2147483647)) (and (not (< main_~i~1 10000)) (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_27 4294967296) 2147483647)) (= (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_27 4294967296) (- 4294967296)) |main_#t~ret4|))))) [2019-10-06 22:51:39,391 INFO L193 IcfgInterpreter]: Reachable states at location L41 satisfy 424#true [2019-10-06 22:51:39,391 INFO L193 IcfgInterpreter]: Reachable states at location L42 satisfy 313#true [2019-10-06 22:51:39,391 INFO L193 IcfgInterpreter]: Reachable states at location mapsumEXIT satisfy 644#(and (= (ite (<= (mod mapsum_~ret~0 4294967296) 2147483647) (mod mapsum_~ret~0 4294967296) (+ (mod mapsum_~ret~0 4294967296) (- 4294967296))) |mapsum_#res|) (<= 0 mapsum_~i~0) (not (< mapsum_~i~0 10000)) (<= 10000 mapsum_~i~0)) [2019-10-06 22:51:39,392 INFO L193 IcfgInterpreter]: Reachable states at location L33-1 satisfy 587#true [2019-10-06 22:51:39,392 INFO L193 IcfgInterpreter]: Reachable states at location L35-3 satisfy 560#true [2019-10-06 22:51:39,751 INFO L211 tionRefinementEngine]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2019-10-06 22:51:39,751 INFO L224 tionRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 4, 4, 11] total 21 [2019-10-06 22:51:39,752 INFO L442 AbstractCegarLoop]: Interpolant automaton has 22 states [2019-10-06 22:51:39,752 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2019-10-06 22:51:39,753 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=64, Invalid=398, Unknown=0, NotChecked=0, Total=462 [2019-10-06 22:51:39,753 INFO L87 Difference]: Start difference. First operand 25 states and 29 transitions. Second operand 22 states. [2019-10-06 22:51:40,695 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-06 22:51:40,695 INFO L93 Difference]: Finished difference Result 44 states and 58 transitions. [2019-10-06 22:51:40,696 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2019-10-06 22:51:40,696 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 32 [2019-10-06 22:51:40,696 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-06 22:51:40,697 INFO L225 Difference]: With dead ends: 44 [2019-10-06 22:51:40,697 INFO L226 Difference]: Without dead ends: 29 [2019-10-06 22:51:40,698 INFO L606 BasicCegarLoop]: 0 DeclaredPredicates, 119 GetRequests, 82 SyntacticMatches, 0 SemanticMatches, 37 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 305 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=210, Invalid=1272, Unknown=0, NotChecked=0, Total=1482 [2019-10-06 22:51:40,698 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 29 states. [2019-10-06 22:51:40,703 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 29 to 29. [2019-10-06 22:51:40,704 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 29 states. [2019-10-06 22:51:40,704 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29 states to 29 states and 33 transitions. [2019-10-06 22:51:40,705 INFO L78 Accepts]: Start accepts. Automaton has 29 states and 33 transitions. Word has length 32 [2019-10-06 22:51:40,705 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-06 22:51:40,705 INFO L462 AbstractCegarLoop]: Abstraction has 29 states and 33 transitions. [2019-10-06 22:51:40,705 INFO L463 AbstractCegarLoop]: Interpolant automaton has 22 states. [2019-10-06 22:51:40,705 INFO L276 IsEmpty]: Start isEmpty. Operand 29 states and 33 transitions. [2019-10-06 22:51:40,707 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2019-10-06 22:51:40,707 INFO L377 BasicCegarLoop]: Found error trace [2019-10-06 22:51:40,707 INFO L385 BasicCegarLoop]: trace histogram [12, 5, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-06 22:51:40,914 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 4 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-06 22:51:40,914 INFO L410 AbstractCegarLoop]: === Iteration 6 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-06 22:51:40,915 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-06 22:51:40,915 INFO L82 PathProgramCache]: Analyzing trace with hash -2095262385, now seen corresponding path program 3 times [2019-10-06 22:51:40,915 INFO L150 tionRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-10-06 22:51:40,916 INFO L231 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2019-10-06 22:51:40,916 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-06 22:51:40,916 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-06 22:51:40,916 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-06 22:51:40,955 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-06 22:51:41,032 INFO L134 CoverageAnalysis]: Checked inductivity of 127 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2019-10-06 22:51:41,032 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2019-10-06 22:51:41,032 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2019-10-06 22:51:41,033 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-06 22:51:41,150 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2019-10-06 22:51:41,150 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-10-06 22:51:41,151 INFO L256 TraceCheckSpWp]: Trace formula consists of 211 conjuncts, 7 conjunts are in the unsatisfiable core [2019-10-06 22:51:41,164 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2019-10-06 22:51:41,187 INFO L134 CoverageAnalysis]: Checked inductivity of 127 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2019-10-06 22:51:41,188 INFO L322 TraceCheckSpWp]: Computing backward predicates... [2019-10-06 22:51:41,263 INFO L134 CoverageAnalysis]: Checked inductivity of 127 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2019-10-06 22:51:41,264 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSifa [2019-10-06 22:51:41,266 INFO L162 IcfgInterpreter]: Started Sifa with 19 locations of interest [2019-10-06 22:51:41,266 INFO L169 IcfgInterpreter]: Building call graph [2019-10-06 22:51:41,266 INFO L174 IcfgInterpreter]: Initial procedures are [ULTIMATE.start] [2019-10-06 22:51:41,267 INFO L179 IcfgInterpreter]: Starting interpretation [2019-10-06 22:51:41,267 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.start with input of size 1 for LOIs [2019-10-06 22:51:41,290 INFO L199 IcfgInterpreter]: Interpreting procedure main with input of size 21 for LOIs [2019-10-06 22:51:42,823 INFO L199 IcfgInterpreter]: Interpreting procedure mapsum with input of size 1 for LOIs [2019-10-06 22:51:42,863 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.init with input of size 10 for LOIs [2019-10-06 22:51:42,867 INFO L183 IcfgInterpreter]: Interpretation finished [2019-10-06 22:51:42,867 INFO L191 IcfgInterpreter]: Final predicates for locations of interest are: [2019-10-06 22:51:42,868 INFO L193 IcfgInterpreter]: Reachable states at location mapsumENTRY satisfy 601#true [2019-10-06 22:51:42,868 INFO L193 IcfgInterpreter]: Reachable states at location L26-4 satisfy 73#(and (not (< main_~i~1 10000)) (<= 10000 main_~i~1)) [2019-10-06 22:51:42,868 INFO L193 IcfgInterpreter]: Reachable states at location L33 satisfy 592#(exists ((v_mapsum_~ret~0_BEFORE_RETURN_54 Int) (v_mapsum_~ret~0_BEFORE_RETURN_53 Int) (v_prenex_389 Int) (v_prenex_390 Int)) (or (and (<= (mod v_prenex_390 4294967296) 2147483647) (not (< main_~i~1 10000)) (<= main_~ret~1 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (= (mod v_prenex_390 4294967296) main_~ret~1) (<= 0 (+ main_~ret~1 2147483648))) (and (not (< main_~i~1 10000)) (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_53 4294967296) 2147483647)) (<= main_~ret~1 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (= main_~ret~1 (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_53 4294967296) (- 4294967296))) (<= 0 (+ main_~ret~1 2147483648))) (and (not (< main_~i~1 10000)) (<= main_~ret~1 2147483647) (= main_~ret~1 (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_54 4294967296) (- 4294967296))) (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_54 4294967296) 2147483647)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (<= 0 (+ main_~ret~1 2147483648))) (and (not (< main_~i~1 10000)) (<= main_~ret~1 2147483647) (= (mod v_prenex_389 4294967296) main_~ret~1) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (<= (mod v_prenex_389 4294967296) 2147483647) (<= 0 (+ main_~ret~1 2147483648))))) [2019-10-06 22:51:42,869 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initENTRY satisfy 648#(and (= |old(#NULL.base)| |#NULL.base|) (= |#valid| |old(#valid)|) (= |#NULL.offset| |old(#NULL.offset)|)) [2019-10-06 22:51:42,869 INFO L193 IcfgInterpreter]: Reachable states at location L26-3 satisfy 68#true [2019-10-06 22:51:42,870 INFO L193 IcfgInterpreter]: Reachable states at location mainErr0ASSERT_VIOLATIONERROR_FUNCTION satisfy 234#(or (and (exists ((v_mapsum_~ret~0_BEFORE_RETURN_58 Int) (v_mapsum_~ret~0_BEFORE_RETURN_57 Int) (v_prenex_417 Int) (v_prenex_418 Int)) (or (and (= main_~ret5~0 (+ (mod v_prenex_417 4294967296) (- 4294967296))) (not (< main_~i~2 9999)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 39996))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (not (<= (mod v_prenex_417 4294967296) 2147483647))) (and (not (< main_~i~2 9999)) (= main_~ret5~0 (mod v_prenex_418 4294967296)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 39996))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (<= (mod v_prenex_418 4294967296) 2147483647)) (and (= main_~ret5~0 (mod v_mapsum_~ret~0_BEFORE_RETURN_57 4294967296)) (not (< main_~i~2 9999)) (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_57 4294967296) 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 39996))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648))) (and (not (< main_~i~2 9999)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 39996))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_58 4294967296) (- 4294967296)) main_~ret5~0) (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_58 4294967296) 2147483647))))) (not (= main_~ret~1 main_~ret5~0))) (and (not (= main_~ret~1 main_~ret2~0)) (exists ((v_mapsum_~ret~0_BEFORE_RETURN_58 Int) (v_mapsum_~ret~0_BEFORE_RETURN_57 Int) (v_prenex_417 Int) (v_prenex_418 Int)) (or (and (= main_~ret5~0 (+ (mod v_prenex_417 4294967296) (- 4294967296))) (not (< main_~i~2 9999)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 39996))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (not (<= (mod v_prenex_417 4294967296) 2147483647))) (and (not (< main_~i~2 9999)) (= main_~ret5~0 (mod v_prenex_418 4294967296)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 39996))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (<= (mod v_prenex_418 4294967296) 2147483647)) (and (= main_~ret5~0 (mod v_mapsum_~ret~0_BEFORE_RETURN_57 4294967296)) (not (< main_~i~2 9999)) (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_57 4294967296) 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 39996))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648))) (and (not (< main_~i~2 9999)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 39996))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_58 4294967296) (- 4294967296)) main_~ret5~0) (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_58 4294967296) 2147483647))))))) [2019-10-06 22:51:42,870 INFO L193 IcfgInterpreter]: Reachable states at location L12-3 satisfy 639#(<= 0 mapsum_~i~0) [2019-10-06 22:51:42,870 INFO L193 IcfgInterpreter]: Reachable states at location L-1 satisfy 23#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= 0 (select |#valid| 0)) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-06 22:51:42,871 INFO L193 IcfgInterpreter]: Reachable states at location mainENTRY satisfy 33#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= |#valid| |old(#valid)|) (<= 0 |#NULL.base|) (= |#memory_int| |old(#memory_int)|) (= |#NULL.offset| 0) (= |old(#length)| |#length|) (= 0 (select |old(#valid)| 0)) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-06 22:51:42,871 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initEXIT satisfy 653#(and (= |#valid| (store |old(#valid)| 0 0)) (= 0 |#NULL.base|) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-06 22:51:42,871 INFO L193 IcfgInterpreter]: Reachable states at location L39-1 satisfy 479#true [2019-10-06 22:51:42,872 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.startENTRY satisfy 6#true [2019-10-06 22:51:42,872 INFO L193 IcfgInterpreter]: Reachable states at location L39 satisfy 522#(and (not (< main_~i~2 9999)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 39996))) (<= 9999 main_~i~2)) [2019-10-06 22:51:42,872 INFO L193 IcfgInterpreter]: Reachable states at location L30 satisfy 120#(or (exists ((v_mapsum_~ret~0_BEFORE_RETURN_53 Int) (v_prenex_389 Int)) (or (and (not (< main_~i~1 10000)) (= |main_#t~ret4| (mod v_prenex_389 4294967296)) (<= (mod v_prenex_389 4294967296) 2147483647)) (and (not (< main_~i~1 10000)) (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_53 4294967296) 2147483647)) (= (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_53 4294967296) (- 4294967296)) |main_#t~ret4|)))) (exists ((v_mapsum_~ret~0_BEFORE_RETURN_54 Int) (v_prenex_390 Int)) (or (and (<= (mod v_prenex_390 4294967296) 2147483647) (not (< main_~i~1 10000)) (= (mod v_prenex_390 4294967296) |main_#t~ret4|)) (and (not (< main_~i~1 10000)) (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_54 4294967296) 2147483647)) (= |main_#t~ret4| (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_54 4294967296) (- 4294967296))))))) [2019-10-06 22:51:42,873 INFO L193 IcfgInterpreter]: Reachable states at location L41 satisfy 424#true [2019-10-06 22:51:42,873 INFO L193 IcfgInterpreter]: Reachable states at location L42 satisfy 313#true [2019-10-06 22:51:42,873 INFO L193 IcfgInterpreter]: Reachable states at location mapsumEXIT satisfy 644#(and (= (ite (<= (mod mapsum_~ret~0 4294967296) 2147483647) (mod mapsum_~ret~0 4294967296) (+ (mod mapsum_~ret~0 4294967296) (- 4294967296))) |mapsum_#res|) (<= 0 mapsum_~i~0) (not (< mapsum_~i~0 10000)) (<= 10000 mapsum_~i~0)) [2019-10-06 22:51:42,873 INFO L193 IcfgInterpreter]: Reachable states at location L33-1 satisfy 587#true [2019-10-06 22:51:42,874 INFO L193 IcfgInterpreter]: Reachable states at location L35-3 satisfy 560#true [2019-10-06 22:51:43,349 INFO L211 tionRefinementEngine]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2019-10-06 22:51:43,349 INFO L224 tionRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8, 8, 11] total 25 [2019-10-06 22:51:43,350 INFO L442 AbstractCegarLoop]: Interpolant automaton has 26 states [2019-10-06 22:51:43,351 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2019-10-06 22:51:43,351 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=134, Invalid=516, Unknown=0, NotChecked=0, Total=650 [2019-10-06 22:51:43,351 INFO L87 Difference]: Start difference. First operand 29 states and 33 transitions. Second operand 26 states. [2019-10-06 22:51:44,204 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-06 22:51:44,204 INFO L93 Difference]: Finished difference Result 54 states and 68 transitions. [2019-10-06 22:51:44,204 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2019-10-06 22:51:44,204 INFO L78 Accepts]: Start accepts. Automaton has 26 states. Word has length 42 [2019-10-06 22:51:44,205 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-06 22:51:44,206 INFO L225 Difference]: With dead ends: 54 [2019-10-06 22:51:44,206 INFO L226 Difference]: Without dead ends: 36 [2019-10-06 22:51:44,208 INFO L606 BasicCegarLoop]: 0 DeclaredPredicates, 156 GetRequests, 112 SyntacticMatches, 0 SemanticMatches, 44 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 552 ImplicationChecksByTransitivity, 1.2s TimeCoverageRelationStatistics Valid=369, Invalid=1701, Unknown=0, NotChecked=0, Total=2070 [2019-10-06 22:51:44,209 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 36 states. [2019-10-06 22:51:44,214 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 36 to 36. [2019-10-06 22:51:44,215 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 36 states. [2019-10-06 22:51:44,215 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 36 states to 36 states and 40 transitions. [2019-10-06 22:51:44,216 INFO L78 Accepts]: Start accepts. Automaton has 36 states and 40 transitions. Word has length 42 [2019-10-06 22:51:44,216 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-06 22:51:44,216 INFO L462 AbstractCegarLoop]: Abstraction has 36 states and 40 transitions. [2019-10-06 22:51:44,216 INFO L463 AbstractCegarLoop]: Interpolant automaton has 26 states. [2019-10-06 22:51:44,216 INFO L276 IsEmpty]: Start isEmpty. Operand 36 states and 40 transitions. [2019-10-06 22:51:44,217 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2019-10-06 22:51:44,217 INFO L377 BasicCegarLoop]: Found error trace [2019-10-06 22:51:44,217 INFO L385 BasicCegarLoop]: trace histogram [12, 12, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-06 22:51:44,430 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 5 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-06 22:51:44,431 INFO L410 AbstractCegarLoop]: === Iteration 7 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-06 22:51:44,431 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-06 22:51:44,431 INFO L82 PathProgramCache]: Analyzing trace with hash 2049115666, now seen corresponding path program 4 times [2019-10-06 22:51:44,432 INFO L150 tionRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-10-06 22:51:44,432 INFO L231 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2019-10-06 22:51:44,432 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-06 22:51:44,433 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-06 22:51:44,433 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-06 22:51:44,478 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-06 22:51:44,610 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2019-10-06 22:51:44,611 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2019-10-06 22:51:44,611 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2019-10-06 22:51:44,611 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-06 22:51:44,759 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-06 22:51:44,760 INFO L256 TraceCheckSpWp]: Trace formula consists of 253 conjuncts, 14 conjunts are in the unsatisfiable core [2019-10-06 22:51:44,764 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2019-10-06 22:51:44,773 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2019-10-06 22:51:44,773 INFO L322 TraceCheckSpWp]: Computing backward predicates... [2019-10-06 22:51:45,032 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2019-10-06 22:51:45,032 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSifa [2019-10-06 22:51:45,034 INFO L162 IcfgInterpreter]: Started Sifa with 19 locations of interest [2019-10-06 22:51:45,034 INFO L169 IcfgInterpreter]: Building call graph [2019-10-06 22:51:45,034 INFO L174 IcfgInterpreter]: Initial procedures are [ULTIMATE.start] [2019-10-06 22:51:45,035 INFO L179 IcfgInterpreter]: Starting interpretation [2019-10-06 22:51:45,035 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.start with input of size 1 for LOIs [2019-10-06 22:51:45,054 INFO L199 IcfgInterpreter]: Interpreting procedure main with input of size 21 for LOIs [2019-10-06 22:51:46,181 INFO L199 IcfgInterpreter]: Interpreting procedure mapsum with input of size 1 for LOIs [2019-10-06 22:51:46,206 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.init with input of size 10 for LOIs [2019-10-06 22:51:46,208 INFO L183 IcfgInterpreter]: Interpretation finished [2019-10-06 22:51:46,209 INFO L191 IcfgInterpreter]: Final predicates for locations of interest are: [2019-10-06 22:51:46,209 INFO L193 IcfgInterpreter]: Reachable states at location mapsumENTRY satisfy 601#true [2019-10-06 22:51:46,209 INFO L193 IcfgInterpreter]: Reachable states at location L26-4 satisfy 73#(and (not (< main_~i~1 10000)) (<= 10000 main_~i~1)) [2019-10-06 22:51:46,210 INFO L193 IcfgInterpreter]: Reachable states at location L33 satisfy 592#(exists ((v_mapsum_~ret~0_BEFORE_RETURN_79 Int) (v_prenex_583 Int) (v_prenex_584 Int) (v_mapsum_~ret~0_BEFORE_RETURN_80 Int)) (or (and (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_79 4294967296) 2147483647)) (not (< main_~i~1 10000)) (<= main_~ret~1 2147483647) (= (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_79 4294967296) (- 4294967296)) main_~ret~1) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (<= 0 (+ main_~ret~1 2147483648))) (and (not (< main_~i~1 10000)) (= main_~ret~1 (mod v_mapsum_~ret~0_BEFORE_RETURN_80 4294967296)) (<= main_~ret~1 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_80 4294967296) 2147483647) (<= 0 (+ main_~ret~1 2147483648))) (and (not (< main_~i~1 10000)) (<= main_~ret~1 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (not (<= (mod v_prenex_584 4294967296) 2147483647)) (= main_~ret~1 (+ (mod v_prenex_584 4294967296) (- 4294967296))) (<= 0 (+ main_~ret~1 2147483648))) (and (not (< main_~i~1 10000)) (<= main_~ret~1 2147483647) (<= (mod v_prenex_583 4294967296) 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (= main_~ret~1 (mod v_prenex_583 4294967296)) (<= 0 (+ main_~ret~1 2147483648))))) [2019-10-06 22:51:46,210 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initENTRY satisfy 648#(and (= |old(#NULL.base)| |#NULL.base|) (= |#valid| |old(#valid)|) (= |#NULL.offset| |old(#NULL.offset)|)) [2019-10-06 22:51:46,210 INFO L193 IcfgInterpreter]: Reachable states at location L26-3 satisfy 68#true [2019-10-06 22:51:46,210 INFO L193 IcfgInterpreter]: Reachable states at location mainErr0ASSERT_VIOLATIONERROR_FUNCTION satisfy 234#(or (and (not (= main_~ret~1 main_~ret2~0)) (exists ((v_prenex_611 Int) (v_prenex_612 Int) (v_mapsum_~ret~0_BEFORE_RETURN_83 Int) (v_mapsum_~ret~0_BEFORE_RETURN_84 Int)) (or (and (not (< main_~i~2 9999)) (not (<= (mod v_prenex_611 4294967296) 2147483647)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 39996))) (<= main_~ret5~0 2147483647) (= main_~ret5~0 (+ (mod v_prenex_611 4294967296) (- 4294967296))) (<= 0 (+ main_~ret5~0 2147483648))) (and (not (< main_~i~2 9999)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 39996))) (<= main_~ret5~0 2147483647) (= main_~ret5~0 (mod v_mapsum_~ret~0_BEFORE_RETURN_84 4294967296)) (<= 0 (+ main_~ret5~0 2147483648)) (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_84 4294967296) 2147483647)) (and (not (< main_~i~2 9999)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 39996))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= main_~ret5~0 (mod v_mapsum_~ret~0_BEFORE_RETURN_83 4294967296)) (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_83 4294967296) 2147483647)) (and (= (+ (mod v_prenex_612 4294967296) (- 4294967296)) main_~ret5~0) (not (< main_~i~2 9999)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 39996))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (not (<= (mod v_prenex_612 4294967296) 2147483647)))))) (and (not (= main_~ret~1 main_~ret5~0)) (exists ((v_prenex_611 Int) (v_prenex_612 Int) (v_mapsum_~ret~0_BEFORE_RETURN_83 Int) (v_mapsum_~ret~0_BEFORE_RETURN_84 Int)) (or (and (not (< main_~i~2 9999)) (not (<= (mod v_prenex_611 4294967296) 2147483647)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 39996))) (<= main_~ret5~0 2147483647) (= main_~ret5~0 (+ (mod v_prenex_611 4294967296) (- 4294967296))) (<= 0 (+ main_~ret5~0 2147483648))) (and (not (< main_~i~2 9999)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 39996))) (<= main_~ret5~0 2147483647) (= main_~ret5~0 (mod v_mapsum_~ret~0_BEFORE_RETURN_84 4294967296)) (<= 0 (+ main_~ret5~0 2147483648)) (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_84 4294967296) 2147483647)) (and (not (< main_~i~2 9999)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 39996))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= main_~ret5~0 (mod v_mapsum_~ret~0_BEFORE_RETURN_83 4294967296)) (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_83 4294967296) 2147483647)) (and (= (+ (mod v_prenex_612 4294967296) (- 4294967296)) main_~ret5~0) (not (< main_~i~2 9999)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 39996))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (not (<= (mod v_prenex_612 4294967296) 2147483647))))))) [2019-10-06 22:51:46,211 INFO L193 IcfgInterpreter]: Reachable states at location L12-3 satisfy 639#(<= 0 mapsum_~i~0) [2019-10-06 22:51:46,211 INFO L193 IcfgInterpreter]: Reachable states at location L-1 satisfy 23#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= 0 (select |#valid| 0)) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-06 22:51:46,211 INFO L193 IcfgInterpreter]: Reachable states at location mainENTRY satisfy 33#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= |#valid| |old(#valid)|) (<= 0 |#NULL.base|) (= |#memory_int| |old(#memory_int)|) (= |#NULL.offset| 0) (= |old(#length)| |#length|) (= 0 (select |old(#valid)| 0)) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-06 22:51:46,211 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initEXIT satisfy 653#(and (= |#valid| (store |old(#valid)| 0 0)) (= 0 |#NULL.base|) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-06 22:51:46,211 INFO L193 IcfgInterpreter]: Reachable states at location L39-1 satisfy 479#true [2019-10-06 22:51:46,211 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.startENTRY satisfy 6#true [2019-10-06 22:51:46,212 INFO L193 IcfgInterpreter]: Reachable states at location L39 satisfy 522#(and (not (< main_~i~2 9999)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 39996))) (<= 9999 main_~i~2)) [2019-10-06 22:51:46,212 INFO L193 IcfgInterpreter]: Reachable states at location L30 satisfy 120#(or (exists ((v_mapsum_~ret~0_BEFORE_RETURN_79 Int) (v_prenex_583 Int)) (or (and (= (mod v_prenex_583 4294967296) |main_#t~ret4|) (not (< main_~i~1 10000)) (<= (mod v_prenex_583 4294967296) 2147483647)) (and (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_79 4294967296) 2147483647)) (not (< main_~i~1 10000)) (= (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_79 4294967296) (- 4294967296)) |main_#t~ret4|)))) (exists ((v_prenex_584 Int) (v_mapsum_~ret~0_BEFORE_RETURN_80 Int)) (or (and (not (< main_~i~1 10000)) (= |main_#t~ret4| (mod v_mapsum_~ret~0_BEFORE_RETURN_80 4294967296)) (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_80 4294967296) 2147483647)) (and (not (< main_~i~1 10000)) (not (<= (mod v_prenex_584 4294967296) 2147483647)) (= (+ (mod v_prenex_584 4294967296) (- 4294967296)) |main_#t~ret4|))))) [2019-10-06 22:51:46,212 INFO L193 IcfgInterpreter]: Reachable states at location L41 satisfy 424#true [2019-10-06 22:51:46,212 INFO L193 IcfgInterpreter]: Reachable states at location L42 satisfy 313#true [2019-10-06 22:51:46,212 INFO L193 IcfgInterpreter]: Reachable states at location mapsumEXIT satisfy 644#(and (= (ite (<= (mod mapsum_~ret~0 4294967296) 2147483647) (mod mapsum_~ret~0 4294967296) (+ (mod mapsum_~ret~0 4294967296) (- 4294967296))) |mapsum_#res|) (<= 0 mapsum_~i~0) (not (< mapsum_~i~0 10000)) (<= 10000 mapsum_~i~0)) [2019-10-06 22:51:46,213 INFO L193 IcfgInterpreter]: Reachable states at location L33-1 satisfy 587#true [2019-10-06 22:51:46,213 INFO L193 IcfgInterpreter]: Reachable states at location L35-3 satisfy 560#true [2019-10-06 22:51:46,608 INFO L211 tionRefinementEngine]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2019-10-06 22:51:46,608 INFO L224 tionRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 15, 15, 11] total 39 [2019-10-06 22:51:46,609 INFO L442 AbstractCegarLoop]: Interpolant automaton has 40 states [2019-10-06 22:51:46,610 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 40 interpolants. [2019-10-06 22:51:46,611 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=435, Invalid=1125, Unknown=0, NotChecked=0, Total=1560 [2019-10-06 22:51:46,612 INFO L87 Difference]: Start difference. First operand 36 states and 40 transitions. Second operand 40 states. [2019-10-06 22:51:48,114 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-06 22:51:48,114 INFO L93 Difference]: Finished difference Result 68 states and 89 transitions. [2019-10-06 22:51:48,115 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 39 states. [2019-10-06 22:51:48,115 INFO L78 Accepts]: Start accepts. Automaton has 40 states. Word has length 49 [2019-10-06 22:51:48,115 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-06 22:51:48,116 INFO L225 Difference]: With dead ends: 68 [2019-10-06 22:51:48,116 INFO L226 Difference]: Without dead ends: 50 [2019-10-06 22:51:48,118 INFO L606 BasicCegarLoop]: 0 DeclaredPredicates, 198 GetRequests, 126 SyntacticMatches, 0 SemanticMatches, 72 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1364 ImplicationChecksByTransitivity, 1.9s TimeCoverageRelationStatistics Valid=1244, Invalid=4158, Unknown=0, NotChecked=0, Total=5402 [2019-10-06 22:51:48,119 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 50 states. [2019-10-06 22:51:48,128 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 50 to 50. [2019-10-06 22:51:48,129 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 50 states. [2019-10-06 22:51:48,130 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 50 states to 50 states and 54 transitions. [2019-10-06 22:51:48,130 INFO L78 Accepts]: Start accepts. Automaton has 50 states and 54 transitions. Word has length 49 [2019-10-06 22:51:48,130 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-06 22:51:48,130 INFO L462 AbstractCegarLoop]: Abstraction has 50 states and 54 transitions. [2019-10-06 22:51:48,131 INFO L463 AbstractCegarLoop]: Interpolant automaton has 40 states. [2019-10-06 22:51:48,131 INFO L276 IsEmpty]: Start isEmpty. Operand 50 states and 54 transitions. [2019-10-06 22:51:48,132 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 64 [2019-10-06 22:51:48,132 INFO L377 BasicCegarLoop]: Found error trace [2019-10-06 22:51:48,132 INFO L385 BasicCegarLoop]: trace histogram [26, 12, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-06 22:51:48,336 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 6 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-06 22:51:48,336 INFO L410 AbstractCegarLoop]: === Iteration 8 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-06 22:51:48,336 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-06 22:51:48,337 INFO L82 PathProgramCache]: Analyzing trace with hash -740285582, now seen corresponding path program 5 times [2019-10-06 22:51:48,337 INFO L150 tionRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-10-06 22:51:48,337 INFO L231 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2019-10-06 22:51:48,337 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-06 22:51:48,338 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-06 22:51:48,338 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-06 22:51:48,431 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-06 22:51:48,772 INFO L134 CoverageAnalysis]: Checked inductivity of 463 backedges. 0 proven. 351 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2019-10-06 22:51:48,772 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2019-10-06 22:51:48,772 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2019-10-06 22:51:48,772 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-06 22:51:48,964 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 3 check-sat command(s) [2019-10-06 22:51:48,964 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-10-06 22:51:48,965 INFO L256 TraceCheckSpWp]: Trace formula consists of 149 conjuncts, 3 conjunts are in the unsatisfiable core [2019-10-06 22:51:48,980 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2019-10-06 22:51:49,023 INFO L134 CoverageAnalysis]: Checked inductivity of 463 backedges. 54 proven. 1 refuted. 0 times theorem prover too weak. 408 trivial. 0 not checked. [2019-10-06 22:51:49,023 INFO L322 TraceCheckSpWp]: Computing backward predicates... [2019-10-06 22:51:49,073 INFO L134 CoverageAnalysis]: Checked inductivity of 463 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 462 trivial. 0 not checked. [2019-10-06 22:51:49,074 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSifa [2019-10-06 22:51:49,075 INFO L162 IcfgInterpreter]: Started Sifa with 19 locations of interest [2019-10-06 22:51:49,076 INFO L169 IcfgInterpreter]: Building call graph [2019-10-06 22:51:49,076 INFO L174 IcfgInterpreter]: Initial procedures are [ULTIMATE.start] [2019-10-06 22:51:49,076 INFO L179 IcfgInterpreter]: Starting interpretation [2019-10-06 22:51:49,076 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.start with input of size 1 for LOIs [2019-10-06 22:51:49,100 INFO L199 IcfgInterpreter]: Interpreting procedure main with input of size 21 for LOIs [2019-10-06 22:51:50,313 INFO L199 IcfgInterpreter]: Interpreting procedure mapsum with input of size 1 for LOIs [2019-10-06 22:51:50,336 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.init with input of size 10 for LOIs [2019-10-06 22:51:50,339 INFO L183 IcfgInterpreter]: Interpretation finished [2019-10-06 22:51:50,339 INFO L191 IcfgInterpreter]: Final predicates for locations of interest are: [2019-10-06 22:51:50,339 INFO L193 IcfgInterpreter]: Reachable states at location mapsumENTRY satisfy 601#true [2019-10-06 22:51:50,340 INFO L193 IcfgInterpreter]: Reachable states at location L26-4 satisfy 73#(and (not (< main_~i~1 10000)) (<= 10000 main_~i~1)) [2019-10-06 22:51:50,340 INFO L193 IcfgInterpreter]: Reachable states at location L33 satisfy 592#(exists ((v_prenex_777 Int) (v_mapsum_~ret~0_BEFORE_RETURN_106 Int) (v_mapsum_~ret~0_BEFORE_RETURN_105 Int) (v_prenex_778 Int)) (or (and (not (< main_~i~1 10000)) (<= main_~ret~1 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (= main_~ret~1 (mod v_prenex_778 4294967296)) (<= (mod v_prenex_778 4294967296) 2147483647) (<= 0 (+ main_~ret~1 2147483648))) (and (not (< main_~i~1 10000)) (not (<= (mod v_prenex_777 4294967296) 2147483647)) (<= main_~ret~1 2147483647) (= main_~ret~1 (+ (mod v_prenex_777 4294967296) (- 4294967296))) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (<= 0 (+ main_~ret~1 2147483648))) (and (not (< main_~i~1 10000)) (<= main_~ret~1 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (= (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_106 4294967296) (- 4294967296)) main_~ret~1) (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_106 4294967296) 2147483647)) (<= 0 (+ main_~ret~1 2147483648))) (and (not (< main_~i~1 10000)) (<= main_~ret~1 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_105 4294967296) 2147483647) (= (mod v_mapsum_~ret~0_BEFORE_RETURN_105 4294967296) main_~ret~1) (<= 0 (+ main_~ret~1 2147483648))))) [2019-10-06 22:51:50,340 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initENTRY satisfy 648#(and (= |old(#NULL.base)| |#NULL.base|) (= |#valid| |old(#valid)|) (= |#NULL.offset| |old(#NULL.offset)|)) [2019-10-06 22:51:50,340 INFO L193 IcfgInterpreter]: Reachable states at location L26-3 satisfy 68#true [2019-10-06 22:51:50,341 INFO L193 IcfgInterpreter]: Reachable states at location mainErr0ASSERT_VIOLATIONERROR_FUNCTION satisfy 234#(or (and (not (= main_~ret~1 main_~ret5~0)) (exists ((v_prenex_806 Int) (v_prenex_805 Int) (v_mapsum_~ret~0_BEFORE_RETURN_109 Int) (v_mapsum_~ret~0_BEFORE_RETURN_110 Int)) (or (and (not (< main_~i~2 9999)) (= main_~ret5~0 (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_110 4294967296) (- 4294967296))) (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_110 4294967296) 2147483647)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 39996))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648))) (and (not (< main_~i~2 9999)) (= (+ (mod v_prenex_805 4294967296) (- 4294967296)) main_~ret5~0) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 39996))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (not (<= (mod v_prenex_805 4294967296) 2147483647))) (and (not (< main_~i~2 9999)) (= main_~ret5~0 (mod v_prenex_806 4294967296)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 39996))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (<= (mod v_prenex_806 4294967296) 2147483647)) (and (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_109 4294967296) 2147483647) (not (< main_~i~2 9999)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 39996))) (<= main_~ret5~0 2147483647) (= (mod v_mapsum_~ret~0_BEFORE_RETURN_109 4294967296) main_~ret5~0) (<= 0 (+ main_~ret5~0 2147483648)))))) (and (not (= main_~ret~1 main_~ret2~0)) (exists ((v_prenex_806 Int) (v_prenex_805 Int) (v_mapsum_~ret~0_BEFORE_RETURN_109 Int) (v_mapsum_~ret~0_BEFORE_RETURN_110 Int)) (or (and (not (< main_~i~2 9999)) (= main_~ret5~0 (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_110 4294967296) (- 4294967296))) (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_110 4294967296) 2147483647)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 39996))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648))) (and (not (< main_~i~2 9999)) (= (+ (mod v_prenex_805 4294967296) (- 4294967296)) main_~ret5~0) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 39996))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (not (<= (mod v_prenex_805 4294967296) 2147483647))) (and (not (< main_~i~2 9999)) (= main_~ret5~0 (mod v_prenex_806 4294967296)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 39996))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (<= (mod v_prenex_806 4294967296) 2147483647)) (and (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_109 4294967296) 2147483647) (not (< main_~i~2 9999)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 39996))) (<= main_~ret5~0 2147483647) (= (mod v_mapsum_~ret~0_BEFORE_RETURN_109 4294967296) main_~ret5~0) (<= 0 (+ main_~ret5~0 2147483648))))))) [2019-10-06 22:51:50,341 INFO L193 IcfgInterpreter]: Reachable states at location L12-3 satisfy 639#(<= 0 mapsum_~i~0) [2019-10-06 22:51:50,341 INFO L193 IcfgInterpreter]: Reachable states at location L-1 satisfy 23#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= 0 (select |#valid| 0)) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-06 22:51:50,341 INFO L193 IcfgInterpreter]: Reachable states at location mainENTRY satisfy 33#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= |#valid| |old(#valid)|) (<= 0 |#NULL.base|) (= |#memory_int| |old(#memory_int)|) (= |#NULL.offset| 0) (= |old(#length)| |#length|) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (= 0 (select |old(#valid)| 0))) [2019-10-06 22:51:50,341 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initEXIT satisfy 653#(and (= |#valid| (store |old(#valid)| 0 0)) (= 0 |#NULL.base|) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-06 22:51:50,342 INFO L193 IcfgInterpreter]: Reachable states at location L39-1 satisfy 479#true [2019-10-06 22:51:50,342 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.startENTRY satisfy 6#true [2019-10-06 22:51:50,342 INFO L193 IcfgInterpreter]: Reachable states at location L39 satisfy 522#(and (not (< main_~i~2 9999)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 39996))) (<= 9999 main_~i~2)) [2019-10-06 22:51:50,342 INFO L193 IcfgInterpreter]: Reachable states at location L30 satisfy 120#(or (exists ((v_mapsum_~ret~0_BEFORE_RETURN_106 Int) (v_prenex_778 Int)) (or (and (not (< main_~i~1 10000)) (= (mod v_prenex_778 4294967296) |main_#t~ret4|) (<= (mod v_prenex_778 4294967296) 2147483647)) (and (not (< main_~i~1 10000)) (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_106 4294967296) 2147483647)) (= (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_106 4294967296) (- 4294967296)) |main_#t~ret4|)))) (exists ((v_prenex_777 Int) (v_mapsum_~ret~0_BEFORE_RETURN_105 Int)) (or (and (not (< main_~i~1 10000)) (= (mod v_mapsum_~ret~0_BEFORE_RETURN_105 4294967296) |main_#t~ret4|) (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_105 4294967296) 2147483647)) (and (= (+ (mod v_prenex_777 4294967296) (- 4294967296)) |main_#t~ret4|) (not (< main_~i~1 10000)) (not (<= (mod v_prenex_777 4294967296) 2147483647)))))) [2019-10-06 22:51:50,342 INFO L193 IcfgInterpreter]: Reachable states at location L41 satisfy 424#true [2019-10-06 22:51:50,342 INFO L193 IcfgInterpreter]: Reachable states at location L42 satisfy 313#true [2019-10-06 22:51:50,343 INFO L193 IcfgInterpreter]: Reachable states at location mapsumEXIT satisfy 644#(and (= (ite (<= (mod mapsum_~ret~0 4294967296) 2147483647) (mod mapsum_~ret~0 4294967296) (+ (mod mapsum_~ret~0 4294967296) (- 4294967296))) |mapsum_#res|) (<= 0 mapsum_~i~0) (not (< mapsum_~i~0 10000)) (<= 10000 mapsum_~i~0)) [2019-10-06 22:51:50,343 INFO L193 IcfgInterpreter]: Reachable states at location L33-1 satisfy 587#true [2019-10-06 22:51:50,343 INFO L193 IcfgInterpreter]: Reachable states at location L35-3 satisfy 560#true [2019-10-06 22:51:50,919 INFO L211 tionRefinementEngine]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2019-10-06 22:51:50,919 INFO L224 tionRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [29, 4, 4, 11] total 43 [2019-10-06 22:51:50,920 INFO L442 AbstractCegarLoop]: Interpolant automaton has 44 states [2019-10-06 22:51:50,921 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 44 interpolants. [2019-10-06 22:51:50,921 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=449, Invalid=1443, Unknown=0, NotChecked=0, Total=1892 [2019-10-06 22:51:50,922 INFO L87 Difference]: Start difference. First operand 50 states and 54 transitions. Second operand 44 states. [2019-10-06 22:51:53,126 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-06 22:51:53,126 INFO L93 Difference]: Finished difference Result 72 states and 83 transitions. [2019-10-06 22:51:53,126 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 44 states. [2019-10-06 22:51:53,127 INFO L78 Accepts]: Start accepts. Automaton has 44 states. Word has length 63 [2019-10-06 22:51:53,127 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-06 22:51:53,128 INFO L225 Difference]: With dead ends: 72 [2019-10-06 22:51:53,128 INFO L226 Difference]: Without dead ends: 54 [2019-10-06 22:51:53,131 INFO L606 BasicCegarLoop]: 0 DeclaredPredicates, 257 GetRequests, 176 SyntacticMatches, 0 SemanticMatches, 81 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1350 ImplicationChecksByTransitivity, 2.6s TimeCoverageRelationStatistics Valid=1349, Invalid=5457, Unknown=0, NotChecked=0, Total=6806 [2019-10-06 22:51:53,131 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 54 states. [2019-10-06 22:51:53,138 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 54 to 54. [2019-10-06 22:51:53,138 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 54 states. [2019-10-06 22:51:53,139 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 54 states to 54 states and 58 transitions. [2019-10-06 22:51:53,139 INFO L78 Accepts]: Start accepts. Automaton has 54 states and 58 transitions. Word has length 63 [2019-10-06 22:51:53,140 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-06 22:51:53,140 INFO L462 AbstractCegarLoop]: Abstraction has 54 states and 58 transitions. [2019-10-06 22:51:53,140 INFO L463 AbstractCegarLoop]: Interpolant automaton has 44 states. [2019-10-06 22:51:53,140 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 58 transitions. [2019-10-06 22:51:53,141 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-10-06 22:51:53,141 INFO L377 BasicCegarLoop]: Found error trace [2019-10-06 22:51:53,141 INFO L385 BasicCegarLoop]: trace histogram [27, 12, 4, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-06 22:51:53,345 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 7 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-06 22:51:53,345 INFO L410 AbstractCegarLoop]: === Iteration 9 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-06 22:51:53,346 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-06 22:51:53,346 INFO L82 PathProgramCache]: Analyzing trace with hash -1983049792, now seen corresponding path program 6 times [2019-10-06 22:51:53,346 INFO L150 tionRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-10-06 22:51:53,346 INFO L231 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2019-10-06 22:51:53,347 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-06 22:51:53,347 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-06 22:51:53,347 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-06 22:51:53,413 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-06 22:51:53,795 INFO L134 CoverageAnalysis]: Checked inductivity of 499 backedges. 0 proven. 378 refuted. 0 times theorem prover too weak. 121 trivial. 0 not checked. [2019-10-06 22:51:53,795 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2019-10-06 22:51:53,796 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2019-10-06 22:51:53,796 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-06 22:51:54,009 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2019-10-06 22:51:54,010 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-10-06 22:51:54,011 INFO L256 TraceCheckSpWp]: Trace formula consists of 355 conjuncts, 29 conjunts are in the unsatisfiable core [2019-10-06 22:51:54,013 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2019-10-06 22:51:54,029 INFO L134 CoverageAnalysis]: Checked inductivity of 499 backedges. 0 proven. 378 refuted. 0 times theorem prover too weak. 121 trivial. 0 not checked. [2019-10-06 22:51:54,029 INFO L322 TraceCheckSpWp]: Computing backward predicates... [2019-10-06 22:51:55,012 INFO L134 CoverageAnalysis]: Checked inductivity of 499 backedges. 0 proven. 378 refuted. 0 times theorem prover too weak. 121 trivial. 0 not checked. [2019-10-06 22:51:55,013 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSifa [2019-10-06 22:51:55,014 INFO L162 IcfgInterpreter]: Started Sifa with 19 locations of interest [2019-10-06 22:51:55,014 INFO L169 IcfgInterpreter]: Building call graph [2019-10-06 22:51:55,015 INFO L174 IcfgInterpreter]: Initial procedures are [ULTIMATE.start] [2019-10-06 22:51:55,015 INFO L179 IcfgInterpreter]: Starting interpretation [2019-10-06 22:51:55,015 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.start with input of size 1 for LOIs [2019-10-06 22:51:55,041 INFO L199 IcfgInterpreter]: Interpreting procedure main with input of size 21 for LOIs [2019-10-06 22:51:56,245 INFO L199 IcfgInterpreter]: Interpreting procedure mapsum with input of size 1 for LOIs [2019-10-06 22:51:56,273 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.init with input of size 10 for LOIs [2019-10-06 22:51:56,276 INFO L183 IcfgInterpreter]: Interpretation finished [2019-10-06 22:51:56,277 INFO L191 IcfgInterpreter]: Final predicates for locations of interest are: [2019-10-06 22:51:56,277 INFO L193 IcfgInterpreter]: Reachable states at location mapsumENTRY satisfy 601#true [2019-10-06 22:51:56,277 INFO L193 IcfgInterpreter]: Reachable states at location L26-4 satisfy 73#(and (not (< main_~i~1 10000)) (<= 10000 main_~i~1)) [2019-10-06 22:51:56,278 INFO L193 IcfgInterpreter]: Reachable states at location L33 satisfy 592#(exists ((v_prenex_972 Int) (v_prenex_971 Int) (v_mapsum_~ret~0_BEFORE_RETURN_132 Int) (v_mapsum_~ret~0_BEFORE_RETURN_131 Int)) (or (and (not (< main_~i~1 10000)) (<= (mod v_prenex_971 4294967296) 2147483647) (<= main_~ret~1 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (= main_~ret~1 (mod v_prenex_971 4294967296)) (<= 0 (+ main_~ret~1 2147483648))) (and (not (< main_~i~1 10000)) (<= main_~ret~1 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_132 4294967296) 2147483647)) (= main_~ret~1 (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_132 4294967296) (- 4294967296))) (<= 0 (+ main_~ret~1 2147483648))) (and (not (< main_~i~1 10000)) (<= main_~ret~1 2147483647) (= (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_131 4294967296) (- 4294967296)) main_~ret~1) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_131 4294967296) 2147483647)) (<= 0 (+ main_~ret~1 2147483648))) (and (not (< main_~i~1 10000)) (= main_~ret~1 (mod v_prenex_972 4294967296)) (<= main_~ret~1 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (<= (mod v_prenex_972 4294967296) 2147483647) (<= 0 (+ main_~ret~1 2147483648))))) [2019-10-06 22:51:56,278 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initENTRY satisfy 648#(and (= |old(#NULL.base)| |#NULL.base|) (= |#valid| |old(#valid)|) (= |#NULL.offset| |old(#NULL.offset)|)) [2019-10-06 22:51:56,278 INFO L193 IcfgInterpreter]: Reachable states at location L26-3 satisfy 68#true [2019-10-06 22:51:56,279 INFO L193 IcfgInterpreter]: Reachable states at location mainErr0ASSERT_VIOLATIONERROR_FUNCTION satisfy 234#(or (and (not (= main_~ret~1 main_~ret2~0)) (exists ((v_mapsum_~ret~0_BEFORE_RETURN_136 Int) (v_mapsum_~ret~0_BEFORE_RETURN_135 Int) (v_prenex_1000 Int) (v_prenex_999 Int)) (or (and (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_136 4294967296) 2147483647)) (not (< main_~i~2 9999)) (= (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_136 4294967296) (- 4294967296)) main_~ret5~0) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 39996))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648))) (and (not (< main_~i~2 9999)) (<= (mod v_prenex_1000 4294967296) 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 39996))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (mod v_prenex_1000 4294967296) main_~ret5~0)) (and (not (<= (mod v_prenex_999 4294967296) 2147483647)) (not (< main_~i~2 9999)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 39996))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (+ (mod v_prenex_999 4294967296) (- 4294967296)) main_~ret5~0)) (and (= (mod v_mapsum_~ret~0_BEFORE_RETURN_135 4294967296) main_~ret5~0) (not (< main_~i~2 9999)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 39996))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_135 4294967296) 2147483647))))) (and (exists ((v_mapsum_~ret~0_BEFORE_RETURN_136 Int) (v_mapsum_~ret~0_BEFORE_RETURN_135 Int) (v_prenex_1000 Int) (v_prenex_999 Int)) (or (and (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_136 4294967296) 2147483647)) (not (< main_~i~2 9999)) (= (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_136 4294967296) (- 4294967296)) main_~ret5~0) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 39996))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648))) (and (not (< main_~i~2 9999)) (<= (mod v_prenex_1000 4294967296) 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 39996))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (mod v_prenex_1000 4294967296) main_~ret5~0)) (and (not (<= (mod v_prenex_999 4294967296) 2147483647)) (not (< main_~i~2 9999)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 39996))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (+ (mod v_prenex_999 4294967296) (- 4294967296)) main_~ret5~0)) (and (= (mod v_mapsum_~ret~0_BEFORE_RETURN_135 4294967296) main_~ret5~0) (not (< main_~i~2 9999)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 39996))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_135 4294967296) 2147483647)))) (not (= main_~ret~1 main_~ret5~0)))) [2019-10-06 22:51:56,279 INFO L193 IcfgInterpreter]: Reachable states at location L12-3 satisfy 639#(<= 0 mapsum_~i~0) [2019-10-06 22:51:56,279 INFO L193 IcfgInterpreter]: Reachable states at location L-1 satisfy 23#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= 0 (select |#valid| 0)) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-06 22:51:56,280 INFO L193 IcfgInterpreter]: Reachable states at location mainENTRY satisfy 33#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= |#valid| |old(#valid)|) (<= 0 |#NULL.base|) (= |#memory_int| |old(#memory_int)|) (= |#NULL.offset| 0) (= |old(#length)| |#length|) (= 0 (select |old(#valid)| 0)) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-06 22:51:56,280 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initEXIT satisfy 653#(and (= |#valid| (store |old(#valid)| 0 0)) (= 0 |#NULL.base|) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-06 22:51:56,280 INFO L193 IcfgInterpreter]: Reachable states at location L39-1 satisfy 479#true [2019-10-06 22:51:56,281 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.startENTRY satisfy 6#true [2019-10-06 22:51:56,281 INFO L193 IcfgInterpreter]: Reachable states at location L39 satisfy 522#(and (not (< main_~i~2 9999)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 39996))) (<= 9999 main_~i~2)) [2019-10-06 22:51:56,281 INFO L193 IcfgInterpreter]: Reachable states at location L30 satisfy 120#(or (exists ((v_prenex_972 Int) (v_mapsum_~ret~0_BEFORE_RETURN_132 Int)) (or (and (not (< main_~i~1 10000)) (= (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_132 4294967296) (- 4294967296)) |main_#t~ret4|) (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_132 4294967296) 2147483647))) (and (not (< main_~i~1 10000)) (= (mod v_prenex_972 4294967296) |main_#t~ret4|) (<= (mod v_prenex_972 4294967296) 2147483647)))) (exists ((v_prenex_971 Int) (v_mapsum_~ret~0_BEFORE_RETURN_131 Int)) (or (and (not (< main_~i~1 10000)) (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_131 4294967296) 2147483647)) (= (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_131 4294967296) (- 4294967296)) |main_#t~ret4|)) (and (not (< main_~i~1 10000)) (<= (mod v_prenex_971 4294967296) 2147483647) (= (mod v_prenex_971 4294967296) |main_#t~ret4|))))) [2019-10-06 22:51:56,282 INFO L193 IcfgInterpreter]: Reachable states at location L41 satisfy 424#true [2019-10-06 22:51:56,282 INFO L193 IcfgInterpreter]: Reachable states at location L42 satisfy 313#true [2019-10-06 22:51:56,282 INFO L193 IcfgInterpreter]: Reachable states at location mapsumEXIT satisfy 644#(and (= (ite (<= (mod mapsum_~ret~0 4294967296) 2147483647) (mod mapsum_~ret~0 4294967296) (+ (mod mapsum_~ret~0 4294967296) (- 4294967296))) |mapsum_#res|) (<= 0 mapsum_~i~0) (not (< mapsum_~i~0 10000)) (<= 10000 mapsum_~i~0)) [2019-10-06 22:51:56,282 INFO L193 IcfgInterpreter]: Reachable states at location L33-1 satisfy 587#true [2019-10-06 22:51:56,283 INFO L193 IcfgInterpreter]: Reachable states at location L35-3 satisfy 560#true [2019-10-06 22:51:56,904 INFO L211 tionRefinementEngine]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2019-10-06 22:51:56,905 INFO L224 tionRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [30, 30, 30, 11] total 69 [2019-10-06 22:51:56,906 INFO L442 AbstractCegarLoop]: Interpolant automaton has 70 states [2019-10-06 22:51:56,907 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 70 interpolants. [2019-10-06 22:51:56,908 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=1740, Invalid=3090, Unknown=0, NotChecked=0, Total=4830 [2019-10-06 22:51:56,909 INFO L87 Difference]: Start difference. First operand 54 states and 58 transitions. Second operand 70 states. [2019-10-06 22:52:00,213 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-06 22:52:00,213 INFO L93 Difference]: Finished difference Result 104 states and 140 transitions. [2019-10-06 22:52:00,214 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 69 states. [2019-10-06 22:52:00,214 INFO L78 Accepts]: Start accepts. Automaton has 70 states. Word has length 67 [2019-10-06 22:52:00,214 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-06 22:52:00,216 INFO L225 Difference]: With dead ends: 104 [2019-10-06 22:52:00,216 INFO L226 Difference]: Without dead ends: 83 [2019-10-06 22:52:00,220 INFO L606 BasicCegarLoop]: 0 DeclaredPredicates, 297 GetRequests, 165 SyntacticMatches, 0 SemanticMatches, 132 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3929 ImplicationChecksByTransitivity, 4.7s TimeCoverageRelationStatistics Valid=5099, Invalid=12723, Unknown=0, NotChecked=0, Total=17822 [2019-10-06 22:52:00,221 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 83 states. [2019-10-06 22:52:00,229 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 83 to 83. [2019-10-06 22:52:00,229 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 83 states. [2019-10-06 22:52:00,231 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 83 states to 83 states and 87 transitions. [2019-10-06 22:52:00,232 INFO L78 Accepts]: Start accepts. Automaton has 83 states and 87 transitions. Word has length 67 [2019-10-06 22:52:00,232 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-06 22:52:00,232 INFO L462 AbstractCegarLoop]: Abstraction has 83 states and 87 transitions. [2019-10-06 22:52:00,233 INFO L463 AbstractCegarLoop]: Interpolant automaton has 70 states. [2019-10-06 22:52:00,233 INFO L276 IsEmpty]: Start isEmpty. Operand 83 states and 87 transitions. [2019-10-06 22:52:00,235 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 97 [2019-10-06 22:52:00,235 INFO L377 BasicCegarLoop]: Found error trace [2019-10-06 22:52:00,235 INFO L385 BasicCegarLoop]: trace histogram [56, 12, 4, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-06 22:52:00,439 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 8 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-06 22:52:00,440 INFO L410 AbstractCegarLoop]: === Iteration 10 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-06 22:52:00,440 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-06 22:52:00,440 INFO L82 PathProgramCache]: Analyzing trace with hash 1441308797, now seen corresponding path program 7 times [2019-10-06 22:52:00,441 INFO L150 tionRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-10-06 22:52:00,441 INFO L231 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2019-10-06 22:52:00,441 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-06 22:52:00,442 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-06 22:52:00,442 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-06 22:52:00,509 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-06 22:52:01,901 INFO L134 CoverageAnalysis]: Checked inductivity of 1717 backedges. 0 proven. 1596 refuted. 0 times theorem prover too weak. 121 trivial. 0 not checked. [2019-10-06 22:52:01,901 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2019-10-06 22:52:01,901 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2019-10-06 22:52:01,902 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-06 22:52:02,174 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-06 22:52:02,177 INFO L256 TraceCheckSpWp]: Trace formula consists of 529 conjuncts, 58 conjunts are in the unsatisfiable core [2019-10-06 22:52:02,180 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2019-10-06 22:52:02,222 INFO L134 CoverageAnalysis]: Checked inductivity of 1717 backedges. 0 proven. 1596 refuted. 0 times theorem prover too weak. 121 trivial. 0 not checked. [2019-10-06 22:52:02,222 INFO L322 TraceCheckSpWp]: Computing backward predicates... [2019-10-06 22:52:05,737 INFO L134 CoverageAnalysis]: Checked inductivity of 1717 backedges. 0 proven. 1596 refuted. 0 times theorem prover too weak. 121 trivial. 0 not checked. [2019-10-06 22:52:05,737 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSifa [2019-10-06 22:52:05,739 INFO L162 IcfgInterpreter]: Started Sifa with 19 locations of interest [2019-10-06 22:52:05,739 INFO L169 IcfgInterpreter]: Building call graph [2019-10-06 22:52:05,739 INFO L174 IcfgInterpreter]: Initial procedures are [ULTIMATE.start] [2019-10-06 22:52:05,739 INFO L179 IcfgInterpreter]: Starting interpretation [2019-10-06 22:52:05,740 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.start with input of size 1 for LOIs [2019-10-06 22:52:05,759 INFO L199 IcfgInterpreter]: Interpreting procedure main with input of size 21 for LOIs [2019-10-06 22:52:06,966 INFO L199 IcfgInterpreter]: Interpreting procedure mapsum with input of size 1 for LOIs [2019-10-06 22:52:06,997 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.init with input of size 10 for LOIs [2019-10-06 22:52:06,998 INFO L183 IcfgInterpreter]: Interpretation finished [2019-10-06 22:52:06,999 INFO L191 IcfgInterpreter]: Final predicates for locations of interest are: [2019-10-06 22:52:06,999 INFO L193 IcfgInterpreter]: Reachable states at location mapsumENTRY satisfy 601#true [2019-10-06 22:52:06,999 INFO L193 IcfgInterpreter]: Reachable states at location L26-4 satisfy 73#(and (not (< main_~i~1 10000)) (<= 10000 main_~i~1)) [2019-10-06 22:52:06,999 INFO L193 IcfgInterpreter]: Reachable states at location L33 satisfy 592#(exists ((v_mapsum_~ret~0_BEFORE_RETURN_158 Int) (v_mapsum_~ret~0_BEFORE_RETURN_157 Int) (v_prenex_1166 Int) (v_prenex_1165 Int)) (or (and (not (< main_~i~1 10000)) (<= main_~ret~1 2147483647) (= main_~ret~1 (+ (mod v_prenex_1166 4294967296) (- 4294967296))) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (not (<= (mod v_prenex_1166 4294967296) 2147483647)) (<= 0 (+ main_~ret~1 2147483648))) (and (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_158 4294967296) 2147483647) (not (< main_~i~1 10000)) (= (mod v_mapsum_~ret~0_BEFORE_RETURN_158 4294967296) main_~ret~1) (<= main_~ret~1 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (<= 0 (+ main_~ret~1 2147483648))) (and (not (< main_~i~1 10000)) (= (+ (mod v_prenex_1165 4294967296) (- 4294967296)) main_~ret~1) (<= main_~ret~1 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (not (<= (mod v_prenex_1165 4294967296) 2147483647)) (<= 0 (+ main_~ret~1 2147483648))) (and (not (< main_~i~1 10000)) (<= main_~ret~1 2147483647) (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_157 4294967296) 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (= main_~ret~1 (mod v_mapsum_~ret~0_BEFORE_RETURN_157 4294967296)) (<= 0 (+ main_~ret~1 2147483648))))) [2019-10-06 22:52:06,999 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initENTRY satisfy 648#(and (= |old(#NULL.base)| |#NULL.base|) (= |#valid| |old(#valid)|) (= |#NULL.offset| |old(#NULL.offset)|)) [2019-10-06 22:52:06,999 INFO L193 IcfgInterpreter]: Reachable states at location L26-3 satisfy 68#true [2019-10-06 22:52:07,000 INFO L193 IcfgInterpreter]: Reachable states at location mainErr0ASSERT_VIOLATIONERROR_FUNCTION satisfy 234#(or (and (not (= main_~ret~1 main_~ret2~0)) (exists ((v_mapsum_~ret~0_BEFORE_RETURN_162 Int) (v_mapsum_~ret~0_BEFORE_RETURN_161 Int) (v_prenex_1194 Int) (v_prenex_1193 Int)) (or (and (not (< main_~i~2 9999)) (<= (mod v_prenex_1193 4294967296) 2147483647) (= (mod v_prenex_1193 4294967296) main_~ret5~0) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 39996))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648))) (and (not (< main_~i~2 9999)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 39996))) (<= main_~ret5~0 2147483647) (not (<= (mod v_prenex_1194 4294967296) 2147483647)) (<= 0 (+ main_~ret5~0 2147483648)) (= (+ (mod v_prenex_1194 4294967296) (- 4294967296)) main_~ret5~0)) (and (not (< main_~i~2 9999)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 39996))) (<= main_~ret5~0 2147483647) (= (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_161 4294967296) (- 4294967296)) main_~ret5~0) (<= 0 (+ main_~ret5~0 2147483648)) (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_161 4294967296) 2147483647))) (and (not (< main_~i~2 9999)) (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_162 4294967296) 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 39996))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= main_~ret5~0 (mod v_mapsum_~ret~0_BEFORE_RETURN_162 4294967296)))))) (and (exists ((v_mapsum_~ret~0_BEFORE_RETURN_162 Int) (v_mapsum_~ret~0_BEFORE_RETURN_161 Int) (v_prenex_1194 Int) (v_prenex_1193 Int)) (or (and (not (< main_~i~2 9999)) (<= (mod v_prenex_1193 4294967296) 2147483647) (= (mod v_prenex_1193 4294967296) main_~ret5~0) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 39996))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648))) (and (not (< main_~i~2 9999)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 39996))) (<= main_~ret5~0 2147483647) (not (<= (mod v_prenex_1194 4294967296) 2147483647)) (<= 0 (+ main_~ret5~0 2147483648)) (= (+ (mod v_prenex_1194 4294967296) (- 4294967296)) main_~ret5~0)) (and (not (< main_~i~2 9999)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 39996))) (<= main_~ret5~0 2147483647) (= (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_161 4294967296) (- 4294967296)) main_~ret5~0) (<= 0 (+ main_~ret5~0 2147483648)) (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_161 4294967296) 2147483647))) (and (not (< main_~i~2 9999)) (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_162 4294967296) 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 39996))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= main_~ret5~0 (mod v_mapsum_~ret~0_BEFORE_RETURN_162 4294967296))))) (not (= main_~ret~1 main_~ret5~0)))) [2019-10-06 22:52:07,000 INFO L193 IcfgInterpreter]: Reachable states at location L12-3 satisfy 639#(<= 0 mapsum_~i~0) [2019-10-06 22:52:07,000 INFO L193 IcfgInterpreter]: Reachable states at location L-1 satisfy 23#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= 0 (select |#valid| 0)) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-06 22:52:07,000 INFO L193 IcfgInterpreter]: Reachable states at location mainENTRY satisfy 33#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= |#valid| |old(#valid)|) (<= 0 |#NULL.base|) (= |#memory_int| |old(#memory_int)|) (= |#NULL.offset| 0) (= |old(#length)| |#length|) (= 0 (select |old(#valid)| 0)) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-06 22:52:07,000 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initEXIT satisfy 653#(and (= |#valid| (store |old(#valid)| 0 0)) (= 0 |#NULL.base|) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-06 22:52:07,001 INFO L193 IcfgInterpreter]: Reachable states at location L39-1 satisfy 479#true [2019-10-06 22:52:07,001 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.startENTRY satisfy 6#true [2019-10-06 22:52:07,001 INFO L193 IcfgInterpreter]: Reachable states at location L39 satisfy 522#(and (not (< main_~i~2 9999)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 39996))) (<= 9999 main_~i~2)) [2019-10-06 22:52:07,001 INFO L193 IcfgInterpreter]: Reachable states at location L30 satisfy 120#(or (exists ((v_mapsum_~ret~0_BEFORE_RETURN_157 Int) (v_prenex_1165 Int)) (or (and (not (< main_~i~1 10000)) (not (<= (mod v_prenex_1165 4294967296) 2147483647)) (= (+ (mod v_prenex_1165 4294967296) (- 4294967296)) |main_#t~ret4|)) (and (not (< main_~i~1 10000)) (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_157 4294967296) 2147483647) (= (mod v_mapsum_~ret~0_BEFORE_RETURN_157 4294967296) |main_#t~ret4|)))) (exists ((v_mapsum_~ret~0_BEFORE_RETURN_158 Int) (v_prenex_1166 Int)) (or (and (not (< main_~i~1 10000)) (= (+ (mod v_prenex_1166 4294967296) (- 4294967296)) |main_#t~ret4|) (not (<= (mod v_prenex_1166 4294967296) 2147483647))) (and (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_158 4294967296) 2147483647) (not (< main_~i~1 10000)) (= (mod v_mapsum_~ret~0_BEFORE_RETURN_158 4294967296) |main_#t~ret4|))))) [2019-10-06 22:52:07,001 INFO L193 IcfgInterpreter]: Reachable states at location L41 satisfy 424#true [2019-10-06 22:52:07,001 INFO L193 IcfgInterpreter]: Reachable states at location L42 satisfy 313#true [2019-10-06 22:52:07,001 INFO L193 IcfgInterpreter]: Reachable states at location mapsumEXIT satisfy 644#(and (= (ite (<= (mod mapsum_~ret~0 4294967296) 2147483647) (mod mapsum_~ret~0 4294967296) (+ (mod mapsum_~ret~0 4294967296) (- 4294967296))) |mapsum_#res|) (<= 0 mapsum_~i~0) (not (< mapsum_~i~0 10000)) (<= 10000 mapsum_~i~0)) [2019-10-06 22:52:07,002 INFO L193 IcfgInterpreter]: Reachable states at location L33-1 satisfy 587#true [2019-10-06 22:52:07,002 INFO L193 IcfgInterpreter]: Reachable states at location L35-3 satisfy 560#true [2019-10-06 22:52:07,631 INFO L211 tionRefinementEngine]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2019-10-06 22:52:07,631 INFO L224 tionRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [59, 59, 59, 11] total 127 [2019-10-06 22:52:07,633 INFO L442 AbstractCegarLoop]: Interpolant automaton has 128 states [2019-10-06 22:52:07,634 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 128 interpolants. [2019-10-06 22:52:07,638 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6815, Invalid=9441, Unknown=0, NotChecked=0, Total=16256 [2019-10-06 22:52:07,638 INFO L87 Difference]: Start difference. First operand 83 states and 87 transitions. Second operand 128 states. [2019-10-06 22:52:17,509 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-06 22:52:17,509 INFO L93 Difference]: Finished difference Result 162 states and 227 transitions. [2019-10-06 22:52:17,509 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 127 states. [2019-10-06 22:52:17,509 INFO L78 Accepts]: Start accepts. Automaton has 128 states. Word has length 96 [2019-10-06 22:52:17,510 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-06 22:52:17,511 INFO L225 Difference]: With dead ends: 162 [2019-10-06 22:52:17,511 INFO L226 Difference]: Without dead ends: 141 [2019-10-06 22:52:17,515 INFO L606 BasicCegarLoop]: 0 DeclaredPredicates, 471 GetRequests, 223 SyntacticMatches, 0 SemanticMatches, 248 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 12078 ImplicationChecksByTransitivity, 14.5s TimeCoverageRelationStatistics Valid=20208, Invalid=42042, Unknown=0, NotChecked=0, Total=62250 [2019-10-06 22:52:17,515 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 141 states. [2019-10-06 22:52:17,529 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 141 to 141. [2019-10-06 22:52:17,529 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 141 states. [2019-10-06 22:52:17,531 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 141 states to 141 states and 145 transitions. [2019-10-06 22:52:17,531 INFO L78 Accepts]: Start accepts. Automaton has 141 states and 145 transitions. Word has length 96 [2019-10-06 22:52:17,531 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-06 22:52:17,532 INFO L462 AbstractCegarLoop]: Abstraction has 141 states and 145 transitions. [2019-10-06 22:52:17,532 INFO L463 AbstractCegarLoop]: Interpolant automaton has 128 states. [2019-10-06 22:52:17,532 INFO L276 IsEmpty]: Start isEmpty. Operand 141 states and 145 transitions. [2019-10-06 22:52:17,534 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 155 [2019-10-06 22:52:17,534 INFO L377 BasicCegarLoop]: Found error trace [2019-10-06 22:52:17,534 INFO L385 BasicCegarLoop]: trace histogram [114, 12, 4, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-06 22:52:17,738 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 9 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-06 22:52:17,739 INFO L410 AbstractCegarLoop]: === Iteration 11 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-06 22:52:17,739 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-06 22:52:17,739 INFO L82 PathProgramCache]: Analyzing trace with hash -1049526435, now seen corresponding path program 8 times [2019-10-06 22:52:17,739 INFO L150 tionRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-10-06 22:52:17,740 INFO L231 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2019-10-06 22:52:17,740 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-06 22:52:17,740 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-06 22:52:17,740 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-06 22:52:17,875 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-06 22:52:22,635 INFO L134 CoverageAnalysis]: Checked inductivity of 6676 backedges. 0 proven. 6555 refuted. 0 times theorem prover too weak. 121 trivial. 0 not checked. [2019-10-06 22:52:22,635 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2019-10-06 22:52:22,635 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2019-10-06 22:52:22,635 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-06 22:52:22,914 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 3 check-sat command(s) [2019-10-06 22:52:22,915 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-10-06 22:52:22,916 INFO L256 TraceCheckSpWp]: Trace formula consists of 153 conjuncts, 6 conjunts are in the unsatisfiable core [2019-10-06 22:52:22,919 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2019-10-06 22:52:23,180 INFO L134 CoverageAnalysis]: Checked inductivity of 6676 backedges. 52 proven. 10 refuted. 0 times theorem prover too weak. 6614 trivial. 0 not checked. [2019-10-06 22:52:23,180 INFO L322 TraceCheckSpWp]: Computing backward predicates... [2019-10-06 22:52:23,460 INFO L134 CoverageAnalysis]: Checked inductivity of 6676 backedges. 52 proven. 10 refuted. 0 times theorem prover too weak. 6614 trivial. 0 not checked. [2019-10-06 22:52:23,460 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSifa [2019-10-06 22:52:23,461 INFO L162 IcfgInterpreter]: Started Sifa with 19 locations of interest [2019-10-06 22:52:23,462 INFO L169 IcfgInterpreter]: Building call graph [2019-10-06 22:52:23,462 INFO L174 IcfgInterpreter]: Initial procedures are [ULTIMATE.start] [2019-10-06 22:52:23,462 INFO L179 IcfgInterpreter]: Starting interpretation [2019-10-06 22:52:23,463 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.start with input of size 1 for LOIs [2019-10-06 22:52:23,475 INFO L199 IcfgInterpreter]: Interpreting procedure main with input of size 21 for LOIs [2019-10-06 22:52:24,624 INFO L199 IcfgInterpreter]: Interpreting procedure mapsum with input of size 1 for LOIs [2019-10-06 22:52:24,654 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.init with input of size 10 for LOIs [2019-10-06 22:52:24,656 INFO L183 IcfgInterpreter]: Interpretation finished [2019-10-06 22:52:24,657 INFO L191 IcfgInterpreter]: Final predicates for locations of interest are: [2019-10-06 22:52:24,657 INFO L193 IcfgInterpreter]: Reachable states at location mapsumENTRY satisfy 601#true [2019-10-06 22:52:24,657 INFO L193 IcfgInterpreter]: Reachable states at location L26-4 satisfy 73#(and (not (< main_~i~1 10000)) (<= 10000 main_~i~1)) [2019-10-06 22:52:24,657 INFO L193 IcfgInterpreter]: Reachable states at location L33 satisfy 592#(exists ((v_prenex_1359 Int) (v_mapsum_~ret~0_BEFORE_RETURN_184 Int) (v_mapsum_~ret~0_BEFORE_RETURN_183 Int) (v_prenex_1360 Int)) (or (and (not (<= (mod v_prenex_1359 4294967296) 2147483647)) (not (< main_~i~1 10000)) (<= main_~ret~1 2147483647) (= main_~ret~1 (+ (mod v_prenex_1359 4294967296) (- 4294967296))) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (<= 0 (+ main_~ret~1 2147483648))) (and (not (< main_~i~1 10000)) (<= main_~ret~1 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_184 4294967296) 2147483647) (= (mod v_mapsum_~ret~0_BEFORE_RETURN_184 4294967296) main_~ret~1) (<= 0 (+ main_~ret~1 2147483648))) (and (= main_~ret~1 (mod v_mapsum_~ret~0_BEFORE_RETURN_183 4294967296)) (not (< main_~i~1 10000)) (<= main_~ret~1 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_183 4294967296) 2147483647) (<= 0 (+ main_~ret~1 2147483648))) (and (not (< main_~i~1 10000)) (<= main_~ret~1 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (= (+ (mod v_prenex_1360 4294967296) (- 4294967296)) main_~ret~1) (not (<= (mod v_prenex_1360 4294967296) 2147483647)) (<= 0 (+ main_~ret~1 2147483648))))) [2019-10-06 22:52:24,658 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initENTRY satisfy 648#(and (= |old(#NULL.base)| |#NULL.base|) (= |#valid| |old(#valid)|) (= |#NULL.offset| |old(#NULL.offset)|)) [2019-10-06 22:52:24,658 INFO L193 IcfgInterpreter]: Reachable states at location L26-3 satisfy 68#true [2019-10-06 22:52:24,658 INFO L193 IcfgInterpreter]: Reachable states at location mainErr0ASSERT_VIOLATIONERROR_FUNCTION satisfy 234#(or (and (not (= main_~ret~1 main_~ret2~0)) (exists ((v_prenex_1388 Int) (v_prenex_1387 Int) (v_mapsum_~ret~0_BEFORE_RETURN_188 Int) (v_mapsum_~ret~0_BEFORE_RETURN_187 Int)) (or (and (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_188 4294967296) 2147483647)) (not (< main_~i~2 9999)) (= main_~ret5~0 (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_188 4294967296) (- 4294967296))) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 39996))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648))) (and (not (<= (mod v_prenex_1387 4294967296) 2147483647)) (= main_~ret5~0 (+ (mod v_prenex_1387 4294967296) (- 4294967296))) (not (< main_~i~2 9999)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 39996))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648))) (and (not (< main_~i~2 9999)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 39996))) (<= main_~ret5~0 2147483647) (= (mod v_prenex_1388 4294967296) main_~ret5~0) (<= 0 (+ main_~ret5~0 2147483648)) (<= (mod v_prenex_1388 4294967296) 2147483647)) (and (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_187 4294967296) 2147483647) (not (< main_~i~2 9999)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 39996))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (mod v_mapsum_~ret~0_BEFORE_RETURN_187 4294967296) main_~ret5~0))))) (and (exists ((v_prenex_1388 Int) (v_prenex_1387 Int) (v_mapsum_~ret~0_BEFORE_RETURN_188 Int) (v_mapsum_~ret~0_BEFORE_RETURN_187 Int)) (or (and (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_188 4294967296) 2147483647)) (not (< main_~i~2 9999)) (= main_~ret5~0 (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_188 4294967296) (- 4294967296))) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 39996))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648))) (and (not (<= (mod v_prenex_1387 4294967296) 2147483647)) (= main_~ret5~0 (+ (mod v_prenex_1387 4294967296) (- 4294967296))) (not (< main_~i~2 9999)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 39996))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648))) (and (not (< main_~i~2 9999)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 39996))) (<= main_~ret5~0 2147483647) (= (mod v_prenex_1388 4294967296) main_~ret5~0) (<= 0 (+ main_~ret5~0 2147483648)) (<= (mod v_prenex_1388 4294967296) 2147483647)) (and (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_187 4294967296) 2147483647) (not (< main_~i~2 9999)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 39996))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (mod v_mapsum_~ret~0_BEFORE_RETURN_187 4294967296) main_~ret5~0)))) (not (= main_~ret~1 main_~ret5~0)))) [2019-10-06 22:52:24,658 INFO L193 IcfgInterpreter]: Reachable states at location L12-3 satisfy 639#(<= 0 mapsum_~i~0) [2019-10-06 22:52:24,659 INFO L193 IcfgInterpreter]: Reachable states at location L-1 satisfy 23#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= 0 (select |#valid| 0)) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-06 22:52:24,659 INFO L193 IcfgInterpreter]: Reachable states at location mainENTRY satisfy 33#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= |#valid| |old(#valid)|) (<= 0 |#NULL.base|) (= |#memory_int| |old(#memory_int)|) (= |#NULL.offset| 0) (= |old(#length)| |#length|) (= 0 (select |old(#valid)| 0)) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-06 22:52:24,659 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initEXIT satisfy 653#(and (= |#valid| (store |old(#valid)| 0 0)) (= 0 |#NULL.base|) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-06 22:52:24,659 INFO L193 IcfgInterpreter]: Reachable states at location L39-1 satisfy 479#true [2019-10-06 22:52:24,660 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.startENTRY satisfy 6#true [2019-10-06 22:52:24,660 INFO L193 IcfgInterpreter]: Reachable states at location L39 satisfy 522#(and (not (< main_~i~2 9999)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 39996))) (<= 9999 main_~i~2)) [2019-10-06 22:52:24,660 INFO L193 IcfgInterpreter]: Reachable states at location L30 satisfy 120#(or (exists ((v_prenex_1359 Int) (v_mapsum_~ret~0_BEFORE_RETURN_183 Int)) (or (and (not (<= (mod v_prenex_1359 4294967296) 2147483647)) (not (< main_~i~1 10000)) (= (+ (mod v_prenex_1359 4294967296) (- 4294967296)) |main_#t~ret4|)) (and (not (< main_~i~1 10000)) (= |main_#t~ret4| (mod v_mapsum_~ret~0_BEFORE_RETURN_183 4294967296)) (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_183 4294967296) 2147483647)))) (exists ((v_mapsum_~ret~0_BEFORE_RETURN_184 Int) (v_prenex_1360 Int)) (or (and (not (< main_~i~1 10000)) (= (+ (mod v_prenex_1360 4294967296) (- 4294967296)) |main_#t~ret4|) (not (<= (mod v_prenex_1360 4294967296) 2147483647))) (and (not (< main_~i~1 10000)) (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_184 4294967296) 2147483647) (= (mod v_mapsum_~ret~0_BEFORE_RETURN_184 4294967296) |main_#t~ret4|))))) [2019-10-06 22:52:24,660 INFO L193 IcfgInterpreter]: Reachable states at location L41 satisfy 424#true [2019-10-06 22:52:24,660 INFO L193 IcfgInterpreter]: Reachable states at location L42 satisfy 313#true [2019-10-06 22:52:24,661 INFO L193 IcfgInterpreter]: Reachable states at location mapsumEXIT satisfy 644#(and (= (ite (<= (mod mapsum_~ret~0 4294967296) 2147483647) (mod mapsum_~ret~0 4294967296) (+ (mod mapsum_~ret~0 4294967296) (- 4294967296))) |mapsum_#res|) (<= 0 mapsum_~i~0) (not (< mapsum_~i~0 10000)) (<= 10000 mapsum_~i~0)) [2019-10-06 22:52:24,661 INFO L193 IcfgInterpreter]: Reachable states at location L33-1 satisfy 587#true [2019-10-06 22:52:24,661 INFO L193 IcfgInterpreter]: Reachable states at location L35-3 satisfy 560#true [2019-10-06 22:52:25,715 INFO L211 tionRefinementEngine]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2019-10-06 22:52:25,716 INFO L224 tionRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [117, 7, 7, 11] total 137 [2019-10-06 22:52:25,717 INFO L442 AbstractCegarLoop]: Interpolant automaton has 138 states [2019-10-06 22:52:25,718 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 138 interpolants. [2019-10-06 22:52:25,719 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6880, Invalid=12026, Unknown=0, NotChecked=0, Total=18906 [2019-10-06 22:52:25,719 INFO L87 Difference]: Start difference. First operand 141 states and 145 transitions. Second operand 138 states. [2019-10-06 22:52:39,197 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-06 22:52:39,198 INFO L93 Difference]: Finished difference Result 169 states and 186 transitions. [2019-10-06 22:52:39,198 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 138 states. [2019-10-06 22:52:39,198 INFO L78 Accepts]: Start accepts. Automaton has 138 states. Word has length 154 [2019-10-06 22:52:39,199 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-06 22:52:39,203 INFO L225 Difference]: With dead ends: 169 [2019-10-06 22:52:39,203 INFO L226 Difference]: Without dead ends: 148 [2019-10-06 22:52:39,206 INFO L606 BasicCegarLoop]: 0 DeclaredPredicates, 711 GetRequests, 442 SyntacticMatches, 0 SemanticMatches, 269 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 12311 ImplicationChecksByTransitivity, 17.6s TimeCoverageRelationStatistics Valid=20694, Invalid=52476, Unknown=0, NotChecked=0, Total=73170 [2019-10-06 22:52:39,206 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 148 states. [2019-10-06 22:52:39,235 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 148 to 148. [2019-10-06 22:52:39,235 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 148 states. [2019-10-06 22:52:39,237 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 148 states to 148 states and 152 transitions. [2019-10-06 22:52:39,237 INFO L78 Accepts]: Start accepts. Automaton has 148 states and 152 transitions. Word has length 154 [2019-10-06 22:52:39,237 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-06 22:52:39,237 INFO L462 AbstractCegarLoop]: Abstraction has 148 states and 152 transitions. [2019-10-06 22:52:39,237 INFO L463 AbstractCegarLoop]: Interpolant automaton has 138 states. [2019-10-06 22:52:39,238 INFO L276 IsEmpty]: Start isEmpty. Operand 148 states and 152 transitions. [2019-10-06 22:52:39,240 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 174 [2019-10-06 22:52:39,240 INFO L377 BasicCegarLoop]: Found error trace [2019-10-06 22:52:39,240 INFO L385 BasicCegarLoop]: trace histogram [115, 30, 4, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-06 22:52:39,441 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 10 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-06 22:52:39,442 INFO L410 AbstractCegarLoop]: === Iteration 12 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-06 22:52:39,442 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-06 22:52:39,442 INFO L82 PathProgramCache]: Analyzing trace with hash 344661184, now seen corresponding path program 9 times [2019-10-06 22:52:39,443 INFO L150 tionRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-10-06 22:52:39,443 INFO L231 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2019-10-06 22:52:39,443 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-06 22:52:39,443 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-06 22:52:39,444 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-06 22:52:39,627 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-06 22:52:44,595 INFO L134 CoverageAnalysis]: Checked inductivity of 7214 backedges. 0 proven. 6670 refuted. 0 times theorem prover too weak. 544 trivial. 0 not checked. [2019-10-06 22:52:44,595 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2019-10-06 22:52:44,595 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2019-10-06 22:52:44,595 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-06 22:52:44,983 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2019-10-06 22:52:44,984 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-10-06 22:52:44,989 INFO L256 TraceCheckSpWp]: Trace formula consists of 973 conjuncts, 117 conjunts are in the unsatisfiable core [2019-10-06 22:52:44,994 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2019-10-06 22:52:45,085 INFO L134 CoverageAnalysis]: Checked inductivity of 7214 backedges. 0 proven. 6670 refuted. 0 times theorem prover too weak. 544 trivial. 0 not checked. [2019-10-06 22:52:45,086 INFO L322 TraceCheckSpWp]: Computing backward predicates... [2019-10-06 22:52:59,451 INFO L134 CoverageAnalysis]: Checked inductivity of 7214 backedges. 0 proven. 6670 refuted. 0 times theorem prover too weak. 544 trivial. 0 not checked. [2019-10-06 22:52:59,451 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSifa [2019-10-06 22:52:59,453 INFO L162 IcfgInterpreter]: Started Sifa with 19 locations of interest [2019-10-06 22:52:59,453 INFO L169 IcfgInterpreter]: Building call graph [2019-10-06 22:52:59,453 INFO L174 IcfgInterpreter]: Initial procedures are [ULTIMATE.start] [2019-10-06 22:52:59,453 INFO L179 IcfgInterpreter]: Starting interpretation [2019-10-06 22:52:59,454 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.start with input of size 1 for LOIs [2019-10-06 22:52:59,469 INFO L199 IcfgInterpreter]: Interpreting procedure main with input of size 21 for LOIs [2019-10-06 22:53:00,545 INFO L199 IcfgInterpreter]: Interpreting procedure mapsum with input of size 1 for LOIs [2019-10-06 22:53:00,579 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.init with input of size 10 for LOIs [2019-10-06 22:53:00,581 INFO L183 IcfgInterpreter]: Interpretation finished [2019-10-06 22:53:00,582 INFO L191 IcfgInterpreter]: Final predicates for locations of interest are: [2019-10-06 22:53:00,582 INFO L193 IcfgInterpreter]: Reachable states at location mapsumENTRY satisfy 601#true [2019-10-06 22:53:00,582 INFO L193 IcfgInterpreter]: Reachable states at location L26-4 satisfy 73#(and (not (< main_~i~1 10000)) (<= 10000 main_~i~1)) [2019-10-06 22:53:00,582 INFO L193 IcfgInterpreter]: Reachable states at location L33 satisfy 592#(or (exists ((v_prenex_1554 Int) (v_prenex_1553 Int) (v_mapsum_~ret~0_BEFORE_RETURN_209 Int) (v_mapsum_~ret~0_BEFORE_RETURN_210 Int)) (or (and (not (< main_~i~1 10000)) (<= main_~ret~1 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_209 4294967296) 2147483647)) (= main_~ret~1 (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_209 4294967296) (- 4294967296))) (<= 0 (+ main_~ret~1 2147483648))) (and (not (< main_~i~1 10000)) (= (mod v_mapsum_~ret~0_BEFORE_RETURN_210 4294967296) main_~ret~1) (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_210 4294967296) 2147483647) (<= main_~ret~1 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (<= 0 (+ main_~ret~1 2147483648))) (and (= (+ (mod v_prenex_1554 4294967296) (- 4294967296)) main_~ret~1) (not (< main_~i~1 10000)) (<= main_~ret~1 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (not (<= (mod v_prenex_1554 4294967296) 2147483647)) (<= 0 (+ main_~ret~1 2147483648))) (and (not (< main_~i~1 10000)) (<= main_~ret~1 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (= main_~ret~1 (mod v_prenex_1553 4294967296)) (<= (mod v_prenex_1553 4294967296) 2147483647) (<= 0 (+ main_~ret~1 2147483648))))) (exists ((v_prenex_1554 Int) (v_prenex_1553 Int) (v_mapsum_~ret~0_BEFORE_RETURN_209 Int) (v_mapsum_~ret~0_BEFORE_RETURN_210 Int)) (or (and (not (< main_~i~1 10000)) (<= main_~ret~1 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_209 4294967296) 2147483647)) (= main_~ret~1 (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_209 4294967296) (- 4294967296))) (<= 0 (+ main_~ret~1 2147483648))) (and (not (< main_~i~1 10000)) (= (mod v_mapsum_~ret~0_BEFORE_RETURN_210 4294967296) main_~ret~1) (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_210 4294967296) 2147483647) (<= main_~ret~1 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (<= 0 (+ main_~ret~1 2147483648))) (and (= (+ (mod v_prenex_1554 4294967296) (- 4294967296)) main_~ret~1) (not (< main_~i~1 10000)) (<= main_~ret~1 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (not (<= (mod v_prenex_1554 4294967296) 2147483647)) (<= 0 (+ main_~ret~1 2147483648))) (and (not (< main_~i~1 10000)) (<= main_~ret~1 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (<= (mod v_prenex_1553 4294967296) 2147483647) (= main_~ret~1 (mod v_prenex_1553 4294967296)) (<= 0 (+ main_~ret~1 2147483648)))))) [2019-10-06 22:53:00,582 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initENTRY satisfy 648#(and (= |old(#NULL.base)| |#NULL.base|) (= |#valid| |old(#valid)|) (= |#NULL.offset| |old(#NULL.offset)|)) [2019-10-06 22:53:00,582 INFO L193 IcfgInterpreter]: Reachable states at location L26-3 satisfy 68#true [2019-10-06 22:53:00,583 INFO L193 IcfgInterpreter]: Reachable states at location mainErr0ASSERT_VIOLATIONERROR_FUNCTION satisfy 234#(or (and (not (= main_~ret~1 main_~ret2~0)) (exists ((v_mapsum_~ret~0_BEFORE_RETURN_214 Int) (v_mapsum_~ret~0_BEFORE_RETURN_213 Int) (v_prenex_1582 Int) (v_prenex_1581 Int)) (or (and (= main_~ret5~0 (+ (mod v_prenex_1582 4294967296) (- 4294967296))) (not (<= (mod v_prenex_1582 4294967296) 2147483647)) (not (< main_~i~2 9999)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 39996))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648))) (and (= main_~ret5~0 (mod v_prenex_1581 4294967296)) (<= (mod v_prenex_1581 4294967296) 2147483647) (not (< main_~i~2 9999)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 39996))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648))) (and (= main_~ret5~0 (mod v_mapsum_~ret~0_BEFORE_RETURN_214 4294967296)) (not (< main_~i~2 9999)) (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_214 4294967296) 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 39996))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648))) (and (= main_~ret5~0 (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_213 4294967296) (- 4294967296))) (not (< main_~i~2 9999)) (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_213 4294967296) 2147483647)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 39996))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)))))) (and (exists ((v_mapsum_~ret~0_BEFORE_RETURN_214 Int) (v_mapsum_~ret~0_BEFORE_RETURN_213 Int) (v_prenex_1582 Int) (v_prenex_1581 Int)) (or (and (= main_~ret5~0 (+ (mod v_prenex_1582 4294967296) (- 4294967296))) (not (<= (mod v_prenex_1582 4294967296) 2147483647)) (not (< main_~i~2 9999)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 39996))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648))) (and (= main_~ret5~0 (mod v_prenex_1581 4294967296)) (<= (mod v_prenex_1581 4294967296) 2147483647) (not (< main_~i~2 9999)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 39996))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648))) (and (= main_~ret5~0 (mod v_mapsum_~ret~0_BEFORE_RETURN_214 4294967296)) (not (< main_~i~2 9999)) (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_214 4294967296) 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 39996))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648))) (and (= main_~ret5~0 (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_213 4294967296) (- 4294967296))) (not (< main_~i~2 9999)) (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_213 4294967296) 2147483647)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 39996))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648))))) (not (= main_~ret~1 main_~ret5~0)))) [2019-10-06 22:53:00,583 INFO L193 IcfgInterpreter]: Reachable states at location L12-3 satisfy 639#(<= 0 mapsum_~i~0) [2019-10-06 22:53:00,583 INFO L193 IcfgInterpreter]: Reachable states at location L-1 satisfy 23#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= 0 (select |#valid| 0)) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-06 22:53:00,583 INFO L193 IcfgInterpreter]: Reachable states at location mainENTRY satisfy 33#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= |#valid| |old(#valid)|) (<= 0 |#NULL.base|) (= |#memory_int| |old(#memory_int)|) (= |#NULL.offset| 0) (= |old(#length)| |#length|) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (= 0 (select |old(#valid)| 0))) [2019-10-06 22:53:00,584 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initEXIT satisfy 653#(and (= |#valid| (store |old(#valid)| 0 0)) (= 0 |#NULL.base|) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-06 22:53:00,584 INFO L193 IcfgInterpreter]: Reachable states at location L39-1 satisfy 479#true [2019-10-06 22:53:00,584 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.startENTRY satisfy 6#true [2019-10-06 22:53:00,584 INFO L193 IcfgInterpreter]: Reachable states at location L39 satisfy 522#(and (not (< main_~i~2 9999)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 39996))) (<= 9999 main_~i~2)) [2019-10-06 22:53:00,584 INFO L193 IcfgInterpreter]: Reachable states at location L30 satisfy 120#(or (exists ((v_prenex_1554 Int) (v_mapsum_~ret~0_BEFORE_RETURN_210 Int)) (or (and (not (< main_~i~1 10000)) (not (<= (mod v_prenex_1554 4294967296) 2147483647)) (= (+ (mod v_prenex_1554 4294967296) (- 4294967296)) |main_#t~ret4|)) (and (not (< main_~i~1 10000)) (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_210 4294967296) 2147483647) (= (mod v_mapsum_~ret~0_BEFORE_RETURN_210 4294967296) |main_#t~ret4|)))) (exists ((v_prenex_1553 Int) (v_mapsum_~ret~0_BEFORE_RETURN_209 Int)) (or (and (not (< main_~i~1 10000)) (= |main_#t~ret4| (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_209 4294967296) (- 4294967296))) (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_209 4294967296) 2147483647))) (and (not (< main_~i~1 10000)) (= (mod v_prenex_1553 4294967296) |main_#t~ret4|) (<= (mod v_prenex_1553 4294967296) 2147483647))))) [2019-10-06 22:53:00,585 INFO L193 IcfgInterpreter]: Reachable states at location L41 satisfy 424#true [2019-10-06 22:53:00,585 INFO L193 IcfgInterpreter]: Reachable states at location L42 satisfy 313#true [2019-10-06 22:53:00,585 INFO L193 IcfgInterpreter]: Reachable states at location mapsumEXIT satisfy 644#(and (= (ite (<= (mod mapsum_~ret~0 4294967296) 2147483647) (mod mapsum_~ret~0 4294967296) (+ (mod mapsum_~ret~0 4294967296) (- 4294967296))) |mapsum_#res|) (<= 0 mapsum_~i~0) (not (< mapsum_~i~0 10000)) (<= 10000 mapsum_~i~0)) [2019-10-06 22:53:00,585 INFO L193 IcfgInterpreter]: Reachable states at location L33-1 satisfy 587#true [2019-10-06 22:53:00,585 INFO L193 IcfgInterpreter]: Reachable states at location L35-3 satisfy 560#true [2019-10-06 22:53:01,762 INFO L211 tionRefinementEngine]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2019-10-06 22:53:01,762 INFO L224 tionRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [118, 118, 118, 11] total 245 [2019-10-06 22:53:01,764 INFO L442 AbstractCegarLoop]: Interpolant automaton has 246 states [2019-10-06 22:53:01,770 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 246 interpolants. [2019-10-06 22:53:01,773 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=27524, Invalid=32746, Unknown=0, NotChecked=0, Total=60270 [2019-10-06 22:53:01,773 INFO L87 Difference]: Start difference. First operand 148 states and 152 transitions. Second operand 246 states. [2019-10-06 22:53:35,929 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-06 22:53:35,929 INFO L93 Difference]: Finished difference Result 292 states and 416 transitions. [2019-10-06 22:53:35,929 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 245 states. [2019-10-06 22:53:35,929 INFO L78 Accepts]: Start accepts. Automaton has 246 states. Word has length 173 [2019-10-06 22:53:35,930 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-06 22:53:35,932 INFO L225 Difference]: With dead ends: 292 [2019-10-06 22:53:35,932 INFO L226 Difference]: Without dead ends: 265 [2019-10-06 22:53:35,940 INFO L606 BasicCegarLoop]: 0 DeclaredPredicates, 879 GetRequests, 395 SyntacticMatches, 0 SemanticMatches, 484 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 41637 ImplicationChecksByTransitivity, 52.5s TimeCoverageRelationStatistics Valid=82099, Invalid=153611, Unknown=0, NotChecked=0, Total=235710 [2019-10-06 22:53:35,940 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 265 states. [2019-10-06 22:53:35,963 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 265 to 265. [2019-10-06 22:53:35,963 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 265 states. [2019-10-06 22:53:35,964 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 265 states to 265 states and 269 transitions. [2019-10-06 22:53:35,964 INFO L78 Accepts]: Start accepts. Automaton has 265 states and 269 transitions. Word has length 173 [2019-10-06 22:53:35,965 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-06 22:53:35,965 INFO L462 AbstractCegarLoop]: Abstraction has 265 states and 269 transitions. [2019-10-06 22:53:35,965 INFO L463 AbstractCegarLoop]: Interpolant automaton has 246 states. [2019-10-06 22:53:35,965 INFO L276 IsEmpty]: Start isEmpty. Operand 265 states and 269 transitions. [2019-10-06 22:53:35,968 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 291 [2019-10-06 22:53:35,968 INFO L377 BasicCegarLoop]: Found error trace [2019-10-06 22:53:35,968 INFO L385 BasicCegarLoop]: trace histogram [232, 30, 4, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-06 22:53:36,178 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 11 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-06 22:53:36,178 INFO L410 AbstractCegarLoop]: === Iteration 13 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-06 22:53:36,178 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-06 22:53:36,179 INFO L82 PathProgramCache]: Analyzing trace with hash -165692995, now seen corresponding path program 10 times [2019-10-06 22:53:36,179 INFO L150 tionRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-10-06 22:53:36,179 INFO L231 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2019-10-06 22:53:36,180 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-06 22:53:36,180 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-06 22:53:36,180 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-06 22:53:36,664 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-06 22:53:55,700 INFO L134 CoverageAnalysis]: Checked inductivity of 27572 backedges. 0 proven. 27028 refuted. 0 times theorem prover too weak. 544 trivial. 0 not checked. [2019-10-06 22:53:55,700 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2019-10-06 22:53:55,700 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2019-10-06 22:53:55,701 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-06 22:53:56,267 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-06 22:53:56,275 INFO L256 TraceCheckSpWp]: Trace formula consists of 1675 conjuncts, 234 conjunts are in the unsatisfiable core [2019-10-06 22:53:56,281 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2019-10-06 22:53:56,403 INFO L134 CoverageAnalysis]: Checked inductivity of 27572 backedges. 0 proven. 27028 refuted. 0 times theorem prover too weak. 544 trivial. 0 not checked. [2019-10-06 22:53:56,404 INFO L322 TraceCheckSpWp]: Computing backward predicates... [2019-10-06 22:54:54,841 INFO L134 CoverageAnalysis]: Checked inductivity of 27572 backedges. 0 proven. 27028 refuted. 0 times theorem prover too weak. 544 trivial. 0 not checked. [2019-10-06 22:54:54,841 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSifa [2019-10-06 22:54:54,843 INFO L162 IcfgInterpreter]: Started Sifa with 19 locations of interest [2019-10-06 22:54:54,843 INFO L169 IcfgInterpreter]: Building call graph [2019-10-06 22:54:54,843 INFO L174 IcfgInterpreter]: Initial procedures are [ULTIMATE.start] [2019-10-06 22:54:54,843 INFO L179 IcfgInterpreter]: Starting interpretation [2019-10-06 22:54:54,844 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.start with input of size 1 for LOIs [2019-10-06 22:54:54,875 INFO L199 IcfgInterpreter]: Interpreting procedure main with input of size 21 for LOIs [2019-10-06 22:54:55,984 INFO L199 IcfgInterpreter]: Interpreting procedure mapsum with input of size 1 for LOIs [2019-10-06 22:54:56,005 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.init with input of size 10 for LOIs [2019-10-06 22:54:56,008 INFO L183 IcfgInterpreter]: Interpretation finished [2019-10-06 22:54:56,009 INFO L191 IcfgInterpreter]: Final predicates for locations of interest are: [2019-10-06 22:54:56,009 INFO L193 IcfgInterpreter]: Reachable states at location mapsumENTRY satisfy 601#true [2019-10-06 22:54:56,009 INFO L193 IcfgInterpreter]: Reachable states at location L26-4 satisfy 73#(and (not (< main_~i~1 10000)) (<= 10000 main_~i~1)) [2019-10-06 22:54:56,009 INFO L193 IcfgInterpreter]: Reachable states at location L33 satisfy 592#(exists ((v_mapsum_~ret~0_BEFORE_RETURN_236 Int) (v_mapsum_~ret~0_BEFORE_RETURN_235 Int) (v_prenex_1748 Int) (v_prenex_1747 Int)) (or (and (not (< main_~i~1 10000)) (<= main_~ret~1 2147483647) (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_235 4294967296) 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (= main_~ret~1 (mod v_mapsum_~ret~0_BEFORE_RETURN_235 4294967296)) (<= 0 (+ main_~ret~1 2147483648))) (and (not (< main_~i~1 10000)) (<= main_~ret~1 2147483647) (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_236 4294967296) 2147483647)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (= main_~ret~1 (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_236 4294967296) (- 4294967296))) (<= 0 (+ main_~ret~1 2147483648))) (and (not (< main_~i~1 10000)) (not (<= (mod v_prenex_1747 4294967296) 2147483647)) (= main_~ret~1 (+ (mod v_prenex_1747 4294967296) (- 4294967296))) (<= main_~ret~1 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (<= 0 (+ main_~ret~1 2147483648))) (and (not (< main_~i~1 10000)) (= (mod v_prenex_1748 4294967296) main_~ret~1) (<= main_~ret~1 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (<= (mod v_prenex_1748 4294967296) 2147483647) (<= 0 (+ main_~ret~1 2147483648))))) [2019-10-06 22:54:56,010 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initENTRY satisfy 648#(and (= |old(#NULL.base)| |#NULL.base|) (= |#valid| |old(#valid)|) (= |#NULL.offset| |old(#NULL.offset)|)) [2019-10-06 22:54:56,010 INFO L193 IcfgInterpreter]: Reachable states at location L26-3 satisfy 68#true [2019-10-06 22:54:56,010 INFO L193 IcfgInterpreter]: Reachable states at location mainErr0ASSERT_VIOLATIONERROR_FUNCTION satisfy 234#(or (and (not (= main_~ret~1 main_~ret2~0)) (exists ((v_prenex_1776 Int) (v_prenex_1775 Int) (v_mapsum_~ret~0_BEFORE_RETURN_239 Int) (v_mapsum_~ret~0_BEFORE_RETURN_240 Int)) (or (and (not (< main_~i~2 9999)) (= main_~ret5~0 (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_240 4294967296) (- 4294967296))) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 39996))) (<= main_~ret5~0 2147483647) (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_240 4294967296) 2147483647)) (<= 0 (+ main_~ret5~0 2147483648))) (and (<= (mod v_prenex_1775 4294967296) 2147483647) (not (< main_~i~2 9999)) (= main_~ret5~0 (mod v_prenex_1775 4294967296)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 39996))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648))) (and (not (< main_~i~2 9999)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 39996))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_239 4294967296) (- 4294967296)) main_~ret5~0) (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_239 4294967296) 2147483647))) (and (not (< main_~i~2 9999)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 39996))) (<= main_~ret5~0 2147483647) (= main_~ret5~0 (mod v_prenex_1776 4294967296)) (<= 0 (+ main_~ret5~0 2147483648)) (<= (mod v_prenex_1776 4294967296) 2147483647))))) (and (exists ((v_prenex_1776 Int) (v_prenex_1775 Int) (v_mapsum_~ret~0_BEFORE_RETURN_239 Int) (v_mapsum_~ret~0_BEFORE_RETURN_240 Int)) (or (and (not (< main_~i~2 9999)) (= main_~ret5~0 (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_240 4294967296) (- 4294967296))) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 39996))) (<= main_~ret5~0 2147483647) (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_240 4294967296) 2147483647)) (<= 0 (+ main_~ret5~0 2147483648))) (and (<= (mod v_prenex_1775 4294967296) 2147483647) (not (< main_~i~2 9999)) (= main_~ret5~0 (mod v_prenex_1775 4294967296)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 39996))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648))) (and (not (< main_~i~2 9999)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 39996))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_239 4294967296) (- 4294967296)) main_~ret5~0) (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_239 4294967296) 2147483647))) (and (not (< main_~i~2 9999)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 39996))) (<= main_~ret5~0 2147483647) (= main_~ret5~0 (mod v_prenex_1776 4294967296)) (<= 0 (+ main_~ret5~0 2147483648)) (<= (mod v_prenex_1776 4294967296) 2147483647)))) (not (= main_~ret~1 main_~ret5~0)))) [2019-10-06 22:54:56,010 INFO L193 IcfgInterpreter]: Reachable states at location L12-3 satisfy 639#(<= 0 mapsum_~i~0) [2019-10-06 22:54:56,011 INFO L193 IcfgInterpreter]: Reachable states at location L-1 satisfy 23#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= 0 (select |#valid| 0)) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-06 22:54:56,011 INFO L193 IcfgInterpreter]: Reachable states at location mainENTRY satisfy 33#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= |#valid| |old(#valid)|) (<= 0 |#NULL.base|) (= |#memory_int| |old(#memory_int)|) (= |#NULL.offset| 0) (= |old(#length)| |#length|) (= 0 (select |old(#valid)| 0)) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-06 22:54:56,011 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initEXIT satisfy 653#(and (= |#valid| (store |old(#valid)| 0 0)) (= 0 |#NULL.base|) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-06 22:54:56,011 INFO L193 IcfgInterpreter]: Reachable states at location L39-1 satisfy 479#true [2019-10-06 22:54:56,011 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.startENTRY satisfy 6#true [2019-10-06 22:54:56,011 INFO L193 IcfgInterpreter]: Reachable states at location L39 satisfy 522#(and (not (< main_~i~2 9999)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 39996))) (<= 9999 main_~i~2)) [2019-10-06 22:54:56,012 INFO L193 IcfgInterpreter]: Reachable states at location L30 satisfy 120#(or (exists ((v_mapsum_~ret~0_BEFORE_RETURN_236 Int) (v_prenex_1748 Int)) (or (and (not (< main_~i~1 10000)) (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_236 4294967296) 2147483647)) (= |main_#t~ret4| (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_236 4294967296) (- 4294967296)))) (and (not (< main_~i~1 10000)) (<= (mod v_prenex_1748 4294967296) 2147483647) (= |main_#t~ret4| (mod v_prenex_1748 4294967296))))) (exists ((v_mapsum_~ret~0_BEFORE_RETURN_235 Int) (v_prenex_1747 Int)) (or (and (not (< main_~i~1 10000)) (not (<= (mod v_prenex_1747 4294967296) 2147483647)) (= (+ (mod v_prenex_1747 4294967296) (- 4294967296)) |main_#t~ret4|)) (and (not (< main_~i~1 10000)) (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_235 4294967296) 2147483647) (= |main_#t~ret4| (mod v_mapsum_~ret~0_BEFORE_RETURN_235 4294967296)))))) [2019-10-06 22:54:56,012 INFO L193 IcfgInterpreter]: Reachable states at location L41 satisfy 424#true [2019-10-06 22:54:56,012 INFO L193 IcfgInterpreter]: Reachable states at location L42 satisfy 313#true [2019-10-06 22:54:56,012 INFO L193 IcfgInterpreter]: Reachable states at location mapsumEXIT satisfy 644#(and (= (ite (<= (mod mapsum_~ret~0 4294967296) 2147483647) (mod mapsum_~ret~0 4294967296) (+ (mod mapsum_~ret~0 4294967296) (- 4294967296))) |mapsum_#res|) (<= 0 mapsum_~i~0) (not (< mapsum_~i~0 10000)) (<= 10000 mapsum_~i~0)) [2019-10-06 22:54:56,012 INFO L193 IcfgInterpreter]: Reachable states at location L35-3 satisfy 560#true [2019-10-06 22:54:56,012 INFO L193 IcfgInterpreter]: Reachable states at location L33-1 satisfy 587#true [2019-10-06 22:54:57,887 INFO L211 tionRefinementEngine]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2019-10-06 22:54:57,887 INFO L224 tionRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [235, 235, 235, 11] total 479 [2019-10-06 22:54:57,889 INFO L442 AbstractCegarLoop]: Interpolant automaton has 480 states [2019-10-06 22:54:57,898 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 480 interpolants. [2019-10-06 22:54:57,905 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=109775, Invalid=120145, Unknown=0, NotChecked=0, Total=229920 [2019-10-06 22:54:57,905 INFO L87 Difference]: Start difference. First operand 265 states and 269 transitions. Second operand 480 states. [2019-10-06 22:57:09,049 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-06 22:57:09,049 INFO L93 Difference]: Finished difference Result 526 states and 767 transitions. [2019-10-06 22:57:09,049 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 479 states. [2019-10-06 22:57:09,050 INFO L78 Accepts]: Start accepts. Automaton has 480 states. Word has length 290 [2019-10-06 22:57:09,050 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-06 22:57:09,053 INFO L225 Difference]: With dead ends: 526 [2019-10-06 22:57:09,053 INFO L226 Difference]: Without dead ends: 499 [2019-10-06 22:57:09,082 INFO L606 BasicCegarLoop]: 0 DeclaredPredicates, 1581 GetRequests, 629 SyntacticMatches, 0 SemanticMatches, 952 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 151734 ImplicationChecksByTransitivity, 196.7s TimeCoverageRelationStatistics Valid=328384, Invalid=580778, Unknown=0, NotChecked=0, Total=909162 [2019-10-06 22:57:09,082 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 499 states. [2019-10-06 22:57:09,109 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 499 to 499. [2019-10-06 22:57:09,109 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 499 states. [2019-10-06 22:57:09,111 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 499 states to 499 states and 503 transitions. [2019-10-06 22:57:09,112 INFO L78 Accepts]: Start accepts. Automaton has 499 states and 503 transitions. Word has length 290 [2019-10-06 22:57:09,112 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-06 22:57:09,112 INFO L462 AbstractCegarLoop]: Abstraction has 499 states and 503 transitions. [2019-10-06 22:57:09,112 INFO L463 AbstractCegarLoop]: Interpolant automaton has 480 states. [2019-10-06 22:57:09,112 INFO L276 IsEmpty]: Start isEmpty. Operand 499 states and 503 transitions. [2019-10-06 22:57:09,123 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 525 [2019-10-06 22:57:09,123 INFO L377 BasicCegarLoop]: Found error trace [2019-10-06 22:57:09,124 INFO L385 BasicCegarLoop]: trace histogram [466, 30, 4, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-06 22:57:09,329 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 12 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-06 22:57:09,330 INFO L410 AbstractCegarLoop]: === Iteration 14 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-06 22:57:09,330 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-06 22:57:09,331 INFO L82 PathProgramCache]: Analyzing trace with hash 1709506973, now seen corresponding path program 11 times [2019-10-06 22:57:09,331 INFO L150 tionRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-10-06 22:57:09,331 INFO L231 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2019-10-06 22:57:09,331 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-06 22:57:09,332 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-06 22:57:09,332 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-06 22:57:10,958 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-06 22:58:27,687 INFO L134 CoverageAnalysis]: Checked inductivity of 109355 backedges. 0 proven. 108811 refuted. 0 times theorem prover too weak. 544 trivial. 0 not checked. [2019-10-06 22:58:27,687 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2019-10-06 22:58:27,687 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2019-10-06 22:58:27,688 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-06 22:58:28,244 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 4 check-sat command(s) [2019-10-06 22:58:28,244 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-10-06 22:58:28,246 INFO L256 TraceCheckSpWp]: Trace formula consists of 193 conjuncts, 6 conjunts are in the unsatisfiable core [2019-10-06 22:58:28,254 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2019-10-06 22:58:29,626 INFO L134 CoverageAnalysis]: Checked inductivity of 109355 backedges. 246 proven. 10 refuted. 0 times theorem prover too weak. 109099 trivial. 0 not checked. [2019-10-06 22:58:29,626 INFO L322 TraceCheckSpWp]: Computing backward predicates... [2019-10-06 22:58:30,628 INFO L134 CoverageAnalysis]: Checked inductivity of 109355 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 109345 trivial. 0 not checked. [2019-10-06 22:58:30,628 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSifa [2019-10-06 22:58:30,630 INFO L162 IcfgInterpreter]: Started Sifa with 19 locations of interest [2019-10-06 22:58:30,630 INFO L169 IcfgInterpreter]: Building call graph [2019-10-06 22:58:30,630 INFO L174 IcfgInterpreter]: Initial procedures are [ULTIMATE.start] [2019-10-06 22:58:30,630 INFO L179 IcfgInterpreter]: Starting interpretation [2019-10-06 22:58:30,631 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.start with input of size 1 for LOIs [2019-10-06 22:58:30,648 INFO L199 IcfgInterpreter]: Interpreting procedure main with input of size 21 for LOIs [2019-10-06 22:58:31,846 INFO L199 IcfgInterpreter]: Interpreting procedure mapsum with input of size 1 for LOIs [2019-10-06 22:58:31,868 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.init with input of size 10 for LOIs [2019-10-06 22:58:31,870 INFO L183 IcfgInterpreter]: Interpretation finished [2019-10-06 22:58:31,870 INFO L191 IcfgInterpreter]: Final predicates for locations of interest are: [2019-10-06 22:58:31,870 INFO L193 IcfgInterpreter]: Reachable states at location mapsumENTRY satisfy 601#true [2019-10-06 22:58:31,871 INFO L193 IcfgInterpreter]: Reachable states at location L26-4 satisfy 73#(and (not (< main_~i~1 10000)) (<= 10000 main_~i~1)) [2019-10-06 22:58:31,871 INFO L193 IcfgInterpreter]: Reachable states at location L33 satisfy 592#(exists ((v_prenex_1942 Int) (v_prenex_1941 Int) (v_mapsum_~ret~0_BEFORE_RETURN_261 Int) (v_mapsum_~ret~0_BEFORE_RETURN_262 Int)) (or (and (not (< main_~i~1 10000)) (<= main_~ret~1 2147483647) (= (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_262 4294967296) (- 4294967296)) main_~ret~1) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_262 4294967296) 2147483647)) (<= 0 (+ main_~ret~1 2147483648))) (and (not (< main_~i~1 10000)) (<= main_~ret~1 2147483647) (= (mod v_prenex_1942 4294967296) main_~ret~1) (<= (mod v_prenex_1942 4294967296) 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (<= 0 (+ main_~ret~1 2147483648))) (and (not (< main_~i~1 10000)) (<= main_~ret~1 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (= main_~ret~1 (mod v_prenex_1941 4294967296)) (<= (mod v_prenex_1941 4294967296) 2147483647) (<= 0 (+ main_~ret~1 2147483648))) (and (not (< main_~i~1 10000)) (<= main_~ret~1 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_261 4294967296) 2147483647)) (= main_~ret~1 (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_261 4294967296) (- 4294967296))) (<= 0 (+ main_~ret~1 2147483648))))) [2019-10-06 22:58:31,871 INFO L193 IcfgInterpreter]: Reachable states at location L26-3 satisfy 68#true [2019-10-06 22:58:31,871 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initENTRY satisfy 648#(and (= |old(#NULL.base)| |#NULL.base|) (= |#valid| |old(#valid)|) (= |#NULL.offset| |old(#NULL.offset)|)) [2019-10-06 22:58:31,871 INFO L193 IcfgInterpreter]: Reachable states at location mainErr0ASSERT_VIOLATIONERROR_FUNCTION satisfy 234#(or (and (exists ((v_mapsum_~ret~0_BEFORE_RETURN_266 Int) (v_prenex_1970 Int) (v_mapsum_~ret~0_BEFORE_RETURN_265 Int) (v_prenex_1969 Int)) (or (and (= main_~ret5~0 (mod v_mapsum_~ret~0_BEFORE_RETURN_265 4294967296)) (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_265 4294967296) 2147483647) (not (< main_~i~2 9999)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 39996))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648))) (and (not (< main_~i~2 9999)) (= (mod v_mapsum_~ret~0_BEFORE_RETURN_266 4294967296) main_~ret5~0) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 39996))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_266 4294967296) 2147483647)) (and (not (<= (mod v_prenex_1970 4294967296) 2147483647)) (not (< main_~i~2 9999)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 39996))) (<= main_~ret5~0 2147483647) (= main_~ret5~0 (+ (mod v_prenex_1970 4294967296) (- 4294967296))) (<= 0 (+ main_~ret5~0 2147483648))) (and (not (< main_~i~2 9999)) (= main_~ret5~0 (+ (mod v_prenex_1969 4294967296) (- 4294967296))) (not (<= (mod v_prenex_1969 4294967296) 2147483647)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 39996))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648))))) (not (= main_~ret~1 main_~ret5~0))) (and (not (= main_~ret~1 main_~ret2~0)) (exists ((v_mapsum_~ret~0_BEFORE_RETURN_266 Int) (v_prenex_1970 Int) (v_mapsum_~ret~0_BEFORE_RETURN_265 Int) (v_prenex_1969 Int)) (or (and (= main_~ret5~0 (mod v_mapsum_~ret~0_BEFORE_RETURN_265 4294967296)) (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_265 4294967296) 2147483647) (not (< main_~i~2 9999)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 39996))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648))) (and (not (< main_~i~2 9999)) (= (mod v_mapsum_~ret~0_BEFORE_RETURN_266 4294967296) main_~ret5~0) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 39996))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_266 4294967296) 2147483647)) (and (not (<= (mod v_prenex_1970 4294967296) 2147483647)) (not (< main_~i~2 9999)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 39996))) (<= main_~ret5~0 2147483647) (= main_~ret5~0 (+ (mod v_prenex_1970 4294967296) (- 4294967296))) (<= 0 (+ main_~ret5~0 2147483648))) (and (not (< main_~i~2 9999)) (= main_~ret5~0 (+ (mod v_prenex_1969 4294967296) (- 4294967296))) (not (<= (mod v_prenex_1969 4294967296) 2147483647)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 39996))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648))))))) [2019-10-06 22:58:31,872 INFO L193 IcfgInterpreter]: Reachable states at location L12-3 satisfy 639#(<= 0 mapsum_~i~0) [2019-10-06 22:58:31,872 INFO L193 IcfgInterpreter]: Reachable states at location L-1 satisfy 23#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= 0 (select |#valid| 0)) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-06 22:58:31,872 INFO L193 IcfgInterpreter]: Reachable states at location mainENTRY satisfy 33#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= |#valid| |old(#valid)|) (<= 0 |#NULL.base|) (= |#memory_int| |old(#memory_int)|) (= |#NULL.offset| 0) (= |old(#length)| |#length|) (= 0 (select |old(#valid)| 0)) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-06 22:58:31,872 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initEXIT satisfy 653#(and (= |#valid| (store |old(#valid)| 0 0)) (= 0 |#NULL.base|) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-06 22:58:31,872 INFO L193 IcfgInterpreter]: Reachable states at location L39-1 satisfy 479#true [2019-10-06 22:58:31,872 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.startENTRY satisfy 6#true [2019-10-06 22:58:31,872 INFO L193 IcfgInterpreter]: Reachable states at location L39 satisfy 522#(and (not (< main_~i~2 9999)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 39996))) (<= 9999 main_~i~2)) [2019-10-06 22:58:31,873 INFO L193 IcfgInterpreter]: Reachable states at location L30 satisfy 120#(or (exists ((v_prenex_1941 Int) (v_mapsum_~ret~0_BEFORE_RETURN_261 Int)) (or (and (not (< main_~i~1 10000)) (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_261 4294967296) 2147483647)) (= (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_261 4294967296) (- 4294967296)) |main_#t~ret4|)) (and (not (< main_~i~1 10000)) (= (mod v_prenex_1941 4294967296) |main_#t~ret4|) (<= (mod v_prenex_1941 4294967296) 2147483647)))) (exists ((v_prenex_1942 Int) (v_mapsum_~ret~0_BEFORE_RETURN_262 Int)) (or (and (not (< main_~i~1 10000)) (= (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_262 4294967296) (- 4294967296)) |main_#t~ret4|) (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_262 4294967296) 2147483647))) (and (not (< main_~i~1 10000)) (<= (mod v_prenex_1942 4294967296) 2147483647) (= |main_#t~ret4| (mod v_prenex_1942 4294967296)))))) [2019-10-06 22:58:31,873 INFO L193 IcfgInterpreter]: Reachable states at location L41 satisfy 424#true [2019-10-06 22:58:31,873 INFO L193 IcfgInterpreter]: Reachable states at location L42 satisfy 313#true [2019-10-06 22:58:31,873 INFO L193 IcfgInterpreter]: Reachable states at location mapsumEXIT satisfy 644#(and (= (ite (<= (mod mapsum_~ret~0 4294967296) 2147483647) (mod mapsum_~ret~0 4294967296) (+ (mod mapsum_~ret~0 4294967296) (- 4294967296))) |mapsum_#res|) (<= 0 mapsum_~i~0) (not (< mapsum_~i~0 10000)) (<= 10000 mapsum_~i~0)) [2019-10-06 22:58:31,873 INFO L193 IcfgInterpreter]: Reachable states at location L35-3 satisfy 560#true [2019-10-06 22:58:31,873 INFO L193 IcfgInterpreter]: Reachable states at location L33-1 satisfy 587#true [2019-10-06 22:58:35,726 INFO L211 tionRefinementEngine]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2019-10-06 22:58:35,727 INFO L224 tionRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [469, 7, 7, 11] total 489 [2019-10-06 22:58:35,729 INFO L442 AbstractCegarLoop]: Interpolant automaton has 490 states [2019-10-06 22:58:35,739 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 490 interpolants. [2019-10-06 22:58:35,748 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=109840, Invalid=129770, Unknown=0, NotChecked=0, Total=239610 [2019-10-06 22:58:35,748 INFO L87 Difference]: Start difference. First operand 499 states and 503 transitions. Second operand 490 states. [2019-10-06 23:01:00,021 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-06 23:01:00,022 INFO L93 Difference]: Finished difference Result 533 states and 547 transitions. [2019-10-06 23:01:00,022 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 490 states. [2019-10-06 23:01:00,022 INFO L78 Accepts]: Start accepts. Automaton has 490 states. Word has length 524 [2019-10-06 23:01:00,023 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-06 23:01:00,025 INFO L225 Difference]: With dead ends: 533 [2019-10-06 23:01:00,025 INFO L226 Difference]: Without dead ends: 506 [2019-10-06 23:01:00,055 INFO L606 BasicCegarLoop]: 0 DeclaredPredicates, 2526 GetRequests, 1553 SyntacticMatches, 0 SemanticMatches, 973 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 131111 ImplicationChecksByTransitivity, 215.2s TimeCoverageRelationStatistics Valid=329534, Invalid=620116, Unknown=0, NotChecked=0, Total=949650 [2019-10-06 23:01:00,056 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 506 states. [2019-10-06 23:01:00,081 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 506 to 506. [2019-10-06 23:01:00,081 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 506 states. [2019-10-06 23:01:00,083 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 506 states to 506 states and 510 transitions. [2019-10-06 23:01:00,083 INFO L78 Accepts]: Start accepts. Automaton has 506 states and 510 transitions. Word has length 524 [2019-10-06 23:01:00,084 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-06 23:01:00,084 INFO L462 AbstractCegarLoop]: Abstraction has 506 states and 510 transitions. [2019-10-06 23:01:00,084 INFO L463 AbstractCegarLoop]: Interpolant automaton has 490 states. [2019-10-06 23:01:00,084 INFO L276 IsEmpty]: Start isEmpty. Operand 506 states and 510 transitions. [2019-10-06 23:01:00,088 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 532 [2019-10-06 23:01:00,088 INFO L377 BasicCegarLoop]: Found error trace [2019-10-06 23:01:00,088 INFO L385 BasicCegarLoop]: trace histogram [467, 30, 10, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-06 23:01:00,291 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 13 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-06 23:01:00,292 INFO L410 AbstractCegarLoop]: === Iteration 15 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-06 23:01:00,292 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-06 23:01:00,293 INFO L82 PathProgramCache]: Analyzing trace with hash -1244957600, now seen corresponding path program 12 times [2019-10-06 23:01:00,293 INFO L150 tionRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-10-06 23:01:00,293 INFO L231 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2019-10-06 23:01:00,293 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-06 23:01:00,293 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-06 23:01:00,294 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-06 23:01:01,804 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-06 23:02:18,821 INFO L134 CoverageAnalysis]: Checked inductivity of 109867 backedges. 0 proven. 109278 refuted. 0 times theorem prover too weak. 589 trivial. 0 not checked. [2019-10-06 23:02:18,822 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2019-10-06 23:02:18,822 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2019-10-06 23:02:18,822 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-06 23:02:19,899 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2019-10-06 23:02:19,900 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-10-06 23:02:19,924 INFO L256 TraceCheckSpWp]: Trace formula consists of 3109 conjuncts, 469 conjunts are in the unsatisfiable core [2019-10-06 23:02:19,935 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2019-10-06 23:02:20,184 INFO L134 CoverageAnalysis]: Checked inductivity of 109867 backedges. 0 proven. 109278 refuted. 0 times theorem prover too weak. 589 trivial. 0 not checked. [2019-10-06 23:02:20,185 INFO L322 TraceCheckSpWp]: Computing backward predicates...