java -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata ./data -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/default/automizer/svcomp-Reach-32bit-Automizer_Default.epf --traceabstraction.trace.refinement.strategy SIFA_TAIPAN --sifa.abstract.domain CompoundDomain --rcfgbuilder.size.of.a.code.block LoopFreeBlock --sifa.call.summarizer TopInputCallSummarizer --sifa.fluid SizeLimitFluid --sifa.simplification.technique SIMPLIFY_QUICK -i ../../../trunk/examples/svcomp/array-tiling/nr4.c -------------------------------------------------------------------------------- This is Ultimate 0.1.24-36ac518-m [2019-10-07 00:42:18,923 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-10-07 00:42:18,927 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-10-07 00:42:18,947 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-10-07 00:42:18,947 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-10-07 00:42:18,949 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-10-07 00:42:18,951 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-10-07 00:42:18,961 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-10-07 00:42:18,966 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-10-07 00:42:18,969 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-10-07 00:42:18,971 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-10-07 00:42:18,972 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-10-07 00:42:18,972 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-10-07 00:42:18,974 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-10-07 00:42:18,977 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-10-07 00:42:18,978 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-10-07 00:42:18,980 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-10-07 00:42:18,981 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-10-07 00:42:18,982 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-10-07 00:42:18,985 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-10-07 00:42:18,991 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-10-07 00:42:18,994 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-10-07 00:42:18,997 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-10-07 00:42:18,998 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-10-07 00:42:19,000 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... 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[2019-10-07 00:42:19,007 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-10-07 00:42:19,008 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-10-07 00:42:19,009 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-10-07 00:42:19,010 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/default/automizer/svcomp-Reach-32bit-Automizer_Default.epf [2019-10-07 00:42:19,039 INFO L113 SettingsManager]: Loading preferences was successful [2019-10-07 00:42:19,040 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-10-07 00:42:19,041 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-10-07 00:42:19,041 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-10-07 00:42:19,042 INFO L138 SettingsManager]: * Use SBE=true [2019-10-07 00:42:19,042 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-10-07 00:42:19,042 INFO L138 SettingsManager]: * sizeof long=4 [2019-10-07 00:42:19,042 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-10-07 00:42:19,043 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-10-07 00:42:19,043 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-10-07 00:42:19,043 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-10-07 00:42:19,043 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-10-07 00:42:19,043 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-10-07 00:42:19,044 INFO L138 SettingsManager]: * sizeof long double=12 [2019-10-07 00:42:19,044 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-10-07 00:42:19,044 INFO L138 SettingsManager]: * Use constant arrays=true [2019-10-07 00:42:19,044 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-10-07 00:42:19,044 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-10-07 00:42:19,045 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-10-07 00:42:19,045 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-10-07 00:42:19,045 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-10-07 00:42:19,045 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-10-07 00:42:19,045 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-10-07 00:42:19,046 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-10-07 00:42:19,046 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-10-07 00:42:19,046 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-10-07 00:42:19,046 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-10-07 00:42:19,047 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-10-07 00:42:19,047 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: Trace refinement strategy -> SIFA_TAIPAN Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.sifa: Abstract Domain -> CompoundDomain Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder: Size of a code block -> LoopFreeBlock Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.sifa: Call Summarizer -> TopInputCallSummarizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.sifa: Fluid -> SizeLimitFluid Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.sifa: Simplification Technique -> SIMPLIFY_QUICK [2019-10-07 00:42:19,358 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-10-07 00:42:19,376 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-10-07 00:42:19,379 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-10-07 00:42:19,380 INFO L271 PluginConnector]: Initializing CDTParser... [2019-10-07 00:42:19,380 INFO L275 PluginConnector]: CDTParser initialized [2019-10-07 00:42:19,381 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/array-tiling/nr4.c [2019-10-07 00:42:19,441 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/f7e6fa5eb/9259f1453d574b0aa7d76e2aef545832/FLAG067307bde [2019-10-07 00:42:19,923 INFO L306 CDTParser]: Found 1 translation units. [2019-10-07 00:42:19,923 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/array-tiling/nr4.c [2019-10-07 00:42:19,930 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/f7e6fa5eb/9259f1453d574b0aa7d76e2aef545832/FLAG067307bde [2019-10-07 00:42:20,317 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/f7e6fa5eb/9259f1453d574b0aa7d76e2aef545832 [2019-10-07 00:42:20,328 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-10-07 00:42:20,330 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2019-10-07 00:42:20,331 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-10-07 00:42:20,331 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-10-07 00:42:20,335 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-10-07 00:42:20,336 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.10 12:42:20" (1/1) ... [2019-10-07 00:42:20,339 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@5d281660 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.10 12:42:20, skipping insertion in model container [2019-10-07 00:42:20,340 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.10 12:42:20" (1/1) ... [2019-10-07 00:42:20,348 INFO L142 MainTranslator]: Starting translation in SV-COMP mode [2019-10-07 00:42:20,367 INFO L173 MainTranslator]: Built tables and reachable declarations [2019-10-07 00:42:20,544 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-10-07 00:42:20,549 INFO L188 MainTranslator]: Completed pre-run [2019-10-07 00:42:20,575 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-10-07 00:42:20,686 INFO L192 MainTranslator]: Completed translation [2019-10-07 00:42:20,687 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.10 12:42:20 WrapperNode [2019-10-07 00:42:20,687 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-10-07 00:42:20,688 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-10-07 00:42:20,688 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-10-07 00:42:20,688 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-10-07 00:42:20,702 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.10 12:42:20" (1/1) ... [2019-10-07 00:42:20,703 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.10 12:42:20" (1/1) ... [2019-10-07 00:42:20,711 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.10 12:42:20" (1/1) ... [2019-10-07 00:42:20,712 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.10 12:42:20" (1/1) ... [2019-10-07 00:42:20,720 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.10 12:42:20" (1/1) ... [2019-10-07 00:42:20,730 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.10 12:42:20" (1/1) ... [2019-10-07 00:42:20,735 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.10 12:42:20" (1/1) ... [2019-10-07 00:42:20,737 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-10-07 00:42:20,739 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-10-07 00:42:20,739 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-10-07 00:42:20,739 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-10-07 00:42:20,740 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.10 12:42:20" (1/1) ... No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-10-07 00:42:20,801 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2019-10-07 00:42:20,802 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-10-07 00:42:20,802 INFO L138 BoogieDeclarations]: Found implementation of procedure __VERIFIER_assert [2019-10-07 00:42:20,802 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2019-10-07 00:42:20,802 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_error [2019-10-07 00:42:20,802 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_assume [2019-10-07 00:42:20,802 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_assert [2019-10-07 00:42:20,802 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_int [2019-10-07 00:42:20,803 INFO L130 BoogieDeclarations]: Found specification of procedure main [2019-10-07 00:42:20,803 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-10-07 00:42:20,803 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-10-07 00:42:20,803 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-10-07 00:42:20,803 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2019-10-07 00:42:20,803 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2019-10-07 00:42:20,804 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-10-07 00:42:21,209 INFO L279 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-10-07 00:42:21,209 INFO L284 CfgBuilder]: Removed 3 assume(true) statements. [2019-10-07 00:42:21,211 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.10 12:42:21 BoogieIcfgContainer [2019-10-07 00:42:21,211 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-10-07 00:42:21,218 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-10-07 00:42:21,218 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-10-07 00:42:21,223 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-10-07 00:42:21,224 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.10 12:42:20" (1/3) ... [2019-10-07 00:42:21,225 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@7deda09b and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.10 12:42:21, skipping insertion in model container [2019-10-07 00:42:21,225 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.10 12:42:20" (2/3) ... [2019-10-07 00:42:21,225 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@7deda09b and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.10 12:42:21, skipping insertion in model container [2019-10-07 00:42:21,226 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.10 12:42:21" (3/3) ... [2019-10-07 00:42:21,227 INFO L109 eAbstractionObserver]: Analyzing ICFG nr4.c [2019-10-07 00:42:21,241 INFO L152 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-10-07 00:42:21,248 INFO L164 ceAbstractionStarter]: Appying trace abstraction to program that has 1 error locations. [2019-10-07 00:42:21,261 INFO L249 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2019-10-07 00:42:21,286 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-10-07 00:42:21,286 INFO L374 AbstractCegarLoop]: Hoare is true [2019-10-07 00:42:21,287 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-10-07 00:42:21,287 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-10-07 00:42:21,287 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-10-07 00:42:21,287 INFO L378 AbstractCegarLoop]: Difference is false [2019-10-07 00:42:21,287 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-10-07 00:42:21,287 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-10-07 00:42:21,303 INFO L276 IsEmpty]: Start isEmpty. Operand 23 states. [2019-10-07 00:42:21,309 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-10-07 00:42:21,309 INFO L377 BasicCegarLoop]: Found error trace [2019-10-07 00:42:21,310 INFO L385 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-07 00:42:21,312 INFO L410 AbstractCegarLoop]: === Iteration 1 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-07 00:42:21,317 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-07 00:42:21,317 INFO L82 PathProgramCache]: Analyzing trace with hash -1583936272, now seen corresponding path program 1 times [2019-10-07 00:42:21,325 INFO L150 tionRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-10-07 00:42:21,325 INFO L231 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2019-10-07 00:42:21,326 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-07 00:42:21,326 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-07 00:42:21,326 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-07 00:42:21,449 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-07 00:42:21,736 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-10-07 00:42:21,738 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2019-10-07 00:42:21,738 INFO L211 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-10-07 00:42:21,739 INFO L224 tionRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-10-07 00:42:21,743 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-10-07 00:42:21,759 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-10-07 00:42:21,760 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-10-07 00:42:21,763 INFO L87 Difference]: Start difference. First operand 23 states. Second operand 4 states. [2019-10-07 00:42:21,869 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-07 00:42:21,870 INFO L93 Difference]: Finished difference Result 44 states and 52 transitions. [2019-10-07 00:42:21,871 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-10-07 00:42:21,872 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-10-07 00:42:21,873 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-07 00:42:21,882 INFO L225 Difference]: With dead ends: 44 [2019-10-07 00:42:21,882 INFO L226 Difference]: Without dead ends: 20 [2019-10-07 00:42:21,886 INFO L606 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-10-07 00:42:21,907 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20 states. [2019-10-07 00:42:21,925 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20 to 19. [2019-10-07 00:42:21,927 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19 states. [2019-10-07 00:42:21,928 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19 states to 19 states and 21 transitions. [2019-10-07 00:42:21,930 INFO L78 Accepts]: Start accepts. Automaton has 19 states and 21 transitions. Word has length 13 [2019-10-07 00:42:21,930 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-07 00:42:21,930 INFO L462 AbstractCegarLoop]: Abstraction has 19 states and 21 transitions. [2019-10-07 00:42:21,931 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-10-07 00:42:21,931 INFO L276 IsEmpty]: Start isEmpty. Operand 19 states and 21 transitions. [2019-10-07 00:42:21,932 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2019-10-07 00:42:21,932 INFO L377 BasicCegarLoop]: Found error trace [2019-10-07 00:42:21,932 INFO L385 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-07 00:42:21,933 INFO L410 AbstractCegarLoop]: === Iteration 2 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-07 00:42:21,933 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-07 00:42:21,933 INFO L82 PathProgramCache]: Analyzing trace with hash 362962816, now seen corresponding path program 1 times [2019-10-07 00:42:21,934 INFO L150 tionRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-10-07 00:42:21,934 INFO L231 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2019-10-07 00:42:21,934 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-07 00:42:21,934 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-07 00:42:21,935 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-07 00:42:21,955 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-07 00:42:21,988 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 1 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-10-07 00:42:21,989 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2019-10-07 00:42:21,989 INFO L211 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-10-07 00:42:21,989 INFO L224 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-10-07 00:42:21,991 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-10-07 00:42:21,991 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-10-07 00:42:21,991 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-10-07 00:42:21,992 INFO L87 Difference]: Start difference. First operand 19 states and 21 transitions. Second operand 3 states. [2019-10-07 00:42:22,011 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-07 00:42:22,011 INFO L93 Difference]: Finished difference Result 31 states and 36 transitions. [2019-10-07 00:42:22,012 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-10-07 00:42:22,012 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 15 [2019-10-07 00:42:22,012 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-07 00:42:22,013 INFO L225 Difference]: With dead ends: 31 [2019-10-07 00:42:22,013 INFO L226 Difference]: Without dead ends: 20 [2019-10-07 00:42:22,014 INFO L606 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-10-07 00:42:22,015 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20 states. [2019-10-07 00:42:22,019 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20 to 20. [2019-10-07 00:42:22,020 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20 states. [2019-10-07 00:42:22,021 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20 states to 20 states and 22 transitions. [2019-10-07 00:42:22,021 INFO L78 Accepts]: Start accepts. Automaton has 20 states and 22 transitions. Word has length 15 [2019-10-07 00:42:22,021 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-07 00:42:22,021 INFO L462 AbstractCegarLoop]: Abstraction has 20 states and 22 transitions. [2019-10-07 00:42:22,022 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-10-07 00:42:22,022 INFO L276 IsEmpty]: Start isEmpty. Operand 20 states and 22 transitions. [2019-10-07 00:42:22,022 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2019-10-07 00:42:22,022 INFO L377 BasicCegarLoop]: Found error trace [2019-10-07 00:42:22,023 INFO L385 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-07 00:42:22,023 INFO L410 AbstractCegarLoop]: === Iteration 3 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-07 00:42:22,023 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-07 00:42:22,023 INFO L82 PathProgramCache]: Analyzing trace with hash -561578652, now seen corresponding path program 1 times [2019-10-07 00:42:22,024 INFO L150 tionRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-10-07 00:42:22,024 INFO L231 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2019-10-07 00:42:22,024 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-07 00:42:22,024 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-07 00:42:22,025 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-07 00:42:22,051 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-07 00:42:22,109 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-10-07 00:42:22,111 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2019-10-07 00:42:22,112 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2019-10-07 00:42:22,112 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-07 00:42:22,167 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-07 00:42:22,169 INFO L256 TraceCheckSpWp]: Trace formula consists of 83 conjuncts, 3 conjunts are in the unsatisfiable core [2019-10-07 00:42:22,176 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2019-10-07 00:42:22,200 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-10-07 00:42:22,201 INFO L322 TraceCheckSpWp]: Computing backward predicates... [2019-10-07 00:42:22,236 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-10-07 00:42:22,237 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSifa [2019-10-07 00:42:22,264 INFO L162 IcfgInterpreter]: Started Sifa with 15 locations of interest [2019-10-07 00:42:22,265 INFO L169 IcfgInterpreter]: Building call graph [2019-10-07 00:42:22,272 INFO L174 IcfgInterpreter]: Initial procedures are [ULTIMATE.start] [2019-10-07 00:42:22,280 INFO L179 IcfgInterpreter]: Starting interpretation [2019-10-07 00:42:22,281 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.start with input of size 1 for LOIs [2019-10-07 00:42:22,536 INFO L199 IcfgInterpreter]: Interpreting procedure main with input of size 27 for LOIs [2019-10-07 00:42:23,039 WARN L225 Elim1Store]: Array PQE input equivalent to false [2019-10-07 00:42:23,936 INFO L199 IcfgInterpreter]: Interpreting procedure __VERIFIER_assert with input of size 17 for LOIs [2019-10-07 00:42:23,999 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.init with input of size 13 for LOIs [2019-10-07 00:42:24,026 INFO L183 IcfgInterpreter]: Interpretation finished [2019-10-07 00:42:24,027 INFO L191 IcfgInterpreter]: Final predicates for locations of interest are: [2019-10-07 00:42:24,027 INFO L193 IcfgInterpreter]: Reachable states at location L11 satisfy 38#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (<= |old(~CELLCOUNT~0)| 0) (= 0 (select |old(#valid)| 0)) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (<= 0 |old(~CELLCOUNT~0)|) (<= ~CELLCOUNT~0 2147483647) (= |#valid| |old(#valid)|) (= |#memory_int| |old(#memory_int)|) (= |#NULL.offset| 0) (<= 0 (+ ~CELLCOUNT~0 2147483648)) (= |old(~CELLCOUNT~0)| 0) (= |old(#length)| |#length|)) [2019-10-07 00:42:24,027 INFO L193 IcfgInterpreter]: Reachable states at location L3-1 satisfy 293#(and (or (and (= |__VERIFIER_assert_#in~cond| 0) (= 0 __VERIFIER_assert_~cond) (= |__VERIFIER_assert_#in~cond| __VERIFIER_assert_~cond)) (and (= |__VERIFIER_assert_#in~cond| 1) (= 0 __VERIFIER_assert_~cond) (= |__VERIFIER_assert_#in~cond| __VERIFIER_assert_~cond))) (<= 1 ~CELLCOUNT~0) (<= ~CELLCOUNT~0 2147483647) (<= __VERIFIER_assert_~cond 0) (<= |#NULL.base| 0) (<= 0 |__VERIFIER_assert_#in~cond|) (<= |__VERIFIER_assert_#in~cond| 0) (<= 0 |#NULL.base|) (<= 0 __VERIFIER_assert_~cond) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-07 00:42:24,028 INFO L193 IcfgInterpreter]: Reachable states at location __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION satisfy 298#(and (or (and (= |__VERIFIER_assert_#in~cond| 0) (= 0 __VERIFIER_assert_~cond) (= |__VERIFIER_assert_#in~cond| __VERIFIER_assert_~cond)) (and (= |__VERIFIER_assert_#in~cond| 1) (= 0 __VERIFIER_assert_~cond) (= |__VERIFIER_assert_#in~cond| __VERIFIER_assert_~cond))) (<= 1 ~CELLCOUNT~0) (<= ~CELLCOUNT~0 2147483647) (<= __VERIFIER_assert_~cond 0) (<= |#NULL.base| 0) (<= 0 |__VERIFIER_assert_#in~cond|) (<= |__VERIFIER_assert_#in~cond| 0) (<= 0 |#NULL.base|) (<= 0 __VERIFIER_assert_~cond) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-07 00:42:24,029 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initENTRY satisfy 302#(and (= |old(~CELLCOUNT~0)| ~CELLCOUNT~0) (= |old(#NULL.base)| |#NULL.base|) (= |#valid| |old(#valid)|) (= |#NULL.offset| |old(#NULL.offset)|)) [2019-10-07 00:42:24,029 INFO L193 IcfgInterpreter]: Reachable states at location L37-3 satisfy 259#(and (<= 0 main_~i~0) (<= main_~i~0 0) (and (= |#NULL.base| 0) (<= |main_~#volArray~0.offset| 0) (<= 1 ~CELLCOUNT~0) (<= 2 main_~MINVAL~0) (= main_~MINVAL~0 2) (<= |#NULL.base| 0) (<= 0 |main_~#volArray~0.offset|) (= |main_~#volArray~0.offset| 0) (<= 0 |#NULL.base|) (<= |old(~CELLCOUNT~0)| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (<= 0 |old(~CELLCOUNT~0)|) (<= ~CELLCOUNT~0 2147483647) (= |#NULL.offset| 0) (= |old(~CELLCOUNT~0)| 0) (= main_~i~0 0)) (<= main_~MINVAL~0 2)) [2019-10-07 00:42:24,029 INFO L193 IcfgInterpreter]: Reachable states at location L3 satisfy 288#(and (or (and (= |__VERIFIER_assert_#in~cond| 1) (= |__VERIFIER_assert_#in~cond| __VERIFIER_assert_~cond)) (and (= |__VERIFIER_assert_#in~cond| 0) (= |__VERIFIER_assert_#in~cond| __VERIFIER_assert_~cond))) (or (and (<= 1 ~CELLCOUNT~0) (<= ~CELLCOUNT~0 2147483647) (<= __VERIFIER_assert_~cond 0) (<= |#NULL.base| 0) (<= 0 |__VERIFIER_assert_#in~cond|) (<= |__VERIFIER_assert_#in~cond| 0) (<= 0 |#NULL.base|) (<= 0 __VERIFIER_assert_~cond) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) (and (<= 1 ~CELLCOUNT~0) (<= ~CELLCOUNT~0 2147483647) (<= |#NULL.base| 0) (<= 1 __VERIFIER_assert_~cond) (<= 0 |#NULL.base|) (<= 1 |__VERIFIER_assert_#in~cond|) (<= __VERIFIER_assert_~cond 1) (<= |__VERIFIER_assert_#in~cond| 1) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)))) [2019-10-07 00:42:24,030 INFO L193 IcfgInterpreter]: Reachable states at location L39-2 satisfy 268#(and (<= |main_~#volArray~0.offset| 0) (<= 1 ~CELLCOUNT~0) (<= 0 main_~i~0) (<= 2 main_~MINVAL~0) (<= |#NULL.base| 0) (<= 0 |main_~#volArray~0.offset|) (<= 0 |#NULL.base|) (<= |old(~CELLCOUNT~0)| 0) (<= main_~i~0 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (<= 0 |old(~CELLCOUNT~0)|) (<= ~CELLCOUNT~0 2147483647) (<= main_~MINVAL~0 2)) [2019-10-07 00:42:24,030 INFO L193 IcfgInterpreter]: Reachable states at location L-1 satisfy 23#(and (= ~CELLCOUNT~0 0) (<= ~CELLCOUNT~0 0) (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= 0 (select |#valid| 0)) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 ~CELLCOUNT~0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-07 00:42:24,030 INFO L193 IcfgInterpreter]: Reachable states at location mainENTRY satisfy 33#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (<= |old(~CELLCOUNT~0)| 0) (<= 0 ~CELLCOUNT~0) (= 0 (select |old(#valid)| 0)) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (<= 0 |old(~CELLCOUNT~0)|) (= |old(~CELLCOUNT~0)| ~CELLCOUNT~0) (<= ~CELLCOUNT~0 0) (= |#valid| |old(#valid)|) (= |#memory_int| |old(#memory_int)|) (= |#NULL.offset| 0) (= |old(~CELLCOUNT~0)| 0) (= |old(#length)| |#length|)) [2019-10-07 00:42:24,031 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initEXIT satisfy 307#(and (= ~CELLCOUNT~0 0) (= |#valid| (store |old(#valid)| 0 0)) (<= ~CELLCOUNT~0 0) (= 0 |#NULL.base|) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 ~CELLCOUNT~0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-07 00:42:24,031 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.startENTRY satisfy 6#true [2019-10-07 00:42:24,031 INFO L193 IcfgInterpreter]: Reachable states at location L18 satisfy 43#(and (<= |main_~#volArray~0.offset| 0) (= 0 |#NULL.base|) (<= 0 |main_~#volArray~0.offset|) (= |main_~#volArray~0.offset| 0) (<= 0 |#NULL.base|) (<= 0 |#NULL.offset|) (<= 0 |old(~CELLCOUNT~0)|) (= 2 main_~MINVAL~0) (not (= |main_~#volArray~0.base| 0)) (= |#valid| (store |old(#valid)| |main_~#volArray~0.base| 1)) (<= main_~MINVAL~0 2) (= (store |old(#length)| |main_~#volArray~0.base| (* 4 ~CELLCOUNT~0)) |#length|) (<= 1 ~CELLCOUNT~0) (<= 2 main_~MINVAL~0) (<= |#NULL.base| 0) (<= |old(~CELLCOUNT~0)| 0) (< |main_~#volArray~0.base| |#StackHeapBarrier|) (= 0 (select |old(#valid)| 0)) (<= |#NULL.offset| 0) (< 1 ~CELLCOUNT~0) (<= ~CELLCOUNT~0 2147483647) (= 0 (select |old(#valid)| |main_~#volArray~0.base|)) (= |#memory_int| |old(#memory_int)|) (= |#NULL.offset| 0) (<= 0 (+ ~CELLCOUNT~0 2147483648)) (= |old(~CELLCOUNT~0)| 0)) [2019-10-07 00:42:24,032 INFO L193 IcfgInterpreter]: Reachable states at location L22-3 satisfy 242#(and (or (<= main_~j~0 1) (and (<= 1 main_~i~0) (<= main_~i~0 1))) (or (and (= |#NULL.base| 0) (<= |main_~#volArray~0.offset| 0) (<= 1 ~CELLCOUNT~0) (<= 2 main_~i~0) (<= 2 main_~MINVAL~0) (= main_~MINVAL~0 2) (<= |#NULL.base| 0) (<= 0 |main_~#volArray~0.offset|) (= |main_~#volArray~0.offset| 0) (not (<= 1 main_~j~0)) (<= 0 |#NULL.base|) (<= |old(~CELLCOUNT~0)| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (<= 0 |old(~CELLCOUNT~0)|) (<= ~CELLCOUNT~0 2147483647) (<= main_~MINVAL~0 2) (<= main_~j~0 4) (= |#NULL.offset| 0) (= |old(~CELLCOUNT~0)| 0)) (and (<= |main_~#volArray~0.offset| 0) (= 0 |#NULL.base|) (<= 0 |main_~#volArray~0.offset|) (= |main_~#volArray~0.offset| 0) (<= 0 |#NULL.base|) (not (= (ite (= (ite (and (< ~CELLCOUNT~0 0) (not (= (mod ~CELLCOUNT~0 4) 0))) (+ (mod ~CELLCOUNT~0 4) (- 4)) (mod ~CELLCOUNT~0 4)) 0) 1 0) 0)) (<= 0 |#NULL.offset|) (<= 0 |old(~CELLCOUNT~0)|) (= 2 main_~MINVAL~0) (not (= |main_~#volArray~0.base| 0)) (<= 1 main_~i~0) (= |#valid| (store |old(#valid)| |main_~#volArray~0.base| 1)) (<= main_~MINVAL~0 2) (<= main_~i~0 1) (= (store |old(#length)| |main_~#volArray~0.base| (* 4 ~CELLCOUNT~0)) |#length|) (<= 1 ~CELLCOUNT~0) (<= 2 main_~MINVAL~0) (<= |#NULL.base| 0) (= main_~i~0 1) (<= |old(~CELLCOUNT~0)| 0) (< |main_~#volArray~0.base| |#StackHeapBarrier|) (= 0 (select |old(#valid)| 0)) (<= |#NULL.offset| 0) (< 1 ~CELLCOUNT~0) (<= ~CELLCOUNT~0 2147483647) (= 0 (select |old(#valid)| |main_~#volArray~0.base|)) (= (ite (and (< ~CELLCOUNT~0 0) (not (= (mod ~CELLCOUNT~0 4) 0))) (+ (mod ~CELLCOUNT~0 4) (- 4)) (mod ~CELLCOUNT~0 4)) 0) (= |#memory_int| |old(#memory_int)|) (= |#NULL.offset| 0) (<= 0 (+ ~CELLCOUNT~0 2147483648)) (= |old(~CELLCOUNT~0)| 0)))) [2019-10-07 00:42:24,032 INFO L193 IcfgInterpreter]: Reachable states at location __VERIFIER_assertENTRY satisfy 283#(and (or (and (<= 0 |__VERIFIER_assert_#in~cond|) (<= |__VERIFIER_assert_#in~cond| 0)) (and (<= 1 |__VERIFIER_assert_#in~cond|) (<= |__VERIFIER_assert_#in~cond| 1))) (or (and (<= 1 ~CELLCOUNT~0) (<= ~CELLCOUNT~0 2147483647) (= |__VERIFIER_assert_#in~cond| 1) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) (and (<= 1 ~CELLCOUNT~0) (<= ~CELLCOUNT~0 2147483647) (= |__VERIFIER_assert_#in~cond| 0) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)))) [2019-10-07 00:42:24,033 INFO L193 IcfgInterpreter]: Reachable states at location L24-3 satisfy 237#(and (or (and (= |#NULL.base| 0) (<= |main_~#volArray~0.offset| 0) (<= 1 ~CELLCOUNT~0) (<= 2 main_~MINVAL~0) (= main_~MINVAL~0 2) (<= |#NULL.base| 0) (<= 0 |main_~#volArray~0.offset|) (= |main_~#volArray~0.offset| 0) (<= 0 |#NULL.base|) (<= |old(~CELLCOUNT~0)| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (<= 0 |old(~CELLCOUNT~0)|) (= |#NULL.offset| 0) (= |old(~CELLCOUNT~0)| 0)) (and (<= |main_~#volArray~0.offset| 0) (<= 4 main_~j~0) (= 0 |#NULL.base|) (<= 0 |main_~#volArray~0.offset|) (= |main_~#volArray~0.offset| 0) (<= 0 |#NULL.base|) (not (= (ite (= (ite (and (< ~CELLCOUNT~0 0) (not (= (mod ~CELLCOUNT~0 4) 0))) (+ (mod ~CELLCOUNT~0 4) (- 4)) (mod ~CELLCOUNT~0 4)) 0) 1 0) 0)) (= main_~j~0 4) (<= 0 |#NULL.offset|) (<= 0 |old(~CELLCOUNT~0)|) (= 2 main_~MINVAL~0) (not (= |main_~#volArray~0.base| 0)) (= |#valid| (store |old(#valid)| |main_~#volArray~0.base| 1)) (<= main_~i~0 1) (= (store |old(#length)| |main_~#volArray~0.base| (* 4 ~CELLCOUNT~0)) |#length|) (<= 1 ~CELLCOUNT~0) (<= main_~i~0 (ite (and (< ~CELLCOUNT~0 0) (not (= (mod ~CELLCOUNT~0 4) 0))) (+ (div ~CELLCOUNT~0 4) 1) (div ~CELLCOUNT~0 4))) (<= 2 main_~MINVAL~0) (<= |#NULL.base| 0) (= main_~i~0 1) (<= |old(~CELLCOUNT~0)| 0) (< |main_~#volArray~0.base| |#StackHeapBarrier|) (= 0 (select |old(#valid)| 0)) (<= |#NULL.offset| 0) (< 1 ~CELLCOUNT~0) (= 0 (select |old(#valid)| |main_~#volArray~0.base|)) (= (ite (and (< ~CELLCOUNT~0 0) (not (= (mod ~CELLCOUNT~0 4) 0))) (+ (mod ~CELLCOUNT~0 4) (- 4)) (mod ~CELLCOUNT~0 4)) 0) (= |#memory_int| |old(#memory_int)|) (= |#NULL.offset| 0) (<= 0 (+ ~CELLCOUNT~0 2147483648)) (= |old(~CELLCOUNT~0)| 0))) (<= ~CELLCOUNT~0 2147483647) (<= 1 main_~i~0) (<= main_~MINVAL~0 2) (<= main_~j~0 4)) [2019-10-07 00:42:24,485 WARN L191 SmtUtils]: Spent 112.00 ms on a formula simplification. DAG size of input: 54 DAG size of output: 42 [2019-10-07 00:42:24,817 WARN L191 SmtUtils]: Spent 283.00 ms on a formula simplification. DAG size of input: 82 DAG size of output: 60 [2019-10-07 00:42:25,287 INFO L211 tionRefinementEngine]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2019-10-07 00:42:25,287 INFO L224 tionRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4, 4, 13] total 18 [2019-10-07 00:42:25,289 INFO L442 AbstractCegarLoop]: Interpolant automaton has 18 states [2019-10-07 00:42:25,289 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2019-10-07 00:42:25,290 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=46, Invalid=260, Unknown=0, NotChecked=0, Total=306 [2019-10-07 00:42:25,292 INFO L87 Difference]: Start difference. First operand 20 states and 22 transitions. Second operand 18 states. [2019-10-07 00:42:25,679 WARN L191 SmtUtils]: Spent 222.00 ms on a formula simplification. DAG size of input: 61 DAG size of output: 60 [2019-10-07 00:42:26,128 WARN L191 SmtUtils]: Spent 158.00 ms on a formula simplification. DAG size of input: 63 DAG size of output: 60 [2019-10-07 00:42:26,588 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-07 00:42:26,589 INFO L93 Difference]: Finished difference Result 45 states and 52 transitions. [2019-10-07 00:42:26,589 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2019-10-07 00:42:26,590 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 16 [2019-10-07 00:42:26,590 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-07 00:42:26,591 INFO L225 Difference]: With dead ends: 45 [2019-10-07 00:42:26,594 INFO L226 Difference]: Without dead ends: 33 [2019-10-07 00:42:26,595 INFO L606 BasicCegarLoop]: 0 DeclaredPredicates, 62 GetRequests, 34 SyntacticMatches, 0 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 158 ImplicationChecksByTransitivity, 2.2s TimeCoverageRelationStatistics Valid=123, Invalid=747, Unknown=0, NotChecked=0, Total=870 [2019-10-07 00:42:26,596 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 33 states. [2019-10-07 00:42:26,610 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 33 to 23. [2019-10-07 00:42:26,610 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 23 states. [2019-10-07 00:42:26,611 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23 states to 23 states and 25 transitions. [2019-10-07 00:42:26,612 INFO L78 Accepts]: Start accepts. Automaton has 23 states and 25 transitions. Word has length 16 [2019-10-07 00:42:26,612 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-07 00:42:26,612 INFO L462 AbstractCegarLoop]: Abstraction has 23 states and 25 transitions. [2019-10-07 00:42:26,612 INFO L463 AbstractCegarLoop]: Interpolant automaton has 18 states. [2019-10-07 00:42:26,612 INFO L276 IsEmpty]: Start isEmpty. Operand 23 states and 25 transitions. [2019-10-07 00:42:26,613 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-10-07 00:42:26,613 INFO L377 BasicCegarLoop]: Found error trace [2019-10-07 00:42:26,613 INFO L385 BasicCegarLoop]: trace histogram [4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-07 00:42:26,822 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 2 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-07 00:42:26,823 INFO L410 AbstractCegarLoop]: === Iteration 4 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-07 00:42:26,823 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-07 00:42:26,823 INFO L82 PathProgramCache]: Analyzing trace with hash 2026682496, now seen corresponding path program 2 times [2019-10-07 00:42:26,823 INFO L150 tionRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-10-07 00:42:26,823 INFO L231 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2019-10-07 00:42:26,824 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-07 00:42:26,824 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-07 00:42:26,824 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-07 00:42:26,932 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-07 00:42:27,436 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-10-07 00:42:27,436 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2019-10-07 00:42:27,436 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2019-10-07 00:42:27,437 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-07 00:42:27,509 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 4 check-sat command(s) [2019-10-07 00:42:27,512 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-10-07 00:42:27,514 INFO L256 TraceCheckSpWp]: Trace formula consists of 95 conjuncts, 30 conjunts are in the unsatisfiable core [2019-10-07 00:42:27,520 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2019-10-07 00:42:27,640 WARN L225 Elim1Store]: Array PQE input equivalent to false [2019-10-07 00:42:28,126 WARN L191 SmtUtils]: Spent 185.00 ms on a formula simplification. DAG size of input: 61 DAG size of output: 46 [2019-10-07 00:42:28,620 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-10-07 00:42:28,620 INFO L322 TraceCheckSpWp]: Computing backward predicates... [2019-10-07 00:42:29,204 WARN L191 SmtUtils]: Spent 213.00 ms on a formula simplification. DAG size of input: 89 DAG size of output: 21 [2019-10-07 00:42:29,476 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 3 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-10-07 00:42:29,476 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSifa [2019-10-07 00:42:29,478 INFO L162 IcfgInterpreter]: Started Sifa with 15 locations of interest [2019-10-07 00:42:29,478 INFO L169 IcfgInterpreter]: Building call graph [2019-10-07 00:42:29,479 INFO L174 IcfgInterpreter]: Initial procedures are [ULTIMATE.start] [2019-10-07 00:42:29,479 INFO L179 IcfgInterpreter]: Starting interpretation [2019-10-07 00:42:29,479 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.start with input of size 1 for LOIs [2019-10-07 00:42:29,538 INFO L199 IcfgInterpreter]: Interpreting procedure main with input of size 25 for LOIs [2019-10-07 00:42:29,774 WARN L225 Elim1Store]: Array PQE input equivalent to false [2019-10-07 00:42:30,435 INFO L199 IcfgInterpreter]: Interpreting procedure __VERIFIER_assert with input of size 17 for LOIs [2019-10-07 00:42:30,458 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.init with input of size 13 for LOIs [2019-10-07 00:42:30,462 INFO L183 IcfgInterpreter]: Interpretation finished [2019-10-07 00:42:30,463 INFO L191 IcfgInterpreter]: Final predicates for locations of interest are: [2019-10-07 00:42:30,463 INFO L193 IcfgInterpreter]: Reachable states at location L11 satisfy 38#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (<= |old(~CELLCOUNT~0)| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (= 0 (select |old(#valid)| 0)) (<= 0 |old(~CELLCOUNT~0)|) (<= ~CELLCOUNT~0 2147483647) (= |#valid| |old(#valid)|) (= |#memory_int| |old(#memory_int)|) (= |#NULL.offset| 0) (<= 0 (+ ~CELLCOUNT~0 2147483648)) (= |old(~CELLCOUNT~0)| 0) (= |old(#length)| |#length|)) [2019-10-07 00:42:30,463 INFO L193 IcfgInterpreter]: Reachable states at location L3-1 satisfy 300#(and (or (and (= |__VERIFIER_assert_#in~cond| 0) (= 0 __VERIFIER_assert_~cond) (= |__VERIFIER_assert_#in~cond| __VERIFIER_assert_~cond)) (and (= |__VERIFIER_assert_#in~cond| 1) (= 0 __VERIFIER_assert_~cond) (= |__VERIFIER_assert_#in~cond| __VERIFIER_assert_~cond))) (<= 1 ~CELLCOUNT~0) (<= ~CELLCOUNT~0 2147483647) (<= __VERIFIER_assert_~cond 0) (<= |#NULL.base| 0) (<= 0 |__VERIFIER_assert_#in~cond|) (<= |__VERIFIER_assert_#in~cond| 0) (<= 0 |#NULL.base|) (<= 0 __VERIFIER_assert_~cond) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-07 00:42:30,464 INFO L193 IcfgInterpreter]: Reachable states at location __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION satisfy 305#(and (or (and (= |__VERIFIER_assert_#in~cond| 0) (= 0 __VERIFIER_assert_~cond) (= |__VERIFIER_assert_#in~cond| __VERIFIER_assert_~cond)) (and (= |__VERIFIER_assert_#in~cond| 1) (= 0 __VERIFIER_assert_~cond) (= |__VERIFIER_assert_#in~cond| __VERIFIER_assert_~cond))) (<= 1 ~CELLCOUNT~0) (<= ~CELLCOUNT~0 2147483647) (<= __VERIFIER_assert_~cond 0) (<= |#NULL.base| 0) (<= 0 |__VERIFIER_assert_#in~cond|) (<= |__VERIFIER_assert_#in~cond| 0) (<= 0 |#NULL.base|) (<= 0 __VERIFIER_assert_~cond) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-07 00:42:30,464 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initENTRY satisfy 309#(and (= |old(~CELLCOUNT~0)| ~CELLCOUNT~0) (= |old(#NULL.base)| |#NULL.base|) (= |#valid| |old(#valid)|) (= |#NULL.offset| |old(#NULL.offset)|)) [2019-10-07 00:42:30,464 INFO L193 IcfgInterpreter]: Reachable states at location L37-3 satisfy 266#(and (<= 0 main_~i~0) (<= main_~i~0 0) (and (= |#NULL.base| 0) (<= |main_~#volArray~0.offset| 0) (<= 1 ~CELLCOUNT~0) (<= 2 main_~MINVAL~0) (= main_~MINVAL~0 2) (<= |#NULL.base| 0) (<= 0 |main_~#volArray~0.offset|) (= |main_~#volArray~0.offset| 0) (<= 0 |#NULL.base|) (<= |old(~CELLCOUNT~0)| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (<= 0 |old(~CELLCOUNT~0)|) (<= ~CELLCOUNT~0 2147483647) (= |#NULL.offset| 0) (= |old(~CELLCOUNT~0)| 0) (= main_~i~0 0)) (<= main_~MINVAL~0 2)) [2019-10-07 00:42:30,464 INFO L193 IcfgInterpreter]: Reachable states at location L3 satisfy 295#(and (or (and (= |__VERIFIER_assert_#in~cond| 1) (= |__VERIFIER_assert_#in~cond| __VERIFIER_assert_~cond)) (and (= |__VERIFIER_assert_#in~cond| 0) (= |__VERIFIER_assert_#in~cond| __VERIFIER_assert_~cond))) (or (and (<= 1 ~CELLCOUNT~0) (<= ~CELLCOUNT~0 2147483647) (<= __VERIFIER_assert_~cond 0) (<= |#NULL.base| 0) (<= 0 |__VERIFIER_assert_#in~cond|) (<= |__VERIFIER_assert_#in~cond| 0) (<= 0 |#NULL.base|) (<= 0 __VERIFIER_assert_~cond) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) (and (<= 1 ~CELLCOUNT~0) (<= ~CELLCOUNT~0 2147483647) (<= |#NULL.base| 0) (<= 1 __VERIFIER_assert_~cond) (<= 0 |#NULL.base|) (<= 1 |__VERIFIER_assert_#in~cond|) (<= __VERIFIER_assert_~cond 1) (<= |__VERIFIER_assert_#in~cond| 1) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)))) [2019-10-07 00:42:30,465 INFO L193 IcfgInterpreter]: Reachable states at location L39-2 satisfy 275#(and (<= |main_~#volArray~0.offset| 0) (<= 1 ~CELLCOUNT~0) (<= 0 main_~i~0) (<= 2 main_~MINVAL~0) (<= |#NULL.base| 0) (<= 0 |main_~#volArray~0.offset|) (<= 0 |#NULL.base|) (<= |old(~CELLCOUNT~0)| 0) (<= main_~i~0 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (<= 0 |old(~CELLCOUNT~0)|) (<= ~CELLCOUNT~0 2147483647) (<= main_~MINVAL~0 2)) [2019-10-07 00:42:30,465 INFO L193 IcfgInterpreter]: Reachable states at location L-1 satisfy 23#(and (= ~CELLCOUNT~0 0) (<= ~CELLCOUNT~0 0) (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= 0 (select |#valid| 0)) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 ~CELLCOUNT~0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-07 00:42:30,465 INFO L193 IcfgInterpreter]: Reachable states at location mainENTRY satisfy 33#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (<= |old(~CELLCOUNT~0)| 0) (<= 0 ~CELLCOUNT~0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (= 0 (select |old(#valid)| 0)) (<= 0 |old(~CELLCOUNT~0)|) (= |old(~CELLCOUNT~0)| ~CELLCOUNT~0) (<= ~CELLCOUNT~0 0) (= |#valid| |old(#valid)|) (= |#memory_int| |old(#memory_int)|) (= |#NULL.offset| 0) (= |old(~CELLCOUNT~0)| 0) (= |old(#length)| |#length|)) [2019-10-07 00:42:30,465 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initEXIT satisfy 314#(and (= ~CELLCOUNT~0 0) (= |#valid| (store |old(#valid)| 0 0)) (<= ~CELLCOUNT~0 0) (= 0 |#NULL.base|) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 ~CELLCOUNT~0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-07 00:42:30,466 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.startENTRY satisfy 6#true [2019-10-07 00:42:30,466 INFO L193 IcfgInterpreter]: Reachable states at location L18 satisfy 43#(and (<= |main_~#volArray~0.offset| 0) (= 0 |#NULL.base|) (<= 0 |main_~#volArray~0.offset|) (= |main_~#volArray~0.offset| 0) (<= 0 |#NULL.base|) (<= 0 |#NULL.offset|) (<= 0 |old(~CELLCOUNT~0)|) (= 2 main_~MINVAL~0) (not (= |main_~#volArray~0.base| 0)) (= |#valid| (store |old(#valid)| |main_~#volArray~0.base| 1)) (<= main_~MINVAL~0 2) (= (store |old(#length)| |main_~#volArray~0.base| (* 4 ~CELLCOUNT~0)) |#length|) (<= 1 ~CELLCOUNT~0) (<= 2 main_~MINVAL~0) (<= |#NULL.base| 0) (<= |old(~CELLCOUNT~0)| 0) (< |main_~#volArray~0.base| |#StackHeapBarrier|) (<= |#NULL.offset| 0) (= 0 (select |old(#valid)| 0)) (< 1 ~CELLCOUNT~0) (<= ~CELLCOUNT~0 2147483647) (= 0 (select |old(#valid)| |main_~#volArray~0.base|)) (= |#memory_int| |old(#memory_int)|) (= |#NULL.offset| 0) (<= 0 (+ ~CELLCOUNT~0 2147483648)) (= |old(~CELLCOUNT~0)| 0)) [2019-10-07 00:42:30,466 INFO L193 IcfgInterpreter]: Reachable states at location L22-3 satisfy 244#(and (or (and (= 0 |#NULL.base|) (= |main_~#volArray~0.offset| 0) (not (= (ite (= (ite (and (< ~CELLCOUNT~0 0) (not (= (mod ~CELLCOUNT~0 4) 0))) (+ (mod ~CELLCOUNT~0 4) (- 4)) (mod ~CELLCOUNT~0 4)) 0) 1 0) 0)) (= 2 main_~MINVAL~0) (not (= |main_~#volArray~0.base| 0)) (<= 1 main_~i~0) (= |#valid| (store |old(#valid)| |main_~#volArray~0.base| 1)) (<= main_~i~0 1) (= (store |old(#length)| |main_~#volArray~0.base| (* 4 ~CELLCOUNT~0)) |#length|) (= main_~i~0 1) (< |main_~#volArray~0.base| |#StackHeapBarrier|) (= 0 (select |old(#valid)| 0)) (< 1 ~CELLCOUNT~0) (= 0 (select |old(#valid)| |main_~#volArray~0.base|)) (= (ite (and (< ~CELLCOUNT~0 0) (not (= (mod ~CELLCOUNT~0 4) 0))) (+ (mod ~CELLCOUNT~0 4) (- 4)) (mod ~CELLCOUNT~0 4)) 0) (= |#memory_int| |old(#memory_int)|) (= |#NULL.offset| 0) (<= 0 (+ ~CELLCOUNT~0 2147483648)) (= |old(~CELLCOUNT~0)| 0)) (and (= |#NULL.base| 0) (<= 2 main_~i~0) (= main_~MINVAL~0 2) (= |main_~#volArray~0.offset| 0) (not (<= 1 main_~j~0)) (<= main_~j~0 4) (= |#NULL.offset| 0) (= |old(~CELLCOUNT~0)| 0))) (or (and (<= |main_~#volArray~0.offset| 0) (<= 1 ~CELLCOUNT~0) (<= 2 main_~MINVAL~0) (<= |#NULL.base| 0) (<= main_~j~0 1) (<= 0 |main_~#volArray~0.offset|) (<= 0 |#NULL.base|) (<= |old(~CELLCOUNT~0)| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (<= 0 |old(~CELLCOUNT~0)|) (<= ~CELLCOUNT~0 2147483647) (<= main_~MINVAL~0 2)) (and (<= |main_~#volArray~0.offset| 0) (<= 1 ~CELLCOUNT~0) (<= 2 main_~MINVAL~0) (<= |#NULL.base| 0) (<= 0 |main_~#volArray~0.offset|) (<= 0 |#NULL.base|) (<= |old(~CELLCOUNT~0)| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (<= 0 |old(~CELLCOUNT~0)|) (<= ~CELLCOUNT~0 2147483647) (<= 1 main_~i~0) (<= main_~MINVAL~0 2) (<= main_~i~0 1)))) [2019-10-07 00:42:30,466 INFO L193 IcfgInterpreter]: Reachable states at location __VERIFIER_assertENTRY satisfy 290#(and (or (and (<= 0 |__VERIFIER_assert_#in~cond|) (<= |__VERIFIER_assert_#in~cond| 0)) (and (<= 1 |__VERIFIER_assert_#in~cond|) (<= |__VERIFIER_assert_#in~cond| 1))) (or (and (<= 1 ~CELLCOUNT~0) (<= ~CELLCOUNT~0 2147483647) (= |__VERIFIER_assert_#in~cond| 1) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) (and (<= 1 ~CELLCOUNT~0) (<= ~CELLCOUNT~0 2147483647) (= |__VERIFIER_assert_#in~cond| 0) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)))) [2019-10-07 00:42:30,467 INFO L193 IcfgInterpreter]: Reachable states at location L24-3 satisfy 239#(or (and (= |#NULL.base| 0) (<= |main_~#volArray~0.offset| 0) (<= 1 ~CELLCOUNT~0) (<= 2 main_~MINVAL~0) (= main_~MINVAL~0 2) (<= |#NULL.base| 0) (<= 0 |main_~#volArray~0.offset|) (= |main_~#volArray~0.offset| 0) (<= 0 |#NULL.base|) (<= |old(~CELLCOUNT~0)| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (<= 0 |old(~CELLCOUNT~0)|) (<= ~CELLCOUNT~0 2147483647) (<= 1 main_~i~0) (<= main_~MINVAL~0 2) (<= main_~j~0 4) (= |#NULL.offset| 0) (= |old(~CELLCOUNT~0)| 0)) (and (<= |main_~#volArray~0.offset| 0) (<= 4 main_~j~0) (= 0 |#NULL.base|) (<= 0 |main_~#volArray~0.offset|) (= |main_~#volArray~0.offset| 0) (<= 0 |#NULL.base|) (not (= (ite (= (ite (and (< ~CELLCOUNT~0 0) (not (= (mod ~CELLCOUNT~0 4) 0))) (+ (mod ~CELLCOUNT~0 4) (- 4)) (mod ~CELLCOUNT~0 4)) 0) 1 0) 0)) (= main_~j~0 4) (<= 0 |#NULL.offset|) (<= 0 |old(~CELLCOUNT~0)|) (= 2 main_~MINVAL~0) (not (= |main_~#volArray~0.base| 0)) (<= 1 main_~i~0) (= |#valid| (store |old(#valid)| |main_~#volArray~0.base| 1)) (<= main_~MINVAL~0 2) (<= main_~i~0 1) (= (store |old(#length)| |main_~#volArray~0.base| (* 4 ~CELLCOUNT~0)) |#length|) (<= 1 ~CELLCOUNT~0) (<= main_~i~0 (ite (and (< ~CELLCOUNT~0 0) (not (= (mod ~CELLCOUNT~0 4) 0))) (+ (div ~CELLCOUNT~0 4) 1) (div ~CELLCOUNT~0 4))) (<= 2 main_~MINVAL~0) (<= |#NULL.base| 0) (= main_~i~0 1) (<= |old(~CELLCOUNT~0)| 0) (< |main_~#volArray~0.base| |#StackHeapBarrier|) (<= |#NULL.offset| 0) (= 0 (select |old(#valid)| 0)) (< 1 ~CELLCOUNT~0) (<= ~CELLCOUNT~0 2147483647) (= 0 (select |old(#valid)| |main_~#volArray~0.base|)) (= (ite (and (< ~CELLCOUNT~0 0) (not (= (mod ~CELLCOUNT~0 4) 0))) (+ (mod ~CELLCOUNT~0 4) (- 4)) (mod ~CELLCOUNT~0 4)) 0) (<= main_~j~0 4) (= |#memory_int| |old(#memory_int)|) (= |#NULL.offset| 0) (<= 0 (+ ~CELLCOUNT~0 2147483648)) (= |old(~CELLCOUNT~0)| 0))) [2019-10-07 00:42:31,420 WARN L191 SmtUtils]: Spent 180.00 ms on a formula simplification. DAG size of input: 83 DAG size of output: 61 [2019-10-07 00:42:32,001 WARN L191 SmtUtils]: Spent 101.00 ms on a formula simplification. DAG size of input: 32 DAG size of output: 25 [2019-10-07 00:42:32,002 INFO L211 tionRefinementEngine]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2019-10-07 00:42:32,002 INFO L224 tionRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 14, 12, 12] total 41 [2019-10-07 00:42:32,003 INFO L442 AbstractCegarLoop]: Interpolant automaton has 41 states [2019-10-07 00:42:32,004 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 41 interpolants. [2019-10-07 00:42:32,005 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=191, Invalid=1449, Unknown=0, NotChecked=0, Total=1640 [2019-10-07 00:42:32,005 INFO L87 Difference]: Start difference. First operand 23 states and 25 transitions. Second operand 41 states. [2019-10-07 00:42:32,374 WARN L191 SmtUtils]: Spent 139.00 ms on a formula simplification. DAG size of input: 66 DAG size of output: 52 [2019-10-07 00:42:32,585 WARN L191 SmtUtils]: Spent 155.00 ms on a formula simplification. DAG size of input: 75 DAG size of output: 56 [2019-10-07 00:42:33,185 WARN L191 SmtUtils]: Spent 246.00 ms on a formula simplification. DAG size of input: 104 DAG size of output: 80 [2019-10-07 00:42:33,586 WARN L191 SmtUtils]: Spent 186.00 ms on a formula simplification. DAG size of input: 107 DAG size of output: 68 [2019-10-07 00:42:34,111 WARN L191 SmtUtils]: Spent 359.00 ms on a formula simplification. DAG size of input: 118 DAG size of output: 100 [2019-10-07 00:42:36,414 WARN L191 SmtUtils]: Spent 2.21 s on a formula simplification. DAG size of input: 82 DAG size of output: 67 [2019-10-07 00:42:36,667 WARN L191 SmtUtils]: Spent 180.00 ms on a formula simplification. DAG size of input: 73 DAG size of output: 58 [2019-10-07 00:42:36,975 WARN L191 SmtUtils]: Spent 222.00 ms on a formula simplification. DAG size of input: 79 DAG size of output: 78 [2019-10-07 00:42:37,205 WARN L191 SmtUtils]: Spent 171.00 ms on a formula simplification. DAG size of input: 74 DAG size of output: 59 [2019-10-07 00:42:39,723 WARN L191 SmtUtils]: Spent 153.00 ms on a formula simplification. DAG size of input: 69 DAG size of output: 67 [2019-10-07 00:42:40,236 WARN L191 SmtUtils]: Spent 160.00 ms on a formula simplification. DAG size of input: 81 DAG size of output: 57 [2019-10-07 00:42:40,504 WARN L191 SmtUtils]: Spent 169.00 ms on a formula simplification. DAG size of input: 82 DAG size of output: 58 [2019-10-07 00:42:42,917 WARN L191 SmtUtils]: Spent 2.13 s on a formula simplification. DAG size of input: 68 DAG size of output: 54 [2019-10-07 00:42:43,156 WARN L191 SmtUtils]: Spent 165.00 ms on a formula simplification. DAG size of input: 69 DAG size of output: 55 [2019-10-07 00:42:43,734 WARN L191 SmtUtils]: Spent 113.00 ms on a formula simplification. DAG size of input: 59 DAG size of output: 45 [2019-10-07 00:42:43,801 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-07 00:42:43,802 INFO L93 Difference]: Finished difference Result 62 states and 72 transitions. [2019-10-07 00:42:43,803 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 36 states. [2019-10-07 00:42:43,803 INFO L78 Accepts]: Start accepts. Automaton has 41 states. Word has length 19 [2019-10-07 00:42:43,803 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-07 00:42:43,810 INFO L225 Difference]: With dead ends: 62 [2019-10-07 00:42:43,811 INFO L226 Difference]: Without dead ends: 60 [2019-10-07 00:42:43,816 INFO L606 BasicCegarLoop]: 0 DeclaredPredicates, 99 GetRequests, 27 SyntacticMatches, 4 SemanticMatches, 68 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1231 ImplicationChecksByTransitivity, 11.2s TimeCoverageRelationStatistics Valid=603, Invalid=4227, Unknown=0, NotChecked=0, Total=4830 [2019-10-07 00:42:43,817 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 60 states. [2019-10-07 00:42:43,854 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 60 to 47. [2019-10-07 00:42:43,854 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 47 states. [2019-10-07 00:42:43,855 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 47 states to 47 states and 53 transitions. [2019-10-07 00:42:43,855 INFO L78 Accepts]: Start accepts. Automaton has 47 states and 53 transitions. Word has length 19 [2019-10-07 00:42:43,856 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-07 00:42:43,856 INFO L462 AbstractCegarLoop]: Abstraction has 47 states and 53 transitions. [2019-10-07 00:42:43,856 INFO L463 AbstractCegarLoop]: Interpolant automaton has 41 states. [2019-10-07 00:42:43,856 INFO L276 IsEmpty]: Start isEmpty. Operand 47 states and 53 transitions. [2019-10-07 00:42:43,858 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2019-10-07 00:42:43,858 INFO L377 BasicCegarLoop]: Found error trace [2019-10-07 00:42:43,859 INFO L385 BasicCegarLoop]: trace histogram [8, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-07 00:42:44,060 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-07 00:42:44,062 INFO L410 AbstractCegarLoop]: === Iteration 5 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-07 00:42:44,063 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-07 00:42:44,063 INFO L82 PathProgramCache]: Analyzing trace with hash 266885692, now seen corresponding path program 1 times [2019-10-07 00:42:44,063 INFO L150 tionRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-10-07 00:42:44,064 INFO L231 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2019-10-07 00:42:44,064 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-07 00:42:44,064 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-07 00:42:44,064 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-07 00:42:44,138 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-07 00:42:44,879 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 2 proven. 50 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-10-07 00:42:44,879 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2019-10-07 00:42:44,879 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2019-10-07 00:42:44,879 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-07 00:42:44,963 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-07 00:42:44,965 INFO L256 TraceCheckSpWp]: Trace formula consists of 133 conjuncts, 42 conjunts are in the unsatisfiable core [2019-10-07 00:42:44,968 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2019-10-07 00:42:45,124 WARN L225 Elim1Store]: Array PQE input equivalent to false [2019-10-07 00:42:45,250 WARN L225 Elim1Store]: Array PQE input equivalent to false [2019-10-07 00:42:45,514 WARN L225 Elim1Store]: Array PQE input equivalent to false [2019-10-07 00:42:45,792 WARN L225 Elim1Store]: Array PQE input equivalent to false [2019-10-07 00:42:45,798 WARN L225 Elim1Store]: Array PQE input equivalent to false [2019-10-07 00:42:45,969 WARN L191 SmtUtils]: Spent 110.00 ms on a formula simplification. DAG size of input: 71 DAG size of output: 50 [2019-10-07 00:42:46,330 WARN L225 Elim1Store]: Array PQE input equivalent to false [2019-10-07 00:42:49,274 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-10-07 00:42:49,274 INFO L322 TraceCheckSpWp]: Computing backward predicates... [2019-10-07 00:43:05,803 WARN L191 SmtUtils]: Spent 400.00 ms on a formula simplification. DAG size of input: 126 DAG size of output: 40 [2019-10-07 00:43:06,089 WARN L191 SmtUtils]: Spent 193.00 ms on a formula simplification. DAG size of input: 76 DAG size of output: 39 [2019-10-07 00:43:06,309 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 22 proven. 29 refuted. 1 times theorem prover too weak. 0 trivial. 0 not checked. [2019-10-07 00:43:06,309 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSifa [2019-10-07 00:43:06,310 INFO L162 IcfgInterpreter]: Started Sifa with 18 locations of interest [2019-10-07 00:43:06,311 INFO L169 IcfgInterpreter]: Building call graph [2019-10-07 00:43:06,311 INFO L174 IcfgInterpreter]: Initial procedures are [ULTIMATE.start] [2019-10-07 00:43:06,311 INFO L179 IcfgInterpreter]: Starting interpretation [2019-10-07 00:43:06,312 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.start with input of size 1 for LOIs [2019-10-07 00:43:06,337 INFO L199 IcfgInterpreter]: Interpreting procedure main with input of size 27 for LOIs [2019-10-07 00:43:06,488 WARN L225 Elim1Store]: Array PQE input equivalent to false [2019-10-07 00:43:07,463 INFO L199 IcfgInterpreter]: Interpreting procedure __VERIFIER_assert with input of size 17 for LOIs [2019-10-07 00:43:07,493 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.init with input of size 13 for LOIs [2019-10-07 00:43:07,496 INFO L183 IcfgInterpreter]: Interpretation finished [2019-10-07 00:43:07,497 INFO L191 IcfgInterpreter]: Final predicates for locations of interest are: [2019-10-07 00:43:07,497 INFO L193 IcfgInterpreter]: Reachable states at location L11 satisfy 38#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (<= |old(~CELLCOUNT~0)| 0) (= 0 (select |old(#valid)| 0)) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (<= 0 |old(~CELLCOUNT~0)|) (<= ~CELLCOUNT~0 2147483647) (= |#valid| |old(#valid)|) (= |#memory_int| |old(#memory_int)|) (= |#NULL.offset| 0) (<= 0 (+ ~CELLCOUNT~0 2147483648)) (= |old(~CELLCOUNT~0)| 0) (= |old(#length)| |#length|)) [2019-10-07 00:43:07,497 INFO L193 IcfgInterpreter]: Reachable states at location L3-1 satisfy 658#(and (or (and (= |__VERIFIER_assert_#in~cond| 0) (= 0 __VERIFIER_assert_~cond) (= |__VERIFIER_assert_#in~cond| __VERIFIER_assert_~cond)) (and (= |__VERIFIER_assert_#in~cond| 1) (= 0 __VERIFIER_assert_~cond) (= |__VERIFIER_assert_#in~cond| __VERIFIER_assert_~cond))) (<= 1 ~CELLCOUNT~0) (<= ~CELLCOUNT~0 2147483647) (<= __VERIFIER_assert_~cond 0) (<= |#NULL.base| 0) (<= 0 |__VERIFIER_assert_#in~cond|) (<= |__VERIFIER_assert_#in~cond| 0) (<= 0 |#NULL.base|) (<= 0 __VERIFIER_assert_~cond) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-07 00:43:07,498 INFO L193 IcfgInterpreter]: Reachable states at location __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION satisfy 663#(and (or (and (= |__VERIFIER_assert_#in~cond| 0) (= 0 __VERIFIER_assert_~cond) (= |__VERIFIER_assert_#in~cond| __VERIFIER_assert_~cond)) (and (= |__VERIFIER_assert_#in~cond| 1) (= 0 __VERIFIER_assert_~cond) (= |__VERIFIER_assert_#in~cond| __VERIFIER_assert_~cond))) (<= 1 ~CELLCOUNT~0) (<= ~CELLCOUNT~0 2147483647) (<= __VERIFIER_assert_~cond 0) (<= |#NULL.base| 0) (<= 0 |__VERIFIER_assert_#in~cond|) (<= |__VERIFIER_assert_#in~cond| 0) (<= 0 |#NULL.base|) (<= 0 __VERIFIER_assert_~cond) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-07 00:43:07,498 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initENTRY satisfy 667#(and (= |old(~CELLCOUNT~0)| ~CELLCOUNT~0) (= |old(#NULL.base)| |#NULL.base|) (= |#valid| |old(#valid)|) (= |#NULL.offset| |old(#NULL.offset)|)) [2019-10-07 00:43:07,498 INFO L193 IcfgInterpreter]: Reachable states at location __VERIFIER_assertEXIT satisfy 653#(and (<= 1 __VERIFIER_assert_~cond) (<= 1 |__VERIFIER_assert_#in~cond|) (<= __VERIFIER_assert_~cond 1) (<= |__VERIFIER_assert_#in~cond| 1) (or (and (<= 1 ~CELLCOUNT~0) (<= ~CELLCOUNT~0 2147483647) (= |__VERIFIER_assert_#in~cond| 1) (<= |#NULL.base| 0) (not (= 0 __VERIFIER_assert_~cond)) (<= 0 |#NULL.base|) (= |__VERIFIER_assert_#in~cond| __VERIFIER_assert_~cond)) (and (<= 1 ~CELLCOUNT~0) (<= ~CELLCOUNT~0 2147483647) (= |__VERIFIER_assert_#in~cond| 0) (<= |#NULL.base| 0) (not (= 0 __VERIFIER_assert_~cond)) (<= 0 |#NULL.base|) (= |__VERIFIER_assert_#in~cond| __VERIFIER_assert_~cond))) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-07 00:43:07,498 INFO L193 IcfgInterpreter]: Reachable states at location L37-3 satisfy 414#(and (or (and (= |#NULL.base| 0) (= main_~MINVAL~0 2) (= |main_~#volArray~0.offset| 0) (= |#NULL.offset| 0) (= |old(~CELLCOUNT~0)| 0) (= main_~i~0 0)) (and (<= |main_~#volArray~0.offset| 0) (<= 1 ~CELLCOUNT~0) (<= 2 main_~MINVAL~0) (<= |#NULL.base| 0) (<= 0 |main_~#volArray~0.offset|) (<= 0 |#NULL.base|) (<= |old(~CELLCOUNT~0)| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (<= 0 |old(~CELLCOUNT~0)|) (<= ~CELLCOUNT~0 2147483647) (<= 1 main_~i~0) (<= main_~MINVAL~0 2))) (or (and (<= |main_~#volArray~0.offset| 0) (<= 1 ~CELLCOUNT~0) (<= 2 main_~MINVAL~0) (<= |#NULL.base| 0) (<= 0 |main_~#volArray~0.offset|) (<= 0 |#NULL.base|) (<= |old(~CELLCOUNT~0)| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (<= 0 |old(~CELLCOUNT~0)|) (<= ~CELLCOUNT~0 2147483647) (<= 1 main_~i~0) (<= main_~MINVAL~0 2)) (and (<= |main_~#volArray~0.offset| 0) (<= 1 ~CELLCOUNT~0) (<= 0 main_~i~0) (<= 2 main_~MINVAL~0) (<= |#NULL.base| 0) (<= 0 |main_~#volArray~0.offset|) (<= 0 |#NULL.base|) (<= |old(~CELLCOUNT~0)| 0) (<= main_~i~0 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (<= 0 |old(~CELLCOUNT~0)|) (<= ~CELLCOUNT~0 2147483647) (<= main_~MINVAL~0 2)))) [2019-10-07 00:43:07,499 INFO L193 IcfgInterpreter]: Reachable states at location L3-3 satisfy 648#(and (<= 1 __VERIFIER_assert_~cond) (<= 1 |__VERIFIER_assert_#in~cond|) (<= __VERIFIER_assert_~cond 1) (<= |__VERIFIER_assert_#in~cond| 1) (or (and (<= 1 ~CELLCOUNT~0) (<= ~CELLCOUNT~0 2147483647) (= |__VERIFIER_assert_#in~cond| 1) (<= |#NULL.base| 0) (not (= 0 __VERIFIER_assert_~cond)) (<= 0 |#NULL.base|) (= |__VERIFIER_assert_#in~cond| __VERIFIER_assert_~cond)) (and (<= 1 ~CELLCOUNT~0) (<= ~CELLCOUNT~0 2147483647) (= |__VERIFIER_assert_#in~cond| 0) (<= |#NULL.base| 0) (not (= 0 __VERIFIER_assert_~cond)) (<= 0 |#NULL.base|) (= |__VERIFIER_assert_#in~cond| __VERIFIER_assert_~cond))) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-07 00:43:07,499 INFO L193 IcfgInterpreter]: Reachable states at location L39-3 satisfy 565#(and (<= |main_~#volArray~0.offset| 0) (<= 1 ~CELLCOUNT~0) |main_#t~short7| (<= 0 main_~i~0) (<= 2 main_~MINVAL~0) (<= |#NULL.base| 0) (<= 0 |main_~#volArray~0.offset|) (<= 0 |#NULL.base|) (<= |old(~CELLCOUNT~0)| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (<= 0 |old(~CELLCOUNT~0)|) (<= ~CELLCOUNT~0 2147483647) (<= main_~MINVAL~0 2)) [2019-10-07 00:43:07,499 INFO L193 IcfgInterpreter]: Reachable states at location L3 satisfy 643#(and (or (and (= |__VERIFIER_assert_#in~cond| 1) (= |__VERIFIER_assert_#in~cond| __VERIFIER_assert_~cond)) (and (= |__VERIFIER_assert_#in~cond| 0) (= |__VERIFIER_assert_#in~cond| __VERIFIER_assert_~cond))) (or (and (<= 1 ~CELLCOUNT~0) (<= ~CELLCOUNT~0 2147483647) (<= __VERIFIER_assert_~cond 0) (<= |#NULL.base| 0) (<= 0 |__VERIFIER_assert_#in~cond|) (<= |__VERIFIER_assert_#in~cond| 0) (<= 0 |#NULL.base|) (<= 0 __VERIFIER_assert_~cond) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) (and (<= 1 ~CELLCOUNT~0) (<= ~CELLCOUNT~0 2147483647) (<= |#NULL.base| 0) (<= 1 __VERIFIER_assert_~cond) (<= 0 |#NULL.base|) (<= 1 |__VERIFIER_assert_#in~cond|) (<= __VERIFIER_assert_~cond 1) (<= |__VERIFIER_assert_#in~cond| 1) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)))) [2019-10-07 00:43:07,499 INFO L193 IcfgInterpreter]: Reachable states at location L39-2 satisfy 634#(and (<= |main_~#volArray~0.offset| 0) (<= 1 ~CELLCOUNT~0) (<= 0 main_~i~0) (<= 2 main_~MINVAL~0) (<= |#NULL.base| 0) (<= 0 |main_~#volArray~0.offset|) (<= 0 |#NULL.base|) (<= |old(~CELLCOUNT~0)| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (<= 0 |old(~CELLCOUNT~0)|) (<= ~CELLCOUNT~0 2147483647) (<= main_~MINVAL~0 2)) [2019-10-07 00:43:07,499 INFO L193 IcfgInterpreter]: Reachable states at location L-1 satisfy 23#(and (= ~CELLCOUNT~0 0) (<= ~CELLCOUNT~0 0) (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= 0 (select |#valid| 0)) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 ~CELLCOUNT~0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-07 00:43:07,500 INFO L193 IcfgInterpreter]: Reachable states at location mainENTRY satisfy 33#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (<= |old(~CELLCOUNT~0)| 0) (<= 0 ~CELLCOUNT~0) (= 0 (select |old(#valid)| 0)) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (<= 0 |old(~CELLCOUNT~0)|) (= |old(~CELLCOUNT~0)| ~CELLCOUNT~0) (<= ~CELLCOUNT~0 0) (= |#valid| |old(#valid)|) (= |#memory_int| |old(#memory_int)|) (= |#NULL.offset| 0) (= |old(~CELLCOUNT~0)| 0) (= |old(#length)| |#length|)) [2019-10-07 00:43:07,500 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initEXIT satisfy 672#(and (= ~CELLCOUNT~0 0) (= |#valid| (store |old(#valid)| 0 0)) (<= ~CELLCOUNT~0 0) (= 0 |#NULL.base|) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 ~CELLCOUNT~0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-07 00:43:07,500 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.startENTRY satisfy 6#true [2019-10-07 00:43:07,500 INFO L193 IcfgInterpreter]: Reachable states at location L18 satisfy 43#(and (<= |main_~#volArray~0.offset| 0) (= 0 |#NULL.base|) (<= 0 |main_~#volArray~0.offset|) (= |main_~#volArray~0.offset| 0) (<= 0 |#NULL.base|) (<= 0 |#NULL.offset|) (<= 0 |old(~CELLCOUNT~0)|) (= 2 main_~MINVAL~0) (not (= |main_~#volArray~0.base| 0)) (= |#valid| (store |old(#valid)| |main_~#volArray~0.base| 1)) (<= main_~MINVAL~0 2) (= (store |old(#length)| |main_~#volArray~0.base| (* 4 ~CELLCOUNT~0)) |#length|) (<= 1 ~CELLCOUNT~0) (<= 2 main_~MINVAL~0) (<= |#NULL.base| 0) (<= |old(~CELLCOUNT~0)| 0) (< |main_~#volArray~0.base| |#StackHeapBarrier|) (= 0 (select |old(#valid)| 0)) (<= |#NULL.offset| 0) (< 1 ~CELLCOUNT~0) (<= ~CELLCOUNT~0 2147483647) (= 0 (select |old(#valid)| |main_~#volArray~0.base|)) (= |#memory_int| |old(#memory_int)|) (= |#NULL.offset| 0) (<= 0 (+ ~CELLCOUNT~0 2147483648)) (= |old(~CELLCOUNT~0)| 0)) [2019-10-07 00:43:07,501 INFO L193 IcfgInterpreter]: Reachable states at location L22-3 satisfy 230#(and (or (<= main_~j~0 1) (and (<= 1 main_~i~0) (<= main_~i~0 1))) (or (and (= |#NULL.base| 0) (<= |main_~#volArray~0.offset| 0) (<= 1 ~CELLCOUNT~0) (<= 2 main_~i~0) (<= 2 main_~MINVAL~0) (= main_~MINVAL~0 2) (<= |#NULL.base| 0) (<= 0 |main_~#volArray~0.offset|) (= |main_~#volArray~0.offset| 0) (not (<= 1 main_~j~0)) (<= 0 |#NULL.base|) (<= |old(~CELLCOUNT~0)| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (<= 0 |old(~CELLCOUNT~0)|) (<= ~CELLCOUNT~0 2147483647) (<= main_~MINVAL~0 2) (<= main_~j~0 4) (= |#NULL.offset| 0) (= |old(~CELLCOUNT~0)| 0)) (and (<= |main_~#volArray~0.offset| 0) (= 0 |#NULL.base|) (<= 0 |main_~#volArray~0.offset|) (= |main_~#volArray~0.offset| 0) (<= 0 |#NULL.base|) (not (= (ite (= (ite (and (< ~CELLCOUNT~0 0) (not (= (mod ~CELLCOUNT~0 4) 0))) (+ (mod ~CELLCOUNT~0 4) (- 4)) (mod ~CELLCOUNT~0 4)) 0) 1 0) 0)) (<= 0 |#NULL.offset|) (<= 0 |old(~CELLCOUNT~0)|) (= 2 main_~MINVAL~0) (not (= |main_~#volArray~0.base| 0)) (<= 1 main_~i~0) (= |#valid| (store |old(#valid)| |main_~#volArray~0.base| 1)) (<= main_~MINVAL~0 2) (<= main_~i~0 1) (= (store |old(#length)| |main_~#volArray~0.base| (* 4 ~CELLCOUNT~0)) |#length|) (<= 1 ~CELLCOUNT~0) (<= 2 main_~MINVAL~0) (<= |#NULL.base| 0) (= main_~i~0 1) (<= |old(~CELLCOUNT~0)| 0) (< |main_~#volArray~0.base| |#StackHeapBarrier|) (= 0 (select |old(#valid)| 0)) (<= |#NULL.offset| 0) (< 1 ~CELLCOUNT~0) (<= ~CELLCOUNT~0 2147483647) (= 0 (select |old(#valid)| |main_~#volArray~0.base|)) (= (ite (and (< ~CELLCOUNT~0 0) (not (= (mod ~CELLCOUNT~0 4) 0))) (+ (mod ~CELLCOUNT~0 4) (- 4)) (mod ~CELLCOUNT~0 4)) 0) (= |#memory_int| |old(#memory_int)|) (= |#NULL.offset| 0) (<= 0 (+ ~CELLCOUNT~0 2147483648)) (= |old(~CELLCOUNT~0)| 0)))) [2019-10-07 00:43:07,501 INFO L193 IcfgInterpreter]: Reachable states at location __VERIFIER_assertENTRY satisfy 638#(and (or (and (<= 0 |__VERIFIER_assert_#in~cond|) (<= |__VERIFIER_assert_#in~cond| 0)) (and (<= 1 |__VERIFIER_assert_#in~cond|) (<= |__VERIFIER_assert_#in~cond| 1))) (or (and (<= 1 ~CELLCOUNT~0) (<= ~CELLCOUNT~0 2147483647) (= |__VERIFIER_assert_#in~cond| 1) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) (and (<= 1 ~CELLCOUNT~0) (<= ~CELLCOUNT~0 2147483647) (= |__VERIFIER_assert_#in~cond| 0) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)))) [2019-10-07 00:43:07,501 INFO L193 IcfgInterpreter]: Reachable states at location L24-3 satisfy 225#(and (or (and (= |#NULL.base| 0) (<= |main_~#volArray~0.offset| 0) (<= 1 ~CELLCOUNT~0) (<= 2 main_~MINVAL~0) (= main_~MINVAL~0 2) (<= |#NULL.base| 0) (<= 0 |main_~#volArray~0.offset|) (= |main_~#volArray~0.offset| 0) (<= 0 |#NULL.base|) (<= |old(~CELLCOUNT~0)| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (<= 0 |old(~CELLCOUNT~0)|) (= |#NULL.offset| 0) (= |old(~CELLCOUNT~0)| 0)) (and (<= |main_~#volArray~0.offset| 0) (<= 4 main_~j~0) (= 0 |#NULL.base|) (<= 0 |main_~#volArray~0.offset|) (= |main_~#volArray~0.offset| 0) (<= 0 |#NULL.base|) (not (= (ite (= (ite (and (< ~CELLCOUNT~0 0) (not (= (mod ~CELLCOUNT~0 4) 0))) (+ (mod ~CELLCOUNT~0 4) (- 4)) (mod ~CELLCOUNT~0 4)) 0) 1 0) 0)) (= main_~j~0 4) (<= 0 |#NULL.offset|) (<= 0 |old(~CELLCOUNT~0)|) (= 2 main_~MINVAL~0) (not (= |main_~#volArray~0.base| 0)) (= |#valid| (store |old(#valid)| |main_~#volArray~0.base| 1)) (<= main_~i~0 1) (= (store |old(#length)| |main_~#volArray~0.base| (* 4 ~CELLCOUNT~0)) |#length|) (<= 1 ~CELLCOUNT~0) (<= main_~i~0 (ite (and (< ~CELLCOUNT~0 0) (not (= (mod ~CELLCOUNT~0 4) 0))) (+ (div ~CELLCOUNT~0 4) 1) (div ~CELLCOUNT~0 4))) (<= 2 main_~MINVAL~0) (<= |#NULL.base| 0) (= main_~i~0 1) (<= |old(~CELLCOUNT~0)| 0) (< |main_~#volArray~0.base| |#StackHeapBarrier|) (= 0 (select |old(#valid)| 0)) (<= |#NULL.offset| 0) (< 1 ~CELLCOUNT~0) (= 0 (select |old(#valid)| |main_~#volArray~0.base|)) (= (ite (and (< ~CELLCOUNT~0 0) (not (= (mod ~CELLCOUNT~0 4) 0))) (+ (mod ~CELLCOUNT~0 4) (- 4)) (mod ~CELLCOUNT~0 4)) 0) (= |#memory_int| |old(#memory_int)|) (= |#NULL.offset| 0) (<= 0 (+ ~CELLCOUNT~0 2147483648)) (= |old(~CELLCOUNT~0)| 0))) (<= ~CELLCOUNT~0 2147483647) (<= 1 main_~i~0) (<= main_~MINVAL~0 2) (<= main_~j~0 4)) [2019-10-07 00:43:08,671 WARN L191 SmtUtils]: Spent 129.00 ms on a formula simplification. DAG size of input: 54 DAG size of output: 42 [2019-10-07 00:43:09,065 WARN L191 SmtUtils]: Spent 213.00 ms on a formula simplification. DAG size of input: 82 DAG size of output: 60 [2019-10-07 00:43:09,592 WARN L191 SmtUtils]: Spent 219.00 ms on a formula simplification. DAG size of input: 38 DAG size of output: 35 [2019-10-07 00:43:10,271 INFO L211 tionRefinementEngine]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2019-10-07 00:43:10,271 INFO L224 tionRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [20, 21, 19, 14] total 62 [2019-10-07 00:43:10,272 INFO L442 AbstractCegarLoop]: Interpolant automaton has 62 states [2019-10-07 00:43:10,273 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 62 interpolants. [2019-10-07 00:43:10,275 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=471, Invalid=3296, Unknown=15, NotChecked=0, Total=3782 [2019-10-07 00:43:10,275 INFO L87 Difference]: Start difference. First operand 47 states and 53 transitions. Second operand 62 states. [2019-10-07 00:43:10,718 WARN L191 SmtUtils]: Spent 162.00 ms on a formula simplification. DAG size of input: 61 DAG size of output: 54 [2019-10-07 00:43:10,985 WARN L191 SmtUtils]: Spent 187.00 ms on a formula simplification. DAG size of input: 65 DAG size of output: 57 [2019-10-07 00:43:11,957 WARN L191 SmtUtils]: Spent 138.00 ms on a formula simplification. DAG size of input: 116 DAG size of output: 65 [2019-10-07 00:43:13,111 WARN L191 SmtUtils]: Spent 105.00 ms on a formula simplification. DAG size of input: 76 DAG size of output: 73 [2019-10-07 00:43:17,649 WARN L191 SmtUtils]: Spent 205.00 ms on a formula simplification. DAG size of input: 119 DAG size of output: 82 [2019-10-07 00:43:18,754 WARN L191 SmtUtils]: Spent 165.00 ms on a formula simplification. DAG size of input: 133 DAG size of output: 84 [2019-10-07 00:43:19,068 WARN L191 SmtUtils]: Spent 101.00 ms on a formula simplification. DAG size of input: 86 DAG size of output: 83 [2019-10-07 00:43:29,860 WARN L191 SmtUtils]: Spent 186.00 ms on a formula simplification. DAG size of input: 113 DAG size of output: 76 [2019-10-07 00:43:36,318 WARN L191 SmtUtils]: Spent 147.00 ms on a formula simplification. DAG size of input: 130 DAG size of output: 79 [2019-10-07 00:43:54,127 WARN L191 SmtUtils]: Spent 117.00 ms on a formula simplification. DAG size of input: 99 DAG size of output: 86 [2019-10-07 00:43:58,368 WARN L191 SmtUtils]: Spent 105.00 ms on a formula simplification. DAG size of input: 92 DAG size of output: 85 [2019-10-07 00:44:05,070 WARN L191 SmtUtils]: Spent 102.00 ms on a formula simplification. DAG size of input: 93 DAG size of output: 80 [2019-10-07 00:44:13,575 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-07 00:44:13,576 INFO L93 Difference]: Finished difference Result 98 states and 110 transitions. [2019-10-07 00:44:13,577 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 51 states. [2019-10-07 00:44:13,577 INFO L78 Accepts]: Start accepts. Automaton has 62 states. Word has length 32 [2019-10-07 00:44:13,577 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-07 00:44:13,581 INFO L225 Difference]: With dead ends: 98 [2019-10-07 00:44:13,581 INFO L226 Difference]: Without dead ends: 77 [2019-10-07 00:44:13,585 INFO L606 BasicCegarLoop]: 0 DeclaredPredicates, 163 GetRequests, 52 SyntacticMatches, 7 SemanticMatches, 104 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3400 ImplicationChecksByTransitivity, 51.4s TimeCoverageRelationStatistics Valid=1292, Invalid=9812, Unknown=26, NotChecked=0, Total=11130 [2019-10-07 00:44:13,585 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 77 states. [2019-10-07 00:44:13,603 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 77 to 66. [2019-10-07 00:44:13,603 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 66 states. [2019-10-07 00:44:13,605 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 66 states to 66 states and 73 transitions. [2019-10-07 00:44:13,606 INFO L78 Accepts]: Start accepts. Automaton has 66 states and 73 transitions. Word has length 32 [2019-10-07 00:44:13,606 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-07 00:44:13,606 INFO L462 AbstractCegarLoop]: Abstraction has 66 states and 73 transitions. [2019-10-07 00:44:13,606 INFO L463 AbstractCegarLoop]: Interpolant automaton has 62 states. [2019-10-07 00:44:13,607 INFO L276 IsEmpty]: Start isEmpty. Operand 66 states and 73 transitions. [2019-10-07 00:44:13,608 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2019-10-07 00:44:13,608 INFO L377 BasicCegarLoop]: Found error trace [2019-10-07 00:44:13,608 INFO L385 BasicCegarLoop]: trace histogram [4, 4, 4, 4, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-07 00:44:13,810 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 4 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-07 00:44:13,811 INFO L410 AbstractCegarLoop]: === Iteration 6 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-07 00:44:13,812 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-07 00:44:13,812 INFO L82 PathProgramCache]: Analyzing trace with hash 1989212492, now seen corresponding path program 2 times [2019-10-07 00:44:13,812 INFO L150 tionRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-10-07 00:44:13,812 INFO L231 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2019-10-07 00:44:13,813 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-07 00:44:13,813 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-07 00:44:13,813 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-07 00:44:13,857 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-07 00:44:14,103 INFO L134 CoverageAnalysis]: Checked inductivity of 44 backedges. 12 proven. 20 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2019-10-07 00:44:14,103 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2019-10-07 00:44:14,104 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2019-10-07 00:44:14,107 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-07 00:44:14,252 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 4 check-sat command(s) [2019-10-07 00:44:14,253 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-10-07 00:44:14,254 INFO L256 TraceCheckSpWp]: Trace formula consists of 143 conjuncts, 25 conjunts are in the unsatisfiable core [2019-10-07 00:44:14,267 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2019-10-07 00:44:37,229 INFO L134 CoverageAnalysis]: Checked inductivity of 44 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2019-10-07 00:44:37,229 INFO L322 TraceCheckSpWp]: Computing backward predicates... [2019-10-07 00:44:39,402 INFO L134 CoverageAnalysis]: Checked inductivity of 44 backedges. 6 proven. 20 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2019-10-07 00:44:39,402 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSifa [2019-10-07 00:44:39,404 INFO L162 IcfgInterpreter]: Started Sifa with 18 locations of interest [2019-10-07 00:44:39,404 INFO L169 IcfgInterpreter]: Building call graph [2019-10-07 00:44:39,405 INFO L174 IcfgInterpreter]: Initial procedures are [ULTIMATE.start] [2019-10-07 00:44:39,405 INFO L179 IcfgInterpreter]: Starting interpretation [2019-10-07 00:44:39,405 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.start with input of size 1 for LOIs [2019-10-07 00:44:39,424 INFO L199 IcfgInterpreter]: Interpreting procedure main with input of size 25 for LOIs [2019-10-07 00:44:39,546 WARN L225 Elim1Store]: Array PQE input equivalent to false [2019-10-07 00:44:40,428 INFO L199 IcfgInterpreter]: Interpreting procedure __VERIFIER_assert with input of size 17 for LOIs [2019-10-07 00:44:40,458 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.init with input of size 13 for LOIs [2019-10-07 00:44:40,461 INFO L183 IcfgInterpreter]: Interpretation finished [2019-10-07 00:44:40,461 INFO L191 IcfgInterpreter]: Final predicates for locations of interest are: [2019-10-07 00:44:40,462 INFO L193 IcfgInterpreter]: Reachable states at location L11 satisfy 38#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (<= |old(~CELLCOUNT~0)| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (= 0 (select |old(#valid)| 0)) (<= 0 |old(~CELLCOUNT~0)|) (<= ~CELLCOUNT~0 2147483647) (= |#valid| |old(#valid)|) (= |#memory_int| |old(#memory_int)|) (= |#NULL.offset| 0) (<= 0 (+ ~CELLCOUNT~0 2147483648)) (= |old(~CELLCOUNT~0)| 0) (= |old(#length)| |#length|)) [2019-10-07 00:44:40,462 INFO L193 IcfgInterpreter]: Reachable states at location L3-1 satisfy 657#(and (or (and (= |__VERIFIER_assert_#in~cond| 0) (= 0 __VERIFIER_assert_~cond) (= |__VERIFIER_assert_#in~cond| __VERIFIER_assert_~cond)) (and (= |__VERIFIER_assert_#in~cond| 1) (= 0 __VERIFIER_assert_~cond) (= |__VERIFIER_assert_#in~cond| __VERIFIER_assert_~cond))) (<= 1 ~CELLCOUNT~0) (<= ~CELLCOUNT~0 2147483647) (<= __VERIFIER_assert_~cond 0) (<= |#NULL.base| 0) (<= 0 |__VERIFIER_assert_#in~cond|) (<= |__VERIFIER_assert_#in~cond| 0) (<= 0 |#NULL.base|) (<= 0 __VERIFIER_assert_~cond) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-07 00:44:40,462 INFO L193 IcfgInterpreter]: Reachable states at location __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION satisfy 662#(and (or (and (= |__VERIFIER_assert_#in~cond| 0) (= 0 __VERIFIER_assert_~cond) (= |__VERIFIER_assert_#in~cond| __VERIFIER_assert_~cond)) (and (= |__VERIFIER_assert_#in~cond| 1) (= 0 __VERIFIER_assert_~cond) (= |__VERIFIER_assert_#in~cond| __VERIFIER_assert_~cond))) (<= 1 ~CELLCOUNT~0) (<= ~CELLCOUNT~0 2147483647) (<= __VERIFIER_assert_~cond 0) (<= |#NULL.base| 0) (<= 0 |__VERIFIER_assert_#in~cond|) (<= |__VERIFIER_assert_#in~cond| 0) (<= 0 |#NULL.base|) (<= 0 __VERIFIER_assert_~cond) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-07 00:44:40,462 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initENTRY satisfy 666#(and (= |old(~CELLCOUNT~0)| ~CELLCOUNT~0) (= |old(#NULL.base)| |#NULL.base|) (= |#valid| |old(#valid)|) (= |#NULL.offset| |old(#NULL.offset)|)) [2019-10-07 00:44:40,462 INFO L193 IcfgInterpreter]: Reachable states at location __VERIFIER_assertEXIT satisfy 652#(and (<= 1 __VERIFIER_assert_~cond) (<= 1 |__VERIFIER_assert_#in~cond|) (<= __VERIFIER_assert_~cond 1) (<= |__VERIFIER_assert_#in~cond| 1) (or (and (<= 1 ~CELLCOUNT~0) (<= ~CELLCOUNT~0 2147483647) (= |__VERIFIER_assert_#in~cond| 1) (<= |#NULL.base| 0) (not (= 0 __VERIFIER_assert_~cond)) (<= 0 |#NULL.base|) (= |__VERIFIER_assert_#in~cond| __VERIFIER_assert_~cond)) (and (<= 1 ~CELLCOUNT~0) (<= ~CELLCOUNT~0 2147483647) (= |__VERIFIER_assert_#in~cond| 0) (<= |#NULL.base| 0) (not (= 0 __VERIFIER_assert_~cond)) (<= 0 |#NULL.base|) (= |__VERIFIER_assert_#in~cond| __VERIFIER_assert_~cond))) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-07 00:44:40,463 INFO L193 IcfgInterpreter]: Reachable states at location L37-3 satisfy 413#(and (or (and (= |#NULL.base| 0) (= main_~MINVAL~0 2) (= |main_~#volArray~0.offset| 0) (= |#NULL.offset| 0) (= |old(~CELLCOUNT~0)| 0) (= main_~i~0 0)) (and (<= |main_~#volArray~0.offset| 0) (<= 1 ~CELLCOUNT~0) (<= 2 main_~MINVAL~0) (<= |#NULL.base| 0) (<= 0 |main_~#volArray~0.offset|) (<= 0 |#NULL.base|) (<= |old(~CELLCOUNT~0)| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (<= 0 |old(~CELLCOUNT~0)|) (<= ~CELLCOUNT~0 2147483647) (<= 1 main_~i~0) (<= main_~MINVAL~0 2))) (or (and (<= |main_~#volArray~0.offset| 0) (<= 1 ~CELLCOUNT~0) (<= 2 main_~MINVAL~0) (<= |#NULL.base| 0) (<= 0 |main_~#volArray~0.offset|) (<= 0 |#NULL.base|) (<= |old(~CELLCOUNT~0)| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (<= 0 |old(~CELLCOUNT~0)|) (<= ~CELLCOUNT~0 2147483647) (<= 1 main_~i~0) (<= main_~MINVAL~0 2)) (and (<= |main_~#volArray~0.offset| 0) (<= 1 ~CELLCOUNT~0) (<= 0 main_~i~0) (<= 2 main_~MINVAL~0) (<= |#NULL.base| 0) (<= 0 |main_~#volArray~0.offset|) (<= 0 |#NULL.base|) (<= |old(~CELLCOUNT~0)| 0) (<= main_~i~0 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (<= 0 |old(~CELLCOUNT~0)|) (<= ~CELLCOUNT~0 2147483647) (<= main_~MINVAL~0 2)))) [2019-10-07 00:44:40,463 INFO L193 IcfgInterpreter]: Reachable states at location L3-3 satisfy 647#(and (<= 1 __VERIFIER_assert_~cond) (<= 1 |__VERIFIER_assert_#in~cond|) (<= __VERIFIER_assert_~cond 1) (<= |__VERIFIER_assert_#in~cond| 1) (or (and (<= 1 ~CELLCOUNT~0) (<= ~CELLCOUNT~0 2147483647) (= |__VERIFIER_assert_#in~cond| 1) (<= |#NULL.base| 0) (not (= 0 __VERIFIER_assert_~cond)) (<= 0 |#NULL.base|) (= |__VERIFIER_assert_#in~cond| __VERIFIER_assert_~cond)) (and (<= 1 ~CELLCOUNT~0) (<= ~CELLCOUNT~0 2147483647) (= |__VERIFIER_assert_#in~cond| 0) (<= |#NULL.base| 0) (not (= 0 __VERIFIER_assert_~cond)) (<= 0 |#NULL.base|) (= |__VERIFIER_assert_#in~cond| __VERIFIER_assert_~cond))) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-07 00:44:40,463 INFO L193 IcfgInterpreter]: Reachable states at location L39-3 satisfy 564#(and (<= |main_~#volArray~0.offset| 0) (<= 1 ~CELLCOUNT~0) |main_#t~short7| (<= 0 main_~i~0) (<= 2 main_~MINVAL~0) (<= |#NULL.base| 0) (<= 0 |main_~#volArray~0.offset|) (<= 0 |#NULL.base|) (<= |old(~CELLCOUNT~0)| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (<= 0 |old(~CELLCOUNT~0)|) (<= ~CELLCOUNT~0 2147483647) (<= main_~MINVAL~0 2)) [2019-10-07 00:44:40,463 INFO L193 IcfgInterpreter]: Reachable states at location L3 satisfy 642#(and (or (and (= |__VERIFIER_assert_#in~cond| 1) (= |__VERIFIER_assert_#in~cond| __VERIFIER_assert_~cond)) (and (= |__VERIFIER_assert_#in~cond| 0) (= |__VERIFIER_assert_#in~cond| __VERIFIER_assert_~cond))) (or (and (<= 1 ~CELLCOUNT~0) (<= ~CELLCOUNT~0 2147483647) (<= __VERIFIER_assert_~cond 0) (<= |#NULL.base| 0) (<= 0 |__VERIFIER_assert_#in~cond|) (<= |__VERIFIER_assert_#in~cond| 0) (<= 0 |#NULL.base|) (<= 0 __VERIFIER_assert_~cond) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) (and (<= 1 ~CELLCOUNT~0) (<= ~CELLCOUNT~0 2147483647) (<= |#NULL.base| 0) (<= 1 __VERIFIER_assert_~cond) (<= 0 |#NULL.base|) (<= 1 |__VERIFIER_assert_#in~cond|) (<= __VERIFIER_assert_~cond 1) (<= |__VERIFIER_assert_#in~cond| 1) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)))) [2019-10-07 00:44:40,464 INFO L193 IcfgInterpreter]: Reachable states at location L39-2 satisfy 633#(and (<= |main_~#volArray~0.offset| 0) (<= 1 ~CELLCOUNT~0) (<= 0 main_~i~0) (<= 2 main_~MINVAL~0) (<= |#NULL.base| 0) (<= 0 |main_~#volArray~0.offset|) (<= 0 |#NULL.base|) (<= |old(~CELLCOUNT~0)| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (<= 0 |old(~CELLCOUNT~0)|) (<= ~CELLCOUNT~0 2147483647) (<= main_~MINVAL~0 2)) [2019-10-07 00:44:40,464 INFO L193 IcfgInterpreter]: Reachable states at location L-1 satisfy 23#(and (= ~CELLCOUNT~0 0) (<= ~CELLCOUNT~0 0) (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= 0 (select |#valid| 0)) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 ~CELLCOUNT~0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-07 00:44:40,464 INFO L193 IcfgInterpreter]: Reachable states at location mainENTRY satisfy 33#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (<= |old(~CELLCOUNT~0)| 0) (<= 0 ~CELLCOUNT~0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (= 0 (select |old(#valid)| 0)) (<= 0 |old(~CELLCOUNT~0)|) (= |old(~CELLCOUNT~0)| ~CELLCOUNT~0) (<= ~CELLCOUNT~0 0) (= |#valid| |old(#valid)|) (= |#memory_int| |old(#memory_int)|) (= |#NULL.offset| 0) (= |old(~CELLCOUNT~0)| 0) (= |old(#length)| |#length|)) [2019-10-07 00:44:40,464 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initEXIT satisfy 671#(and (= ~CELLCOUNT~0 0) (= |#valid| (store |old(#valid)| 0 0)) (<= ~CELLCOUNT~0 0) (= 0 |#NULL.base|) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 ~CELLCOUNT~0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-07 00:44:40,464 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.startENTRY satisfy 6#true [2019-10-07 00:44:40,464 INFO L193 IcfgInterpreter]: Reachable states at location L18 satisfy 43#(and (<= |main_~#volArray~0.offset| 0) (= 0 |#NULL.base|) (<= 0 |main_~#volArray~0.offset|) (= |main_~#volArray~0.offset| 0) (<= 0 |#NULL.base|) (<= 0 |#NULL.offset|) (<= 0 |old(~CELLCOUNT~0)|) (= 2 main_~MINVAL~0) (not (= |main_~#volArray~0.base| 0)) (= |#valid| (store |old(#valid)| |main_~#volArray~0.base| 1)) (<= main_~MINVAL~0 2) (= (store |old(#length)| |main_~#volArray~0.base| (* 4 ~CELLCOUNT~0)) |#length|) (<= 1 ~CELLCOUNT~0) (<= 2 main_~MINVAL~0) (<= |#NULL.base| 0) (<= |old(~CELLCOUNT~0)| 0) (< |main_~#volArray~0.base| |#StackHeapBarrier|) (<= |#NULL.offset| 0) (= 0 (select |old(#valid)| 0)) (< 1 ~CELLCOUNT~0) (<= ~CELLCOUNT~0 2147483647) (= 0 (select |old(#valid)| |main_~#volArray~0.base|)) (= |#memory_int| |old(#memory_int)|) (= |#NULL.offset| 0) (<= 0 (+ ~CELLCOUNT~0 2147483648)) (= |old(~CELLCOUNT~0)| 0)) [2019-10-07 00:44:40,464 INFO L193 IcfgInterpreter]: Reachable states at location L22-3 satisfy 230#(and (or (and (= 0 |#NULL.base|) (= |main_~#volArray~0.offset| 0) (not (= (ite (= (ite (and (< ~CELLCOUNT~0 0) (not (= (mod ~CELLCOUNT~0 4) 0))) (+ (mod ~CELLCOUNT~0 4) (- 4)) (mod ~CELLCOUNT~0 4)) 0) 1 0) 0)) (= 2 main_~MINVAL~0) (not (= |main_~#volArray~0.base| 0)) (<= 1 main_~i~0) (= |#valid| (store |old(#valid)| |main_~#volArray~0.base| 1)) (<= main_~i~0 1) (= (store |old(#length)| |main_~#volArray~0.base| (* 4 ~CELLCOUNT~0)) |#length|) (= main_~i~0 1) (< |main_~#volArray~0.base| |#StackHeapBarrier|) (= 0 (select |old(#valid)| 0)) (< 1 ~CELLCOUNT~0) (= 0 (select |old(#valid)| |main_~#volArray~0.base|)) (= (ite (and (< ~CELLCOUNT~0 0) (not (= (mod ~CELLCOUNT~0 4) 0))) (+ (mod ~CELLCOUNT~0 4) (- 4)) (mod ~CELLCOUNT~0 4)) 0) (= |#memory_int| |old(#memory_int)|) (= |#NULL.offset| 0) (<= 0 (+ ~CELLCOUNT~0 2147483648)) (= |old(~CELLCOUNT~0)| 0)) (and (= |#NULL.base| 0) (<= 2 main_~i~0) (= main_~MINVAL~0 2) (= |main_~#volArray~0.offset| 0) (not (<= 1 main_~j~0)) (<= main_~j~0 4) (= |#NULL.offset| 0) (= |old(~CELLCOUNT~0)| 0))) (or (and (<= |main_~#volArray~0.offset| 0) (<= 1 ~CELLCOUNT~0) (<= 2 main_~MINVAL~0) (<= |#NULL.base| 0) (<= main_~j~0 1) (<= 0 |main_~#volArray~0.offset|) (<= 0 |#NULL.base|) (<= |old(~CELLCOUNT~0)| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (<= 0 |old(~CELLCOUNT~0)|) (<= ~CELLCOUNT~0 2147483647) (<= main_~MINVAL~0 2)) (and (<= |main_~#volArray~0.offset| 0) (<= 1 ~CELLCOUNT~0) (<= 2 main_~MINVAL~0) (<= |#NULL.base| 0) (<= 0 |main_~#volArray~0.offset|) (<= 0 |#NULL.base|) (<= |old(~CELLCOUNT~0)| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (<= 0 |old(~CELLCOUNT~0)|) (<= ~CELLCOUNT~0 2147483647) (<= 1 main_~i~0) (<= main_~MINVAL~0 2) (<= main_~i~0 1)))) [2019-10-07 00:44:40,465 INFO L193 IcfgInterpreter]: Reachable states at location __VERIFIER_assertENTRY satisfy 637#(and (or (and (<= 0 |__VERIFIER_assert_#in~cond|) (<= |__VERIFIER_assert_#in~cond| 0)) (and (<= 1 |__VERIFIER_assert_#in~cond|) (<= |__VERIFIER_assert_#in~cond| 1))) (or (and (<= 1 ~CELLCOUNT~0) (<= ~CELLCOUNT~0 2147483647) (= |__VERIFIER_assert_#in~cond| 1) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) (and (<= 1 ~CELLCOUNT~0) (<= ~CELLCOUNT~0 2147483647) (= |__VERIFIER_assert_#in~cond| 0) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)))) [2019-10-07 00:44:40,465 INFO L193 IcfgInterpreter]: Reachable states at location L24-3 satisfy 225#(or (and (= |#NULL.base| 0) (<= |main_~#volArray~0.offset| 0) (<= 1 ~CELLCOUNT~0) (<= 2 main_~MINVAL~0) (= main_~MINVAL~0 2) (<= |#NULL.base| 0) (<= 0 |main_~#volArray~0.offset|) (= |main_~#volArray~0.offset| 0) (<= 0 |#NULL.base|) (<= |old(~CELLCOUNT~0)| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (<= 0 |old(~CELLCOUNT~0)|) (<= ~CELLCOUNT~0 2147483647) (<= 1 main_~i~0) (<= main_~MINVAL~0 2) (<= main_~j~0 4) (= |#NULL.offset| 0) (= |old(~CELLCOUNT~0)| 0)) (and (<= |main_~#volArray~0.offset| 0) (<= 4 main_~j~0) (= 0 |#NULL.base|) (<= 0 |main_~#volArray~0.offset|) (= |main_~#volArray~0.offset| 0) (<= 0 |#NULL.base|) (not (= (ite (= (ite (and (< ~CELLCOUNT~0 0) (not (= (mod ~CELLCOUNT~0 4) 0))) (+ (mod ~CELLCOUNT~0 4) (- 4)) (mod ~CELLCOUNT~0 4)) 0) 1 0) 0)) (= main_~j~0 4) (<= 0 |#NULL.offset|) (<= 0 |old(~CELLCOUNT~0)|) (= 2 main_~MINVAL~0) (not (= |main_~#volArray~0.base| 0)) (<= 1 main_~i~0) (= |#valid| (store |old(#valid)| |main_~#volArray~0.base| 1)) (<= main_~MINVAL~0 2) (<= main_~i~0 1) (= (store |old(#length)| |main_~#volArray~0.base| (* 4 ~CELLCOUNT~0)) |#length|) (<= 1 ~CELLCOUNT~0) (<= main_~i~0 (ite (and (< ~CELLCOUNT~0 0) (not (= (mod ~CELLCOUNT~0 4) 0))) (+ (div ~CELLCOUNT~0 4) 1) (div ~CELLCOUNT~0 4))) (<= 2 main_~MINVAL~0) (<= |#NULL.base| 0) (= main_~i~0 1) (<= |old(~CELLCOUNT~0)| 0) (< |main_~#volArray~0.base| |#StackHeapBarrier|) (<= |#NULL.offset| 0) (= 0 (select |old(#valid)| 0)) (< 1 ~CELLCOUNT~0) (<= ~CELLCOUNT~0 2147483647) (= 0 (select |old(#valid)| |main_~#volArray~0.base|)) (= (ite (and (< ~CELLCOUNT~0 0) (not (= (mod ~CELLCOUNT~0 4) 0))) (+ (mod ~CELLCOUNT~0 4) (- 4)) (mod ~CELLCOUNT~0 4)) 0) (<= main_~j~0 4) (= |#memory_int| |old(#memory_int)|) (= |#NULL.offset| 0) (<= 0 (+ ~CELLCOUNT~0 2147483648)) (= |old(~CELLCOUNT~0)| 0))) [2019-10-07 00:44:41,269 WARN L191 SmtUtils]: Spent 196.00 ms on a formula simplification. DAG size of input: 83 DAG size of output: 61 [2019-10-07 00:44:41,712 WARN L191 SmtUtils]: Spent 214.00 ms on a formula simplification. DAG size of input: 38 DAG size of output: 35 [2019-10-07 00:44:42,332 INFO L211 tionRefinementEngine]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2019-10-07 00:44:42,333 INFO L224 tionRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 14, 13, 14] total 42 [2019-10-07 00:44:42,334 INFO L442 AbstractCegarLoop]: Interpolant automaton has 42 states [2019-10-07 00:44:42,334 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 42 interpolants. [2019-10-07 00:44:42,335 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=155, Invalid=1562, Unknown=5, NotChecked=0, Total=1722 [2019-10-07 00:44:42,335 INFO L87 Difference]: Start difference. First operand 66 states and 73 transitions. Second operand 42 states. [2019-10-07 00:44:42,654 WARN L191 SmtUtils]: Spent 136.00 ms on a formula simplification. DAG size of input: 66 DAG size of output: 52 [2019-10-07 00:44:42,904 WARN L191 SmtUtils]: Spent 156.00 ms on a formula simplification. DAG size of input: 76 DAG size of output: 61 [2019-10-07 00:44:45,237 WARN L191 SmtUtils]: Spent 176.00 ms on a formula simplification. DAG size of input: 91 DAG size of output: 74 [2019-10-07 00:44:46,530 WARN L191 SmtUtils]: Spent 100.00 ms on a formula simplification. DAG size of input: 65 DAG size of output: 50 [2019-10-07 00:44:46,789 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-07 00:44:46,789 INFO L93 Difference]: Finished difference Result 91 states and 102 transitions. [2019-10-07 00:44:46,790 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2019-10-07 00:44:46,790 INFO L78 Accepts]: Start accepts. Automaton has 42 states. Word has length 40 [2019-10-07 00:44:46,791 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-07 00:44:46,792 INFO L225 Difference]: With dead ends: 91 [2019-10-07 00:44:46,792 INFO L226 Difference]: Without dead ends: 89 [2019-10-07 00:44:46,794 INFO L606 BasicCegarLoop]: 0 DeclaredPredicates, 165 GetRequests, 87 SyntacticMatches, 10 SemanticMatches, 68 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1360 ImplicationChecksByTransitivity, 30.1s TimeCoverageRelationStatistics Valid=512, Invalid=4313, Unknown=5, NotChecked=0, Total=4830 [2019-10-07 00:44:46,794 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 89 states. [2019-10-07 00:44:46,814 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 89 to 74. [2019-10-07 00:44:46,815 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 74 states. [2019-10-07 00:44:46,816 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 74 states to 74 states and 83 transitions. [2019-10-07 00:44:46,816 INFO L78 Accepts]: Start accepts. Automaton has 74 states and 83 transitions. Word has length 40 [2019-10-07 00:44:46,816 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-07 00:44:46,817 INFO L462 AbstractCegarLoop]: Abstraction has 74 states and 83 transitions. [2019-10-07 00:44:46,817 INFO L463 AbstractCegarLoop]: Interpolant automaton has 42 states. [2019-10-07 00:44:46,817 INFO L276 IsEmpty]: Start isEmpty. Operand 74 states and 83 transitions. [2019-10-07 00:44:46,818 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2019-10-07 00:44:46,818 INFO L377 BasicCegarLoop]: Found error trace [2019-10-07 00:44:46,819 INFO L385 BasicCegarLoop]: trace histogram [5, 5, 5, 4, 4, 4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-07 00:44:47,022 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 5 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-07 00:44:47,023 INFO L410 AbstractCegarLoop]: === Iteration 7 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-07 00:44:47,023 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-07 00:44:47,024 INFO L82 PathProgramCache]: Analyzing trace with hash 1727151488, now seen corresponding path program 3 times [2019-10-07 00:44:47,024 INFO L150 tionRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-10-07 00:44:47,024 INFO L231 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2019-10-07 00:44:47,025 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-07 00:44:47,025 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-07 00:44:47,025 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-07 00:44:47,044 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-07 00:44:47,368 INFO L134 CoverageAnalysis]: Checked inductivity of 69 backedges. 24 proven. 11 refuted. 0 times theorem prover too weak. 34 trivial. 0 not checked. [2019-10-07 00:44:47,369 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2019-10-07 00:44:47,369 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2019-10-07 00:44:47,369 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-07 00:44:47,490 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2019-10-07 00:44:47,490 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-10-07 00:44:47,491 INFO L256 TraceCheckSpWp]: Trace formula consists of 139 conjuncts, 11 conjunts are in the unsatisfiable core [2019-10-07 00:44:47,493 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2019-10-07 00:44:47,691 INFO L134 CoverageAnalysis]: Checked inductivity of 69 backedges. 34 proven. 1 refuted. 0 times theorem prover too weak. 34 trivial. 0 not checked. [2019-10-07 00:44:47,692 INFO L322 TraceCheckSpWp]: Computing backward predicates... [2019-10-07 00:44:47,828 INFO L134 CoverageAnalysis]: Checked inductivity of 69 backedges. 34 proven. 1 refuted. 0 times theorem prover too weak. 34 trivial. 0 not checked. [2019-10-07 00:44:47,829 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSifa [2019-10-07 00:44:47,830 INFO L162 IcfgInterpreter]: Started Sifa with 18 locations of interest [2019-10-07 00:44:47,830 INFO L169 IcfgInterpreter]: Building call graph [2019-10-07 00:44:47,830 INFO L174 IcfgInterpreter]: Initial procedures are [ULTIMATE.start] [2019-10-07 00:44:47,831 INFO L179 IcfgInterpreter]: Starting interpretation [2019-10-07 00:44:47,831 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.start with input of size 1 for LOIs [2019-10-07 00:44:47,855 INFO L199 IcfgInterpreter]: Interpreting procedure main with input of size 27 for LOIs [2019-10-07 00:44:47,940 WARN L225 Elim1Store]: Array PQE input equivalent to false [2019-10-07 00:44:48,788 INFO L199 IcfgInterpreter]: Interpreting procedure __VERIFIER_assert with input of size 17 for LOIs [2019-10-07 00:44:48,820 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.init with input of size 13 for LOIs [2019-10-07 00:44:48,824 INFO L183 IcfgInterpreter]: Interpretation finished [2019-10-07 00:44:48,824 INFO L191 IcfgInterpreter]: Final predicates for locations of interest are: [2019-10-07 00:44:48,824 INFO L193 IcfgInterpreter]: Reachable states at location L11 satisfy 38#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (<= |old(~CELLCOUNT~0)| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (<= 0 |old(~CELLCOUNT~0)|) (= 0 (select |old(#valid)| 0)) (<= ~CELLCOUNT~0 2147483647) (= |#valid| |old(#valid)|) (= |#memory_int| |old(#memory_int)|) (= |#NULL.offset| 0) (<= 0 (+ ~CELLCOUNT~0 2147483648)) (= |old(~CELLCOUNT~0)| 0) (= |old(#length)| |#length|)) [2019-10-07 00:44:48,824 INFO L193 IcfgInterpreter]: Reachable states at location L3-1 satisfy 653#(and (or (and (= |__VERIFIER_assert_#in~cond| 0) (= 0 __VERIFIER_assert_~cond) (= |__VERIFIER_assert_#in~cond| __VERIFIER_assert_~cond)) (and (= |__VERIFIER_assert_#in~cond| 1) (= 0 __VERIFIER_assert_~cond) (= |__VERIFIER_assert_#in~cond| __VERIFIER_assert_~cond))) (<= 1 ~CELLCOUNT~0) (<= ~CELLCOUNT~0 2147483647) (<= __VERIFIER_assert_~cond 0) (<= |#NULL.base| 0) (<= 0 |__VERIFIER_assert_#in~cond|) (<= |__VERIFIER_assert_#in~cond| 0) (<= 0 |#NULL.base|) (<= 0 __VERIFIER_assert_~cond) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-07 00:44:48,825 INFO L193 IcfgInterpreter]: Reachable states at location __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION satisfy 658#(and (or (and (= |__VERIFIER_assert_#in~cond| 0) (= 0 __VERIFIER_assert_~cond) (= |__VERIFIER_assert_#in~cond| __VERIFIER_assert_~cond)) (and (= |__VERIFIER_assert_#in~cond| 1) (= 0 __VERIFIER_assert_~cond) (= |__VERIFIER_assert_#in~cond| __VERIFIER_assert_~cond))) (<= 1 ~CELLCOUNT~0) (<= ~CELLCOUNT~0 2147483647) (<= __VERIFIER_assert_~cond 0) (<= |#NULL.base| 0) (<= 0 |__VERIFIER_assert_#in~cond|) (<= |__VERIFIER_assert_#in~cond| 0) (<= 0 |#NULL.base|) (<= 0 __VERIFIER_assert_~cond) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-07 00:44:48,825 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initENTRY satisfy 662#(and (= |old(~CELLCOUNT~0)| ~CELLCOUNT~0) (= |old(#NULL.base)| |#NULL.base|) (= |#valid| |old(#valid)|) (= |#NULL.offset| |old(#NULL.offset)|)) [2019-10-07 00:44:48,825 INFO L193 IcfgInterpreter]: Reachable states at location L37-3 satisfy 409#(and (or (and (= |#NULL.base| 0) (= main_~MINVAL~0 2) (= |main_~#volArray~0.offset| 0) (= |#NULL.offset| 0) (= |old(~CELLCOUNT~0)| 0) (= main_~i~0 0)) (and (<= |main_~#volArray~0.offset| 0) (<= 1 ~CELLCOUNT~0) (<= 2 main_~MINVAL~0) (<= |#NULL.base| 0) (<= 0 |main_~#volArray~0.offset|) (<= 0 |#NULL.base|) (<= |old(~CELLCOUNT~0)| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (<= 0 |old(~CELLCOUNT~0)|) (<= ~CELLCOUNT~0 2147483647) (<= 1 main_~i~0) (<= main_~MINVAL~0 2))) (or (and (<= |main_~#volArray~0.offset| 0) (<= 1 ~CELLCOUNT~0) (<= 2 main_~MINVAL~0) (<= |#NULL.base| 0) (<= 0 |main_~#volArray~0.offset|) (<= 0 |#NULL.base|) (<= |old(~CELLCOUNT~0)| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (<= 0 |old(~CELLCOUNT~0)|) (<= ~CELLCOUNT~0 2147483647) (<= 1 main_~i~0) (<= main_~MINVAL~0 2)) (and (<= |main_~#volArray~0.offset| 0) (<= 1 ~CELLCOUNT~0) (<= 0 main_~i~0) (<= 2 main_~MINVAL~0) (<= |#NULL.base| 0) (<= 0 |main_~#volArray~0.offset|) (<= 0 |#NULL.base|) (<= |old(~CELLCOUNT~0)| 0) (<= main_~i~0 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (<= 0 |old(~CELLCOUNT~0)|) (<= ~CELLCOUNT~0 2147483647) (<= main_~MINVAL~0 2)))) [2019-10-07 00:44:48,825 INFO L193 IcfgInterpreter]: Reachable states at location __VERIFIER_assertEXIT satisfy 648#(and (<= 1 __VERIFIER_assert_~cond) (<= 1 |__VERIFIER_assert_#in~cond|) (<= __VERIFIER_assert_~cond 1) (<= |__VERIFIER_assert_#in~cond| 1) (or (and (<= 1 ~CELLCOUNT~0) (<= ~CELLCOUNT~0 2147483647) (= |__VERIFIER_assert_#in~cond| 1) (<= |#NULL.base| 0) (not (= 0 __VERIFIER_assert_~cond)) (<= 0 |#NULL.base|) (= |__VERIFIER_assert_#in~cond| __VERIFIER_assert_~cond)) (and (<= 1 ~CELLCOUNT~0) (<= ~CELLCOUNT~0 2147483647) (= |__VERIFIER_assert_#in~cond| 0) (<= |#NULL.base| 0) (not (= 0 __VERIFIER_assert_~cond)) (<= 0 |#NULL.base|) (= |__VERIFIER_assert_#in~cond| __VERIFIER_assert_~cond))) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-07 00:44:48,826 INFO L193 IcfgInterpreter]: Reachable states at location L3-3 satisfy 643#(and (<= 1 __VERIFIER_assert_~cond) (<= 1 |__VERIFIER_assert_#in~cond|) (<= __VERIFIER_assert_~cond 1) (<= |__VERIFIER_assert_#in~cond| 1) (or (and (<= 1 ~CELLCOUNT~0) (<= ~CELLCOUNT~0 2147483647) (= |__VERIFIER_assert_#in~cond| 1) (<= |#NULL.base| 0) (not (= 0 __VERIFIER_assert_~cond)) (<= 0 |#NULL.base|) (= |__VERIFIER_assert_#in~cond| __VERIFIER_assert_~cond)) (and (<= 1 ~CELLCOUNT~0) (<= ~CELLCOUNT~0 2147483647) (= |__VERIFIER_assert_#in~cond| 0) (<= |#NULL.base| 0) (not (= 0 __VERIFIER_assert_~cond)) (<= 0 |#NULL.base|) (= |__VERIFIER_assert_#in~cond| __VERIFIER_assert_~cond))) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-07 00:44:48,826 INFO L193 IcfgInterpreter]: Reachable states at location L39-3 satisfy 560#(and (<= |main_~#volArray~0.offset| 0) (<= 1 ~CELLCOUNT~0) |main_#t~short7| (<= 0 main_~i~0) (<= 2 main_~MINVAL~0) (<= |#NULL.base| 0) (<= 0 |main_~#volArray~0.offset|) (<= 0 |#NULL.base|) (<= |old(~CELLCOUNT~0)| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (<= 0 |old(~CELLCOUNT~0)|) (<= ~CELLCOUNT~0 2147483647) (<= main_~MINVAL~0 2)) [2019-10-07 00:44:48,826 INFO L193 IcfgInterpreter]: Reachable states at location L3 satisfy 638#(and (or (and (= |__VERIFIER_assert_#in~cond| 1) (= |__VERIFIER_assert_#in~cond| __VERIFIER_assert_~cond)) (and (= |__VERIFIER_assert_#in~cond| 0) (= |__VERIFIER_assert_#in~cond| __VERIFIER_assert_~cond))) (or (and (<= 1 ~CELLCOUNT~0) (<= ~CELLCOUNT~0 2147483647) (<= __VERIFIER_assert_~cond 0) (<= |#NULL.base| 0) (<= 0 |__VERIFIER_assert_#in~cond|) (<= |__VERIFIER_assert_#in~cond| 0) (<= 0 |#NULL.base|) (<= 0 __VERIFIER_assert_~cond) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) (and (<= 1 ~CELLCOUNT~0) (<= ~CELLCOUNT~0 2147483647) (<= |#NULL.base| 0) (<= 1 __VERIFIER_assert_~cond) (<= 0 |#NULL.base|) (<= 1 |__VERIFIER_assert_#in~cond|) (<= __VERIFIER_assert_~cond 1) (<= |__VERIFIER_assert_#in~cond| 1) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)))) [2019-10-07 00:44:48,826 INFO L193 IcfgInterpreter]: Reachable states at location L39-2 satisfy 629#(and (<= |main_~#volArray~0.offset| 0) (<= 1 ~CELLCOUNT~0) (<= 0 main_~i~0) (<= 2 main_~MINVAL~0) (<= |#NULL.base| 0) (<= 0 |main_~#volArray~0.offset|) (<= 0 |#NULL.base|) (<= |old(~CELLCOUNT~0)| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (<= 0 |old(~CELLCOUNT~0)|) (<= ~CELLCOUNT~0 2147483647) (<= main_~MINVAL~0 2)) [2019-10-07 00:44:48,826 INFO L193 IcfgInterpreter]: Reachable states at location L-1 satisfy 23#(and (= ~CELLCOUNT~0 0) (<= ~CELLCOUNT~0 0) (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= 0 (select |#valid| 0)) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 ~CELLCOUNT~0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-07 00:44:48,827 INFO L193 IcfgInterpreter]: Reachable states at location mainENTRY satisfy 33#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (<= |old(~CELLCOUNT~0)| 0) (<= 0 ~CELLCOUNT~0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (<= 0 |old(~CELLCOUNT~0)|) (= 0 (select |old(#valid)| 0)) (= |old(~CELLCOUNT~0)| ~CELLCOUNT~0) (<= ~CELLCOUNT~0 0) (= |#valid| |old(#valid)|) (= |#memory_int| |old(#memory_int)|) (= |#NULL.offset| 0) (= |old(~CELLCOUNT~0)| 0) (= |old(#length)| |#length|)) [2019-10-07 00:44:48,827 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initEXIT satisfy 667#(and (= ~CELLCOUNT~0 0) (= |#valid| (store |old(#valid)| 0 0)) (<= ~CELLCOUNT~0 0) (= 0 |#NULL.base|) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 ~CELLCOUNT~0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-07 00:44:48,827 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.startENTRY satisfy 6#true [2019-10-07 00:44:48,827 INFO L193 IcfgInterpreter]: Reachable states at location L18 satisfy 43#(and (<= |main_~#volArray~0.offset| 0) (= 0 |#NULL.base|) (<= 0 |main_~#volArray~0.offset|) (= |main_~#volArray~0.offset| 0) (<= 0 |#NULL.base|) (<= 0 |#NULL.offset|) (<= 0 |old(~CELLCOUNT~0)|) (= 2 main_~MINVAL~0) (not (= |main_~#volArray~0.base| 0)) (= |#valid| (store |old(#valid)| |main_~#volArray~0.base| 1)) (<= main_~MINVAL~0 2) (= (store |old(#length)| |main_~#volArray~0.base| (* 4 ~CELLCOUNT~0)) |#length|) (<= 1 ~CELLCOUNT~0) (<= 2 main_~MINVAL~0) (<= |#NULL.base| 0) (<= |old(~CELLCOUNT~0)| 0) (< |main_~#volArray~0.base| |#StackHeapBarrier|) (<= |#NULL.offset| 0) (= 0 (select |old(#valid)| 0)) (< 1 ~CELLCOUNT~0) (<= ~CELLCOUNT~0 2147483647) (= 0 (select |old(#valid)| |main_~#volArray~0.base|)) (= |#memory_int| |old(#memory_int)|) (= |#NULL.offset| 0) (<= 0 (+ ~CELLCOUNT~0 2147483648)) (= |old(~CELLCOUNT~0)| 0)) [2019-10-07 00:44:48,827 INFO L193 IcfgInterpreter]: Reachable states at location L22-3 satisfy 226#(and (or (and (= 0 |#NULL.base|) (= |main_~#volArray~0.offset| 0) (not (= (ite (= (ite (and (< ~CELLCOUNT~0 0) (not (= (mod ~CELLCOUNT~0 4) 0))) (+ (mod ~CELLCOUNT~0 4) (- 4)) (mod ~CELLCOUNT~0 4)) 0) 1 0) 0)) (= 2 main_~MINVAL~0) (not (= |main_~#volArray~0.base| 0)) (<= 1 main_~i~0) (= |#valid| (store |old(#valid)| |main_~#volArray~0.base| 1)) (<= main_~i~0 1) (= (store |old(#length)| |main_~#volArray~0.base| (* 4 ~CELLCOUNT~0)) |#length|) (= main_~i~0 1) (< |main_~#volArray~0.base| |#StackHeapBarrier|) (= 0 (select |old(#valid)| 0)) (< 1 ~CELLCOUNT~0) (= 0 (select |old(#valid)| |main_~#volArray~0.base|)) (= (ite (and (< ~CELLCOUNT~0 0) (not (= (mod ~CELLCOUNT~0 4) 0))) (+ (mod ~CELLCOUNT~0 4) (- 4)) (mod ~CELLCOUNT~0 4)) 0) (= |#memory_int| |old(#memory_int)|) (= |#NULL.offset| 0) (<= 0 (+ ~CELLCOUNT~0 2147483648)) (= |old(~CELLCOUNT~0)| 0)) (and (= |#NULL.base| 0) (<= 2 main_~i~0) (= main_~MINVAL~0 2) (= |main_~#volArray~0.offset| 0) (not (<= 1 main_~j~0)) (<= main_~j~0 4) (= |#NULL.offset| 0) (= |old(~CELLCOUNT~0)| 0))) (or (and (<= |main_~#volArray~0.offset| 0) (<= 1 ~CELLCOUNT~0) (<= 2 main_~MINVAL~0) (<= |#NULL.base| 0) (<= main_~j~0 1) (<= 0 |main_~#volArray~0.offset|) (<= 0 |#NULL.base|) (<= |old(~CELLCOUNT~0)| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (<= 0 |old(~CELLCOUNT~0)|) (<= ~CELLCOUNT~0 2147483647) (<= main_~MINVAL~0 2)) (and (<= |main_~#volArray~0.offset| 0) (<= 1 ~CELLCOUNT~0) (<= 2 main_~MINVAL~0) (<= |#NULL.base| 0) (<= 0 |main_~#volArray~0.offset|) (<= 0 |#NULL.base|) (<= |old(~CELLCOUNT~0)| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (<= 0 |old(~CELLCOUNT~0)|) (<= ~CELLCOUNT~0 2147483647) (<= 1 main_~i~0) (<= main_~MINVAL~0 2) (<= main_~i~0 1)))) [2019-10-07 00:44:48,828 INFO L193 IcfgInterpreter]: Reachable states at location __VERIFIER_assertENTRY satisfy 633#(and (or (and (<= 0 |__VERIFIER_assert_#in~cond|) (<= |__VERIFIER_assert_#in~cond| 0)) (and (<= 1 |__VERIFIER_assert_#in~cond|) (<= |__VERIFIER_assert_#in~cond| 1))) (or (and (<= 1 ~CELLCOUNT~0) (<= ~CELLCOUNT~0 2147483647) (= |__VERIFIER_assert_#in~cond| 1) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) (and (<= 1 ~CELLCOUNT~0) (<= ~CELLCOUNT~0 2147483647) (= |__VERIFIER_assert_#in~cond| 0) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)))) [2019-10-07 00:44:48,828 INFO L193 IcfgInterpreter]: Reachable states at location L24-3 satisfy 221#(or (and (= |#NULL.base| 0) (<= |main_~#volArray~0.offset| 0) (<= 1 ~CELLCOUNT~0) (<= 2 main_~MINVAL~0) (= main_~MINVAL~0 2) (<= |#NULL.base| 0) (<= 0 |main_~#volArray~0.offset|) (= |main_~#volArray~0.offset| 0) (<= 0 |#NULL.base|) (<= |old(~CELLCOUNT~0)| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (<= 0 |old(~CELLCOUNT~0)|) (<= ~CELLCOUNT~0 2147483647) (<= 1 main_~i~0) (<= main_~MINVAL~0 2) (<= main_~j~0 4) (= |#NULL.offset| 0) (= |old(~CELLCOUNT~0)| 0)) (and (<= |main_~#volArray~0.offset| 0) (<= 4 main_~j~0) (= 0 |#NULL.base|) (<= 0 |main_~#volArray~0.offset|) (= |main_~#volArray~0.offset| 0) (<= 0 |#NULL.base|) (not (= (ite (= (ite (and (< ~CELLCOUNT~0 0) (not (= (mod ~CELLCOUNT~0 4) 0))) (+ (mod ~CELLCOUNT~0 4) (- 4)) (mod ~CELLCOUNT~0 4)) 0) 1 0) 0)) (= main_~j~0 4) (<= 0 |#NULL.offset|) (<= 0 |old(~CELLCOUNT~0)|) (= 2 main_~MINVAL~0) (not (= |main_~#volArray~0.base| 0)) (<= 1 main_~i~0) (= |#valid| (store |old(#valid)| |main_~#volArray~0.base| 1)) (<= main_~MINVAL~0 2) (<= main_~i~0 1) (= (store |old(#length)| |main_~#volArray~0.base| (* 4 ~CELLCOUNT~0)) |#length|) (<= 1 ~CELLCOUNT~0) (<= main_~i~0 (ite (and (< ~CELLCOUNT~0 0) (not (= (mod ~CELLCOUNT~0 4) 0))) (+ (div ~CELLCOUNT~0 4) 1) (div ~CELLCOUNT~0 4))) (<= 2 main_~MINVAL~0) (<= |#NULL.base| 0) (= main_~i~0 1) (<= |old(~CELLCOUNT~0)| 0) (< |main_~#volArray~0.base| |#StackHeapBarrier|) (<= |#NULL.offset| 0) (= 0 (select |old(#valid)| 0)) (< 1 ~CELLCOUNT~0) (<= ~CELLCOUNT~0 2147483647) (= 0 (select |old(#valid)| |main_~#volArray~0.base|)) (= (ite (and (< ~CELLCOUNT~0 0) (not (= (mod ~CELLCOUNT~0 4) 0))) (+ (mod ~CELLCOUNT~0 4) (- 4)) (mod ~CELLCOUNT~0 4)) 0) (<= main_~j~0 4) (= |#memory_int| |old(#memory_int)|) (= |#NULL.offset| 0) (<= 0 (+ ~CELLCOUNT~0 2147483648)) (= |old(~CELLCOUNT~0)| 0))) [2019-10-07 00:44:49,568 WARN L191 SmtUtils]: Spent 185.00 ms on a formula simplification. DAG size of input: 83 DAG size of output: 61 [2019-10-07 00:44:49,989 WARN L191 SmtUtils]: Spent 217.00 ms on a formula simplification. DAG size of input: 38 DAG size of output: 35 [2019-10-07 00:44:50,522 INFO L211 tionRefinementEngine]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2019-10-07 00:44:50,523 INFO L224 tionRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 11, 9, 14] total 39 [2019-10-07 00:44:50,524 INFO L442 AbstractCegarLoop]: Interpolant automaton has 39 states [2019-10-07 00:44:50,524 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 39 interpolants. [2019-10-07 00:44:50,525 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=199, Invalid=1283, Unknown=0, NotChecked=0, Total=1482 [2019-10-07 00:44:50,525 INFO L87 Difference]: Start difference. First operand 74 states and 83 transitions. Second operand 39 states. [2019-10-07 00:44:50,839 WARN L191 SmtUtils]: Spent 127.00 ms on a formula simplification. DAG size of input: 70 DAG size of output: 45 [2019-10-07 00:44:51,028 WARN L191 SmtUtils]: Spent 149.00 ms on a formula simplification. DAG size of input: 71 DAG size of output: 47 [2019-10-07 00:44:51,347 WARN L191 SmtUtils]: Spent 159.00 ms on a formula simplification. DAG size of input: 65 DAG size of output: 55 [2019-10-07 00:44:51,860 WARN L191 SmtUtils]: Spent 119.00 ms on a formula simplification. DAG size of input: 42 DAG size of output: 38 [2019-10-07 00:44:52,149 WARN L191 SmtUtils]: Spent 146.00 ms on a formula simplification. DAG size of input: 64 DAG size of output: 61 [2019-10-07 00:44:52,870 WARN L191 SmtUtils]: Spent 108.00 ms on a formula simplification. DAG size of input: 37 DAG size of output: 36 [2019-10-07 00:44:54,458 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-07 00:44:54,459 INFO L93 Difference]: Finished difference Result 85 states and 92 transitions. [2019-10-07 00:44:54,459 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 37 states. [2019-10-07 00:44:54,459 INFO L78 Accepts]: Start accepts. Automaton has 39 states. Word has length 47 [2019-10-07 00:44:54,460 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-07 00:44:54,461 INFO L225 Difference]: With dead ends: 85 [2019-10-07 00:44:54,462 INFO L226 Difference]: Without dead ends: 51 [2019-10-07 00:44:54,465 INFO L606 BasicCegarLoop]: 0 DeclaredPredicates, 180 GetRequests, 106 SyntacticMatches, 7 SemanticMatches, 67 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1526 ImplicationChecksByTransitivity, 5.4s TimeCoverageRelationStatistics Valid=609, Invalid=4083, Unknown=0, NotChecked=0, Total=4692 [2019-10-07 00:44:54,465 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 51 states. [2019-10-07 00:44:54,478 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 51 to 46. [2019-10-07 00:44:54,479 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 46 states. [2019-10-07 00:44:54,479 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 46 states to 46 states and 51 transitions. [2019-10-07 00:44:54,480 INFO L78 Accepts]: Start accepts. Automaton has 46 states and 51 transitions. Word has length 47 [2019-10-07 00:44:54,480 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-07 00:44:54,480 INFO L462 AbstractCegarLoop]: Abstraction has 46 states and 51 transitions. [2019-10-07 00:44:54,480 INFO L463 AbstractCegarLoop]: Interpolant automaton has 39 states. [2019-10-07 00:44:54,480 INFO L276 IsEmpty]: Start isEmpty. Operand 46 states and 51 transitions. [2019-10-07 00:44:54,482 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2019-10-07 00:44:54,482 INFO L377 BasicCegarLoop]: Found error trace [2019-10-07 00:44:54,482 INFO L385 BasicCegarLoop]: trace histogram [8, 5, 5, 5, 4, 4, 4, 4, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-07 00:44:54,685 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 6 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-07 00:44:54,686 INFO L410 AbstractCegarLoop]: === Iteration 8 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-07 00:44:54,687 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-07 00:44:54,687 INFO L82 PathProgramCache]: Analyzing trace with hash -756480752, now seen corresponding path program 4 times [2019-10-07 00:44:54,687 INFO L150 tionRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-10-07 00:44:54,687 INFO L231 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2019-10-07 00:44:54,688 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-07 00:44:54,688 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-07 00:44:54,688 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-07 00:44:54,784 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-07 00:44:55,096 INFO L134 CoverageAnalysis]: Checked inductivity of 106 backedges. 8 proven. 64 refuted. 0 times theorem prover too weak. 34 trivial. 0 not checked. [2019-10-07 00:44:55,096 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2019-10-07 00:44:55,096 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2019-10-07 00:44:55,096 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-07 00:44:55,263 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-07 00:44:55,265 INFO L256 TraceCheckSpWp]: Trace formula consists of 181 conjuncts, 39 conjunts are in the unsatisfiable core [2019-10-07 00:44:55,268 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2019-10-07 00:44:55,439 WARN L225 Elim1Store]: Array PQE input equivalent to false [2019-10-07 00:44:55,518 WARN L225 Elim1Store]: Array PQE input equivalent to false [2019-10-07 00:44:55,640 WARN L225 Elim1Store]: Array PQE input equivalent to false [2019-10-07 00:44:56,543 INFO L134 CoverageAnalysis]: Checked inductivity of 106 backedges. 0 proven. 72 refuted. 0 times theorem prover too weak. 34 trivial. 0 not checked. [2019-10-07 00:44:56,543 INFO L322 TraceCheckSpWp]: Computing backward predicates... [2019-10-07 00:45:00,759 WARN L191 SmtUtils]: Spent 136.00 ms on a formula simplification. DAG size of input: 67 DAG size of output: 28 [2019-10-07 00:50:15,774 WARN L191 SmtUtils]: Spent 1.85 s on a formula simplification. DAG size of input: 366 DAG size of output: 29 [2019-10-07 00:50:15,957 INFO L134 CoverageAnalysis]: Checked inductivity of 106 backedges. 14 proven. 58 refuted. 0 times theorem prover too weak. 34 trivial. 0 not checked. [2019-10-07 00:50:15,957 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSifa [2019-10-07 00:50:15,959 INFO L162 IcfgInterpreter]: Started Sifa with 18 locations of interest [2019-10-07 00:50:15,959 INFO L169 IcfgInterpreter]: Building call graph [2019-10-07 00:50:15,959 INFO L174 IcfgInterpreter]: Initial procedures are [ULTIMATE.start] [2019-10-07 00:50:15,959 INFO L179 IcfgInterpreter]: Starting interpretation [2019-10-07 00:50:15,959 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.start with input of size 1 for LOIs [2019-10-07 00:50:15,981 INFO L199 IcfgInterpreter]: Interpreting procedure main with input of size 27 for LOIs [2019-10-07 00:50:16,074 WARN L225 Elim1Store]: Array PQE input equivalent to false [2019-10-07 00:50:16,850 INFO L199 IcfgInterpreter]: Interpreting procedure __VERIFIER_assert with input of size 17 for LOIs [2019-10-07 00:50:16,878 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.init with input of size 13 for LOIs [2019-10-07 00:50:16,882 INFO L183 IcfgInterpreter]: Interpretation finished [2019-10-07 00:50:16,882 INFO L191 IcfgInterpreter]: Final predicates for locations of interest are: [2019-10-07 00:50:16,882 INFO L193 IcfgInterpreter]: Reachable states at location L11 satisfy 38#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (<= |old(~CELLCOUNT~0)| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (= 0 (select |old(#valid)| 0)) (<= 0 |old(~CELLCOUNT~0)|) (<= ~CELLCOUNT~0 2147483647) (= |#valid| |old(#valid)|) (= |#memory_int| |old(#memory_int)|) (= |#NULL.offset| 0) (<= 0 (+ ~CELLCOUNT~0 2147483648)) (= |old(~CELLCOUNT~0)| 0) (= |old(#length)| |#length|)) [2019-10-07 00:50:16,883 INFO L193 IcfgInterpreter]: Reachable states at location L3-1 satisfy 660#(and (or (and (= |__VERIFIER_assert_#in~cond| 0) (= 0 __VERIFIER_assert_~cond) (= |__VERIFIER_assert_#in~cond| __VERIFIER_assert_~cond)) (and (= |__VERIFIER_assert_#in~cond| 1) (= 0 __VERIFIER_assert_~cond) (= |__VERIFIER_assert_#in~cond| __VERIFIER_assert_~cond))) (<= 1 ~CELLCOUNT~0) (<= ~CELLCOUNT~0 2147483647) (<= __VERIFIER_assert_~cond 0) (<= |#NULL.base| 0) (<= 0 |__VERIFIER_assert_#in~cond|) (<= |__VERIFIER_assert_#in~cond| 0) (<= 0 |#NULL.base|) (<= 0 __VERIFIER_assert_~cond) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-07 00:50:16,883 INFO L193 IcfgInterpreter]: Reachable states at location __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION satisfy 665#(and (or (and (= |__VERIFIER_assert_#in~cond| 0) (= 0 __VERIFIER_assert_~cond) (= |__VERIFIER_assert_#in~cond| __VERIFIER_assert_~cond)) (and (= |__VERIFIER_assert_#in~cond| 1) (= 0 __VERIFIER_assert_~cond) (= |__VERIFIER_assert_#in~cond| __VERIFIER_assert_~cond))) (<= 1 ~CELLCOUNT~0) (<= ~CELLCOUNT~0 2147483647) (<= __VERIFIER_assert_~cond 0) (<= |#NULL.base| 0) (<= 0 |__VERIFIER_assert_#in~cond|) (<= |__VERIFIER_assert_#in~cond| 0) (<= 0 |#NULL.base|) (<= 0 __VERIFIER_assert_~cond) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-07 00:50:16,883 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initENTRY satisfy 669#(and (= |old(~CELLCOUNT~0)| ~CELLCOUNT~0) (= |old(#NULL.base)| |#NULL.base|) (= |#valid| |old(#valid)|) (= |#NULL.offset| |old(#NULL.offset)|)) [2019-10-07 00:50:16,883 INFO L193 IcfgInterpreter]: Reachable states at location L37-3 satisfy 416#(and (or (and (= |#NULL.base| 0) (= main_~MINVAL~0 2) (= |main_~#volArray~0.offset| 0) (= |#NULL.offset| 0) (= |old(~CELLCOUNT~0)| 0) (= main_~i~0 0)) (and (<= |main_~#volArray~0.offset| 0) (<= 1 ~CELLCOUNT~0) (<= 2 main_~MINVAL~0) (<= |#NULL.base| 0) (<= 0 |main_~#volArray~0.offset|) (<= 0 |#NULL.base|) (<= |old(~CELLCOUNT~0)| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (<= 0 |old(~CELLCOUNT~0)|) (<= ~CELLCOUNT~0 2147483647) (<= 1 main_~i~0) (<= main_~MINVAL~0 2))) (or (and (<= |main_~#volArray~0.offset| 0) (<= 1 ~CELLCOUNT~0) (<= 2 main_~MINVAL~0) (<= |#NULL.base| 0) (<= 0 |main_~#volArray~0.offset|) (<= 0 |#NULL.base|) (<= |old(~CELLCOUNT~0)| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (<= 0 |old(~CELLCOUNT~0)|) (<= ~CELLCOUNT~0 2147483647) (<= 1 main_~i~0) (<= main_~MINVAL~0 2)) (and (<= |main_~#volArray~0.offset| 0) (<= 1 ~CELLCOUNT~0) (<= 0 main_~i~0) (<= 2 main_~MINVAL~0) (<= |#NULL.base| 0) (<= 0 |main_~#volArray~0.offset|) (<= 0 |#NULL.base|) (<= |old(~CELLCOUNT~0)| 0) (<= main_~i~0 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (<= 0 |old(~CELLCOUNT~0)|) (<= ~CELLCOUNT~0 2147483647) (<= main_~MINVAL~0 2)))) [2019-10-07 00:50:16,883 INFO L193 IcfgInterpreter]: Reachable states at location __VERIFIER_assertEXIT satisfy 655#(and (<= 1 __VERIFIER_assert_~cond) (<= 1 |__VERIFIER_assert_#in~cond|) (<= __VERIFIER_assert_~cond 1) (<= |__VERIFIER_assert_#in~cond| 1) (or (and (<= 1 ~CELLCOUNT~0) (<= ~CELLCOUNT~0 2147483647) (= |__VERIFIER_assert_#in~cond| 1) (<= |#NULL.base| 0) (not (= 0 __VERIFIER_assert_~cond)) (<= 0 |#NULL.base|) (= |__VERIFIER_assert_#in~cond| __VERIFIER_assert_~cond)) (and (<= 1 ~CELLCOUNT~0) (<= ~CELLCOUNT~0 2147483647) (= |__VERIFIER_assert_#in~cond| 0) (<= |#NULL.base| 0) (not (= 0 __VERIFIER_assert_~cond)) (<= 0 |#NULL.base|) (= |__VERIFIER_assert_#in~cond| __VERIFIER_assert_~cond))) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-07 00:50:16,884 INFO L193 IcfgInterpreter]: Reachable states at location L3-3 satisfy 650#(and (<= 1 __VERIFIER_assert_~cond) (<= 1 |__VERIFIER_assert_#in~cond|) (<= __VERIFIER_assert_~cond 1) (<= |__VERIFIER_assert_#in~cond| 1) (or (and (<= 1 ~CELLCOUNT~0) (<= ~CELLCOUNT~0 2147483647) (= |__VERIFIER_assert_#in~cond| 1) (<= |#NULL.base| 0) (not (= 0 __VERIFIER_assert_~cond)) (<= 0 |#NULL.base|) (= |__VERIFIER_assert_#in~cond| __VERIFIER_assert_~cond)) (and (<= 1 ~CELLCOUNT~0) (<= ~CELLCOUNT~0 2147483647) (= |__VERIFIER_assert_#in~cond| 0) (<= |#NULL.base| 0) (not (= 0 __VERIFIER_assert_~cond)) (<= 0 |#NULL.base|) (= |__VERIFIER_assert_#in~cond| __VERIFIER_assert_~cond))) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-07 00:50:16,884 INFO L193 IcfgInterpreter]: Reachable states at location L39-3 satisfy 567#(and (<= |main_~#volArray~0.offset| 0) (<= 1 ~CELLCOUNT~0) |main_#t~short7| (<= 0 main_~i~0) (<= 2 main_~MINVAL~0) (<= |#NULL.base| 0) (<= 0 |main_~#volArray~0.offset|) (<= 0 |#NULL.base|) (<= |old(~CELLCOUNT~0)| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (<= 0 |old(~CELLCOUNT~0)|) (<= ~CELLCOUNT~0 2147483647) (<= main_~MINVAL~0 2)) [2019-10-07 00:50:16,884 INFO L193 IcfgInterpreter]: Reachable states at location L3 satisfy 645#(and (or (and (= |__VERIFIER_assert_#in~cond| 1) (= |__VERIFIER_assert_#in~cond| __VERIFIER_assert_~cond)) (and (= |__VERIFIER_assert_#in~cond| 0) (= |__VERIFIER_assert_#in~cond| __VERIFIER_assert_~cond))) (or (and (<= 1 ~CELLCOUNT~0) (<= ~CELLCOUNT~0 2147483647) (<= __VERIFIER_assert_~cond 0) (<= |#NULL.base| 0) (<= 0 |__VERIFIER_assert_#in~cond|) (<= |__VERIFIER_assert_#in~cond| 0) (<= 0 |#NULL.base|) (<= 0 __VERIFIER_assert_~cond) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) (and (<= 1 ~CELLCOUNT~0) (<= ~CELLCOUNT~0 2147483647) (<= |#NULL.base| 0) (<= 1 __VERIFIER_assert_~cond) (<= 0 |#NULL.base|) (<= 1 |__VERIFIER_assert_#in~cond|) (<= __VERIFIER_assert_~cond 1) (<= |__VERIFIER_assert_#in~cond| 1) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)))) [2019-10-07 00:50:16,884 INFO L193 IcfgInterpreter]: Reachable states at location L39-2 satisfy 636#(and (<= |main_~#volArray~0.offset| 0) (<= 1 ~CELLCOUNT~0) (<= 0 main_~i~0) (<= 2 main_~MINVAL~0) (<= |#NULL.base| 0) (<= 0 |main_~#volArray~0.offset|) (<= 0 |#NULL.base|) (<= |old(~CELLCOUNT~0)| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (<= 0 |old(~CELLCOUNT~0)|) (<= ~CELLCOUNT~0 2147483647) (<= main_~MINVAL~0 2)) [2019-10-07 00:50:16,884 INFO L193 IcfgInterpreter]: Reachable states at location L-1 satisfy 23#(and (= ~CELLCOUNT~0 0) (<= ~CELLCOUNT~0 0) (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= 0 (select |#valid| 0)) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 ~CELLCOUNT~0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-07 00:50:16,884 INFO L193 IcfgInterpreter]: Reachable states at location mainENTRY satisfy 33#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (<= |old(~CELLCOUNT~0)| 0) (<= 0 ~CELLCOUNT~0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (= 0 (select |old(#valid)| 0)) (<= 0 |old(~CELLCOUNT~0)|) (= |old(~CELLCOUNT~0)| ~CELLCOUNT~0) (<= ~CELLCOUNT~0 0) (= |#valid| |old(#valid)|) (= |#memory_int| |old(#memory_int)|) (= |#NULL.offset| 0) (= |old(~CELLCOUNT~0)| 0) (= |old(#length)| |#length|)) [2019-10-07 00:50:16,884 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initEXIT satisfy 674#(and (= ~CELLCOUNT~0 0) (= |#valid| (store |old(#valid)| 0 0)) (<= ~CELLCOUNT~0 0) (= 0 |#NULL.base|) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 ~CELLCOUNT~0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-07 00:50:16,884 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.startENTRY satisfy 6#true [2019-10-07 00:50:16,885 INFO L193 IcfgInterpreter]: Reachable states at location L18 satisfy 43#(and (<= |main_~#volArray~0.offset| 0) (= 0 |#NULL.base|) (<= 0 |main_~#volArray~0.offset|) (= |main_~#volArray~0.offset| 0) (<= 0 |#NULL.base|) (<= 0 |#NULL.offset|) (<= 0 |old(~CELLCOUNT~0)|) (= 2 main_~MINVAL~0) (not (= |main_~#volArray~0.base| 0)) (= |#valid| (store |old(#valid)| |main_~#volArray~0.base| 1)) (<= main_~MINVAL~0 2) (= (store |old(#length)| |main_~#volArray~0.base| (* 4 ~CELLCOUNT~0)) |#length|) (<= 1 ~CELLCOUNT~0) (<= 2 main_~MINVAL~0) (<= |#NULL.base| 0) (<= |old(~CELLCOUNT~0)| 0) (< |main_~#volArray~0.base| |#StackHeapBarrier|) (<= |#NULL.offset| 0) (= 0 (select |old(#valid)| 0)) (< 1 ~CELLCOUNT~0) (<= ~CELLCOUNT~0 2147483647) (= 0 (select |old(#valid)| |main_~#volArray~0.base|)) (= |#memory_int| |old(#memory_int)|) (= |#NULL.offset| 0) (<= 0 (+ ~CELLCOUNT~0 2147483648)) (= |old(~CELLCOUNT~0)| 0)) [2019-10-07 00:50:16,885 INFO L193 IcfgInterpreter]: Reachable states at location L22-3 satisfy 228#(and (or (and (= 0 |#NULL.base|) (= |main_~#volArray~0.offset| 0) (not (= (ite (= (ite (and (< ~CELLCOUNT~0 0) (not (= (mod ~CELLCOUNT~0 4) 0))) (+ (mod ~CELLCOUNT~0 4) (- 4)) (mod ~CELLCOUNT~0 4)) 0) 1 0) 0)) (= 2 main_~MINVAL~0) (not (= |main_~#volArray~0.base| 0)) (<= 1 main_~i~0) (= |#valid| (store |old(#valid)| |main_~#volArray~0.base| 1)) (<= main_~i~0 1) (= (store |old(#length)| |main_~#volArray~0.base| (* 4 ~CELLCOUNT~0)) |#length|) (= main_~i~0 1) (< |main_~#volArray~0.base| |#StackHeapBarrier|) (= 0 (select |old(#valid)| 0)) (< 1 ~CELLCOUNT~0) (= 0 (select |old(#valid)| |main_~#volArray~0.base|)) (= (ite (and (< ~CELLCOUNT~0 0) (not (= (mod ~CELLCOUNT~0 4) 0))) (+ (mod ~CELLCOUNT~0 4) (- 4)) (mod ~CELLCOUNT~0 4)) 0) (= |#memory_int| |old(#memory_int)|) (= |#NULL.offset| 0) (<= 0 (+ ~CELLCOUNT~0 2147483648)) (= |old(~CELLCOUNT~0)| 0)) (and (= |#NULL.base| 0) (<= 2 main_~i~0) (= main_~MINVAL~0 2) (= |main_~#volArray~0.offset| 0) (not (<= 1 main_~j~0)) (<= main_~j~0 4) (= |#NULL.offset| 0) (= |old(~CELLCOUNT~0)| 0))) (or (and (<= |main_~#volArray~0.offset| 0) (<= 1 ~CELLCOUNT~0) (<= 2 main_~MINVAL~0) (<= |#NULL.base| 0) (<= main_~j~0 1) (<= 0 |main_~#volArray~0.offset|) (<= 0 |#NULL.base|) (<= |old(~CELLCOUNT~0)| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (<= 0 |old(~CELLCOUNT~0)|) (<= ~CELLCOUNT~0 2147483647) (<= main_~MINVAL~0 2)) (and (<= |main_~#volArray~0.offset| 0) (<= 1 ~CELLCOUNT~0) (<= 2 main_~MINVAL~0) (<= |#NULL.base| 0) (<= 0 |main_~#volArray~0.offset|) (<= 0 |#NULL.base|) (<= |old(~CELLCOUNT~0)| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (<= 0 |old(~CELLCOUNT~0)|) (<= ~CELLCOUNT~0 2147483647) (<= 1 main_~i~0) (<= main_~MINVAL~0 2) (<= main_~i~0 1)))) [2019-10-07 00:50:16,885 INFO L193 IcfgInterpreter]: Reachable states at location __VERIFIER_assertENTRY satisfy 640#(and (or (and (<= 0 |__VERIFIER_assert_#in~cond|) (<= |__VERIFIER_assert_#in~cond| 0)) (and (<= 1 |__VERIFIER_assert_#in~cond|) (<= |__VERIFIER_assert_#in~cond| 1))) (or (and (<= 1 ~CELLCOUNT~0) (<= ~CELLCOUNT~0 2147483647) (= |__VERIFIER_assert_#in~cond| 1) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) (and (<= 1 ~CELLCOUNT~0) (<= ~CELLCOUNT~0 2147483647) (= |__VERIFIER_assert_#in~cond| 0) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)))) [2019-10-07 00:50:16,885 INFO L193 IcfgInterpreter]: Reachable states at location L24-3 satisfy 223#(or (and (= |#NULL.base| 0) (<= |main_~#volArray~0.offset| 0) (<= 1 ~CELLCOUNT~0) (<= 2 main_~MINVAL~0) (= main_~MINVAL~0 2) (<= |#NULL.base| 0) (<= 0 |main_~#volArray~0.offset|) (= |main_~#volArray~0.offset| 0) (<= 0 |#NULL.base|) (<= |old(~CELLCOUNT~0)| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (<= 0 |old(~CELLCOUNT~0)|) (<= ~CELLCOUNT~0 2147483647) (<= 1 main_~i~0) (<= main_~MINVAL~0 2) (<= main_~j~0 4) (= |#NULL.offset| 0) (= |old(~CELLCOUNT~0)| 0)) (and (<= |main_~#volArray~0.offset| 0) (<= 4 main_~j~0) (= 0 |#NULL.base|) (<= 0 |main_~#volArray~0.offset|) (= |main_~#volArray~0.offset| 0) (<= 0 |#NULL.base|) (not (= (ite (= (ite (and (< ~CELLCOUNT~0 0) (not (= (mod ~CELLCOUNT~0 4) 0))) (+ (mod ~CELLCOUNT~0 4) (- 4)) (mod ~CELLCOUNT~0 4)) 0) 1 0) 0)) (= main_~j~0 4) (<= 0 |#NULL.offset|) (<= 0 |old(~CELLCOUNT~0)|) (= 2 main_~MINVAL~0) (not (= |main_~#volArray~0.base| 0)) (<= 1 main_~i~0) (= |#valid| (store |old(#valid)| |main_~#volArray~0.base| 1)) (<= main_~MINVAL~0 2) (<= main_~i~0 1) (= (store |old(#length)| |main_~#volArray~0.base| (* 4 ~CELLCOUNT~0)) |#length|) (<= 1 ~CELLCOUNT~0) (<= main_~i~0 (ite (and (< ~CELLCOUNT~0 0) (not (= (mod ~CELLCOUNT~0 4) 0))) (+ (div ~CELLCOUNT~0 4) 1) (div ~CELLCOUNT~0 4))) (<= 2 main_~MINVAL~0) (<= |#NULL.base| 0) (= main_~i~0 1) (<= |old(~CELLCOUNT~0)| 0) (< |main_~#volArray~0.base| |#StackHeapBarrier|) (<= |#NULL.offset| 0) (= 0 (select |old(#valid)| 0)) (< 1 ~CELLCOUNT~0) (<= ~CELLCOUNT~0 2147483647) (= 0 (select |old(#valid)| |main_~#volArray~0.base|)) (= (ite (and (< ~CELLCOUNT~0 0) (not (= (mod ~CELLCOUNT~0 4) 0))) (+ (mod ~CELLCOUNT~0 4) (- 4)) (mod ~CELLCOUNT~0 4)) 0) (<= main_~j~0 4) (= |#memory_int| |old(#memory_int)|) (= |#NULL.offset| 0) (<= 0 (+ ~CELLCOUNT~0 2147483648)) (= |old(~CELLCOUNT~0)| 0))) [2019-10-07 00:50:17,906 WARN L191 SmtUtils]: Spent 202.00 ms on a formula simplification. DAG size of input: 83 DAG size of output: 61 [2019-10-07 00:50:18,435 WARN L191 SmtUtils]: Spent 219.00 ms on a formula simplification. DAG size of input: 38 DAG size of output: 35 [2019-10-07 00:50:19,284 INFO L211 tionRefinementEngine]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2019-10-07 00:50:19,284 INFO L224 tionRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 19, 17, 14] total 60 [2019-10-07 00:50:19,285 INFO L442 AbstractCegarLoop]: Interpolant automaton has 60 states [2019-10-07 00:50:19,286 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 60 interpolants. [2019-10-07 00:50:19,287 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=324, Invalid=3213, Unknown=3, NotChecked=0, Total=3540 [2019-10-07 00:50:19,287 INFO L87 Difference]: Start difference. First operand 46 states and 51 transitions. Second operand 60 states. [2019-10-07 00:50:19,729 WARN L191 SmtUtils]: Spent 142.00 ms on a formula simplification. DAG size of input: 66 DAG size of output: 52 [2019-10-07 00:50:19,983 WARN L191 SmtUtils]: Spent 160.00 ms on a formula simplification. DAG size of input: 67 DAG size of output: 54 [2019-10-07 00:50:20,915 WARN L191 SmtUtils]: Spent 108.00 ms on a formula simplification. DAG size of input: 101 DAG size of output: 50 [2019-10-07 00:50:21,101 WARN L191 SmtUtils]: Spent 100.00 ms on a formula simplification. DAG size of input: 96 DAG size of output: 50 [2019-10-07 00:50:22,431 WARN L191 SmtUtils]: Spent 232.00 ms on a formula simplification. DAG size of input: 97 DAG size of output: 92 [2019-10-07 00:50:23,733 WARN L191 SmtUtils]: Spent 205.00 ms on a formula simplification. DAG size of input: 90 DAG size of output: 85 [2019-10-07 00:50:24,714 WARN L191 SmtUtils]: Spent 182.00 ms on a formula simplification. DAG size of input: 84 DAG size of output: 79 [2019-10-07 00:50:25,313 WARN L191 SmtUtils]: Spent 158.00 ms on a formula simplification. DAG size of input: 77 DAG size of output: 72 [2019-10-07 00:50:27,408 WARN L191 SmtUtils]: Spent 135.00 ms on a formula simplification. DAG size of input: 75 DAG size of output: 72 [2019-10-07 00:50:27,586 WARN L191 SmtUtils]: Spent 121.00 ms on a formula simplification. DAG size of input: 68 DAG size of output: 64 [2019-10-07 00:50:28,262 WARN L191 SmtUtils]: Spent 140.00 ms on a formula simplification. DAG size of input: 69 DAG size of output: 66 [2019-10-07 00:50:28,445 WARN L191 SmtUtils]: Spent 113.00 ms on a formula simplification. DAG size of input: 62 DAG size of output: 58 [2019-10-07 00:50:28,668 WARN L191 SmtUtils]: Spent 105.00 ms on a formula simplification. DAG size of input: 62 DAG size of output: 59 [2019-10-07 00:50:29,007 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-07 00:50:29,007 INFO L93 Difference]: Finished difference Result 121 states and 138 transitions. [2019-10-07 00:50:29,008 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 67 states. [2019-10-07 00:50:29,008 INFO L78 Accepts]: Start accepts. Automaton has 60 states. Word has length 53 [2019-10-07 00:50:29,009 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-07 00:50:29,011 INFO L225 Difference]: With dead ends: 121 [2019-10-07 00:50:29,011 INFO L226 Difference]: Without dead ends: 119 [2019-10-07 00:50:29,015 INFO L606 BasicCegarLoop]: 0 DeclaredPredicates, 240 GetRequests, 110 SyntacticMatches, 12 SemanticMatches, 118 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4100 ImplicationChecksByTransitivity, 14.9s TimeCoverageRelationStatistics Valid=1338, Invalid=12939, Unknown=3, NotChecked=0, Total=14280 [2019-10-07 00:50:29,016 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 119 states. [2019-10-07 00:50:29,045 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 119 to 88. [2019-10-07 00:50:29,046 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 88 states. [2019-10-07 00:50:29,047 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 88 states to 88 states and 102 transitions. [2019-10-07 00:50:29,047 INFO L78 Accepts]: Start accepts. Automaton has 88 states and 102 transitions. Word has length 53 [2019-10-07 00:50:29,048 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-07 00:50:29,048 INFO L462 AbstractCegarLoop]: Abstraction has 88 states and 102 transitions. [2019-10-07 00:50:29,048 INFO L463 AbstractCegarLoop]: Interpolant automaton has 60 states. [2019-10-07 00:50:29,048 INFO L276 IsEmpty]: Start isEmpty. Operand 88 states and 102 transitions. [2019-10-07 00:50:29,049 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-10-07 00:50:29,050 INFO L377 BasicCegarLoop]: Found error trace [2019-10-07 00:50:29,050 INFO L385 BasicCegarLoop]: trace histogram [12, 6, 6, 6, 5, 5, 5, 5, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-07 00:50:29,254 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 7 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-07 00:50:29,254 INFO L410 AbstractCegarLoop]: === Iteration 9 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-07 00:50:29,255 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-07 00:50:29,255 INFO L82 PathProgramCache]: Analyzing trace with hash -718000212, now seen corresponding path program 5 times [2019-10-07 00:50:29,255 INFO L150 tionRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-10-07 00:50:29,255 INFO L231 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2019-10-07 00:50:29,256 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-07 00:50:29,256 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-07 00:50:29,256 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-07 00:50:29,320 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-07 00:50:30,003 INFO L134 CoverageAnalysis]: Checked inductivity of 201 backedges. 10 proven. 148 refuted. 0 times theorem prover too weak. 43 trivial. 0 not checked. [2019-10-07 00:50:30,003 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2019-10-07 00:50:30,003 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2019-10-07 00:50:30,004 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-07 00:50:30,338 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 10 check-sat command(s) [2019-10-07 00:50:30,338 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-10-07 00:50:30,341 INFO L256 TraceCheckSpWp]: Trace formula consists of 219 conjuncts, 54 conjunts are in the unsatisfiable core [2019-10-07 00:50:30,344 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2019-10-07 00:50:30,839 WARN L225 Elim1Store]: Array PQE input equivalent to false [2019-10-07 00:50:30,843 WARN L225 Elim1Store]: Array PQE input equivalent to false [2019-10-07 00:50:30,990 WARN L191 SmtUtils]: Spent 132.00 ms on a formula simplification. DAG size of input: 49 DAG size of output: 39 [2019-10-07 00:50:31,510 WARN L191 SmtUtils]: Spent 161.00 ms on a formula simplification. DAG size of input: 50 DAG size of output: 49 [2019-10-07 00:50:31,680 WARN L225 Elim1Store]: Array PQE input equivalent to false [2019-10-07 00:50:32,104 WARN L191 SmtUtils]: Spent 282.00 ms on a formula simplification. DAG size of input: 76 DAG size of output: 76 [2019-10-07 00:50:32,407 WARN L191 SmtUtils]: Spent 140.00 ms on a formula simplification that was a NOOP. DAG size: 119 [2019-10-07 00:50:32,424 WARN L225 Elim1Store]: Array PQE input equivalent to false [2019-10-07 00:50:32,432 WARN L225 Elim1Store]: Array PQE input equivalent to false [2019-10-07 00:50:33,331 WARN L191 SmtUtils]: Spent 475.00 ms on a formula simplification. DAG size of input: 116 DAG size of output: 116 [2019-10-07 00:50:35,197 WARN L191 SmtUtils]: Spent 1.63 s on a formula simplification that was a NOOP. DAG size: 179 [2019-10-07 00:50:35,238 WARN L225 Elim1Store]: Array PQE input equivalent to false [2019-10-07 00:50:35,250 WARN L225 Elim1Store]: Array PQE input equivalent to false [2019-10-07 00:50:35,262 WARN L225 Elim1Store]: Array PQE input equivalent to false [2019-10-07 00:50:35,273 WARN L225 Elim1Store]: Array PQE input equivalent to false [2019-10-07 00:50:35,284 WARN L225 Elim1Store]: Array PQE input equivalent to false [2019-10-07 00:50:35,294 WARN L225 Elim1Store]: Array PQE input equivalent to false [2019-10-07 00:50:35,370 WARN L225 Elim1Store]: Array PQE input equivalent to false [2019-10-07 00:50:35,487 WARN L191 SmtUtils]: Spent 116.00 ms on a formula simplification. DAG size of input: 69 DAG size of output: 66 [2019-10-07 00:50:35,724 WARN L191 SmtUtils]: Spent 106.00 ms on a formula simplification. DAG size of input: 64 DAG size of output: 63 [2019-10-07 00:50:38,809 INFO L134 CoverageAnalysis]: Checked inductivity of 201 backedges. 8 proven. 143 refuted. 0 times theorem prover too weak. 50 trivial. 0 not checked. [2019-10-07 00:50:38,809 INFO L322 TraceCheckSpWp]: Computing backward predicates... [2019-10-07 00:51:01,294 WARN L191 SmtUtils]: Spent 14.35 s on a formula simplification. DAG size of input: 95 DAG size of output: 94 [2019-10-07 00:51:39,141 WARN L191 SmtUtils]: Spent 15.02 s on a formula simplification. DAG size of input: 195 DAG size of output: 150 [2019-10-07 00:51:39,418 WARN L191 SmtUtils]: Spent 181.00 ms on a formula simplification. DAG size of input: 87 DAG size of output: 42 [2019-10-07 00:51:40,199 WARN L191 SmtUtils]: Spent 779.00 ms on a formula simplification. DAG size of input: 279 DAG size of output: 271 [2019-10-07 00:51:40,474 WARN L191 SmtUtils]: Spent 197.00 ms on a formula simplification. DAG size of input: 79 DAG size of output: 41 [2019-10-07 00:51:40,838 WARN L191 SmtUtils]: Spent 363.00 ms on a formula simplification that was a NOOP. DAG size: 249 [2019-10-07 00:51:41,063 WARN L191 SmtUtils]: Spent 150.00 ms on a formula simplification. DAG size of input: 52 DAG size of output: 41 [2019-10-07 00:51:41,455 WARN L191 SmtUtils]: Spent 391.00 ms on a formula simplification that was a NOOP. DAG size: 225 [2019-10-07 00:51:41,901 WARN L191 SmtUtils]: Spent 287.00 ms on a formula simplification that was a NOOP. DAG size: 203 [2019-10-07 00:51:42,071 WARN L191 SmtUtils]: Spent 108.00 ms on a formula simplification. DAG size of input: 53 DAG size of output: 40 [2019-10-07 00:51:42,358 WARN L191 SmtUtils]: Spent 286.00 ms on a formula simplification that was a NOOP. DAG size: 181 [2019-10-07 00:51:42,532 WARN L191 SmtUtils]: Spent 110.00 ms on a formula simplification. DAG size of input: 61 DAG size of output: 41 [2019-10-07 00:51:42,779 WARN L191 SmtUtils]: Spent 245.00 ms on a formula simplification that was a NOOP. DAG size: 158 [2019-10-07 00:51:43,186 INFO L134 CoverageAnalysis]: Checked inductivity of 201 backedges. 16 proven. 135 refuted. 0 times theorem prover too weak. 50 trivial. 0 not checked. [2019-10-07 00:51:43,187 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSifa [2019-10-07 00:51:43,188 INFO L162 IcfgInterpreter]: Started Sifa with 18 locations of interest [2019-10-07 00:51:43,188 INFO L169 IcfgInterpreter]: Building call graph [2019-10-07 00:51:43,189 INFO L174 IcfgInterpreter]: Initial procedures are [ULTIMATE.start] [2019-10-07 00:51:43,189 INFO L179 IcfgInterpreter]: Starting interpretation [2019-10-07 00:51:43,189 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.start with input of size 1 for LOIs [2019-10-07 00:51:43,212 INFO L199 IcfgInterpreter]: Interpreting procedure main with input of size 25 for LOIs [2019-10-07 00:51:43,338 WARN L225 Elim1Store]: Array PQE input equivalent to false [2019-10-07 00:51:44,056 INFO L199 IcfgInterpreter]: Interpreting procedure __VERIFIER_assert with input of size 17 for LOIs [2019-10-07 00:51:44,087 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.init with input of size 13 for LOIs [2019-10-07 00:51:44,091 INFO L183 IcfgInterpreter]: Interpretation finished [2019-10-07 00:51:44,091 INFO L191 IcfgInterpreter]: Final predicates for locations of interest are: [2019-10-07 00:51:44,091 INFO L193 IcfgInterpreter]: Reachable states at location L11 satisfy 38#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (<= |old(~CELLCOUNT~0)| 0) (= 0 (select |old(#valid)| 0)) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (<= 0 |old(~CELLCOUNT~0)|) (<= ~CELLCOUNT~0 2147483647) (= |#valid| |old(#valid)|) (= |#memory_int| |old(#memory_int)|) (= |#NULL.offset| 0) (<= 0 (+ ~CELLCOUNT~0 2147483648)) (= |old(~CELLCOUNT~0)| 0) (= |old(#length)| |#length|)) [2019-10-07 00:51:44,092 INFO L193 IcfgInterpreter]: Reachable states at location L3-1 satisfy 653#(and (or (and (= |__VERIFIER_assert_#in~cond| 0) (= 0 __VERIFIER_assert_~cond) (= |__VERIFIER_assert_#in~cond| __VERIFIER_assert_~cond)) (and (= |__VERIFIER_assert_#in~cond| 1) (= 0 __VERIFIER_assert_~cond) (= |__VERIFIER_assert_#in~cond| __VERIFIER_assert_~cond))) (<= 1 ~CELLCOUNT~0) (<= ~CELLCOUNT~0 2147483647) (<= __VERIFIER_assert_~cond 0) (<= |#NULL.base| 0) (<= 0 |__VERIFIER_assert_#in~cond|) (<= |__VERIFIER_assert_#in~cond| 0) (<= 0 |#NULL.base|) (<= 0 __VERIFIER_assert_~cond) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-07 00:51:44,092 INFO L193 IcfgInterpreter]: Reachable states at location __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION satisfy 658#(and (or (and (= |__VERIFIER_assert_#in~cond| 0) (= 0 __VERIFIER_assert_~cond) (= |__VERIFIER_assert_#in~cond| __VERIFIER_assert_~cond)) (and (= |__VERIFIER_assert_#in~cond| 1) (= 0 __VERIFIER_assert_~cond) (= |__VERIFIER_assert_#in~cond| __VERIFIER_assert_~cond))) (<= 1 ~CELLCOUNT~0) (<= ~CELLCOUNT~0 2147483647) (<= __VERIFIER_assert_~cond 0) (<= |#NULL.base| 0) (<= 0 |__VERIFIER_assert_#in~cond|) (<= |__VERIFIER_assert_#in~cond| 0) (<= 0 |#NULL.base|) (<= 0 __VERIFIER_assert_~cond) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-07 00:51:44,092 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initENTRY satisfy 662#(and (= |old(~CELLCOUNT~0)| ~CELLCOUNT~0) (= |old(#NULL.base)| |#NULL.base|) (= |#valid| |old(#valid)|) (= |#NULL.offset| |old(#NULL.offset)|)) [2019-10-07 00:51:44,092 INFO L193 IcfgInterpreter]: Reachable states at location L37-3 satisfy 409#(and (or (and (= |#NULL.base| 0) (= main_~MINVAL~0 2) (= |main_~#volArray~0.offset| 0) (= |#NULL.offset| 0) (= |old(~CELLCOUNT~0)| 0) (= main_~i~0 0)) (and (<= |main_~#volArray~0.offset| 0) (<= 1 ~CELLCOUNT~0) (<= 2 main_~MINVAL~0) (<= |#NULL.base| 0) (<= 0 |main_~#volArray~0.offset|) (<= 0 |#NULL.base|) (<= |old(~CELLCOUNT~0)| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (<= 0 |old(~CELLCOUNT~0)|) (<= ~CELLCOUNT~0 2147483647) (<= 1 main_~i~0) (<= main_~MINVAL~0 2))) (or (and (<= |main_~#volArray~0.offset| 0) (<= 1 ~CELLCOUNT~0) (<= 2 main_~MINVAL~0) (<= |#NULL.base| 0) (<= 0 |main_~#volArray~0.offset|) (<= 0 |#NULL.base|) (<= |old(~CELLCOUNT~0)| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (<= 0 |old(~CELLCOUNT~0)|) (<= ~CELLCOUNT~0 2147483647) (<= 1 main_~i~0) (<= main_~MINVAL~0 2)) (and (<= |main_~#volArray~0.offset| 0) (<= 1 ~CELLCOUNT~0) (<= 0 main_~i~0) (<= 2 main_~MINVAL~0) (<= |#NULL.base| 0) (<= 0 |main_~#volArray~0.offset|) (<= 0 |#NULL.base|) (<= |old(~CELLCOUNT~0)| 0) (<= main_~i~0 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (<= 0 |old(~CELLCOUNT~0)|) (<= ~CELLCOUNT~0 2147483647) (<= main_~MINVAL~0 2)))) [2019-10-07 00:51:44,093 INFO L193 IcfgInterpreter]: Reachable states at location __VERIFIER_assertEXIT satisfy 648#(and (<= 1 __VERIFIER_assert_~cond) (<= 1 |__VERIFIER_assert_#in~cond|) (<= __VERIFIER_assert_~cond 1) (<= |__VERIFIER_assert_#in~cond| 1) (or (and (<= 1 ~CELLCOUNT~0) (<= ~CELLCOUNT~0 2147483647) (= |__VERIFIER_assert_#in~cond| 1) (<= |#NULL.base| 0) (not (= 0 __VERIFIER_assert_~cond)) (<= 0 |#NULL.base|) (= |__VERIFIER_assert_#in~cond| __VERIFIER_assert_~cond)) (and (<= 1 ~CELLCOUNT~0) (<= ~CELLCOUNT~0 2147483647) (= |__VERIFIER_assert_#in~cond| 0) (<= |#NULL.base| 0) (not (= 0 __VERIFIER_assert_~cond)) (<= 0 |#NULL.base|) (= |__VERIFIER_assert_#in~cond| __VERIFIER_assert_~cond))) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-07 00:51:44,093 INFO L193 IcfgInterpreter]: Reachable states at location L3-3 satisfy 643#(and (<= 1 __VERIFIER_assert_~cond) (<= 1 |__VERIFIER_assert_#in~cond|) (<= __VERIFIER_assert_~cond 1) (<= |__VERIFIER_assert_#in~cond| 1) (or (and (<= 1 ~CELLCOUNT~0) (<= ~CELLCOUNT~0 2147483647) (= |__VERIFIER_assert_#in~cond| 1) (<= |#NULL.base| 0) (not (= 0 __VERIFIER_assert_~cond)) (<= 0 |#NULL.base|) (= |__VERIFIER_assert_#in~cond| __VERIFIER_assert_~cond)) (and (<= 1 ~CELLCOUNT~0) (<= ~CELLCOUNT~0 2147483647) (= |__VERIFIER_assert_#in~cond| 0) (<= |#NULL.base| 0) (not (= 0 __VERIFIER_assert_~cond)) (<= 0 |#NULL.base|) (= |__VERIFIER_assert_#in~cond| __VERIFIER_assert_~cond))) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-07 00:51:44,093 INFO L193 IcfgInterpreter]: Reachable states at location L39-3 satisfy 560#(and (<= |main_~#volArray~0.offset| 0) (<= 1 ~CELLCOUNT~0) |main_#t~short7| (<= 0 main_~i~0) (<= 2 main_~MINVAL~0) (<= |#NULL.base| 0) (<= 0 |main_~#volArray~0.offset|) (<= 0 |#NULL.base|) (<= |old(~CELLCOUNT~0)| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (<= 0 |old(~CELLCOUNT~0)|) (<= ~CELLCOUNT~0 2147483647) (<= main_~MINVAL~0 2)) [2019-10-07 00:51:44,093 INFO L193 IcfgInterpreter]: Reachable states at location L3 satisfy 638#(and (or (and (= |__VERIFIER_assert_#in~cond| 1) (= |__VERIFIER_assert_#in~cond| __VERIFIER_assert_~cond)) (and (= |__VERIFIER_assert_#in~cond| 0) (= |__VERIFIER_assert_#in~cond| __VERIFIER_assert_~cond))) (or (and (<= 1 ~CELLCOUNT~0) (<= ~CELLCOUNT~0 2147483647) (<= __VERIFIER_assert_~cond 0) (<= |#NULL.base| 0) (<= 0 |__VERIFIER_assert_#in~cond|) (<= |__VERIFIER_assert_#in~cond| 0) (<= 0 |#NULL.base|) (<= 0 __VERIFIER_assert_~cond) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) (and (<= 1 ~CELLCOUNT~0) (<= ~CELLCOUNT~0 2147483647) (<= |#NULL.base| 0) (<= 1 __VERIFIER_assert_~cond) (<= 0 |#NULL.base|) (<= 1 |__VERIFIER_assert_#in~cond|) (<= __VERIFIER_assert_~cond 1) (<= |__VERIFIER_assert_#in~cond| 1) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)))) [2019-10-07 00:51:44,093 INFO L193 IcfgInterpreter]: Reachable states at location L39-2 satisfy 629#(and (<= |main_~#volArray~0.offset| 0) (<= 1 ~CELLCOUNT~0) (<= 0 main_~i~0) (<= 2 main_~MINVAL~0) (<= |#NULL.base| 0) (<= 0 |main_~#volArray~0.offset|) (<= 0 |#NULL.base|) (<= |old(~CELLCOUNT~0)| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (<= 0 |old(~CELLCOUNT~0)|) (<= ~CELLCOUNT~0 2147483647) (<= main_~MINVAL~0 2)) [2019-10-07 00:51:44,093 INFO L193 IcfgInterpreter]: Reachable states at location L-1 satisfy 23#(and (= ~CELLCOUNT~0 0) (<= ~CELLCOUNT~0 0) (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= 0 (select |#valid| 0)) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 ~CELLCOUNT~0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-07 00:51:44,093 INFO L193 IcfgInterpreter]: Reachable states at location mainENTRY satisfy 33#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (<= |old(~CELLCOUNT~0)| 0) (<= 0 ~CELLCOUNT~0) (= 0 (select |old(#valid)| 0)) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (<= 0 |old(~CELLCOUNT~0)|) (= |old(~CELLCOUNT~0)| ~CELLCOUNT~0) (<= ~CELLCOUNT~0 0) (= |#valid| |old(#valid)|) (= |#memory_int| |old(#memory_int)|) (= |#NULL.offset| 0) (= |old(~CELLCOUNT~0)| 0) (= |old(#length)| |#length|)) [2019-10-07 00:51:44,093 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initEXIT satisfy 667#(and (= ~CELLCOUNT~0 0) (= |#valid| (store |old(#valid)| 0 0)) (<= ~CELLCOUNT~0 0) (= 0 |#NULL.base|) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 ~CELLCOUNT~0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-07 00:51:44,094 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.startENTRY satisfy 6#true [2019-10-07 00:51:44,094 INFO L193 IcfgInterpreter]: Reachable states at location L18 satisfy 43#(and (<= |main_~#volArray~0.offset| 0) (= 0 |#NULL.base|) (<= 0 |main_~#volArray~0.offset|) (= |main_~#volArray~0.offset| 0) (<= 0 |#NULL.base|) (<= 0 |#NULL.offset|) (<= 0 |old(~CELLCOUNT~0)|) (= 2 main_~MINVAL~0) (not (= |main_~#volArray~0.base| 0)) (= |#valid| (store |old(#valid)| |main_~#volArray~0.base| 1)) (<= main_~MINVAL~0 2) (= (store |old(#length)| |main_~#volArray~0.base| (* 4 ~CELLCOUNT~0)) |#length|) (<= 1 ~CELLCOUNT~0) (<= 2 main_~MINVAL~0) (<= |#NULL.base| 0) (<= |old(~CELLCOUNT~0)| 0) (< |main_~#volArray~0.base| |#StackHeapBarrier|) (= 0 (select |old(#valid)| 0)) (<= |#NULL.offset| 0) (< 1 ~CELLCOUNT~0) (<= ~CELLCOUNT~0 2147483647) (= 0 (select |old(#valid)| |main_~#volArray~0.base|)) (= |#memory_int| |old(#memory_int)|) (= |#NULL.offset| 0) (<= 0 (+ ~CELLCOUNT~0 2147483648)) (= |old(~CELLCOUNT~0)| 0)) [2019-10-07 00:51:44,094 INFO L193 IcfgInterpreter]: Reachable states at location L22-3 satisfy 226#(and (or (<= main_~j~0 1) (and (<= 1 main_~i~0) (<= main_~i~0 1))) (or (and (= |#NULL.base| 0) (<= |main_~#volArray~0.offset| 0) (<= 1 ~CELLCOUNT~0) (<= 2 main_~i~0) (<= 2 main_~MINVAL~0) (= main_~MINVAL~0 2) (<= |#NULL.base| 0) (<= 0 |main_~#volArray~0.offset|) (= |main_~#volArray~0.offset| 0) (not (<= 1 main_~j~0)) (<= 0 |#NULL.base|) (<= |old(~CELLCOUNT~0)| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (<= 0 |old(~CELLCOUNT~0)|) (<= ~CELLCOUNT~0 2147483647) (<= main_~MINVAL~0 2) (<= main_~j~0 4) (= |#NULL.offset| 0) (= |old(~CELLCOUNT~0)| 0)) (and (<= |main_~#volArray~0.offset| 0) (= 0 |#NULL.base|) (<= 0 |main_~#volArray~0.offset|) (= |main_~#volArray~0.offset| 0) (<= 0 |#NULL.base|) (not (= (ite (= (ite (and (< ~CELLCOUNT~0 0) (not (= (mod ~CELLCOUNT~0 4) 0))) (+ (mod ~CELLCOUNT~0 4) (- 4)) (mod ~CELLCOUNT~0 4)) 0) 1 0) 0)) (<= 0 |#NULL.offset|) (<= 0 |old(~CELLCOUNT~0)|) (= 2 main_~MINVAL~0) (not (= |main_~#volArray~0.base| 0)) (<= 1 main_~i~0) (= |#valid| (store |old(#valid)| |main_~#volArray~0.base| 1)) (<= main_~MINVAL~0 2) (<= main_~i~0 1) (= (store |old(#length)| |main_~#volArray~0.base| (* 4 ~CELLCOUNT~0)) |#length|) (<= 1 ~CELLCOUNT~0) (<= 2 main_~MINVAL~0) (<= |#NULL.base| 0) (= main_~i~0 1) (<= |old(~CELLCOUNT~0)| 0) (< |main_~#volArray~0.base| |#StackHeapBarrier|) (= 0 (select |old(#valid)| 0)) (<= |#NULL.offset| 0) (< 1 ~CELLCOUNT~0) (<= ~CELLCOUNT~0 2147483647) (= 0 (select |old(#valid)| |main_~#volArray~0.base|)) (= (ite (and (< ~CELLCOUNT~0 0) (not (= (mod ~CELLCOUNT~0 4) 0))) (+ (mod ~CELLCOUNT~0 4) (- 4)) (mod ~CELLCOUNT~0 4)) 0) (= |#memory_int| |old(#memory_int)|) (= |#NULL.offset| 0) (<= 0 (+ ~CELLCOUNT~0 2147483648)) (= |old(~CELLCOUNT~0)| 0)))) [2019-10-07 00:51:44,094 INFO L193 IcfgInterpreter]: Reachable states at location __VERIFIER_assertENTRY satisfy 633#(and (or (and (<= 0 |__VERIFIER_assert_#in~cond|) (<= |__VERIFIER_assert_#in~cond| 0)) (and (<= 1 |__VERIFIER_assert_#in~cond|) (<= |__VERIFIER_assert_#in~cond| 1))) (or (and (<= 1 ~CELLCOUNT~0) (<= ~CELLCOUNT~0 2147483647) (= |__VERIFIER_assert_#in~cond| 1) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) (and (<= 1 ~CELLCOUNT~0) (<= ~CELLCOUNT~0 2147483647) (= |__VERIFIER_assert_#in~cond| 0) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)))) [2019-10-07 00:51:44,094 INFO L193 IcfgInterpreter]: Reachable states at location L24-3 satisfy 221#(and (or (and (= |#NULL.base| 0) (<= |main_~#volArray~0.offset| 0) (<= 1 ~CELLCOUNT~0) (<= 2 main_~MINVAL~0) (= main_~MINVAL~0 2) (<= |#NULL.base| 0) (<= 0 |main_~#volArray~0.offset|) (= |main_~#volArray~0.offset| 0) (<= 0 |#NULL.base|) (<= |old(~CELLCOUNT~0)| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (<= 0 |old(~CELLCOUNT~0)|) (= |#NULL.offset| 0) (= |old(~CELLCOUNT~0)| 0)) (and (<= |main_~#volArray~0.offset| 0) (<= 4 main_~j~0) (= 0 |#NULL.base|) (<= 0 |main_~#volArray~0.offset|) (= |main_~#volArray~0.offset| 0) (<= 0 |#NULL.base|) (not (= (ite (= (ite (and (< ~CELLCOUNT~0 0) (not (= (mod ~CELLCOUNT~0 4) 0))) (+ (mod ~CELLCOUNT~0 4) (- 4)) (mod ~CELLCOUNT~0 4)) 0) 1 0) 0)) (= main_~j~0 4) (<= 0 |#NULL.offset|) (<= 0 |old(~CELLCOUNT~0)|) (= 2 main_~MINVAL~0) (not (= |main_~#volArray~0.base| 0)) (= |#valid| (store |old(#valid)| |main_~#volArray~0.base| 1)) (<= main_~i~0 1) (= (store |old(#length)| |main_~#volArray~0.base| (* 4 ~CELLCOUNT~0)) |#length|) (<= 1 ~CELLCOUNT~0) (<= main_~i~0 (ite (and (< ~CELLCOUNT~0 0) (not (= (mod ~CELLCOUNT~0 4) 0))) (+ (div ~CELLCOUNT~0 4) 1) (div ~CELLCOUNT~0 4))) (<= 2 main_~MINVAL~0) (<= |#NULL.base| 0) (= main_~i~0 1) (<= |old(~CELLCOUNT~0)| 0) (< |main_~#volArray~0.base| |#StackHeapBarrier|) (= 0 (select |old(#valid)| 0)) (<= |#NULL.offset| 0) (< 1 ~CELLCOUNT~0) (= 0 (select |old(#valid)| |main_~#volArray~0.base|)) (= (ite (and (< ~CELLCOUNT~0 0) (not (= (mod ~CELLCOUNT~0 4) 0))) (+ (mod ~CELLCOUNT~0 4) (- 4)) (mod ~CELLCOUNT~0 4)) 0) (= |#memory_int| |old(#memory_int)|) (= |#NULL.offset| 0) (<= 0 (+ ~CELLCOUNT~0 2147483648)) (= |old(~CELLCOUNT~0)| 0))) (<= ~CELLCOUNT~0 2147483647) (<= 1 main_~i~0) (<= main_~MINVAL~0 2) (<= main_~j~0 4)) [2019-10-07 00:51:45,586 WARN L191 SmtUtils]: Spent 240.00 ms on a formula simplification. DAG size of input: 82 DAG size of output: 60 [2019-10-07 00:51:46,262 WARN L191 SmtUtils]: Spent 229.00 ms on a formula simplification. DAG size of input: 38 DAG size of output: 35 [2019-10-07 00:51:47,726 INFO L211 tionRefinementEngine]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2019-10-07 00:51:47,726 INFO L224 tionRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [27, 27, 25, 14] total 85 [2019-10-07 00:51:47,728 INFO L442 AbstractCegarLoop]: Interpolant automaton has 85 states [2019-10-07 00:51:47,728 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 85 interpolants. [2019-10-07 00:51:47,730 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=718, Invalid=6407, Unknown=15, NotChecked=0, Total=7140 [2019-10-07 00:51:47,730 INFO L87 Difference]: Start difference. First operand 88 states and 102 transitions. Second operand 85 states. [2019-10-07 00:51:48,280 WARN L191 SmtUtils]: Spent 180.00 ms on a formula simplification. DAG size of input: 62 DAG size of output: 54 [2019-10-07 00:51:48,600 WARN L191 SmtUtils]: Spent 198.00 ms on a formula simplification. DAG size of input: 66 DAG size of output: 57 [2019-10-07 00:51:49,075 WARN L191 SmtUtils]: Spent 167.00 ms on a formula simplification. DAG size of input: 75 DAG size of output: 72 [2019-10-07 00:51:49,358 WARN L191 SmtUtils]: Spent 100.00 ms on a formula simplification. DAG size of input: 62 DAG size of output: 60 [2019-10-07 00:51:51,467 WARN L191 SmtUtils]: Spent 162.00 ms on a formula simplification. DAG size of input: 105 DAG size of output: 72 [2019-10-07 00:51:51,878 WARN L191 SmtUtils]: Spent 176.00 ms on a formula simplification. DAG size of input: 145 DAG size of output: 58 [2019-10-07 00:51:52,219 WARN L191 SmtUtils]: Spent 190.00 ms on a formula simplification. DAG size of input: 124 DAG size of output: 77 [2019-10-07 00:51:52,491 WARN L191 SmtUtils]: Spent 131.00 ms on a formula simplification. DAG size of input: 85 DAG size of output: 73 [2019-10-07 00:51:53,047 WARN L191 SmtUtils]: Spent 168.00 ms on a formula simplification. DAG size of input: 120 DAG size of output: 84 [2019-10-07 00:51:53,537 WARN L191 SmtUtils]: Spent 210.00 ms on a formula simplification. DAG size of input: 174 DAG size of output: 93 [2019-10-07 00:51:55,203 WARN L191 SmtUtils]: Spent 1.13 s on a formula simplification. DAG size of input: 216 DAG size of output: 213 [2019-10-07 00:51:57,437 WARN L191 SmtUtils]: Spent 484.00 ms on a formula simplification. DAG size of input: 263 DAG size of output: 137 [2019-10-07 00:51:58,075 WARN L191 SmtUtils]: Spent 266.00 ms on a formula simplification. DAG size of input: 168 DAG size of output: 109 [2019-10-07 00:51:58,545 WARN L191 SmtUtils]: Spent 190.00 ms on a formula simplification. DAG size of input: 130 DAG size of output: 106 [2019-10-07 00:51:58,885 WARN L191 SmtUtils]: Spent 125.00 ms on a formula simplification. DAG size of input: 120 DAG size of output: 83 [2019-10-07 00:52:00,074 WARN L191 SmtUtils]: Spent 217.00 ms on a formula simplification. DAG size of input: 164 DAG size of output: 115 [2019-10-07 00:52:01,099 WARN L191 SmtUtils]: Spent 313.00 ms on a formula simplification. DAG size of input: 196 DAG size of output: 113 [2019-10-07 00:52:02,578 WARN L191 SmtUtils]: Spent 443.00 ms on a formula simplification. DAG size of input: 227 DAG size of output: 135 [2019-10-07 00:52:04,043 WARN L191 SmtUtils]: Spent 483.00 ms on a formula simplification. DAG size of input: 263 DAG size of output: 137 [2019-10-07 00:52:04,755 WARN L191 SmtUtils]: Spent 255.00 ms on a formula simplification. DAG size of input: 164 DAG size of output: 105 [2019-10-07 00:52:05,139 WARN L191 SmtUtils]: Spent 180.00 ms on a formula simplification. DAG size of input: 126 DAG size of output: 102 [2019-10-07 00:52:05,586 WARN L191 SmtUtils]: Spent 135.00 ms on a formula simplification. DAG size of input: 114 DAG size of output: 86 [2019-10-07 00:52:06,114 WARN L191 SmtUtils]: Spent 202.00 ms on a formula simplification. DAG size of input: 160 DAG size of output: 111 [2019-10-07 00:52:06,397 WARN L191 SmtUtils]: Spent 115.00 ms on a formula simplification. DAG size of input: 109 DAG size of output: 83 [2019-10-07 00:52:07,242 WARN L191 SmtUtils]: Spent 289.00 ms on a formula simplification. DAG size of input: 192 DAG size of output: 109 [2019-10-07 00:52:08,235 WARN L191 SmtUtils]: Spent 429.00 ms on a formula simplification. DAG size of input: 223 DAG size of output: 131 [2019-10-07 00:52:09,226 WARN L191 SmtUtils]: Spent 464.00 ms on a formula simplification. DAG size of input: 259 DAG size of output: 133 [2019-10-07 00:52:09,696 WARN L191 SmtUtils]: Spent 219.00 ms on a formula simplification. DAG size of input: 160 DAG size of output: 101 [2019-10-07 00:52:10,071 WARN L191 SmtUtils]: Spent 159.00 ms on a formula simplification. DAG size of input: 123 DAG size of output: 97 [2019-10-07 00:52:10,703 WARN L191 SmtUtils]: Spent 196.00 ms on a formula simplification. DAG size of input: 156 DAG size of output: 107 [2019-10-07 00:52:11,094 WARN L191 SmtUtils]: Spent 179.00 ms on a formula simplification. DAG size of input: 119 DAG size of output: 90 [2019-10-07 00:52:11,663 WARN L191 SmtUtils]: Spent 248.00 ms on a formula simplification. DAG size of input: 188 DAG size of output: 104 [2019-10-07 00:52:12,060 WARN L191 SmtUtils]: Spent 172.00 ms on a formula simplification. DAG size of input: 160 DAG size of output: 84 [2019-10-07 00:52:12,909 WARN L191 SmtUtils]: Spent 403.00 ms on a formula simplification. DAG size of input: 218 DAG size of output: 126 [2019-10-07 00:52:13,856 WARN L191 SmtUtils]: Spent 431.00 ms on a formula simplification. DAG size of input: 254 DAG size of output: 128 [2019-10-07 00:52:14,297 WARN L191 SmtUtils]: Spent 193.00 ms on a formula simplification. DAG size of input: 154 DAG size of output: 95 [2019-10-07 00:52:14,623 WARN L191 SmtUtils]: Spent 131.00 ms on a formula simplification. DAG size of input: 117 DAG size of output: 91 [2019-10-07 00:52:15,183 WARN L191 SmtUtils]: Spent 165.00 ms on a formula simplification. DAG size of input: 150 DAG size of output: 101 [2019-10-07 00:52:15,704 WARN L191 SmtUtils]: Spent 228.00 ms on a formula simplification. DAG size of input: 182 DAG size of output: 98 [2019-10-07 00:52:16,487 WARN L191 SmtUtils]: Spent 363.00 ms on a formula simplification. DAG size of input: 212 DAG size of output: 120 [2019-10-07 00:52:17,493 WARN L191 SmtUtils]: Spent 425.00 ms on a formula simplification. DAG size of input: 248 DAG size of output: 122 [2019-10-07 00:52:17,919 WARN L191 SmtUtils]: Spent 166.00 ms on a formula simplification. DAG size of input: 147 DAG size of output: 88 [2019-10-07 00:52:18,276 WARN L191 SmtUtils]: Spent 108.00 ms on a formula simplification. DAG size of input: 111 DAG size of output: 84 [2019-10-07 00:52:19,092 WARN L191 SmtUtils]: Spent 158.00 ms on a formula simplification. DAG size of input: 144 DAG size of output: 94 [2019-10-07 00:52:19,701 WARN L191 SmtUtils]: Spent 195.00 ms on a formula simplification. DAG size of input: 176 DAG size of output: 92 [2019-10-07 00:52:20,580 WARN L191 SmtUtils]: Spent 342.00 ms on a formula simplification. DAG size of input: 205 DAG size of output: 113 [2019-10-07 00:52:21,751 WARN L191 SmtUtils]: Spent 374.00 ms on a formula simplification. DAG size of input: 241 DAG size of output: 115 [2019-10-07 00:52:22,775 WARN L191 SmtUtils]: Spent 293.00 ms on a formula simplification. DAG size of input: 168 DAG size of output: 90 [2019-10-07 00:52:23,118 WARN L191 SmtUtils]: Spent 137.00 ms on a formula simplification. DAG size of input: 131 DAG size of output: 88 [2019-10-07 00:52:24,123 WARN L191 SmtUtils]: Spent 192.00 ms on a formula simplification. DAG size of input: 139 DAG size of output: 89 [2019-10-07 00:52:24,470 WARN L191 SmtUtils]: Spent 136.00 ms on a formula simplification. DAG size of input: 131 DAG size of output: 88 [2019-10-07 00:52:25,798 WARN L191 SmtUtils]: Spent 195.00 ms on a formula simplification. DAG size of input: 139 DAG size of output: 89 [2019-10-07 00:52:26,135 WARN L191 SmtUtils]: Spent 144.00 ms on a formula simplification. DAG size of input: 132 DAG size of output: 89 [2019-10-07 00:52:26,487 WARN L191 SmtUtils]: Spent 174.00 ms on a formula simplification. DAG size of input: 140 DAG size of output: 90 [2019-10-07 00:52:27,689 WARN L191 SmtUtils]: Spent 168.00 ms on a formula simplification. DAG size of input: 126 DAG size of output: 100 [2019-10-07 00:52:28,045 WARN L191 SmtUtils]: Spent 214.00 ms on a formula simplification. DAG size of input: 134 DAG size of output: 101 [2019-10-07 00:52:29,005 WARN L191 SmtUtils]: Spent 139.00 ms on a formula simplification. DAG size of input: 120 DAG size of output: 94 [2019-10-07 00:52:29,341 WARN L191 SmtUtils]: Spent 180.00 ms on a formula simplification. DAG size of input: 128 DAG size of output: 95 [2019-10-07 00:52:30,063 WARN L191 SmtUtils]: Spent 117.00 ms on a formula simplification. DAG size of input: 113 DAG size of output: 87 [2019-10-07 00:52:30,774 WARN L191 SmtUtils]: Spent 142.00 ms on a formula simplification. DAG size of input: 121 DAG size of output: 88 [2019-10-07 00:52:30,821 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-07 00:52:30,821 INFO L93 Difference]: Finished difference Result 139 states and 160 transitions. [2019-10-07 00:52:30,821 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 102 states. [2019-10-07 00:52:30,822 INFO L78 Accepts]: Start accepts. Automaton has 85 states. Word has length 66 [2019-10-07 00:52:30,822 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-07 00:52:30,823 INFO L225 Difference]: With dead ends: 139 [2019-10-07 00:52:30,824 INFO L226 Difference]: Without dead ends: 137 [2019-10-07 00:52:30,830 INFO L606 BasicCegarLoop]: 0 DeclaredPredicates, 323 GetRequests, 130 SyntacticMatches, 15 SemanticMatches, 178 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10289 ImplicationChecksByTransitivity, 100.9s TimeCoverageRelationStatistics Valid=3360, Invalid=28845, Unknown=15, NotChecked=0, Total=32220 [2019-10-07 00:52:30,831 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 137 states. [2019-10-07 00:52:30,866 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 137 to 97. [2019-10-07 00:52:30,867 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 97 states. [2019-10-07 00:52:30,868 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 97 states to 97 states and 114 transitions. [2019-10-07 00:52:30,868 INFO L78 Accepts]: Start accepts. Automaton has 97 states and 114 transitions. Word has length 66 [2019-10-07 00:52:30,869 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-07 00:52:30,869 INFO L462 AbstractCegarLoop]: Abstraction has 97 states and 114 transitions. [2019-10-07 00:52:30,869 INFO L463 AbstractCegarLoop]: Interpolant automaton has 85 states. [2019-10-07 00:52:30,869 INFO L276 IsEmpty]: Start isEmpty. Operand 97 states and 114 transitions. [2019-10-07 00:52:30,871 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 75 [2019-10-07 00:52:30,871 INFO L377 BasicCegarLoop]: Found error trace [2019-10-07 00:52:30,871 INFO L385 BasicCegarLoop]: trace histogram [8, 8, 8, 8, 7, 7, 7, 7, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-07 00:52:31,075 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 8 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-07 00:52:31,076 INFO L410 AbstractCegarLoop]: === Iteration 10 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-07 00:52:31,076 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-07 00:52:31,076 INFO L82 PathProgramCache]: Analyzing trace with hash 613754556, now seen corresponding path program 6 times [2019-10-07 00:52:31,077 INFO L150 tionRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-10-07 00:52:31,077 INFO L231 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2019-10-07 00:52:31,077 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-07 00:52:31,077 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-07 00:52:31,077 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-07 00:52:31,115 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-07 00:52:31,610 INFO L134 CoverageAnalysis]: Checked inductivity of 223 backedges. 14 proven. 115 refuted. 0 times theorem prover too weak. 94 trivial. 0 not checked. [2019-10-07 00:52:31,611 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2019-10-07 00:52:31,611 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2019-10-07 00:52:31,611 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-07 00:52:31,826 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2019-10-07 00:52:31,826 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-10-07 00:52:31,827 INFO L256 TraceCheckSpWp]: Trace formula consists of 229 conjuncts, 36 conjunts are in the unsatisfiable core [2019-10-07 00:52:31,832 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2019-10-07 00:53:59,212 INFO L134 CoverageAnalysis]: Checked inductivity of 223 backedges. 0 proven. 123 refuted. 0 times theorem prover too weak. 100 trivial. 0 not checked. [2019-10-07 00:53:59,212 INFO L322 TraceCheckSpWp]: Computing backward predicates... [2019-10-07 00:54:01,441 INFO L134 CoverageAnalysis]: Checked inductivity of 223 backedges. 14 proven. 109 refuted. 0 times theorem prover too weak. 100 trivial. 0 not checked. [2019-10-07 00:54:01,441 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSifa [2019-10-07 00:54:01,443 INFO L162 IcfgInterpreter]: Started Sifa with 18 locations of interest [2019-10-07 00:54:01,444 INFO L169 IcfgInterpreter]: Building call graph [2019-10-07 00:54:01,444 INFO L174 IcfgInterpreter]: Initial procedures are [ULTIMATE.start] [2019-10-07 00:54:01,444 INFO L179 IcfgInterpreter]: Starting interpretation [2019-10-07 00:54:01,444 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.start with input of size 1 for LOIs [2019-10-07 00:54:01,460 INFO L199 IcfgInterpreter]: Interpreting procedure main with input of size 27 for LOIs [2019-10-07 00:54:01,556 WARN L225 Elim1Store]: Array PQE input equivalent to false [2019-10-07 00:54:02,245 INFO L199 IcfgInterpreter]: Interpreting procedure __VERIFIER_assert with input of size 17 for LOIs [2019-10-07 00:54:02,274 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.init with input of size 13 for LOIs [2019-10-07 00:54:02,276 INFO L183 IcfgInterpreter]: Interpretation finished [2019-10-07 00:54:02,276 INFO L191 IcfgInterpreter]: Final predicates for locations of interest are: [2019-10-07 00:54:02,276 INFO L193 IcfgInterpreter]: Reachable states at location L11 satisfy 38#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (<= |old(~CELLCOUNT~0)| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (<= 0 |old(~CELLCOUNT~0)|) (= 0 (select |old(#valid)| 0)) (<= ~CELLCOUNT~0 2147483647) (= |#valid| |old(#valid)|) (= |#memory_int| |old(#memory_int)|) (= |#NULL.offset| 0) (<= 0 (+ ~CELLCOUNT~0 2147483648)) (= |old(~CELLCOUNT~0)| 0) (= |old(#length)| |#length|)) [2019-10-07 00:54:02,276 INFO L193 IcfgInterpreter]: Reachable states at location L3-1 satisfy 654#(and (or (and (= |__VERIFIER_assert_#in~cond| 0) (= 0 __VERIFIER_assert_~cond) (= |__VERIFIER_assert_#in~cond| __VERIFIER_assert_~cond)) (and (= |__VERIFIER_assert_#in~cond| 1) (= 0 __VERIFIER_assert_~cond) (= |__VERIFIER_assert_#in~cond| __VERIFIER_assert_~cond))) (<= 1 ~CELLCOUNT~0) (<= ~CELLCOUNT~0 2147483647) (<= __VERIFIER_assert_~cond 0) (<= |#NULL.base| 0) (<= 0 |__VERIFIER_assert_#in~cond|) (<= |__VERIFIER_assert_#in~cond| 0) (<= 0 |#NULL.base|) (<= 0 __VERIFIER_assert_~cond) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-07 00:54:02,277 INFO L193 IcfgInterpreter]: Reachable states at location __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION satisfy 659#(and (or (and (= |__VERIFIER_assert_#in~cond| 0) (= 0 __VERIFIER_assert_~cond) (= |__VERIFIER_assert_#in~cond| __VERIFIER_assert_~cond)) (and (= |__VERIFIER_assert_#in~cond| 1) (= 0 __VERIFIER_assert_~cond) (= |__VERIFIER_assert_#in~cond| __VERIFIER_assert_~cond))) (<= 1 ~CELLCOUNT~0) (<= ~CELLCOUNT~0 2147483647) (<= __VERIFIER_assert_~cond 0) (<= |#NULL.base| 0) (<= 0 |__VERIFIER_assert_#in~cond|) (<= |__VERIFIER_assert_#in~cond| 0) (<= 0 |#NULL.base|) (<= 0 __VERIFIER_assert_~cond) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-07 00:54:02,277 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initENTRY satisfy 663#(and (= |old(~CELLCOUNT~0)| ~CELLCOUNT~0) (= |old(#NULL.base)| |#NULL.base|) (= |#valid| |old(#valid)|) (= |#NULL.offset| |old(#NULL.offset)|)) [2019-10-07 00:54:02,277 INFO L193 IcfgInterpreter]: Reachable states at location L37-3 satisfy 410#(and (or (and (= |#NULL.base| 0) (= main_~MINVAL~0 2) (= |main_~#volArray~0.offset| 0) (= |#NULL.offset| 0) (= |old(~CELLCOUNT~0)| 0) (= main_~i~0 0)) (and (<= |main_~#volArray~0.offset| 0) (<= 1 ~CELLCOUNT~0) (<= 2 main_~MINVAL~0) (<= |#NULL.base| 0) (<= 0 |main_~#volArray~0.offset|) (<= 0 |#NULL.base|) (<= |old(~CELLCOUNT~0)| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (<= 0 |old(~CELLCOUNT~0)|) (<= ~CELLCOUNT~0 2147483647) (<= 1 main_~i~0) (<= main_~MINVAL~0 2))) (or (and (<= |main_~#volArray~0.offset| 0) (<= 1 ~CELLCOUNT~0) (<= 2 main_~MINVAL~0) (<= |#NULL.base| 0) (<= 0 |main_~#volArray~0.offset|) (<= 0 |#NULL.base|) (<= |old(~CELLCOUNT~0)| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (<= 0 |old(~CELLCOUNT~0)|) (<= ~CELLCOUNT~0 2147483647) (<= 1 main_~i~0) (<= main_~MINVAL~0 2)) (and (<= |main_~#volArray~0.offset| 0) (<= 1 ~CELLCOUNT~0) (<= 0 main_~i~0) (<= 2 main_~MINVAL~0) (<= |#NULL.base| 0) (<= 0 |main_~#volArray~0.offset|) (<= 0 |#NULL.base|) (<= |old(~CELLCOUNT~0)| 0) (<= main_~i~0 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (<= 0 |old(~CELLCOUNT~0)|) (<= ~CELLCOUNT~0 2147483647) (<= main_~MINVAL~0 2)))) [2019-10-07 00:54:02,277 INFO L193 IcfgInterpreter]: Reachable states at location __VERIFIER_assertEXIT satisfy 649#(and (<= 1 __VERIFIER_assert_~cond) (<= 1 |__VERIFIER_assert_#in~cond|) (<= __VERIFIER_assert_~cond 1) (<= |__VERIFIER_assert_#in~cond| 1) (or (and (<= 1 ~CELLCOUNT~0) (<= ~CELLCOUNT~0 2147483647) (= |__VERIFIER_assert_#in~cond| 1) (<= |#NULL.base| 0) (not (= 0 __VERIFIER_assert_~cond)) (<= 0 |#NULL.base|) (= |__VERIFIER_assert_#in~cond| __VERIFIER_assert_~cond)) (and (<= 1 ~CELLCOUNT~0) (<= ~CELLCOUNT~0 2147483647) (= |__VERIFIER_assert_#in~cond| 0) (<= |#NULL.base| 0) (not (= 0 __VERIFIER_assert_~cond)) (<= 0 |#NULL.base|) (= |__VERIFIER_assert_#in~cond| __VERIFIER_assert_~cond))) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-07 00:54:02,277 INFO L193 IcfgInterpreter]: Reachable states at location L3-3 satisfy 644#(and (<= 1 __VERIFIER_assert_~cond) (<= 1 |__VERIFIER_assert_#in~cond|) (<= __VERIFIER_assert_~cond 1) (<= |__VERIFIER_assert_#in~cond| 1) (or (and (<= 1 ~CELLCOUNT~0) (<= ~CELLCOUNT~0 2147483647) (= |__VERIFIER_assert_#in~cond| 1) (<= |#NULL.base| 0) (not (= 0 __VERIFIER_assert_~cond)) (<= 0 |#NULL.base|) (= |__VERIFIER_assert_#in~cond| __VERIFIER_assert_~cond)) (and (<= 1 ~CELLCOUNT~0) (<= ~CELLCOUNT~0 2147483647) (= |__VERIFIER_assert_#in~cond| 0) (<= |#NULL.base| 0) (not (= 0 __VERIFIER_assert_~cond)) (<= 0 |#NULL.base|) (= |__VERIFIER_assert_#in~cond| __VERIFIER_assert_~cond))) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-07 00:54:02,277 INFO L193 IcfgInterpreter]: Reachable states at location L39-3 satisfy 561#(and (<= |main_~#volArray~0.offset| 0) (<= 1 ~CELLCOUNT~0) |main_#t~short7| (<= 0 main_~i~0) (<= 2 main_~MINVAL~0) (<= |#NULL.base| 0) (<= 0 |main_~#volArray~0.offset|) (<= 0 |#NULL.base|) (<= |old(~CELLCOUNT~0)| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (<= 0 |old(~CELLCOUNT~0)|) (<= ~CELLCOUNT~0 2147483647) (<= main_~MINVAL~0 2)) [2019-10-07 00:54:02,277 INFO L193 IcfgInterpreter]: Reachable states at location L3 satisfy 639#(and (or (and (= |__VERIFIER_assert_#in~cond| 1) (= |__VERIFIER_assert_#in~cond| __VERIFIER_assert_~cond)) (and (= |__VERIFIER_assert_#in~cond| 0) (= |__VERIFIER_assert_#in~cond| __VERIFIER_assert_~cond))) (or (and (<= 1 ~CELLCOUNT~0) (<= ~CELLCOUNT~0 2147483647) (<= __VERIFIER_assert_~cond 0) (<= |#NULL.base| 0) (<= 0 |__VERIFIER_assert_#in~cond|) (<= |__VERIFIER_assert_#in~cond| 0) (<= 0 |#NULL.base|) (<= 0 __VERIFIER_assert_~cond) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) (and (<= 1 ~CELLCOUNT~0) (<= ~CELLCOUNT~0 2147483647) (<= |#NULL.base| 0) (<= 1 __VERIFIER_assert_~cond) (<= 0 |#NULL.base|) (<= 1 |__VERIFIER_assert_#in~cond|) (<= __VERIFIER_assert_~cond 1) (<= |__VERIFIER_assert_#in~cond| 1) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)))) [2019-10-07 00:54:02,277 INFO L193 IcfgInterpreter]: Reachable states at location L39-2 satisfy 630#(and (<= |main_~#volArray~0.offset| 0) (<= 1 ~CELLCOUNT~0) (<= 0 main_~i~0) (<= 2 main_~MINVAL~0) (<= |#NULL.base| 0) (<= 0 |main_~#volArray~0.offset|) (<= 0 |#NULL.base|) (<= |old(~CELLCOUNT~0)| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (<= 0 |old(~CELLCOUNT~0)|) (<= ~CELLCOUNT~0 2147483647) (<= main_~MINVAL~0 2)) [2019-10-07 00:54:02,277 INFO L193 IcfgInterpreter]: Reachable states at location L-1 satisfy 23#(and (= ~CELLCOUNT~0 0) (<= ~CELLCOUNT~0 0) (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= 0 (select |#valid| 0)) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 ~CELLCOUNT~0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-07 00:54:02,278 INFO L193 IcfgInterpreter]: Reachable states at location mainENTRY satisfy 33#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (<= |old(~CELLCOUNT~0)| 0) (<= 0 ~CELLCOUNT~0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (<= 0 |old(~CELLCOUNT~0)|) (= 0 (select |old(#valid)| 0)) (= |old(~CELLCOUNT~0)| ~CELLCOUNT~0) (<= ~CELLCOUNT~0 0) (= |#valid| |old(#valid)|) (= |#memory_int| |old(#memory_int)|) (= |#NULL.offset| 0) (= |old(~CELLCOUNT~0)| 0) (= |old(#length)| |#length|)) [2019-10-07 00:54:02,278 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initEXIT satisfy 668#(and (= ~CELLCOUNT~0 0) (= |#valid| (store |old(#valid)| 0 0)) (<= ~CELLCOUNT~0 0) (= 0 |#NULL.base|) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 ~CELLCOUNT~0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-07 00:54:02,278 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.startENTRY satisfy 6#true [2019-10-07 00:54:02,278 INFO L193 IcfgInterpreter]: Reachable states at location L18 satisfy 43#(and (<= |main_~#volArray~0.offset| 0) (= 0 |#NULL.base|) (<= 0 |main_~#volArray~0.offset|) (= |main_~#volArray~0.offset| 0) (<= 0 |#NULL.base|) (<= 0 |#NULL.offset|) (<= 0 |old(~CELLCOUNT~0)|) (= 2 main_~MINVAL~0) (not (= |main_~#volArray~0.base| 0)) (= |#valid| (store |old(#valid)| |main_~#volArray~0.base| 1)) (<= main_~MINVAL~0 2) (= (store |old(#length)| |main_~#volArray~0.base| (* 4 ~CELLCOUNT~0)) |#length|) (<= 1 ~CELLCOUNT~0) (<= 2 main_~MINVAL~0) (<= |#NULL.base| 0) (<= |old(~CELLCOUNT~0)| 0) (< |main_~#volArray~0.base| |#StackHeapBarrier|) (<= |#NULL.offset| 0) (= 0 (select |old(#valid)| 0)) (< 1 ~CELLCOUNT~0) (<= ~CELLCOUNT~0 2147483647) (= 0 (select |old(#valid)| |main_~#volArray~0.base|)) (= |#memory_int| |old(#memory_int)|) (= |#NULL.offset| 0) (<= 0 (+ ~CELLCOUNT~0 2147483648)) (= |old(~CELLCOUNT~0)| 0)) [2019-10-07 00:54:02,278 INFO L193 IcfgInterpreter]: Reachable states at location L22-3 satisfy 228#(and (or (and (= 0 |#NULL.base|) (= |main_~#volArray~0.offset| 0) (not (= (ite (= (ite (and (< ~CELLCOUNT~0 0) (not (= (mod ~CELLCOUNT~0 4) 0))) (+ (mod ~CELLCOUNT~0 4) (- 4)) (mod ~CELLCOUNT~0 4)) 0) 1 0) 0)) (= 2 main_~MINVAL~0) (not (= |main_~#volArray~0.base| 0)) (<= 1 main_~i~0) (= |#valid| (store |old(#valid)| |main_~#volArray~0.base| 1)) (<= main_~i~0 1) (= (store |old(#length)| |main_~#volArray~0.base| (* 4 ~CELLCOUNT~0)) |#length|) (= main_~i~0 1) (< |main_~#volArray~0.base| |#StackHeapBarrier|) (= 0 (select |old(#valid)| 0)) (< 1 ~CELLCOUNT~0) (= 0 (select |old(#valid)| |main_~#volArray~0.base|)) (= (ite (and (< ~CELLCOUNT~0 0) (not (= (mod ~CELLCOUNT~0 4) 0))) (+ (mod ~CELLCOUNT~0 4) (- 4)) (mod ~CELLCOUNT~0 4)) 0) (= |#memory_int| |old(#memory_int)|) (= |#NULL.offset| 0) (<= 0 (+ ~CELLCOUNT~0 2147483648)) (= |old(~CELLCOUNT~0)| 0)) (and (= |#NULL.base| 0) (<= 2 main_~i~0) (= main_~MINVAL~0 2) (= |main_~#volArray~0.offset| 0) (not (<= 1 main_~j~0)) (<= main_~j~0 4) (= |#NULL.offset| 0) (= |old(~CELLCOUNT~0)| 0))) (or (and (<= |main_~#volArray~0.offset| 0) (<= 1 ~CELLCOUNT~0) (<= 2 main_~MINVAL~0) (<= |#NULL.base| 0) (<= main_~j~0 1) (<= 0 |main_~#volArray~0.offset|) (<= 0 |#NULL.base|) (<= |old(~CELLCOUNT~0)| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (<= 0 |old(~CELLCOUNT~0)|) (<= ~CELLCOUNT~0 2147483647) (<= main_~MINVAL~0 2)) (and (<= |main_~#volArray~0.offset| 0) (<= 1 ~CELLCOUNT~0) (<= 2 main_~MINVAL~0) (<= |#NULL.base| 0) (<= 0 |main_~#volArray~0.offset|) (<= 0 |#NULL.base|) (<= |old(~CELLCOUNT~0)| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (<= 0 |old(~CELLCOUNT~0)|) (<= ~CELLCOUNT~0 2147483647) (<= 1 main_~i~0) (<= main_~MINVAL~0 2) (<= main_~i~0 1)))) [2019-10-07 00:54:02,278 INFO L193 IcfgInterpreter]: Reachable states at location __VERIFIER_assertENTRY satisfy 634#(and (or (and (<= 0 |__VERIFIER_assert_#in~cond|) (<= |__VERIFIER_assert_#in~cond| 0)) (and (<= 1 |__VERIFIER_assert_#in~cond|) (<= |__VERIFIER_assert_#in~cond| 1))) (or (and (<= 1 ~CELLCOUNT~0) (<= ~CELLCOUNT~0 2147483647) (= |__VERIFIER_assert_#in~cond| 1) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) (and (<= 1 ~CELLCOUNT~0) (<= ~CELLCOUNT~0 2147483647) (= |__VERIFIER_assert_#in~cond| 0) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)))) [2019-10-07 00:54:02,278 INFO L193 IcfgInterpreter]: Reachable states at location L24-3 satisfy 223#(or (and (= |#NULL.base| 0) (<= |main_~#volArray~0.offset| 0) (<= 1 ~CELLCOUNT~0) (<= 2 main_~MINVAL~0) (= main_~MINVAL~0 2) (<= |#NULL.base| 0) (<= 0 |main_~#volArray~0.offset|) (= |main_~#volArray~0.offset| 0) (<= 0 |#NULL.base|) (<= |old(~CELLCOUNT~0)| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (<= 0 |old(~CELLCOUNT~0)|) (<= ~CELLCOUNT~0 2147483647) (<= 1 main_~i~0) (<= main_~MINVAL~0 2) (<= main_~j~0 4) (= |#NULL.offset| 0) (= |old(~CELLCOUNT~0)| 0)) (and (<= |main_~#volArray~0.offset| 0) (<= 4 main_~j~0) (= 0 |#NULL.base|) (<= 0 |main_~#volArray~0.offset|) (= |main_~#volArray~0.offset| 0) (<= 0 |#NULL.base|) (not (= (ite (= (ite (and (< ~CELLCOUNT~0 0) (not (= (mod ~CELLCOUNT~0 4) 0))) (+ (mod ~CELLCOUNT~0 4) (- 4)) (mod ~CELLCOUNT~0 4)) 0) 1 0) 0)) (= main_~j~0 4) (<= 0 |#NULL.offset|) (<= 0 |old(~CELLCOUNT~0)|) (= 2 main_~MINVAL~0) (not (= |main_~#volArray~0.base| 0)) (<= 1 main_~i~0) (= |#valid| (store |old(#valid)| |main_~#volArray~0.base| 1)) (<= main_~MINVAL~0 2) (<= main_~i~0 1) (= (store |old(#length)| |main_~#volArray~0.base| (* 4 ~CELLCOUNT~0)) |#length|) (<= 1 ~CELLCOUNT~0) (<= main_~i~0 (ite (and (< ~CELLCOUNT~0 0) (not (= (mod ~CELLCOUNT~0 4) 0))) (+ (div ~CELLCOUNT~0 4) 1) (div ~CELLCOUNT~0 4))) (<= 2 main_~MINVAL~0) (<= |#NULL.base| 0) (= main_~i~0 1) (<= |old(~CELLCOUNT~0)| 0) (< |main_~#volArray~0.base| |#StackHeapBarrier|) (<= |#NULL.offset| 0) (= 0 (select |old(#valid)| 0)) (< 1 ~CELLCOUNT~0) (<= ~CELLCOUNT~0 2147483647) (= 0 (select |old(#valid)| |main_~#volArray~0.base|)) (= (ite (and (< ~CELLCOUNT~0 0) (not (= (mod ~CELLCOUNT~0 4) 0))) (+ (mod ~CELLCOUNT~0 4) (- 4)) (mod ~CELLCOUNT~0 4)) 0) (<= main_~j~0 4) (= |#memory_int| |old(#memory_int)|) (= |#NULL.offset| 0) (<= 0 (+ ~CELLCOUNT~0 2147483648)) (= |old(~CELLCOUNT~0)| 0))) [2019-10-07 00:54:02,972 WARN L191 SmtUtils]: Spent 101.00 ms on a formula simplification. DAG size of input: 54 DAG size of output: 42 [2019-10-07 00:54:03,324 WARN L191 SmtUtils]: Spent 214.00 ms on a formula simplification. DAG size of input: 83 DAG size of output: 61 [2019-10-07 00:54:03,860 WARN L191 SmtUtils]: Spent 218.00 ms on a formula simplification. DAG size of input: 38 DAG size of output: 35 [2019-10-07 00:54:04,878 INFO L211 tionRefinementEngine]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2019-10-07 00:54:04,878 INFO L224 tionRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [21, 19, 18, 14] total 53 [2019-10-07 00:54:04,879 INFO L442 AbstractCegarLoop]: Interpolant automaton has 53 states [2019-10-07 00:54:04,880 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 53 interpolants. [2019-10-07 00:54:04,880 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=216, Invalid=2532, Unknown=8, NotChecked=0, Total=2756 [2019-10-07 00:54:04,880 INFO L87 Difference]: Start difference. First operand 97 states and 114 transitions. Second operand 53 states. [2019-10-07 00:54:05,296 WARN L191 SmtUtils]: Spent 138.00 ms on a formula simplification. DAG size of input: 66 DAG size of output: 52 [2019-10-07 00:54:05,559 WARN L191 SmtUtils]: Spent 180.00 ms on a formula simplification. DAG size of input: 74 DAG size of output: 61 [2019-10-07 00:54:06,118 WARN L191 SmtUtils]: Spent 113.00 ms on a formula simplification. DAG size of input: 61 DAG size of output: 56 [2019-10-07 00:54:06,336 WARN L191 SmtUtils]: Spent 102.00 ms on a formula simplification. DAG size of input: 60 DAG size of output: 56 [2019-10-07 00:54:06,542 WARN L191 SmtUtils]: Spent 103.00 ms on a formula simplification. DAG size of input: 60 DAG size of output: 56 [2019-10-07 00:54:07,114 WARN L191 SmtUtils]: Spent 102.00 ms on a formula simplification. DAG size of input: 58 DAG size of output: 42 [2019-10-07 00:54:08,111 WARN L191 SmtUtils]: Spent 103.00 ms on a formula simplification. DAG size of input: 57 DAG size of output: 41 [2019-10-07 00:54:08,354 WARN L191 SmtUtils]: Spent 120.00 ms on a formula simplification. DAG size of input: 60 DAG size of output: 43 [2019-10-07 00:54:08,600 WARN L191 SmtUtils]: Spent 110.00 ms on a formula simplification. DAG size of input: 68 DAG size of output: 42 [2019-10-07 00:54:09,036 WARN L191 SmtUtils]: Spent 105.00 ms on a formula simplification. DAG size of input: 58 DAG size of output: 42 [2019-10-07 00:54:09,336 WARN L191 SmtUtils]: Spent 128.00 ms on a formula simplification. DAG size of input: 60 DAG size of output: 43 [2019-10-07 00:54:09,542 WARN L191 SmtUtils]: Spent 112.00 ms on a formula simplification. DAG size of input: 68 DAG size of output: 42 [2019-10-07 00:54:09,796 WARN L191 SmtUtils]: Spent 101.00 ms on a formula simplification. DAG size of input: 93 DAG size of output: 41 [2019-10-07 00:54:10,877 WARN L191 SmtUtils]: Spent 268.00 ms on a formula simplification. DAG size of input: 91 DAG size of output: 74 [2019-10-07 00:54:11,271 WARN L191 SmtUtils]: Spent 119.00 ms on a formula simplification. DAG size of input: 60 DAG size of output: 43 [2019-10-07 00:54:11,464 WARN L191 SmtUtils]: Spent 106.00 ms on a formula simplification. DAG size of input: 69 DAG size of output: 43 [2019-10-07 00:54:11,734 WARN L191 SmtUtils]: Spent 125.00 ms on a formula simplification. DAG size of input: 61 DAG size of output: 44 [2019-10-07 00:54:11,939 WARN L191 SmtUtils]: Spent 111.00 ms on a formula simplification. DAG size of input: 69 DAG size of output: 43 [2019-10-07 00:54:12,203 WARN L191 SmtUtils]: Spent 116.00 ms on a formula simplification. DAG size of input: 61 DAG size of output: 44 [2019-10-07 00:54:12,397 WARN L191 SmtUtils]: Spent 107.00 ms on a formula simplification. DAG size of input: 69 DAG size of output: 43 [2019-10-07 00:54:12,671 WARN L191 SmtUtils]: Spent 120.00 ms on a formula simplification. DAG size of input: 61 DAG size of output: 44 [2019-10-07 00:54:12,865 WARN L191 SmtUtils]: Spent 109.00 ms on a formula simplification. DAG size of input: 69 DAG size of output: 43 [2019-10-07 00:54:13,132 WARN L191 SmtUtils]: Spent 121.00 ms on a formula simplification. DAG size of input: 61 DAG size of output: 44 [2019-10-07 00:54:13,327 WARN L191 SmtUtils]: Spent 110.00 ms on a formula simplification. DAG size of input: 69 DAG size of output: 43 [2019-10-07 00:54:13,531 WARN L191 SmtUtils]: Spent 122.00 ms on a formula simplification. DAG size of input: 61 DAG size of output: 44 [2019-10-07 00:54:14,029 WARN L191 SmtUtils]: Spent 150.00 ms on a formula simplification. DAG size of input: 67 DAG size of output: 49 [2019-10-07 00:54:14,403 WARN L191 SmtUtils]: Spent 121.00 ms on a formula simplification. DAG size of input: 59 DAG size of output: 43 [2019-10-07 00:54:14,407 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-07 00:54:14,407 INFO L93 Difference]: Finished difference Result 137 states and 159 transitions. [2019-10-07 00:54:14,408 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 52 states. [2019-10-07 00:54:14,408 INFO L78 Accepts]: Start accepts. Automaton has 53 states. Word has length 74 [2019-10-07 00:54:14,409 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-07 00:54:14,410 INFO L225 Difference]: With dead ends: 137 [2019-10-07 00:54:14,410 INFO L226 Difference]: Without dead ends: 135 [2019-10-07 00:54:14,412 INFO L606 BasicCegarLoop]: 0 DeclaredPredicates, 289 GetRequests, 170 SyntacticMatches, 23 SemanticMatches, 96 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2604 ImplicationChecksByTransitivity, 99.1s TimeCoverageRelationStatistics Valid=843, Invalid=8655, Unknown=8, NotChecked=0, Total=9506 [2019-10-07 00:54:14,413 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 135 states. [2019-10-07 00:54:14,439 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 135 to 58. [2019-10-07 00:54:14,440 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 58 states. [2019-10-07 00:54:14,440 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 58 states to 58 states and 67 transitions. [2019-10-07 00:54:14,440 INFO L78 Accepts]: Start accepts. Automaton has 58 states and 67 transitions. Word has length 74 [2019-10-07 00:54:14,441 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-07 00:54:14,441 INFO L462 AbstractCegarLoop]: Abstraction has 58 states and 67 transitions. [2019-10-07 00:54:14,441 INFO L463 AbstractCegarLoop]: Interpolant automaton has 53 states. [2019-10-07 00:54:14,441 INFO L276 IsEmpty]: Start isEmpty. Operand 58 states and 67 transitions. [2019-10-07 00:54:14,442 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 82 [2019-10-07 00:54:14,442 INFO L377 BasicCegarLoop]: Found error trace [2019-10-07 00:54:14,442 INFO L385 BasicCegarLoop]: trace histogram [9, 9, 9, 8, 8, 8, 8, 8, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-07 00:54:14,643 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 9 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-07 00:54:14,644 INFO L410 AbstractCegarLoop]: === Iteration 11 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-07 00:54:14,644 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-07 00:54:14,645 INFO L82 PathProgramCache]: Analyzing trace with hash -1277881840, now seen corresponding path program 7 times [2019-10-07 00:54:14,645 INFO L150 tionRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-10-07 00:54:14,645 INFO L231 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2019-10-07 00:54:14,645 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-07 00:54:14,646 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-07 00:54:14,646 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-07 00:54:14,677 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-07 00:54:15,344 INFO L134 CoverageAnalysis]: Checked inductivity of 276 backedges. 94 proven. 50 refuted. 0 times theorem prover too weak. 132 trivial. 0 not checked. [2019-10-07 00:54:15,344 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2019-10-07 00:54:15,344 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2019-10-07 00:54:15,345 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-07 00:54:15,599 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-07 00:54:15,600 INFO L256 TraceCheckSpWp]: Trace formula consists of 245 conjuncts, 16 conjunts are in the unsatisfiable core [2019-10-07 00:54:15,603 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2019-10-07 00:54:16,013 INFO L134 CoverageAnalysis]: Checked inductivity of 276 backedges. 116 proven. 28 refuted. 0 times theorem prover too weak. 132 trivial. 0 not checked. [2019-10-07 00:54:16,014 INFO L322 TraceCheckSpWp]: Computing backward predicates... [2019-10-07 00:54:16,301 INFO L134 CoverageAnalysis]: Checked inductivity of 276 backedges. 116 proven. 28 refuted. 0 times theorem prover too weak. 132 trivial. 0 not checked. [2019-10-07 00:54:16,301 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSifa [2019-10-07 00:54:16,303 INFO L162 IcfgInterpreter]: Started Sifa with 18 locations of interest [2019-10-07 00:54:16,303 INFO L169 IcfgInterpreter]: Building call graph [2019-10-07 00:54:16,303 INFO L174 IcfgInterpreter]: Initial procedures are [ULTIMATE.start] [2019-10-07 00:54:16,303 INFO L179 IcfgInterpreter]: Starting interpretation [2019-10-07 00:54:16,304 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.start with input of size 1 for LOIs [2019-10-07 00:54:16,326 INFO L199 IcfgInterpreter]: Interpreting procedure main with input of size 27 for LOIs [2019-10-07 00:54:16,409 WARN L225 Elim1Store]: Array PQE input equivalent to false [2019-10-07 00:54:17,308 INFO L199 IcfgInterpreter]: Interpreting procedure __VERIFIER_assert with input of size 17 for LOIs [2019-10-07 00:54:17,337 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.init with input of size 13 for LOIs [2019-10-07 00:54:17,340 INFO L183 IcfgInterpreter]: Interpretation finished [2019-10-07 00:54:17,341 INFO L191 IcfgInterpreter]: Final predicates for locations of interest are: [2019-10-07 00:54:17,341 INFO L193 IcfgInterpreter]: Reachable states at location L11 satisfy 38#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (<= |old(~CELLCOUNT~0)| 0) (<= 0 |old(~CELLCOUNT~0)|) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (= 0 (select |old(#valid)| 0)) (<= ~CELLCOUNT~0 2147483647) (= |#valid| |old(#valid)|) (= |#memory_int| |old(#memory_int)|) (= |#NULL.offset| 0) (<= 0 (+ ~CELLCOUNT~0 2147483648)) (= |old(~CELLCOUNT~0)| 0) (= |old(#length)| |#length|)) [2019-10-07 00:54:17,341 INFO L193 IcfgInterpreter]: Reachable states at location L3-1 satisfy 660#(and (or (and (= |__VERIFIER_assert_#in~cond| 0) (= 0 __VERIFIER_assert_~cond) (= |__VERIFIER_assert_#in~cond| __VERIFIER_assert_~cond)) (and (= |__VERIFIER_assert_#in~cond| 1) (= 0 __VERIFIER_assert_~cond) (= |__VERIFIER_assert_#in~cond| __VERIFIER_assert_~cond))) (<= 1 ~CELLCOUNT~0) (<= ~CELLCOUNT~0 2147483647) (<= __VERIFIER_assert_~cond 0) (<= |#NULL.base| 0) (<= 0 |__VERIFIER_assert_#in~cond|) (<= |__VERIFIER_assert_#in~cond| 0) (<= 0 |#NULL.base|) (<= 0 __VERIFIER_assert_~cond) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-07 00:54:17,341 INFO L193 IcfgInterpreter]: Reachable states at location __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION satisfy 665#(and (or (and (= |__VERIFIER_assert_#in~cond| 0) (= 0 __VERIFIER_assert_~cond) (= |__VERIFIER_assert_#in~cond| __VERIFIER_assert_~cond)) (and (= |__VERIFIER_assert_#in~cond| 1) (= 0 __VERIFIER_assert_~cond) (= |__VERIFIER_assert_#in~cond| __VERIFIER_assert_~cond))) (<= 1 ~CELLCOUNT~0) (<= ~CELLCOUNT~0 2147483647) (<= __VERIFIER_assert_~cond 0) (<= |#NULL.base| 0) (<= 0 |__VERIFIER_assert_#in~cond|) (<= |__VERIFIER_assert_#in~cond| 0) (<= 0 |#NULL.base|) (<= 0 __VERIFIER_assert_~cond) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-07 00:54:17,342 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initENTRY satisfy 669#(and (= |old(~CELLCOUNT~0)| ~CELLCOUNT~0) (= |old(#NULL.base)| |#NULL.base|) (= |#valid| |old(#valid)|) (= |#NULL.offset| |old(#NULL.offset)|)) [2019-10-07 00:54:17,342 INFO L193 IcfgInterpreter]: Reachable states at location L37-3 satisfy 416#(and (or (and (= |#NULL.base| 0) (= main_~MINVAL~0 2) (= |main_~#volArray~0.offset| 0) (= |#NULL.offset| 0) (= |old(~CELLCOUNT~0)| 0) (= main_~i~0 0)) (and (<= |main_~#volArray~0.offset| 0) (<= 1 ~CELLCOUNT~0) (<= 2 main_~MINVAL~0) (<= |#NULL.base| 0) (<= 0 |main_~#volArray~0.offset|) (<= 0 |#NULL.base|) (<= |old(~CELLCOUNT~0)| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (<= 0 |old(~CELLCOUNT~0)|) (<= ~CELLCOUNT~0 2147483647) (<= 1 main_~i~0) (<= main_~MINVAL~0 2))) (or (and (<= |main_~#volArray~0.offset| 0) (<= 1 ~CELLCOUNT~0) (<= 2 main_~MINVAL~0) (<= |#NULL.base| 0) (<= 0 |main_~#volArray~0.offset|) (<= 0 |#NULL.base|) (<= |old(~CELLCOUNT~0)| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (<= 0 |old(~CELLCOUNT~0)|) (<= ~CELLCOUNT~0 2147483647) (<= 1 main_~i~0) (<= main_~MINVAL~0 2)) (and (<= |main_~#volArray~0.offset| 0) (<= 1 ~CELLCOUNT~0) (<= 0 main_~i~0) (<= 2 main_~MINVAL~0) (<= |#NULL.base| 0) (<= 0 |main_~#volArray~0.offset|) (<= 0 |#NULL.base|) (<= |old(~CELLCOUNT~0)| 0) (<= main_~i~0 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (<= 0 |old(~CELLCOUNT~0)|) (<= ~CELLCOUNT~0 2147483647) (<= main_~MINVAL~0 2)))) [2019-10-07 00:54:17,342 INFO L193 IcfgInterpreter]: Reachable states at location __VERIFIER_assertEXIT satisfy 655#(and (<= 1 __VERIFIER_assert_~cond) (<= 1 |__VERIFIER_assert_#in~cond|) (<= __VERIFIER_assert_~cond 1) (<= |__VERIFIER_assert_#in~cond| 1) (or (and (<= 1 ~CELLCOUNT~0) (<= ~CELLCOUNT~0 2147483647) (= |__VERIFIER_assert_#in~cond| 1) (<= |#NULL.base| 0) (not (= 0 __VERIFIER_assert_~cond)) (<= 0 |#NULL.base|) (= |__VERIFIER_assert_#in~cond| __VERIFIER_assert_~cond)) (and (<= 1 ~CELLCOUNT~0) (<= ~CELLCOUNT~0 2147483647) (= |__VERIFIER_assert_#in~cond| 0) (<= |#NULL.base| 0) (not (= 0 __VERIFIER_assert_~cond)) (<= 0 |#NULL.base|) (= |__VERIFIER_assert_#in~cond| __VERIFIER_assert_~cond))) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-07 00:54:17,342 INFO L193 IcfgInterpreter]: Reachable states at location L3-3 satisfy 650#(and (<= 1 __VERIFIER_assert_~cond) (<= 1 |__VERIFIER_assert_#in~cond|) (<= __VERIFIER_assert_~cond 1) (<= |__VERIFIER_assert_#in~cond| 1) (or (and (<= 1 ~CELLCOUNT~0) (<= ~CELLCOUNT~0 2147483647) (= |__VERIFIER_assert_#in~cond| 1) (<= |#NULL.base| 0) (not (= 0 __VERIFIER_assert_~cond)) (<= 0 |#NULL.base|) (= |__VERIFIER_assert_#in~cond| __VERIFIER_assert_~cond)) (and (<= 1 ~CELLCOUNT~0) (<= ~CELLCOUNT~0 2147483647) (= |__VERIFIER_assert_#in~cond| 0) (<= |#NULL.base| 0) (not (= 0 __VERIFIER_assert_~cond)) (<= 0 |#NULL.base|) (= |__VERIFIER_assert_#in~cond| __VERIFIER_assert_~cond))) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-07 00:54:17,342 INFO L193 IcfgInterpreter]: Reachable states at location L39-3 satisfy 567#(and (<= |main_~#volArray~0.offset| 0) (<= 1 ~CELLCOUNT~0) |main_#t~short7| (<= 0 main_~i~0) (<= 2 main_~MINVAL~0) (<= |#NULL.base| 0) (<= 0 |main_~#volArray~0.offset|) (<= 0 |#NULL.base|) (<= |old(~CELLCOUNT~0)| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (<= 0 |old(~CELLCOUNT~0)|) (<= ~CELLCOUNT~0 2147483647) (<= main_~MINVAL~0 2)) [2019-10-07 00:54:17,342 INFO L193 IcfgInterpreter]: Reachable states at location L3 satisfy 645#(and (or (and (= |__VERIFIER_assert_#in~cond| 1) (= |__VERIFIER_assert_#in~cond| __VERIFIER_assert_~cond)) (and (= |__VERIFIER_assert_#in~cond| 0) (= |__VERIFIER_assert_#in~cond| __VERIFIER_assert_~cond))) (or (and (<= 1 ~CELLCOUNT~0) (<= ~CELLCOUNT~0 2147483647) (<= __VERIFIER_assert_~cond 0) (<= |#NULL.base| 0) (<= 0 |__VERIFIER_assert_#in~cond|) (<= |__VERIFIER_assert_#in~cond| 0) (<= 0 |#NULL.base|) (<= 0 __VERIFIER_assert_~cond) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) (and (<= 1 ~CELLCOUNT~0) (<= ~CELLCOUNT~0 2147483647) (<= |#NULL.base| 0) (<= 1 __VERIFIER_assert_~cond) (<= 0 |#NULL.base|) (<= 1 |__VERIFIER_assert_#in~cond|) (<= __VERIFIER_assert_~cond 1) (<= |__VERIFIER_assert_#in~cond| 1) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)))) [2019-10-07 00:54:17,343 INFO L193 IcfgInterpreter]: Reachable states at location L39-2 satisfy 636#(and (<= |main_~#volArray~0.offset| 0) (<= 1 ~CELLCOUNT~0) (<= 0 main_~i~0) (<= 2 main_~MINVAL~0) (<= |#NULL.base| 0) (<= 0 |main_~#volArray~0.offset|) (<= 0 |#NULL.base|) (<= |old(~CELLCOUNT~0)| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (<= 0 |old(~CELLCOUNT~0)|) (<= ~CELLCOUNT~0 2147483647) (<= main_~MINVAL~0 2)) [2019-10-07 00:54:17,343 INFO L193 IcfgInterpreter]: Reachable states at location L-1 satisfy 23#(and (= ~CELLCOUNT~0 0) (<= ~CELLCOUNT~0 0) (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= 0 (select |#valid| 0)) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 ~CELLCOUNT~0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-07 00:54:17,343 INFO L193 IcfgInterpreter]: Reachable states at location mainENTRY satisfy 33#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (<= |old(~CELLCOUNT~0)| 0) (<= 0 ~CELLCOUNT~0) (<= 0 |old(~CELLCOUNT~0)|) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (= 0 (select |old(#valid)| 0)) (= |old(~CELLCOUNT~0)| ~CELLCOUNT~0) (<= ~CELLCOUNT~0 0) (= |#valid| |old(#valid)|) (= |#memory_int| |old(#memory_int)|) (= |#NULL.offset| 0) (= |old(~CELLCOUNT~0)| 0) (= |old(#length)| |#length|)) [2019-10-07 00:54:17,343 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initEXIT satisfy 674#(and (= ~CELLCOUNT~0 0) (= |#valid| (store |old(#valid)| 0 0)) (<= ~CELLCOUNT~0 0) (= 0 |#NULL.base|) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 ~CELLCOUNT~0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-07 00:54:17,343 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.startENTRY satisfy 6#true [2019-10-07 00:54:17,344 INFO L193 IcfgInterpreter]: Reachable states at location L18 satisfy 43#(and (<= |main_~#volArray~0.offset| 0) (= 0 |#NULL.base|) (<= 0 |main_~#volArray~0.offset|) (= |main_~#volArray~0.offset| 0) (<= 0 |#NULL.base|) (<= 0 |old(~CELLCOUNT~0)|) (<= 0 |#NULL.offset|) (= 2 main_~MINVAL~0) (not (= |main_~#volArray~0.base| 0)) (= |#valid| (store |old(#valid)| |main_~#volArray~0.base| 1)) (<= main_~MINVAL~0 2) (= (store |old(#length)| |main_~#volArray~0.base| (* 4 ~CELLCOUNT~0)) |#length|) (<= 1 ~CELLCOUNT~0) (<= 2 main_~MINVAL~0) (<= |#NULL.base| 0) (<= |old(~CELLCOUNT~0)| 0) (< |main_~#volArray~0.base| |#StackHeapBarrier|) (<= |#NULL.offset| 0) (= 0 (select |old(#valid)| 0)) (< 1 ~CELLCOUNT~0) (<= ~CELLCOUNT~0 2147483647) (= 0 (select |old(#valid)| |main_~#volArray~0.base|)) (= |#memory_int| |old(#memory_int)|) (= |#NULL.offset| 0) (<= 0 (+ ~CELLCOUNT~0 2147483648)) (= |old(~CELLCOUNT~0)| 0)) [2019-10-07 00:54:17,345 INFO L193 IcfgInterpreter]: Reachable states at location L22-3 satisfy 228#(and (or (and (= |#NULL.base| 0) (<= 2 main_~i~0) (= main_~MINVAL~0 2) (= |main_~#volArray~0.offset| 0) (not (<= 1 main_~j~0)) (<= main_~j~0 4) (= |#NULL.offset| 0) (= |old(~CELLCOUNT~0)| 0)) (and (= 0 |#NULL.base|) (= |main_~#volArray~0.offset| 0) (not (= (ite (= (ite (and (< ~CELLCOUNT~0 0) (not (= (mod ~CELLCOUNT~0 4) 0))) (+ (mod ~CELLCOUNT~0 4) (- 4)) (mod ~CELLCOUNT~0 4)) 0) 1 0) 0)) (= 2 main_~MINVAL~0) (not (= |main_~#volArray~0.base| 0)) (<= 1 main_~i~0) (= |#valid| (store |old(#valid)| |main_~#volArray~0.base| 1)) (<= main_~i~0 1) (= (store |old(#length)| |main_~#volArray~0.base| (* 4 ~CELLCOUNT~0)) |#length|) (= main_~i~0 1) (< |main_~#volArray~0.base| |#StackHeapBarrier|) (= 0 (select |old(#valid)| 0)) (< 1 ~CELLCOUNT~0) (= 0 (select |old(#valid)| |main_~#volArray~0.base|)) (= (ite (and (< ~CELLCOUNT~0 0) (not (= (mod ~CELLCOUNT~0 4) 0))) (+ (mod ~CELLCOUNT~0 4) (- 4)) (mod ~CELLCOUNT~0 4)) 0) (= |#memory_int| |old(#memory_int)|) (= |#NULL.offset| 0) (<= 0 (+ ~CELLCOUNT~0 2147483648)) (= |old(~CELLCOUNT~0)| 0))) (or (and (<= |main_~#volArray~0.offset| 0) (<= 1 ~CELLCOUNT~0) (<= 2 main_~MINVAL~0) (<= |#NULL.base| 0) (<= main_~j~0 1) (<= 0 |main_~#volArray~0.offset|) (<= 0 |#NULL.base|) (<= |old(~CELLCOUNT~0)| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (<= 0 |old(~CELLCOUNT~0)|) (<= ~CELLCOUNT~0 2147483647) (<= main_~MINVAL~0 2)) (and (<= |main_~#volArray~0.offset| 0) (<= 1 ~CELLCOUNT~0) (<= 2 main_~MINVAL~0) (<= |#NULL.base| 0) (<= 0 |main_~#volArray~0.offset|) (<= 0 |#NULL.base|) (<= |old(~CELLCOUNT~0)| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (<= 0 |old(~CELLCOUNT~0)|) (<= ~CELLCOUNT~0 2147483647) (<= 1 main_~i~0) (<= main_~MINVAL~0 2) (<= main_~i~0 1)))) [2019-10-07 00:54:17,346 INFO L193 IcfgInterpreter]: Reachable states at location __VERIFIER_assertENTRY satisfy 640#(and (or (and (<= 0 |__VERIFIER_assert_#in~cond|) (<= |__VERIFIER_assert_#in~cond| 0)) (and (<= 1 |__VERIFIER_assert_#in~cond|) (<= |__VERIFIER_assert_#in~cond| 1))) (or (and (<= 1 ~CELLCOUNT~0) (<= ~CELLCOUNT~0 2147483647) (= |__VERIFIER_assert_#in~cond| 1) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) (and (<= 1 ~CELLCOUNT~0) (<= ~CELLCOUNT~0 2147483647) (= |__VERIFIER_assert_#in~cond| 0) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)))) [2019-10-07 00:54:17,346 INFO L193 IcfgInterpreter]: Reachable states at location L24-3 satisfy 223#(and (or (and (= |#NULL.base| 0) (<= |main_~#volArray~0.offset| 0) (<= 1 ~CELLCOUNT~0) (<= 2 main_~MINVAL~0) (= main_~MINVAL~0 2) (<= |#NULL.base| 0) (<= 0 |main_~#volArray~0.offset|) (= |main_~#volArray~0.offset| 0) (<= 0 |#NULL.base|) (<= |old(~CELLCOUNT~0)| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (<= 0 |old(~CELLCOUNT~0)|) (<= ~CELLCOUNT~0 2147483647) (<= 1 main_~i~0) (<= main_~MINVAL~0 2) (= |#NULL.offset| 0) (= |old(~CELLCOUNT~0)| 0)) (and (<= |main_~#volArray~0.offset| 0) (<= 4 main_~j~0) (= 0 |#NULL.base|) (<= 0 |main_~#volArray~0.offset|) (= |main_~#volArray~0.offset| 0) (<= 0 |#NULL.base|) (not (= (ite (= (ite (and (< ~CELLCOUNT~0 0) (not (= (mod ~CELLCOUNT~0 4) 0))) (+ (mod ~CELLCOUNT~0 4) (- 4)) (mod ~CELLCOUNT~0 4)) 0) 1 0) 0)) (= main_~j~0 4) (<= 0 |old(~CELLCOUNT~0)|) (<= 0 |#NULL.offset|) (= 2 main_~MINVAL~0) (not (= |main_~#volArray~0.base| 0)) (<= 1 main_~i~0) (= |#valid| (store |old(#valid)| |main_~#volArray~0.base| 1)) (<= main_~MINVAL~0 2) (<= main_~i~0 1) (= (store |old(#length)| |main_~#volArray~0.base| (* 4 ~CELLCOUNT~0)) |#length|) (<= 1 ~CELLCOUNT~0) (<= main_~i~0 (ite (and (< ~CELLCOUNT~0 0) (not (= (mod ~CELLCOUNT~0 4) 0))) (+ (div ~CELLCOUNT~0 4) 1) (div ~CELLCOUNT~0 4))) (<= 2 main_~MINVAL~0) (<= |#NULL.base| 0) (= main_~i~0 1) (<= |old(~CELLCOUNT~0)| 0) (< |main_~#volArray~0.base| |#StackHeapBarrier|) (<= |#NULL.offset| 0) (= 0 (select |old(#valid)| 0)) (< 1 ~CELLCOUNT~0) (<= ~CELLCOUNT~0 2147483647) (= 0 (select |old(#valid)| |main_~#volArray~0.base|)) (= (ite (and (< ~CELLCOUNT~0 0) (not (= (mod ~CELLCOUNT~0 4) 0))) (+ (mod ~CELLCOUNT~0 4) (- 4)) (mod ~CELLCOUNT~0 4)) 0) (= |#memory_int| |old(#memory_int)|) (= |#NULL.offset| 0) (<= 0 (+ ~CELLCOUNT~0 2147483648)) (= |old(~CELLCOUNT~0)| 0))) (<= main_~j~0 4)) [2019-10-07 00:54:18,251 WARN L191 SmtUtils]: Spent 194.00 ms on a formula simplification. DAG size of input: 83 DAG size of output: 61 [2019-10-07 00:54:18,722 WARN L191 SmtUtils]: Spent 221.00 ms on a formula simplification. DAG size of input: 38 DAG size of output: 35 [2019-10-07 00:54:19,043 WARN L191 SmtUtils]: Spent 102.00 ms on a formula simplification. DAG size of input: 32 DAG size of output: 25 [2019-10-07 00:54:19,588 INFO L211 tionRefinementEngine]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2019-10-07 00:54:19,589 INFO L224 tionRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 16, 14, 14] total 54 [2019-10-07 00:54:19,590 INFO L442 AbstractCegarLoop]: Interpolant automaton has 54 states [2019-10-07 00:54:19,590 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 54 interpolants. [2019-10-07 00:54:19,590 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=436, Invalid=2426, Unknown=0, NotChecked=0, Total=2862 [2019-10-07 00:54:19,591 INFO L87 Difference]: Start difference. First operand 58 states and 67 transitions. Second operand 54 states. [2019-10-07 00:54:19,925 WARN L191 SmtUtils]: Spent 140.00 ms on a formula simplification. DAG size of input: 70 DAG size of output: 45 [2019-10-07 00:54:20,129 WARN L191 SmtUtils]: Spent 151.00 ms on a formula simplification. DAG size of input: 71 DAG size of output: 47 [2019-10-07 00:54:20,461 WARN L191 SmtUtils]: Spent 162.00 ms on a formula simplification. DAG size of input: 65 DAG size of output: 55 [2019-10-07 00:54:20,801 WARN L191 SmtUtils]: Spent 172.00 ms on a formula simplification. DAG size of input: 66 DAG size of output: 56 [2019-10-07 00:54:21,226 WARN L191 SmtUtils]: Spent 108.00 ms on a formula simplification. DAG size of input: 35 DAG size of output: 32 [2019-10-07 00:54:21,435 WARN L191 SmtUtils]: Spent 141.00 ms on a formula simplification. DAG size of input: 42 DAG size of output: 39 [2019-10-07 00:54:21,771 WARN L191 SmtUtils]: Spent 154.00 ms on a formula simplification. DAG size of input: 64 DAG size of output: 61 [2019-10-07 00:54:22,067 WARN L191 SmtUtils]: Spent 105.00 ms on a formula simplification. DAG size of input: 42 DAG size of output: 41 [2019-10-07 00:54:22,660 WARN L191 SmtUtils]: Spent 113.00 ms on a formula simplification. DAG size of input: 37 DAG size of output: 36 [2019-10-07 00:54:23,080 WARN L191 SmtUtils]: Spent 105.00 ms on a formula simplification. DAG size of input: 41 DAG size of output: 40 [2019-10-07 00:54:23,693 WARN L191 SmtUtils]: Spent 103.00 ms on a formula simplification. DAG size of input: 41 DAG size of output: 40 [2019-10-07 00:54:26,001 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-07 00:54:26,002 INFO L93 Difference]: Finished difference Result 111 states and 127 transitions. [2019-10-07 00:54:26,002 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 49 states. [2019-10-07 00:54:26,002 INFO L78 Accepts]: Start accepts. Automaton has 54 states. Word has length 81 [2019-10-07 00:54:26,003 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-07 00:54:26,004 INFO L225 Difference]: With dead ends: 111 [2019-10-07 00:54:26,005 INFO L226 Difference]: Without dead ends: 69 [2019-10-07 00:54:26,006 INFO L606 BasicCegarLoop]: 0 DeclaredPredicates, 299 GetRequests, 194 SyntacticMatches, 11 SemanticMatches, 94 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3306 ImplicationChecksByTransitivity, 8.5s TimeCoverageRelationStatistics Valid=1265, Invalid=7855, Unknown=0, NotChecked=0, Total=9120 [2019-10-07 00:54:26,007 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 69 states. [2019-10-07 00:54:26,036 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 69 to 64. [2019-10-07 00:54:26,036 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 64 states. [2019-10-07 00:54:26,037 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 64 states to 64 states and 73 transitions. [2019-10-07 00:54:26,037 INFO L78 Accepts]: Start accepts. Automaton has 64 states and 73 transitions. Word has length 81 [2019-10-07 00:54:26,037 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-07 00:54:26,037 INFO L462 AbstractCegarLoop]: Abstraction has 64 states and 73 transitions. [2019-10-07 00:54:26,037 INFO L463 AbstractCegarLoop]: Interpolant automaton has 54 states. [2019-10-07 00:54:26,037 INFO L276 IsEmpty]: Start isEmpty. Operand 64 states and 73 transitions. [2019-10-07 00:54:26,038 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 88 [2019-10-07 00:54:26,038 INFO L377 BasicCegarLoop]: Found error trace [2019-10-07 00:54:26,038 INFO L385 BasicCegarLoop]: trace histogram [12, 9, 9, 9, 8, 8, 8, 8, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-07 00:54:26,239 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 10 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-07 00:54:26,239 INFO L410 AbstractCegarLoop]: === Iteration 12 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-07 00:54:26,240 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-07 00:54:26,240 INFO L82 PathProgramCache]: Analyzing trace with hash -112855648, now seen corresponding path program 8 times [2019-10-07 00:54:26,240 INFO L150 tionRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-10-07 00:54:26,240 INFO L231 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2019-10-07 00:54:26,241 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-07 00:54:26,241 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-07 00:54:26,241 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-07 00:54:26,305 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-07 00:54:26,851 INFO L134 CoverageAnalysis]: Checked inductivity of 339 backedges. 16 proven. 195 refuted. 0 times theorem prover too weak. 128 trivial. 0 not checked. [2019-10-07 00:54:26,851 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2019-10-07 00:54:26,851 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2019-10-07 00:54:26,851 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-07 00:54:27,308 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 9 check-sat command(s) [2019-10-07 00:54:27,317 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-10-07 00:54:27,319 INFO L256 TraceCheckSpWp]: Trace formula consists of 259 conjuncts, 48 conjunts are in the unsatisfiable core [2019-10-07 00:54:27,326 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2019-10-07 00:54:27,372 WARN L225 Elim1Store]: Array PQE input equivalent to false [2019-10-07 00:54:27,596 WARN L191 SmtUtils]: Spent 113.00 ms on a formula simplification. DAG size of input: 37 DAG size of output: 37 [2019-10-07 00:54:27,713 WARN L225 Elim1Store]: Array PQE input equivalent to false [2019-10-07 00:54:28,008 WARN L191 SmtUtils]: Spent 226.00 ms on a formula simplification. DAG size of input: 53 DAG size of output: 53 [2019-10-07 00:54:28,218 WARN L191 SmtUtils]: Spent 100.00 ms on a formula simplification that was a NOOP. DAG size: 79 [2019-10-07 00:54:28,233 WARN L225 Elim1Store]: Array PQE input equivalent to false [2019-10-07 00:54:28,306 WARN L225 Elim1Store]: Array PQE input equivalent to false [2019-10-07 00:54:28,314 WARN L225 Elim1Store]: Array PQE input equivalent to false [2019-10-07 00:54:28,326 WARN L225 Elim1Store]: Array PQE input equivalent to false [2019-10-07 00:54:28,331 WARN L225 Elim1Store]: Array PQE input equivalent to false [2019-10-07 00:54:36,008 INFO L134 CoverageAnalysis]: Checked inductivity of 339 backedges. 27 proven. 204 refuted. 24 times theorem prover too weak. 84 trivial. 0 not checked. [2019-10-07 00:54:36,009 INFO L322 TraceCheckSpWp]: Computing backward predicates... [2019-10-07 00:54:37,247 WARN L191 SmtUtils]: Spent 160.00 ms on a formula simplification. DAG size of input: 92 DAG size of output: 35 [2019-10-07 00:54:37,487 WARN L191 SmtUtils]: Spent 164.00 ms on a formula simplification. DAG size of input: 72 DAG size of output: 34 [2019-10-07 00:54:37,848 INFO L134 CoverageAnalysis]: Checked inductivity of 339 backedges. 17 proven. 190 refuted. 0 times theorem prover too weak. 132 trivial. 0 not checked. [2019-10-07 00:54:37,849 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSifa [2019-10-07 00:54:37,850 INFO L162 IcfgInterpreter]: Started Sifa with 18 locations of interest [2019-10-07 00:54:37,850 INFO L169 IcfgInterpreter]: Building call graph [2019-10-07 00:54:37,850 INFO L174 IcfgInterpreter]: Initial procedures are [ULTIMATE.start] [2019-10-07 00:54:37,851 INFO L179 IcfgInterpreter]: Starting interpretation [2019-10-07 00:54:37,851 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.start with input of size 1 for LOIs [2019-10-07 00:54:37,871 INFO L199 IcfgInterpreter]: Interpreting procedure main with input of size 27 for LOIs [2019-10-07 00:54:37,964 WARN L225 Elim1Store]: Array PQE input equivalent to false [2019-10-07 00:54:38,789 INFO L199 IcfgInterpreter]: Interpreting procedure __VERIFIER_assert with input of size 17 for LOIs [2019-10-07 00:54:38,817 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.init with input of size 13 for LOIs [2019-10-07 00:54:38,821 INFO L183 IcfgInterpreter]: Interpretation finished [2019-10-07 00:54:38,821 INFO L191 IcfgInterpreter]: Final predicates for locations of interest are: [2019-10-07 00:54:38,821 INFO L193 IcfgInterpreter]: Reachable states at location L11 satisfy 38#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (<= |old(~CELLCOUNT~0)| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (= 0 (select |old(#valid)| 0)) (<= 0 |old(~CELLCOUNT~0)|) (<= ~CELLCOUNT~0 2147483647) (= |#valid| |old(#valid)|) (= |#memory_int| |old(#memory_int)|) (= |#NULL.offset| 0) (<= 0 (+ ~CELLCOUNT~0 2147483648)) (= |old(~CELLCOUNT~0)| 0) (= |old(#length)| |#length|)) [2019-10-07 00:54:38,821 INFO L193 IcfgInterpreter]: Reachable states at location L3-1 satisfy 660#(and (or (and (= |__VERIFIER_assert_#in~cond| 0) (= 0 __VERIFIER_assert_~cond) (= |__VERIFIER_assert_#in~cond| __VERIFIER_assert_~cond)) (and (= |__VERIFIER_assert_#in~cond| 1) (= 0 __VERIFIER_assert_~cond) (= |__VERIFIER_assert_#in~cond| __VERIFIER_assert_~cond))) (<= 1 ~CELLCOUNT~0) (<= ~CELLCOUNT~0 2147483647) (<= __VERIFIER_assert_~cond 0) (<= |#NULL.base| 0) (<= 0 |__VERIFIER_assert_#in~cond|) (<= |__VERIFIER_assert_#in~cond| 0) (<= 0 |#NULL.base|) (<= 0 __VERIFIER_assert_~cond) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-07 00:54:38,822 INFO L193 IcfgInterpreter]: Reachable states at location __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION satisfy 665#(and (or (and (= |__VERIFIER_assert_#in~cond| 0) (= 0 __VERIFIER_assert_~cond) (= |__VERIFIER_assert_#in~cond| __VERIFIER_assert_~cond)) (and (= |__VERIFIER_assert_#in~cond| 1) (= 0 __VERIFIER_assert_~cond) (= |__VERIFIER_assert_#in~cond| __VERIFIER_assert_~cond))) (<= 1 ~CELLCOUNT~0) (<= ~CELLCOUNT~0 2147483647) (<= __VERIFIER_assert_~cond 0) (<= |#NULL.base| 0) (<= 0 |__VERIFIER_assert_#in~cond|) (<= |__VERIFIER_assert_#in~cond| 0) (<= 0 |#NULL.base|) (<= 0 __VERIFIER_assert_~cond) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-07 00:54:38,822 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initENTRY satisfy 669#(and (= |old(~CELLCOUNT~0)| ~CELLCOUNT~0) (= |old(#NULL.base)| |#NULL.base|) (= |#valid| |old(#valid)|) (= |#NULL.offset| |old(#NULL.offset)|)) [2019-10-07 00:54:38,822 INFO L193 IcfgInterpreter]: Reachable states at location L37-3 satisfy 416#(and (or (and (= |#NULL.base| 0) (= main_~MINVAL~0 2) (= |main_~#volArray~0.offset| 0) (= |#NULL.offset| 0) (= |old(~CELLCOUNT~0)| 0) (= main_~i~0 0)) (and (<= |main_~#volArray~0.offset| 0) (<= 1 ~CELLCOUNT~0) (<= 2 main_~MINVAL~0) (<= |#NULL.base| 0) (<= 0 |main_~#volArray~0.offset|) (<= 0 |#NULL.base|) (<= |old(~CELLCOUNT~0)| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (<= 0 |old(~CELLCOUNT~0)|) (<= ~CELLCOUNT~0 2147483647) (<= 1 main_~i~0) (<= main_~MINVAL~0 2))) (or (and (<= |main_~#volArray~0.offset| 0) (<= 1 ~CELLCOUNT~0) (<= 2 main_~MINVAL~0) (<= |#NULL.base| 0) (<= 0 |main_~#volArray~0.offset|) (<= 0 |#NULL.base|) (<= |old(~CELLCOUNT~0)| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (<= 0 |old(~CELLCOUNT~0)|) (<= ~CELLCOUNT~0 2147483647) (<= 1 main_~i~0) (<= main_~MINVAL~0 2)) (and (<= |main_~#volArray~0.offset| 0) (<= 1 ~CELLCOUNT~0) (<= 0 main_~i~0) (<= 2 main_~MINVAL~0) (<= |#NULL.base| 0) (<= 0 |main_~#volArray~0.offset|) (<= 0 |#NULL.base|) (<= |old(~CELLCOUNT~0)| 0) (<= main_~i~0 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (<= 0 |old(~CELLCOUNT~0)|) (<= ~CELLCOUNT~0 2147483647) (<= main_~MINVAL~0 2)))) [2019-10-07 00:54:38,822 INFO L193 IcfgInterpreter]: Reachable states at location __VERIFIER_assertEXIT satisfy 655#(and (<= 1 __VERIFIER_assert_~cond) (<= 1 |__VERIFIER_assert_#in~cond|) (<= __VERIFIER_assert_~cond 1) (<= |__VERIFIER_assert_#in~cond| 1) (or (and (<= 1 ~CELLCOUNT~0) (<= ~CELLCOUNT~0 2147483647) (= |__VERIFIER_assert_#in~cond| 1) (<= |#NULL.base| 0) (not (= 0 __VERIFIER_assert_~cond)) (<= 0 |#NULL.base|) (= |__VERIFIER_assert_#in~cond| __VERIFIER_assert_~cond)) (and (<= 1 ~CELLCOUNT~0) (<= ~CELLCOUNT~0 2147483647) (= |__VERIFIER_assert_#in~cond| 0) (<= |#NULL.base| 0) (not (= 0 __VERIFIER_assert_~cond)) (<= 0 |#NULL.base|) (= |__VERIFIER_assert_#in~cond| __VERIFIER_assert_~cond))) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-07 00:54:38,822 INFO L193 IcfgInterpreter]: Reachable states at location L3-3 satisfy 650#(and (<= 1 __VERIFIER_assert_~cond) (<= 1 |__VERIFIER_assert_#in~cond|) (<= __VERIFIER_assert_~cond 1) (<= |__VERIFIER_assert_#in~cond| 1) (or (and (<= 1 ~CELLCOUNT~0) (<= ~CELLCOUNT~0 2147483647) (= |__VERIFIER_assert_#in~cond| 1) (<= |#NULL.base| 0) (not (= 0 __VERIFIER_assert_~cond)) (<= 0 |#NULL.base|) (= |__VERIFIER_assert_#in~cond| __VERIFIER_assert_~cond)) (and (<= 1 ~CELLCOUNT~0) (<= ~CELLCOUNT~0 2147483647) (= |__VERIFIER_assert_#in~cond| 0) (<= |#NULL.base| 0) (not (= 0 __VERIFIER_assert_~cond)) (<= 0 |#NULL.base|) (= |__VERIFIER_assert_#in~cond| __VERIFIER_assert_~cond))) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-07 00:54:38,822 INFO L193 IcfgInterpreter]: Reachable states at location L39-3 satisfy 567#(and (<= |main_~#volArray~0.offset| 0) (<= 1 ~CELLCOUNT~0) |main_#t~short7| (<= 0 main_~i~0) (<= 2 main_~MINVAL~0) (<= |#NULL.base| 0) (<= 0 |main_~#volArray~0.offset|) (<= 0 |#NULL.base|) (<= |old(~CELLCOUNT~0)| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (<= 0 |old(~CELLCOUNT~0)|) (<= ~CELLCOUNT~0 2147483647) (<= main_~MINVAL~0 2)) [2019-10-07 00:54:38,823 INFO L193 IcfgInterpreter]: Reachable states at location L3 satisfy 645#(and (or (and (= |__VERIFIER_assert_#in~cond| 1) (= |__VERIFIER_assert_#in~cond| __VERIFIER_assert_~cond)) (and (= |__VERIFIER_assert_#in~cond| 0) (= |__VERIFIER_assert_#in~cond| __VERIFIER_assert_~cond))) (or (and (<= 1 ~CELLCOUNT~0) (<= ~CELLCOUNT~0 2147483647) (<= __VERIFIER_assert_~cond 0) (<= |#NULL.base| 0) (<= 0 |__VERIFIER_assert_#in~cond|) (<= |__VERIFIER_assert_#in~cond| 0) (<= 0 |#NULL.base|) (<= 0 __VERIFIER_assert_~cond) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) (and (<= 1 ~CELLCOUNT~0) (<= ~CELLCOUNT~0 2147483647) (<= |#NULL.base| 0) (<= 1 __VERIFIER_assert_~cond) (<= 0 |#NULL.base|) (<= 1 |__VERIFIER_assert_#in~cond|) (<= __VERIFIER_assert_~cond 1) (<= |__VERIFIER_assert_#in~cond| 1) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)))) [2019-10-07 00:54:38,823 INFO L193 IcfgInterpreter]: Reachable states at location L39-2 satisfy 636#(and (<= |main_~#volArray~0.offset| 0) (<= 1 ~CELLCOUNT~0) (<= 0 main_~i~0) (<= 2 main_~MINVAL~0) (<= |#NULL.base| 0) (<= 0 |main_~#volArray~0.offset|) (<= 0 |#NULL.base|) (<= |old(~CELLCOUNT~0)| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (<= 0 |old(~CELLCOUNT~0)|) (<= ~CELLCOUNT~0 2147483647) (<= main_~MINVAL~0 2)) [2019-10-07 00:54:38,823 INFO L193 IcfgInterpreter]: Reachable states at location L-1 satisfy 23#(and (= ~CELLCOUNT~0 0) (<= ~CELLCOUNT~0 0) (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= 0 (select |#valid| 0)) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 ~CELLCOUNT~0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-07 00:54:38,823 INFO L193 IcfgInterpreter]: Reachable states at location mainENTRY satisfy 33#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (<= |old(~CELLCOUNT~0)| 0) (<= 0 ~CELLCOUNT~0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (= 0 (select |old(#valid)| 0)) (<= 0 |old(~CELLCOUNT~0)|) (= |old(~CELLCOUNT~0)| ~CELLCOUNT~0) (<= ~CELLCOUNT~0 0) (= |#valid| |old(#valid)|) (= |#memory_int| |old(#memory_int)|) (= |#NULL.offset| 0) (= |old(~CELLCOUNT~0)| 0) (= |old(#length)| |#length|)) [2019-10-07 00:54:38,823 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initEXIT satisfy 674#(and (= ~CELLCOUNT~0 0) (= |#valid| (store |old(#valid)| 0 0)) (<= ~CELLCOUNT~0 0) (= 0 |#NULL.base|) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 ~CELLCOUNT~0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-07 00:54:38,823 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.startENTRY satisfy 6#true [2019-10-07 00:54:38,824 INFO L193 IcfgInterpreter]: Reachable states at location L18 satisfy 43#(and (<= |main_~#volArray~0.offset| 0) (= 0 |#NULL.base|) (<= 0 |main_~#volArray~0.offset|) (= |main_~#volArray~0.offset| 0) (<= 0 |#NULL.base|) (<= 0 |#NULL.offset|) (<= 0 |old(~CELLCOUNT~0)|) (= 2 main_~MINVAL~0) (not (= |main_~#volArray~0.base| 0)) (= |#valid| (store |old(#valid)| |main_~#volArray~0.base| 1)) (<= main_~MINVAL~0 2) (= (store |old(#length)| |main_~#volArray~0.base| (* 4 ~CELLCOUNT~0)) |#length|) (<= 1 ~CELLCOUNT~0) (<= 2 main_~MINVAL~0) (<= |#NULL.base| 0) (<= |old(~CELLCOUNT~0)| 0) (< |main_~#volArray~0.base| |#StackHeapBarrier|) (<= |#NULL.offset| 0) (= 0 (select |old(#valid)| 0)) (< 1 ~CELLCOUNT~0) (<= ~CELLCOUNT~0 2147483647) (= 0 (select |old(#valid)| |main_~#volArray~0.base|)) (= |#memory_int| |old(#memory_int)|) (= |#NULL.offset| 0) (<= 0 (+ ~CELLCOUNT~0 2147483648)) (= |old(~CELLCOUNT~0)| 0)) [2019-10-07 00:54:38,824 INFO L193 IcfgInterpreter]: Reachable states at location L22-3 satisfy 228#(and (or (and (= 0 |#NULL.base|) (= |main_~#volArray~0.offset| 0) (not (= (ite (= (ite (and (< ~CELLCOUNT~0 0) (not (= (mod ~CELLCOUNT~0 4) 0))) (+ (mod ~CELLCOUNT~0 4) (- 4)) (mod ~CELLCOUNT~0 4)) 0) 1 0) 0)) (= 2 main_~MINVAL~0) (not (= |main_~#volArray~0.base| 0)) (<= 1 main_~i~0) (= |#valid| (store |old(#valid)| |main_~#volArray~0.base| 1)) (<= main_~i~0 1) (= (store |old(#length)| |main_~#volArray~0.base| (* 4 ~CELLCOUNT~0)) |#length|) (= main_~i~0 1) (< |main_~#volArray~0.base| |#StackHeapBarrier|) (= 0 (select |old(#valid)| 0)) (< 1 ~CELLCOUNT~0) (= 0 (select |old(#valid)| |main_~#volArray~0.base|)) (= (ite (and (< ~CELLCOUNT~0 0) (not (= (mod ~CELLCOUNT~0 4) 0))) (+ (mod ~CELLCOUNT~0 4) (- 4)) (mod ~CELLCOUNT~0 4)) 0) (= |#memory_int| |old(#memory_int)|) (= |#NULL.offset| 0) (<= 0 (+ ~CELLCOUNT~0 2147483648)) (= |old(~CELLCOUNT~0)| 0)) (and (= |#NULL.base| 0) (<= 2 main_~i~0) (= main_~MINVAL~0 2) (= |main_~#volArray~0.offset| 0) (not (<= 1 main_~j~0)) (<= main_~j~0 4) (= |#NULL.offset| 0) (= |old(~CELLCOUNT~0)| 0))) (or (and (<= |main_~#volArray~0.offset| 0) (<= 1 ~CELLCOUNT~0) (<= 2 main_~MINVAL~0) (<= |#NULL.base| 0) (<= main_~j~0 1) (<= 0 |main_~#volArray~0.offset|) (<= 0 |#NULL.base|) (<= |old(~CELLCOUNT~0)| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (<= 0 |old(~CELLCOUNT~0)|) (<= ~CELLCOUNT~0 2147483647) (<= main_~MINVAL~0 2)) (and (<= |main_~#volArray~0.offset| 0) (<= 1 ~CELLCOUNT~0) (<= 2 main_~MINVAL~0) (<= |#NULL.base| 0) (<= 0 |main_~#volArray~0.offset|) (<= 0 |#NULL.base|) (<= |old(~CELLCOUNT~0)| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (<= 0 |old(~CELLCOUNT~0)|) (<= ~CELLCOUNT~0 2147483647) (<= 1 main_~i~0) (<= main_~MINVAL~0 2) (<= main_~i~0 1)))) [2019-10-07 00:54:38,824 INFO L193 IcfgInterpreter]: Reachable states at location __VERIFIER_assertENTRY satisfy 640#(and (or (and (<= 0 |__VERIFIER_assert_#in~cond|) (<= |__VERIFIER_assert_#in~cond| 0)) (and (<= 1 |__VERIFIER_assert_#in~cond|) (<= |__VERIFIER_assert_#in~cond| 1))) (or (and (<= 1 ~CELLCOUNT~0) (<= ~CELLCOUNT~0 2147483647) (= |__VERIFIER_assert_#in~cond| 1) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) (and (<= 1 ~CELLCOUNT~0) (<= ~CELLCOUNT~0 2147483647) (= |__VERIFIER_assert_#in~cond| 0) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)))) [2019-10-07 00:54:38,825 INFO L193 IcfgInterpreter]: Reachable states at location L24-3 satisfy 223#(or (and (= |#NULL.base| 0) (<= |main_~#volArray~0.offset| 0) (<= 1 ~CELLCOUNT~0) (<= 2 main_~MINVAL~0) (= main_~MINVAL~0 2) (<= |#NULL.base| 0) (<= 0 |main_~#volArray~0.offset|) (= |main_~#volArray~0.offset| 0) (<= 0 |#NULL.base|) (<= |old(~CELLCOUNT~0)| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (<= 0 |old(~CELLCOUNT~0)|) (<= ~CELLCOUNT~0 2147483647) (<= 1 main_~i~0) (<= main_~MINVAL~0 2) (<= main_~j~0 4) (= |#NULL.offset| 0) (= |old(~CELLCOUNT~0)| 0)) (and (<= |main_~#volArray~0.offset| 0) (<= 4 main_~j~0) (= 0 |#NULL.base|) (<= 0 |main_~#volArray~0.offset|) (= |main_~#volArray~0.offset| 0) (<= 0 |#NULL.base|) (not (= (ite (= (ite (and (< ~CELLCOUNT~0 0) (not (= (mod ~CELLCOUNT~0 4) 0))) (+ (mod ~CELLCOUNT~0 4) (- 4)) (mod ~CELLCOUNT~0 4)) 0) 1 0) 0)) (= main_~j~0 4) (<= 0 |#NULL.offset|) (<= 0 |old(~CELLCOUNT~0)|) (= 2 main_~MINVAL~0) (not (= |main_~#volArray~0.base| 0)) (<= 1 main_~i~0) (= |#valid| (store |old(#valid)| |main_~#volArray~0.base| 1)) (<= main_~MINVAL~0 2) (<= main_~i~0 1) (= (store |old(#length)| |main_~#volArray~0.base| (* 4 ~CELLCOUNT~0)) |#length|) (<= 1 ~CELLCOUNT~0) (<= main_~i~0 (ite (and (< ~CELLCOUNT~0 0) (not (= (mod ~CELLCOUNT~0 4) 0))) (+ (div ~CELLCOUNT~0 4) 1) (div ~CELLCOUNT~0 4))) (<= 2 main_~MINVAL~0) (<= |#NULL.base| 0) (= main_~i~0 1) (<= |old(~CELLCOUNT~0)| 0) (< |main_~#volArray~0.base| |#StackHeapBarrier|) (<= |#NULL.offset| 0) (= 0 (select |old(#valid)| 0)) (< 1 ~CELLCOUNT~0) (<= ~CELLCOUNT~0 2147483647) (= 0 (select |old(#valid)| |main_~#volArray~0.base|)) (= (ite (and (< ~CELLCOUNT~0 0) (not (= (mod ~CELLCOUNT~0 4) 0))) (+ (mod ~CELLCOUNT~0 4) (- 4)) (mod ~CELLCOUNT~0 4)) 0) (<= main_~j~0 4) (= |#memory_int| |old(#memory_int)|) (= |#NULL.offset| 0) (<= 0 (+ ~CELLCOUNT~0 2147483648)) (= |old(~CELLCOUNT~0)| 0))) [2019-10-07 00:54:40,358 WARN L191 SmtUtils]: Spent 197.00 ms on a formula simplification. DAG size of input: 83 DAG size of output: 61 [2019-10-07 00:54:40,978 WARN L191 SmtUtils]: Spent 225.00 ms on a formula simplification. DAG size of input: 38 DAG size of output: 35 [2019-10-07 00:54:42,336 INFO L211 tionRefinementEngine]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2019-10-07 00:54:42,336 INFO L224 tionRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [24, 26, 23, 14] total 75 [2019-10-07 00:54:42,337 INFO L442 AbstractCegarLoop]: Interpolant automaton has 75 states [2019-10-07 00:54:42,338 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 75 interpolants. [2019-10-07 00:54:42,338 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=430, Invalid=5119, Unknown=1, NotChecked=0, Total=5550 [2019-10-07 00:54:42,338 INFO L87 Difference]: Start difference. First operand 64 states and 73 transitions. Second operand 75 states. [2019-10-07 00:54:42,866 WARN L191 SmtUtils]: Spent 140.00 ms on a formula simplification. DAG size of input: 66 DAG size of output: 52 [2019-10-07 00:54:43,153 WARN L191 SmtUtils]: Spent 168.00 ms on a formula simplification. DAG size of input: 69 DAG size of output: 56 [2019-10-07 00:54:43,630 WARN L191 SmtUtils]: Spent 121.00 ms on a formula simplification. DAG size of input: 69 DAG size of output: 61 [2019-10-07 00:54:47,348 WARN L191 SmtUtils]: Spent 100.00 ms on a formula simplification. DAG size of input: 85 DAG size of output: 48 [2019-10-07 00:54:47,839 WARN L191 SmtUtils]: Spent 329.00 ms on a formula simplification. DAG size of input: 110 DAG size of output: 106 [2019-10-07 00:54:48,232 WARN L191 SmtUtils]: Spent 130.00 ms on a formula simplification. DAG size of input: 164 DAG size of output: 63 [2019-10-07 00:54:48,482 WARN L191 SmtUtils]: Spent 110.00 ms on a formula simplification. DAG size of input: 134 DAG size of output: 63 [2019-10-07 00:54:49,201 WARN L191 SmtUtils]: Spent 116.00 ms on a formula simplification. DAG size of input: 90 DAG size of output: 63 [2019-10-07 00:54:50,051 WARN L191 SmtUtils]: Spent 107.00 ms on a formula simplification. DAG size of input: 135 DAG size of output: 64 [2019-10-07 00:54:50,579 WARN L191 SmtUtils]: Spent 107.00 ms on a formula simplification. DAG size of input: 101 DAG size of output: 67 [2019-10-07 00:54:50,852 WARN L191 SmtUtils]: Spent 112.00 ms on a formula simplification. DAG size of input: 91 DAG size of output: 64 [2019-10-07 00:54:51,473 WARN L191 SmtUtils]: Spent 114.00 ms on a formula simplification. DAG size of input: 135 DAG size of output: 64 [2019-10-07 00:54:52,010 WARN L191 SmtUtils]: Spent 115.00 ms on a formula simplification. DAG size of input: 91 DAG size of output: 64 [2019-10-07 00:54:52,277 WARN L191 SmtUtils]: Spent 112.00 ms on a formula simplification. DAG size of input: 107 DAG size of output: 64 [2019-10-07 00:54:52,894 WARN L191 SmtUtils]: Spent 108.00 ms on a formula simplification. DAG size of input: 135 DAG size of output: 64 [2019-10-07 00:54:53,438 WARN L191 SmtUtils]: Spent 118.00 ms on a formula simplification. DAG size of input: 91 DAG size of output: 64 [2019-10-07 00:54:53,765 WARN L191 SmtUtils]: Spent 112.00 ms on a formula simplification. DAG size of input: 135 DAG size of output: 64 [2019-10-07 00:54:54,339 WARN L191 SmtUtils]: Spent 119.00 ms on a formula simplification. DAG size of input: 91 DAG size of output: 64 [2019-10-07 00:54:54,844 WARN L191 SmtUtils]: Spent 286.00 ms on a formula simplification. DAG size of input: 134 DAG size of output: 125 [2019-10-07 00:54:55,071 WARN L191 SmtUtils]: Spent 115.00 ms on a formula simplification. DAG size of input: 84 DAG size of output: 83 [2019-10-07 00:54:55,365 WARN L191 SmtUtils]: Spent 145.00 ms on a formula simplification. DAG size of input: 90 DAG size of output: 89 [2019-10-07 00:54:55,727 WARN L191 SmtUtils]: Spent 234.00 ms on a formula simplification. DAG size of input: 119 DAG size of output: 110 [2019-10-07 00:54:55,946 WARN L191 SmtUtils]: Spent 107.00 ms on a formula simplification. DAG size of input: 77 DAG size of output: 76 [2019-10-07 00:54:56,220 WARN L191 SmtUtils]: Spent 115.00 ms on a formula simplification. DAG size of input: 83 DAG size of output: 82 [2019-10-07 00:54:56,575 WARN L191 SmtUtils]: Spent 210.00 ms on a formula simplification. DAG size of input: 113 DAG size of output: 104 [2019-10-07 00:54:57,045 WARN L191 SmtUtils]: Spent 100.00 ms on a formula simplification. DAG size of input: 77 DAG size of output: 76 [2019-10-07 00:54:57,406 WARN L191 SmtUtils]: Spent 188.00 ms on a formula simplification. DAG size of input: 106 DAG size of output: 97 [2019-10-07 00:54:58,143 WARN L191 SmtUtils]: Spent 103.00 ms on a formula simplification. DAG size of input: 99 DAG size of output: 64 [2019-10-07 00:54:58,716 WARN L191 SmtUtils]: Spent 110.00 ms on a formula simplification. DAG size of input: 94 DAG size of output: 64 [2019-10-07 00:54:59,104 WARN L191 SmtUtils]: Spent 134.00 ms on a formula simplification. DAG size of input: 99 DAG size of output: 64 [2019-10-07 00:54:59,487 WARN L191 SmtUtils]: Spent 134.00 ms on a formula simplification. DAG size of input: 100 DAG size of output: 65 [2019-10-07 00:54:59,887 WARN L191 SmtUtils]: Spent 142.00 ms on a formula simplification. DAG size of input: 100 DAG size of output: 65 [2019-10-07 00:55:00,293 WARN L191 SmtUtils]: Spent 137.00 ms on a formula simplification. DAG size of input: 100 DAG size of output: 65 [2019-10-07 00:55:00,608 WARN L191 SmtUtils]: Spent 137.00 ms on a formula simplification. DAG size of input: 100 DAG size of output: 65 [2019-10-07 00:55:01,256 WARN L191 SmtUtils]: Spent 175.00 ms on a formula simplification. DAG size of input: 99 DAG size of output: 90 [2019-10-07 00:55:01,610 WARN L191 SmtUtils]: Spent 118.00 ms on a formula simplification. DAG size of input: 86 DAG size of output: 77 [2019-10-07 00:55:01,926 WARN L191 SmtUtils]: Spent 102.00 ms on a formula simplification. DAG size of input: 80 DAG size of output: 71 [2019-10-07 00:55:02,503 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-07 00:55:02,503 INFO L93 Difference]: Finished difference Result 143 states and 165 transitions. [2019-10-07 00:55:02,504 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 81 states. [2019-10-07 00:55:02,504 INFO L78 Accepts]: Start accepts. Automaton has 75 states. Word has length 87 [2019-10-07 00:55:02,504 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-07 00:55:02,505 INFO L225 Difference]: With dead ends: 143 [2019-10-07 00:55:02,505 INFO L226 Difference]: Without dead ends: 141 [2019-10-07 00:55:02,507 INFO L606 BasicCegarLoop]: 0 DeclaredPredicates, 362 GetRequests, 190 SyntacticMatches, 25 SemanticMatches, 147 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6594 ImplicationChecksByTransitivity, 27.1s TimeCoverageRelationStatistics Valid=1981, Invalid=20070, Unknown=1, NotChecked=0, Total=22052 [2019-10-07 00:55:02,508 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 141 states. [2019-10-07 00:55:02,549 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 141 to 76. [2019-10-07 00:55:02,549 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 76 states. [2019-10-07 00:55:02,550 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 76 states to 76 states and 89 transitions. [2019-10-07 00:55:02,550 INFO L78 Accepts]: Start accepts. Automaton has 76 states and 89 transitions. Word has length 87 [2019-10-07 00:55:02,551 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-07 00:55:02,551 INFO L462 AbstractCegarLoop]: Abstraction has 76 states and 89 transitions. [2019-10-07 00:55:02,551 INFO L463 AbstractCegarLoop]: Interpolant automaton has 75 states. [2019-10-07 00:55:02,551 INFO L276 IsEmpty]: Start isEmpty. Operand 76 states and 89 transitions. [2019-10-07 00:55:02,551 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 116 [2019-10-07 00:55:02,552 INFO L377 BasicCegarLoop]: Found error trace [2019-10-07 00:55:02,552 INFO L385 BasicCegarLoop]: trace histogram [13, 13, 13, 12, 12, 12, 12, 12, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-07 00:55:02,753 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 11 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-07 00:55:02,754 INFO L410 AbstractCegarLoop]: === Iteration 13 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-07 00:55:02,754 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-07 00:55:02,754 INFO L82 PathProgramCache]: Analyzing trace with hash 458918560, now seen corresponding path program 9 times [2019-10-07 00:55:02,755 INFO L150 tionRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-10-07 00:55:02,755 INFO L231 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2019-10-07 00:55:02,755 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-07 00:55:02,755 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-07 00:55:02,755 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-07 00:55:02,801 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-07 00:55:03,732 INFO L134 CoverageAnalysis]: Checked inductivity of 621 backedges. 212 proven. 115 refuted. 0 times theorem prover too weak. 294 trivial. 0 not checked. [2019-10-07 00:55:03,732 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2019-10-07 00:55:03,733 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2019-10-07 00:55:03,733 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-07 00:55:04,050 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2019-10-07 00:55:04,050 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-10-07 00:55:04,051 INFO L256 TraceCheckSpWp]: Trace formula consists of 279 conjuncts, 21 conjunts are in the unsatisfiable core [2019-10-07 00:55:04,053 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2019-10-07 00:55:04,735 INFO L134 CoverageAnalysis]: Checked inductivity of 621 backedges. 246 proven. 81 refuted. 0 times theorem prover too weak. 294 trivial. 0 not checked. [2019-10-07 00:55:04,735 INFO L322 TraceCheckSpWp]: Computing backward predicates... [2019-10-07 00:55:05,240 INFO L134 CoverageAnalysis]: Checked inductivity of 621 backedges. 246 proven. 81 refuted. 0 times theorem prover too weak. 294 trivial. 0 not checked. [2019-10-07 00:55:05,241 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSifa [2019-10-07 00:55:05,242 INFO L162 IcfgInterpreter]: Started Sifa with 18 locations of interest [2019-10-07 00:55:05,242 INFO L169 IcfgInterpreter]: Building call graph [2019-10-07 00:55:05,242 INFO L174 IcfgInterpreter]: Initial procedures are [ULTIMATE.start] [2019-10-07 00:55:05,242 INFO L179 IcfgInterpreter]: Starting interpretation [2019-10-07 00:55:05,243 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.start with input of size 1 for LOIs [2019-10-07 00:55:05,265 INFO L199 IcfgInterpreter]: Interpreting procedure main with input of size 27 for LOIs [2019-10-07 00:55:05,371 WARN L225 Elim1Store]: Array PQE input equivalent to false [2019-10-07 00:55:06,020 INFO L199 IcfgInterpreter]: Interpreting procedure __VERIFIER_assert with input of size 17 for LOIs [2019-10-07 00:55:06,048 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.init with input of size 13 for LOIs [2019-10-07 00:55:06,051 INFO L183 IcfgInterpreter]: Interpretation finished [2019-10-07 00:55:06,051 INFO L191 IcfgInterpreter]: Final predicates for locations of interest are: [2019-10-07 00:55:06,051 INFO L193 IcfgInterpreter]: Reachable states at location L11 satisfy 38#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (<= |old(~CELLCOUNT~0)| 0) (<= 0 |old(~CELLCOUNT~0)|) (= 0 (select |old(#valid)| 0)) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (<= ~CELLCOUNT~0 2147483647) (= |#valid| |old(#valid)|) (= |#memory_int| |old(#memory_int)|) (= |#NULL.offset| 0) (<= 0 (+ ~CELLCOUNT~0 2147483648)) (= |old(~CELLCOUNT~0)| 0) (= |old(#length)| |#length|)) [2019-10-07 00:55:06,052 INFO L193 IcfgInterpreter]: Reachable states at location L3-1 satisfy 653#(and (or (and (= |__VERIFIER_assert_#in~cond| 0) (= 0 __VERIFIER_assert_~cond) (= |__VERIFIER_assert_#in~cond| __VERIFIER_assert_~cond)) (and (= |__VERIFIER_assert_#in~cond| 1) (= 0 __VERIFIER_assert_~cond) (= |__VERIFIER_assert_#in~cond| __VERIFIER_assert_~cond))) (<= 1 ~CELLCOUNT~0) (<= ~CELLCOUNT~0 2147483647) (<= __VERIFIER_assert_~cond 0) (<= |#NULL.base| 0) (<= 0 |__VERIFIER_assert_#in~cond|) (<= |__VERIFIER_assert_#in~cond| 0) (<= 0 |#NULL.base|) (<= 0 __VERIFIER_assert_~cond) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-07 00:55:06,052 INFO L193 IcfgInterpreter]: Reachable states at location __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION satisfy 658#(and (or (and (= |__VERIFIER_assert_#in~cond| 0) (= 0 __VERIFIER_assert_~cond) (= |__VERIFIER_assert_#in~cond| __VERIFIER_assert_~cond)) (and (= |__VERIFIER_assert_#in~cond| 1) (= 0 __VERIFIER_assert_~cond) (= |__VERIFIER_assert_#in~cond| __VERIFIER_assert_~cond))) (<= 1 ~CELLCOUNT~0) (<= ~CELLCOUNT~0 2147483647) (<= __VERIFIER_assert_~cond 0) (<= |#NULL.base| 0) (<= 0 |__VERIFIER_assert_#in~cond|) (<= |__VERIFIER_assert_#in~cond| 0) (<= 0 |#NULL.base|) (<= 0 __VERIFIER_assert_~cond) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-07 00:55:06,052 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initENTRY satisfy 662#(and (= |old(~CELLCOUNT~0)| ~CELLCOUNT~0) (= |old(#NULL.base)| |#NULL.base|) (= |#valid| |old(#valid)|) (= |#NULL.offset| |old(#NULL.offset)|)) [2019-10-07 00:55:06,052 INFO L193 IcfgInterpreter]: Reachable states at location L37-3 satisfy 409#(and (or (and (= |#NULL.base| 0) (= main_~MINVAL~0 2) (= |main_~#volArray~0.offset| 0) (= |#NULL.offset| 0) (= |old(~CELLCOUNT~0)| 0) (= main_~i~0 0)) (and (<= |main_~#volArray~0.offset| 0) (<= 1 ~CELLCOUNT~0) (<= 2 main_~MINVAL~0) (<= |#NULL.base| 0) (<= 0 |main_~#volArray~0.offset|) (<= 0 |#NULL.base|) (<= |old(~CELLCOUNT~0)| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (<= 0 |old(~CELLCOUNT~0)|) (<= ~CELLCOUNT~0 2147483647) (<= 1 main_~i~0) (<= main_~MINVAL~0 2))) (or (and (<= |main_~#volArray~0.offset| 0) (<= 1 ~CELLCOUNT~0) (<= 2 main_~MINVAL~0) (<= |#NULL.base| 0) (<= 0 |main_~#volArray~0.offset|) (<= 0 |#NULL.base|) (<= |old(~CELLCOUNT~0)| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (<= 0 |old(~CELLCOUNT~0)|) (<= ~CELLCOUNT~0 2147483647) (<= 1 main_~i~0) (<= main_~MINVAL~0 2)) (and (<= |main_~#volArray~0.offset| 0) (<= 1 ~CELLCOUNT~0) (<= 0 main_~i~0) (<= 2 main_~MINVAL~0) (<= |#NULL.base| 0) (<= 0 |main_~#volArray~0.offset|) (<= 0 |#NULL.base|) (<= |old(~CELLCOUNT~0)| 0) (<= main_~i~0 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (<= 0 |old(~CELLCOUNT~0)|) (<= ~CELLCOUNT~0 2147483647) (<= main_~MINVAL~0 2)))) [2019-10-07 00:55:06,052 INFO L193 IcfgInterpreter]: Reachable states at location __VERIFIER_assertEXIT satisfy 648#(and (<= 1 __VERIFIER_assert_~cond) (<= 1 |__VERIFIER_assert_#in~cond|) (<= __VERIFIER_assert_~cond 1) (<= |__VERIFIER_assert_#in~cond| 1) (or (and (<= 1 ~CELLCOUNT~0) (<= ~CELLCOUNT~0 2147483647) (= |__VERIFIER_assert_#in~cond| 1) (<= |#NULL.base| 0) (not (= 0 __VERIFIER_assert_~cond)) (<= 0 |#NULL.base|) (= |__VERIFIER_assert_#in~cond| __VERIFIER_assert_~cond)) (and (<= 1 ~CELLCOUNT~0) (<= ~CELLCOUNT~0 2147483647) (= |__VERIFIER_assert_#in~cond| 0) (<= |#NULL.base| 0) (not (= 0 __VERIFIER_assert_~cond)) (<= 0 |#NULL.base|) (= |__VERIFIER_assert_#in~cond| __VERIFIER_assert_~cond))) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-07 00:55:06,052 INFO L193 IcfgInterpreter]: Reachable states at location L3-3 satisfy 643#(and (<= 1 __VERIFIER_assert_~cond) (<= 1 |__VERIFIER_assert_#in~cond|) (<= __VERIFIER_assert_~cond 1) (<= |__VERIFIER_assert_#in~cond| 1) (or (and (<= 1 ~CELLCOUNT~0) (<= ~CELLCOUNT~0 2147483647) (= |__VERIFIER_assert_#in~cond| 1) (<= |#NULL.base| 0) (not (= 0 __VERIFIER_assert_~cond)) (<= 0 |#NULL.base|) (= |__VERIFIER_assert_#in~cond| __VERIFIER_assert_~cond)) (and (<= 1 ~CELLCOUNT~0) (<= ~CELLCOUNT~0 2147483647) (= |__VERIFIER_assert_#in~cond| 0) (<= |#NULL.base| 0) (not (= 0 __VERIFIER_assert_~cond)) (<= 0 |#NULL.base|) (= |__VERIFIER_assert_#in~cond| __VERIFIER_assert_~cond))) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-07 00:55:06,053 INFO L193 IcfgInterpreter]: Reachable states at location L39-3 satisfy 560#(and (<= |main_~#volArray~0.offset| 0) (<= 1 ~CELLCOUNT~0) |main_#t~short7| (<= 0 main_~i~0) (<= 2 main_~MINVAL~0) (<= |#NULL.base| 0) (<= 0 |main_~#volArray~0.offset|) (<= 0 |#NULL.base|) (<= |old(~CELLCOUNT~0)| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (<= 0 |old(~CELLCOUNT~0)|) (<= ~CELLCOUNT~0 2147483647) (<= main_~MINVAL~0 2)) [2019-10-07 00:55:06,053 INFO L193 IcfgInterpreter]: Reachable states at location L3 satisfy 638#(and (or (and (= |__VERIFIER_assert_#in~cond| 1) (= |__VERIFIER_assert_#in~cond| __VERIFIER_assert_~cond)) (and (= |__VERIFIER_assert_#in~cond| 0) (= |__VERIFIER_assert_#in~cond| __VERIFIER_assert_~cond))) (or (and (<= 1 ~CELLCOUNT~0) (<= ~CELLCOUNT~0 2147483647) (<= __VERIFIER_assert_~cond 0) (<= |#NULL.base| 0) (<= 0 |__VERIFIER_assert_#in~cond|) (<= |__VERIFIER_assert_#in~cond| 0) (<= 0 |#NULL.base|) (<= 0 __VERIFIER_assert_~cond) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) (and (<= 1 ~CELLCOUNT~0) (<= ~CELLCOUNT~0 2147483647) (<= |#NULL.base| 0) (<= 1 __VERIFIER_assert_~cond) (<= 0 |#NULL.base|) (<= 1 |__VERIFIER_assert_#in~cond|) (<= __VERIFIER_assert_~cond 1) (<= |__VERIFIER_assert_#in~cond| 1) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)))) [2019-10-07 00:55:06,053 INFO L193 IcfgInterpreter]: Reachable states at location L39-2 satisfy 629#(and (<= |main_~#volArray~0.offset| 0) (<= 1 ~CELLCOUNT~0) (<= 0 main_~i~0) (<= 2 main_~MINVAL~0) (<= |#NULL.base| 0) (<= 0 |main_~#volArray~0.offset|) (<= 0 |#NULL.base|) (<= |old(~CELLCOUNT~0)| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (<= 0 |old(~CELLCOUNT~0)|) (<= ~CELLCOUNT~0 2147483647) (<= main_~MINVAL~0 2)) [2019-10-07 00:55:06,053 INFO L193 IcfgInterpreter]: Reachable states at location L-1 satisfy 23#(and (= ~CELLCOUNT~0 0) (<= ~CELLCOUNT~0 0) (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= 0 (select |#valid| 0)) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 ~CELLCOUNT~0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-07 00:55:06,053 INFO L193 IcfgInterpreter]: Reachable states at location mainENTRY satisfy 33#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (<= |old(~CELLCOUNT~0)| 0) (<= 0 ~CELLCOUNT~0) (<= 0 |old(~CELLCOUNT~0)|) (= 0 (select |old(#valid)| 0)) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (= |old(~CELLCOUNT~0)| ~CELLCOUNT~0) (<= ~CELLCOUNT~0 0) (= |#valid| |old(#valid)|) (= |#memory_int| |old(#memory_int)|) (= |#NULL.offset| 0) (= |old(~CELLCOUNT~0)| 0) (= |old(#length)| |#length|)) [2019-10-07 00:55:06,053 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initEXIT satisfy 667#(and (= ~CELLCOUNT~0 0) (= |#valid| (store |old(#valid)| 0 0)) (<= ~CELLCOUNT~0 0) (= 0 |#NULL.base|) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 ~CELLCOUNT~0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-07 00:55:06,053 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.startENTRY satisfy 6#true [2019-10-07 00:55:06,053 INFO L193 IcfgInterpreter]: Reachable states at location L18 satisfy 43#(and (<= |main_~#volArray~0.offset| 0) (= 0 |#NULL.base|) (<= 0 |main_~#volArray~0.offset|) (= |main_~#volArray~0.offset| 0) (<= 0 |#NULL.base|) (<= 0 |old(~CELLCOUNT~0)|) (<= 0 |#NULL.offset|) (= 2 main_~MINVAL~0) (not (= |main_~#volArray~0.base| 0)) (= |#valid| (store |old(#valid)| |main_~#volArray~0.base| 1)) (<= main_~MINVAL~0 2) (= (store |old(#length)| |main_~#volArray~0.base| (* 4 ~CELLCOUNT~0)) |#length|) (<= 1 ~CELLCOUNT~0) (<= 2 main_~MINVAL~0) (<= |#NULL.base| 0) (<= |old(~CELLCOUNT~0)| 0) (< |main_~#volArray~0.base| |#StackHeapBarrier|) (= 0 (select |old(#valid)| 0)) (<= |#NULL.offset| 0) (< 1 ~CELLCOUNT~0) (<= ~CELLCOUNT~0 2147483647) (= 0 (select |old(#valid)| |main_~#volArray~0.base|)) (= |#memory_int| |old(#memory_int)|) (= |#NULL.offset| 0) (<= 0 (+ ~CELLCOUNT~0 2147483648)) (= |old(~CELLCOUNT~0)| 0)) [2019-10-07 00:55:06,053 INFO L193 IcfgInterpreter]: Reachable states at location L22-3 satisfy 226#(and (or (and (= |#NULL.base| 0) (<= 2 main_~i~0) (= main_~MINVAL~0 2) (= |main_~#volArray~0.offset| 0) (not (<= 1 main_~j~0)) (<= main_~j~0 4) (= |#NULL.offset| 0) (= |old(~CELLCOUNT~0)| 0)) (and (= 0 |#NULL.base|) (= |main_~#volArray~0.offset| 0) (not (= (ite (= (ite (and (< ~CELLCOUNT~0 0) (not (= (mod ~CELLCOUNT~0 4) 0))) (+ (mod ~CELLCOUNT~0 4) (- 4)) (mod ~CELLCOUNT~0 4)) 0) 1 0) 0)) (= 2 main_~MINVAL~0) (not (= |main_~#volArray~0.base| 0)) (<= 1 main_~i~0) (= |#valid| (store |old(#valid)| |main_~#volArray~0.base| 1)) (<= main_~i~0 1) (= (store |old(#length)| |main_~#volArray~0.base| (* 4 ~CELLCOUNT~0)) |#length|) (= main_~i~0 1) (< |main_~#volArray~0.base| |#StackHeapBarrier|) (= 0 (select |old(#valid)| 0)) (< 1 ~CELLCOUNT~0) (= 0 (select |old(#valid)| |main_~#volArray~0.base|)) (= (ite (and (< ~CELLCOUNT~0 0) (not (= (mod ~CELLCOUNT~0 4) 0))) (+ (mod ~CELLCOUNT~0 4) (- 4)) (mod ~CELLCOUNT~0 4)) 0) (= |#memory_int| |old(#memory_int)|) (= |#NULL.offset| 0) (<= 0 (+ ~CELLCOUNT~0 2147483648)) (= |old(~CELLCOUNT~0)| 0))) (or (and (<= |main_~#volArray~0.offset| 0) (<= 1 ~CELLCOUNT~0) (<= 2 main_~MINVAL~0) (<= |#NULL.base| 0) (<= main_~j~0 1) (<= 0 |main_~#volArray~0.offset|) (<= 0 |#NULL.base|) (<= |old(~CELLCOUNT~0)| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (<= 0 |old(~CELLCOUNT~0)|) (<= ~CELLCOUNT~0 2147483647) (<= main_~MINVAL~0 2)) (and (<= |main_~#volArray~0.offset| 0) (<= 1 ~CELLCOUNT~0) (<= 2 main_~MINVAL~0) (<= |#NULL.base| 0) (<= 0 |main_~#volArray~0.offset|) (<= 0 |#NULL.base|) (<= |old(~CELLCOUNT~0)| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (<= 0 |old(~CELLCOUNT~0)|) (<= ~CELLCOUNT~0 2147483647) (<= 1 main_~i~0) (<= main_~MINVAL~0 2) (<= main_~i~0 1)))) [2019-10-07 00:55:06,054 INFO L193 IcfgInterpreter]: Reachable states at location __VERIFIER_assertENTRY satisfy 633#(and (or (and (<= 0 |__VERIFIER_assert_#in~cond|) (<= |__VERIFIER_assert_#in~cond| 0)) (and (<= 1 |__VERIFIER_assert_#in~cond|) (<= |__VERIFIER_assert_#in~cond| 1))) (or (and (<= 1 ~CELLCOUNT~0) (<= ~CELLCOUNT~0 2147483647) (= |__VERIFIER_assert_#in~cond| 1) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) (and (<= 1 ~CELLCOUNT~0) (<= ~CELLCOUNT~0 2147483647) (= |__VERIFIER_assert_#in~cond| 0) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)))) [2019-10-07 00:55:06,054 INFO L193 IcfgInterpreter]: Reachable states at location L24-3 satisfy 221#(and (or (and (<= 4 main_~j~0) (= 0 |#NULL.base|) (= |main_~#volArray~0.offset| 0) (not (= (ite (= (ite (and (< ~CELLCOUNT~0 0) (not (= (mod ~CELLCOUNT~0 4) 0))) (+ (mod ~CELLCOUNT~0 4) (- 4)) (mod ~CELLCOUNT~0 4)) 0) 1 0) 0)) (= main_~j~0 4) (= 2 main_~MINVAL~0) (not (= |main_~#volArray~0.base| 0)) (= |#valid| (store |old(#valid)| |main_~#volArray~0.base| 1)) (<= main_~i~0 1) (= (store |old(#length)| |main_~#volArray~0.base| (* 4 ~CELLCOUNT~0)) |#length|) (<= main_~i~0 (ite (and (< ~CELLCOUNT~0 0) (not (= (mod ~CELLCOUNT~0 4) 0))) (+ (div ~CELLCOUNT~0 4) 1) (div ~CELLCOUNT~0 4))) (= main_~i~0 1) (< |main_~#volArray~0.base| |#StackHeapBarrier|) (= 0 (select |old(#valid)| 0)) (< 1 ~CELLCOUNT~0) (= 0 (select |old(#valid)| |main_~#volArray~0.base|)) (= (ite (and (< ~CELLCOUNT~0 0) (not (= (mod ~CELLCOUNT~0 4) 0))) (+ (mod ~CELLCOUNT~0 4) (- 4)) (mod ~CELLCOUNT~0 4)) 0) (= |#memory_int| |old(#memory_int)|) (= |#NULL.offset| 0) (<= 0 (+ ~CELLCOUNT~0 2147483648)) (= |old(~CELLCOUNT~0)| 0)) (and (= |#NULL.base| 0) (= main_~MINVAL~0 2) (= |main_~#volArray~0.offset| 0) (= |#NULL.offset| 0) (= |old(~CELLCOUNT~0)| 0))) (<= |main_~#volArray~0.offset| 0) (<= 1 ~CELLCOUNT~0) (<= 2 main_~MINVAL~0) (<= |#NULL.base| 0) (<= 0 |main_~#volArray~0.offset|) (<= 0 |#NULL.base|) (<= |old(~CELLCOUNT~0)| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (<= 0 |old(~CELLCOUNT~0)|) (<= ~CELLCOUNT~0 2147483647) (<= 1 main_~i~0) (<= main_~MINVAL~0 2) (<= main_~j~0 4)) [2019-10-07 00:55:06,986 WARN L191 SmtUtils]: Spent 199.00 ms on a formula simplification. DAG size of input: 83 DAG size of output: 61 [2019-10-07 00:55:07,439 WARN L191 SmtUtils]: Spent 217.00 ms on a formula simplification. DAG size of input: 38 DAG size of output: 35 [2019-10-07 00:55:08,577 INFO L211 tionRefinementEngine]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2019-10-07 00:55:08,578 INFO L224 tionRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [20, 21, 19, 14] total 69 [2019-10-07 00:55:08,579 INFO L442 AbstractCegarLoop]: Interpolant automaton has 69 states [2019-10-07 00:55:08,580 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 69 interpolants. [2019-10-07 00:55:08,580 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=783, Invalid=3909, Unknown=0, NotChecked=0, Total=4692 [2019-10-07 00:55:08,581 INFO L87 Difference]: Start difference. First operand 76 states and 89 transitions. Second operand 69 states. [2019-10-07 00:55:08,942 WARN L191 SmtUtils]: Spent 137.00 ms on a formula simplification. DAG size of input: 70 DAG size of output: 45 [2019-10-07 00:55:09,169 WARN L191 SmtUtils]: Spent 164.00 ms on a formula simplification. DAG size of input: 71 DAG size of output: 47 [2019-10-07 00:55:09,495 WARN L191 SmtUtils]: Spent 146.00 ms on a formula simplification. DAG size of input: 63 DAG size of output: 55 [2019-10-07 00:55:09,806 WARN L191 SmtUtils]: Spent 151.00 ms on a formula simplification. DAG size of input: 64 DAG size of output: 56 [2019-10-07 00:55:10,094 WARN L191 SmtUtils]: Spent 141.00 ms on a formula simplification. DAG size of input: 63 DAG size of output: 55 [2019-10-07 00:55:10,477 WARN L191 SmtUtils]: Spent 104.00 ms on a formula simplification. DAG size of input: 36 DAG size of output: 32 [2019-10-07 00:55:10,684 WARN L191 SmtUtils]: Spent 138.00 ms on a formula simplification. DAG size of input: 43 DAG size of output: 39 [2019-10-07 00:55:11,025 WARN L191 SmtUtils]: Spent 147.00 ms on a formula simplification. DAG size of input: 62 DAG size of output: 61 [2019-10-07 00:55:11,307 WARN L191 SmtUtils]: Spent 113.00 ms on a formula simplification. DAG size of input: 42 DAG size of output: 41 [2019-10-07 00:55:11,908 WARN L191 SmtUtils]: Spent 110.00 ms on a formula simplification. DAG size of input: 37 DAG size of output: 36 [2019-10-07 00:55:12,337 WARN L191 SmtUtils]: Spent 111.00 ms on a formula simplification. DAG size of input: 42 DAG size of output: 41 [2019-10-07 00:55:12,969 WARN L191 SmtUtils]: Spent 119.00 ms on a formula simplification. DAG size of input: 41 DAG size of output: 40 [2019-10-07 00:55:13,585 WARN L191 SmtUtils]: Spent 110.00 ms on a formula simplification. DAG size of input: 41 DAG size of output: 40 [2019-10-07 00:55:16,983 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-07 00:55:16,984 INFO L93 Difference]: Finished difference Result 141 states and 165 transitions. [2019-10-07 00:55:16,984 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 61 states. [2019-10-07 00:55:16,984 INFO L78 Accepts]: Start accepts. Automaton has 69 states. Word has length 115 [2019-10-07 00:55:16,985 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-07 00:55:16,986 INFO L225 Difference]: With dead ends: 141 [2019-10-07 00:55:16,987 INFO L226 Difference]: Without dead ends: 87 [2019-10-07 00:55:16,989 INFO L606 BasicCegarLoop]: 0 DeclaredPredicates, 418 GetRequests, 282 SyntacticMatches, 15 SemanticMatches, 121 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5714 ImplicationChecksByTransitivity, 10.9s TimeCoverageRelationStatistics Valid=2214, Invalid=12792, Unknown=0, NotChecked=0, Total=15006 [2019-10-07 00:55:16,989 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 87 states. [2019-10-07 00:55:17,027 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 87 to 82. [2019-10-07 00:55:17,028 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 82 states. [2019-10-07 00:55:17,028 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 82 states to 82 states and 95 transitions. [2019-10-07 00:55:17,029 INFO L78 Accepts]: Start accepts. Automaton has 82 states and 95 transitions. Word has length 115 [2019-10-07 00:55:17,029 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-07 00:55:17,029 INFO L462 AbstractCegarLoop]: Abstraction has 82 states and 95 transitions. [2019-10-07 00:55:17,029 INFO L463 AbstractCegarLoop]: Interpolant automaton has 69 states. [2019-10-07 00:55:17,029 INFO L276 IsEmpty]: Start isEmpty. Operand 82 states and 95 transitions. [2019-10-07 00:55:17,030 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 122 [2019-10-07 00:55:17,030 INFO L377 BasicCegarLoop]: Found error trace [2019-10-07 00:55:17,030 INFO L385 BasicCegarLoop]: trace histogram [16, 13, 13, 13, 12, 12, 12, 12, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-07 00:55:17,231 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 12 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-07 00:55:17,231 INFO L410 AbstractCegarLoop]: === Iteration 14 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-07 00:55:17,232 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-07 00:55:17,232 INFO L82 PathProgramCache]: Analyzing trace with hash 280922672, now seen corresponding path program 10 times [2019-10-07 00:55:17,232 INFO L150 tionRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-10-07 00:55:17,232 INFO L231 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2019-10-07 00:55:17,233 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-07 00:55:17,233 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-07 00:55:17,233 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-07 00:55:17,383 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-07 00:55:18,071 INFO L134 CoverageAnalysis]: Checked inductivity of 710 backedges. 24 proven. 392 refuted. 0 times theorem prover too weak. 294 trivial. 0 not checked. [2019-10-07 00:55:18,071 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2019-10-07 00:55:18,072 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2019-10-07 00:55:18,072 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-07 00:55:18,433 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-07 00:55:18,435 INFO L256 TraceCheckSpWp]: Trace formula consists of 353 conjuncts, 59 conjunts are in the unsatisfiable core [2019-10-07 00:55:18,438 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2019-10-07 00:55:18,676 WARN L225 Elim1Store]: Array PQE input equivalent to false [2019-10-07 00:55:18,774 WARN L225 Elim1Store]: Array PQE input equivalent to false [2019-10-07 00:55:18,867 WARN L225 Elim1Store]: Array PQE input equivalent to false [2019-10-07 00:55:18,977 WARN L225 Elim1Store]: Array PQE input equivalent to false [2019-10-07 00:55:22,182 INFO L134 CoverageAnalysis]: Checked inductivity of 710 backedges. 0 proven. 416 refuted. 0 times theorem prover too weak. 294 trivial. 0 not checked. [2019-10-07 00:55:22,182 INFO L322 TraceCheckSpWp]: Computing backward predicates... [2019-10-07 00:55:27,773 WARN L191 SmtUtils]: Spent 122.00 ms on a formula simplification. DAG size of input: 63 DAG size of output: 29 [2019-10-07 00:55:27,984 WARN L191 SmtUtils]: Spent 138.00 ms on a formula simplification. DAG size of input: 81 DAG size of output: 30 [2019-10-07 00:55:28,425 INFO L134 CoverageAnalysis]: Checked inductivity of 710 backedges. 30 proven. 386 refuted. 0 times theorem prover too weak. 294 trivial. 0 not checked. [2019-10-07 00:55:28,425 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSifa [2019-10-07 00:55:28,426 INFO L162 IcfgInterpreter]: Started Sifa with 18 locations of interest [2019-10-07 00:55:28,427 INFO L169 IcfgInterpreter]: Building call graph [2019-10-07 00:55:28,427 INFO L174 IcfgInterpreter]: Initial procedures are [ULTIMATE.start] [2019-10-07 00:55:28,427 INFO L179 IcfgInterpreter]: Starting interpretation [2019-10-07 00:55:28,427 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.start with input of size 1 for LOIs [2019-10-07 00:55:28,447 INFO L199 IcfgInterpreter]: Interpreting procedure main with input of size 27 for LOIs [2019-10-07 00:55:28,548 WARN L225 Elim1Store]: Array PQE input equivalent to false [2019-10-07 00:55:29,193 INFO L199 IcfgInterpreter]: Interpreting procedure __VERIFIER_assert with input of size 17 for LOIs [2019-10-07 00:55:29,217 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.init with input of size 13 for LOIs [2019-10-07 00:55:29,220 INFO L183 IcfgInterpreter]: Interpretation finished [2019-10-07 00:55:29,221 INFO L191 IcfgInterpreter]: Final predicates for locations of interest are: [2019-10-07 00:55:29,221 INFO L193 IcfgInterpreter]: Reachable states at location L11 satisfy 38#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (<= |old(~CELLCOUNT~0)| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (= 0 (select |old(#valid)| 0)) (<= 0 |old(~CELLCOUNT~0)|) (<= ~CELLCOUNT~0 2147483647) (= |#valid| |old(#valid)|) (= |#memory_int| |old(#memory_int)|) (= |#NULL.offset| 0) (<= 0 (+ ~CELLCOUNT~0 2147483648)) (= |old(~CELLCOUNT~0)| 0) (= |old(#length)| |#length|)) [2019-10-07 00:55:29,221 INFO L193 IcfgInterpreter]: Reachable states at location L3-1 satisfy 657#(and (or (and (= |__VERIFIER_assert_#in~cond| 0) (= 0 __VERIFIER_assert_~cond) (= |__VERIFIER_assert_#in~cond| __VERIFIER_assert_~cond)) (and (= |__VERIFIER_assert_#in~cond| 1) (= 0 __VERIFIER_assert_~cond) (= |__VERIFIER_assert_#in~cond| __VERIFIER_assert_~cond))) (<= 1 ~CELLCOUNT~0) (<= ~CELLCOUNT~0 2147483647) (<= __VERIFIER_assert_~cond 0) (<= |#NULL.base| 0) (<= 0 |__VERIFIER_assert_#in~cond|) (<= |__VERIFIER_assert_#in~cond| 0) (<= 0 |#NULL.base|) (<= 0 __VERIFIER_assert_~cond) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-07 00:55:29,221 INFO L193 IcfgInterpreter]: Reachable states at location __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION satisfy 662#(and (or (and (= |__VERIFIER_assert_#in~cond| 0) (= 0 __VERIFIER_assert_~cond) (= |__VERIFIER_assert_#in~cond| __VERIFIER_assert_~cond)) (and (= |__VERIFIER_assert_#in~cond| 1) (= 0 __VERIFIER_assert_~cond) (= |__VERIFIER_assert_#in~cond| __VERIFIER_assert_~cond))) (<= 1 ~CELLCOUNT~0) (<= ~CELLCOUNT~0 2147483647) (<= __VERIFIER_assert_~cond 0) (<= |#NULL.base| 0) (<= 0 |__VERIFIER_assert_#in~cond|) (<= |__VERIFIER_assert_#in~cond| 0) (<= 0 |#NULL.base|) (<= 0 __VERIFIER_assert_~cond) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-07 00:55:29,221 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initENTRY satisfy 666#(and (= |old(~CELLCOUNT~0)| ~CELLCOUNT~0) (= |old(#NULL.base)| |#NULL.base|) (= |#valid| |old(#valid)|) (= |#NULL.offset| |old(#NULL.offset)|)) [2019-10-07 00:55:29,221 INFO L193 IcfgInterpreter]: Reachable states at location L37-3 satisfy 413#(and (or (and (= |#NULL.base| 0) (= main_~MINVAL~0 2) (= |main_~#volArray~0.offset| 0) (= |#NULL.offset| 0) (= |old(~CELLCOUNT~0)| 0) (= main_~i~0 0)) (and (<= |main_~#volArray~0.offset| 0) (<= 1 ~CELLCOUNT~0) (<= 2 main_~MINVAL~0) (<= |#NULL.base| 0) (<= 0 |main_~#volArray~0.offset|) (<= 0 |#NULL.base|) (<= |old(~CELLCOUNT~0)| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (<= 0 |old(~CELLCOUNT~0)|) (<= ~CELLCOUNT~0 2147483647) (<= 1 main_~i~0) (<= main_~MINVAL~0 2))) (or (and (<= |main_~#volArray~0.offset| 0) (<= 1 ~CELLCOUNT~0) (<= 2 main_~MINVAL~0) (<= |#NULL.base| 0) (<= 0 |main_~#volArray~0.offset|) (<= 0 |#NULL.base|) (<= |old(~CELLCOUNT~0)| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (<= 0 |old(~CELLCOUNT~0)|) (<= ~CELLCOUNT~0 2147483647) (<= 1 main_~i~0) (<= main_~MINVAL~0 2)) (and (<= |main_~#volArray~0.offset| 0) (<= 1 ~CELLCOUNT~0) (<= 0 main_~i~0) (<= 2 main_~MINVAL~0) (<= |#NULL.base| 0) (<= 0 |main_~#volArray~0.offset|) (<= 0 |#NULL.base|) (<= |old(~CELLCOUNT~0)| 0) (<= main_~i~0 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (<= 0 |old(~CELLCOUNT~0)|) (<= ~CELLCOUNT~0 2147483647) (<= main_~MINVAL~0 2)))) [2019-10-07 00:55:29,221 INFO L193 IcfgInterpreter]: Reachable states at location __VERIFIER_assertEXIT satisfy 652#(and (<= 1 __VERIFIER_assert_~cond) (<= 1 |__VERIFIER_assert_#in~cond|) (<= __VERIFIER_assert_~cond 1) (<= |__VERIFIER_assert_#in~cond| 1) (or (and (<= 1 ~CELLCOUNT~0) (<= ~CELLCOUNT~0 2147483647) (= |__VERIFIER_assert_#in~cond| 1) (<= |#NULL.base| 0) (not (= 0 __VERIFIER_assert_~cond)) (<= 0 |#NULL.base|) (= |__VERIFIER_assert_#in~cond| __VERIFIER_assert_~cond)) (and (<= 1 ~CELLCOUNT~0) (<= ~CELLCOUNT~0 2147483647) (= |__VERIFIER_assert_#in~cond| 0) (<= |#NULL.base| 0) (not (= 0 __VERIFIER_assert_~cond)) (<= 0 |#NULL.base|) (= |__VERIFIER_assert_#in~cond| __VERIFIER_assert_~cond))) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-07 00:55:29,221 INFO L193 IcfgInterpreter]: Reachable states at location L3-3 satisfy 647#(and (<= 1 __VERIFIER_assert_~cond) (<= 1 |__VERIFIER_assert_#in~cond|) (<= __VERIFIER_assert_~cond 1) (<= |__VERIFIER_assert_#in~cond| 1) (or (and (<= 1 ~CELLCOUNT~0) (<= ~CELLCOUNT~0 2147483647) (= |__VERIFIER_assert_#in~cond| 1) (<= |#NULL.base| 0) (not (= 0 __VERIFIER_assert_~cond)) (<= 0 |#NULL.base|) (= |__VERIFIER_assert_#in~cond| __VERIFIER_assert_~cond)) (and (<= 1 ~CELLCOUNT~0) (<= ~CELLCOUNT~0 2147483647) (= |__VERIFIER_assert_#in~cond| 0) (<= |#NULL.base| 0) (not (= 0 __VERIFIER_assert_~cond)) (<= 0 |#NULL.base|) (= |__VERIFIER_assert_#in~cond| __VERIFIER_assert_~cond))) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-07 00:55:29,222 INFO L193 IcfgInterpreter]: Reachable states at location L39-3 satisfy 564#(and (<= |main_~#volArray~0.offset| 0) (<= 1 ~CELLCOUNT~0) |main_#t~short7| (<= 0 main_~i~0) (<= 2 main_~MINVAL~0) (<= |#NULL.base| 0) (<= 0 |main_~#volArray~0.offset|) (<= 0 |#NULL.base|) (<= |old(~CELLCOUNT~0)| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (<= 0 |old(~CELLCOUNT~0)|) (<= ~CELLCOUNT~0 2147483647) (<= main_~MINVAL~0 2)) [2019-10-07 00:55:29,222 INFO L193 IcfgInterpreter]: Reachable states at location L3 satisfy 642#(and (or (and (= |__VERIFIER_assert_#in~cond| 1) (= |__VERIFIER_assert_#in~cond| __VERIFIER_assert_~cond)) (and (= |__VERIFIER_assert_#in~cond| 0) (= |__VERIFIER_assert_#in~cond| __VERIFIER_assert_~cond))) (or (and (<= 1 ~CELLCOUNT~0) (<= ~CELLCOUNT~0 2147483647) (<= __VERIFIER_assert_~cond 0) (<= |#NULL.base| 0) (<= 0 |__VERIFIER_assert_#in~cond|) (<= |__VERIFIER_assert_#in~cond| 0) (<= 0 |#NULL.base|) (<= 0 __VERIFIER_assert_~cond) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) (and (<= 1 ~CELLCOUNT~0) (<= ~CELLCOUNT~0 2147483647) (<= |#NULL.base| 0) (<= 1 __VERIFIER_assert_~cond) (<= 0 |#NULL.base|) (<= 1 |__VERIFIER_assert_#in~cond|) (<= __VERIFIER_assert_~cond 1) (<= |__VERIFIER_assert_#in~cond| 1) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)))) [2019-10-07 00:55:29,222 INFO L193 IcfgInterpreter]: Reachable states at location L39-2 satisfy 633#(and (<= |main_~#volArray~0.offset| 0) (<= 1 ~CELLCOUNT~0) (<= 0 main_~i~0) (<= 2 main_~MINVAL~0) (<= |#NULL.base| 0) (<= 0 |main_~#volArray~0.offset|) (<= 0 |#NULL.base|) (<= |old(~CELLCOUNT~0)| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (<= 0 |old(~CELLCOUNT~0)|) (<= ~CELLCOUNT~0 2147483647) (<= main_~MINVAL~0 2)) [2019-10-07 00:55:29,222 INFO L193 IcfgInterpreter]: Reachable states at location L-1 satisfy 23#(and (= ~CELLCOUNT~0 0) (<= ~CELLCOUNT~0 0) (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= 0 (select |#valid| 0)) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 ~CELLCOUNT~0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-07 00:55:29,222 INFO L193 IcfgInterpreter]: Reachable states at location mainENTRY satisfy 33#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (<= |old(~CELLCOUNT~0)| 0) (<= 0 ~CELLCOUNT~0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (= 0 (select |old(#valid)| 0)) (<= 0 |old(~CELLCOUNT~0)|) (= |old(~CELLCOUNT~0)| ~CELLCOUNT~0) (<= ~CELLCOUNT~0 0) (= |#valid| |old(#valid)|) (= |#memory_int| |old(#memory_int)|) (= |#NULL.offset| 0) (= |old(~CELLCOUNT~0)| 0) (= |old(#length)| |#length|)) [2019-10-07 00:55:29,222 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initEXIT satisfy 671#(and (= ~CELLCOUNT~0 0) (= |#valid| (store |old(#valid)| 0 0)) (<= ~CELLCOUNT~0 0) (= 0 |#NULL.base|) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 ~CELLCOUNT~0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-07 00:55:29,222 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.startENTRY satisfy 6#true [2019-10-07 00:55:29,222 INFO L193 IcfgInterpreter]: Reachable states at location L18 satisfy 43#(and (<= |main_~#volArray~0.offset| 0) (= 0 |#NULL.base|) (<= 0 |main_~#volArray~0.offset|) (= |main_~#volArray~0.offset| 0) (<= 0 |#NULL.base|) (<= 0 |#NULL.offset|) (<= 0 |old(~CELLCOUNT~0)|) (= 2 main_~MINVAL~0) (not (= |main_~#volArray~0.base| 0)) (= |#valid| (store |old(#valid)| |main_~#volArray~0.base| 1)) (<= main_~MINVAL~0 2) (= (store |old(#length)| |main_~#volArray~0.base| (* 4 ~CELLCOUNT~0)) |#length|) (<= 1 ~CELLCOUNT~0) (<= 2 main_~MINVAL~0) (<= |#NULL.base| 0) (<= |old(~CELLCOUNT~0)| 0) (< |main_~#volArray~0.base| |#StackHeapBarrier|) (<= |#NULL.offset| 0) (= 0 (select |old(#valid)| 0)) (< 1 ~CELLCOUNT~0) (<= ~CELLCOUNT~0 2147483647) (= 0 (select |old(#valid)| |main_~#volArray~0.base|)) (= |#memory_int| |old(#memory_int)|) (= |#NULL.offset| 0) (<= 0 (+ ~CELLCOUNT~0 2147483648)) (= |old(~CELLCOUNT~0)| 0)) [2019-10-07 00:55:29,222 INFO L193 IcfgInterpreter]: Reachable states at location L22-3 satisfy 228#(and (or (and (= 0 |#NULL.base|) (= |main_~#volArray~0.offset| 0) (not (= (ite (= (ite (and (< ~CELLCOUNT~0 0) (not (= (mod ~CELLCOUNT~0 4) 0))) (+ (mod ~CELLCOUNT~0 4) (- 4)) (mod ~CELLCOUNT~0 4)) 0) 1 0) 0)) (= 2 main_~MINVAL~0) (not (= |main_~#volArray~0.base| 0)) (<= 1 main_~i~0) (= |#valid| (store |old(#valid)| |main_~#volArray~0.base| 1)) (<= main_~i~0 1) (= (store |old(#length)| |main_~#volArray~0.base| (* 4 ~CELLCOUNT~0)) |#length|) (= main_~i~0 1) (< |main_~#volArray~0.base| |#StackHeapBarrier|) (= 0 (select |old(#valid)| 0)) (< 1 ~CELLCOUNT~0) (= 0 (select |old(#valid)| |main_~#volArray~0.base|)) (= (ite (and (< ~CELLCOUNT~0 0) (not (= (mod ~CELLCOUNT~0 4) 0))) (+ (mod ~CELLCOUNT~0 4) (- 4)) (mod ~CELLCOUNT~0 4)) 0) (= |#memory_int| |old(#memory_int)|) (= |#NULL.offset| 0) (<= 0 (+ ~CELLCOUNT~0 2147483648)) (= |old(~CELLCOUNT~0)| 0)) (and (= |#NULL.base| 0) (<= 2 main_~i~0) (= main_~MINVAL~0 2) (= |main_~#volArray~0.offset| 0) (not (<= 1 main_~j~0)) (<= main_~j~0 4) (= |#NULL.offset| 0) (= |old(~CELLCOUNT~0)| 0))) (or (and (<= |main_~#volArray~0.offset| 0) (<= 1 ~CELLCOUNT~0) (<= 2 main_~MINVAL~0) (<= |#NULL.base| 0) (<= main_~j~0 1) (<= 0 |main_~#volArray~0.offset|) (<= 0 |#NULL.base|) (<= |old(~CELLCOUNT~0)| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (<= 0 |old(~CELLCOUNT~0)|) (<= ~CELLCOUNT~0 2147483647) (<= main_~MINVAL~0 2)) (and (<= |main_~#volArray~0.offset| 0) (<= 1 ~CELLCOUNT~0) (<= 2 main_~MINVAL~0) (<= |#NULL.base| 0) (<= 0 |main_~#volArray~0.offset|) (<= 0 |#NULL.base|) (<= |old(~CELLCOUNT~0)| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (<= 0 |old(~CELLCOUNT~0)|) (<= ~CELLCOUNT~0 2147483647) (<= 1 main_~i~0) (<= main_~MINVAL~0 2) (<= main_~i~0 1)))) [2019-10-07 00:55:29,223 INFO L193 IcfgInterpreter]: Reachable states at location __VERIFIER_assertENTRY satisfy 637#(and (or (and (<= 0 |__VERIFIER_assert_#in~cond|) (<= |__VERIFIER_assert_#in~cond| 0)) (and (<= 1 |__VERIFIER_assert_#in~cond|) (<= |__VERIFIER_assert_#in~cond| 1))) (or (and (<= 1 ~CELLCOUNT~0) (<= ~CELLCOUNT~0 2147483647) (= |__VERIFIER_assert_#in~cond| 1) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) (and (<= 1 ~CELLCOUNT~0) (<= ~CELLCOUNT~0 2147483647) (= |__VERIFIER_assert_#in~cond| 0) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)))) [2019-10-07 00:55:29,223 INFO L193 IcfgInterpreter]: Reachable states at location L24-3 satisfy 223#(or (and (= |#NULL.base| 0) (<= |main_~#volArray~0.offset| 0) (<= 1 ~CELLCOUNT~0) (<= 2 main_~MINVAL~0) (= main_~MINVAL~0 2) (<= |#NULL.base| 0) (<= 0 |main_~#volArray~0.offset|) (= |main_~#volArray~0.offset| 0) (<= 0 |#NULL.base|) (<= |old(~CELLCOUNT~0)| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (<= 0 |old(~CELLCOUNT~0)|) (<= ~CELLCOUNT~0 2147483647) (<= 1 main_~i~0) (<= main_~MINVAL~0 2) (<= main_~j~0 4) (= |#NULL.offset| 0) (= |old(~CELLCOUNT~0)| 0)) (and (<= |main_~#volArray~0.offset| 0) (<= 4 main_~j~0) (= 0 |#NULL.base|) (<= 0 |main_~#volArray~0.offset|) (= |main_~#volArray~0.offset| 0) (<= 0 |#NULL.base|) (not (= (ite (= (ite (and (< ~CELLCOUNT~0 0) (not (= (mod ~CELLCOUNT~0 4) 0))) (+ (mod ~CELLCOUNT~0 4) (- 4)) (mod ~CELLCOUNT~0 4)) 0) 1 0) 0)) (= main_~j~0 4) (<= 0 |#NULL.offset|) (<= 0 |old(~CELLCOUNT~0)|) (= 2 main_~MINVAL~0) (not (= |main_~#volArray~0.base| 0)) (<= 1 main_~i~0) (= |#valid| (store |old(#valid)| |main_~#volArray~0.base| 1)) (<= main_~MINVAL~0 2) (<= main_~i~0 1) (= (store |old(#length)| |main_~#volArray~0.base| (* 4 ~CELLCOUNT~0)) |#length|) (<= 1 ~CELLCOUNT~0) (<= main_~i~0 (ite (and (< ~CELLCOUNT~0 0) (not (= (mod ~CELLCOUNT~0 4) 0))) (+ (div ~CELLCOUNT~0 4) 1) (div ~CELLCOUNT~0 4))) (<= 2 main_~MINVAL~0) (<= |#NULL.base| 0) (= main_~i~0 1) (<= |old(~CELLCOUNT~0)| 0) (< |main_~#volArray~0.base| |#StackHeapBarrier|) (<= |#NULL.offset| 0) (= 0 (select |old(#valid)| 0)) (< 1 ~CELLCOUNT~0) (<= ~CELLCOUNT~0 2147483647) (= 0 (select |old(#valid)| |main_~#volArray~0.base|)) (= (ite (and (< ~CELLCOUNT~0 0) (not (= (mod ~CELLCOUNT~0 4) 0))) (+ (mod ~CELLCOUNT~0 4) (- 4)) (mod ~CELLCOUNT~0 4)) 0) (<= main_~j~0 4) (= |#memory_int| |old(#memory_int)|) (= |#NULL.offset| 0) (<= 0 (+ ~CELLCOUNT~0 2147483648)) (= |old(~CELLCOUNT~0)| 0))) [2019-10-07 00:55:30,550 WARN L191 SmtUtils]: Spent 185.00 ms on a formula simplification. DAG size of input: 83 DAG size of output: 61 [2019-10-07 00:55:31,195 WARN L191 SmtUtils]: Spent 212.00 ms on a formula simplification. DAG size of input: 38 DAG size of output: 35 [2019-10-07 00:55:33,047 INFO L211 tionRefinementEngine]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2019-10-07 00:55:33,047 INFO L224 tionRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [28, 29, 27, 14] total 90 [2019-10-07 00:55:33,048 INFO L442 AbstractCegarLoop]: Interpolant automaton has 90 states [2019-10-07 00:55:33,049 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 90 interpolants. [2019-10-07 00:55:33,049 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=514, Invalid=7495, Unknown=1, NotChecked=0, Total=8010 [2019-10-07 00:55:33,049 INFO L87 Difference]: Start difference. First operand 82 states and 95 transitions. Second operand 90 states. [2019-10-07 00:55:33,557 WARN L191 SmtUtils]: Spent 133.00 ms on a formula simplification. DAG size of input: 66 DAG size of output: 52 [2019-10-07 00:55:33,868 WARN L191 SmtUtils]: Spent 157.00 ms on a formula simplification. DAG size of input: 67 DAG size of output: 54 [2019-10-07 00:55:35,933 WARN L191 SmtUtils]: Spent 132.00 ms on a formula simplification. DAG size of input: 110 DAG size of output: 60 [2019-10-07 00:55:36,199 WARN L191 SmtUtils]: Spent 125.00 ms on a formula simplification. DAG size of input: 106 DAG size of output: 59 [2019-10-07 00:55:37,967 WARN L191 SmtUtils]: Spent 255.00 ms on a formula simplification. DAG size of input: 98 DAG size of output: 96 [2019-10-07 00:55:39,749 WARN L191 SmtUtils]: Spent 254.00 ms on a formula simplification. DAG size of input: 98 DAG size of output: 96 [2019-10-07 00:55:41,414 WARN L191 SmtUtils]: Spent 254.00 ms on a formula simplification. DAG size of input: 98 DAG size of output: 96 [2019-10-07 00:55:42,489 WARN L191 SmtUtils]: Spent 230.00 ms on a formula simplification. DAG size of input: 98 DAG size of output: 96 [2019-10-07 00:55:43,308 WARN L191 SmtUtils]: Spent 264.00 ms on a formula simplification. DAG size of input: 98 DAG size of output: 96 [2019-10-07 00:55:44,097 WARN L191 SmtUtils]: Spent 247.00 ms on a formula simplification. DAG size of input: 97 DAG size of output: 95 [2019-10-07 00:55:44,901 WARN L191 SmtUtils]: Spent 252.00 ms on a formula simplification. DAG size of input: 96 DAG size of output: 94 [2019-10-07 00:55:45,669 WARN L191 SmtUtils]: Spent 220.00 ms on a formula simplification. DAG size of input: 89 DAG size of output: 87 [2019-10-07 00:55:46,105 WARN L191 SmtUtils]: Spent 192.00 ms on a formula simplification. DAG size of input: 82 DAG size of output: 80 [2019-10-07 00:55:46,505 WARN L191 SmtUtils]: Spent 183.00 ms on a formula simplification. DAG size of input: 76 DAG size of output: 74 [2019-10-07 00:55:46,905 WARN L191 SmtUtils]: Spent 152.00 ms on a formula simplification. DAG size of input: 69 DAG size of output: 67 [2019-10-07 00:55:56,010 WARN L191 SmtUtils]: Spent 145.00 ms on a formula simplification. DAG size of input: 75 DAG size of output: 72 [2019-10-07 00:55:56,228 WARN L191 SmtUtils]: Spent 131.00 ms on a formula simplification. DAG size of input: 68 DAG size of output: 64 [2019-10-07 00:55:57,113 WARN L191 SmtUtils]: Spent 134.00 ms on a formula simplification. DAG size of input: 69 DAG size of output: 66 [2019-10-07 00:55:57,303 WARN L191 SmtUtils]: Spent 111.00 ms on a formula simplification. DAG size of input: 62 DAG size of output: 58 [2019-10-07 00:55:57,581 WARN L191 SmtUtils]: Spent 105.00 ms on a formula simplification. DAG size of input: 62 DAG size of output: 59 [2019-10-07 00:55:58,087 WARN L191 SmtUtils]: Spent 100.00 ms on a formula simplification. DAG size of input: 55 DAG size of output: 51 [2019-10-07 00:55:58,090 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-07 00:55:58,091 INFO L93 Difference]: Finished difference Result 223 states and 263 transitions. [2019-10-07 00:55:58,091 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 117 states. [2019-10-07 00:55:58,091 INFO L78 Accepts]: Start accepts. Automaton has 90 states. Word has length 121 [2019-10-07 00:55:58,091 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-07 00:55:58,093 INFO L225 Difference]: With dead ends: 223 [2019-10-07 00:55:58,093 INFO L226 Difference]: Without dead ends: 221 [2019-10-07 00:55:58,096 INFO L606 BasicCegarLoop]: 0 DeclaredPredicates, 504 GetRequests, 270 SyntacticMatches, 36 SemanticMatches, 198 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 12512 ImplicationChecksByTransitivity, 30.2s TimeCoverageRelationStatistics Valid=2469, Invalid=37330, Unknown=1, NotChecked=0, Total=39800 [2019-10-07 00:55:58,097 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 221 states. [2019-10-07 00:55:58,164 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 221 to 148. [2019-10-07 00:55:58,164 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 148 states. [2019-10-07 00:55:58,165 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 148 states to 148 states and 178 transitions. [2019-10-07 00:55:58,166 INFO L78 Accepts]: Start accepts. Automaton has 148 states and 178 transitions. Word has length 121 [2019-10-07 00:55:58,166 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-07 00:55:58,166 INFO L462 AbstractCegarLoop]: Abstraction has 148 states and 178 transitions. [2019-10-07 00:55:58,166 INFO L463 AbstractCegarLoop]: Interpolant automaton has 90 states. [2019-10-07 00:55:58,166 INFO L276 IsEmpty]: Start isEmpty. Operand 148 states and 178 transitions. [2019-10-07 00:55:58,168 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 135 [2019-10-07 00:55:58,168 INFO L377 BasicCegarLoop]: Found error trace [2019-10-07 00:55:58,168 INFO L385 BasicCegarLoop]: trace histogram [20, 14, 14, 14, 13, 13, 13, 13, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-07 00:55:58,374 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 13 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-07 00:55:58,375 INFO L410 AbstractCegarLoop]: === Iteration 15 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-07 00:55:58,375 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-07 00:55:58,376 INFO L82 PathProgramCache]: Analyzing trace with hash -1174245748, now seen corresponding path program 11 times [2019-10-07 00:55:58,376 INFO L150 tionRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-10-07 00:55:58,376 INFO L231 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2019-10-07 00:55:58,376 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-07 00:55:58,376 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-07 00:55:58,377 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-07 00:55:58,544 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-07 00:55:59,593 INFO L134 CoverageAnalysis]: Checked inductivity of 913 backedges. 26 proven. 552 refuted. 0 times theorem prover too weak. 335 trivial. 0 not checked. [2019-10-07 00:55:59,593 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2019-10-07 00:55:59,594 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2019-10-07 00:55:59,594 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-07 00:56:07,650 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 14 check-sat command(s) [2019-10-07 00:56:07,650 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-10-07 00:56:07,659 INFO L256 TraceCheckSpWp]: Trace formula consists of 375 conjuncts, 80 conjunts are in the unsatisfiable core [2019-10-07 00:56:07,663 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2019-10-07 00:56:08,253 WARN L225 Elim1Store]: Array PQE input equivalent to false [2019-10-07 00:56:08,440 WARN L225 Elim1Store]: Array PQE input equivalent to false [2019-10-07 00:56:08,688 WARN L225 Elim1Store]: Array PQE input equivalent to false [2019-10-07 00:56:09,166 WARN L225 Elim1Store]: Array PQE input equivalent to false [2019-10-07 00:56:09,433 WARN L225 Elim1Store]: Array PQE input equivalent to false [2019-10-07 00:56:09,742 WARN L225 Elim1Store]: Array PQE input equivalent to false [2019-10-07 00:56:09,963 WARN L225 Elim1Store]: Array PQE input equivalent to false [2019-10-07 00:56:10,288 WARN L191 SmtUtils]: Spent 318.00 ms on a formula simplification. DAG size of input: 167 DAG size of output: 83 [2019-10-07 00:56:10,452 WARN L191 SmtUtils]: Spent 162.00 ms on a formula simplification. DAG size of input: 96 DAG size of output: 58