java -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata ./data -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/default/automizer/svcomp-Reach-32bit-Automizer_Default.epf --traceabstraction.trace.refinement.strategy SIFA_TAIPAN --sifa.abstract.domain CompoundDomain --rcfgbuilder.size.of.a.code.block LoopFreeBlock --sifa.call.summarizer TopInputCallSummarizer --sifa.fluid SizeLimitFluid --sifa.simplification.technique SIMPLIFY_QUICK -i ../../../trunk/examples/svcomp/reducercommutativity/sep05-1.i -------------------------------------------------------------------------------- This is Ultimate 0.1.24-36ac518-m [2019-10-07 15:27:15,283 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-10-07 15:27:15,286 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-10-07 15:27:15,298 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-10-07 15:27:15,299 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-10-07 15:27:15,300 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-10-07 15:27:15,301 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-10-07 15:27:15,303 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-10-07 15:27:15,304 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-10-07 15:27:15,305 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-10-07 15:27:15,306 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-10-07 15:27:15,307 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-10-07 15:27:15,307 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-10-07 15:27:15,308 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-10-07 15:27:15,309 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-10-07 15:27:15,310 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-10-07 15:27:15,311 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-10-07 15:27:15,312 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-10-07 15:27:15,314 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-10-07 15:27:15,316 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-10-07 15:27:15,318 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-10-07 15:27:15,319 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-10-07 15:27:15,320 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-10-07 15:27:15,321 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-10-07 15:27:15,323 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... 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[2019-10-07 15:27:15,336 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-10-07 15:27:15,340 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-10-07 15:27:15,341 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-10-07 15:27:15,345 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/default/automizer/svcomp-Reach-32bit-Automizer_Default.epf [2019-10-07 15:27:15,366 INFO L113 SettingsManager]: Loading preferences was successful [2019-10-07 15:27:15,367 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-10-07 15:27:15,369 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-10-07 15:27:15,369 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-10-07 15:27:15,369 INFO L138 SettingsManager]: * Use SBE=true [2019-10-07 15:27:15,369 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-10-07 15:27:15,370 INFO L138 SettingsManager]: * sizeof long=4 [2019-10-07 15:27:15,370 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-10-07 15:27:15,370 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-10-07 15:27:15,370 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-10-07 15:27:15,371 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-10-07 15:27:15,372 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-10-07 15:27:15,372 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-10-07 15:27:15,372 INFO L138 SettingsManager]: * sizeof long double=12 [2019-10-07 15:27:15,372 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-10-07 15:27:15,373 INFO L138 SettingsManager]: * Use constant arrays=true [2019-10-07 15:27:15,373 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-10-07 15:27:15,373 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-10-07 15:27:15,373 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-10-07 15:27:15,373 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-10-07 15:27:15,374 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-10-07 15:27:15,374 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-10-07 15:27:15,374 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-10-07 15:27:15,374 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-10-07 15:27:15,375 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-10-07 15:27:15,375 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-10-07 15:27:15,375 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-10-07 15:27:15,375 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-10-07 15:27:15,375 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: Trace refinement strategy -> SIFA_TAIPAN Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.sifa: Abstract Domain -> CompoundDomain Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder: Size of a code block -> LoopFreeBlock Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.sifa: Call Summarizer -> TopInputCallSummarizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.sifa: Fluid -> SizeLimitFluid Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.sifa: Simplification Technique -> SIMPLIFY_QUICK [2019-10-07 15:27:15,694 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-10-07 15:27:15,715 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-10-07 15:27:15,718 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-10-07 15:27:15,719 INFO L271 PluginConnector]: Initializing CDTParser... [2019-10-07 15:27:15,720 INFO L275 PluginConnector]: CDTParser initialized [2019-10-07 15:27:15,720 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/reducercommutativity/sep05-1.i [2019-10-07 15:27:15,796 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/f855c7ca2/2897d91216034b4bb3f0e5b5c5055503/FLAG7ba830de6 [2019-10-07 15:27:16,220 INFO L306 CDTParser]: Found 1 translation units. [2019-10-07 15:27:16,221 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/reducercommutativity/sep05-1.i [2019-10-07 15:27:16,227 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/f855c7ca2/2897d91216034b4bb3f0e5b5c5055503/FLAG7ba830de6 [2019-10-07 15:27:16,649 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/f855c7ca2/2897d91216034b4bb3f0e5b5c5055503 [2019-10-07 15:27:16,659 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-10-07 15:27:16,661 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2019-10-07 15:27:16,662 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-10-07 15:27:16,662 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-10-07 15:27:16,666 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-10-07 15:27:16,667 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.10 03:27:16" (1/1) ... [2019-10-07 15:27:16,669 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@2ce2b1cd and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.10 03:27:16, skipping insertion in model container [2019-10-07 15:27:16,669 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.10 03:27:16" (1/1) ... [2019-10-07 15:27:16,677 INFO L142 MainTranslator]: Starting translation in SV-COMP mode [2019-10-07 15:27:16,695 INFO L173 MainTranslator]: Built tables and reachable declarations [2019-10-07 15:27:16,902 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-10-07 15:27:16,912 INFO L188 MainTranslator]: Completed pre-run [2019-10-07 15:27:16,932 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-10-07 15:27:17,037 INFO L192 MainTranslator]: Completed translation [2019-10-07 15:27:17,038 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.10 03:27:17 WrapperNode [2019-10-07 15:27:17,038 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-10-07 15:27:17,039 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-10-07 15:27:17,039 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-10-07 15:27:17,039 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-10-07 15:27:17,050 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.10 03:27:17" (1/1) ... [2019-10-07 15:27:17,051 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.10 03:27:17" (1/1) ... [2019-10-07 15:27:17,058 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.10 03:27:17" (1/1) ... [2019-10-07 15:27:17,059 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.10 03:27:17" (1/1) ... [2019-10-07 15:27:17,067 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.10 03:27:17" (1/1) ... [2019-10-07 15:27:17,077 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.10 03:27:17" (1/1) ... [2019-10-07 15:27:17,079 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.10 03:27:17" (1/1) ... [2019-10-07 15:27:17,082 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-10-07 15:27:17,088 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-10-07 15:27:17,088 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-10-07 15:27:17,088 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-10-07 15:27:17,089 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.10 03:27:17" (1/1) ... No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-10-07 15:27:17,152 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2019-10-07 15:27:17,152 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-10-07 15:27:17,153 INFO L138 BoogieDeclarations]: Found implementation of procedure sep [2019-10-07 15:27:17,153 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2019-10-07 15:27:17,153 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_error [2019-10-07 15:27:17,153 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_int [2019-10-07 15:27:17,153 INFO L130 BoogieDeclarations]: Found specification of procedure sep [2019-10-07 15:27:17,153 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2019-10-07 15:27:17,154 INFO L130 BoogieDeclarations]: Found specification of procedure main [2019-10-07 15:27:17,154 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-10-07 15:27:17,154 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-10-07 15:27:17,154 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-10-07 15:27:17,154 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2019-10-07 15:27:17,154 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-10-07 15:27:17,537 INFO L279 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-10-07 15:27:17,538 INFO L284 CfgBuilder]: Removed 3 assume(true) statements. [2019-10-07 15:27:17,539 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.10 03:27:17 BoogieIcfgContainer [2019-10-07 15:27:17,539 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-10-07 15:27:17,540 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-10-07 15:27:17,540 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-10-07 15:27:17,544 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-10-07 15:27:17,544 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.10 03:27:16" (1/3) ... [2019-10-07 15:27:17,545 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@536a9238 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.10 03:27:17, skipping insertion in model container [2019-10-07 15:27:17,545 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.10 03:27:17" (2/3) ... [2019-10-07 15:27:17,545 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@536a9238 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.10 03:27:17, skipping insertion in model container [2019-10-07 15:27:17,545 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.10 03:27:17" (3/3) ... [2019-10-07 15:27:17,547 INFO L109 eAbstractionObserver]: Analyzing ICFG sep05-1.i [2019-10-07 15:27:17,557 INFO L152 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-10-07 15:27:17,564 INFO L164 ceAbstractionStarter]: Appying trace abstraction to program that has 1 error locations. [2019-10-07 15:27:17,574 INFO L249 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2019-10-07 15:27:17,596 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-10-07 15:27:17,596 INFO L374 AbstractCegarLoop]: Hoare is true [2019-10-07 15:27:17,596 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-10-07 15:27:17,597 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-10-07 15:27:17,597 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-10-07 15:27:17,597 INFO L378 AbstractCegarLoop]: Difference is false [2019-10-07 15:27:17,597 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-10-07 15:27:17,597 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-10-07 15:27:17,613 INFO L276 IsEmpty]: Start isEmpty. Operand 23 states. [2019-10-07 15:27:17,618 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2019-10-07 15:27:17,618 INFO L377 BasicCegarLoop]: Found error trace [2019-10-07 15:27:17,619 INFO L385 BasicCegarLoop]: trace histogram [3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-07 15:27:17,620 INFO L410 AbstractCegarLoop]: === Iteration 1 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-07 15:27:17,625 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-07 15:27:17,626 INFO L82 PathProgramCache]: Analyzing trace with hash -1553264816, now seen corresponding path program 1 times [2019-10-07 15:27:17,632 INFO L150 tionRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-10-07 15:27:17,633 INFO L231 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2019-10-07 15:27:17,633 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-07 15:27:17,633 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-07 15:27:17,633 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-07 15:27:17,722 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-07 15:27:17,802 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2019-10-07 15:27:17,803 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2019-10-07 15:27:17,804 INFO L211 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-10-07 15:27:17,804 INFO L224 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-10-07 15:27:17,808 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-10-07 15:27:17,819 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-10-07 15:27:17,820 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-10-07 15:27:17,822 INFO L87 Difference]: Start difference. First operand 23 states. Second operand 3 states. [2019-10-07 15:27:17,856 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-07 15:27:17,856 INFO L93 Difference]: Finished difference Result 41 states and 51 transitions. [2019-10-07 15:27:17,857 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-10-07 15:27:17,859 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 24 [2019-10-07 15:27:17,859 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-07 15:27:17,866 INFO L225 Difference]: With dead ends: 41 [2019-10-07 15:27:17,866 INFO L226 Difference]: Without dead ends: 20 [2019-10-07 15:27:17,869 INFO L606 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-10-07 15:27:17,884 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20 states. [2019-10-07 15:27:17,904 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20 to 20. [2019-10-07 15:27:17,905 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20 states. [2019-10-07 15:27:17,906 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20 states to 20 states and 24 transitions. [2019-10-07 15:27:17,908 INFO L78 Accepts]: Start accepts. Automaton has 20 states and 24 transitions. Word has length 24 [2019-10-07 15:27:17,909 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-07 15:27:17,909 INFO L462 AbstractCegarLoop]: Abstraction has 20 states and 24 transitions. [2019-10-07 15:27:17,909 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-10-07 15:27:17,909 INFO L276 IsEmpty]: Start isEmpty. Operand 20 states and 24 transitions. [2019-10-07 15:27:17,911 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2019-10-07 15:27:17,911 INFO L377 BasicCegarLoop]: Found error trace [2019-10-07 15:27:17,912 INFO L385 BasicCegarLoop]: trace histogram [3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-07 15:27:17,912 INFO L410 AbstractCegarLoop]: === Iteration 2 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-07 15:27:17,913 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-07 15:27:17,913 INFO L82 PathProgramCache]: Analyzing trace with hash -1274606805, now seen corresponding path program 1 times [2019-10-07 15:27:17,913 INFO L150 tionRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-10-07 15:27:17,913 INFO L231 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2019-10-07 15:27:17,914 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-07 15:27:17,914 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-07 15:27:17,914 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-07 15:27:17,944 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-07 15:27:17,993 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2019-10-07 15:27:17,994 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2019-10-07 15:27:17,994 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2019-10-07 15:27:17,995 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-07 15:27:18,081 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-07 15:27:18,084 INFO L256 TraceCheckSpWp]: Trace formula consists of 123 conjuncts, 2 conjunts are in the unsatisfiable core [2019-10-07 15:27:18,093 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2019-10-07 15:27:18,125 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2019-10-07 15:27:18,125 INFO L322 TraceCheckSpWp]: Computing backward predicates... [2019-10-07 15:27:18,182 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2019-10-07 15:27:18,182 INFO L211 tionRefinementEngine]: Constructing automaton from 1 perfect and 2 imperfect interpolant sequences. [2019-10-07 15:27:18,182 INFO L224 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [3, 3] total 5 [2019-10-07 15:27:18,184 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-10-07 15:27:18,184 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-10-07 15:27:18,185 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-10-07 15:27:18,185 INFO L87 Difference]: Start difference. First operand 20 states and 24 transitions. Second operand 3 states. [2019-10-07 15:27:18,209 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-07 15:27:18,210 INFO L93 Difference]: Finished difference Result 33 states and 43 transitions. [2019-10-07 15:27:18,211 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-10-07 15:27:18,211 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 25 [2019-10-07 15:27:18,211 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-07 15:27:18,212 INFO L225 Difference]: With dead ends: 33 [2019-10-07 15:27:18,212 INFO L226 Difference]: Without dead ends: 21 [2019-10-07 15:27:18,214 INFO L606 BasicCegarLoop]: 0 DeclaredPredicates, 52 GetRequests, 49 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-10-07 15:27:18,214 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21 states. [2019-10-07 15:27:18,222 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21 to 21. [2019-10-07 15:27:18,222 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21 states. [2019-10-07 15:27:18,224 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21 states to 21 states and 25 transitions. [2019-10-07 15:27:18,225 INFO L78 Accepts]: Start accepts. Automaton has 21 states and 25 transitions. Word has length 25 [2019-10-07 15:27:18,225 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-07 15:27:18,225 INFO L462 AbstractCegarLoop]: Abstraction has 21 states and 25 transitions. [2019-10-07 15:27:18,225 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-10-07 15:27:18,226 INFO L276 IsEmpty]: Start isEmpty. Operand 21 states and 25 transitions. [2019-10-07 15:27:18,229 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2019-10-07 15:27:18,229 INFO L377 BasicCegarLoop]: Found error trace [2019-10-07 15:27:18,229 INFO L385 BasicCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-07 15:27:18,437 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 2 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-07 15:27:18,438 INFO L410 AbstractCegarLoop]: === Iteration 3 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-07 15:27:18,438 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-07 15:27:18,438 INFO L82 PathProgramCache]: Analyzing trace with hash -544560989, now seen corresponding path program 1 times [2019-10-07 15:27:18,439 INFO L150 tionRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-10-07 15:27:18,439 INFO L231 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2019-10-07 15:27:18,439 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-07 15:27:18,439 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-07 15:27:18,439 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-07 15:27:18,481 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-07 15:27:18,562 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2019-10-07 15:27:18,562 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2019-10-07 15:27:18,563 INFO L211 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-10-07 15:27:18,563 INFO L224 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-10-07 15:27:18,563 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-10-07 15:27:18,564 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-10-07 15:27:18,564 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-10-07 15:27:18,564 INFO L87 Difference]: Start difference. First operand 21 states and 25 transitions. Second operand 3 states. [2019-10-07 15:27:18,579 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-07 15:27:18,580 INFO L93 Difference]: Finished difference Result 31 states and 36 transitions. [2019-10-07 15:27:18,581 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-10-07 15:27:18,581 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 28 [2019-10-07 15:27:18,582 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-07 15:27:18,583 INFO L225 Difference]: With dead ends: 31 [2019-10-07 15:27:18,583 INFO L226 Difference]: Without dead ends: 22 [2019-10-07 15:27:18,583 INFO L606 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-10-07 15:27:18,584 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22 states. [2019-10-07 15:27:18,590 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22 to 22. [2019-10-07 15:27:18,590 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22 states. [2019-10-07 15:27:18,591 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22 states to 22 states and 26 transitions. [2019-10-07 15:27:18,592 INFO L78 Accepts]: Start accepts. Automaton has 22 states and 26 transitions. Word has length 28 [2019-10-07 15:27:18,594 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-07 15:27:18,594 INFO L462 AbstractCegarLoop]: Abstraction has 22 states and 26 transitions. [2019-10-07 15:27:18,595 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-10-07 15:27:18,595 INFO L276 IsEmpty]: Start isEmpty. Operand 22 states and 26 transitions. [2019-10-07 15:27:18,597 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2019-10-07 15:27:18,597 INFO L377 BasicCegarLoop]: Found error trace [2019-10-07 15:27:18,597 INFO L385 BasicCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-07 15:27:18,598 INFO L410 AbstractCegarLoop]: === Iteration 4 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-07 15:27:18,598 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-07 15:27:18,598 INFO L82 PathProgramCache]: Analyzing trace with hash -5957836, now seen corresponding path program 1 times [2019-10-07 15:27:18,598 INFO L150 tionRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-10-07 15:27:18,599 INFO L231 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2019-10-07 15:27:18,599 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-07 15:27:18,599 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-07 15:27:18,599 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-07 15:27:18,652 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-07 15:27:18,735 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2019-10-07 15:27:18,736 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2019-10-07 15:27:18,737 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2019-10-07 15:27:18,737 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-07 15:27:18,840 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-07 15:27:18,842 INFO L256 TraceCheckSpWp]: Trace formula consists of 139 conjuncts, 3 conjunts are in the unsatisfiable core [2019-10-07 15:27:18,845 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2019-10-07 15:27:18,857 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2019-10-07 15:27:18,858 INFO L322 TraceCheckSpWp]: Computing backward predicates... [2019-10-07 15:27:18,890 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2019-10-07 15:27:18,891 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSifa [2019-10-07 15:27:18,924 INFO L162 IcfgInterpreter]: Started Sifa with 19 locations of interest [2019-10-07 15:27:18,924 INFO L169 IcfgInterpreter]: Building call graph [2019-10-07 15:27:18,931 INFO L174 IcfgInterpreter]: Initial procedures are [ULTIMATE.start] [2019-10-07 15:27:18,939 INFO L179 IcfgInterpreter]: Starting interpretation [2019-10-07 15:27:18,940 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.start with input of size 1 for LOIs [2019-10-07 15:27:19,102 INFO L199 IcfgInterpreter]: Interpreting procedure main with input of size 21 for LOIs [2019-10-07 15:27:21,181 INFO L199 IcfgInterpreter]: Interpreting procedure sep with input of size 1 for LOIs [2019-10-07 15:27:21,259 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.init with input of size 10 for LOIs [2019-10-07 15:27:21,264 INFO L183 IcfgInterpreter]: Interpretation finished [2019-10-07 15:27:21,264 INFO L191 IcfgInterpreter]: Final predicates for locations of interest are: [2019-10-07 15:27:21,264 INFO L193 IcfgInterpreter]: Reachable states at location L26-4 satisfy 73#(and (not (< main_~i~1 5)) (<= 5 main_~i~1)) [2019-10-07 15:27:21,265 INFO L193 IcfgInterpreter]: Reachable states at location L33 satisfy 601#(exists ((v_prenex_2 Int) (v_prenex_1 Int) (v_sep_~ret~0_BEFORE_RETURN_2 Int) (v_sep_~ret~0_BEFORE_RETURN_1 Int)) (or (and (<= main_~ret~1 2147483647) (= main_~ret~1 (+ (mod v_sep_~ret~0_BEFORE_RETURN_2 4294967296) (- 4294967296))) (not (< main_~i~1 5)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (not (<= (mod v_sep_~ret~0_BEFORE_RETURN_2 4294967296) 2147483647)) (<= 0 (+ main_~ret~1 2147483648))) (and (<= main_~ret~1 2147483647) (not (<= (mod v_sep_~ret~0_BEFORE_RETURN_1 4294967296) 2147483647)) (not (< main_~i~1 5)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (= main_~ret~1 (+ (mod v_sep_~ret~0_BEFORE_RETURN_1 4294967296) (- 4294967296))) (<= 0 (+ main_~ret~1 2147483648))) (and (<= main_~ret~1 2147483647) (= main_~ret~1 (mod v_prenex_1 4294967296)) (not (< main_~i~1 5)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (<= (mod v_prenex_1 4294967296) 2147483647) (<= 0 (+ main_~ret~1 2147483648))) (and (<= main_~ret~1 2147483647) (= main_~ret~1 (mod v_prenex_2 4294967296)) (not (< main_~i~1 5)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (<= (mod v_prenex_2 4294967296) 2147483647) (<= 0 (+ main_~ret~1 2147483648))))) [2019-10-07 15:27:21,265 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initENTRY satisfy 666#(and (= |old(#NULL.base)| |#NULL.base|) (= |#valid| |old(#valid)|) (= |#NULL.offset| |old(#NULL.offset)|)) [2019-10-07 15:27:21,265 INFO L193 IcfgInterpreter]: Reachable states at location L26-3 satisfy 68#true [2019-10-07 15:27:21,265 INFO L193 IcfgInterpreter]: Reachable states at location L7-3 satisfy 657#(<= 0 sep_~i~0) [2019-10-07 15:27:21,266 INFO L193 IcfgInterpreter]: Reachable states at location sepENTRY satisfy 610#true [2019-10-07 15:27:21,266 INFO L193 IcfgInterpreter]: Reachable states at location mainErr0ASSERT_VIOLATIONERROR_FUNCTION satisfy 243#(or (and (not (= main_~ret~1 main_~ret2~0)) (exists ((v_prenex_29 Int) (v_prenex_30 Int) (v_sep_~ret~0_BEFORE_RETURN_6 Int) (v_sep_~ret~0_BEFORE_RETURN_5 Int)) (or (and (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 16))) (<= (mod v_prenex_29 4294967296) 2147483647) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (mod v_prenex_29 4294967296) main_~ret5~0) (not (< main_~i~2 4))) (and (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 16))) (not (<= (mod v_sep_~ret~0_BEFORE_RETURN_5 4294967296) 2147483647)) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (+ (mod v_sep_~ret~0_BEFORE_RETURN_5 4294967296) (- 4294967296)) main_~ret5~0) (not (< main_~i~2 4))) (and (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 16))) (= (+ (mod v_prenex_30 4294967296) (- 4294967296)) main_~ret5~0) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (not (<= (mod v_prenex_30 4294967296) 2147483647)) (not (< main_~i~2 4))) (and (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 16))) (= main_~ret5~0 (mod v_sep_~ret~0_BEFORE_RETURN_6 4294967296)) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (<= (mod v_sep_~ret~0_BEFORE_RETURN_6 4294967296) 2147483647) (not (< main_~i~2 4)))))) (and (exists ((v_prenex_29 Int) (v_prenex_30 Int) (v_sep_~ret~0_BEFORE_RETURN_6 Int) (v_sep_~ret~0_BEFORE_RETURN_5 Int)) (or (and (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 16))) (<= (mod v_prenex_29 4294967296) 2147483647) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (mod v_prenex_29 4294967296) main_~ret5~0) (not (< main_~i~2 4))) (and (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 16))) (not (<= (mod v_sep_~ret~0_BEFORE_RETURN_5 4294967296) 2147483647)) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (+ (mod v_sep_~ret~0_BEFORE_RETURN_5 4294967296) (- 4294967296)) main_~ret5~0) (not (< main_~i~2 4))) (and (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 16))) (= (+ (mod v_prenex_30 4294967296) (- 4294967296)) main_~ret5~0) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (not (<= (mod v_prenex_30 4294967296) 2147483647)) (not (< main_~i~2 4))) (and (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 16))) (= main_~ret5~0 (mod v_sep_~ret~0_BEFORE_RETURN_6 4294967296)) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (<= (mod v_sep_~ret~0_BEFORE_RETURN_6 4294967296) 2147483647) (not (< main_~i~2 4))))) (not (= main_~ret~1 main_~ret5~0)))) [2019-10-07 15:27:21,266 INFO L193 IcfgInterpreter]: Reachable states at location L-1 satisfy 23#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= 0 (select |#valid| 0)) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-07 15:27:21,266 INFO L193 IcfgInterpreter]: Reachable states at location mainENTRY satisfy 33#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= |#valid| |old(#valid)|) (<= 0 |#NULL.base|) (= |#memory_int| |old(#memory_int)|) (= |#NULL.offset| 0) (= |old(#length)| |#length|) (= 0 (select |old(#valid)| 0)) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-07 15:27:21,267 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initEXIT satisfy 671#(and (= |#valid| (store |old(#valid)| 0 0)) (= 0 |#NULL.base|) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-07 15:27:21,267 INFO L193 IcfgInterpreter]: Reachable states at location L39-1 satisfy 488#true [2019-10-07 15:27:21,267 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.startENTRY satisfy 6#true [2019-10-07 15:27:21,267 INFO L193 IcfgInterpreter]: Reachable states at location L39 satisfy 531#(and (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 16))) (<= 4 main_~i~2) (not (< main_~i~2 4))) [2019-10-07 15:27:21,267 INFO L193 IcfgInterpreter]: Reachable states at location sepEXIT satisfy 662#(and (<= 5 sep_~i~0) (= |sep_#res| (ite (<= (mod sep_~ret~0 4294967296) 2147483647) (mod sep_~ret~0 4294967296) (+ (mod sep_~ret~0 4294967296) (- 4294967296)))) (not (< sep_~i~0 5)) (<= 0 sep_~i~0)) [2019-10-07 15:27:21,268 INFO L193 IcfgInterpreter]: Reachable states at location L30 satisfy 129#(or (exists ((v_prenex_2 Int) (v_sep_~ret~0_BEFORE_RETURN_2 Int)) (or (and (= (+ (mod v_sep_~ret~0_BEFORE_RETURN_2 4294967296) (- 4294967296)) |main_#t~ret6|) (not (< main_~i~1 5)) (not (<= (mod v_sep_~ret~0_BEFORE_RETURN_2 4294967296) 2147483647))) (and (= (mod v_prenex_2 4294967296) |main_#t~ret6|) (not (< main_~i~1 5)) (<= (mod v_prenex_2 4294967296) 2147483647)))) (exists ((v_prenex_1 Int) (v_sep_~ret~0_BEFORE_RETURN_1 Int)) (or (and (= (mod v_prenex_1 4294967296) |main_#t~ret6|) (not (< main_~i~1 5)) (<= (mod v_prenex_1 4294967296) 2147483647)) (and (not (<= (mod v_sep_~ret~0_BEFORE_RETURN_1 4294967296) 2147483647)) (= (+ (mod v_sep_~ret~0_BEFORE_RETURN_1 4294967296) (- 4294967296)) |main_#t~ret6|) (not (< main_~i~1 5)))))) [2019-10-07 15:27:21,268 INFO L193 IcfgInterpreter]: Reachable states at location L41 satisfy 433#true [2019-10-07 15:27:21,268 INFO L193 IcfgInterpreter]: Reachable states at location L42 satisfy 322#true [2019-10-07 15:27:21,268 INFO L193 IcfgInterpreter]: Reachable states at location L33-1 satisfy 596#true [2019-10-07 15:27:21,268 INFO L193 IcfgInterpreter]: Reachable states at location L35-3 satisfy 569#true [2019-10-07 15:27:21,631 INFO L211 tionRefinementEngine]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2019-10-07 15:27:21,631 INFO L224 tionRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4, 4, 11] total 17 [2019-10-07 15:27:21,633 INFO L442 AbstractCegarLoop]: Interpolant automaton has 18 states [2019-10-07 15:27:21,634 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2019-10-07 15:27:21,635 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=50, Invalid=256, Unknown=0, NotChecked=0, Total=306 [2019-10-07 15:27:21,635 INFO L87 Difference]: Start difference. First operand 22 states and 26 transitions. Second operand 18 states. [2019-10-07 15:27:22,426 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-07 15:27:22,428 INFO L93 Difference]: Finished difference Result 40 states and 50 transitions. [2019-10-07 15:27:22,428 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2019-10-07 15:27:22,429 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 29 [2019-10-07 15:27:22,429 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-07 15:27:22,430 INFO L225 Difference]: With dead ends: 40 [2019-10-07 15:27:22,430 INFO L226 Difference]: Without dead ends: 25 [2019-10-07 15:27:22,431 INFO L606 BasicCegarLoop]: 0 DeclaredPredicates, 105 GetRequests, 77 SyntacticMatches, 0 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 198 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=133, Invalid=737, Unknown=0, NotChecked=0, Total=870 [2019-10-07 15:27:22,431 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25 states. [2019-10-07 15:27:22,440 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25 to 25. [2019-10-07 15:27:22,440 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 25 states. [2019-10-07 15:27:22,443 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25 states to 25 states and 29 transitions. [2019-10-07 15:27:22,443 INFO L78 Accepts]: Start accepts. Automaton has 25 states and 29 transitions. Word has length 29 [2019-10-07 15:27:22,444 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-07 15:27:22,444 INFO L462 AbstractCegarLoop]: Abstraction has 25 states and 29 transitions. [2019-10-07 15:27:22,444 INFO L463 AbstractCegarLoop]: Interpolant automaton has 18 states. [2019-10-07 15:27:22,444 INFO L276 IsEmpty]: Start isEmpty. Operand 25 states and 29 transitions. [2019-10-07 15:27:22,445 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2019-10-07 15:27:22,445 INFO L377 BasicCegarLoop]: Found error trace [2019-10-07 15:27:22,445 INFO L385 BasicCegarLoop]: trace histogram [4, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-07 15:27:22,649 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-07 15:27:22,650 INFO L410 AbstractCegarLoop]: === Iteration 5 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-07 15:27:22,650 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-07 15:27:22,651 INFO L82 PathProgramCache]: Analyzing trace with hash -1961836647, now seen corresponding path program 2 times [2019-10-07 15:27:22,651 INFO L150 tionRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-10-07 15:27:22,652 INFO L231 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2019-10-07 15:27:22,652 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-07 15:27:22,652 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-07 15:27:22,652 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-07 15:27:22,719 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-07 15:27:22,765 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 31 trivial. 0 not checked. [2019-10-07 15:27:22,765 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2019-10-07 15:27:22,765 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2019-10-07 15:27:22,766 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-07 15:27:22,874 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 2 check-sat command(s) [2019-10-07 15:27:22,875 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-10-07 15:27:22,881 INFO L256 TraceCheckSpWp]: Trace formula consists of 107 conjuncts, 3 conjunts are in the unsatisfiable core [2019-10-07 15:27:22,886 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2019-10-07 15:27:22,906 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 10 proven. 1 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2019-10-07 15:27:22,906 INFO L322 TraceCheckSpWp]: Computing backward predicates... [2019-10-07 15:27:22,948 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 10 proven. 1 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2019-10-07 15:27:22,948 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSifa [2019-10-07 15:27:22,953 INFO L162 IcfgInterpreter]: Started Sifa with 19 locations of interest [2019-10-07 15:27:22,953 INFO L169 IcfgInterpreter]: Building call graph [2019-10-07 15:27:22,954 INFO L174 IcfgInterpreter]: Initial procedures are [ULTIMATE.start] [2019-10-07 15:27:22,954 INFO L179 IcfgInterpreter]: Starting interpretation [2019-10-07 15:27:22,954 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.start with input of size 1 for LOIs [2019-10-07 15:27:22,989 INFO L199 IcfgInterpreter]: Interpreting procedure main with input of size 21 for LOIs [2019-10-07 15:27:24,582 INFO L199 IcfgInterpreter]: Interpreting procedure sep with input of size 1 for LOIs [2019-10-07 15:27:24,632 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.init with input of size 10 for LOIs [2019-10-07 15:27:24,637 INFO L183 IcfgInterpreter]: Interpretation finished [2019-10-07 15:27:24,637 INFO L191 IcfgInterpreter]: Final predicates for locations of interest are: [2019-10-07 15:27:24,637 INFO L193 IcfgInterpreter]: Reachable states at location L26-4 satisfy 73#(and (not (< main_~i~1 5)) (<= 5 main_~i~1)) [2019-10-07 15:27:24,638 INFO L193 IcfgInterpreter]: Reachable states at location L33 satisfy 601#(exists ((v_prenex_196 Int) (v_sep_~ret~0_BEFORE_RETURN_28 Int) (v_sep_~ret~0_BEFORE_RETURN_27 Int) (v_prenex_195 Int)) (or (and (= (+ (mod v_prenex_196 4294967296) (- 4294967296)) main_~ret~1) (not (<= (mod v_prenex_196 4294967296) 2147483647)) (<= main_~ret~1 2147483647) (not (< main_~i~1 5)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (<= 0 (+ main_~ret~1 2147483648))) (and (not (<= (mod v_sep_~ret~0_BEFORE_RETURN_27 4294967296) 2147483647)) (<= main_~ret~1 2147483647) (= (+ (mod v_sep_~ret~0_BEFORE_RETURN_27 4294967296) (- 4294967296)) main_~ret~1) (not (< main_~i~1 5)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (<= 0 (+ main_~ret~1 2147483648))) (and (<= main_~ret~1 2147483647) (not (< main_~i~1 5)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (= (mod v_prenex_195 4294967296) main_~ret~1) (<= (mod v_prenex_195 4294967296) 2147483647) (<= 0 (+ main_~ret~1 2147483648))) (and (<= main_~ret~1 2147483647) (= (mod v_sep_~ret~0_BEFORE_RETURN_28 4294967296) main_~ret~1) (not (< main_~i~1 5)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (<= (mod v_sep_~ret~0_BEFORE_RETURN_28 4294967296) 2147483647) (<= 0 (+ main_~ret~1 2147483648))))) [2019-10-07 15:27:24,638 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initENTRY satisfy 666#(and (= |old(#NULL.base)| |#NULL.base|) (= |#valid| |old(#valid)|) (= |#NULL.offset| |old(#NULL.offset)|)) [2019-10-07 15:27:24,643 INFO L193 IcfgInterpreter]: Reachable states at location L26-3 satisfy 68#true [2019-10-07 15:27:24,643 INFO L193 IcfgInterpreter]: Reachable states at location L7-3 satisfy 657#(<= 0 sep_~i~0) [2019-10-07 15:27:24,643 INFO L193 IcfgInterpreter]: Reachable states at location sepENTRY satisfy 610#true [2019-10-07 15:27:24,644 INFO L193 IcfgInterpreter]: Reachable states at location mainErr0ASSERT_VIOLATIONERROR_FUNCTION satisfy 243#(or (and (not (= main_~ret~1 main_~ret2~0)) (exists ((v_sep_~ret~0_BEFORE_RETURN_31 Int) (v_prenex_224 Int) (v_sep_~ret~0_BEFORE_RETURN_32 Int) (v_prenex_223 Int)) (or (and (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 16))) (= main_~ret5~0 (+ (mod v_sep_~ret~0_BEFORE_RETURN_32 4294967296) (- 4294967296))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (not (<= (mod v_sep_~ret~0_BEFORE_RETURN_32 4294967296) 2147483647)) (not (< main_~i~2 4))) (and (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 16))) (<= main_~ret5~0 2147483647) (= (mod v_sep_~ret~0_BEFORE_RETURN_31 4294967296) main_~ret5~0) (<= 0 (+ main_~ret5~0 2147483648)) (<= (mod v_sep_~ret~0_BEFORE_RETURN_31 4294967296) 2147483647) (not (< main_~i~2 4))) (and (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 16))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (<= (mod v_prenex_224 4294967296) 2147483647) (= main_~ret5~0 (mod v_prenex_224 4294967296)) (not (< main_~i~2 4))) (and (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 16))) (not (<= (mod v_prenex_223 4294967296) 2147483647)) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= main_~ret5~0 (+ (mod v_prenex_223 4294967296) (- 4294967296))) (not (< main_~i~2 4)))))) (and (exists ((v_sep_~ret~0_BEFORE_RETURN_31 Int) (v_prenex_224 Int) (v_sep_~ret~0_BEFORE_RETURN_32 Int) (v_prenex_223 Int)) (or (and (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 16))) (= main_~ret5~0 (+ (mod v_sep_~ret~0_BEFORE_RETURN_32 4294967296) (- 4294967296))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (not (<= (mod v_sep_~ret~0_BEFORE_RETURN_32 4294967296) 2147483647)) (not (< main_~i~2 4))) (and (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 16))) (<= main_~ret5~0 2147483647) (= (mod v_sep_~ret~0_BEFORE_RETURN_31 4294967296) main_~ret5~0) (<= 0 (+ main_~ret5~0 2147483648)) (<= (mod v_sep_~ret~0_BEFORE_RETURN_31 4294967296) 2147483647) (not (< main_~i~2 4))) (and (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 16))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (<= (mod v_prenex_224 4294967296) 2147483647) (= main_~ret5~0 (mod v_prenex_224 4294967296)) (not (< main_~i~2 4))) (and (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 16))) (not (<= (mod v_prenex_223 4294967296) 2147483647)) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= main_~ret5~0 (+ (mod v_prenex_223 4294967296) (- 4294967296))) (not (< main_~i~2 4))))) (not (= main_~ret~1 main_~ret5~0)))) [2019-10-07 15:27:24,644 INFO L193 IcfgInterpreter]: Reachable states at location L-1 satisfy 23#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= 0 (select |#valid| 0)) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-07 15:27:24,644 INFO L193 IcfgInterpreter]: Reachable states at location mainENTRY satisfy 33#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= |#valid| |old(#valid)|) (<= 0 |#NULL.base|) (= |#memory_int| |old(#memory_int)|) (= |#NULL.offset| 0) (= |old(#length)| |#length|) (= 0 (select |old(#valid)| 0)) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-07 15:27:24,644 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initEXIT satisfy 671#(and (= |#valid| (store |old(#valid)| 0 0)) (= 0 |#NULL.base|) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-07 15:27:24,645 INFO L193 IcfgInterpreter]: Reachable states at location L39-1 satisfy 488#true [2019-10-07 15:27:24,645 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.startENTRY satisfy 6#true [2019-10-07 15:27:24,645 INFO L193 IcfgInterpreter]: Reachable states at location L39 satisfy 531#(and (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 16))) (<= 4 main_~i~2) (not (< main_~i~2 4))) [2019-10-07 15:27:24,647 INFO L193 IcfgInterpreter]: Reachable states at location sepEXIT satisfy 662#(and (<= 5 sep_~i~0) (= |sep_#res| (ite (<= (mod sep_~ret~0 4294967296) 2147483647) (mod sep_~ret~0 4294967296) (+ (mod sep_~ret~0 4294967296) (- 4294967296)))) (not (< sep_~i~0 5)) (<= 0 sep_~i~0)) [2019-10-07 15:27:24,647 INFO L193 IcfgInterpreter]: Reachable states at location L30 satisfy 129#(or (exists ((v_sep_~ret~0_BEFORE_RETURN_27 Int) (v_prenex_195 Int)) (or (and (= (+ (mod v_sep_~ret~0_BEFORE_RETURN_27 4294967296) (- 4294967296)) |main_#t~ret6|) (not (<= (mod v_sep_~ret~0_BEFORE_RETURN_27 4294967296) 2147483647)) (not (< main_~i~1 5))) (and (= (mod v_prenex_195 4294967296) |main_#t~ret6|) (not (< main_~i~1 5)) (<= (mod v_prenex_195 4294967296) 2147483647)))) (exists ((v_prenex_196 Int) (v_sep_~ret~0_BEFORE_RETURN_28 Int)) (or (and (not (<= (mod v_prenex_196 4294967296) 2147483647)) (= (+ (mod v_prenex_196 4294967296) (- 4294967296)) |main_#t~ret6|) (not (< main_~i~1 5))) (and (not (< main_~i~1 5)) (= (mod v_sep_~ret~0_BEFORE_RETURN_28 4294967296) |main_#t~ret6|) (<= (mod v_sep_~ret~0_BEFORE_RETURN_28 4294967296) 2147483647))))) [2019-10-07 15:27:24,647 INFO L193 IcfgInterpreter]: Reachable states at location L41 satisfy 433#true [2019-10-07 15:27:24,648 INFO L193 IcfgInterpreter]: Reachable states at location L42 satisfy 322#true [2019-10-07 15:27:24,648 INFO L193 IcfgInterpreter]: Reachable states at location L33-1 satisfy 596#true [2019-10-07 15:27:24,648 INFO L193 IcfgInterpreter]: Reachable states at location L35-3 satisfy 569#true [2019-10-07 15:27:25,031 INFO L211 tionRefinementEngine]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2019-10-07 15:27:25,032 INFO L224 tionRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4, 4, 11] total 18 [2019-10-07 15:27:25,033 INFO L442 AbstractCegarLoop]: Interpolant automaton has 19 states [2019-10-07 15:27:25,033 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2019-10-07 15:27:25,033 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=49, Invalid=293, Unknown=0, NotChecked=0, Total=342 [2019-10-07 15:27:25,034 INFO L87 Difference]: Start difference. First operand 25 states and 29 transitions. Second operand 19 states. [2019-10-07 15:27:25,867 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-07 15:27:25,867 INFO L93 Difference]: Finished difference Result 43 states and 56 transitions. [2019-10-07 15:27:25,867 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2019-10-07 15:27:25,867 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 32 [2019-10-07 15:27:25,868 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-07 15:27:25,869 INFO L225 Difference]: With dead ends: 43 [2019-10-07 15:27:25,869 INFO L226 Difference]: Without dead ends: 29 [2019-10-07 15:27:25,870 INFO L606 BasicCegarLoop]: 0 DeclaredPredicates, 113 GetRequests, 82 SyntacticMatches, 0 SemanticMatches, 31 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 194 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=169, Invalid=887, Unknown=0, NotChecked=0, Total=1056 [2019-10-07 15:27:25,870 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 29 states. [2019-10-07 15:27:25,878 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 29 to 29. [2019-10-07 15:27:25,878 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 29 states. [2019-10-07 15:27:25,880 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29 states to 29 states and 33 transitions. [2019-10-07 15:27:25,881 INFO L78 Accepts]: Start accepts. Automaton has 29 states and 33 transitions. Word has length 32 [2019-10-07 15:27:25,881 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-07 15:27:25,881 INFO L462 AbstractCegarLoop]: Abstraction has 29 states and 33 transitions. [2019-10-07 15:27:25,881 INFO L463 AbstractCegarLoop]: Interpolant automaton has 19 states. [2019-10-07 15:27:25,881 INFO L276 IsEmpty]: Start isEmpty. Operand 29 states and 33 transitions. [2019-10-07 15:27:25,882 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2019-10-07 15:27:25,882 INFO L377 BasicCegarLoop]: Found error trace [2019-10-07 15:27:25,883 INFO L385 BasicCegarLoop]: trace histogram [12, 4, 3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-07 15:27:26,085 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 4 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-07 15:27:26,094 INFO L410 AbstractCegarLoop]: === Iteration 6 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-07 15:27:26,094 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-07 15:27:26,094 INFO L82 PathProgramCache]: Analyzing trace with hash 1131925168, now seen corresponding path program 3 times [2019-10-07 15:27:26,094 INFO L150 tionRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-10-07 15:27:26,094 INFO L231 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2019-10-07 15:27:26,094 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-07 15:27:26,094 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-07 15:27:26,094 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-07 15:27:26,175 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-07 15:27:26,254 INFO L134 CoverageAnalysis]: Checked inductivity of 124 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 114 trivial. 0 not checked. [2019-10-07 15:27:26,255 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2019-10-07 15:27:26,255 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2019-10-07 15:27:26,255 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-07 15:27:26,375 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2019-10-07 15:27:26,376 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-10-07 15:27:26,377 INFO L256 TraceCheckSpWp]: Trace formula consists of 197 conjuncts, 6 conjunts are in the unsatisfiable core [2019-10-07 15:27:26,386 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2019-10-07 15:27:26,431 INFO L134 CoverageAnalysis]: Checked inductivity of 124 backedges. 52 proven. 10 refuted. 0 times theorem prover too weak. 62 trivial. 0 not checked. [2019-10-07 15:27:26,432 INFO L322 TraceCheckSpWp]: Computing backward predicates... [2019-10-07 15:27:26,496 INFO L134 CoverageAnalysis]: Checked inductivity of 124 backedges. 0 proven. 62 refuted. 0 times theorem prover too weak. 62 trivial. 0 not checked. [2019-10-07 15:27:26,497 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSifa [2019-10-07 15:27:26,498 INFO L162 IcfgInterpreter]: Started Sifa with 19 locations of interest [2019-10-07 15:27:26,499 INFO L169 IcfgInterpreter]: Building call graph [2019-10-07 15:27:26,501 INFO L174 IcfgInterpreter]: Initial procedures are [ULTIMATE.start] [2019-10-07 15:27:26,502 INFO L179 IcfgInterpreter]: Starting interpretation [2019-10-07 15:27:26,502 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.start with input of size 1 for LOIs [2019-10-07 15:27:26,522 INFO L199 IcfgInterpreter]: Interpreting procedure main with input of size 21 for LOIs [2019-10-07 15:27:28,006 INFO L199 IcfgInterpreter]: Interpreting procedure sep with input of size 1 for LOIs [2019-10-07 15:27:28,058 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.init with input of size 10 for LOIs [2019-10-07 15:27:28,061 INFO L183 IcfgInterpreter]: Interpretation finished [2019-10-07 15:27:28,062 INFO L191 IcfgInterpreter]: Final predicates for locations of interest are: [2019-10-07 15:27:28,062 INFO L193 IcfgInterpreter]: Reachable states at location L26-4 satisfy 73#(and (not (< main_~i~1 5)) (<= 5 main_~i~1)) [2019-10-07 15:27:28,062 INFO L193 IcfgInterpreter]: Reachable states at location L33 satisfy 601#(exists ((v_sep_~ret~0_BEFORE_RETURN_53 Int) (v_prenex_389 Int) (v_sep_~ret~0_BEFORE_RETURN_54 Int) (v_prenex_390 Int)) (or (and (<= main_~ret~1 2147483647) (= (+ (mod v_prenex_390 4294967296) (- 4294967296)) main_~ret~1) (not (< main_~i~1 5)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (not (<= (mod v_prenex_390 4294967296) 2147483647)) (<= 0 (+ main_~ret~1 2147483648))) (and (<= main_~ret~1 2147483647) (= (mod v_sep_~ret~0_BEFORE_RETURN_54 4294967296) main_~ret~1) (not (< main_~i~1 5)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (<= (mod v_sep_~ret~0_BEFORE_RETURN_54 4294967296) 2147483647) (<= 0 (+ main_~ret~1 2147483648))) (and (= (+ (mod v_sep_~ret~0_BEFORE_RETURN_53 4294967296) (- 4294967296)) main_~ret~1) (<= main_~ret~1 2147483647) (not (< main_~i~1 5)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (not (<= (mod v_sep_~ret~0_BEFORE_RETURN_53 4294967296) 2147483647)) (<= 0 (+ main_~ret~1 2147483648))) (and (<= main_~ret~1 2147483647) (= (mod v_prenex_389 4294967296) main_~ret~1) (not (< main_~i~1 5)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (<= (mod v_prenex_389 4294967296) 2147483647) (<= 0 (+ main_~ret~1 2147483648))))) [2019-10-07 15:27:28,063 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initENTRY satisfy 666#(and (= |old(#NULL.base)| |#NULL.base|) (= |#valid| |old(#valid)|) (= |#NULL.offset| |old(#NULL.offset)|)) [2019-10-07 15:27:28,063 INFO L193 IcfgInterpreter]: Reachable states at location L26-3 satisfy 68#true [2019-10-07 15:27:28,063 INFO L193 IcfgInterpreter]: Reachable states at location L7-3 satisfy 657#(<= 0 sep_~i~0) [2019-10-07 15:27:28,063 INFO L193 IcfgInterpreter]: Reachable states at location sepENTRY satisfy 610#true [2019-10-07 15:27:28,064 INFO L193 IcfgInterpreter]: Reachable states at location mainErr0ASSERT_VIOLATIONERROR_FUNCTION satisfy 243#(or (and (not (= main_~ret~1 main_~ret2~0)) (exists ((v_sep_~ret~0_BEFORE_RETURN_57 Int) (v_prenex_417 Int) (v_prenex_418 Int) (v_sep_~ret~0_BEFORE_RETURN_58 Int)) (or (and (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 16))) (<= main_~ret5~0 2147483647) (= main_~ret5~0 (mod v_sep_~ret~0_BEFORE_RETURN_58 4294967296)) (<= 0 (+ main_~ret5~0 2147483648)) (not (< main_~i~2 4)) (<= (mod v_sep_~ret~0_BEFORE_RETURN_58 4294967296) 2147483647)) (and (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 16))) (<= main_~ret5~0 2147483647) (= (+ (mod v_sep_~ret~0_BEFORE_RETURN_57 4294967296) (- 4294967296)) main_~ret5~0) (<= 0 (+ main_~ret5~0 2147483648)) (not (<= (mod v_sep_~ret~0_BEFORE_RETURN_57 4294967296) 2147483647)) (not (< main_~i~2 4))) (and (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 16))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (not (<= (mod v_prenex_418 4294967296) 2147483647)) (= main_~ret5~0 (+ (mod v_prenex_418 4294967296) (- 4294967296))) (not (< main_~i~2 4))) (and (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 16))) (= (mod v_prenex_417 4294967296) main_~ret5~0) (<= (mod v_prenex_417 4294967296) 2147483647) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (not (< main_~i~2 4)))))) (and (exists ((v_sep_~ret~0_BEFORE_RETURN_57 Int) (v_prenex_417 Int) (v_prenex_418 Int) (v_sep_~ret~0_BEFORE_RETURN_58 Int)) (or (and (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 16))) (<= main_~ret5~0 2147483647) (= main_~ret5~0 (mod v_sep_~ret~0_BEFORE_RETURN_58 4294967296)) (<= 0 (+ main_~ret5~0 2147483648)) (not (< main_~i~2 4)) (<= (mod v_sep_~ret~0_BEFORE_RETURN_58 4294967296) 2147483647)) (and (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 16))) (<= main_~ret5~0 2147483647) (= (+ (mod v_sep_~ret~0_BEFORE_RETURN_57 4294967296) (- 4294967296)) main_~ret5~0) (<= 0 (+ main_~ret5~0 2147483648)) (not (<= (mod v_sep_~ret~0_BEFORE_RETURN_57 4294967296) 2147483647)) (not (< main_~i~2 4))) (and (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 16))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (not (<= (mod v_prenex_418 4294967296) 2147483647)) (= main_~ret5~0 (+ (mod v_prenex_418 4294967296) (- 4294967296))) (not (< main_~i~2 4))) (and (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 16))) (= (mod v_prenex_417 4294967296) main_~ret5~0) (<= (mod v_prenex_417 4294967296) 2147483647) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (not (< main_~i~2 4))))) (not (= main_~ret~1 main_~ret5~0)))) [2019-10-07 15:27:28,064 INFO L193 IcfgInterpreter]: Reachable states at location L-1 satisfy 23#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= 0 (select |#valid| 0)) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-07 15:27:28,064 INFO L193 IcfgInterpreter]: Reachable states at location mainENTRY satisfy 33#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= |#valid| |old(#valid)|) (<= 0 |#NULL.base|) (= |#memory_int| |old(#memory_int)|) (= |#NULL.offset| 0) (= |old(#length)| |#length|) (= 0 (select |old(#valid)| 0)) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-07 15:27:28,064 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initEXIT satisfy 671#(and (= |#valid| (store |old(#valid)| 0 0)) (= 0 |#NULL.base|) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-07 15:27:28,065 INFO L193 IcfgInterpreter]: Reachable states at location L39-1 satisfy 488#true [2019-10-07 15:27:28,065 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.startENTRY satisfy 6#true [2019-10-07 15:27:28,065 INFO L193 IcfgInterpreter]: Reachable states at location L39 satisfy 531#(and (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 16))) (<= 4 main_~i~2) (not (< main_~i~2 4))) [2019-10-07 15:27:28,065 INFO L193 IcfgInterpreter]: Reachable states at location sepEXIT satisfy 662#(and (<= 5 sep_~i~0) (= |sep_#res| (ite (<= (mod sep_~ret~0 4294967296) 2147483647) (mod sep_~ret~0 4294967296) (+ (mod sep_~ret~0 4294967296) (- 4294967296)))) (not (< sep_~i~0 5)) (<= 0 sep_~i~0)) [2019-10-07 15:27:28,066 INFO L193 IcfgInterpreter]: Reachable states at location L30 satisfy 129#(or (exists ((v_sep_~ret~0_BEFORE_RETURN_54 Int) (v_prenex_390 Int)) (or (and (= (mod v_sep_~ret~0_BEFORE_RETURN_54 4294967296) |main_#t~ret6|) (not (< main_~i~1 5)) (<= (mod v_sep_~ret~0_BEFORE_RETURN_54 4294967296) 2147483647)) (and (not (< main_~i~1 5)) (not (<= (mod v_prenex_390 4294967296) 2147483647)) (= |main_#t~ret6| (+ (mod v_prenex_390 4294967296) (- 4294967296)))))) (exists ((v_sep_~ret~0_BEFORE_RETURN_53 Int) (v_prenex_389 Int)) (or (and (not (< main_~i~1 5)) (<= (mod v_prenex_389 4294967296) 2147483647) (= (mod v_prenex_389 4294967296) |main_#t~ret6|)) (and (not (< main_~i~1 5)) (not (<= (mod v_sep_~ret~0_BEFORE_RETURN_53 4294967296) 2147483647)) (= (+ (mod v_sep_~ret~0_BEFORE_RETURN_53 4294967296) (- 4294967296)) |main_#t~ret6|))))) [2019-10-07 15:27:28,066 INFO L193 IcfgInterpreter]: Reachable states at location L41 satisfy 433#true [2019-10-07 15:27:28,066 INFO L193 IcfgInterpreter]: Reachable states at location L42 satisfy 322#true [2019-10-07 15:27:28,067 INFO L193 IcfgInterpreter]: Reachable states at location L33-1 satisfy 596#true [2019-10-07 15:27:28,067 INFO L193 IcfgInterpreter]: Reachable states at location L35-3 satisfy 569#true [2019-10-07 15:27:28,691 INFO L211 tionRefinementEngine]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2019-10-07 15:27:28,691 INFO L224 tionRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 7, 11] total 22 [2019-10-07 15:27:28,693 INFO L442 AbstractCegarLoop]: Interpolant automaton has 23 states [2019-10-07 15:27:28,693 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2019-10-07 15:27:28,694 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=70, Invalid=436, Unknown=0, NotChecked=0, Total=506 [2019-10-07 15:27:28,694 INFO L87 Difference]: Start difference. First operand 29 states and 33 transitions. Second operand 23 states. [2019-10-07 15:27:29,748 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-07 15:27:29,748 INFO L93 Difference]: Finished difference Result 50 states and 62 transitions. [2019-10-07 15:27:29,748 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2019-10-07 15:27:29,748 INFO L78 Accepts]: Start accepts. Automaton has 23 states. Word has length 42 [2019-10-07 15:27:29,749 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-07 15:27:29,749 INFO L225 Difference]: With dead ends: 50 [2019-10-07 15:27:29,749 INFO L226 Difference]: Without dead ends: 31 [2019-10-07 15:27:29,751 INFO L606 BasicCegarLoop]: 0 DeclaredPredicates, 152 GetRequests, 108 SyntacticMatches, 5 SemanticMatches, 39 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 344 ImplicationChecksByTransitivity, 1.4s TimeCoverageRelationStatistics Valid=234, Invalid=1406, Unknown=0, NotChecked=0, Total=1640 [2019-10-07 15:27:29,751 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 31 states. [2019-10-07 15:27:29,756 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 31 to 31. [2019-10-07 15:27:29,756 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 31 states. [2019-10-07 15:27:29,757 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 31 states to 31 states and 35 transitions. [2019-10-07 15:27:29,757 INFO L78 Accepts]: Start accepts. Automaton has 31 states and 35 transitions. Word has length 42 [2019-10-07 15:27:29,758 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-07 15:27:29,758 INFO L462 AbstractCegarLoop]: Abstraction has 31 states and 35 transitions. [2019-10-07 15:27:29,758 INFO L463 AbstractCegarLoop]: Interpolant automaton has 23 states. [2019-10-07 15:27:29,758 INFO L276 IsEmpty]: Start isEmpty. Operand 31 states and 35 transitions. [2019-10-07 15:27:29,759 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2019-10-07 15:27:29,759 INFO L377 BasicCegarLoop]: Found error trace [2019-10-07 15:27:29,759 INFO L385 BasicCegarLoop]: trace histogram [15, 5, 3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-07 15:27:29,971 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 5 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-07 15:27:29,972 INFO L410 AbstractCegarLoop]: === Iteration 7 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-07 15:27:29,972 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-07 15:27:29,972 INFO L82 PathProgramCache]: Analyzing trace with hash 111159683, now seen corresponding path program 4 times [2019-10-07 15:27:29,973 INFO L150 tionRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-10-07 15:27:29,973 INFO L231 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2019-10-07 15:27:29,973 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-07 15:27:29,973 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-07 15:27:29,974 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-07 15:27:30,015 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-07 15:27:30,055 INFO L134 CoverageAnalysis]: Checked inductivity of 177 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 174 trivial. 0 not checked. [2019-10-07 15:27:30,055 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2019-10-07 15:27:30,055 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2019-10-07 15:27:30,055 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-07 15:27:30,191 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-07 15:27:30,192 INFO L256 TraceCheckSpWp]: Trace formula consists of 215 conjuncts, 4 conjunts are in the unsatisfiable core [2019-10-07 15:27:30,195 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2019-10-07 15:27:30,205 INFO L134 CoverageAnalysis]: Checked inductivity of 177 backedges. 76 proven. 3 refuted. 0 times theorem prover too weak. 98 trivial. 0 not checked. [2019-10-07 15:27:30,205 INFO L322 TraceCheckSpWp]: Computing backward predicates... [2019-10-07 15:27:30,235 INFO L134 CoverageAnalysis]: Checked inductivity of 177 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 174 trivial. 0 not checked. [2019-10-07 15:27:30,235 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSifa [2019-10-07 15:27:30,237 INFO L162 IcfgInterpreter]: Started Sifa with 19 locations of interest [2019-10-07 15:27:30,237 INFO L169 IcfgInterpreter]: Building call graph [2019-10-07 15:27:30,238 INFO L174 IcfgInterpreter]: Initial procedures are [ULTIMATE.start] [2019-10-07 15:27:30,238 INFO L179 IcfgInterpreter]: Starting interpretation [2019-10-07 15:27:30,238 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.start with input of size 1 for LOIs [2019-10-07 15:27:30,254 INFO L199 IcfgInterpreter]: Interpreting procedure main with input of size 21 for LOIs [2019-10-07 15:27:31,525 INFO L199 IcfgInterpreter]: Interpreting procedure sep with input of size 1 for LOIs [2019-10-07 15:27:31,555 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.init with input of size 10 for LOIs [2019-10-07 15:27:31,559 INFO L183 IcfgInterpreter]: Interpretation finished [2019-10-07 15:27:31,559 INFO L191 IcfgInterpreter]: Final predicates for locations of interest are: [2019-10-07 15:27:31,559 INFO L193 IcfgInterpreter]: Reachable states at location L26-4 satisfy 73#(and (not (< main_~i~1 5)) (<= 5 main_~i~1)) [2019-10-07 15:27:31,560 INFO L193 IcfgInterpreter]: Reachable states at location L33 satisfy 601#(or (exists ((v_prenex_583 Int) (v_prenex_584 Int) (v_sep_~ret~0_BEFORE_RETURN_80 Int) (v_sep_~ret~0_BEFORE_RETURN_79 Int)) (or (and (<= main_~ret~1 2147483647) (= (mod v_prenex_584 4294967296) main_~ret~1) (not (< main_~i~1 5)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (<= (mod v_prenex_584 4294967296) 2147483647) (<= 0 (+ main_~ret~1 2147483648))) (and (<= main_~ret~1 2147483647) (= (+ (mod v_prenex_583 4294967296) (- 4294967296)) main_~ret~1) (not (< main_~i~1 5)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (not (<= (mod v_prenex_583 4294967296) 2147483647)) (<= 0 (+ main_~ret~1 2147483648))) (and (<= main_~ret~1 2147483647) (not (< main_~i~1 5)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (<= (mod v_sep_~ret~0_BEFORE_RETURN_79 4294967296) 2147483647) (= (mod v_sep_~ret~0_BEFORE_RETURN_79 4294967296) main_~ret~1) (<= 0 (+ main_~ret~1 2147483648))) (and (= (+ (mod v_sep_~ret~0_BEFORE_RETURN_80 4294967296) (- 4294967296)) main_~ret~1) (<= main_~ret~1 2147483647) (not (< main_~i~1 5)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (not (<= (mod v_sep_~ret~0_BEFORE_RETURN_80 4294967296) 2147483647)) (<= 0 (+ main_~ret~1 2147483648))))) (exists ((v_prenex_583 Int) (v_prenex_584 Int) (v_sep_~ret~0_BEFORE_RETURN_80 Int) (v_sep_~ret~0_BEFORE_RETURN_79 Int)) (or (and (<= main_~ret~1 2147483647) (= (mod v_prenex_584 4294967296) main_~ret~1) (not (< main_~i~1 5)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (<= (mod v_prenex_584 4294967296) 2147483647) (<= 0 (+ main_~ret~1 2147483648))) (and (<= main_~ret~1 2147483647) (= (+ (mod v_prenex_583 4294967296) (- 4294967296)) main_~ret~1) (not (< main_~i~1 5)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (not (<= (mod v_prenex_583 4294967296) 2147483647)) (<= 0 (+ main_~ret~1 2147483648))) (and (<= main_~ret~1 2147483647) (not (< main_~i~1 5)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (= (mod v_sep_~ret~0_BEFORE_RETURN_79 4294967296) main_~ret~1) (<= (mod v_sep_~ret~0_BEFORE_RETURN_79 4294967296) 2147483647) (<= 0 (+ main_~ret~1 2147483648))) (and (= (+ (mod v_sep_~ret~0_BEFORE_RETURN_80 4294967296) (- 4294967296)) main_~ret~1) (<= main_~ret~1 2147483647) (not (< main_~i~1 5)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (not (<= (mod v_sep_~ret~0_BEFORE_RETURN_80 4294967296) 2147483647)) (<= 0 (+ main_~ret~1 2147483648)))))) [2019-10-07 15:27:31,560 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initENTRY satisfy 666#(and (= |old(#NULL.base)| |#NULL.base|) (= |#valid| |old(#valid)|) (= |#NULL.offset| |old(#NULL.offset)|)) [2019-10-07 15:27:31,560 INFO L193 IcfgInterpreter]: Reachable states at location L26-3 satisfy 68#true [2019-10-07 15:27:31,560 INFO L193 IcfgInterpreter]: Reachable states at location L7-3 satisfy 657#(<= 0 sep_~i~0) [2019-10-07 15:27:31,560 INFO L193 IcfgInterpreter]: Reachable states at location sepENTRY satisfy 610#true [2019-10-07 15:27:31,560 INFO L193 IcfgInterpreter]: Reachable states at location mainErr0ASSERT_VIOLATIONERROR_FUNCTION satisfy 243#(or (and (exists ((v_prenex_611 Int) (v_prenex_612 Int) (v_sep_~ret~0_BEFORE_RETURN_84 Int) (v_sep_~ret~0_BEFORE_RETURN_83 Int)) (or (and (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 16))) (<= main_~ret5~0 2147483647) (<= (mod v_sep_~ret~0_BEFORE_RETURN_84 4294967296) 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (mod v_sep_~ret~0_BEFORE_RETURN_84 4294967296) main_~ret5~0) (not (< main_~i~2 4))) (and (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 16))) (<= main_~ret5~0 2147483647) (= main_~ret5~0 (+ (mod v_sep_~ret~0_BEFORE_RETURN_83 4294967296) (- 4294967296))) (<= 0 (+ main_~ret5~0 2147483648)) (not (<= (mod v_sep_~ret~0_BEFORE_RETURN_83 4294967296) 2147483647)) (not (< main_~i~2 4))) (and (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 16))) (= (+ (mod v_prenex_612 4294967296) (- 4294967296)) main_~ret5~0) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (not (<= (mod v_prenex_612 4294967296) 2147483647)) (not (< main_~i~2 4))) (and (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 16))) (<= (mod v_prenex_611 4294967296) 2147483647) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= main_~ret5~0 (mod v_prenex_611 4294967296)) (not (< main_~i~2 4))))) (not (= main_~ret~1 main_~ret5~0))) (and (not (= main_~ret~1 main_~ret2~0)) (exists ((v_prenex_611 Int) (v_prenex_612 Int) (v_sep_~ret~0_BEFORE_RETURN_84 Int) (v_sep_~ret~0_BEFORE_RETURN_83 Int)) (or (and (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 16))) (<= main_~ret5~0 2147483647) (<= (mod v_sep_~ret~0_BEFORE_RETURN_84 4294967296) 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (mod v_sep_~ret~0_BEFORE_RETURN_84 4294967296) main_~ret5~0) (not (< main_~i~2 4))) (and (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 16))) (<= main_~ret5~0 2147483647) (= main_~ret5~0 (+ (mod v_sep_~ret~0_BEFORE_RETURN_83 4294967296) (- 4294967296))) (<= 0 (+ main_~ret5~0 2147483648)) (not (<= (mod v_sep_~ret~0_BEFORE_RETURN_83 4294967296) 2147483647)) (not (< main_~i~2 4))) (and (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 16))) (= (+ (mod v_prenex_612 4294967296) (- 4294967296)) main_~ret5~0) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (not (<= (mod v_prenex_612 4294967296) 2147483647)) (not (< main_~i~2 4))) (and (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 16))) (<= (mod v_prenex_611 4294967296) 2147483647) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= main_~ret5~0 (mod v_prenex_611 4294967296)) (not (< main_~i~2 4))))))) [2019-10-07 15:27:31,561 INFO L193 IcfgInterpreter]: Reachable states at location L-1 satisfy 23#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= 0 (select |#valid| 0)) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-07 15:27:31,561 INFO L193 IcfgInterpreter]: Reachable states at location mainENTRY satisfy 33#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= |#valid| |old(#valid)|) (<= 0 |#NULL.base|) (= |#memory_int| |old(#memory_int)|) (= |#NULL.offset| 0) (= |old(#length)| |#length|) (= 0 (select |old(#valid)| 0)) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-07 15:27:31,561 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initEXIT satisfy 671#(and (= |#valid| (store |old(#valid)| 0 0)) (= 0 |#NULL.base|) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-07 15:27:31,561 INFO L193 IcfgInterpreter]: Reachable states at location L39-1 satisfy 488#true [2019-10-07 15:27:31,561 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.startENTRY satisfy 6#true [2019-10-07 15:27:31,562 INFO L193 IcfgInterpreter]: Reachable states at location L39 satisfy 531#(and (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 16))) (<= 4 main_~i~2) (not (< main_~i~2 4))) [2019-10-07 15:27:31,562 INFO L193 IcfgInterpreter]: Reachable states at location sepEXIT satisfy 662#(and (<= 5 sep_~i~0) (= |sep_#res| (ite (<= (mod sep_~ret~0 4294967296) 2147483647) (mod sep_~ret~0 4294967296) (+ (mod sep_~ret~0 4294967296) (- 4294967296)))) (not (< sep_~i~0 5)) (<= 0 sep_~i~0)) [2019-10-07 15:27:31,562 INFO L193 IcfgInterpreter]: Reachable states at location L30 satisfy 129#(or (exists ((v_prenex_584 Int) (v_sep_~ret~0_BEFORE_RETURN_80 Int)) (or (and (= (+ (mod v_sep_~ret~0_BEFORE_RETURN_80 4294967296) (- 4294967296)) |main_#t~ret6|) (not (< main_~i~1 5)) (not (<= (mod v_sep_~ret~0_BEFORE_RETURN_80 4294967296) 2147483647))) (and (not (< main_~i~1 5)) (= (mod v_prenex_584 4294967296) |main_#t~ret6|) (<= (mod v_prenex_584 4294967296) 2147483647)))) (exists ((v_prenex_583 Int) (v_sep_~ret~0_BEFORE_RETURN_79 Int)) (or (and (= (+ (mod v_prenex_583 4294967296) (- 4294967296)) |main_#t~ret6|) (not (< main_~i~1 5)) (not (<= (mod v_prenex_583 4294967296) 2147483647))) (and (= (mod v_sep_~ret~0_BEFORE_RETURN_79 4294967296) |main_#t~ret6|) (not (< main_~i~1 5)) (<= (mod v_sep_~ret~0_BEFORE_RETURN_79 4294967296) 2147483647))))) [2019-10-07 15:27:31,562 INFO L193 IcfgInterpreter]: Reachable states at location L41 satisfy 433#true [2019-10-07 15:27:31,562 INFO L193 IcfgInterpreter]: Reachable states at location L42 satisfy 322#true [2019-10-07 15:27:31,562 INFO L193 IcfgInterpreter]: Reachable states at location L33-1 satisfy 596#true [2019-10-07 15:27:31,563 INFO L193 IcfgInterpreter]: Reachable states at location L35-3 satisfy 569#true [2019-10-07 15:27:31,896 INFO L211 tionRefinementEngine]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2019-10-07 15:27:31,897 INFO L224 tionRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5, 5, 11] total 17 [2019-10-07 15:27:31,898 INFO L442 AbstractCegarLoop]: Interpolant automaton has 18 states [2019-10-07 15:27:31,898 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2019-10-07 15:27:31,899 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=50, Invalid=256, Unknown=0, NotChecked=0, Total=306 [2019-10-07 15:27:31,899 INFO L87 Difference]: Start difference. First operand 31 states and 35 transitions. Second operand 18 states. [2019-10-07 15:27:33,229 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-07 15:27:33,229 INFO L93 Difference]: Finished difference Result 46 states and 52 transitions. [2019-10-07 15:27:33,229 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2019-10-07 15:27:33,229 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 46 [2019-10-07 15:27:33,230 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-07 15:27:33,230 INFO L225 Difference]: With dead ends: 46 [2019-10-07 15:27:33,231 INFO L226 Difference]: Without dead ends: 33 [2019-10-07 15:27:33,231 INFO L606 BasicCegarLoop]: 0 DeclaredPredicates, 155 GetRequests, 125 SyntacticMatches, 2 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 173 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=141, Invalid=729, Unknown=0, NotChecked=0, Total=870 [2019-10-07 15:27:33,232 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 33 states. [2019-10-07 15:27:33,237 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 33 to 33. [2019-10-07 15:27:33,237 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 33 states. [2019-10-07 15:27:33,238 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33 states to 33 states and 37 transitions. [2019-10-07 15:27:33,238 INFO L78 Accepts]: Start accepts. Automaton has 33 states and 37 transitions. Word has length 46 [2019-10-07 15:27:33,239 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-07 15:27:33,239 INFO L462 AbstractCegarLoop]: Abstraction has 33 states and 37 transitions. [2019-10-07 15:27:33,239 INFO L463 AbstractCegarLoop]: Interpolant automaton has 18 states. [2019-10-07 15:27:33,239 INFO L276 IsEmpty]: Start isEmpty. Operand 33 states and 37 transitions. [2019-10-07 15:27:33,240 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2019-10-07 15:27:33,240 INFO L377 BasicCegarLoop]: Found error trace [2019-10-07 15:27:33,240 INFO L385 BasicCegarLoop]: trace histogram [15, 5, 4, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-07 15:27:33,444 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 6 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-07 15:27:33,445 INFO L410 AbstractCegarLoop]: === Iteration 8 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-07 15:27:33,445 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-07 15:27:33,445 INFO L82 PathProgramCache]: Analyzing trace with hash 934351779, now seen corresponding path program 5 times [2019-10-07 15:27:33,445 INFO L150 tionRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-10-07 15:27:33,445 INFO L231 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2019-10-07 15:27:33,446 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-07 15:27:33,446 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-07 15:27:33,446 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-07 15:27:34,906 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-07 15:27:37,975 WARN L191 SmtUtils]: Spent 104.00 ms on a formula simplification. DAG size of input: 65 DAG size of output: 7 [2019-10-07 15:27:38,750 WARN L191 SmtUtils]: Spent 585.00 ms on a formula simplification. DAG size of input: 178 DAG size of output: 39 [2019-10-07 15:27:39,807 WARN L191 SmtUtils]: Spent 960.00 ms on a formula simplification. DAG size of input: 231 DAG size of output: 65 [2019-10-07 15:27:42,456 WARN L191 SmtUtils]: Spent 2.50 s on a formula simplification. DAG size of input: 318 DAG size of output: 101 [2019-10-07 15:27:45,760 WARN L191 SmtUtils]: Spent 3.08 s on a formula simplification. DAG size of input: 349 DAG size of output: 130 [2019-10-07 15:27:52,910 WARN L191 SmtUtils]: Spent 6.78 s on a formula simplification. DAG size of input: 562 DAG size of output: 225 [2019-10-07 15:27:57,118 WARN L191 SmtUtils]: Spent 3.98 s on a formula simplification. DAG size of input: 331 DAG size of output: 189 [2019-10-07 15:28:01,274 WARN L191 SmtUtils]: Spent 3.90 s on a formula simplification. DAG size of input: 334 DAG size of output: 184 [2019-10-07 15:28:05,674 WARN L191 SmtUtils]: Spent 4.07 s on a formula simplification. DAG size of input: 317 DAG size of output: 169 [2019-10-07 15:28:12,944 WARN L191 SmtUtils]: Spent 6.18 s on a formula simplification. DAG size of input: 522 DAG size of output: 236 [2019-10-07 15:28:17,543 WARN L191 SmtUtils]: Spent 4.28 s on a formula simplification. DAG size of input: 344 DAG size of output: 191 [2019-10-07 15:28:21,853 WARN L191 SmtUtils]: Spent 4.04 s on a formula simplification. DAG size of input: 287 DAG size of output: 183 [2019-10-07 15:28:26,368 WARN L191 SmtUtils]: Spent 4.21 s on a formula simplification. DAG size of input: 282 DAG size of output: 189 [2019-10-07 15:28:30,360 WARN L191 SmtUtils]: Spent 3.68 s on a formula simplification. DAG size of input: 305 DAG size of output: 187 [2019-10-07 15:28:34,758 WARN L191 SmtUtils]: Spent 4.06 s on a formula simplification. DAG size of input: 290 DAG size of output: 183 [2019-10-07 15:28:39,119 WARN L191 SmtUtils]: Spent 4.07 s on a formula simplification. DAG size of input: 286 DAG size of output: 188 [2019-10-07 15:28:43,338 WARN L191 SmtUtils]: Spent 3.86 s on a formula simplification. DAG size of input: 261 DAG size of output: 184 [2019-10-07 15:28:47,405 WARN L191 SmtUtils]: Spent 3.69 s on a formula simplification. DAG size of input: 260 DAG size of output: 178 [2019-10-07 15:28:53,304 WARN L191 SmtUtils]: Spent 4.86 s on a formula simplification. DAG size of input: 481 DAG size of output: 224 [2019-10-07 15:28:57,086 WARN L191 SmtUtils]: Spent 3.45 s on a formula simplification. DAG size of input: 265 DAG size of output: 190 [2019-10-07 15:28:57,396 INFO L134 CoverageAnalysis]: Checked inductivity of 184 backedges. 1 proven. 168 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2019-10-07 15:28:57,396 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2019-10-07 15:28:57,396 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2019-10-07 15:28:57,396 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-07 15:28:57,680 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 8 check-sat command(s) [2019-10-07 15:28:57,680 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-10-07 15:28:57,684 WARN L254 TraceCheckSpWp]: Trace formula consists of 223 conjuncts, 129 conjunts are in the unsatisfiable core [2019-10-07 15:28:57,688 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2019-10-07 15:28:58,410 WARN L191 SmtUtils]: Spent 105.00 ms on a formula simplification. DAG size of input: 51 DAG size of output: 40 [2019-10-07 15:28:58,766 WARN L191 SmtUtils]: Spent 192.00 ms on a formula simplification. DAG size of input: 69 DAG size of output: 58 [2019-10-07 15:28:59,337 WARN L191 SmtUtils]: Spent 376.00 ms on a formula simplification. DAG size of input: 92 DAG size of output: 81 [2019-10-07 15:29:00,024 WARN L191 SmtUtils]: Spent 450.00 ms on a formula simplification. DAG size of input: 103 DAG size of output: 92 [2019-10-07 15:29:00,563 WARN L191 SmtUtils]: Spent 282.00 ms on a formula simplification that was a NOOP. DAG size: 96 [2019-10-07 15:29:01,094 WARN L191 SmtUtils]: Spent 281.00 ms on a formula simplification that was a NOOP. DAG size: 98 [2019-10-07 15:29:04,289 WARN L191 SmtUtils]: Spent 790.00 ms on a formula simplification that was a NOOP. DAG size: 81