java -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata ./data -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/default/automizer/svcomp-Reach-32bit-Automizer_Default.epf --traceabstraction.trace.refinement.strategy SIFA_TAIPAN --sifa.abstract.domain CompoundDomain --rcfgbuilder.size.of.a.code.block LoopFreeBlock --sifa.call.summarizer TopInputCallSummarizer --sifa.fluid SizeLimitFluid --sifa.simplification.technique SIMPLIFY_QUICK -i ../../../trunk/examples/svcomp/reducercommutativity/sep10-2.i -------------------------------------------------------------------------------- This is Ultimate 0.1.24-36ac518-m [2019-10-07 15:27:37,144 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-10-07 15:27:37,147 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-10-07 15:27:37,167 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-10-07 15:27:37,167 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-10-07 15:27:37,170 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-10-07 15:27:37,172 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-10-07 15:27:37,181 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-10-07 15:27:37,187 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-10-07 15:27:37,190 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-10-07 15:27:37,191 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-10-07 15:27:37,193 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-10-07 15:27:37,193 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-10-07 15:27:37,195 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-10-07 15:27:37,197 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-10-07 15:27:37,199 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-10-07 15:27:37,200 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-10-07 15:27:37,201 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-10-07 15:27:37,203 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-10-07 15:27:37,208 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-10-07 15:27:37,212 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-10-07 15:27:37,215 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-10-07 15:27:37,218 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-10-07 15:27:37,219 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-10-07 15:27:37,221 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... 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[2019-10-07 15:27:37,233 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-10-07 15:27:37,233 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-10-07 15:27:37,235 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-10-07 15:27:37,236 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/default/automizer/svcomp-Reach-32bit-Automizer_Default.epf [2019-10-07 15:27:37,267 INFO L113 SettingsManager]: Loading preferences was successful [2019-10-07 15:27:37,270 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-10-07 15:27:37,272 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-10-07 15:27:37,272 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-10-07 15:27:37,272 INFO L138 SettingsManager]: * Use SBE=true [2019-10-07 15:27:37,272 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-10-07 15:27:37,273 INFO L138 SettingsManager]: * sizeof long=4 [2019-10-07 15:27:37,273 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-10-07 15:27:37,273 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-10-07 15:27:37,276 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-10-07 15:27:37,277 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-10-07 15:27:37,277 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-10-07 15:27:37,277 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-10-07 15:27:37,277 INFO L138 SettingsManager]: * sizeof long double=12 [2019-10-07 15:27:37,277 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-10-07 15:27:37,278 INFO L138 SettingsManager]: * Use constant arrays=true [2019-10-07 15:27:37,278 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-10-07 15:27:37,279 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-10-07 15:27:37,279 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-10-07 15:27:37,279 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-10-07 15:27:37,280 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-10-07 15:27:37,280 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-10-07 15:27:37,280 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-10-07 15:27:37,280 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-10-07 15:27:37,281 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-10-07 15:27:37,281 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-10-07 15:27:37,281 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-10-07 15:27:37,281 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-10-07 15:27:37,281 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: Trace refinement strategy -> SIFA_TAIPAN Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.sifa: Abstract Domain -> CompoundDomain Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder: Size of a code block -> LoopFreeBlock Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.sifa: Call Summarizer -> TopInputCallSummarizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.sifa: Fluid -> SizeLimitFluid Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.sifa: Simplification Technique -> SIMPLIFY_QUICK [2019-10-07 15:27:37,558 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-10-07 15:27:37,572 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-10-07 15:27:37,576 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-10-07 15:27:37,577 INFO L271 PluginConnector]: Initializing CDTParser... [2019-10-07 15:27:37,578 INFO L275 PluginConnector]: CDTParser initialized [2019-10-07 15:27:37,578 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/reducercommutativity/sep10-2.i [2019-10-07 15:27:37,644 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/ff48706a3/10aa5c1a365e48939bded050871888c3/FLAG54b1c98bd [2019-10-07 15:27:38,109 INFO L306 CDTParser]: Found 1 translation units. [2019-10-07 15:27:38,110 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/reducercommutativity/sep10-2.i [2019-10-07 15:27:38,116 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/ff48706a3/10aa5c1a365e48939bded050871888c3/FLAG54b1c98bd [2019-10-07 15:27:38,489 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/ff48706a3/10aa5c1a365e48939bded050871888c3 [2019-10-07 15:27:38,500 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-10-07 15:27:38,502 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2019-10-07 15:27:38,504 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-10-07 15:27:38,505 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-10-07 15:27:38,508 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-10-07 15:27:38,510 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.10 03:27:38" (1/1) ... [2019-10-07 15:27:38,513 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@6b0f51fe and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.10 03:27:38, skipping insertion in model container [2019-10-07 15:27:38,513 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.10 03:27:38" (1/1) ... [2019-10-07 15:27:38,521 INFO L142 MainTranslator]: Starting translation in SV-COMP mode [2019-10-07 15:27:38,544 INFO L173 MainTranslator]: Built tables and reachable declarations [2019-10-07 15:27:38,803 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-10-07 15:27:38,811 INFO L188 MainTranslator]: Completed pre-run [2019-10-07 15:27:38,836 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-10-07 15:27:38,930 INFO L192 MainTranslator]: Completed translation [2019-10-07 15:27:38,931 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.10 03:27:38 WrapperNode [2019-10-07 15:27:38,931 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-10-07 15:27:38,932 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-10-07 15:27:38,932 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-10-07 15:27:38,932 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-10-07 15:27:38,947 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.10 03:27:38" (1/1) ... [2019-10-07 15:27:38,947 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.10 03:27:38" (1/1) ... [2019-10-07 15:27:38,967 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.10 03:27:38" (1/1) ... [2019-10-07 15:27:38,967 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.10 03:27:38" (1/1) ... [2019-10-07 15:27:38,983 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.10 03:27:38" (1/1) ... [2019-10-07 15:27:38,994 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.10 03:27:38" (1/1) ... [2019-10-07 15:27:38,995 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.10 03:27:38" (1/1) ... [2019-10-07 15:27:38,998 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-10-07 15:27:38,999 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-10-07 15:27:38,999 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-10-07 15:27:38,999 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-10-07 15:27:39,000 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.10 03:27:38" (1/1) ... No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-10-07 15:27:39,068 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2019-10-07 15:27:39,068 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-10-07 15:27:39,068 INFO L138 BoogieDeclarations]: Found implementation of procedure sep [2019-10-07 15:27:39,069 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2019-10-07 15:27:39,069 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_error [2019-10-07 15:27:39,069 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_int [2019-10-07 15:27:39,069 INFO L130 BoogieDeclarations]: Found specification of procedure sep [2019-10-07 15:27:39,069 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2019-10-07 15:27:39,070 INFO L130 BoogieDeclarations]: Found specification of procedure main [2019-10-07 15:27:39,070 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-10-07 15:27:39,070 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-10-07 15:27:39,070 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-10-07 15:27:39,070 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2019-10-07 15:27:39,070 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-10-07 15:27:39,510 INFO L279 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-10-07 15:27:39,510 INFO L284 CfgBuilder]: Removed 3 assume(true) statements. [2019-10-07 15:27:39,513 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.10 03:27:39 BoogieIcfgContainer [2019-10-07 15:27:39,514 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-10-07 15:27:39,515 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-10-07 15:27:39,515 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-10-07 15:27:39,520 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-10-07 15:27:39,520 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.10 03:27:38" (1/3) ... [2019-10-07 15:27:39,521 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@77f99e64 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.10 03:27:39, skipping insertion in model container [2019-10-07 15:27:39,522 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.10 03:27:38" (2/3) ... [2019-10-07 15:27:39,523 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@77f99e64 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.10 03:27:39, skipping insertion in model container [2019-10-07 15:27:39,524 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.10 03:27:39" (3/3) ... [2019-10-07 15:27:39,526 INFO L109 eAbstractionObserver]: Analyzing ICFG sep10-2.i [2019-10-07 15:27:39,535 INFO L152 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-10-07 15:27:39,543 INFO L164 ceAbstractionStarter]: Appying trace abstraction to program that has 1 error locations. [2019-10-07 15:27:39,554 INFO L249 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2019-10-07 15:27:39,578 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-10-07 15:27:39,578 INFO L374 AbstractCegarLoop]: Hoare is true [2019-10-07 15:27:39,578 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-10-07 15:27:39,578 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-10-07 15:27:39,578 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-10-07 15:27:39,578 INFO L378 AbstractCegarLoop]: Difference is false [2019-10-07 15:27:39,579 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-10-07 15:27:39,579 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-10-07 15:27:39,595 INFO L276 IsEmpty]: Start isEmpty. Operand 23 states. [2019-10-07 15:27:39,600 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2019-10-07 15:27:39,600 INFO L377 BasicCegarLoop]: Found error trace [2019-10-07 15:27:39,601 INFO L385 BasicCegarLoop]: trace histogram [3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-07 15:27:39,603 INFO L410 AbstractCegarLoop]: === Iteration 1 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-07 15:27:39,607 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-07 15:27:39,608 INFO L82 PathProgramCache]: Analyzing trace with hash -1553264816, now seen corresponding path program 1 times [2019-10-07 15:27:39,615 INFO L150 tionRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-10-07 15:27:39,615 INFO L231 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2019-10-07 15:27:39,615 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-07 15:27:39,615 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-07 15:27:39,615 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-07 15:27:39,745 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-07 15:27:39,888 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2019-10-07 15:27:39,889 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2019-10-07 15:27:39,892 INFO L211 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-10-07 15:27:39,893 INFO L224 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-10-07 15:27:39,899 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-10-07 15:27:39,919 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-10-07 15:27:39,921 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-10-07 15:27:39,924 INFO L87 Difference]: Start difference. First operand 23 states. Second operand 3 states. [2019-10-07 15:27:39,983 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-07 15:27:39,984 INFO L93 Difference]: Finished difference Result 41 states and 51 transitions. [2019-10-07 15:27:39,985 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-10-07 15:27:39,987 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 24 [2019-10-07 15:27:39,987 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-07 15:27:39,999 INFO L225 Difference]: With dead ends: 41 [2019-10-07 15:27:39,999 INFO L226 Difference]: Without dead ends: 20 [2019-10-07 15:27:40,007 INFO L606 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-10-07 15:27:40,030 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20 states. [2019-10-07 15:27:40,058 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20 to 20. [2019-10-07 15:27:40,060 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20 states. [2019-10-07 15:27:40,064 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20 states to 20 states and 24 transitions. [2019-10-07 15:27:40,066 INFO L78 Accepts]: Start accepts. Automaton has 20 states and 24 transitions. Word has length 24 [2019-10-07 15:27:40,067 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-07 15:27:40,068 INFO L462 AbstractCegarLoop]: Abstraction has 20 states and 24 transitions. [2019-10-07 15:27:40,068 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-10-07 15:27:40,070 INFO L276 IsEmpty]: Start isEmpty. Operand 20 states and 24 transitions. [2019-10-07 15:27:40,074 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2019-10-07 15:27:40,074 INFO L377 BasicCegarLoop]: Found error trace [2019-10-07 15:27:40,074 INFO L385 BasicCegarLoop]: trace histogram [3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-07 15:27:40,075 INFO L410 AbstractCegarLoop]: === Iteration 2 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-07 15:27:40,077 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-07 15:27:40,077 INFO L82 PathProgramCache]: Analyzing trace with hash -1274606805, now seen corresponding path program 1 times [2019-10-07 15:27:40,077 INFO L150 tionRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-10-07 15:27:40,077 INFO L231 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2019-10-07 15:27:40,078 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-07 15:27:40,078 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-07 15:27:40,078 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-07 15:27:40,145 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-07 15:27:40,214 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2019-10-07 15:27:40,217 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2019-10-07 15:27:40,217 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2019-10-07 15:27:40,217 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-07 15:27:40,286 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-07 15:27:40,289 INFO L256 TraceCheckSpWp]: Trace formula consists of 123 conjuncts, 2 conjunts are in the unsatisfiable core [2019-10-07 15:27:40,297 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2019-10-07 15:27:40,325 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2019-10-07 15:27:40,326 INFO L322 TraceCheckSpWp]: Computing backward predicates... [2019-10-07 15:27:40,380 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2019-10-07 15:27:40,380 INFO L211 tionRefinementEngine]: Constructing automaton from 1 perfect and 2 imperfect interpolant sequences. [2019-10-07 15:27:40,381 INFO L224 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [3, 3] total 5 [2019-10-07 15:27:40,383 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-10-07 15:27:40,384 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-10-07 15:27:40,384 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-10-07 15:27:40,384 INFO L87 Difference]: Start difference. First operand 20 states and 24 transitions. Second operand 3 states. [2019-10-07 15:27:40,404 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-07 15:27:40,404 INFO L93 Difference]: Finished difference Result 33 states and 43 transitions. [2019-10-07 15:27:40,405 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-10-07 15:27:40,405 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 25 [2019-10-07 15:27:40,405 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-07 15:27:40,406 INFO L225 Difference]: With dead ends: 33 [2019-10-07 15:27:40,407 INFO L226 Difference]: Without dead ends: 21 [2019-10-07 15:27:40,408 INFO L606 BasicCegarLoop]: 0 DeclaredPredicates, 52 GetRequests, 49 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-10-07 15:27:40,408 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21 states. [2019-10-07 15:27:40,412 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21 to 21. [2019-10-07 15:27:40,413 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21 states. [2019-10-07 15:27:40,414 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21 states to 21 states and 25 transitions. [2019-10-07 15:27:40,414 INFO L78 Accepts]: Start accepts. Automaton has 21 states and 25 transitions. Word has length 25 [2019-10-07 15:27:40,414 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-07 15:27:40,414 INFO L462 AbstractCegarLoop]: Abstraction has 21 states and 25 transitions. [2019-10-07 15:27:40,415 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-10-07 15:27:40,415 INFO L276 IsEmpty]: Start isEmpty. Operand 21 states and 25 transitions. [2019-10-07 15:27:40,416 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2019-10-07 15:27:40,416 INFO L377 BasicCegarLoop]: Found error trace [2019-10-07 15:27:40,416 INFO L385 BasicCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-07 15:27:40,620 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 2 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-07 15:27:40,620 INFO L410 AbstractCegarLoop]: === Iteration 3 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-07 15:27:40,621 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-07 15:27:40,621 INFO L82 PathProgramCache]: Analyzing trace with hash -544560989, now seen corresponding path program 1 times [2019-10-07 15:27:40,621 INFO L150 tionRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-10-07 15:27:40,622 INFO L231 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2019-10-07 15:27:40,622 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-07 15:27:40,622 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-07 15:27:40,623 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-07 15:27:40,653 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-07 15:27:40,708 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2019-10-07 15:27:40,708 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2019-10-07 15:27:40,709 INFO L211 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-10-07 15:27:40,709 INFO L224 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-10-07 15:27:40,710 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-10-07 15:27:40,710 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-10-07 15:27:40,710 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-10-07 15:27:40,711 INFO L87 Difference]: Start difference. First operand 21 states and 25 transitions. Second operand 3 states. [2019-10-07 15:27:40,722 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-07 15:27:40,722 INFO L93 Difference]: Finished difference Result 31 states and 36 transitions. [2019-10-07 15:27:40,723 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-10-07 15:27:40,723 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 28 [2019-10-07 15:27:40,724 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-07 15:27:40,725 INFO L225 Difference]: With dead ends: 31 [2019-10-07 15:27:40,725 INFO L226 Difference]: Without dead ends: 22 [2019-10-07 15:27:40,725 INFO L606 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-10-07 15:27:40,726 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22 states. [2019-10-07 15:27:40,730 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22 to 22. [2019-10-07 15:27:40,731 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22 states. [2019-10-07 15:27:40,732 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22 states to 22 states and 26 transitions. [2019-10-07 15:27:40,732 INFO L78 Accepts]: Start accepts. Automaton has 22 states and 26 transitions. Word has length 28 [2019-10-07 15:27:40,734 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-07 15:27:40,734 INFO L462 AbstractCegarLoop]: Abstraction has 22 states and 26 transitions. [2019-10-07 15:27:40,734 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-10-07 15:27:40,735 INFO L276 IsEmpty]: Start isEmpty. Operand 22 states and 26 transitions. [2019-10-07 15:27:40,736 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2019-10-07 15:27:40,736 INFO L377 BasicCegarLoop]: Found error trace [2019-10-07 15:27:40,736 INFO L385 BasicCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-07 15:27:40,736 INFO L410 AbstractCegarLoop]: === Iteration 4 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-07 15:27:40,737 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-07 15:27:40,737 INFO L82 PathProgramCache]: Analyzing trace with hash -5957836, now seen corresponding path program 1 times [2019-10-07 15:27:40,737 INFO L150 tionRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-10-07 15:27:40,737 INFO L231 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2019-10-07 15:27:40,738 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-07 15:27:40,738 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-07 15:27:40,738 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-07 15:27:40,778 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-07 15:27:40,849 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2019-10-07 15:27:40,849 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2019-10-07 15:27:40,850 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2019-10-07 15:27:40,851 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-07 15:27:40,933 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-07 15:27:40,934 INFO L256 TraceCheckSpWp]: Trace formula consists of 139 conjuncts, 3 conjunts are in the unsatisfiable core [2019-10-07 15:27:40,937 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2019-10-07 15:27:40,949 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2019-10-07 15:27:40,949 INFO L322 TraceCheckSpWp]: Computing backward predicates... [2019-10-07 15:27:40,994 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2019-10-07 15:27:40,995 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSifa [2019-10-07 15:27:41,024 INFO L162 IcfgInterpreter]: Started Sifa with 19 locations of interest [2019-10-07 15:27:41,028 INFO L169 IcfgInterpreter]: Building call graph [2019-10-07 15:27:41,035 INFO L174 IcfgInterpreter]: Initial procedures are [ULTIMATE.start] [2019-10-07 15:27:41,044 INFO L179 IcfgInterpreter]: Starting interpretation [2019-10-07 15:27:41,044 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.start with input of size 1 for LOIs [2019-10-07 15:27:41,189 INFO L199 IcfgInterpreter]: Interpreting procedure main with input of size 21 for LOIs [2019-10-07 15:27:43,297 INFO L199 IcfgInterpreter]: Interpreting procedure sep with input of size 1 for LOIs [2019-10-07 15:27:43,371 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.init with input of size 10 for LOIs [2019-10-07 15:27:43,378 INFO L183 IcfgInterpreter]: Interpretation finished [2019-10-07 15:27:43,378 INFO L191 IcfgInterpreter]: Final predicates for locations of interest are: [2019-10-07 15:27:43,379 INFO L193 IcfgInterpreter]: Reachable states at location L26-4 satisfy 73#(and (<= 10 main_~i~1) (not (< main_~i~1 10))) [2019-10-07 15:27:43,379 INFO L193 IcfgInterpreter]: Reachable states at location L33 satisfy 601#(exists ((v_prenex_2 Int) (v_prenex_1 Int) (v_sep_~ret~0_BEFORE_RETURN_2 Int) (v_sep_~ret~0_BEFORE_RETURN_1 Int)) (or (and (<= main_~ret~1 2147483647) (= main_~ret~1 (mod v_prenex_1 4294967296)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (<= (mod v_prenex_1 4294967296) 2147483647) (not (< main_~i~1 10)) (<= 0 (+ main_~ret~1 2147483648))) (and (<= main_~ret~1 2147483647) (not (<= (mod v_sep_~ret~0_BEFORE_RETURN_1 4294967296) 2147483647)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (= main_~ret~1 (+ (mod v_sep_~ret~0_BEFORE_RETURN_1 4294967296) (- 4294967296))) (not (< main_~i~1 10)) (<= 0 (+ main_~ret~1 2147483648))) (and (<= main_~ret~1 2147483647) (= main_~ret~1 (mod v_prenex_2 4294967296)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (not (< main_~i~1 10)) (<= (mod v_prenex_2 4294967296) 2147483647) (<= 0 (+ main_~ret~1 2147483648))) (and (<= main_~ret~1 2147483647) (= main_~ret~1 (+ (mod v_sep_~ret~0_BEFORE_RETURN_2 4294967296) (- 4294967296))) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (not (<= (mod v_sep_~ret~0_BEFORE_RETURN_2 4294967296) 2147483647)) (not (< main_~i~1 10)) (<= 0 (+ main_~ret~1 2147483648))))) [2019-10-07 15:27:43,380 INFO L193 IcfgInterpreter]: Reachable states at location mainErr0ASSERT_VIOLATIONERROR_FUNCTION satisfy 243#(or (and (not (= main_~ret~1 main_~ret2~0)) (exists ((v_prenex_29 Int) (v_prenex_30 Int) (v_sep_~ret~0_BEFORE_RETURN_6 Int) (v_sep_~ret~0_BEFORE_RETURN_5 Int)) (or (and (<= (mod v_prenex_29 4294967296) 2147483647) (not (< main_~i~2 9)) (<= main_~ret5~0 2147483647) (= (mod v_prenex_29 4294967296) main_~ret5~0) (<= 0 (+ main_~ret5~0 2147483648)) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 36)) main_~temp~0)) (and (= (+ (mod v_prenex_30 4294967296) (- 4294967296)) main_~ret5~0) (not (< main_~i~2 9)) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (not (<= (mod v_prenex_30 4294967296) 2147483647)) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 36)) main_~temp~0)) (and (not (<= (mod v_sep_~ret~0_BEFORE_RETURN_5 4294967296) 2147483647)) (not (< main_~i~2 9)) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (+ (mod v_sep_~ret~0_BEFORE_RETURN_5 4294967296) (- 4294967296)) main_~ret5~0) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 36)) main_~temp~0)) (and (= main_~ret5~0 (mod v_sep_~ret~0_BEFORE_RETURN_6 4294967296)) (not (< main_~i~2 9)) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (<= (mod v_sep_~ret~0_BEFORE_RETURN_6 4294967296) 2147483647) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 36)) main_~temp~0))))) (and (exists ((v_prenex_29 Int) (v_prenex_30 Int) (v_sep_~ret~0_BEFORE_RETURN_6 Int) (v_sep_~ret~0_BEFORE_RETURN_5 Int)) (or (and (<= (mod v_prenex_29 4294967296) 2147483647) (not (< main_~i~2 9)) (<= main_~ret5~0 2147483647) (= (mod v_prenex_29 4294967296) main_~ret5~0) (<= 0 (+ main_~ret5~0 2147483648)) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 36)) main_~temp~0)) (and (= (+ (mod v_prenex_30 4294967296) (- 4294967296)) main_~ret5~0) (not (< main_~i~2 9)) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (not (<= (mod v_prenex_30 4294967296) 2147483647)) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 36)) main_~temp~0)) (and (not (<= (mod v_sep_~ret~0_BEFORE_RETURN_5 4294967296) 2147483647)) (not (< main_~i~2 9)) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (+ (mod v_sep_~ret~0_BEFORE_RETURN_5 4294967296) (- 4294967296)) main_~ret5~0) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 36)) main_~temp~0)) (and (= main_~ret5~0 (mod v_sep_~ret~0_BEFORE_RETURN_6 4294967296)) (not (< main_~i~2 9)) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (<= (mod v_sep_~ret~0_BEFORE_RETURN_6 4294967296) 2147483647) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 36)) main_~temp~0)))) (not (= main_~ret~1 main_~ret5~0)))) [2019-10-07 15:27:43,380 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initENTRY satisfy 666#(and (= |old(#NULL.base)| |#NULL.base|) (= |#valid| |old(#valid)|) (= |#NULL.offset| |old(#NULL.offset)|)) [2019-10-07 15:27:43,381 INFO L193 IcfgInterpreter]: Reachable states at location L26-3 satisfy 68#true [2019-10-07 15:27:43,381 INFO L193 IcfgInterpreter]: Reachable states at location L7-3 satisfy 657#(<= 0 sep_~i~0) [2019-10-07 15:27:43,382 INFO L193 IcfgInterpreter]: Reachable states at location sepENTRY satisfy 610#true [2019-10-07 15:27:43,382 INFO L193 IcfgInterpreter]: Reachable states at location L-1 satisfy 23#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= 0 (select |#valid| 0)) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-07 15:27:43,383 INFO L193 IcfgInterpreter]: Reachable states at location mainENTRY satisfy 33#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= |#valid| |old(#valid)|) (<= 0 |#NULL.base|) (= |#memory_int| |old(#memory_int)|) (= |#NULL.offset| 0) (= |old(#length)| |#length|) (= 0 (select |old(#valid)| 0)) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-07 15:27:43,383 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initEXIT satisfy 671#(and (= |#valid| (store |old(#valid)| 0 0)) (= 0 |#NULL.base|) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-07 15:27:43,383 INFO L193 IcfgInterpreter]: Reachable states at location L39-1 satisfy 488#true [2019-10-07 15:27:43,383 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.startENTRY satisfy 6#true [2019-10-07 15:27:43,384 INFO L193 IcfgInterpreter]: Reachable states at location L39 satisfy 531#(and (not (< main_~i~2 9)) (<= 9 main_~i~2) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 36)) main_~temp~0)) [2019-10-07 15:27:43,384 INFO L193 IcfgInterpreter]: Reachable states at location sepEXIT satisfy 662#(and (not (< sep_~i~0 10)) (= |sep_#res| (ite (<= (mod sep_~ret~0 4294967296) 2147483647) (mod sep_~ret~0 4294967296) (+ (mod sep_~ret~0 4294967296) (- 4294967296)))) (<= 10 sep_~i~0) (<= 0 sep_~i~0)) [2019-10-07 15:27:43,384 INFO L193 IcfgInterpreter]: Reachable states at location L30 satisfy 129#(or (exists ((v_prenex_1 Int) (v_sep_~ret~0_BEFORE_RETURN_1 Int)) (or (and (not (<= (mod v_sep_~ret~0_BEFORE_RETURN_1 4294967296) 2147483647)) (= (+ (mod v_sep_~ret~0_BEFORE_RETURN_1 4294967296) (- 4294967296)) |main_#t~ret6|) (not (< main_~i~1 10))) (and (= (mod v_prenex_1 4294967296) |main_#t~ret6|) (not (< main_~i~1 10)) (<= (mod v_prenex_1 4294967296) 2147483647)))) (exists ((v_prenex_2 Int) (v_sep_~ret~0_BEFORE_RETURN_2 Int)) (or (and (= (+ (mod v_sep_~ret~0_BEFORE_RETURN_2 4294967296) (- 4294967296)) |main_#t~ret6|) (not (<= (mod v_sep_~ret~0_BEFORE_RETURN_2 4294967296) 2147483647)) (not (< main_~i~1 10))) (and (= (mod v_prenex_2 4294967296) |main_#t~ret6|) (not (< main_~i~1 10)) (<= (mod v_prenex_2 4294967296) 2147483647))))) [2019-10-07 15:27:43,385 INFO L193 IcfgInterpreter]: Reachable states at location L41 satisfy 433#true [2019-10-07 15:27:43,386 INFO L193 IcfgInterpreter]: Reachable states at location L42 satisfy 322#true [2019-10-07 15:27:43,386 INFO L193 IcfgInterpreter]: Reachable states at location L33-1 satisfy 596#true [2019-10-07 15:27:43,387 INFO L193 IcfgInterpreter]: Reachable states at location L35-3 satisfy 569#true [2019-10-07 15:27:43,782 INFO L211 tionRefinementEngine]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2019-10-07 15:27:43,783 INFO L224 tionRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4, 4, 11] total 17 [2019-10-07 15:27:43,785 INFO L442 AbstractCegarLoop]: Interpolant automaton has 18 states [2019-10-07 15:27:43,786 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2019-10-07 15:27:43,788 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=50, Invalid=256, Unknown=0, NotChecked=0, Total=306 [2019-10-07 15:27:43,788 INFO L87 Difference]: Start difference. First operand 22 states and 26 transitions. Second operand 18 states. [2019-10-07 15:27:44,448 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-07 15:27:44,448 INFO L93 Difference]: Finished difference Result 40 states and 50 transitions. [2019-10-07 15:27:44,449 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2019-10-07 15:27:44,449 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 29 [2019-10-07 15:27:44,449 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-07 15:27:44,450 INFO L225 Difference]: With dead ends: 40 [2019-10-07 15:27:44,450 INFO L226 Difference]: Without dead ends: 25 [2019-10-07 15:27:44,451 INFO L606 BasicCegarLoop]: 0 DeclaredPredicates, 105 GetRequests, 77 SyntacticMatches, 0 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 198 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=133, Invalid=737, Unknown=0, NotChecked=0, Total=870 [2019-10-07 15:27:44,451 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25 states. [2019-10-07 15:27:44,456 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25 to 25. [2019-10-07 15:27:44,456 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 25 states. [2019-10-07 15:27:44,457 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25 states to 25 states and 29 transitions. [2019-10-07 15:27:44,457 INFO L78 Accepts]: Start accepts. Automaton has 25 states and 29 transitions. Word has length 29 [2019-10-07 15:27:44,457 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-07 15:27:44,457 INFO L462 AbstractCegarLoop]: Abstraction has 25 states and 29 transitions. [2019-10-07 15:27:44,458 INFO L463 AbstractCegarLoop]: Interpolant automaton has 18 states. [2019-10-07 15:27:44,458 INFO L276 IsEmpty]: Start isEmpty. Operand 25 states and 29 transitions. [2019-10-07 15:27:44,459 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2019-10-07 15:27:44,459 INFO L377 BasicCegarLoop]: Found error trace [2019-10-07 15:27:44,459 INFO L385 BasicCegarLoop]: trace histogram [4, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-07 15:27:44,670 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-07 15:27:44,671 INFO L410 AbstractCegarLoop]: === Iteration 5 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-07 15:27:44,671 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-07 15:27:44,672 INFO L82 PathProgramCache]: Analyzing trace with hash -1961836647, now seen corresponding path program 2 times [2019-10-07 15:27:44,672 INFO L150 tionRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-10-07 15:27:44,672 INFO L231 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2019-10-07 15:27:44,673 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-07 15:27:44,673 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-07 15:27:44,674 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-07 15:27:44,732 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-07 15:27:44,814 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2019-10-07 15:27:44,814 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2019-10-07 15:27:44,814 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2019-10-07 15:27:44,815 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-07 15:27:44,901 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 2 check-sat command(s) [2019-10-07 15:27:44,901 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-10-07 15:27:44,908 INFO L256 TraceCheckSpWp]: Trace formula consists of 107 conjuncts, 3 conjunts are in the unsatisfiable core [2019-10-07 15:27:44,913 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2019-10-07 15:27:44,952 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 10 proven. 1 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2019-10-07 15:27:44,952 INFO L322 TraceCheckSpWp]: Computing backward predicates... [2019-10-07 15:27:44,988 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 10 proven. 1 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2019-10-07 15:27:44,988 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSifa [2019-10-07 15:27:44,993 INFO L162 IcfgInterpreter]: Started Sifa with 19 locations of interest [2019-10-07 15:27:44,993 INFO L169 IcfgInterpreter]: Building call graph [2019-10-07 15:27:44,994 INFO L174 IcfgInterpreter]: Initial procedures are [ULTIMATE.start] [2019-10-07 15:27:44,994 INFO L179 IcfgInterpreter]: Starting interpretation [2019-10-07 15:27:44,994 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.start with input of size 1 for LOIs [2019-10-07 15:27:45,019 INFO L199 IcfgInterpreter]: Interpreting procedure main with input of size 21 for LOIs [2019-10-07 15:27:46,432 INFO L199 IcfgInterpreter]: Interpreting procedure sep with input of size 1 for LOIs [2019-10-07 15:27:46,466 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.init with input of size 10 for LOIs [2019-10-07 15:27:46,470 INFO L183 IcfgInterpreter]: Interpretation finished [2019-10-07 15:27:46,471 INFO L191 IcfgInterpreter]: Final predicates for locations of interest are: [2019-10-07 15:27:46,471 INFO L193 IcfgInterpreter]: Reachable states at location L26-4 satisfy 73#(and (<= 10 main_~i~1) (not (< main_~i~1 10))) [2019-10-07 15:27:46,471 INFO L193 IcfgInterpreter]: Reachable states at location L33 satisfy 601#(exists ((v_prenex_196 Int) (v_sep_~ret~0_BEFORE_RETURN_28 Int) (v_sep_~ret~0_BEFORE_RETURN_27 Int) (v_prenex_195 Int)) (or (and (<= main_~ret~1 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (= (mod v_prenex_195 4294967296) main_~ret~1) (<= (mod v_prenex_195 4294967296) 2147483647) (not (< main_~i~1 10)) (<= 0 (+ main_~ret~1 2147483648))) (and (= (+ (mod v_prenex_196 4294967296) (- 4294967296)) main_~ret~1) (not (<= (mod v_prenex_196 4294967296) 2147483647)) (<= main_~ret~1 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (not (< main_~i~1 10)) (<= 0 (+ main_~ret~1 2147483648))) (and (not (<= (mod v_sep_~ret~0_BEFORE_RETURN_27 4294967296) 2147483647)) (<= main_~ret~1 2147483647) (= (+ (mod v_sep_~ret~0_BEFORE_RETURN_27 4294967296) (- 4294967296)) main_~ret~1) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (not (< main_~i~1 10)) (<= 0 (+ main_~ret~1 2147483648))) (and (<= main_~ret~1 2147483647) (= (mod v_sep_~ret~0_BEFORE_RETURN_28 4294967296) main_~ret~1) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (<= (mod v_sep_~ret~0_BEFORE_RETURN_28 4294967296) 2147483647) (not (< main_~i~1 10)) (<= 0 (+ main_~ret~1 2147483648))))) [2019-10-07 15:27:46,472 INFO L193 IcfgInterpreter]: Reachable states at location mainErr0ASSERT_VIOLATIONERROR_FUNCTION satisfy 243#(or (and (exists ((v_sep_~ret~0_BEFORE_RETURN_31 Int) (v_prenex_224 Int) (v_sep_~ret~0_BEFORE_RETURN_32 Int) (v_prenex_223 Int)) (or (and (not (< main_~i~2 9)) (<= main_~ret5~0 2147483647) (= (mod v_sep_~ret~0_BEFORE_RETURN_31 4294967296) main_~ret5~0) (<= (mod v_sep_~ret~0_BEFORE_RETURN_31 4294967296) 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 36)) main_~temp~0)) (and (= main_~ret5~0 (+ (mod v_sep_~ret~0_BEFORE_RETURN_32 4294967296) (- 4294967296))) (not (< main_~i~2 9)) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 36)) main_~temp~0) (not (<= (mod v_sep_~ret~0_BEFORE_RETURN_32 4294967296) 2147483647))) (and (not (<= (mod v_prenex_223 4294967296) 2147483647)) (not (< main_~i~2 9)) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= main_~ret5~0 (+ (mod v_prenex_223 4294967296) (- 4294967296))) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 36)) main_~temp~0)) (and (not (< main_~i~2 9)) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (<= (mod v_prenex_224 4294967296) 2147483647) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 36)) main_~temp~0) (= main_~ret5~0 (mod v_prenex_224 4294967296))))) (not (= main_~ret~1 main_~ret5~0))) (and (not (= main_~ret~1 main_~ret2~0)) (exists ((v_sep_~ret~0_BEFORE_RETURN_31 Int) (v_prenex_224 Int) (v_sep_~ret~0_BEFORE_RETURN_32 Int) (v_prenex_223 Int)) (or (and (not (< main_~i~2 9)) (<= main_~ret5~0 2147483647) (= (mod v_sep_~ret~0_BEFORE_RETURN_31 4294967296) main_~ret5~0) (<= (mod v_sep_~ret~0_BEFORE_RETURN_31 4294967296) 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 36)) main_~temp~0)) (and (= main_~ret5~0 (+ (mod v_sep_~ret~0_BEFORE_RETURN_32 4294967296) (- 4294967296))) (not (< main_~i~2 9)) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 36)) main_~temp~0) (not (<= (mod v_sep_~ret~0_BEFORE_RETURN_32 4294967296) 2147483647))) (and (not (<= (mod v_prenex_223 4294967296) 2147483647)) (not (< main_~i~2 9)) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= main_~ret5~0 (+ (mod v_prenex_223 4294967296) (- 4294967296))) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 36)) main_~temp~0)) (and (not (< main_~i~2 9)) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (<= (mod v_prenex_224 4294967296) 2147483647) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 36)) main_~temp~0) (= main_~ret5~0 (mod v_prenex_224 4294967296))))))) [2019-10-07 15:27:46,472 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initENTRY satisfy 666#(and (= |old(#NULL.base)| |#NULL.base|) (= |#valid| |old(#valid)|) (= |#NULL.offset| |old(#NULL.offset)|)) [2019-10-07 15:27:46,472 INFO L193 IcfgInterpreter]: Reachable states at location L26-3 satisfy 68#true [2019-10-07 15:27:46,472 INFO L193 IcfgInterpreter]: Reachable states at location L7-3 satisfy 657#(<= 0 sep_~i~0) [2019-10-07 15:27:46,472 INFO L193 IcfgInterpreter]: Reachable states at location sepENTRY satisfy 610#true [2019-10-07 15:27:46,473 INFO L193 IcfgInterpreter]: Reachable states at location L-1 satisfy 23#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= 0 (select |#valid| 0)) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-07 15:27:46,473 INFO L193 IcfgInterpreter]: Reachable states at location mainENTRY satisfy 33#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= |#valid| |old(#valid)|) (<= 0 |#NULL.base|) (= |#memory_int| |old(#memory_int)|) (= |#NULL.offset| 0) (= |old(#length)| |#length|) (= 0 (select |old(#valid)| 0)) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-07 15:27:46,473 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initEXIT satisfy 671#(and (= |#valid| (store |old(#valid)| 0 0)) (= 0 |#NULL.base|) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-07 15:27:46,473 INFO L193 IcfgInterpreter]: Reachable states at location L39-1 satisfy 488#true [2019-10-07 15:27:46,473 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.startENTRY satisfy 6#true [2019-10-07 15:27:46,474 INFO L193 IcfgInterpreter]: Reachable states at location L39 satisfy 531#(and (not (< main_~i~2 9)) (<= 9 main_~i~2) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 36)) main_~temp~0)) [2019-10-07 15:27:46,474 INFO L193 IcfgInterpreter]: Reachable states at location sepEXIT satisfy 662#(and (not (< sep_~i~0 10)) (= |sep_#res| (ite (<= (mod sep_~ret~0 4294967296) 2147483647) (mod sep_~ret~0 4294967296) (+ (mod sep_~ret~0 4294967296) (- 4294967296)))) (<= 10 sep_~i~0) (<= 0 sep_~i~0)) [2019-10-07 15:27:46,474 INFO L193 IcfgInterpreter]: Reachable states at location L30 satisfy 129#(or (exists ((v_sep_~ret~0_BEFORE_RETURN_27 Int) (v_prenex_195 Int)) (or (and (= (mod v_prenex_195 4294967296) |main_#t~ret6|) (<= (mod v_prenex_195 4294967296) 2147483647) (not (< main_~i~1 10))) (and (= (+ (mod v_sep_~ret~0_BEFORE_RETURN_27 4294967296) (- 4294967296)) |main_#t~ret6|) (not (<= (mod v_sep_~ret~0_BEFORE_RETURN_27 4294967296) 2147483647)) (not (< main_~i~1 10))))) (exists ((v_sep_~ret~0_BEFORE_RETURN_28 Int) (v_prenex_196 Int)) (or (and (= (mod v_sep_~ret~0_BEFORE_RETURN_28 4294967296) |main_#t~ret6|) (not (< main_~i~1 10)) (<= (mod v_sep_~ret~0_BEFORE_RETURN_28 4294967296) 2147483647)) (and (not (<= (mod v_prenex_196 4294967296) 2147483647)) (= (+ (mod v_prenex_196 4294967296) (- 4294967296)) |main_#t~ret6|) (not (< main_~i~1 10)))))) [2019-10-07 15:27:46,474 INFO L193 IcfgInterpreter]: Reachable states at location L41 satisfy 433#true [2019-10-07 15:27:46,474 INFO L193 IcfgInterpreter]: Reachable states at location L42 satisfy 322#true [2019-10-07 15:27:46,475 INFO L193 IcfgInterpreter]: Reachable states at location L33-1 satisfy 596#true [2019-10-07 15:27:46,475 INFO L193 IcfgInterpreter]: Reachable states at location L35-3 satisfy 569#true [2019-10-07 15:27:46,865 INFO L211 tionRefinementEngine]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2019-10-07 15:27:46,865 INFO L224 tionRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 4, 4, 11] total 21 [2019-10-07 15:27:46,866 INFO L442 AbstractCegarLoop]: Interpolant automaton has 22 states [2019-10-07 15:27:46,867 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2019-10-07 15:27:46,867 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=64, Invalid=398, Unknown=0, NotChecked=0, Total=462 [2019-10-07 15:27:46,867 INFO L87 Difference]: Start difference. First operand 25 states and 29 transitions. Second operand 22 states. [2019-10-07 15:27:47,749 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-07 15:27:47,749 INFO L93 Difference]: Finished difference Result 44 states and 58 transitions. [2019-10-07 15:27:47,749 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2019-10-07 15:27:47,750 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 32 [2019-10-07 15:27:47,750 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-07 15:27:47,751 INFO L225 Difference]: With dead ends: 44 [2019-10-07 15:27:47,751 INFO L226 Difference]: Without dead ends: 29 [2019-10-07 15:27:47,752 INFO L606 BasicCegarLoop]: 0 DeclaredPredicates, 119 GetRequests, 82 SyntacticMatches, 0 SemanticMatches, 37 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 305 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=210, Invalid=1272, Unknown=0, NotChecked=0, Total=1482 [2019-10-07 15:27:47,753 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 29 states. [2019-10-07 15:27:47,758 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 29 to 29. [2019-10-07 15:27:47,758 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 29 states. [2019-10-07 15:27:47,759 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29 states to 29 states and 33 transitions. [2019-10-07 15:27:47,759 INFO L78 Accepts]: Start accepts. Automaton has 29 states and 33 transitions. Word has length 32 [2019-10-07 15:27:47,760 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-07 15:27:47,760 INFO L462 AbstractCegarLoop]: Abstraction has 29 states and 33 transitions. [2019-10-07 15:27:47,760 INFO L463 AbstractCegarLoop]: Interpolant automaton has 22 states. [2019-10-07 15:27:47,760 INFO L276 IsEmpty]: Start isEmpty. Operand 29 states and 33 transitions. [2019-10-07 15:27:47,761 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2019-10-07 15:27:47,761 INFO L377 BasicCegarLoop]: Found error trace [2019-10-07 15:27:47,761 INFO L385 BasicCegarLoop]: trace histogram [12, 5, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-07 15:27:47,967 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 4 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-07 15:27:47,968 INFO L410 AbstractCegarLoop]: === Iteration 6 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-07 15:27:47,969 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-07 15:27:47,969 INFO L82 PathProgramCache]: Analyzing trace with hash 1603069542, now seen corresponding path program 3 times [2019-10-07 15:27:47,969 INFO L150 tionRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-10-07 15:27:47,969 INFO L231 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2019-10-07 15:27:47,970 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-07 15:27:47,970 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-07 15:27:47,970 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-07 15:27:48,020 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-07 15:27:48,094 INFO L134 CoverageAnalysis]: Checked inductivity of 127 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2019-10-07 15:27:48,094 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2019-10-07 15:27:48,094 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2019-10-07 15:27:48,094 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-07 15:27:48,222 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2019-10-07 15:27:48,222 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-10-07 15:27:48,223 INFO L256 TraceCheckSpWp]: Trace formula consists of 199 conjuncts, 6 conjunts are in the unsatisfiable core [2019-10-07 15:27:48,235 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2019-10-07 15:27:48,290 INFO L134 CoverageAnalysis]: Checked inductivity of 127 backedges. 52 proven. 10 refuted. 0 times theorem prover too weak. 65 trivial. 0 not checked. [2019-10-07 15:27:48,290 INFO L322 TraceCheckSpWp]: Computing backward predicates... [2019-10-07 15:27:48,389 INFO L134 CoverageAnalysis]: Checked inductivity of 127 backedges. 0 proven. 62 refuted. 0 times theorem prover too weak. 65 trivial. 0 not checked. [2019-10-07 15:27:48,390 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSifa [2019-10-07 15:27:48,392 INFO L162 IcfgInterpreter]: Started Sifa with 19 locations of interest [2019-10-07 15:27:48,392 INFO L169 IcfgInterpreter]: Building call graph [2019-10-07 15:27:48,392 INFO L174 IcfgInterpreter]: Initial procedures are [ULTIMATE.start] [2019-10-07 15:27:48,393 INFO L179 IcfgInterpreter]: Starting interpretation [2019-10-07 15:27:48,393 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.start with input of size 1 for LOIs [2019-10-07 15:27:48,415 INFO L199 IcfgInterpreter]: Interpreting procedure main with input of size 21 for LOIs [2019-10-07 15:27:49,835 INFO L199 IcfgInterpreter]: Interpreting procedure sep with input of size 1 for LOIs [2019-10-07 15:27:49,880 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.init with input of size 10 for LOIs [2019-10-07 15:27:49,884 INFO L183 IcfgInterpreter]: Interpretation finished [2019-10-07 15:27:49,885 INFO L191 IcfgInterpreter]: Final predicates for locations of interest are: [2019-10-07 15:27:49,885 INFO L193 IcfgInterpreter]: Reachable states at location L26-4 satisfy 73#(and (<= 10 main_~i~1) (not (< main_~i~1 10))) [2019-10-07 15:27:49,885 INFO L193 IcfgInterpreter]: Reachable states at location L33 satisfy 601#(exists ((v_sep_~ret~0_BEFORE_RETURN_53 Int) (v_prenex_389 Int) (v_sep_~ret~0_BEFORE_RETURN_54 Int) (v_prenex_390 Int)) (or (and (<= main_~ret~1 2147483647) (= (+ (mod v_prenex_390 4294967296) (- 4294967296)) main_~ret~1) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (not (<= (mod v_prenex_390 4294967296) 2147483647)) (not (< main_~i~1 10)) (<= 0 (+ main_~ret~1 2147483648))) (and (<= main_~ret~1 2147483647) (= (mod v_sep_~ret~0_BEFORE_RETURN_54 4294967296) main_~ret~1) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (<= (mod v_sep_~ret~0_BEFORE_RETURN_54 4294967296) 2147483647) (not (< main_~i~1 10)) (<= 0 (+ main_~ret~1 2147483648))) (and (= (+ (mod v_sep_~ret~0_BEFORE_RETURN_53 4294967296) (- 4294967296)) main_~ret~1) (<= main_~ret~1 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (not (<= (mod v_sep_~ret~0_BEFORE_RETURN_53 4294967296) 2147483647)) (not (< main_~i~1 10)) (<= 0 (+ main_~ret~1 2147483648))) (and (<= main_~ret~1 2147483647) (= (mod v_prenex_389 4294967296) main_~ret~1) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (<= (mod v_prenex_389 4294967296) 2147483647) (not (< main_~i~1 10)) (<= 0 (+ main_~ret~1 2147483648))))) [2019-10-07 15:27:49,886 INFO L193 IcfgInterpreter]: Reachable states at location mainErr0ASSERT_VIOLATIONERROR_FUNCTION satisfy 243#(or (and (exists ((v_prenex_417 Int) (v_sep_~ret~0_BEFORE_RETURN_57 Int) (v_prenex_418 Int) (v_sep_~ret~0_BEFORE_RETURN_58 Int)) (or (and (= (mod v_prenex_417 4294967296) main_~ret5~0) (not (< main_~i~2 9)) (<= (mod v_prenex_417 4294967296) 2147483647) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 36)) main_~temp~0)) (and (not (< main_~i~2 9)) (<= main_~ret5~0 2147483647) (= (+ (mod v_sep_~ret~0_BEFORE_RETURN_57 4294967296) (- 4294967296)) main_~ret5~0) (<= 0 (+ main_~ret5~0 2147483648)) (not (<= (mod v_sep_~ret~0_BEFORE_RETURN_57 4294967296) 2147483647)) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 36)) main_~temp~0)) (and (not (< main_~i~2 9)) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 36)) main_~temp~0) (not (<= (mod v_prenex_418 4294967296) 2147483647)) (= main_~ret5~0 (+ (mod v_prenex_418 4294967296) (- 4294967296)))) (and (not (< main_~i~2 9)) (<= main_~ret5~0 2147483647) (= main_~ret5~0 (mod v_sep_~ret~0_BEFORE_RETURN_58 4294967296)) (<= 0 (+ main_~ret5~0 2147483648)) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 36)) main_~temp~0) (<= (mod v_sep_~ret~0_BEFORE_RETURN_58 4294967296) 2147483647)))) (not (= main_~ret~1 main_~ret5~0))) (and (not (= main_~ret~1 main_~ret2~0)) (exists ((v_prenex_417 Int) (v_sep_~ret~0_BEFORE_RETURN_57 Int) (v_prenex_418 Int) (v_sep_~ret~0_BEFORE_RETURN_58 Int)) (or (and (= (mod v_prenex_417 4294967296) main_~ret5~0) (not (< main_~i~2 9)) (<= (mod v_prenex_417 4294967296) 2147483647) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 36)) main_~temp~0)) (and (not (< main_~i~2 9)) (<= main_~ret5~0 2147483647) (= (+ (mod v_sep_~ret~0_BEFORE_RETURN_57 4294967296) (- 4294967296)) main_~ret5~0) (<= 0 (+ main_~ret5~0 2147483648)) (not (<= (mod v_sep_~ret~0_BEFORE_RETURN_57 4294967296) 2147483647)) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 36)) main_~temp~0)) (and (not (< main_~i~2 9)) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 36)) main_~temp~0) (not (<= (mod v_prenex_418 4294967296) 2147483647)) (= main_~ret5~0 (+ (mod v_prenex_418 4294967296) (- 4294967296)))) (and (not (< main_~i~2 9)) (<= main_~ret5~0 2147483647) (= main_~ret5~0 (mod v_sep_~ret~0_BEFORE_RETURN_58 4294967296)) (<= 0 (+ main_~ret5~0 2147483648)) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 36)) main_~temp~0) (<= (mod v_sep_~ret~0_BEFORE_RETURN_58 4294967296) 2147483647)))))) [2019-10-07 15:27:49,887 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initENTRY satisfy 666#(and (= |old(#NULL.base)| |#NULL.base|) (= |#valid| |old(#valid)|) (= |#NULL.offset| |old(#NULL.offset)|)) [2019-10-07 15:27:49,887 INFO L193 IcfgInterpreter]: Reachable states at location L26-3 satisfy 68#true [2019-10-07 15:27:49,887 INFO L193 IcfgInterpreter]: Reachable states at location L7-3 satisfy 657#(<= 0 sep_~i~0) [2019-10-07 15:27:49,888 INFO L193 IcfgInterpreter]: Reachable states at location sepENTRY satisfy 610#true [2019-10-07 15:27:49,888 INFO L193 IcfgInterpreter]: Reachable states at location L-1 satisfy 23#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= 0 (select |#valid| 0)) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-07 15:27:49,888 INFO L193 IcfgInterpreter]: Reachable states at location mainENTRY satisfy 33#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= |#valid| |old(#valid)|) (<= 0 |#NULL.base|) (= |#memory_int| |old(#memory_int)|) (= |#NULL.offset| 0) (= |old(#length)| |#length|) (= 0 (select |old(#valid)| 0)) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-07 15:27:49,888 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initEXIT satisfy 671#(and (= |#valid| (store |old(#valid)| 0 0)) (= 0 |#NULL.base|) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-07 15:27:49,889 INFO L193 IcfgInterpreter]: Reachable states at location L39-1 satisfy 488#true [2019-10-07 15:27:49,889 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.startENTRY satisfy 6#true [2019-10-07 15:27:49,889 INFO L193 IcfgInterpreter]: Reachable states at location L39 satisfy 531#(and (not (< main_~i~2 9)) (<= 9 main_~i~2) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 36)) main_~temp~0)) [2019-10-07 15:27:49,890 INFO L193 IcfgInterpreter]: Reachable states at location sepEXIT satisfy 662#(and (not (< sep_~i~0 10)) (= |sep_#res| (ite (<= (mod sep_~ret~0 4294967296) 2147483647) (mod sep_~ret~0 4294967296) (+ (mod sep_~ret~0 4294967296) (- 4294967296)))) (<= 10 sep_~i~0) (<= 0 sep_~i~0)) [2019-10-07 15:27:49,890 INFO L193 IcfgInterpreter]: Reachable states at location L30 satisfy 129#(or (exists ((v_sep_~ret~0_BEFORE_RETURN_53 Int) (v_prenex_389 Int)) (or (and (<= (mod v_prenex_389 4294967296) 2147483647) (not (< main_~i~1 10)) (= (mod v_prenex_389 4294967296) |main_#t~ret6|)) (and (not (<= (mod v_sep_~ret~0_BEFORE_RETURN_53 4294967296) 2147483647)) (= (+ (mod v_sep_~ret~0_BEFORE_RETURN_53 4294967296) (- 4294967296)) |main_#t~ret6|) (not (< main_~i~1 10))))) (exists ((v_sep_~ret~0_BEFORE_RETURN_54 Int) (v_prenex_390 Int)) (or (and (not (<= (mod v_prenex_390 4294967296) 2147483647)) (= |main_#t~ret6| (+ (mod v_prenex_390 4294967296) (- 4294967296))) (not (< main_~i~1 10))) (and (= (mod v_sep_~ret~0_BEFORE_RETURN_54 4294967296) |main_#t~ret6|) (not (< main_~i~1 10)) (<= (mod v_sep_~ret~0_BEFORE_RETURN_54 4294967296) 2147483647))))) [2019-10-07 15:27:49,890 INFO L193 IcfgInterpreter]: Reachable states at location L41 satisfy 433#true [2019-10-07 15:27:49,891 INFO L193 IcfgInterpreter]: Reachable states at location L42 satisfy 322#true [2019-10-07 15:27:49,891 INFO L193 IcfgInterpreter]: Reachable states at location L33-1 satisfy 596#true [2019-10-07 15:27:49,891 INFO L193 IcfgInterpreter]: Reachable states at location L35-3 satisfy 569#true [2019-10-07 15:27:50,509 INFO L211 tionRefinementEngine]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2019-10-07 15:27:50,509 INFO L224 tionRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 7, 7, 11] total 28 [2019-10-07 15:27:50,510 INFO L442 AbstractCegarLoop]: Interpolant automaton has 29 states [2019-10-07 15:27:50,511 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 29 interpolants. [2019-10-07 15:27:50,512 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=122, Invalid=690, Unknown=0, NotChecked=0, Total=812 [2019-10-07 15:27:50,512 INFO L87 Difference]: Start difference. First operand 29 states and 33 transitions. Second operand 29 states. [2019-10-07 15:27:51,921 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-07 15:27:51,921 INFO L93 Difference]: Finished difference Result 54 states and 71 transitions. [2019-10-07 15:27:51,922 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2019-10-07 15:27:51,922 INFO L78 Accepts]: Start accepts. Automaton has 29 states. Word has length 42 [2019-10-07 15:27:51,922 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-07 15:27:51,923 INFO L225 Difference]: With dead ends: 54 [2019-10-07 15:27:51,923 INFO L226 Difference]: Without dead ends: 36 [2019-10-07 15:27:51,925 INFO L606 BasicCegarLoop]: 0 DeclaredPredicates, 159 GetRequests, 108 SyntacticMatches, 0 SemanticMatches, 51 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 648 ImplicationChecksByTransitivity, 1.8s TimeCoverageRelationStatistics Valid=420, Invalid=2336, Unknown=0, NotChecked=0, Total=2756 [2019-10-07 15:27:51,925 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 36 states. [2019-10-07 15:27:51,933 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 36 to 36. [2019-10-07 15:27:51,933 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 36 states. [2019-10-07 15:27:51,934 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 36 states to 36 states and 40 transitions. [2019-10-07 15:27:51,934 INFO L78 Accepts]: Start accepts. Automaton has 36 states and 40 transitions. Word has length 42 [2019-10-07 15:27:51,935 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-07 15:27:51,935 INFO L462 AbstractCegarLoop]: Abstraction has 36 states and 40 transitions. [2019-10-07 15:27:51,935 INFO L463 AbstractCegarLoop]: Interpolant automaton has 29 states. [2019-10-07 15:27:51,935 INFO L276 IsEmpty]: Start isEmpty. Operand 36 states and 40 transitions. [2019-10-07 15:27:51,936 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 62 [2019-10-07 15:27:51,937 INFO L377 BasicCegarLoop]: Found error trace [2019-10-07 15:27:51,937 INFO L385 BasicCegarLoop]: trace histogram [30, 6, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-07 15:27:52,137 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 5 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-07 15:27:52,138 INFO L410 AbstractCegarLoop]: === Iteration 7 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-07 15:27:52,139 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-07 15:27:52,139 INFO L82 PathProgramCache]: Analyzing trace with hash 607320577, now seen corresponding path program 4 times [2019-10-07 15:27:52,139 INFO L150 tionRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-10-07 15:27:52,140 INFO L231 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2019-10-07 15:27:52,140 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-07 15:27:52,141 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-07 15:27:52,141 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-07 15:27:52,203 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-07 15:27:52,311 INFO L134 CoverageAnalysis]: Checked inductivity of 556 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 535 trivial. 0 not checked. [2019-10-07 15:27:52,311 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2019-10-07 15:27:52,312 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2019-10-07 15:27:52,312 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-07 15:27:52,492 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-07 15:27:52,494 INFO L256 TraceCheckSpWp]: Trace formula consists of 277 conjuncts, 8 conjunts are in the unsatisfiable core [2019-10-07 15:27:52,503 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2019-10-07 15:27:52,525 INFO L134 CoverageAnalysis]: Checked inductivity of 556 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 535 trivial. 0 not checked. [2019-10-07 15:27:52,526 INFO L322 TraceCheckSpWp]: Computing backward predicates... [2019-10-07 15:27:52,597 INFO L134 CoverageAnalysis]: Checked inductivity of 556 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 535 trivial. 0 not checked. [2019-10-07 15:27:52,598 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSifa [2019-10-07 15:27:52,599 INFO L162 IcfgInterpreter]: Started Sifa with 19 locations of interest [2019-10-07 15:27:52,599 INFO L169 IcfgInterpreter]: Building call graph [2019-10-07 15:27:52,600 INFO L174 IcfgInterpreter]: Initial procedures are [ULTIMATE.start] [2019-10-07 15:27:52,600 INFO L179 IcfgInterpreter]: Starting interpretation [2019-10-07 15:27:52,600 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.start with input of size 1 for LOIs [2019-10-07 15:27:52,620 INFO L199 IcfgInterpreter]: Interpreting procedure main with input of size 21 for LOIs [2019-10-07 15:27:54,015 INFO L199 IcfgInterpreter]: Interpreting procedure sep with input of size 1 for LOIs [2019-10-07 15:27:54,058 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.init with input of size 10 for LOIs [2019-10-07 15:27:54,062 INFO L183 IcfgInterpreter]: Interpretation finished [2019-10-07 15:27:54,062 INFO L191 IcfgInterpreter]: Final predicates for locations of interest are: [2019-10-07 15:27:54,063 INFO L193 IcfgInterpreter]: Reachable states at location L26-4 satisfy 73#(and (<= 10 main_~i~1) (not (< main_~i~1 10))) [2019-10-07 15:27:54,063 INFO L193 IcfgInterpreter]: Reachable states at location L33 satisfy 601#(or (exists ((v_prenex_583 Int) (v_prenex_584 Int) (v_sep_~ret~0_BEFORE_RETURN_80 Int) (v_sep_~ret~0_BEFORE_RETURN_79 Int)) (or (and (<= main_~ret~1 2147483647) (= (mod v_prenex_584 4294967296) main_~ret~1) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (<= (mod v_prenex_584 4294967296) 2147483647) (not (< main_~i~1 10)) (<= 0 (+ main_~ret~1 2147483648))) (and (<= main_~ret~1 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (<= (mod v_sep_~ret~0_BEFORE_RETURN_79 4294967296) 2147483647) (= (mod v_sep_~ret~0_BEFORE_RETURN_79 4294967296) main_~ret~1) (not (< main_~i~1 10)) (<= 0 (+ main_~ret~1 2147483648))) (and (= (+ (mod v_sep_~ret~0_BEFORE_RETURN_80 4294967296) (- 4294967296)) main_~ret~1) (<= main_~ret~1 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (not (<= (mod v_sep_~ret~0_BEFORE_RETURN_80 4294967296) 2147483647)) (not (< main_~i~1 10)) (<= 0 (+ main_~ret~1 2147483648))) (and (<= main_~ret~1 2147483647) (= (+ (mod v_prenex_583 4294967296) (- 4294967296)) main_~ret~1) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (not (<= (mod v_prenex_583 4294967296) 2147483647)) (not (< main_~i~1 10)) (<= 0 (+ main_~ret~1 2147483648))))) (exists ((v_prenex_583 Int) (v_prenex_584 Int) (v_sep_~ret~0_BEFORE_RETURN_80 Int) (v_sep_~ret~0_BEFORE_RETURN_79 Int)) (or (and (<= main_~ret~1 2147483647) (= (mod v_prenex_584 4294967296) main_~ret~1) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (<= (mod v_prenex_584 4294967296) 2147483647) (not (< main_~i~1 10)) (<= 0 (+ main_~ret~1 2147483648))) (and (= (+ (mod v_sep_~ret~0_BEFORE_RETURN_80 4294967296) (- 4294967296)) main_~ret~1) (<= main_~ret~1 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (not (<= (mod v_sep_~ret~0_BEFORE_RETURN_80 4294967296) 2147483647)) (not (< main_~i~1 10)) (<= 0 (+ main_~ret~1 2147483648))) (and (<= main_~ret~1 2147483647) (= (+ (mod v_prenex_583 4294967296) (- 4294967296)) main_~ret~1) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (not (<= (mod v_prenex_583 4294967296) 2147483647)) (not (< main_~i~1 10)) (<= 0 (+ main_~ret~1 2147483648))) (and (<= main_~ret~1 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (= (mod v_sep_~ret~0_BEFORE_RETURN_79 4294967296) main_~ret~1) (<= (mod v_sep_~ret~0_BEFORE_RETURN_79 4294967296) 2147483647) (not (< main_~i~1 10)) (<= 0 (+ main_~ret~1 2147483648)))))) [2019-10-07 15:27:54,064 INFO L193 IcfgInterpreter]: Reachable states at location mainErr0ASSERT_VIOLATIONERROR_FUNCTION satisfy 243#(or (and (not (= main_~ret~1 main_~ret2~0)) (exists ((v_prenex_611 Int) (v_prenex_612 Int) (v_sep_~ret~0_BEFORE_RETURN_84 Int) (v_sep_~ret~0_BEFORE_RETURN_83 Int)) (or (and (<= (mod v_prenex_611 4294967296) 2147483647) (not (< main_~i~2 9)) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 36)) main_~temp~0) (= main_~ret5~0 (mod v_prenex_611 4294967296))) (and (= (+ (mod v_prenex_612 4294967296) (- 4294967296)) main_~ret5~0) (not (< main_~i~2 9)) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 36)) main_~temp~0) (not (<= (mod v_prenex_612 4294967296) 2147483647))) (and (not (< main_~i~2 9)) (<= main_~ret5~0 2147483647) (= main_~ret5~0 (+ (mod v_sep_~ret~0_BEFORE_RETURN_83 4294967296) (- 4294967296))) (<= 0 (+ main_~ret5~0 2147483648)) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 36)) main_~temp~0) (not (<= (mod v_sep_~ret~0_BEFORE_RETURN_83 4294967296) 2147483647))) (and (not (< main_~i~2 9)) (<= main_~ret5~0 2147483647) (<= (mod v_sep_~ret~0_BEFORE_RETURN_84 4294967296) 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (mod v_sep_~ret~0_BEFORE_RETURN_84 4294967296) main_~ret5~0) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 36)) main_~temp~0))))) (and (not (= main_~ret~1 main_~ret5~0)) (exists ((v_prenex_611 Int) (v_prenex_612 Int) (v_sep_~ret~0_BEFORE_RETURN_84 Int) (v_sep_~ret~0_BEFORE_RETURN_83 Int)) (or (and (<= (mod v_prenex_611 4294967296) 2147483647) (not (< main_~i~2 9)) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 36)) main_~temp~0) (= main_~ret5~0 (mod v_prenex_611 4294967296))) (and (= (+ (mod v_prenex_612 4294967296) (- 4294967296)) main_~ret5~0) (not (< main_~i~2 9)) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 36)) main_~temp~0) (not (<= (mod v_prenex_612 4294967296) 2147483647))) (and (not (< main_~i~2 9)) (<= main_~ret5~0 2147483647) (= main_~ret5~0 (+ (mod v_sep_~ret~0_BEFORE_RETURN_83 4294967296) (- 4294967296))) (<= 0 (+ main_~ret5~0 2147483648)) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 36)) main_~temp~0) (not (<= (mod v_sep_~ret~0_BEFORE_RETURN_83 4294967296) 2147483647))) (and (not (< main_~i~2 9)) (<= main_~ret5~0 2147483647) (<= (mod v_sep_~ret~0_BEFORE_RETURN_84 4294967296) 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (mod v_sep_~ret~0_BEFORE_RETURN_84 4294967296) main_~ret5~0) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 36)) main_~temp~0)))))) [2019-10-07 15:27:54,064 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initENTRY satisfy 666#(and (= |old(#NULL.base)| |#NULL.base|) (= |#valid| |old(#valid)|) (= |#NULL.offset| |old(#NULL.offset)|)) [2019-10-07 15:27:54,064 INFO L193 IcfgInterpreter]: Reachable states at location L26-3 satisfy 68#true [2019-10-07 15:27:54,065 INFO L193 IcfgInterpreter]: Reachable states at location L7-3 satisfy 657#(<= 0 sep_~i~0) [2019-10-07 15:27:54,065 INFO L193 IcfgInterpreter]: Reachable states at location sepENTRY satisfy 610#true [2019-10-07 15:27:54,065 INFO L193 IcfgInterpreter]: Reachable states at location L-1 satisfy 23#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= 0 (select |#valid| 0)) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-07 15:27:54,065 INFO L193 IcfgInterpreter]: Reachable states at location mainENTRY satisfy 33#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= |#valid| |old(#valid)|) (<= 0 |#NULL.base|) (= |#memory_int| |old(#memory_int)|) (= |#NULL.offset| 0) (= |old(#length)| |#length|) (= 0 (select |old(#valid)| 0)) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-07 15:27:54,066 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initEXIT satisfy 671#(and (= |#valid| (store |old(#valid)| 0 0)) (= 0 |#NULL.base|) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-07 15:27:54,066 INFO L193 IcfgInterpreter]: Reachable states at location L39-1 satisfy 488#true [2019-10-07 15:27:54,066 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.startENTRY satisfy 6#true [2019-10-07 15:27:54,067 INFO L193 IcfgInterpreter]: Reachable states at location L39 satisfy 531#(and (not (< main_~i~2 9)) (<= 9 main_~i~2) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 36)) main_~temp~0)) [2019-10-07 15:27:54,067 INFO L193 IcfgInterpreter]: Reachable states at location sepEXIT satisfy 662#(and (not (< sep_~i~0 10)) (= |sep_#res| (ite (<= (mod sep_~ret~0 4294967296) 2147483647) (mod sep_~ret~0 4294967296) (+ (mod sep_~ret~0 4294967296) (- 4294967296)))) (<= 10 sep_~i~0) (<= 0 sep_~i~0)) [2019-10-07 15:27:54,067 INFO L193 IcfgInterpreter]: Reachable states at location L30 satisfy 129#(or (exists ((v_prenex_584 Int) (v_sep_~ret~0_BEFORE_RETURN_80 Int)) (or (and (= (mod v_prenex_584 4294967296) |main_#t~ret6|) (not (< main_~i~1 10)) (<= (mod v_prenex_584 4294967296) 2147483647)) (and (= (+ (mod v_sep_~ret~0_BEFORE_RETURN_80 4294967296) (- 4294967296)) |main_#t~ret6|) (not (<= (mod v_sep_~ret~0_BEFORE_RETURN_80 4294967296) 2147483647)) (not (< main_~i~1 10))))) (exists ((v_prenex_583 Int) (v_sep_~ret~0_BEFORE_RETURN_79 Int)) (or (and (= (+ (mod v_prenex_583 4294967296) (- 4294967296)) |main_#t~ret6|) (not (<= (mod v_prenex_583 4294967296) 2147483647)) (not (< main_~i~1 10))) (and (= (mod v_sep_~ret~0_BEFORE_RETURN_79 4294967296) |main_#t~ret6|) (<= (mod v_sep_~ret~0_BEFORE_RETURN_79 4294967296) 2147483647) (not (< main_~i~1 10)))))) [2019-10-07 15:27:54,067 INFO L193 IcfgInterpreter]: Reachable states at location L41 satisfy 433#true [2019-10-07 15:27:54,068 INFO L193 IcfgInterpreter]: Reachable states at location L42 satisfy 322#true [2019-10-07 15:27:54,068 INFO L193 IcfgInterpreter]: Reachable states at location L33-1 satisfy 596#true [2019-10-07 15:27:54,068 INFO L193 IcfgInterpreter]: Reachable states at location L35-3 satisfy 569#true [2019-10-07 15:27:54,557 INFO L211 tionRefinementEngine]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2019-10-07 15:27:54,557 INFO L224 tionRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9, 9, 11] total 23 [2019-10-07 15:27:54,558 INFO L442 AbstractCegarLoop]: Interpolant automaton has 24 states [2019-10-07 15:27:54,559 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2019-10-07 15:27:54,559 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=107, Invalid=445, Unknown=0, NotChecked=0, Total=552 [2019-10-07 15:27:54,559 INFO L87 Difference]: Start difference. First operand 36 states and 40 transitions. Second operand 24 states. [2019-10-07 15:27:59,417 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-07 15:27:59,418 INFO L93 Difference]: Finished difference Result 64 states and 75 transitions. [2019-10-07 15:27:59,418 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2019-10-07 15:27:59,418 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 61 [2019-10-07 15:27:59,418 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-07 15:27:59,419 INFO L225 Difference]: With dead ends: 64 [2019-10-07 15:27:59,419 INFO L226 Difference]: Without dead ends: 40 [2019-10-07 15:27:59,421 INFO L606 BasicCegarLoop]: 0 DeclaredPredicates, 212 GetRequests, 168 SyntacticMatches, 4 SemanticMatches, 40 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 438 ImplicationChecksByTransitivity, 3.1s TimeCoverageRelationStatistics Valid=292, Invalid=1429, Unknown=1, NotChecked=0, Total=1722 [2019-10-07 15:27:59,422 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 40 states. [2019-10-07 15:27:59,428 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 40 to 40. [2019-10-07 15:27:59,428 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 40 states. [2019-10-07 15:27:59,429 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 40 states to 40 states and 44 transitions. [2019-10-07 15:27:59,429 INFO L78 Accepts]: Start accepts. Automaton has 40 states and 44 transitions. Word has length 61 [2019-10-07 15:27:59,430 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-07 15:27:59,430 INFO L462 AbstractCegarLoop]: Abstraction has 40 states and 44 transitions. [2019-10-07 15:27:59,430 INFO L463 AbstractCegarLoop]: Interpolant automaton has 24 states. [2019-10-07 15:27:59,430 INFO L276 IsEmpty]: Start isEmpty. Operand 40 states and 44 transitions. [2019-10-07 15:27:59,431 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-10-07 15:27:59,431 INFO L377 BasicCegarLoop]: Found error trace [2019-10-07 15:27:59,431 INFO L385 BasicCegarLoop]: trace histogram [30, 10, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-07 15:27:59,635 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 6 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-07 15:27:59,636 INFO L410 AbstractCegarLoop]: === Iteration 8 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-07 15:27:59,636 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-07 15:27:59,636 INFO L82 PathProgramCache]: Analyzing trace with hash -303721663, now seen corresponding path program 5 times [2019-10-07 15:27:59,636 INFO L150 tionRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-10-07 15:27:59,636 INFO L231 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2019-10-07 15:27:59,637 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-07 15:27:59,637 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-07 15:27:59,637 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-07 15:27:59,817 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-07 15:27:59,868 INFO L134 CoverageAnalysis]: Checked inductivity of 590 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 589 trivial. 0 not checked. [2019-10-07 15:27:59,869 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2019-10-07 15:27:59,869 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2019-10-07 15:27:59,869 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-07 15:28:00,032 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 3 check-sat command(s) [2019-10-07 15:28:00,032 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-10-07 15:28:00,033 INFO L256 TraceCheckSpWp]: Trace formula consists of 143 conjuncts, 3 conjunts are in the unsatisfiable core [2019-10-07 15:28:00,036 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2019-10-07 15:28:00,052 INFO L134 CoverageAnalysis]: Checked inductivity of 590 backedges. 246 proven. 1 refuted. 0 times theorem prover too weak. 343 trivial. 0 not checked. [2019-10-07 15:28:00,052 INFO L322 TraceCheckSpWp]: Computing backward predicates... [2019-10-07 15:28:00,075 INFO L134 CoverageAnalysis]: Checked inductivity of 590 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 589 trivial. 0 not checked. [2019-10-07 15:28:00,075 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSifa [2019-10-07 15:28:00,077 INFO L162 IcfgInterpreter]: Started Sifa with 19 locations of interest [2019-10-07 15:28:00,077 INFO L169 IcfgInterpreter]: Building call graph [2019-10-07 15:28:00,078 INFO L174 IcfgInterpreter]: Initial procedures are [ULTIMATE.start] [2019-10-07 15:28:00,078 INFO L179 IcfgInterpreter]: Starting interpretation [2019-10-07 15:28:00,078 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.start with input of size 1 for LOIs [2019-10-07 15:28:00,095 INFO L199 IcfgInterpreter]: Interpreting procedure main with input of size 21 for LOIs [2019-10-07 15:28:01,433 INFO L199 IcfgInterpreter]: Interpreting procedure sep with input of size 1 for LOIs [2019-10-07 15:28:01,485 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.init with input of size 10 for LOIs [2019-10-07 15:28:01,488 INFO L183 IcfgInterpreter]: Interpretation finished [2019-10-07 15:28:01,489 INFO L191 IcfgInterpreter]: Final predicates for locations of interest are: [2019-10-07 15:28:01,489 INFO L193 IcfgInterpreter]: Reachable states at location L26-4 satisfy 73#(and (<= 10 main_~i~1) (not (< main_~i~1 10))) [2019-10-07 15:28:01,489 INFO L193 IcfgInterpreter]: Reachable states at location L33 satisfy 601#(exists ((v_prenex_777 Int) (v_sep_~ret~0_BEFORE_RETURN_105 Int) (v_sep_~ret~0_BEFORE_RETURN_106 Int) (v_prenex_778 Int)) (or (and (not (<= (mod v_prenex_777 4294967296) 2147483647)) (<= main_~ret~1 2147483647) (= main_~ret~1 (+ (mod v_prenex_777 4294967296) (- 4294967296))) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (not (< main_~i~1 10)) (<= 0 (+ main_~ret~1 2147483648))) (and (<= main_~ret~1 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (= main_~ret~1 (mod v_prenex_778 4294967296)) (<= (mod v_prenex_778 4294967296) 2147483647) (not (< main_~i~1 10)) (<= 0 (+ main_~ret~1 2147483648))) (and (<= main_~ret~1 2147483647) (<= (mod v_sep_~ret~0_BEFORE_RETURN_105 4294967296) 2147483647) (= main_~ret~1 (mod v_sep_~ret~0_BEFORE_RETURN_105 4294967296)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (not (< main_~i~1 10)) (<= 0 (+ main_~ret~1 2147483648))) (and (not (<= (mod v_sep_~ret~0_BEFORE_RETURN_106 4294967296) 2147483647)) (<= main_~ret~1 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (= main_~ret~1 (+ (mod v_sep_~ret~0_BEFORE_RETURN_106 4294967296) (- 4294967296))) (not (< main_~i~1 10)) (<= 0 (+ main_~ret~1 2147483648))))) [2019-10-07 15:28:01,489 INFO L193 IcfgInterpreter]: Reachable states at location mainErr0ASSERT_VIOLATIONERROR_FUNCTION satisfy 243#(or (and (exists ((v_sep_~ret~0_BEFORE_RETURN_110 Int) (v_prenex_806 Int) (v_prenex_805 Int) (v_sep_~ret~0_BEFORE_RETURN_109 Int)) (or (and (= main_~ret5~0 (mod v_prenex_806 4294967296)) (not (< main_~i~2 9)) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (<= (mod v_prenex_806 4294967296) 2147483647) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 36)) main_~temp~0)) (and (= main_~ret5~0 (mod v_prenex_805 4294967296)) (not (< main_~i~2 9)) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 36)) main_~temp~0) (<= (mod v_prenex_805 4294967296) 2147483647)) (and (= (+ (mod v_sep_~ret~0_BEFORE_RETURN_109 4294967296) (- 4294967296)) main_~ret5~0) (not (< main_~i~2 9)) (not (<= (mod v_sep_~ret~0_BEFORE_RETURN_109 4294967296) 2147483647)) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 36)) main_~temp~0)) (and (not (<= (mod v_sep_~ret~0_BEFORE_RETURN_110 4294967296) 2147483647)) (= main_~ret5~0 (+ (mod v_sep_~ret~0_BEFORE_RETURN_110 4294967296) (- 4294967296))) (not (< main_~i~2 9)) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 36)) main_~temp~0)))) (not (= main_~ret~1 main_~ret5~0))) (and (not (= main_~ret~1 main_~ret2~0)) (exists ((v_sep_~ret~0_BEFORE_RETURN_110 Int) (v_prenex_806 Int) (v_prenex_805 Int) (v_sep_~ret~0_BEFORE_RETURN_109 Int)) (or (and (= main_~ret5~0 (mod v_prenex_806 4294967296)) (not (< main_~i~2 9)) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (<= (mod v_prenex_806 4294967296) 2147483647) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 36)) main_~temp~0)) (and (= main_~ret5~0 (mod v_prenex_805 4294967296)) (not (< main_~i~2 9)) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 36)) main_~temp~0) (<= (mod v_prenex_805 4294967296) 2147483647)) (and (= (+ (mod v_sep_~ret~0_BEFORE_RETURN_109 4294967296) (- 4294967296)) main_~ret5~0) (not (< main_~i~2 9)) (not (<= (mod v_sep_~ret~0_BEFORE_RETURN_109 4294967296) 2147483647)) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 36)) main_~temp~0)) (and (not (<= (mod v_sep_~ret~0_BEFORE_RETURN_110 4294967296) 2147483647)) (= main_~ret5~0 (+ (mod v_sep_~ret~0_BEFORE_RETURN_110 4294967296) (- 4294967296))) (not (< main_~i~2 9)) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 36)) main_~temp~0)))))) [2019-10-07 15:28:01,489 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initENTRY satisfy 666#(and (= |old(#NULL.base)| |#NULL.base|) (= |#valid| |old(#valid)|) (= |#NULL.offset| |old(#NULL.offset)|)) [2019-10-07 15:28:01,490 INFO L193 IcfgInterpreter]: Reachable states at location L26-3 satisfy 68#true [2019-10-07 15:28:01,490 INFO L193 IcfgInterpreter]: Reachable states at location L7-3 satisfy 657#(<= 0 sep_~i~0) [2019-10-07 15:28:01,490 INFO L193 IcfgInterpreter]: Reachable states at location sepENTRY satisfy 610#true [2019-10-07 15:28:01,490 INFO L193 IcfgInterpreter]: Reachable states at location L-1 satisfy 23#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= 0 (select |#valid| 0)) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-07 15:28:01,490 INFO L193 IcfgInterpreter]: Reachable states at location mainENTRY satisfy 33#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= |#valid| |old(#valid)|) (<= 0 |#NULL.base|) (= |#memory_int| |old(#memory_int)|) (= |#NULL.offset| 0) (= |old(#length)| |#length|) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (= 0 (select |old(#valid)| 0))) [2019-10-07 15:28:01,490 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initEXIT satisfy 671#(and (= |#valid| (store |old(#valid)| 0 0)) (= 0 |#NULL.base|) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-07 15:28:01,490 INFO L193 IcfgInterpreter]: Reachable states at location L39-1 satisfy 488#true [2019-10-07 15:28:01,490 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.startENTRY satisfy 6#true [2019-10-07 15:28:01,491 INFO L193 IcfgInterpreter]: Reachable states at location L39 satisfy 531#(and (not (< main_~i~2 9)) (<= 9 main_~i~2) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 36)) main_~temp~0)) [2019-10-07 15:28:01,491 INFO L193 IcfgInterpreter]: Reachable states at location sepEXIT satisfy 662#(and (not (< sep_~i~0 10)) (= |sep_#res| (ite (<= (mod sep_~ret~0 4294967296) 2147483647) (mod sep_~ret~0 4294967296) (+ (mod sep_~ret~0 4294967296) (- 4294967296)))) (<= 10 sep_~i~0) (<= 0 sep_~i~0)) [2019-10-07 15:28:01,491 INFO L193 IcfgInterpreter]: Reachable states at location L30 satisfy 129#(or (exists ((v_prenex_777 Int) (v_sep_~ret~0_BEFORE_RETURN_105 Int)) (or (and (<= (mod v_sep_~ret~0_BEFORE_RETURN_105 4294967296) 2147483647) (= |main_#t~ret6| (mod v_sep_~ret~0_BEFORE_RETURN_105 4294967296)) (not (< main_~i~1 10))) (and (not (<= (mod v_prenex_777 4294967296) 2147483647)) (= (+ (mod v_prenex_777 4294967296) (- 4294967296)) |main_#t~ret6|) (not (< main_~i~1 10))))) (exists ((v_sep_~ret~0_BEFORE_RETURN_106 Int) (v_prenex_778 Int)) (or (and (not (<= (mod v_sep_~ret~0_BEFORE_RETURN_106 4294967296) 2147483647)) (not (< main_~i~1 10)) (= |main_#t~ret6| (+ (mod v_sep_~ret~0_BEFORE_RETURN_106 4294967296) (- 4294967296)))) (and (= |main_#t~ret6| (mod v_prenex_778 4294967296)) (not (< main_~i~1 10)) (<= (mod v_prenex_778 4294967296) 2147483647))))) [2019-10-07 15:28:01,491 INFO L193 IcfgInterpreter]: Reachable states at location L41 satisfy 433#true [2019-10-07 15:28:01,491 INFO L193 IcfgInterpreter]: Reachable states at location L42 satisfy 322#true [2019-10-07 15:28:01,491 INFO L193 IcfgInterpreter]: Reachable states at location L33-1 satisfy 596#true [2019-10-07 15:28:01,491 INFO L193 IcfgInterpreter]: Reachable states at location L35-3 satisfy 569#true [2019-10-07 15:28:01,781 INFO L211 tionRefinementEngine]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2019-10-07 15:28:01,781 INFO L224 tionRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4, 4, 11] total 17 [2019-10-07 15:28:01,782 INFO L442 AbstractCegarLoop]: Interpolant automaton has 18 states [2019-10-07 15:28:01,782 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2019-10-07 15:28:01,784 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=50, Invalid=256, Unknown=0, NotChecked=0, Total=306 [2019-10-07 15:28:01,784 INFO L87 Difference]: Start difference. First operand 40 states and 44 transitions. Second operand 18 states. [2019-10-07 15:28:02,421 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-07 15:28:02,421 INFO L93 Difference]: Finished difference Result 61 states and 68 transitions. [2019-10-07 15:28:02,421 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2019-10-07 15:28:02,421 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 65 [2019-10-07 15:28:02,422 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-07 15:28:02,422 INFO L225 Difference]: With dead ends: 61 [2019-10-07 15:28:02,423 INFO L226 Difference]: Without dead ends: 43 [2019-10-07 15:28:02,423 INFO L606 BasicCegarLoop]: 0 DeclaredPredicates, 211 GetRequests, 183 SyntacticMatches, 0 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 186 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=141, Invalid=729, Unknown=0, NotChecked=0, Total=870 [2019-10-07 15:28:02,424 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 43 states. [2019-10-07 15:28:02,430 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 43 to 43. [2019-10-07 15:28:02,430 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 43 states. [2019-10-07 15:28:02,431 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 43 states to 43 states and 47 transitions. [2019-10-07 15:28:02,431 INFO L78 Accepts]: Start accepts. Automaton has 43 states and 47 transitions. Word has length 65 [2019-10-07 15:28:02,432 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-07 15:28:02,432 INFO L462 AbstractCegarLoop]: Abstraction has 43 states and 47 transitions. [2019-10-07 15:28:02,432 INFO L463 AbstractCegarLoop]: Interpolant automaton has 18 states. [2019-10-07 15:28:02,432 INFO L276 IsEmpty]: Start isEmpty. Operand 43 states and 47 transitions. [2019-10-07 15:28:02,433 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 69 [2019-10-07 15:28:02,433 INFO L377 BasicCegarLoop]: Found error trace [2019-10-07 15:28:02,433 INFO L385 BasicCegarLoop]: trace histogram [30, 10, 4, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-07 15:28:02,638 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 7 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-07 15:28:02,638 INFO L410 AbstractCegarLoop]: === Iteration 9 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-07 15:28:02,639 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-07 15:28:02,639 INFO L82 PathProgramCache]: Analyzing trace with hash -1439118160, now seen corresponding path program 6 times [2019-10-07 15:28:02,639 INFO L150 tionRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-10-07 15:28:02,640 INFO L231 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2019-10-07 15:28:02,640 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-07 15:28:02,640 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-07 15:28:02,641 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-07 15:28:02,774 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-07 15:28:02,854 INFO L134 CoverageAnalysis]: Checked inductivity of 599 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 589 trivial. 0 not checked. [2019-10-07 15:28:02,854 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2019-10-07 15:28:02,855 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2019-10-07 15:28:02,855 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-07 15:28:03,098 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2019-10-07 15:28:03,098 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-10-07 15:28:03,100 INFO L256 TraceCheckSpWp]: Trace formula consists of 313 conjuncts, 6 conjunts are in the unsatisfiable core [2019-10-07 15:28:03,102 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2019-10-07 15:28:03,113 INFO L134 CoverageAnalysis]: Checked inductivity of 599 backedges. 246 proven. 10 refuted. 0 times theorem prover too weak. 343 trivial. 0 not checked. [2019-10-07 15:28:03,113 INFO L322 TraceCheckSpWp]: Computing backward predicates... [2019-10-07 15:28:03,177 INFO L134 CoverageAnalysis]: Checked inductivity of 599 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 589 trivial. 0 not checked. [2019-10-07 15:28:03,177 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSifa [2019-10-07 15:28:03,179 INFO L162 IcfgInterpreter]: Started Sifa with 19 locations of interest [2019-10-07 15:28:03,179 INFO L169 IcfgInterpreter]: Building call graph [2019-10-07 15:28:03,179 INFO L174 IcfgInterpreter]: Initial procedures are [ULTIMATE.start] [2019-10-07 15:28:03,180 INFO L179 IcfgInterpreter]: Starting interpretation [2019-10-07 15:28:03,180 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.start with input of size 1 for LOIs [2019-10-07 15:28:03,195 INFO L199 IcfgInterpreter]: Interpreting procedure main with input of size 21 for LOIs [2019-10-07 15:28:04,570 INFO L199 IcfgInterpreter]: Interpreting procedure sep with input of size 1 for LOIs [2019-10-07 15:28:04,618 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.init with input of size 10 for LOIs [2019-10-07 15:28:04,621 INFO L183 IcfgInterpreter]: Interpretation finished [2019-10-07 15:28:04,621 INFO L191 IcfgInterpreter]: Final predicates for locations of interest are: [2019-10-07 15:28:04,622 INFO L193 IcfgInterpreter]: Reachable states at location L26-4 satisfy 73#(and (<= 10 main_~i~1) (not (< main_~i~1 10))) [2019-10-07 15:28:04,622 INFO L193 IcfgInterpreter]: Reachable states at location L33 satisfy 601#(exists ((v_sep_~ret~0_BEFORE_RETURN_131 Int) (v_sep_~ret~0_BEFORE_RETURN_132 Int) (v_prenex_972 Int) (v_prenex_971 Int)) (or (and (= main_~ret~1 (mod v_sep_~ret~0_BEFORE_RETURN_131 4294967296)) (<= main_~ret~1 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (<= (mod v_sep_~ret~0_BEFORE_RETURN_131 4294967296) 2147483647) (not (< main_~i~1 10)) (<= 0 (+ main_~ret~1 2147483648))) (and (not (<= (mod v_prenex_971 4294967296) 2147483647)) (<= main_~ret~1 2147483647) (= main_~ret~1 (+ (mod v_prenex_971 4294967296) (- 4294967296))) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (not (< main_~i~1 10)) (<= 0 (+ main_~ret~1 2147483648))) (and (not (<= (mod v_sep_~ret~0_BEFORE_RETURN_132 4294967296) 2147483647)) (<= main_~ret~1 2147483647) (= (+ (mod v_sep_~ret~0_BEFORE_RETURN_132 4294967296) (- 4294967296)) main_~ret~1) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (not (< main_~i~1 10)) (<= 0 (+ main_~ret~1 2147483648))) (and (= main_~ret~1 (mod v_prenex_972 4294967296)) (<= main_~ret~1 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (<= (mod v_prenex_972 4294967296) 2147483647) (not (< main_~i~1 10)) (<= 0 (+ main_~ret~1 2147483648))))) [2019-10-07 15:28:04,622 INFO L193 IcfgInterpreter]: Reachable states at location mainErr0ASSERT_VIOLATIONERROR_FUNCTION satisfy 243#(or (and (exists ((v_sep_~ret~0_BEFORE_RETURN_135 Int) (v_sep_~ret~0_BEFORE_RETURN_136 Int) (v_prenex_1000 Int) (v_prenex_999 Int)) (or (and (not (<= (mod v_prenex_999 4294967296) 2147483647)) (not (< main_~i~2 9)) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 36)) main_~temp~0) (= (+ (mod v_prenex_999 4294967296) (- 4294967296)) main_~ret5~0)) (and (= (+ (mod v_sep_~ret~0_BEFORE_RETURN_136 4294967296) (- 4294967296)) main_~ret5~0) (not (<= (mod v_sep_~ret~0_BEFORE_RETURN_136 4294967296) 2147483647)) (not (< main_~i~2 9)) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 36)) main_~temp~0)) (and (<= (mod v_sep_~ret~0_BEFORE_RETURN_135 4294967296) 2147483647) (not (< main_~i~2 9)) (= main_~ret5~0 (mod v_sep_~ret~0_BEFORE_RETURN_135 4294967296)) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 36)) main_~temp~0)) (and (not (< main_~i~2 9)) (<= (mod v_prenex_1000 4294967296) 2147483647) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (mod v_prenex_1000 4294967296) main_~ret5~0) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 36)) main_~temp~0)))) (not (= main_~ret~1 main_~ret5~0))) (and (not (= main_~ret~1 main_~ret2~0)) (exists ((v_sep_~ret~0_BEFORE_RETURN_135 Int) (v_sep_~ret~0_BEFORE_RETURN_136 Int) (v_prenex_1000 Int) (v_prenex_999 Int)) (or (and (not (<= (mod v_prenex_999 4294967296) 2147483647)) (not (< main_~i~2 9)) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 36)) main_~temp~0) (= (+ (mod v_prenex_999 4294967296) (- 4294967296)) main_~ret5~0)) (and (= (+ (mod v_sep_~ret~0_BEFORE_RETURN_136 4294967296) (- 4294967296)) main_~ret5~0) (not (<= (mod v_sep_~ret~0_BEFORE_RETURN_136 4294967296) 2147483647)) (not (< main_~i~2 9)) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 36)) main_~temp~0)) (and (<= (mod v_sep_~ret~0_BEFORE_RETURN_135 4294967296) 2147483647) (not (< main_~i~2 9)) (= main_~ret5~0 (mod v_sep_~ret~0_BEFORE_RETURN_135 4294967296)) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 36)) main_~temp~0)) (and (not (< main_~i~2 9)) (<= (mod v_prenex_1000 4294967296) 2147483647) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (mod v_prenex_1000 4294967296) main_~ret5~0) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 36)) main_~temp~0)))))) [2019-10-07 15:28:04,622 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initENTRY satisfy 666#(and (= |old(#NULL.base)| |#NULL.base|) (= |#valid| |old(#valid)|) (= |#NULL.offset| |old(#NULL.offset)|)) [2019-10-07 15:28:04,623 INFO L193 IcfgInterpreter]: Reachable states at location L26-3 satisfy 68#true [2019-10-07 15:28:04,623 INFO L193 IcfgInterpreter]: Reachable states at location L7-3 satisfy 657#(<= 0 sep_~i~0) [2019-10-07 15:28:04,623 INFO L193 IcfgInterpreter]: Reachable states at location sepENTRY satisfy 610#true [2019-10-07 15:28:04,623 INFO L193 IcfgInterpreter]: Reachable states at location L-1 satisfy 23#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= 0 (select |#valid| 0)) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-07 15:28:04,623 INFO L193 IcfgInterpreter]: Reachable states at location mainENTRY satisfy 33#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= |#valid| |old(#valid)|) (<= 0 |#NULL.base|) (= |#memory_int| |old(#memory_int)|) (= |#NULL.offset| 0) (= |old(#length)| |#length|) (= 0 (select |old(#valid)| 0)) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-07 15:28:04,624 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initEXIT satisfy 671#(and (= |#valid| (store |old(#valid)| 0 0)) (= 0 |#NULL.base|) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-07 15:28:04,624 INFO L193 IcfgInterpreter]: Reachable states at location L39-1 satisfy 488#true [2019-10-07 15:28:04,624 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.startENTRY satisfy 6#true [2019-10-07 15:28:04,624 INFO L193 IcfgInterpreter]: Reachable states at location L39 satisfy 531#(and (not (< main_~i~2 9)) (<= 9 main_~i~2) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 36)) main_~temp~0)) [2019-10-07 15:28:04,624 INFO L193 IcfgInterpreter]: Reachable states at location sepEXIT satisfy 662#(and (not (< sep_~i~0 10)) (= |sep_#res| (ite (<= (mod sep_~ret~0 4294967296) 2147483647) (mod sep_~ret~0 4294967296) (+ (mod sep_~ret~0 4294967296) (- 4294967296)))) (<= 10 sep_~i~0) (<= 0 sep_~i~0)) [2019-10-07 15:28:04,625 INFO L193 IcfgInterpreter]: Reachable states at location L30 satisfy 129#(or (exists ((v_sep_~ret~0_BEFORE_RETURN_131 Int) (v_prenex_971 Int)) (or (and (= |main_#t~ret6| (mod v_sep_~ret~0_BEFORE_RETURN_131 4294967296)) (<= (mod v_sep_~ret~0_BEFORE_RETURN_131 4294967296) 2147483647) (not (< main_~i~1 10))) (and (not (<= (mod v_prenex_971 4294967296) 2147483647)) (= (+ (mod v_prenex_971 4294967296) (- 4294967296)) |main_#t~ret6|) (not (< main_~i~1 10))))) (exists ((v_sep_~ret~0_BEFORE_RETURN_132 Int) (v_prenex_972 Int)) (or (and (not (<= (mod v_sep_~ret~0_BEFORE_RETURN_132 4294967296) 2147483647)) (not (< main_~i~1 10)) (= (+ (mod v_sep_~ret~0_BEFORE_RETURN_132 4294967296) (- 4294967296)) |main_#t~ret6|)) (and (= (mod v_prenex_972 4294967296) |main_#t~ret6|) (<= (mod v_prenex_972 4294967296) 2147483647) (not (< main_~i~1 10)))))) [2019-10-07 15:28:04,625 INFO L193 IcfgInterpreter]: Reachable states at location L41 satisfy 433#true [2019-10-07 15:28:04,625 INFO L193 IcfgInterpreter]: Reachable states at location L42 satisfy 322#true [2019-10-07 15:28:04,625 INFO L193 IcfgInterpreter]: Reachable states at location L33-1 satisfy 596#true [2019-10-07 15:28:04,625 INFO L193 IcfgInterpreter]: Reachable states at location L35-3 satisfy 569#true [2019-10-07 15:28:04,944 INFO L211 tionRefinementEngine]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2019-10-07 15:28:04,944 INFO L224 tionRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 7, 11] total 22 [2019-10-07 15:28:04,945 INFO L442 AbstractCegarLoop]: Interpolant automaton has 23 states [2019-10-07 15:28:04,945 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2019-10-07 15:28:04,946 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=95, Invalid=411, Unknown=0, NotChecked=0, Total=506 [2019-10-07 15:28:04,946 INFO L87 Difference]: Start difference. First operand 43 states and 47 transitions. Second operand 23 states. [2019-10-07 15:28:05,814 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-07 15:28:05,814 INFO L93 Difference]: Finished difference Result 66 states and 75 transitions. [2019-10-07 15:28:05,814 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2019-10-07 15:28:05,815 INFO L78 Accepts]: Start accepts. Automaton has 23 states. Word has length 68 [2019-10-07 15:28:05,815 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-07 15:28:05,816 INFO L225 Difference]: With dead ends: 66 [2019-10-07 15:28:05,816 INFO L226 Difference]: Without dead ends: 48 [2019-10-07 15:28:05,817 INFO L606 BasicCegarLoop]: 0 DeclaredPredicates, 228 GetRequests, 189 SyntacticMatches, 1 SemanticMatches, 38 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 378 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=276, Invalid=1284, Unknown=0, NotChecked=0, Total=1560 [2019-10-07 15:28:05,818 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 48 states. [2019-10-07 15:28:05,824 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 48 to 48. [2019-10-07 15:28:05,824 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 48 states. [2019-10-07 15:28:05,825 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 48 states to 48 states and 52 transitions. [2019-10-07 15:28:05,825 INFO L78 Accepts]: Start accepts. Automaton has 48 states and 52 transitions. Word has length 68 [2019-10-07 15:28:05,826 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-07 15:28:05,826 INFO L462 AbstractCegarLoop]: Abstraction has 48 states and 52 transitions. [2019-10-07 15:28:05,826 INFO L463 AbstractCegarLoop]: Interpolant automaton has 23 states. [2019-10-07 15:28:05,826 INFO L276 IsEmpty]: Start isEmpty. Operand 48 states and 52 transitions. [2019-10-07 15:28:05,827 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 74 [2019-10-07 15:28:05,827 INFO L377 BasicCegarLoop]: Found error trace [2019-10-07 15:28:05,827 INFO L385 BasicCegarLoop]: trace histogram [30, 10, 9, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-07 15:28:06,036 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 8 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-07 15:28:06,037 INFO L410 AbstractCegarLoop]: === Iteration 10 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-07 15:28:06,037 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-07 15:28:06,038 INFO L82 PathProgramCache]: Analyzing trace with hash 1172269761, now seen corresponding path program 7 times [2019-10-07 15:28:06,038 INFO L150 tionRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-10-07 15:28:06,038 INFO L231 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2019-10-07 15:28:06,038 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-07 15:28:06,039 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-07 15:28:06,039 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-07 15:28:23,333 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat