java -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata ./data -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/default/automizer/svcomp-Reach-32bit-Automizer_Default.epf --traceabstraction.trace.refinement.strategy SIFA_TAIPAN --sifa.abstract.domain CompoundDomain --rcfgbuilder.size.of.a.code.block LoopFreeBlock --sifa.call.summarizer TopInputCallSummarizer --sifa.fluid SizeLimitFluid --sifa.simplification.technique SIMPLIFY_QUICK -i ../../../trunk/examples/svcomp/loop-crafted/simple_array_index_value_1-1.i -------------------------------------------------------------------------------- This is Ultimate 0.1.24-36ac518-m [2019-10-07 13:32:10,300 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-10-07 13:32:10,303 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-10-07 13:32:10,319 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-10-07 13:32:10,319 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-10-07 13:32:10,321 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-10-07 13:32:10,324 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-10-07 13:32:10,333 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-10-07 13:32:10,335 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-10-07 13:32:10,336 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-10-07 13:32:10,338 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-10-07 13:32:10,340 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-10-07 13:32:10,340 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-10-07 13:32:10,343 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-10-07 13:32:10,346 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-10-07 13:32:10,348 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-10-07 13:32:10,349 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-10-07 13:32:10,352 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-10-07 13:32:10,353 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-10-07 13:32:10,358 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-10-07 13:32:10,362 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-10-07 13:32:10,365 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-10-07 13:32:10,368 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-10-07 13:32:10,369 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-10-07 13:32:10,372 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... 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[2019-10-07 13:32:10,382 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-10-07 13:32:10,383 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-10-07 13:32:10,384 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-10-07 13:32:10,385 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/default/automizer/svcomp-Reach-32bit-Automizer_Default.epf [2019-10-07 13:32:10,417 INFO L113 SettingsManager]: Loading preferences was successful [2019-10-07 13:32:10,419 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-10-07 13:32:10,421 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-10-07 13:32:10,421 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-10-07 13:32:10,421 INFO L138 SettingsManager]: * Use SBE=true [2019-10-07 13:32:10,421 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-10-07 13:32:10,421 INFO L138 SettingsManager]: * sizeof long=4 [2019-10-07 13:32:10,422 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-10-07 13:32:10,422 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-10-07 13:32:10,422 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-10-07 13:32:10,427 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-10-07 13:32:10,428 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-10-07 13:32:10,428 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-10-07 13:32:10,428 INFO L138 SettingsManager]: * sizeof long double=12 [2019-10-07 13:32:10,428 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-10-07 13:32:10,428 INFO L138 SettingsManager]: * Use constant arrays=true [2019-10-07 13:32:10,428 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-10-07 13:32:10,429 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-10-07 13:32:10,429 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-10-07 13:32:10,429 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-10-07 13:32:10,429 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-10-07 13:32:10,429 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-10-07 13:32:10,430 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-10-07 13:32:10,430 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-10-07 13:32:10,432 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-10-07 13:32:10,432 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-10-07 13:32:10,433 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-10-07 13:32:10,433 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-10-07 13:32:10,433 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: Trace refinement strategy -> SIFA_TAIPAN Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.sifa: Abstract Domain -> CompoundDomain Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder: Size of a code block -> LoopFreeBlock Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.sifa: Call Summarizer -> TopInputCallSummarizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.sifa: Fluid -> SizeLimitFluid Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.sifa: Simplification Technique -> SIMPLIFY_QUICK [2019-10-07 13:32:10,729 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-10-07 13:32:10,743 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-10-07 13:32:10,747 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-10-07 13:32:10,748 INFO L271 PluginConnector]: Initializing CDTParser... [2019-10-07 13:32:10,749 INFO L275 PluginConnector]: CDTParser initialized [2019-10-07 13:32:10,749 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/loop-crafted/simple_array_index_value_1-1.i [2019-10-07 13:32:10,814 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/f009f7f38/c395c21f31e047dfaeae68adf8be7617/FLAGefd471234 [2019-10-07 13:32:11,274 INFO L306 CDTParser]: Found 1 translation units. [2019-10-07 13:32:11,275 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/loop-crafted/simple_array_index_value_1-1.i [2019-10-07 13:32:11,282 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/f009f7f38/c395c21f31e047dfaeae68adf8be7617/FLAGefd471234 [2019-10-07 13:32:11,665 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/f009f7f38/c395c21f31e047dfaeae68adf8be7617 [2019-10-07 13:32:11,676 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-10-07 13:32:11,678 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2019-10-07 13:32:11,679 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-10-07 13:32:11,680 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-10-07 13:32:11,683 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-10-07 13:32:11,684 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.10 01:32:11" (1/1) ... [2019-10-07 13:32:11,687 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@35b66671 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.10 01:32:11, skipping insertion in model container [2019-10-07 13:32:11,688 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.10 01:32:11" (1/1) ... [2019-10-07 13:32:11,696 INFO L142 MainTranslator]: Starting translation in SV-COMP mode [2019-10-07 13:32:11,721 INFO L173 MainTranslator]: Built tables and reachable declarations [2019-10-07 13:32:11,960 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-10-07 13:32:11,963 INFO L188 MainTranslator]: Completed pre-run [2019-10-07 13:32:11,982 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-10-07 13:32:12,004 INFO L192 MainTranslator]: Completed translation [2019-10-07 13:32:12,004 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.10 01:32:12 WrapperNode [2019-10-07 13:32:12,005 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-10-07 13:32:12,005 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-10-07 13:32:12,005 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-10-07 13:32:12,005 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-10-07 13:32:12,107 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.10 01:32:12" (1/1) ... [2019-10-07 13:32:12,113 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.10 01:32:12" (1/1) ... [2019-10-07 13:32:12,123 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.10 01:32:12" (1/1) ... [2019-10-07 13:32:12,125 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.10 01:32:12" (1/1) ... [2019-10-07 13:32:12,133 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.10 01:32:12" (1/1) ... [2019-10-07 13:32:12,144 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.10 01:32:12" (1/1) ... [2019-10-07 13:32:12,145 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.10 01:32:12" (1/1) ... [2019-10-07 13:32:12,147 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-10-07 13:32:12,148 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-10-07 13:32:12,148 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-10-07 13:32:12,148 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-10-07 13:32:12,149 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.10 01:32:12" (1/1) ... No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-10-07 13:32:12,216 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2019-10-07 13:32:12,216 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-10-07 13:32:12,217 INFO L138 BoogieDeclarations]: Found implementation of procedure __VERIFIER_assert [2019-10-07 13:32:12,217 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2019-10-07 13:32:12,217 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_error [2019-10-07 13:32:12,217 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_assert [2019-10-07 13:32:12,217 INFO L130 BoogieDeclarations]: Found specification of procedure main [2019-10-07 13:32:12,218 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-10-07 13:32:12,218 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-10-07 13:32:12,218 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2019-10-07 13:32:12,218 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-10-07 13:32:12,218 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2019-10-07 13:32:12,218 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-10-07 13:32:14,618 INFO L279 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-10-07 13:32:14,618 INFO L284 CfgBuilder]: Removed 2 assume(true) statements. [2019-10-07 13:32:14,620 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.10 01:32:14 BoogieIcfgContainer [2019-10-07 13:32:14,620 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-10-07 13:32:14,621 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-10-07 13:32:14,622 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-10-07 13:32:14,625 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-10-07 13:32:14,625 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.10 01:32:11" (1/3) ... [2019-10-07 13:32:14,626 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@2767d2f1 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.10 01:32:14, skipping insertion in model container [2019-10-07 13:32:14,626 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.10 01:32:12" (2/3) ... [2019-10-07 13:32:14,626 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@2767d2f1 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.10 01:32:14, skipping insertion in model container [2019-10-07 13:32:14,627 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.10 01:32:14" (3/3) ... [2019-10-07 13:32:14,628 INFO L109 eAbstractionObserver]: Analyzing ICFG simple_array_index_value_1-1.i [2019-10-07 13:32:14,637 INFO L152 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-10-07 13:32:14,644 INFO L164 ceAbstractionStarter]: Appying trace abstraction to program that has 1 error locations. [2019-10-07 13:32:14,656 INFO L249 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2019-10-07 13:32:14,680 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-10-07 13:32:14,680 INFO L374 AbstractCegarLoop]: Hoare is true [2019-10-07 13:32:14,680 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-10-07 13:32:14,680 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-10-07 13:32:14,681 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-10-07 13:32:14,681 INFO L378 AbstractCegarLoop]: Difference is false [2019-10-07 13:32:14,681 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-10-07 13:32:14,681 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-10-07 13:32:14,696 INFO L276 IsEmpty]: Start isEmpty. Operand 22 states. [2019-10-07 13:32:14,702 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 13 [2019-10-07 13:32:14,702 INFO L377 BasicCegarLoop]: Found error trace [2019-10-07 13:32:14,703 INFO L385 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-07 13:32:14,705 INFO L410 AbstractCegarLoop]: === Iteration 1 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-07 13:32:14,709 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-07 13:32:14,710 INFO L82 PathProgramCache]: Analyzing trace with hash 650459106, now seen corresponding path program 1 times [2019-10-07 13:32:14,717 INFO L150 tionRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-10-07 13:32:14,717 INFO L231 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2019-10-07 13:32:14,717 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-07 13:32:14,718 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-07 13:32:14,718 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-07 13:32:14,853 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-07 13:32:14,917 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-10-07 13:32:14,918 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2019-10-07 13:32:14,918 INFO L211 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-10-07 13:32:14,919 INFO L224 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-10-07 13:32:14,923 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-10-07 13:32:14,937 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-10-07 13:32:14,938 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-10-07 13:32:14,940 INFO L87 Difference]: Start difference. First operand 22 states. Second operand 3 states. [2019-10-07 13:32:15,014 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-07 13:32:15,014 INFO L93 Difference]: Finished difference Result 44 states and 58 transitions. [2019-10-07 13:32:15,015 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-10-07 13:32:15,016 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 12 [2019-10-07 13:32:15,017 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-07 13:32:15,027 INFO L225 Difference]: With dead ends: 44 [2019-10-07 13:32:15,027 INFO L226 Difference]: Without dead ends: 25 [2019-10-07 13:32:15,031 INFO L606 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-10-07 13:32:15,051 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25 states. [2019-10-07 13:32:15,074 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25 to 22. [2019-10-07 13:32:15,076 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22 states. [2019-10-07 13:32:15,077 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22 states to 22 states and 25 transitions. [2019-10-07 13:32:15,080 INFO L78 Accepts]: Start accepts. Automaton has 22 states and 25 transitions. Word has length 12 [2019-10-07 13:32:15,080 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-07 13:32:15,080 INFO L462 AbstractCegarLoop]: Abstraction has 22 states and 25 transitions. [2019-10-07 13:32:15,081 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-10-07 13:32:15,081 INFO L276 IsEmpty]: Start isEmpty. Operand 22 states and 25 transitions. [2019-10-07 13:32:15,082 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-10-07 13:32:15,083 INFO L377 BasicCegarLoop]: Found error trace [2019-10-07 13:32:15,083 INFO L385 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-07 13:32:15,083 INFO L410 AbstractCegarLoop]: === Iteration 2 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-07 13:32:15,084 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-07 13:32:15,084 INFO L82 PathProgramCache]: Analyzing trace with hash 1252105718, now seen corresponding path program 1 times [2019-10-07 13:32:15,084 INFO L150 tionRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-10-07 13:32:15,085 INFO L231 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2019-10-07 13:32:15,085 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-07 13:32:15,085 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-07 13:32:15,085 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-07 13:32:15,117 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-07 13:32:15,255 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-10-07 13:32:15,256 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2019-10-07 13:32:15,256 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2019-10-07 13:32:15,260 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-07 13:32:15,331 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-07 13:32:15,334 INFO L256 TraceCheckSpWp]: Trace formula consists of 57 conjuncts, 16 conjunts are in the unsatisfiable core [2019-10-07 13:32:15,346 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2019-10-07 13:32:15,409 INFO L375 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2019-10-07 13:32:15,409 INFO L496 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2019-10-07 13:32:15,418 INFO L567 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size [2019-10-07 13:32:15,419 INFO L496 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2019-10-07 13:32:15,419 INFO L221 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:11, output treesize:7 [2019-10-07 13:32:15,467 INFO L375 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2019-10-07 13:32:15,468 INFO L496 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2019-10-07 13:32:15,472 INFO L567 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size [2019-10-07 13:32:15,472 INFO L496 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2019-10-07 13:32:15,472 INFO L221 ElimStorePlain]: Needed 2 recursive calls to eliminate 3 variables, input treesize:15, output treesize:3 [2019-10-07 13:32:15,518 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-10-07 13:32:15,521 INFO L322 TraceCheckSpWp]: Computing backward predicates... [2019-10-07 13:32:15,569 INFO L319 QuantifierPusher]: Applying distributivity, recursing on 2 terms [2019-10-07 13:32:15,755 INFO L319 QuantifierPusher]: Applying distributivity, recursing on 2 terms [2019-10-07 13:32:15,756 INFO L319 QuantifierPusher]: Applying distributivity, recursing on 2 terms [2019-10-07 13:32:15,761 INFO L319 QuantifierPusher]: Applying distributivity, recursing on 2 terms [2019-10-07 13:32:15,802 INFO L375 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 36 [2019-10-07 13:32:15,855 INFO L375 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 32 [2019-10-07 13:32:15,858 INFO L496 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 2 xjuncts. [2019-10-07 13:32:15,874 INFO L567 ElimStorePlain]: treesize reduction 17, result has 48.5 percent of original size [2019-10-07 13:32:15,874 INFO L496 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2019-10-07 13:32:15,883 INFO L375 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 37 [2019-10-07 13:32:15,889 INFO L189 IndexEqualityManager]: detected not equals via solver [2019-10-07 13:32:15,895 INFO L189 IndexEqualityManager]: detected not equals via solver [2019-10-07 13:32:15,896 INFO L496 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2019-10-07 13:32:15,899 INFO L567 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size [2019-10-07 13:32:15,899 INFO L496 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2019-10-07 13:32:15,937 INFO L567 ElimStorePlain]: treesize reduction 181, result has 8.1 percent of original size [2019-10-07 13:32:15,937 INFO L464 ElimStorePlain]: Eliminatee v_prenex_3 vanished before elimination [2019-10-07 13:32:15,938 INFO L464 ElimStorePlain]: Eliminatee v_prenex_6 vanished before elimination [2019-10-07 13:32:15,938 INFO L464 ElimStorePlain]: Eliminatee |#memory_int| vanished before elimination [2019-10-07 13:32:15,939 INFO L496 ElimStorePlain]: Start of recursive call 1: 8 dim-0 vars, 4 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2019-10-07 13:32:15,939 INFO L221 ElimStorePlain]: Needed 5 recursive calls to eliminate 12 variables, input treesize:247, output treesize:16 [2019-10-07 13:32:15,970 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-10-07 13:32:15,971 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSifa [2019-10-07 13:32:15,996 INFO L162 IcfgInterpreter]: Started Sifa with 13 locations of interest [2019-10-07 13:32:15,996 INFO L169 IcfgInterpreter]: Building call graph [2019-10-07 13:32:16,003 INFO L174 IcfgInterpreter]: Initial procedures are [ULTIMATE.start] [2019-10-07 13:32:16,020 INFO L179 IcfgInterpreter]: Starting interpretation [2019-10-07 13:32:16,021 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.start with input of size 1 for LOIs [2019-10-07 13:32:16,224 INFO L199 IcfgInterpreter]: Interpreting procedure main with input of size 21 for LOIs [2019-10-07 13:32:16,570 WARN L225 Elim1Store]: Array PQE input equivalent to false [2019-10-07 13:32:16,581 WARN L225 Elim1Store]: Array PQE input equivalent to false [2019-10-07 13:32:16,600 WARN L225 Elim1Store]: Array PQE input equivalent to false [2019-10-07 13:32:16,613 WARN L225 Elim1Store]: Array PQE input equivalent to false [2019-10-07 13:32:16,693 INFO L199 IcfgInterpreter]: Interpreting procedure __VERIFIER_assert with input of size 30 for LOIs [2019-10-07 13:32:16,714 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.init with input of size 10 for LOIs [2019-10-07 13:32:16,722 INFO L183 IcfgInterpreter]: Interpretation finished [2019-10-07 13:32:16,723 INFO L191 IcfgInterpreter]: Final predicates for locations of interest are: [2019-10-07 13:32:16,723 INFO L193 IcfgInterpreter]: Reachable states at location L25-3 satisfy 85#(and (= |#NULL.base| 0) (= |main_~#array~0.offset| 0) (<= |main_~#array~0.offset| 0) (<= |#NULL.base| 0) (= 0 main_~index~0) (<= 0 |#NULL.base|) (<= 0 main_~index~0) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (<= 0 |main_~#array~0.offset|) (<= main_~index~0 0)) [2019-10-07 13:32:16,731 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initENTRY satisfy 119#(and (= |old(#NULL.base)| |#NULL.base|) (= |#valid| |old(#valid)|) (= |#NULL.offset| |old(#NULL.offset)|)) [2019-10-07 13:32:16,732 INFO L193 IcfgInterpreter]: Reachable states at location L11 satisfy 110#(and (<= __VERIFIER_assert_~cond 0) (<= 0 |__VERIFIER_assert_#in~cond|) (<= |__VERIFIER_assert_#in~cond| 0) (exists ((|v_main_~#array~0.base_BEFORE_CALL_1| Int) (v_prenex_13 Int)) (or (and (= |#NULL.base| 0) (= |__VERIFIER_assert_#in~cond| 0) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (not (= (mod (select (select |#memory_int| |v_main_~#array~0.base_BEFORE_CALL_1|) 0) 4294967296) 0)) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) (and (= |#NULL.base| 0) (= |__VERIFIER_assert_#in~cond| 1) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (= (mod (select (select |#memory_int| v_prenex_13) 0) 4294967296) 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)))) (<= 0 __VERIFIER_assert_~cond) (= 0 __VERIFIER_assert_~cond) (= |__VERIFIER_assert_#in~cond| __VERIFIER_assert_~cond)) [2019-10-07 13:32:16,732 INFO L193 IcfgInterpreter]: Reachable states at location __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION satisfy 115#(and (<= __VERIFIER_assert_~cond 0) (<= 0 |__VERIFIER_assert_#in~cond|) (<= |__VERIFIER_assert_#in~cond| 0) (exists ((|v_main_~#array~0.base_BEFORE_CALL_1| Int) (v_prenex_13 Int)) (or (and (= |#NULL.base| 0) (= |__VERIFIER_assert_#in~cond| 0) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (not (= (mod (select (select |#memory_int| |v_main_~#array~0.base_BEFORE_CALL_1|) 0) 4294967296) 0)) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) (and (= |#NULL.base| 0) (= |__VERIFIER_assert_#in~cond| 1) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (= (mod (select (select |#memory_int| v_prenex_13) 0) 4294967296) 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)))) (<= 0 __VERIFIER_assert_~cond) (= 0 __VERIFIER_assert_~cond) (= |__VERIFIER_assert_#in~cond| __VERIFIER_assert_~cond)) [2019-10-07 13:32:16,733 INFO L193 IcfgInterpreter]: Reachable states at location L26 satisfy 90#(and (= |#NULL.base| 0) (= |main_~#array~0.offset| 0) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (< (mod main_~index~0 4294967296) 1000) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (<= |main_~#array~0.offset| 0) (= 0 main_~index~0) (<= 0 main_~index~0) (= |#NULL.offset| 0) (<= 0 |main_~#array~0.offset|) (<= main_~index~0 0)) [2019-10-07 13:32:16,733 INFO L193 IcfgInterpreter]: Reachable states at location L-1 satisfy 23#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= 0 (select |#valid| 0)) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-07 13:32:16,734 INFO L193 IcfgInterpreter]: Reachable states at location mainENTRY satisfy 33#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= |#valid| |old(#valid)|) (<= 0 |#NULL.base|) (= |#memory_int| |old(#memory_int)|) (= |#NULL.offset| 0) (= |old(#length)| |#length|) (= 0 (select |old(#valid)| 0)) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-07 13:32:16,734 INFO L193 IcfgInterpreter]: Reachable states at location L27 satisfy 95#(and (= |#NULL.base| 0) (= |main_~#array~0.offset| 0) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (< (mod main_~index~0 4294967296) 1000) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (<= |main_~#array~0.offset| 0) (= (select (select |#memory_int| |main_~#array~0.base|) (+ (* 4 (ite (<= (mod main_~index~0 4294967296) 2147483647) (mod main_~index~0 4294967296) (+ (mod main_~index~0 4294967296) (- 4294967296)))) |main_~#array~0.offset|)) |main_#t~mem2|) (= 0 main_~index~0) (<= 0 main_~index~0) (= |#NULL.offset| 0) (= (mod (ite (and (< (mod main_~index~0 4294967296) 0) (not (= (mod main_~index~0 2) 0))) (+ (mod main_~index~0 2) (- 2)) (mod main_~index~0 2)) 4294967296) 0) (<= 0 |main_~#array~0.offset|) (<= main_~index~0 0)) [2019-10-07 13:32:16,735 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initEXIT satisfy 124#(and (= |#valid| (store |old(#valid)| 0 0)) (= 0 |#NULL.base|) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-07 13:32:16,735 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.startENTRY satisfy 6#true [2019-10-07 13:32:16,735 INFO L193 IcfgInterpreter]: Reachable states at location L21-3 satisfy 80#(and (or (and (= |#NULL.base| 0) (= |main_~#array~0.offset| 0) (= |#NULL.offset| 0)) (and (= 0 |#NULL.base|) (= 0 |main_~#array~0.offset|) (< |main_~#array~0.base| |#StackHeapBarrier|) (= (select |old(#valid)| |main_~#array~0.base|) 0) (= |#valid| (store |old(#valid)| |main_~#array~0.base| 1)) (= 0 (select |old(#valid)| 0)) (not (= |main_~#array~0.base| 0)) (= 0 main_~index~0) (= |#memory_int| |old(#memory_int)|) (= |#NULL.offset| 0) (= (store |old(#length)| |main_~#array~0.base| 4000) |#length|) (<= main_~index~0 0))) (<= |main_~#array~0.offset| 0) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (<= 0 main_~index~0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (<= 0 |main_~#array~0.offset|)) [2019-10-07 13:32:16,736 INFO L193 IcfgInterpreter]: Reachable states at location __VERIFIER_assertENTRY satisfy 100#(exists ((|v_main_~#array~0.base_BEFORE_CALL_1| Int) (v_prenex_13 Int)) (or (and (= |#NULL.base| 0) (= |__VERIFIER_assert_#in~cond| 0) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (not (= (mod (select (select |#memory_int| |v_main_~#array~0.base_BEFORE_CALL_1|) 0) 4294967296) 0)) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) (and (= |#NULL.base| 0) (= |__VERIFIER_assert_#in~cond| 1) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (= (mod (select (select |#memory_int| v_prenex_13) 0) 4294967296) 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)))) [2019-10-07 13:32:16,736 INFO L193 IcfgInterpreter]: Reachable states at location L10 satisfy 105#(and (exists ((|v_main_~#array~0.base_BEFORE_CALL_1| Int) (v_prenex_13 Int)) (or (and (= |#NULL.base| 0) (= |__VERIFIER_assert_#in~cond| 0) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (not (= (mod (select (select |#memory_int| |v_main_~#array~0.base_BEFORE_CALL_1|) 0) 4294967296) 0)) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) (and (= |#NULL.base| 0) (= |__VERIFIER_assert_#in~cond| 1) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (= (mod (select (select |#memory_int| v_prenex_13) 0) 4294967296) 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)))) (= |__VERIFIER_assert_#in~cond| __VERIFIER_assert_~cond)) [2019-10-07 13:32:17,332 INFO L211 tionRefinementEngine]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2019-10-07 13:32:17,333 INFO L224 tionRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 8, 9, 10] total 25 [2019-10-07 13:32:17,335 INFO L442 AbstractCegarLoop]: Interpolant automaton has 25 states [2019-10-07 13:32:17,336 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2019-10-07 13:32:17,340 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=74, Invalid=526, Unknown=0, NotChecked=0, Total=600 [2019-10-07 13:32:17,340 INFO L87 Difference]: Start difference. First operand 22 states and 25 transitions. Second operand 25 states. [2019-10-07 13:32:20,465 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-07 13:32:20,466 INFO L93 Difference]: Finished difference Result 51 states and 60 transitions. [2019-10-07 13:32:20,466 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2019-10-07 13:32:20,467 INFO L78 Accepts]: Start accepts. Automaton has 25 states. Word has length 13 [2019-10-07 13:32:20,467 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-07 13:32:20,468 INFO L225 Difference]: With dead ends: 51 [2019-10-07 13:32:20,468 INFO L226 Difference]: Without dead ends: 36 [2019-10-07 13:32:20,470 INFO L606 BasicCegarLoop]: 0 DeclaredPredicates, 54 GetRequests, 18 SyntacticMatches, 2 SemanticMatches, 34 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 227 ImplicationChecksByTransitivity, 1.6s TimeCoverageRelationStatistics Valid=185, Invalid=1075, Unknown=0, NotChecked=0, Total=1260 [2019-10-07 13:32:20,471 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 36 states. [2019-10-07 13:32:20,478 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 36 to 32. [2019-10-07 13:32:20,478 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 32 states. [2019-10-07 13:32:20,479 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 32 states to 32 states and 36 transitions. [2019-10-07 13:32:20,480 INFO L78 Accepts]: Start accepts. Automaton has 32 states and 36 transitions. Word has length 13 [2019-10-07 13:32:20,480 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-07 13:32:20,480 INFO L462 AbstractCegarLoop]: Abstraction has 32 states and 36 transitions. [2019-10-07 13:32:20,480 INFO L463 AbstractCegarLoop]: Interpolant automaton has 25 states. [2019-10-07 13:32:20,480 INFO L276 IsEmpty]: Start isEmpty. Operand 32 states and 36 transitions. [2019-10-07 13:32:20,481 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2019-10-07 13:32:20,481 INFO L377 BasicCegarLoop]: Found error trace [2019-10-07 13:32:20,481 INFO L385 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-07 13:32:20,687 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 2 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-07 13:32:20,687 INFO L410 AbstractCegarLoop]: === Iteration 3 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-07 13:32:20,687 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-07 13:32:20,688 INFO L82 PathProgramCache]: Analyzing trace with hash 1155484890, now seen corresponding path program 1 times [2019-10-07 13:32:20,688 INFO L150 tionRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-10-07 13:32:20,689 INFO L231 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2019-10-07 13:32:20,689 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-07 13:32:20,689 INFO L117 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-07 13:32:20,689 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-07 13:32:20,746 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-07 13:32:20,819 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 2 proven. 3 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2019-10-07 13:32:20,819 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2019-10-07 13:32:20,820 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2019-10-07 13:32:20,820 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-07 13:32:20,859 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-07 13:32:20,861 INFO L256 TraceCheckSpWp]: Trace formula consists of 77 conjuncts, 25 conjunts are in the unsatisfiable core [2019-10-07 13:32:20,864 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2019-10-07 13:32:20,901 WARN L225 Elim1Store]: Array PQE input equivalent to false [2019-10-07 13:32:20,907 WARN L225 Elim1Store]: Array PQE input equivalent to false [2019-10-07 13:32:20,913 WARN L225 Elim1Store]: Array PQE input equivalent to false [2019-10-07 13:32:20,919 WARN L225 Elim1Store]: Array PQE input equivalent to false [2019-10-07 13:32:20,923 WARN L225 Elim1Store]: Array PQE input equivalent to false [2019-10-07 13:32:21,256 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-10-07 13:32:21,256 INFO L322 TraceCheckSpWp]: Computing backward predicates... [2019-10-07 13:32:23,669 WARN L225 Elim1Store]: Array PQE input equivalent to true [2019-10-07 13:32:23,762 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 2 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-10-07 13:32:23,762 INFO L286 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSifa [2019-10-07 13:32:23,763 INFO L162 IcfgInterpreter]: Started Sifa with 18 locations of interest [2019-10-07 13:32:23,764 INFO L169 IcfgInterpreter]: Building call graph [2019-10-07 13:32:23,764 INFO L174 IcfgInterpreter]: Initial procedures are [ULTIMATE.start] [2019-10-07 13:32:23,764 INFO L179 IcfgInterpreter]: Starting interpretation [2019-10-07 13:32:23,765 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.start with input of size 1 for LOIs [2019-10-07 13:32:23,811 INFO L199 IcfgInterpreter]: Interpreting procedure main with input of size 21 for LOIs [2019-10-07 13:32:23,895 WARN L225 Elim1Store]: Array PQE input equivalent to false [2019-10-07 13:32:23,904 WARN L225 Elim1Store]: Array PQE input equivalent to false [2019-10-07 13:32:23,915 WARN L225 Elim1Store]: Array PQE input equivalent to false [2019-10-07 13:32:23,922 WARN L225 Elim1Store]: Array PQE input equivalent to false [2019-10-07 13:32:23,942 WARN L225 Elim1Store]: Array PQE input equivalent to false [2019-10-07 13:32:24,031 WARN L225 Elim1Store]: Array PQE input equivalent to false [2019-10-07 13:32:24,040 WARN L225 Elim1Store]: Array PQE input equivalent to false [2019-10-07 13:32:24,052 WARN L225 Elim1Store]: Array PQE input equivalent to false [2019-10-07 13:32:24,091 WARN L225 Elim1Store]: Array PQE input equivalent to false [2019-10-07 13:32:24,592 INFO L199 IcfgInterpreter]: Interpreting procedure __VERIFIER_assert with input of size 301 for LOIs [2019-10-07 13:32:24,619 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.init with input of size 10 for LOIs [2019-10-07 13:32:24,623 INFO L183 IcfgInterpreter]: Interpretation finished [2019-10-07 13:32:24,624 INFO L191 IcfgInterpreter]: Final predicates for locations of interest are: [2019-10-07 13:32:24,624 INFO L193 IcfgInterpreter]: Reachable states at location L25-3 satisfy 230#(and (or (and (= |#NULL.base| 0) (= |main_~#array~0.offset| 0) (<= 1 main_~index~0) (= |#NULL.offset| 0)) (and (= |#NULL.base| 0) (= |main_~#array~0.offset| 0) (= 0 main_~index~0) (= |#NULL.offset| 0))) (or (and (<= |main_~#array~0.offset| 0) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (<= 0 main_~index~0) (<= main_~index~0 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (<= 0 |main_~#array~0.offset|)) (and (<= |main_~#array~0.offset| 0) (<= 1 main_~index~0) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (<= 0 |main_~#array~0.offset|)))) [2019-10-07 13:32:24,624 INFO L193 IcfgInterpreter]: Reachable states at location L25-2 satisfy 235#(and (= |#NULL.base| 0) (= |main_~#array~0.offset| 0) (<= |main_~#array~0.offset| 0) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (<= 0 main_~index~0) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (<= 0 |main_~#array~0.offset|)) [2019-10-07 13:32:24,624 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initENTRY satisfy 273#(and (= |old(#NULL.base)| |#NULL.base|) (= |#valid| |old(#valid)|) (= |#NULL.offset| |old(#NULL.offset)|)) [2019-10-07 13:32:24,625 INFO L193 IcfgInterpreter]: Reachable states at location __VERIFIER_assertEXIT satisfy 269#(or (and (not (= 0 __VERIFIER_assert_~cond)) (exists ((v_prenex_67 Int) (v_prenex_66 Int) (v_prenex_69 Int) (v_prenex_68 Int) (v_prenex_63 Int) (v_prenex_62 Int) (v_prenex_65 Int) (v_prenex_64 Int) (v_prenex_80 Int) (v_prenex_61 Int) (v_prenex_60 Int) (v_main_~index~0_BEFORE_CALL_10 Int) (v_prenex_59 Int) (v_prenex_78 Int) (v_prenex_77 Int) (v_prenex_79 Int) (v_prenex_74 Int) (v_prenex_73 Int) (v_prenex_76 Int) (v_prenex_75 Int) (v_prenex_70 Int) (v_prenex_72 Int) (v_prenex_71 Int) (|v_main_~#array~0.base_BEFORE_CALL_10| Int)) (or (and (= |#NULL.base| 0) (not (= 0 (mod v_prenex_76 2))) (= |__VERIFIER_assert_#in~cond| 0) (<= |#NULL.base| 0) (<= (mod v_prenex_76 4294967296) 2147483647) (<= 0 v_prenex_76) (<= 0 |#NULL.base|) (not (= 0 (mod (+ (mod v_prenex_76 2) 4294967294) 4294967296))) (< (mod v_prenex_76 4294967296) 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (= 0 (mod (select (select |#memory_int| v_prenex_75) (* 4 (mod v_prenex_76 4294967296))) 4294967296)) (= |#NULL.offset| 0)) (and (= |#NULL.base| 0) (= |__VERIFIER_assert_#in~cond| 0) (<= 0 v_prenex_78) (not (= 0 (mod v_prenex_78 2))) (<= |#NULL.base| 0) (= 0 (mod (select (select |#memory_int| v_prenex_77) (+ (* 4 (mod v_prenex_78 4294967296)) (- 17179869184))) 4294967296)) (<= 0 |#NULL.base|) (not (<= (mod v_prenex_78 4294967296) 2147483647)) (= |#NULL.offset| 0) (not (< (mod v_prenex_78 4294967296) 0)) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) (and (= |#NULL.base| 0) (= |__VERIFIER_assert_#in~cond| 1) (not (<= (mod v_prenex_64 4294967296) 2147483647)) (not (= 0 (mod v_prenex_64 2))) (not (= 0 (mod (select (select |#memory_int| v_prenex_63) (+ (* 4 (mod v_prenex_64 4294967296)) (- 17179869184))) 4294967296))) (<= |#NULL.base| 0) (<= 0 v_prenex_64) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (not (= 0 (mod (+ (mod v_prenex_64 2) 4294967294) 4294967296))) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) (and (= |#NULL.base| 0) (= |__VERIFIER_assert_#in~cond| 0) (= 0 (mod (select (select |#memory_int| v_prenex_71) (+ (* 4 (mod v_prenex_72 4294967296)) (- 17179869184))) 4294967296)) (not (= 0 (mod v_prenex_72 2))) (<= |#NULL.base| 0) (<= 0 v_prenex_72) (<= 0 |#NULL.base|) (not (= 0 (mod (+ (mod v_prenex_72 2) 4294967294) 4294967296))) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (not (<= (mod v_prenex_72 4294967296) 2147483647)) (= |#NULL.offset| 0) (< (mod v_prenex_72 4294967296) 0)) (and (= |#NULL.base| 0) (= |__VERIFIER_assert_#in~cond| 1) (<= 0 v_prenex_66) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (not (= 0 (mod (+ (mod v_prenex_66 2) 4294967294) 4294967296))) (<= (mod v_prenex_66 4294967296) 2147483647) (< (mod v_prenex_66 4294967296) 0) (not (= 0 (mod v_prenex_66 2))) (= |#NULL.offset| 0) (not (= 0 (mod (select (select |#memory_int| v_prenex_65) (* 4 (mod v_prenex_66 4294967296))) 4294967296)))) (and (= |#NULL.base| 0) (= |__VERIFIER_assert_#in~cond| 0) (<= 0 v_prenex_70) (<= |#NULL.base| 0) (= 0 (mod (select (select |#memory_int| v_prenex_69) (+ (* 4 (mod v_prenex_70 4294967296)) (- 17179869184))) 4294967296)) (<= 0 |#NULL.base|) (not (= 0 (mod v_prenex_70 2))) (not (<= (mod v_prenex_70 4294967296) 2147483647)) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (not (= 0 (mod (+ (mod v_prenex_70 2) 4294967294) 4294967296)))) (and (= |#NULL.base| 0) (= |__VERIFIER_assert_#in~cond| 1) (not (= 0 (mod (select (select |#memory_int| v_prenex_61) (* 4 (mod v_prenex_62 4294967296))) 4294967296))) (<= |#NULL.base| 0) (not (< (mod v_prenex_62 4294967296) 0)) (<= (mod v_prenex_62 4294967296) 2147483647) (<= 0 |#NULL.base|) (<= 0 v_prenex_62) (= |#NULL.offset| 0) (not (= 0 (mod v_prenex_62 2))) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) (and (= |#NULL.base| 0) (not (= 0 (mod v_prenex_74 2))) (= |__VERIFIER_assert_#in~cond| 0) (<= |#NULL.base| 0) (<= 0 v_prenex_74) (<= (mod v_prenex_74 4294967296) 2147483647) (= 0 (mod (select (select |#memory_int| v_prenex_73) (* 4 (mod v_prenex_74 4294967296))) 4294967296)) (<= 0 |#NULL.base|) (not (< (mod v_prenex_74 4294967296) 0)) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) (and (= |#NULL.base| 0) (= |__VERIFIER_assert_#in~cond| 1) (<= |#NULL.base| 0) (not (= 0 (mod v_prenex_60 2))) (<= 0 |#NULL.base|) (not (<= (mod v_prenex_60 4294967296) 2147483647)) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (< (mod v_prenex_60 4294967296) 0) (not (= 0 (mod (select (select |#memory_int| v_prenex_59) (+ (* 4 (mod v_prenex_60 4294967296)) (- 17179869184))) 4294967296))) (not (= 0 (mod (+ (mod v_prenex_60 2) 4294967294) 4294967296))) (<= 0 v_prenex_60) (= |#NULL.offset| 0)) (and (= |#NULL.base| 0) (<= 0 v_main_~index~0_BEFORE_CALL_10) (= |__VERIFIER_assert_#in~cond| 1) (<= (mod v_main_~index~0_BEFORE_CALL_10 4294967296) 2147483647) (not (= 0 (mod (select (select |#memory_int| |v_main_~#array~0.base_BEFORE_CALL_10|) (* 4 (mod v_main_~index~0_BEFORE_CALL_10 4294967296))) 4294967296))) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (not (= 0 (mod (+ (mod v_main_~index~0_BEFORE_CALL_10 2) 4294967294) 4294967296))) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (not (= 0 (mod v_main_~index~0_BEFORE_CALL_10 2)))) (and (= |#NULL.base| 0) (= |__VERIFIER_assert_#in~cond| 0) (<= 0 v_prenex_80) (<= |#NULL.base| 0) (not (= 0 (mod (+ (mod v_prenex_80 2) 4294967294) 4294967296))) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (= 0 (mod (select (select |#memory_int| v_prenex_79) (* 4 (mod v_prenex_80 4294967296))) 4294967296)) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (not (= 0 (mod v_prenex_80 2))) (<= (mod v_prenex_80 4294967296) 2147483647)) (and (= |#NULL.base| 0) (not (= 0 (mod v_prenex_68 2))) (= |__VERIFIER_assert_#in~cond| 1) (not (<= (mod v_prenex_68 4294967296) 2147483647)) (<= |#NULL.base| 0) (not (< (mod v_prenex_68 4294967296) 0)) (not (= 0 (mod (select (select |#memory_int| v_prenex_67) (+ (* 4 (mod v_prenex_68 4294967296)) (- 17179869184))) 4294967296))) (<= 0 |#NULL.base|) (<= 0 v_prenex_68) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)))) (= |__VERIFIER_assert_#in~cond| __VERIFIER_assert_~cond)) (and (exists ((v_prenex_105 Int) (v_prenex_106 Int) (|v_main_~#array~0.base_BEFORE_CALL_13| Int) (v_main_~index~0_BEFORE_CALL_13 Int)) (or (and (= |#NULL.base| 0) (= |__VERIFIER_assert_#in~cond| 1) (<= |#NULL.base| 0) (= 0 (mod (select (select |#memory_int| v_prenex_105) (* 4 (mod v_prenex_106 4294967296))) 4294967296)) (<= (mod v_prenex_106 4294967296) 2147483647) (<= 0 |#NULL.base|) (<= 0 v_prenex_106) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (= (mod v_prenex_106 2) 0)) (and (= |#NULL.base| 0) (= |__VERIFIER_assert_#in~cond| 1) (not (<= (mod v_main_~index~0_BEFORE_CALL_13 4294967296) 2147483647)) (<= |#NULL.base| 0) (<= 0 v_main_~index~0_BEFORE_CALL_13) (<= 0 |#NULL.base|) (= (mod (select (select |#memory_int| |v_main_~#array~0.base_BEFORE_CALL_13|) (+ (* 4 (mod v_main_~index~0_BEFORE_CALL_13 4294967296)) (- 17179869184))) 4294967296) 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (< (mod v_main_~index~0_BEFORE_CALL_13 4294967296) 0) (not (= (mod v_main_~index~0_BEFORE_CALL_13 2) 0)) (= (mod (+ (mod v_main_~index~0_BEFORE_CALL_13 2) 4294967294) 4294967296) 0) (= |#NULL.offset| 0)) (and (= |#NULL.base| 0) (= |__VERIFIER_assert_#in~cond| 0) (<= |#NULL.base| 0) (<= (mod v_prenex_106 4294967296) 2147483647) (<= 0 |#NULL.base|) (not (= 0 (mod (select (select |#memory_int| v_prenex_105) (* 4 (mod v_prenex_106 4294967296))) 4294967296))) (<= 0 v_prenex_106) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (= (mod v_prenex_106 2) 0)) (and (= |#NULL.base| 0) (= |__VERIFIER_assert_#in~cond| 0) (not (<= (mod v_main_~index~0_BEFORE_CALL_13 4294967296) 2147483647)) (<= |#NULL.base| 0) (<= 0 v_main_~index~0_BEFORE_CALL_13) (<= 0 |#NULL.base|) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (< (mod v_main_~index~0_BEFORE_CALL_13 4294967296) 0) (not (= (mod v_main_~index~0_BEFORE_CALL_13 2) 0)) (not (= (mod (select (select |#memory_int| |v_main_~#array~0.base_BEFORE_CALL_13|) (+ (* 4 (mod v_main_~index~0_BEFORE_CALL_13 4294967296)) (- 17179869184))) 4294967296) 0)) (= (mod (+ (mod v_main_~index~0_BEFORE_CALL_13 2) 4294967294) 4294967296) 0) (= |#NULL.offset| 0)) (and (= |#NULL.base| 0) (= |__VERIFIER_assert_#in~cond| 0) (<= |#NULL.base| 0) (< (mod v_prenex_106 4294967296) 0) (<= (mod v_prenex_106 4294967296) 2147483647) (<= 0 |#NULL.base|) (<= 0 v_prenex_106) (not (= 0 (mod (select (select |#memory_int| v_prenex_105) (* 4 (mod v_prenex_106 4294967296))) 4294967296))) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (not (= (mod v_prenex_106 2) 0)) (= (mod (+ (mod v_prenex_106 2) 4294967294) 4294967296) 0) (= |#NULL.offset| 0)) (and (= |#NULL.base| 0) (= |__VERIFIER_assert_#in~cond| 1) (not (<= (mod v_main_~index~0_BEFORE_CALL_13 4294967296) 2147483647)) (<= |#NULL.base| 0) (<= 0 v_main_~index~0_BEFORE_CALL_13) (<= 0 |#NULL.base|) (= (mod (select (select |#memory_int| |v_main_~#array~0.base_BEFORE_CALL_13|) (+ (* 4 (mod v_main_~index~0_BEFORE_CALL_13 4294967296)) (- 17179869184))) 4294967296) 0) (= |#NULL.offset| 0) (= (mod v_main_~index~0_BEFORE_CALL_13 2) 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) (and (= |#NULL.base| 0) (= |__VERIFIER_assert_#in~cond| 1) (<= |#NULL.base| 0) (< (mod v_prenex_106 4294967296) 0) (<= (mod v_prenex_106 4294967296) 2147483647) (<= 0 |#NULL.base|) (<= 0 v_prenex_106) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (not (= (mod v_prenex_106 2) 0)) (= (mod (+ (mod v_prenex_106 2) 4294967294) 4294967296) 0) (= 0 (mod (select (select |#memory_int| v_prenex_105) (* 4 (mod v_prenex_106 4294967296))) 4294967296)) (= |#NULL.offset| 0)) (and (= |#NULL.base| 0) (= |__VERIFIER_assert_#in~cond| 0) (not (<= (mod v_main_~index~0_BEFORE_CALL_13 4294967296) 2147483647)) (<= |#NULL.base| 0) (<= 0 v_main_~index~0_BEFORE_CALL_13) (<= 0 |#NULL.base|) (not (= (mod (select (select |#memory_int| |v_main_~#array~0.base_BEFORE_CALL_13|) (+ (* 4 (mod v_main_~index~0_BEFORE_CALL_13 4294967296)) (- 17179869184))) 4294967296) 0)) (= |#NULL.offset| 0) (= (mod v_main_~index~0_BEFORE_CALL_13 2) 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)))) (not (= 0 __VERIFIER_assert_~cond)) (= |__VERIFIER_assert_#in~cond| __VERIFIER_assert_~cond))) [2019-10-07 13:32:24,626 INFO L193 IcfgInterpreter]: Reachable states at location L11 satisfy 254#(and (or (and (exists ((v_prenex_67 Int) (v_prenex_66 Int) (v_prenex_69 Int) (v_prenex_68 Int) (v_prenex_63 Int) (v_prenex_62 Int) (v_prenex_65 Int) (v_prenex_64 Int) (v_prenex_80 Int) (v_prenex_61 Int) (v_prenex_60 Int) (v_main_~index~0_BEFORE_CALL_10 Int) (v_prenex_59 Int) (v_prenex_78 Int) (v_prenex_77 Int) (v_prenex_79 Int) (v_prenex_74 Int) (v_prenex_73 Int) (v_prenex_76 Int) (v_prenex_75 Int) (v_prenex_70 Int) (v_prenex_72 Int) (v_prenex_71 Int) (|v_main_~#array~0.base_BEFORE_CALL_10| Int)) (or (and (= |#NULL.base| 0) (not (= 0 (mod v_prenex_76 2))) (= |__VERIFIER_assert_#in~cond| 0) (<= |#NULL.base| 0) (<= (mod v_prenex_76 4294967296) 2147483647) (<= 0 v_prenex_76) (<= 0 |#NULL.base|) (not (= 0 (mod (+ (mod v_prenex_76 2) 4294967294) 4294967296))) (< (mod v_prenex_76 4294967296) 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (= 0 (mod (select (select |#memory_int| v_prenex_75) (* 4 (mod v_prenex_76 4294967296))) 4294967296)) (= |#NULL.offset| 0)) (and (= |#NULL.base| 0) (= |__VERIFIER_assert_#in~cond| 0) (<= 0 v_prenex_78) (not (= 0 (mod v_prenex_78 2))) (<= |#NULL.base| 0) (= 0 (mod (select (select |#memory_int| v_prenex_77) (+ (* 4 (mod v_prenex_78 4294967296)) (- 17179869184))) 4294967296)) (<= 0 |#NULL.base|) (not (<= (mod v_prenex_78 4294967296) 2147483647)) (= |#NULL.offset| 0) (not (< (mod v_prenex_78 4294967296) 0)) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) (and (= |#NULL.base| 0) (= |__VERIFIER_assert_#in~cond| 1) (not (<= (mod v_prenex_64 4294967296) 2147483647)) (not (= 0 (mod v_prenex_64 2))) (not (= 0 (mod (select (select |#memory_int| v_prenex_63) (+ (* 4 (mod v_prenex_64 4294967296)) (- 17179869184))) 4294967296))) (<= |#NULL.base| 0) (<= 0 v_prenex_64) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (not (= 0 (mod (+ (mod v_prenex_64 2) 4294967294) 4294967296))) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) (and (= |#NULL.base| 0) (= |__VERIFIER_assert_#in~cond| 0) (= 0 (mod (select (select |#memory_int| v_prenex_71) (+ (* 4 (mod v_prenex_72 4294967296)) (- 17179869184))) 4294967296)) (not (= 0 (mod v_prenex_72 2))) (<= |#NULL.base| 0) (<= 0 v_prenex_72) (<= 0 |#NULL.base|) (not (= 0 (mod (+ (mod v_prenex_72 2) 4294967294) 4294967296))) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (not (<= (mod v_prenex_72 4294967296) 2147483647)) (= |#NULL.offset| 0) (< (mod v_prenex_72 4294967296) 0)) (and (= |#NULL.base| 0) (= |__VERIFIER_assert_#in~cond| 1) (<= 0 v_prenex_66) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (not (= 0 (mod (+ (mod v_prenex_66 2) 4294967294) 4294967296))) (<= (mod v_prenex_66 4294967296) 2147483647) (< (mod v_prenex_66 4294967296) 0) (not (= 0 (mod v_prenex_66 2))) (= |#NULL.offset| 0) (not (= 0 (mod (select (select |#memory_int| v_prenex_65) (* 4 (mod v_prenex_66 4294967296))) 4294967296)))) (and (= |#NULL.base| 0) (= |__VERIFIER_assert_#in~cond| 0) (<= 0 v_prenex_70) (<= |#NULL.base| 0) (= 0 (mod (select (select |#memory_int| v_prenex_69) (+ (* 4 (mod v_prenex_70 4294967296)) (- 17179869184))) 4294967296)) (<= 0 |#NULL.base|) (not (= 0 (mod v_prenex_70 2))) (not (<= (mod v_prenex_70 4294967296) 2147483647)) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (not (= 0 (mod (+ (mod v_prenex_70 2) 4294967294) 4294967296)))) (and (= |#NULL.base| 0) (= |__VERIFIER_assert_#in~cond| 1) (not (= 0 (mod (select (select |#memory_int| v_prenex_61) (* 4 (mod v_prenex_62 4294967296))) 4294967296))) (<= |#NULL.base| 0) (not (< (mod v_prenex_62 4294967296) 0)) (<= (mod v_prenex_62 4294967296) 2147483647) (<= 0 |#NULL.base|) (<= 0 v_prenex_62) (= |#NULL.offset| 0) (not (= 0 (mod v_prenex_62 2))) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) (and (= |#NULL.base| 0) (not (= 0 (mod v_prenex_74 2))) (= |__VERIFIER_assert_#in~cond| 0) (<= |#NULL.base| 0) (<= 0 v_prenex_74) (<= (mod v_prenex_74 4294967296) 2147483647) (= 0 (mod (select (select |#memory_int| v_prenex_73) (* 4 (mod v_prenex_74 4294967296))) 4294967296)) (<= 0 |#NULL.base|) (not (< (mod v_prenex_74 4294967296) 0)) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) (and (= |#NULL.base| 0) (= |__VERIFIER_assert_#in~cond| 1) (<= |#NULL.base| 0) (not (= 0 (mod v_prenex_60 2))) (<= 0 |#NULL.base|) (not (<= (mod v_prenex_60 4294967296) 2147483647)) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (< (mod v_prenex_60 4294967296) 0) (not (= 0 (mod (select (select |#memory_int| v_prenex_59) (+ (* 4 (mod v_prenex_60 4294967296)) (- 17179869184))) 4294967296))) (not (= 0 (mod (+ (mod v_prenex_60 2) 4294967294) 4294967296))) (<= 0 v_prenex_60) (= |#NULL.offset| 0)) (and (= |#NULL.base| 0) (<= 0 v_main_~index~0_BEFORE_CALL_10) (= |__VERIFIER_assert_#in~cond| 1) (<= (mod v_main_~index~0_BEFORE_CALL_10 4294967296) 2147483647) (not (= 0 (mod (select (select |#memory_int| |v_main_~#array~0.base_BEFORE_CALL_10|) (* 4 (mod v_main_~index~0_BEFORE_CALL_10 4294967296))) 4294967296))) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (not (= 0 (mod (+ (mod v_main_~index~0_BEFORE_CALL_10 2) 4294967294) 4294967296))) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (not (= 0 (mod v_main_~index~0_BEFORE_CALL_10 2)))) (and (= |#NULL.base| 0) (= |__VERIFIER_assert_#in~cond| 0) (<= 0 v_prenex_80) (<= |#NULL.base| 0) (not (= 0 (mod (+ (mod v_prenex_80 2) 4294967294) 4294967296))) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (= 0 (mod (select (select |#memory_int| v_prenex_79) (* 4 (mod v_prenex_80 4294967296))) 4294967296)) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (not (= 0 (mod v_prenex_80 2))) (<= (mod v_prenex_80 4294967296) 2147483647)) (and (= |#NULL.base| 0) (not (= 0 (mod v_prenex_68 2))) (= |__VERIFIER_assert_#in~cond| 1) (not (<= (mod v_prenex_68 4294967296) 2147483647)) (<= |#NULL.base| 0) (not (< (mod v_prenex_68 4294967296) 0)) (not (= 0 (mod (select (select |#memory_int| v_prenex_67) (+ (* 4 (mod v_prenex_68 4294967296)) (- 17179869184))) 4294967296))) (<= 0 |#NULL.base|) (<= 0 v_prenex_68) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)))) (= 0 __VERIFIER_assert_~cond) (= |__VERIFIER_assert_#in~cond| __VERIFIER_assert_~cond)) (and (exists ((v_prenex_105 Int) (v_prenex_106 Int) (|v_main_~#array~0.base_BEFORE_CALL_13| Int) (v_main_~index~0_BEFORE_CALL_13 Int)) (or (and (= |#NULL.base| 0) (= |__VERIFIER_assert_#in~cond| 1) (<= |#NULL.base| 0) (= 0 (mod (select (select |#memory_int| v_prenex_105) (* 4 (mod v_prenex_106 4294967296))) 4294967296)) (<= (mod v_prenex_106 4294967296) 2147483647) (<= 0 |#NULL.base|) (<= 0 v_prenex_106) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (= (mod v_prenex_106 2) 0)) (and (= |#NULL.base| 0) (= |__VERIFIER_assert_#in~cond| 1) (not (<= (mod v_main_~index~0_BEFORE_CALL_13 4294967296) 2147483647)) (<= |#NULL.base| 0) (<= 0 v_main_~index~0_BEFORE_CALL_13) (<= 0 |#NULL.base|) (= (mod (select (select |#memory_int| |v_main_~#array~0.base_BEFORE_CALL_13|) (+ (* 4 (mod v_main_~index~0_BEFORE_CALL_13 4294967296)) (- 17179869184))) 4294967296) 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (< (mod v_main_~index~0_BEFORE_CALL_13 4294967296) 0) (not (= (mod v_main_~index~0_BEFORE_CALL_13 2) 0)) (= (mod (+ (mod v_main_~index~0_BEFORE_CALL_13 2) 4294967294) 4294967296) 0) (= |#NULL.offset| 0)) (and (= |#NULL.base| 0) (= |__VERIFIER_assert_#in~cond| 0) (<= |#NULL.base| 0) (<= (mod v_prenex_106 4294967296) 2147483647) (<= 0 |#NULL.base|) (not (= 0 (mod (select (select |#memory_int| v_prenex_105) (* 4 (mod v_prenex_106 4294967296))) 4294967296))) (<= 0 v_prenex_106) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (= (mod v_prenex_106 2) 0)) (and (= |#NULL.base| 0) (= |__VERIFIER_assert_#in~cond| 0) (not (<= (mod v_main_~index~0_BEFORE_CALL_13 4294967296) 2147483647)) (<= |#NULL.base| 0) (<= 0 v_main_~index~0_BEFORE_CALL_13) (<= 0 |#NULL.base|) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (< (mod v_main_~index~0_BEFORE_CALL_13 4294967296) 0) (not (= (mod v_main_~index~0_BEFORE_CALL_13 2) 0)) (not (= (mod (select (select |#memory_int| |v_main_~#array~0.base_BEFORE_CALL_13|) (+ (* 4 (mod v_main_~index~0_BEFORE_CALL_13 4294967296)) (- 17179869184))) 4294967296) 0)) (= (mod (+ (mod v_main_~index~0_BEFORE_CALL_13 2) 4294967294) 4294967296) 0) (= |#NULL.offset| 0)) (and (= |#NULL.base| 0) (= |__VERIFIER_assert_#in~cond| 0) (<= |#NULL.base| 0) (< (mod v_prenex_106 4294967296) 0) (<= (mod v_prenex_106 4294967296) 2147483647) (<= 0 |#NULL.base|) (<= 0 v_prenex_106) (not (= 0 (mod (select (select |#memory_int| v_prenex_105) (* 4 (mod v_prenex_106 4294967296))) 4294967296))) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (not (= (mod v_prenex_106 2) 0)) (= (mod (+ (mod v_prenex_106 2) 4294967294) 4294967296) 0) (= |#NULL.offset| 0)) (and (= |#NULL.base| 0) (= |__VERIFIER_assert_#in~cond| 1) (not (<= (mod v_main_~index~0_BEFORE_CALL_13 4294967296) 2147483647)) (<= |#NULL.base| 0) (<= 0 v_main_~index~0_BEFORE_CALL_13) (<= 0 |#NULL.base|) (= (mod (select (select |#memory_int| |v_main_~#array~0.base_BEFORE_CALL_13|) (+ (* 4 (mod v_main_~index~0_BEFORE_CALL_13 4294967296)) (- 17179869184))) 4294967296) 0) (= |#NULL.offset| 0) (= (mod v_main_~index~0_BEFORE_CALL_13 2) 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) (and (= |#NULL.base| 0) (= |__VERIFIER_assert_#in~cond| 1) (<= |#NULL.base| 0) (< (mod v_prenex_106 4294967296) 0) (<= (mod v_prenex_106 4294967296) 2147483647) (<= 0 |#NULL.base|) (<= 0 v_prenex_106) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (not (= (mod v_prenex_106 2) 0)) (= (mod (+ (mod v_prenex_106 2) 4294967294) 4294967296) 0) (= 0 (mod (select (select |#memory_int| v_prenex_105) (* 4 (mod v_prenex_106 4294967296))) 4294967296)) (= |#NULL.offset| 0)) (and (= |#NULL.base| 0) (= |__VERIFIER_assert_#in~cond| 0) (not (<= (mod v_main_~index~0_BEFORE_CALL_13 4294967296) 2147483647)) (<= |#NULL.base| 0) (<= 0 v_main_~index~0_BEFORE_CALL_13) (<= 0 |#NULL.base|) (not (= (mod (select (select |#memory_int| |v_main_~#array~0.base_BEFORE_CALL_13|) (+ (* 4 (mod v_main_~index~0_BEFORE_CALL_13 4294967296)) (- 17179869184))) 4294967296) 0)) (= |#NULL.offset| 0) (= (mod v_main_~index~0_BEFORE_CALL_13 2) 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)))) (= 0 __VERIFIER_assert_~cond) (= |__VERIFIER_assert_#in~cond| __VERIFIER_assert_~cond))) (<= __VERIFIER_assert_~cond 0) (<= 0 |__VERIFIER_assert_#in~cond|) (<= |__VERIFIER_assert_#in~cond| 0) (<= 0 __VERIFIER_assert_~cond)) [2019-10-07 13:32:24,627 INFO L193 IcfgInterpreter]: Reachable states at location __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION satisfy 259#(and (or (and (exists ((v_prenex_67 Int) (v_prenex_66 Int) (v_prenex_69 Int) (v_prenex_68 Int) (v_prenex_63 Int) (v_prenex_62 Int) (v_prenex_65 Int) (v_prenex_64 Int) (v_prenex_80 Int) (v_prenex_61 Int) (v_prenex_60 Int) (v_main_~index~0_BEFORE_CALL_10 Int) (v_prenex_59 Int) (v_prenex_78 Int) (v_prenex_77 Int) (v_prenex_79 Int) (v_prenex_74 Int) (v_prenex_73 Int) (v_prenex_76 Int) (v_prenex_75 Int) (v_prenex_70 Int) (v_prenex_72 Int) (v_prenex_71 Int) (|v_main_~#array~0.base_BEFORE_CALL_10| Int)) (or (and (= |#NULL.base| 0) (not (= 0 (mod v_prenex_76 2))) (= |__VERIFIER_assert_#in~cond| 0) (<= |#NULL.base| 0) (<= (mod v_prenex_76 4294967296) 2147483647) (<= 0 v_prenex_76) (<= 0 |#NULL.base|) (not (= 0 (mod (+ (mod v_prenex_76 2) 4294967294) 4294967296))) (< (mod v_prenex_76 4294967296) 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (= 0 (mod (select (select |#memory_int| v_prenex_75) (* 4 (mod v_prenex_76 4294967296))) 4294967296)) (= |#NULL.offset| 0)) (and (= |#NULL.base| 0) (= |__VERIFIER_assert_#in~cond| 0) (<= 0 v_prenex_78) (not (= 0 (mod v_prenex_78 2))) (<= |#NULL.base| 0) (= 0 (mod (select (select |#memory_int| v_prenex_77) (+ (* 4 (mod v_prenex_78 4294967296)) (- 17179869184))) 4294967296)) (<= 0 |#NULL.base|) (not (<= (mod v_prenex_78 4294967296) 2147483647)) (= |#NULL.offset| 0) (not (< (mod v_prenex_78 4294967296) 0)) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) (and (= |#NULL.base| 0) (= |__VERIFIER_assert_#in~cond| 1) (not (<= (mod v_prenex_64 4294967296) 2147483647)) (not (= 0 (mod v_prenex_64 2))) (not (= 0 (mod (select (select |#memory_int| v_prenex_63) (+ (* 4 (mod v_prenex_64 4294967296)) (- 17179869184))) 4294967296))) (<= |#NULL.base| 0) (<= 0 v_prenex_64) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (not (= 0 (mod (+ (mod v_prenex_64 2) 4294967294) 4294967296))) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) (and (= |#NULL.base| 0) (= |__VERIFIER_assert_#in~cond| 0) (= 0 (mod (select (select |#memory_int| v_prenex_71) (+ (* 4 (mod v_prenex_72 4294967296)) (- 17179869184))) 4294967296)) (not (= 0 (mod v_prenex_72 2))) (<= |#NULL.base| 0) (<= 0 v_prenex_72) (<= 0 |#NULL.base|) (not (= 0 (mod (+ (mod v_prenex_72 2) 4294967294) 4294967296))) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (not (<= (mod v_prenex_72 4294967296) 2147483647)) (= |#NULL.offset| 0) (< (mod v_prenex_72 4294967296) 0)) (and (= |#NULL.base| 0) (= |__VERIFIER_assert_#in~cond| 1) (<= 0 v_prenex_66) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (not (= 0 (mod (+ (mod v_prenex_66 2) 4294967294) 4294967296))) (<= (mod v_prenex_66 4294967296) 2147483647) (< (mod v_prenex_66 4294967296) 0) (not (= 0 (mod v_prenex_66 2))) (= |#NULL.offset| 0) (not (= 0 (mod (select (select |#memory_int| v_prenex_65) (* 4 (mod v_prenex_66 4294967296))) 4294967296)))) (and (= |#NULL.base| 0) (= |__VERIFIER_assert_#in~cond| 0) (<= 0 v_prenex_70) (<= |#NULL.base| 0) (= 0 (mod (select (select |#memory_int| v_prenex_69) (+ (* 4 (mod v_prenex_70 4294967296)) (- 17179869184))) 4294967296)) (<= 0 |#NULL.base|) (not (= 0 (mod v_prenex_70 2))) (not (<= (mod v_prenex_70 4294967296) 2147483647)) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (not (= 0 (mod (+ (mod v_prenex_70 2) 4294967294) 4294967296)))) (and (= |#NULL.base| 0) (= |__VERIFIER_assert_#in~cond| 1) (not (= 0 (mod (select (select |#memory_int| v_prenex_61) (* 4 (mod v_prenex_62 4294967296))) 4294967296))) (<= |#NULL.base| 0) (not (< (mod v_prenex_62 4294967296) 0)) (<= (mod v_prenex_62 4294967296) 2147483647) (<= 0 |#NULL.base|) (<= 0 v_prenex_62) (= |#NULL.offset| 0) (not (= 0 (mod v_prenex_62 2))) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) (and (= |#NULL.base| 0) (not (= 0 (mod v_prenex_74 2))) (= |__VERIFIER_assert_#in~cond| 0) (<= |#NULL.base| 0) (<= 0 v_prenex_74) (<= (mod v_prenex_74 4294967296) 2147483647) (= 0 (mod (select (select |#memory_int| v_prenex_73) (* 4 (mod v_prenex_74 4294967296))) 4294967296)) (<= 0 |#NULL.base|) (not (< (mod v_prenex_74 4294967296) 0)) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) (and (= |#NULL.base| 0) (= |__VERIFIER_assert_#in~cond| 1) (<= |#NULL.base| 0) (not (= 0 (mod v_prenex_60 2))) (<= 0 |#NULL.base|) (not (<= (mod v_prenex_60 4294967296) 2147483647)) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (< (mod v_prenex_60 4294967296) 0) (not (= 0 (mod (select (select |#memory_int| v_prenex_59) (+ (* 4 (mod v_prenex_60 4294967296)) (- 17179869184))) 4294967296))) (not (= 0 (mod (+ (mod v_prenex_60 2) 4294967294) 4294967296))) (<= 0 v_prenex_60) (= |#NULL.offset| 0)) (and (= |#NULL.base| 0) (<= 0 v_main_~index~0_BEFORE_CALL_10) (= |__VERIFIER_assert_#in~cond| 1) (<= (mod v_main_~index~0_BEFORE_CALL_10 4294967296) 2147483647) (not (= 0 (mod (select (select |#memory_int| |v_main_~#array~0.base_BEFORE_CALL_10|) (* 4 (mod v_main_~index~0_BEFORE_CALL_10 4294967296))) 4294967296))) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (not (= 0 (mod (+ (mod v_main_~index~0_BEFORE_CALL_10 2) 4294967294) 4294967296))) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (not (= 0 (mod v_main_~index~0_BEFORE_CALL_10 2)))) (and (= |#NULL.base| 0) (= |__VERIFIER_assert_#in~cond| 0) (<= 0 v_prenex_80) (<= |#NULL.base| 0) (not (= 0 (mod (+ (mod v_prenex_80 2) 4294967294) 4294967296))) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (= 0 (mod (select (select |#memory_int| v_prenex_79) (* 4 (mod v_prenex_80 4294967296))) 4294967296)) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (not (= 0 (mod v_prenex_80 2))) (<= (mod v_prenex_80 4294967296) 2147483647)) (and (= |#NULL.base| 0) (not (= 0 (mod v_prenex_68 2))) (= |__VERIFIER_assert_#in~cond| 1) (not (<= (mod v_prenex_68 4294967296) 2147483647)) (<= |#NULL.base| 0) (not (< (mod v_prenex_68 4294967296) 0)) (not (= 0 (mod (select (select |#memory_int| v_prenex_67) (+ (* 4 (mod v_prenex_68 4294967296)) (- 17179869184))) 4294967296))) (<= 0 |#NULL.base|) (<= 0 v_prenex_68) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)))) (= 0 __VERIFIER_assert_~cond) (= |__VERIFIER_assert_#in~cond| __VERIFIER_assert_~cond)) (and (exists ((v_prenex_105 Int) (v_prenex_106 Int) (|v_main_~#array~0.base_BEFORE_CALL_13| Int) (v_main_~index~0_BEFORE_CALL_13 Int)) (or (and (= |#NULL.base| 0) (= |__VERIFIER_assert_#in~cond| 1) (<= |#NULL.base| 0) (= 0 (mod (select (select |#memory_int| v_prenex_105) (* 4 (mod v_prenex_106 4294967296))) 4294967296)) (<= (mod v_prenex_106 4294967296) 2147483647) (<= 0 |#NULL.base|) (<= 0 v_prenex_106) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (= (mod v_prenex_106 2) 0)) (and (= |#NULL.base| 0) (= |__VERIFIER_assert_#in~cond| 1) (not (<= (mod v_main_~index~0_BEFORE_CALL_13 4294967296) 2147483647)) (<= |#NULL.base| 0) (<= 0 v_main_~index~0_BEFORE_CALL_13) (<= 0 |#NULL.base|) (= (mod (select (select |#memory_int| |v_main_~#array~0.base_BEFORE_CALL_13|) (+ (* 4 (mod v_main_~index~0_BEFORE_CALL_13 4294967296)) (- 17179869184))) 4294967296) 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (< (mod v_main_~index~0_BEFORE_CALL_13 4294967296) 0) (not (= (mod v_main_~index~0_BEFORE_CALL_13 2) 0)) (= (mod (+ (mod v_main_~index~0_BEFORE_CALL_13 2) 4294967294) 4294967296) 0) (= |#NULL.offset| 0)) (and (= |#NULL.base| 0) (= |__VERIFIER_assert_#in~cond| 0) (<= |#NULL.base| 0) (<= (mod v_prenex_106 4294967296) 2147483647) (<= 0 |#NULL.base|) (not (= 0 (mod (select (select |#memory_int| v_prenex_105) (* 4 (mod v_prenex_106 4294967296))) 4294967296))) (<= 0 v_prenex_106) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (= (mod v_prenex_106 2) 0)) (and (= |#NULL.base| 0) (= |__VERIFIER_assert_#in~cond| 0) (not (<= (mod v_main_~index~0_BEFORE_CALL_13 4294967296) 2147483647)) (<= |#NULL.base| 0) (<= 0 v_main_~index~0_BEFORE_CALL_13) (<= 0 |#NULL.base|) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (< (mod v_main_~index~0_BEFORE_CALL_13 4294967296) 0) (not (= (mod v_main_~index~0_BEFORE_CALL_13 2) 0)) (not (= (mod (select (select |#memory_int| |v_main_~#array~0.base_BEFORE_CALL_13|) (+ (* 4 (mod v_main_~index~0_BEFORE_CALL_13 4294967296)) (- 17179869184))) 4294967296) 0)) (= (mod (+ (mod v_main_~index~0_BEFORE_CALL_13 2) 4294967294) 4294967296) 0) (= |#NULL.offset| 0)) (and (= |#NULL.base| 0) (= |__VERIFIER_assert_#in~cond| 0) (<= |#NULL.base| 0) (< (mod v_prenex_106 4294967296) 0) (<= (mod v_prenex_106 4294967296) 2147483647) (<= 0 |#NULL.base|) (<= 0 v_prenex_106) (not (= 0 (mod (select (select |#memory_int| v_prenex_105) (* 4 (mod v_prenex_106 4294967296))) 4294967296))) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (not (= (mod v_prenex_106 2) 0)) (= (mod (+ (mod v_prenex_106 2) 4294967294) 4294967296) 0) (= |#NULL.offset| 0)) (and (= |#NULL.base| 0) (= |__VERIFIER_assert_#in~cond| 1) (not (<= (mod v_main_~index~0_BEFORE_CALL_13 4294967296) 2147483647)) (<= |#NULL.base| 0) (<= 0 v_main_~index~0_BEFORE_CALL_13) (<= 0 |#NULL.base|) (= (mod (select (select |#memory_int| |v_main_~#array~0.base_BEFORE_CALL_13|) (+ (* 4 (mod v_main_~index~0_BEFORE_CALL_13 4294967296)) (- 17179869184))) 4294967296) 0) (= |#NULL.offset| 0) (= (mod v_main_~index~0_BEFORE_CALL_13 2) 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) (and (= |#NULL.base| 0) (= |__VERIFIER_assert_#in~cond| 1) (<= |#NULL.base| 0) (< (mod v_prenex_106 4294967296) 0) (<= (mod v_prenex_106 4294967296) 2147483647) (<= 0 |#NULL.base|) (<= 0 v_prenex_106) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (not (= (mod v_prenex_106 2) 0)) (= (mod (+ (mod v_prenex_106 2) 4294967294) 4294967296) 0) (= 0 (mod (select (select |#memory_int| v_prenex_105) (* 4 (mod v_prenex_106 4294967296))) 4294967296)) (= |#NULL.offset| 0)) (and (= |#NULL.base| 0) (= |__VERIFIER_assert_#in~cond| 0) (not (<= (mod v_main_~index~0_BEFORE_CALL_13 4294967296) 2147483647)) (<= |#NULL.base| 0) (<= 0 v_main_~index~0_BEFORE_CALL_13) (<= 0 |#NULL.base|) (not (= (mod (select (select |#memory_int| |v_main_~#array~0.base_BEFORE_CALL_13|) (+ (* 4 (mod v_main_~index~0_BEFORE_CALL_13 4294967296)) (- 17179869184))) 4294967296) 0)) (= |#NULL.offset| 0) (= (mod v_main_~index~0_BEFORE_CALL_13 2) 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)))) (= 0 __VERIFIER_assert_~cond) (= |__VERIFIER_assert_#in~cond| __VERIFIER_assert_~cond))) (<= __VERIFIER_assert_~cond 0) (<= 0 |__VERIFIER_assert_#in~cond|) (<= |__VERIFIER_assert_#in~cond| 0) (<= 0 __VERIFIER_assert_~cond)) [2019-10-07 13:32:24,627 INFO L193 IcfgInterpreter]: Reachable states at location L27-1 satisfy 204#(and (= |#NULL.base| 0) (= |main_~#array~0.offset| 0) (<= |main_~#array~0.offset| 0) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (<= 0 main_~index~0) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (<= 0 |main_~#array~0.offset|)) [2019-10-07 13:32:24,627 INFO L193 IcfgInterpreter]: Reachable states at location L26 satisfy 177#(and (= |#NULL.base| 0) (= |main_~#array~0.offset| 0) (<= |main_~#array~0.offset| 0) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (<= 0 main_~index~0) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (<= 0 |main_~#array~0.offset|)) [2019-10-07 13:32:24,627 INFO L193 IcfgInterpreter]: Reachable states at location L-1 satisfy 23#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= 0 (select |#valid| 0)) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-07 13:32:24,628 INFO L193 IcfgInterpreter]: Reachable states at location mainENTRY satisfy 33#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= |#valid| |old(#valid)|) (<= 0 |#NULL.base|) (= |#memory_int| |old(#memory_int)|) (= |#NULL.offset| 0) (= |old(#length)| |#length|) (= 0 (select |old(#valid)| 0)) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-07 13:32:24,628 INFO L193 IcfgInterpreter]: Reachable states at location L27 satisfy 188#(and (= |#NULL.base| 0) (= |main_~#array~0.offset| 0) (<= |main_~#array~0.offset| 0) (<= |#NULL.base| 0) (= (select (select |#memory_int| |main_~#array~0.base|) (+ (* 4 (ite (<= (mod main_~index~0 4294967296) 2147483647) (mod main_~index~0 4294967296) (+ (mod main_~index~0 4294967296) (- 4294967296)))) |main_~#array~0.offset|)) |main_#t~mem2|) (<= 0 |#NULL.base|) (<= 0 main_~index~0) (= |#NULL.offset| 0) (= (mod (ite (and (< (mod main_~index~0 4294967296) 0) (not (= (mod main_~index~0 2) 0))) (+ (mod main_~index~0 2) (- 2)) (mod main_~index~0 2)) 4294967296) 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (<= 0 |main_~#array~0.offset|)) [2019-10-07 13:32:24,628 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initEXIT satisfy 278#(and (= |#valid| (store |old(#valid)| 0 0)) (= 0 |#NULL.base|) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-07 13:32:24,628 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.startENTRY satisfy 6#true [2019-10-07 13:32:24,629 INFO L193 IcfgInterpreter]: Reachable states at location L21-3 satisfy 81#(and (or (and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= 0 |main_~#array~0.offset|) (= (select |old(#valid)| |main_~#array~0.base|) 0) (< |main_~#array~0.base| |#StackHeapBarrier|) (= |#valid| (store |old(#valid)| |main_~#array~0.base| 1)) (= 0 (select |old(#valid)| 0)) (not (= |main_~#array~0.base| 0)) (<= |main_~#array~0.offset| 0) (= 0 main_~index~0) (= |#memory_int| |old(#memory_int)|) (= |#NULL.offset| 0) (= (store |old(#length)| |main_~#array~0.base| 4000) |#length|) (<= main_~index~0 0)) (and (= |#NULL.base| 0) (= |main_~#array~0.offset| 0) (<= |main_~#array~0.offset| 0) (<= |#NULL.base| 0) (= |#NULL.offset| 0))) (<= 0 |#NULL.base|) (<= 0 main_~index~0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (<= 0 |main_~#array~0.offset|)) [2019-10-07 13:32:24,629 INFO L193 IcfgInterpreter]: Reachable states at location L29 satisfy 182#(and (= |#NULL.base| 0) (= |main_~#array~0.offset| 0) (<= |main_~#array~0.offset| 0) (<= |#NULL.base| 0) (= (select (select |#memory_int| |main_~#array~0.base|) (+ (* 4 (ite (<= (mod main_~index~0 4294967296) 2147483647) (mod main_~index~0 4294967296) (+ (mod main_~index~0 4294967296) (- 4294967296)))) |main_~#array~0.offset|)) |main_#t~mem3|) (<= 0 |#NULL.base|) (not (= (mod (ite (and (< (mod main_~index~0 4294967296) 0) (not (= (mod main_~index~0 2) 0))) (+ (mod main_~index~0 2) (- 2)) (mod main_~index~0 2)) 4294967296) 0)) (<= 0 main_~index~0) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (<= 0 |main_~#array~0.offset|)) [2019-10-07 13:32:24,630 INFO L193 IcfgInterpreter]: Reachable states at location __VERIFIER_assertENTRY satisfy 244#(or (exists ((v_prenex_105 Int) (v_prenex_106 Int) (|v_main_~#array~0.base_BEFORE_CALL_13| Int) (v_main_~index~0_BEFORE_CALL_13 Int)) (or (and (= |#NULL.base| 0) (= |__VERIFIER_assert_#in~cond| 1) (<= |#NULL.base| 0) (= 0 (mod (select (select |#memory_int| v_prenex_105) (* 4 (mod v_prenex_106 4294967296))) 4294967296)) (<= (mod v_prenex_106 4294967296) 2147483647) (<= 0 |#NULL.base|) (<= 0 v_prenex_106) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (= (mod v_prenex_106 2) 0)) (and (= |#NULL.base| 0) (= |__VERIFIER_assert_#in~cond| 1) (not (<= (mod v_main_~index~0_BEFORE_CALL_13 4294967296) 2147483647)) (<= |#NULL.base| 0) (<= 0 v_main_~index~0_BEFORE_CALL_13) (<= 0 |#NULL.base|) (= (mod (select (select |#memory_int| |v_main_~#array~0.base_BEFORE_CALL_13|) (+ (* 4 (mod v_main_~index~0_BEFORE_CALL_13 4294967296)) (- 17179869184))) 4294967296) 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (< (mod v_main_~index~0_BEFORE_CALL_13 4294967296) 0) (not (= (mod v_main_~index~0_BEFORE_CALL_13 2) 0)) (= (mod (+ (mod v_main_~index~0_BEFORE_CALL_13 2) 4294967294) 4294967296) 0) (= |#NULL.offset| 0)) (and (= |#NULL.base| 0) (= |__VERIFIER_assert_#in~cond| 0) (<= |#NULL.base| 0) (<= (mod v_prenex_106 4294967296) 2147483647) (<= 0 |#NULL.base|) (not (= 0 (mod (select (select |#memory_int| v_prenex_105) (* 4 (mod v_prenex_106 4294967296))) 4294967296))) (<= 0 v_prenex_106) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (= (mod v_prenex_106 2) 0)) (and (= |#NULL.base| 0) (= |__VERIFIER_assert_#in~cond| 0) (not (<= (mod v_main_~index~0_BEFORE_CALL_13 4294967296) 2147483647)) (<= |#NULL.base| 0) (<= 0 v_main_~index~0_BEFORE_CALL_13) (<= 0 |#NULL.base|) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (< (mod v_main_~index~0_BEFORE_CALL_13 4294967296) 0) (not (= (mod v_main_~index~0_BEFORE_CALL_13 2) 0)) (not (= (mod (select (select |#memory_int| |v_main_~#array~0.base_BEFORE_CALL_13|) (+ (* 4 (mod v_main_~index~0_BEFORE_CALL_13 4294967296)) (- 17179869184))) 4294967296) 0)) (= (mod (+ (mod v_main_~index~0_BEFORE_CALL_13 2) 4294967294) 4294967296) 0) (= |#NULL.offset| 0)) (and (= |#NULL.base| 0) (= |__VERIFIER_assert_#in~cond| 0) (<= |#NULL.base| 0) (< (mod v_prenex_106 4294967296) 0) (<= (mod v_prenex_106 4294967296) 2147483647) (<= 0 |#NULL.base|) (<= 0 v_prenex_106) (not (= 0 (mod (select (select |#memory_int| v_prenex_105) (* 4 (mod v_prenex_106 4294967296))) 4294967296))) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (not (= (mod v_prenex_106 2) 0)) (= (mod (+ (mod v_prenex_106 2) 4294967294) 4294967296) 0) (= |#NULL.offset| 0)) (and (= |#NULL.base| 0) (= |__VERIFIER_assert_#in~cond| 1) (not (<= (mod v_main_~index~0_BEFORE_CALL_13 4294967296) 2147483647)) (<= |#NULL.base| 0) (<= 0 v_main_~index~0_BEFORE_CALL_13) (<= 0 |#NULL.base|) (= (mod (select (select |#memory_int| |v_main_~#array~0.base_BEFORE_CALL_13|) (+ (* 4 (mod v_main_~index~0_BEFORE_CALL_13 4294967296)) (- 17179869184))) 4294967296) 0) (= |#NULL.offset| 0) (= (mod v_main_~index~0_BEFORE_CALL_13 2) 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) (and (= |#NULL.base| 0) (= |__VERIFIER_assert_#in~cond| 1) (<= |#NULL.base| 0) (< (mod v_prenex_106 4294967296) 0) (<= (mod v_prenex_106 4294967296) 2147483647) (<= 0 |#NULL.base|) (<= 0 v_prenex_106) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (not (= (mod v_prenex_106 2) 0)) (= (mod (+ (mod v_prenex_106 2) 4294967294) 4294967296) 0) (= 0 (mod (select (select |#memory_int| v_prenex_105) (* 4 (mod v_prenex_106 4294967296))) 4294967296)) (= |#NULL.offset| 0)) (and (= |#NULL.base| 0) (= |__VERIFIER_assert_#in~cond| 0) (not (<= (mod v_main_~index~0_BEFORE_CALL_13 4294967296) 2147483647)) (<= |#NULL.base| 0) (<= 0 v_main_~index~0_BEFORE_CALL_13) (<= 0 |#NULL.base|) (not (= (mod (select (select |#memory_int| |v_main_~#array~0.base_BEFORE_CALL_13|) (+ (* 4 (mod v_main_~index~0_BEFORE_CALL_13 4294967296)) (- 17179869184))) 4294967296) 0)) (= |#NULL.offset| 0) (= (mod v_main_~index~0_BEFORE_CALL_13 2) 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)))) (exists ((v_prenex_67 Int) (v_prenex_66 Int) (v_prenex_69 Int) (v_prenex_68 Int) (v_prenex_63 Int) (v_prenex_62 Int) (v_prenex_65 Int) (v_prenex_64 Int) (v_prenex_80 Int) (v_prenex_61 Int) (v_prenex_60 Int) (v_main_~index~0_BEFORE_CALL_10 Int) (v_prenex_59 Int) (v_prenex_78 Int) (v_prenex_77 Int) (v_prenex_79 Int) (v_prenex_74 Int) (v_prenex_73 Int) (v_prenex_76 Int) (v_prenex_75 Int) (v_prenex_70 Int) (v_prenex_72 Int) (v_prenex_71 Int) (|v_main_~#array~0.base_BEFORE_CALL_10| Int)) (or (and (= |#NULL.base| 0) (not (= 0 (mod v_prenex_76 2))) (= |__VERIFIER_assert_#in~cond| 0) (<= |#NULL.base| 0) (<= (mod v_prenex_76 4294967296) 2147483647) (<= 0 v_prenex_76) (<= 0 |#NULL.base|) (not (= 0 (mod (+ (mod v_prenex_76 2) 4294967294) 4294967296))) (< (mod v_prenex_76 4294967296) 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (= 0 (mod (select (select |#memory_int| v_prenex_75) (* 4 (mod v_prenex_76 4294967296))) 4294967296)) (= |#NULL.offset| 0)) (and (= |#NULL.base| 0) (= |__VERIFIER_assert_#in~cond| 0) (<= 0 v_prenex_78) (not (= 0 (mod v_prenex_78 2))) (<= |#NULL.base| 0) (= 0 (mod (select (select |#memory_int| v_prenex_77) (+ (* 4 (mod v_prenex_78 4294967296)) (- 17179869184))) 4294967296)) (<= 0 |#NULL.base|) (not (<= (mod v_prenex_78 4294967296) 2147483647)) (= |#NULL.offset| 0) (not (< (mod v_prenex_78 4294967296) 0)) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) (and (= |#NULL.base| 0) (= |__VERIFIER_assert_#in~cond| 1) (not (<= (mod v_prenex_64 4294967296) 2147483647)) (not (= 0 (mod v_prenex_64 2))) (not (= 0 (mod (select (select |#memory_int| v_prenex_63) (+ (* 4 (mod v_prenex_64 4294967296)) (- 17179869184))) 4294967296))) (<= |#NULL.base| 0) (<= 0 v_prenex_64) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (not (= 0 (mod (+ (mod v_prenex_64 2) 4294967294) 4294967296))) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) (and (= |#NULL.base| 0) (= |__VERIFIER_assert_#in~cond| 0) (= 0 (mod (select (select |#memory_int| v_prenex_71) (+ (* 4 (mod v_prenex_72 4294967296)) (- 17179869184))) 4294967296)) (not (= 0 (mod v_prenex_72 2))) (<= |#NULL.base| 0) (<= 0 v_prenex_72) (<= 0 |#NULL.base|) (not (= 0 (mod (+ (mod v_prenex_72 2) 4294967294) 4294967296))) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (not (<= (mod v_prenex_72 4294967296) 2147483647)) (= |#NULL.offset| 0) (< (mod v_prenex_72 4294967296) 0)) (and (= |#NULL.base| 0) (= |__VERIFIER_assert_#in~cond| 1) (<= 0 v_prenex_66) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (not (= 0 (mod (+ (mod v_prenex_66 2) 4294967294) 4294967296))) (<= (mod v_prenex_66 4294967296) 2147483647) (< (mod v_prenex_66 4294967296) 0) (not (= 0 (mod v_prenex_66 2))) (= |#NULL.offset| 0) (not (= 0 (mod (select (select |#memory_int| v_prenex_65) (* 4 (mod v_prenex_66 4294967296))) 4294967296)))) (and (= |#NULL.base| 0) (= |__VERIFIER_assert_#in~cond| 0) (<= 0 v_prenex_70) (<= |#NULL.base| 0) (= 0 (mod (select (select |#memory_int| v_prenex_69) (+ (* 4 (mod v_prenex_70 4294967296)) (- 17179869184))) 4294967296)) (<= 0 |#NULL.base|) (not (= 0 (mod v_prenex_70 2))) (not (<= (mod v_prenex_70 4294967296) 2147483647)) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (not (= 0 (mod (+ (mod v_prenex_70 2) 4294967294) 4294967296)))) (and (= |#NULL.base| 0) (= |__VERIFIER_assert_#in~cond| 1) (not (= 0 (mod (select (select |#memory_int| v_prenex_61) (* 4 (mod v_prenex_62 4294967296))) 4294967296))) (<= |#NULL.base| 0) (not (< (mod v_prenex_62 4294967296) 0)) (<= (mod v_prenex_62 4294967296) 2147483647) (<= 0 |#NULL.base|) (<= 0 v_prenex_62) (= |#NULL.offset| 0) (not (= 0 (mod v_prenex_62 2))) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) (and (= |#NULL.base| 0) (not (= 0 (mod v_prenex_74 2))) (= |__VERIFIER_assert_#in~cond| 0) (<= |#NULL.base| 0) (<= 0 v_prenex_74) (<= (mod v_prenex_74 4294967296) 2147483647) (= 0 (mod (select (select |#memory_int| v_prenex_73) (* 4 (mod v_prenex_74 4294967296))) 4294967296)) (<= 0 |#NULL.base|) (not (< (mod v_prenex_74 4294967296) 0)) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) (and (= |#NULL.base| 0) (= |__VERIFIER_assert_#in~cond| 1) (<= |#NULL.base| 0) (not (= 0 (mod v_prenex_60 2))) (<= 0 |#NULL.base|) (not (<= (mod v_prenex_60 4294967296) 2147483647)) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (< (mod v_prenex_60 4294967296) 0) (not (= 0 (mod (select (select |#memory_int| v_prenex_59) (+ (* 4 (mod v_prenex_60 4294967296)) (- 17179869184))) 4294967296))) (not (= 0 (mod (+ (mod v_prenex_60 2) 4294967294) 4294967296))) (<= 0 v_prenex_60) (= |#NULL.offset| 0)) (and (= |#NULL.base| 0) (<= 0 v_main_~index~0_BEFORE_CALL_10) (= |__VERIFIER_assert_#in~cond| 1) (<= (mod v_main_~index~0_BEFORE_CALL_10 4294967296) 2147483647) (not (= 0 (mod (select (select |#memory_int| |v_main_~#array~0.base_BEFORE_CALL_10|) (* 4 (mod v_main_~index~0_BEFORE_CALL_10 4294967296))) 4294967296))) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (not (= 0 (mod (+ (mod v_main_~index~0_BEFORE_CALL_10 2) 4294967294) 4294967296))) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (not (= 0 (mod v_main_~index~0_BEFORE_CALL_10 2)))) (and (= |#NULL.base| 0) (= |__VERIFIER_assert_#in~cond| 0) (<= 0 v_prenex_80) (<= |#NULL.base| 0) (not (= 0 (mod (+ (mod v_prenex_80 2) 4294967294) 4294967296))) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (= 0 (mod (select (select |#memory_int| v_prenex_79) (* 4 (mod v_prenex_80 4294967296))) 4294967296)) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (not (= 0 (mod v_prenex_80 2))) (<= (mod v_prenex_80 4294967296) 2147483647)) (and (= |#NULL.base| 0) (not (= 0 (mod v_prenex_68 2))) (= |__VERIFIER_assert_#in~cond| 1) (not (<= (mod v_prenex_68 4294967296) 2147483647)) (<= |#NULL.base| 0) (not (< (mod v_prenex_68 4294967296) 0)) (not (= 0 (mod (select (select |#memory_int| v_prenex_67) (+ (* 4 (mod v_prenex_68 4294967296)) (- 17179869184))) 4294967296))) (<= 0 |#NULL.base|) (<= 0 v_prenex_68) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0))))) [2019-10-07 13:32:24,630 INFO L193 IcfgInterpreter]: Reachable states at location L10 satisfy 249#(or (and (exists ((v_prenex_105 Int) (v_prenex_106 Int) (|v_main_~#array~0.base_BEFORE_CALL_13| Int) (v_main_~index~0_BEFORE_CALL_13 Int)) (or (and (= |#NULL.base| 0) (= |__VERIFIER_assert_#in~cond| 1) (<= |#NULL.base| 0) (= 0 (mod (select (select |#memory_int| v_prenex_105) (* 4 (mod v_prenex_106 4294967296))) 4294967296)) (<= (mod v_prenex_106 4294967296) 2147483647) (<= 0 |#NULL.base|) (<= 0 v_prenex_106) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (= (mod v_prenex_106 2) 0)) (and (= |#NULL.base| 0) (= |__VERIFIER_assert_#in~cond| 1) (not (<= (mod v_main_~index~0_BEFORE_CALL_13 4294967296) 2147483647)) (<= |#NULL.base| 0) (<= 0 v_main_~index~0_BEFORE_CALL_13) (<= 0 |#NULL.base|) (= (mod (select (select |#memory_int| |v_main_~#array~0.base_BEFORE_CALL_13|) (+ (* 4 (mod v_main_~index~0_BEFORE_CALL_13 4294967296)) (- 17179869184))) 4294967296) 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (< (mod v_main_~index~0_BEFORE_CALL_13 4294967296) 0) (not (= (mod v_main_~index~0_BEFORE_CALL_13 2) 0)) (= (mod (+ (mod v_main_~index~0_BEFORE_CALL_13 2) 4294967294) 4294967296) 0) (= |#NULL.offset| 0)) (and (= |#NULL.base| 0) (= |__VERIFIER_assert_#in~cond| 0) (<= |#NULL.base| 0) (<= (mod v_prenex_106 4294967296) 2147483647) (<= 0 |#NULL.base|) (not (= 0 (mod (select (select |#memory_int| v_prenex_105) (* 4 (mod v_prenex_106 4294967296))) 4294967296))) (<= 0 v_prenex_106) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (= (mod v_prenex_106 2) 0)) (and (= |#NULL.base| 0) (= |__VERIFIER_assert_#in~cond| 0) (not (<= (mod v_main_~index~0_BEFORE_CALL_13 4294967296) 2147483647)) (<= |#NULL.base| 0) (<= 0 v_main_~index~0_BEFORE_CALL_13) (<= 0 |#NULL.base|) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (< (mod v_main_~index~0_BEFORE_CALL_13 4294967296) 0) (not (= (mod v_main_~index~0_BEFORE_CALL_13 2) 0)) (not (= (mod (select (select |#memory_int| |v_main_~#array~0.base_BEFORE_CALL_13|) (+ (* 4 (mod v_main_~index~0_BEFORE_CALL_13 4294967296)) (- 17179869184))) 4294967296) 0)) (= (mod (+ (mod v_main_~index~0_BEFORE_CALL_13 2) 4294967294) 4294967296) 0) (= |#NULL.offset| 0)) (and (= |#NULL.base| 0) (= |__VERIFIER_assert_#in~cond| 0) (<= |#NULL.base| 0) (< (mod v_prenex_106 4294967296) 0) (<= (mod v_prenex_106 4294967296) 2147483647) (<= 0 |#NULL.base|) (<= 0 v_prenex_106) (not (= 0 (mod (select (select |#memory_int| v_prenex_105) (* 4 (mod v_prenex_106 4294967296))) 4294967296))) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (not (= (mod v_prenex_106 2) 0)) (= (mod (+ (mod v_prenex_106 2) 4294967294) 4294967296) 0) (= |#NULL.offset| 0)) (and (= |#NULL.base| 0) (= |__VERIFIER_assert_#in~cond| 1) (not (<= (mod v_main_~index~0_BEFORE_CALL_13 4294967296) 2147483647)) (<= |#NULL.base| 0) (<= 0 v_main_~index~0_BEFORE_CALL_13) (<= 0 |#NULL.base|) (= (mod (select (select |#memory_int| |v_main_~#array~0.base_BEFORE_CALL_13|) (+ (* 4 (mod v_main_~index~0_BEFORE_CALL_13 4294967296)) (- 17179869184))) 4294967296) 0) (= |#NULL.offset| 0) (= (mod v_main_~index~0_BEFORE_CALL_13 2) 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) (and (= |#NULL.base| 0) (= |__VERIFIER_assert_#in~cond| 1) (<= |#NULL.base| 0) (< (mod v_prenex_106 4294967296) 0) (<= (mod v_prenex_106 4294967296) 2147483647) (<= 0 |#NULL.base|) (<= 0 v_prenex_106) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (not (= (mod v_prenex_106 2) 0)) (= (mod (+ (mod v_prenex_106 2) 4294967294) 4294967296) 0) (= 0 (mod (select (select |#memory_int| v_prenex_105) (* 4 (mod v_prenex_106 4294967296))) 4294967296)) (= |#NULL.offset| 0)) (and (= |#NULL.base| 0) (= |__VERIFIER_assert_#in~cond| 0) (not (<= (mod v_main_~index~0_BEFORE_CALL_13 4294967296) 2147483647)) (<= |#NULL.base| 0) (<= 0 v_main_~index~0_BEFORE_CALL_13) (<= 0 |#NULL.base|) (not (= (mod (select (select |#memory_int| |v_main_~#array~0.base_BEFORE_CALL_13|) (+ (* 4 (mod v_main_~index~0_BEFORE_CALL_13 4294967296)) (- 17179869184))) 4294967296) 0)) (= |#NULL.offset| 0) (= (mod v_main_~index~0_BEFORE_CALL_13 2) 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)))) (= |__VERIFIER_assert_#in~cond| __VERIFIER_assert_~cond)) (and (exists ((v_prenex_67 Int) (v_prenex_66 Int) (v_prenex_69 Int) (v_prenex_68 Int) (v_prenex_63 Int) (v_prenex_62 Int) (v_prenex_65 Int) (v_prenex_64 Int) (v_prenex_80 Int) (v_prenex_61 Int) (v_prenex_60 Int) (v_main_~index~0_BEFORE_CALL_10 Int) (v_prenex_59 Int) (v_prenex_78 Int) (v_prenex_77 Int) (v_prenex_79 Int) (v_prenex_74 Int) (v_prenex_73 Int) (v_prenex_76 Int) (v_prenex_75 Int) (v_prenex_70 Int) (v_prenex_72 Int) (v_prenex_71 Int) (|v_main_~#array~0.base_BEFORE_CALL_10| Int)) (or (and (= |#NULL.base| 0) (not (= 0 (mod v_prenex_76 2))) (= |__VERIFIER_assert_#in~cond| 0) (<= |#NULL.base| 0) (<= (mod v_prenex_76 4294967296) 2147483647) (<= 0 v_prenex_76) (<= 0 |#NULL.base|) (not (= 0 (mod (+ (mod v_prenex_76 2) 4294967294) 4294967296))) (< (mod v_prenex_76 4294967296) 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (= 0 (mod (select (select |#memory_int| v_prenex_75) (* 4 (mod v_prenex_76 4294967296))) 4294967296)) (= |#NULL.offset| 0)) (and (= |#NULL.base| 0) (= |__VERIFIER_assert_#in~cond| 0) (<= 0 v_prenex_78) (not (= 0 (mod v_prenex_78 2))) (<= |#NULL.base| 0) (= 0 (mod (select (select |#memory_int| v_prenex_77) (+ (* 4 (mod v_prenex_78 4294967296)) (- 17179869184))) 4294967296)) (<= 0 |#NULL.base|) (not (<= (mod v_prenex_78 4294967296) 2147483647)) (= |#NULL.offset| 0) (not (< (mod v_prenex_78 4294967296) 0)) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) (and (= |#NULL.base| 0) (= |__VERIFIER_assert_#in~cond| 1) (not (<= (mod v_prenex_64 4294967296) 2147483647)) (not (= 0 (mod v_prenex_64 2))) (not (= 0 (mod (select (select |#memory_int| v_prenex_63) (+ (* 4 (mod v_prenex_64 4294967296)) (- 17179869184))) 4294967296))) (<= |#NULL.base| 0) (<= 0 v_prenex_64) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (not (= 0 (mod (+ (mod v_prenex_64 2) 4294967294) 4294967296))) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) (and (= |#NULL.base| 0) (= |__VERIFIER_assert_#in~cond| 0) (= 0 (mod (select (select |#memory_int| v_prenex_71) (+ (* 4 (mod v_prenex_72 4294967296)) (- 17179869184))) 4294967296)) (not (= 0 (mod v_prenex_72 2))) (<= |#NULL.base| 0) (<= 0 v_prenex_72) (<= 0 |#NULL.base|) (not (= 0 (mod (+ (mod v_prenex_72 2) 4294967294) 4294967296))) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (not (<= (mod v_prenex_72 4294967296) 2147483647)) (= |#NULL.offset| 0) (< (mod v_prenex_72 4294967296) 0)) (and (= |#NULL.base| 0) (= |__VERIFIER_assert_#in~cond| 1) (<= 0 v_prenex_66) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (not (= 0 (mod (+ (mod v_prenex_66 2) 4294967294) 4294967296))) (<= (mod v_prenex_66 4294967296) 2147483647) (< (mod v_prenex_66 4294967296) 0) (not (= 0 (mod v_prenex_66 2))) (= |#NULL.offset| 0) (not (= 0 (mod (select (select |#memory_int| v_prenex_65) (* 4 (mod v_prenex_66 4294967296))) 4294967296)))) (and (= |#NULL.base| 0) (= |__VERIFIER_assert_#in~cond| 0) (<= 0 v_prenex_70) (<= |#NULL.base| 0) (= 0 (mod (select (select |#memory_int| v_prenex_69) (+ (* 4 (mod v_prenex_70 4294967296)) (- 17179869184))) 4294967296)) (<= 0 |#NULL.base|) (not (= 0 (mod v_prenex_70 2))) (not (<= (mod v_prenex_70 4294967296) 2147483647)) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (not (= 0 (mod (+ (mod v_prenex_70 2) 4294967294) 4294967296)))) (and (= |#NULL.base| 0) (= |__VERIFIER_assert_#in~cond| 1) (not (= 0 (mod (select (select |#memory_int| v_prenex_61) (* 4 (mod v_prenex_62 4294967296))) 4294967296))) (<= |#NULL.base| 0) (not (< (mod v_prenex_62 4294967296) 0)) (<= (mod v_prenex_62 4294967296) 2147483647) (<= 0 |#NULL.base|) (<= 0 v_prenex_62) (= |#NULL.offset| 0) (not (= 0 (mod v_prenex_62 2))) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) (and (= |#NULL.base| 0) (not (= 0 (mod v_prenex_74 2))) (= |__VERIFIER_assert_#in~cond| 0) (<= |#NULL.base| 0) (<= 0 v_prenex_74) (<= (mod v_prenex_74 4294967296) 2147483647) (= 0 (mod (select (select |#memory_int| v_prenex_73) (* 4 (mod v_prenex_74 4294967296))) 4294967296)) (<= 0 |#NULL.base|) (not (< (mod v_prenex_74 4294967296) 0)) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) (and (= |#NULL.base| 0) (= |__VERIFIER_assert_#in~cond| 1) (<= |#NULL.base| 0) (not (= 0 (mod v_prenex_60 2))) (<= 0 |#NULL.base|) (not (<= (mod v_prenex_60 4294967296) 2147483647)) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (< (mod v_prenex_60 4294967296) 0) (not (= 0 (mod (select (select |#memory_int| v_prenex_59) (+ (* 4 (mod v_prenex_60 4294967296)) (- 17179869184))) 4294967296))) (not (= 0 (mod (+ (mod v_prenex_60 2) 4294967294) 4294967296))) (<= 0 v_prenex_60) (= |#NULL.offset| 0)) (and (= |#NULL.base| 0) (<= 0 v_main_~index~0_BEFORE_CALL_10) (= |__VERIFIER_assert_#in~cond| 1) (<= (mod v_main_~index~0_BEFORE_CALL_10 4294967296) 2147483647) (not (= 0 (mod (select (select |#memory_int| |v_main_~#array~0.base_BEFORE_CALL_10|) (* 4 (mod v_main_~index~0_BEFORE_CALL_10 4294967296))) 4294967296))) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (not (= 0 (mod (+ (mod v_main_~index~0_BEFORE_CALL_10 2) 4294967294) 4294967296))) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (not (= 0 (mod v_main_~index~0_BEFORE_CALL_10 2)))) (and (= |#NULL.base| 0) (= |__VERIFIER_assert_#in~cond| 0) (<= 0 v_prenex_80) (<= |#NULL.base| 0) (not (= 0 (mod (+ (mod v_prenex_80 2) 4294967294) 4294967296))) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (= 0 (mod (select (select |#memory_int| v_prenex_79) (* 4 (mod v_prenex_80 4294967296))) 4294967296)) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (not (= 0 (mod v_prenex_80 2))) (<= (mod v_prenex_80 4294967296) 2147483647)) (and (= |#NULL.base| 0) (not (= 0 (mod v_prenex_68 2))) (= |__VERIFIER_assert_#in~cond| 1) (not (<= (mod v_prenex_68 4294967296) 2147483647)) (<= |#NULL.base| 0) (not (< (mod v_prenex_68 4294967296) 0)) (not (= 0 (mod (select (select |#memory_int| v_prenex_67) (+ (* 4 (mod v_prenex_68 4294967296)) (- 17179869184))) 4294967296))) (<= 0 |#NULL.base|) (<= 0 v_prenex_68) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)))) (= |__VERIFIER_assert_#in~cond| __VERIFIER_assert_~cond))) [2019-10-07 13:32:24,631 INFO L193 IcfgInterpreter]: Reachable states at location L10-2 satisfy 264#(or (and (not (= 0 __VERIFIER_assert_~cond)) (exists ((v_prenex_67 Int) (v_prenex_66 Int) (v_prenex_69 Int) (v_prenex_68 Int) (v_prenex_63 Int) (v_prenex_62 Int) (v_prenex_65 Int) (v_prenex_64 Int) (v_prenex_80 Int) (v_prenex_61 Int) (v_prenex_60 Int) (v_main_~index~0_BEFORE_CALL_10 Int) (v_prenex_59 Int) (v_prenex_78 Int) (v_prenex_77 Int) (v_prenex_79 Int) (v_prenex_74 Int) (v_prenex_73 Int) (v_prenex_76 Int) (v_prenex_75 Int) (v_prenex_70 Int) (v_prenex_72 Int) (v_prenex_71 Int) (|v_main_~#array~0.base_BEFORE_CALL_10| Int)) (or (and (= |#NULL.base| 0) (not (= 0 (mod v_prenex_76 2))) (= |__VERIFIER_assert_#in~cond| 0) (<= |#NULL.base| 0) (<= (mod v_prenex_76 4294967296) 2147483647) (<= 0 v_prenex_76) (<= 0 |#NULL.base|) (not (= 0 (mod (+ (mod v_prenex_76 2) 4294967294) 4294967296))) (< (mod v_prenex_76 4294967296) 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (= 0 (mod (select (select |#memory_int| v_prenex_75) (* 4 (mod v_prenex_76 4294967296))) 4294967296)) (= |#NULL.offset| 0)) (and (= |#NULL.base| 0) (= |__VERIFIER_assert_#in~cond| 0) (<= 0 v_prenex_78) (not (= 0 (mod v_prenex_78 2))) (<= |#NULL.base| 0) (= 0 (mod (select (select |#memory_int| v_prenex_77) (+ (* 4 (mod v_prenex_78 4294967296)) (- 17179869184))) 4294967296)) (<= 0 |#NULL.base|) (not (<= (mod v_prenex_78 4294967296) 2147483647)) (= |#NULL.offset| 0) (not (< (mod v_prenex_78 4294967296) 0)) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) (and (= |#NULL.base| 0) (= |__VERIFIER_assert_#in~cond| 1) (not (<= (mod v_prenex_64 4294967296) 2147483647)) (not (= 0 (mod v_prenex_64 2))) (not (= 0 (mod (select (select |#memory_int| v_prenex_63) (+ (* 4 (mod v_prenex_64 4294967296)) (- 17179869184))) 4294967296))) (<= |#NULL.base| 0) (<= 0 v_prenex_64) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (not (= 0 (mod (+ (mod v_prenex_64 2) 4294967294) 4294967296))) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) (and (= |#NULL.base| 0) (= |__VERIFIER_assert_#in~cond| 0) (= 0 (mod (select (select |#memory_int| v_prenex_71) (+ (* 4 (mod v_prenex_72 4294967296)) (- 17179869184))) 4294967296)) (not (= 0 (mod v_prenex_72 2))) (<= |#NULL.base| 0) (<= 0 v_prenex_72) (<= 0 |#NULL.base|) (not (= 0 (mod (+ (mod v_prenex_72 2) 4294967294) 4294967296))) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (not (<= (mod v_prenex_72 4294967296) 2147483647)) (= |#NULL.offset| 0) (< (mod v_prenex_72 4294967296) 0)) (and (= |#NULL.base| 0) (= |__VERIFIER_assert_#in~cond| 1) (<= 0 v_prenex_66) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (not (= 0 (mod (+ (mod v_prenex_66 2) 4294967294) 4294967296))) (<= (mod v_prenex_66 4294967296) 2147483647) (< (mod v_prenex_66 4294967296) 0) (not (= 0 (mod v_prenex_66 2))) (= |#NULL.offset| 0) (not (= 0 (mod (select (select |#memory_int| v_prenex_65) (* 4 (mod v_prenex_66 4294967296))) 4294967296)))) (and (= |#NULL.base| 0) (= |__VERIFIER_assert_#in~cond| 0) (<= 0 v_prenex_70) (<= |#NULL.base| 0) (= 0 (mod (select (select |#memory_int| v_prenex_69) (+ (* 4 (mod v_prenex_70 4294967296)) (- 17179869184))) 4294967296)) (<= 0 |#NULL.base|) (not (= 0 (mod v_prenex_70 2))) (not (<= (mod v_prenex_70 4294967296) 2147483647)) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (not (= 0 (mod (+ (mod v_prenex_70 2) 4294967294) 4294967296)))) (and (= |#NULL.base| 0) (= |__VERIFIER_assert_#in~cond| 1) (not (= 0 (mod (select (select |#memory_int| v_prenex_61) (* 4 (mod v_prenex_62 4294967296))) 4294967296))) (<= |#NULL.base| 0) (not (< (mod v_prenex_62 4294967296) 0)) (<= (mod v_prenex_62 4294967296) 2147483647) (<= 0 |#NULL.base|) (<= 0 v_prenex_62) (= |#NULL.offset| 0) (not (= 0 (mod v_prenex_62 2))) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) (and (= |#NULL.base| 0) (not (= 0 (mod v_prenex_74 2))) (= |__VERIFIER_assert_#in~cond| 0) (<= |#NULL.base| 0) (<= 0 v_prenex_74) (<= (mod v_prenex_74 4294967296) 2147483647) (= 0 (mod (select (select |#memory_int| v_prenex_73) (* 4 (mod v_prenex_74 4294967296))) 4294967296)) (<= 0 |#NULL.base|) (not (< (mod v_prenex_74 4294967296) 0)) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) (and (= |#NULL.base| 0) (= |__VERIFIER_assert_#in~cond| 1) (<= |#NULL.base| 0) (not (= 0 (mod v_prenex_60 2))) (<= 0 |#NULL.base|) (not (<= (mod v_prenex_60 4294967296) 2147483647)) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (< (mod v_prenex_60 4294967296) 0) (not (= 0 (mod (select (select |#memory_int| v_prenex_59) (+ (* 4 (mod v_prenex_60 4294967296)) (- 17179869184))) 4294967296))) (not (= 0 (mod (+ (mod v_prenex_60 2) 4294967294) 4294967296))) (<= 0 v_prenex_60) (= |#NULL.offset| 0)) (and (= |#NULL.base| 0) (<= 0 v_main_~index~0_BEFORE_CALL_10) (= |__VERIFIER_assert_#in~cond| 1) (<= (mod v_main_~index~0_BEFORE_CALL_10 4294967296) 2147483647) (not (= 0 (mod (select (select |#memory_int| |v_main_~#array~0.base_BEFORE_CALL_10|) (* 4 (mod v_main_~index~0_BEFORE_CALL_10 4294967296))) 4294967296))) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (not (= 0 (mod (+ (mod v_main_~index~0_BEFORE_CALL_10 2) 4294967294) 4294967296))) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (not (= 0 (mod v_main_~index~0_BEFORE_CALL_10 2)))) (and (= |#NULL.base| 0) (= |__VERIFIER_assert_#in~cond| 0) (<= 0 v_prenex_80) (<= |#NULL.base| 0) (not (= 0 (mod (+ (mod v_prenex_80 2) 4294967294) 4294967296))) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (= 0 (mod (select (select |#memory_int| v_prenex_79) (* 4 (mod v_prenex_80 4294967296))) 4294967296)) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (not (= 0 (mod v_prenex_80 2))) (<= (mod v_prenex_80 4294967296) 2147483647)) (and (= |#NULL.base| 0) (not (= 0 (mod v_prenex_68 2))) (= |__VERIFIER_assert_#in~cond| 1) (not (<= (mod v_prenex_68 4294967296) 2147483647)) (<= |#NULL.base| 0) (not (< (mod v_prenex_68 4294967296) 0)) (not (= 0 (mod (select (select |#memory_int| v_prenex_67) (+ (* 4 (mod v_prenex_68 4294967296)) (- 17179869184))) 4294967296))) (<= 0 |#NULL.base|) (<= 0 v_prenex_68) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)))) (= |__VERIFIER_assert_#in~cond| __VERIFIER_assert_~cond)) (and (exists ((v_prenex_105 Int) (v_prenex_106 Int) (|v_main_~#array~0.base_BEFORE_CALL_13| Int) (v_main_~index~0_BEFORE_CALL_13 Int)) (or (and (= |#NULL.base| 0) (= |__VERIFIER_assert_#in~cond| 1) (<= |#NULL.base| 0) (= 0 (mod (select (select |#memory_int| v_prenex_105) (* 4 (mod v_prenex_106 4294967296))) 4294967296)) (<= (mod v_prenex_106 4294967296) 2147483647) (<= 0 |#NULL.base|) (<= 0 v_prenex_106) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (= (mod v_prenex_106 2) 0)) (and (= |#NULL.base| 0) (= |__VERIFIER_assert_#in~cond| 1) (not (<= (mod v_main_~index~0_BEFORE_CALL_13 4294967296) 2147483647)) (<= |#NULL.base| 0) (<= 0 v_main_~index~0_BEFORE_CALL_13) (<= 0 |#NULL.base|) (= (mod (select (select |#memory_int| |v_main_~#array~0.base_BEFORE_CALL_13|) (+ (* 4 (mod v_main_~index~0_BEFORE_CALL_13 4294967296)) (- 17179869184))) 4294967296) 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (< (mod v_main_~index~0_BEFORE_CALL_13 4294967296) 0) (not (= (mod v_main_~index~0_BEFORE_CALL_13 2) 0)) (= (mod (+ (mod v_main_~index~0_BEFORE_CALL_13 2) 4294967294) 4294967296) 0) (= |#NULL.offset| 0)) (and (= |#NULL.base| 0) (= |__VERIFIER_assert_#in~cond| 0) (<= |#NULL.base| 0) (<= (mod v_prenex_106 4294967296) 2147483647) (<= 0 |#NULL.base|) (not (= 0 (mod (select (select |#memory_int| v_prenex_105) (* 4 (mod v_prenex_106 4294967296))) 4294967296))) (<= 0 v_prenex_106) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (= (mod v_prenex_106 2) 0)) (and (= |#NULL.base| 0) (= |__VERIFIER_assert_#in~cond| 0) (not (<= (mod v_main_~index~0_BEFORE_CALL_13 4294967296) 2147483647)) (<= |#NULL.base| 0) (<= 0 v_main_~index~0_BEFORE_CALL_13) (<= 0 |#NULL.base|) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (< (mod v_main_~index~0_BEFORE_CALL_13 4294967296) 0) (not (= (mod v_main_~index~0_BEFORE_CALL_13 2) 0)) (not (= (mod (select (select |#memory_int| |v_main_~#array~0.base_BEFORE_CALL_13|) (+ (* 4 (mod v_main_~index~0_BEFORE_CALL_13 4294967296)) (- 17179869184))) 4294967296) 0)) (= (mod (+ (mod v_main_~index~0_BEFORE_CALL_13 2) 4294967294) 4294967296) 0) (= |#NULL.offset| 0)) (and (= |#NULL.base| 0) (= |__VERIFIER_assert_#in~cond| 0) (<= |#NULL.base| 0) (< (mod v_prenex_106 4294967296) 0) (<= (mod v_prenex_106 4294967296) 2147483647) (<= 0 |#NULL.base|) (<= 0 v_prenex_106) (not (= 0 (mod (select (select |#memory_int| v_prenex_105) (* 4 (mod v_prenex_106 4294967296))) 4294967296))) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (not (= (mod v_prenex_106 2) 0)) (= (mod (+ (mod v_prenex_106 2) 4294967294) 4294967296) 0) (= |#NULL.offset| 0)) (and (= |#NULL.base| 0) (= |__VERIFIER_assert_#in~cond| 1) (not (<= (mod v_main_~index~0_BEFORE_CALL_13 4294967296) 2147483647)) (<= |#NULL.base| 0) (<= 0 v_main_~index~0_BEFORE_CALL_13) (<= 0 |#NULL.base|) (= (mod (select (select |#memory_int| |v_main_~#array~0.base_BEFORE_CALL_13|) (+ (* 4 (mod v_main_~index~0_BEFORE_CALL_13 4294967296)) (- 17179869184))) 4294967296) 0) (= |#NULL.offset| 0) (= (mod v_main_~index~0_BEFORE_CALL_13 2) 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) (and (= |#NULL.base| 0) (= |__VERIFIER_assert_#in~cond| 1) (<= |#NULL.base| 0) (< (mod v_prenex_106 4294967296) 0) (<= (mod v_prenex_106 4294967296) 2147483647) (<= 0 |#NULL.base|) (<= 0 v_prenex_106) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (not (= (mod v_prenex_106 2) 0)) (= (mod (+ (mod v_prenex_106 2) 4294967294) 4294967296) 0) (= 0 (mod (select (select |#memory_int| v_prenex_105) (* 4 (mod v_prenex_106 4294967296))) 4294967296)) (= |#NULL.offset| 0)) (and (= |#NULL.base| 0) (= |__VERIFIER_assert_#in~cond| 0) (not (<= (mod v_main_~index~0_BEFORE_CALL_13 4294967296) 2147483647)) (<= |#NULL.base| 0) (<= 0 v_main_~index~0_BEFORE_CALL_13) (<= 0 |#NULL.base|) (not (= (mod (select (select |#memory_int| |v_main_~#array~0.base_BEFORE_CALL_13|) (+ (* 4 (mod v_main_~index~0_BEFORE_CALL_13 4294967296)) (- 17179869184))) 4294967296) 0)) (= |#NULL.offset| 0) (= (mod v_main_~index~0_BEFORE_CALL_13 2) 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)))) (not (= 0 __VERIFIER_assert_~cond)) (= |__VERIFIER_assert_#in~cond| __VERIFIER_assert_~cond))) [2019-10-07 13:32:24,996 WARN L191 SmtUtils]: Spent 182.00 ms on a formula simplification. DAG size of input: 300 DAG size of output: 295 [2019-10-07 13:32:35,302 INFO L211 tionRefinementEngine]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2019-10-07 13:32:35,303 INFO L224 tionRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 13, 11, 11] total 34 [2019-10-07 13:32:35,304 INFO L442 AbstractCegarLoop]: Interpolant automaton has 34 states [2019-10-07 13:32:35,304 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 34 interpolants. [2019-10-07 13:32:35,305 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=114, Invalid=1003, Unknown=5, NotChecked=0, Total=1122 [2019-10-07 13:32:35,305 INFO L87 Difference]: Start difference. First operand 32 states and 36 transitions. Second operand 34 states. [2019-10-07 13:32:38,842 WARN L191 SmtUtils]: Spent 2.22 s on a formula simplification. DAG size of input: 319 DAG size of output: 319 [2019-10-07 13:32:45,365 WARN L191 SmtUtils]: Spent 4.28 s on a formula simplification. DAG size of input: 323 DAG size of output: 321 [2019-10-07 13:32:54,100 WARN L191 SmtUtils]: Spent 6.35 s on a formula simplification. DAG size of input: 329 DAG size of output: 322 [2019-10-07 13:32:57,176 WARN L191 SmtUtils]: Spent 2.30 s on a formula simplification. DAG size of input: 320 DAG size of output: 320