java -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata ./data -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/default/automizer/svcomp-Reach-32bit-Automizer_Default.epf -i ../../../trunk/examples/svcomp/systemc/pc_sfifo_2.cil-2.c -------------------------------------------------------------------------------- This is Ultimate 0.1.24-f4eb214f-m [2019-10-13 19:50:57,421 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-10-13 19:50:57,424 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-10-13 19:50:57,444 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-10-13 19:50:57,444 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-10-13 19:50:57,447 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-10-13 19:50:57,449 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-10-13 19:50:57,462 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-10-13 19:50:57,464 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-10-13 19:50:57,465 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-10-13 19:50:57,466 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-10-13 19:50:57,469 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-10-13 19:50:57,469 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-10-13 19:50:57,473 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-10-13 19:50:57,475 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-10-13 19:50:57,477 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-10-13 19:50:57,479 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-10-13 19:50:57,482 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-10-13 19:50:57,483 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-10-13 19:50:57,487 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-10-13 19:50:57,488 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-10-13 19:50:57,489 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-10-13 19:50:57,490 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-10-13 19:50:57,491 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-10-13 19:50:57,493 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... 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[2019-10-13 19:50:57,495 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-10-13 19:50:57,496 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-10-13 19:50:57,497 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-10-13 19:50:57,498 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-10-13 19:50:57,499 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-10-13 19:50:57,499 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-10-13 19:50:57,500 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-10-13 19:50:57,500 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-10-13 19:50:57,500 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-10-13 19:50:57,501 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-10-13 19:50:57,501 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-10-13 19:50:57,502 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/default/automizer/svcomp-Reach-32bit-Automizer_Default.epf [2019-10-13 19:50:57,517 INFO L113 SettingsManager]: Loading preferences was successful [2019-10-13 19:50:57,517 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-10-13 19:50:57,518 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-10-13 19:50:57,519 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-10-13 19:50:57,519 INFO L138 SettingsManager]: * Use SBE=true [2019-10-13 19:50:57,519 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-10-13 19:50:57,519 INFO L138 SettingsManager]: * sizeof long=4 [2019-10-13 19:50:57,519 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-10-13 19:50:57,520 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-10-13 19:50:57,520 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-10-13 19:50:57,520 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-10-13 19:50:57,520 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-10-13 19:50:57,520 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-10-13 19:50:57,521 INFO L138 SettingsManager]: * sizeof long double=12 [2019-10-13 19:50:57,521 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-10-13 19:50:57,521 INFO L138 SettingsManager]: * Use constant arrays=true [2019-10-13 19:50:57,521 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-10-13 19:50:57,521 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-10-13 19:50:57,522 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-10-13 19:50:57,522 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-10-13 19:50:57,522 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-10-13 19:50:57,522 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-10-13 19:50:57,522 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-10-13 19:50:57,523 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-10-13 19:50:57,523 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-10-13 19:50:57,523 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-10-13 19:50:57,523 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-10-13 19:50:57,523 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-10-13 19:50:57,524 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2019-10-13 19:50:57,807 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-10-13 19:50:57,821 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-10-13 19:50:57,825 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-10-13 19:50:57,826 INFO L271 PluginConnector]: Initializing CDTParser... [2019-10-13 19:50:57,827 INFO L275 PluginConnector]: CDTParser initialized [2019-10-13 19:50:57,828 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/systemc/pc_sfifo_2.cil-2.c [2019-10-13 19:50:57,892 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/0b7df16a2/1533ea7df8a84e0fb97ea5373453fbdb/FLAG705ff67eb [2019-10-13 19:50:58,376 INFO L306 CDTParser]: Found 1 translation units. [2019-10-13 19:50:58,377 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/systemc/pc_sfifo_2.cil-2.c [2019-10-13 19:50:58,387 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/0b7df16a2/1533ea7df8a84e0fb97ea5373453fbdb/FLAG705ff67eb [2019-10-13 19:50:58,766 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/0b7df16a2/1533ea7df8a84e0fb97ea5373453fbdb [2019-10-13 19:50:58,777 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-10-13 19:50:58,779 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2019-10-13 19:50:58,780 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-10-13 19:50:58,780 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-10-13 19:50:58,784 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-10-13 19:50:58,785 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 13.10 07:50:58" (1/1) ... [2019-10-13 19:50:58,788 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@15161af2 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.10 07:50:58, skipping insertion in model container [2019-10-13 19:50:58,788 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 13.10 07:50:58" (1/1) ... [2019-10-13 19:50:58,796 INFO L142 MainTranslator]: Starting translation in SV-COMP mode [2019-10-13 19:50:58,832 INFO L173 MainTranslator]: Built tables and reachable declarations [2019-10-13 19:50:59,082 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-10-13 19:50:59,088 INFO L188 MainTranslator]: Completed pre-run [2019-10-13 19:50:59,244 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-10-13 19:50:59,273 INFO L192 MainTranslator]: Completed translation [2019-10-13 19:50:59,273 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.10 07:50:59 WrapperNode [2019-10-13 19:50:59,273 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-10-13 19:50:59,274 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-10-13 19:50:59,274 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-10-13 19:50:59,274 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-10-13 19:50:59,288 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.10 07:50:59" (1/1) ... [2019-10-13 19:50:59,289 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.10 07:50:59" (1/1) ... [2019-10-13 19:50:59,295 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.10 07:50:59" (1/1) ... [2019-10-13 19:50:59,296 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.10 07:50:59" (1/1) ... [2019-10-13 19:50:59,304 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.10 07:50:59" (1/1) ... [2019-10-13 19:50:59,314 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.10 07:50:59" (1/1) ... [2019-10-13 19:50:59,316 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.10 07:50:59" (1/1) ... [2019-10-13 19:50:59,320 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-10-13 19:50:59,320 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-10-13 19:50:59,320 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-10-13 19:50:59,320 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-10-13 19:50:59,321 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.10 07:50:59" (1/1) ... No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-10-13 19:50:59,374 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2019-10-13 19:50:59,374 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-10-13 19:50:59,375 INFO L138 BoogieDeclarations]: Found implementation of procedure error [2019-10-13 19:50:59,375 INFO L138 BoogieDeclarations]: Found implementation of procedure update_fifo_q [2019-10-13 19:50:59,375 INFO L138 BoogieDeclarations]: Found implementation of procedure is_do_write_p_triggered [2019-10-13 19:50:59,375 INFO L138 BoogieDeclarations]: Found implementation of procedure is_do_read_c_triggered [2019-10-13 19:50:59,375 INFO L138 BoogieDeclarations]: Found implementation of procedure immediate_notify_threads [2019-10-13 19:50:59,375 INFO L138 BoogieDeclarations]: Found implementation of procedure do_write_p [2019-10-13 19:50:59,376 INFO L138 BoogieDeclarations]: Found implementation of procedure do_read_c [2019-10-13 19:50:59,376 INFO L138 BoogieDeclarations]: Found implementation of procedure update_channels [2019-10-13 19:50:59,376 INFO L138 BoogieDeclarations]: Found implementation of procedure init_threads [2019-10-13 19:50:59,376 INFO L138 BoogieDeclarations]: Found implementation of procedure exists_runnable_thread [2019-10-13 19:50:59,376 INFO L138 BoogieDeclarations]: Found implementation of procedure fire_delta_events [2019-10-13 19:50:59,377 INFO L138 BoogieDeclarations]: Found implementation of procedure reset_delta_events [2019-10-13 19:50:59,377 INFO L138 BoogieDeclarations]: Found implementation of procedure activate_threads [2019-10-13 19:50:59,377 INFO L138 BoogieDeclarations]: Found implementation of procedure eval [2019-10-13 19:50:59,377 INFO L138 BoogieDeclarations]: Found implementation of procedure stop_simulation [2019-10-13 19:50:59,377 INFO L138 BoogieDeclarations]: Found implementation of procedure start_simulation [2019-10-13 19:50:59,377 INFO L138 BoogieDeclarations]: Found implementation of procedure init_model [2019-10-13 19:50:59,378 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2019-10-13 19:50:59,378 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_error [2019-10-13 19:50:59,378 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_int [2019-10-13 19:50:59,379 INFO L130 BoogieDeclarations]: Found specification of procedure error [2019-10-13 19:50:59,379 INFO L130 BoogieDeclarations]: Found specification of procedure update_fifo_q [2019-10-13 19:50:59,379 INFO L130 BoogieDeclarations]: Found specification of procedure is_do_write_p_triggered [2019-10-13 19:50:59,379 INFO L130 BoogieDeclarations]: Found specification of procedure is_do_read_c_triggered [2019-10-13 19:50:59,379 INFO L130 BoogieDeclarations]: Found specification of procedure immediate_notify_threads [2019-10-13 19:50:59,379 INFO L130 BoogieDeclarations]: Found specification of procedure do_write_p [2019-10-13 19:50:59,380 INFO L130 BoogieDeclarations]: Found specification of procedure do_read_c [2019-10-13 19:50:59,380 INFO L130 BoogieDeclarations]: Found specification of procedure update_channels [2019-10-13 19:50:59,380 INFO L130 BoogieDeclarations]: Found specification of procedure init_threads [2019-10-13 19:50:59,380 INFO L130 BoogieDeclarations]: Found specification of procedure exists_runnable_thread [2019-10-13 19:50:59,380 INFO L130 BoogieDeclarations]: Found specification of procedure fire_delta_events [2019-10-13 19:50:59,380 INFO L130 BoogieDeclarations]: Found specification of procedure reset_delta_events [2019-10-13 19:50:59,380 INFO L130 BoogieDeclarations]: Found specification of procedure activate_threads [2019-10-13 19:50:59,381 INFO L130 BoogieDeclarations]: Found specification of procedure eval [2019-10-13 19:50:59,381 INFO L130 BoogieDeclarations]: Found specification of procedure stop_simulation [2019-10-13 19:50:59,381 INFO L130 BoogieDeclarations]: Found specification of procedure start_simulation [2019-10-13 19:50:59,381 INFO L130 BoogieDeclarations]: Found specification of procedure init_model [2019-10-13 19:50:59,381 INFO L130 BoogieDeclarations]: Found specification of procedure main [2019-10-13 19:50:59,381 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2019-10-13 19:50:59,382 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-10-13 19:50:59,896 INFO L279 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-10-13 19:50:59,897 INFO L284 CfgBuilder]: Removed 4 assume(true) statements. [2019-10-13 19:50:59,898 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 13.10 07:50:59 BoogieIcfgContainer [2019-10-13 19:50:59,898 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-10-13 19:50:59,899 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-10-13 19:50:59,900 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-10-13 19:50:59,903 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-10-13 19:50:59,903 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 13.10 07:50:58" (1/3) ... [2019-10-13 19:50:59,904 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@4dd451fc and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 13.10 07:50:59, skipping insertion in model container [2019-10-13 19:50:59,904 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.10 07:50:59" (2/3) ... [2019-10-13 19:50:59,905 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@4dd451fc and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 13.10 07:50:59, skipping insertion in model container [2019-10-13 19:50:59,905 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 13.10 07:50:59" (3/3) ... [2019-10-13 19:50:59,907 INFO L109 eAbstractionObserver]: Analyzing ICFG pc_sfifo_2.cil-2.c [2019-10-13 19:50:59,917 INFO L152 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-10-13 19:50:59,926 INFO L164 ceAbstractionStarter]: Appying trace abstraction to program that has 1 error locations. [2019-10-13 19:50:59,937 INFO L249 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2019-10-13 19:50:59,964 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-10-13 19:50:59,965 INFO L374 AbstractCegarLoop]: Hoare is true [2019-10-13 19:50:59,965 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-10-13 19:50:59,965 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-10-13 19:50:59,966 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-10-13 19:50:59,966 INFO L378 AbstractCegarLoop]: Difference is false [2019-10-13 19:50:59,966 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-10-13 19:50:59,966 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-10-13 19:50:59,990 INFO L276 IsEmpty]: Start isEmpty. Operand 138 states. [2019-10-13 19:51:00,000 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 71 [2019-10-13 19:51:00,001 INFO L372 BasicCegarLoop]: Found error trace [2019-10-13 19:51:00,002 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-13 19:51:00,004 INFO L410 AbstractCegarLoop]: === Iteration 1 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-13 19:51:00,010 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-13 19:51:00,010 INFO L82 PathProgramCache]: Analyzing trace with hash 742963907, now seen corresponding path program 1 times [2019-10-13 19:51:00,020 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-10-13 19:51:00,021 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1572386492] [2019-10-13 19:51:00,021 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-10-13 19:51:00,021 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-10-13 19:51:00,022 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-13 19:51:00,176 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-13 19:51:00,415 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-13 19:51:00,476 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-13 19:51:00,535 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-13 19:51:00,587 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-13 19:51:00,626 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-13 19:51:00,677 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-13 19:51:00,685 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-13 19:51:00,688 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-13 19:51:00,694 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-13 19:51:00,698 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-13 19:51:00,723 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-10-13 19:51:00,724 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1572386492] [2019-10-13 19:51:00,725 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-10-13 19:51:00,726 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2019-10-13 19:51:00,726 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [336232214] [2019-10-13 19:51:00,731 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-10-13 19:51:00,732 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-10-13 19:51:00,746 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-10-13 19:51:00,748 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=27, Invalid=63, Unknown=0, NotChecked=0, Total=90 [2019-10-13 19:51:00,750 INFO L87 Difference]: Start difference. First operand 138 states. Second operand 10 states. [2019-10-13 19:51:03,524 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-13 19:51:03,525 INFO L93 Difference]: Finished difference Result 552 states and 918 transitions. [2019-10-13 19:51:03,525 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2019-10-13 19:51:03,527 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 70 [2019-10-13 19:51:03,528 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-13 19:51:03,549 INFO L225 Difference]: With dead ends: 552 [2019-10-13 19:51:03,549 INFO L226 Difference]: Without dead ends: 416 [2019-10-13 19:51:03,557 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 46 GetRequests, 22 SyntacticMatches, 1 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 107 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=159, Invalid=441, Unknown=0, NotChecked=0, Total=600 [2019-10-13 19:51:03,578 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 416 states. [2019-10-13 19:51:03,720 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 416 to 234. [2019-10-13 19:51:03,722 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 234 states. [2019-10-13 19:51:03,725 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 234 states to 234 states and 306 transitions. [2019-10-13 19:51:03,727 INFO L78 Accepts]: Start accepts. Automaton has 234 states and 306 transitions. Word has length 70 [2019-10-13 19:51:03,728 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-13 19:51:03,728 INFO L462 AbstractCegarLoop]: Abstraction has 234 states and 306 transitions. [2019-10-13 19:51:03,728 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-10-13 19:51:03,728 INFO L276 IsEmpty]: Start isEmpty. Operand 234 states and 306 transitions. [2019-10-13 19:51:03,733 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 71 [2019-10-13 19:51:03,733 INFO L372 BasicCegarLoop]: Found error trace [2019-10-13 19:51:03,733 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-13 19:51:03,734 INFO L410 AbstractCegarLoop]: === Iteration 2 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-13 19:51:03,734 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-13 19:51:03,734 INFO L82 PathProgramCache]: Analyzing trace with hash -1190139517, now seen corresponding path program 1 times [2019-10-13 19:51:03,735 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-10-13 19:51:03,735 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [83533047] [2019-10-13 19:51:03,735 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-10-13 19:51:03,735 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-10-13 19:51:03,735 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-13 19:51:03,757 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-13 19:51:03,841 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-13 19:51:03,876 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-13 19:51:03,914 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-13 19:51:03,938 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-13 19:51:03,951 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-13 19:51:03,976 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-13 19:51:03,981 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-13 19:51:03,983 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-13 19:51:03,994 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-13 19:51:03,997 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-13 19:51:04,005 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-10-13 19:51:04,006 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [83533047] [2019-10-13 19:51:04,006 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-10-13 19:51:04,007 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2019-10-13 19:51:04,007 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [889052403] [2019-10-13 19:51:04,009 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-10-13 19:51:04,010 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-10-13 19:51:04,010 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-10-13 19:51:04,011 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=67, Unknown=0, NotChecked=0, Total=90 [2019-10-13 19:51:04,011 INFO L87 Difference]: Start difference. First operand 234 states and 306 transitions. Second operand 10 states. [2019-10-13 19:51:07,151 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-13 19:51:07,152 INFO L93 Difference]: Finished difference Result 805 states and 1159 transitions. [2019-10-13 19:51:07,152 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2019-10-13 19:51:07,153 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 70 [2019-10-13 19:51:07,153 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-13 19:51:07,160 INFO L225 Difference]: With dead ends: 805 [2019-10-13 19:51:07,160 INFO L226 Difference]: Without dead ends: 598 [2019-10-13 19:51:07,163 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 53 GetRequests, 24 SyntacticMatches, 2 SemanticMatches, 27 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 177 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=197, Invalid=615, Unknown=0, NotChecked=0, Total=812 [2019-10-13 19:51:07,164 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 598 states. [2019-10-13 19:51:07,237 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 598 to 360. [2019-10-13 19:51:07,237 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 360 states. [2019-10-13 19:51:07,240 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 360 states to 360 states and 476 transitions. [2019-10-13 19:51:07,241 INFO L78 Accepts]: Start accepts. Automaton has 360 states and 476 transitions. Word has length 70 [2019-10-13 19:51:07,241 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-13 19:51:07,242 INFO L462 AbstractCegarLoop]: Abstraction has 360 states and 476 transitions. [2019-10-13 19:51:07,242 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-10-13 19:51:07,242 INFO L276 IsEmpty]: Start isEmpty. Operand 360 states and 476 transitions. [2019-10-13 19:51:07,245 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 71 [2019-10-13 19:51:07,245 INFO L372 BasicCegarLoop]: Found error trace [2019-10-13 19:51:07,245 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-13 19:51:07,246 INFO L410 AbstractCegarLoop]: === Iteration 3 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-13 19:51:07,246 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-13 19:51:07,246 INFO L82 PathProgramCache]: Analyzing trace with hash -1543227899, now seen corresponding path program 1 times [2019-10-13 19:51:07,246 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-10-13 19:51:07,247 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1949389145] [2019-10-13 19:51:07,247 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-10-13 19:51:07,247 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-10-13 19:51:07,247 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-13 19:51:07,262 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-13 19:51:07,321 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-13 19:51:07,345 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-13 19:51:07,360 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-13 19:51:07,373 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-13 19:51:07,388 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-13 19:51:07,396 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-13 19:51:07,437 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-13 19:51:07,470 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-13 19:51:07,473 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-13 19:51:07,476 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-13 19:51:07,488 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-10-13 19:51:07,488 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1949389145] [2019-10-13 19:51:07,488 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-10-13 19:51:07,489 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2019-10-13 19:51:07,489 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [850720753] [2019-10-13 19:51:07,490 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-10-13 19:51:07,491 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-10-13 19:51:07,491 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-10-13 19:51:07,492 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=25, Invalid=85, Unknown=0, NotChecked=0, Total=110 [2019-10-13 19:51:07,492 INFO L87 Difference]: Start difference. First operand 360 states and 476 transitions. Second operand 11 states. [2019-10-13 19:51:09,363 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-13 19:51:09,363 INFO L93 Difference]: Finished difference Result 858 states and 1207 transitions. [2019-10-13 19:51:09,364 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2019-10-13 19:51:09,364 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 70 [2019-10-13 19:51:09,365 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-13 19:51:09,369 INFO L225 Difference]: With dead ends: 858 [2019-10-13 19:51:09,370 INFO L226 Difference]: Without dead ends: 541 [2019-10-13 19:51:09,372 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 37 GetRequests, 20 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 38 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=97, Invalid=245, Unknown=0, NotChecked=0, Total=342 [2019-10-13 19:51:09,372 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 541 states. [2019-10-13 19:51:09,420 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 541 to 365. [2019-10-13 19:51:09,420 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 365 states. [2019-10-13 19:51:09,422 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 365 states to 365 states and 479 transitions. [2019-10-13 19:51:09,424 INFO L78 Accepts]: Start accepts. Automaton has 365 states and 479 transitions. Word has length 70 [2019-10-13 19:51:09,426 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-13 19:51:09,426 INFO L462 AbstractCegarLoop]: Abstraction has 365 states and 479 transitions. [2019-10-13 19:51:09,426 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-10-13 19:51:09,427 INFO L276 IsEmpty]: Start isEmpty. Operand 365 states and 479 transitions. [2019-10-13 19:51:09,433 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 71 [2019-10-13 19:51:09,433 INFO L372 BasicCegarLoop]: Found error trace [2019-10-13 19:51:09,434 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-13 19:51:09,434 INFO L410 AbstractCegarLoop]: === Iteration 4 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-13 19:51:09,434 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-13 19:51:09,434 INFO L82 PathProgramCache]: Analyzing trace with hash 507756099, now seen corresponding path program 1 times [2019-10-13 19:51:09,435 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-10-13 19:51:09,435 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [219395309] [2019-10-13 19:51:09,435 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-10-13 19:51:09,435 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-10-13 19:51:09,435 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-13 19:51:09,455 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-13 19:51:09,544 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-13 19:51:09,569 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-13 19:51:09,595 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-13 19:51:09,609 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-13 19:51:09,623 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-13 19:51:09,628 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-13 19:51:09,647 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-13 19:51:09,649 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-13 19:51:09,655 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-13 19:51:09,658 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-13 19:51:09,666 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-10-13 19:51:09,666 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [219395309] [2019-10-13 19:51:09,667 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-10-13 19:51:09,667 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2019-10-13 19:51:09,667 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1779848920] [2019-10-13 19:51:09,670 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-10-13 19:51:09,670 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-10-13 19:51:09,670 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-10-13 19:51:09,671 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=66, Unknown=0, NotChecked=0, Total=90 [2019-10-13 19:51:09,671 INFO L87 Difference]: Start difference. First operand 365 states and 479 transitions. Second operand 10 states. [2019-10-13 19:51:12,256 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-13 19:51:12,257 INFO L93 Difference]: Finished difference Result 1300 states and 1859 transitions. [2019-10-13 19:51:12,258 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2019-10-13 19:51:12,258 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 70 [2019-10-13 19:51:12,258 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-13 19:51:12,267 INFO L225 Difference]: With dead ends: 1300 [2019-10-13 19:51:12,267 INFO L226 Difference]: Without dead ends: 978 [2019-10-13 19:51:12,269 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 48 GetRequests, 25 SyntacticMatches, 0 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 114 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=145, Invalid=455, Unknown=0, NotChecked=0, Total=600 [2019-10-13 19:51:12,271 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 978 states. [2019-10-13 19:51:12,347 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 978 to 691. [2019-10-13 19:51:12,347 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 691 states. [2019-10-13 19:51:12,351 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 691 states to 691 states and 892 transitions. [2019-10-13 19:51:12,353 INFO L78 Accepts]: Start accepts. Automaton has 691 states and 892 transitions. Word has length 70 [2019-10-13 19:51:12,353 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-13 19:51:12,353 INFO L462 AbstractCegarLoop]: Abstraction has 691 states and 892 transitions. [2019-10-13 19:51:12,354 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-10-13 19:51:12,354 INFO L276 IsEmpty]: Start isEmpty. Operand 691 states and 892 transitions. [2019-10-13 19:51:12,355 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 71 [2019-10-13 19:51:12,355 INFO L372 BasicCegarLoop]: Found error trace [2019-10-13 19:51:12,355 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-13 19:51:12,355 INFO L410 AbstractCegarLoop]: === Iteration 5 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-13 19:51:12,356 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-13 19:51:12,359 INFO L82 PathProgramCache]: Analyzing trace with hash -1263714876, now seen corresponding path program 1 times [2019-10-13 19:51:12,360 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-10-13 19:51:12,361 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [701407204] [2019-10-13 19:51:12,361 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-10-13 19:51:12,367 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-10-13 19:51:12,367 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-13 19:51:12,394 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-13 19:51:12,462 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-13 19:51:12,485 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-13 19:51:12,496 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-13 19:51:12,505 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-13 19:51:12,516 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-13 19:51:12,520 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-13 19:51:12,551 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-13 19:51:12,553 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-13 19:51:12,581 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-13 19:51:12,583 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-13 19:51:12,590 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-10-13 19:51:12,590 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [701407204] [2019-10-13 19:51:12,590 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-10-13 19:51:12,591 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2019-10-13 19:51:12,591 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [178542619] [2019-10-13 19:51:12,591 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-10-13 19:51:12,592 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-10-13 19:51:12,592 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-10-13 19:51:12,592 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=25, Invalid=85, Unknown=0, NotChecked=0, Total=110 [2019-10-13 19:51:12,592 INFO L87 Difference]: Start difference. First operand 691 states and 892 transitions. Second operand 11 states. [2019-10-13 19:51:14,421 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-13 19:51:14,422 INFO L93 Difference]: Finished difference Result 1616 states and 2202 transitions. [2019-10-13 19:51:14,426 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2019-10-13 19:51:14,426 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 70 [2019-10-13 19:51:14,427 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-13 19:51:14,434 INFO L225 Difference]: With dead ends: 1616 [2019-10-13 19:51:14,434 INFO L226 Difference]: Without dead ends: 968 [2019-10-13 19:51:14,437 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 38 GetRequests, 20 SyntacticMatches, 0 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 45 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=105, Invalid=275, Unknown=0, NotChecked=0, Total=380 [2019-10-13 19:51:14,438 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 968 states. [2019-10-13 19:51:14,523 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 968 to 706. [2019-10-13 19:51:14,523 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 706 states. [2019-10-13 19:51:14,563 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 706 states to 706 states and 904 transitions. [2019-10-13 19:51:14,564 INFO L78 Accepts]: Start accepts. Automaton has 706 states and 904 transitions. Word has length 70 [2019-10-13 19:51:14,565 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-13 19:51:14,565 INFO L462 AbstractCegarLoop]: Abstraction has 706 states and 904 transitions. [2019-10-13 19:51:14,565 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-10-13 19:51:14,565 INFO L276 IsEmpty]: Start isEmpty. Operand 706 states and 904 transitions. [2019-10-13 19:51:14,566 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 71 [2019-10-13 19:51:14,566 INFO L372 BasicCegarLoop]: Found error trace [2019-10-13 19:51:14,567 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-13 19:51:14,567 INFO L410 AbstractCegarLoop]: === Iteration 6 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-13 19:51:14,567 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-13 19:51:14,567 INFO L82 PathProgramCache]: Analyzing trace with hash -1123166266, now seen corresponding path program 1 times [2019-10-13 19:51:14,568 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-10-13 19:51:14,568 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [46281441] [2019-10-13 19:51:14,568 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-10-13 19:51:14,568 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-10-13 19:51:14,568 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-13 19:51:14,579 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-13 19:51:14,694 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-13 19:51:14,741 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-13 19:51:14,758 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-13 19:51:14,788 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-13 19:51:14,797 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-13 19:51:14,803 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-13 19:51:14,808 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-13 19:51:14,810 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-13 19:51:14,821 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-13 19:51:14,849 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-13 19:51:14,859 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-10-13 19:51:14,860 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [46281441] [2019-10-13 19:51:14,861 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-10-13 19:51:14,861 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2019-10-13 19:51:14,861 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1986013031] [2019-10-13 19:51:14,862 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-10-13 19:51:14,862 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-10-13 19:51:14,862 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-10-13 19:51:14,863 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=67, Unknown=0, NotChecked=0, Total=90 [2019-10-13 19:51:14,863 INFO L87 Difference]: Start difference. First operand 706 states and 904 transitions. Second operand 10 states. [2019-10-13 19:51:17,347 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-13 19:51:17,347 INFO L93 Difference]: Finished difference Result 1675 states and 2255 transitions. [2019-10-13 19:51:17,348 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2019-10-13 19:51:17,348 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 70 [2019-10-13 19:51:17,348 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-13 19:51:17,356 INFO L225 Difference]: With dead ends: 1675 [2019-10-13 19:51:17,356 INFO L226 Difference]: Without dead ends: 1111 [2019-10-13 19:51:17,359 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 54 GetRequests, 24 SyntacticMatches, 2 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 189 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=211, Invalid=659, Unknown=0, NotChecked=0, Total=870 [2019-10-13 19:51:17,361 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1111 states. [2019-10-13 19:51:17,443 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1111 to 722. [2019-10-13 19:51:17,443 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 722 states. [2019-10-13 19:51:17,447 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 722 states to 722 states and 913 transitions. [2019-10-13 19:51:17,448 INFO L78 Accepts]: Start accepts. Automaton has 722 states and 913 transitions. Word has length 70 [2019-10-13 19:51:17,448 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-13 19:51:17,448 INFO L462 AbstractCegarLoop]: Abstraction has 722 states and 913 transitions. [2019-10-13 19:51:17,449 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-10-13 19:51:17,449 INFO L276 IsEmpty]: Start isEmpty. Operand 722 states and 913 transitions. [2019-10-13 19:51:17,450 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 71 [2019-10-13 19:51:17,450 INFO L372 BasicCegarLoop]: Found error trace [2019-10-13 19:51:17,450 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-13 19:51:17,451 INFO L410 AbstractCegarLoop]: === Iteration 7 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-13 19:51:17,451 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-13 19:51:17,451 INFO L82 PathProgramCache]: Analyzing trace with hash -1940814716, now seen corresponding path program 1 times [2019-10-13 19:51:17,451 INFO L157 tionRefinementEngine]: Executing refinement strategy CAMEL [2019-10-13 19:51:17,452 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1284579218] [2019-10-13 19:51:17,452 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-10-13 19:51:17,452 INFO L116 rtionOrderModulation]: Craig_NestedInterpolation forces the order to NOT_INCREMENTALLY [2019-10-13 19:51:17,452 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-13 19:51:17,469 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-10-13 19:51:17,485 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-10-13 19:51:17,529 INFO L168 tionRefinementEngine]: Strategy CAMEL found a feasible trace [2019-10-13 19:51:17,529 INFO L445 BasicCegarLoop]: Counterexample might be feasible [2019-10-13 19:51:17,618 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 13.10 07:51:17 BoogieIcfgContainer [2019-10-13 19:51:17,618 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-10-13 19:51:17,621 INFO L168 Benchmark]: Toolchain (without parser) took 18841.31 ms. Allocated memory was 138.4 MB in the beginning and 432.5 MB in the end (delta: 294.1 MB). Free memory was 103.1 MB in the beginning and 118.8 MB in the end (delta: -15.7 MB). Peak memory consumption was 278.4 MB. Max. memory is 7.1 GB. [2019-10-13 19:51:17,622 INFO L168 Benchmark]: CDTParser took 0.25 ms. Allocated memory is still 138.4 MB. Free memory was 121.7 MB in the beginning and 121.5 MB in the end (delta: 210.0 kB). Peak memory consumption was 210.0 kB. Max. memory is 7.1 GB. [2019-10-13 19:51:17,623 INFO L168 Benchmark]: CACSL2BoogieTranslator took 493.85 ms. Allocated memory was 138.4 MB in the beginning and 202.4 MB in the end (delta: 64.0 MB). Free memory was 102.8 MB in the beginning and 179.5 MB in the end (delta: -76.6 MB). Peak memory consumption was 25.6 MB. Max. memory is 7.1 GB. [2019-10-13 19:51:17,624 INFO L168 Benchmark]: Boogie Preprocessor took 45.56 ms. Allocated memory is still 202.4 MB. Free memory was 179.5 MB in the beginning and 177.4 MB in the end (delta: 2.0 MB). Peak memory consumption was 2.0 MB. Max. memory is 7.1 GB. [2019-10-13 19:51:17,624 INFO L168 Benchmark]: RCFGBuilder took 578.27 ms. Allocated memory is still 202.4 MB. Free memory was 177.4 MB in the beginning and 146.7 MB in the end (delta: 30.8 MB). Peak memory consumption was 30.8 MB. Max. memory is 7.1 GB. [2019-10-13 19:51:17,625 INFO L168 Benchmark]: TraceAbstraction took 17718.88 ms. Allocated memory was 202.4 MB in the beginning and 432.5 MB in the end (delta: 230.2 MB). Free memory was 146.7 MB in the beginning and 118.8 MB in the end (delta: 27.9 MB). Peak memory consumption was 258.0 MB. Max. memory is 7.1 GB. [2019-10-13 19:51:17,629 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.25 ms. Allocated memory is still 138.4 MB. Free memory was 121.7 MB in the beginning and 121.5 MB in the end (delta: 210.0 kB). Peak memory consumption was 210.0 kB. Max. memory is 7.1 GB. * CACSL2BoogieTranslator took 493.85 ms. Allocated memory was 138.4 MB in the beginning and 202.4 MB in the end (delta: 64.0 MB). Free memory was 102.8 MB in the beginning and 179.5 MB in the end (delta: -76.6 MB). Peak memory consumption was 25.6 MB. Max. memory is 7.1 GB. * Boogie Preprocessor took 45.56 ms. Allocated memory is still 202.4 MB. Free memory was 179.5 MB in the beginning and 177.4 MB in the end (delta: 2.0 MB). Peak memory consumption was 2.0 MB. Max. memory is 7.1 GB. * RCFGBuilder took 578.27 ms. Allocated memory is still 202.4 MB. Free memory was 177.4 MB in the beginning and 146.7 MB in the end (delta: 30.8 MB). Peak memory consumption was 30.8 MB. Max. memory is 7.1 GB. * TraceAbstraction took 17718.88 ms. Allocated memory was 202.4 MB in the beginning and 432.5 MB in the end (delta: 230.2 MB). Free memory was 146.7 MB in the beginning and 118.8 MB in the end (delta: 27.9 MB). Peak memory consumption was 258.0 MB. Max. memory is 7.1 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 10]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L15] int q_buf_0 ; [L16] int q_free ; [L17] int q_read_ev ; [L18] int q_write_ev ; [L19] int q_req_up ; [L20] int q_ev ; [L41] int p_num_write ; [L42] int p_last_write ; [L43] int p_dw_st ; [L44] int p_dw_pc ; [L45] int p_dw_i ; [L46] int c_num_read ; [L47] int c_last_read ; [L48] int c_dr_st ; [L49] int c_dr_pc ; [L50] int c_dr_i ; [L154] static int a_t ; VAL [\old(a_t)=11, \old(c_dr_i)=3, \old(c_dr_pc)=13, \old(c_dr_st)=17, \old(c_last_read)=5, \old(c_num_read)=6, \old(p_dw_i)=4, \old(p_dw_pc)=15, \old(p_dw_st)=9, \old(p_last_write)=19, \old(p_num_write)=7, \old(q_buf_0)=10, \old(q_ev)=16, \old(q_free)=18, \old(q_read_ev)=14, \old(q_req_up)=12, \old(q_write_ev)=8, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0] [L456] int __retres1 ; VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=0, \old(q_read_ev)=0, \old(q_req_up)=0, \old(q_write_ev)=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0] [L460] CALL init_model() VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=0, \old(q_read_ev)=0, \old(q_req_up)=0, \old(q_write_ev)=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0] [L442] q_free = 1 [L443] q_write_ev = 2 [L444] q_read_ev = q_write_ev [L445] p_num_write = 0 [L446] p_dw_pc = 0 [L447] p_dw_i = 1 [L448] c_num_read = 0 [L449] c_dr_pc = 0 [L450] c_dr_i = 1 VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=0, \old(q_read_ev)=0, \old(q_req_up)=0, \old(q_write_ev)=0, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L460] RET init_model() VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=0, \old(q_read_ev)=0, \old(q_req_up)=0, \old(q_write_ev)=0, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L461] CALL start_simulation() VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L396] int kernel_st ; [L397] int tmp ; [L401] kernel_st = 0 VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, kernel_st=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L402] CALL update_channels() VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L212] COND FALSE !((int )q_req_up == 1) VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L402] RET update_channels() VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, kernel_st=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L403] CALL init_threads() VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L227] COND TRUE (int )p_dw_i == 1 [L228] p_dw_st = 0 VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L232] COND TRUE (int )c_dr_i == 1 [L233] c_dr_st = 0 VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L403] RET init_threads() VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, kernel_st=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L404] CALL fire_delta_events() VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L265] COND FALSE !((int )q_read_ev == 0) VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L270] COND FALSE !((int )q_write_ev == 0) VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L404] RET fire_delta_events() VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, kernel_st=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L405] CALL activate_threads() VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L298] int tmp ; [L299] int tmp___0 ; VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L303] CALL, EXPR is_do_write_p_triggered() VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L52] int __retres1 ; VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L55] COND FALSE !((int )p_dw_pc == 1) VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L65] __retres1 = 0 VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, __retres1=0, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L67] return (__retres1); VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, \result=0, __retres1=0, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L303] RET, EXPR is_do_write_p_triggered() VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, is_do_write_p_triggered()=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L303] tmp = is_do_write_p_triggered() [L305] COND FALSE !(\read(tmp)) VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2, tmp=0] [L311] CALL, EXPR is_do_read_c_triggered() VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L71] int __retres1 ; VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L74] COND FALSE !((int )c_dr_pc == 1) VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L84] __retres1 = 0 VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, __retres1=0, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L86] return (__retres1); VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, \result=0, __retres1=0, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L311] RET, EXPR is_do_read_c_triggered() VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, is_do_read_c_triggered()=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2, tmp=0] [L311] tmp___0 = is_do_read_c_triggered() [L313] COND FALSE !(\read(tmp___0)) VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2, tmp=0, tmp___0=0] [L405] RET activate_threads() VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, kernel_st=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L406] CALL reset_delta_events() VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L283] COND FALSE !((int )q_read_ev == 1) VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L288] COND FALSE !((int )q_write_ev == 1) VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L406] RET reset_delta_events() VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, kernel_st=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L409] COND TRUE 1 VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, kernel_st=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L412] kernel_st = 1 VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, kernel_st=1, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L413] CALL eval() VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L323] int tmp ; [L324] int tmp___0 ; [L325] int tmp___1 ; VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L329] COND TRUE 1 VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L332] CALL, EXPR exists_runnable_thread() VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L242] int __retres1 ; VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L245] COND TRUE (int )p_dw_st == 0 [L246] __retres1 = 1 VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, __retres1=1, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L258] return (__retres1); VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, \result=1, __retres1=1, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L332] RET, EXPR exists_runnable_thread() VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, exists_runnable_thread()=1, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L332] tmp___1 = exists_runnable_thread() [L334] COND TRUE \read(tmp___1) VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2, tmp___1=1] [L339] COND TRUE (int )p_dw_st == 0 [L341] tmp = __VERIFIER_nondet_int() [L343] COND FALSE !(\read(tmp)) VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2, tmp=0, tmp___1=1] [L349] CALL error() VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L10] __VERIFIER_error() VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] - StatisticsResult: Ultimate Automizer benchmark data CFG has 20 procedures, 140 locations, 1 error locations. Result: UNSAFE, OverallTime: 17.6s, OverallIterations: 7, TraceHistogramMax: 1, AutomataDifference: 14.7s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 986 SDtfs, 3575 SDslu, 1133 SDs, 0 SdLazy, 8338 SolverSat, 2221 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 9.6s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 276 GetRequests, 135 SyntacticMatches, 5 SemanticMatches, 136 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 670 ImplicationChecksByTransitivity, 3.2s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=722occurred in iteration=6, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 0.5s AutomataMinimizationTime, 6 MinimizatonAttempts, 1534 StatesRemovedByMinimization, 6 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.1s SatisfiabilityAnalysisTime, 1.6s InterpolantComputationTime, 490 NumberOfCodeBlocks, 490 NumberOfCodeBlocksAsserted, 7 NumberOfCheckSat, 414 ConstructedInterpolants, 0 QuantifiedInterpolants, 91080 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 6 InterpolantComputations, 6 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...