java -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata ./data -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/default/automizer/svcomp-Reach-32bit-Automizer_Default.epf --abstractinterpretationv2.abstract.domain IntervalDomain --traceabstraction.trace.refinement.strategy TAIPAN --traceabstraction.abstract.interpretation.mode USE_PREDICATES -i ../../../trunk/examples/svcomp/systemc/pc_sfifo_2.cil-2.c -------------------------------------------------------------------------------- This is Ultimate 0.1.24-f4eb214f-m [2019-10-13 21:29:08,306 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-10-13 21:29:08,309 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-10-13 21:29:08,331 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-10-13 21:29:08,331 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-10-13 21:29:08,333 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-10-13 21:29:08,335 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-10-13 21:29:08,349 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-10-13 21:29:08,352 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-10-13 21:29:08,354 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-10-13 21:29:08,356 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-10-13 21:29:08,358 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-10-13 21:29:08,358 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-10-13 21:29:08,362 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-10-13 21:29:08,365 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-10-13 21:29:08,366 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-10-13 21:29:08,368 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-10-13 21:29:08,370 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-10-13 21:29:08,372 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-10-13 21:29:08,378 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-10-13 21:29:08,383 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-10-13 21:29:08,387 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-10-13 21:29:08,388 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-10-13 21:29:08,389 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-10-13 21:29:08,394 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-10-13 21:29:08,395 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-10-13 21:29:08,395 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-10-13 21:29:08,397 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-10-13 21:29:08,398 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-10-13 21:29:08,399 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-10-13 21:29:08,400 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-10-13 21:29:08,402 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-10-13 21:29:08,402 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-10-13 21:29:08,403 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-10-13 21:29:08,405 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-10-13 21:29:08,405 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-10-13 21:29:08,406 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-10-13 21:29:08,406 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-10-13 21:29:08,406 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-10-13 21:29:08,407 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-10-13 21:29:08,409 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-10-13 21:29:08,410 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/default/automizer/svcomp-Reach-32bit-Automizer_Default.epf [2019-10-13 21:29:08,430 INFO L113 SettingsManager]: Loading preferences was successful [2019-10-13 21:29:08,431 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-10-13 21:29:08,433 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-10-13 21:29:08,434 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-10-13 21:29:08,434 INFO L138 SettingsManager]: * Use SBE=true [2019-10-13 21:29:08,434 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-10-13 21:29:08,434 INFO L138 SettingsManager]: * sizeof long=4 [2019-10-13 21:29:08,434 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-10-13 21:29:08,435 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-10-13 21:29:08,435 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-10-13 21:29:08,436 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-10-13 21:29:08,436 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-10-13 21:29:08,437 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-10-13 21:29:08,437 INFO L138 SettingsManager]: * sizeof long double=12 [2019-10-13 21:29:08,438 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-10-13 21:29:08,438 INFO L138 SettingsManager]: * Use constant arrays=true [2019-10-13 21:29:08,438 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-10-13 21:29:08,439 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-10-13 21:29:08,440 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-10-13 21:29:08,440 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-10-13 21:29:08,441 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-10-13 21:29:08,442 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-10-13 21:29:08,443 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-10-13 21:29:08,444 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-10-13 21:29:08,445 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-10-13 21:29:08,446 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-10-13 21:29:08,446 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-10-13 21:29:08,447 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-10-13 21:29:08,447 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.analysis.abstractinterpretationv2: Abstract domain -> IntervalDomain Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: Trace refinement strategy -> TAIPAN Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: Abstract interpretation Mode -> USE_PREDICATES [2019-10-13 21:29:08,785 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-10-13 21:29:08,802 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-10-13 21:29:08,806 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-10-13 21:29:08,807 INFO L271 PluginConnector]: Initializing CDTParser... [2019-10-13 21:29:08,808 INFO L275 PluginConnector]: CDTParser initialized [2019-10-13 21:29:08,809 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/systemc/pc_sfifo_2.cil-2.c [2019-10-13 21:29:08,883 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/fc59cdc0c/0aec9a8622d04dd3a9c4668ef2317d4a/FLAGe138788c4 [2019-10-13 21:29:09,388 INFO L306 CDTParser]: Found 1 translation units. [2019-10-13 21:29:09,390 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/systemc/pc_sfifo_2.cil-2.c [2019-10-13 21:29:09,407 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/fc59cdc0c/0aec9a8622d04dd3a9c4668ef2317d4a/FLAGe138788c4 [2019-10-13 21:29:09,729 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/fc59cdc0c/0aec9a8622d04dd3a9c4668ef2317d4a [2019-10-13 21:29:09,739 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-10-13 21:29:09,741 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2019-10-13 21:29:09,742 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-10-13 21:29:09,742 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-10-13 21:29:09,746 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-10-13 21:29:09,747 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 13.10 09:29:09" (1/1) ... [2019-10-13 21:29:09,750 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@ac9320a and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.10 09:29:09, skipping insertion in model container [2019-10-13 21:29:09,751 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 13.10 09:29:09" (1/1) ... [2019-10-13 21:29:09,759 INFO L142 MainTranslator]: Starting translation in SV-COMP mode [2019-10-13 21:29:09,801 INFO L173 MainTranslator]: Built tables and reachable declarations [2019-10-13 21:29:10,012 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-10-13 21:29:10,021 INFO L188 MainTranslator]: Completed pre-run [2019-10-13 21:29:10,146 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-10-13 21:29:10,169 INFO L192 MainTranslator]: Completed translation [2019-10-13 21:29:10,169 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.10 09:29:10 WrapperNode [2019-10-13 21:29:10,169 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-10-13 21:29:10,170 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-10-13 21:29:10,170 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-10-13 21:29:10,170 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-10-13 21:29:10,181 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.10 09:29:10" (1/1) ... [2019-10-13 21:29:10,181 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.10 09:29:10" (1/1) ... [2019-10-13 21:29:10,189 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.10 09:29:10" (1/1) ... [2019-10-13 21:29:10,189 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.10 09:29:10" (1/1) ... [2019-10-13 21:29:10,201 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.10 09:29:10" (1/1) ... [2019-10-13 21:29:10,215 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.10 09:29:10" (1/1) ... [2019-10-13 21:29:10,218 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.10 09:29:10" (1/1) ... [2019-10-13 21:29:10,221 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-10-13 21:29:10,228 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-10-13 21:29:10,228 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-10-13 21:29:10,228 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-10-13 21:29:10,229 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.10 09:29:10" (1/1) ... No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-10-13 21:29:10,282 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2019-10-13 21:29:10,283 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-10-13 21:29:10,283 INFO L138 BoogieDeclarations]: Found implementation of procedure error [2019-10-13 21:29:10,283 INFO L138 BoogieDeclarations]: Found implementation of procedure update_fifo_q [2019-10-13 21:29:10,283 INFO L138 BoogieDeclarations]: Found implementation of procedure is_do_write_p_triggered [2019-10-13 21:29:10,283 INFO L138 BoogieDeclarations]: Found implementation of procedure is_do_read_c_triggered [2019-10-13 21:29:10,284 INFO L138 BoogieDeclarations]: Found implementation of procedure immediate_notify_threads [2019-10-13 21:29:10,284 INFO L138 BoogieDeclarations]: Found implementation of procedure do_write_p [2019-10-13 21:29:10,284 INFO L138 BoogieDeclarations]: Found implementation of procedure do_read_c [2019-10-13 21:29:10,284 INFO L138 BoogieDeclarations]: Found implementation of procedure update_channels [2019-10-13 21:29:10,284 INFO L138 BoogieDeclarations]: Found implementation of procedure init_threads [2019-10-13 21:29:10,285 INFO L138 BoogieDeclarations]: Found implementation of procedure exists_runnable_thread [2019-10-13 21:29:10,285 INFO L138 BoogieDeclarations]: Found implementation of procedure fire_delta_events [2019-10-13 21:29:10,285 INFO L138 BoogieDeclarations]: Found implementation of procedure reset_delta_events [2019-10-13 21:29:10,285 INFO L138 BoogieDeclarations]: Found implementation of procedure activate_threads [2019-10-13 21:29:10,285 INFO L138 BoogieDeclarations]: Found implementation of procedure eval [2019-10-13 21:29:10,285 INFO L138 BoogieDeclarations]: Found implementation of procedure stop_simulation [2019-10-13 21:29:10,286 INFO L138 BoogieDeclarations]: Found implementation of procedure start_simulation [2019-10-13 21:29:10,286 INFO L138 BoogieDeclarations]: Found implementation of procedure init_model [2019-10-13 21:29:10,286 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2019-10-13 21:29:10,286 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_error [2019-10-13 21:29:10,286 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_int [2019-10-13 21:29:10,286 INFO L130 BoogieDeclarations]: Found specification of procedure error [2019-10-13 21:29:10,287 INFO L130 BoogieDeclarations]: Found specification of procedure update_fifo_q [2019-10-13 21:29:10,287 INFO L130 BoogieDeclarations]: Found specification of procedure is_do_write_p_triggered [2019-10-13 21:29:10,287 INFO L130 BoogieDeclarations]: Found specification of procedure is_do_read_c_triggered [2019-10-13 21:29:10,287 INFO L130 BoogieDeclarations]: Found specification of procedure immediate_notify_threads [2019-10-13 21:29:10,287 INFO L130 BoogieDeclarations]: Found specification of procedure do_write_p [2019-10-13 21:29:10,287 INFO L130 BoogieDeclarations]: Found specification of procedure do_read_c [2019-10-13 21:29:10,288 INFO L130 BoogieDeclarations]: Found specification of procedure update_channels [2019-10-13 21:29:10,288 INFO L130 BoogieDeclarations]: Found specification of procedure init_threads [2019-10-13 21:29:10,288 INFO L130 BoogieDeclarations]: Found specification of procedure exists_runnable_thread [2019-10-13 21:29:10,288 INFO L130 BoogieDeclarations]: Found specification of procedure fire_delta_events [2019-10-13 21:29:10,288 INFO L130 BoogieDeclarations]: Found specification of procedure reset_delta_events [2019-10-13 21:29:10,289 INFO L130 BoogieDeclarations]: Found specification of procedure activate_threads [2019-10-13 21:29:10,289 INFO L130 BoogieDeclarations]: Found specification of procedure eval [2019-10-13 21:29:10,289 INFO L130 BoogieDeclarations]: Found specification of procedure stop_simulation [2019-10-13 21:29:10,289 INFO L130 BoogieDeclarations]: Found specification of procedure start_simulation [2019-10-13 21:29:10,289 INFO L130 BoogieDeclarations]: Found specification of procedure init_model [2019-10-13 21:29:10,289 INFO L130 BoogieDeclarations]: Found specification of procedure main [2019-10-13 21:29:10,290 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2019-10-13 21:29:10,290 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-10-13 21:29:10,818 INFO L279 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-10-13 21:29:10,819 INFO L284 CfgBuilder]: Removed 4 assume(true) statements. [2019-10-13 21:29:10,820 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 13.10 09:29:10 BoogieIcfgContainer [2019-10-13 21:29:10,821 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-10-13 21:29:10,822 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-10-13 21:29:10,822 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-10-13 21:29:10,827 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-10-13 21:29:10,827 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 13.10 09:29:09" (1/3) ... [2019-10-13 21:29:10,828 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@27e5aed5 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 13.10 09:29:10, skipping insertion in model container [2019-10-13 21:29:10,829 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.10 09:29:10" (2/3) ... [2019-10-13 21:29:10,829 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@27e5aed5 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 13.10 09:29:10, skipping insertion in model container [2019-10-13 21:29:10,829 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 13.10 09:29:10" (3/3) ... [2019-10-13 21:29:10,832 INFO L109 eAbstractionObserver]: Analyzing ICFG pc_sfifo_2.cil-2.c [2019-10-13 21:29:10,847 INFO L152 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-10-13 21:29:10,863 INFO L164 ceAbstractionStarter]: Appying trace abstraction to program that has 1 error locations. [2019-10-13 21:29:10,872 INFO L249 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2019-10-13 21:29:10,898 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-10-13 21:29:10,898 INFO L374 AbstractCegarLoop]: Hoare is true [2019-10-13 21:29:10,898 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-10-13 21:29:10,899 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-10-13 21:29:10,899 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-10-13 21:29:10,899 INFO L378 AbstractCegarLoop]: Difference is false [2019-10-13 21:29:10,900 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-10-13 21:29:10,900 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-10-13 21:29:10,924 INFO L276 IsEmpty]: Start isEmpty. Operand 138 states. [2019-10-13 21:29:10,934 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 71 [2019-10-13 21:29:10,935 INFO L372 BasicCegarLoop]: Found error trace [2019-10-13 21:29:10,936 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-13 21:29:10,938 INFO L410 AbstractCegarLoop]: === Iteration 1 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-13 21:29:10,944 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-13 21:29:10,944 INFO L82 PathProgramCache]: Analyzing trace with hash 742963907, now seen corresponding path program 1 times [2019-10-13 21:29:10,955 INFO L157 tionRefinementEngine]: Executing refinement strategy TAIPAN [2019-10-13 21:29:10,956 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1175356082] [2019-10-13 21:29:10,956 INFO L116 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-13 21:29:10,956 INFO L116 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-13 21:29:10,957 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-13 21:29:11,115 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-13 21:29:11,316 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-10-13 21:29:11,318 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1175356082] [2019-10-13 21:29:11,319 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-10-13 21:29:11,319 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-10-13 21:29:11,320 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1401251284] [2019-10-13 21:29:11,326 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-10-13 21:29:11,328 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy TAIPAN [2019-10-13 21:29:11,345 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-10-13 21:29:11,346 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-10-13 21:29:11,348 INFO L87 Difference]: Start difference. First operand 138 states. Second operand 5 states. [2019-10-13 21:29:12,218 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-13 21:29:12,218 INFO L93 Difference]: Finished difference Result 382 states and 551 transitions. [2019-10-13 21:29:12,219 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-10-13 21:29:12,220 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 70 [2019-10-13 21:29:12,221 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-13 21:29:12,241 INFO L225 Difference]: With dead ends: 382 [2019-10-13 21:29:12,241 INFO L226 Difference]: Without dead ends: 254 [2019-10-13 21:29:12,254 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 6 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-10-13 21:29:12,278 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 254 states. [2019-10-13 21:29:12,393 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 254 to 234. [2019-10-13 21:29:12,395 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 234 states. [2019-10-13 21:29:12,398 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 234 states to 234 states and 306 transitions. [2019-10-13 21:29:12,400 INFO L78 Accepts]: Start accepts. Automaton has 234 states and 306 transitions. Word has length 70 [2019-10-13 21:29:12,401 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-13 21:29:12,401 INFO L462 AbstractCegarLoop]: Abstraction has 234 states and 306 transitions. [2019-10-13 21:29:12,401 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-10-13 21:29:12,401 INFO L276 IsEmpty]: Start isEmpty. Operand 234 states and 306 transitions. [2019-10-13 21:29:12,407 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 71 [2019-10-13 21:29:12,408 INFO L372 BasicCegarLoop]: Found error trace [2019-10-13 21:29:12,408 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-13 21:29:12,408 INFO L410 AbstractCegarLoop]: === Iteration 2 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-13 21:29:12,409 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-13 21:29:12,409 INFO L82 PathProgramCache]: Analyzing trace with hash -1190139517, now seen corresponding path program 1 times [2019-10-13 21:29:12,409 INFO L157 tionRefinementEngine]: Executing refinement strategy TAIPAN [2019-10-13 21:29:12,409 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1412218810] [2019-10-13 21:29:12,410 INFO L116 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-13 21:29:12,410 INFO L116 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-13 21:29:12,410 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-13 21:29:12,460 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-13 21:29:12,537 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-10-13 21:29:12,538 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1412218810] [2019-10-13 21:29:12,538 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-10-13 21:29:12,538 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-10-13 21:29:12,539 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1857040697] [2019-10-13 21:29:12,541 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-10-13 21:29:12,542 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy TAIPAN [2019-10-13 21:29:12,542 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-10-13 21:29:12,542 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-10-13 21:29:12,542 INFO L87 Difference]: Start difference. First operand 234 states and 306 transitions. Second operand 6 states. [2019-10-13 21:29:13,497 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-13 21:29:13,497 INFO L93 Difference]: Finished difference Result 631 states and 846 transitions. [2019-10-13 21:29:13,498 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-10-13 21:29:13,498 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 70 [2019-10-13 21:29:13,498 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-13 21:29:13,505 INFO L225 Difference]: With dead ends: 631 [2019-10-13 21:29:13,505 INFO L226 Difference]: Without dead ends: 424 [2019-10-13 21:29:13,508 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=24, Invalid=48, Unknown=0, NotChecked=0, Total=72 [2019-10-13 21:29:13,509 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 424 states. [2019-10-13 21:29:13,560 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 424 to 360. [2019-10-13 21:29:13,560 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 360 states. [2019-10-13 21:29:13,564 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 360 states to 360 states and 476 transitions. [2019-10-13 21:29:13,564 INFO L78 Accepts]: Start accepts. Automaton has 360 states and 476 transitions. Word has length 70 [2019-10-13 21:29:13,565 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-13 21:29:13,565 INFO L462 AbstractCegarLoop]: Abstraction has 360 states and 476 transitions. [2019-10-13 21:29:13,565 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-10-13 21:29:13,565 INFO L276 IsEmpty]: Start isEmpty. Operand 360 states and 476 transitions. [2019-10-13 21:29:13,569 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 71 [2019-10-13 21:29:13,569 INFO L372 BasicCegarLoop]: Found error trace [2019-10-13 21:29:13,570 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-13 21:29:13,571 INFO L410 AbstractCegarLoop]: === Iteration 3 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-13 21:29:13,571 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-13 21:29:13,571 INFO L82 PathProgramCache]: Analyzing trace with hash -1543227899, now seen corresponding path program 1 times [2019-10-13 21:29:13,571 INFO L157 tionRefinementEngine]: Executing refinement strategy TAIPAN [2019-10-13 21:29:13,572 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [517472168] [2019-10-13 21:29:13,572 INFO L116 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-13 21:29:13,572 INFO L116 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-13 21:29:13,572 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-13 21:29:13,594 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-13 21:29:13,654 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-10-13 21:29:13,654 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [517472168] [2019-10-13 21:29:13,655 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-10-13 21:29:13,655 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-10-13 21:29:13,655 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1286016665] [2019-10-13 21:29:13,656 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-10-13 21:29:13,656 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy TAIPAN [2019-10-13 21:29:13,657 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-10-13 21:29:13,657 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-10-13 21:29:13,658 INFO L87 Difference]: Start difference. First operand 360 states and 476 transitions. Second operand 6 states. [2019-10-13 21:29:13,724 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-13 21:29:13,725 INFO L93 Difference]: Finished difference Result 687 states and 910 transitions. [2019-10-13 21:29:13,726 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-10-13 21:29:13,726 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 70 [2019-10-13 21:29:13,726 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-13 21:29:13,733 INFO L225 Difference]: With dead ends: 687 [2019-10-13 21:29:13,733 INFO L226 Difference]: Without dead ends: 370 [2019-10-13 21:29:13,734 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2019-10-13 21:29:13,735 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 370 states. [2019-10-13 21:29:13,767 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 370 to 365. [2019-10-13 21:29:13,767 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 365 states. [2019-10-13 21:29:13,770 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 365 states to 365 states and 479 transitions. [2019-10-13 21:29:13,771 INFO L78 Accepts]: Start accepts. Automaton has 365 states and 479 transitions. Word has length 70 [2019-10-13 21:29:13,771 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-13 21:29:13,771 INFO L462 AbstractCegarLoop]: Abstraction has 365 states and 479 transitions. [2019-10-13 21:29:13,771 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-10-13 21:29:13,771 INFO L276 IsEmpty]: Start isEmpty. Operand 365 states and 479 transitions. [2019-10-13 21:29:13,775 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 71 [2019-10-13 21:29:13,775 INFO L372 BasicCegarLoop]: Found error trace [2019-10-13 21:29:13,775 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-13 21:29:13,775 INFO L410 AbstractCegarLoop]: === Iteration 4 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-13 21:29:13,776 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-13 21:29:13,776 INFO L82 PathProgramCache]: Analyzing trace with hash 507756099, now seen corresponding path program 1 times [2019-10-13 21:29:13,776 INFO L157 tionRefinementEngine]: Executing refinement strategy TAIPAN [2019-10-13 21:29:13,776 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1926366371] [2019-10-13 21:29:13,776 INFO L116 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-13 21:29:13,777 INFO L116 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-13 21:29:13,777 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-13 21:29:13,795 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-13 21:29:13,877 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-10-13 21:29:13,877 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1926366371] [2019-10-13 21:29:13,877 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-10-13 21:29:13,877 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-10-13 21:29:13,878 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1303289859] [2019-10-13 21:29:13,878 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-10-13 21:29:13,878 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy TAIPAN [2019-10-13 21:29:13,879 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-10-13 21:29:13,879 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-10-13 21:29:13,879 INFO L87 Difference]: Start difference. First operand 365 states and 479 transitions. Second operand 4 states. [2019-10-13 21:29:14,053 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-13 21:29:14,054 INFO L93 Difference]: Finished difference Result 994 states and 1322 transitions. [2019-10-13 21:29:14,055 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-10-13 21:29:14,056 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 70 [2019-10-13 21:29:14,056 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-13 21:29:14,060 INFO L225 Difference]: With dead ends: 994 [2019-10-13 21:29:14,061 INFO L226 Difference]: Without dead ends: 672 [2019-10-13 21:29:14,062 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-10-13 21:29:14,063 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 672 states. [2019-10-13 21:29:14,106 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 672 to 652. [2019-10-13 21:29:14,106 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 652 states. [2019-10-13 21:29:14,111 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 652 states to 652 states and 835 transitions. [2019-10-13 21:29:14,111 INFO L78 Accepts]: Start accepts. Automaton has 652 states and 835 transitions. Word has length 70 [2019-10-13 21:29:14,112 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-13 21:29:14,112 INFO L462 AbstractCegarLoop]: Abstraction has 652 states and 835 transitions. [2019-10-13 21:29:14,112 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-10-13 21:29:14,112 INFO L276 IsEmpty]: Start isEmpty. Operand 652 states and 835 transitions. [2019-10-13 21:29:14,114 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 71 [2019-10-13 21:29:14,114 INFO L372 BasicCegarLoop]: Found error trace [2019-10-13 21:29:14,115 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-13 21:29:14,115 INFO L410 AbstractCegarLoop]: === Iteration 5 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-13 21:29:14,115 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-13 21:29:14,115 INFO L82 PathProgramCache]: Analyzing trace with hash -1263714876, now seen corresponding path program 1 times [2019-10-13 21:29:14,116 INFO L157 tionRefinementEngine]: Executing refinement strategy TAIPAN [2019-10-13 21:29:14,116 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2072210624] [2019-10-13 21:29:14,116 INFO L116 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-13 21:29:14,116 INFO L116 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-13 21:29:14,116 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-13 21:29:14,156 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-13 21:29:14,237 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-10-13 21:29:14,238 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2072210624] [2019-10-13 21:29:14,238 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-10-13 21:29:14,238 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-10-13 21:29:14,239 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [754736943] [2019-10-13 21:29:14,239 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-10-13 21:29:14,239 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy TAIPAN [2019-10-13 21:29:14,240 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-10-13 21:29:14,240 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-10-13 21:29:14,240 INFO L87 Difference]: Start difference. First operand 652 states and 835 transitions. Second operand 6 states. [2019-10-13 21:29:14,305 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-13 21:29:14,305 INFO L93 Difference]: Finished difference Result 1282 states and 1641 transitions. [2019-10-13 21:29:14,306 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-10-13 21:29:14,306 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 70 [2019-10-13 21:29:14,307 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-13 21:29:14,312 INFO L225 Difference]: With dead ends: 1282 [2019-10-13 21:29:14,312 INFO L226 Difference]: Without dead ends: 673 [2019-10-13 21:29:14,315 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2019-10-13 21:29:14,316 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 673 states. [2019-10-13 21:29:14,353 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 673 to 667. [2019-10-13 21:29:14,354 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 667 states. [2019-10-13 21:29:14,358 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 667 states to 667 states and 847 transitions. [2019-10-13 21:29:14,358 INFO L78 Accepts]: Start accepts. Automaton has 667 states and 847 transitions. Word has length 70 [2019-10-13 21:29:14,359 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-13 21:29:14,359 INFO L462 AbstractCegarLoop]: Abstraction has 667 states and 847 transitions. [2019-10-13 21:29:14,359 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-10-13 21:29:14,359 INFO L276 IsEmpty]: Start isEmpty. Operand 667 states and 847 transitions. [2019-10-13 21:29:14,361 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 71 [2019-10-13 21:29:14,361 INFO L372 BasicCegarLoop]: Found error trace [2019-10-13 21:29:14,362 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-13 21:29:14,362 INFO L410 AbstractCegarLoop]: === Iteration 6 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-13 21:29:14,362 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-13 21:29:14,362 INFO L82 PathProgramCache]: Analyzing trace with hash -1123166266, now seen corresponding path program 1 times [2019-10-13 21:29:14,363 INFO L157 tionRefinementEngine]: Executing refinement strategy TAIPAN [2019-10-13 21:29:14,363 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1803928830] [2019-10-13 21:29:14,363 INFO L116 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-13 21:29:14,363 INFO L116 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-13 21:29:14,363 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-13 21:29:14,385 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-13 21:29:14,458 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-10-13 21:29:14,458 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1803928830] [2019-10-13 21:29:14,459 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-10-13 21:29:14,459 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-10-13 21:29:14,459 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1288070096] [2019-10-13 21:29:14,459 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-10-13 21:29:14,460 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy TAIPAN [2019-10-13 21:29:14,460 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-10-13 21:29:14,460 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-10-13 21:29:14,460 INFO L87 Difference]: Start difference. First operand 667 states and 847 transitions. Second operand 6 states. [2019-10-13 21:29:15,272 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-13 21:29:15,272 INFO L93 Difference]: Finished difference Result 1362 states and 1717 transitions. [2019-10-13 21:29:15,273 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-10-13 21:29:15,273 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 70 [2019-10-13 21:29:15,274 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-13 21:29:15,281 INFO L225 Difference]: With dead ends: 1362 [2019-10-13 21:29:15,281 INFO L226 Difference]: Without dead ends: 833 [2019-10-13 21:29:15,284 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 11 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=60, Unknown=0, NotChecked=0, Total=90 [2019-10-13 21:29:15,286 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 833 states. [2019-10-13 21:29:15,339 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 833 to 683. [2019-10-13 21:29:15,339 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 683 states. [2019-10-13 21:29:15,344 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 683 states to 683 states and 856 transitions. [2019-10-13 21:29:15,345 INFO L78 Accepts]: Start accepts. Automaton has 683 states and 856 transitions. Word has length 70 [2019-10-13 21:29:15,345 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-13 21:29:15,345 INFO L462 AbstractCegarLoop]: Abstraction has 683 states and 856 transitions. [2019-10-13 21:29:15,346 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-10-13 21:29:15,346 INFO L276 IsEmpty]: Start isEmpty. Operand 683 states and 856 transitions. [2019-10-13 21:29:15,348 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 71 [2019-10-13 21:29:15,348 INFO L372 BasicCegarLoop]: Found error trace [2019-10-13 21:29:15,348 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-13 21:29:15,349 INFO L410 AbstractCegarLoop]: === Iteration 7 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-13 21:29:15,349 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-13 21:29:15,349 INFO L82 PathProgramCache]: Analyzing trace with hash -1940814716, now seen corresponding path program 1 times [2019-10-13 21:29:15,350 INFO L157 tionRefinementEngine]: Executing refinement strategy TAIPAN [2019-10-13 21:29:15,350 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1730927513] [2019-10-13 21:29:15,350 INFO L116 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-13 21:29:15,350 INFO L116 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-13 21:29:15,351 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-13 21:29:15,375 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-10-13 21:29:15,400 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-10-13 21:29:15,456 INFO L168 tionRefinementEngine]: Strategy TAIPAN found a feasible trace [2019-10-13 21:29:15,457 INFO L445 BasicCegarLoop]: Counterexample might be feasible [2019-10-13 21:29:15,558 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 13.10 09:29:15 BoogieIcfgContainer [2019-10-13 21:29:15,559 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-10-13 21:29:15,562 INFO L168 Benchmark]: Toolchain (without parser) took 5819.49 ms. Allocated memory was 137.9 MB in the beginning and 287.3 MB in the end (delta: 149.4 MB). Free memory was 100.4 MB in the beginning and 108.2 MB in the end (delta: -7.8 MB). Peak memory consumption was 141.6 MB. Max. memory is 7.1 GB. [2019-10-13 21:29:15,563 INFO L168 Benchmark]: CDTParser took 0.22 ms. Allocated memory is still 137.9 MB. Free memory was 119.9 MB in the beginning and 119.7 MB in the end (delta: 210.0 kB). Peak memory consumption was 210.0 kB. Max. memory is 7.1 GB. [2019-10-13 21:29:15,564 INFO L168 Benchmark]: CACSL2BoogieTranslator took 427.58 ms. Allocated memory was 137.9 MB in the beginning and 200.8 MB in the end (delta: 62.9 MB). Free memory was 100.2 MB in the beginning and 178.3 MB in the end (delta: -78.1 MB). Peak memory consumption was 24.9 MB. Max. memory is 7.1 GB. [2019-10-13 21:29:15,565 INFO L168 Benchmark]: Boogie Preprocessor took 51.25 ms. Allocated memory is still 200.8 MB. Free memory was 178.3 MB in the beginning and 175.7 MB in the end (delta: 2.6 MB). Peak memory consumption was 2.6 MB. Max. memory is 7.1 GB. [2019-10-13 21:29:15,565 INFO L168 Benchmark]: RCFGBuilder took 592.99 ms. Allocated memory is still 200.8 MB. Free memory was 175.7 MB in the beginning and 144.8 MB in the end (delta: 30.9 MB). Peak memory consumption was 30.9 MB. Max. memory is 7.1 GB. [2019-10-13 21:29:15,567 INFO L168 Benchmark]: TraceAbstraction took 4736.96 ms. Allocated memory was 200.8 MB in the beginning and 287.3 MB in the end (delta: 86.5 MB). Free memory was 144.8 MB in the beginning and 108.2 MB in the end (delta: 36.6 MB). Peak memory consumption was 123.1 MB. Max. memory is 7.1 GB. [2019-10-13 21:29:15,571 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.22 ms. Allocated memory is still 137.9 MB. Free memory was 119.9 MB in the beginning and 119.7 MB in the end (delta: 210.0 kB). Peak memory consumption was 210.0 kB. Max. memory is 7.1 GB. * CACSL2BoogieTranslator took 427.58 ms. Allocated memory was 137.9 MB in the beginning and 200.8 MB in the end (delta: 62.9 MB). Free memory was 100.2 MB in the beginning and 178.3 MB in the end (delta: -78.1 MB). Peak memory consumption was 24.9 MB. Max. memory is 7.1 GB. * Boogie Preprocessor took 51.25 ms. Allocated memory is still 200.8 MB. Free memory was 178.3 MB in the beginning and 175.7 MB in the end (delta: 2.6 MB). Peak memory consumption was 2.6 MB. Max. memory is 7.1 GB. * RCFGBuilder took 592.99 ms. Allocated memory is still 200.8 MB. Free memory was 175.7 MB in the beginning and 144.8 MB in the end (delta: 30.9 MB). Peak memory consumption was 30.9 MB. Max. memory is 7.1 GB. * TraceAbstraction took 4736.96 ms. Allocated memory was 200.8 MB in the beginning and 287.3 MB in the end (delta: 86.5 MB). Free memory was 144.8 MB in the beginning and 108.2 MB in the end (delta: 36.6 MB). Peak memory consumption was 123.1 MB. Max. memory is 7.1 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 10]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L15] int q_buf_0 ; [L16] int q_free ; [L17] int q_read_ev ; [L18] int q_write_ev ; [L19] int q_req_up ; [L20] int q_ev ; [L41] int p_num_write ; [L42] int p_last_write ; [L43] int p_dw_st ; [L44] int p_dw_pc ; [L45] int p_dw_i ; [L46] int c_num_read ; [L47] int c_last_read ; [L48] int c_dr_st ; [L49] int c_dr_pc ; [L50] int c_dr_i ; [L154] static int a_t ; VAL [\old(a_t)=11, \old(c_dr_i)=3, \old(c_dr_pc)=13, \old(c_dr_st)=17, \old(c_last_read)=5, \old(c_num_read)=6, \old(p_dw_i)=4, \old(p_dw_pc)=15, \old(p_dw_st)=9, \old(p_last_write)=19, \old(p_num_write)=7, \old(q_buf_0)=10, \old(q_ev)=16, \old(q_free)=18, \old(q_read_ev)=14, \old(q_req_up)=12, \old(q_write_ev)=8, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0] [L456] int __retres1 ; VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=0, \old(q_read_ev)=0, \old(q_req_up)=0, \old(q_write_ev)=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0] [L460] CALL init_model() VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=0, \old(q_read_ev)=0, \old(q_req_up)=0, \old(q_write_ev)=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0] [L442] q_free = 1 [L443] q_write_ev = 2 [L444] q_read_ev = q_write_ev [L445] p_num_write = 0 [L446] p_dw_pc = 0 [L447] p_dw_i = 1 [L448] c_num_read = 0 [L449] c_dr_pc = 0 [L450] c_dr_i = 1 VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=0, \old(q_read_ev)=0, \old(q_req_up)=0, \old(q_write_ev)=0, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L460] RET init_model() VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=0, \old(q_read_ev)=0, \old(q_req_up)=0, \old(q_write_ev)=0, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L461] CALL start_simulation() VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L396] int kernel_st ; [L397] int tmp ; [L401] kernel_st = 0 VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, kernel_st=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L402] CALL update_channels() VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L212] COND FALSE !((int )q_req_up == 1) VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L402] RET update_channels() VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, kernel_st=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L403] CALL init_threads() VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L227] COND TRUE (int )p_dw_i == 1 [L228] p_dw_st = 0 VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L232] COND TRUE (int )c_dr_i == 1 [L233] c_dr_st = 0 VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L403] RET init_threads() VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, kernel_st=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L404] CALL fire_delta_events() VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L265] COND FALSE !((int )q_read_ev == 0) VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L270] COND FALSE !((int )q_write_ev == 0) VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L404] RET fire_delta_events() VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, kernel_st=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L405] CALL activate_threads() VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L298] int tmp ; [L299] int tmp___0 ; VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L303] CALL, EXPR is_do_write_p_triggered() VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L52] int __retres1 ; VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L55] COND FALSE !((int )p_dw_pc == 1) VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L65] __retres1 = 0 VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, __retres1=0, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L67] return (__retres1); VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, \result=0, __retres1=0, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L303] RET, EXPR is_do_write_p_triggered() VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, is_do_write_p_triggered()=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L303] tmp = is_do_write_p_triggered() [L305] COND FALSE !(\read(tmp)) VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2, tmp=0] [L311] CALL, EXPR is_do_read_c_triggered() VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L71] int __retres1 ; VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L74] COND FALSE !((int )c_dr_pc == 1) VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L84] __retres1 = 0 VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, __retres1=0, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L86] return (__retres1); VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, \result=0, __retres1=0, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L311] RET, EXPR is_do_read_c_triggered() VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, is_do_read_c_triggered()=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2, tmp=0] [L311] tmp___0 = is_do_read_c_triggered() [L313] COND FALSE !(\read(tmp___0)) VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2, tmp=0, tmp___0=0] [L405] RET activate_threads() VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, kernel_st=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L406] CALL reset_delta_events() VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L283] COND FALSE !((int )q_read_ev == 1) VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L288] COND FALSE !((int )q_write_ev == 1) VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L406] RET reset_delta_events() VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, kernel_st=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L409] COND TRUE 1 VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, kernel_st=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L412] kernel_st = 1 VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, kernel_st=1, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L413] CALL eval() VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L323] int tmp ; [L324] int tmp___0 ; [L325] int tmp___1 ; VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L329] COND TRUE 1 VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L332] CALL, EXPR exists_runnable_thread() VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L242] int __retres1 ; VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L245] COND TRUE (int )p_dw_st == 0 [L246] __retres1 = 1 VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, __retres1=1, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L258] return (__retres1); VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, \result=1, __retres1=1, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L332] RET, EXPR exists_runnable_thread() VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, exists_runnable_thread()=1, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L332] tmp___1 = exists_runnable_thread() [L334] COND TRUE \read(tmp___1) VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2, tmp___1=1] [L339] COND TRUE (int )p_dw_st == 0 [L341] tmp = __VERIFIER_nondet_int() [L343] COND FALSE !(\read(tmp)) VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2, tmp=0, tmp___1=1] [L349] CALL error() VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L10] __VERIFIER_error() VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] - StatisticsResult: Ultimate Automizer benchmark data CFG has 20 procedures, 140 locations, 1 error locations. Result: UNSAFE, OverallTime: 4.6s, OverallIterations: 7, TraceHistogramMax: 1, AutomataDifference: 3.0s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 1187 SDtfs, 1360 SDslu, 1917 SDs, 0 SdLazy, 1726 SolverSat, 407 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 1.8s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 63 GetRequests, 32 SyntacticMatches, 0 SemanticMatches, 31 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.2s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=683occurred in iteration=6, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 0.3s AutomataMinimizationTime, 6 MinimizatonAttempts, 265 StatesRemovedByMinimization, 6 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.2s SatisfiabilityAnalysisTime, 0.5s InterpolantComputationTime, 490 NumberOfCodeBlocks, 490 NumberOfCodeBlocksAsserted, 7 NumberOfCheckSat, 414 ConstructedInterpolants, 0 QuantifiedInterpolants, 43608 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 6 InterpolantComputations, 6 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...