java -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata ./data -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/default/automizer/svcomp-Reach-32bit-Automizer_Default.epf --traceabstraction.trace.refinement.strategy SIFA_TAIPAN --sifa.abstract.domain CompoundDomain --rcfgbuilder.size.of.a.code.block LoopFreeBlock --sifa.call.summarizer TopInputCallSummarizer --sifa.fluid SizeLimitFluid --sifa.simplification.technique SIMPLIFY_QUICK -i ../../../trunk/examples/svcomp/array-crafted/mapsum1.i -------------------------------------------------------------------------------- This is Ultimate 0.1.24-f4eb214f-m [2019-10-13 21:30:45,303 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-10-13 21:30:45,306 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-10-13 21:30:45,323 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-10-13 21:30:45,324 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-10-13 21:30:45,326 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-10-13 21:30:45,328 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-10-13 21:30:45,337 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-10-13 21:30:45,342 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-10-13 21:30:45,346 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-10-13 21:30:45,347 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-10-13 21:30:45,349 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-10-13 21:30:45,349 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-10-13 21:30:45,351 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-10-13 21:30:45,353 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-10-13 21:30:45,355 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-10-13 21:30:45,356 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-10-13 21:30:45,357 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-10-13 21:30:45,358 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-10-13 21:30:45,363 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-10-13 21:30:45,368 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-10-13 21:30:45,371 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-10-13 21:30:45,374 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-10-13 21:30:45,375 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-10-13 21:30:45,377 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-10-13 21:30:45,378 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-10-13 21:30:45,378 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-10-13 21:30:45,380 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-10-13 21:30:45,381 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-10-13 21:30:45,383 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-10-13 21:30:45,383 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-10-13 21:30:45,385 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-10-13 21:30:45,386 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-10-13 21:30:45,386 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-10-13 21:30:45,388 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-10-13 21:30:45,388 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-10-13 21:30:45,389 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-10-13 21:30:45,389 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-10-13 21:30:45,389 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-10-13 21:30:45,390 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-10-13 21:30:45,391 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-10-13 21:30:45,392 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/default/automizer/svcomp-Reach-32bit-Automizer_Default.epf [2019-10-13 21:30:45,418 INFO L113 SettingsManager]: Loading preferences was successful [2019-10-13 21:30:45,419 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-10-13 21:30:45,421 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-10-13 21:30:45,422 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-10-13 21:30:45,422 INFO L138 SettingsManager]: * Use SBE=true [2019-10-13 21:30:45,422 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-10-13 21:30:45,422 INFO L138 SettingsManager]: * sizeof long=4 [2019-10-13 21:30:45,423 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-10-13 21:30:45,423 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-10-13 21:30:45,423 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-10-13 21:30:45,424 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-10-13 21:30:45,424 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-10-13 21:30:45,424 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-10-13 21:30:45,425 INFO L138 SettingsManager]: * sizeof long double=12 [2019-10-13 21:30:45,425 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-10-13 21:30:45,425 INFO L138 SettingsManager]: * Use constant arrays=true [2019-10-13 21:30:45,425 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-10-13 21:30:45,426 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-10-13 21:30:45,426 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-10-13 21:30:45,426 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-10-13 21:30:45,426 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-10-13 21:30:45,426 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-10-13 21:30:45,427 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-10-13 21:30:45,427 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-10-13 21:30:45,427 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-10-13 21:30:45,427 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-10-13 21:30:45,427 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-10-13 21:30:45,428 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-10-13 21:30:45,428 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: Trace refinement strategy -> SIFA_TAIPAN Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.sifa: Abstract Domain -> CompoundDomain Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder: Size of a code block -> LoopFreeBlock Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.sifa: Call Summarizer -> TopInputCallSummarizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.sifa: Fluid -> SizeLimitFluid Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.sifa: Simplification Technique -> SIMPLIFY_QUICK [2019-10-13 21:30:45,716 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-10-13 21:30:45,736 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-10-13 21:30:45,740 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-10-13 21:30:45,742 INFO L271 PluginConnector]: Initializing CDTParser... [2019-10-13 21:30:45,742 INFO L275 PluginConnector]: CDTParser initialized [2019-10-13 21:30:45,743 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/array-crafted/mapsum1.i [2019-10-13 21:30:45,818 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/fc550b348/48dc73b18d2549dd8e32657328105185/FLAG81881324a [2019-10-13 21:30:46,291 INFO L306 CDTParser]: Found 1 translation units. [2019-10-13 21:30:46,293 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/array-crafted/mapsum1.i [2019-10-13 21:30:46,300 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/fc550b348/48dc73b18d2549dd8e32657328105185/FLAG81881324a [2019-10-13 21:30:46,689 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/fc550b348/48dc73b18d2549dd8e32657328105185 [2019-10-13 21:30:46,699 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-10-13 21:30:46,700 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2019-10-13 21:30:46,701 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-10-13 21:30:46,701 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-10-13 21:30:46,704 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-10-13 21:30:46,705 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 13.10 09:30:46" (1/1) ... [2019-10-13 21:30:46,707 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@33ff8af and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.10 09:30:46, skipping insertion in model container [2019-10-13 21:30:46,707 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 13.10 09:30:46" (1/1) ... [2019-10-13 21:30:46,714 INFO L142 MainTranslator]: Starting translation in SV-COMP mode [2019-10-13 21:30:46,734 INFO L173 MainTranslator]: Built tables and reachable declarations [2019-10-13 21:30:46,925 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-10-13 21:30:46,934 INFO L188 MainTranslator]: Completed pre-run [2019-10-13 21:30:46,955 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-10-13 21:30:46,969 INFO L192 MainTranslator]: Completed translation [2019-10-13 21:30:46,970 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.10 09:30:46 WrapperNode [2019-10-13 21:30:46,970 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-10-13 21:30:46,970 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-10-13 21:30:46,971 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-10-13 21:30:46,971 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-10-13 21:30:47,063 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.10 09:30:46" (1/1) ... [2019-10-13 21:30:47,064 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.10 09:30:46" (1/1) ... [2019-10-13 21:30:47,073 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.10 09:30:46" (1/1) ... [2019-10-13 21:30:47,075 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.10 09:30:46" (1/1) ... [2019-10-13 21:30:47,091 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.10 09:30:46" (1/1) ... [2019-10-13 21:30:47,095 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.10 09:30:46" (1/1) ... [2019-10-13 21:30:47,097 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.10 09:30:46" (1/1) ... [2019-10-13 21:30:47,099 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-10-13 21:30:47,100 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-10-13 21:30:47,100 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-10-13 21:30:47,100 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-10-13 21:30:47,101 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.10 09:30:46" (1/1) ... No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-10-13 21:30:47,151 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2019-10-13 21:30:47,151 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-10-13 21:30:47,151 INFO L138 BoogieDeclarations]: Found implementation of procedure mapsum [2019-10-13 21:30:47,151 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2019-10-13 21:30:47,152 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_error [2019-10-13 21:30:47,152 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_int [2019-10-13 21:30:47,152 INFO L130 BoogieDeclarations]: Found specification of procedure mapsum [2019-10-13 21:30:47,153 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2019-10-13 21:30:47,153 INFO L130 BoogieDeclarations]: Found specification of procedure main [2019-10-13 21:30:47,153 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-10-13 21:30:47,153 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-10-13 21:30:47,154 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-10-13 21:30:47,154 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2019-10-13 21:30:47,154 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-10-13 21:30:47,549 INFO L279 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-10-13 21:30:47,549 INFO L284 CfgBuilder]: Removed 3 assume(true) statements. [2019-10-13 21:30:47,551 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 13.10 09:30:47 BoogieIcfgContainer [2019-10-13 21:30:47,551 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-10-13 21:30:47,552 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-10-13 21:30:47,552 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-10-13 21:30:47,555 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-10-13 21:30:47,555 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 13.10 09:30:46" (1/3) ... [2019-10-13 21:30:47,556 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@60fccd8b and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 13.10 09:30:47, skipping insertion in model container [2019-10-13 21:30:47,556 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.10 09:30:46" (2/3) ... [2019-10-13 21:30:47,557 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@60fccd8b and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 13.10 09:30:47, skipping insertion in model container [2019-10-13 21:30:47,557 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 13.10 09:30:47" (3/3) ... [2019-10-13 21:30:47,559 INFO L109 eAbstractionObserver]: Analyzing ICFG mapsum1.i [2019-10-13 21:30:47,569 INFO L152 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-10-13 21:30:47,577 INFO L164 ceAbstractionStarter]: Appying trace abstraction to program that has 1 error locations. [2019-10-13 21:30:47,588 INFO L249 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2019-10-13 21:30:47,609 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-10-13 21:30:47,609 INFO L374 AbstractCegarLoop]: Hoare is true [2019-10-13 21:30:47,609 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-10-13 21:30:47,610 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-10-13 21:30:47,610 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-10-13 21:30:47,610 INFO L378 AbstractCegarLoop]: Difference is false [2019-10-13 21:30:47,610 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-10-13 21:30:47,610 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-10-13 21:30:47,628 INFO L276 IsEmpty]: Start isEmpty. Operand 23 states. [2019-10-13 21:30:47,635 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2019-10-13 21:30:47,635 INFO L372 BasicCegarLoop]: Found error trace [2019-10-13 21:30:47,637 INFO L380 BasicCegarLoop]: trace histogram [3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-13 21:30:47,639 INFO L410 AbstractCegarLoop]: === Iteration 1 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-13 21:30:47,645 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-13 21:30:47,645 INFO L82 PathProgramCache]: Analyzing trace with hash 2002379581, now seen corresponding path program 1 times [2019-10-13 21:30:47,654 INFO L157 tionRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-10-13 21:30:47,654 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1820463451] [2019-10-13 21:30:47,654 INFO L116 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-13 21:30:47,655 INFO L116 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-13 21:30:47,655 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-13 21:30:47,754 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-13 21:30:47,834 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2019-10-13 21:30:47,840 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1820463451] [2019-10-13 21:30:47,842 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-10-13 21:30:47,843 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-10-13 21:30:47,843 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1847807062] [2019-10-13 21:30:47,850 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-10-13 21:30:47,851 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-10-13 21:30:47,869 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-10-13 21:30:47,870 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-10-13 21:30:47,873 INFO L87 Difference]: Start difference. First operand 23 states. Second operand 3 states. [2019-10-13 21:30:47,933 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-13 21:30:47,934 INFO L93 Difference]: Finished difference Result 41 states and 51 transitions. [2019-10-13 21:30:47,937 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-10-13 21:30:47,939 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 24 [2019-10-13 21:30:47,940 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-13 21:30:47,952 INFO L225 Difference]: With dead ends: 41 [2019-10-13 21:30:47,952 INFO L226 Difference]: Without dead ends: 20 [2019-10-13 21:30:47,959 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-10-13 21:30:47,979 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20 states. [2019-10-13 21:30:48,011 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20 to 20. [2019-10-13 21:30:48,012 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20 states. [2019-10-13 21:30:48,016 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20 states to 20 states and 24 transitions. [2019-10-13 21:30:48,019 INFO L78 Accepts]: Start accepts. Automaton has 20 states and 24 transitions. Word has length 24 [2019-10-13 21:30:48,020 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-13 21:30:48,020 INFO L462 AbstractCegarLoop]: Abstraction has 20 states and 24 transitions. [2019-10-13 21:30:48,020 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-10-13 21:30:48,021 INFO L276 IsEmpty]: Start isEmpty. Operand 20 states and 24 transitions. [2019-10-13 21:30:48,025 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2019-10-13 21:30:48,025 INFO L372 BasicCegarLoop]: Found error trace [2019-10-13 21:30:48,026 INFO L380 BasicCegarLoop]: trace histogram [3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-13 21:30:48,026 INFO L410 AbstractCegarLoop]: === Iteration 2 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-13 21:30:48,028 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-13 21:30:48,028 INFO L82 PathProgramCache]: Analyzing trace with hash 1641553888, now seen corresponding path program 1 times [2019-10-13 21:30:48,029 INFO L157 tionRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-10-13 21:30:48,030 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1383693471] [2019-10-13 21:30:48,030 INFO L116 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-13 21:30:48,030 INFO L116 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-13 21:30:48,030 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-13 21:30:48,104 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-13 21:30:48,177 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2019-10-13 21:30:48,178 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1383693471] [2019-10-13 21:30:48,178 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1161227843] [2019-10-13 21:30:48,179 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-13 21:30:48,252 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-13 21:30:48,254 INFO L256 TraceCheckSpWp]: Trace formula consists of 123 conjuncts, 2 conjunts are in the unsatisfiable core [2019-10-13 21:30:48,262 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2019-10-13 21:30:48,296 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2019-10-13 21:30:48,297 INFO L321 TraceCheckSpWp]: Computing backward predicates... [2019-10-13 21:30:48,356 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2019-10-13 21:30:48,357 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 2 imperfect interpolant sequences. [2019-10-13 21:30:48,357 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [3, 3] total 5 [2019-10-13 21:30:48,358 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1198336870] [2019-10-13 21:30:48,360 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-10-13 21:30:48,361 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-10-13 21:30:48,361 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-10-13 21:30:48,361 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-10-13 21:30:48,362 INFO L87 Difference]: Start difference. First operand 20 states and 24 transitions. Second operand 3 states. [2019-10-13 21:30:48,377 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-13 21:30:48,377 INFO L93 Difference]: Finished difference Result 33 states and 43 transitions. [2019-10-13 21:30:48,378 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-10-13 21:30:48,379 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 25 [2019-10-13 21:30:48,379 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-13 21:30:48,380 INFO L225 Difference]: With dead ends: 33 [2019-10-13 21:30:48,380 INFO L226 Difference]: Without dead ends: 21 [2019-10-13 21:30:48,382 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 52 GetRequests, 49 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-10-13 21:30:48,382 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21 states. [2019-10-13 21:30:48,389 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21 to 21. [2019-10-13 21:30:48,390 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21 states. [2019-10-13 21:30:48,392 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21 states to 21 states and 25 transitions. [2019-10-13 21:30:48,393 INFO L78 Accepts]: Start accepts. Automaton has 21 states and 25 transitions. Word has length 25 [2019-10-13 21:30:48,393 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-13 21:30:48,394 INFO L462 AbstractCegarLoop]: Abstraction has 21 states and 25 transitions. [2019-10-13 21:30:48,394 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-10-13 21:30:48,395 INFO L276 IsEmpty]: Start isEmpty. Operand 21 states and 25 transitions. [2019-10-13 21:30:48,398 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2019-10-13 21:30:48,398 INFO L372 BasicCegarLoop]: Found error trace [2019-10-13 21:30:48,399 INFO L380 BasicCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-13 21:30:48,605 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 2 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-13 21:30:48,605 INFO L410 AbstractCegarLoop]: === Iteration 3 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-13 21:30:48,606 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-13 21:30:48,606 INFO L82 PathProgramCache]: Analyzing trace with hash -1715048104, now seen corresponding path program 1 times [2019-10-13 21:30:48,607 INFO L157 tionRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-10-13 21:30:48,607 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1391906798] [2019-10-13 21:30:48,607 INFO L116 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-13 21:30:48,607 INFO L116 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-13 21:30:48,608 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-13 21:30:48,654 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-13 21:30:48,713 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2019-10-13 21:30:48,713 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1391906798] [2019-10-13 21:30:48,714 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-10-13 21:30:48,714 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-10-13 21:30:48,715 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1129126342] [2019-10-13 21:30:48,715 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-10-13 21:30:48,716 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-10-13 21:30:48,716 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-10-13 21:30:48,717 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-10-13 21:30:48,717 INFO L87 Difference]: Start difference. First operand 21 states and 25 transitions. Second operand 3 states. [2019-10-13 21:30:48,735 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-13 21:30:48,735 INFO L93 Difference]: Finished difference Result 31 states and 36 transitions. [2019-10-13 21:30:48,736 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-10-13 21:30:48,736 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 28 [2019-10-13 21:30:48,737 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-13 21:30:48,738 INFO L225 Difference]: With dead ends: 31 [2019-10-13 21:30:48,738 INFO L226 Difference]: Without dead ends: 22 [2019-10-13 21:30:48,738 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-10-13 21:30:48,739 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22 states. [2019-10-13 21:30:48,747 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22 to 22. [2019-10-13 21:30:48,747 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22 states. [2019-10-13 21:30:48,750 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22 states to 22 states and 26 transitions. [2019-10-13 21:30:48,751 INFO L78 Accepts]: Start accepts. Automaton has 22 states and 26 transitions. Word has length 28 [2019-10-13 21:30:48,755 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-13 21:30:48,755 INFO L462 AbstractCegarLoop]: Abstraction has 22 states and 26 transitions. [2019-10-13 21:30:48,755 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-10-13 21:30:48,756 INFO L276 IsEmpty]: Start isEmpty. Operand 22 states and 26 transitions. [2019-10-13 21:30:48,757 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2019-10-13 21:30:48,757 INFO L372 BasicCegarLoop]: Found error trace [2019-10-13 21:30:48,757 INFO L380 BasicCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-13 21:30:48,758 INFO L410 AbstractCegarLoop]: === Iteration 4 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-13 21:30:48,758 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-13 21:30:48,758 INFO L82 PathProgramCache]: Analyzing trace with hash -1273676679, now seen corresponding path program 1 times [2019-10-13 21:30:48,759 INFO L157 tionRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-10-13 21:30:48,759 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2123928217] [2019-10-13 21:30:48,759 INFO L116 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-13 21:30:48,759 INFO L116 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-13 21:30:48,760 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-13 21:30:48,830 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-13 21:30:48,864 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2019-10-13 21:30:48,865 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2123928217] [2019-10-13 21:30:48,865 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2049080638] [2019-10-13 21:30:48,865 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-13 21:30:48,957 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-13 21:30:48,958 INFO L256 TraceCheckSpWp]: Trace formula consists of 142 conjuncts, 3 conjunts are in the unsatisfiable core [2019-10-13 21:30:48,961 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2019-10-13 21:30:48,979 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2019-10-13 21:30:48,979 INFO L321 TraceCheckSpWp]: Computing backward predicates... [2019-10-13 21:30:49,027 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2019-10-13 21:30:49,028 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSifa [1982154877] [2019-10-13 21:30:49,065 INFO L162 IcfgInterpreter]: Started Sifa with 19 locations of interest [2019-10-13 21:30:49,065 INFO L169 IcfgInterpreter]: Building call graph [2019-10-13 21:30:49,074 INFO L174 IcfgInterpreter]: Initial procedures are [ULTIMATE.start] [2019-10-13 21:30:49,086 INFO L179 IcfgInterpreter]: Starting interpretation [2019-10-13 21:30:49,087 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.start with input of size 1 for LOIs [2019-10-13 21:30:49,216 INFO L199 IcfgInterpreter]: Interpreting procedure main with input of size 21 for LOIs [2019-10-13 21:30:51,264 INFO L199 IcfgInterpreter]: Interpreting procedure mapsum with input of size 1 for LOIs [2019-10-13 21:30:51,318 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.init with input of size 10 for LOIs [2019-10-13 21:30:51,323 INFO L183 IcfgInterpreter]: Interpretation finished [2019-10-13 21:30:51,323 INFO L191 IcfgInterpreter]: Final predicates for locations of interest are: [2019-10-13 21:30:51,323 INFO L193 IcfgInterpreter]: Reachable states at location mapsumENTRY satisfy 601#true [2019-10-13 21:30:51,323 INFO L193 IcfgInterpreter]: Reachable states at location L26-4 satisfy 73#(and (not (< main_~i~1 100)) (<= 100 main_~i~1)) [2019-10-13 21:30:51,324 INFO L193 IcfgInterpreter]: Reachable states at location L33 satisfy 592#(exists ((v_prenex_2 Int) (v_mapsum_~ret~0_BEFORE_RETURN_1 Int) (v_prenex_1 Int) (v_mapsum_~ret~0_BEFORE_RETURN_2 Int)) (or (and (not (< main_~i~1 100)) (<= main_~ret~1 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (= main_~ret~1 (+ (mod v_prenex_1 4294967296) (- 4294967296))) (not (<= (mod v_prenex_1 4294967296) 2147483647)) (<= 0 (+ main_~ret~1 2147483648))) (and (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_1 4294967296) 2147483647) (not (< main_~i~1 100)) (<= main_~ret~1 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (= (mod v_mapsum_~ret~0_BEFORE_RETURN_1 4294967296) main_~ret~1) (<= 0 (+ main_~ret~1 2147483648))) (and (not (< main_~i~1 100)) (<= main_~ret~1 2147483647) (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_2 4294967296) 2147483647)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (= (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_2 4294967296) (- 4294967296)) main_~ret~1) (<= 0 (+ main_~ret~1 2147483648))) (and (not (< main_~i~1 100)) (<= main_~ret~1 2147483647) (= main_~ret~1 (mod v_prenex_2 4294967296)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (<= (mod v_prenex_2 4294967296) 2147483647) (<= 0 (+ main_~ret~1 2147483648))))) [2019-10-13 21:30:51,324 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initENTRY satisfy 648#(and (= |old(#NULL.base)| |#NULL.base|) (= |#valid| |old(#valid)|) (= |#NULL.offset| |old(#NULL.offset)|)) [2019-10-13 21:30:51,324 INFO L193 IcfgInterpreter]: Reachable states at location L26-3 satisfy 68#true [2019-10-13 21:30:51,324 INFO L193 IcfgInterpreter]: Reachable states at location L12-3 satisfy 639#(<= 0 mapsum_~i~0) [2019-10-13 21:30:51,325 INFO L193 IcfgInterpreter]: Reachable states at location L-1 satisfy 23#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= 0 (select |#valid| 0)) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-13 21:30:51,325 INFO L193 IcfgInterpreter]: Reachable states at location mainENTRY satisfy 33#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= |#valid| |old(#valid)|) (<= 0 |#NULL.base|) (= |#memory_int| |old(#memory_int)|) (= |#NULL.offset| 0) (= |old(#length)| |#length|) (= 0 (select |old(#valid)| 0)) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-13 21:30:51,325 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initEXIT satisfy 653#(and (= |#valid| (store |old(#valid)| 0 0)) (= 0 |#NULL.base|) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-13 21:30:51,325 INFO L193 IcfgInterpreter]: Reachable states at location L39-1 satisfy 479#true [2019-10-13 21:30:51,327 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.startENTRY satisfy 6#true [2019-10-13 21:30:51,327 INFO L193 IcfgInterpreter]: Reachable states at location L39 satisfy 522#(and (<= 99 main_~i~2) (not (< main_~i~2 99)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396)))) [2019-10-13 21:30:51,327 INFO L193 IcfgInterpreter]: Reachable states at location L30 satisfy 120#(or (exists ((v_mapsum_~ret~0_BEFORE_RETURN_1 Int) (v_prenex_1 Int)) (or (and (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_1 4294967296) 2147483647) (not (< main_~i~1 100)) (= (mod v_mapsum_~ret~0_BEFORE_RETURN_1 4294967296) |main_#t~ret4|)) (and (not (< main_~i~1 100)) (= (+ (mod v_prenex_1 4294967296) (- 4294967296)) |main_#t~ret4|) (not (<= (mod v_prenex_1 4294967296) 2147483647))))) (exists ((v_prenex_2 Int) (v_mapsum_~ret~0_BEFORE_RETURN_2 Int)) (or (and (not (< main_~i~1 100)) (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_2 4294967296) 2147483647)) (= (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_2 4294967296) (- 4294967296)) |main_#t~ret4|)) (and (not (< main_~i~1 100)) (= |main_#t~ret4| (mod v_prenex_2 4294967296)) (<= (mod v_prenex_2 4294967296) 2147483647))))) [2019-10-13 21:30:51,328 INFO L193 IcfgInterpreter]: Reachable states at location mainErr0ASSERT_VIOLATIONERROR_FUNCTION satisfy 234#(or (and (exists ((v_prenex_29 Int) (v_prenex_30 Int) (v_mapsum_~ret~0_BEFORE_RETURN_5 Int) (v_mapsum_~ret~0_BEFORE_RETURN_6 Int)) (or (and (not (< main_~i~2 99)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= main_~ret5~0 (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_6 4294967296) (- 4294967296))) (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_6 4294967296) 2147483647))) (and (not (< main_~i~2 99)) (<= (mod v_prenex_29 4294967296) 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (mod v_prenex_29 4294967296) main_~ret5~0)) (and (= main_~ret5~0 (mod v_prenex_30 4294967296)) (not (< main_~i~2 99)) (<= (mod v_prenex_30 4294967296) 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648))) (and (not (< main_~i~2 99)) (= (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_5 4294967296) (- 4294967296)) main_~ret5~0) (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_5 4294967296) 2147483647)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648))))) (not (= main_~ret~1 main_~ret5~0))) (and (not (= main_~ret~1 main_~ret2~0)) (exists ((v_prenex_29 Int) (v_prenex_30 Int) (v_mapsum_~ret~0_BEFORE_RETURN_5 Int) (v_mapsum_~ret~0_BEFORE_RETURN_6 Int)) (or (and (not (< main_~i~2 99)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= main_~ret5~0 (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_6 4294967296) (- 4294967296))) (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_6 4294967296) 2147483647))) (and (not (< main_~i~2 99)) (<= (mod v_prenex_29 4294967296) 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (mod v_prenex_29 4294967296) main_~ret5~0)) (and (= main_~ret5~0 (mod v_prenex_30 4294967296)) (not (< main_~i~2 99)) (<= (mod v_prenex_30 4294967296) 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648))) (and (not (< main_~i~2 99)) (= (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_5 4294967296) (- 4294967296)) main_~ret5~0) (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_5 4294967296) 2147483647)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648))))))) [2019-10-13 21:30:51,328 INFO L193 IcfgInterpreter]: Reachable states at location L41 satisfy 424#true [2019-10-13 21:30:51,328 INFO L193 IcfgInterpreter]: Reachable states at location L42 satisfy 313#true [2019-10-13 21:30:51,329 INFO L193 IcfgInterpreter]: Reachable states at location mapsumEXIT satisfy 644#(and (<= 100 mapsum_~i~0) (= (ite (<= (mod mapsum_~ret~0 4294967296) 2147483647) (mod mapsum_~ret~0 4294967296) (+ (mod mapsum_~ret~0 4294967296) (- 4294967296))) |mapsum_#res|) (<= 0 mapsum_~i~0) (not (< mapsum_~i~0 100))) [2019-10-13 21:30:51,329 INFO L193 IcfgInterpreter]: Reachable states at location L33-1 satisfy 587#true [2019-10-13 21:30:51,329 INFO L193 IcfgInterpreter]: Reachable states at location L35-3 satisfy 560#true [2019-10-13 21:30:51,689 INFO L223 tionRefinementEngine]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2019-10-13 21:30:51,690 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4, 4, 11] total 17 [2019-10-13 21:30:51,690 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [868220953] [2019-10-13 21:30:51,692 INFO L442 AbstractCegarLoop]: Interpolant automaton has 18 states [2019-10-13 21:30:51,693 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-10-13 21:30:51,693 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2019-10-13 21:30:51,695 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=50, Invalid=256, Unknown=0, NotChecked=0, Total=306 [2019-10-13 21:30:51,695 INFO L87 Difference]: Start difference. First operand 22 states and 26 transitions. Second operand 18 states. [2019-10-13 21:30:52,378 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-13 21:30:52,378 INFO L93 Difference]: Finished difference Result 40 states and 50 transitions. [2019-10-13 21:30:52,378 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2019-10-13 21:30:52,378 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 29 [2019-10-13 21:30:52,379 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-13 21:30:52,380 INFO L225 Difference]: With dead ends: 40 [2019-10-13 21:30:52,380 INFO L226 Difference]: Without dead ends: 25 [2019-10-13 21:30:52,381 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 105 GetRequests, 77 SyntacticMatches, 0 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 198 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=133, Invalid=737, Unknown=0, NotChecked=0, Total=870 [2019-10-13 21:30:52,381 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25 states. [2019-10-13 21:30:52,389 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25 to 25. [2019-10-13 21:30:52,389 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 25 states. [2019-10-13 21:30:52,391 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25 states to 25 states and 29 transitions. [2019-10-13 21:30:52,392 INFO L78 Accepts]: Start accepts. Automaton has 25 states and 29 transitions. Word has length 29 [2019-10-13 21:30:52,392 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-13 21:30:52,392 INFO L462 AbstractCegarLoop]: Abstraction has 25 states and 29 transitions. [2019-10-13 21:30:52,392 INFO L463 AbstractCegarLoop]: Interpolant automaton has 18 states. [2019-10-13 21:30:52,392 INFO L276 IsEmpty]: Start isEmpty. Operand 25 states and 29 transitions. [2019-10-13 21:30:52,395 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2019-10-13 21:30:52,395 INFO L372 BasicCegarLoop]: Found error trace [2019-10-13 21:30:52,395 INFO L380 BasicCegarLoop]: trace histogram [4, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-13 21:30:52,598 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-13 21:30:52,599 INFO L410 AbstractCegarLoop]: === Iteration 5 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-13 21:30:52,600 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-13 21:30:52,600 INFO L82 PathProgramCache]: Analyzing trace with hash 811678230, now seen corresponding path program 2 times [2019-10-13 21:30:52,600 INFO L157 tionRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-10-13 21:30:52,600 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [913950981] [2019-10-13 21:30:52,601 INFO L116 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-13 21:30:52,601 INFO L116 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-13 21:30:52,602 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-13 21:30:52,650 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-13 21:30:52,717 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2019-10-13 21:30:52,717 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [913950981] [2019-10-13 21:30:52,717 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1265274417] [2019-10-13 21:30:52,718 INFO L92 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-13 21:30:52,787 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 2 check-sat command(s) [2019-10-13 21:30:52,787 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-10-13 21:30:52,788 INFO L256 TraceCheckSpWp]: Trace formula consists of 108 conjuncts, 3 conjunts are in the unsatisfiable core [2019-10-13 21:30:52,791 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2019-10-13 21:30:52,806 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 10 proven. 1 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2019-10-13 21:30:52,806 INFO L321 TraceCheckSpWp]: Computing backward predicates... [2019-10-13 21:30:52,836 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 10 proven. 1 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2019-10-13 21:30:52,837 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSifa [38503885] [2019-10-13 21:30:52,838 INFO L162 IcfgInterpreter]: Started Sifa with 19 locations of interest [2019-10-13 21:30:52,839 INFO L169 IcfgInterpreter]: Building call graph [2019-10-13 21:30:52,839 INFO L174 IcfgInterpreter]: Initial procedures are [ULTIMATE.start] [2019-10-13 21:30:52,839 INFO L179 IcfgInterpreter]: Starting interpretation [2019-10-13 21:30:52,840 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.start with input of size 1 for LOIs [2019-10-13 21:30:52,869 INFO L199 IcfgInterpreter]: Interpreting procedure main with input of size 21 for LOIs [2019-10-13 21:30:54,471 INFO L199 IcfgInterpreter]: Interpreting procedure mapsum with input of size 1 for LOIs [2019-10-13 21:30:54,508 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.init with input of size 10 for LOIs [2019-10-13 21:30:54,515 INFO L183 IcfgInterpreter]: Interpretation finished [2019-10-13 21:30:54,515 INFO L191 IcfgInterpreter]: Final predicates for locations of interest are: [2019-10-13 21:30:54,515 INFO L193 IcfgInterpreter]: Reachable states at location mapsumENTRY satisfy 601#true [2019-10-13 21:30:54,515 INFO L193 IcfgInterpreter]: Reachable states at location L26-4 satisfy 73#(and (not (< main_~i~1 100)) (<= 100 main_~i~1)) [2019-10-13 21:30:54,515 INFO L193 IcfgInterpreter]: Reachable states at location L33 satisfy 592#(exists ((v_mapsum_~ret~0_BEFORE_RETURN_27 Int) (v_prenex_196 Int) (v_mapsum_~ret~0_BEFORE_RETURN_28 Int) (v_prenex_195 Int)) (or (and (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_28 4294967296) 2147483647) (not (< main_~i~1 100)) (<= main_~ret~1 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (= (mod v_mapsum_~ret~0_BEFORE_RETURN_28 4294967296) main_~ret~1) (<= 0 (+ main_~ret~1 2147483648))) (and (= (+ (mod v_prenex_196 4294967296) (- 4294967296)) main_~ret~1) (not (< main_~i~1 100)) (not (<= (mod v_prenex_196 4294967296) 2147483647)) (<= main_~ret~1 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (<= 0 (+ main_~ret~1 2147483648))) (and (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_27 4294967296) 2147483647)) (not (< main_~i~1 100)) (<= main_~ret~1 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (= (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_27 4294967296) (- 4294967296)) main_~ret~1) (<= 0 (+ main_~ret~1 2147483648))) (and (not (< main_~i~1 100)) (<= main_~ret~1 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (= (mod v_prenex_195 4294967296) main_~ret~1) (<= (mod v_prenex_195 4294967296) 2147483647) (<= 0 (+ main_~ret~1 2147483648))))) [2019-10-13 21:30:54,516 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initENTRY satisfy 648#(and (= |old(#NULL.base)| |#NULL.base|) (= |#valid| |old(#valid)|) (= |#NULL.offset| |old(#NULL.offset)|)) [2019-10-13 21:30:54,516 INFO L193 IcfgInterpreter]: Reachable states at location L26-3 satisfy 68#true [2019-10-13 21:30:54,516 INFO L193 IcfgInterpreter]: Reachable states at location L12-3 satisfy 639#(<= 0 mapsum_~i~0) [2019-10-13 21:30:54,516 INFO L193 IcfgInterpreter]: Reachable states at location L-1 satisfy 23#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= 0 (select |#valid| 0)) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-13 21:30:54,516 INFO L193 IcfgInterpreter]: Reachable states at location mainENTRY satisfy 33#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= |#valid| |old(#valid)|) (<= 0 |#NULL.base|) (= |#memory_int| |old(#memory_int)|) (= |#NULL.offset| 0) (= |old(#length)| |#length|) (= 0 (select |old(#valid)| 0)) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-13 21:30:54,517 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initEXIT satisfy 653#(and (= |#valid| (store |old(#valid)| 0 0)) (= 0 |#NULL.base|) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-13 21:30:54,517 INFO L193 IcfgInterpreter]: Reachable states at location L39-1 satisfy 479#true [2019-10-13 21:30:54,517 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.startENTRY satisfy 6#true [2019-10-13 21:30:54,517 INFO L193 IcfgInterpreter]: Reachable states at location L39 satisfy 522#(and (<= 99 main_~i~2) (not (< main_~i~2 99)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396)))) [2019-10-13 21:30:54,518 INFO L193 IcfgInterpreter]: Reachable states at location L30 satisfy 120#(or (exists ((v_mapsum_~ret~0_BEFORE_RETURN_27 Int) (v_prenex_195 Int)) (or (and (not (< main_~i~1 100)) (= (mod v_prenex_195 4294967296) |main_#t~ret4|) (<= (mod v_prenex_195 4294967296) 2147483647)) (and (not (< main_~i~1 100)) (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_27 4294967296) 2147483647)) (= (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_27 4294967296) (- 4294967296)) |main_#t~ret4|)))) (exists ((v_prenex_196 Int) (v_mapsum_~ret~0_BEFORE_RETURN_28 Int)) (or (and (not (< main_~i~1 100)) (= (+ (mod v_prenex_196 4294967296) (- 4294967296)) |main_#t~ret4|) (not (<= (mod v_prenex_196 4294967296) 2147483647))) (and (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_28 4294967296) 2147483647) (not (< main_~i~1 100)) (= (mod v_mapsum_~ret~0_BEFORE_RETURN_28 4294967296) |main_#t~ret4|))))) [2019-10-13 21:30:54,519 INFO L193 IcfgInterpreter]: Reachable states at location mainErr0ASSERT_VIOLATIONERROR_FUNCTION satisfy 234#(or (and (not (= main_~ret~1 main_~ret2~0)) (exists ((v_mapsum_~ret~0_BEFORE_RETURN_32 Int) (v_mapsum_~ret~0_BEFORE_RETURN_31 Int) (v_prenex_224 Int) (v_prenex_223 Int)) (or (and (not (< main_~i~2 99)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (= main_~ret5~0 (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_31 4294967296) (- 4294967296))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_31 4294967296) 2147483647))) (and (not (< main_~i~2 99)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (<= (mod v_prenex_223 4294967296) 2147483647) (= (mod v_prenex_223 4294967296) main_~ret5~0)) (and (= (mod v_mapsum_~ret~0_BEFORE_RETURN_32 4294967296) main_~ret5~0) (not (< main_~i~2 99)) (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_32 4294967296) 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648))) (and (not (< main_~i~2 99)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (not (<= (mod v_prenex_224 4294967296) 2147483647)) (<= main_~ret5~0 2147483647) (= main_~ret5~0 (+ (mod v_prenex_224 4294967296) (- 4294967296))) (<= 0 (+ main_~ret5~0 2147483648)))))) (and (exists ((v_mapsum_~ret~0_BEFORE_RETURN_32 Int) (v_mapsum_~ret~0_BEFORE_RETURN_31 Int) (v_prenex_224 Int) (v_prenex_223 Int)) (or (and (not (< main_~i~2 99)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (= main_~ret5~0 (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_31 4294967296) (- 4294967296))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_31 4294967296) 2147483647))) (and (not (< main_~i~2 99)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (<= (mod v_prenex_223 4294967296) 2147483647) (= (mod v_prenex_223 4294967296) main_~ret5~0)) (and (= (mod v_mapsum_~ret~0_BEFORE_RETURN_32 4294967296) main_~ret5~0) (not (< main_~i~2 99)) (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_32 4294967296) 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648))) (and (not (< main_~i~2 99)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (not (<= (mod v_prenex_224 4294967296) 2147483647)) (<= main_~ret5~0 2147483647) (= main_~ret5~0 (+ (mod v_prenex_224 4294967296) (- 4294967296))) (<= 0 (+ main_~ret5~0 2147483648))))) (not (= main_~ret~1 main_~ret5~0)))) [2019-10-13 21:30:54,519 INFO L193 IcfgInterpreter]: Reachable states at location L41 satisfy 424#true [2019-10-13 21:30:54,519 INFO L193 IcfgInterpreter]: Reachable states at location L42 satisfy 313#true [2019-10-13 21:30:54,519 INFO L193 IcfgInterpreter]: Reachable states at location mapsumEXIT satisfy 644#(and (<= 100 mapsum_~i~0) (= (ite (<= (mod mapsum_~ret~0 4294967296) 2147483647) (mod mapsum_~ret~0 4294967296) (+ (mod mapsum_~ret~0 4294967296) (- 4294967296))) |mapsum_#res|) (<= 0 mapsum_~i~0) (not (< mapsum_~i~0 100))) [2019-10-13 21:30:54,519 INFO L193 IcfgInterpreter]: Reachable states at location L33-1 satisfy 587#true [2019-10-13 21:30:54,520 INFO L193 IcfgInterpreter]: Reachable states at location L35-3 satisfy 560#true [2019-10-13 21:30:54,881 INFO L223 tionRefinementEngine]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2019-10-13 21:30:54,881 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 4, 4, 11] total 21 [2019-10-13 21:30:54,881 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [871623943] [2019-10-13 21:30:54,883 INFO L442 AbstractCegarLoop]: Interpolant automaton has 22 states [2019-10-13 21:30:54,883 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-10-13 21:30:54,883 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2019-10-13 21:30:54,884 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=64, Invalid=398, Unknown=0, NotChecked=0, Total=462 [2019-10-13 21:30:54,884 INFO L87 Difference]: Start difference. First operand 25 states and 29 transitions. Second operand 22 states. [2019-10-13 21:30:55,799 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-13 21:30:55,799 INFO L93 Difference]: Finished difference Result 44 states and 58 transitions. [2019-10-13 21:30:55,800 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2019-10-13 21:30:55,800 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 32 [2019-10-13 21:30:55,800 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-13 21:30:55,801 INFO L225 Difference]: With dead ends: 44 [2019-10-13 21:30:55,801 INFO L226 Difference]: Without dead ends: 29 [2019-10-13 21:30:55,803 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 119 GetRequests, 82 SyntacticMatches, 0 SemanticMatches, 37 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 305 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=210, Invalid=1272, Unknown=0, NotChecked=0, Total=1482 [2019-10-13 21:30:55,803 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 29 states. [2019-10-13 21:30:55,825 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 29 to 29. [2019-10-13 21:30:55,825 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 29 states. [2019-10-13 21:30:55,827 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29 states to 29 states and 33 transitions. [2019-10-13 21:30:55,827 INFO L78 Accepts]: Start accepts. Automaton has 29 states and 33 transitions. Word has length 32 [2019-10-13 21:30:55,827 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-13 21:30:55,827 INFO L462 AbstractCegarLoop]: Abstraction has 29 states and 33 transitions. [2019-10-13 21:30:55,828 INFO L463 AbstractCegarLoop]: Interpolant automaton has 22 states. [2019-10-13 21:30:55,828 INFO L276 IsEmpty]: Start isEmpty. Operand 29 states and 33 transitions. [2019-10-13 21:30:55,831 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2019-10-13 21:30:55,831 INFO L372 BasicCegarLoop]: Found error trace [2019-10-13 21:30:55,831 INFO L380 BasicCegarLoop]: trace histogram [12, 5, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-13 21:30:56,034 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 4 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-13 21:30:56,035 INFO L410 AbstractCegarLoop]: === Iteration 6 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-13 21:30:56,035 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-13 21:30:56,036 INFO L82 PathProgramCache]: Analyzing trace with hash -2095262385, now seen corresponding path program 3 times [2019-10-13 21:30:56,036 INFO L157 tionRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-10-13 21:30:56,036 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1419904410] [2019-10-13 21:30:56,036 INFO L116 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-13 21:30:56,037 INFO L116 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-13 21:30:56,037 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-13 21:30:56,072 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-13 21:30:56,141 INFO L134 CoverageAnalysis]: Checked inductivity of 127 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2019-10-13 21:30:56,141 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1419904410] [2019-10-13 21:30:56,141 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1179971191] [2019-10-13 21:30:56,142 INFO L92 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-13 21:30:56,244 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2019-10-13 21:30:56,244 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-10-13 21:30:56,245 INFO L256 TraceCheckSpWp]: Trace formula consists of 211 conjuncts, 7 conjunts are in the unsatisfiable core [2019-10-13 21:30:56,248 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2019-10-13 21:30:56,262 INFO L134 CoverageAnalysis]: Checked inductivity of 127 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2019-10-13 21:30:56,262 INFO L321 TraceCheckSpWp]: Computing backward predicates... [2019-10-13 21:30:56,340 INFO L134 CoverageAnalysis]: Checked inductivity of 127 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2019-10-13 21:30:56,341 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSifa [984636339] [2019-10-13 21:30:56,342 INFO L162 IcfgInterpreter]: Started Sifa with 19 locations of interest [2019-10-13 21:30:56,343 INFO L169 IcfgInterpreter]: Building call graph [2019-10-13 21:30:56,343 INFO L174 IcfgInterpreter]: Initial procedures are [ULTIMATE.start] [2019-10-13 21:30:56,343 INFO L179 IcfgInterpreter]: Starting interpretation [2019-10-13 21:30:56,344 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.start with input of size 1 for LOIs [2019-10-13 21:30:56,361 INFO L199 IcfgInterpreter]: Interpreting procedure main with input of size 21 for LOIs [2019-10-13 21:30:57,935 INFO L199 IcfgInterpreter]: Interpreting procedure mapsum with input of size 1 for LOIs [2019-10-13 21:30:57,977 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.init with input of size 10 for LOIs [2019-10-13 21:30:57,981 INFO L183 IcfgInterpreter]: Interpretation finished [2019-10-13 21:30:57,981 INFO L191 IcfgInterpreter]: Final predicates for locations of interest are: [2019-10-13 21:30:57,981 INFO L193 IcfgInterpreter]: Reachable states at location mapsumENTRY satisfy 601#true [2019-10-13 21:30:57,981 INFO L193 IcfgInterpreter]: Reachable states at location L26-4 satisfy 73#(and (not (< main_~i~1 100)) (<= 100 main_~i~1)) [2019-10-13 21:30:57,982 INFO L193 IcfgInterpreter]: Reachable states at location L33 satisfy 592#(exists ((v_mapsum_~ret~0_BEFORE_RETURN_54 Int) (v_mapsum_~ret~0_BEFORE_RETURN_53 Int) (v_prenex_389 Int) (v_prenex_390 Int)) (or (and (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_53 4294967296) 2147483647)) (not (< main_~i~1 100)) (<= main_~ret~1 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (= main_~ret~1 (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_53 4294967296) (- 4294967296))) (<= 0 (+ main_~ret~1 2147483648))) (and (not (< main_~i~1 100)) (<= main_~ret~1 2147483647) (= (mod v_prenex_389 4294967296) main_~ret~1) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (<= (mod v_prenex_389 4294967296) 2147483647) (<= 0 (+ main_~ret~1 2147483648))) (and (not (< main_~i~1 100)) (<= main_~ret~1 2147483647) (= main_~ret~1 (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_54 4294967296) (- 4294967296))) (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_54 4294967296) 2147483647)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (<= 0 (+ main_~ret~1 2147483648))) (and (<= (mod v_prenex_390 4294967296) 2147483647) (not (< main_~i~1 100)) (<= main_~ret~1 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (= (mod v_prenex_390 4294967296) main_~ret~1) (<= 0 (+ main_~ret~1 2147483648))))) [2019-10-13 21:30:57,982 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initENTRY satisfy 648#(and (= |old(#NULL.base)| |#NULL.base|) (= |#valid| |old(#valid)|) (= |#NULL.offset| |old(#NULL.offset)|)) [2019-10-13 21:30:57,982 INFO L193 IcfgInterpreter]: Reachable states at location L26-3 satisfy 68#true [2019-10-13 21:30:57,982 INFO L193 IcfgInterpreter]: Reachable states at location L12-3 satisfy 639#(<= 0 mapsum_~i~0) [2019-10-13 21:30:57,982 INFO L193 IcfgInterpreter]: Reachable states at location L-1 satisfy 23#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= 0 (select |#valid| 0)) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-13 21:30:57,983 INFO L193 IcfgInterpreter]: Reachable states at location mainENTRY satisfy 33#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= |#valid| |old(#valid)|) (<= 0 |#NULL.base|) (= |#memory_int| |old(#memory_int)|) (= |#NULL.offset| 0) (= |old(#length)| |#length|) (= 0 (select |old(#valid)| 0)) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-13 21:30:57,983 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initEXIT satisfy 653#(and (= |#valid| (store |old(#valid)| 0 0)) (= 0 |#NULL.base|) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-13 21:30:57,983 INFO L193 IcfgInterpreter]: Reachable states at location L39-1 satisfy 479#true [2019-10-13 21:30:57,983 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.startENTRY satisfy 6#true [2019-10-13 21:30:57,983 INFO L193 IcfgInterpreter]: Reachable states at location L39 satisfy 522#(and (<= 99 main_~i~2) (not (< main_~i~2 99)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396)))) [2019-10-13 21:30:57,983 INFO L193 IcfgInterpreter]: Reachable states at location L30 satisfy 120#(or (exists ((v_mapsum_~ret~0_BEFORE_RETURN_54 Int) (v_prenex_390 Int)) (or (and (<= (mod v_prenex_390 4294967296) 2147483647) (not (< main_~i~1 100)) (= (mod v_prenex_390 4294967296) |main_#t~ret4|)) (and (not (< main_~i~1 100)) (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_54 4294967296) 2147483647)) (= |main_#t~ret4| (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_54 4294967296) (- 4294967296)))))) (exists ((v_mapsum_~ret~0_BEFORE_RETURN_53 Int) (v_prenex_389 Int)) (or (and (= |main_#t~ret4| (mod v_prenex_389 4294967296)) (not (< main_~i~1 100)) (<= (mod v_prenex_389 4294967296) 2147483647)) (and (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_53 4294967296) 2147483647)) (not (< main_~i~1 100)) (= (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_53 4294967296) (- 4294967296)) |main_#t~ret4|))))) [2019-10-13 21:30:57,984 INFO L193 IcfgInterpreter]: Reachable states at location mainErr0ASSERT_VIOLATIONERROR_FUNCTION satisfy 234#(or (and (not (= main_~ret~1 main_~ret2~0)) (exists ((v_mapsum_~ret~0_BEFORE_RETURN_58 Int) (v_mapsum_~ret~0_BEFORE_RETURN_57 Int) (v_prenex_417 Int) (v_prenex_418 Int)) (or (and (not (< main_~i~2 99)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_58 4294967296) (- 4294967296)) main_~ret5~0) (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_58 4294967296) 2147483647))) (and (= main_~ret5~0 (mod v_mapsum_~ret~0_BEFORE_RETURN_57 4294967296)) (not (< main_~i~2 99)) (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_57 4294967296) 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648))) (and (= main_~ret5~0 (+ (mod v_prenex_417 4294967296) (- 4294967296))) (not (< main_~i~2 99)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (not (<= (mod v_prenex_417 4294967296) 2147483647))) (and (not (< main_~i~2 99)) (= main_~ret5~0 (mod v_prenex_418 4294967296)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (<= (mod v_prenex_418 4294967296) 2147483647))))) (and (exists ((v_mapsum_~ret~0_BEFORE_RETURN_58 Int) (v_mapsum_~ret~0_BEFORE_RETURN_57 Int) (v_prenex_417 Int) (v_prenex_418 Int)) (or (and (not (< main_~i~2 99)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_58 4294967296) (- 4294967296)) main_~ret5~0) (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_58 4294967296) 2147483647))) (and (= main_~ret5~0 (mod v_mapsum_~ret~0_BEFORE_RETURN_57 4294967296)) (not (< main_~i~2 99)) (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_57 4294967296) 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648))) (and (= main_~ret5~0 (+ (mod v_prenex_417 4294967296) (- 4294967296))) (not (< main_~i~2 99)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (not (<= (mod v_prenex_417 4294967296) 2147483647))) (and (not (< main_~i~2 99)) (= main_~ret5~0 (mod v_prenex_418 4294967296)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (<= (mod v_prenex_418 4294967296) 2147483647)))) (not (= main_~ret~1 main_~ret5~0)))) [2019-10-13 21:30:57,984 INFO L193 IcfgInterpreter]: Reachable states at location L41 satisfy 424#true [2019-10-13 21:30:57,984 INFO L193 IcfgInterpreter]: Reachable states at location L42 satisfy 313#true [2019-10-13 21:30:57,984 INFO L193 IcfgInterpreter]: Reachable states at location mapsumEXIT satisfy 644#(and (<= 100 mapsum_~i~0) (= (ite (<= (mod mapsum_~ret~0 4294967296) 2147483647) (mod mapsum_~ret~0 4294967296) (+ (mod mapsum_~ret~0 4294967296) (- 4294967296))) |mapsum_#res|) (<= 0 mapsum_~i~0) (not (< mapsum_~i~0 100))) [2019-10-13 21:30:57,985 INFO L193 IcfgInterpreter]: Reachable states at location L33-1 satisfy 587#true [2019-10-13 21:30:57,985 INFO L193 IcfgInterpreter]: Reachable states at location L35-3 satisfy 560#true [2019-10-13 21:30:58,334 INFO L223 tionRefinementEngine]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2019-10-13 21:30:58,334 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8, 8, 11] total 25 [2019-10-13 21:30:58,334 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [57575659] [2019-10-13 21:30:58,336 INFO L442 AbstractCegarLoop]: Interpolant automaton has 26 states [2019-10-13 21:30:58,338 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-10-13 21:30:58,338 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2019-10-13 21:30:58,338 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=134, Invalid=516, Unknown=0, NotChecked=0, Total=650 [2019-10-13 21:30:58,339 INFO L87 Difference]: Start difference. First operand 29 states and 33 transitions. Second operand 26 states. [2019-10-13 21:30:59,573 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-13 21:30:59,573 INFO L93 Difference]: Finished difference Result 54 states and 68 transitions. [2019-10-13 21:30:59,573 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2019-10-13 21:30:59,574 INFO L78 Accepts]: Start accepts. Automaton has 26 states. Word has length 42 [2019-10-13 21:30:59,574 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-13 21:30:59,575 INFO L225 Difference]: With dead ends: 54 [2019-10-13 21:30:59,575 INFO L226 Difference]: Without dead ends: 36 [2019-10-13 21:30:59,577 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 156 GetRequests, 112 SyntacticMatches, 0 SemanticMatches, 44 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 552 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=369, Invalid=1701, Unknown=0, NotChecked=0, Total=2070 [2019-10-13 21:30:59,577 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 36 states. [2019-10-13 21:30:59,582 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 36 to 36. [2019-10-13 21:30:59,583 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 36 states. [2019-10-13 21:30:59,583 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 36 states to 36 states and 40 transitions. [2019-10-13 21:30:59,584 INFO L78 Accepts]: Start accepts. Automaton has 36 states and 40 transitions. Word has length 42 [2019-10-13 21:30:59,584 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-13 21:30:59,584 INFO L462 AbstractCegarLoop]: Abstraction has 36 states and 40 transitions. [2019-10-13 21:30:59,584 INFO L463 AbstractCegarLoop]: Interpolant automaton has 26 states. [2019-10-13 21:30:59,584 INFO L276 IsEmpty]: Start isEmpty. Operand 36 states and 40 transitions. [2019-10-13 21:30:59,585 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2019-10-13 21:30:59,586 INFO L372 BasicCegarLoop]: Found error trace [2019-10-13 21:30:59,586 INFO L380 BasicCegarLoop]: trace histogram [12, 12, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-13 21:30:59,790 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 5 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-13 21:30:59,791 INFO L410 AbstractCegarLoop]: === Iteration 7 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-13 21:30:59,791 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-13 21:30:59,791 INFO L82 PathProgramCache]: Analyzing trace with hash 2049115666, now seen corresponding path program 4 times [2019-10-13 21:30:59,791 INFO L157 tionRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-10-13 21:30:59,792 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2121232238] [2019-10-13 21:30:59,792 INFO L116 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-13 21:30:59,792 INFO L116 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-13 21:30:59,792 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-13 21:30:59,827 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-13 21:30:59,949 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2019-10-13 21:30:59,950 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2121232238] [2019-10-13 21:30:59,950 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1984341531] [2019-10-13 21:30:59,950 INFO L92 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-13 21:31:00,091 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-13 21:31:00,093 INFO L256 TraceCheckSpWp]: Trace formula consists of 253 conjuncts, 14 conjunts are in the unsatisfiable core [2019-10-13 21:31:00,096 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2019-10-13 21:31:00,115 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2019-10-13 21:31:00,116 INFO L321 TraceCheckSpWp]: Computing backward predicates... [2019-10-13 21:31:00,479 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2019-10-13 21:31:00,480 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSifa [393018281] [2019-10-13 21:31:00,481 INFO L162 IcfgInterpreter]: Started Sifa with 19 locations of interest [2019-10-13 21:31:00,482 INFO L169 IcfgInterpreter]: Building call graph [2019-10-13 21:31:00,482 INFO L174 IcfgInterpreter]: Initial procedures are [ULTIMATE.start] [2019-10-13 21:31:00,482 INFO L179 IcfgInterpreter]: Starting interpretation [2019-10-13 21:31:00,483 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.start with input of size 1 for LOIs [2019-10-13 21:31:00,505 INFO L199 IcfgInterpreter]: Interpreting procedure main with input of size 21 for LOIs [2019-10-13 21:31:02,108 INFO L199 IcfgInterpreter]: Interpreting procedure mapsum with input of size 1 for LOIs [2019-10-13 21:31:02,131 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.init with input of size 10 for LOIs [2019-10-13 21:31:02,135 INFO L183 IcfgInterpreter]: Interpretation finished [2019-10-13 21:31:02,135 INFO L191 IcfgInterpreter]: Final predicates for locations of interest are: [2019-10-13 21:31:02,135 INFO L193 IcfgInterpreter]: Reachable states at location mapsumENTRY satisfy 601#true [2019-10-13 21:31:02,136 INFO L193 IcfgInterpreter]: Reachable states at location L26-4 satisfy 73#(and (not (< main_~i~1 100)) (<= 100 main_~i~1)) [2019-10-13 21:31:02,136 INFO L193 IcfgInterpreter]: Reachable states at location L33 satisfy 592#(exists ((v_mapsum_~ret~0_BEFORE_RETURN_79 Int) (v_prenex_583 Int) (v_prenex_584 Int) (v_mapsum_~ret~0_BEFORE_RETURN_80 Int)) (or (and (not (< main_~i~1 100)) (= main_~ret~1 (mod v_mapsum_~ret~0_BEFORE_RETURN_80 4294967296)) (<= main_~ret~1 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_80 4294967296) 2147483647) (<= 0 (+ main_~ret~1 2147483648))) (and (not (< main_~i~1 100)) (<= main_~ret~1 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (not (<= (mod v_prenex_584 4294967296) 2147483647)) (= main_~ret~1 (+ (mod v_prenex_584 4294967296) (- 4294967296))) (<= 0 (+ main_~ret~1 2147483648))) (and (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_79 4294967296) 2147483647)) (not (< main_~i~1 100)) (<= main_~ret~1 2147483647) (= (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_79 4294967296) (- 4294967296)) main_~ret~1) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (<= 0 (+ main_~ret~1 2147483648))) (and (not (< main_~i~1 100)) (<= main_~ret~1 2147483647) (<= (mod v_prenex_583 4294967296) 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (= main_~ret~1 (mod v_prenex_583 4294967296)) (<= 0 (+ main_~ret~1 2147483648))))) [2019-10-13 21:31:02,136 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initENTRY satisfy 648#(and (= |old(#NULL.base)| |#NULL.base|) (= |#valid| |old(#valid)|) (= |#NULL.offset| |old(#NULL.offset)|)) [2019-10-13 21:31:02,136 INFO L193 IcfgInterpreter]: Reachable states at location L26-3 satisfy 68#true [2019-10-13 21:31:02,137 INFO L193 IcfgInterpreter]: Reachable states at location L12-3 satisfy 639#(<= 0 mapsum_~i~0) [2019-10-13 21:31:02,137 INFO L193 IcfgInterpreter]: Reachable states at location L-1 satisfy 23#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= 0 (select |#valid| 0)) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-13 21:31:02,137 INFO L193 IcfgInterpreter]: Reachable states at location mainENTRY satisfy 33#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= |#valid| |old(#valid)|) (<= 0 |#NULL.base|) (= |#memory_int| |old(#memory_int)|) (= |#NULL.offset| 0) (= |old(#length)| |#length|) (= 0 (select |old(#valid)| 0)) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-13 21:31:02,137 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initEXIT satisfy 653#(and (= |#valid| (store |old(#valid)| 0 0)) (= 0 |#NULL.base|) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-13 21:31:02,137 INFO L193 IcfgInterpreter]: Reachable states at location L39-1 satisfy 479#true [2019-10-13 21:31:02,138 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.startENTRY satisfy 6#true [2019-10-13 21:31:02,138 INFO L193 IcfgInterpreter]: Reachable states at location L39 satisfy 522#(and (<= 99 main_~i~2) (not (< main_~i~2 99)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396)))) [2019-10-13 21:31:02,138 INFO L193 IcfgInterpreter]: Reachable states at location L30 satisfy 120#(or (exists ((v_prenex_584 Int) (v_mapsum_~ret~0_BEFORE_RETURN_80 Int)) (or (and (not (< main_~i~1 100)) (not (<= (mod v_prenex_584 4294967296) 2147483647)) (= (+ (mod v_prenex_584 4294967296) (- 4294967296)) |main_#t~ret4|)) (and (not (< main_~i~1 100)) (= |main_#t~ret4| (mod v_mapsum_~ret~0_BEFORE_RETURN_80 4294967296)) (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_80 4294967296) 2147483647)))) (exists ((v_mapsum_~ret~0_BEFORE_RETURN_79 Int) (v_prenex_583 Int)) (or (and (= (mod v_prenex_583 4294967296) |main_#t~ret4|) (not (< main_~i~1 100)) (<= (mod v_prenex_583 4294967296) 2147483647)) (and (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_79 4294967296) 2147483647)) (not (< main_~i~1 100)) (= (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_79 4294967296) (- 4294967296)) |main_#t~ret4|))))) [2019-10-13 21:31:02,138 INFO L193 IcfgInterpreter]: Reachable states at location L41 satisfy 424#true [2019-10-13 21:31:02,138 INFO L193 IcfgInterpreter]: Reachable states at location mainErr0ASSERT_VIOLATIONERROR_FUNCTION satisfy 234#(or (and (not (= main_~ret~1 main_~ret2~0)) (exists ((v_prenex_611 Int) (v_prenex_612 Int) (v_mapsum_~ret~0_BEFORE_RETURN_83 Int) (v_mapsum_~ret~0_BEFORE_RETURN_84 Int)) (or (and (= (+ (mod v_prenex_612 4294967296) (- 4294967296)) main_~ret5~0) (not (< main_~i~2 99)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (not (<= (mod v_prenex_612 4294967296) 2147483647))) (and (not (< main_~i~2 99)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (<= main_~ret5~0 2147483647) (= main_~ret5~0 (mod v_mapsum_~ret~0_BEFORE_RETURN_84 4294967296)) (<= 0 (+ main_~ret5~0 2147483648)) (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_84 4294967296) 2147483647)) (and (not (< main_~i~2 99)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= main_~ret5~0 (mod v_mapsum_~ret~0_BEFORE_RETURN_83 4294967296)) (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_83 4294967296) 2147483647)) (and (not (< main_~i~2 99)) (not (<= (mod v_prenex_611 4294967296) 2147483647)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (<= main_~ret5~0 2147483647) (= main_~ret5~0 (+ (mod v_prenex_611 4294967296) (- 4294967296))) (<= 0 (+ main_~ret5~0 2147483648)))))) (and (exists ((v_prenex_611 Int) (v_prenex_612 Int) (v_mapsum_~ret~0_BEFORE_RETURN_83 Int) (v_mapsum_~ret~0_BEFORE_RETURN_84 Int)) (or (and (= (+ (mod v_prenex_612 4294967296) (- 4294967296)) main_~ret5~0) (not (< main_~i~2 99)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (not (<= (mod v_prenex_612 4294967296) 2147483647))) (and (not (< main_~i~2 99)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (<= main_~ret5~0 2147483647) (= main_~ret5~0 (mod v_mapsum_~ret~0_BEFORE_RETURN_84 4294967296)) (<= 0 (+ main_~ret5~0 2147483648)) (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_84 4294967296) 2147483647)) (and (not (< main_~i~2 99)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= main_~ret5~0 (mod v_mapsum_~ret~0_BEFORE_RETURN_83 4294967296)) (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_83 4294967296) 2147483647)) (and (not (< main_~i~2 99)) (not (<= (mod v_prenex_611 4294967296) 2147483647)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (<= main_~ret5~0 2147483647) (= main_~ret5~0 (+ (mod v_prenex_611 4294967296) (- 4294967296))) (<= 0 (+ main_~ret5~0 2147483648))))) (not (= main_~ret~1 main_~ret5~0)))) [2019-10-13 21:31:02,139 INFO L193 IcfgInterpreter]: Reachable states at location L42 satisfy 313#true [2019-10-13 21:31:02,139 INFO L193 IcfgInterpreter]: Reachable states at location mapsumEXIT satisfy 644#(and (<= 100 mapsum_~i~0) (= (ite (<= (mod mapsum_~ret~0 4294967296) 2147483647) (mod mapsum_~ret~0 4294967296) (+ (mod mapsum_~ret~0 4294967296) (- 4294967296))) |mapsum_#res|) (<= 0 mapsum_~i~0) (not (< mapsum_~i~0 100))) [2019-10-13 21:31:02,139 INFO L193 IcfgInterpreter]: Reachable states at location L33-1 satisfy 587#true [2019-10-13 21:31:02,139 INFO L193 IcfgInterpreter]: Reachable states at location L35-3 satisfy 560#true [2019-10-13 21:31:02,625 INFO L223 tionRefinementEngine]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2019-10-13 21:31:02,625 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 15, 15, 11] total 39 [2019-10-13 21:31:02,625 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [584150284] [2019-10-13 21:31:02,627 INFO L442 AbstractCegarLoop]: Interpolant automaton has 40 states [2019-10-13 21:31:02,627 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-10-13 21:31:02,628 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 40 interpolants. [2019-10-13 21:31:02,629 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=435, Invalid=1125, Unknown=0, NotChecked=0, Total=1560 [2019-10-13 21:31:02,629 INFO L87 Difference]: Start difference. First operand 36 states and 40 transitions. Second operand 40 states. [2019-10-13 21:31:04,108 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-13 21:31:04,108 INFO L93 Difference]: Finished difference Result 68 states and 89 transitions. [2019-10-13 21:31:04,108 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 39 states. [2019-10-13 21:31:04,109 INFO L78 Accepts]: Start accepts. Automaton has 40 states. Word has length 49 [2019-10-13 21:31:04,109 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-13 21:31:04,110 INFO L225 Difference]: With dead ends: 68 [2019-10-13 21:31:04,110 INFO L226 Difference]: Without dead ends: 50 [2019-10-13 21:31:04,113 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 198 GetRequests, 126 SyntacticMatches, 0 SemanticMatches, 72 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1364 ImplicationChecksByTransitivity, 2.1s TimeCoverageRelationStatistics Valid=1244, Invalid=4158, Unknown=0, NotChecked=0, Total=5402 [2019-10-13 21:31:04,113 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 50 states. [2019-10-13 21:31:04,119 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 50 to 50. [2019-10-13 21:31:04,120 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 50 states. [2019-10-13 21:31:04,121 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 50 states to 50 states and 54 transitions. [2019-10-13 21:31:04,121 INFO L78 Accepts]: Start accepts. Automaton has 50 states and 54 transitions. Word has length 49 [2019-10-13 21:31:04,122 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-13 21:31:04,122 INFO L462 AbstractCegarLoop]: Abstraction has 50 states and 54 transitions. [2019-10-13 21:31:04,122 INFO L463 AbstractCegarLoop]: Interpolant automaton has 40 states. [2019-10-13 21:31:04,122 INFO L276 IsEmpty]: Start isEmpty. Operand 50 states and 54 transitions. [2019-10-13 21:31:04,123 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 64 [2019-10-13 21:31:04,123 INFO L372 BasicCegarLoop]: Found error trace [2019-10-13 21:31:04,124 INFO L380 BasicCegarLoop]: trace histogram [26, 12, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-13 21:31:04,327 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 6 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-13 21:31:04,328 INFO L410 AbstractCegarLoop]: === Iteration 8 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-13 21:31:04,328 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-13 21:31:04,328 INFO L82 PathProgramCache]: Analyzing trace with hash -740285582, now seen corresponding path program 5 times [2019-10-13 21:31:04,329 INFO L157 tionRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-10-13 21:31:04,329 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1633148727] [2019-10-13 21:31:04,329 INFO L116 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-13 21:31:04,330 INFO L116 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-13 21:31:04,330 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-13 21:31:04,379 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-13 21:31:04,771 INFO L134 CoverageAnalysis]: Checked inductivity of 463 backedges. 0 proven. 351 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2019-10-13 21:31:04,771 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1633148727] [2019-10-13 21:31:04,772 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1039348030] [2019-10-13 21:31:04,772 INFO L92 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-13 21:31:04,930 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 3 check-sat command(s) [2019-10-13 21:31:04,930 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-10-13 21:31:04,932 INFO L256 TraceCheckSpWp]: Trace formula consists of 149 conjuncts, 3 conjunts are in the unsatisfiable core [2019-10-13 21:31:04,935 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2019-10-13 21:31:04,973 INFO L134 CoverageAnalysis]: Checked inductivity of 463 backedges. 54 proven. 1 refuted. 0 times theorem prover too weak. 408 trivial. 0 not checked. [2019-10-13 21:31:04,973 INFO L321 TraceCheckSpWp]: Computing backward predicates... [2019-10-13 21:31:05,020 INFO L134 CoverageAnalysis]: Checked inductivity of 463 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 462 trivial. 0 not checked. [2019-10-13 21:31:05,021 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSifa [1377971533] [2019-10-13 21:31:05,022 INFO L162 IcfgInterpreter]: Started Sifa with 19 locations of interest [2019-10-13 21:31:05,023 INFO L169 IcfgInterpreter]: Building call graph [2019-10-13 21:31:05,023 INFO L174 IcfgInterpreter]: Initial procedures are [ULTIMATE.start] [2019-10-13 21:31:05,023 INFO L179 IcfgInterpreter]: Starting interpretation [2019-10-13 21:31:05,024 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.start with input of size 1 for LOIs [2019-10-13 21:31:05,042 INFO L199 IcfgInterpreter]: Interpreting procedure main with input of size 21 for LOIs [2019-10-13 21:31:06,306 INFO L199 IcfgInterpreter]: Interpreting procedure mapsum with input of size 1 for LOIs [2019-10-13 21:31:06,326 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.init with input of size 10 for LOIs [2019-10-13 21:31:06,329 INFO L183 IcfgInterpreter]: Interpretation finished [2019-10-13 21:31:06,329 INFO L191 IcfgInterpreter]: Final predicates for locations of interest are: [2019-10-13 21:31:06,329 INFO L193 IcfgInterpreter]: Reachable states at location mapsumENTRY satisfy 601#true [2019-10-13 21:31:06,330 INFO L193 IcfgInterpreter]: Reachable states at location L26-4 satisfy 73#(and (not (< main_~i~1 100)) (<= 100 main_~i~1)) [2019-10-13 21:31:06,330 INFO L193 IcfgInterpreter]: Reachable states at location L33 satisfy 592#(exists ((v_prenex_777 Int) (v_mapsum_~ret~0_BEFORE_RETURN_106 Int) (v_mapsum_~ret~0_BEFORE_RETURN_105 Int) (v_prenex_778 Int)) (or (and (not (< main_~i~1 100)) (<= main_~ret~1 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_105 4294967296) 2147483647) (= (mod v_mapsum_~ret~0_BEFORE_RETURN_105 4294967296) main_~ret~1) (<= 0 (+ main_~ret~1 2147483648))) (and (not (< main_~i~1 100)) (<= main_~ret~1 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (= main_~ret~1 (mod v_prenex_778 4294967296)) (<= (mod v_prenex_778 4294967296) 2147483647) (<= 0 (+ main_~ret~1 2147483648))) (and (not (< main_~i~1 100)) (<= main_~ret~1 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (= (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_106 4294967296) (- 4294967296)) main_~ret~1) (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_106 4294967296) 2147483647)) (<= 0 (+ main_~ret~1 2147483648))) (and (not (< main_~i~1 100)) (not (<= (mod v_prenex_777 4294967296) 2147483647)) (<= main_~ret~1 2147483647) (= main_~ret~1 (+ (mod v_prenex_777 4294967296) (- 4294967296))) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (<= 0 (+ main_~ret~1 2147483648))))) [2019-10-13 21:31:06,330 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initENTRY satisfy 648#(and (= |old(#NULL.base)| |#NULL.base|) (= |#valid| |old(#valid)|) (= |#NULL.offset| |old(#NULL.offset)|)) [2019-10-13 21:31:06,330 INFO L193 IcfgInterpreter]: Reachable states at location L26-3 satisfy 68#true [2019-10-13 21:31:06,330 INFO L193 IcfgInterpreter]: Reachable states at location L12-3 satisfy 639#(<= 0 mapsum_~i~0) [2019-10-13 21:31:06,331 INFO L193 IcfgInterpreter]: Reachable states at location L-1 satisfy 23#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= 0 (select |#valid| 0)) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-13 21:31:06,331 INFO L193 IcfgInterpreter]: Reachable states at location mainENTRY satisfy 33#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= |#valid| |old(#valid)|) (<= 0 |#NULL.base|) (= |#memory_int| |old(#memory_int)|) (= |#NULL.offset| 0) (= |old(#length)| |#length|) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (= 0 (select |old(#valid)| 0))) [2019-10-13 21:31:06,331 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initEXIT satisfy 653#(and (= |#valid| (store |old(#valid)| 0 0)) (= 0 |#NULL.base|) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-13 21:31:06,331 INFO L193 IcfgInterpreter]: Reachable states at location L39-1 satisfy 479#true [2019-10-13 21:31:06,331 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.startENTRY satisfy 6#true [2019-10-13 21:31:06,331 INFO L193 IcfgInterpreter]: Reachable states at location L39 satisfy 522#(and (<= 99 main_~i~2) (not (< main_~i~2 99)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396)))) [2019-10-13 21:31:06,332 INFO L193 IcfgInterpreter]: Reachable states at location L30 satisfy 120#(or (exists ((v_mapsum_~ret~0_BEFORE_RETURN_106 Int) (v_prenex_778 Int)) (or (and (not (< main_~i~1 100)) (= (mod v_prenex_778 4294967296) |main_#t~ret4|) (<= (mod v_prenex_778 4294967296) 2147483647)) (and (not (< main_~i~1 100)) (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_106 4294967296) 2147483647)) (= (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_106 4294967296) (- 4294967296)) |main_#t~ret4|)))) (exists ((v_prenex_777 Int) (v_mapsum_~ret~0_BEFORE_RETURN_105 Int)) (or (and (= (+ (mod v_prenex_777 4294967296) (- 4294967296)) |main_#t~ret4|) (not (< main_~i~1 100)) (not (<= (mod v_prenex_777 4294967296) 2147483647))) (and (not (< main_~i~1 100)) (= (mod v_mapsum_~ret~0_BEFORE_RETURN_105 4294967296) |main_#t~ret4|) (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_105 4294967296) 2147483647))))) [2019-10-13 21:31:06,332 INFO L193 IcfgInterpreter]: Reachable states at location L41 satisfy 424#true [2019-10-13 21:31:06,332 INFO L193 IcfgInterpreter]: Reachable states at location mainErr0ASSERT_VIOLATIONERROR_FUNCTION satisfy 234#(or (and (not (= main_~ret~1 main_~ret2~0)) (exists ((v_prenex_806 Int) (v_mapsum_~ret~0_BEFORE_RETURN_109 Int) (v_prenex_805 Int) (v_mapsum_~ret~0_BEFORE_RETURN_110 Int)) (or (and (not (< main_~i~2 99)) (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_109 4294967296) 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (<= main_~ret5~0 2147483647) (= (mod v_mapsum_~ret~0_BEFORE_RETURN_109 4294967296) main_~ret5~0) (<= 0 (+ main_~ret5~0 2147483648))) (and (not (< main_~i~2 99)) (= main_~ret5~0 (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_110 4294967296) (- 4294967296))) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_110 4294967296) 2147483647)) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648))) (and (not (< main_~i~2 99)) (= main_~ret5~0 (mod v_prenex_806 4294967296)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (<= (mod v_prenex_806 4294967296) 2147483647)) (and (not (< main_~i~2 99)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (= (+ (mod v_prenex_805 4294967296) (- 4294967296)) main_~ret5~0) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (not (<= (mod v_prenex_805 4294967296) 2147483647)))))) (and (exists ((v_prenex_806 Int) (v_mapsum_~ret~0_BEFORE_RETURN_109 Int) (v_prenex_805 Int) (v_mapsum_~ret~0_BEFORE_RETURN_110 Int)) (or (and (not (< main_~i~2 99)) (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_109 4294967296) 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (<= main_~ret5~0 2147483647) (= (mod v_mapsum_~ret~0_BEFORE_RETURN_109 4294967296) main_~ret5~0) (<= 0 (+ main_~ret5~0 2147483648))) (and (not (< main_~i~2 99)) (= main_~ret5~0 (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_110 4294967296) (- 4294967296))) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_110 4294967296) 2147483647)) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648))) (and (not (< main_~i~2 99)) (= main_~ret5~0 (mod v_prenex_806 4294967296)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (<= (mod v_prenex_806 4294967296) 2147483647)) (and (not (< main_~i~2 99)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (= (+ (mod v_prenex_805 4294967296) (- 4294967296)) main_~ret5~0) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (not (<= (mod v_prenex_805 4294967296) 2147483647))))) (not (= main_~ret~1 main_~ret5~0)))) [2019-10-13 21:31:06,335 INFO L193 IcfgInterpreter]: Reachable states at location L42 satisfy 313#true [2019-10-13 21:31:06,335 INFO L193 IcfgInterpreter]: Reachable states at location mapsumEXIT satisfy 644#(and (<= 100 mapsum_~i~0) (= (ite (<= (mod mapsum_~ret~0 4294967296) 2147483647) (mod mapsum_~ret~0 4294967296) (+ (mod mapsum_~ret~0 4294967296) (- 4294967296))) |mapsum_#res|) (<= 0 mapsum_~i~0) (not (< mapsum_~i~0 100))) [2019-10-13 21:31:06,335 INFO L193 IcfgInterpreter]: Reachable states at location L33-1 satisfy 587#true [2019-10-13 21:31:06,336 INFO L193 IcfgInterpreter]: Reachable states at location L35-3 satisfy 560#true [2019-10-13 21:31:06,838 INFO L223 tionRefinementEngine]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2019-10-13 21:31:06,838 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [29, 4, 4, 11] total 43 [2019-10-13 21:31:06,838 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2066077545] [2019-10-13 21:31:06,840 INFO L442 AbstractCegarLoop]: Interpolant automaton has 44 states [2019-10-13 21:31:06,840 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-10-13 21:31:06,840 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 44 interpolants. [2019-10-13 21:31:06,841 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=449, Invalid=1443, Unknown=0, NotChecked=0, Total=1892 [2019-10-13 21:31:06,841 INFO L87 Difference]: Start difference. First operand 50 states and 54 transitions. Second operand 44 states. [2019-10-13 21:31:08,868 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-13 21:31:08,868 INFO L93 Difference]: Finished difference Result 72 states and 83 transitions. [2019-10-13 21:31:08,868 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 44 states. [2019-10-13 21:31:08,868 INFO L78 Accepts]: Start accepts. Automaton has 44 states. Word has length 63 [2019-10-13 21:31:08,869 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-13 21:31:08,870 INFO L225 Difference]: With dead ends: 72 [2019-10-13 21:31:08,870 INFO L226 Difference]: Without dead ends: 54 [2019-10-13 21:31:08,872 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 257 GetRequests, 176 SyntacticMatches, 0 SemanticMatches, 81 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1350 ImplicationChecksByTransitivity, 2.4s TimeCoverageRelationStatistics Valid=1349, Invalid=5457, Unknown=0, NotChecked=0, Total=6806 [2019-10-13 21:31:08,873 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 54 states. [2019-10-13 21:31:08,879 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 54 to 54. [2019-10-13 21:31:08,879 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 54 states. [2019-10-13 21:31:08,880 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 54 states to 54 states and 58 transitions. [2019-10-13 21:31:08,881 INFO L78 Accepts]: Start accepts. Automaton has 54 states and 58 transitions. Word has length 63 [2019-10-13 21:31:08,881 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-13 21:31:08,881 INFO L462 AbstractCegarLoop]: Abstraction has 54 states and 58 transitions. [2019-10-13 21:31:08,881 INFO L463 AbstractCegarLoop]: Interpolant automaton has 44 states. [2019-10-13 21:31:08,881 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 58 transitions. [2019-10-13 21:31:08,882 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-10-13 21:31:08,883 INFO L372 BasicCegarLoop]: Found error trace [2019-10-13 21:31:08,883 INFO L380 BasicCegarLoop]: trace histogram [27, 12, 4, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-13 21:31:09,086 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 7 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-13 21:31:09,086 INFO L410 AbstractCegarLoop]: === Iteration 9 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-13 21:31:09,087 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-13 21:31:09,087 INFO L82 PathProgramCache]: Analyzing trace with hash -1983049792, now seen corresponding path program 6 times [2019-10-13 21:31:09,087 INFO L157 tionRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-10-13 21:31:09,087 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [516413414] [2019-10-13 21:31:09,088 INFO L116 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-13 21:31:09,088 INFO L116 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-13 21:31:09,088 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-13 21:31:09,128 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-13 21:31:09,504 INFO L134 CoverageAnalysis]: Checked inductivity of 499 backedges. 0 proven. 378 refuted. 0 times theorem prover too weak. 121 trivial. 0 not checked. [2019-10-13 21:31:09,505 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [516413414] [2019-10-13 21:31:09,505 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [829185244] [2019-10-13 21:31:09,505 INFO L92 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-13 21:31:09,726 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2019-10-13 21:31:09,726 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-10-13 21:31:09,729 INFO L256 TraceCheckSpWp]: Trace formula consists of 355 conjuncts, 29 conjunts are in the unsatisfiable core [2019-10-13 21:31:09,733 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2019-10-13 21:31:09,773 INFO L134 CoverageAnalysis]: Checked inductivity of 499 backedges. 0 proven. 378 refuted. 0 times theorem prover too weak. 121 trivial. 0 not checked. [2019-10-13 21:31:09,773 INFO L321 TraceCheckSpWp]: Computing backward predicates... [2019-10-13 21:31:10,886 INFO L134 CoverageAnalysis]: Checked inductivity of 499 backedges. 0 proven. 378 refuted. 0 times theorem prover too weak. 121 trivial. 0 not checked. [2019-10-13 21:31:10,886 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSifa [944459299] [2019-10-13 21:31:10,891 INFO L162 IcfgInterpreter]: Started Sifa with 19 locations of interest [2019-10-13 21:31:10,891 INFO L169 IcfgInterpreter]: Building call graph [2019-10-13 21:31:10,892 INFO L174 IcfgInterpreter]: Initial procedures are [ULTIMATE.start] [2019-10-13 21:31:10,892 INFO L179 IcfgInterpreter]: Starting interpretation [2019-10-13 21:31:10,892 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.start with input of size 1 for LOIs [2019-10-13 21:31:10,906 INFO L199 IcfgInterpreter]: Interpreting procedure main with input of size 21 for LOIs [2019-10-13 21:31:12,228 INFO L199 IcfgInterpreter]: Interpreting procedure mapsum with input of size 1 for LOIs [2019-10-13 21:31:12,249 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.init with input of size 10 for LOIs [2019-10-13 21:31:12,252 INFO L183 IcfgInterpreter]: Interpretation finished [2019-10-13 21:31:12,252 INFO L191 IcfgInterpreter]: Final predicates for locations of interest are: [2019-10-13 21:31:12,252 INFO L193 IcfgInterpreter]: Reachable states at location mapsumENTRY satisfy 601#true [2019-10-13 21:31:12,252 INFO L193 IcfgInterpreter]: Reachable states at location L26-4 satisfy 73#(and (not (< main_~i~1 100)) (<= 100 main_~i~1)) [2019-10-13 21:31:12,252 INFO L193 IcfgInterpreter]: Reachable states at location L33 satisfy 592#(exists ((v_prenex_972 Int) (v_prenex_971 Int) (v_mapsum_~ret~0_BEFORE_RETURN_132 Int) (v_mapsum_~ret~0_BEFORE_RETURN_131 Int)) (or (and (= main_~ret~1 (mod v_prenex_972 4294967296)) (not (< main_~i~1 100)) (<= main_~ret~1 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (<= (mod v_prenex_972 4294967296) 2147483647) (<= 0 (+ main_~ret~1 2147483648))) (and (not (< main_~i~1 100)) (<= main_~ret~1 2147483647) (= (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_131 4294967296) (- 4294967296)) main_~ret~1) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_131 4294967296) 2147483647)) (<= 0 (+ main_~ret~1 2147483648))) (and (not (< main_~i~1 100)) (<= main_~ret~1 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_132 4294967296) 2147483647)) (= main_~ret~1 (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_132 4294967296) (- 4294967296))) (<= 0 (+ main_~ret~1 2147483648))) (and (<= (mod v_prenex_971 4294967296) 2147483647) (not (< main_~i~1 100)) (<= main_~ret~1 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (= main_~ret~1 (mod v_prenex_971 4294967296)) (<= 0 (+ main_~ret~1 2147483648))))) [2019-10-13 21:31:12,253 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initENTRY satisfy 648#(and (= |old(#NULL.base)| |#NULL.base|) (= |#valid| |old(#valid)|) (= |#NULL.offset| |old(#NULL.offset)|)) [2019-10-13 21:31:12,253 INFO L193 IcfgInterpreter]: Reachable states at location L26-3 satisfy 68#true [2019-10-13 21:31:12,253 INFO L193 IcfgInterpreter]: Reachable states at location L12-3 satisfy 639#(<= 0 mapsum_~i~0) [2019-10-13 21:31:12,253 INFO L193 IcfgInterpreter]: Reachable states at location L-1 satisfy 23#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= 0 (select |#valid| 0)) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-13 21:31:12,253 INFO L193 IcfgInterpreter]: Reachable states at location mainENTRY satisfy 33#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= |#valid| |old(#valid)|) (<= 0 |#NULL.base|) (= |#memory_int| |old(#memory_int)|) (= |#NULL.offset| 0) (= |old(#length)| |#length|) (= 0 (select |old(#valid)| 0)) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-13 21:31:12,254 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initEXIT satisfy 653#(and (= |#valid| (store |old(#valid)| 0 0)) (= 0 |#NULL.base|) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-13 21:31:12,254 INFO L193 IcfgInterpreter]: Reachable states at location L39-1 satisfy 479#true [2019-10-13 21:31:12,254 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.startENTRY satisfy 6#true [2019-10-13 21:31:12,254 INFO L193 IcfgInterpreter]: Reachable states at location L39 satisfy 522#(and (<= 99 main_~i~2) (not (< main_~i~2 99)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396)))) [2019-10-13 21:31:12,254 INFO L193 IcfgInterpreter]: Reachable states at location L30 satisfy 120#(or (exists ((v_prenex_972 Int) (v_mapsum_~ret~0_BEFORE_RETURN_132 Int)) (or (and (not (< main_~i~1 100)) (= (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_132 4294967296) (- 4294967296)) |main_#t~ret4|) (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_132 4294967296) 2147483647))) (and (= (mod v_prenex_972 4294967296) |main_#t~ret4|) (not (< main_~i~1 100)) (<= (mod v_prenex_972 4294967296) 2147483647)))) (exists ((v_prenex_971 Int) (v_mapsum_~ret~0_BEFORE_RETURN_131 Int)) (or (and (not (< main_~i~1 100)) (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_131 4294967296) 2147483647)) (= (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_131 4294967296) (- 4294967296)) |main_#t~ret4|)) (and (<= (mod v_prenex_971 4294967296) 2147483647) (not (< main_~i~1 100)) (= (mod v_prenex_971 4294967296) |main_#t~ret4|))))) [2019-10-13 21:31:12,254 INFO L193 IcfgInterpreter]: Reachable states at location L41 satisfy 424#true [2019-10-13 21:31:12,255 INFO L193 IcfgInterpreter]: Reachable states at location mainErr0ASSERT_VIOLATIONERROR_FUNCTION satisfy 234#(or (and (exists ((v_mapsum_~ret~0_BEFORE_RETURN_136 Int) (v_mapsum_~ret~0_BEFORE_RETURN_135 Int) (v_prenex_1000 Int) (v_prenex_999 Int)) (or (and (not (< main_~i~2 99)) (not (<= (mod v_prenex_999 4294967296) 2147483647)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (+ (mod v_prenex_999 4294967296) (- 4294967296)) main_~ret5~0)) (and (= (mod v_mapsum_~ret~0_BEFORE_RETURN_135 4294967296) main_~ret5~0) (not (< main_~i~2 99)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_135 4294967296) 2147483647)) (and (not (< main_~i~2 99)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (<= (mod v_prenex_1000 4294967296) 2147483647) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (mod v_prenex_1000 4294967296) main_~ret5~0)) (and (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_136 4294967296) 2147483647)) (not (< main_~i~2 99)) (= (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_136 4294967296) (- 4294967296)) main_~ret5~0) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648))))) (not (= main_~ret~1 main_~ret5~0))) (and (not (= main_~ret~1 main_~ret2~0)) (exists ((v_mapsum_~ret~0_BEFORE_RETURN_136 Int) (v_mapsum_~ret~0_BEFORE_RETURN_135 Int) (v_prenex_1000 Int) (v_prenex_999 Int)) (or (and (not (< main_~i~2 99)) (not (<= (mod v_prenex_999 4294967296) 2147483647)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (+ (mod v_prenex_999 4294967296) (- 4294967296)) main_~ret5~0)) (and (= (mod v_mapsum_~ret~0_BEFORE_RETURN_135 4294967296) main_~ret5~0) (not (< main_~i~2 99)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_135 4294967296) 2147483647)) (and (not (< main_~i~2 99)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (<= (mod v_prenex_1000 4294967296) 2147483647) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (mod v_prenex_1000 4294967296) main_~ret5~0)) (and (not (<= (mod v_mapsum_~ret~0_BEFORE_RETURN_136 4294967296) 2147483647)) (not (< main_~i~2 99)) (= (+ (mod v_mapsum_~ret~0_BEFORE_RETURN_136 4294967296) (- 4294967296)) main_~ret5~0) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 396))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648))))))) [2019-10-13 21:31:12,255 INFO L193 IcfgInterpreter]: Reachable states at location L42 satisfy 313#true [2019-10-13 21:31:12,255 INFO L193 IcfgInterpreter]: Reachable states at location mapsumEXIT satisfy 644#(and (<= 100 mapsum_~i~0) (= (ite (<= (mod mapsum_~ret~0 4294967296) 2147483647) (mod mapsum_~ret~0 4294967296) (+ (mod mapsum_~ret~0 4294967296) (- 4294967296))) |mapsum_#res|) (<= 0 mapsum_~i~0) (not (< mapsum_~i~0 100))) [2019-10-13 21:31:12,255 INFO L193 IcfgInterpreter]: Reachable states at location L33-1 satisfy 587#true [2019-10-13 21:31:12,255 INFO L193 IcfgInterpreter]: Reachable states at location L35-3 satisfy 560#true [2019-10-13 21:31:12,778 INFO L223 tionRefinementEngine]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2019-10-13 21:31:12,778 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [30, 30, 30, 11] total 69 [2019-10-13 21:31:12,779 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [747464911] [2019-10-13 21:31:12,780 INFO L442 AbstractCegarLoop]: Interpolant automaton has 70 states [2019-10-13 21:31:12,780 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-10-13 21:31:12,780 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 70 interpolants. [2019-10-13 21:31:12,785 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=1740, Invalid=3090, Unknown=0, NotChecked=0, Total=4830 [2019-10-13 21:31:12,786 INFO L87 Difference]: Start difference. First operand 54 states and 58 transitions. Second operand 70 states. [2019-10-13 21:31:16,239 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-13 21:31:16,239 INFO L93 Difference]: Finished difference Result 104 states and 140 transitions. [2019-10-13 21:31:16,239 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 69 states. [2019-10-13 21:31:16,239 INFO L78 Accepts]: Start accepts. Automaton has 70 states. Word has length 67 [2019-10-13 21:31:16,240 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-13 21:31:16,241 INFO L225 Difference]: With dead ends: 104 [2019-10-13 21:31:16,241 INFO L226 Difference]: Without dead ends: 83 [2019-10-13 21:31:16,246 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 297 GetRequests, 165 SyntacticMatches, 0 SemanticMatches, 132 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3929 ImplicationChecksByTransitivity, 4.9s TimeCoverageRelationStatistics Valid=5099, Invalid=12723, Unknown=0, NotChecked=0, Total=17822 [2019-10-13 21:31:16,246 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 83 states. [2019-10-13 21:31:16,255 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 83 to 83. [2019-10-13 21:31:16,256 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 83 states. [2019-10-13 21:31:16,257 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 83 states to 83 states and 87 transitions. [2019-10-13 21:31:16,257 INFO L78 Accepts]: Start accepts. Automaton has 83 states and 87 transitions. Word has length 67 [2019-10-13 21:31:16,257 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-13 21:31:16,257 INFO L462 AbstractCegarLoop]: Abstraction has 83 states and 87 transitions. [2019-10-13 21:31:16,257 INFO L463 AbstractCegarLoop]: Interpolant automaton has 70 states. [2019-10-13 21:31:16,258 INFO L276 IsEmpty]: Start isEmpty. Operand 83 states and 87 transitions. [2019-10-13 21:31:16,259 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 97 [2019-10-13 21:31:16,259 INFO L372 BasicCegarLoop]: Found error trace [2019-10-13 21:31:16,259 INFO L380 BasicCegarLoop]: trace histogram [56, 12, 4, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-13 21:31:16,463 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 8 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-13 21:31:16,464 INFO L410 AbstractCegarLoop]: === Iteration 10 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-13 21:31:16,464 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-13 21:31:16,464 INFO L82 PathProgramCache]: Analyzing trace with hash 1441308797, now seen corresponding path program 7 times [2019-10-13 21:31:16,465 INFO L157 tionRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-10-13 21:31:16,465 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [799169048] [2019-10-13 21:31:16,465 INFO L116 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-13 21:31:16,465 INFO L116 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-13 21:31:16,466 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-13 21:31:16,521 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-13 21:31:18,016 INFO L134 CoverageAnalysis]: Checked inductivity of 1717 backedges. 0 proven. 1596 refuted. 0 times theorem prover too weak. 121 trivial. 0 not checked. [2019-10-13 21:31:18,017 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [799169048] [2019-10-13 21:31:18,017 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [233944239] [2019-10-13 21:31:18,017 INFO L92 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-13 21:31:18,309 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-13 21:31:18,312 INFO L256 TraceCheckSpWp]: Trace formula consists of 529 conjuncts, 58 conjunts are in the unsatisfiable core [2019-10-13 21:31:18,315 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2019-10-13 21:31:18,342 INFO L134 CoverageAnalysis]: Checked inductivity of 1717 backedges. 0 proven. 1596 refuted. 0 times theorem prover too weak. 121 trivial. 0 not checked. [2019-10-13 21:31:18,343 INFO L321 TraceCheckSpWp]: Computing backward predicates... [2019-10-13 21:31:21,565 INFO L134 CoverageAnalysis]: Checked inductivity of 1717 backedges. 0 proven. 1596 refuted. 0 times theorem prover too weak. 121 trivial. 0 not checked. [2019-10-13 21:31:21,566 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSifa [1804885232] [2019-10-13 21:31:21,567 INFO L162 IcfgInterpreter]: Started Sifa with 19 locations of interest [2019-10-13 21:31:21,567 INFO L169 IcfgInterpreter]: Building call graph [2019-10-13 21:31:21,568 INFO L174 IcfgInterpreter]: Initial procedures are [ULTIMATE.start] [2019-10-13 21:31:21,568 INFO L179 IcfgInterpreter]: Starting interpretation [2019-10-13 21:31:21,568 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.start with input of size 1 for LOIs [2019-10-13 21:31:21,591 INFO L199 IcfgInterpreter]: Interpreting procedure main with input of size 21 for LOIs