java -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata ./data -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/default/automizer/svcomp-Reach-32bit-Automizer_Default.epf --traceabstraction.trace.refinement.strategy SIFA_TAIPAN --sifa.abstract.domain CompoundDomain --rcfgbuilder.size.of.a.code.block LoopFreeBlock --sifa.call.summarizer TopInputCallSummarizer --sifa.fluid SizeLimitFluid --sifa.simplification.technique SIMPLIFY_QUICK -i ../../../trunk/examples/svcomp/reducercommutativity/sum20-2.i -------------------------------------------------------------------------------- This is Ultimate 0.1.24-f4eb214f-m [2019-10-13 23:20:58,048 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-10-13 23:20:58,051 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-10-13 23:20:58,069 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-10-13 23:20:58,069 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-10-13 23:20:58,071 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-10-13 23:20:58,073 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-10-13 23:20:58,081 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-10-13 23:20:58,086 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-10-13 23:20:58,089 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-10-13 23:20:58,090 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-10-13 23:20:58,092 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-10-13 23:20:58,092 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-10-13 23:20:58,094 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-10-13 23:20:58,096 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-10-13 23:20:58,097 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-10-13 23:20:58,098 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-10-13 23:20:58,099 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-10-13 23:20:58,101 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-10-13 23:20:58,105 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-10-13 23:20:58,109 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-10-13 23:20:58,111 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-10-13 23:20:58,114 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-10-13 23:20:58,114 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-10-13 23:20:58,116 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... 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[2019-10-13 23:20:58,126 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-10-13 23:20:58,126 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-10-13 23:20:58,128 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-10-13 23:20:58,129 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/default/automizer/svcomp-Reach-32bit-Automizer_Default.epf [2019-10-13 23:20:58,156 INFO L113 SettingsManager]: Loading preferences was successful [2019-10-13 23:20:58,157 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-10-13 23:20:58,158 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-10-13 23:20:58,158 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-10-13 23:20:58,158 INFO L138 SettingsManager]: * Use SBE=true [2019-10-13 23:20:58,159 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-10-13 23:20:58,159 INFO L138 SettingsManager]: * sizeof long=4 [2019-10-13 23:20:58,159 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-10-13 23:20:58,159 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-10-13 23:20:58,159 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-10-13 23:20:58,159 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-10-13 23:20:58,160 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-10-13 23:20:58,160 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-10-13 23:20:58,160 INFO L138 SettingsManager]: * sizeof long double=12 [2019-10-13 23:20:58,164 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-10-13 23:20:58,164 INFO L138 SettingsManager]: * Use constant arrays=true [2019-10-13 23:20:58,165 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-10-13 23:20:58,165 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-10-13 23:20:58,165 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-10-13 23:20:58,165 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-10-13 23:20:58,166 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-10-13 23:20:58,166 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-10-13 23:20:58,166 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-10-13 23:20:58,170 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-10-13 23:20:58,170 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-10-13 23:20:58,170 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-10-13 23:20:58,171 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-10-13 23:20:58,171 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-10-13 23:20:58,171 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: Trace refinement strategy -> SIFA_TAIPAN Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.sifa: Abstract Domain -> CompoundDomain Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder: Size of a code block -> LoopFreeBlock Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.sifa: Call Summarizer -> TopInputCallSummarizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.sifa: Fluid -> SizeLimitFluid Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.sifa: Simplification Technique -> SIMPLIFY_QUICK [2019-10-13 23:20:58,451 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-10-13 23:20:58,468 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-10-13 23:20:58,472 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-10-13 23:20:58,473 INFO L271 PluginConnector]: Initializing CDTParser... [2019-10-13 23:20:58,473 INFO L275 PluginConnector]: CDTParser initialized [2019-10-13 23:20:58,474 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/reducercommutativity/sum20-2.i [2019-10-13 23:20:58,549 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/28b94c088/ec634579abb24a77b7bfcfcd46b6d384/FLAGc98c80da3 [2019-10-13 23:20:58,979 INFO L306 CDTParser]: Found 1 translation units. [2019-10-13 23:20:58,979 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/reducercommutativity/sum20-2.i [2019-10-13 23:20:58,985 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/28b94c088/ec634579abb24a77b7bfcfcd46b6d384/FLAGc98c80da3 [2019-10-13 23:20:59,406 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/28b94c088/ec634579abb24a77b7bfcfcd46b6d384 [2019-10-13 23:20:59,415 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-10-13 23:20:59,417 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2019-10-13 23:20:59,418 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-10-13 23:20:59,418 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-10-13 23:20:59,421 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-10-13 23:20:59,422 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 13.10 11:20:59" (1/1) ... [2019-10-13 23:20:59,425 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@6581bd7a and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.10 11:20:59, skipping insertion in model container [2019-10-13 23:20:59,425 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 13.10 11:20:59" (1/1) ... [2019-10-13 23:20:59,432 INFO L142 MainTranslator]: Starting translation in SV-COMP mode [2019-10-13 23:20:59,452 INFO L173 MainTranslator]: Built tables and reachable declarations [2019-10-13 23:20:59,625 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-10-13 23:20:59,634 INFO L188 MainTranslator]: Completed pre-run [2019-10-13 23:20:59,657 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-10-13 23:20:59,672 INFO L192 MainTranslator]: Completed translation [2019-10-13 23:20:59,673 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.10 11:20:59 WrapperNode [2019-10-13 23:20:59,673 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-10-13 23:20:59,674 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-10-13 23:20:59,674 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-10-13 23:20:59,674 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-10-13 23:20:59,764 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.10 11:20:59" (1/1) ... [2019-10-13 23:20:59,764 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.10 11:20:59" (1/1) ... [2019-10-13 23:20:59,771 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.10 11:20:59" (1/1) ... [2019-10-13 23:20:59,772 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.10 11:20:59" (1/1) ... [2019-10-13 23:20:59,779 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.10 11:20:59" (1/1) ... [2019-10-13 23:20:59,786 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.10 11:20:59" (1/1) ... [2019-10-13 23:20:59,789 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.10 11:20:59" (1/1) ... [2019-10-13 23:20:59,791 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-10-13 23:20:59,792 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-10-13 23:20:59,792 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-10-13 23:20:59,792 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-10-13 23:20:59,793 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.10 11:20:59" (1/1) ... No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-10-13 23:20:59,841 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2019-10-13 23:20:59,841 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-10-13 23:20:59,841 INFO L138 BoogieDeclarations]: Found implementation of procedure sum [2019-10-13 23:20:59,841 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2019-10-13 23:20:59,841 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_error [2019-10-13 23:20:59,841 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_int [2019-10-13 23:20:59,842 INFO L130 BoogieDeclarations]: Found specification of procedure sum [2019-10-13 23:20:59,842 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2019-10-13 23:20:59,842 INFO L130 BoogieDeclarations]: Found specification of procedure main [2019-10-13 23:20:59,842 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-10-13 23:20:59,842 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-10-13 23:20:59,842 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-10-13 23:20:59,843 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2019-10-13 23:20:59,843 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-10-13 23:21:00,201 INFO L279 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-10-13 23:21:00,201 INFO L284 CfgBuilder]: Removed 3 assume(true) statements. [2019-10-13 23:21:00,202 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 13.10 11:21:00 BoogieIcfgContainer [2019-10-13 23:21:00,202 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-10-13 23:21:00,204 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-10-13 23:21:00,204 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-10-13 23:21:00,207 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-10-13 23:21:00,207 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 13.10 11:20:59" (1/3) ... [2019-10-13 23:21:00,208 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@1e268b4d and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 13.10 11:21:00, skipping insertion in model container [2019-10-13 23:21:00,208 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.10 11:20:59" (2/3) ... [2019-10-13 23:21:00,208 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@1e268b4d and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 13.10 11:21:00, skipping insertion in model container [2019-10-13 23:21:00,209 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 13.10 11:21:00" (3/3) ... [2019-10-13 23:21:00,210 INFO L109 eAbstractionObserver]: Analyzing ICFG sum20-2.i [2019-10-13 23:21:00,219 INFO L152 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-10-13 23:21:00,227 INFO L164 ceAbstractionStarter]: Appying trace abstraction to program that has 1 error locations. [2019-10-13 23:21:00,238 INFO L249 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2019-10-13 23:21:00,260 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-10-13 23:21:00,260 INFO L374 AbstractCegarLoop]: Hoare is true [2019-10-13 23:21:00,260 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-10-13 23:21:00,260 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-10-13 23:21:00,261 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-10-13 23:21:00,261 INFO L378 AbstractCegarLoop]: Difference is false [2019-10-13 23:21:00,261 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-10-13 23:21:00,261 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-10-13 23:21:00,275 INFO L276 IsEmpty]: Start isEmpty. Operand 23 states. [2019-10-13 23:21:00,280 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2019-10-13 23:21:00,280 INFO L372 BasicCegarLoop]: Found error trace [2019-10-13 23:21:00,281 INFO L380 BasicCegarLoop]: trace histogram [3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-13 23:21:00,282 INFO L410 AbstractCegarLoop]: === Iteration 1 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-13 23:21:00,286 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-13 23:21:00,286 INFO L82 PathProgramCache]: Analyzing trace with hash -1818423299, now seen corresponding path program 1 times [2019-10-13 23:21:00,293 INFO L157 tionRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-10-13 23:21:00,293 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [840908304] [2019-10-13 23:21:00,293 INFO L116 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-13 23:21:00,293 INFO L116 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-13 23:21:00,293 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-13 23:21:00,378 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-13 23:21:00,458 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2019-10-13 23:21:00,459 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [840908304] [2019-10-13 23:21:00,460 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-10-13 23:21:00,460 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-10-13 23:21:00,462 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1804952791] [2019-10-13 23:21:00,467 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-10-13 23:21:00,467 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-10-13 23:21:00,481 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-10-13 23:21:00,483 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-10-13 23:21:00,485 INFO L87 Difference]: Start difference. First operand 23 states. Second operand 3 states. [2019-10-13 23:21:00,521 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-13 23:21:00,521 INFO L93 Difference]: Finished difference Result 41 states and 51 transitions. [2019-10-13 23:21:00,524 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-10-13 23:21:00,525 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 24 [2019-10-13 23:21:00,526 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-13 23:21:00,534 INFO L225 Difference]: With dead ends: 41 [2019-10-13 23:21:00,534 INFO L226 Difference]: Without dead ends: 20 [2019-10-13 23:21:00,538 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-10-13 23:21:00,556 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20 states. [2019-10-13 23:21:00,576 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20 to 20. [2019-10-13 23:21:00,578 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20 states. [2019-10-13 23:21:00,580 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20 states to 20 states and 24 transitions. [2019-10-13 23:21:00,581 INFO L78 Accepts]: Start accepts. Automaton has 20 states and 24 transitions. Word has length 24 [2019-10-13 23:21:00,582 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-13 23:21:00,582 INFO L462 AbstractCegarLoop]: Abstraction has 20 states and 24 transitions. [2019-10-13 23:21:00,582 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-10-13 23:21:00,582 INFO L276 IsEmpty]: Start isEmpty. Operand 20 states and 24 transitions. [2019-10-13 23:21:00,584 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2019-10-13 23:21:00,584 INFO L372 BasicCegarLoop]: Found error trace [2019-10-13 23:21:00,585 INFO L380 BasicCegarLoop]: trace histogram [3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-13 23:21:00,585 INFO L410 AbstractCegarLoop]: === Iteration 2 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-13 23:21:00,585 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-13 23:21:00,586 INFO L82 PathProgramCache]: Analyzing trace with hash -2093950433, now seen corresponding path program 1 times [2019-10-13 23:21:00,586 INFO L157 tionRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-10-13 23:21:00,586 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1022051843] [2019-10-13 23:21:00,587 INFO L116 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-13 23:21:00,587 INFO L116 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-13 23:21:00,587 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-13 23:21:00,616 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-13 23:21:00,657 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2019-10-13 23:21:00,658 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1022051843] [2019-10-13 23:21:00,658 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1405386917] [2019-10-13 23:21:00,658 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-13 23:21:00,728 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-13 23:21:00,730 INFO L256 TraceCheckSpWp]: Trace formula consists of 123 conjuncts, 2 conjunts are in the unsatisfiable core [2019-10-13 23:21:00,739 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2019-10-13 23:21:00,768 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2019-10-13 23:21:00,768 INFO L321 TraceCheckSpWp]: Computing backward predicates... [2019-10-13 23:21:00,823 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2019-10-13 23:21:00,824 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 2 imperfect interpolant sequences. [2019-10-13 23:21:00,825 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [3, 3] total 5 [2019-10-13 23:21:00,825 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1475880527] [2019-10-13 23:21:00,827 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-10-13 23:21:00,828 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-10-13 23:21:00,828 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-10-13 23:21:00,828 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-10-13 23:21:00,829 INFO L87 Difference]: Start difference. First operand 20 states and 24 transitions. Second operand 3 states. [2019-10-13 23:21:00,844 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-13 23:21:00,844 INFO L93 Difference]: Finished difference Result 33 states and 43 transitions. [2019-10-13 23:21:00,845 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-10-13 23:21:00,845 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 25 [2019-10-13 23:21:00,845 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-13 23:21:00,846 INFO L225 Difference]: With dead ends: 33 [2019-10-13 23:21:00,846 INFO L226 Difference]: Without dead ends: 21 [2019-10-13 23:21:00,848 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 52 GetRequests, 49 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-10-13 23:21:00,849 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21 states. [2019-10-13 23:21:00,855 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21 to 21. [2019-10-13 23:21:00,855 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21 states. [2019-10-13 23:21:00,858 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21 states to 21 states and 25 transitions. [2019-10-13 23:21:00,858 INFO L78 Accepts]: Start accepts. Automaton has 21 states and 25 transitions. Word has length 25 [2019-10-13 23:21:00,859 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-13 23:21:00,859 INFO L462 AbstractCegarLoop]: Abstraction has 21 states and 25 transitions. [2019-10-13 23:21:00,859 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-10-13 23:21:00,860 INFO L276 IsEmpty]: Start isEmpty. Operand 21 states and 25 transitions. [2019-10-13 23:21:00,863 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2019-10-13 23:21:00,863 INFO L372 BasicCegarLoop]: Found error trace [2019-10-13 23:21:00,863 INFO L380 BasicCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-13 23:21:01,068 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 2 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-13 23:21:01,068 INFO L410 AbstractCegarLoop]: === Iteration 3 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-13 23:21:01,069 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-13 23:21:01,069 INFO L82 PathProgramCache]: Analyzing trace with hash 903502258, now seen corresponding path program 1 times [2019-10-13 23:21:01,069 INFO L157 tionRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-10-13 23:21:01,069 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [195681266] [2019-10-13 23:21:01,069 INFO L116 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-13 23:21:01,070 INFO L116 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-13 23:21:01,070 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-13 23:21:01,109 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-13 23:21:01,193 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2019-10-13 23:21:01,194 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [195681266] [2019-10-13 23:21:01,194 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-10-13 23:21:01,194 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-10-13 23:21:01,195 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [131516913] [2019-10-13 23:21:01,195 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-10-13 23:21:01,196 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-10-13 23:21:01,196 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-10-13 23:21:01,196 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-10-13 23:21:01,196 INFO L87 Difference]: Start difference. First operand 21 states and 25 transitions. Second operand 3 states. [2019-10-13 23:21:01,214 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-13 23:21:01,214 INFO L93 Difference]: Finished difference Result 31 states and 36 transitions. [2019-10-13 23:21:01,215 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-10-13 23:21:01,215 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 28 [2019-10-13 23:21:01,215 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-13 23:21:01,216 INFO L225 Difference]: With dead ends: 31 [2019-10-13 23:21:01,217 INFO L226 Difference]: Without dead ends: 22 [2019-10-13 23:21:01,217 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-10-13 23:21:01,218 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22 states. [2019-10-13 23:21:01,226 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22 to 22. [2019-10-13 23:21:01,226 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22 states. [2019-10-13 23:21:01,229 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22 states to 22 states and 26 transitions. [2019-10-13 23:21:01,229 INFO L78 Accepts]: Start accepts. Automaton has 22 states and 26 transitions. Word has length 28 [2019-10-13 23:21:01,233 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-13 23:21:01,234 INFO L462 AbstractCegarLoop]: Abstraction has 22 states and 26 transitions. [2019-10-13 23:21:01,234 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-10-13 23:21:01,234 INFO L276 IsEmpty]: Start isEmpty. Operand 22 states and 26 transitions. [2019-10-13 23:21:01,235 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2019-10-13 23:21:01,236 INFO L372 BasicCegarLoop]: Found error trace [2019-10-13 23:21:01,236 INFO L380 BasicCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-13 23:21:01,236 INFO L410 AbstractCegarLoop]: === Iteration 4 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-13 23:21:01,237 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-13 23:21:01,237 INFO L82 PathProgramCache]: Analyzing trace with hash 2130547361, now seen corresponding path program 1 times [2019-10-13 23:21:01,237 INFO L157 tionRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-10-13 23:21:01,238 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [880646306] [2019-10-13 23:21:01,238 INFO L116 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-13 23:21:01,238 INFO L116 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-13 23:21:01,238 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-13 23:21:01,320 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-13 23:21:01,382 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2019-10-13 23:21:01,383 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [880646306] [2019-10-13 23:21:01,383 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [217351840] [2019-10-13 23:21:01,383 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-13 23:21:01,439 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-13 23:21:01,440 INFO L256 TraceCheckSpWp]: Trace formula consists of 142 conjuncts, 3 conjunts are in the unsatisfiable core [2019-10-13 23:21:01,443 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2019-10-13 23:21:01,475 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2019-10-13 23:21:01,475 INFO L321 TraceCheckSpWp]: Computing backward predicates... [2019-10-13 23:21:01,509 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2019-10-13 23:21:01,509 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSifa [758024559] [2019-10-13 23:21:01,533 INFO L162 IcfgInterpreter]: Started Sifa with 19 locations of interest [2019-10-13 23:21:01,533 INFO L169 IcfgInterpreter]: Building call graph [2019-10-13 23:21:01,539 INFO L174 IcfgInterpreter]: Initial procedures are [ULTIMATE.start] [2019-10-13 23:21:01,545 INFO L179 IcfgInterpreter]: Starting interpretation [2019-10-13 23:21:01,545 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.start with input of size 1 for LOIs [2019-10-13 23:21:01,662 INFO L199 IcfgInterpreter]: Interpreting procedure main with input of size 21 for LOIs [2019-10-13 23:21:03,711 INFO L199 IcfgInterpreter]: Interpreting procedure sum with input of size 1 for LOIs [2019-10-13 23:21:03,770 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.init with input of size 10 for LOIs [2019-10-13 23:21:03,774 INFO L183 IcfgInterpreter]: Interpretation finished [2019-10-13 23:21:03,774 INFO L191 IcfgInterpreter]: Final predicates for locations of interest are: [2019-10-13 23:21:03,775 INFO L193 IcfgInterpreter]: Reachable states at location L9-3 satisfy 639#(<= 0 sum_~i~0) [2019-10-13 23:21:03,775 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initENTRY satisfy 648#(and (= |old(#NULL.base)| |#NULL.base|) (= |#valid| |old(#valid)|) (= |#NULL.offset| |old(#NULL.offset)|)) [2019-10-13 23:21:03,775 INFO L193 IcfgInterpreter]: Reachable states at location L36-1 satisfy 479#true [2019-10-13 23:21:03,775 INFO L193 IcfgInterpreter]: Reachable states at location L36 satisfy 522#(and (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 76))) (<= 19 main_~i~2) (not (< main_~i~2 19))) [2019-10-13 23:21:03,776 INFO L193 IcfgInterpreter]: Reachable states at location mainErr0ASSERT_VIOLATIONERROR_FUNCTION satisfy 234#(or (and (exists ((v_prenex_29 Int) (v_sum_~ret~0_BEFORE_RETURN_5 Int) (v_sum_~ret~0_BEFORE_RETURN_6 Int) (v_prenex_30 Int)) (or (and (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 76))) (not (<= (mod v_sum_~ret~0_BEFORE_RETURN_6 4294967296) 2147483647)) (<= main_~ret5~0 2147483647) (= main_~ret5~0 (+ (mod v_sum_~ret~0_BEFORE_RETURN_6 4294967296) (- 4294967296))) (<= 0 (+ main_~ret5~0 2147483648)) (not (< main_~i~2 19))) (and (<= (mod v_prenex_29 4294967296) 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 76))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (mod v_prenex_29 4294967296) main_~ret5~0) (not (< main_~i~2 19))) (and (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 76))) (<= main_~ret5~0 2147483647) (= main_~ret5~0 (+ (mod v_sum_~ret~0_BEFORE_RETURN_5 4294967296) (- 4294967296))) (<= 0 (+ main_~ret5~0 2147483648)) (not (<= (mod v_sum_~ret~0_BEFORE_RETURN_5 4294967296) 2147483647)) (not (< main_~i~2 19))) (and (= main_~ret5~0 (mod v_prenex_30 4294967296)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 76))) (<= (mod v_prenex_30 4294967296) 2147483647) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (not (< main_~i~2 19))))) (not (= main_~ret~1 main_~ret5~0))) (and (not (= main_~ret~1 main_~ret2~0)) (exists ((v_prenex_29 Int) (v_sum_~ret~0_BEFORE_RETURN_5 Int) (v_sum_~ret~0_BEFORE_RETURN_6 Int) (v_prenex_30 Int)) (or (and (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 76))) (not (<= (mod v_sum_~ret~0_BEFORE_RETURN_6 4294967296) 2147483647)) (<= main_~ret5~0 2147483647) (= main_~ret5~0 (+ (mod v_sum_~ret~0_BEFORE_RETURN_6 4294967296) (- 4294967296))) (<= 0 (+ main_~ret5~0 2147483648)) (not (< main_~i~2 19))) (and (<= (mod v_prenex_29 4294967296) 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 76))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (mod v_prenex_29 4294967296) main_~ret5~0) (not (< main_~i~2 19))) (and (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 76))) (<= main_~ret5~0 2147483647) (= main_~ret5~0 (+ (mod v_sum_~ret~0_BEFORE_RETURN_5 4294967296) (- 4294967296))) (<= 0 (+ main_~ret5~0 2147483648)) (not (<= (mod v_sum_~ret~0_BEFORE_RETURN_5 4294967296) 2147483647)) (not (< main_~i~2 19))) (and (= main_~ret5~0 (mod v_prenex_30 4294967296)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 76))) (<= (mod v_prenex_30 4294967296) 2147483647) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (not (< main_~i~2 19))))))) [2019-10-13 23:21:03,776 INFO L193 IcfgInterpreter]: Reachable states at location L-1 satisfy 23#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= 0 (select |#valid| 0)) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-13 23:21:03,776 INFO L193 IcfgInterpreter]: Reachable states at location mainENTRY satisfy 33#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= |#valid| |old(#valid)|) (<= 0 |#NULL.base|) (= |#memory_int| |old(#memory_int)|) (= |#NULL.offset| 0) (= |old(#length)| |#length|) (= 0 (select |old(#valid)| 0)) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-13 23:21:03,777 INFO L193 IcfgInterpreter]: Reachable states at location L27 satisfy 120#(or (exists ((v_prenex_2 Int) (v_sum_~ret~0_BEFORE_RETURN_2 Int)) (or (and (not (< main_~i~1 20)) (= (mod v_sum_~ret~0_BEFORE_RETURN_2 4294967296) |main_#t~ret4|) (<= (mod v_sum_~ret~0_BEFORE_RETURN_2 4294967296) 2147483647)) (and (not (<= (mod v_prenex_2 4294967296) 2147483647)) (not (< main_~i~1 20)) (= (+ (mod v_prenex_2 4294967296) (- 4294967296)) |main_#t~ret4|)))) (exists ((v_prenex_1 Int) (v_sum_~ret~0_BEFORE_RETURN_1 Int)) (or (and (<= (mod v_sum_~ret~0_BEFORE_RETURN_1 4294967296) 2147483647) (not (< main_~i~1 20)) (= (mod v_sum_~ret~0_BEFORE_RETURN_1 4294967296) |main_#t~ret4|)) (and (not (< main_~i~1 20)) (= |main_#t~ret4| (+ (mod v_prenex_1 4294967296) (- 4294967296))) (not (<= (mod v_prenex_1 4294967296) 2147483647)))))) [2019-10-13 23:21:03,777 INFO L193 IcfgInterpreter]: Reachable states at location sumENTRY satisfy 601#true [2019-10-13 23:21:03,777 INFO L193 IcfgInterpreter]: Reachable states at location L38 satisfy 380#true [2019-10-13 23:21:03,779 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initEXIT satisfy 653#(and (= |#valid| (store |old(#valid)| 0 0)) (= 0 |#NULL.base|) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-13 23:21:03,779 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.startENTRY satisfy 6#true [2019-10-13 23:21:03,779 INFO L193 IcfgInterpreter]: Reachable states at location L39 satisfy 313#true [2019-10-13 23:21:03,779 INFO L193 IcfgInterpreter]: Reachable states at location L30-1 satisfy 587#true [2019-10-13 23:21:03,780 INFO L193 IcfgInterpreter]: Reachable states at location L32-3 satisfy 560#true [2019-10-13 23:21:03,780 INFO L193 IcfgInterpreter]: Reachable states at location L23-4 satisfy 73#(and (not (< main_~i~1 20)) (<= 20 main_~i~1)) [2019-10-13 23:21:03,780 INFO L193 IcfgInterpreter]: Reachable states at location L30 satisfy 592#(exists ((v_prenex_2 Int) (v_prenex_1 Int) (v_sum_~ret~0_BEFORE_RETURN_1 Int) (v_sum_~ret~0_BEFORE_RETURN_2 Int)) (or (and (<= (mod v_sum_~ret~0_BEFORE_RETURN_1 4294967296) 2147483647) (not (< main_~i~1 20)) (<= main_~ret~1 2147483647) (= main_~ret~1 (mod v_sum_~ret~0_BEFORE_RETURN_1 4294967296)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (<= 0 (+ main_~ret~1 2147483648))) (and (not (< main_~i~1 20)) (<= main_~ret~1 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (= main_~ret~1 (+ (mod v_prenex_1 4294967296) (- 4294967296))) (not (<= (mod v_prenex_1 4294967296) 2147483647)) (<= 0 (+ main_~ret~1 2147483648))) (and (not (< main_~i~1 20)) (<= main_~ret~1 2147483647) (= (mod v_sum_~ret~0_BEFORE_RETURN_2 4294967296) main_~ret~1) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (<= (mod v_sum_~ret~0_BEFORE_RETURN_2 4294967296) 2147483647) (<= 0 (+ main_~ret~1 2147483648))) (and (not (<= (mod v_prenex_2 4294967296) 2147483647)) (not (< main_~i~1 20)) (<= main_~ret~1 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (= (+ (mod v_prenex_2 4294967296) (- 4294967296)) main_~ret~1) (<= 0 (+ main_~ret~1 2147483648))))) [2019-10-13 23:21:03,780 INFO L193 IcfgInterpreter]: Reachable states at location L23-3 satisfy 68#true [2019-10-13 23:21:03,781 INFO L193 IcfgInterpreter]: Reachable states at location sumEXIT satisfy 644#(and (<= 0 sum_~i~0) (= |sum_#res| (ite (<= (mod sum_~ret~0 4294967296) 2147483647) (mod sum_~ret~0 4294967296) (+ (mod sum_~ret~0 4294967296) (- 4294967296)))) (not (< sum_~i~0 20)) (<= 20 sum_~i~0)) [2019-10-13 23:21:04,137 INFO L223 tionRefinementEngine]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2019-10-13 23:21:04,137 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4, 4, 11] total 17 [2019-10-13 23:21:04,137 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [402688175] [2019-10-13 23:21:04,139 INFO L442 AbstractCegarLoop]: Interpolant automaton has 18 states [2019-10-13 23:21:04,140 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-10-13 23:21:04,140 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2019-10-13 23:21:04,142 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=50, Invalid=256, Unknown=0, NotChecked=0, Total=306 [2019-10-13 23:21:04,142 INFO L87 Difference]: Start difference. First operand 22 states and 26 transitions. Second operand 18 states. [2019-10-13 23:21:04,867 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-13 23:21:04,867 INFO L93 Difference]: Finished difference Result 40 states and 50 transitions. [2019-10-13 23:21:04,867 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2019-10-13 23:21:04,867 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 29 [2019-10-13 23:21:04,868 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-13 23:21:04,868 INFO L225 Difference]: With dead ends: 40 [2019-10-13 23:21:04,869 INFO L226 Difference]: Without dead ends: 25 [2019-10-13 23:21:04,870 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 105 GetRequests, 77 SyntacticMatches, 0 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 198 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=133, Invalid=737, Unknown=0, NotChecked=0, Total=870 [2019-10-13 23:21:04,870 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25 states. [2019-10-13 23:21:04,874 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25 to 25. [2019-10-13 23:21:04,874 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 25 states. [2019-10-13 23:21:04,875 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25 states to 25 states and 29 transitions. [2019-10-13 23:21:04,875 INFO L78 Accepts]: Start accepts. Automaton has 25 states and 29 transitions. Word has length 29 [2019-10-13 23:21:04,876 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-13 23:21:04,876 INFO L462 AbstractCegarLoop]: Abstraction has 25 states and 29 transitions. [2019-10-13 23:21:04,876 INFO L463 AbstractCegarLoop]: Interpolant automaton has 18 states. [2019-10-13 23:21:04,876 INFO L276 IsEmpty]: Start isEmpty. Operand 25 states and 29 transitions. [2019-10-13 23:21:04,877 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2019-10-13 23:21:04,877 INFO L372 BasicCegarLoop]: Found error trace [2019-10-13 23:21:04,877 INFO L380 BasicCegarLoop]: trace histogram [4, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-13 23:21:05,078 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-13 23:21:05,078 INFO L410 AbstractCegarLoop]: === Iteration 5 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-13 23:21:05,079 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-13 23:21:05,079 INFO L82 PathProgramCache]: Analyzing trace with hash 356639231, now seen corresponding path program 2 times [2019-10-13 23:21:05,079 INFO L157 tionRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-10-13 23:21:05,079 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1668211926] [2019-10-13 23:21:05,079 INFO L116 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-13 23:21:05,079 INFO L116 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-13 23:21:05,080 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-13 23:21:05,120 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-13 23:21:05,187 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2019-10-13 23:21:05,188 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1668211926] [2019-10-13 23:21:05,188 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1184897539] [2019-10-13 23:21:05,191 INFO L92 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-13 23:21:05,280 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 2 check-sat command(s) [2019-10-13 23:21:05,280 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-10-13 23:21:05,281 INFO L256 TraceCheckSpWp]: Trace formula consists of 108 conjuncts, 3 conjunts are in the unsatisfiable core [2019-10-13 23:21:05,286 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2019-10-13 23:21:05,304 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 10 proven. 1 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2019-10-13 23:21:05,305 INFO L321 TraceCheckSpWp]: Computing backward predicates... [2019-10-13 23:21:05,338 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 10 proven. 1 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2019-10-13 23:21:05,338 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSifa [1154457093] [2019-10-13 23:21:05,343 INFO L162 IcfgInterpreter]: Started Sifa with 19 locations of interest [2019-10-13 23:21:05,343 INFO L169 IcfgInterpreter]: Building call graph [2019-10-13 23:21:05,343 INFO L174 IcfgInterpreter]: Initial procedures are [ULTIMATE.start] [2019-10-13 23:21:05,344 INFO L179 IcfgInterpreter]: Starting interpretation [2019-10-13 23:21:05,344 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.start with input of size 1 for LOIs [2019-10-13 23:21:05,373 INFO L199 IcfgInterpreter]: Interpreting procedure main with input of size 21 for LOIs [2019-10-13 23:21:06,813 INFO L199 IcfgInterpreter]: Interpreting procedure sum with input of size 1 for LOIs [2019-10-13 23:21:06,845 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.init with input of size 10 for LOIs [2019-10-13 23:21:06,849 INFO L183 IcfgInterpreter]: Interpretation finished [2019-10-13 23:21:06,849 INFO L191 IcfgInterpreter]: Final predicates for locations of interest are: [2019-10-13 23:21:06,849 INFO L193 IcfgInterpreter]: Reachable states at location L9-3 satisfy 639#(<= 0 sum_~i~0) [2019-10-13 23:21:06,849 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initENTRY satisfy 648#(and (= |old(#NULL.base)| |#NULL.base|) (= |#valid| |old(#valid)|) (= |#NULL.offset| |old(#NULL.offset)|)) [2019-10-13 23:21:06,850 INFO L193 IcfgInterpreter]: Reachable states at location L36-1 satisfy 479#true [2019-10-13 23:21:06,850 INFO L193 IcfgInterpreter]: Reachable states at location L36 satisfy 522#(and (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 76))) (<= 19 main_~i~2) (not (< main_~i~2 19))) [2019-10-13 23:21:06,850 INFO L193 IcfgInterpreter]: Reachable states at location mainErr0ASSERT_VIOLATIONERROR_FUNCTION satisfy 234#(or (and (not (= main_~ret~1 main_~ret2~0)) (exists ((v_sum_~ret~0_BEFORE_RETURN_32 Int) (v_prenex_224 Int) (v_sum_~ret~0_BEFORE_RETURN_31 Int) (v_prenex_223 Int)) (or (and (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 76))) (<= main_~ret5~0 2147483647) (= main_~ret5~0 (+ (mod v_sum_~ret~0_BEFORE_RETURN_32 4294967296) (- 4294967296))) (<= 0 (+ main_~ret5~0 2147483648)) (not (< main_~i~2 19)) (not (<= (mod v_sum_~ret~0_BEFORE_RETURN_32 4294967296) 2147483647))) (and (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 76))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (<= (mod v_prenex_224 4294967296) 2147483647) (not (< main_~i~2 19)) (= main_~ret5~0 (mod v_prenex_224 4294967296))) (and (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 76))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (not (< main_~i~2 19)) (<= (mod v_prenex_223 4294967296) 2147483647) (= (mod v_prenex_223 4294967296) main_~ret5~0)) (and (= main_~ret5~0 (+ (mod v_sum_~ret~0_BEFORE_RETURN_31 4294967296) (- 4294967296))) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 76))) (not (<= (mod v_sum_~ret~0_BEFORE_RETURN_31 4294967296) 2147483647)) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (not (< main_~i~2 19)))))) (and (exists ((v_sum_~ret~0_BEFORE_RETURN_32 Int) (v_prenex_224 Int) (v_sum_~ret~0_BEFORE_RETURN_31 Int) (v_prenex_223 Int)) (or (and (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 76))) (<= main_~ret5~0 2147483647) (= main_~ret5~0 (+ (mod v_sum_~ret~0_BEFORE_RETURN_32 4294967296) (- 4294967296))) (<= 0 (+ main_~ret5~0 2147483648)) (not (< main_~i~2 19)) (not (<= (mod v_sum_~ret~0_BEFORE_RETURN_32 4294967296) 2147483647))) (and (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 76))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (<= (mod v_prenex_224 4294967296) 2147483647) (not (< main_~i~2 19)) (= main_~ret5~0 (mod v_prenex_224 4294967296))) (and (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 76))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (not (< main_~i~2 19)) (<= (mod v_prenex_223 4294967296) 2147483647) (= (mod v_prenex_223 4294967296) main_~ret5~0)) (and (= main_~ret5~0 (+ (mod v_sum_~ret~0_BEFORE_RETURN_31 4294967296) (- 4294967296))) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 76))) (not (<= (mod v_sum_~ret~0_BEFORE_RETURN_31 4294967296) 2147483647)) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (not (< main_~i~2 19))))) (not (= main_~ret~1 main_~ret5~0)))) [2019-10-13 23:21:06,850 INFO L193 IcfgInterpreter]: Reachable states at location L-1 satisfy 23#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= 0 (select |#valid| 0)) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-13 23:21:06,851 INFO L193 IcfgInterpreter]: Reachable states at location mainENTRY satisfy 33#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= |#valid| |old(#valid)|) (<= 0 |#NULL.base|) (= |#memory_int| |old(#memory_int)|) (= |#NULL.offset| 0) (= |old(#length)| |#length|) (= 0 (select |old(#valid)| 0)) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-13 23:21:06,851 INFO L193 IcfgInterpreter]: Reachable states at location L27 satisfy 120#(or (exists ((v_sum_~ret~0_BEFORE_RETURN_27 Int) (v_prenex_195 Int)) (or (and (not (< main_~i~1 20)) (= |main_#t~ret4| (mod v_sum_~ret~0_BEFORE_RETURN_27 4294967296)) (<= (mod v_sum_~ret~0_BEFORE_RETURN_27 4294967296) 2147483647)) (and (not (< main_~i~1 20)) (not (<= (mod v_prenex_195 4294967296) 2147483647)) (= (+ (mod v_prenex_195 4294967296) (- 4294967296)) |main_#t~ret4|)))) (exists ((v_prenex_196 Int) (v_sum_~ret~0_BEFORE_RETURN_28 Int)) (or (and (not (< main_~i~1 20)) (<= (mod v_prenex_196 4294967296) 2147483647) (= (mod v_prenex_196 4294967296) |main_#t~ret4|)) (and (not (< main_~i~1 20)) (= |main_#t~ret4| (+ (mod v_sum_~ret~0_BEFORE_RETURN_28 4294967296) (- 4294967296))) (not (<= (mod v_sum_~ret~0_BEFORE_RETURN_28 4294967296) 2147483647)))))) [2019-10-13 23:21:06,851 INFO L193 IcfgInterpreter]: Reachable states at location sumENTRY satisfy 601#true [2019-10-13 23:21:06,851 INFO L193 IcfgInterpreter]: Reachable states at location L38 satisfy 380#true [2019-10-13 23:21:06,851 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initEXIT satisfy 653#(and (= |#valid| (store |old(#valid)| 0 0)) (= 0 |#NULL.base|) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-13 23:21:06,851 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.startENTRY satisfy 6#true [2019-10-13 23:21:06,852 INFO L193 IcfgInterpreter]: Reachable states at location L39 satisfy 313#true [2019-10-13 23:21:06,852 INFO L193 IcfgInterpreter]: Reachable states at location L30-1 satisfy 587#true [2019-10-13 23:21:06,852 INFO L193 IcfgInterpreter]: Reachable states at location L32-3 satisfy 560#true [2019-10-13 23:21:06,852 INFO L193 IcfgInterpreter]: Reachable states at location L23-4 satisfy 73#(and (not (< main_~i~1 20)) (<= 20 main_~i~1)) [2019-10-13 23:21:06,852 INFO L193 IcfgInterpreter]: Reachable states at location L30 satisfy 592#(exists ((v_sum_~ret~0_BEFORE_RETURN_27 Int) (v_prenex_196 Int) (v_prenex_195 Int) (v_sum_~ret~0_BEFORE_RETURN_28 Int)) (or (and (not (< main_~i~1 20)) (<= main_~ret~1 2147483647) (not (<= (mod v_prenex_195 4294967296) 2147483647)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (= main_~ret~1 (+ (mod v_prenex_195 4294967296) (- 4294967296))) (<= 0 (+ main_~ret~1 2147483648))) (and (not (< main_~i~1 20)) (<= main_~ret~1 2147483647) (= main_~ret~1 (mod v_sum_~ret~0_BEFORE_RETURN_27 4294967296)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (<= (mod v_sum_~ret~0_BEFORE_RETURN_27 4294967296) 2147483647) (<= 0 (+ main_~ret~1 2147483648))) (and (not (< main_~i~1 20)) (<= main_~ret~1 2147483647) (<= (mod v_prenex_196 4294967296) 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (= (mod v_prenex_196 4294967296) main_~ret~1) (<= 0 (+ main_~ret~1 2147483648))) (and (not (< main_~i~1 20)) (<= main_~ret~1 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (not (<= (mod v_sum_~ret~0_BEFORE_RETURN_28 4294967296) 2147483647)) (= main_~ret~1 (+ (mod v_sum_~ret~0_BEFORE_RETURN_28 4294967296) (- 4294967296))) (<= 0 (+ main_~ret~1 2147483648))))) [2019-10-13 23:21:06,853 INFO L193 IcfgInterpreter]: Reachable states at location L23-3 satisfy 68#true [2019-10-13 23:21:06,853 INFO L193 IcfgInterpreter]: Reachable states at location sumEXIT satisfy 644#(and (<= 0 sum_~i~0) (= |sum_#res| (ite (<= (mod sum_~ret~0 4294967296) 2147483647) (mod sum_~ret~0 4294967296) (+ (mod sum_~ret~0 4294967296) (- 4294967296)))) (not (< sum_~i~0 20)) (<= 20 sum_~i~0)) [2019-10-13 23:21:07,218 INFO L223 tionRefinementEngine]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2019-10-13 23:21:07,219 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 4, 4, 11] total 21 [2019-10-13 23:21:07,219 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1181013239] [2019-10-13 23:21:07,220 INFO L442 AbstractCegarLoop]: Interpolant automaton has 22 states [2019-10-13 23:21:07,220 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-10-13 23:21:07,220 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2019-10-13 23:21:07,221 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=64, Invalid=398, Unknown=0, NotChecked=0, Total=462 [2019-10-13 23:21:07,221 INFO L87 Difference]: Start difference. First operand 25 states and 29 transitions. Second operand 22 states. [2019-10-13 23:21:08,045 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-13 23:21:08,046 INFO L93 Difference]: Finished difference Result 44 states and 58 transitions. [2019-10-13 23:21:08,046 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2019-10-13 23:21:08,046 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 32 [2019-10-13 23:21:08,047 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-13 23:21:08,048 INFO L225 Difference]: With dead ends: 44 [2019-10-13 23:21:08,048 INFO L226 Difference]: Without dead ends: 29 [2019-10-13 23:21:08,049 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 119 GetRequests, 82 SyntacticMatches, 0 SemanticMatches, 37 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 305 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=210, Invalid=1272, Unknown=0, NotChecked=0, Total=1482 [2019-10-13 23:21:08,050 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 29 states. [2019-10-13 23:21:08,055 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 29 to 29. [2019-10-13 23:21:08,055 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 29 states. [2019-10-13 23:21:08,056 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29 states to 29 states and 33 transitions. [2019-10-13 23:21:08,056 INFO L78 Accepts]: Start accepts. Automaton has 29 states and 33 transitions. Word has length 32 [2019-10-13 23:21:08,056 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-13 23:21:08,056 INFO L462 AbstractCegarLoop]: Abstraction has 29 states and 33 transitions. [2019-10-13 23:21:08,057 INFO L463 AbstractCegarLoop]: Interpolant automaton has 22 states. [2019-10-13 23:21:08,057 INFO L276 IsEmpty]: Start isEmpty. Operand 29 states and 33 transitions. [2019-10-13 23:21:08,058 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2019-10-13 23:21:08,058 INFO L372 BasicCegarLoop]: Found error trace [2019-10-13 23:21:08,058 INFO L380 BasicCegarLoop]: trace histogram [12, 5, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-13 23:21:08,261 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 4 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-13 23:21:08,266 INFO L410 AbstractCegarLoop]: === Iteration 6 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-13 23:21:08,267 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-13 23:21:08,267 INFO L82 PathProgramCache]: Analyzing trace with hash 906031436, now seen corresponding path program 3 times [2019-10-13 23:21:08,267 INFO L157 tionRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-10-13 23:21:08,267 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2131423193] [2019-10-13 23:21:08,267 INFO L116 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-13 23:21:08,267 INFO L116 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-13 23:21:08,267 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-13 23:21:08,295 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-13 23:21:08,376 INFO L134 CoverageAnalysis]: Checked inductivity of 127 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2019-10-13 23:21:08,376 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2131423193] [2019-10-13 23:21:08,376 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [59304057] [2019-10-13 23:21:08,377 INFO L92 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-13 23:21:08,491 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2019-10-13 23:21:08,492 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-10-13 23:21:08,493 INFO L256 TraceCheckSpWp]: Trace formula consists of 211 conjuncts, 7 conjunts are in the unsatisfiable core [2019-10-13 23:21:08,501 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2019-10-13 23:21:08,512 INFO L134 CoverageAnalysis]: Checked inductivity of 127 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2019-10-13 23:21:08,512 INFO L321 TraceCheckSpWp]: Computing backward predicates... [2019-10-13 23:21:08,608 INFO L134 CoverageAnalysis]: Checked inductivity of 127 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2019-10-13 23:21:08,608 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSifa [319460880] [2019-10-13 23:21:08,610 INFO L162 IcfgInterpreter]: Started Sifa with 19 locations of interest [2019-10-13 23:21:08,610 INFO L169 IcfgInterpreter]: Building call graph [2019-10-13 23:21:08,611 INFO L174 IcfgInterpreter]: Initial procedures are [ULTIMATE.start] [2019-10-13 23:21:08,611 INFO L179 IcfgInterpreter]: Starting interpretation [2019-10-13 23:21:08,611 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.start with input of size 1 for LOIs [2019-10-13 23:21:08,628 INFO L199 IcfgInterpreter]: Interpreting procedure main with input of size 21 for LOIs [2019-10-13 23:21:10,086 INFO L199 IcfgInterpreter]: Interpreting procedure sum with input of size 1 for LOIs [2019-10-13 23:21:10,121 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.init with input of size 10 for LOIs [2019-10-13 23:21:10,125 INFO L183 IcfgInterpreter]: Interpretation finished [2019-10-13 23:21:10,126 INFO L191 IcfgInterpreter]: Final predicates for locations of interest are: [2019-10-13 23:21:10,126 INFO L193 IcfgInterpreter]: Reachable states at location L9-3 satisfy 639#(<= 0 sum_~i~0) [2019-10-13 23:21:10,126 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initENTRY satisfy 648#(and (= |old(#NULL.base)| |#NULL.base|) (= |#valid| |old(#valid)|) (= |#NULL.offset| |old(#NULL.offset)|)) [2019-10-13 23:21:10,127 INFO L193 IcfgInterpreter]: Reachable states at location L36-1 satisfy 479#true [2019-10-13 23:21:10,127 INFO L193 IcfgInterpreter]: Reachable states at location L36 satisfy 522#(and (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 76))) (<= 19 main_~i~2) (not (< main_~i~2 19))) [2019-10-13 23:21:10,128 INFO L193 IcfgInterpreter]: Reachable states at location mainErr0ASSERT_VIOLATIONERROR_FUNCTION satisfy 234#(or (and (not (= main_~ret~1 main_~ret2~0)) (exists ((v_sum_~ret~0_BEFORE_RETURN_58 Int) (v_sum_~ret~0_BEFORE_RETURN_57 Int) (v_prenex_417 Int) (v_prenex_418 Int)) (or (and (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 76))) (= (mod v_prenex_417 4294967296) main_~ret5~0) (<= (mod v_prenex_417 4294967296) 2147483647) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (not (< main_~i~2 19))) (and (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 76))) (= (mod v_sum_~ret~0_BEFORE_RETURN_58 4294967296) main_~ret5~0) (<= main_~ret5~0 2147483647) (<= (mod v_sum_~ret~0_BEFORE_RETURN_58 4294967296) 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (not (< main_~i~2 19))) (and (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 76))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (not (<= (mod v_sum_~ret~0_BEFORE_RETURN_57 4294967296) 2147483647)) (not (< main_~i~2 19)) (= (+ (mod v_sum_~ret~0_BEFORE_RETURN_57 4294967296) (- 4294967296)) main_~ret5~0)) (and (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 76))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (not (<= (mod v_prenex_418 4294967296) 2147483647)) (not (< main_~i~2 19)) (= main_~ret5~0 (+ (mod v_prenex_418 4294967296) (- 4294967296))))))) (and (exists ((v_sum_~ret~0_BEFORE_RETURN_58 Int) (v_sum_~ret~0_BEFORE_RETURN_57 Int) (v_prenex_417 Int) (v_prenex_418 Int)) (or (and (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 76))) (= (mod v_prenex_417 4294967296) main_~ret5~0) (<= (mod v_prenex_417 4294967296) 2147483647) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (not (< main_~i~2 19))) (and (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 76))) (= (mod v_sum_~ret~0_BEFORE_RETURN_58 4294967296) main_~ret5~0) (<= main_~ret5~0 2147483647) (<= (mod v_sum_~ret~0_BEFORE_RETURN_58 4294967296) 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (not (< main_~i~2 19))) (and (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 76))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (not (<= (mod v_sum_~ret~0_BEFORE_RETURN_57 4294967296) 2147483647)) (not (< main_~i~2 19)) (= (+ (mod v_sum_~ret~0_BEFORE_RETURN_57 4294967296) (- 4294967296)) main_~ret5~0)) (and (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 76))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (not (<= (mod v_prenex_418 4294967296) 2147483647)) (not (< main_~i~2 19)) (= main_~ret5~0 (+ (mod v_prenex_418 4294967296) (- 4294967296)))))) (not (= main_~ret~1 main_~ret5~0)))) [2019-10-13 23:21:10,128 INFO L193 IcfgInterpreter]: Reachable states at location L-1 satisfy 23#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= 0 (select |#valid| 0)) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-13 23:21:10,128 INFO L193 IcfgInterpreter]: Reachable states at location mainENTRY satisfy 33#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= |#valid| |old(#valid)|) (<= 0 |#NULL.base|) (= |#memory_int| |old(#memory_int)|) (= |#NULL.offset| 0) (= |old(#length)| |#length|) (= 0 (select |old(#valid)| 0)) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-13 23:21:10,129 INFO L193 IcfgInterpreter]: Reachable states at location L27 satisfy 120#(or (exists ((v_prenex_389 Int) (v_sum_~ret~0_BEFORE_RETURN_53 Int)) (or (and (not (< main_~i~1 20)) (not (<= (mod v_prenex_389 4294967296) 2147483647)) (= (+ (mod v_prenex_389 4294967296) (- 4294967296)) |main_#t~ret4|)) (and (= (mod v_sum_~ret~0_BEFORE_RETURN_53 4294967296) |main_#t~ret4|) (not (< main_~i~1 20)) (<= (mod v_sum_~ret~0_BEFORE_RETURN_53 4294967296) 2147483647)))) (exists ((v_sum_~ret~0_BEFORE_RETURN_54 Int) (v_prenex_390 Int)) (or (and (= (+ (mod v_prenex_390 4294967296) (- 4294967296)) |main_#t~ret4|) (not (< main_~i~1 20)) (not (<= (mod v_prenex_390 4294967296) 2147483647))) (and (= (mod v_sum_~ret~0_BEFORE_RETURN_54 4294967296) |main_#t~ret4|) (<= (mod v_sum_~ret~0_BEFORE_RETURN_54 4294967296) 2147483647) (not (< main_~i~1 20)))))) [2019-10-13 23:21:10,129 INFO L193 IcfgInterpreter]: Reachable states at location sumENTRY satisfy 601#true [2019-10-13 23:21:10,129 INFO L193 IcfgInterpreter]: Reachable states at location L38 satisfy 380#true [2019-10-13 23:21:10,130 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initEXIT satisfy 653#(and (= |#valid| (store |old(#valid)| 0 0)) (= 0 |#NULL.base|) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-13 23:21:10,130 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.startENTRY satisfy 6#true [2019-10-13 23:21:10,130 INFO L193 IcfgInterpreter]: Reachable states at location L39 satisfy 313#true [2019-10-13 23:21:10,130 INFO L193 IcfgInterpreter]: Reachable states at location L30-1 satisfy 587#true [2019-10-13 23:21:10,131 INFO L193 IcfgInterpreter]: Reachable states at location L32-3 satisfy 560#true [2019-10-13 23:21:10,131 INFO L193 IcfgInterpreter]: Reachable states at location L23-4 satisfy 73#(and (not (< main_~i~1 20)) (<= 20 main_~i~1)) [2019-10-13 23:21:10,131 INFO L193 IcfgInterpreter]: Reachable states at location L30 satisfy 592#(exists ((v_prenex_389 Int) (v_sum_~ret~0_BEFORE_RETURN_54 Int) (v_sum_~ret~0_BEFORE_RETURN_53 Int) (v_prenex_390 Int)) (or (and (not (< main_~i~1 20)) (<= main_~ret~1 2147483647) (= (+ (mod v_prenex_390 4294967296) (- 4294967296)) main_~ret~1) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (not (<= (mod v_prenex_390 4294967296) 2147483647)) (<= 0 (+ main_~ret~1 2147483648))) (and (= main_~ret~1 (+ (mod v_prenex_389 4294967296) (- 4294967296))) (not (<= (mod v_prenex_389 4294967296) 2147483647)) (not (< main_~i~1 20)) (<= main_~ret~1 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (<= 0 (+ main_~ret~1 2147483648))) (and (not (< main_~i~1 20)) (= (mod v_sum_~ret~0_BEFORE_RETURN_53 4294967296) main_~ret~1) (<= main_~ret~1 2147483647) (<= (mod v_sum_~ret~0_BEFORE_RETURN_53 4294967296) 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (<= 0 (+ main_~ret~1 2147483648))) (and (<= (mod v_sum_~ret~0_BEFORE_RETURN_54 4294967296) 2147483647) (not (< main_~i~1 20)) (<= main_~ret~1 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (= (mod v_sum_~ret~0_BEFORE_RETURN_54 4294967296) main_~ret~1) (<= 0 (+ main_~ret~1 2147483648))))) [2019-10-13 23:21:10,132 INFO L193 IcfgInterpreter]: Reachable states at location L23-3 satisfy 68#true [2019-10-13 23:21:10,132 INFO L193 IcfgInterpreter]: Reachable states at location sumEXIT satisfy 644#(and (<= 0 sum_~i~0) (= |sum_#res| (ite (<= (mod sum_~ret~0 4294967296) 2147483647) (mod sum_~ret~0 4294967296) (+ (mod sum_~ret~0 4294967296) (- 4294967296)))) (not (< sum_~i~0 20)) (<= 20 sum_~i~0)) [2019-10-13 23:21:10,558 INFO L223 tionRefinementEngine]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2019-10-13 23:21:10,558 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8, 8, 11] total 25 [2019-10-13 23:21:10,558 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [990673899] [2019-10-13 23:21:10,560 INFO L442 AbstractCegarLoop]: Interpolant automaton has 26 states [2019-10-13 23:21:10,560 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-10-13 23:21:10,560 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2019-10-13 23:21:10,564 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=134, Invalid=516, Unknown=0, NotChecked=0, Total=650 [2019-10-13 23:21:10,564 INFO L87 Difference]: Start difference. First operand 29 states and 33 transitions. Second operand 26 states. [2019-10-13 23:21:11,468 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-13 23:21:11,468 INFO L93 Difference]: Finished difference Result 54 states and 68 transitions. [2019-10-13 23:21:11,469 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2019-10-13 23:21:11,469 INFO L78 Accepts]: Start accepts. Automaton has 26 states. Word has length 42 [2019-10-13 23:21:11,469 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-13 23:21:11,470 INFO L225 Difference]: With dead ends: 54 [2019-10-13 23:21:11,470 INFO L226 Difference]: Without dead ends: 36 [2019-10-13 23:21:11,471 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 156 GetRequests, 112 SyntacticMatches, 0 SemanticMatches, 44 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 552 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=369, Invalid=1701, Unknown=0, NotChecked=0, Total=2070 [2019-10-13 23:21:11,472 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 36 states. [2019-10-13 23:21:11,477 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 36 to 36. [2019-10-13 23:21:11,477 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 36 states. [2019-10-13 23:21:11,478 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 36 states to 36 states and 40 transitions. [2019-10-13 23:21:11,479 INFO L78 Accepts]: Start accepts. Automaton has 36 states and 40 transitions. Word has length 42 [2019-10-13 23:21:11,479 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-13 23:21:11,479 INFO L462 AbstractCegarLoop]: Abstraction has 36 states and 40 transitions. [2019-10-13 23:21:11,479 INFO L463 AbstractCegarLoop]: Interpolant automaton has 26 states. [2019-10-13 23:21:11,479 INFO L276 IsEmpty]: Start isEmpty. Operand 36 states and 40 transitions. [2019-10-13 23:21:11,480 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2019-10-13 23:21:11,480 INFO L372 BasicCegarLoop]: Found error trace [2019-10-13 23:21:11,481 INFO L380 BasicCegarLoop]: trace histogram [12, 12, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-13 23:21:11,684 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 5 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-13 23:21:11,685 INFO L410 AbstractCegarLoop]: === Iteration 7 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-13 23:21:11,685 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-13 23:21:11,686 INFO L82 PathProgramCache]: Analyzing trace with hash -1194663378, now seen corresponding path program 4 times [2019-10-13 23:21:11,686 INFO L157 tionRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-10-13 23:21:11,686 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [488155619] [2019-10-13 23:21:11,687 INFO L116 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-13 23:21:11,687 INFO L116 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-13 23:21:11,688 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-13 23:21:11,723 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-13 23:21:11,842 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2019-10-13 23:21:11,842 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [488155619] [2019-10-13 23:21:11,842 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1667063964] [2019-10-13 23:21:11,842 INFO L92 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-13 23:21:11,978 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-13 23:21:11,979 INFO L256 TraceCheckSpWp]: Trace formula consists of 253 conjuncts, 14 conjunts are in the unsatisfiable core [2019-10-13 23:21:11,982 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2019-10-13 23:21:12,008 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2019-10-13 23:21:12,008 INFO L321 TraceCheckSpWp]: Computing backward predicates... [2019-10-13 23:21:12,189 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2019-10-13 23:21:12,190 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSifa [1465066226] [2019-10-13 23:21:12,192 INFO L162 IcfgInterpreter]: Started Sifa with 19 locations of interest [2019-10-13 23:21:12,192 INFO L169 IcfgInterpreter]: Building call graph [2019-10-13 23:21:12,192 INFO L174 IcfgInterpreter]: Initial procedures are [ULTIMATE.start] [2019-10-13 23:21:12,193 INFO L179 IcfgInterpreter]: Starting interpretation [2019-10-13 23:21:12,193 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.start with input of size 1 for LOIs [2019-10-13 23:21:12,212 INFO L199 IcfgInterpreter]: Interpreting procedure main with input of size 21 for LOIs [2019-10-13 23:21:13,358 INFO L199 IcfgInterpreter]: Interpreting procedure sum with input of size 1 for LOIs [2019-10-13 23:21:13,379 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.init with input of size 10 for LOIs [2019-10-13 23:21:13,383 INFO L183 IcfgInterpreter]: Interpretation finished [2019-10-13 23:21:13,383 INFO L191 IcfgInterpreter]: Final predicates for locations of interest are: [2019-10-13 23:21:13,383 INFO L193 IcfgInterpreter]: Reachable states at location L9-3 satisfy 639#(<= 0 sum_~i~0) [2019-10-13 23:21:13,384 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initENTRY satisfy 648#(and (= |old(#NULL.base)| |#NULL.base|) (= |#valid| |old(#valid)|) (= |#NULL.offset| |old(#NULL.offset)|)) [2019-10-13 23:21:13,384 INFO L193 IcfgInterpreter]: Reachable states at location L36-1 satisfy 479#true [2019-10-13 23:21:13,384 INFO L193 IcfgInterpreter]: Reachable states at location L36 satisfy 522#(and (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 76))) (<= 19 main_~i~2) (not (< main_~i~2 19))) [2019-10-13 23:21:13,385 INFO L193 IcfgInterpreter]: Reachable states at location mainErr0ASSERT_VIOLATIONERROR_FUNCTION satisfy 234#(or (and (exists ((v_prenex_611 Int) (v_sum_~ret~0_BEFORE_RETURN_84 Int) (v_prenex_612 Int) (v_sum_~ret~0_BEFORE_RETURN_83 Int)) (or (and (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 76))) (<= main_~ret5~0 2147483647) (= main_~ret5~0 (+ (mod v_sum_~ret~0_BEFORE_RETURN_84 4294967296) (- 4294967296))) (<= 0 (+ main_~ret5~0 2147483648)) (not (<= (mod v_sum_~ret~0_BEFORE_RETURN_84 4294967296) 2147483647)) (not (< main_~i~2 19))) (and (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 76))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (<= (mod v_prenex_612 4294967296) 2147483647) (not (< main_~i~2 19)) (= (mod v_prenex_612 4294967296) main_~ret5~0)) (and (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 76))) (not (<= (mod v_prenex_611 4294967296) 2147483647)) (<= main_~ret5~0 2147483647) (= main_~ret5~0 (+ (mod v_prenex_611 4294967296) (- 4294967296))) (<= 0 (+ main_~ret5~0 2147483648)) (not (< main_~i~2 19))) (and (= main_~ret5~0 (mod v_sum_~ret~0_BEFORE_RETURN_83 4294967296)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 76))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (not (< main_~i~2 19)) (<= (mod v_sum_~ret~0_BEFORE_RETURN_83 4294967296) 2147483647)))) (not (= main_~ret~1 main_~ret5~0))) (and (not (= main_~ret~1 main_~ret2~0)) (exists ((v_prenex_611 Int) (v_sum_~ret~0_BEFORE_RETURN_84 Int) (v_prenex_612 Int) (v_sum_~ret~0_BEFORE_RETURN_83 Int)) (or (and (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 76))) (<= main_~ret5~0 2147483647) (= main_~ret5~0 (+ (mod v_sum_~ret~0_BEFORE_RETURN_84 4294967296) (- 4294967296))) (<= 0 (+ main_~ret5~0 2147483648)) (not (<= (mod v_sum_~ret~0_BEFORE_RETURN_84 4294967296) 2147483647)) (not (< main_~i~2 19))) (and (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 76))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (<= (mod v_prenex_612 4294967296) 2147483647) (not (< main_~i~2 19)) (= (mod v_prenex_612 4294967296) main_~ret5~0)) (and (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 76))) (not (<= (mod v_prenex_611 4294967296) 2147483647)) (<= main_~ret5~0 2147483647) (= main_~ret5~0 (+ (mod v_prenex_611 4294967296) (- 4294967296))) (<= 0 (+ main_~ret5~0 2147483648)) (not (< main_~i~2 19))) (and (= main_~ret5~0 (mod v_sum_~ret~0_BEFORE_RETURN_83 4294967296)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 76))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (not (< main_~i~2 19)) (<= (mod v_sum_~ret~0_BEFORE_RETURN_83 4294967296) 2147483647)))))) [2019-10-13 23:21:13,385 INFO L193 IcfgInterpreter]: Reachable states at location L-1 satisfy 23#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= 0 (select |#valid| 0)) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-13 23:21:13,385 INFO L193 IcfgInterpreter]: Reachable states at location mainENTRY satisfy 33#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= |#valid| |old(#valid)|) (<= 0 |#NULL.base|) (= |#memory_int| |old(#memory_int)|) (= |#NULL.offset| 0) (= |old(#length)| |#length|) (= 0 (select |old(#valid)| 0)) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-13 23:21:13,385 INFO L193 IcfgInterpreter]: Reachable states at location L27 satisfy 120#(or (exists ((v_prenex_583 Int) (v_sum_~ret~0_BEFORE_RETURN_79 Int)) (or (and (not (< main_~i~1 20)) (not (<= (mod v_sum_~ret~0_BEFORE_RETURN_79 4294967296) 2147483647)) (= (+ (mod v_sum_~ret~0_BEFORE_RETURN_79 4294967296) (- 4294967296)) |main_#t~ret4|)) (and (= (mod v_prenex_583 4294967296) |main_#t~ret4|) (not (< main_~i~1 20)) (<= (mod v_prenex_583 4294967296) 2147483647)))) (exists ((v_prenex_584 Int) (v_sum_~ret~0_BEFORE_RETURN_80 Int)) (or (and (not (< main_~i~1 20)) (= |main_#t~ret4| (+ (mod v_prenex_584 4294967296) (- 4294967296))) (not (<= (mod v_prenex_584 4294967296) 2147483647))) (and (not (< main_~i~1 20)) (= |main_#t~ret4| (mod v_sum_~ret~0_BEFORE_RETURN_80 4294967296)) (<= (mod v_sum_~ret~0_BEFORE_RETURN_80 4294967296) 2147483647))))) [2019-10-13 23:21:13,386 INFO L193 IcfgInterpreter]: Reachable states at location sumENTRY satisfy 601#true [2019-10-13 23:21:13,386 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initEXIT satisfy 653#(and (= |#valid| (store |old(#valid)| 0 0)) (= 0 |#NULL.base|) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-13 23:21:13,386 INFO L193 IcfgInterpreter]: Reachable states at location L38 satisfy 380#true [2019-10-13 23:21:13,386 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.startENTRY satisfy 6#true [2019-10-13 23:21:13,386 INFO L193 IcfgInterpreter]: Reachable states at location L39 satisfy 313#true [2019-10-13 23:21:13,386 INFO L193 IcfgInterpreter]: Reachable states at location L30-1 satisfy 587#true [2019-10-13 23:21:13,387 INFO L193 IcfgInterpreter]: Reachable states at location L32-3 satisfy 560#true [2019-10-13 23:21:13,387 INFO L193 IcfgInterpreter]: Reachable states at location L23-4 satisfy 73#(and (not (< main_~i~1 20)) (<= 20 main_~i~1)) [2019-10-13 23:21:13,387 INFO L193 IcfgInterpreter]: Reachable states at location L30 satisfy 592#(exists ((v_prenex_583 Int) (v_sum_~ret~0_BEFORE_RETURN_79 Int) (v_prenex_584 Int) (v_sum_~ret~0_BEFORE_RETURN_80 Int)) (or (and (not (< main_~i~1 20)) (<= main_~ret~1 2147483647) (not (<= (mod v_sum_~ret~0_BEFORE_RETURN_79 4294967296) 2147483647)) (= main_~ret~1 (+ (mod v_sum_~ret~0_BEFORE_RETURN_79 4294967296) (- 4294967296))) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (<= 0 (+ main_~ret~1 2147483648))) (and (not (< main_~i~1 20)) (<= main_~ret~1 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (= main_~ret~1 (mod v_sum_~ret~0_BEFORE_RETURN_80 4294967296)) (<= (mod v_sum_~ret~0_BEFORE_RETURN_80 4294967296) 2147483647) (<= 0 (+ main_~ret~1 2147483648))) (and (not (< main_~i~1 20)) (<= main_~ret~1 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (not (<= (mod v_prenex_584 4294967296) 2147483647)) (= main_~ret~1 (+ (mod v_prenex_584 4294967296) (- 4294967296))) (<= 0 (+ main_~ret~1 2147483648))) (and (not (< main_~i~1 20)) (<= main_~ret~1 2147483647) (<= (mod v_prenex_583 4294967296) 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (= main_~ret~1 (mod v_prenex_583 4294967296)) (<= 0 (+ main_~ret~1 2147483648))))) [2019-10-13 23:21:13,387 INFO L193 IcfgInterpreter]: Reachable states at location L23-3 satisfy 68#true [2019-10-13 23:21:13,387 INFO L193 IcfgInterpreter]: Reachable states at location sumEXIT satisfy 644#(and (<= 0 sum_~i~0) (= |sum_#res| (ite (<= (mod sum_~ret~0 4294967296) 2147483647) (mod sum_~ret~0 4294967296) (+ (mod sum_~ret~0 4294967296) (- 4294967296)))) (not (< sum_~i~0 20)) (<= 20 sum_~i~0)) [2019-10-13 23:21:13,737 INFO L223 tionRefinementEngine]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2019-10-13 23:21:13,738 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 15, 15, 11] total 33 [2019-10-13 23:21:13,738 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [90670022] [2019-10-13 23:21:13,739 INFO L442 AbstractCegarLoop]: Interpolant automaton has 34 states [2019-10-13 23:21:13,740 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-10-13 23:21:13,740 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 34 interpolants. [2019-10-13 23:21:13,741 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=282, Invalid=840, Unknown=0, NotChecked=0, Total=1122 [2019-10-13 23:21:13,741 INFO L87 Difference]: Start difference. First operand 36 states and 40 transitions. Second operand 34 states. [2019-10-13 23:21:14,937 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-13 23:21:14,937 INFO L93 Difference]: Finished difference Result 62 states and 77 transitions. [2019-10-13 23:21:14,937 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 33 states. [2019-10-13 23:21:14,937 INFO L78 Accepts]: Start accepts. Automaton has 34 states. Word has length 49 [2019-10-13 23:21:14,938 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-13 23:21:14,941 INFO L225 Difference]: With dead ends: 62 [2019-10-13 23:21:14,941 INFO L226 Difference]: Without dead ends: 44 [2019-10-13 23:21:14,943 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 192 GetRequests, 126 SyntacticMatches, 6 SemanticMatches, 60 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 977 ImplicationChecksByTransitivity, 1.5s TimeCoverageRelationStatistics Valid=797, Invalid=2985, Unknown=0, NotChecked=0, Total=3782 [2019-10-13 23:21:14,943 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 44 states. [2019-10-13 23:21:14,951 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 44 to 44. [2019-10-13 23:21:14,951 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 44 states. [2019-10-13 23:21:14,952 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 44 states to 44 states and 48 transitions. [2019-10-13 23:21:14,952 INFO L78 Accepts]: Start accepts. Automaton has 44 states and 48 transitions. Word has length 49 [2019-10-13 23:21:14,952 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-13 23:21:14,953 INFO L462 AbstractCegarLoop]: Abstraction has 44 states and 48 transitions. [2019-10-13 23:21:14,953 INFO L463 AbstractCegarLoop]: Interpolant automaton has 34 states. [2019-10-13 23:21:14,953 INFO L276 IsEmpty]: Start isEmpty. Operand 44 states and 48 transitions. [2019-10-13 23:21:14,955 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2019-10-13 23:21:14,955 INFO L372 BasicCegarLoop]: Found error trace [2019-10-13 23:21:14,956 INFO L380 BasicCegarLoop]: trace histogram [20, 12, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-13 23:21:15,156 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 6 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-13 23:21:15,157 INFO L410 AbstractCegarLoop]: === Iteration 8 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-13 23:21:15,157 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-13 23:21:15,158 INFO L82 PathProgramCache]: Analyzing trace with hash -716222162, now seen corresponding path program 5 times [2019-10-13 23:21:15,158 INFO L157 tionRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-10-13 23:21:15,158 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [855780963] [2019-10-13 23:21:15,159 INFO L116 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-13 23:21:15,159 INFO L116 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-13 23:21:15,159 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-13 23:21:15,197 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-13 23:21:15,225 INFO L134 CoverageAnalysis]: Checked inductivity of 322 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 321 trivial. 0 not checked. [2019-10-13 23:21:15,225 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [855780963] [2019-10-13 23:21:15,225 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1727298591] [2019-10-13 23:21:15,226 INFO L92 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-13 23:21:15,374 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 3 check-sat command(s) [2019-10-13 23:21:15,374 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-10-13 23:21:15,375 INFO L256 TraceCheckSpWp]: Trace formula consists of 149 conjuncts, 6 conjunts are in the unsatisfiable core [2019-10-13 23:21:15,378 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2019-10-13 23:21:15,410 INFO L134 CoverageAnalysis]: Checked inductivity of 322 backedges. 52 proven. 10 refuted. 0 times theorem prover too weak. 260 trivial. 0 not checked. [2019-10-13 23:21:15,410 INFO L321 TraceCheckSpWp]: Computing backward predicates... [2019-10-13 23:21:15,471 INFO L134 CoverageAnalysis]: Checked inductivity of 322 backedges. 52 proven. 10 refuted. 0 times theorem prover too weak. 260 trivial. 0 not checked. [2019-10-13 23:21:15,472 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSifa [387644612] [2019-10-13 23:21:15,473 INFO L162 IcfgInterpreter]: Started Sifa with 19 locations of interest [2019-10-13 23:21:15,475 INFO L169 IcfgInterpreter]: Building call graph [2019-10-13 23:21:15,476 INFO L174 IcfgInterpreter]: Initial procedures are [ULTIMATE.start] [2019-10-13 23:21:15,476 INFO L179 IcfgInterpreter]: Starting interpretation [2019-10-13 23:21:15,476 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.start with input of size 1 for LOIs [2019-10-13 23:21:15,515 INFO L199 IcfgInterpreter]: Interpreting procedure main with input of size 21 for LOIs [2019-10-13 23:21:16,623 INFO L199 IcfgInterpreter]: Interpreting procedure sum with input of size 1 for LOIs [2019-10-13 23:21:16,650 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.init with input of size 10 for LOIs [2019-10-13 23:21:16,653 INFO L183 IcfgInterpreter]: Interpretation finished [2019-10-13 23:21:16,653 INFO L191 IcfgInterpreter]: Final predicates for locations of interest are: [2019-10-13 23:21:16,653 INFO L193 IcfgInterpreter]: Reachable states at location L9-3 satisfy 639#(<= 0 sum_~i~0) [2019-10-13 23:21:16,653 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initENTRY satisfy 648#(and (= |old(#NULL.base)| |#NULL.base|) (= |#valid| |old(#valid)|) (= |#NULL.offset| |old(#NULL.offset)|)) [2019-10-13 23:21:16,653 INFO L193 IcfgInterpreter]: Reachable states at location L36-1 satisfy 479#true [2019-10-13 23:21:16,654 INFO L193 IcfgInterpreter]: Reachable states at location L36 satisfy 522#(and (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 76))) (<= 19 main_~i~2) (not (< main_~i~2 19))) [2019-10-13 23:21:16,654 INFO L193 IcfgInterpreter]: Reachable states at location mainErr0ASSERT_VIOLATIONERROR_FUNCTION satisfy 234#(or (and (not (= main_~ret~1 main_~ret2~0)) (exists ((v_sum_~ret~0_BEFORE_RETURN_109 Int) (v_prenex_806 Int) (v_sum_~ret~0_BEFORE_RETURN_110 Int) (v_prenex_805 Int)) (or (and (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 76))) (= main_~ret5~0 (mod v_prenex_806 4294967296)) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (<= (mod v_prenex_806 4294967296) 2147483647) (not (< main_~i~2 19))) (and (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 76))) (= (+ (mod v_prenex_805 4294967296) (- 4294967296)) main_~ret5~0) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (not (<= (mod v_prenex_805 4294967296) 2147483647)) (not (< main_~i~2 19))) (and (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 76))) (<= (mod v_sum_~ret~0_BEFORE_RETURN_109 4294967296) 2147483647) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= main_~ret5~0 (mod v_sum_~ret~0_BEFORE_RETURN_109 4294967296)) (not (< main_~i~2 19))) (and (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 76))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (not (<= (mod v_sum_~ret~0_BEFORE_RETURN_110 4294967296) 2147483647)) (= main_~ret5~0 (+ (mod v_sum_~ret~0_BEFORE_RETURN_110 4294967296) (- 4294967296))) (not (< main_~i~2 19)))))) (and (exists ((v_sum_~ret~0_BEFORE_RETURN_109 Int) (v_prenex_806 Int) (v_sum_~ret~0_BEFORE_RETURN_110 Int) (v_prenex_805 Int)) (or (and (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 76))) (= main_~ret5~0 (mod v_prenex_806 4294967296)) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (<= (mod v_prenex_806 4294967296) 2147483647) (not (< main_~i~2 19))) (and (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 76))) (= (+ (mod v_prenex_805 4294967296) (- 4294967296)) main_~ret5~0) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (not (<= (mod v_prenex_805 4294967296) 2147483647)) (not (< main_~i~2 19))) (and (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 76))) (<= (mod v_sum_~ret~0_BEFORE_RETURN_109 4294967296) 2147483647) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= main_~ret5~0 (mod v_sum_~ret~0_BEFORE_RETURN_109 4294967296)) (not (< main_~i~2 19))) (and (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 76))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (not (<= (mod v_sum_~ret~0_BEFORE_RETURN_110 4294967296) 2147483647)) (= main_~ret5~0 (+ (mod v_sum_~ret~0_BEFORE_RETURN_110 4294967296) (- 4294967296))) (not (< main_~i~2 19))))) (not (= main_~ret~1 main_~ret5~0)))) [2019-10-13 23:21:16,654 INFO L193 IcfgInterpreter]: Reachable states at location L-1 satisfy 23#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= 0 (select |#valid| 0)) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-13 23:21:16,654 INFO L193 IcfgInterpreter]: Reachable states at location mainENTRY satisfy 33#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= |#valid| |old(#valid)|) (<= 0 |#NULL.base|) (= |#memory_int| |old(#memory_int)|) (= |#NULL.offset| 0) (= |old(#length)| |#length|) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (= 0 (select |old(#valid)| 0))) [2019-10-13 23:21:16,655 INFO L193 IcfgInterpreter]: Reachable states at location L27 satisfy 120#(or (exists ((v_sum_~ret~0_BEFORE_RETURN_106 Int) (v_prenex_778 Int)) (or (and (not (< main_~i~1 20)) (= |main_#t~ret4| (mod v_sum_~ret~0_BEFORE_RETURN_106 4294967296)) (<= (mod v_sum_~ret~0_BEFORE_RETURN_106 4294967296) 2147483647)) (and (not (<= (mod v_prenex_778 4294967296) 2147483647)) (not (< main_~i~1 20)) (= (+ (mod v_prenex_778 4294967296) (- 4294967296)) |main_#t~ret4|)))) (exists ((v_prenex_777 Int) (v_sum_~ret~0_BEFORE_RETURN_105 Int)) (or (and (<= (mod v_prenex_777 4294967296) 2147483647) (not (< main_~i~1 20)) (= (mod v_prenex_777 4294967296) |main_#t~ret4|)) (and (not (< main_~i~1 20)) (not (<= (mod v_sum_~ret~0_BEFORE_RETURN_105 4294967296) 2147483647)) (= |main_#t~ret4| (+ (mod v_sum_~ret~0_BEFORE_RETURN_105 4294967296) (- 4294967296))))))) [2019-10-13 23:21:16,655 INFO L193 IcfgInterpreter]: Reachable states at location sumENTRY satisfy 601#true [2019-10-13 23:21:16,655 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initEXIT satisfy 653#(and (= |#valid| (store |old(#valid)| 0 0)) (= 0 |#NULL.base|) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-13 23:21:16,655 INFO L193 IcfgInterpreter]: Reachable states at location L38 satisfy 380#true [2019-10-13 23:21:16,655 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.startENTRY satisfy 6#true [2019-10-13 23:21:16,655 INFO L193 IcfgInterpreter]: Reachable states at location L39 satisfy 313#true [2019-10-13 23:21:16,656 INFO L193 IcfgInterpreter]: Reachable states at location L30-1 satisfy 587#true [2019-10-13 23:21:16,656 INFO L193 IcfgInterpreter]: Reachable states at location L32-3 satisfy 560#true [2019-10-13 23:21:16,656 INFO L193 IcfgInterpreter]: Reachable states at location L23-4 satisfy 73#(and (not (< main_~i~1 20)) (<= 20 main_~i~1)) [2019-10-13 23:21:16,656 INFO L193 IcfgInterpreter]: Reachable states at location L30 satisfy 592#(exists ((v_prenex_777 Int) (v_sum_~ret~0_BEFORE_RETURN_106 Int) (v_sum_~ret~0_BEFORE_RETURN_105 Int) (v_prenex_778 Int)) (or (and (not (<= (mod v_prenex_778 4294967296) 2147483647)) (not (< main_~i~1 20)) (= (+ (mod v_prenex_778 4294967296) (- 4294967296)) main_~ret~1) (<= main_~ret~1 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (<= 0 (+ main_~ret~1 2147483648))) (and (not (< main_~i~1 20)) (= main_~ret~1 (mod v_sum_~ret~0_BEFORE_RETURN_106 4294967296)) (<= main_~ret~1 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (<= (mod v_sum_~ret~0_BEFORE_RETURN_106 4294967296) 2147483647) (<= 0 (+ main_~ret~1 2147483648))) (and (<= (mod v_prenex_777 4294967296) 2147483647) (= main_~ret~1 (mod v_prenex_777 4294967296)) (not (< main_~i~1 20)) (<= main_~ret~1 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (<= 0 (+ main_~ret~1 2147483648))) (and (not (< main_~i~1 20)) (= main_~ret~1 (+ (mod v_sum_~ret~0_BEFORE_RETURN_105 4294967296) (- 4294967296))) (<= main_~ret~1 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (not (<= (mod v_sum_~ret~0_BEFORE_RETURN_105 4294967296) 2147483647)) (<= 0 (+ main_~ret~1 2147483648))))) [2019-10-13 23:21:16,656 INFO L193 IcfgInterpreter]: Reachable states at location L23-3 satisfy 68#true [2019-10-13 23:21:16,657 INFO L193 IcfgInterpreter]: Reachable states at location sumEXIT satisfy 644#(and (<= 0 sum_~i~0) (= |sum_#res| (ite (<= (mod sum_~ret~0 4294967296) 2147483647) (mod sum_~ret~0 4294967296) (+ (mod sum_~ret~0 4294967296) (- 4294967296)))) (not (< sum_~i~0 20)) (<= 20 sum_~i~0)) [2019-10-13 23:21:17,007 INFO L223 tionRefinementEngine]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2019-10-13 23:21:17,008 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 7, 7, 11] total 24 [2019-10-13 23:21:17,008 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [78493485] [2019-10-13 23:21:17,009 INFO L442 AbstractCegarLoop]: Interpolant automaton has 25 states [2019-10-13 23:21:17,009 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-10-13 23:21:17,010 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2019-10-13 23:21:17,010 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=100, Invalid=500, Unknown=0, NotChecked=0, Total=600 [2019-10-13 23:21:17,010 INFO L87 Difference]: Start difference. First operand 44 states and 48 transitions. Second operand 25 states. [2019-10-13 23:21:18,038 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-13 23:21:18,039 INFO L93 Difference]: Finished difference Result 68 states and 84 transitions. [2019-10-13 23:21:18,039 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2019-10-13 23:21:18,039 INFO L78 Accepts]: Start accepts. Automaton has 25 states. Word has length 57 [2019-10-13 23:21:18,039 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-13 23:21:18,040 INFO L225 Difference]: With dead ends: 68 [2019-10-13 23:21:18,040 INFO L226 Difference]: Without dead ends: 51 [2019-10-13 23:21:18,042 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 194 GetRequests, 151 SyntacticMatches, 0 SemanticMatches, 43 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 440 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=358, Invalid=1622, Unknown=0, NotChecked=0, Total=1980 [2019-10-13 23:21:18,042 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 51 states. [2019-10-13 23:21:18,049 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 51 to 51. [2019-10-13 23:21:18,049 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 51 states. [2019-10-13 23:21:18,050 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 51 states to 51 states and 55 transitions. [2019-10-13 23:21:18,050 INFO L78 Accepts]: Start accepts. Automaton has 51 states and 55 transitions. Word has length 57 [2019-10-13 23:21:18,050 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-13 23:21:18,050 INFO L462 AbstractCegarLoop]: Abstraction has 51 states and 55 transitions. [2019-10-13 23:21:18,051 INFO L463 AbstractCegarLoop]: Interpolant automaton has 25 states. [2019-10-13 23:21:18,051 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 55 transitions. [2019-10-13 23:21:18,052 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 77 [2019-10-13 23:21:18,052 INFO L372 BasicCegarLoop]: Found error trace [2019-10-13 23:21:18,052 INFO L380 BasicCegarLoop]: trace histogram [30, 20, 3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-13 23:21:18,255 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 7 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-13 23:21:18,256 INFO L410 AbstractCegarLoop]: === Iteration 9 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-13 23:21:18,256 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-13 23:21:18,256 INFO L82 PathProgramCache]: Analyzing trace with hash 696436029, now seen corresponding path program 6 times [2019-10-13 23:21:18,256 INFO L157 tionRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-10-13 23:21:18,256 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2091700510] [2019-10-13 23:21:18,257 INFO L116 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-13 23:21:18,257 INFO L116 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-13 23:21:18,257 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-13 23:21:18,301 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-13 23:21:18,394 INFO L134 CoverageAnalysis]: Checked inductivity of 747 backedges. 0 proven. 299 refuted. 0 times theorem prover too weak. 448 trivial. 0 not checked. [2019-10-13 23:21:18,394 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2091700510] [2019-10-13 23:21:18,394 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2066839639] [2019-10-13 23:21:18,394 INFO L92 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-13 23:21:18,579 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2019-10-13 23:21:18,580 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-10-13 23:21:18,581 INFO L256 TraceCheckSpWp]: Trace formula consists of 395 conjuncts, 12 conjunts are in the unsatisfiable core [2019-10-13 23:21:18,584 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2019-10-13 23:21:18,601 INFO L134 CoverageAnalysis]: Checked inductivity of 747 backedges. 244 proven. 55 refuted. 0 times theorem prover too weak. 448 trivial. 0 not checked. [2019-10-13 23:21:18,602 INFO L321 TraceCheckSpWp]: Computing backward predicates... [2019-10-13 23:21:18,755 INFO L134 CoverageAnalysis]: Checked inductivity of 747 backedges. 0 proven. 299 refuted. 0 times theorem prover too weak. 448 trivial. 0 not checked. [2019-10-13 23:21:18,756 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSifa [1970385873] [2019-10-13 23:21:18,757 INFO L162 IcfgInterpreter]: Started Sifa with 19 locations of interest [2019-10-13 23:21:18,757 INFO L169 IcfgInterpreter]: Building call graph [2019-10-13 23:21:18,758 INFO L174 IcfgInterpreter]: Initial procedures are [ULTIMATE.start] [2019-10-13 23:21:18,758 INFO L179 IcfgInterpreter]: Starting interpretation [2019-10-13 23:21:18,758 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.start with input of size 1 for LOIs [2019-10-13 23:21:18,778 INFO L199 IcfgInterpreter]: Interpreting procedure main with input of size 21 for LOIs [2019-10-13 23:21:19,916 INFO L199 IcfgInterpreter]: Interpreting procedure sum with input of size 1 for LOIs [2019-10-13 23:21:19,934 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.init with input of size 10 for LOIs [2019-10-13 23:21:19,936 INFO L183 IcfgInterpreter]: Interpretation finished [2019-10-13 23:21:19,936 INFO L191 IcfgInterpreter]: Final predicates for locations of interest are: [2019-10-13 23:21:19,936 INFO L193 IcfgInterpreter]: Reachable states at location L9-3 satisfy 639#(<= 0 sum_~i~0) [2019-10-13 23:21:19,937 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initENTRY satisfy 648#(and (= |old(#NULL.base)| |#NULL.base|) (= |#valid| |old(#valid)|) (= |#NULL.offset| |old(#NULL.offset)|)) [2019-10-13 23:21:19,937 INFO L193 IcfgInterpreter]: Reachable states at location L36-1 satisfy 479#true [2019-10-13 23:21:19,937 INFO L193 IcfgInterpreter]: Reachable states at location L36 satisfy 522#(and (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 76))) (<= 19 main_~i~2) (not (< main_~i~2 19))) [2019-10-13 23:21:19,937 INFO L193 IcfgInterpreter]: Reachable states at location mainErr0ASSERT_VIOLATIONERROR_FUNCTION satisfy 234#(or (and (exists ((v_sum_~ret~0_BEFORE_RETURN_136 Int) (v_prenex_1000 Int) (v_sum_~ret~0_BEFORE_RETURN_135 Int) (v_prenex_999 Int)) (or (and (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 76))) (= main_~ret5~0 (+ (mod v_prenex_1000 4294967296) (- 4294967296))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (not (<= (mod v_prenex_1000 4294967296) 2147483647)) (not (< main_~i~2 19))) (and (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 76))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (not (< main_~i~2 19)) (not (<= (mod v_sum_~ret~0_BEFORE_RETURN_135 4294967296) 2147483647)) (= main_~ret5~0 (+ (mod v_sum_~ret~0_BEFORE_RETURN_135 4294967296) (- 4294967296)))) (and (= main_~ret5~0 (mod v_sum_~ret~0_BEFORE_RETURN_136 4294967296)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 76))) (<= (mod v_sum_~ret~0_BEFORE_RETURN_136 4294967296) 2147483647) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (not (< main_~i~2 19))) (and (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 76))) (= (mod v_prenex_999 4294967296) main_~ret5~0) (<= (mod v_prenex_999 4294967296) 2147483647) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (not (< main_~i~2 19))))) (not (= main_~ret~1 main_~ret5~0))) (and (not (= main_~ret~1 main_~ret2~0)) (exists ((v_sum_~ret~0_BEFORE_RETURN_136 Int) (v_prenex_1000 Int) (v_sum_~ret~0_BEFORE_RETURN_135 Int) (v_prenex_999 Int)) (or (and (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 76))) (= main_~ret5~0 (+ (mod v_prenex_1000 4294967296) (- 4294967296))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (not (<= (mod v_prenex_1000 4294967296) 2147483647)) (not (< main_~i~2 19))) (and (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 76))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (not (< main_~i~2 19)) (not (<= (mod v_sum_~ret~0_BEFORE_RETURN_135 4294967296) 2147483647)) (= main_~ret5~0 (+ (mod v_sum_~ret~0_BEFORE_RETURN_135 4294967296) (- 4294967296)))) (and (= main_~ret5~0 (mod v_sum_~ret~0_BEFORE_RETURN_136 4294967296)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 76))) (<= (mod v_sum_~ret~0_BEFORE_RETURN_136 4294967296) 2147483647) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (not (< main_~i~2 19))) (and (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 76))) (= (mod v_prenex_999 4294967296) main_~ret5~0) (<= (mod v_prenex_999 4294967296) 2147483647) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (not (< main_~i~2 19))))))) [2019-10-13 23:21:19,938 INFO L193 IcfgInterpreter]: Reachable states at location L-1 satisfy 23#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= 0 (select |#valid| 0)) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-13 23:21:19,938 INFO L193 IcfgInterpreter]: Reachable states at location mainENTRY satisfy 33#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= |#valid| |old(#valid)|) (<= 0 |#NULL.base|) (= |#memory_int| |old(#memory_int)|) (= |#NULL.offset| 0) (= |old(#length)| |#length|) (= 0 (select |old(#valid)| 0)) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-13 23:21:19,938 INFO L193 IcfgInterpreter]: Reachable states at location L27 satisfy 120#(or (exists ((v_prenex_971 Int) (v_sum_~ret~0_BEFORE_RETURN_131 Int)) (or (and (= |main_#t~ret4| (+ (mod v_prenex_971 4294967296) (- 4294967296))) (not (<= (mod v_prenex_971 4294967296) 2147483647)) (not (< main_~i~1 20))) (and (= |main_#t~ret4| (mod v_sum_~ret~0_BEFORE_RETURN_131 4294967296)) (not (< main_~i~1 20)) (<= (mod v_sum_~ret~0_BEFORE_RETURN_131 4294967296) 2147483647)))) (exists ((v_prenex_972 Int) (v_sum_~ret~0_BEFORE_RETURN_132 Int)) (or (and (= (mod v_sum_~ret~0_BEFORE_RETURN_132 4294967296) |main_#t~ret4|) (not (< main_~i~1 20)) (<= (mod v_sum_~ret~0_BEFORE_RETURN_132 4294967296) 2147483647)) (and (not (< main_~i~1 20)) (not (<= (mod v_prenex_972 4294967296) 2147483647)) (= (+ (mod v_prenex_972 4294967296) (- 4294967296)) |main_#t~ret4|))))) [2019-10-13 23:21:19,938 INFO L193 IcfgInterpreter]: Reachable states at location sumENTRY satisfy 601#true [2019-10-13 23:21:19,938 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initEXIT satisfy 653#(and (= |#valid| (store |old(#valid)| 0 0)) (= 0 |#NULL.base|) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-13 23:21:19,938 INFO L193 IcfgInterpreter]: Reachable states at location L38 satisfy 380#true [2019-10-13 23:21:19,939 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.startENTRY satisfy 6#true [2019-10-13 23:21:19,939 INFO L193 IcfgInterpreter]: Reachable states at location L39 satisfy 313#true [2019-10-13 23:21:19,939 INFO L193 IcfgInterpreter]: Reachable states at location L30-1 satisfy 587#true [2019-10-13 23:21:19,939 INFO L193 IcfgInterpreter]: Reachable states at location L32-3 satisfy 560#true [2019-10-13 23:21:19,939 INFO L193 IcfgInterpreter]: Reachable states at location L23-4 satisfy 73#(and (not (< main_~i~1 20)) (<= 20 main_~i~1)) [2019-10-13 23:21:19,939 INFO L193 IcfgInterpreter]: Reachable states at location L30 satisfy 592#(exists ((v_prenex_972 Int) (v_prenex_971 Int) (v_sum_~ret~0_BEFORE_RETURN_132 Int) (v_sum_~ret~0_BEFORE_RETURN_131 Int)) (or (and (not (< main_~i~1 20)) (<= main_~ret~1 2147483647) (<= (mod v_sum_~ret~0_BEFORE_RETURN_132 4294967296) 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (= main_~ret~1 (mod v_sum_~ret~0_BEFORE_RETURN_132 4294967296)) (<= 0 (+ main_~ret~1 2147483648))) (and (not (< main_~i~1 20)) (not (<= (mod v_prenex_972 4294967296) 2147483647)) (<= main_~ret~1 2147483647) (= main_~ret~1 (+ (mod v_prenex_972 4294967296) (- 4294967296))) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (<= 0 (+ main_~ret~1 2147483648))) (and (not (<= (mod v_prenex_971 4294967296) 2147483647)) (not (< main_~i~1 20)) (<= main_~ret~1 2147483647) (= main_~ret~1 (+ (mod v_prenex_971 4294967296) (- 4294967296))) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (<= 0 (+ main_~ret~1 2147483648))) (and (not (< main_~i~1 20)) (<= main_~ret~1 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (<= (mod v_sum_~ret~0_BEFORE_RETURN_131 4294967296) 2147483647) (= main_~ret~1 (mod v_sum_~ret~0_BEFORE_RETURN_131 4294967296)) (<= 0 (+ main_~ret~1 2147483648))))) [2019-10-13 23:21:19,940 INFO L193 IcfgInterpreter]: Reachable states at location L23-3 satisfy 68#true [2019-10-13 23:21:19,940 INFO L193 IcfgInterpreter]: Reachable states at location sumEXIT satisfy 644#(and (<= 0 sum_~i~0) (= |sum_#res| (ite (<= (mod sum_~ret~0 4294967296) 2147483647) (mod sum_~ret~0 4294967296) (+ (mod sum_~ret~0 4294967296) (- 4294967296)))) (not (< sum_~i~0 20)) (<= 20 sum_~i~0)) [2019-10-13 23:21:20,301 INFO L223 tionRefinementEngine]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2019-10-13 23:21:20,301 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13, 13, 11] total 33 [2019-10-13 23:21:20,302 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2108672491] [2019-10-13 23:21:20,303 INFO L442 AbstractCegarLoop]: Interpolant automaton has 34 states [2019-10-13 23:21:20,303 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-10-13 23:21:20,304 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 34 interpolants. [2019-10-13 23:21:20,304 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=283, Invalid=839, Unknown=0, NotChecked=0, Total=1122 [2019-10-13 23:21:20,304 INFO L87 Difference]: Start difference. First operand 51 states and 55 transitions. Second operand 34 states. [2019-10-13 23:21:21,761 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-13 23:21:21,761 INFO L93 Difference]: Finished difference Result 85 states and 104 transitions. [2019-10-13 23:21:21,762 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 33 states. [2019-10-13 23:21:21,762 INFO L78 Accepts]: Start accepts. Automaton has 34 states. Word has length 76 [2019-10-13 23:21:21,762 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-13 23:21:21,763 INFO L225 Difference]: With dead ends: 85 [2019-10-13 23:21:21,763 INFO L226 Difference]: Without dead ends: 61 [2019-10-13 23:21:21,765 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 270 GetRequests, 208 SyntacticMatches, 2 SemanticMatches, 60 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 924 ImplicationChecksByTransitivity, 1.7s TimeCoverageRelationStatistics Valid=918, Invalid=2864, Unknown=0, NotChecked=0, Total=3782 [2019-10-13 23:21:21,765 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 61 states. [2019-10-13 23:21:21,773 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 61 to 61. [2019-10-13 23:21:21,773 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 61 states. [2019-10-13 23:21:21,774 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 61 states to 61 states and 65 transitions. [2019-10-13 23:21:21,774 INFO L78 Accepts]: Start accepts. Automaton has 61 states and 65 transitions. Word has length 76 [2019-10-13 23:21:21,775 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-13 23:21:21,775 INFO L462 AbstractCegarLoop]: Abstraction has 61 states and 65 transitions. [2019-10-13 23:21:21,775 INFO L463 AbstractCegarLoop]: Interpolant automaton has 34 states. [2019-10-13 23:21:21,775 INFO L276 IsEmpty]: Start isEmpty. Operand 61 states and 65 transitions. [2019-10-13 23:21:21,777 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 107 [2019-10-13 23:21:21,777 INFO L372 BasicCegarLoop]: Found error trace [2019-10-13 23:21:21,777 INFO L380 BasicCegarLoop]: trace histogram [60, 20, 3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-13 23:21:21,977 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 8 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-13 23:21:21,978 INFO L410 AbstractCegarLoop]: === Iteration 10 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-13 23:21:21,978 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-13 23:21:21,978 INFO L82 PathProgramCache]: Analyzing trace with hash 1048054237, now seen corresponding path program 7 times [2019-10-13 23:21:21,978 INFO L157 tionRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-10-13 23:21:21,978 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [873635076] [2019-10-13 23:21:21,979 INFO L116 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-13 23:21:21,979 INFO L116 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-13 23:21:21,979 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-13 23:21:22,034 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-13 23:21:22,082 INFO L134 CoverageAnalysis]: Checked inductivity of 2172 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 2169 trivial. 0 not checked. [2019-10-13 23:21:22,082 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [873635076] [2019-10-13 23:21:22,082 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1694030307] [2019-10-13 23:21:22,082 INFO L92 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-13 23:21:22,369 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-13 23:21:22,372 INFO L256 TraceCheckSpWp]: Trace formula consists of 545 conjuncts, 4 conjunts are in the unsatisfiable core [2019-10-13 23:21:22,381 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2019-10-13 23:21:22,408 INFO L134 CoverageAnalysis]: Checked inductivity of 2172 backedges. 886 proven. 3 refuted. 0 times theorem prover too weak. 1283 trivial. 0 not checked. [2019-10-13 23:21:22,409 INFO L321 TraceCheckSpWp]: Computing backward predicates... [2019-10-13 23:21:22,447 INFO L134 CoverageAnalysis]: Checked inductivity of 2172 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 2169 trivial. 0 not checked. [2019-10-13 23:21:22,447 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSifa [1007674583] [2019-10-13 23:21:22,450 INFO L162 IcfgInterpreter]: Started Sifa with 19 locations of interest [2019-10-13 23:21:22,450 INFO L169 IcfgInterpreter]: Building call graph [2019-10-13 23:21:22,450 INFO L174 IcfgInterpreter]: Initial procedures are [ULTIMATE.start] [2019-10-13 23:21:22,451 INFO L179 IcfgInterpreter]: Starting interpretation [2019-10-13 23:21:22,451 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.start with input of size 1 for LOIs [2019-10-13 23:21:22,464 INFO L199 IcfgInterpreter]: Interpreting procedure main with input of size 21 for LOIs [2019-10-13 23:21:23,655 INFO L199 IcfgInterpreter]: Interpreting procedure sum with input of size 1 for LOIs [2019-10-13 23:21:23,677 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.init with input of size 10 for LOIs [2019-10-13 23:21:23,679 INFO L183 IcfgInterpreter]: Interpretation finished [2019-10-13 23:21:23,679 INFO L191 IcfgInterpreter]: Final predicates for locations of interest are: [2019-10-13 23:21:23,680 INFO L193 IcfgInterpreter]: Reachable states at location L9-3 satisfy 639#(<= 0 sum_~i~0) [2019-10-13 23:21:23,680 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initENTRY satisfy 648#(and (= |old(#NULL.base)| |#NULL.base|) (= |#valid| |old(#valid)|) (= |#NULL.offset| |old(#NULL.offset)|)) [2019-10-13 23:21:23,680 INFO L193 IcfgInterpreter]: Reachable states at location L36-1 satisfy 479#true [2019-10-13 23:21:23,680 INFO L193 IcfgInterpreter]: Reachable states at location L36 satisfy 522#(and (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 76))) (<= 19 main_~i~2) (not (< main_~i~2 19))) [2019-10-13 23:21:23,680 INFO L193 IcfgInterpreter]: Reachable states at location mainErr0ASSERT_VIOLATIONERROR_FUNCTION satisfy 234#(or (and (exists ((v_sum_~ret~0_BEFORE_RETURN_162 Int) (v_prenex_1194 Int) (v_sum_~ret~0_BEFORE_RETURN_161 Int) (v_prenex_1193 Int)) (or (and (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 76))) (<= main_~ret5~0 2147483647) (= (+ (mod v_sum_~ret~0_BEFORE_RETURN_161 4294967296) (- 4294967296)) main_~ret5~0) (not (<= (mod v_sum_~ret~0_BEFORE_RETURN_161 4294967296) 2147483647)) (<= 0 (+ main_~ret5~0 2147483648)) (not (< main_~i~2 19))) (and (= (+ (mod v_sum_~ret~0_BEFORE_RETURN_162 4294967296) (- 4294967296)) main_~ret5~0) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 76))) (<= main_~ret5~0 2147483647) (not (<= (mod v_sum_~ret~0_BEFORE_RETURN_162 4294967296) 2147483647)) (<= 0 (+ main_~ret5~0 2147483648)) (not (< main_~i~2 19))) (and (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 76))) (<= (mod v_prenex_1194 4294967296) 2147483647) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= main_~ret5~0 (mod v_prenex_1194 4294967296)) (not (< main_~i~2 19))) (and (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 76))) (<= (mod v_prenex_1193 4294967296) 2147483647) (= (mod v_prenex_1193 4294967296) main_~ret5~0) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (not (< main_~i~2 19))))) (not (= main_~ret~1 main_~ret5~0))) (and (not (= main_~ret~1 main_~ret2~0)) (exists ((v_sum_~ret~0_BEFORE_RETURN_162 Int) (v_prenex_1194 Int) (v_sum_~ret~0_BEFORE_RETURN_161 Int) (v_prenex_1193 Int)) (or (and (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 76))) (<= main_~ret5~0 2147483647) (= (+ (mod v_sum_~ret~0_BEFORE_RETURN_161 4294967296) (- 4294967296)) main_~ret5~0) (not (<= (mod v_sum_~ret~0_BEFORE_RETURN_161 4294967296) 2147483647)) (<= 0 (+ main_~ret5~0 2147483648)) (not (< main_~i~2 19))) (and (= (+ (mod v_sum_~ret~0_BEFORE_RETURN_162 4294967296) (- 4294967296)) main_~ret5~0) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 76))) (<= main_~ret5~0 2147483647) (not (<= (mod v_sum_~ret~0_BEFORE_RETURN_162 4294967296) 2147483647)) (<= 0 (+ main_~ret5~0 2147483648)) (not (< main_~i~2 19))) (and (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 76))) (<= (mod v_prenex_1194 4294967296) 2147483647) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= main_~ret5~0 (mod v_prenex_1194 4294967296)) (not (< main_~i~2 19))) (and (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 76))) (<= (mod v_prenex_1193 4294967296) 2147483647) (= (mod v_prenex_1193 4294967296) main_~ret5~0) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (not (< main_~i~2 19))))))) [2019-10-13 23:21:23,680 INFO L193 IcfgInterpreter]: Reachable states at location L-1 satisfy 23#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= 0 (select |#valid| 0)) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-13 23:21:23,680 INFO L193 IcfgInterpreter]: Reachable states at location mainENTRY satisfy 33#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= |#valid| |old(#valid)|) (<= 0 |#NULL.base|) (= |#memory_int| |old(#memory_int)|) (= |#NULL.offset| 0) (= |old(#length)| |#length|) (= 0 (select |old(#valid)| 0)) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-13 23:21:23,681 INFO L193 IcfgInterpreter]: Reachable states at location L27 satisfy 120#(or (exists ((v_sum_~ret~0_BEFORE_RETURN_158 Int) (v_prenex_1166 Int)) (or (and (not (<= (mod v_sum_~ret~0_BEFORE_RETURN_158 4294967296) 2147483647)) (not (< main_~i~1 20)) (= (+ (mod v_sum_~ret~0_BEFORE_RETURN_158 4294967296) (- 4294967296)) |main_#t~ret4|)) (and (not (< main_~i~1 20)) (<= (mod v_prenex_1166 4294967296) 2147483647) (= |main_#t~ret4| (mod v_prenex_1166 4294967296))))) (exists ((v_prenex_1165 Int) (v_sum_~ret~0_BEFORE_RETURN_157 Int)) (or (and (<= (mod v_prenex_1165 4294967296) 2147483647) (not (< main_~i~1 20)) (= (mod v_prenex_1165 4294967296) |main_#t~ret4|)) (and (not (< main_~i~1 20)) (not (<= (mod v_sum_~ret~0_BEFORE_RETURN_157 4294967296) 2147483647)) (= |main_#t~ret4| (+ (mod v_sum_~ret~0_BEFORE_RETURN_157 4294967296) (- 4294967296))))))) [2019-10-13 23:21:23,681 INFO L193 IcfgInterpreter]: Reachable states at location L38 satisfy 380#true [2019-10-13 23:21:23,681 INFO L193 IcfgInterpreter]: Reachable states at location sumENTRY satisfy 601#true [2019-10-13 23:21:23,681 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initEXIT satisfy 653#(and (= |#valid| (store |old(#valid)| 0 0)) (= 0 |#NULL.base|) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-13 23:21:23,681 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.startENTRY satisfy 6#true [2019-10-13 23:21:23,681 INFO L193 IcfgInterpreter]: Reachable states at location L39 satisfy 313#true [2019-10-13 23:21:23,681 INFO L193 IcfgInterpreter]: Reachable states at location L30-1 satisfy 587#true [2019-10-13 23:21:23,681 INFO L193 IcfgInterpreter]: Reachable states at location L32-3 satisfy 560#true [2019-10-13 23:21:23,681 INFO L193 IcfgInterpreter]: Reachable states at location L23-4 satisfy 73#(and (not (< main_~i~1 20)) (<= 20 main_~i~1)) [2019-10-13 23:21:23,682 INFO L193 IcfgInterpreter]: Reachable states at location L30 satisfy 592#(exists ((v_sum_~ret~0_BEFORE_RETURN_158 Int) (v_prenex_1166 Int) (v_prenex_1165 Int) (v_sum_~ret~0_BEFORE_RETURN_157 Int)) (or (and (<= (mod v_prenex_1165 4294967296) 2147483647) (= main_~ret~1 (mod v_prenex_1165 4294967296)) (not (< main_~i~1 20)) (<= main_~ret~1 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (<= 0 (+ main_~ret~1 2147483648))) (and (not (<= (mod v_sum_~ret~0_BEFORE_RETURN_158 4294967296) 2147483647)) (not (< main_~i~1 20)) (<= main_~ret~1 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (= (+ (mod v_sum_~ret~0_BEFORE_RETURN_158 4294967296) (- 4294967296)) main_~ret~1) (<= 0 (+ main_~ret~1 2147483648))) (and (not (< main_~i~1 20)) (<= main_~ret~1 2147483647) (not (<= (mod v_sum_~ret~0_BEFORE_RETURN_157 4294967296) 2147483647)) (= main_~ret~1 (+ (mod v_sum_~ret~0_BEFORE_RETURN_157 4294967296) (- 4294967296))) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (<= 0 (+ main_~ret~1 2147483648))) (and (= main_~ret~1 (mod v_prenex_1166 4294967296)) (not (< main_~i~1 20)) (<= (mod v_prenex_1166 4294967296) 2147483647) (<= main_~ret~1 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (<= 0 (+ main_~ret~1 2147483648))))) [2019-10-13 23:21:23,682 INFO L193 IcfgInterpreter]: Reachable states at location L23-3 satisfy 68#true [2019-10-13 23:21:23,682 INFO L193 IcfgInterpreter]: Reachable states at location sumEXIT satisfy 644#(and (<= 0 sum_~i~0) (= |sum_#res| (ite (<= (mod sum_~ret~0 4294967296) 2147483647) (mod sum_~ret~0 4294967296) (+ (mod sum_~ret~0 4294967296) (- 4294967296)))) (not (< sum_~i~0 20)) (<= 20 sum_~i~0)) [2019-10-13 23:21:23,955 INFO L223 tionRefinementEngine]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2019-10-13 23:21:23,955 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5, 5, 11] total 19 [2019-10-13 23:21:23,955 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [641271390] [2019-10-13 23:21:23,957 INFO L442 AbstractCegarLoop]: Interpolant automaton has 20 states [2019-10-13 23:21:23,957 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-10-13 23:21:23,957 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2019-10-13 23:21:23,957 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=65, Invalid=315, Unknown=0, NotChecked=0, Total=380 [2019-10-13 23:21:23,958 INFO L87 Difference]: Start difference. First operand 61 states and 65 transitions. Second operand 20 states. [2019-10-13 23:21:24,593 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-13 23:21:24,593 INFO L93 Difference]: Finished difference Result 93 states and 101 transitions. [2019-10-13 23:21:24,593 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2019-10-13 23:21:24,593 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 106 [2019-10-13 23:21:24,594 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-13 23:21:24,595 INFO L225 Difference]: With dead ends: 93 [2019-10-13 23:21:24,595 INFO L226 Difference]: Without dead ends: 65 [2019-10-13 23:21:24,596 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 337 GetRequests, 305 SyntacticMatches, 0 SemanticMatches, 32 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 261 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=186, Invalid=936, Unknown=0, NotChecked=0, Total=1122 [2019-10-13 23:21:24,596 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 65 states. [2019-10-13 23:21:24,604 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 65 to 65. [2019-10-13 23:21:24,604 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 65 states. [2019-10-13 23:21:24,605 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 65 states to 65 states and 69 transitions. [2019-10-13 23:21:24,605 INFO L78 Accepts]: Start accepts. Automaton has 65 states and 69 transitions. Word has length 106 [2019-10-13 23:21:24,605 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-13 23:21:24,606 INFO L462 AbstractCegarLoop]: Abstraction has 65 states and 69 transitions. [2019-10-13 23:21:24,606 INFO L463 AbstractCegarLoop]: Interpolant automaton has 20 states. [2019-10-13 23:21:24,606 INFO L276 IsEmpty]: Start isEmpty. Operand 65 states and 69 transitions. [2019-10-13 23:21:24,609 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 111 [2019-10-13 23:21:24,609 INFO L372 BasicCegarLoop]: Found error trace [2019-10-13 23:21:24,609 INFO L380 BasicCegarLoop]: trace histogram [60, 20, 6, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-13 23:21:24,813 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 9 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-13 23:21:24,814 INFO L410 AbstractCegarLoop]: === Iteration 11 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-13 23:21:24,814 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-13 23:21:24,815 INFO L82 PathProgramCache]: Analyzing trace with hash -1255666147, now seen corresponding path program 8 times [2019-10-13 23:21:24,815 INFO L157 tionRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-10-13 23:21:24,815 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [355789476] [2019-10-13 23:21:24,816 INFO L116 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-13 23:21:24,816 INFO L116 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-13 23:21:24,816 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-13 23:21:24,868 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-13 23:21:24,931 INFO L134 CoverageAnalysis]: Checked inductivity of 2190 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 2169 trivial. 0 not checked. [2019-10-13 23:21:24,931 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [355789476] [2019-10-13 23:21:24,932 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1402015960] [2019-10-13 23:21:24,932 INFO L92 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-13 23:21:25,199 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 5 check-sat command(s) [2019-10-13 23:21:25,199 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-10-13 23:21:25,200 INFO L256 TraceCheckSpWp]: Trace formula consists of 233 conjuncts, 8 conjunts are in the unsatisfiable core [2019-10-13 23:21:25,202 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2019-10-13 23:21:25,215 INFO L134 CoverageAnalysis]: Checked inductivity of 2190 backedges. 886 proven. 21 refuted. 0 times theorem prover too weak. 1283 trivial. 0 not checked. [2019-10-13 23:21:25,215 INFO L321 TraceCheckSpWp]: Computing backward predicates... [2019-10-13 23:21:25,310 INFO L134 CoverageAnalysis]: Checked inductivity of 2190 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 2169 trivial. 0 not checked. [2019-10-13 23:21:25,310 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSifa [1503700115] [2019-10-13 23:21:25,311 INFO L162 IcfgInterpreter]: Started Sifa with 19 locations of interest [2019-10-13 23:21:25,311 INFO L169 IcfgInterpreter]: Building call graph [2019-10-13 23:21:25,312 INFO L174 IcfgInterpreter]: Initial procedures are [ULTIMATE.start] [2019-10-13 23:21:25,312 INFO L179 IcfgInterpreter]: Starting interpretation [2019-10-13 23:21:25,312 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.start with input of size 1 for LOIs [2019-10-13 23:21:25,357 INFO L199 IcfgInterpreter]: Interpreting procedure main with input of size 21 for LOIs [2019-10-13 23:21:26,434 INFO L199 IcfgInterpreter]: Interpreting procedure sum with input of size 1 for LOIs [2019-10-13 23:21:26,463 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.init with input of size 10 for LOIs [2019-10-13 23:21:26,466 INFO L183 IcfgInterpreter]: Interpretation finished [2019-10-13 23:21:26,466 INFO L191 IcfgInterpreter]: Final predicates for locations of interest are: [2019-10-13 23:21:26,466 INFO L193 IcfgInterpreter]: Reachable states at location L9-3 satisfy 639#(<= 0 sum_~i~0) [2019-10-13 23:21:26,466 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initENTRY satisfy 648#(and (= |old(#NULL.base)| |#NULL.base|) (= |#valid| |old(#valid)|) (= |#NULL.offset| |old(#NULL.offset)|)) [2019-10-13 23:21:26,466 INFO L193 IcfgInterpreter]: Reachable states at location L36-1 satisfy 479#true [2019-10-13 23:21:26,467 INFO L193 IcfgInterpreter]: Reachable states at location L36 satisfy 522#(and (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 76))) (<= 19 main_~i~2) (not (< main_~i~2 19))) [2019-10-13 23:21:26,467 INFO L193 IcfgInterpreter]: Reachable states at location mainErr0ASSERT_VIOLATIONERROR_FUNCTION satisfy 234#(or (and (not (= main_~ret~1 main_~ret2~0)) (exists ((v_prenex_1388 Int) (v_prenex_1387 Int) (v_sum_~ret~0_BEFORE_RETURN_188 Int) (v_sum_~ret~0_BEFORE_RETURN_187 Int)) (or (and (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 76))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (not (<= (mod v_prenex_1388 4294967296) 2147483647)) (not (< main_~i~2 19)) (= main_~ret5~0 (+ (mod v_prenex_1388 4294967296) (- 4294967296)))) (and (= (mod v_prenex_1387 4294967296) main_~ret5~0) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 76))) (<= main_~ret5~0 2147483647) (<= (mod v_prenex_1387 4294967296) 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (not (< main_~i~2 19))) (and (= main_~ret5~0 (+ (mod v_sum_~ret~0_BEFORE_RETURN_187 4294967296) (- 4294967296))) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 76))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (not (< main_~i~2 19)) (not (<= (mod v_sum_~ret~0_BEFORE_RETURN_187 4294967296) 2147483647))) (and (= (mod v_sum_~ret~0_BEFORE_RETURN_188 4294967296) main_~ret5~0) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 76))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (<= (mod v_sum_~ret~0_BEFORE_RETURN_188 4294967296) 2147483647) (not (< main_~i~2 19)))))) (and (exists ((v_prenex_1388 Int) (v_prenex_1387 Int) (v_sum_~ret~0_BEFORE_RETURN_188 Int) (v_sum_~ret~0_BEFORE_RETURN_187 Int)) (or (and (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 76))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (not (<= (mod v_prenex_1388 4294967296) 2147483647)) (not (< main_~i~2 19)) (= main_~ret5~0 (+ (mod v_prenex_1388 4294967296) (- 4294967296)))) (and (= (mod v_prenex_1387 4294967296) main_~ret5~0) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 76))) (<= main_~ret5~0 2147483647) (<= (mod v_prenex_1387 4294967296) 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (not (< main_~i~2 19))) (and (= main_~ret5~0 (+ (mod v_sum_~ret~0_BEFORE_RETURN_187 4294967296) (- 4294967296))) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 76))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (not (< main_~i~2 19)) (not (<= (mod v_sum_~ret~0_BEFORE_RETURN_187 4294967296) 2147483647))) (and (= (mod v_sum_~ret~0_BEFORE_RETURN_188 4294967296) main_~ret5~0) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 76))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (<= (mod v_sum_~ret~0_BEFORE_RETURN_188 4294967296) 2147483647) (not (< main_~i~2 19))))) (not (= main_~ret~1 main_~ret5~0)))) [2019-10-13 23:21:26,467 INFO L193 IcfgInterpreter]: Reachable states at location L-1 satisfy 23#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= 0 (select |#valid| 0)) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-13 23:21:26,468 INFO L193 IcfgInterpreter]: Reachable states at location mainENTRY satisfy 33#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= |#valid| |old(#valid)|) (<= 0 |#NULL.base|) (= |#memory_int| |old(#memory_int)|) (= |#NULL.offset| 0) (= |old(#length)| |#length|) (= 0 (select |old(#valid)| 0)) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-13 23:21:26,468 INFO L193 IcfgInterpreter]: Reachable states at location L27 satisfy 120#(or (exists ((v_prenex_1359 Int) (v_sum_~ret~0_BEFORE_RETURN_183 Int)) (or (and (= |main_#t~ret4| (+ (mod v_sum_~ret~0_BEFORE_RETURN_183 4294967296) (- 4294967296))) (not (< main_~i~1 20)) (not (<= (mod v_sum_~ret~0_BEFORE_RETURN_183 4294967296) 2147483647))) (and (not (< main_~i~1 20)) (= (mod v_prenex_1359 4294967296) |main_#t~ret4|) (<= (mod v_prenex_1359 4294967296) 2147483647)))) (exists ((v_prenex_1360 Int) (v_sum_~ret~0_BEFORE_RETURN_184 Int)) (or (and (not (< main_~i~1 20)) (= (+ (mod v_prenex_1360 4294967296) (- 4294967296)) |main_#t~ret4|) (not (<= (mod v_prenex_1360 4294967296) 2147483647))) (and (not (< main_~i~1 20)) (= (mod v_sum_~ret~0_BEFORE_RETURN_184 4294967296) |main_#t~ret4|) (<= (mod v_sum_~ret~0_BEFORE_RETURN_184 4294967296) 2147483647))))) [2019-10-13 23:21:26,468 INFO L193 IcfgInterpreter]: Reachable states at location L38 satisfy 380#true [2019-10-13 23:21:26,468 INFO L193 IcfgInterpreter]: Reachable states at location sumENTRY satisfy 601#true [2019-10-13 23:21:26,468 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initEXIT satisfy 653#(and (= |#valid| (store |old(#valid)| 0 0)) (= 0 |#NULL.base|) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-13 23:21:26,469 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.startENTRY satisfy 6#true [2019-10-13 23:21:26,469 INFO L193 IcfgInterpreter]: Reachable states at location L39 satisfy 313#true [2019-10-13 23:21:26,469 INFO L193 IcfgInterpreter]: Reachable states at location L30-1 satisfy 587#true [2019-10-13 23:21:26,469 INFO L193 IcfgInterpreter]: Reachable states at location L32-3 satisfy 560#true [2019-10-13 23:21:26,469 INFO L193 IcfgInterpreter]: Reachable states at location L23-4 satisfy 73#(and (not (< main_~i~1 20)) (<= 20 main_~i~1)) [2019-10-13 23:21:26,469 INFO L193 IcfgInterpreter]: Reachable states at location L30 satisfy 592#(exists ((v_prenex_1359 Int) (v_prenex_1360 Int) (v_sum_~ret~0_BEFORE_RETURN_184 Int) (v_sum_~ret~0_BEFORE_RETURN_183 Int)) (or (and (not (< main_~i~1 20)) (<= main_~ret~1 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (= (mod v_sum_~ret~0_BEFORE_RETURN_184 4294967296) main_~ret~1) (<= (mod v_sum_~ret~0_BEFORE_RETURN_184 4294967296) 2147483647) (<= 0 (+ main_~ret~1 2147483648))) (and (= main_~ret~1 (mod v_prenex_1359 4294967296)) (not (< main_~i~1 20)) (<= main_~ret~1 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (<= (mod v_prenex_1359 4294967296) 2147483647) (<= 0 (+ main_~ret~1 2147483648))) (and (not (< main_~i~1 20)) (<= main_~ret~1 2147483647) (not (<= (mod v_sum_~ret~0_BEFORE_RETURN_183 4294967296) 2147483647)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (= main_~ret~1 (+ (mod v_sum_~ret~0_BEFORE_RETURN_183 4294967296) (- 4294967296))) (<= 0 (+ main_~ret~1 2147483648))) (and (not (< main_~i~1 20)) (<= main_~ret~1 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (= (+ (mod v_prenex_1360 4294967296) (- 4294967296)) main_~ret~1) (not (<= (mod v_prenex_1360 4294967296) 2147483647)) (<= 0 (+ main_~ret~1 2147483648))))) [2019-10-13 23:21:26,470 INFO L193 IcfgInterpreter]: Reachable states at location L23-3 satisfy 68#true [2019-10-13 23:21:26,470 INFO L193 IcfgInterpreter]: Reachable states at location sumEXIT satisfy 644#(and (<= 0 sum_~i~0) (= |sum_#res| (ite (<= (mod sum_~ret~0 4294967296) 2147483647) (mod sum_~ret~0 4294967296) (+ (mod sum_~ret~0 4294967296) (- 4294967296)))) (not (< sum_~i~0 20)) (<= 20 sum_~i~0)) [2019-10-13 23:21:26,823 INFO L223 tionRefinementEngine]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2019-10-13 23:21:26,823 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9, 9, 11] total 27 [2019-10-13 23:21:26,823 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [979768800] [2019-10-13 23:21:26,824 INFO L442 AbstractCegarLoop]: Interpolant automaton has 28 states [2019-10-13 23:21:26,824 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-10-13 23:21:26,825 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 28 interpolants. [2019-10-13 23:21:26,825 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=165, Invalid=591, Unknown=0, NotChecked=0, Total=756 [2019-10-13 23:21:26,826 INFO L87 Difference]: Start difference. First operand 65 states and 69 transitions. Second operand 28 states. [2019-10-13 23:21:28,337 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-13 23:21:28,338 INFO L93 Difference]: Finished difference Result 101 states and 113 transitions. [2019-10-13 23:21:28,338 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2019-10-13 23:21:28,338 INFO L78 Accepts]: Start accepts. Automaton has 28 states. Word has length 110 [2019-10-13 23:21:28,339 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-13 23:21:28,340 INFO L225 Difference]: With dead ends: 101 [2019-10-13 23:21:28,340 INFO L226 Difference]: Without dead ends: 73 [2019-10-13 23:21:28,342 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 361 GetRequests, 313 SyntacticMatches, 0 SemanticMatches, 48 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 611 ImplicationChecksByTransitivity, 1.7s TimeCoverageRelationStatistics Valid=486, Invalid=1964, Unknown=0, NotChecked=0, Total=2450 [2019-10-13 23:21:28,342 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 73 states. [2019-10-13 23:21:28,350 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 73 to 73. [2019-10-13 23:21:28,351 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 73 states. [2019-10-13 23:21:28,351 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 73 states to 73 states and 77 transitions. [2019-10-13 23:21:28,352 INFO L78 Accepts]: Start accepts. Automaton has 73 states and 77 transitions. Word has length 110 [2019-10-13 23:21:28,352 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-13 23:21:28,352 INFO L462 AbstractCegarLoop]: Abstraction has 73 states and 77 transitions. [2019-10-13 23:21:28,352 INFO L463 AbstractCegarLoop]: Interpolant automaton has 28 states. [2019-10-13 23:21:28,352 INFO L276 IsEmpty]: Start isEmpty. Operand 73 states and 77 transitions. [2019-10-13 23:21:28,354 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 119 [2019-10-13 23:21:28,354 INFO L372 BasicCegarLoop]: Found error trace [2019-10-13 23:21:28,354 INFO L380 BasicCegarLoop]: trace histogram [60, 20, 14, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-13 23:21:28,558 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 10 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-13 23:21:28,559 INFO L410 AbstractCegarLoop]: === Iteration 12 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-13 23:21:28,559 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-13 23:21:28,559 INFO L82 PathProgramCache]: Analyzing trace with hash 2034480797, now seen corresponding path program 9 times [2019-10-13 23:21:28,560 INFO L157 tionRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-10-13 23:21:28,560 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1792556022] [2019-10-13 23:21:28,561 INFO L116 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-13 23:21:28,561 INFO L116 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-13 23:21:28,561 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-13 23:21:28,630 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-13 23:21:28,804 INFO L134 CoverageAnalysis]: Checked inductivity of 2274 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 2169 trivial. 0 not checked. [2019-10-13 23:21:28,805 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1792556022] [2019-10-13 23:21:28,805 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [309561352] [2019-10-13 23:21:28,805 INFO L92 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-13 23:21:29,089 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2019-10-13 23:21:29,089 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-10-13 23:21:29,091 INFO L256 TraceCheckSpWp]: Trace formula consists of 593 conjuncts, 16 conjunts are in the unsatisfiable core [2019-10-13 23:21:29,094 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2019-10-13 23:21:29,109 INFO L134 CoverageAnalysis]: Checked inductivity of 2274 backedges. 886 proven. 105 refuted. 0 times theorem prover too weak. 1283 trivial. 0 not checked. [2019-10-13 23:21:29,109 INFO L321 TraceCheckSpWp]: Computing backward predicates... [2019-10-13 23:21:29,269 INFO L134 CoverageAnalysis]: Checked inductivity of 2274 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 2169 trivial. 0 not checked. [2019-10-13 23:21:29,270 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSifa [702067922] [2019-10-13 23:21:29,274 INFO L162 IcfgInterpreter]: Started Sifa with 19 locations of interest [2019-10-13 23:21:29,274 INFO L169 IcfgInterpreter]: Building call graph [2019-10-13 23:21:29,275 INFO L174 IcfgInterpreter]: Initial procedures are [ULTIMATE.start] [2019-10-13 23:21:29,275 INFO L179 IcfgInterpreter]: Starting interpretation [2019-10-13 23:21:29,276 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.start with input of size 1 for LOIs [2019-10-13 23:21:29,287 INFO L199 IcfgInterpreter]: Interpreting procedure main with input of size 21 for LOIs [2019-10-13 23:21:30,402 INFO L199 IcfgInterpreter]: Interpreting procedure sum with input of size 1 for LOIs [2019-10-13 23:21:30,420 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.init with input of size 10 for LOIs [2019-10-13 23:21:30,423 INFO L183 IcfgInterpreter]: Interpretation finished [2019-10-13 23:21:30,423 INFO L191 IcfgInterpreter]: Final predicates for locations of interest are: [2019-10-13 23:21:30,423 INFO L193 IcfgInterpreter]: Reachable states at location L9-3 satisfy 639#(<= 0 sum_~i~0) [2019-10-13 23:21:30,423 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initENTRY satisfy 648#(and (= |old(#NULL.base)| |#NULL.base|) (= |#valid| |old(#valid)|) (= |#NULL.offset| |old(#NULL.offset)|)) [2019-10-13 23:21:30,423 INFO L193 IcfgInterpreter]: Reachable states at location L36-1 satisfy 479#true [2019-10-13 23:21:30,423 INFO L193 IcfgInterpreter]: Reachable states at location L36 satisfy 522#(and (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 76))) (<= 19 main_~i~2) (not (< main_~i~2 19))) [2019-10-13 23:21:30,424 INFO L193 IcfgInterpreter]: Reachable states at location mainErr0ASSERT_VIOLATIONERROR_FUNCTION satisfy 234#(or (and (not (= main_~ret~1 main_~ret2~0)) (exists ((v_sum_~ret~0_BEFORE_RETURN_214 Int) (v_sum_~ret~0_BEFORE_RETURN_213 Int) (v_prenex_1582 Int) (v_prenex_1581 Int)) (or (and (= (+ (mod v_sum_~ret~0_BEFORE_RETURN_214 4294967296) (- 4294967296)) main_~ret5~0) (not (<= (mod v_sum_~ret~0_BEFORE_RETURN_214 4294967296) 2147483647)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 76))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (not (< main_~i~2 19))) (and (<= (mod v_prenex_1582 4294967296) 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 76))) (<= main_~ret5~0 2147483647) (= main_~ret5~0 (mod v_prenex_1582 4294967296)) (<= 0 (+ main_~ret5~0 2147483648)) (not (< main_~i~2 19))) (and (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 76))) (= main_~ret5~0 (mod v_sum_~ret~0_BEFORE_RETURN_213 4294967296)) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (<= (mod v_sum_~ret~0_BEFORE_RETURN_213 4294967296) 2147483647) (not (< main_~i~2 19))) (and (= (+ (mod v_prenex_1581 4294967296) (- 4294967296)) main_~ret5~0) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 76))) (not (<= (mod v_prenex_1581 4294967296) 2147483647)) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (not (< main_~i~2 19)))))) (and (exists ((v_sum_~ret~0_BEFORE_RETURN_214 Int) (v_sum_~ret~0_BEFORE_RETURN_213 Int) (v_prenex_1582 Int) (v_prenex_1581 Int)) (or (and (= (+ (mod v_sum_~ret~0_BEFORE_RETURN_214 4294967296) (- 4294967296)) main_~ret5~0) (not (<= (mod v_sum_~ret~0_BEFORE_RETURN_214 4294967296) 2147483647)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 76))) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (not (< main_~i~2 19))) (and (<= (mod v_prenex_1582 4294967296) 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 76))) (<= main_~ret5~0 2147483647) (= main_~ret5~0 (mod v_prenex_1582 4294967296)) (<= 0 (+ main_~ret5~0 2147483648)) (not (< main_~i~2 19))) (and (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 76))) (= main_~ret5~0 (mod v_sum_~ret~0_BEFORE_RETURN_213 4294967296)) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (<= (mod v_sum_~ret~0_BEFORE_RETURN_213 4294967296) 2147483647) (not (< main_~i~2 19))) (and (= (+ (mod v_prenex_1581 4294967296) (- 4294967296)) main_~ret5~0) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 76))) (not (<= (mod v_prenex_1581 4294967296) 2147483647)) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (not (< main_~i~2 19))))) (not (= main_~ret~1 main_~ret5~0)))) [2019-10-13 23:21:30,424 INFO L193 IcfgInterpreter]: Reachable states at location L-1 satisfy 23#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= 0 (select |#valid| 0)) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-13 23:21:30,424 INFO L193 IcfgInterpreter]: Reachable states at location mainENTRY satisfy 33#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= |#valid| |old(#valid)|) (<= 0 |#NULL.base|) (= |#memory_int| |old(#memory_int)|) (= |#NULL.offset| 0) (= |old(#length)| |#length|) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (= 0 (select |old(#valid)| 0))) [2019-10-13 23:21:30,424 INFO L193 IcfgInterpreter]: Reachable states at location L27 satisfy 120#(or (exists ((v_sum_~ret~0_BEFORE_RETURN_209 Int) (v_prenex_1553 Int)) (or (and (not (< main_~i~1 20)) (not (<= (mod v_sum_~ret~0_BEFORE_RETURN_209 4294967296) 2147483647)) (= (+ (mod v_sum_~ret~0_BEFORE_RETURN_209 4294967296) (- 4294967296)) |main_#t~ret4|)) (and (not (< main_~i~1 20)) (= (mod v_prenex_1553 4294967296) |main_#t~ret4|) (<= (mod v_prenex_1553 4294967296) 2147483647)))) (exists ((v_prenex_1554 Int) (v_sum_~ret~0_BEFORE_RETURN_210 Int)) (or (and (not (<= (mod v_sum_~ret~0_BEFORE_RETURN_210 4294967296) 2147483647)) (not (< main_~i~1 20)) (= |main_#t~ret4| (+ (mod v_sum_~ret~0_BEFORE_RETURN_210 4294967296) (- 4294967296)))) (and (not (< main_~i~1 20)) (= (mod v_prenex_1554 4294967296) |main_#t~ret4|) (<= (mod v_prenex_1554 4294967296) 2147483647))))) [2019-10-13 23:21:30,424 INFO L193 IcfgInterpreter]: Reachable states at location L38 satisfy 380#true [2019-10-13 23:21:30,424 INFO L193 IcfgInterpreter]: Reachable states at location sumENTRY satisfy 601#true [2019-10-13 23:21:30,425 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initEXIT satisfy 653#(and (= |#valid| (store |old(#valid)| 0 0)) (= 0 |#NULL.base|) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-13 23:21:30,425 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.startENTRY satisfy 6#true [2019-10-13 23:21:30,425 INFO L193 IcfgInterpreter]: Reachable states at location L39 satisfy 313#true [2019-10-13 23:21:30,425 INFO L193 IcfgInterpreter]: Reachable states at location L30-1 satisfy 587#true [2019-10-13 23:21:30,425 INFO L193 IcfgInterpreter]: Reachable states at location L32-3 satisfy 560#true [2019-10-13 23:21:30,425 INFO L193 IcfgInterpreter]: Reachable states at location L23-4 satisfy 73#(and (not (< main_~i~1 20)) (<= 20 main_~i~1)) [2019-10-13 23:21:30,426 INFO L193 IcfgInterpreter]: Reachable states at location L30 satisfy 592#(or (exists ((v_sum_~ret~0_BEFORE_RETURN_209 Int) (v_prenex_1554 Int) (v_prenex_1553 Int) (v_sum_~ret~0_BEFORE_RETURN_210 Int)) (or (and (not (<= (mod v_sum_~ret~0_BEFORE_RETURN_210 4294967296) 2147483647)) (not (< main_~i~1 20)) (<= main_~ret~1 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (= main_~ret~1 (+ (mod v_sum_~ret~0_BEFORE_RETURN_210 4294967296) (- 4294967296))) (<= 0 (+ main_~ret~1 2147483648))) (and (not (< main_~i~1 20)) (<= main_~ret~1 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (not (<= (mod v_sum_~ret~0_BEFORE_RETURN_209 4294967296) 2147483647)) (= (+ (mod v_sum_~ret~0_BEFORE_RETURN_209 4294967296) (- 4294967296)) main_~ret~1) (<= 0 (+ main_~ret~1 2147483648))) (and (= main_~ret~1 (mod v_prenex_1554 4294967296)) (not (< main_~i~1 20)) (<= main_~ret~1 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (<= (mod v_prenex_1554 4294967296) 2147483647) (<= 0 (+ main_~ret~1 2147483648))) (and (not (< main_~i~1 20)) (<= main_~ret~1 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (<= (mod v_prenex_1553 4294967296) 2147483647) (= main_~ret~1 (mod v_prenex_1553 4294967296)) (<= 0 (+ main_~ret~1 2147483648))))) (exists ((v_sum_~ret~0_BEFORE_RETURN_209 Int) (v_prenex_1554 Int) (v_prenex_1553 Int) (v_sum_~ret~0_BEFORE_RETURN_210 Int)) (or (and (not (<= (mod v_sum_~ret~0_BEFORE_RETURN_210 4294967296) 2147483647)) (not (< main_~i~1 20)) (<= main_~ret~1 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (= main_~ret~1 (+ (mod v_sum_~ret~0_BEFORE_RETURN_210 4294967296) (- 4294967296))) (<= 0 (+ main_~ret~1 2147483648))) (and (not (< main_~i~1 20)) (<= main_~ret~1 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (not (<= (mod v_sum_~ret~0_BEFORE_RETURN_209 4294967296) 2147483647)) (= (+ (mod v_sum_~ret~0_BEFORE_RETURN_209 4294967296) (- 4294967296)) main_~ret~1) (<= 0 (+ main_~ret~1 2147483648))) (and (= main_~ret~1 (mod v_prenex_1554 4294967296)) (not (< main_~i~1 20)) (<= main_~ret~1 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (<= (mod v_prenex_1554 4294967296) 2147483647) (<= 0 (+ main_~ret~1 2147483648))) (and (not (< main_~i~1 20)) (<= main_~ret~1 2147483647) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (= main_~ret~1 (mod v_prenex_1553 4294967296)) (<= (mod v_prenex_1553 4294967296) 2147483647) (<= 0 (+ main_~ret~1 2147483648)))))) [2019-10-13 23:21:30,426 INFO L193 IcfgInterpreter]: Reachable states at location L23-3 satisfy 68#true [2019-10-13 23:21:30,426 INFO L193 IcfgInterpreter]: Reachable states at location sumEXIT satisfy 644#(and (<= 0 sum_~i~0) (= |sum_#res| (ite (<= (mod sum_~ret~0 4294967296) 2147483647) (mod sum_~ret~0 4294967296) (+ (mod sum_~ret~0 4294967296) (- 4294967296)))) (not (< sum_~i~0 20)) (<= 20 sum_~i~0)) [2019-10-13 23:21:30,780 INFO L223 tionRefinementEngine]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2019-10-13 23:21:30,780 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 17, 17, 11] total 32 [2019-10-13 23:21:30,780 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1720157280] [2019-10-13 23:21:30,782 INFO L442 AbstractCegarLoop]: Interpolant automaton has 33 states [2019-10-13 23:21:30,782 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-10-13 23:21:30,782 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 33 interpolants. [2019-10-13 23:21:30,783 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=260, Invalid=796, Unknown=0, NotChecked=0, Total=1056 [2019-10-13 23:21:30,783 INFO L87 Difference]: Start difference. First operand 73 states and 77 transitions. Second operand 33 states. [2019-10-13 23:21:32,091 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-13 23:21:32,091 INFO L93 Difference]: Finished difference Result 106 states and 115 transitions. [2019-10-13 23:21:32,091 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 32 states. [2019-10-13 23:21:32,092 INFO L78 Accepts]: Start accepts. Automaton has 33 states. Word has length 118 [2019-10-13 23:21:32,092 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-13 23:21:32,093 INFO L225 Difference]: With dead ends: 106 [2019-10-13 23:21:32,093 INFO L226 Difference]: Without dead ends: 78 [2019-10-13 23:21:32,095 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 398 GetRequests, 329 SyntacticMatches, 11 SemanticMatches, 58 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 858 ImplicationChecksByTransitivity, 1.6s TimeCoverageRelationStatistics Valid=771, Invalid=2769, Unknown=0, NotChecked=0, Total=3540 [2019-10-13 23:21:32,096 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 78 states. [2019-10-13 23:21:32,104 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 78 to 78. [2019-10-13 23:21:32,104 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 78 states. [2019-10-13 23:21:32,105 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 78 states to 78 states and 82 transitions. [2019-10-13 23:21:32,105 INFO L78 Accepts]: Start accepts. Automaton has 78 states and 82 transitions. Word has length 118 [2019-10-13 23:21:32,106 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-13 23:21:32,106 INFO L462 AbstractCegarLoop]: Abstraction has 78 states and 82 transitions. [2019-10-13 23:21:32,106 INFO L463 AbstractCegarLoop]: Interpolant automaton has 33 states. [2019-10-13 23:21:32,106 INFO L276 IsEmpty]: Start isEmpty. Operand 78 states and 82 transitions. [2019-10-13 23:21:32,108 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 124 [2019-10-13 23:21:32,108 INFO L372 BasicCegarLoop]: Found error trace [2019-10-13 23:21:32,108 INFO L380 BasicCegarLoop]: trace histogram [60, 20, 19, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-13 23:21:32,312 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 11 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-13 23:21:32,312 INFO L410 AbstractCegarLoop]: === Iteration 13 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-13 23:21:32,313 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-13 23:21:32,313 INFO L82 PathProgramCache]: Analyzing trace with hash 1761197326, now seen corresponding path program 10 times [2019-10-13 23:21:32,313 INFO L157 tionRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-10-13 23:21:32,313 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1443003202] [2019-10-13 23:21:32,313 INFO L116 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-13 23:21:32,313 INFO L116 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-13 23:21:32,314 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY