java -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata ./data -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/default/automizer/svcomp-Reach-32bit-Automizer_Default.epf --traceabstraction.trace.refinement.strategy SIFA_TAIPAN --sifa.abstract.domain CompoundDomain --rcfgbuilder.size.of.a.code.block LoopFreeBlock --sifa.call.summarizer TopInputCallSummarizer --sifa.fluid SizeLimitFluid --sifa.simplification.technique SIMPLIFY_QUICK -i ../../../trunk/examples/svcomp/systemc/transmitter.02.cil.c -------------------------------------------------------------------------------- This is Ultimate 0.1.24-f4eb214f-m [2019-10-13 23:27:14,564 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-10-13 23:27:14,568 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-10-13 23:27:14,586 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-10-13 23:27:14,586 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-10-13 23:27:14,589 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-10-13 23:27:14,591 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-10-13 23:27:14,600 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-10-13 23:27:14,606 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-10-13 23:27:14,609 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-10-13 23:27:14,611 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-10-13 23:27:14,612 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-10-13 23:27:14,612 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-10-13 23:27:14,614 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-10-13 23:27:14,617 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-10-13 23:27:14,618 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-10-13 23:27:14,620 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-10-13 23:27:14,622 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-10-13 23:27:14,623 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-10-13 23:27:14,628 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-10-13 23:27:14,633 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-10-13 23:27:14,635 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-10-13 23:27:14,638 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-10-13 23:27:14,639 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-10-13 23:27:14,640 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-10-13 23:27:14,641 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-10-13 23:27:14,641 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-10-13 23:27:14,642 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-10-13 23:27:14,642 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-10-13 23:27:14,643 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-10-13 23:27:14,643 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-10-13 23:27:14,644 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-10-13 23:27:14,645 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-10-13 23:27:14,645 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-10-13 23:27:14,646 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-10-13 23:27:14,646 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-10-13 23:27:14,647 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-10-13 23:27:14,647 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-10-13 23:27:14,648 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-10-13 23:27:14,648 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-10-13 23:27:14,649 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-10-13 23:27:14,650 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/default/automizer/svcomp-Reach-32bit-Automizer_Default.epf [2019-10-13 23:27:14,665 INFO L113 SettingsManager]: Loading preferences was successful [2019-10-13 23:27:14,665 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-10-13 23:27:14,666 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-10-13 23:27:14,667 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-10-13 23:27:14,667 INFO L138 SettingsManager]: * Use SBE=true [2019-10-13 23:27:14,667 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-10-13 23:27:14,667 INFO L138 SettingsManager]: * sizeof long=4 [2019-10-13 23:27:14,667 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-10-13 23:27:14,668 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-10-13 23:27:14,668 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-10-13 23:27:14,668 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-10-13 23:27:14,668 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-10-13 23:27:14,668 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-10-13 23:27:14,669 INFO L138 SettingsManager]: * sizeof long double=12 [2019-10-13 23:27:14,669 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-10-13 23:27:14,669 INFO L138 SettingsManager]: * Use constant arrays=true [2019-10-13 23:27:14,669 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-10-13 23:27:14,669 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-10-13 23:27:14,670 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-10-13 23:27:14,670 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-10-13 23:27:14,670 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-10-13 23:27:14,670 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-10-13 23:27:14,670 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-10-13 23:27:14,671 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-10-13 23:27:14,671 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-10-13 23:27:14,671 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-10-13 23:27:14,671 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-10-13 23:27:14,671 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-10-13 23:27:14,672 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: Trace refinement strategy -> SIFA_TAIPAN Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.sifa: Abstract Domain -> CompoundDomain Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder: Size of a code block -> LoopFreeBlock Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.sifa: Call Summarizer -> TopInputCallSummarizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.sifa: Fluid -> SizeLimitFluid Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.sifa: Simplification Technique -> SIMPLIFY_QUICK [2019-10-13 23:27:14,980 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-10-13 23:27:14,998 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-10-13 23:27:15,001 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-10-13 23:27:15,003 INFO L271 PluginConnector]: Initializing CDTParser... [2019-10-13 23:27:15,003 INFO L275 PluginConnector]: CDTParser initialized [2019-10-13 23:27:15,004 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/systemc/transmitter.02.cil.c [2019-10-13 23:27:15,092 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/7831304bb/66eb0e8b9926472a9a70fa149fda9ed4/FLAG7e092fe91 [2019-10-13 23:27:15,618 INFO L306 CDTParser]: Found 1 translation units. [2019-10-13 23:27:15,619 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/systemc/transmitter.02.cil.c [2019-10-13 23:27:15,629 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/7831304bb/66eb0e8b9926472a9a70fa149fda9ed4/FLAG7e092fe91 [2019-10-13 23:27:15,951 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/7831304bb/66eb0e8b9926472a9a70fa149fda9ed4 [2019-10-13 23:27:15,961 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-10-13 23:27:15,963 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2019-10-13 23:27:15,964 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-10-13 23:27:15,964 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-10-13 23:27:15,969 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-10-13 23:27:15,970 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 13.10 11:27:15" (1/1) ... [2019-10-13 23:27:15,975 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@2b20f996 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.10 11:27:15, skipping insertion in model container [2019-10-13 23:27:15,976 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 13.10 11:27:15" (1/1) ... [2019-10-13 23:27:15,986 INFO L142 MainTranslator]: Starting translation in SV-COMP mode [2019-10-13 23:27:16,031 INFO L173 MainTranslator]: Built tables and reachable declarations [2019-10-13 23:27:16,377 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-10-13 23:27:16,395 INFO L188 MainTranslator]: Completed pre-run [2019-10-13 23:27:16,554 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-10-13 23:27:16,579 INFO L192 MainTranslator]: Completed translation [2019-10-13 23:27:16,580 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.10 11:27:16 WrapperNode [2019-10-13 23:27:16,580 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-10-13 23:27:16,581 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-10-13 23:27:16,581 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-10-13 23:27:16,581 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-10-13 23:27:16,595 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.10 11:27:16" (1/1) ... [2019-10-13 23:27:16,596 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.10 11:27:16" (1/1) ... [2019-10-13 23:27:16,604 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.10 11:27:16" (1/1) ... [2019-10-13 23:27:16,604 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.10 11:27:16" (1/1) ... [2019-10-13 23:27:16,614 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.10 11:27:16" (1/1) ... [2019-10-13 23:27:16,626 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.10 11:27:16" (1/1) ... [2019-10-13 23:27:16,629 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.10 11:27:16" (1/1) ... [2019-10-13 23:27:16,633 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-10-13 23:27:16,633 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-10-13 23:27:16,633 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-10-13 23:27:16,634 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-10-13 23:27:16,634 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.10 11:27:16" (1/1) ... No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-10-13 23:27:16,708 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2019-10-13 23:27:16,708 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-10-13 23:27:16,709 INFO L138 BoogieDeclarations]: Found implementation of procedure error [2019-10-13 23:27:16,709 INFO L138 BoogieDeclarations]: Found implementation of procedure master [2019-10-13 23:27:16,709 INFO L138 BoogieDeclarations]: Found implementation of procedure transmit1 [2019-10-13 23:27:16,709 INFO L138 BoogieDeclarations]: Found implementation of procedure transmit2 [2019-10-13 23:27:16,709 INFO L138 BoogieDeclarations]: Found implementation of procedure is_master_triggered [2019-10-13 23:27:16,710 INFO L138 BoogieDeclarations]: Found implementation of procedure is_transmit1_triggered [2019-10-13 23:27:16,710 INFO L138 BoogieDeclarations]: Found implementation of procedure is_transmit2_triggered [2019-10-13 23:27:16,710 INFO L138 BoogieDeclarations]: Found implementation of procedure update_channels [2019-10-13 23:27:16,710 INFO L138 BoogieDeclarations]: Found implementation of procedure init_threads [2019-10-13 23:27:16,710 INFO L138 BoogieDeclarations]: Found implementation of procedure exists_runnable_thread [2019-10-13 23:27:16,710 INFO L138 BoogieDeclarations]: Found implementation of procedure eval [2019-10-13 23:27:16,711 INFO L138 BoogieDeclarations]: Found implementation of procedure fire_delta_events [2019-10-13 23:27:16,711 INFO L138 BoogieDeclarations]: Found implementation of procedure reset_delta_events [2019-10-13 23:27:16,711 INFO L138 BoogieDeclarations]: Found implementation of procedure activate_threads [2019-10-13 23:27:16,711 INFO L138 BoogieDeclarations]: Found implementation of procedure immediate_notify [2019-10-13 23:27:16,711 INFO L138 BoogieDeclarations]: Found implementation of procedure fire_time_events [2019-10-13 23:27:16,711 INFO L138 BoogieDeclarations]: Found implementation of procedure reset_time_events [2019-10-13 23:27:16,711 INFO L138 BoogieDeclarations]: Found implementation of procedure init_model [2019-10-13 23:27:16,712 INFO L138 BoogieDeclarations]: Found implementation of procedure stop_simulation [2019-10-13 23:27:16,712 INFO L138 BoogieDeclarations]: Found implementation of procedure start_simulation [2019-10-13 23:27:16,712 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2019-10-13 23:27:16,712 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_error [2019-10-13 23:27:16,714 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_int [2019-10-13 23:27:16,714 INFO L130 BoogieDeclarations]: Found specification of procedure error [2019-10-13 23:27:16,714 INFO L130 BoogieDeclarations]: Found specification of procedure is_master_triggered [2019-10-13 23:27:16,715 INFO L130 BoogieDeclarations]: Found specification of procedure is_transmit1_triggered [2019-10-13 23:27:16,715 INFO L130 BoogieDeclarations]: Found specification of procedure is_transmit2_triggered [2019-10-13 23:27:16,715 INFO L130 BoogieDeclarations]: Found specification of procedure immediate_notify [2019-10-13 23:27:16,715 INFO L130 BoogieDeclarations]: Found specification of procedure master [2019-10-13 23:27:16,716 INFO L130 BoogieDeclarations]: Found specification of procedure transmit1 [2019-10-13 23:27:16,716 INFO L130 BoogieDeclarations]: Found specification of procedure transmit2 [2019-10-13 23:27:16,716 INFO L130 BoogieDeclarations]: Found specification of procedure update_channels [2019-10-13 23:27:16,717 INFO L130 BoogieDeclarations]: Found specification of procedure init_threads [2019-10-13 23:27:16,717 INFO L130 BoogieDeclarations]: Found specification of procedure exists_runnable_thread [2019-10-13 23:27:16,717 INFO L130 BoogieDeclarations]: Found specification of procedure eval [2019-10-13 23:27:16,717 INFO L130 BoogieDeclarations]: Found specification of procedure fire_delta_events [2019-10-13 23:27:16,717 INFO L130 BoogieDeclarations]: Found specification of procedure reset_delta_events [2019-10-13 23:27:16,717 INFO L130 BoogieDeclarations]: Found specification of procedure activate_threads [2019-10-13 23:27:16,717 INFO L130 BoogieDeclarations]: Found specification of procedure fire_time_events [2019-10-13 23:27:16,718 INFO L130 BoogieDeclarations]: Found specification of procedure reset_time_events [2019-10-13 23:27:16,718 INFO L130 BoogieDeclarations]: Found specification of procedure init_model [2019-10-13 23:27:16,718 INFO L130 BoogieDeclarations]: Found specification of procedure stop_simulation [2019-10-13 23:27:16,718 INFO L130 BoogieDeclarations]: Found specification of procedure start_simulation [2019-10-13 23:27:16,718 INFO L130 BoogieDeclarations]: Found specification of procedure main [2019-10-13 23:27:16,719 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2019-10-13 23:27:16,719 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-10-13 23:27:17,595 INFO L279 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-10-13 23:27:17,596 INFO L284 CfgBuilder]: Removed 6 assume(true) statements. [2019-10-13 23:27:17,597 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 13.10 11:27:17 BoogieIcfgContainer [2019-10-13 23:27:17,597 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-10-13 23:27:17,599 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-10-13 23:27:17,599 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-10-13 23:27:17,602 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-10-13 23:27:17,603 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 13.10 11:27:15" (1/3) ... [2019-10-13 23:27:17,603 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@3b527093 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 13.10 11:27:17, skipping insertion in model container [2019-10-13 23:27:17,604 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.10 11:27:16" (2/3) ... [2019-10-13 23:27:17,604 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@3b527093 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 13.10 11:27:17, skipping insertion in model container [2019-10-13 23:27:17,604 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 13.10 11:27:17" (3/3) ... [2019-10-13 23:27:17,606 INFO L109 eAbstractionObserver]: Analyzing ICFG transmitter.02.cil.c [2019-10-13 23:27:17,617 INFO L152 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-10-13 23:27:17,628 INFO L164 ceAbstractionStarter]: Appying trace abstraction to program that has 1 error locations. [2019-10-13 23:27:17,642 INFO L249 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2019-10-13 23:27:17,673 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-10-13 23:27:17,673 INFO L374 AbstractCegarLoop]: Hoare is true [2019-10-13 23:27:17,674 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-10-13 23:27:17,674 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-10-13 23:27:17,674 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-10-13 23:27:17,674 INFO L378 AbstractCegarLoop]: Difference is false [2019-10-13 23:27:17,675 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-10-13 23:27:17,675 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-10-13 23:27:17,698 INFO L276 IsEmpty]: Start isEmpty. Operand 123 states. [2019-10-13 23:27:17,708 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 65 [2019-10-13 23:27:17,708 INFO L372 BasicCegarLoop]: Found error trace [2019-10-13 23:27:17,710 INFO L380 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-13 23:27:17,712 INFO L410 AbstractCegarLoop]: === Iteration 1 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-13 23:27:17,718 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-13 23:27:17,718 INFO L82 PathProgramCache]: Analyzing trace with hash -1953432145, now seen corresponding path program 1 times [2019-10-13 23:27:17,727 INFO L157 tionRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-10-13 23:27:17,727 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [118732053] [2019-10-13 23:27:17,728 INFO L116 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-13 23:27:17,728 INFO L116 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-13 23:27:17,728 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-13 23:27:17,908 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-13 23:27:18,100 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-10-13 23:27:18,102 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [118732053] [2019-10-13 23:27:18,103 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-10-13 23:27:18,104 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-10-13 23:27:18,105 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [387122399] [2019-10-13 23:27:18,112 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-10-13 23:27:18,113 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-10-13 23:27:18,130 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-10-13 23:27:18,131 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-10-13 23:27:18,135 INFO L87 Difference]: Start difference. First operand 123 states. Second operand 3 states. [2019-10-13 23:27:18,295 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-13 23:27:18,298 INFO L93 Difference]: Finished difference Result 328 states and 445 transitions. [2019-10-13 23:27:18,299 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-10-13 23:27:18,300 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 64 [2019-10-13 23:27:18,301 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-13 23:27:18,325 INFO L225 Difference]: With dead ends: 328 [2019-10-13 23:27:18,325 INFO L226 Difference]: Without dead ends: 209 [2019-10-13 23:27:18,334 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-10-13 23:27:18,354 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 209 states. [2019-10-13 23:27:18,449 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 209 to 209. [2019-10-13 23:27:18,452 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 209 states. [2019-10-13 23:27:18,457 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 209 states to 209 states and 270 transitions. [2019-10-13 23:27:18,459 INFO L78 Accepts]: Start accepts. Automaton has 209 states and 270 transitions. Word has length 64 [2019-10-13 23:27:18,459 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-13 23:27:18,460 INFO L462 AbstractCegarLoop]: Abstraction has 209 states and 270 transitions. [2019-10-13 23:27:18,460 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-10-13 23:27:18,460 INFO L276 IsEmpty]: Start isEmpty. Operand 209 states and 270 transitions. [2019-10-13 23:27:18,467 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 79 [2019-10-13 23:27:18,467 INFO L372 BasicCegarLoop]: Found error trace [2019-10-13 23:27:18,467 INFO L380 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-13 23:27:18,468 INFO L410 AbstractCegarLoop]: === Iteration 2 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-13 23:27:18,468 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-13 23:27:18,468 INFO L82 PathProgramCache]: Analyzing trace with hash 244655769, now seen corresponding path program 1 times [2019-10-13 23:27:18,468 INFO L157 tionRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-10-13 23:27:18,469 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [506761616] [2019-10-13 23:27:18,469 INFO L116 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-13 23:27:18,469 INFO L116 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-13 23:27:18,470 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-13 23:27:18,567 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-13 23:27:18,681 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 10 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2019-10-13 23:27:18,682 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [506761616] [2019-10-13 23:27:18,682 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-10-13 23:27:18,682 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-10-13 23:27:18,683 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [751885520] [2019-10-13 23:27:18,688 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-10-13 23:27:18,689 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-10-13 23:27:18,689 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-10-13 23:27:18,689 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-10-13 23:27:18,690 INFO L87 Difference]: Start difference. First operand 209 states and 270 transitions. Second operand 4 states. [2019-10-13 23:27:18,848 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-13 23:27:18,849 INFO L93 Difference]: Finished difference Result 590 states and 792 transitions. [2019-10-13 23:27:18,849 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-10-13 23:27:18,849 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 78 [2019-10-13 23:27:18,850 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-13 23:27:18,858 INFO L225 Difference]: With dead ends: 590 [2019-10-13 23:27:18,858 INFO L226 Difference]: Without dead ends: 398 [2019-10-13 23:27:18,863 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-10-13 23:27:18,865 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 398 states. [2019-10-13 23:27:18,932 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 398 to 327. [2019-10-13 23:27:18,932 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 327 states. [2019-10-13 23:27:18,935 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 327 states to 327 states and 441 transitions. [2019-10-13 23:27:18,936 INFO L78 Accepts]: Start accepts. Automaton has 327 states and 441 transitions. Word has length 78 [2019-10-13 23:27:18,937 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-13 23:27:18,937 INFO L462 AbstractCegarLoop]: Abstraction has 327 states and 441 transitions. [2019-10-13 23:27:18,937 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-10-13 23:27:18,937 INFO L276 IsEmpty]: Start isEmpty. Operand 327 states and 441 transitions. [2019-10-13 23:27:18,942 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 113 [2019-10-13 23:27:18,942 INFO L372 BasicCegarLoop]: Found error trace [2019-10-13 23:27:18,942 INFO L380 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-13 23:27:18,943 INFO L410 AbstractCegarLoop]: === Iteration 3 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-13 23:27:18,943 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-13 23:27:18,943 INFO L82 PathProgramCache]: Analyzing trace with hash -2111280734, now seen corresponding path program 1 times [2019-10-13 23:27:18,943 INFO L157 tionRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-10-13 23:27:18,944 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [393850984] [2019-10-13 23:27:18,944 INFO L116 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-13 23:27:18,944 INFO L116 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-13 23:27:18,944 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-13 23:27:18,978 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-13 23:27:19,075 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 10 proven. 0 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2019-10-13 23:27:19,075 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [393850984] [2019-10-13 23:27:19,075 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-10-13 23:27:19,076 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-10-13 23:27:19,076 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1747485124] [2019-10-13 23:27:19,077 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-10-13 23:27:19,078 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-10-13 23:27:19,078 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-10-13 23:27:19,078 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-10-13 23:27:19,078 INFO L87 Difference]: Start difference. First operand 327 states and 441 transitions. Second operand 3 states. [2019-10-13 23:27:19,156 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-13 23:27:19,156 INFO L93 Difference]: Finished difference Result 835 states and 1143 transitions. [2019-10-13 23:27:19,157 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-10-13 23:27:19,157 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 112 [2019-10-13 23:27:19,158 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-13 23:27:19,166 INFO L225 Difference]: With dead ends: 835 [2019-10-13 23:27:19,166 INFO L226 Difference]: Without dead ends: 525 [2019-10-13 23:27:19,169 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-10-13 23:27:19,171 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 525 states. [2019-10-13 23:27:19,213 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 525 to 417. [2019-10-13 23:27:19,214 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 417 states. [2019-10-13 23:27:19,218 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 417 states to 417 states and 572 transitions. [2019-10-13 23:27:19,218 INFO L78 Accepts]: Start accepts. Automaton has 417 states and 572 transitions. Word has length 112 [2019-10-13 23:27:19,219 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-13 23:27:19,219 INFO L462 AbstractCegarLoop]: Abstraction has 417 states and 572 transitions. [2019-10-13 23:27:19,219 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-10-13 23:27:19,220 INFO L276 IsEmpty]: Start isEmpty. Operand 417 states and 572 transitions. [2019-10-13 23:27:19,224 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 114 [2019-10-13 23:27:19,225 INFO L372 BasicCegarLoop]: Found error trace [2019-10-13 23:27:19,225 INFO L380 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-13 23:27:19,225 INFO L410 AbstractCegarLoop]: === Iteration 4 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-13 23:27:19,226 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-13 23:27:19,226 INFO L82 PathProgramCache]: Analyzing trace with hash 77978997, now seen corresponding path program 1 times [2019-10-13 23:27:19,226 INFO L157 tionRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-10-13 23:27:19,226 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [663582884] [2019-10-13 23:27:19,227 INFO L116 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-13 23:27:19,227 INFO L116 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-13 23:27:19,227 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-13 23:27:19,279 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-13 23:27:19,382 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 4 proven. 7 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2019-10-13 23:27:19,383 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [663582884] [2019-10-13 23:27:19,384 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1914629763] [2019-10-13 23:27:19,384 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-13 23:27:19,533 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-13 23:27:19,536 INFO L256 TraceCheckSpWp]: Trace formula consists of 599 conjuncts, 3 conjunts are in the unsatisfiable core [2019-10-13 23:27:19,548 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2019-10-13 23:27:19,584 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 26 proven. 0 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2019-10-13 23:27:19,584 INFO L321 TraceCheckSpWp]: Computing backward predicates... [2019-10-13 23:27:19,751 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 11 proven. 0 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2019-10-13 23:27:19,752 INFO L223 tionRefinementEngine]: Constructing automaton from 2 perfect and 1 imperfect interpolant sequences. [2019-10-13 23:27:19,752 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3, 4] imperfect sequences [5] total 6 [2019-10-13 23:27:19,753 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1389053636] [2019-10-13 23:27:19,756 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-10-13 23:27:19,756 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-10-13 23:27:19,756 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-10-13 23:27:19,757 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-10-13 23:27:19,757 INFO L87 Difference]: Start difference. First operand 417 states and 572 transitions. Second operand 4 states. [2019-10-13 23:27:20,070 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-13 23:27:20,070 INFO L93 Difference]: Finished difference Result 1202 states and 1771 transitions. [2019-10-13 23:27:20,071 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-10-13 23:27:20,071 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 113 [2019-10-13 23:27:20,072 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-13 23:27:20,083 INFO L225 Difference]: With dead ends: 1202 [2019-10-13 23:27:20,083 INFO L226 Difference]: Without dead ends: 801 [2019-10-13 23:27:20,087 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 231 GetRequests, 227 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-10-13 23:27:20,089 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 801 states. [2019-10-13 23:27:20,163 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 801 to 780. [2019-10-13 23:27:20,164 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 780 states. [2019-10-13 23:27:20,173 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 780 states to 780 states and 1056 transitions. [2019-10-13 23:27:20,176 INFO L78 Accepts]: Start accepts. Automaton has 780 states and 1056 transitions. Word has length 113 [2019-10-13 23:27:20,178 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-13 23:27:20,178 INFO L462 AbstractCegarLoop]: Abstraction has 780 states and 1056 transitions. [2019-10-13 23:27:20,178 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-10-13 23:27:20,178 INFO L276 IsEmpty]: Start isEmpty. Operand 780 states and 1056 transitions. [2019-10-13 23:27:20,186 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 114 [2019-10-13 23:27:20,186 INFO L372 BasicCegarLoop]: Found error trace [2019-10-13 23:27:20,186 INFO L380 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-13 23:27:20,395 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 2 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-13 23:27:20,395 INFO L410 AbstractCegarLoop]: === Iteration 5 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-13 23:27:20,395 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-13 23:27:20,395 INFO L82 PathProgramCache]: Analyzing trace with hash 8310746, now seen corresponding path program 1 times [2019-10-13 23:27:20,396 INFO L157 tionRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-10-13 23:27:20,396 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1984837633] [2019-10-13 23:27:20,396 INFO L116 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-13 23:27:20,396 INFO L116 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-13 23:27:20,396 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-13 23:27:20,418 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-13 23:27:20,469 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 10 proven. 0 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2019-10-13 23:27:20,470 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1984837633] [2019-10-13 23:27:20,472 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-10-13 23:27:20,472 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-10-13 23:27:20,472 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [802501831] [2019-10-13 23:27:20,473 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-10-13 23:27:20,473 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-10-13 23:27:20,474 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-10-13 23:27:20,479 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-10-13 23:27:20,479 INFO L87 Difference]: Start difference. First operand 780 states and 1056 transitions. Second operand 3 states. [2019-10-13 23:27:20,593 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-13 23:27:20,593 INFO L93 Difference]: Finished difference Result 1950 states and 2661 transitions. [2019-10-13 23:27:20,593 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-10-13 23:27:20,594 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 113 [2019-10-13 23:27:20,594 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-13 23:27:20,603 INFO L225 Difference]: With dead ends: 1950 [2019-10-13 23:27:20,603 INFO L226 Difference]: Without dead ends: 1187 [2019-10-13 23:27:20,608 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-10-13 23:27:20,610 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1187 states. [2019-10-13 23:27:20,681 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1187 to 1039. [2019-10-13 23:27:20,681 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1039 states. [2019-10-13 23:27:20,689 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1039 states to 1039 states and 1391 transitions. [2019-10-13 23:27:20,697 INFO L78 Accepts]: Start accepts. Automaton has 1039 states and 1391 transitions. Word has length 113 [2019-10-13 23:27:20,698 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-13 23:27:20,699 INFO L462 AbstractCegarLoop]: Abstraction has 1039 states and 1391 transitions. [2019-10-13 23:27:20,699 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-10-13 23:27:20,699 INFO L276 IsEmpty]: Start isEmpty. Operand 1039 states and 1391 transitions. [2019-10-13 23:27:20,703 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 115 [2019-10-13 23:27:20,703 INFO L372 BasicCegarLoop]: Found error trace [2019-10-13 23:27:20,704 INFO L380 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-13 23:27:20,705 INFO L410 AbstractCegarLoop]: === Iteration 6 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-13 23:27:20,705 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-13 23:27:20,705 INFO L82 PathProgramCache]: Analyzing trace with hash -846455608, now seen corresponding path program 1 times [2019-10-13 23:27:20,705 INFO L157 tionRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-10-13 23:27:20,706 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1963134101] [2019-10-13 23:27:20,706 INFO L116 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-13 23:27:20,706 INFO L116 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-13 23:27:20,706 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-13 23:27:20,763 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-13 23:27:20,854 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 9 proven. 0 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2019-10-13 23:27:20,855 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1963134101] [2019-10-13 23:27:20,855 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-10-13 23:27:20,855 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-10-13 23:27:20,856 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1287457399] [2019-10-13 23:27:20,856 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-10-13 23:27:20,856 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-10-13 23:27:20,857 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-10-13 23:27:20,857 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-10-13 23:27:20,857 INFO L87 Difference]: Start difference. First operand 1039 states and 1391 transitions. Second operand 4 states. [2019-10-13 23:27:21,149 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-13 23:27:21,149 INFO L93 Difference]: Finished difference Result 2291 states and 3090 transitions. [2019-10-13 23:27:21,150 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-10-13 23:27:21,150 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 114 [2019-10-13 23:27:21,152 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-13 23:27:21,163 INFO L225 Difference]: With dead ends: 2291 [2019-10-13 23:27:21,163 INFO L226 Difference]: Without dead ends: 1269 [2019-10-13 23:27:21,169 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-10-13 23:27:21,172 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1269 states. [2019-10-13 23:27:21,256 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1269 to 1265. [2019-10-13 23:27:21,256 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1265 states. [2019-10-13 23:27:21,264 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1265 states to 1265 states and 1658 transitions. [2019-10-13 23:27:21,265 INFO L78 Accepts]: Start accepts. Automaton has 1265 states and 1658 transitions. Word has length 114 [2019-10-13 23:27:21,267 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-13 23:27:21,267 INFO L462 AbstractCegarLoop]: Abstraction has 1265 states and 1658 transitions. [2019-10-13 23:27:21,268 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-10-13 23:27:21,268 INFO L276 IsEmpty]: Start isEmpty. Operand 1265 states and 1658 transitions. [2019-10-13 23:27:21,273 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 116 [2019-10-13 23:27:21,273 INFO L372 BasicCegarLoop]: Found error trace [2019-10-13 23:27:21,274 INFO L380 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-13 23:27:21,274 INFO L410 AbstractCegarLoop]: === Iteration 7 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-13 23:27:21,274 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-13 23:27:21,274 INFO L82 PathProgramCache]: Analyzing trace with hash -1944182159, now seen corresponding path program 1 times [2019-10-13 23:27:21,275 INFO L157 tionRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-10-13 23:27:21,275 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1209737108] [2019-10-13 23:27:21,275 INFO L116 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-13 23:27:21,275 INFO L116 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-13 23:27:21,275 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-13 23:27:21,298 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-13 23:27:21,409 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 21 proven. 0 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2019-10-13 23:27:21,410 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1209737108] [2019-10-13 23:27:21,410 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-10-13 23:27:21,410 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-10-13 23:27:21,410 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1883674670] [2019-10-13 23:27:21,411 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2019-10-13 23:27:21,411 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-10-13 23:27:21,411 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2019-10-13 23:27:21,412 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=51, Unknown=0, NotChecked=0, Total=72 [2019-10-13 23:27:21,412 INFO L87 Difference]: Start difference. First operand 1265 states and 1658 transitions. Second operand 9 states. [2019-10-13 23:27:22,613 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-13 23:27:22,613 INFO L93 Difference]: Finished difference Result 4040 states and 5426 transitions. [2019-10-13 23:27:22,614 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2019-10-13 23:27:22,614 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 115 [2019-10-13 23:27:22,615 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-13 23:27:22,630 INFO L225 Difference]: With dead ends: 4040 [2019-10-13 23:27:22,630 INFO L226 Difference]: Without dead ends: 1908 [2019-10-13 23:27:22,643 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 25 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 26 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=107, Invalid=235, Unknown=0, NotChecked=0, Total=342 [2019-10-13 23:27:22,646 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1908 states. [2019-10-13 23:27:22,834 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1908 to 1685. [2019-10-13 23:27:22,834 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1685 states. [2019-10-13 23:27:22,848 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1685 states to 1685 states and 2193 transitions. [2019-10-13 23:27:22,849 INFO L78 Accepts]: Start accepts. Automaton has 1685 states and 2193 transitions. Word has length 115 [2019-10-13 23:27:22,850 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-13 23:27:22,850 INFO L462 AbstractCegarLoop]: Abstraction has 1685 states and 2193 transitions. [2019-10-13 23:27:22,850 INFO L463 AbstractCegarLoop]: Interpolant automaton has 9 states. [2019-10-13 23:27:22,850 INFO L276 IsEmpty]: Start isEmpty. Operand 1685 states and 2193 transitions. [2019-10-13 23:27:22,857 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 139 [2019-10-13 23:27:22,857 INFO L372 BasicCegarLoop]: Found error trace [2019-10-13 23:27:22,857 INFO L380 BasicCegarLoop]: trace histogram [5, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-13 23:27:22,858 INFO L410 AbstractCegarLoop]: === Iteration 8 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-13 23:27:22,858 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-13 23:27:22,858 INFO L82 PathProgramCache]: Analyzing trace with hash -453819748, now seen corresponding path program 1 times [2019-10-13 23:27:22,859 INFO L157 tionRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-10-13 23:27:22,859 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [467604675] [2019-10-13 23:27:22,859 INFO L116 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-13 23:27:22,860 INFO L116 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-13 23:27:22,860 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-13 23:27:22,896 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-13 23:27:23,077 INFO L134 CoverageAnalysis]: Checked inductivity of 69 backedges. 21 proven. 3 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2019-10-13 23:27:23,078 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [467604675] [2019-10-13 23:27:23,078 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [903253643] [2019-10-13 23:27:23,079 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-13 23:27:23,242 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-13 23:27:23,246 INFO L256 TraceCheckSpWp]: Trace formula consists of 692 conjuncts, 21 conjunts are in the unsatisfiable core [2019-10-13 23:27:23,254 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2019-10-13 23:27:23,483 INFO L134 CoverageAnalysis]: Checked inductivity of 69 backedges. 63 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2019-10-13 23:27:23,483 INFO L321 TraceCheckSpWp]: Computing backward predicates... [2019-10-13 23:27:23,704 INFO L319 QuantifierPusher]: Applying distributivity, recursing on 2 terms [2019-10-13 23:27:23,823 INFO L319 QuantifierPusher]: Applying distributivity, recursing on 2 terms [2019-10-13 23:27:23,825 INFO L319 QuantifierPusher]: Applying distributivity, recursing on 2 terms [2019-10-13 23:27:23,852 INFO L319 QuantifierPusher]: Applying distributivity, recursing on 2 terms [2019-10-13 23:27:23,944 INFO L134 CoverageAnalysis]: Checked inductivity of 69 backedges. 21 proven. 8 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2019-10-13 23:27:23,944 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 2 imperfect interpolant sequences. [2019-10-13 23:27:23,945 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [11] imperfect sequences [9, 8] total 22 [2019-10-13 23:27:23,946 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1248196352] [2019-10-13 23:27:23,947 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-10-13 23:27:23,949 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-10-13 23:27:23,949 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-10-13 23:27:23,950 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=70, Invalid=392, Unknown=0, NotChecked=0, Total=462 [2019-10-13 23:27:23,950 INFO L87 Difference]: Start difference. First operand 1685 states and 2193 transitions. Second operand 11 states. [2019-10-13 23:27:25,592 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-13 23:27:25,594 INFO L93 Difference]: Finished difference Result 5793 states and 8152 transitions. [2019-10-13 23:27:25,594 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2019-10-13 23:27:25,594 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 138 [2019-10-13 23:27:25,595 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-13 23:27:25,642 INFO L225 Difference]: With dead ends: 5793 [2019-10-13 23:27:25,643 INFO L226 Difference]: Without dead ends: 4125 [2019-10-13 23:27:25,667 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 309 GetRequests, 275 SyntacticMatches, 0 SemanticMatches, 34 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 205 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=225, Invalid=1035, Unknown=0, NotChecked=0, Total=1260 [2019-10-13 23:27:25,676 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4125 states. [2019-10-13 23:27:26,013 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4125 to 3784. [2019-10-13 23:27:26,014 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3784 states. [2019-10-13 23:27:26,039 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3784 states to 3784 states and 5107 transitions. [2019-10-13 23:27:26,041 INFO L78 Accepts]: Start accepts. Automaton has 3784 states and 5107 transitions. Word has length 138 [2019-10-13 23:27:26,052 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-13 23:27:26,052 INFO L462 AbstractCegarLoop]: Abstraction has 3784 states and 5107 transitions. [2019-10-13 23:27:26,052 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-10-13 23:27:26,052 INFO L276 IsEmpty]: Start isEmpty. Operand 3784 states and 5107 transitions. [2019-10-13 23:27:26,061 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 141 [2019-10-13 23:27:26,061 INFO L372 BasicCegarLoop]: Found error trace [2019-10-13 23:27:26,062 INFO L380 BasicCegarLoop]: trace histogram [5, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-13 23:27:26,274 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-13 23:27:26,275 INFO L410 AbstractCegarLoop]: === Iteration 9 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-13 23:27:26,275 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-13 23:27:26,275 INFO L82 PathProgramCache]: Analyzing trace with hash -539214046, now seen corresponding path program 1 times [2019-10-13 23:27:26,276 INFO L157 tionRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-10-13 23:27:26,276 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [706401447] [2019-10-13 23:27:26,276 INFO L116 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-13 23:27:26,277 INFO L116 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-13 23:27:26,277 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-13 23:27:26,315 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-13 23:27:26,513 INFO L134 CoverageAnalysis]: Checked inductivity of 70 backedges. 19 proven. 11 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2019-10-13 23:27:26,513 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [706401447] [2019-10-13 23:27:26,514 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [442956058] [2019-10-13 23:27:26,514 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-13 23:27:26,788 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-13 23:27:26,792 INFO L256 TraceCheckSpWp]: Trace formula consists of 706 conjuncts, 11 conjunts are in the unsatisfiable core [2019-10-13 23:27:26,798 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2019-10-13 23:27:26,915 INFO L134 CoverageAnalysis]: Checked inductivity of 70 backedges. 64 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2019-10-13 23:27:26,916 INFO L321 TraceCheckSpWp]: Computing backward predicates... [2019-10-13 23:27:27,422 INFO L134 CoverageAnalysis]: Checked inductivity of 70 backedges. 23 proven. 3 refuted. 0 times theorem prover too weak. 44 trivial. 0 not checked. [2019-10-13 23:27:27,423 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 2 imperfect interpolant sequences. [2019-10-13 23:27:27,423 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [11, 6] total 18 [2019-10-13 23:27:27,423 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [354912238] [2019-10-13 23:27:27,424 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-10-13 23:27:27,424 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-10-13 23:27:27,425 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-10-13 23:27:27,426 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=49, Invalid=257, Unknown=0, NotChecked=0, Total=306 [2019-10-13 23:27:27,426 INFO L87 Difference]: Start difference. First operand 3784 states and 5107 transitions. Second operand 6 states. [2019-10-13 23:27:27,869 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-13 23:27:27,869 INFO L93 Difference]: Finished difference Result 7331 states and 9985 transitions. [2019-10-13 23:27:27,870 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-10-13 23:27:27,870 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 140 [2019-10-13 23:27:27,870 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-13 23:27:27,902 INFO L225 Difference]: With dead ends: 7331 [2019-10-13 23:27:27,902 INFO L226 Difference]: Without dead ends: 3564 [2019-10-13 23:27:27,929 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 295 GetRequests, 276 SyntacticMatches, 0 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 74 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=68, Invalid=352, Unknown=0, NotChecked=0, Total=420 [2019-10-13 23:27:27,933 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3564 states. [2019-10-13 23:27:28,163 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3564 to 3100. [2019-10-13 23:27:28,163 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3100 states. [2019-10-13 23:27:28,185 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3100 states to 3100 states and 4064 transitions. [2019-10-13 23:27:28,187 INFO L78 Accepts]: Start accepts. Automaton has 3100 states and 4064 transitions. Word has length 140 [2019-10-13 23:27:28,188 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-13 23:27:28,188 INFO L462 AbstractCegarLoop]: Abstraction has 3100 states and 4064 transitions. [2019-10-13 23:27:28,188 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-10-13 23:27:28,188 INFO L276 IsEmpty]: Start isEmpty. Operand 3100 states and 4064 transitions. [2019-10-13 23:27:28,197 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 146 [2019-10-13 23:27:28,197 INFO L372 BasicCegarLoop]: Found error trace [2019-10-13 23:27:28,197 INFO L380 BasicCegarLoop]: trace histogram [5, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-13 23:27:28,402 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 4 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-13 23:27:28,403 INFO L410 AbstractCegarLoop]: === Iteration 10 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-13 23:27:28,403 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-13 23:27:28,404 INFO L82 PathProgramCache]: Analyzing trace with hash -1561917984, now seen corresponding path program 1 times [2019-10-13 23:27:28,404 INFO L157 tionRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-10-13 23:27:28,404 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1864724462] [2019-10-13 23:27:28,404 INFO L116 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-13 23:27:28,404 INFO L116 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-13 23:27:28,405 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-13 23:27:28,429 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-13 23:27:28,509 INFO L134 CoverageAnalysis]: Checked inductivity of 69 backedges. 17 proven. 13 refuted. 0 times theorem prover too weak. 39 trivial. 0 not checked. [2019-10-13 23:27:28,510 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1864724462] [2019-10-13 23:27:28,510 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [723176639] [2019-10-13 23:27:28,511 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-13 23:27:28,661 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-13 23:27:28,663 INFO L256 TraceCheckSpWp]: Trace formula consists of 730 conjuncts, 3 conjunts are in the unsatisfiable core [2019-10-13 23:27:28,673 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2019-10-13 23:27:28,710 INFO L134 CoverageAnalysis]: Checked inductivity of 69 backedges. 63 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2019-10-13 23:27:28,711 INFO L321 TraceCheckSpWp]: Computing backward predicates... [2019-10-13 23:27:28,834 INFO L134 CoverageAnalysis]: Checked inductivity of 69 backedges. 30 proven. 0 refuted. 0 times theorem prover too weak. 39 trivial. 0 not checked. [2019-10-13 23:27:28,834 INFO L223 tionRefinementEngine]: Constructing automaton from 2 perfect and 1 imperfect interpolant sequences. [2019-10-13 23:27:28,834 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3, 4] imperfect sequences [5] total 6 [2019-10-13 23:27:28,835 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [177181618] [2019-10-13 23:27:28,835 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-10-13 23:27:28,836 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-10-13 23:27:28,836 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-10-13 23:27:28,836 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-10-13 23:27:28,836 INFO L87 Difference]: Start difference. First operand 3100 states and 4064 transitions. Second operand 4 states. [2019-10-13 23:27:29,249 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-13 23:27:29,250 INFO L93 Difference]: Finished difference Result 6307 states and 8499 transitions. [2019-10-13 23:27:29,250 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-10-13 23:27:29,250 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 145 [2019-10-13 23:27:29,250 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-13 23:27:29,272 INFO L225 Difference]: With dead ends: 6307 [2019-10-13 23:27:29,272 INFO L226 Difference]: Without dead ends: 3225 [2019-10-13 23:27:29,291 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 296 GetRequests, 292 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-10-13 23:27:29,295 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3225 states. [2019-10-13 23:27:29,498 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3225 to 3201. [2019-10-13 23:27:29,499 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3201 states. [2019-10-13 23:27:29,510 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3201 states to 3201 states and 3972 transitions. [2019-10-13 23:27:29,512 INFO L78 Accepts]: Start accepts. Automaton has 3201 states and 3972 transitions. Word has length 145 [2019-10-13 23:27:29,512 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-13 23:27:29,512 INFO L462 AbstractCegarLoop]: Abstraction has 3201 states and 3972 transitions. [2019-10-13 23:27:29,513 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-10-13 23:27:29,513 INFO L276 IsEmpty]: Start isEmpty. Operand 3201 states and 3972 transitions. [2019-10-13 23:27:29,517 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 155 [2019-10-13 23:27:29,517 INFO L372 BasicCegarLoop]: Found error trace [2019-10-13 23:27:29,518 INFO L380 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-13 23:27:29,731 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 5 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-13 23:27:29,731 INFO L410 AbstractCegarLoop]: === Iteration 11 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-13 23:27:29,732 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-13 23:27:29,732 INFO L82 PathProgramCache]: Analyzing trace with hash 2009742356, now seen corresponding path program 1 times [2019-10-13 23:27:29,732 INFO L157 tionRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-10-13 23:27:29,732 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [405211703] [2019-10-13 23:27:29,732 INFO L116 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-13 23:27:29,733 INFO L116 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-13 23:27:29,733 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-13 23:27:29,760 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-13 23:27:29,821 INFO L134 CoverageAnalysis]: Checked inductivity of 85 backedges. 23 proven. 0 refuted. 0 times theorem prover too weak. 62 trivial. 0 not checked. [2019-10-13 23:27:29,821 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [405211703] [2019-10-13 23:27:29,821 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-10-13 23:27:29,821 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-10-13 23:27:29,822 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1806153945] [2019-10-13 23:27:29,822 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-10-13 23:27:29,822 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-10-13 23:27:29,823 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-10-13 23:27:29,823 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-10-13 23:27:29,823 INFO L87 Difference]: Start difference. First operand 3201 states and 3972 transitions. Second operand 4 states. [2019-10-13 23:27:30,079 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-13 23:27:30,080 INFO L93 Difference]: Finished difference Result 4855 states and 6297 transitions. [2019-10-13 23:27:30,080 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-10-13 23:27:30,080 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 154 [2019-10-13 23:27:30,081 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-13 23:27:30,101 INFO L225 Difference]: With dead ends: 4855 [2019-10-13 23:27:30,102 INFO L226 Difference]: Without dead ends: 3199 [2019-10-13 23:27:30,113 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-10-13 23:27:30,118 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3199 states. [2019-10-13 23:27:30,405 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3199 to 3199. [2019-10-13 23:27:30,405 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3199 states. [2019-10-13 23:27:30,423 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3199 states to 3199 states and 3941 transitions. [2019-10-13 23:27:30,424 INFO L78 Accepts]: Start accepts. Automaton has 3199 states and 3941 transitions. Word has length 154 [2019-10-13 23:27:30,426 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-13 23:27:30,426 INFO L462 AbstractCegarLoop]: Abstraction has 3199 states and 3941 transitions. [2019-10-13 23:27:30,427 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-10-13 23:27:30,427 INFO L276 IsEmpty]: Start isEmpty. Operand 3199 states and 3941 transitions. [2019-10-13 23:27:30,433 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 156 [2019-10-13 23:27:30,433 INFO L372 BasicCegarLoop]: Found error trace [2019-10-13 23:27:30,433 INFO L380 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-13 23:27:30,434 INFO L410 AbstractCegarLoop]: === Iteration 12 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-13 23:27:30,434 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-13 23:27:30,434 INFO L82 PathProgramCache]: Analyzing trace with hash -2109454516, now seen corresponding path program 1 times [2019-10-13 23:27:30,434 INFO L157 tionRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-10-13 23:27:30,435 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [694086976] [2019-10-13 23:27:30,435 INFO L116 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-13 23:27:30,435 INFO L116 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-13 23:27:30,435 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-13 23:27:30,470 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-13 23:27:30,639 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 24 proven. 0 refuted. 0 times theorem prover too weak. 62 trivial. 0 not checked. [2019-10-13 23:27:30,639 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [694086976] [2019-10-13 23:27:30,640 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-10-13 23:27:30,640 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-10-13 23:27:30,640 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1479516494] [2019-10-13 23:27:30,643 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-10-13 23:27:30,643 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-10-13 23:27:30,643 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-10-13 23:27:30,644 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=28, Unknown=0, NotChecked=0, Total=42 [2019-10-13 23:27:30,644 INFO L87 Difference]: Start difference. First operand 3199 states and 3941 transitions. Second operand 7 states. [2019-10-13 23:27:31,648 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-13 23:27:31,649 INFO L93 Difference]: Finished difference Result 7948 states and 9807 transitions. [2019-10-13 23:27:31,649 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-10-13 23:27:31,649 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 155 [2019-10-13 23:27:31,650 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-13 23:27:31,685 INFO L225 Difference]: With dead ends: 7948 [2019-10-13 23:27:31,685 INFO L226 Difference]: Without dead ends: 5105 [2019-10-13 23:27:31,699 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 7 SyntacticMatches, 2 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=31, Invalid=59, Unknown=0, NotChecked=0, Total=90 [2019-10-13 23:27:31,706 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5105 states. [2019-10-13 23:27:32,217 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5105 to 5053. [2019-10-13 23:27:32,217 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5053 states. [2019-10-13 23:27:32,235 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5053 states to 5053 states and 6113 transitions. [2019-10-13 23:27:32,237 INFO L78 Accepts]: Start accepts. Automaton has 5053 states and 6113 transitions. Word has length 155 [2019-10-13 23:27:32,238 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-13 23:27:32,238 INFO L462 AbstractCegarLoop]: Abstraction has 5053 states and 6113 transitions. [2019-10-13 23:27:32,238 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-10-13 23:27:32,238 INFO L276 IsEmpty]: Start isEmpty. Operand 5053 states and 6113 transitions. [2019-10-13 23:27:32,244 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 157 [2019-10-13 23:27:32,245 INFO L372 BasicCegarLoop]: Found error trace [2019-10-13 23:27:32,245 INFO L380 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-13 23:27:32,245 INFO L410 AbstractCegarLoop]: === Iteration 13 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-13 23:27:32,246 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-13 23:27:32,246 INFO L82 PathProgramCache]: Analyzing trace with hash 1752141364, now seen corresponding path program 1 times [2019-10-13 23:27:32,246 INFO L157 tionRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-10-13 23:27:32,246 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1046747093] [2019-10-13 23:27:32,246 INFO L116 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-13 23:27:32,247 INFO L116 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-13 23:27:32,247 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-13 23:27:32,302 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-10-13 23:27:32,354 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-10-13 23:27:32,445 INFO L168 tionRefinementEngine]: Strategy SIFA_TAIPAN found a feasible trace [2019-10-13 23:27:32,445 INFO L445 BasicCegarLoop]: Counterexample might be feasible [2019-10-13 23:27:32,571 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 13.10 11:27:32 BoogieIcfgContainer [2019-10-13 23:27:32,572 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-10-13 23:27:32,574 INFO L168 Benchmark]: Toolchain (without parser) took 16610.72 ms. Allocated memory was 138.9 MB in the beginning and 569.4 MB in the end (delta: 430.4 MB). Free memory was 103.3 MB in the beginning and 418.8 MB in the end (delta: -315.5 MB). Peak memory consumption was 115.0 MB. Max. memory is 7.1 GB. [2019-10-13 23:27:32,575 INFO L168 Benchmark]: CDTParser took 1.39 ms. Allocated memory is still 138.9 MB. Free memory was 122.2 MB in the beginning and 122.0 MB in the end (delta: 210.0 kB). Peak memory consumption was 210.0 kB. Max. memory is 7.1 GB. [2019-10-13 23:27:32,576 INFO L168 Benchmark]: CACSL2BoogieTranslator took 616.83 ms. Allocated memory was 138.9 MB in the beginning and 202.4 MB in the end (delta: 63.4 MB). Free memory was 102.9 MB in the beginning and 178.6 MB in the end (delta: -75.7 MB). Peak memory consumption was 24.7 MB. Max. memory is 7.1 GB. [2019-10-13 23:27:32,577 INFO L168 Benchmark]: Boogie Preprocessor took 51.88 ms. Allocated memory is still 202.4 MB. Free memory was 178.6 MB in the beginning and 176.3 MB in the end (delta: 2.3 MB). Peak memory consumption was 2.3 MB. Max. memory is 7.1 GB. [2019-10-13 23:27:32,577 INFO L168 Benchmark]: RCFGBuilder took 964.28 ms. Allocated memory is still 202.4 MB. Free memory was 176.3 MB in the beginning and 110.9 MB in the end (delta: 65.4 MB). Peak memory consumption was 65.4 MB. Max. memory is 7.1 GB. [2019-10-13 23:27:32,578 INFO L168 Benchmark]: TraceAbstraction took 14972.92 ms. Allocated memory was 202.4 MB in the beginning and 569.4 MB in the end (delta: 367.0 MB). Free memory was 110.3 MB in the beginning and 418.8 MB in the end (delta: -308.6 MB). Peak memory consumption was 58.4 MB. Max. memory is 7.1 GB. [2019-10-13 23:27:32,581 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 1.39 ms. Allocated memory is still 138.9 MB. Free memory was 122.2 MB in the beginning and 122.0 MB in the end (delta: 210.0 kB). Peak memory consumption was 210.0 kB. Max. memory is 7.1 GB. * CACSL2BoogieTranslator took 616.83 ms. Allocated memory was 138.9 MB in the beginning and 202.4 MB in the end (delta: 63.4 MB). Free memory was 102.9 MB in the beginning and 178.6 MB in the end (delta: -75.7 MB). Peak memory consumption was 24.7 MB. Max. memory is 7.1 GB. * Boogie Preprocessor took 51.88 ms. Allocated memory is still 202.4 MB. Free memory was 178.6 MB in the beginning and 176.3 MB in the end (delta: 2.3 MB). Peak memory consumption was 2.3 MB. Max. memory is 7.1 GB. * RCFGBuilder took 964.28 ms. Allocated memory is still 202.4 MB. Free memory was 176.3 MB in the beginning and 110.9 MB in the end (delta: 65.4 MB). Peak memory consumption was 65.4 MB. Max. memory is 7.1 GB. * TraceAbstraction took 14972.92 ms. Allocated memory was 202.4 MB in the beginning and 569.4 MB in the end (delta: 367.0 MB). Free memory was 110.3 MB in the beginning and 418.8 MB in the end (delta: -308.6 MB). Peak memory consumption was 58.4 MB. Max. memory is 7.1 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 11]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L15] int m_pc = 0; [L16] int t1_pc = 0; [L17] int t2_pc = 0; [L18] int m_st ; [L19] int t1_st ; [L20] int t2_st ; [L21] int m_i ; [L22] int t1_i ; [L23] int t2_i ; [L24] int M_E = 2; [L25] int T1_E = 2; [L26] int T2_E = 2; [L27] int E_1 = 2; [L28] int E_2 = 2; [L563] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=0, m_pc=0, m_st=0, T1_E=2, t1_i=0, t1_pc=0, t1_st=0, T2_E=2, t2_i=0, t2_pc=0, t2_st=0] [L567] CALL init_model() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=0, m_pc=0, m_st=0, T1_E=2, t1_i=0, t1_pc=0, t1_st=0, T2_E=2, t2_i=0, t2_pc=0, t2_st=0] [L477] m_i = 1 [L478] t1_i = 1 [L479] t2_i = 1 [L567] RET init_model() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L568] CALL start_simulation() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L504] int kernel_st ; [L505] int tmp ; [L506] int tmp___0 ; [L510] kernel_st = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, kernel_st=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L511] FCALL update_channels() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, kernel_st=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L512] CALL init_threads() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L211] COND TRUE m_i == 1 [L212] m_st = 0 [L216] COND TRUE t1_i == 1 [L217] t1_st = 0 [L221] COND TRUE t2_i == 1 [L222] t2_st = 0 [L512] RET init_threads() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, kernel_st=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L513] CALL fire_delta_events() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L324] COND FALSE !(M_E == 0) [L329] COND FALSE !(T1_E == 0) [L334] COND FALSE !(T2_E == 0) [L339] COND FALSE !(E_1 == 0) [L344] COND FALSE !(E_2 == 0) [L513] RET fire_delta_events() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, kernel_st=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L514] CALL activate_threads() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L387] int tmp ; [L388] int tmp___0 ; [L389] int tmp___1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L393] CALL, EXPR is_master_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L143] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L146] COND FALSE !(m_pc == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L156] __retres1 = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, __retres1=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L158] return (__retres1); [L393] RET, EXPR is_master_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, is_master_triggered()=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L393] tmp = is_master_triggered() [L395] COND FALSE !(\read(tmp)) VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, tmp=0] [L401] CALL, EXPR is_transmit1_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L162] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L165] COND FALSE !(t1_pc == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L175] __retres1 = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, __retres1=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L177] return (__retres1); [L401] RET, EXPR is_transmit1_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, is_transmit1_triggered()=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, tmp=0] [L401] tmp___0 = is_transmit1_triggered() [L403] COND FALSE !(\read(tmp___0)) VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, tmp=0, tmp___0=0] [L409] CALL, EXPR is_transmit2_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L181] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L184] COND FALSE !(t2_pc == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L194] __retres1 = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, __retres1=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L196] return (__retres1); [L409] RET, EXPR is_transmit2_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, is_transmit2_triggered()=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, tmp=0, tmp___0=0] [L409] tmp___1 = is_transmit2_triggered() [L411] COND FALSE !(\read(tmp___1)) [L514] RET activate_threads() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, kernel_st=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L515] CALL reset_delta_events() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L357] COND FALSE !(M_E == 1) [L362] COND FALSE !(T1_E == 1) [L367] COND FALSE !(T2_E == 1) [L372] COND FALSE !(E_1 == 1) [L377] COND FALSE !(E_2 == 1) [L515] RET reset_delta_events() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, kernel_st=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L518] COND TRUE 1 [L521] kernel_st = 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, kernel_st=1, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L522] CALL eval() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L257] int tmp ; VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L261] COND TRUE 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L264] CALL, EXPR exists_runnable_thread() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L231] int __retres1 ; [L234] COND TRUE m_st == 0 [L235] __retres1 = 1 [L252] return (__retres1); [L264] RET, EXPR exists_runnable_thread() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, exists_runnable_thread()=1, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L264] tmp = exists_runnable_thread() [L266] COND TRUE \read(tmp) VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, tmp=1] [L271] COND TRUE m_st == 0 [L272] int tmp_ndt_1; [L273] tmp_ndt_1 = __VERIFIER_nondet_int() [L274] COND FALSE !(\read(tmp_ndt_1)) VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, tmp=1, tmp_ndt_1=0] [L285] COND TRUE t1_st == 0 [L286] int tmp_ndt_2; [L287] tmp_ndt_2 = __VERIFIER_nondet_int() [L288] COND TRUE \read(tmp_ndt_2) [L290] t1_st = 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=1, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, tmp=1, tmp_ndt_1=0, tmp_ndt_2=1] [L291] CALL transmit1() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=1, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L78] COND TRUE t1_pc == 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=1, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L89] COND TRUE 1 [L91] t1_pc = 1 [L92] t1_st = 2 [L291] RET transmit1() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, tmp=1, tmp_ndt_1=0, tmp_ndt_2=1] [L299] COND TRUE t2_st == 0 [L300] int tmp_ndt_3; [L301] tmp_ndt_3 = __VERIFIER_nondet_int() [L302] COND TRUE \read(tmp_ndt_3) [L304] t2_st = 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=0, t2_st=1, tmp=1, tmp_ndt_1=0, tmp_ndt_2=1, tmp_ndt_3=1] [L305] CALL transmit2() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=1, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=0, t2_st=1] [L113] COND TRUE t2_pc == 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=1, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=0, t2_st=1] [L124] COND TRUE 1 [L126] t2_pc = 1 [L127] t2_st = 2 [L305] RET transmit2() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, tmp=1, tmp_ndt_1=0, tmp_ndt_2=1, tmp_ndt_3=1] [L261] COND TRUE 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, tmp=1, tmp_ndt_1=0, tmp_ndt_2=1, tmp_ndt_3=1] [L264] CALL, EXPR exists_runnable_thread() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L231] int __retres1 ; [L234] COND TRUE m_st == 0 [L235] __retres1 = 1 [L252] return (__retres1); [L264] RET, EXPR exists_runnable_thread() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, exists_runnable_thread()=1, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, tmp=1, tmp_ndt_1=0, tmp_ndt_2=1, tmp_ndt_3=1] [L264] tmp = exists_runnable_thread() [L266] COND TRUE \read(tmp) VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, tmp=1, tmp_ndt_1=0, tmp_ndt_2=1, tmp_ndt_3=1] [L271] COND TRUE m_st == 0 [L272] int tmp_ndt_1; [L273] tmp_ndt_1 = __VERIFIER_nondet_int() [L274] COND TRUE \read(tmp_ndt_1) [L276] m_st = 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, tmp=1, tmp_ndt_1=1, tmp_ndt_2=1, tmp_ndt_3=1] [L277] CALL master() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L37] COND TRUE m_pc == 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L48] COND TRUE 1 [L51] E_1 = 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=1, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L52] CALL immediate_notify() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=1, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L425] CALL activate_threads() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=1, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L387] int tmp ; [L388] int tmp___0 ; [L389] int tmp___1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=1, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L393] CALL, EXPR is_master_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=1, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L143] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=1, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L146] COND FALSE !(m_pc == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=1, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L156] __retres1 = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, __retres1=0, E_1=1, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L158] return (__retres1); [L393] RET, EXPR is_master_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=1, E_2=2, is_master_triggered()=0, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L393] tmp = is_master_triggered() [L395] COND FALSE !(\read(tmp)) VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=1, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, tmp=0] [L401] CALL, EXPR is_transmit1_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=1, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L162] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=1, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L165] COND TRUE t1_pc == 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=1, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L166] COND TRUE E_1 == 1 [L167] __retres1 = 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, __retres1=1, E_1=1, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L177] return (__retres1); [L401] RET, EXPR is_transmit1_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=1, E_2=2, is_transmit1_triggered()=1, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, tmp=0] [L401] tmp___0 = is_transmit1_triggered() [L403] COND TRUE \read(tmp___0) [L404] t1_st = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=1, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, tmp=0, tmp___0=1] [L409] CALL, EXPR is_transmit2_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=1, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L181] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=1, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L184] COND TRUE t2_pc == 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=1, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L185] COND FALSE !(E_2 == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=1, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L194] __retres1 = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, __retres1=0, E_1=1, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L196] return (__retres1); [L409] RET, EXPR is_transmit2_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=1, E_2=2, is_transmit2_triggered()=0, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, tmp=0, tmp___0=1] [L409] tmp___1 = is_transmit2_triggered() [L411] COND FALSE !(\read(tmp___1)) [L425] RET activate_threads() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=1, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L52] RET immediate_notify() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=1, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L53] E_1 = 2 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L56] COND TRUE 1 [L58] m_pc = 1 [L59] m_st = 2 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L277] RET master() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, tmp=1, tmp_ndt_1=1, tmp_ndt_2=1, tmp_ndt_3=1] [L285] COND TRUE t1_st == 0 [L286] int tmp_ndt_2; [L287] tmp_ndt_2 = __VERIFIER_nondet_int() [L288] COND TRUE \read(tmp_ndt_2) [L290] t1_st = 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, tmp=1, tmp_ndt_1=1, tmp_ndt_2=1, tmp_ndt_3=1] [L291] CALL transmit1() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L78] COND FALSE !(t1_pc == 0) VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L81] COND TRUE t1_pc == 1 [L97] E_2 = 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=2, E_2=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L98] CALL immediate_notify() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=2, E_2=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L425] CALL activate_threads() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=2, E_2=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L387] int tmp ; [L388] int tmp___0 ; [L389] int tmp___1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=2, E_2=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L393] CALL, EXPR is_master_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=2, E_2=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L143] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=2, E_2=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L146] COND TRUE m_pc == 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=2, E_2=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L147] COND FALSE !(M_E == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=2, E_2=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L156] __retres1 = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, __retres1=0, E_1=2, E_2=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L158] return (__retres1); [L393] RET, EXPR is_master_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=2, E_2=1, is_master_triggered()=0, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L393] tmp = is_master_triggered() [L395] COND FALSE !(\read(tmp)) VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=2, E_2=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, tmp=0] [L401] CALL, EXPR is_transmit1_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=2, E_2=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L162] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=2, E_2=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L165] COND TRUE t1_pc == 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=2, E_2=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L166] COND FALSE !(E_1 == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=2, E_2=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L175] __retres1 = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, __retres1=0, E_1=2, E_2=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L177] return (__retres1); [L401] RET, EXPR is_transmit1_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=2, E_2=1, is_transmit1_triggered()=0, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, tmp=0] [L401] tmp___0 = is_transmit1_triggered() [L403] COND FALSE !(\read(tmp___0)) VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=2, E_2=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, tmp=0, tmp___0=0] [L409] CALL, EXPR is_transmit2_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=2, E_2=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L181] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=2, E_2=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L184] COND TRUE t2_pc == 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=2, E_2=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L185] COND TRUE E_2 == 1 [L186] __retres1 = 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, __retres1=1, E_1=2, E_2=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L196] return (__retres1); [L409] RET, EXPR is_transmit2_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=2, E_2=1, is_transmit2_triggered()=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, tmp=0, tmp___0=0] [L409] tmp___1 = is_transmit2_triggered() [L411] COND TRUE \read(tmp___1) [L412] t2_st = 0 [L425] RET activate_threads() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=2, E_2=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0] [L98] RET immediate_notify() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=2, E_2=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0] [L99] E_2 = 2 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0] [L89] COND TRUE 1 [L91] t1_pc = 1 [L92] t1_st = 2 [L291] RET transmit1() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, tmp=1, tmp_ndt_1=1, tmp_ndt_2=1, tmp_ndt_3=1] [L299] COND TRUE t2_st == 0 [L300] int tmp_ndt_3; [L301] tmp_ndt_3 = __VERIFIER_nondet_int() [L302] COND TRUE \read(tmp_ndt_3) [L304] t2_st = 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, tmp=1, tmp_ndt_1=1, tmp_ndt_2=1, tmp_ndt_3=1] [L305] CALL transmit2() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1] [L113] COND FALSE !(t2_pc == 0) VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1] [L116] COND TRUE t2_pc == 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1] [L132] CALL error() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1] [L11] __VERIFIER_error() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1] - StatisticsResult: Ultimate Automizer benchmark data CFG has 23 procedures, 123 locations, 1 error locations. Result: UNSAFE, OverallTime: 14.8s, OverallIterations: 13, TraceHistogramMax: 5, AutomataDifference: 6.5s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 2645 SDtfs, 2389 SDslu, 3408 SDs, 0 SdLazy, 2757 SolverSat, 677 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 2.7s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 1197 GetRequests, 1100 SyntacticMatches, 2 SemanticMatches, 95 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 310 ImplicationChecksByTransitivity, 1.1s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=5053occurred in iteration=12, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 2.3s AutomataMinimizationTime, 12 MinimizatonAttempts, 1456 StatesRemovedByMinimization, 10 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.2s SsaConstructionTime, 0.8s SatisfiabilityAnalysisTime, 2.9s InterpolantComputationTime, 2133 NumberOfCodeBlocks, 2133 NumberOfCodeBlocksAsserted, 17 NumberOfCheckSat, 2493 ConstructedInterpolants, 0 QuantifiedInterpolants, 518724 SizeOfPredicates, 10 NumberOfNonLiveVariables, 2727 ConjunctsInSsa, 38 ConjunctsInUnsatCore, 20 InterpolantComputations, 14 PerfectInterpolantSequences, 1006/1051 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...