java -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata ./data -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/default/automizer/svcomp-Reach-32bit-Automizer_Default.epf --traceabstraction.trace.refinement.strategy SIFA_TAIPAN --sifa.abstract.domain CompoundDomain --rcfgbuilder.size.of.a.code.block LoopFreeBlock --sifa.call.summarizer TopInputCallSummarizer --sifa.fluid SizeLimitFluid --sifa.simplification.technique SIMPLIFY_QUICK -i ../../../trunk/examples/svcomp/array-crafted/xor2.i -------------------------------------------------------------------------------- This is Ultimate 0.1.24-f4eb214f-m [2019-10-13 21:31:16,164 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-10-13 21:31:16,167 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-10-13 21:31:16,183 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-10-13 21:31:16,184 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-10-13 21:31:16,185 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-10-13 21:31:16,186 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-10-13 21:31:16,188 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-10-13 21:31:16,189 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-10-13 21:31:16,190 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-10-13 21:31:16,191 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-10-13 21:31:16,192 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-10-13 21:31:16,192 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-10-13 21:31:16,193 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-10-13 21:31:16,194 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-10-13 21:31:16,195 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-10-13 21:31:16,196 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-10-13 21:31:16,197 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-10-13 21:31:16,199 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-10-13 21:31:16,200 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-10-13 21:31:16,202 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-10-13 21:31:16,203 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-10-13 21:31:16,204 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-10-13 21:31:16,205 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-10-13 21:31:16,207 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-10-13 21:31:16,207 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-10-13 21:31:16,207 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-10-13 21:31:16,208 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-10-13 21:31:16,208 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-10-13 21:31:16,209 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-10-13 21:31:16,210 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-10-13 21:31:16,210 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-10-13 21:31:16,211 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-10-13 21:31:16,212 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-10-13 21:31:16,213 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-10-13 21:31:16,213 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-10-13 21:31:16,214 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-10-13 21:31:16,214 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-10-13 21:31:16,214 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-10-13 21:31:16,215 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-10-13 21:31:16,216 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-10-13 21:31:16,216 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/default/automizer/svcomp-Reach-32bit-Automizer_Default.epf [2019-10-13 21:31:16,230 INFO L113 SettingsManager]: Loading preferences was successful [2019-10-13 21:31:16,230 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-10-13 21:31:16,231 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-10-13 21:31:16,232 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-10-13 21:31:16,232 INFO L138 SettingsManager]: * Use SBE=true [2019-10-13 21:31:16,232 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-10-13 21:31:16,232 INFO L138 SettingsManager]: * sizeof long=4 [2019-10-13 21:31:16,232 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-10-13 21:31:16,233 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-10-13 21:31:16,233 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-10-13 21:31:16,233 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-10-13 21:31:16,233 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-10-13 21:31:16,233 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-10-13 21:31:16,234 INFO L138 SettingsManager]: * sizeof long double=12 [2019-10-13 21:31:16,234 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-10-13 21:31:16,234 INFO L138 SettingsManager]: * Use constant arrays=true [2019-10-13 21:31:16,234 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-10-13 21:31:16,234 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-10-13 21:31:16,235 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-10-13 21:31:16,235 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-10-13 21:31:16,235 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-10-13 21:31:16,235 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-10-13 21:31:16,235 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-10-13 21:31:16,236 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-10-13 21:31:16,236 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-10-13 21:31:16,236 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-10-13 21:31:16,236 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-10-13 21:31:16,236 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-10-13 21:31:16,236 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: Trace refinement strategy -> SIFA_TAIPAN Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.sifa: Abstract Domain -> CompoundDomain Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder: Size of a code block -> LoopFreeBlock Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.sifa: Call Summarizer -> TopInputCallSummarizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.sifa: Fluid -> SizeLimitFluid Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.sifa: Simplification Technique -> SIMPLIFY_QUICK [2019-10-13 21:31:16,519 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-10-13 21:31:16,531 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-10-13 21:31:16,534 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-10-13 21:31:16,536 INFO L271 PluginConnector]: Initializing CDTParser... [2019-10-13 21:31:16,536 INFO L275 PluginConnector]: CDTParser initialized [2019-10-13 21:31:16,537 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/array-crafted/xor2.i [2019-10-13 21:31:16,598 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/59ca5ecef/213a349ad16748abaeabd2e9382743a4/FLAG9916d2fc6 [2019-10-13 21:31:17,051 INFO L306 CDTParser]: Found 1 translation units. [2019-10-13 21:31:17,054 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/array-crafted/xor2.i [2019-10-13 21:31:17,060 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/59ca5ecef/213a349ad16748abaeabd2e9382743a4/FLAG9916d2fc6 [2019-10-13 21:31:17,457 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/59ca5ecef/213a349ad16748abaeabd2e9382743a4 [2019-10-13 21:31:17,467 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-10-13 21:31:17,469 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2019-10-13 21:31:17,470 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-10-13 21:31:17,470 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-10-13 21:31:17,474 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-10-13 21:31:17,474 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 13.10 09:31:17" (1/1) ... [2019-10-13 21:31:17,477 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@7a0511c1 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.10 09:31:17, skipping insertion in model container [2019-10-13 21:31:17,478 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 13.10 09:31:17" (1/1) ... [2019-10-13 21:31:17,485 INFO L142 MainTranslator]: Starting translation in SV-COMP mode [2019-10-13 21:31:17,503 INFO L173 MainTranslator]: Built tables and reachable declarations [2019-10-13 21:31:17,711 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-10-13 21:31:17,720 INFO L188 MainTranslator]: Completed pre-run [2019-10-13 21:31:17,741 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-10-13 21:31:17,756 INFO L192 MainTranslator]: Completed translation [2019-10-13 21:31:17,757 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.10 09:31:17 WrapperNode [2019-10-13 21:31:17,757 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-10-13 21:31:17,757 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-10-13 21:31:17,758 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-10-13 21:31:17,758 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-10-13 21:31:17,854 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.10 09:31:17" (1/1) ... [2019-10-13 21:31:17,854 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.10 09:31:17" (1/1) ... [2019-10-13 21:31:17,861 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.10 09:31:17" (1/1) ... [2019-10-13 21:31:17,862 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.10 09:31:17" (1/1) ... [2019-10-13 21:31:17,873 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.10 09:31:17" (1/1) ... [2019-10-13 21:31:17,884 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.10 09:31:17" (1/1) ... [2019-10-13 21:31:17,893 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.10 09:31:17" (1/1) ... [2019-10-13 21:31:17,895 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-10-13 21:31:17,896 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-10-13 21:31:17,899 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-10-13 21:31:17,899 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-10-13 21:31:17,900 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.10 09:31:17" (1/1) ... No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-10-13 21:31:17,952 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2019-10-13 21:31:17,952 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-10-13 21:31:17,953 INFO L138 BoogieDeclarations]: Found implementation of procedure xor [2019-10-13 21:31:17,953 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2019-10-13 21:31:17,953 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_error [2019-10-13 21:31:17,953 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_int [2019-10-13 21:31:17,953 INFO L130 BoogieDeclarations]: Found specification of procedure xor [2019-10-13 21:31:17,953 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2019-10-13 21:31:17,954 INFO L130 BoogieDeclarations]: Found specification of procedure main [2019-10-13 21:31:17,954 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-10-13 21:31:17,954 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-10-13 21:31:17,954 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-10-13 21:31:17,954 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2019-10-13 21:31:17,955 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-10-13 21:31:18,321 INFO L279 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-10-13 21:31:18,322 INFO L284 CfgBuilder]: Removed 3 assume(true) statements. [2019-10-13 21:31:18,323 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 13.10 09:31:18 BoogieIcfgContainer [2019-10-13 21:31:18,323 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-10-13 21:31:18,324 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-10-13 21:31:18,325 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-10-13 21:31:18,328 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-10-13 21:31:18,328 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 13.10 09:31:17" (1/3) ... [2019-10-13 21:31:18,329 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@5a0dcc and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 13.10 09:31:18, skipping insertion in model container [2019-10-13 21:31:18,329 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.10 09:31:17" (2/3) ... [2019-10-13 21:31:18,329 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@5a0dcc and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 13.10 09:31:18, skipping insertion in model container [2019-10-13 21:31:18,329 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 13.10 09:31:18" (3/3) ... [2019-10-13 21:31:18,331 INFO L109 eAbstractionObserver]: Analyzing ICFG xor2.i [2019-10-13 21:31:18,338 INFO L152 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-10-13 21:31:18,346 INFO L164 ceAbstractionStarter]: Appying trace abstraction to program that has 1 error locations. [2019-10-13 21:31:18,356 INFO L249 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2019-10-13 21:31:18,378 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-10-13 21:31:18,378 INFO L374 AbstractCegarLoop]: Hoare is true [2019-10-13 21:31:18,378 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-10-13 21:31:18,378 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-10-13 21:31:18,378 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-10-13 21:31:18,378 INFO L378 AbstractCegarLoop]: Difference is false [2019-10-13 21:31:18,378 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-10-13 21:31:18,378 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-10-13 21:31:18,394 INFO L276 IsEmpty]: Start isEmpty. Operand 23 states. [2019-10-13 21:31:18,401 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2019-10-13 21:31:18,401 INFO L372 BasicCegarLoop]: Found error trace [2019-10-13 21:31:18,402 INFO L380 BasicCegarLoop]: trace histogram [3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-13 21:31:18,404 INFO L410 AbstractCegarLoop]: === Iteration 1 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-13 21:31:18,409 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-13 21:31:18,409 INFO L82 PathProgramCache]: Analyzing trace with hash -809725829, now seen corresponding path program 1 times [2019-10-13 21:31:18,417 INFO L157 tionRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-10-13 21:31:18,418 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1723308983] [2019-10-13 21:31:18,418 INFO L116 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-13 21:31:18,418 INFO L116 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-13 21:31:18,418 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-13 21:31:18,511 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-13 21:31:18,612 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2019-10-13 21:31:18,613 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1723308983] [2019-10-13 21:31:18,617 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-10-13 21:31:18,617 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-10-13 21:31:18,617 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1067930303] [2019-10-13 21:31:18,624 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-10-13 21:31:18,624 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-10-13 21:31:18,639 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-10-13 21:31:18,640 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-10-13 21:31:18,643 INFO L87 Difference]: Start difference. First operand 23 states. Second operand 3 states. [2019-10-13 21:31:18,675 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-13 21:31:18,675 INFO L93 Difference]: Finished difference Result 41 states and 51 transitions. [2019-10-13 21:31:18,676 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-10-13 21:31:18,678 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 24 [2019-10-13 21:31:18,678 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-13 21:31:18,687 INFO L225 Difference]: With dead ends: 41 [2019-10-13 21:31:18,687 INFO L226 Difference]: Without dead ends: 20 [2019-10-13 21:31:18,691 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-10-13 21:31:18,708 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20 states. [2019-10-13 21:31:18,727 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20 to 20. [2019-10-13 21:31:18,728 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20 states. [2019-10-13 21:31:18,730 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20 states to 20 states and 24 transitions. [2019-10-13 21:31:18,731 INFO L78 Accepts]: Start accepts. Automaton has 20 states and 24 transitions. Word has length 24 [2019-10-13 21:31:18,732 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-13 21:31:18,732 INFO L462 AbstractCegarLoop]: Abstraction has 20 states and 24 transitions. [2019-10-13 21:31:18,732 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-10-13 21:31:18,732 INFO L276 IsEmpty]: Start isEmpty. Operand 20 states and 24 transitions. [2019-10-13 21:31:18,734 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2019-10-13 21:31:18,735 INFO L372 BasicCegarLoop]: Found error trace [2019-10-13 21:31:18,735 INFO L380 BasicCegarLoop]: trace histogram [3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-13 21:31:18,735 INFO L410 AbstractCegarLoop]: === Iteration 2 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-13 21:31:18,736 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-13 21:31:18,736 INFO L82 PathProgramCache]: Analyzing trace with hash 994996090, now seen corresponding path program 1 times [2019-10-13 21:31:18,736 INFO L157 tionRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-10-13 21:31:18,737 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [290150435] [2019-10-13 21:31:18,737 INFO L116 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-13 21:31:18,737 INFO L116 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-13 21:31:18,738 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-13 21:31:18,770 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-13 21:31:18,836 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2019-10-13 21:31:18,837 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [290150435] [2019-10-13 21:31:18,837 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [560737813] [2019-10-13 21:31:18,837 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-13 21:31:18,929 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-13 21:31:18,931 INFO L256 TraceCheckSpWp]: Trace formula consists of 123 conjuncts, 2 conjunts are in the unsatisfiable core [2019-10-13 21:31:18,938 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2019-10-13 21:31:18,976 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2019-10-13 21:31:18,977 INFO L321 TraceCheckSpWp]: Computing backward predicates... [2019-10-13 21:31:19,031 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2019-10-13 21:31:19,031 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 2 imperfect interpolant sequences. [2019-10-13 21:31:19,032 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [3, 3] total 5 [2019-10-13 21:31:19,032 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [785891877] [2019-10-13 21:31:19,035 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-10-13 21:31:19,035 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-10-13 21:31:19,036 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-10-13 21:31:19,036 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-10-13 21:31:19,036 INFO L87 Difference]: Start difference. First operand 20 states and 24 transitions. Second operand 3 states. [2019-10-13 21:31:19,055 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-13 21:31:19,055 INFO L93 Difference]: Finished difference Result 33 states and 43 transitions. [2019-10-13 21:31:19,056 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-10-13 21:31:19,056 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 25 [2019-10-13 21:31:19,057 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-13 21:31:19,058 INFO L225 Difference]: With dead ends: 33 [2019-10-13 21:31:19,058 INFO L226 Difference]: Without dead ends: 21 [2019-10-13 21:31:19,061 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 52 GetRequests, 49 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-10-13 21:31:19,061 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21 states. [2019-10-13 21:31:19,068 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21 to 21. [2019-10-13 21:31:19,069 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21 states. [2019-10-13 21:31:19,072 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21 states to 21 states and 25 transitions. [2019-10-13 21:31:19,073 INFO L78 Accepts]: Start accepts. Automaton has 21 states and 25 transitions. Word has length 25 [2019-10-13 21:31:19,073 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-13 21:31:19,074 INFO L462 AbstractCegarLoop]: Abstraction has 21 states and 25 transitions. [2019-10-13 21:31:19,074 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-10-13 21:31:19,075 INFO L276 IsEmpty]: Start isEmpty. Operand 21 states and 25 transitions. [2019-10-13 21:31:19,077 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2019-10-13 21:31:19,077 INFO L372 BasicCegarLoop]: Found error trace [2019-10-13 21:31:19,077 INFO L380 BasicCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-13 21:31:19,282 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 2 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-13 21:31:19,283 INFO L410 AbstractCegarLoop]: === Iteration 3 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-13 21:31:19,283 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-13 21:31:19,283 INFO L82 PathProgramCache]: Analyzing trace with hash -421018474, now seen corresponding path program 1 times [2019-10-13 21:31:19,283 INFO L157 tionRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-10-13 21:31:19,284 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [863044861] [2019-10-13 21:31:19,284 INFO L116 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-13 21:31:19,285 INFO L116 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-13 21:31:19,285 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-13 21:31:19,312 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-13 21:31:19,348 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2019-10-13 21:31:19,349 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [863044861] [2019-10-13 21:31:19,349 INFO L223 tionRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-10-13 21:31:19,349 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-10-13 21:31:19,350 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1051358131] [2019-10-13 21:31:19,350 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-10-13 21:31:19,350 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-10-13 21:31:19,351 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-10-13 21:31:19,351 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-10-13 21:31:19,351 INFO L87 Difference]: Start difference. First operand 21 states and 25 transitions. Second operand 3 states. [2019-10-13 21:31:19,364 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-13 21:31:19,365 INFO L93 Difference]: Finished difference Result 31 states and 36 transitions. [2019-10-13 21:31:19,365 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-10-13 21:31:19,366 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 28 [2019-10-13 21:31:19,366 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-13 21:31:19,367 INFO L225 Difference]: With dead ends: 31 [2019-10-13 21:31:19,367 INFO L226 Difference]: Without dead ends: 22 [2019-10-13 21:31:19,368 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-10-13 21:31:19,368 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22 states. [2019-10-13 21:31:19,376 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22 to 22. [2019-10-13 21:31:19,377 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22 states. [2019-10-13 21:31:19,380 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22 states to 22 states and 26 transitions. [2019-10-13 21:31:19,380 INFO L78 Accepts]: Start accepts. Automaton has 22 states and 26 transitions. Word has length 28 [2019-10-13 21:31:19,385 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-13 21:31:19,386 INFO L462 AbstractCegarLoop]: Abstraction has 22 states and 26 transitions. [2019-10-13 21:31:19,386 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-10-13 21:31:19,386 INFO L276 IsEmpty]: Start isEmpty. Operand 22 states and 26 transitions. [2019-10-13 21:31:19,387 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2019-10-13 21:31:19,391 INFO L372 BasicCegarLoop]: Found error trace [2019-10-13 21:31:19,391 INFO L380 BasicCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-13 21:31:19,392 INFO L410 AbstractCegarLoop]: === Iteration 4 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-13 21:31:19,392 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-13 21:31:19,392 INFO L82 PathProgramCache]: Analyzing trace with hash -661634715, now seen corresponding path program 1 times [2019-10-13 21:31:19,392 INFO L157 tionRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-10-13 21:31:19,393 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [541411209] [2019-10-13 21:31:19,393 INFO L116 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-13 21:31:19,393 INFO L116 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-13 21:31:19,393 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-13 21:31:19,469 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-13 21:31:19,536 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2019-10-13 21:31:19,536 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [541411209] [2019-10-13 21:31:19,537 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [168157118] [2019-10-13 21:31:19,537 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-13 21:31:19,618 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-13 21:31:19,620 INFO L256 TraceCheckSpWp]: Trace formula consists of 136 conjuncts, 3 conjunts are in the unsatisfiable core [2019-10-13 21:31:19,622 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2019-10-13 21:31:19,638 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2019-10-13 21:31:19,638 INFO L321 TraceCheckSpWp]: Computing backward predicates... [2019-10-13 21:31:19,685 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2019-10-13 21:31:19,686 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSifa [900147222] [2019-10-13 21:31:19,712 INFO L162 IcfgInterpreter]: Started Sifa with 19 locations of interest [2019-10-13 21:31:19,712 INFO L169 IcfgInterpreter]: Building call graph [2019-10-13 21:31:19,718 INFO L174 IcfgInterpreter]: Initial procedures are [ULTIMATE.start] [2019-10-13 21:31:19,726 INFO L179 IcfgInterpreter]: Starting interpretation [2019-10-13 21:31:19,727 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.start with input of size 1 for LOIs [2019-10-13 21:31:19,873 INFO L199 IcfgInterpreter]: Interpreting procedure main with input of size 21 for LOIs [2019-10-13 21:31:22,028 INFO L199 IcfgInterpreter]: Interpreting procedure xor with input of size 1 for LOIs [2019-10-13 21:31:22,108 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.init with input of size 10 for LOIs [2019-10-13 21:31:22,113 INFO L183 IcfgInterpreter]: Interpretation finished [2019-10-13 21:31:22,113 INFO L191 IcfgInterpreter]: Final predicates for locations of interest are: [2019-10-13 21:31:22,114 INFO L193 IcfgInterpreter]: Reachable states at location xorEXIT satisfy 644#(and (not (< xor_~i~0 1000)) (<= 1 xor_~i~0) (= (ite (<= (mod xor_~res~0 4294967296) 2147483647) (mod xor_~res~0 4294967296) (+ (mod xor_~res~0 4294967296) (- 4294967296))) |xor_#res|) (<= 1000 xor_~i~0)) [2019-10-13 21:31:22,114 INFO L193 IcfgInterpreter]: Reachable states at location L26-4 satisfy 73#(and (<= 1000 main_~i~1) (not (< main_~i~1 1000))) [2019-10-13 21:31:22,114 INFO L193 IcfgInterpreter]: Reachable states at location L33 satisfy 592#(exists ((v_prenex_2 Int) (v_xor_~res~0_BEFORE_RETURN_2 Int) (v_prenex_1 Int) (v_xor_~res~0_BEFORE_RETURN_1 Int)) (or (and (not (< main_~i~1 1000)) (<= 0 (+ main_~ret~0 2147483648)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (= main_~ret~0 (mod v_prenex_2 4294967296)) (<= main_~ret~0 2147483647) (<= (mod v_prenex_2 4294967296) 2147483647)) (and (not (< main_~i~1 1000)) (<= 0 (+ main_~ret~0 2147483648)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (= main_~ret~0 (+ (mod v_prenex_1 4294967296) (- 4294967296))) (<= main_~ret~0 2147483647) (not (<= (mod v_prenex_1 4294967296) 2147483647))) (and (not (< main_~i~1 1000)) (<= 0 (+ main_~ret~0 2147483648)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (<= main_~ret~0 2147483647) (<= (mod v_xor_~res~0_BEFORE_RETURN_1 4294967296) 2147483647) (= main_~ret~0 (mod v_xor_~res~0_BEFORE_RETURN_1 4294967296))) (and (not (< main_~i~1 1000)) (<= 0 (+ main_~ret~0 2147483648)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (not (<= (mod v_xor_~res~0_BEFORE_RETURN_2 4294967296) 2147483647)) (= (+ (mod v_xor_~res~0_BEFORE_RETURN_2 4294967296) (- 4294967296)) main_~ret~0) (<= main_~ret~0 2147483647)))) [2019-10-13 21:31:22,114 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initENTRY satisfy 648#(and (= |old(#NULL.base)| |#NULL.base|) (= |#valid| |old(#valid)|) (= |#NULL.offset| |old(#NULL.offset)|)) [2019-10-13 21:31:22,115 INFO L193 IcfgInterpreter]: Reachable states at location L26-3 satisfy 68#true [2019-10-13 21:31:22,115 INFO L193 IcfgInterpreter]: Reachable states at location L12-3 satisfy 639#(<= 1 xor_~i~0) [2019-10-13 21:31:22,116 INFO L193 IcfgInterpreter]: Reachable states at location xorENTRY satisfy 601#true [2019-10-13 21:31:22,117 INFO L193 IcfgInterpreter]: Reachable states at location L-1 satisfy 23#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= 0 (select |#valid| 0)) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-13 21:31:22,117 INFO L193 IcfgInterpreter]: Reachable states at location mainENTRY satisfy 33#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= |#valid| |old(#valid)|) (<= 0 |#NULL.base|) (= |#memory_int| |old(#memory_int)|) (= |#NULL.offset| 0) (= |old(#length)| |#length|) (= 0 (select |old(#valid)| 0)) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-13 21:31:22,118 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initEXIT satisfy 653#(and (= |#valid| (store |old(#valid)| 0 0)) (= 0 |#NULL.base|) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-13 21:31:22,118 INFO L193 IcfgInterpreter]: Reachable states at location L39-1 satisfy 479#true [2019-10-13 21:31:22,119 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.startENTRY satisfy 6#true [2019-10-13 21:31:22,119 INFO L193 IcfgInterpreter]: Reachable states at location mainErr0ASSERT_VIOLATIONERROR_FUNCTION satisfy 234#(or (and (exists ((v_prenex_29 Int) (v_prenex_30 Int) (v_xor_~res~0_BEFORE_RETURN_6 Int) (v_xor_~res~0_BEFORE_RETURN_5 Int)) (or (and (not (< main_~i~2 999)) (<= main_~ret5~0 2147483647) (= main_~ret5~0 (+ (mod v_xor_~res~0_BEFORE_RETURN_6 4294967296) (- 4294967296))) (<= 0 (+ main_~ret5~0 2147483648)) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 3996)) main_~temp~0) (not (<= (mod v_xor_~res~0_BEFORE_RETURN_6 4294967296) 2147483647))) (and (not (<= (mod v_prenex_29 4294967296) 2147483647)) (= main_~ret5~0 (+ (mod v_prenex_29 4294967296) (- 4294967296))) (not (< main_~i~2 999)) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 3996)) main_~temp~0)) (and (= main_~ret5~0 (mod v_prenex_30 4294967296)) (<= (mod v_prenex_30 4294967296) 2147483647) (not (< main_~i~2 999)) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 3996)) main_~temp~0)) (and (= main_~ret5~0 (mod v_xor_~res~0_BEFORE_RETURN_5 4294967296)) (<= (mod v_xor_~res~0_BEFORE_RETURN_5 4294967296) 2147483647) (not (< main_~i~2 999)) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 3996)) main_~temp~0)))) (not (= main_~ret~0 main_~ret5~0))) (and (not (= main_~ret~0 main_~ret2~0)) (exists ((v_prenex_29 Int) (v_prenex_30 Int) (v_xor_~res~0_BEFORE_RETURN_6 Int) (v_xor_~res~0_BEFORE_RETURN_5 Int)) (or (and (not (< main_~i~2 999)) (<= main_~ret5~0 2147483647) (= main_~ret5~0 (+ (mod v_xor_~res~0_BEFORE_RETURN_6 4294967296) (- 4294967296))) (<= 0 (+ main_~ret5~0 2147483648)) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 3996)) main_~temp~0) (not (<= (mod v_xor_~res~0_BEFORE_RETURN_6 4294967296) 2147483647))) (and (not (<= (mod v_prenex_29 4294967296) 2147483647)) (= main_~ret5~0 (+ (mod v_prenex_29 4294967296) (- 4294967296))) (not (< main_~i~2 999)) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 3996)) main_~temp~0)) (and (= main_~ret5~0 (mod v_prenex_30 4294967296)) (<= (mod v_prenex_30 4294967296) 2147483647) (not (< main_~i~2 999)) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 3996)) main_~temp~0)) (and (= main_~ret5~0 (mod v_xor_~res~0_BEFORE_RETURN_5 4294967296)) (<= (mod v_xor_~res~0_BEFORE_RETURN_5 4294967296) 2147483647) (not (< main_~i~2 999)) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 3996)) main_~temp~0)))))) [2019-10-13 21:31:22,119 INFO L193 IcfgInterpreter]: Reachable states at location L39 satisfy 522#(and (not (< main_~i~2 999)) (<= 999 main_~i~2) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 3996)) main_~temp~0)) [2019-10-13 21:31:22,121 INFO L193 IcfgInterpreter]: Reachable states at location L30 satisfy 120#(or (exists ((v_xor_~res~0_BEFORE_RETURN_1 Int) (v_prenex_1 Int)) (or (and (= (mod v_xor_~res~0_BEFORE_RETURN_1 4294967296) |main_#t~ret5|) (not (< main_~i~1 1000)) (<= (mod v_xor_~res~0_BEFORE_RETURN_1 4294967296) 2147483647)) (and (= (+ (mod v_prenex_1 4294967296) (- 4294967296)) |main_#t~ret5|) (not (< main_~i~1 1000)) (not (<= (mod v_prenex_1 4294967296) 2147483647))))) (exists ((v_prenex_2 Int) (v_xor_~res~0_BEFORE_RETURN_2 Int)) (or (and (= |main_#t~ret5| (mod v_prenex_2 4294967296)) (not (< main_~i~1 1000)) (<= (mod v_prenex_2 4294967296) 2147483647)) (and (not (< main_~i~1 1000)) (not (<= (mod v_xor_~res~0_BEFORE_RETURN_2 4294967296) 2147483647)) (= (+ (mod v_xor_~res~0_BEFORE_RETURN_2 4294967296) (- 4294967296)) |main_#t~ret5|))))) [2019-10-13 21:31:22,121 INFO L193 IcfgInterpreter]: Reachable states at location L41 satisfy 424#true [2019-10-13 21:31:22,122 INFO L193 IcfgInterpreter]: Reachable states at location L42 satisfy 313#true [2019-10-13 21:31:22,122 INFO L193 IcfgInterpreter]: Reachable states at location L33-1 satisfy 587#true [2019-10-13 21:31:22,122 INFO L193 IcfgInterpreter]: Reachable states at location L35-3 satisfy 560#true [2019-10-13 21:31:22,505 INFO L223 tionRefinementEngine]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2019-10-13 21:31:22,505 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4, 4, 11] total 17 [2019-10-13 21:31:22,506 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [636170231] [2019-10-13 21:31:22,507 INFO L442 AbstractCegarLoop]: Interpolant automaton has 18 states [2019-10-13 21:31:22,507 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-10-13 21:31:22,508 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2019-10-13 21:31:22,510 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=50, Invalid=256, Unknown=0, NotChecked=0, Total=306 [2019-10-13 21:31:22,510 INFO L87 Difference]: Start difference. First operand 22 states and 26 transitions. Second operand 18 states. [2019-10-13 21:31:23,185 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-13 21:31:23,185 INFO L93 Difference]: Finished difference Result 40 states and 50 transitions. [2019-10-13 21:31:23,185 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2019-10-13 21:31:23,185 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 29 [2019-10-13 21:31:23,186 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-13 21:31:23,186 INFO L225 Difference]: With dead ends: 40 [2019-10-13 21:31:23,186 INFO L226 Difference]: Without dead ends: 25 [2019-10-13 21:31:23,187 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 105 GetRequests, 77 SyntacticMatches, 0 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 198 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=133, Invalid=737, Unknown=0, NotChecked=0, Total=870 [2019-10-13 21:31:23,188 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25 states. [2019-10-13 21:31:23,193 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25 to 25. [2019-10-13 21:31:23,193 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 25 states. [2019-10-13 21:31:23,194 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25 states to 25 states and 29 transitions. [2019-10-13 21:31:23,195 INFO L78 Accepts]: Start accepts. Automaton has 25 states and 29 transitions. Word has length 29 [2019-10-13 21:31:23,195 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-13 21:31:23,195 INFO L462 AbstractCegarLoop]: Abstraction has 25 states and 29 transitions. [2019-10-13 21:31:23,195 INFO L463 AbstractCegarLoop]: Interpolant automaton has 18 states. [2019-10-13 21:31:23,195 INFO L276 IsEmpty]: Start isEmpty. Operand 25 states and 29 transitions. [2019-10-13 21:31:23,196 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2019-10-13 21:31:23,196 INFO L372 BasicCegarLoop]: Found error trace [2019-10-13 21:31:23,197 INFO L380 BasicCegarLoop]: trace histogram [4, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-13 21:31:23,402 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-13 21:31:23,403 INFO L410 AbstractCegarLoop]: === Iteration 5 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-13 21:31:23,403 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-13 21:31:23,403 INFO L82 PathProgramCache]: Analyzing trace with hash -139894362, now seen corresponding path program 2 times [2019-10-13 21:31:23,403 INFO L157 tionRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-10-13 21:31:23,404 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [947997625] [2019-10-13 21:31:23,404 INFO L116 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-13 21:31:23,404 INFO L116 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-13 21:31:23,404 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-13 21:31:23,440 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-13 21:31:23,497 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2019-10-13 21:31:23,498 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [947997625] [2019-10-13 21:31:23,498 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2075187016] [2019-10-13 21:31:23,498 INFO L92 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-13 21:31:23,585 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 2 check-sat command(s) [2019-10-13 21:31:23,586 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-10-13 21:31:23,587 INFO L256 TraceCheckSpWp]: Trace formula consists of 106 conjuncts, 3 conjunts are in the unsatisfiable core [2019-10-13 21:31:23,597 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2019-10-13 21:31:23,620 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 10 proven. 1 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2019-10-13 21:31:23,620 INFO L321 TraceCheckSpWp]: Computing backward predicates... [2019-10-13 21:31:23,653 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 10 proven. 1 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2019-10-13 21:31:23,654 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSifa [875292946] [2019-10-13 21:31:23,659 INFO L162 IcfgInterpreter]: Started Sifa with 19 locations of interest [2019-10-13 21:31:23,659 INFO L169 IcfgInterpreter]: Building call graph [2019-10-13 21:31:23,660 INFO L174 IcfgInterpreter]: Initial procedures are [ULTIMATE.start] [2019-10-13 21:31:23,660 INFO L179 IcfgInterpreter]: Starting interpretation [2019-10-13 21:31:23,660 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.start with input of size 1 for LOIs [2019-10-13 21:31:23,693 INFO L199 IcfgInterpreter]: Interpreting procedure main with input of size 21 for LOIs [2019-10-13 21:31:25,234 INFO L199 IcfgInterpreter]: Interpreting procedure xor with input of size 1 for LOIs [2019-10-13 21:31:25,269 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.init with input of size 10 for LOIs [2019-10-13 21:31:25,273 INFO L183 IcfgInterpreter]: Interpretation finished [2019-10-13 21:31:25,273 INFO L191 IcfgInterpreter]: Final predicates for locations of interest are: [2019-10-13 21:31:25,274 INFO L193 IcfgInterpreter]: Reachable states at location xorEXIT satisfy 644#(and (not (< xor_~i~0 1000)) (<= 1 xor_~i~0) (= (ite (<= (mod xor_~res~0 4294967296) 2147483647) (mod xor_~res~0 4294967296) (+ (mod xor_~res~0 4294967296) (- 4294967296))) |xor_#res|) (<= 1000 xor_~i~0)) [2019-10-13 21:31:25,274 INFO L193 IcfgInterpreter]: Reachable states at location L26-4 satisfy 73#(and (<= 1000 main_~i~1) (not (< main_~i~1 1000))) [2019-10-13 21:31:25,274 INFO L193 IcfgInterpreter]: Reachable states at location L33 satisfy 592#(exists ((v_prenex_196 Int) (v_xor_~res~0_BEFORE_RETURN_27 Int) (v_xor_~res~0_BEFORE_RETURN_28 Int) (v_prenex_195 Int)) (or (and (not (<= (mod v_prenex_196 4294967296) 2147483647)) (not (< main_~i~1 1000)) (<= 0 (+ main_~ret~0 2147483648)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (<= main_~ret~0 2147483647) (= (+ (mod v_prenex_196 4294967296) (- 4294967296)) main_~ret~0)) (and (<= (mod v_xor_~res~0_BEFORE_RETURN_28 4294967296) 2147483647) (not (< main_~i~1 1000)) (<= 0 (+ main_~ret~0 2147483648)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (<= main_~ret~0 2147483647) (= (mod v_xor_~res~0_BEFORE_RETURN_28 4294967296) main_~ret~0)) (and (not (<= (mod v_xor_~res~0_BEFORE_RETURN_27 4294967296) 2147483647)) (not (< main_~i~1 1000)) (<= 0 (+ main_~ret~0 2147483648)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (<= main_~ret~0 2147483647) (= main_~ret~0 (+ (mod v_xor_~res~0_BEFORE_RETURN_27 4294967296) (- 4294967296)))) (and (not (< main_~i~1 1000)) (<= 0 (+ main_~ret~0 2147483648)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (= (mod v_prenex_195 4294967296) main_~ret~0) (<= main_~ret~0 2147483647) (<= (mod v_prenex_195 4294967296) 2147483647)))) [2019-10-13 21:31:25,274 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initENTRY satisfy 648#(and (= |old(#NULL.base)| |#NULL.base|) (= |#valid| |old(#valid)|) (= |#NULL.offset| |old(#NULL.offset)|)) [2019-10-13 21:31:25,275 INFO L193 IcfgInterpreter]: Reachable states at location L26-3 satisfy 68#true [2019-10-13 21:31:25,275 INFO L193 IcfgInterpreter]: Reachable states at location L12-3 satisfy 639#(<= 1 xor_~i~0) [2019-10-13 21:31:25,275 INFO L193 IcfgInterpreter]: Reachable states at location xorENTRY satisfy 601#true [2019-10-13 21:31:25,275 INFO L193 IcfgInterpreter]: Reachable states at location L-1 satisfy 23#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= 0 (select |#valid| 0)) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-13 21:31:25,275 INFO L193 IcfgInterpreter]: Reachable states at location mainENTRY satisfy 33#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= |#valid| |old(#valid)|) (<= 0 |#NULL.base|) (= |#memory_int| |old(#memory_int)|) (= |#NULL.offset| 0) (= |old(#length)| |#length|) (= 0 (select |old(#valid)| 0)) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-13 21:31:25,276 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initEXIT satisfy 653#(and (= |#valid| (store |old(#valid)| 0 0)) (= 0 |#NULL.base|) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-13 21:31:25,276 INFO L193 IcfgInterpreter]: Reachable states at location L39-1 satisfy 479#true [2019-10-13 21:31:25,276 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.startENTRY satisfy 6#true [2019-10-13 21:31:25,276 INFO L193 IcfgInterpreter]: Reachable states at location mainErr0ASSERT_VIOLATIONERROR_FUNCTION satisfy 234#(or (and (not (= main_~ret~0 main_~ret2~0)) (exists ((v_xor_~res~0_BEFORE_RETURN_31 Int) (v_prenex_224 Int) (v_prenex_223 Int) (v_xor_~res~0_BEFORE_RETURN_32 Int)) (or (and (not (<= (mod v_xor_~res~0_BEFORE_RETURN_32 4294967296) 2147483647)) (not (< main_~i~2 999)) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 3996)) main_~temp~0) (= main_~ret5~0 (+ (mod v_xor_~res~0_BEFORE_RETURN_32 4294967296) (- 4294967296)))) (and (= (mod v_xor_~res~0_BEFORE_RETURN_31 4294967296) main_~ret5~0) (not (< main_~i~2 999)) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (<= (mod v_xor_~res~0_BEFORE_RETURN_31 4294967296) 2147483647) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 3996)) main_~temp~0)) (and (not (<= (mod v_prenex_223 4294967296) 2147483647)) (not (< main_~i~2 999)) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= main_~ret5~0 (+ (mod v_prenex_223 4294967296) (- 4294967296))) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 3996)) main_~temp~0)) (and (not (< main_~i~2 999)) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 3996)) main_~temp~0) (<= (mod v_prenex_224 4294967296) 2147483647) (= main_~ret5~0 (mod v_prenex_224 4294967296)))))) (and (exists ((v_xor_~res~0_BEFORE_RETURN_31 Int) (v_prenex_224 Int) (v_prenex_223 Int) (v_xor_~res~0_BEFORE_RETURN_32 Int)) (or (and (not (<= (mod v_xor_~res~0_BEFORE_RETURN_32 4294967296) 2147483647)) (not (< main_~i~2 999)) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 3996)) main_~temp~0) (= main_~ret5~0 (+ (mod v_xor_~res~0_BEFORE_RETURN_32 4294967296) (- 4294967296)))) (and (= (mod v_xor_~res~0_BEFORE_RETURN_31 4294967296) main_~ret5~0) (not (< main_~i~2 999)) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (<= (mod v_xor_~res~0_BEFORE_RETURN_31 4294967296) 2147483647) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 3996)) main_~temp~0)) (and (not (<= (mod v_prenex_223 4294967296) 2147483647)) (not (< main_~i~2 999)) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= main_~ret5~0 (+ (mod v_prenex_223 4294967296) (- 4294967296))) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 3996)) main_~temp~0)) (and (not (< main_~i~2 999)) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 3996)) main_~temp~0) (<= (mod v_prenex_224 4294967296) 2147483647) (= main_~ret5~0 (mod v_prenex_224 4294967296))))) (not (= main_~ret~0 main_~ret5~0)))) [2019-10-13 21:31:25,277 INFO L193 IcfgInterpreter]: Reachable states at location L39 satisfy 522#(and (not (< main_~i~2 999)) (<= 999 main_~i~2) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 3996)) main_~temp~0)) [2019-10-13 21:31:25,277 INFO L193 IcfgInterpreter]: Reachable states at location L30 satisfy 120#(or (exists ((v_prenex_196 Int) (v_xor_~res~0_BEFORE_RETURN_28 Int)) (or (and (not (<= (mod v_prenex_196 4294967296) 2147483647)) (= (+ (mod v_prenex_196 4294967296) (- 4294967296)) |main_#t~ret5|) (not (< main_~i~1 1000))) (and (<= (mod v_xor_~res~0_BEFORE_RETURN_28 4294967296) 2147483647) (not (< main_~i~1 1000)) (= (mod v_xor_~res~0_BEFORE_RETURN_28 4294967296) |main_#t~ret5|)))) (exists ((v_xor_~res~0_BEFORE_RETURN_27 Int) (v_prenex_195 Int)) (or (and (= (+ (mod v_xor_~res~0_BEFORE_RETURN_27 4294967296) (- 4294967296)) |main_#t~ret5|) (not (<= (mod v_xor_~res~0_BEFORE_RETURN_27 4294967296) 2147483647)) (not (< main_~i~1 1000))) (and (= |main_#t~ret5| (mod v_prenex_195 4294967296)) (not (< main_~i~1 1000)) (<= (mod v_prenex_195 4294967296) 2147483647))))) [2019-10-13 21:31:25,277 INFO L193 IcfgInterpreter]: Reachable states at location L41 satisfy 424#true [2019-10-13 21:31:25,277 INFO L193 IcfgInterpreter]: Reachable states at location L42 satisfy 313#true [2019-10-13 21:31:25,277 INFO L193 IcfgInterpreter]: Reachable states at location L33-1 satisfy 587#true [2019-10-13 21:31:25,277 INFO L193 IcfgInterpreter]: Reachable states at location L35-3 satisfy 560#true [2019-10-13 21:31:25,654 INFO L223 tionRefinementEngine]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2019-10-13 21:31:25,654 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 4, 4, 11] total 21 [2019-10-13 21:31:25,655 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1830962028] [2019-10-13 21:31:25,656 INFO L442 AbstractCegarLoop]: Interpolant automaton has 22 states [2019-10-13 21:31:25,656 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-10-13 21:31:25,656 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2019-10-13 21:31:25,656 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=64, Invalid=398, Unknown=0, NotChecked=0, Total=462 [2019-10-13 21:31:25,657 INFO L87 Difference]: Start difference. First operand 25 states and 29 transitions. Second operand 22 states. [2019-10-13 21:31:26,568 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-13 21:31:26,568 INFO L93 Difference]: Finished difference Result 44 states and 58 transitions. [2019-10-13 21:31:26,568 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2019-10-13 21:31:26,568 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 32 [2019-10-13 21:31:26,569 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-13 21:31:26,569 INFO L225 Difference]: With dead ends: 44 [2019-10-13 21:31:26,569 INFO L226 Difference]: Without dead ends: 29 [2019-10-13 21:31:26,571 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 119 GetRequests, 82 SyntacticMatches, 0 SemanticMatches, 37 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 305 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=210, Invalid=1272, Unknown=0, NotChecked=0, Total=1482 [2019-10-13 21:31:26,571 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 29 states. [2019-10-13 21:31:26,576 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 29 to 29. [2019-10-13 21:31:26,576 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 29 states. [2019-10-13 21:31:26,577 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29 states to 29 states and 33 transitions. [2019-10-13 21:31:26,578 INFO L78 Accepts]: Start accepts. Automaton has 29 states and 33 transitions. Word has length 32 [2019-10-13 21:31:26,578 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-13 21:31:26,578 INFO L462 AbstractCegarLoop]: Abstraction has 29 states and 33 transitions. [2019-10-13 21:31:26,578 INFO L463 AbstractCegarLoop]: Interpolant automaton has 22 states. [2019-10-13 21:31:26,578 INFO L276 IsEmpty]: Start isEmpty. Operand 29 states and 33 transitions. [2019-10-13 21:31:26,579 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2019-10-13 21:31:26,580 INFO L372 BasicCegarLoop]: Found error trace [2019-10-13 21:31:26,580 INFO L380 BasicCegarLoop]: trace histogram [12, 5, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-13 21:31:26,791 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 4 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-13 21:31:26,792 INFO L410 AbstractCegarLoop]: === Iteration 6 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-13 21:31:26,793 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-13 21:31:26,793 INFO L82 PathProgramCache]: Analyzing trace with hash -1028595953, now seen corresponding path program 3 times [2019-10-13 21:31:26,793 INFO L157 tionRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-10-13 21:31:26,793 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [851853548] [2019-10-13 21:31:26,794 INFO L116 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-13 21:31:26,794 INFO L116 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-13 21:31:26,794 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-13 21:31:26,834 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-13 21:31:26,900 INFO L134 CoverageAnalysis]: Checked inductivity of 127 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2019-10-13 21:31:26,900 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [851853548] [2019-10-13 21:31:26,900 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1724547394] [2019-10-13 21:31:26,901 INFO L92 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-13 21:31:27,033 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2019-10-13 21:31:27,034 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-10-13 21:31:27,035 INFO L256 TraceCheckSpWp]: Trace formula consists of 187 conjuncts, 7 conjunts are in the unsatisfiable core [2019-10-13 21:31:27,038 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2019-10-13 21:31:27,060 INFO L134 CoverageAnalysis]: Checked inductivity of 127 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2019-10-13 21:31:27,060 INFO L321 TraceCheckSpWp]: Computing backward predicates... [2019-10-13 21:31:27,174 INFO L134 CoverageAnalysis]: Checked inductivity of 127 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2019-10-13 21:31:27,175 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSifa [539311230] [2019-10-13 21:31:27,176 INFO L162 IcfgInterpreter]: Started Sifa with 19 locations of interest [2019-10-13 21:31:27,177 INFO L169 IcfgInterpreter]: Building call graph [2019-10-13 21:31:27,177 INFO L174 IcfgInterpreter]: Initial procedures are [ULTIMATE.start] [2019-10-13 21:31:27,177 INFO L179 IcfgInterpreter]: Starting interpretation [2019-10-13 21:31:27,178 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.start with input of size 1 for LOIs [2019-10-13 21:31:27,202 INFO L199 IcfgInterpreter]: Interpreting procedure main with input of size 21 for LOIs [2019-10-13 21:31:28,464 INFO L199 IcfgInterpreter]: Interpreting procedure xor with input of size 1 for LOIs [2019-10-13 21:31:28,487 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.init with input of size 10 for LOIs [2019-10-13 21:31:28,490 INFO L183 IcfgInterpreter]: Interpretation finished [2019-10-13 21:31:28,490 INFO L191 IcfgInterpreter]: Final predicates for locations of interest are: [2019-10-13 21:31:28,490 INFO L193 IcfgInterpreter]: Reachable states at location xorEXIT satisfy 644#(and (not (< xor_~i~0 1000)) (<= 1 xor_~i~0) (= (ite (<= (mod xor_~res~0 4294967296) 2147483647) (mod xor_~res~0 4294967296) (+ (mod xor_~res~0 4294967296) (- 4294967296))) |xor_#res|) (<= 1000 xor_~i~0)) [2019-10-13 21:31:28,491 INFO L193 IcfgInterpreter]: Reachable states at location L26-4 satisfy 73#(and (<= 1000 main_~i~1) (not (< main_~i~1 1000))) [2019-10-13 21:31:28,491 INFO L193 IcfgInterpreter]: Reachable states at location L33 satisfy 592#(exists ((v_xor_~res~0_BEFORE_RETURN_53 Int) (v_prenex_389 Int) (v_xor_~res~0_BEFORE_RETURN_54 Int) (v_prenex_390 Int)) (or (and (not (< main_~i~1 1000)) (<= 0 (+ main_~ret~0 2147483648)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (not (<= (mod v_prenex_390 4294967296) 2147483647)) (= (+ (mod v_prenex_390 4294967296) (- 4294967296)) main_~ret~0) (<= main_~ret~0 2147483647)) (and (= (mod v_prenex_389 4294967296) main_~ret~0) (not (< main_~i~1 1000)) (<= 0 (+ main_~ret~0 2147483648)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (<= (mod v_prenex_389 4294967296) 2147483647) (<= main_~ret~0 2147483647)) (and (= (mod v_xor_~res~0_BEFORE_RETURN_54 4294967296) main_~ret~0) (not (< main_~i~1 1000)) (<= 0 (+ main_~ret~0 2147483648)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (<= main_~ret~0 2147483647) (<= (mod v_xor_~res~0_BEFORE_RETURN_54 4294967296) 2147483647)) (and (= main_~ret~0 (+ (mod v_xor_~res~0_BEFORE_RETURN_53 4294967296) (- 4294967296))) (not (< main_~i~1 1000)) (<= 0 (+ main_~ret~0 2147483648)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (not (<= (mod v_xor_~res~0_BEFORE_RETURN_53 4294967296) 2147483647)) (<= main_~ret~0 2147483647)))) [2019-10-13 21:31:28,491 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initENTRY satisfy 648#(and (= |old(#NULL.base)| |#NULL.base|) (= |#valid| |old(#valid)|) (= |#NULL.offset| |old(#NULL.offset)|)) [2019-10-13 21:31:28,491 INFO L193 IcfgInterpreter]: Reachable states at location L26-3 satisfy 68#true [2019-10-13 21:31:28,491 INFO L193 IcfgInterpreter]: Reachable states at location L12-3 satisfy 639#(<= 1 xor_~i~0) [2019-10-13 21:31:28,491 INFO L193 IcfgInterpreter]: Reachable states at location xorENTRY satisfy 601#true [2019-10-13 21:31:28,492 INFO L193 IcfgInterpreter]: Reachable states at location L-1 satisfy 23#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= 0 (select |#valid| 0)) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-13 21:31:28,492 INFO L193 IcfgInterpreter]: Reachable states at location mainENTRY satisfy 33#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= |#valid| |old(#valid)|) (<= 0 |#NULL.base|) (= |#memory_int| |old(#memory_int)|) (= |#NULL.offset| 0) (= |old(#length)| |#length|) (= 0 (select |old(#valid)| 0)) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-13 21:31:28,492 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initEXIT satisfy 653#(and (= |#valid| (store |old(#valid)| 0 0)) (= 0 |#NULL.base|) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-13 21:31:28,492 INFO L193 IcfgInterpreter]: Reachable states at location L39-1 satisfy 479#true [2019-10-13 21:31:28,492 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.startENTRY satisfy 6#true [2019-10-13 21:31:28,493 INFO L193 IcfgInterpreter]: Reachable states at location mainErr0ASSERT_VIOLATIONERROR_FUNCTION satisfy 234#(or (and (exists ((v_xor_~res~0_BEFORE_RETURN_57 Int) (v_xor_~res~0_BEFORE_RETURN_58 Int) (v_prenex_417 Int) (v_prenex_418 Int)) (or (and (= main_~ret5~0 (+ (mod v_xor_~res~0_BEFORE_RETURN_57 4294967296) (- 4294967296))) (not (<= (mod v_xor_~res~0_BEFORE_RETURN_57 4294967296) 2147483647)) (not (< main_~i~2 999)) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 3996)) main_~temp~0)) (and (not (< main_~i~2 999)) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 3996)) main_~temp~0) (not (<= (mod v_prenex_418 4294967296) 2147483647)) (= main_~ret5~0 (+ (mod v_prenex_418 4294967296) (- 4294967296)))) (and (= (mod v_prenex_417 4294967296) main_~ret5~0) (<= (mod v_prenex_417 4294967296) 2147483647) (not (< main_~i~2 999)) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 3996)) main_~temp~0)) (and (<= (mod v_xor_~res~0_BEFORE_RETURN_58 4294967296) 2147483647) (not (< main_~i~2 999)) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 3996)) main_~temp~0) (= main_~ret5~0 (mod v_xor_~res~0_BEFORE_RETURN_58 4294967296))))) (not (= main_~ret~0 main_~ret5~0))) (and (not (= main_~ret~0 main_~ret2~0)) (exists ((v_xor_~res~0_BEFORE_RETURN_57 Int) (v_xor_~res~0_BEFORE_RETURN_58 Int) (v_prenex_417 Int) (v_prenex_418 Int)) (or (and (= main_~ret5~0 (+ (mod v_xor_~res~0_BEFORE_RETURN_57 4294967296) (- 4294967296))) (not (<= (mod v_xor_~res~0_BEFORE_RETURN_57 4294967296) 2147483647)) (not (< main_~i~2 999)) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 3996)) main_~temp~0)) (and (not (< main_~i~2 999)) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 3996)) main_~temp~0) (not (<= (mod v_prenex_418 4294967296) 2147483647)) (= main_~ret5~0 (+ (mod v_prenex_418 4294967296) (- 4294967296)))) (and (= (mod v_prenex_417 4294967296) main_~ret5~0) (<= (mod v_prenex_417 4294967296) 2147483647) (not (< main_~i~2 999)) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 3996)) main_~temp~0)) (and (<= (mod v_xor_~res~0_BEFORE_RETURN_58 4294967296) 2147483647) (not (< main_~i~2 999)) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 3996)) main_~temp~0) (= main_~ret5~0 (mod v_xor_~res~0_BEFORE_RETURN_58 4294967296))))))) [2019-10-13 21:31:28,493 INFO L193 IcfgInterpreter]: Reachable states at location L39 satisfy 522#(and (not (< main_~i~2 999)) (<= 999 main_~i~2) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 3996)) main_~temp~0)) [2019-10-13 21:31:28,493 INFO L193 IcfgInterpreter]: Reachable states at location L30 satisfy 120#(or (exists ((v_xor_~res~0_BEFORE_RETURN_53 Int) (v_prenex_389 Int)) (or (and (= |main_#t~ret5| (+ (mod v_xor_~res~0_BEFORE_RETURN_53 4294967296) (- 4294967296))) (not (< main_~i~1 1000)) (not (<= (mod v_xor_~res~0_BEFORE_RETURN_53 4294967296) 2147483647))) (and (not (< main_~i~1 1000)) (<= (mod v_prenex_389 4294967296) 2147483647) (= (mod v_prenex_389 4294967296) |main_#t~ret5|)))) (exists ((v_xor_~res~0_BEFORE_RETURN_54 Int) (v_prenex_390 Int)) (or (and (not (< main_~i~1 1000)) (not (<= (mod v_prenex_390 4294967296) 2147483647)) (= |main_#t~ret5| (+ (mod v_prenex_390 4294967296) (- 4294967296)))) (and (= (mod v_xor_~res~0_BEFORE_RETURN_54 4294967296) |main_#t~ret5|) (not (< main_~i~1 1000)) (<= (mod v_xor_~res~0_BEFORE_RETURN_54 4294967296) 2147483647))))) [2019-10-13 21:31:28,493 INFO L193 IcfgInterpreter]: Reachable states at location L41 satisfy 424#true [2019-10-13 21:31:28,493 INFO L193 IcfgInterpreter]: Reachable states at location L42 satisfy 313#true [2019-10-13 21:31:28,494 INFO L193 IcfgInterpreter]: Reachable states at location L33-1 satisfy 587#true [2019-10-13 21:31:28,494 INFO L193 IcfgInterpreter]: Reachable states at location L35-3 satisfy 560#true [2019-10-13 21:31:28,816 INFO L223 tionRefinementEngine]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2019-10-13 21:31:28,817 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8, 8, 11] total 25 [2019-10-13 21:31:28,817 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1358577331] [2019-10-13 21:31:28,818 INFO L442 AbstractCegarLoop]: Interpolant automaton has 26 states [2019-10-13 21:31:28,818 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-10-13 21:31:28,819 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2019-10-13 21:31:28,820 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=134, Invalid=516, Unknown=0, NotChecked=0, Total=650 [2019-10-13 21:31:28,820 INFO L87 Difference]: Start difference. First operand 29 states and 33 transitions. Second operand 26 states. [2019-10-13 21:31:29,706 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-13 21:31:29,707 INFO L93 Difference]: Finished difference Result 54 states and 68 transitions. [2019-10-13 21:31:29,707 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2019-10-13 21:31:29,707 INFO L78 Accepts]: Start accepts. Automaton has 26 states. Word has length 42 [2019-10-13 21:31:29,708 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-13 21:31:29,709 INFO L225 Difference]: With dead ends: 54 [2019-10-13 21:31:29,709 INFO L226 Difference]: Without dead ends: 36 [2019-10-13 21:31:29,710 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 156 GetRequests, 112 SyntacticMatches, 0 SemanticMatches, 44 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 552 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=369, Invalid=1701, Unknown=0, NotChecked=0, Total=2070 [2019-10-13 21:31:29,711 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 36 states. [2019-10-13 21:31:29,716 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 36 to 36. [2019-10-13 21:31:29,716 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 36 states. [2019-10-13 21:31:29,717 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 36 states to 36 states and 40 transitions. [2019-10-13 21:31:29,717 INFO L78 Accepts]: Start accepts. Automaton has 36 states and 40 transitions. Word has length 42 [2019-10-13 21:31:29,717 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-13 21:31:29,718 INFO L462 AbstractCegarLoop]: Abstraction has 36 states and 40 transitions. [2019-10-13 21:31:29,718 INFO L463 AbstractCegarLoop]: Interpolant automaton has 26 states. [2019-10-13 21:31:29,718 INFO L276 IsEmpty]: Start isEmpty. Operand 36 states and 40 transitions. [2019-10-13 21:31:29,719 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2019-10-13 21:31:29,719 INFO L372 BasicCegarLoop]: Found error trace [2019-10-13 21:31:29,719 INFO L380 BasicCegarLoop]: trace histogram [12, 12, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-13 21:31:29,922 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 5 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-13 21:31:29,923 INFO L410 AbstractCegarLoop]: === Iteration 7 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-13 21:31:29,923 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-13 21:31:29,924 INFO L82 PathProgramCache]: Analyzing trace with hash -500498258, now seen corresponding path program 4 times [2019-10-13 21:31:29,924 INFO L157 tionRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-10-13 21:31:29,924 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [942477200] [2019-10-13 21:31:29,924 INFO L116 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-13 21:31:29,925 INFO L116 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-13 21:31:29,925 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-13 21:31:29,955 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-13 21:31:30,111 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2019-10-13 21:31:30,112 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [942477200] [2019-10-13 21:31:30,112 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [164694921] [2019-10-13 21:31:30,112 INFO L92 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-13 21:31:30,260 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-13 21:31:30,261 INFO L256 TraceCheckSpWp]: Trace formula consists of 229 conjuncts, 14 conjunts are in the unsatisfiable core [2019-10-13 21:31:30,263 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2019-10-13 21:31:30,278 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2019-10-13 21:31:30,278 INFO L321 TraceCheckSpWp]: Computing backward predicates... [2019-10-13 21:31:30,529 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2019-10-13 21:31:30,530 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSifa [1871295022] [2019-10-13 21:31:30,531 INFO L162 IcfgInterpreter]: Started Sifa with 19 locations of interest [2019-10-13 21:31:30,532 INFO L169 IcfgInterpreter]: Building call graph [2019-10-13 21:31:30,532 INFO L174 IcfgInterpreter]: Initial procedures are [ULTIMATE.start] [2019-10-13 21:31:30,532 INFO L179 IcfgInterpreter]: Starting interpretation [2019-10-13 21:31:30,532 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.start with input of size 1 for LOIs [2019-10-13 21:31:30,553 INFO L199 IcfgInterpreter]: Interpreting procedure main with input of size 21 for LOIs [2019-10-13 21:31:31,925 INFO L199 IcfgInterpreter]: Interpreting procedure xor with input of size 1 for LOIs [2019-10-13 21:31:31,953 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.init with input of size 10 for LOIs [2019-10-13 21:31:31,957 INFO L183 IcfgInterpreter]: Interpretation finished [2019-10-13 21:31:31,958 INFO L191 IcfgInterpreter]: Final predicates for locations of interest are: [2019-10-13 21:31:31,958 INFO L193 IcfgInterpreter]: Reachable states at location xorEXIT satisfy 644#(and (not (< xor_~i~0 1000)) (<= 1 xor_~i~0) (= (ite (<= (mod xor_~res~0 4294967296) 2147483647) (mod xor_~res~0 4294967296) (+ (mod xor_~res~0 4294967296) (- 4294967296))) |xor_#res|) (<= 1000 xor_~i~0)) [2019-10-13 21:31:31,958 INFO L193 IcfgInterpreter]: Reachable states at location L26-4 satisfy 73#(and (<= 1000 main_~i~1) (not (< main_~i~1 1000))) [2019-10-13 21:31:31,958 INFO L193 IcfgInterpreter]: Reachable states at location L33 satisfy 592#(exists ((v_xor_~res~0_BEFORE_RETURN_79 Int) (v_prenex_583 Int) (v_prenex_584 Int) (v_xor_~res~0_BEFORE_RETURN_80 Int)) (or (and (= main_~ret~0 (+ (mod v_xor_~res~0_BEFORE_RETURN_79 4294967296) (- 4294967296))) (not (< main_~i~1 1000)) (<= 0 (+ main_~ret~0 2147483648)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (not (<= (mod v_xor_~res~0_BEFORE_RETURN_79 4294967296) 2147483647)) (<= main_~ret~0 2147483647)) (and (not (< main_~i~1 1000)) (<= 0 (+ main_~ret~0 2147483648)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (<= main_~ret~0 2147483647) (= (mod v_prenex_584 4294967296) main_~ret~0) (<= (mod v_prenex_584 4294967296) 2147483647)) (and (<= (mod v_prenex_583 4294967296) 2147483647) (not (< main_~i~1 1000)) (<= 0 (+ main_~ret~0 2147483648)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (= main_~ret~0 (mod v_prenex_583 4294967296)) (<= main_~ret~0 2147483647)) (and (= main_~ret~0 (+ (mod v_xor_~res~0_BEFORE_RETURN_80 4294967296) (- 4294967296))) (not (< main_~i~1 1000)) (<= 0 (+ main_~ret~0 2147483648)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (not (<= (mod v_xor_~res~0_BEFORE_RETURN_80 4294967296) 2147483647)) (<= main_~ret~0 2147483647)))) [2019-10-13 21:31:31,959 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initENTRY satisfy 648#(and (= |old(#NULL.base)| |#NULL.base|) (= |#valid| |old(#valid)|) (= |#NULL.offset| |old(#NULL.offset)|)) [2019-10-13 21:31:31,959 INFO L193 IcfgInterpreter]: Reachable states at location L26-3 satisfy 68#true [2019-10-13 21:31:31,959 INFO L193 IcfgInterpreter]: Reachable states at location L12-3 satisfy 639#(<= 1 xor_~i~0) [2019-10-13 21:31:31,960 INFO L193 IcfgInterpreter]: Reachable states at location xorENTRY satisfy 601#true [2019-10-13 21:31:31,960 INFO L193 IcfgInterpreter]: Reachable states at location L-1 satisfy 23#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= 0 (select |#valid| 0)) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-13 21:31:31,960 INFO L193 IcfgInterpreter]: Reachable states at location mainENTRY satisfy 33#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= |#valid| |old(#valid)|) (<= 0 |#NULL.base|) (= |#memory_int| |old(#memory_int)|) (= |#NULL.offset| 0) (= |old(#length)| |#length|) (= 0 (select |old(#valid)| 0)) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-13 21:31:31,961 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initEXIT satisfy 653#(and (= |#valid| (store |old(#valid)| 0 0)) (= 0 |#NULL.base|) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-13 21:31:31,961 INFO L193 IcfgInterpreter]: Reachable states at location L39-1 satisfy 479#true [2019-10-13 21:31:31,961 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.startENTRY satisfy 6#true [2019-10-13 21:31:31,961 INFO L193 IcfgInterpreter]: Reachable states at location mainErr0ASSERT_VIOLATIONERROR_FUNCTION satisfy 234#(or (and (exists ((v_prenex_611 Int) (v_prenex_612 Int) (v_xor_~res~0_BEFORE_RETURN_83 Int) (v_xor_~res~0_BEFORE_RETURN_84 Int)) (or (and (not (<= (mod v_xor_~res~0_BEFORE_RETURN_84 4294967296) 2147483647)) (not (< main_~i~2 999)) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 3996)) main_~temp~0) (= (+ (mod v_xor_~res~0_BEFORE_RETURN_84 4294967296) (- 4294967296)) main_~ret5~0)) (and (not (<= (mod v_prenex_611 4294967296) 2147483647)) (not (< main_~i~2 999)) (<= main_~ret5~0 2147483647) (= main_~ret5~0 (+ (mod v_prenex_611 4294967296) (- 4294967296))) (<= 0 (+ main_~ret5~0 2147483648)) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 3996)) main_~temp~0)) (and (not (< main_~i~2 999)) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (<= (mod v_prenex_612 4294967296) 2147483647) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 3996)) main_~temp~0) (= (mod v_prenex_612 4294967296) main_~ret5~0)) (and (= main_~ret5~0 (mod v_xor_~res~0_BEFORE_RETURN_83 4294967296)) (<= (mod v_xor_~res~0_BEFORE_RETURN_83 4294967296) 2147483647) (not (< main_~i~2 999)) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 3996)) main_~temp~0)))) (not (= main_~ret~0 main_~ret5~0))) (and (not (= main_~ret~0 main_~ret2~0)) (exists ((v_prenex_611 Int) (v_prenex_612 Int) (v_xor_~res~0_BEFORE_RETURN_83 Int) (v_xor_~res~0_BEFORE_RETURN_84 Int)) (or (and (not (<= (mod v_xor_~res~0_BEFORE_RETURN_84 4294967296) 2147483647)) (not (< main_~i~2 999)) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 3996)) main_~temp~0) (= (+ (mod v_xor_~res~0_BEFORE_RETURN_84 4294967296) (- 4294967296)) main_~ret5~0)) (and (not (<= (mod v_prenex_611 4294967296) 2147483647)) (not (< main_~i~2 999)) (<= main_~ret5~0 2147483647) (= main_~ret5~0 (+ (mod v_prenex_611 4294967296) (- 4294967296))) (<= 0 (+ main_~ret5~0 2147483648)) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 3996)) main_~temp~0)) (and (not (< main_~i~2 999)) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (<= (mod v_prenex_612 4294967296) 2147483647) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 3996)) main_~temp~0) (= (mod v_prenex_612 4294967296) main_~ret5~0)) (and (= main_~ret5~0 (mod v_xor_~res~0_BEFORE_RETURN_83 4294967296)) (<= (mod v_xor_~res~0_BEFORE_RETURN_83 4294967296) 2147483647) (not (< main_~i~2 999)) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 3996)) main_~temp~0)))))) [2019-10-13 21:31:31,962 INFO L193 IcfgInterpreter]: Reachable states at location L39 satisfy 522#(and (not (< main_~i~2 999)) (<= 999 main_~i~2) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 3996)) main_~temp~0)) [2019-10-13 21:31:31,962 INFO L193 IcfgInterpreter]: Reachable states at location L30 satisfy 120#(or (exists ((v_xor_~res~0_BEFORE_RETURN_79 Int) (v_prenex_583 Int)) (or (and (= (mod v_prenex_583 4294967296) |main_#t~ret5|) (not (< main_~i~1 1000)) (<= (mod v_prenex_583 4294967296) 2147483647)) (and (not (< main_~i~1 1000)) (not (<= (mod v_xor_~res~0_BEFORE_RETURN_79 4294967296) 2147483647)) (= |main_#t~ret5| (+ (mod v_xor_~res~0_BEFORE_RETURN_79 4294967296) (- 4294967296)))))) (exists ((v_prenex_584 Int) (v_xor_~res~0_BEFORE_RETURN_80 Int)) (or (and (not (< main_~i~1 1000)) (= (mod v_prenex_584 4294967296) |main_#t~ret5|) (<= (mod v_prenex_584 4294967296) 2147483647)) (and (not (< main_~i~1 1000)) (not (<= (mod v_xor_~res~0_BEFORE_RETURN_80 4294967296) 2147483647)) (= |main_#t~ret5| (+ (mod v_xor_~res~0_BEFORE_RETURN_80 4294967296) (- 4294967296))))))) [2019-10-13 21:31:31,963 INFO L193 IcfgInterpreter]: Reachable states at location L41 satisfy 424#true [2019-10-13 21:31:31,963 INFO L193 IcfgInterpreter]: Reachable states at location L42 satisfy 313#true [2019-10-13 21:31:31,963 INFO L193 IcfgInterpreter]: Reachable states at location L33-1 satisfy 587#true [2019-10-13 21:31:31,963 INFO L193 IcfgInterpreter]: Reachable states at location L35-3 satisfy 560#true [2019-10-13 21:31:32,585 INFO L223 tionRefinementEngine]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2019-10-13 21:31:32,585 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 15, 15, 11] total 39 [2019-10-13 21:31:32,586 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1734990931] [2019-10-13 21:31:32,587 INFO L442 AbstractCegarLoop]: Interpolant automaton has 40 states [2019-10-13 21:31:32,587 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-10-13 21:31:32,587 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 40 interpolants. [2019-10-13 21:31:32,588 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=435, Invalid=1125, Unknown=0, NotChecked=0, Total=1560 [2019-10-13 21:31:32,588 INFO L87 Difference]: Start difference. First operand 36 states and 40 transitions. Second operand 40 states. [2019-10-13 21:31:34,156 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-13 21:31:34,156 INFO L93 Difference]: Finished difference Result 68 states and 89 transitions. [2019-10-13 21:31:34,156 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 39 states. [2019-10-13 21:31:34,156 INFO L78 Accepts]: Start accepts. Automaton has 40 states. Word has length 49 [2019-10-13 21:31:34,157 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-13 21:31:34,158 INFO L225 Difference]: With dead ends: 68 [2019-10-13 21:31:34,158 INFO L226 Difference]: Without dead ends: 50 [2019-10-13 21:31:34,160 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 198 GetRequests, 126 SyntacticMatches, 0 SemanticMatches, 72 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1364 ImplicationChecksByTransitivity, 2.2s TimeCoverageRelationStatistics Valid=1244, Invalid=4158, Unknown=0, NotChecked=0, Total=5402 [2019-10-13 21:31:34,161 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 50 states. [2019-10-13 21:31:34,167 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 50 to 50. [2019-10-13 21:31:34,167 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 50 states. [2019-10-13 21:31:34,168 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 50 states to 50 states and 54 transitions. [2019-10-13 21:31:34,168 INFO L78 Accepts]: Start accepts. Automaton has 50 states and 54 transitions. Word has length 49 [2019-10-13 21:31:34,169 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-13 21:31:34,169 INFO L462 AbstractCegarLoop]: Abstraction has 50 states and 54 transitions. [2019-10-13 21:31:34,169 INFO L463 AbstractCegarLoop]: Interpolant automaton has 40 states. [2019-10-13 21:31:34,169 INFO L276 IsEmpty]: Start isEmpty. Operand 50 states and 54 transitions. [2019-10-13 21:31:34,170 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 64 [2019-10-13 21:31:34,170 INFO L372 BasicCegarLoop]: Found error trace [2019-10-13 21:31:34,170 INFO L380 BasicCegarLoop]: trace histogram [26, 12, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-13 21:31:34,373 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 6 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-13 21:31:34,374 INFO L410 AbstractCegarLoop]: === Iteration 8 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-13 21:31:34,375 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-13 21:31:34,375 INFO L82 PathProgramCache]: Analyzing trace with hash 1795685774, now seen corresponding path program 5 times [2019-10-13 21:31:34,375 INFO L157 tionRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-10-13 21:31:34,375 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1938536233] [2019-10-13 21:31:34,376 INFO L116 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-13 21:31:34,376 INFO L116 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-13 21:31:34,376 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-13 21:31:34,441 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-13 21:31:34,809 INFO L134 CoverageAnalysis]: Checked inductivity of 463 backedges. 0 proven. 351 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2019-10-13 21:31:34,809 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1938536233] [2019-10-13 21:31:34,809 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1557127145] [2019-10-13 21:31:34,809 INFO L92 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-13 21:31:34,982 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 3 check-sat command(s) [2019-10-13 21:31:34,982 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-10-13 21:31:34,983 INFO L256 TraceCheckSpWp]: Trace formula consists of 137 conjuncts, 3 conjunts are in the unsatisfiable core [2019-10-13 21:31:34,986 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2019-10-13 21:31:35,027 INFO L134 CoverageAnalysis]: Checked inductivity of 463 backedges. 54 proven. 1 refuted. 0 times theorem prover too weak. 408 trivial. 0 not checked. [2019-10-13 21:31:35,027 INFO L321 TraceCheckSpWp]: Computing backward predicates... [2019-10-13 21:31:35,073 INFO L134 CoverageAnalysis]: Checked inductivity of 463 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 462 trivial. 0 not checked. [2019-10-13 21:31:35,073 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSifa [73800181] [2019-10-13 21:31:35,075 INFO L162 IcfgInterpreter]: Started Sifa with 19 locations of interest [2019-10-13 21:31:35,075 INFO L169 IcfgInterpreter]: Building call graph [2019-10-13 21:31:35,075 INFO L174 IcfgInterpreter]: Initial procedures are [ULTIMATE.start] [2019-10-13 21:31:35,076 INFO L179 IcfgInterpreter]: Starting interpretation [2019-10-13 21:31:35,076 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.start with input of size 1 for LOIs [2019-10-13 21:31:35,098 INFO L199 IcfgInterpreter]: Interpreting procedure main with input of size 21 for LOIs [2019-10-13 21:31:36,340 INFO L199 IcfgInterpreter]: Interpreting procedure xor with input of size 1 for LOIs [2019-10-13 21:31:36,358 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.init with input of size 10 for LOIs [2019-10-13 21:31:36,360 INFO L183 IcfgInterpreter]: Interpretation finished [2019-10-13 21:31:36,360 INFO L191 IcfgInterpreter]: Final predicates for locations of interest are: [2019-10-13 21:31:36,361 INFO L193 IcfgInterpreter]: Reachable states at location xorEXIT satisfy 644#(and (not (< xor_~i~0 1000)) (<= 1 xor_~i~0) (= (ite (<= (mod xor_~res~0 4294967296) 2147483647) (mod xor_~res~0 4294967296) (+ (mod xor_~res~0 4294967296) (- 4294967296))) |xor_#res|) (<= 1000 xor_~i~0)) [2019-10-13 21:31:36,361 INFO L193 IcfgInterpreter]: Reachable states at location L26-4 satisfy 73#(and (<= 1000 main_~i~1) (not (< main_~i~1 1000))) [2019-10-13 21:31:36,361 INFO L193 IcfgInterpreter]: Reachable states at location L33 satisfy 592#(exists ((v_xor_~res~0_BEFORE_RETURN_105 Int) (v_prenex_777 Int) (v_xor_~res~0_BEFORE_RETURN_106 Int) (v_prenex_778 Int)) (or (and (not (<= (mod v_prenex_778 4294967296) 2147483647)) (not (< main_~i~1 1000)) (<= 0 (+ main_~ret~0 2147483648)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (<= main_~ret~0 2147483647) (= (+ (mod v_prenex_778 4294967296) (- 4294967296)) main_~ret~0)) (and (<= (mod v_xor_~res~0_BEFORE_RETURN_106 4294967296) 2147483647) (= main_~ret~0 (mod v_xor_~res~0_BEFORE_RETURN_106 4294967296)) (not (< main_~i~1 1000)) (<= 0 (+ main_~ret~0 2147483648)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (<= main_~ret~0 2147483647)) (and (not (<= (mod v_xor_~res~0_BEFORE_RETURN_105 4294967296) 2147483647)) (not (< main_~i~1 1000)) (<= 0 (+ main_~ret~0 2147483648)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (<= main_~ret~0 2147483647) (= main_~ret~0 (+ (mod v_xor_~res~0_BEFORE_RETURN_105 4294967296) (- 4294967296)))) (and (<= (mod v_prenex_777 4294967296) 2147483647) (= main_~ret~0 (mod v_prenex_777 4294967296)) (not (< main_~i~1 1000)) (<= 0 (+ main_~ret~0 2147483648)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (<= main_~ret~0 2147483647)))) [2019-10-13 21:31:36,361 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initENTRY satisfy 648#(and (= |old(#NULL.base)| |#NULL.base|) (= |#valid| |old(#valid)|) (= |#NULL.offset| |old(#NULL.offset)|)) [2019-10-13 21:31:36,361 INFO L193 IcfgInterpreter]: Reachable states at location L26-3 satisfy 68#true [2019-10-13 21:31:36,362 INFO L193 IcfgInterpreter]: Reachable states at location L12-3 satisfy 639#(<= 1 xor_~i~0) [2019-10-13 21:31:36,362 INFO L193 IcfgInterpreter]: Reachable states at location xorENTRY satisfy 601#true [2019-10-13 21:31:36,362 INFO L193 IcfgInterpreter]: Reachable states at location L-1 satisfy 23#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= 0 (select |#valid| 0)) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-13 21:31:36,362 INFO L193 IcfgInterpreter]: Reachable states at location mainENTRY satisfy 33#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= |#valid| |old(#valid)|) (<= 0 |#NULL.base|) (= |#memory_int| |old(#memory_int)|) (= |#NULL.offset| 0) (= |old(#length)| |#length|) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0) (= 0 (select |old(#valid)| 0))) [2019-10-13 21:31:36,362 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initEXIT satisfy 653#(and (= |#valid| (store |old(#valid)| 0 0)) (= 0 |#NULL.base|) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-13 21:31:36,362 INFO L193 IcfgInterpreter]: Reachable states at location L39-1 satisfy 479#true [2019-10-13 21:31:36,363 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.startENTRY satisfy 6#true [2019-10-13 21:31:36,363 INFO L193 IcfgInterpreter]: Reachable states at location mainErr0ASSERT_VIOLATIONERROR_FUNCTION satisfy 234#(or (and (exists ((v_xor_~res~0_BEFORE_RETURN_109 Int) (v_prenex_806 Int) (v_xor_~res~0_BEFORE_RETURN_110 Int) (v_prenex_805 Int)) (or (and (= (+ (mod v_xor_~res~0_BEFORE_RETURN_109 4294967296) (- 4294967296)) main_~ret5~0) (not (< main_~i~2 999)) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 3996)) main_~temp~0) (not (<= (mod v_xor_~res~0_BEFORE_RETURN_109 4294967296) 2147483647))) (and (not (< main_~i~2 999)) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (<= (mod v_xor_~res~0_BEFORE_RETURN_110 4294967296) 2147483647) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 3996)) main_~temp~0) (= (mod v_xor_~res~0_BEFORE_RETURN_110 4294967296) main_~ret5~0)) (and (= main_~ret5~0 (mod v_prenex_805 4294967296)) (not (< main_~i~2 999)) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 3996)) main_~temp~0) (<= (mod v_prenex_805 4294967296) 2147483647)) (and (not (<= (mod v_prenex_806 4294967296) 2147483647)) (= (+ (mod v_prenex_806 4294967296) (- 4294967296)) main_~ret5~0) (not (< main_~i~2 999)) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 3996)) main_~temp~0)))) (not (= main_~ret~0 main_~ret5~0))) (and (not (= main_~ret~0 main_~ret2~0)) (exists ((v_xor_~res~0_BEFORE_RETURN_109 Int) (v_prenex_806 Int) (v_xor_~res~0_BEFORE_RETURN_110 Int) (v_prenex_805 Int)) (or (and (= (+ (mod v_xor_~res~0_BEFORE_RETURN_109 4294967296) (- 4294967296)) main_~ret5~0) (not (< main_~i~2 999)) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 3996)) main_~temp~0) (not (<= (mod v_xor_~res~0_BEFORE_RETURN_109 4294967296) 2147483647))) (and (not (< main_~i~2 999)) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (<= (mod v_xor_~res~0_BEFORE_RETURN_110 4294967296) 2147483647) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 3996)) main_~temp~0) (= (mod v_xor_~res~0_BEFORE_RETURN_110 4294967296) main_~ret5~0)) (and (= main_~ret5~0 (mod v_prenex_805 4294967296)) (not (< main_~i~2 999)) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 3996)) main_~temp~0) (<= (mod v_prenex_805 4294967296) 2147483647)) (and (not (<= (mod v_prenex_806 4294967296) 2147483647)) (= (+ (mod v_prenex_806 4294967296) (- 4294967296)) main_~ret5~0) (not (< main_~i~2 999)) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 3996)) main_~temp~0)))))) [2019-10-13 21:31:36,363 INFO L193 IcfgInterpreter]: Reachable states at location L39 satisfy 522#(and (not (< main_~i~2 999)) (<= 999 main_~i~2) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 3996)) main_~temp~0)) [2019-10-13 21:31:36,363 INFO L193 IcfgInterpreter]: Reachable states at location L30 satisfy 120#(or (exists ((v_xor_~res~0_BEFORE_RETURN_106 Int) (v_prenex_778 Int)) (or (and (= |main_#t~ret5| (+ (mod v_prenex_778 4294967296) (- 4294967296))) (not (<= (mod v_prenex_778 4294967296) 2147483647)) (not (< main_~i~1 1000))) (and (<= (mod v_xor_~res~0_BEFORE_RETURN_106 4294967296) 2147483647) (= (mod v_xor_~res~0_BEFORE_RETURN_106 4294967296) |main_#t~ret5|) (not (< main_~i~1 1000))))) (exists ((v_xor_~res~0_BEFORE_RETURN_105 Int) (v_prenex_777 Int)) (or (and (not (<= (mod v_xor_~res~0_BEFORE_RETURN_105 4294967296) 2147483647)) (not (< main_~i~1 1000)) (= (+ (mod v_xor_~res~0_BEFORE_RETURN_105 4294967296) (- 4294967296)) |main_#t~ret5|)) (and (<= (mod v_prenex_777 4294967296) 2147483647) (= (mod v_prenex_777 4294967296) |main_#t~ret5|) (not (< main_~i~1 1000)))))) [2019-10-13 21:31:36,367 INFO L193 IcfgInterpreter]: Reachable states at location L41 satisfy 424#true [2019-10-13 21:31:36,367 INFO L193 IcfgInterpreter]: Reachable states at location L42 satisfy 313#true [2019-10-13 21:31:36,367 INFO L193 IcfgInterpreter]: Reachable states at location L33-1 satisfy 587#true [2019-10-13 21:31:36,367 INFO L193 IcfgInterpreter]: Reachable states at location L35-3 satisfy 560#true [2019-10-13 21:31:36,921 INFO L223 tionRefinementEngine]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2019-10-13 21:31:36,921 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [29, 4, 4, 11] total 43 [2019-10-13 21:31:36,921 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1719974432] [2019-10-13 21:31:36,922 INFO L442 AbstractCegarLoop]: Interpolant automaton has 44 states [2019-10-13 21:31:36,922 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-10-13 21:31:36,923 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 44 interpolants. [2019-10-13 21:31:36,924 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=449, Invalid=1443, Unknown=0, NotChecked=0, Total=1892 [2019-10-13 21:31:36,924 INFO L87 Difference]: Start difference. First operand 50 states and 54 transitions. Second operand 44 states. [2019-10-13 21:31:39,321 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-13 21:31:39,321 INFO L93 Difference]: Finished difference Result 72 states and 83 transitions. [2019-10-13 21:31:39,321 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 44 states. [2019-10-13 21:31:39,321 INFO L78 Accepts]: Start accepts. Automaton has 44 states. Word has length 63 [2019-10-13 21:31:39,322 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-13 21:31:39,323 INFO L225 Difference]: With dead ends: 72 [2019-10-13 21:31:39,323 INFO L226 Difference]: Without dead ends: 54 [2019-10-13 21:31:39,325 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 257 GetRequests, 176 SyntacticMatches, 0 SemanticMatches, 81 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1350 ImplicationChecksByTransitivity, 2.6s TimeCoverageRelationStatistics Valid=1349, Invalid=5457, Unknown=0, NotChecked=0, Total=6806 [2019-10-13 21:31:39,326 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 54 states. [2019-10-13 21:31:39,333 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 54 to 54. [2019-10-13 21:31:39,333 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 54 states. [2019-10-13 21:31:39,334 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 54 states to 54 states and 58 transitions. [2019-10-13 21:31:39,334 INFO L78 Accepts]: Start accepts. Automaton has 54 states and 58 transitions. Word has length 63 [2019-10-13 21:31:39,335 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-13 21:31:39,335 INFO L462 AbstractCegarLoop]: Abstraction has 54 states and 58 transitions. [2019-10-13 21:31:39,335 INFO L463 AbstractCegarLoop]: Interpolant automaton has 44 states. [2019-10-13 21:31:39,335 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 58 transitions. [2019-10-13 21:31:39,336 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-10-13 21:31:39,336 INFO L372 BasicCegarLoop]: Found error trace [2019-10-13 21:31:39,336 INFO L380 BasicCegarLoop]: trace histogram [27, 12, 4, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-13 21:31:39,540 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 7 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-13 21:31:39,540 INFO L410 AbstractCegarLoop]: === Iteration 9 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-13 21:31:39,541 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-13 21:31:39,541 INFO L82 PathProgramCache]: Analyzing trace with hash -344788902, now seen corresponding path program 6 times [2019-10-13 21:31:39,541 INFO L157 tionRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-10-13 21:31:39,542 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [152578824] [2019-10-13 21:31:39,542 INFO L116 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-13 21:31:39,542 INFO L116 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-13 21:31:39,542 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-13 21:31:39,576 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-13 21:31:39,925 INFO L134 CoverageAnalysis]: Checked inductivity of 499 backedges. 0 proven. 378 refuted. 0 times theorem prover too weak. 121 trivial. 0 not checked. [2019-10-13 21:31:39,926 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [152578824] [2019-10-13 21:31:39,926 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [458704984] [2019-10-13 21:31:39,926 INFO L92 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-13 21:31:40,142 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2019-10-13 21:31:40,143 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-10-13 21:31:40,146 INFO L256 TraceCheckSpWp]: Trace formula consists of 331 conjuncts, 29 conjunts are in the unsatisfiable core [2019-10-13 21:31:40,149 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2019-10-13 21:31:40,188 INFO L134 CoverageAnalysis]: Checked inductivity of 499 backedges. 0 proven. 378 refuted. 0 times theorem prover too weak. 121 trivial. 0 not checked. [2019-10-13 21:31:40,188 INFO L321 TraceCheckSpWp]: Computing backward predicates... [2019-10-13 21:31:41,108 INFO L134 CoverageAnalysis]: Checked inductivity of 499 backedges. 0 proven. 378 refuted. 0 times theorem prover too weak. 121 trivial. 0 not checked. [2019-10-13 21:31:41,108 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSifa [383070435] [2019-10-13 21:31:41,109 INFO L162 IcfgInterpreter]: Started Sifa with 19 locations of interest [2019-10-13 21:31:41,110 INFO L169 IcfgInterpreter]: Building call graph [2019-10-13 21:31:41,110 INFO L174 IcfgInterpreter]: Initial procedures are [ULTIMATE.start] [2019-10-13 21:31:41,110 INFO L179 IcfgInterpreter]: Starting interpretation [2019-10-13 21:31:41,110 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.start with input of size 1 for LOIs [2019-10-13 21:31:41,140 INFO L199 IcfgInterpreter]: Interpreting procedure main with input of size 21 for LOIs [2019-10-13 21:31:42,440 INFO L199 IcfgInterpreter]: Interpreting procedure xor with input of size 1 for LOIs [2019-10-13 21:31:42,464 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.init with input of size 10 for LOIs [2019-10-13 21:31:42,467 INFO L183 IcfgInterpreter]: Interpretation finished [2019-10-13 21:31:42,467 INFO L191 IcfgInterpreter]: Final predicates for locations of interest are: [2019-10-13 21:31:42,468 INFO L193 IcfgInterpreter]: Reachable states at location xorEXIT satisfy 644#(and (not (< xor_~i~0 1000)) (<= 1 xor_~i~0) (= (ite (<= (mod xor_~res~0 4294967296) 2147483647) (mod xor_~res~0 4294967296) (+ (mod xor_~res~0 4294967296) (- 4294967296))) |xor_#res|) (<= 1000 xor_~i~0)) [2019-10-13 21:31:42,468 INFO L193 IcfgInterpreter]: Reachable states at location L26-4 satisfy 73#(and (<= 1000 main_~i~1) (not (< main_~i~1 1000))) [2019-10-13 21:31:42,468 INFO L193 IcfgInterpreter]: Reachable states at location L33 satisfy 592#(exists ((v_prenex_972 Int) (v_prenex_971 Int) (v_xor_~res~0_BEFORE_RETURN_132 Int) (v_xor_~res~0_BEFORE_RETURN_131 Int)) (or (and (not (<= (mod v_xor_~res~0_BEFORE_RETURN_132 4294967296) 2147483647)) (= (+ (mod v_xor_~res~0_BEFORE_RETURN_132 4294967296) (- 4294967296)) main_~ret~0) (not (< main_~i~1 1000)) (<= 0 (+ main_~ret~0 2147483648)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (<= main_~ret~0 2147483647)) (and (= main_~ret~0 (mod v_xor_~res~0_BEFORE_RETURN_131 4294967296)) (not (< main_~i~1 1000)) (<= 0 (+ main_~ret~0 2147483648)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (<= main_~ret~0 2147483647) (<= (mod v_xor_~res~0_BEFORE_RETURN_131 4294967296) 2147483647)) (and (= main_~ret~0 (mod v_prenex_972 4294967296)) (not (< main_~i~1 1000)) (<= 0 (+ main_~ret~0 2147483648)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (<= main_~ret~0 2147483647) (<= (mod v_prenex_972 4294967296) 2147483647)) (and (not (<= (mod v_prenex_971 4294967296) 2147483647)) (not (< main_~i~1 1000)) (<= 0 (+ main_~ret~0 2147483648)) (= main_~temp~0 (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 4))) (= main_~ret~0 (+ (mod v_prenex_971 4294967296) (- 4294967296))) (<= main_~ret~0 2147483647)))) [2019-10-13 21:31:42,469 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initENTRY satisfy 648#(and (= |old(#NULL.base)| |#NULL.base|) (= |#valid| |old(#valid)|) (= |#NULL.offset| |old(#NULL.offset)|)) [2019-10-13 21:31:42,469 INFO L193 IcfgInterpreter]: Reachable states at location L26-3 satisfy 68#true [2019-10-13 21:31:42,469 INFO L193 IcfgInterpreter]: Reachable states at location L12-3 satisfy 639#(<= 1 xor_~i~0) [2019-10-13 21:31:42,469 INFO L193 IcfgInterpreter]: Reachable states at location xorENTRY satisfy 601#true [2019-10-13 21:31:42,470 INFO L193 IcfgInterpreter]: Reachable states at location L-1 satisfy 23#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= 0 (select |#valid| 0)) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-13 21:31:42,470 INFO L193 IcfgInterpreter]: Reachable states at location mainENTRY satisfy 33#(and (= 0 |#NULL.base|) (<= |#NULL.base| 0) (= |#valid| |old(#valid)|) (<= 0 |#NULL.base|) (= |#memory_int| |old(#memory_int)|) (= |#NULL.offset| 0) (= |old(#length)| |#length|) (= 0 (select |old(#valid)| 0)) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-13 21:31:42,470 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.initEXIT satisfy 653#(and (= |#valid| (store |old(#valid)| 0 0)) (= 0 |#NULL.base|) (<= |#NULL.base| 0) (<= 0 |#NULL.base|) (= |#NULL.offset| 0) (<= 0 |#NULL.offset|) (<= |#NULL.offset| 0)) [2019-10-13 21:31:42,470 INFO L193 IcfgInterpreter]: Reachable states at location L39-1 satisfy 479#true [2019-10-13 21:31:42,470 INFO L193 IcfgInterpreter]: Reachable states at location ULTIMATE.startENTRY satisfy 6#true [2019-10-13 21:31:42,471 INFO L193 IcfgInterpreter]: Reachable states at location mainErr0ASSERT_VIOLATIONERROR_FUNCTION satisfy 234#(or (and (exists ((v_prenex_1000 Int) (v_xor_~res~0_BEFORE_RETURN_136 Int) (v_xor_~res~0_BEFORE_RETURN_135 Int) (v_prenex_999 Int)) (or (and (= (mod v_xor_~res~0_BEFORE_RETURN_135 4294967296) main_~ret5~0) (not (< main_~i~2 999)) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (<= (mod v_xor_~res~0_BEFORE_RETURN_135 4294967296) 2147483647) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 3996)) main_~temp~0)) (and (= main_~ret5~0 (+ (mod v_xor_~res~0_BEFORE_RETURN_136 4294967296) (- 4294967296))) (not (<= (mod v_xor_~res~0_BEFORE_RETURN_136 4294967296) 2147483647)) (not (< main_~i~2 999)) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 3996)) main_~temp~0)) (and (<= (mod v_prenex_1000 4294967296) 2147483647) (not (< main_~i~2 999)) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (mod v_prenex_1000 4294967296) main_~ret5~0) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 3996)) main_~temp~0)) (and (not (<= (mod v_prenex_999 4294967296) 2147483647)) (not (< main_~i~2 999)) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 3996)) main_~temp~0) (= (+ (mod v_prenex_999 4294967296) (- 4294967296)) main_~ret5~0)))) (not (= main_~ret~0 main_~ret5~0))) (and (not (= main_~ret~0 main_~ret2~0)) (exists ((v_prenex_1000 Int) (v_xor_~res~0_BEFORE_RETURN_136 Int) (v_xor_~res~0_BEFORE_RETURN_135 Int) (v_prenex_999 Int)) (or (and (= (mod v_xor_~res~0_BEFORE_RETURN_135 4294967296) main_~ret5~0) (not (< main_~i~2 999)) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (<= (mod v_xor_~res~0_BEFORE_RETURN_135 4294967296) 2147483647) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 3996)) main_~temp~0)) (and (= main_~ret5~0 (+ (mod v_xor_~res~0_BEFORE_RETURN_136 4294967296) (- 4294967296))) (not (<= (mod v_xor_~res~0_BEFORE_RETURN_136 4294967296) 2147483647)) (not (< main_~i~2 999)) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 3996)) main_~temp~0)) (and (<= (mod v_prenex_1000 4294967296) 2147483647) (not (< main_~i~2 999)) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (mod v_prenex_1000 4294967296) main_~ret5~0) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 3996)) main_~temp~0)) (and (not (<= (mod v_prenex_999 4294967296) 2147483647)) (not (< main_~i~2 999)) (<= main_~ret5~0 2147483647) (<= 0 (+ main_~ret5~0 2147483648)) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 3996)) main_~temp~0) (= (+ (mod v_prenex_999 4294967296) (- 4294967296)) main_~ret5~0)))))) [2019-10-13 21:31:42,471 INFO L193 IcfgInterpreter]: Reachable states at location L39 satisfy 522#(and (not (< main_~i~2 999)) (<= 999 main_~i~2) (= (select (select |#memory_int| |main_~#x~0.base|) (+ |main_~#x~0.offset| 3996)) main_~temp~0)) [2019-10-13 21:31:42,471 INFO L193 IcfgInterpreter]: Reachable states at location L30 satisfy 120#(or (exists ((v_prenex_971 Int) (v_xor_~res~0_BEFORE_RETURN_131 Int)) (or (and (not (<= (mod v_prenex_971 4294967296) 2147483647)) (not (< main_~i~1 1000)) (= |main_#t~ret5| (+ (mod v_prenex_971 4294967296) (- 4294967296)))) (and (not (< main_~i~1 1000)) (= |main_#t~ret5| (mod v_xor_~res~0_BEFORE_RETURN_131 4294967296)) (<= (mod v_xor_~res~0_BEFORE_RETURN_131 4294967296) 2147483647)))) (exists ((v_prenex_972 Int) (v_xor_~res~0_BEFORE_RETURN_132 Int)) (or (and (= (+ (mod v_xor_~res~0_BEFORE_RETURN_132 4294967296) (- 4294967296)) |main_#t~ret5|) (not (<= (mod v_xor_~res~0_BEFORE_RETURN_132 4294967296) 2147483647)) (not (< main_~i~1 1000))) (and (not (< main_~i~1 1000)) (= (mod v_prenex_972 4294967296) |main_#t~ret5|) (<= (mod v_prenex_972 4294967296) 2147483647))))) [2019-10-13 21:31:42,472 INFO L193 IcfgInterpreter]: Reachable states at location L41 satisfy 424#true [2019-10-13 21:31:42,472 INFO L193 IcfgInterpreter]: Reachable states at location L42 satisfy 313#true [2019-10-13 21:31:42,472 INFO L193 IcfgInterpreter]: Reachable states at location L33-1 satisfy 587#true [2019-10-13 21:31:42,473 INFO L193 IcfgInterpreter]: Reachable states at location L35-3 satisfy 560#true [2019-10-13 21:31:44,995 INFO L223 tionRefinementEngine]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2019-10-13 21:31:44,996 INFO L236 tionRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [30, 30, 30, 11] total 69 [2019-10-13 21:31:44,996 INFO L342 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [70090573] [2019-10-13 21:31:44,997 INFO L442 AbstractCegarLoop]: Interpolant automaton has 70 states [2019-10-13 21:31:44,998 INFO L137 tionRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-10-13 21:31:44,998 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 70 interpolants. [2019-10-13 21:31:45,000 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=1740, Invalid=3089, Unknown=1, NotChecked=0, Total=4830 [2019-10-13 21:31:45,000 INFO L87 Difference]: Start difference. First operand 54 states and 58 transitions. Second operand 70 states. [2019-10-13 21:31:48,456 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-10-13 21:31:48,456 INFO L93 Difference]: Finished difference Result 104 states and 140 transitions. [2019-10-13 21:31:48,456 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 69 states. [2019-10-13 21:31:48,456 INFO L78 Accepts]: Start accepts. Automaton has 70 states. Word has length 67 [2019-10-13 21:31:48,456 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-10-13 21:31:48,457 INFO L225 Difference]: With dead ends: 104 [2019-10-13 21:31:48,457 INFO L226 Difference]: Without dead ends: 83 [2019-10-13 21:31:48,463 INFO L600 BasicCegarLoop]: 0 DeclaredPredicates, 297 GetRequests, 165 SyntacticMatches, 0 SemanticMatches, 132 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3929 ImplicationChecksByTransitivity, 6.7s TimeCoverageRelationStatistics Valid=5099, Invalid=12722, Unknown=1, NotChecked=0, Total=17822 [2019-10-13 21:31:48,464 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 83 states. [2019-10-13 21:31:48,472 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 83 to 83. [2019-10-13 21:31:48,472 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 83 states. [2019-10-13 21:31:48,473 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 83 states to 83 states and 87 transitions. [2019-10-13 21:31:48,473 INFO L78 Accepts]: Start accepts. Automaton has 83 states and 87 transitions. Word has length 67 [2019-10-13 21:31:48,473 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-10-13 21:31:48,474 INFO L462 AbstractCegarLoop]: Abstraction has 83 states and 87 transitions. [2019-10-13 21:31:48,474 INFO L463 AbstractCegarLoop]: Interpolant automaton has 70 states. [2019-10-13 21:31:48,474 INFO L276 IsEmpty]: Start isEmpty. Operand 83 states and 87 transitions. [2019-10-13 21:31:48,475 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 97 [2019-10-13 21:31:48,475 INFO L372 BasicCegarLoop]: Found error trace [2019-10-13 21:31:48,475 INFO L380 BasicCegarLoop]: trace histogram [56, 12, 4, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-10-13 21:31:48,679 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 8 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-13 21:31:48,679 INFO L410 AbstractCegarLoop]: === Iteration 10 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-10-13 21:31:48,680 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-10-13 21:31:48,680 INFO L82 PathProgramCache]: Analyzing trace with hash -303923653, now seen corresponding path program 7 times [2019-10-13 21:31:48,680 INFO L157 tionRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-10-13 21:31:48,681 INFO L342 tionRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [240080696] [2019-10-13 21:31:48,681 INFO L116 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-13 21:31:48,681 INFO L116 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-10-13 21:31:48,682 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-10-13 21:31:48,733 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-13 21:31:50,083 INFO L134 CoverageAnalysis]: Checked inductivity of 1717 backedges. 0 proven. 1596 refuted. 0 times theorem prover too weak. 121 trivial. 0 not checked. [2019-10-13 21:31:50,083 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [240080696] [2019-10-13 21:31:50,083 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1330712655] [2019-10-13 21:31:50,083 INFO L92 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-10-13 21:31:50,360 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-10-13 21:31:50,362 INFO L256 TraceCheckSpWp]: Trace formula consists of 505 conjuncts, 58 conjunts are in the unsatisfiable core [2019-10-13 21:31:50,366 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2019-10-13 21:31:50,391 INFO L134 CoverageAnalysis]: Checked inductivity of 1717 backedges. 0 proven. 1596 refuted. 0 times theorem prover too weak. 121 trivial. 0 not checked. [2019-10-13 21:31:50,392 INFO L321 TraceCheckSpWp]: Computing backward predicates... [2019-10-13 21:31:53,924 INFO L134 CoverageAnalysis]: Checked inductivity of 1717 backedges. 0 proven. 1596 refuted. 0 times theorem prover too weak. 121 trivial. 0 not checked. [2019-10-13 21:31:53,924 INFO L342 tionRefinementEngine]: Using interpolant generator IpTcStrategyModuleSifa [1713680329] [2019-10-13 21:31:53,926 INFO L162 IcfgInterpreter]: Started Sifa with 19 locations of interest [2019-10-13 21:31:53,926 INFO L169 IcfgInterpreter]: Building call graph [2019-10-13 21:31:53,926 INFO L174 IcfgInterpreter]: Initial procedures are [ULTIMATE.start] [2019-10-13 21:31:53,927 INFO L179 IcfgInterpreter]: Starting interpretation [2019-10-13 21:31:53,927 INFO L199 IcfgInterpreter]: Interpreting procedure ULTIMATE.start with input of size 1 for LOIs