/usr/bin/java -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata ./data -tc ../../../trunk/examples/toolchains/AutomizerCInline.xml -s ../../../trunk/examples/settings/default/automizer/svcomp-Reach-32bit-Automizer_Default.epf -i ../../../trunk/examples/svcomp/systemc/kundu1.cil.c -------------------------------------------------------------------------------- This is Ultimate 0.1.24-6598664 [2019-11-23 22:48:27,757 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-11-23 22:48:27,759 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-11-23 22:48:27,777 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-11-23 22:48:27,777 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-11-23 22:48:27,778 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-11-23 22:48:27,780 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-11-23 22:48:27,784 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-11-23 22:48:27,786 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-11-23 22:48:27,787 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-11-23 22:48:27,788 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-11-23 22:48:27,789 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-11-23 22:48:27,789 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-11-23 22:48:27,790 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-11-23 22:48:27,791 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-11-23 22:48:27,793 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-11-23 22:48:27,793 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-11-23 22:48:27,794 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-11-23 22:48:27,796 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-11-23 22:48:27,798 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-11-23 22:48:27,800 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-11-23 22:48:27,801 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-11-23 22:48:27,802 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-11-23 22:48:27,802 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-11-23 22:48:27,805 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... 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[2019-11-23 22:48:27,813 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-11-23 22:48:27,813 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-11-23 22:48:27,814 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-11-23 22:48:27,815 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/default/automizer/svcomp-Reach-32bit-Automizer_Default.epf [2019-11-23 22:48:27,835 INFO L113 SettingsManager]: Loading preferences was successful [2019-11-23 22:48:27,835 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-11-23 22:48:27,838 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-11-23 22:48:27,838 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-11-23 22:48:27,839 INFO L138 SettingsManager]: * Use SBE=true [2019-11-23 22:48:27,840 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-11-23 22:48:27,840 INFO L138 SettingsManager]: * sizeof long=4 [2019-11-23 22:48:27,840 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-11-23 22:48:27,840 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-11-23 22:48:27,841 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-11-23 22:48:27,841 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-11-23 22:48:27,841 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-11-23 22:48:27,841 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-11-23 22:48:27,841 INFO L138 SettingsManager]: * Adapt memory model on pointer casts if necessary=true [2019-11-23 22:48:27,842 INFO L138 SettingsManager]: * sizeof long double=12 [2019-11-23 22:48:27,842 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-11-23 22:48:27,842 INFO L138 SettingsManager]: * Use constant arrays=true [2019-11-23 22:48:27,842 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-11-23 22:48:27,843 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-11-23 22:48:27,843 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-11-23 22:48:27,843 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-11-23 22:48:27,843 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-11-23 22:48:27,844 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-11-23 22:48:27,846 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-11-23 22:48:27,846 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-11-23 22:48:27,846 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-11-23 22:48:27,846 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-11-23 22:48:27,846 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-11-23 22:48:27,847 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-11-23 22:48:27,847 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2019-11-23 22:48:28,112 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-11-23 22:48:28,135 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-11-23 22:48:28,138 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-11-23 22:48:28,140 INFO L271 PluginConnector]: Initializing CDTParser... [2019-11-23 22:48:28,140 INFO L275 PluginConnector]: CDTParser initialized [2019-11-23 22:48:28,142 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/systemc/kundu1.cil.c [2019-11-23 22:48:28,216 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/4ccd43c7b/b648a8894d374f2c84cf945d79812c70/FLAGea1441068 [2019-11-23 22:48:28,722 INFO L306 CDTParser]: Found 1 translation units. [2019-11-23 22:48:28,722 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/systemc/kundu1.cil.c [2019-11-23 22:48:28,732 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/4ccd43c7b/b648a8894d374f2c84cf945d79812c70/FLAGea1441068 [2019-11-23 22:48:29,096 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/4ccd43c7b/b648a8894d374f2c84cf945d79812c70 [2019-11-23 22:48:29,107 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-11-23 22:48:29,108 INFO L131 ToolchainWalker]: Walking toolchain with 5 elements. [2019-11-23 22:48:29,109 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-11-23 22:48:29,110 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-11-23 22:48:29,113 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-11-23 22:48:29,114 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 23.11 10:48:29" (1/1) ... [2019-11-23 22:48:29,117 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@ce7ddba and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:48:29, skipping insertion in model container [2019-11-23 22:48:29,118 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 23.11 10:48:29" (1/1) ... [2019-11-23 22:48:29,125 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-11-23 22:48:29,174 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-11-23 22:48:29,465 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-11-23 22:48:29,470 INFO L203 MainTranslator]: Completed pre-run [2019-11-23 22:48:29,588 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-11-23 22:48:29,608 INFO L208 MainTranslator]: Completed translation [2019-11-23 22:48:29,609 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:48:29 WrapperNode [2019-11-23 22:48:29,609 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-11-23 22:48:29,610 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-11-23 22:48:29,610 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-11-23 22:48:29,610 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-11-23 22:48:29,619 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:48:29" (1/1) ... [2019-11-23 22:48:29,627 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:48:29" (1/1) ... [2019-11-23 22:48:29,662 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-11-23 22:48:29,662 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-11-23 22:48:29,663 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-11-23 22:48:29,663 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-11-23 22:48:29,674 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:48:29" (1/1) ... [2019-11-23 22:48:29,674 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:48:29" (1/1) ... [2019-11-23 22:48:29,677 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:48:29" (1/1) ... [2019-11-23 22:48:29,678 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:48:29" (1/1) ... [2019-11-23 22:48:29,684 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:48:29" (1/1) ... [2019-11-23 22:48:29,695 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:48:29" (1/1) ... [2019-11-23 22:48:29,698 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:48:29" (1/1) ... [2019-11-23 22:48:29,702 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-11-23 22:48:29,702 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-11-23 22:48:29,702 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-11-23 22:48:29,702 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-11-23 22:48:29,703 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:48:29" (1/1) ... No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-11-23 22:48:29,778 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-11-23 22:48:29,778 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-11-23 22:48:30,322 INFO L279 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-11-23 22:48:30,323 INFO L284 CfgBuilder]: Removed 72 assume(true) statements. [2019-11-23 22:48:30,324 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 23.11 10:48:30 BoogieIcfgContainer [2019-11-23 22:48:30,325 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-11-23 22:48:30,326 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-11-23 22:48:30,326 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-11-23 22:48:30,329 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-11-23 22:48:30,330 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 23.11 10:48:29" (1/3) ... [2019-11-23 22:48:30,331 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@5bc15abe and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 23.11 10:48:30, skipping insertion in model container [2019-11-23 22:48:30,331 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:48:29" (2/3) ... [2019-11-23 22:48:30,331 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@5bc15abe and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 23.11 10:48:30, skipping insertion in model container [2019-11-23 22:48:30,332 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 23.11 10:48:30" (3/3) ... [2019-11-23 22:48:30,334 INFO L109 eAbstractionObserver]: Analyzing ICFG kundu1.cil.c [2019-11-23 22:48:30,344 INFO L153 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-11-23 22:48:30,352 INFO L165 ceAbstractionStarter]: Appying trace abstraction to program that has 3 error locations. [2019-11-23 22:48:30,364 INFO L249 AbstractCegarLoop]: Starting to check reachability of 3 error locations. [2019-11-23 22:48:30,389 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-11-23 22:48:30,390 INFO L374 AbstractCegarLoop]: Hoare is true [2019-11-23 22:48:30,390 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-11-23 22:48:30,390 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-11-23 22:48:30,390 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-11-23 22:48:30,390 INFO L378 AbstractCegarLoop]: Difference is false [2019-11-23 22:48:30,391 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-11-23 22:48:30,391 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-11-23 22:48:30,410 INFO L276 IsEmpty]: Start isEmpty. Operand 117 states. [2019-11-23 22:48:30,418 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2019-11-23 22:48:30,418 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:48:30,419 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:48:30,420 INFO L410 AbstractCegarLoop]: === Iteration 1 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:48:30,427 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:48:30,427 INFO L82 PathProgramCache]: Analyzing trace with hash 1913091172, now seen corresponding path program 1 times [2019-11-23 22:48:30,437 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:48:30,438 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1762427510] [2019-11-23 22:48:30,438 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:48:30,533 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:48:30,602 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-23 22:48:30,603 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1762427510] [2019-11-23 22:48:30,604 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-23 22:48:30,605 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-23 22:48:30,607 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [138645722] [2019-11-23 22:48:30,613 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-23 22:48:30,614 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:48:30,628 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-23 22:48:30,629 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:48:30,630 INFO L87 Difference]: Start difference. First operand 117 states. Second operand 3 states. [2019-11-23 22:48:30,696 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:48:30,696 INFO L93 Difference]: Finished difference Result 228 states and 346 transitions. [2019-11-23 22:48:30,697 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-23 22:48:30,699 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 33 [2019-11-23 22:48:30,699 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:48:30,710 INFO L225 Difference]: With dead ends: 228 [2019-11-23 22:48:30,710 INFO L226 Difference]: Without dead ends: 112 [2019-11-23 22:48:30,714 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:48:30,733 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 112 states. [2019-11-23 22:48:30,759 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 112 to 112. [2019-11-23 22:48:30,761 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 112 states. [2019-11-23 22:48:30,763 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 112 states to 112 states and 162 transitions. [2019-11-23 22:48:30,765 INFO L78 Accepts]: Start accepts. Automaton has 112 states and 162 transitions. Word has length 33 [2019-11-23 22:48:30,765 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:48:30,765 INFO L462 AbstractCegarLoop]: Abstraction has 112 states and 162 transitions. [2019-11-23 22:48:30,765 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-23 22:48:30,766 INFO L276 IsEmpty]: Start isEmpty. Operand 112 states and 162 transitions. [2019-11-23 22:48:30,767 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2019-11-23 22:48:30,767 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:48:30,767 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:48:30,768 INFO L410 AbstractCegarLoop]: === Iteration 2 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:48:30,768 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:48:30,768 INFO L82 PathProgramCache]: Analyzing trace with hash 526887778, now seen corresponding path program 1 times [2019-11-23 22:48:30,769 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:48:30,769 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1453514970] [2019-11-23 22:48:30,769 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:48:30,788 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:48:30,830 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-23 22:48:30,830 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1453514970] [2019-11-23 22:48:30,830 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-23 22:48:30,831 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-23 22:48:30,832 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [627895241] [2019-11-23 22:48:30,834 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-23 22:48:30,836 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:48:30,836 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-23 22:48:30,836 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:48:30,837 INFO L87 Difference]: Start difference. First operand 112 states and 162 transitions. Second operand 3 states. [2019-11-23 22:48:30,970 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:48:30,974 INFO L93 Difference]: Finished difference Result 305 states and 441 transitions. [2019-11-23 22:48:30,976 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-23 22:48:30,976 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 33 [2019-11-23 22:48:30,977 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:48:30,981 INFO L225 Difference]: With dead ends: 305 [2019-11-23 22:48:30,981 INFO L226 Difference]: Without dead ends: 200 [2019-11-23 22:48:30,983 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:48:30,988 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 200 states. [2019-11-23 22:48:31,022 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 200 to 190. [2019-11-23 22:48:31,022 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 190 states. [2019-11-23 22:48:31,024 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 190 states to 190 states and 275 transitions. [2019-11-23 22:48:31,024 INFO L78 Accepts]: Start accepts. Automaton has 190 states and 275 transitions. Word has length 33 [2019-11-23 22:48:31,028 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:48:31,028 INFO L462 AbstractCegarLoop]: Abstraction has 190 states and 275 transitions. [2019-11-23 22:48:31,028 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-23 22:48:31,029 INFO L276 IsEmpty]: Start isEmpty. Operand 190 states and 275 transitions. [2019-11-23 22:48:31,030 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2019-11-23 22:48:31,030 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:48:31,030 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:48:31,031 INFO L410 AbstractCegarLoop]: === Iteration 3 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:48:31,031 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:48:31,031 INFO L82 PathProgramCache]: Analyzing trace with hash -1145629853, now seen corresponding path program 1 times [2019-11-23 22:48:31,031 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:48:31,033 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1823227147] [2019-11-23 22:48:31,033 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:48:31,063 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:48:31,128 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-23 22:48:31,128 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1823227147] [2019-11-23 22:48:31,128 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-23 22:48:31,129 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-23 22:48:31,129 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [726067475] [2019-11-23 22:48:31,130 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-23 22:48:31,130 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:48:31,130 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-23 22:48:31,131 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:48:31,131 INFO L87 Difference]: Start difference. First operand 190 states and 275 transitions. Second operand 3 states. [2019-11-23 22:48:31,263 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:48:31,263 INFO L93 Difference]: Finished difference Result 527 states and 762 transitions. [2019-11-23 22:48:31,265 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-23 22:48:31,266 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 33 [2019-11-23 22:48:31,266 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:48:31,268 INFO L225 Difference]: With dead ends: 527 [2019-11-23 22:48:31,268 INFO L226 Difference]: Without dead ends: 350 [2019-11-23 22:48:31,270 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:48:31,271 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 350 states. [2019-11-23 22:48:31,323 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 350 to 328. [2019-11-23 22:48:31,324 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 328 states. [2019-11-23 22:48:31,328 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 328 states to 328 states and 462 transitions. [2019-11-23 22:48:31,329 INFO L78 Accepts]: Start accepts. Automaton has 328 states and 462 transitions. Word has length 33 [2019-11-23 22:48:31,329 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:48:31,329 INFO L462 AbstractCegarLoop]: Abstraction has 328 states and 462 transitions. [2019-11-23 22:48:31,329 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-23 22:48:31,329 INFO L276 IsEmpty]: Start isEmpty. Operand 328 states and 462 transitions. [2019-11-23 22:48:31,334 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2019-11-23 22:48:31,334 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:48:31,334 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:48:31,335 INFO L410 AbstractCegarLoop]: === Iteration 4 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:48:31,335 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:48:31,335 INFO L82 PathProgramCache]: Analyzing trace with hash -1045714737, now seen corresponding path program 1 times [2019-11-23 22:48:31,335 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:48:31,336 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [974847627] [2019-11-23 22:48:31,336 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:48:31,385 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:48:31,458 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-23 22:48:31,458 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [974847627] [2019-11-23 22:48:31,458 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-23 22:48:31,459 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-23 22:48:31,459 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1902602751] [2019-11-23 22:48:31,459 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-23 22:48:31,460 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:48:31,460 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-23 22:48:31,460 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-23 22:48:31,460 INFO L87 Difference]: Start difference. First operand 328 states and 462 transitions. Second operand 5 states. [2019-11-23 22:48:31,589 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:48:31,590 INFO L93 Difference]: Finished difference Result 1045 states and 1489 transitions. [2019-11-23 22:48:31,590 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-11-23 22:48:31,591 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 34 [2019-11-23 22:48:31,591 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:48:31,595 INFO L225 Difference]: With dead ends: 1045 [2019-11-23 22:48:31,595 INFO L226 Difference]: Without dead ends: 728 [2019-11-23 22:48:31,597 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2019-11-23 22:48:31,598 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 728 states. [2019-11-23 22:48:31,627 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 728 to 340. [2019-11-23 22:48:31,627 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 340 states. [2019-11-23 22:48:31,629 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 340 states to 340 states and 469 transitions. [2019-11-23 22:48:31,629 INFO L78 Accepts]: Start accepts. Automaton has 340 states and 469 transitions. Word has length 34 [2019-11-23 22:48:31,629 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:48:31,629 INFO L462 AbstractCegarLoop]: Abstraction has 340 states and 469 transitions. [2019-11-23 22:48:31,630 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-23 22:48:31,630 INFO L276 IsEmpty]: Start isEmpty. Operand 340 states and 469 transitions. [2019-11-23 22:48:31,631 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2019-11-23 22:48:31,631 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:48:31,631 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:48:31,632 INFO L410 AbstractCegarLoop]: === Iteration 5 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:48:31,632 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:48:31,632 INFO L82 PathProgramCache]: Analyzing trace with hash -1179728243, now seen corresponding path program 1 times [2019-11-23 22:48:31,632 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:48:31,633 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [9534555] [2019-11-23 22:48:31,633 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:48:31,648 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:48:31,700 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-23 22:48:31,701 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [9534555] [2019-11-23 22:48:31,701 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-23 22:48:31,701 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-23 22:48:31,702 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [521349950] [2019-11-23 22:48:31,702 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-23 22:48:31,703 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:48:31,703 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-23 22:48:31,703 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-23 22:48:31,703 INFO L87 Difference]: Start difference. First operand 340 states and 469 transitions. Second operand 5 states. [2019-11-23 22:48:31,858 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:48:31,858 INFO L93 Difference]: Finished difference Result 1046 states and 1465 transitions. [2019-11-23 22:48:31,858 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-11-23 22:48:31,859 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 34 [2019-11-23 22:48:31,859 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:48:31,863 INFO L225 Difference]: With dead ends: 1046 [2019-11-23 22:48:31,863 INFO L226 Difference]: Without dead ends: 724 [2019-11-23 22:48:31,864 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2019-11-23 22:48:31,866 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 724 states. [2019-11-23 22:48:31,900 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 724 to 352. [2019-11-23 22:48:31,900 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 352 states. [2019-11-23 22:48:31,902 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 352 states to 352 states and 476 transitions. [2019-11-23 22:48:31,902 INFO L78 Accepts]: Start accepts. Automaton has 352 states and 476 transitions. Word has length 34 [2019-11-23 22:48:31,902 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:48:31,903 INFO L462 AbstractCegarLoop]: Abstraction has 352 states and 476 transitions. [2019-11-23 22:48:31,903 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-23 22:48:31,903 INFO L276 IsEmpty]: Start isEmpty. Operand 352 states and 476 transitions. [2019-11-23 22:48:31,904 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2019-11-23 22:48:31,904 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:48:31,904 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:48:31,905 INFO L410 AbstractCegarLoop]: === Iteration 6 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:48:31,905 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:48:31,905 INFO L82 PathProgramCache]: Analyzing trace with hash 1526891151, now seen corresponding path program 1 times [2019-11-23 22:48:31,906 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:48:31,906 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [836224140] [2019-11-23 22:48:31,906 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:48:31,929 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:48:32,002 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-23 22:48:32,002 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [836224140] [2019-11-23 22:48:32,003 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-23 22:48:32,004 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-23 22:48:32,004 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1051039259] [2019-11-23 22:48:32,004 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-23 22:48:32,006 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:48:32,006 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-23 22:48:32,006 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-23 22:48:32,007 INFO L87 Difference]: Start difference. First operand 352 states and 476 transitions. Second operand 4 states. [2019-11-23 22:48:32,211 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:48:32,211 INFO L93 Difference]: Finished difference Result 1638 states and 2239 transitions. [2019-11-23 22:48:32,212 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-23 22:48:32,212 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 34 [2019-11-23 22:48:32,213 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:48:32,220 INFO L225 Difference]: With dead ends: 1638 [2019-11-23 22:48:32,220 INFO L226 Difference]: Without dead ends: 1304 [2019-11-23 22:48:32,223 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-23 22:48:32,225 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1304 states. [2019-11-23 22:48:32,301 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1304 to 662. [2019-11-23 22:48:32,301 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 662 states. [2019-11-23 22:48:32,305 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 662 states to 662 states and 900 transitions. [2019-11-23 22:48:32,305 INFO L78 Accepts]: Start accepts. Automaton has 662 states and 900 transitions. Word has length 34 [2019-11-23 22:48:32,309 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:48:32,309 INFO L462 AbstractCegarLoop]: Abstraction has 662 states and 900 transitions. [2019-11-23 22:48:32,310 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-23 22:48:32,310 INFO L276 IsEmpty]: Start isEmpty. Operand 662 states and 900 transitions. [2019-11-23 22:48:32,312 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2019-11-23 22:48:32,312 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:48:32,313 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:48:32,313 INFO L410 AbstractCegarLoop]: === Iteration 7 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:48:32,313 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:48:32,314 INFO L82 PathProgramCache]: Analyzing trace with hash -1026068075, now seen corresponding path program 1 times [2019-11-23 22:48:32,314 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:48:32,314 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [897217544] [2019-11-23 22:48:32,315 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:48:32,345 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:48:32,409 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-23 22:48:32,410 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [897217544] [2019-11-23 22:48:32,410 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-23 22:48:32,410 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-23 22:48:32,411 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [455027312] [2019-11-23 22:48:32,411 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-23 22:48:32,411 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:48:32,412 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-23 22:48:32,415 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-11-23 22:48:32,415 INFO L87 Difference]: Start difference. First operand 662 states and 900 transitions. Second operand 4 states. [2019-11-23 22:48:32,539 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:48:32,540 INFO L93 Difference]: Finished difference Result 1626 states and 2222 transitions. [2019-11-23 22:48:32,540 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-11-23 22:48:32,540 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 41 [2019-11-23 22:48:32,541 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:48:32,546 INFO L225 Difference]: With dead ends: 1626 [2019-11-23 22:48:32,546 INFO L226 Difference]: Without dead ends: 982 [2019-11-23 22:48:32,548 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-11-23 22:48:32,550 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 982 states. [2019-11-23 22:48:32,632 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 982 to 972. [2019-11-23 22:48:32,632 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 972 states. [2019-11-23 22:48:32,636 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 972 states to 972 states and 1324 transitions. [2019-11-23 22:48:32,637 INFO L78 Accepts]: Start accepts. Automaton has 972 states and 1324 transitions. Word has length 41 [2019-11-23 22:48:32,637 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:48:32,637 INFO L462 AbstractCegarLoop]: Abstraction has 972 states and 1324 transitions. [2019-11-23 22:48:32,637 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-23 22:48:32,637 INFO L276 IsEmpty]: Start isEmpty. Operand 972 states and 1324 transitions. [2019-11-23 22:48:32,638 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2019-11-23 22:48:32,639 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:48:32,639 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:48:32,639 INFO L410 AbstractCegarLoop]: === Iteration 8 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:48:32,639 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:48:32,640 INFO L82 PathProgramCache]: Analyzing trace with hash -305826283, now seen corresponding path program 1 times [2019-11-23 22:48:32,640 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:48:32,640 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1676022070] [2019-11-23 22:48:32,640 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:48:32,661 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:48:32,738 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-23 22:48:32,738 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1676022070] [2019-11-23 22:48:32,738 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-23 22:48:32,739 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-23 22:48:32,739 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [641591644] [2019-11-23 22:48:32,739 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-23 22:48:32,739 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:48:32,741 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-23 22:48:32,741 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2019-11-23 22:48:32,741 INFO L87 Difference]: Start difference. First operand 972 states and 1324 transitions. Second operand 6 states. [2019-11-23 22:48:33,095 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:48:33,095 INFO L93 Difference]: Finished difference Result 3850 states and 5260 transitions. [2019-11-23 22:48:33,096 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-11-23 22:48:33,096 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 44 [2019-11-23 22:48:33,098 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:48:33,113 INFO L225 Difference]: With dead ends: 3850 [2019-11-23 22:48:33,114 INFO L226 Difference]: Without dead ends: 2896 [2019-11-23 22:48:33,117 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=42, Unknown=0, NotChecked=0, Total=72 [2019-11-23 22:48:33,121 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2896 states. [2019-11-23 22:48:33,283 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2896 to 1606. [2019-11-23 22:48:33,283 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1606 states. [2019-11-23 22:48:33,289 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1606 states to 1606 states and 2192 transitions. [2019-11-23 22:48:33,290 INFO L78 Accepts]: Start accepts. Automaton has 1606 states and 2192 transitions. Word has length 44 [2019-11-23 22:48:33,290 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:48:33,290 INFO L462 AbstractCegarLoop]: Abstraction has 1606 states and 2192 transitions. [2019-11-23 22:48:33,290 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-23 22:48:33,291 INFO L276 IsEmpty]: Start isEmpty. Operand 1606 states and 2192 transitions. [2019-11-23 22:48:33,291 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2019-11-23 22:48:33,292 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:48:33,292 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:48:33,292 INFO L410 AbstractCegarLoop]: === Iteration 9 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:48:33,292 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:48:33,293 INFO L82 PathProgramCache]: Analyzing trace with hash -1702134670, now seen corresponding path program 1 times [2019-11-23 22:48:33,293 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:48:33,293 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1150324308] [2019-11-23 22:48:33,293 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:48:33,299 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:48:33,315 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 7 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2019-11-23 22:48:33,315 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1150324308] [2019-11-23 22:48:33,316 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-23 22:48:33,316 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-23 22:48:33,316 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [80765468] [2019-11-23 22:48:33,317 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-23 22:48:33,317 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:48:33,317 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-23 22:48:33,317 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:48:33,317 INFO L87 Difference]: Start difference. First operand 1606 states and 2192 transitions. Second operand 3 states. [2019-11-23 22:48:33,671 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:48:33,671 INFO L93 Difference]: Finished difference Result 4614 states and 6233 transitions. [2019-11-23 22:48:33,672 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-23 22:48:33,672 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 46 [2019-11-23 22:48:33,673 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:48:33,689 INFO L225 Difference]: With dead ends: 4614 [2019-11-23 22:48:33,689 INFO L226 Difference]: Without dead ends: 3026 [2019-11-23 22:48:33,693 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:48:33,697 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3026 states. [2019-11-23 22:48:33,957 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3026 to 3022. [2019-11-23 22:48:33,958 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3022 states. [2019-11-23 22:48:33,968 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3022 states to 3022 states and 3978 transitions. [2019-11-23 22:48:33,969 INFO L78 Accepts]: Start accepts. Automaton has 3022 states and 3978 transitions. Word has length 46 [2019-11-23 22:48:33,969 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:48:33,969 INFO L462 AbstractCegarLoop]: Abstraction has 3022 states and 3978 transitions. [2019-11-23 22:48:33,969 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-23 22:48:33,969 INFO L276 IsEmpty]: Start isEmpty. Operand 3022 states and 3978 transitions. [2019-11-23 22:48:33,970 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2019-11-23 22:48:33,971 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:48:33,971 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:48:33,971 INFO L410 AbstractCegarLoop]: === Iteration 10 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:48:33,971 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:48:33,972 INFO L82 PathProgramCache]: Analyzing trace with hash 1664931104, now seen corresponding path program 1 times [2019-11-23 22:48:33,972 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:48:33,972 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1303379377] [2019-11-23 22:48:33,972 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:48:33,980 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:48:34,001 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 11 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-23 22:48:34,001 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1303379377] [2019-11-23 22:48:34,002 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-23 22:48:34,002 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-23 22:48:34,002 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [484820728] [2019-11-23 22:48:34,003 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-23 22:48:34,003 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:48:34,003 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-23 22:48:34,003 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:48:34,003 INFO L87 Difference]: Start difference. First operand 3022 states and 3978 transitions. Second operand 3 states. [2019-11-23 22:48:34,440 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:48:34,441 INFO L93 Difference]: Finished difference Result 8013 states and 10530 transitions. [2019-11-23 22:48:34,441 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-23 22:48:34,441 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 48 [2019-11-23 22:48:34,442 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:48:34,468 INFO L225 Difference]: With dead ends: 8013 [2019-11-23 22:48:34,468 INFO L226 Difference]: Without dead ends: 5023 [2019-11-23 22:48:34,473 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:48:34,480 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5023 states. [2019-11-23 22:48:34,895 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5023 to 4273. [2019-11-23 22:48:34,896 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4273 states. [2019-11-23 22:48:34,910 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4273 states to 4273 states and 5593 transitions. [2019-11-23 22:48:34,911 INFO L78 Accepts]: Start accepts. Automaton has 4273 states and 5593 transitions. Word has length 48 [2019-11-23 22:48:34,919 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:48:34,920 INFO L462 AbstractCegarLoop]: Abstraction has 4273 states and 5593 transitions. [2019-11-23 22:48:34,921 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-23 22:48:34,921 INFO L276 IsEmpty]: Start isEmpty. Operand 4273 states and 5593 transitions. [2019-11-23 22:48:34,923 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2019-11-23 22:48:34,924 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:48:34,924 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:48:34,924 INFO L410 AbstractCegarLoop]: === Iteration 11 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:48:34,924 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:48:34,925 INFO L82 PathProgramCache]: Analyzing trace with hash 403090641, now seen corresponding path program 1 times [2019-11-23 22:48:34,925 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:48:34,925 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [325431709] [2019-11-23 22:48:34,925 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:48:34,937 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:48:34,959 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 12 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-23 22:48:34,960 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [325431709] [2019-11-23 22:48:34,960 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-23 22:48:34,960 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-23 22:48:34,961 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2005693003] [2019-11-23 22:48:34,961 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-23 22:48:34,961 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:48:34,962 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-23 22:48:34,962 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:48:34,962 INFO L87 Difference]: Start difference. First operand 4273 states and 5593 transitions. Second operand 3 states. [2019-11-23 22:48:35,302 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:48:35,302 INFO L93 Difference]: Finished difference Result 8516 states and 11154 transitions. [2019-11-23 22:48:35,303 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-23 22:48:35,303 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 48 [2019-11-23 22:48:35,304 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:48:35,326 INFO L225 Difference]: With dead ends: 8516 [2019-11-23 22:48:35,326 INFO L226 Difference]: Without dead ends: 4275 [2019-11-23 22:48:35,333 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:48:35,342 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4275 states. [2019-11-23 22:48:35,682 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4275 to 4273. [2019-11-23 22:48:35,683 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4273 states. [2019-11-23 22:48:35,693 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4273 states to 4273 states and 5518 transitions. [2019-11-23 22:48:35,694 INFO L78 Accepts]: Start accepts. Automaton has 4273 states and 5518 transitions. Word has length 48 [2019-11-23 22:48:35,695 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:48:35,695 INFO L462 AbstractCegarLoop]: Abstraction has 4273 states and 5518 transitions. [2019-11-23 22:48:35,695 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-23 22:48:35,695 INFO L276 IsEmpty]: Start isEmpty. Operand 4273 states and 5518 transitions. [2019-11-23 22:48:35,696 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2019-11-23 22:48:35,696 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:48:35,697 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:48:35,697 INFO L410 AbstractCegarLoop]: === Iteration 12 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:48:35,697 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:48:35,697 INFO L82 PathProgramCache]: Analyzing trace with hash 57108908, now seen corresponding path program 1 times [2019-11-23 22:48:35,697 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:48:35,698 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1100117620] [2019-11-23 22:48:35,698 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:48:35,710 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:48:35,732 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 12 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-23 22:48:35,732 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1100117620] [2019-11-23 22:48:35,732 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-23 22:48:35,733 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-23 22:48:35,733 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1637115827] [2019-11-23 22:48:35,733 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-23 22:48:35,734 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:48:35,734 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-23 22:48:35,734 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:48:35,734 INFO L87 Difference]: Start difference. First operand 4273 states and 5518 transitions. Second operand 3 states. [2019-11-23 22:48:36,072 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:48:36,072 INFO L93 Difference]: Finished difference Result 7967 states and 10312 transitions. [2019-11-23 22:48:36,072 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-23 22:48:36,073 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 49 [2019-11-23 22:48:36,073 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:48:36,090 INFO L225 Difference]: With dead ends: 7967 [2019-11-23 22:48:36,091 INFO L226 Difference]: Without dead ends: 3610 [2019-11-23 22:48:36,097 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:48:36,102 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3610 states. [2019-11-23 22:48:36,443 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3610 to 3465. [2019-11-23 22:48:36,444 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3465 states. [2019-11-23 22:48:36,455 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3465 states to 3465 states and 4400 transitions. [2019-11-23 22:48:36,456 INFO L78 Accepts]: Start accepts. Automaton has 3465 states and 4400 transitions. Word has length 49 [2019-11-23 22:48:36,456 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:48:36,456 INFO L462 AbstractCegarLoop]: Abstraction has 3465 states and 4400 transitions. [2019-11-23 22:48:36,456 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-23 22:48:36,456 INFO L276 IsEmpty]: Start isEmpty. Operand 3465 states and 4400 transitions. [2019-11-23 22:48:36,460 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 84 [2019-11-23 22:48:36,461 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:48:36,461 INFO L410 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:48:36,461 INFO L410 AbstractCegarLoop]: === Iteration 13 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:48:36,462 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:48:36,462 INFO L82 PathProgramCache]: Analyzing trace with hash 652914839, now seen corresponding path program 1 times [2019-11-23 22:48:36,462 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:48:36,463 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1060838925] [2019-11-23 22:48:36,463 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:48:36,472 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:48:36,508 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 19 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2019-11-23 22:48:36,509 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1060838925] [2019-11-23 22:48:36,509 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-23 22:48:36,509 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-11-23 22:48:36,509 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [191412178] [2019-11-23 22:48:36,510 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-23 22:48:36,510 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:48:36,510 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-23 22:48:36,510 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:48:36,511 INFO L87 Difference]: Start difference. First operand 3465 states and 4400 transitions. Second operand 3 states. [2019-11-23 22:48:36,756 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:48:36,756 INFO L93 Difference]: Finished difference Result 6369 states and 8143 transitions. [2019-11-23 22:48:36,757 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-23 22:48:36,757 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 83 [2019-11-23 22:48:36,757 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:48:36,774 INFO L225 Difference]: With dead ends: 6369 [2019-11-23 22:48:36,775 INFO L226 Difference]: Without dead ends: 3465 [2019-11-23 22:48:36,780 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:48:36,786 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3465 states. [2019-11-23 22:48:37,135 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3465 to 3465. [2019-11-23 22:48:37,135 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3465 states. [2019-11-23 22:48:37,141 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3465 states to 3465 states and 4336 transitions. [2019-11-23 22:48:37,142 INFO L78 Accepts]: Start accepts. Automaton has 3465 states and 4336 transitions. Word has length 83 [2019-11-23 22:48:37,142 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:48:37,142 INFO L462 AbstractCegarLoop]: Abstraction has 3465 states and 4336 transitions. [2019-11-23 22:48:37,142 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-23 22:48:37,142 INFO L276 IsEmpty]: Start isEmpty. Operand 3465 states and 4336 transitions. [2019-11-23 22:48:37,145 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 85 [2019-11-23 22:48:37,145 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:48:37,145 INFO L410 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:48:37,146 INFO L410 AbstractCegarLoop]: === Iteration 14 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:48:37,146 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:48:37,146 INFO L82 PathProgramCache]: Analyzing trace with hash -608848062, now seen corresponding path program 1 times [2019-11-23 22:48:37,146 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:48:37,146 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1852903289] [2019-11-23 22:48:37,147 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:48:37,155 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:48:37,183 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 25 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-23 22:48:37,183 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1852903289] [2019-11-23 22:48:37,183 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-23 22:48:37,184 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-23 22:48:37,184 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1432539804] [2019-11-23 22:48:37,184 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-23 22:48:37,184 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:48:37,185 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-23 22:48:37,185 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:48:37,185 INFO L87 Difference]: Start difference. First operand 3465 states and 4336 transitions. Second operand 3 states. [2019-11-23 22:48:37,479 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:48:37,480 INFO L93 Difference]: Finished difference Result 7371 states and 9260 transitions. [2019-11-23 22:48:37,480 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-23 22:48:37,480 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 84 [2019-11-23 22:48:37,480 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:48:37,491 INFO L225 Difference]: With dead ends: 7371 [2019-11-23 22:48:37,492 INFO L226 Difference]: Without dead ends: 4154 [2019-11-23 22:48:37,497 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:48:37,502 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4154 states. [2019-11-23 22:48:37,929 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4154 to 3700. [2019-11-23 22:48:37,930 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3700 states. [2019-11-23 22:48:37,936 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3700 states to 3700 states and 4553 transitions. [2019-11-23 22:48:37,936 INFO L78 Accepts]: Start accepts. Automaton has 3700 states and 4553 transitions. Word has length 84 [2019-11-23 22:48:37,936 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:48:37,936 INFO L462 AbstractCegarLoop]: Abstraction has 3700 states and 4553 transitions. [2019-11-23 22:48:37,937 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-23 22:48:37,937 INFO L276 IsEmpty]: Start isEmpty. Operand 3700 states and 4553 transitions. [2019-11-23 22:48:37,939 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 87 [2019-11-23 22:48:37,939 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:48:37,939 INFO L410 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:48:37,940 INFO L410 AbstractCegarLoop]: === Iteration 15 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:48:37,940 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:48:37,940 INFO L82 PathProgramCache]: Analyzing trace with hash 885528412, now seen corresponding path program 1 times [2019-11-23 22:48:37,940 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:48:37,941 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2060943801] [2019-11-23 22:48:37,941 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:48:37,950 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:48:37,975 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 20 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2019-11-23 22:48:37,976 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2060943801] [2019-11-23 22:48:37,976 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-23 22:48:37,976 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-11-23 22:48:37,976 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1602909479] [2019-11-23 22:48:37,977 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-23 22:48:37,977 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:48:37,977 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-23 22:48:37,978 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:48:37,978 INFO L87 Difference]: Start difference. First operand 3700 states and 4553 transitions. Second operand 3 states. [2019-11-23 22:48:38,191 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:48:38,192 INFO L93 Difference]: Finished difference Result 7674 states and 9427 transitions. [2019-11-23 22:48:38,192 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-23 22:48:38,192 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 86 [2019-11-23 22:48:38,192 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:48:38,201 INFO L225 Difference]: With dead ends: 7674 [2019-11-23 22:48:38,201 INFO L226 Difference]: Without dead ends: 4176 [2019-11-23 22:48:38,206 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:48:38,211 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4176 states. [2019-11-23 22:48:38,460 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4176 to 4174. [2019-11-23 22:48:38,461 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4174 states. [2019-11-23 22:48:38,466 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4174 states to 4174 states and 5092 transitions. [2019-11-23 22:48:38,467 INFO L78 Accepts]: Start accepts. Automaton has 4174 states and 5092 transitions. Word has length 86 [2019-11-23 22:48:38,467 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:48:38,467 INFO L462 AbstractCegarLoop]: Abstraction has 4174 states and 5092 transitions. [2019-11-23 22:48:38,467 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-23 22:48:38,467 INFO L276 IsEmpty]: Start isEmpty. Operand 4174 states and 5092 transitions. [2019-11-23 22:48:38,470 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 99 [2019-11-23 22:48:38,470 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:48:38,470 INFO L410 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:48:38,471 INFO L410 AbstractCegarLoop]: === Iteration 16 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:48:38,471 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:48:38,471 INFO L82 PathProgramCache]: Analyzing trace with hash 1836340184, now seen corresponding path program 1 times [2019-11-23 22:48:38,471 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:48:38,471 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [455094124] [2019-11-23 22:48:38,472 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:48:38,480 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:48:38,508 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 27 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-23 22:48:38,509 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [455094124] [2019-11-23 22:48:38,509 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-23 22:48:38,509 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-23 22:48:38,509 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1107490789] [2019-11-23 22:48:38,510 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-23 22:48:38,510 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:48:38,510 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-23 22:48:38,510 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:48:38,510 INFO L87 Difference]: Start difference. First operand 4174 states and 5092 transitions. Second operand 3 states. [2019-11-23 22:48:38,776 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:48:38,777 INFO L93 Difference]: Finished difference Result 7056 states and 8680 transitions. [2019-11-23 22:48:38,777 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-23 22:48:38,777 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 98 [2019-11-23 22:48:38,777 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:48:38,784 INFO L225 Difference]: With dead ends: 7056 [2019-11-23 22:48:38,784 INFO L226 Difference]: Without dead ends: 3227 [2019-11-23 22:48:38,789 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:48:38,792 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3227 states. [2019-11-23 22:48:38,953 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3227 to 3223. [2019-11-23 22:48:38,953 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3223 states. [2019-11-23 22:48:38,956 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3223 states to 3223 states and 3862 transitions. [2019-11-23 22:48:38,956 INFO L78 Accepts]: Start accepts. Automaton has 3223 states and 3862 transitions. Word has length 98 [2019-11-23 22:48:38,956 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:48:38,957 INFO L462 AbstractCegarLoop]: Abstraction has 3223 states and 3862 transitions. [2019-11-23 22:48:38,957 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-23 22:48:38,957 INFO L276 IsEmpty]: Start isEmpty. Operand 3223 states and 3862 transitions. [2019-11-23 22:48:38,959 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 100 [2019-11-23 22:48:38,959 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:48:38,959 INFO L410 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:48:38,960 INFO L410 AbstractCegarLoop]: === Iteration 17 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:48:38,960 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:48:38,960 INFO L82 PathProgramCache]: Analyzing trace with hash 1328739563, now seen corresponding path program 1 times [2019-11-23 22:48:38,960 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:48:38,960 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1187806263] [2019-11-23 22:48:38,961 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:48:38,971 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:48:38,996 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 21 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2019-11-23 22:48:38,996 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1187806263] [2019-11-23 22:48:38,997 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-23 22:48:38,997 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-11-23 22:48:38,997 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [239204662] [2019-11-23 22:48:38,997 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-23 22:48:38,998 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:48:38,998 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-23 22:48:38,998 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:48:38,998 INFO L87 Difference]: Start difference. First operand 3223 states and 3862 transitions. Second operand 3 states. [2019-11-23 22:48:39,175 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:48:39,176 INFO L93 Difference]: Finished difference Result 5622 states and 6780 transitions. [2019-11-23 22:48:39,176 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-23 22:48:39,176 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 99 [2019-11-23 22:48:39,176 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:48:39,182 INFO L225 Difference]: With dead ends: 5622 [2019-11-23 22:48:39,182 INFO L226 Difference]: Without dead ends: 3075 [2019-11-23 22:48:39,185 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:48:39,188 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3075 states. [2019-11-23 22:48:39,351 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3075 to 3075. [2019-11-23 22:48:39,351 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3075 states. [2019-11-23 22:48:39,356 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3075 states to 3075 states and 3691 transitions. [2019-11-23 22:48:39,356 INFO L78 Accepts]: Start accepts. Automaton has 3075 states and 3691 transitions. Word has length 99 [2019-11-23 22:48:39,357 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:48:39,357 INFO L462 AbstractCegarLoop]: Abstraction has 3075 states and 3691 transitions. [2019-11-23 22:48:39,357 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-23 22:48:39,357 INFO L276 IsEmpty]: Start isEmpty. Operand 3075 states and 3691 transitions. [2019-11-23 22:48:39,360 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 105 [2019-11-23 22:48:39,360 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:48:39,360 INFO L410 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:48:39,360 INFO L410 AbstractCegarLoop]: === Iteration 18 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:48:39,361 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:48:39,361 INFO L82 PathProgramCache]: Analyzing trace with hash -472369520, now seen corresponding path program 1 times [2019-11-23 22:48:39,361 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:48:39,361 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1810078377] [2019-11-23 22:48:39,361 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:48:39,377 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:48:39,451 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 23 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2019-11-23 22:48:39,451 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1810078377] [2019-11-23 22:48:39,451 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-23 22:48:39,452 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-11-23 22:48:39,452 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1787141890] [2019-11-23 22:48:39,452 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-11-23 22:48:39,452 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:48:39,453 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-11-23 22:48:39,453 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2019-11-23 22:48:39,453 INFO L87 Difference]: Start difference. First operand 3075 states and 3691 transitions. Second operand 8 states. [2019-11-23 22:48:40,014 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:48:40,015 INFO L93 Difference]: Finished difference Result 5286 states and 6380 transitions. [2019-11-23 22:48:40,015 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-11-23 22:48:40,015 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 104 [2019-11-23 22:48:40,015 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:48:40,019 INFO L225 Difference]: With dead ends: 5286 [2019-11-23 22:48:40,019 INFO L226 Difference]: Without dead ends: 2229 [2019-11-23 22:48:40,023 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=80, Unknown=0, NotChecked=0, Total=110 [2019-11-23 22:48:40,025 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2229 states. [2019-11-23 22:48:40,157 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2229 to 1920. [2019-11-23 22:48:40,157 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1920 states. [2019-11-23 22:48:40,160 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1920 states to 1920 states and 2325 transitions. [2019-11-23 22:48:40,160 INFO L78 Accepts]: Start accepts. Automaton has 1920 states and 2325 transitions. Word has length 104 [2019-11-23 22:48:40,160 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:48:40,160 INFO L462 AbstractCegarLoop]: Abstraction has 1920 states and 2325 transitions. [2019-11-23 22:48:40,161 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-11-23 22:48:40,161 INFO L276 IsEmpty]: Start isEmpty. Operand 1920 states and 2325 transitions. [2019-11-23 22:48:40,162 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 108 [2019-11-23 22:48:40,162 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:48:40,163 INFO L410 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:48:40,163 INFO L410 AbstractCegarLoop]: === Iteration 19 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:48:40,163 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:48:40,163 INFO L82 PathProgramCache]: Analyzing trace with hash 663738500, now seen corresponding path program 1 times [2019-11-23 22:48:40,164 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:48:40,164 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [814075268] [2019-11-23 22:48:40,164 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:48:40,174 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:48:40,221 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 20 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2019-11-23 22:48:40,221 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [814075268] [2019-11-23 22:48:40,222 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-23 22:48:40,222 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-23 22:48:40,222 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [425395413] [2019-11-23 22:48:40,223 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-23 22:48:40,223 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:48:40,223 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-23 22:48:40,223 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-11-23 22:48:40,223 INFO L87 Difference]: Start difference. First operand 1920 states and 2325 transitions. Second operand 4 states. [2019-11-23 22:48:40,419 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:48:40,419 INFO L93 Difference]: Finished difference Result 4180 states and 5082 transitions. [2019-11-23 22:48:40,419 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-11-23 22:48:40,419 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 107 [2019-11-23 22:48:40,420 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:48:40,424 INFO L225 Difference]: With dead ends: 4180 [2019-11-23 22:48:40,425 INFO L226 Difference]: Without dead ends: 2423 [2019-11-23 22:48:40,427 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-11-23 22:48:40,430 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2423 states. [2019-11-23 22:48:40,580 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2423 to 2324. [2019-11-23 22:48:40,580 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2324 states. [2019-11-23 22:48:40,583 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2324 states to 2324 states and 2802 transitions. [2019-11-23 22:48:40,583 INFO L78 Accepts]: Start accepts. Automaton has 2324 states and 2802 transitions. Word has length 107 [2019-11-23 22:48:40,584 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:48:40,584 INFO L462 AbstractCegarLoop]: Abstraction has 2324 states and 2802 transitions. [2019-11-23 22:48:40,584 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-23 22:48:40,584 INFO L276 IsEmpty]: Start isEmpty. Operand 2324 states and 2802 transitions. [2019-11-23 22:48:40,587 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 114 [2019-11-23 22:48:40,587 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:48:40,588 INFO L410 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:48:40,588 INFO L410 AbstractCegarLoop]: === Iteration 20 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:48:40,588 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:48:40,588 INFO L82 PathProgramCache]: Analyzing trace with hash -1105184803, now seen corresponding path program 1 times [2019-11-23 22:48:40,589 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:48:40,589 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1934275822] [2019-11-23 22:48:40,589 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:48:40,601 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:48:40,626 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 26 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-23 22:48:40,626 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1934275822] [2019-11-23 22:48:40,626 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-23 22:48:40,627 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-23 22:48:40,627 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [874552710] [2019-11-23 22:48:40,628 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-23 22:48:40,628 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:48:40,628 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-23 22:48:40,629 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:48:40,629 INFO L87 Difference]: Start difference. First operand 2324 states and 2802 transitions. Second operand 3 states. [2019-11-23 22:48:40,747 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:48:40,748 INFO L93 Difference]: Finished difference Result 3902 states and 4743 transitions. [2019-11-23 22:48:40,748 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-23 22:48:40,748 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 113 [2019-11-23 22:48:40,748 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:48:40,750 INFO L225 Difference]: With dead ends: 3902 [2019-11-23 22:48:40,751 INFO L226 Difference]: Without dead ends: 1655 [2019-11-23 22:48:40,754 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:48:40,755 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1655 states. [2019-11-23 22:48:40,861 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1655 to 1653. [2019-11-23 22:48:40,861 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1653 states. [2019-11-23 22:48:40,862 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1653 states to 1653 states and 1933 transitions. [2019-11-23 22:48:40,863 INFO L78 Accepts]: Start accepts. Automaton has 1653 states and 1933 transitions. Word has length 113 [2019-11-23 22:48:40,863 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:48:40,863 INFO L462 AbstractCegarLoop]: Abstraction has 1653 states and 1933 transitions. [2019-11-23 22:48:40,863 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-23 22:48:40,863 INFO L276 IsEmpty]: Start isEmpty. Operand 1653 states and 1933 transitions. [2019-11-23 22:48:40,864 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 115 [2019-11-23 22:48:40,864 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:48:40,865 INFO L410 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:48:40,865 INFO L410 AbstractCegarLoop]: === Iteration 21 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:48:40,865 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:48:40,865 INFO L82 PathProgramCache]: Analyzing trace with hash 1508765653, now seen corresponding path program 1 times [2019-11-23 22:48:40,865 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:48:40,865 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1366303694] [2019-11-23 22:48:40,866 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:48:40,877 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:48:40,952 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 20 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2019-11-23 22:48:40,953 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1366303694] [2019-11-23 22:48:40,954 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-23 22:48:40,954 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-23 22:48:40,954 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1415435401] [2019-11-23 22:48:40,955 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-23 22:48:40,955 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:48:40,955 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-23 22:48:40,955 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-23 22:48:40,955 INFO L87 Difference]: Start difference. First operand 1653 states and 1933 transitions. Second operand 5 states. [2019-11-23 22:48:41,230 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:48:41,231 INFO L93 Difference]: Finished difference Result 4188 states and 4920 transitions. [2019-11-23 22:48:41,231 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-11-23 22:48:41,231 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 114 [2019-11-23 22:48:41,232 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:48:41,236 INFO L225 Difference]: With dead ends: 4188 [2019-11-23 22:48:41,237 INFO L226 Difference]: Without dead ends: 2940 [2019-11-23 22:48:41,239 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-11-23 22:48:41,241 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2940 states. [2019-11-23 22:48:41,374 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2940 to 1905. [2019-11-23 22:48:41,374 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1905 states. [2019-11-23 22:48:41,377 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1905 states to 1905 states and 2228 transitions. [2019-11-23 22:48:41,377 INFO L78 Accepts]: Start accepts. Automaton has 1905 states and 2228 transitions. Word has length 114 [2019-11-23 22:48:41,377 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:48:41,377 INFO L462 AbstractCegarLoop]: Abstraction has 1905 states and 2228 transitions. [2019-11-23 22:48:41,377 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-23 22:48:41,377 INFO L276 IsEmpty]: Start isEmpty. Operand 1905 states and 2228 transitions. [2019-11-23 22:48:41,379 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 119 [2019-11-23 22:48:41,379 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:48:41,379 INFO L410 BasicCegarLoop]: trace histogram [4, 4, 4, 4, 3, 3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:48:41,379 INFO L410 AbstractCegarLoop]: === Iteration 22 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:48:41,380 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:48:41,380 INFO L82 PathProgramCache]: Analyzing trace with hash -1919382230, now seen corresponding path program 1 times [2019-11-23 22:48:41,380 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:48:41,380 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1765461437] [2019-11-23 22:48:41,380 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:48:41,398 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:48:41,486 INFO L134 CoverageAnalysis]: Checked inductivity of 49 backedges. 0 proven. 35 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2019-11-23 22:48:41,486 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1765461437] [2019-11-23 22:48:41,486 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1932323255] [2019-11-23 22:48:41,487 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-11-23 22:48:41,583 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:48:41,585 INFO L255 TraceCheckSpWp]: Trace formula consists of 344 conjuncts, 9 conjunts are in the unsatisfiable core [2019-11-23 22:48:41,610 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2019-11-23 22:48:41,665 INFO L134 CoverageAnalysis]: Checked inductivity of 49 backedges. 0 proven. 35 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2019-11-23 22:48:41,665 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-11-23 22:48:41,666 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 5 [2019-11-23 22:48:41,666 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [124550599] [2019-11-23 22:48:41,666 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-23 22:48:41,667 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:48:41,667 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-23 22:48:41,667 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-23 22:48:41,667 INFO L87 Difference]: Start difference. First operand 1905 states and 2228 transitions. Second operand 5 states. [2019-11-23 22:48:42,067 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:48:42,069 INFO L93 Difference]: Finished difference Result 4107 states and 4811 transitions. [2019-11-23 22:48:42,069 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-11-23 22:48:42,069 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 118 [2019-11-23 22:48:42,070 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:48:42,075 INFO L225 Difference]: With dead ends: 4107 [2019-11-23 22:48:42,075 INFO L226 Difference]: Without dead ends: 3084 [2019-11-23 22:48:42,080 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 125 GetRequests, 119 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-11-23 22:48:42,083 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3084 states. [2019-11-23 22:48:42,310 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3084 to 2067. [2019-11-23 22:48:42,311 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2067 states. [2019-11-23 22:48:42,314 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2067 states to 2067 states and 2410 transitions. [2019-11-23 22:48:42,315 INFO L78 Accepts]: Start accepts. Automaton has 2067 states and 2410 transitions. Word has length 118 [2019-11-23 22:48:42,315 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:48:42,315 INFO L462 AbstractCegarLoop]: Abstraction has 2067 states and 2410 transitions. [2019-11-23 22:48:42,315 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-23 22:48:42,315 INFO L276 IsEmpty]: Start isEmpty. Operand 2067 states and 2410 transitions. [2019-11-23 22:48:42,320 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 173 [2019-11-23 22:48:42,321 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:48:42,321 INFO L410 BasicCegarLoop]: trace histogram [6, 6, 6, 6, 4, 4, 4, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:48:42,535 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 2 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-11-23 22:48:42,536 INFO L410 AbstractCegarLoop]: === Iteration 23 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:48:42,536 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:48:42,536 INFO L82 PathProgramCache]: Analyzing trace with hash -2045968037, now seen corresponding path program 1 times [2019-11-23 22:48:42,541 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:48:42,541 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1461083945] [2019-11-23 22:48:42,542 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:48:42,561 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:48:42,619 INFO L134 CoverageAnalysis]: Checked inductivity of 156 backedges. 129 proven. 0 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2019-11-23 22:48:42,621 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1461083945] [2019-11-23 22:48:42,621 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-23 22:48:42,622 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-23 22:48:42,622 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1179093866] [2019-11-23 22:48:42,622 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-23 22:48:42,622 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:48:42,623 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-23 22:48:42,623 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:48:42,623 INFO L87 Difference]: Start difference. First operand 2067 states and 2410 transitions. Second operand 3 states. [2019-11-23 22:48:42,998 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:48:42,998 INFO L93 Difference]: Finished difference Result 5041 states and 5868 transitions. [2019-11-23 22:48:42,998 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-23 22:48:42,998 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 172 [2019-11-23 22:48:42,999 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:48:43,003 INFO L225 Difference]: With dead ends: 5041 [2019-11-23 22:48:43,003 INFO L226 Difference]: Without dead ends: 3137 [2019-11-23 22:48:43,006 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:48:43,008 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3137 states. [2019-11-23 22:48:43,241 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3137 to 3087. [2019-11-23 22:48:43,241 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3087 states. [2019-11-23 22:48:43,247 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3087 states to 3087 states and 3575 transitions. [2019-11-23 22:48:43,247 INFO L78 Accepts]: Start accepts. Automaton has 3087 states and 3575 transitions. Word has length 172 [2019-11-23 22:48:43,247 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:48:43,247 INFO L462 AbstractCegarLoop]: Abstraction has 3087 states and 3575 transitions. [2019-11-23 22:48:43,248 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-23 22:48:43,248 INFO L276 IsEmpty]: Start isEmpty. Operand 3087 states and 3575 transitions. [2019-11-23 22:48:43,252 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 173 [2019-11-23 22:48:43,252 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:48:43,253 INFO L410 BasicCegarLoop]: trace histogram [6, 6, 6, 6, 4, 4, 4, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:48:43,253 INFO L410 AbstractCegarLoop]: === Iteration 24 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:48:43,253 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:48:43,253 INFO L82 PathProgramCache]: Analyzing trace with hash 1191161181, now seen corresponding path program 1 times [2019-11-23 22:48:43,254 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:48:43,254 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2131172749] [2019-11-23 22:48:43,254 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:48:43,271 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:48:43,312 INFO L134 CoverageAnalysis]: Checked inductivity of 156 backedges. 99 proven. 0 refuted. 0 times theorem prover too weak. 57 trivial. 0 not checked. [2019-11-23 22:48:43,312 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2131172749] [2019-11-23 22:48:43,313 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-23 22:48:43,313 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-23 22:48:43,313 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1225280367] [2019-11-23 22:48:43,315 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-23 22:48:43,316 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:48:43,316 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-23 22:48:43,316 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:48:43,316 INFO L87 Difference]: Start difference. First operand 3087 states and 3575 transitions. Second operand 3 states. [2019-11-23 22:48:43,487 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:48:43,487 INFO L93 Difference]: Finished difference Result 4589 states and 5331 transitions. [2019-11-23 22:48:43,488 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-23 22:48:43,488 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 172 [2019-11-23 22:48:43,488 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:48:43,491 INFO L225 Difference]: With dead ends: 4589 [2019-11-23 22:48:43,491 INFO L226 Difference]: Without dead ends: 1619 [2019-11-23 22:48:43,494 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:48:43,500 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1619 states. [2019-11-23 22:48:43,620 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1619 to 1619. [2019-11-23 22:48:43,620 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1619 states. [2019-11-23 22:48:43,622 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1619 states to 1619 states and 1839 transitions. [2019-11-23 22:48:43,623 INFO L78 Accepts]: Start accepts. Automaton has 1619 states and 1839 transitions. Word has length 172 [2019-11-23 22:48:43,623 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:48:43,623 INFO L462 AbstractCegarLoop]: Abstraction has 1619 states and 1839 transitions. [2019-11-23 22:48:43,623 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-23 22:48:43,623 INFO L276 IsEmpty]: Start isEmpty. Operand 1619 states and 1839 transitions. [2019-11-23 22:48:43,626 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 191 [2019-11-23 22:48:43,626 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:48:43,627 INFO L410 BasicCegarLoop]: trace histogram [6, 6, 6, 6, 4, 4, 4, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:48:43,627 INFO L410 AbstractCegarLoop]: === Iteration 25 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:48:43,629 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:48:43,629 INFO L82 PathProgramCache]: Analyzing trace with hash 1404970223, now seen corresponding path program 1 times [2019-11-23 22:48:43,630 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:48:43,630 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [879338370] [2019-11-23 22:48:43,630 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:48:43,657 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-11-23 22:48:43,685 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-11-23 22:48:43,770 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-11-23 22:48:43,770 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-11-23 22:48:44,021 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 23.11 10:48:44 BoogieIcfgContainer [2019-11-23 22:48:44,021 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-11-23 22:48:44,024 INFO L168 Benchmark]: Toolchain (without parser) took 14915.07 ms. Allocated memory was 137.4 MB in the beginning and 960.5 MB in the end (delta: 823.1 MB). Free memory was 100.8 MB in the beginning and 411.9 MB in the end (delta: -311.2 MB). Peak memory consumption was 512.0 MB. Max. memory is 7.1 GB. [2019-11-23 22:48:44,025 INFO L168 Benchmark]: CDTParser took 0.88 ms. Allocated memory is still 137.4 MB. Free memory was 119.3 MB in the beginning and 119.1 MB in the end (delta: 210.1 kB). Peak memory consumption was 210.1 kB. Max. memory is 7.1 GB. [2019-11-23 22:48:44,026 INFO L168 Benchmark]: CACSL2BoogieTranslator took 499.97 ms. Allocated memory was 137.4 MB in the beginning and 200.8 MB in the end (delta: 63.4 MB). Free memory was 100.6 MB in the beginning and 177.0 MB in the end (delta: -76.4 MB). Peak memory consumption was 24.8 MB. Max. memory is 7.1 GB. [2019-11-23 22:48:44,027 INFO L168 Benchmark]: Boogie Procedure Inliner took 52.35 ms. Allocated memory is still 200.8 MB. Free memory was 177.0 MB in the beginning and 174.9 MB in the end (delta: 2.0 MB). Peak memory consumption was 2.0 MB. Max. memory is 7.1 GB. [2019-11-23 22:48:44,029 INFO L168 Benchmark]: Boogie Preprocessor took 39.46 ms. Allocated memory is still 200.8 MB. Free memory was 174.9 MB in the beginning and 172.6 MB in the end (delta: 2.3 MB). Peak memory consumption was 2.3 MB. Max. memory is 7.1 GB. [2019-11-23 22:48:44,033 INFO L168 Benchmark]: RCFGBuilder took 622.62 ms. Allocated memory is still 200.8 MB. Free memory was 171.9 MB in the beginning and 139.3 MB in the end (delta: 32.6 MB). Peak memory consumption was 32.6 MB. Max. memory is 7.1 GB. [2019-11-23 22:48:44,033 INFO L168 Benchmark]: TraceAbstraction took 13695.46 ms. Allocated memory was 200.8 MB in the beginning and 960.5 MB in the end (delta: 759.7 MB). Free memory was 138.7 MB in the beginning and 411.9 MB in the end (delta: -273.2 MB). Peak memory consumption was 486.4 MB. Max. memory is 7.1 GB. [2019-11-23 22:48:44,036 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.88 ms. Allocated memory is still 137.4 MB. Free memory was 119.3 MB in the beginning and 119.1 MB in the end (delta: 210.1 kB). Peak memory consumption was 210.1 kB. Max. memory is 7.1 GB. * CACSL2BoogieTranslator took 499.97 ms. Allocated memory was 137.4 MB in the beginning and 200.8 MB in the end (delta: 63.4 MB). Free memory was 100.6 MB in the beginning and 177.0 MB in the end (delta: -76.4 MB). Peak memory consumption was 24.8 MB. Max. memory is 7.1 GB. * Boogie Procedure Inliner took 52.35 ms. Allocated memory is still 200.8 MB. Free memory was 177.0 MB in the beginning and 174.9 MB in the end (delta: 2.0 MB). Peak memory consumption was 2.0 MB. Max. memory is 7.1 GB. * Boogie Preprocessor took 39.46 ms. Allocated memory is still 200.8 MB. Free memory was 174.9 MB in the beginning and 172.6 MB in the end (delta: 2.3 MB). Peak memory consumption was 2.3 MB. Max. memory is 7.1 GB. * RCFGBuilder took 622.62 ms. Allocated memory is still 200.8 MB. Free memory was 171.9 MB in the beginning and 139.3 MB in the end (delta: 32.6 MB). Peak memory consumption was 32.6 MB. Max. memory is 7.1 GB. * TraceAbstraction took 13695.46 ms. Allocated memory was 200.8 MB in the beginning and 960.5 MB in the end (delta: 759.7 MB). Free memory was 138.7 MB in the beginning and 411.9 MB in the end (delta: -273.2 MB). Peak memory consumption was 486.4 MB. Max. memory is 7.1 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 9]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L15] int max_loop ; [L16] int num ; [L17] int i ; [L18] int e ; [L19] int timer ; [L20] char data_0 ; [L21] char data_1 ; [L64] int P_1_pc; [L65] int P_1_st ; [L66] int P_1_i ; [L67] int P_1_ev ; [L122] int C_1_pc ; [L123] int C_1_st ; [L124] int C_1_i ; [L125] int C_1_ev ; [L126] int C_1_pr ; VAL [C_1_ev=0, C_1_i=0, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=0, num=0, P_1_ev=0, P_1_i=0, P_1_pc=0, P_1_st=0, timer=0] [L490] int count ; [L491] int __retres2 ; [L495] num = 0 [L496] i = 0 [L497] max_loop = 2 [L499] timer = 0 [L500] P_1_pc = 0 [L501] C_1_pc = 0 [L503] count = 0 [L483] P_1_i = 1 [L484] C_1_i = 1 VAL [C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L421] int kernel_st ; [L422] int tmp ; [L423] int tmp___0 ; [L427] kernel_st = 0 VAL [C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L226] COND TRUE (int )P_1_i == 1 [L227] P_1_st = 0 VAL [C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L231] COND TRUE (int )C_1_i == 1 [L232] C_1_st = 0 VAL [C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L365] int tmp ; [L366] int tmp___0 ; [L367] int tmp___1 ; [L104] int __retres1 ; VAL [C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L107] COND FALSE !((int )P_1_pc == 1) VAL [C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L117] __retres1 = 0 VAL [C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L119] return (__retres1); VAL [C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L371] tmp = is_P_1_triggered() [L373] COND FALSE !(\read(tmp)) VAL [C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L186] int __retres1 ; VAL [C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L189] COND FALSE !((int )C_1_pc == 1) VAL [C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L199] COND FALSE !((int )C_1_pc == 2) VAL [C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L209] __retres1 = 0 VAL [C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L211] return (__retres1); VAL [C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L379] tmp___1 = is_C_1_triggered() [L381] COND FALSE !(\read(tmp___1)) VAL [C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L435] COND TRUE 1 VAL [C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L438] kernel_st = 1 [L262] int tmp ; [L263] int tmp___0 ; [L264] int tmp___1 ; [L265] int tmp___2 ; VAL [C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L269] COND TRUE 1 VAL [C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L241] int __retres1 ; VAL [C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L244] COND TRUE (int )P_1_st == 0 [L245] __retres1 = 1 VAL [C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L258] return (__retres1); VAL [C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L272] tmp___2 = exists_runnable_thread() [L274] COND TRUE \read(tmp___2) VAL [C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L279] COND TRUE (int )P_1_st == 0 [L281] tmp = __VERIFIER_nondet_int() [L283] COND FALSE !(\read(tmp)) VAL [C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L294] COND TRUE (int )C_1_st == 0 [L296] tmp___1 = __VERIFIER_nondet_int() [L298] COND TRUE \read(tmp___1) [L300] C_1_st = 1 [L128] char c ; VAL [C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=1, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L131] COND TRUE (int )C_1_pc == 0 VAL [C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=1, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L146] COND TRUE i < max_loop VAL [C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=1, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L148] COND TRUE num == 0 [L149] timer = 1 [L150] i += 1 [L151] C_1_pc = 1 [L152] C_1_st = 2 VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=0, data_1=0, e=0, i=1, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=1] [L269] COND TRUE 1 VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=0, data_1=0, e=0, i=1, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=1] [L241] int __retres1 ; VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=0, data_1=0, e=0, i=1, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=1] [L244] COND TRUE (int )P_1_st == 0 [L245] __retres1 = 1 VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=0, data_1=0, e=0, i=1, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=1] [L258] return (__retres1); VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=0, data_1=0, e=0, i=1, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=1] [L272] tmp___2 = exists_runnable_thread() [L274] COND TRUE \read(tmp___2) VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=0, data_1=0, e=0, i=1, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=1] [L279] COND TRUE (int )P_1_st == 0 [L281] tmp = __VERIFIER_nondet_int() [L283] COND TRUE \read(tmp) [L285] P_1_st = 1 VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=0, data_1=0, e=0, i=1, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=1, timer=1] [L72] COND TRUE (int )P_1_pc == 0 VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=0, data_1=0, e=0, i=1, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=1, timer=1] [L83] COND TRUE i < max_loop VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=0, data_1=0, e=0, i=1, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=1, timer=1] [L49] COND TRUE i___0 == 0 [L50] data_0 = c VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=1, timer=1] [L87] num += 1 [L88] P_1_pc = 1 [L89] P_1_st = 2 VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L294] COND FALSE !((int )C_1_st == 0) VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L269] COND TRUE 1 VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L241] int __retres1 ; VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L244] COND FALSE !((int )P_1_st == 0) VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L248] COND FALSE !((int )C_1_st == 0) [L256] __retres1 = 0 VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L258] return (__retres1); VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L272] tmp___2 = exists_runnable_thread() [L274] COND FALSE !(\read(tmp___2)) VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L442] kernel_st = 2 VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L446] kernel_st = 3 VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L365] int tmp ; [L366] int tmp___0 ; [L367] int tmp___1 ; [L104] int __retres1 ; VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L107] COND TRUE (int )P_1_pc == 1 VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L108] COND FALSE !((int )P_1_ev == 1) VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L117] __retres1 = 0 VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L119] return (__retres1); VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L371] tmp = is_P_1_triggered() [L373] COND FALSE !(\read(tmp)) VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L186] int __retres1 ; VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L189] COND TRUE (int )C_1_pc == 1 VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L190] COND FALSE !((int )e == 1) VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L199] COND FALSE !((int )C_1_pc == 2) VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L209] __retres1 = 0 VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L211] return (__retres1); VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L379] tmp___1 = is_C_1_triggered() [L381] COND FALSE !(\read(tmp___1)) VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L241] int __retres1 ; VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L244] COND FALSE !((int )P_1_st == 0) VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L248] COND FALSE !((int )C_1_st == 0) [L256] __retres1 = 0 VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L258] return (__retres1); VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L452] tmp = exists_runnable_thread() [L454] COND TRUE tmp == 0 [L456] kernel_st = 4 [L336] C_1_ev = 1 [L338] P_1_ev = 1 VAL [C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L365] int tmp ; [L366] int tmp___0 ; [L367] int tmp___1 ; [L104] int __retres1 ; VAL [C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L107] COND TRUE (int )P_1_pc == 1 VAL [C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L108] COND TRUE (int )P_1_ev == 1 [L109] __retres1 = 1 VAL [C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L119] return (__retres1); VAL [C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L371] tmp = is_P_1_triggered() [L373] COND TRUE \read(tmp) [L374] P_1_st = 0 VAL [C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L186] int __retres1 ; VAL [C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L189] COND TRUE (int )C_1_pc == 1 VAL [C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L190] COND FALSE !((int )e == 1) VAL [C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L199] COND FALSE !((int )C_1_pc == 2) VAL [C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L209] __retres1 = 0 VAL [C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L211] return (__retres1); VAL [C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L379] tmp___1 = is_C_1_triggered() [L381] COND FALSE !(\read(tmp___1)) VAL [C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L350] COND TRUE (int )P_1_ev == 1 [L351] P_1_ev = 2 VAL [C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L355] COND TRUE (int )C_1_ev == 1 [L356] C_1_ev = 2 VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L402] int tmp ; [L403] int __retres2 ; [L241] int __retres1 ; VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L244] COND TRUE (int )P_1_st == 0 [L245] __retres1 = 1 VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L258] return (__retres1); VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L407] tmp = exists_runnable_thread() [L409] COND TRUE \read(tmp) [L410] __retres2 = 0 VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L417] return (__retres2); VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L465] tmp___0 = stop_simulation() [L467] COND FALSE !(\read(tmp___0)) VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L435] COND TRUE 1 VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L438] kernel_st = 1 [L262] int tmp ; [L263] int tmp___0 ; [L264] int tmp___1 ; [L265] int tmp___2 ; VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L269] COND TRUE 1 VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L241] int __retres1 ; VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L244] COND TRUE (int )P_1_st == 0 [L245] __retres1 = 1 VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L258] return (__retres1); VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L272] tmp___2 = exists_runnable_thread() [L274] COND TRUE \read(tmp___2) VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L279] COND TRUE (int )P_1_st == 0 [L281] tmp = __VERIFIER_nondet_int() [L283] COND TRUE \read(tmp) [L285] P_1_st = 1 VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=1, timer=1] [L72] COND FALSE !((int )P_1_pc == 0) VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=1, timer=1] [L75] COND TRUE (int )P_1_pc == 1 VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=1, timer=1] [L83] COND TRUE i < max_loop VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=1, timer=1] [L49] COND FALSE !(i___0 == 0) VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=1, timer=1] [L52] COND TRUE i___0 == 1 [L53] data_1 = c VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=1, timer=1] [L87] num += 1 [L88] P_1_pc = 1 [L89] P_1_st = 2 VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L294] COND FALSE !((int )C_1_st == 0) VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L269] COND TRUE 1 VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L241] int __retres1 ; VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L244] COND FALSE !((int )P_1_st == 0) VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L248] COND FALSE !((int )C_1_st == 0) [L256] __retres1 = 0 VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L258] return (__retres1); VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L272] tmp___2 = exists_runnable_thread() [L274] COND FALSE !(\read(tmp___2)) VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L442] kernel_st = 2 VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L446] kernel_st = 3 VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L365] int tmp ; [L366] int tmp___0 ; [L367] int tmp___1 ; [L104] int __retres1 ; VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L107] COND TRUE (int )P_1_pc == 1 VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L108] COND FALSE !((int )P_1_ev == 1) VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L117] __retres1 = 0 VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L119] return (__retres1); VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L371] tmp = is_P_1_triggered() [L373] COND FALSE !(\read(tmp)) VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L186] int __retres1 ; VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L189] COND TRUE (int )C_1_pc == 1 VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L190] COND FALSE !((int )e == 1) VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L199] COND FALSE !((int )C_1_pc == 2) VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L209] __retres1 = 0 VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L211] return (__retres1); VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L379] tmp___1 = is_C_1_triggered() [L381] COND FALSE !(\read(tmp___1)) VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L241] int __retres1 ; VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L244] COND FALSE !((int )P_1_st == 0) VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L248] COND FALSE !((int )C_1_st == 0) [L256] __retres1 = 0 VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L258] return (__retres1); VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L452] tmp = exists_runnable_thread() [L454] COND TRUE tmp == 0 [L456] kernel_st = 4 [L336] C_1_ev = 1 [L338] P_1_ev = 1 VAL [C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L365] int tmp ; [L366] int tmp___0 ; [L367] int tmp___1 ; [L104] int __retres1 ; VAL [C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L107] COND TRUE (int )P_1_pc == 1 VAL [C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L108] COND TRUE (int )P_1_ev == 1 [L109] __retres1 = 1 VAL [C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L119] return (__retres1); VAL [C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L371] tmp = is_P_1_triggered() [L373] COND TRUE \read(tmp) [L374] P_1_st = 0 VAL [C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L186] int __retres1 ; VAL [C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L189] COND TRUE (int )C_1_pc == 1 VAL [C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L190] COND FALSE !((int )e == 1) VAL [C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L199] COND FALSE !((int )C_1_pc == 2) VAL [C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L209] __retres1 = 0 VAL [C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L211] return (__retres1); VAL [C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L379] tmp___1 = is_C_1_triggered() [L381] COND FALSE !(\read(tmp___1)) VAL [C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L350] COND TRUE (int )P_1_ev == 1 [L351] P_1_ev = 2 VAL [C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L355] COND TRUE (int )C_1_ev == 1 [L356] C_1_ev = 2 VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L402] int tmp ; [L403] int __retres2 ; [L241] int __retres1 ; VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L244] COND TRUE (int )P_1_st == 0 [L245] __retres1 = 1 VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L258] return (__retres1); VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L407] tmp = exists_runnable_thread() [L409] COND TRUE \read(tmp) [L410] __retres2 = 0 VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L417] return (__retres2); VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L465] tmp___0 = stop_simulation() [L467] COND FALSE !(\read(tmp___0)) VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L435] COND TRUE 1 VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L438] kernel_st = 1 [L262] int tmp ; [L263] int tmp___0 ; [L264] int tmp___1 ; [L265] int tmp___2 ; VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L269] COND TRUE 1 VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L241] int __retres1 ; VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L244] COND TRUE (int )P_1_st == 0 [L245] __retres1 = 1 VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L258] return (__retres1); VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L272] tmp___2 = exists_runnable_thread() [L274] COND TRUE \read(tmp___2) VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L279] COND TRUE (int )P_1_st == 0 [L281] tmp = __VERIFIER_nondet_int() [L283] COND TRUE \read(tmp) [L285] P_1_st = 1 VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=1, timer=1] [L72] COND FALSE !((int )P_1_pc == 0) VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=1, timer=1] [L75] COND TRUE (int )P_1_pc == 1 VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=1, timer=1] [L83] COND TRUE i < max_loop VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=1, timer=1] [L49] COND FALSE !(i___0 == 0) VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=1, timer=1] [L52] COND FALSE !(i___0 == 1) VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=1, timer=1] [L9] __VERIFIER_error() VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=1, timer=1] - StatisticsResult: Ultimate Automizer benchmark data CFG has 1 procedures, 117 locations, 3 error locations. Result: UNSAFE, OverallTime: 13.6s, OverallIterations: 25, TraceHistogramMax: 6, AutomataDifference: 6.4s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 4775 SDtfs, 4830 SDslu, 6046 SDs, 0 SdLazy, 568 SolverSat, 139 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 0.7s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 232 GetRequests, 169 SyntacticMatches, 3 SemanticMatches, 60 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 20 ImplicationChecksByTransitivity, 0.5s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=4273occurred in iteration=10, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 4.5s AutomataMinimizationTime, 24 MinimizatonAttempts, 6607 StatesRemovedByMinimization, 20 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.3s SatisfiabilityAnalysisTime, 1.0s InterpolantComputationTime, 2135 NumberOfCodeBlocks, 2135 NumberOfCodeBlocksAsserted, 26 NumberOfCheckSat, 1920 ConstructedInterpolants, 0 QuantifiedInterpolants, 350700 SizeOfPredicates, 2 NumberOfNonLiveVariables, 344 ConjunctsInSsa, 9 ConjunctsInUnsatCore, 25 InterpolantComputations, 23 PerfectInterpolantSequences, 619/689 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...