/usr/bin/java -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata ./data -tc ../../../trunk/examples/toolchains/AutomizerCInline.xml -s ../../../trunk/examples/settings/default/automizer/svcomp-Reach-32bit-Automizer_Default.epf -i ../../../trunk/examples/svcomp/seq-mthreaded/pals_STARTPALS_ActiveStandby.4_2.ufo.BOUNDED-10.pals.c -------------------------------------------------------------------------------- This is Ultimate 0.1.24-6598664 [2019-11-23 22:36:33,867 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-11-23 22:36:33,869 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-11-23 22:36:33,887 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-11-23 22:36:33,888 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-11-23 22:36:33,890 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-11-23 22:36:33,891 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-11-23 22:36:33,902 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-11-23 22:36:33,906 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-11-23 22:36:33,908 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-11-23 22:36:33,910 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-11-23 22:36:33,912 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-11-23 22:36:33,912 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-11-23 22:36:33,914 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-11-23 22:36:33,916 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-11-23 22:36:33,917 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-11-23 22:36:33,919 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-11-23 22:36:33,919 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-11-23 22:36:33,921 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-11-23 22:36:33,926 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-11-23 22:36:33,930 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-11-23 22:36:33,934 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-11-23 22:36:33,935 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-11-23 22:36:33,935 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-11-23 22:36:33,937 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... 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[2019-11-23 22:36:33,941 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-11-23 22:36:33,942 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-11-23 22:36:33,943 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-11-23 22:36:33,944 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-11-23 22:36:33,945 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-11-23 22:36:33,945 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-11-23 22:36:33,946 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-11-23 22:36:33,946 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-11-23 22:36:33,946 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-11-23 22:36:33,947 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-11-23 22:36:33,948 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-11-23 22:36:33,949 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/default/automizer/svcomp-Reach-32bit-Automizer_Default.epf [2019-11-23 22:36:33,985 INFO L113 SettingsManager]: Loading preferences was successful [2019-11-23 22:36:33,985 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-11-23 22:36:33,986 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-11-23 22:36:33,987 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-11-23 22:36:33,987 INFO L138 SettingsManager]: * Use SBE=true [2019-11-23 22:36:33,987 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-11-23 22:36:33,987 INFO L138 SettingsManager]: * sizeof long=4 [2019-11-23 22:36:33,987 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-11-23 22:36:33,988 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-11-23 22:36:33,988 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-11-23 22:36:33,988 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-11-23 22:36:33,988 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-11-23 22:36:33,988 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-11-23 22:36:33,989 INFO L138 SettingsManager]: * Adapt memory model on pointer casts if necessary=true [2019-11-23 22:36:33,992 INFO L138 SettingsManager]: * sizeof long double=12 [2019-11-23 22:36:33,992 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-11-23 22:36:33,992 INFO L138 SettingsManager]: * Use constant arrays=true [2019-11-23 22:36:33,992 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-11-23 22:36:33,993 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-11-23 22:36:33,993 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-11-23 22:36:33,993 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-11-23 22:36:33,993 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-11-23 22:36:33,993 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-11-23 22:36:33,995 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-11-23 22:36:33,995 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-11-23 22:36:33,995 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-11-23 22:36:33,995 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-11-23 22:36:33,995 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-11-23 22:36:33,995 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-11-23 22:36:33,996 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2019-11-23 22:36:34,315 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-11-23 22:36:34,336 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-11-23 22:36:34,341 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-11-23 22:36:34,342 INFO L271 PluginConnector]: Initializing CDTParser... [2019-11-23 22:36:34,342 INFO L275 PluginConnector]: CDTParser initialized [2019-11-23 22:36:34,343 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/seq-mthreaded/pals_STARTPALS_ActiveStandby.4_2.ufo.BOUNDED-10.pals.c [2019-11-23 22:36:34,409 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/f85b656d0/2b0c68012ee746b8847465c9f2072d0c/FLAG1e8e1ef33 [2019-11-23 22:36:34,962 INFO L306 CDTParser]: Found 1 translation units. [2019-11-23 22:36:34,962 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/seq-mthreaded/pals_STARTPALS_ActiveStandby.4_2.ufo.BOUNDED-10.pals.c [2019-11-23 22:36:34,971 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/f85b656d0/2b0c68012ee746b8847465c9f2072d0c/FLAG1e8e1ef33 [2019-11-23 22:36:35,232 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/f85b656d0/2b0c68012ee746b8847465c9f2072d0c [2019-11-23 22:36:35,241 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-11-23 22:36:35,243 INFO L131 ToolchainWalker]: Walking toolchain with 5 elements. [2019-11-23 22:36:35,244 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-11-23 22:36:35,244 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-11-23 22:36:35,247 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-11-23 22:36:35,248 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 23.11 10:36:35" (1/1) ... [2019-11-23 22:36:35,251 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@182f03c5 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:36:35, skipping insertion in model container [2019-11-23 22:36:35,251 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 23.11 10:36:35" (1/1) ... [2019-11-23 22:36:35,260 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-11-23 22:36:35,308 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-11-23 22:36:35,808 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-11-23 22:36:35,817 INFO L203 MainTranslator]: Completed pre-run [2019-11-23 22:36:35,879 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-11-23 22:36:35,900 INFO L208 MainTranslator]: Completed translation [2019-11-23 22:36:35,901 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:36:35 WrapperNode [2019-11-23 22:36:35,901 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-11-23 22:36:35,902 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-11-23 22:36:35,902 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-11-23 22:36:35,902 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-11-23 22:36:35,910 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:36:35" (1/1) ... [2019-11-23 22:36:35,924 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:36:35" (1/1) ... [2019-11-23 22:36:35,980 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-11-23 22:36:35,981 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-11-23 22:36:35,981 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-11-23 22:36:35,981 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-11-23 22:36:35,991 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:36:35" (1/1) ... [2019-11-23 22:36:35,994 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:36:35" (1/1) ... [2019-11-23 22:36:36,000 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:36:35" (1/1) ... [2019-11-23 22:36:36,000 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:36:35" (1/1) ... [2019-11-23 22:36:36,017 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:36:35" (1/1) ... [2019-11-23 22:36:36,030 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:36:35" (1/1) ... [2019-11-23 22:36:36,035 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:36:35" (1/1) ... [2019-11-23 22:36:36,043 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-11-23 22:36:36,044 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-11-23 22:36:36,044 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-11-23 22:36:36,044 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-11-23 22:36:36,045 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:36:35" (1/1) ... No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-11-23 22:36:36,115 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-11-23 22:36:36,116 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-11-23 22:36:37,267 INFO L279 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-11-23 22:36:37,268 INFO L284 CfgBuilder]: Removed 119 assume(true) statements. [2019-11-23 22:36:37,269 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 23.11 10:36:37 BoogieIcfgContainer [2019-11-23 22:36:37,269 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-11-23 22:36:37,270 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-11-23 22:36:37,271 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-11-23 22:36:37,274 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-11-23 22:36:37,274 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 23.11 10:36:35" (1/3) ... [2019-11-23 22:36:37,275 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@7ab88030 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 23.11 10:36:37, skipping insertion in model container [2019-11-23 22:36:37,275 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:36:35" (2/3) ... [2019-11-23 22:36:37,276 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@7ab88030 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 23.11 10:36:37, skipping insertion in model container [2019-11-23 22:36:37,276 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 23.11 10:36:37" (3/3) ... [2019-11-23 22:36:37,278 INFO L109 eAbstractionObserver]: Analyzing ICFG pals_STARTPALS_ActiveStandby.4_2.ufo.BOUNDED-10.pals.c [2019-11-23 22:36:37,287 INFO L153 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-11-23 22:36:37,294 INFO L165 ceAbstractionStarter]: Appying trace abstraction to program that has 23 error locations. [2019-11-23 22:36:37,305 INFO L249 AbstractCegarLoop]: Starting to check reachability of 23 error locations. [2019-11-23 22:36:37,330 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-11-23 22:36:37,331 INFO L374 AbstractCegarLoop]: Hoare is true [2019-11-23 22:36:37,331 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-11-23 22:36:37,331 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-11-23 22:36:37,331 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-11-23 22:36:37,331 INFO L378 AbstractCegarLoop]: Difference is false [2019-11-23 22:36:37,332 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-11-23 22:36:37,332 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-11-23 22:36:37,358 INFO L276 IsEmpty]: Start isEmpty. Operand 293 states. [2019-11-23 22:36:37,364 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2019-11-23 22:36:37,365 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:36:37,365 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:36:37,366 INFO L410 AbstractCegarLoop]: === Iteration 1 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:36:37,370 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:36:37,371 INFO L82 PathProgramCache]: Analyzing trace with hash 211735483, now seen corresponding path program 1 times [2019-11-23 22:36:37,379 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:36:37,379 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2101953750] [2019-11-23 22:36:37,379 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:36:37,498 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:36:37,592 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-23 22:36:37,593 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2101953750] [2019-11-23 22:36:37,594 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-23 22:36:37,595 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-23 22:36:37,596 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2069979547] [2019-11-23 22:36:37,601 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-23 22:36:37,602 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:36:37,615 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-23 22:36:37,616 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:36:37,618 INFO L87 Difference]: Start difference. First operand 293 states. Second operand 3 states. [2019-11-23 22:36:37,724 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:36:37,724 INFO L93 Difference]: Finished difference Result 572 states and 892 transitions. [2019-11-23 22:36:37,727 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-23 22:36:37,728 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 31 [2019-11-23 22:36:37,728 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:36:37,744 INFO L225 Difference]: With dead ends: 572 [2019-11-23 22:36:37,745 INFO L226 Difference]: Without dead ends: 289 [2019-11-23 22:36:37,750 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:36:37,768 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 289 states. [2019-11-23 22:36:37,814 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 289 to 289. [2019-11-23 22:36:37,815 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 289 states. [2019-11-23 22:36:37,819 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 289 states to 289 states and 413 transitions. [2019-11-23 22:36:37,820 INFO L78 Accepts]: Start accepts. Automaton has 289 states and 413 transitions. Word has length 31 [2019-11-23 22:36:37,820 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:36:37,821 INFO L462 AbstractCegarLoop]: Abstraction has 289 states and 413 transitions. [2019-11-23 22:36:37,821 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-23 22:36:37,821 INFO L276 IsEmpty]: Start isEmpty. Operand 289 states and 413 transitions. [2019-11-23 22:36:37,822 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2019-11-23 22:36:37,823 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:36:37,823 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:36:37,824 INFO L410 AbstractCegarLoop]: === Iteration 2 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:36:37,824 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:36:37,824 INFO L82 PathProgramCache]: Analyzing trace with hash -1187444686, now seen corresponding path program 1 times [2019-11-23 22:36:37,824 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:36:37,825 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [306251955] [2019-11-23 22:36:37,825 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:36:37,950 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:36:38,087 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-23 22:36:38,088 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [306251955] [2019-11-23 22:36:38,088 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-23 22:36:38,088 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-23 22:36:38,089 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [746616286] [2019-11-23 22:36:38,091 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-23 22:36:38,091 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:36:38,092 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-23 22:36:38,095 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:36:38,095 INFO L87 Difference]: Start difference. First operand 289 states and 413 transitions. Second operand 3 states. [2019-11-23 22:36:38,153 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:36:38,154 INFO L93 Difference]: Finished difference Result 597 states and 861 transitions. [2019-11-23 22:36:38,154 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-23 22:36:38,154 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 42 [2019-11-23 22:36:38,155 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:36:38,158 INFO L225 Difference]: With dead ends: 597 [2019-11-23 22:36:38,158 INFO L226 Difference]: Without dead ends: 323 [2019-11-23 22:36:38,161 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:36:38,164 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 323 states. [2019-11-23 22:36:38,197 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 323 to 265. [2019-11-23 22:36:38,197 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 265 states. [2019-11-23 22:36:38,199 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 265 states to 265 states and 377 transitions. [2019-11-23 22:36:38,199 INFO L78 Accepts]: Start accepts. Automaton has 265 states and 377 transitions. Word has length 42 [2019-11-23 22:36:38,199 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:36:38,199 INFO L462 AbstractCegarLoop]: Abstraction has 265 states and 377 transitions. [2019-11-23 22:36:38,200 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-23 22:36:38,203 INFO L276 IsEmpty]: Start isEmpty. Operand 265 states and 377 transitions. [2019-11-23 22:36:38,204 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2019-11-23 22:36:38,204 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:36:38,205 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:36:38,205 INFO L410 AbstractCegarLoop]: === Iteration 3 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:36:38,205 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:36:38,206 INFO L82 PathProgramCache]: Analyzing trace with hash 1273755287, now seen corresponding path program 1 times [2019-11-23 22:36:38,208 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:36:38,208 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1015289486] [2019-11-23 22:36:38,208 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:36:38,274 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:36:38,371 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-23 22:36:38,371 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1015289486] [2019-11-23 22:36:38,371 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-23 22:36:38,374 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-23 22:36:38,374 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1405108910] [2019-11-23 22:36:38,374 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-23 22:36:38,375 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:36:38,375 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-23 22:36:38,375 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:36:38,375 INFO L87 Difference]: Start difference. First operand 265 states and 377 transitions. Second operand 3 states. [2019-11-23 22:36:38,431 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:36:38,431 INFO L93 Difference]: Finished difference Result 742 states and 1066 transitions. [2019-11-23 22:36:38,432 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-23 22:36:38,432 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 49 [2019-11-23 22:36:38,432 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:36:38,435 INFO L225 Difference]: With dead ends: 742 [2019-11-23 22:36:38,435 INFO L226 Difference]: Without dead ends: 492 [2019-11-23 22:36:38,436 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:36:38,438 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 492 states. [2019-11-23 22:36:38,452 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 492 to 300. [2019-11-23 22:36:38,453 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 300 states. [2019-11-23 22:36:38,454 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 300 states to 300 states and 429 transitions. [2019-11-23 22:36:38,454 INFO L78 Accepts]: Start accepts. Automaton has 300 states and 429 transitions. Word has length 49 [2019-11-23 22:36:38,455 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:36:38,455 INFO L462 AbstractCegarLoop]: Abstraction has 300 states and 429 transitions. [2019-11-23 22:36:38,455 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-23 22:36:38,455 INFO L276 IsEmpty]: Start isEmpty. Operand 300 states and 429 transitions. [2019-11-23 22:36:38,457 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 51 [2019-11-23 22:36:38,457 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:36:38,457 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:36:38,458 INFO L410 AbstractCegarLoop]: === Iteration 4 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:36:38,458 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:36:38,458 INFO L82 PathProgramCache]: Analyzing trace with hash -1910840580, now seen corresponding path program 1 times [2019-11-23 22:36:38,458 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:36:38,459 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1655091910] [2019-11-23 22:36:38,459 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:36:38,500 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:36:38,562 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-23 22:36:38,563 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1655091910] [2019-11-23 22:36:38,563 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-23 22:36:38,564 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-23 22:36:38,564 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [779107686] [2019-11-23 22:36:38,564 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-23 22:36:38,565 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:36:38,565 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-23 22:36:38,565 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-23 22:36:38,566 INFO L87 Difference]: Start difference. First operand 300 states and 429 transitions. Second operand 5 states. [2019-11-23 22:36:38,853 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:36:38,854 INFO L93 Difference]: Finished difference Result 942 states and 1360 transitions. [2019-11-23 22:36:38,855 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-11-23 22:36:38,855 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 50 [2019-11-23 22:36:38,856 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:36:38,861 INFO L225 Difference]: With dead ends: 942 [2019-11-23 22:36:38,861 INFO L226 Difference]: Without dead ends: 657 [2019-11-23 22:36:38,865 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2019-11-23 22:36:38,867 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 657 states. [2019-11-23 22:36:38,886 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 657 to 386. [2019-11-23 22:36:38,887 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 386 states. [2019-11-23 22:36:38,888 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 386 states to 386 states and 552 transitions. [2019-11-23 22:36:38,889 INFO L78 Accepts]: Start accepts. Automaton has 386 states and 552 transitions. Word has length 50 [2019-11-23 22:36:38,890 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:36:38,891 INFO L462 AbstractCegarLoop]: Abstraction has 386 states and 552 transitions. [2019-11-23 22:36:38,891 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-23 22:36:38,891 INFO L276 IsEmpty]: Start isEmpty. Operand 386 states and 552 transitions. [2019-11-23 22:36:38,899 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2019-11-23 22:36:38,899 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:36:38,899 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:36:38,900 INFO L410 AbstractCegarLoop]: === Iteration 5 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:36:38,900 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:36:38,900 INFO L82 PathProgramCache]: Analyzing trace with hash -1041102253, now seen corresponding path program 1 times [2019-11-23 22:36:38,900 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:36:38,901 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [59411837] [2019-11-23 22:36:38,901 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:36:38,948 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:36:39,025 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-23 22:36:39,025 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [59411837] [2019-11-23 22:36:39,026 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-23 22:36:39,026 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-23 22:36:39,026 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [604865785] [2019-11-23 22:36:39,027 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-23 22:36:39,027 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:36:39,028 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-23 22:36:39,028 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-23 22:36:39,028 INFO L87 Difference]: Start difference. First operand 386 states and 552 transitions. Second operand 5 states. [2019-11-23 22:36:39,279 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:36:39,280 INFO L93 Difference]: Finished difference Result 944 states and 1360 transitions. [2019-11-23 22:36:39,280 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-11-23 22:36:39,280 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 51 [2019-11-23 22:36:39,281 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:36:39,284 INFO L225 Difference]: With dead ends: 944 [2019-11-23 22:36:39,285 INFO L226 Difference]: Without dead ends: 659 [2019-11-23 22:36:39,285 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2019-11-23 22:36:39,287 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 659 states. [2019-11-23 22:36:39,304 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 659 to 390. [2019-11-23 22:36:39,304 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 390 states. [2019-11-23 22:36:39,306 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 390 states to 390 states and 556 transitions. [2019-11-23 22:36:39,306 INFO L78 Accepts]: Start accepts. Automaton has 390 states and 556 transitions. Word has length 51 [2019-11-23 22:36:39,307 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:36:39,307 INFO L462 AbstractCegarLoop]: Abstraction has 390 states and 556 transitions. [2019-11-23 22:36:39,307 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-23 22:36:39,307 INFO L276 IsEmpty]: Start isEmpty. Operand 390 states and 556 transitions. [2019-11-23 22:36:39,308 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2019-11-23 22:36:39,308 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:36:39,308 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:36:39,309 INFO L410 AbstractCegarLoop]: === Iteration 6 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:36:39,309 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:36:39,309 INFO L82 PathProgramCache]: Analyzing trace with hash -458607163, now seen corresponding path program 1 times [2019-11-23 22:36:39,309 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:36:39,310 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [913358383] [2019-11-23 22:36:39,310 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:36:39,336 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:36:39,404 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-23 22:36:39,404 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [913358383] [2019-11-23 22:36:39,405 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-23 22:36:39,405 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-23 22:36:39,405 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [253339412] [2019-11-23 22:36:39,406 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-23 22:36:39,406 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:36:39,406 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-23 22:36:39,406 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-23 22:36:39,406 INFO L87 Difference]: Start difference. First operand 390 states and 556 transitions. Second operand 4 states. [2019-11-23 22:36:39,694 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:36:39,695 INFO L93 Difference]: Finished difference Result 944 states and 1356 transitions. [2019-11-23 22:36:39,695 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-23 22:36:39,695 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 53 [2019-11-23 22:36:39,697 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:36:39,701 INFO L225 Difference]: With dead ends: 944 [2019-11-23 22:36:39,702 INFO L226 Difference]: Without dead ends: 659 [2019-11-23 22:36:39,704 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-23 22:36:39,705 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 659 states. [2019-11-23 22:36:39,722 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 659 to 390. [2019-11-23 22:36:39,723 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 390 states. [2019-11-23 22:36:39,725 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 390 states to 390 states and 554 transitions. [2019-11-23 22:36:39,725 INFO L78 Accepts]: Start accepts. Automaton has 390 states and 554 transitions. Word has length 53 [2019-11-23 22:36:39,727 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:36:39,727 INFO L462 AbstractCegarLoop]: Abstraction has 390 states and 554 transitions. [2019-11-23 22:36:39,727 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-23 22:36:39,728 INFO L276 IsEmpty]: Start isEmpty. Operand 390 states and 554 transitions. [2019-11-23 22:36:39,729 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2019-11-23 22:36:39,729 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:36:39,729 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:36:39,730 INFO L410 AbstractCegarLoop]: === Iteration 7 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:36:39,730 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:36:39,730 INFO L82 PathProgramCache]: Analyzing trace with hash 1789775306, now seen corresponding path program 1 times [2019-11-23 22:36:39,731 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:36:39,731 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1519684325] [2019-11-23 22:36:39,731 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:36:39,777 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:36:39,934 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-23 22:36:39,935 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1519684325] [2019-11-23 22:36:39,935 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-23 22:36:39,935 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-23 22:36:39,936 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2033342851] [2019-11-23 22:36:39,936 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-23 22:36:39,936 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:36:39,937 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-23 22:36:39,937 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-11-23 22:36:39,937 INFO L87 Difference]: Start difference. First operand 390 states and 554 transitions. Second operand 5 states. [2019-11-23 22:36:39,999 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:36:40,000 INFO L93 Difference]: Finished difference Result 776 states and 1117 transitions. [2019-11-23 22:36:40,000 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-11-23 22:36:40,000 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 54 [2019-11-23 22:36:40,001 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:36:40,003 INFO L225 Difference]: With dead ends: 776 [2019-11-23 22:36:40,004 INFO L226 Difference]: Without dead ends: 491 [2019-11-23 22:36:40,005 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 4 SyntacticMatches, 1 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2019-11-23 22:36:40,006 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 491 states. [2019-11-23 22:36:40,025 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 491 to 385. [2019-11-23 22:36:40,025 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 385 states. [2019-11-23 22:36:40,027 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 385 states to 385 states and 546 transitions. [2019-11-23 22:36:40,027 INFO L78 Accepts]: Start accepts. Automaton has 385 states and 546 transitions. Word has length 54 [2019-11-23 22:36:40,028 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:36:40,028 INFO L462 AbstractCegarLoop]: Abstraction has 385 states and 546 transitions. [2019-11-23 22:36:40,028 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-23 22:36:40,028 INFO L276 IsEmpty]: Start isEmpty. Operand 385 states and 546 transitions. [2019-11-23 22:36:40,029 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 59 [2019-11-23 22:36:40,029 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:36:40,029 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:36:40,030 INFO L410 AbstractCegarLoop]: === Iteration 8 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:36:40,030 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:36:40,030 INFO L82 PathProgramCache]: Analyzing trace with hash 1630366882, now seen corresponding path program 1 times [2019-11-23 22:36:40,030 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:36:40,031 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [297004841] [2019-11-23 22:36:40,031 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:36:40,057 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:36:40,159 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-23 22:36:40,160 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [297004841] [2019-11-23 22:36:40,160 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-23 22:36:40,160 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-23 22:36:40,161 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1922843189] [2019-11-23 22:36:40,161 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-23 22:36:40,161 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:36:40,162 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-23 22:36:40,162 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-11-23 22:36:40,162 INFO L87 Difference]: Start difference. First operand 385 states and 546 transitions. Second operand 5 states. [2019-11-23 22:36:40,315 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:36:40,316 INFO L93 Difference]: Finished difference Result 807 states and 1166 transitions. [2019-11-23 22:36:40,316 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-23 22:36:40,316 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 58 [2019-11-23 22:36:40,317 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:36:40,319 INFO L225 Difference]: With dead ends: 807 [2019-11-23 22:36:40,320 INFO L226 Difference]: Without dead ends: 527 [2019-11-23 22:36:40,320 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 5 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-11-23 22:36:40,322 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 527 states. [2019-11-23 22:36:40,342 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 527 to 355. [2019-11-23 22:36:40,342 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 355 states. [2019-11-23 22:36:40,344 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 355 states to 355 states and 500 transitions. [2019-11-23 22:36:40,344 INFO L78 Accepts]: Start accepts. Automaton has 355 states and 500 transitions. Word has length 58 [2019-11-23 22:36:40,344 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:36:40,344 INFO L462 AbstractCegarLoop]: Abstraction has 355 states and 500 transitions. [2019-11-23 22:36:40,345 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-23 22:36:40,345 INFO L276 IsEmpty]: Start isEmpty. Operand 355 states and 500 transitions. [2019-11-23 22:36:40,345 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 64 [2019-11-23 22:36:40,345 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:36:40,346 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:36:40,346 INFO L410 AbstractCegarLoop]: === Iteration 9 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:36:40,347 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:36:40,347 INFO L82 PathProgramCache]: Analyzing trace with hash 644191382, now seen corresponding path program 1 times [2019-11-23 22:36:40,348 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:36:40,349 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1349877484] [2019-11-23 22:36:40,349 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:36:40,378 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:36:40,508 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-23 22:36:40,508 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1349877484] [2019-11-23 22:36:40,508 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-23 22:36:40,509 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-23 22:36:40,509 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [876363878] [2019-11-23 22:36:40,509 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-23 22:36:40,509 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:36:40,510 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-23 22:36:40,510 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-11-23 22:36:40,510 INFO L87 Difference]: Start difference. First operand 355 states and 500 transitions. Second operand 5 states. [2019-11-23 22:36:40,640 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:36:40,640 INFO L93 Difference]: Finished difference Result 904 states and 1296 transitions. [2019-11-23 22:36:40,640 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-23 22:36:40,640 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 63 [2019-11-23 22:36:40,641 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:36:40,644 INFO L225 Difference]: With dead ends: 904 [2019-11-23 22:36:40,644 INFO L226 Difference]: Without dead ends: 654 [2019-11-23 22:36:40,645 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 5 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-11-23 22:36:40,646 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 654 states. [2019-11-23 22:36:40,667 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 654 to 325. [2019-11-23 22:36:40,667 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 325 states. [2019-11-23 22:36:40,669 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 325 states to 325 states and 454 transitions. [2019-11-23 22:36:40,669 INFO L78 Accepts]: Start accepts. Automaton has 325 states and 454 transitions. Word has length 63 [2019-11-23 22:36:40,669 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:36:40,669 INFO L462 AbstractCegarLoop]: Abstraction has 325 states and 454 transitions. [2019-11-23 22:36:40,669 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-23 22:36:40,669 INFO L276 IsEmpty]: Start isEmpty. Operand 325 states and 454 transitions. [2019-11-23 22:36:40,670 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 69 [2019-11-23 22:36:40,670 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:36:40,670 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:36:40,671 INFO L410 AbstractCegarLoop]: === Iteration 10 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:36:40,671 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:36:40,671 INFO L82 PathProgramCache]: Analyzing trace with hash 157991886, now seen corresponding path program 1 times [2019-11-23 22:36:40,671 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:36:40,672 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [102561109] [2019-11-23 22:36:40,672 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:36:40,723 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:36:40,808 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-23 22:36:40,808 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [102561109] [2019-11-23 22:36:40,808 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-23 22:36:40,809 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-23 22:36:40,809 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2143138066] [2019-11-23 22:36:40,809 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-23 22:36:40,810 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:36:40,810 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-23 22:36:40,810 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-11-23 22:36:40,810 INFO L87 Difference]: Start difference. First operand 325 states and 454 transitions. Second operand 6 states. [2019-11-23 22:36:41,079 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:36:41,080 INFO L93 Difference]: Finished difference Result 1105 states and 1564 transitions. [2019-11-23 22:36:41,080 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2019-11-23 22:36:41,080 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 68 [2019-11-23 22:36:41,081 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:36:41,085 INFO L225 Difference]: With dead ends: 1105 [2019-11-23 22:36:41,085 INFO L226 Difference]: Without dead ends: 885 [2019-11-23 22:36:41,086 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=33, Invalid=77, Unknown=0, NotChecked=0, Total=110 [2019-11-23 22:36:41,087 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 885 states. [2019-11-23 22:36:41,114 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 885 to 364. [2019-11-23 22:36:41,115 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 364 states. [2019-11-23 22:36:41,116 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 364 states to 364 states and 508 transitions. [2019-11-23 22:36:41,116 INFO L78 Accepts]: Start accepts. Automaton has 364 states and 508 transitions. Word has length 68 [2019-11-23 22:36:41,117 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:36:41,117 INFO L462 AbstractCegarLoop]: Abstraction has 364 states and 508 transitions. [2019-11-23 22:36:41,117 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-23 22:36:41,117 INFO L276 IsEmpty]: Start isEmpty. Operand 364 states and 508 transitions. [2019-11-23 22:36:41,118 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 70 [2019-11-23 22:36:41,118 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:36:41,118 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:36:41,118 INFO L410 AbstractCegarLoop]: === Iteration 11 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:36:41,119 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:36:41,119 INFO L82 PathProgramCache]: Analyzing trace with hash -2134355609, now seen corresponding path program 1 times [2019-11-23 22:36:41,119 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:36:41,119 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [269394919] [2019-11-23 22:36:41,120 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:36:41,141 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:36:41,183 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-23 22:36:41,184 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [269394919] [2019-11-23 22:36:41,184 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-23 22:36:41,184 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-23 22:36:41,185 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [201697951] [2019-11-23 22:36:41,185 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-23 22:36:41,185 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:36:41,186 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-23 22:36:41,186 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:36:41,186 INFO L87 Difference]: Start difference. First operand 364 states and 508 transitions. Second operand 3 states. [2019-11-23 22:36:41,255 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:36:41,256 INFO L93 Difference]: Finished difference Result 662 states and 935 transitions. [2019-11-23 22:36:41,256 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-23 22:36:41,256 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 69 [2019-11-23 22:36:41,256 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:36:41,259 INFO L225 Difference]: With dead ends: 662 [2019-11-23 22:36:41,259 INFO L226 Difference]: Without dead ends: 442 [2019-11-23 22:36:41,260 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:36:41,261 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 442 states. [2019-11-23 22:36:41,286 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 442 to 360. [2019-11-23 22:36:41,287 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 360 states. [2019-11-23 22:36:41,288 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 360 states to 360 states and 501 transitions. [2019-11-23 22:36:41,288 INFO L78 Accepts]: Start accepts. Automaton has 360 states and 501 transitions. Word has length 69 [2019-11-23 22:36:41,288 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:36:41,289 INFO L462 AbstractCegarLoop]: Abstraction has 360 states and 501 transitions. [2019-11-23 22:36:41,289 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-23 22:36:41,289 INFO L276 IsEmpty]: Start isEmpty. Operand 360 states and 501 transitions. [2019-11-23 22:36:41,289 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-11-23 22:36:41,290 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:36:41,290 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:36:41,291 INFO L410 AbstractCegarLoop]: === Iteration 12 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:36:41,292 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:36:41,292 INFO L82 PathProgramCache]: Analyzing trace with hash 1585943340, now seen corresponding path program 1 times [2019-11-23 22:36:41,292 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:36:41,293 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [789308492] [2019-11-23 22:36:41,293 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:36:41,318 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:36:41,368 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-23 22:36:41,368 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [789308492] [2019-11-23 22:36:41,368 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-23 22:36:41,369 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-23 22:36:41,369 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1674581714] [2019-11-23 22:36:41,369 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-23 22:36:41,369 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:36:41,370 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-23 22:36:41,370 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-23 22:36:41,370 INFO L87 Difference]: Start difference. First operand 360 states and 501 transitions. Second operand 4 states. [2019-11-23 22:36:41,512 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:36:41,512 INFO L93 Difference]: Finished difference Result 953 states and 1330 transitions. [2019-11-23 22:36:41,512 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-23 22:36:41,513 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 72 [2019-11-23 22:36:41,513 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:36:41,516 INFO L225 Difference]: With dead ends: 953 [2019-11-23 22:36:41,516 INFO L226 Difference]: Without dead ends: 727 [2019-11-23 22:36:41,517 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-23 22:36:41,518 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 727 states. [2019-11-23 22:36:41,556 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 727 to 530. [2019-11-23 22:36:41,557 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 530 states. [2019-11-23 22:36:41,559 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 530 states to 530 states and 734 transitions. [2019-11-23 22:36:41,559 INFO L78 Accepts]: Start accepts. Automaton has 530 states and 734 transitions. Word has length 72 [2019-11-23 22:36:41,559 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:36:41,559 INFO L462 AbstractCegarLoop]: Abstraction has 530 states and 734 transitions. [2019-11-23 22:36:41,559 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-23 22:36:41,560 INFO L276 IsEmpty]: Start isEmpty. Operand 530 states and 734 transitions. [2019-11-23 22:36:41,560 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-11-23 22:36:41,560 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:36:41,561 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:36:41,561 INFO L410 AbstractCegarLoop]: === Iteration 13 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:36:41,561 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:36:41,561 INFO L82 PathProgramCache]: Analyzing trace with hash -2083950892, now seen corresponding path program 1 times [2019-11-23 22:36:41,562 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:36:41,562 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1392114002] [2019-11-23 22:36:41,562 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:36:41,590 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:36:41,647 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-23 22:36:41,647 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1392114002] [2019-11-23 22:36:41,647 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-23 22:36:41,647 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-23 22:36:41,648 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1926670294] [2019-11-23 22:36:41,648 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-23 22:36:41,648 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:36:41,649 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-23 22:36:41,649 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:36:41,649 INFO L87 Difference]: Start difference. First operand 530 states and 734 transitions. Second operand 3 states. [2019-11-23 22:36:41,690 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:36:41,690 INFO L93 Difference]: Finished difference Result 909 states and 1264 transitions. [2019-11-23 22:36:41,690 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-23 22:36:41,691 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 72 [2019-11-23 22:36:41,691 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:36:41,693 INFO L225 Difference]: With dead ends: 909 [2019-11-23 22:36:41,694 INFO L226 Difference]: Without dead ends: 530 [2019-11-23 22:36:41,695 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:36:41,695 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 530 states. [2019-11-23 22:36:41,731 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 530 to 530. [2019-11-23 22:36:41,731 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 530 states. [2019-11-23 22:36:41,734 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 530 states to 530 states and 730 transitions. [2019-11-23 22:36:41,734 INFO L78 Accepts]: Start accepts. Automaton has 530 states and 730 transitions. Word has length 72 [2019-11-23 22:36:41,734 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:36:41,735 INFO L462 AbstractCegarLoop]: Abstraction has 530 states and 730 transitions. [2019-11-23 22:36:41,735 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-23 22:36:41,735 INFO L276 IsEmpty]: Start isEmpty. Operand 530 states and 730 transitions. [2019-11-23 22:36:41,736 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-11-23 22:36:41,736 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:36:41,736 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:36:41,737 INFO L410 AbstractCegarLoop]: === Iteration 14 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:36:41,737 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:36:41,737 INFO L82 PathProgramCache]: Analyzing trace with hash 2070467794, now seen corresponding path program 1 times [2019-11-23 22:36:41,737 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:36:41,742 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [639426970] [2019-11-23 22:36:41,742 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:36:41,761 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:36:41,806 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-23 22:36:41,807 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [639426970] [2019-11-23 22:36:41,807 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-23 22:36:41,809 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-23 22:36:41,809 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [921769997] [2019-11-23 22:36:41,809 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-23 22:36:41,810 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:36:41,810 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-23 22:36:41,810 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:36:41,810 INFO L87 Difference]: Start difference. First operand 530 states and 730 transitions. Second operand 3 states. [2019-11-23 22:36:41,888 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:36:41,888 INFO L93 Difference]: Finished difference Result 1253 states and 1720 transitions. [2019-11-23 22:36:41,888 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-23 22:36:41,888 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 72 [2019-11-23 22:36:41,889 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:36:41,893 INFO L225 Difference]: With dead ends: 1253 [2019-11-23 22:36:41,894 INFO L226 Difference]: Without dead ends: 837 [2019-11-23 22:36:41,896 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:36:41,898 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 837 states. [2019-11-23 22:36:41,942 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 837 to 564. [2019-11-23 22:36:41,942 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 564 states. [2019-11-23 22:36:41,944 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 564 states to 564 states and 774 transitions. [2019-11-23 22:36:41,944 INFO L78 Accepts]: Start accepts. Automaton has 564 states and 774 transitions. Word has length 72 [2019-11-23 22:36:41,945 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:36:41,945 INFO L462 AbstractCegarLoop]: Abstraction has 564 states and 774 transitions. [2019-11-23 22:36:41,945 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-23 22:36:41,945 INFO L276 IsEmpty]: Start isEmpty. Operand 564 states and 774 transitions. [2019-11-23 22:36:41,946 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 74 [2019-11-23 22:36:41,946 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:36:41,946 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:36:41,946 INFO L410 AbstractCegarLoop]: === Iteration 15 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:36:41,947 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:36:41,947 INFO L82 PathProgramCache]: Analyzing trace with hash -1917205063, now seen corresponding path program 1 times [2019-11-23 22:36:41,947 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:36:41,947 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [560945314] [2019-11-23 22:36:41,947 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:36:42,008 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:36:42,105 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-23 22:36:42,105 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [560945314] [2019-11-23 22:36:42,105 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-23 22:36:42,106 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-23 22:36:42,106 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [227159468] [2019-11-23 22:36:42,106 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-23 22:36:42,106 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:36:42,107 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-23 22:36:42,107 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-11-23 22:36:42,107 INFO L87 Difference]: Start difference. First operand 564 states and 774 transitions. Second operand 6 states. [2019-11-23 22:36:42,460 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:36:42,461 INFO L93 Difference]: Finished difference Result 1770 states and 2483 transitions. [2019-11-23 22:36:42,461 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2019-11-23 22:36:42,461 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 73 [2019-11-23 22:36:42,462 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:36:42,469 INFO L225 Difference]: With dead ends: 1770 [2019-11-23 22:36:42,469 INFO L226 Difference]: Without dead ends: 1436 [2019-11-23 22:36:42,472 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=33, Invalid=77, Unknown=0, NotChecked=0, Total=110 [2019-11-23 22:36:42,474 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1436 states. [2019-11-23 22:36:42,526 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1436 to 568. [2019-11-23 22:36:42,526 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 568 states. [2019-11-23 22:36:42,528 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 568 states to 568 states and 779 transitions. [2019-11-23 22:36:42,529 INFO L78 Accepts]: Start accepts. Automaton has 568 states and 779 transitions. Word has length 73 [2019-11-23 22:36:42,529 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:36:42,529 INFO L462 AbstractCegarLoop]: Abstraction has 568 states and 779 transitions. [2019-11-23 22:36:42,529 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-23 22:36:42,529 INFO L276 IsEmpty]: Start isEmpty. Operand 568 states and 779 transitions. [2019-11-23 22:36:42,530 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 74 [2019-11-23 22:36:42,530 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:36:42,530 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:36:42,531 INFO L410 AbstractCegarLoop]: === Iteration 16 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:36:42,531 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:36:42,531 INFO L82 PathProgramCache]: Analyzing trace with hash 197100160, now seen corresponding path program 1 times [2019-11-23 22:36:42,531 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:36:42,532 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [164225330] [2019-11-23 22:36:42,532 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:36:42,563 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:36:42,641 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-23 22:36:42,641 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [164225330] [2019-11-23 22:36:42,642 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-23 22:36:42,642 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-23 22:36:42,642 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1230983009] [2019-11-23 22:36:42,642 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-23 22:36:42,643 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:36:42,643 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-23 22:36:42,643 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-23 22:36:42,643 INFO L87 Difference]: Start difference. First operand 568 states and 779 transitions. Second operand 5 states. [2019-11-23 22:36:42,869 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:36:42,869 INFO L93 Difference]: Finished difference Result 888 states and 1239 transitions. [2019-11-23 22:36:42,870 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-11-23 22:36:42,870 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 73 [2019-11-23 22:36:42,870 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:36:42,876 INFO L225 Difference]: With dead ends: 888 [2019-11-23 22:36:42,876 INFO L226 Difference]: Without dead ends: 886 [2019-11-23 22:36:42,877 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2019-11-23 22:36:42,879 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 886 states. [2019-11-23 22:36:42,939 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 886 to 570. [2019-11-23 22:36:42,940 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 570 states. [2019-11-23 22:36:42,942 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 570 states to 570 states and 781 transitions. [2019-11-23 22:36:42,943 INFO L78 Accepts]: Start accepts. Automaton has 570 states and 781 transitions. Word has length 73 [2019-11-23 22:36:42,944 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:36:42,944 INFO L462 AbstractCegarLoop]: Abstraction has 570 states and 781 transitions. [2019-11-23 22:36:42,944 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-23 22:36:42,944 INFO L276 IsEmpty]: Start isEmpty. Operand 570 states and 781 transitions. [2019-11-23 22:36:42,947 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 74 [2019-11-23 22:36:42,947 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:36:42,948 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:36:42,949 INFO L410 AbstractCegarLoop]: === Iteration 17 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:36:42,949 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:36:42,950 INFO L82 PathProgramCache]: Analyzing trace with hash 2083582807, now seen corresponding path program 1 times [2019-11-23 22:36:42,950 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:36:42,950 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [442643111] [2019-11-23 22:36:42,951 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:36:42,994 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:36:43,082 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-23 22:36:43,082 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [442643111] [2019-11-23 22:36:43,082 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-23 22:36:43,083 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-23 22:36:43,083 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [107325988] [2019-11-23 22:36:43,083 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-23 22:36:43,084 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:36:43,084 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-23 22:36:43,084 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-11-23 22:36:43,085 INFO L87 Difference]: Start difference. First operand 570 states and 781 transitions. Second operand 6 states. [2019-11-23 22:36:43,728 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:36:43,729 INFO L93 Difference]: Finished difference Result 2037 states and 2828 transitions. [2019-11-23 22:36:43,729 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-11-23 22:36:43,729 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 73 [2019-11-23 22:36:43,730 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:36:43,737 INFO L225 Difference]: With dead ends: 2037 [2019-11-23 22:36:43,738 INFO L226 Difference]: Without dead ends: 1662 [2019-11-23 22:36:43,739 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 7 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=54, Invalid=102, Unknown=0, NotChecked=0, Total=156 [2019-11-23 22:36:43,742 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1662 states. [2019-11-23 22:36:43,806 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1662 to 616. [2019-11-23 22:36:43,806 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 616 states. [2019-11-23 22:36:43,808 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 616 states to 616 states and 839 transitions. [2019-11-23 22:36:43,808 INFO L78 Accepts]: Start accepts. Automaton has 616 states and 839 transitions. Word has length 73 [2019-11-23 22:36:43,809 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:36:43,809 INFO L462 AbstractCegarLoop]: Abstraction has 616 states and 839 transitions. [2019-11-23 22:36:43,809 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-23 22:36:43,809 INFO L276 IsEmpty]: Start isEmpty. Operand 616 states and 839 transitions. [2019-11-23 22:36:43,812 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 75 [2019-11-23 22:36:43,812 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:36:43,812 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:36:43,812 INFO L410 AbstractCegarLoop]: === Iteration 18 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:36:43,813 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:36:43,813 INFO L82 PathProgramCache]: Analyzing trace with hash 1204676769, now seen corresponding path program 1 times [2019-11-23 22:36:43,813 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:36:43,813 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [765057742] [2019-11-23 22:36:43,813 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:36:43,849 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:36:43,942 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-23 22:36:43,942 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [765057742] [2019-11-23 22:36:43,942 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-23 22:36:43,943 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-23 22:36:43,943 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [398925876] [2019-11-23 22:36:43,943 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-23 22:36:43,948 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:36:43,948 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-23 22:36:43,948 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-11-23 22:36:43,949 INFO L87 Difference]: Start difference. First operand 616 states and 839 transitions. Second operand 6 states. [2019-11-23 22:36:44,432 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:36:44,433 INFO L93 Difference]: Finished difference Result 2364 states and 3261 transitions. [2019-11-23 22:36:44,433 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-11-23 22:36:44,433 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 74 [2019-11-23 22:36:44,433 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:36:44,443 INFO L225 Difference]: With dead ends: 2364 [2019-11-23 22:36:44,443 INFO L226 Difference]: Without dead ends: 1981 [2019-11-23 22:36:44,444 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 16 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=54, Invalid=102, Unknown=0, NotChecked=0, Total=156 [2019-11-23 22:36:44,447 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1981 states. [2019-11-23 22:36:44,513 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1981 to 694. [2019-11-23 22:36:44,514 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 694 states. [2019-11-23 22:36:44,516 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 694 states to 694 states and 941 transitions. [2019-11-23 22:36:44,516 INFO L78 Accepts]: Start accepts. Automaton has 694 states and 941 transitions. Word has length 74 [2019-11-23 22:36:44,517 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:36:44,517 INFO L462 AbstractCegarLoop]: Abstraction has 694 states and 941 transitions. [2019-11-23 22:36:44,517 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-23 22:36:44,517 INFO L276 IsEmpty]: Start isEmpty. Operand 694 states and 941 transitions. [2019-11-23 22:36:44,518 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 75 [2019-11-23 22:36:44,518 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:36:44,518 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:36:44,519 INFO L410 AbstractCegarLoop]: === Iteration 19 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:36:44,519 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:36:44,519 INFO L82 PathProgramCache]: Analyzing trace with hash -217796256, now seen corresponding path program 1 times [2019-11-23 22:36:44,521 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:36:44,522 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [624087299] [2019-11-23 22:36:44,522 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:36:44,540 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:36:44,604 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-23 22:36:44,604 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [624087299] [2019-11-23 22:36:44,605 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-23 22:36:44,605 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-23 22:36:44,605 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [829190089] [2019-11-23 22:36:44,606 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-23 22:36:44,606 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:36:44,607 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-23 22:36:44,607 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-11-23 22:36:44,607 INFO L87 Difference]: Start difference. First operand 694 states and 941 transitions. Second operand 6 states. [2019-11-23 22:36:44,811 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:36:44,812 INFO L93 Difference]: Finished difference Result 1560 states and 2200 transitions. [2019-11-23 22:36:44,812 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-11-23 22:36:44,812 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 74 [2019-11-23 22:36:44,813 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:36:44,818 INFO L225 Difference]: With dead ends: 1560 [2019-11-23 22:36:44,818 INFO L226 Difference]: Without dead ends: 1160 [2019-11-23 22:36:44,819 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=28, Invalid=62, Unknown=0, NotChecked=0, Total=90 [2019-11-23 22:36:44,821 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1160 states. [2019-11-23 22:36:44,920 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1160 to 700. [2019-11-23 22:36:44,920 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 700 states. [2019-11-23 22:36:44,923 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 700 states to 700 states and 947 transitions. [2019-11-23 22:36:44,924 INFO L78 Accepts]: Start accepts. Automaton has 700 states and 947 transitions. Word has length 74 [2019-11-23 22:36:44,924 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:36:44,924 INFO L462 AbstractCegarLoop]: Abstraction has 700 states and 947 transitions. [2019-11-23 22:36:44,924 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-23 22:36:44,925 INFO L276 IsEmpty]: Start isEmpty. Operand 700 states and 947 transitions. [2019-11-23 22:36:44,926 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 75 [2019-11-23 22:36:44,926 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:36:44,926 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:36:44,927 INFO L410 AbstractCegarLoop]: === Iteration 20 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:36:44,927 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:36:44,927 INFO L82 PathProgramCache]: Analyzing trace with hash -1278252476, now seen corresponding path program 1 times [2019-11-23 22:36:44,928 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:36:44,928 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [100938811] [2019-11-23 22:36:44,928 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:36:44,953 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:36:44,989 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-23 22:36:44,990 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [100938811] [2019-11-23 22:36:44,990 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-23 22:36:44,991 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-23 22:36:44,991 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2077556230] [2019-11-23 22:36:44,992 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-23 22:36:44,993 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:36:44,993 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-23 22:36:44,993 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:36:44,993 INFO L87 Difference]: Start difference. First operand 700 states and 947 transitions. Second operand 3 states. [2019-11-23 22:36:45,118 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:36:45,118 INFO L93 Difference]: Finished difference Result 1374 states and 1891 transitions. [2019-11-23 22:36:45,119 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-23 22:36:45,119 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 74 [2019-11-23 22:36:45,119 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:36:45,123 INFO L225 Difference]: With dead ends: 1374 [2019-11-23 22:36:45,123 INFO L226 Difference]: Without dead ends: 905 [2019-11-23 22:36:45,125 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:36:45,126 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 905 states. [2019-11-23 22:36:45,187 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 905 to 679. [2019-11-23 22:36:45,187 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 679 states. [2019-11-23 22:36:45,189 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 679 states to 679 states and 910 transitions. [2019-11-23 22:36:45,190 INFO L78 Accepts]: Start accepts. Automaton has 679 states and 910 transitions. Word has length 74 [2019-11-23 22:36:45,190 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:36:45,190 INFO L462 AbstractCegarLoop]: Abstraction has 679 states and 910 transitions. [2019-11-23 22:36:45,190 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-23 22:36:45,190 INFO L276 IsEmpty]: Start isEmpty. Operand 679 states and 910 transitions. [2019-11-23 22:36:45,191 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 76 [2019-11-23 22:36:45,192 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:36:45,192 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:36:45,192 INFO L410 AbstractCegarLoop]: === Iteration 21 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:36:45,192 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:36:45,192 INFO L82 PathProgramCache]: Analyzing trace with hash -1698648942, now seen corresponding path program 1 times [2019-11-23 22:36:45,193 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:36:45,193 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1952300406] [2019-11-23 22:36:45,193 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:36:45,215 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:36:45,257 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-23 22:36:45,258 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1952300406] [2019-11-23 22:36:45,258 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-23 22:36:45,258 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-23 22:36:45,259 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [557057784] [2019-11-23 22:36:45,259 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-23 22:36:45,259 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:36:45,259 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-23 22:36:45,260 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-23 22:36:45,260 INFO L87 Difference]: Start difference. First operand 679 states and 910 transitions. Second operand 4 states. [2019-11-23 22:36:45,478 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:36:45,478 INFO L93 Difference]: Finished difference Result 1744 states and 2350 transitions. [2019-11-23 22:36:45,478 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-23 22:36:45,478 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 75 [2019-11-23 22:36:45,479 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:36:45,485 INFO L225 Difference]: With dead ends: 1744 [2019-11-23 22:36:45,485 INFO L226 Difference]: Without dead ends: 1328 [2019-11-23 22:36:45,487 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-23 22:36:45,489 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1328 states. [2019-11-23 22:36:45,614 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1328 to 923. [2019-11-23 22:36:45,614 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 923 states. [2019-11-23 22:36:45,618 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 923 states to 923 states and 1237 transitions. [2019-11-23 22:36:45,618 INFO L78 Accepts]: Start accepts. Automaton has 923 states and 1237 transitions. Word has length 75 [2019-11-23 22:36:45,619 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:36:45,619 INFO L462 AbstractCegarLoop]: Abstraction has 923 states and 1237 transitions. [2019-11-23 22:36:45,619 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-23 22:36:45,619 INFO L276 IsEmpty]: Start isEmpty. Operand 923 states and 1237 transitions. [2019-11-23 22:36:45,621 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 76 [2019-11-23 22:36:45,621 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:36:45,621 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:36:45,622 INFO L410 AbstractCegarLoop]: === Iteration 22 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:36:45,622 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:36:45,622 INFO L82 PathProgramCache]: Analyzing trace with hash -1596781464, now seen corresponding path program 1 times [2019-11-23 22:36:45,622 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:36:45,622 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1413292360] [2019-11-23 22:36:45,623 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:36:45,647 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:36:45,686 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-23 22:36:45,686 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1413292360] [2019-11-23 22:36:45,687 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-23 22:36:45,687 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-23 22:36:45,687 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1820338192] [2019-11-23 22:36:45,688 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-23 22:36:45,688 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:36:45,688 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-23 22:36:45,689 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:36:45,689 INFO L87 Difference]: Start difference. First operand 923 states and 1237 transitions. Second operand 3 states. [2019-11-23 22:36:45,868 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:36:45,869 INFO L93 Difference]: Finished difference Result 1932 states and 2621 transitions. [2019-11-23 22:36:45,869 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-23 22:36:45,869 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 75 [2019-11-23 22:36:45,870 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:36:45,876 INFO L225 Difference]: With dead ends: 1932 [2019-11-23 22:36:45,876 INFO L226 Difference]: Without dead ends: 1327 [2019-11-23 22:36:45,878 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:36:45,880 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1327 states. [2019-11-23 22:36:45,966 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1327 to 877. [2019-11-23 22:36:45,967 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 877 states. [2019-11-23 22:36:45,969 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 877 states to 877 states and 1171 transitions. [2019-11-23 22:36:45,970 INFO L78 Accepts]: Start accepts. Automaton has 877 states and 1171 transitions. Word has length 75 [2019-11-23 22:36:45,970 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:36:45,970 INFO L462 AbstractCegarLoop]: Abstraction has 877 states and 1171 transitions. [2019-11-23 22:36:45,970 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-23 22:36:45,970 INFO L276 IsEmpty]: Start isEmpty. Operand 877 states and 1171 transitions. [2019-11-23 22:36:45,971 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 76 [2019-11-23 22:36:45,971 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:36:45,971 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:36:45,972 INFO L410 AbstractCegarLoop]: === Iteration 23 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:36:45,972 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:36:45,972 INFO L82 PathProgramCache]: Analyzing trace with hash -216337278, now seen corresponding path program 1 times [2019-11-23 22:36:45,972 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:36:45,973 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1744387719] [2019-11-23 22:36:45,973 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:36:45,989 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:36:46,025 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-23 22:36:46,026 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1744387719] [2019-11-23 22:36:46,026 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-23 22:36:46,026 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-23 22:36:46,027 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1789043583] [2019-11-23 22:36:46,027 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-23 22:36:46,027 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:36:46,027 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-23 22:36:46,028 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-23 22:36:46,028 INFO L87 Difference]: Start difference. First operand 877 states and 1171 transitions. Second operand 4 states. [2019-11-23 22:36:46,267 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:36:46,268 INFO L93 Difference]: Finished difference Result 2042 states and 2724 transitions. [2019-11-23 22:36:46,268 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-23 22:36:46,268 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 75 [2019-11-23 22:36:46,269 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:36:46,297 INFO L225 Difference]: With dead ends: 2042 [2019-11-23 22:36:46,297 INFO L226 Difference]: Without dead ends: 1466 [2019-11-23 22:36:46,299 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-23 22:36:46,300 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1466 states. [2019-11-23 22:36:46,416 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1466 to 1169. [2019-11-23 22:36:46,416 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1169 states. [2019-11-23 22:36:46,420 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1169 states to 1169 states and 1551 transitions. [2019-11-23 22:36:46,420 INFO L78 Accepts]: Start accepts. Automaton has 1169 states and 1551 transitions. Word has length 75 [2019-11-23 22:36:46,420 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:36:46,420 INFO L462 AbstractCegarLoop]: Abstraction has 1169 states and 1551 transitions. [2019-11-23 22:36:46,421 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-23 22:36:46,421 INFO L276 IsEmpty]: Start isEmpty. Operand 1169 states and 1551 transitions. [2019-11-23 22:36:46,422 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 77 [2019-11-23 22:36:46,422 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:36:46,422 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:36:46,422 INFO L410 AbstractCegarLoop]: === Iteration 24 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:36:46,422 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:36:46,423 INFO L82 PathProgramCache]: Analyzing trace with hash -1065252519, now seen corresponding path program 1 times [2019-11-23 22:36:46,423 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:36:46,423 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [794098769] [2019-11-23 22:36:46,423 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:36:46,434 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:36:46,453 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-23 22:36:46,453 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [794098769] [2019-11-23 22:36:46,453 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-23 22:36:46,453 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-23 22:36:46,454 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1264037951] [2019-11-23 22:36:46,454 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-23 22:36:46,454 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:36:46,454 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-23 22:36:46,455 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:36:46,455 INFO L87 Difference]: Start difference. First operand 1169 states and 1551 transitions. Second operand 3 states. [2019-11-23 22:36:46,805 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:36:46,805 INFO L93 Difference]: Finished difference Result 2882 states and 3817 transitions. [2019-11-23 22:36:46,806 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-23 22:36:46,806 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 76 [2019-11-23 22:36:46,807 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:36:46,818 INFO L225 Difference]: With dead ends: 2882 [2019-11-23 22:36:46,818 INFO L226 Difference]: Without dead ends: 1956 [2019-11-23 22:36:46,821 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:36:46,824 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1956 states. [2019-11-23 22:36:47,007 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1956 to 1171. [2019-11-23 22:36:47,007 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1171 states. [2019-11-23 22:36:47,013 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1171 states to 1171 states and 1553 transitions. [2019-11-23 22:36:47,013 INFO L78 Accepts]: Start accepts. Automaton has 1171 states and 1553 transitions. Word has length 76 [2019-11-23 22:36:47,014 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:36:47,014 INFO L462 AbstractCegarLoop]: Abstraction has 1171 states and 1553 transitions. [2019-11-23 22:36:47,014 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-23 22:36:47,014 INFO L276 IsEmpty]: Start isEmpty. Operand 1171 states and 1553 transitions. [2019-11-23 22:36:47,016 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 78 [2019-11-23 22:36:47,016 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:36:47,017 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:36:47,017 INFO L410 AbstractCegarLoop]: === Iteration 25 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:36:47,017 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:36:47,018 INFO L82 PathProgramCache]: Analyzing trace with hash -2019206059, now seen corresponding path program 1 times [2019-11-23 22:36:47,018 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:36:47,018 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [591708886] [2019-11-23 22:36:47,018 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:36:47,049 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:36:47,120 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-23 22:36:47,120 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [591708886] [2019-11-23 22:36:47,121 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-23 22:36:47,121 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-23 22:36:47,121 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1509130812] [2019-11-23 22:36:47,121 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-23 22:36:47,122 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:36:47,122 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-23 22:36:47,122 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-23 22:36:47,122 INFO L87 Difference]: Start difference. First operand 1171 states and 1553 transitions. Second operand 4 states. [2019-11-23 22:36:47,450 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:36:47,450 INFO L93 Difference]: Finished difference Result 2437 states and 3225 transitions. [2019-11-23 22:36:47,451 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-23 22:36:47,451 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 77 [2019-11-23 22:36:47,451 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:36:47,459 INFO L225 Difference]: With dead ends: 2437 [2019-11-23 22:36:47,459 INFO L226 Difference]: Without dead ends: 1323 [2019-11-23 22:36:47,462 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-23 22:36:47,464 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1323 states. [2019-11-23 22:36:47,629 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1323 to 976. [2019-11-23 22:36:47,630 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 976 states. [2019-11-23 22:36:47,634 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 976 states to 976 states and 1289 transitions. [2019-11-23 22:36:47,634 INFO L78 Accepts]: Start accepts. Automaton has 976 states and 1289 transitions. Word has length 77 [2019-11-23 22:36:47,635 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:36:47,635 INFO L462 AbstractCegarLoop]: Abstraction has 976 states and 1289 transitions. [2019-11-23 22:36:47,635 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-23 22:36:47,635 INFO L276 IsEmpty]: Start isEmpty. Operand 976 states and 1289 transitions. [2019-11-23 22:36:47,637 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 79 [2019-11-23 22:36:47,637 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:36:47,637 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:36:47,638 INFO L410 AbstractCegarLoop]: === Iteration 26 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:36:47,638 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:36:47,638 INFO L82 PathProgramCache]: Analyzing trace with hash -113428458, now seen corresponding path program 1 times [2019-11-23 22:36:47,638 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:36:47,639 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1953726038] [2019-11-23 22:36:47,639 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:36:47,664 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:36:47,741 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-23 22:36:47,742 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1953726038] [2019-11-23 22:36:47,742 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-23 22:36:47,742 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-23 22:36:47,742 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2019314645] [2019-11-23 22:36:47,743 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-23 22:36:47,743 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:36:47,743 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-23 22:36:47,744 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-23 22:36:47,744 INFO L87 Difference]: Start difference. First operand 976 states and 1289 transitions. Second operand 4 states. [2019-11-23 22:36:48,012 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:36:48,012 INFO L93 Difference]: Finished difference Result 2242 states and 2971 transitions. [2019-11-23 22:36:48,013 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-23 22:36:48,013 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 78 [2019-11-23 22:36:48,013 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:36:48,020 INFO L225 Difference]: With dead ends: 2242 [2019-11-23 22:36:48,020 INFO L226 Difference]: Without dead ends: 1343 [2019-11-23 22:36:48,022 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-23 22:36:48,024 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1343 states. [2019-11-23 22:36:48,137 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1343 to 920. [2019-11-23 22:36:48,137 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 920 states. [2019-11-23 22:36:48,140 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 920 states to 920 states and 1209 transitions. [2019-11-23 22:36:48,140 INFO L78 Accepts]: Start accepts. Automaton has 920 states and 1209 transitions. Word has length 78 [2019-11-23 22:36:48,141 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:36:48,141 INFO L462 AbstractCegarLoop]: Abstraction has 920 states and 1209 transitions. [2019-11-23 22:36:48,141 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-23 22:36:48,141 INFO L276 IsEmpty]: Start isEmpty. Operand 920 states and 1209 transitions. [2019-11-23 22:36:48,143 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 123 [2019-11-23 22:36:48,144 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:36:48,144 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:36:48,144 INFO L410 AbstractCegarLoop]: === Iteration 27 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:36:48,144 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:36:48,145 INFO L82 PathProgramCache]: Analyzing trace with hash 831151167, now seen corresponding path program 1 times [2019-11-23 22:36:48,145 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:36:48,145 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [67286166] [2019-11-23 22:36:48,145 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:36:48,195 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:36:48,529 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 33 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-23 22:36:48,529 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [67286166] [2019-11-23 22:36:48,529 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [324708165] [2019-11-23 22:36:48,530 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-11-23 22:36:48,715 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:36:48,719 INFO L255 TraceCheckSpWp]: Trace formula consists of 727 conjuncts, 9 conjunts are in the unsatisfiable core [2019-11-23 22:36:48,735 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2019-11-23 22:36:48,846 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 34 proven. 0 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2019-11-23 22:36:48,846 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2019-11-23 22:36:48,847 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [11] total 16 [2019-11-23 22:36:48,847 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [991153001] [2019-11-23 22:36:48,847 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-23 22:36:48,848 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:36:48,848 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-23 22:36:48,848 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=34, Invalid=206, Unknown=0, NotChecked=0, Total=240 [2019-11-23 22:36:48,848 INFO L87 Difference]: Start difference. First operand 920 states and 1209 transitions. Second operand 6 states. [2019-11-23 22:36:49,268 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:36:49,268 INFO L93 Difference]: Finished difference Result 2836 states and 3898 transitions. [2019-11-23 22:36:49,268 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-11-23 22:36:49,269 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 122 [2019-11-23 22:36:49,269 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:36:49,300 INFO L225 Difference]: With dead ends: 2836 [2019-11-23 22:36:49,302 INFO L226 Difference]: Without dead ends: 2063 [2019-11-23 22:36:49,305 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 137 GetRequests, 119 SyntacticMatches, 0 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 63 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=53, Invalid=327, Unknown=0, NotChecked=0, Total=380 [2019-11-23 22:36:49,309 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2063 states. [2019-11-23 22:36:49,485 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2063 to 920. [2019-11-23 22:36:49,485 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 920 states. [2019-11-23 22:36:49,489 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 920 states to 920 states and 1206 transitions. [2019-11-23 22:36:49,489 INFO L78 Accepts]: Start accepts. Automaton has 920 states and 1206 transitions. Word has length 122 [2019-11-23 22:36:49,489 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:36:49,489 INFO L462 AbstractCegarLoop]: Abstraction has 920 states and 1206 transitions. [2019-11-23 22:36:49,489 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-23 22:36:49,490 INFO L276 IsEmpty]: Start isEmpty. Operand 920 states and 1206 transitions. [2019-11-23 22:36:49,492 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 127 [2019-11-23 22:36:49,492 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:36:49,493 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:36:49,697 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 2 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-11-23 22:36:49,698 INFO L410 AbstractCegarLoop]: === Iteration 28 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:36:49,698 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:36:49,699 INFO L82 PathProgramCache]: Analyzing trace with hash -1351562886, now seen corresponding path program 1 times [2019-11-23 22:36:49,699 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:36:49,699 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1889407874] [2019-11-23 22:36:49,699 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:36:49,865 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:36:50,256 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 33 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-23 22:36:50,257 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1889407874] [2019-11-23 22:36:50,257 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [590674181] [2019-11-23 22:36:50,257 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-11-23 22:36:50,452 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:36:50,455 INFO L255 TraceCheckSpWp]: Trace formula consists of 740 conjuncts, 8 conjunts are in the unsatisfiable core [2019-11-23 22:36:50,465 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2019-11-23 22:36:50,596 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 34 proven. 0 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2019-11-23 22:36:50,597 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2019-11-23 22:36:50,597 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [11] total 16 [2019-11-23 22:36:50,597 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [290238208] [2019-11-23 22:36:50,598 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-23 22:36:50,598 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:36:50,598 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-23 22:36:50,598 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=32, Invalid=208, Unknown=0, NotChecked=0, Total=240 [2019-11-23 22:36:50,598 INFO L87 Difference]: Start difference. First operand 920 states and 1206 transitions. Second operand 6 states. [2019-11-23 22:36:51,172 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:36:51,172 INFO L93 Difference]: Finished difference Result 2541 states and 3449 transitions. [2019-11-23 22:36:51,173 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2019-11-23 22:36:51,173 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 126 [2019-11-23 22:36:51,173 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:36:51,185 INFO L225 Difference]: With dead ends: 2541 [2019-11-23 22:36:51,185 INFO L226 Difference]: Without dead ends: 1768 [2019-11-23 22:36:51,187 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 142 GetRequests, 123 SyntacticMatches, 0 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 47 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=56, Invalid=364, Unknown=0, NotChecked=0, Total=420 [2019-11-23 22:36:51,190 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1768 states. [2019-11-23 22:36:51,358 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1768 to 920. [2019-11-23 22:36:51,359 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 920 states. [2019-11-23 22:36:51,361 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 920 states to 920 states and 1203 transitions. [2019-11-23 22:36:51,361 INFO L78 Accepts]: Start accepts. Automaton has 920 states and 1203 transitions. Word has length 126 [2019-11-23 22:36:51,362 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:36:51,362 INFO L462 AbstractCegarLoop]: Abstraction has 920 states and 1203 transitions. [2019-11-23 22:36:51,362 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-23 22:36:51,362 INFO L276 IsEmpty]: Start isEmpty. Operand 920 states and 1203 transitions. [2019-11-23 22:36:51,364 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 130 [2019-11-23 22:36:51,364 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:36:51,365 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:36:51,577 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-11-23 22:36:51,577 INFO L410 AbstractCegarLoop]: === Iteration 29 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:36:51,577 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:36:51,578 INFO L82 PathProgramCache]: Analyzing trace with hash -1119292744, now seen corresponding path program 1 times [2019-11-23 22:36:51,578 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:36:51,578 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [576673070] [2019-11-23 22:36:51,579 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:36:51,643 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:36:51,957 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 33 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-23 22:36:51,958 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [576673070] [2019-11-23 22:36:51,959 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [386382664] [2019-11-23 22:36:51,959 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-11-23 22:36:52,160 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:36:52,163 INFO L255 TraceCheckSpWp]: Trace formula consists of 752 conjuncts, 12 conjunts are in the unsatisfiable core [2019-11-23 22:36:52,177 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2019-11-23 22:36:52,276 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 34 proven. 0 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2019-11-23 22:36:52,276 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2019-11-23 22:36:52,277 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [11] total 16 [2019-11-23 22:36:52,277 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [732037085] [2019-11-23 22:36:52,277 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-23 22:36:52,278 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:36:52,278 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-23 22:36:52,278 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=34, Invalid=206, Unknown=0, NotChecked=0, Total=240 [2019-11-23 22:36:52,278 INFO L87 Difference]: Start difference. First operand 920 states and 1203 transitions. Second operand 6 states. [2019-11-23 22:36:52,872 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:36:52,873 INFO L93 Difference]: Finished difference Result 2927 states and 4004 transitions. [2019-11-23 22:36:52,873 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2019-11-23 22:36:52,873 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 129 [2019-11-23 22:36:52,874 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:36:52,879 INFO L225 Difference]: With dead ends: 2927 [2019-11-23 22:36:52,879 INFO L226 Difference]: Without dead ends: 2141 [2019-11-23 22:36:52,881 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 150 GetRequests, 129 SyntacticMatches, 0 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 86 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=79, Invalid=427, Unknown=0, NotChecked=0, Total=506 [2019-11-23 22:36:52,884 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2141 states. [2019-11-23 22:36:53,041 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2141 to 868. [2019-11-23 22:36:53,041 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 868 states. [2019-11-23 22:36:53,047 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 868 states to 868 states and 1125 transitions. [2019-11-23 22:36:53,047 INFO L78 Accepts]: Start accepts. Automaton has 868 states and 1125 transitions. Word has length 129 [2019-11-23 22:36:53,047 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:36:53,048 INFO L462 AbstractCegarLoop]: Abstraction has 868 states and 1125 transitions. [2019-11-23 22:36:53,048 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-23 22:36:53,048 INFO L276 IsEmpty]: Start isEmpty. Operand 868 states and 1125 transitions. [2019-11-23 22:36:53,050 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 131 [2019-11-23 22:36:53,050 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:36:53,050 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:36:53,254 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 4 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-11-23 22:36:53,254 INFO L410 AbstractCegarLoop]: === Iteration 30 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:36:53,255 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:36:53,255 INFO L82 PathProgramCache]: Analyzing trace with hash 406746349, now seen corresponding path program 1 times [2019-11-23 22:36:53,255 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:36:53,255 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [797155542] [2019-11-23 22:36:53,255 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:36:53,300 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:36:53,518 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 21 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-23 22:36:53,519 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [797155542] [2019-11-23 22:36:53,519 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1769200050] [2019-11-23 22:36:53,519 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-11-23 22:36:53,729 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:36:53,733 INFO L255 TraceCheckSpWp]: Trace formula consists of 753 conjuncts, 8 conjunts are in the unsatisfiable core [2019-11-23 22:36:53,739 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2019-11-23 22:36:53,914 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 26 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2019-11-23 22:36:53,915 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2019-11-23 22:36:53,915 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [10] total 15 [2019-11-23 22:36:53,915 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2061218111] [2019-11-23 22:36:53,916 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-23 22:36:53,916 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:36:53,916 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-23 22:36:53,917 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=29, Invalid=181, Unknown=0, NotChecked=0, Total=210 [2019-11-23 22:36:53,917 INFO L87 Difference]: Start difference. First operand 868 states and 1125 transitions. Second operand 6 states. [2019-11-23 22:36:54,431 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:36:54,431 INFO L93 Difference]: Finished difference Result 2257 states and 3062 transitions. [2019-11-23 22:36:54,432 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-11-23 22:36:54,432 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 130 [2019-11-23 22:36:54,432 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:36:54,435 INFO L225 Difference]: With dead ends: 2257 [2019-11-23 22:36:54,436 INFO L226 Difference]: Without dead ends: 1550 [2019-11-23 22:36:54,438 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 144 GetRequests, 127 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 26 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=48, Invalid=294, Unknown=0, NotChecked=0, Total=342 [2019-11-23 22:36:54,440 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1550 states. [2019-11-23 22:36:54,581 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1550 to 868. [2019-11-23 22:36:54,581 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 868 states. [2019-11-23 22:36:54,582 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 868 states to 868 states and 1124 transitions. [2019-11-23 22:36:54,583 INFO L78 Accepts]: Start accepts. Automaton has 868 states and 1124 transitions. Word has length 130 [2019-11-23 22:36:54,583 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:36:54,583 INFO L462 AbstractCegarLoop]: Abstraction has 868 states and 1124 transitions. [2019-11-23 22:36:54,583 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-23 22:36:54,583 INFO L276 IsEmpty]: Start isEmpty. Operand 868 states and 1124 transitions. [2019-11-23 22:36:54,585 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 135 [2019-11-23 22:36:54,586 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:36:54,586 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:36:54,789 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 5 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-11-23 22:36:54,790 INFO L410 AbstractCegarLoop]: === Iteration 31 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:36:54,790 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:36:54,791 INFO L82 PathProgramCache]: Analyzing trace with hash 590291048, now seen corresponding path program 1 times [2019-11-23 22:36:54,791 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:36:54,794 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [375589671] [2019-11-23 22:36:54,795 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:36:54,836 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:36:55,050 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 21 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-23 22:36:55,051 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [375589671] [2019-11-23 22:36:55,051 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [175374186] [2019-11-23 22:36:55,051 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-11-23 22:36:55,251 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:36:55,254 INFO L255 TraceCheckSpWp]: Trace formula consists of 767 conjuncts, 45 conjunts are in the unsatisfiable core [2019-11-23 22:36:55,258 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2019-11-23 22:36:55,641 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 21 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-23 22:36:55,642 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-11-23 22:36:55,642 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 12] total 20 [2019-11-23 22:36:55,642 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1103778489] [2019-11-23 22:36:55,644 INFO L442 AbstractCegarLoop]: Interpolant automaton has 21 states [2019-11-23 22:36:55,644 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:36:55,644 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2019-11-23 22:36:55,644 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=66, Invalid=354, Unknown=0, NotChecked=0, Total=420 [2019-11-23 22:36:55,645 INFO L87 Difference]: Start difference. First operand 868 states and 1124 transitions. Second operand 21 states. [2019-11-23 22:36:57,960 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:36:57,960 INFO L93 Difference]: Finished difference Result 2305 states and 3042 transitions. [2019-11-23 22:36:57,961 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2019-11-23 22:36:57,961 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 134 [2019-11-23 22:36:57,961 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:36:57,965 INFO L225 Difference]: With dead ends: 2305 [2019-11-23 22:36:57,965 INFO L226 Difference]: Without dead ends: 1604 [2019-11-23 22:36:57,967 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 166 GetRequests, 120 SyntacticMatches, 4 SemanticMatches, 42 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 392 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=376, Invalid=1516, Unknown=0, NotChecked=0, Total=1892 [2019-11-23 22:36:57,969 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1604 states. [2019-11-23 22:36:58,110 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1604 to 1037. [2019-11-23 22:36:58,111 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1037 states. [2019-11-23 22:36:58,112 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1037 states to 1037 states and 1339 transitions. [2019-11-23 22:36:58,112 INFO L78 Accepts]: Start accepts. Automaton has 1037 states and 1339 transitions. Word has length 134 [2019-11-23 22:36:58,113 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:36:58,113 INFO L462 AbstractCegarLoop]: Abstraction has 1037 states and 1339 transitions. [2019-11-23 22:36:58,113 INFO L463 AbstractCegarLoop]: Interpolant automaton has 21 states. [2019-11-23 22:36:58,113 INFO L276 IsEmpty]: Start isEmpty. Operand 1037 states and 1339 transitions. [2019-11-23 22:36:58,115 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 135 [2019-11-23 22:36:58,115 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:36:58,116 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:36:58,321 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 6 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-11-23 22:36:58,322 INFO L410 AbstractCegarLoop]: === Iteration 32 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:36:58,322 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:36:58,322 INFO L82 PathProgramCache]: Analyzing trace with hash -1443102998, now seen corresponding path program 1 times [2019-11-23 22:36:58,322 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:36:58,323 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [188105153] [2019-11-23 22:36:58,323 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:36:58,342 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:36:58,383 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 9 proven. 0 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2019-11-23 22:36:58,383 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [188105153] [2019-11-23 22:36:58,383 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-23 22:36:58,383 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-23 22:36:58,384 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [481480626] [2019-11-23 22:36:58,384 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-23 22:36:58,384 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:36:58,385 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-23 22:36:58,385 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-23 22:36:58,385 INFO L87 Difference]: Start difference. First operand 1037 states and 1339 transitions. Second operand 4 states. [2019-11-23 22:36:58,780 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:36:58,780 INFO L93 Difference]: Finished difference Result 2513 states and 3271 transitions. [2019-11-23 22:36:58,780 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-23 22:36:58,781 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 134 [2019-11-23 22:36:58,781 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:36:58,784 INFO L225 Difference]: With dead ends: 2513 [2019-11-23 22:36:58,784 INFO L226 Difference]: Without dead ends: 1608 [2019-11-23 22:36:58,787 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-23 22:36:58,789 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1608 states. [2019-11-23 22:36:58,942 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1608 to 1069. [2019-11-23 22:36:58,943 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1069 states. [2019-11-23 22:36:58,945 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1069 states to 1069 states and 1367 transitions. [2019-11-23 22:36:58,946 INFO L78 Accepts]: Start accepts. Automaton has 1069 states and 1367 transitions. Word has length 134 [2019-11-23 22:36:58,946 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:36:58,946 INFO L462 AbstractCegarLoop]: Abstraction has 1069 states and 1367 transitions. [2019-11-23 22:36:58,946 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-23 22:36:58,946 INFO L276 IsEmpty]: Start isEmpty. Operand 1069 states and 1367 transitions. [2019-11-23 22:36:58,949 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 135 [2019-11-23 22:36:58,949 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:36:58,949 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:36:58,949 INFO L410 AbstractCegarLoop]: === Iteration 33 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:36:58,950 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:36:58,950 INFO L82 PathProgramCache]: Analyzing trace with hash -1719204498, now seen corresponding path program 1 times [2019-11-23 22:36:58,950 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:36:58,952 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1229069010] [2019-11-23 22:36:58,952 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:36:58,969 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:36:59,077 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 9 proven. 0 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2019-11-23 22:36:59,077 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1229069010] [2019-11-23 22:36:59,078 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-23 22:36:59,078 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-23 22:36:59,078 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [484988191] [2019-11-23 22:36:59,079 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-23 22:36:59,079 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:36:59,079 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-23 22:36:59,079 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-11-23 22:36:59,079 INFO L87 Difference]: Start difference. First operand 1069 states and 1367 transitions. Second operand 5 states. [2019-11-23 22:36:59,313 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:36:59,313 INFO L93 Difference]: Finished difference Result 1931 states and 2505 transitions. [2019-11-23 22:36:59,313 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-23 22:36:59,313 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 134 [2019-11-23 22:36:59,314 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:36:59,316 INFO L225 Difference]: With dead ends: 1931 [2019-11-23 22:36:59,316 INFO L226 Difference]: Without dead ends: 994 [2019-11-23 22:36:59,318 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-11-23 22:36:59,319 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 994 states. [2019-11-23 22:36:59,463 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 994 to 994. [2019-11-23 22:36:59,463 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 994 states. [2019-11-23 22:36:59,465 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 994 states to 994 states and 1278 transitions. [2019-11-23 22:36:59,465 INFO L78 Accepts]: Start accepts. Automaton has 994 states and 1278 transitions. Word has length 134 [2019-11-23 22:36:59,465 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:36:59,465 INFO L462 AbstractCegarLoop]: Abstraction has 994 states and 1278 transitions. [2019-11-23 22:36:59,466 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-23 22:36:59,466 INFO L276 IsEmpty]: Start isEmpty. Operand 994 states and 1278 transitions. [2019-11-23 22:36:59,468 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 136 [2019-11-23 22:36:59,468 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:36:59,468 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:36:59,469 INFO L410 AbstractCegarLoop]: === Iteration 34 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:36:59,469 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:36:59,469 INFO L82 PathProgramCache]: Analyzing trace with hash 1616018719, now seen corresponding path program 1 times [2019-11-23 22:36:59,469 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:36:59,469 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [248954112] [2019-11-23 22:36:59,470 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:36:59,509 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:36:59,679 INFO L134 CoverageAnalysis]: Checked inductivity of 42 backedges. 16 proven. 26 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-23 22:36:59,679 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [248954112] [2019-11-23 22:36:59,679 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1001595031] [2019-11-23 22:36:59,679 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-11-23 22:36:59,846 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:36:59,849 INFO L255 TraceCheckSpWp]: Trace formula consists of 768 conjuncts, 47 conjunts are in the unsatisfiable core [2019-11-23 22:36:59,853 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2019-11-23 22:37:00,323 INFO L134 CoverageAnalysis]: Checked inductivity of 42 backedges. 26 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-23 22:37:00,324 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-11-23 22:37:00,324 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 12] total 18 [2019-11-23 22:37:00,324 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1594212651] [2019-11-23 22:37:00,325 INFO L442 AbstractCegarLoop]: Interpolant automaton has 19 states [2019-11-23 22:37:00,325 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:37:00,325 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2019-11-23 22:37:00,325 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=60, Invalid=282, Unknown=0, NotChecked=0, Total=342 [2019-11-23 22:37:00,326 INFO L87 Difference]: Start difference. First operand 994 states and 1278 transitions. Second operand 19 states. [2019-11-23 22:37:05,501 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:37:05,502 INFO L93 Difference]: Finished difference Result 3827 states and 4980 transitions. [2019-11-23 22:37:05,502 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 85 states. [2019-11-23 22:37:05,502 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 135 [2019-11-23 22:37:05,502 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:37:05,508 INFO L225 Difference]: With dead ends: 3827 [2019-11-23 22:37:05,508 INFO L226 Difference]: Without dead ends: 3020 [2019-11-23 22:37:05,514 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 224 GetRequests, 121 SyntacticMatches, 4 SemanticMatches, 99 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3526 ImplicationChecksByTransitivity, 3.4s TimeCoverageRelationStatistics Valid=1965, Invalid=8135, Unknown=0, NotChecked=0, Total=10100 [2019-11-23 22:37:05,517 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3020 states. [2019-11-23 22:37:05,769 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3020 to 1479. [2019-11-23 22:37:05,769 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1479 states. [2019-11-23 22:37:05,771 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1479 states to 1479 states and 1914 transitions. [2019-11-23 22:37:05,771 INFO L78 Accepts]: Start accepts. Automaton has 1479 states and 1914 transitions. Word has length 135 [2019-11-23 22:37:05,772 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:37:05,772 INFO L462 AbstractCegarLoop]: Abstraction has 1479 states and 1914 transitions. [2019-11-23 22:37:05,772 INFO L463 AbstractCegarLoop]: Interpolant automaton has 19 states. [2019-11-23 22:37:05,772 INFO L276 IsEmpty]: Start isEmpty. Operand 1479 states and 1914 transitions. [2019-11-23 22:37:05,775 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 137 [2019-11-23 22:37:05,775 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:37:05,775 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:37:05,980 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 7 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-11-23 22:37:05,980 INFO L410 AbstractCegarLoop]: === Iteration 35 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:37:05,981 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:37:05,981 INFO L82 PathProgramCache]: Analyzing trace with hash 1144223334, now seen corresponding path program 1 times [2019-11-23 22:37:05,981 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:37:05,981 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1486658942] [2019-11-23 22:37:05,981 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:37:05,999 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:37:06,053 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 19 proven. 0 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2019-11-23 22:37:06,053 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1486658942] [2019-11-23 22:37:06,053 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-23 22:37:06,053 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-23 22:37:06,054 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [28690112] [2019-11-23 22:37:06,054 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-23 22:37:06,054 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:37:06,054 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-23 22:37:06,054 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-11-23 22:37:06,055 INFO L87 Difference]: Start difference. First operand 1479 states and 1914 transitions. Second operand 4 states. [2019-11-23 22:37:06,329 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:37:06,329 INFO L93 Difference]: Finished difference Result 2656 states and 3470 transitions. [2019-11-23 22:37:06,329 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-11-23 22:37:06,330 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 136 [2019-11-23 22:37:06,330 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:37:06,334 INFO L225 Difference]: With dead ends: 2656 [2019-11-23 22:37:06,334 INFO L226 Difference]: Without dead ends: 1307 [2019-11-23 22:37:06,336 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-11-23 22:37:06,337 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1307 states. [2019-11-23 22:37:06,508 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1307 to 1307. [2019-11-23 22:37:06,508 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1307 states. [2019-11-23 22:37:06,510 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1307 states to 1307 states and 1679 transitions. [2019-11-23 22:37:06,510 INFO L78 Accepts]: Start accepts. Automaton has 1307 states and 1679 transitions. Word has length 136 [2019-11-23 22:37:06,510 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:37:06,510 INFO L462 AbstractCegarLoop]: Abstraction has 1307 states and 1679 transitions. [2019-11-23 22:37:06,510 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-23 22:37:06,510 INFO L276 IsEmpty]: Start isEmpty. Operand 1307 states and 1679 transitions. [2019-11-23 22:37:06,514 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 138 [2019-11-23 22:37:06,514 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:37:06,514 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:37:06,515 INFO L410 AbstractCegarLoop]: === Iteration 36 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:37:06,516 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:37:06,516 INFO L82 PathProgramCache]: Analyzing trace with hash 844297710, now seen corresponding path program 1 times [2019-11-23 22:37:06,516 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:37:06,516 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1537616972] [2019-11-23 22:37:06,516 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:37:06,562 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:37:06,822 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 33 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-23 22:37:06,823 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1537616972] [2019-11-23 22:37:06,823 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1533626276] [2019-11-23 22:37:06,823 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-11-23 22:37:07,015 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:37:07,018 INFO L255 TraceCheckSpWp]: Trace formula consists of 779 conjuncts, 8 conjunts are in the unsatisfiable core [2019-11-23 22:37:07,021 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2019-11-23 22:37:07,116 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 34 proven. 0 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2019-11-23 22:37:07,116 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2019-11-23 22:37:07,117 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [11] total 16 [2019-11-23 22:37:07,117 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1011309607] [2019-11-23 22:37:07,117 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-23 22:37:07,117 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:37:07,118 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-23 22:37:07,118 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=32, Invalid=208, Unknown=0, NotChecked=0, Total=240 [2019-11-23 22:37:07,118 INFO L87 Difference]: Start difference. First operand 1307 states and 1679 transitions. Second operand 6 states. [2019-11-23 22:37:07,745 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:37:07,745 INFO L93 Difference]: Finished difference Result 4085 states and 5399 transitions. [2019-11-23 22:37:07,745 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2019-11-23 22:37:07,746 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 137 [2019-11-23 22:37:07,746 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:37:07,748 INFO L225 Difference]: With dead ends: 4085 [2019-11-23 22:37:07,748 INFO L226 Difference]: Without dead ends: 2945 [2019-11-23 22:37:07,750 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 153 GetRequests, 134 SyntacticMatches, 0 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 47 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=56, Invalid=364, Unknown=0, NotChecked=0, Total=420 [2019-11-23 22:37:07,753 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2945 states. [2019-11-23 22:37:07,899 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2945 to 1307. [2019-11-23 22:37:07,899 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1307 states. [2019-11-23 22:37:07,901 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1307 states to 1307 states and 1677 transitions. [2019-11-23 22:37:07,901 INFO L78 Accepts]: Start accepts. Automaton has 1307 states and 1677 transitions. Word has length 137 [2019-11-23 22:37:07,901 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:37:07,902 INFO L462 AbstractCegarLoop]: Abstraction has 1307 states and 1677 transitions. [2019-11-23 22:37:07,902 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-23 22:37:07,902 INFO L276 IsEmpty]: Start isEmpty. Operand 1307 states and 1677 transitions. [2019-11-23 22:37:07,904 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 138 [2019-11-23 22:37:07,904 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:37:07,904 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:37:08,108 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 8 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-11-23 22:37:08,108 INFO L410 AbstractCegarLoop]: === Iteration 37 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:37:08,108 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:37:08,109 INFO L82 PathProgramCache]: Analyzing trace with hash 2032965332, now seen corresponding path program 1 times [2019-11-23 22:37:08,109 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:37:08,109 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [828701439] [2019-11-23 22:37:08,109 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:37:08,135 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:37:08,203 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 15 proven. 0 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2019-11-23 22:37:08,203 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [828701439] [2019-11-23 22:37:08,204 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-23 22:37:08,204 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-23 22:37:08,204 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1397048199] [2019-11-23 22:37:08,204 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-23 22:37:08,205 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:37:08,205 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-23 22:37:08,205 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-11-23 22:37:08,205 INFO L87 Difference]: Start difference. First operand 1307 states and 1677 transitions. Second operand 6 states. [2019-11-23 22:37:09,067 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:37:09,068 INFO L93 Difference]: Finished difference Result 6856 states and 8970 transitions. [2019-11-23 22:37:09,068 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2019-11-23 22:37:09,068 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 137 [2019-11-23 22:37:09,068 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:37:09,073 INFO L225 Difference]: With dead ends: 6856 [2019-11-23 22:37:09,073 INFO L226 Difference]: Without dead ends: 5736 [2019-11-23 22:37:09,075 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 21 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 32 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=66, Invalid=144, Unknown=0, NotChecked=0, Total=210 [2019-11-23 22:37:09,079 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5736 states. [2019-11-23 22:37:09,289 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5736 to 1649. [2019-11-23 22:37:09,289 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1649 states. [2019-11-23 22:37:09,291 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1649 states to 1649 states and 2077 transitions. [2019-11-23 22:37:09,291 INFO L78 Accepts]: Start accepts. Automaton has 1649 states and 2077 transitions. Word has length 137 [2019-11-23 22:37:09,291 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:37:09,291 INFO L462 AbstractCegarLoop]: Abstraction has 1649 states and 2077 transitions. [2019-11-23 22:37:09,292 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-23 22:37:09,292 INFO L276 IsEmpty]: Start isEmpty. Operand 1649 states and 2077 transitions. [2019-11-23 22:37:09,294 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 140 [2019-11-23 22:37:09,294 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:37:09,295 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:37:09,295 INFO L410 AbstractCegarLoop]: === Iteration 38 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:37:09,295 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:37:09,295 INFO L82 PathProgramCache]: Analyzing trace with hash -122865786, now seen corresponding path program 1 times [2019-11-23 22:37:09,295 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:37:09,296 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [418489215] [2019-11-23 22:37:09,296 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:37:09,364 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:37:09,791 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 15 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-23 22:37:09,792 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [418489215] [2019-11-23 22:37:09,792 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1388914616] [2019-11-23 22:37:09,792 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-11-23 22:37:10,047 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:37:10,051 INFO L255 TraceCheckSpWp]: Trace formula consists of 771 conjuncts, 25 conjunts are in the unsatisfiable core [2019-11-23 22:37:10,056 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2019-11-23 22:37:10,345 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 15 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-23 22:37:10,346 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-11-23 22:37:10,346 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 9] total 11 [2019-11-23 22:37:10,346 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [581899870] [2019-11-23 22:37:10,347 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2019-11-23 22:37:10,347 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:37:10,347 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-11-23 22:37:10,347 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=35, Invalid=97, Unknown=0, NotChecked=0, Total=132 [2019-11-23 22:37:10,347 INFO L87 Difference]: Start difference. First operand 1649 states and 2077 transitions. Second operand 12 states. [2019-11-23 22:37:12,093 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:37:12,093 INFO L93 Difference]: Finished difference Result 4818 states and 6122 transitions. [2019-11-23 22:37:12,093 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2019-11-23 22:37:12,093 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 139 [2019-11-23 22:37:12,094 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:37:12,097 INFO L225 Difference]: With dead ends: 4818 [2019-11-23 22:37:12,097 INFO L226 Difference]: Without dead ends: 3356 [2019-11-23 22:37:12,099 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 167 GetRequests, 129 SyntacticMatches, 7 SemanticMatches, 31 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 256 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=278, Invalid=778, Unknown=0, NotChecked=0, Total=1056 [2019-11-23 22:37:12,101 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3356 states. [2019-11-23 22:37:12,500 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3356 to 1680. [2019-11-23 22:37:12,500 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1680 states. [2019-11-23 22:37:12,504 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1680 states to 1680 states and 2116 transitions. [2019-11-23 22:37:12,504 INFO L78 Accepts]: Start accepts. Automaton has 1680 states and 2116 transitions. Word has length 139 [2019-11-23 22:37:12,504 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:37:12,505 INFO L462 AbstractCegarLoop]: Abstraction has 1680 states and 2116 transitions. [2019-11-23 22:37:12,505 INFO L463 AbstractCegarLoop]: Interpolant automaton has 12 states. [2019-11-23 22:37:12,505 INFO L276 IsEmpty]: Start isEmpty. Operand 1680 states and 2116 transitions. [2019-11-23 22:37:12,508 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 141 [2019-11-23 22:37:12,509 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:37:12,509 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:37:12,713 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 9 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-11-23 22:37:12,714 INFO L410 AbstractCegarLoop]: === Iteration 39 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:37:12,714 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:37:12,714 INFO L82 PathProgramCache]: Analyzing trace with hash -982040414, now seen corresponding path program 1 times [2019-11-23 22:37:12,715 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:37:12,715 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1936254072] [2019-11-23 22:37:12,715 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:37:12,750 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:37:13,027 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 33 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-23 22:37:13,028 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1936254072] [2019-11-23 22:37:13,028 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1198003961] [2019-11-23 22:37:13,028 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-11-23 22:37:13,271 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:37:13,273 INFO L255 TraceCheckSpWp]: Trace formula consists of 791 conjuncts, 14 conjunts are in the unsatisfiable core [2019-11-23 22:37:13,276 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2019-11-23 22:37:13,391 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 8 proven. 33 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-23 22:37:13,391 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-11-23 22:37:13,391 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 7] total 17 [2019-11-23 22:37:13,391 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1339607799] [2019-11-23 22:37:13,392 INFO L442 AbstractCegarLoop]: Interpolant automaton has 17 states [2019-11-23 22:37:13,392 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:37:13,392 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2019-11-23 22:37:13,393 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=36, Invalid=236, Unknown=0, NotChecked=0, Total=272 [2019-11-23 22:37:13,393 INFO L87 Difference]: Start difference. First operand 1680 states and 2116 transitions. Second operand 17 states. [2019-11-23 22:37:23,353 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:37:23,354 INFO L93 Difference]: Finished difference Result 8464 states and 10895 transitions. [2019-11-23 22:37:23,354 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 128 states. [2019-11-23 22:37:23,354 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 140 [2019-11-23 22:37:23,354 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:37:23,361 INFO L225 Difference]: With dead ends: 8464 [2019-11-23 22:37:23,362 INFO L226 Difference]: Without dead ends: 6971 [2019-11-23 22:37:23,370 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 298 GetRequests, 158 SyntacticMatches, 0 SemanticMatches, 140 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8040 ImplicationChecksByTransitivity, 5.5s TimeCoverageRelationStatistics Valid=3885, Invalid=16137, Unknown=0, NotChecked=0, Total=20022 [2019-11-23 22:37:23,376 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6971 states. [2019-11-23 22:37:23,779 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6971 to 2239. [2019-11-23 22:37:23,779 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2239 states. [2019-11-23 22:37:23,781 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2239 states to 2239 states and 2790 transitions. [2019-11-23 22:37:23,781 INFO L78 Accepts]: Start accepts. Automaton has 2239 states and 2790 transitions. Word has length 140 [2019-11-23 22:37:23,781 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:37:23,781 INFO L462 AbstractCegarLoop]: Abstraction has 2239 states and 2790 transitions. [2019-11-23 22:37:23,781 INFO L463 AbstractCegarLoop]: Interpolant automaton has 17 states. [2019-11-23 22:37:23,781 INFO L276 IsEmpty]: Start isEmpty. Operand 2239 states and 2790 transitions. [2019-11-23 22:37:23,783 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 141 [2019-11-23 22:37:23,783 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:37:23,783 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:37:23,984 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 10 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-11-23 22:37:23,984 INFO L410 AbstractCegarLoop]: === Iteration 40 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:37:23,985 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:37:23,985 INFO L82 PathProgramCache]: Analyzing trace with hash 1504281713, now seen corresponding path program 1 times [2019-11-23 22:37:23,985 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:37:23,985 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2118146544] [2019-11-23 22:37:23,986 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:37:24,047 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:37:24,136 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 24 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-23 22:37:24,136 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2118146544] [2019-11-23 22:37:24,137 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [867826368] [2019-11-23 22:37:24,137 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-11-23 22:37:24,351 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:37:24,354 INFO L255 TraceCheckSpWp]: Trace formula consists of 773 conjuncts, 18 conjunts are in the unsatisfiable core [2019-11-23 22:37:24,357 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2019-11-23 22:37:24,445 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 24 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-23 22:37:24,446 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-11-23 22:37:24,446 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 8] total 8 [2019-11-23 22:37:24,446 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1010875317] [2019-11-23 22:37:24,447 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-11-23 22:37:24,447 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:37:24,447 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-11-23 22:37:24,447 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=42, Unknown=0, NotChecked=0, Total=56 [2019-11-23 22:37:24,447 INFO L87 Difference]: Start difference. First operand 2239 states and 2790 transitions. Second operand 8 states. [2019-11-23 22:37:25,572 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:37:25,572 INFO L93 Difference]: Finished difference Result 7935 states and 10019 transitions. [2019-11-23 22:37:25,572 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2019-11-23 22:37:25,572 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 140 [2019-11-23 22:37:25,572 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:37:25,576 INFO L225 Difference]: With dead ends: 7935 [2019-11-23 22:37:25,576 INFO L226 Difference]: Without dead ends: 5946 [2019-11-23 22:37:25,578 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 166 GetRequests, 144 SyntacticMatches, 0 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 96 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=129, Invalid=423, Unknown=0, NotChecked=0, Total=552 [2019-11-23 22:37:25,580 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5946 states. [2019-11-23 22:37:26,104 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5946 to 3391. [2019-11-23 22:37:26,104 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3391 states. [2019-11-23 22:37:26,107 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3391 states to 3391 states and 4245 transitions. [2019-11-23 22:37:26,107 INFO L78 Accepts]: Start accepts. Automaton has 3391 states and 4245 transitions. Word has length 140 [2019-11-23 22:37:26,108 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:37:26,108 INFO L462 AbstractCegarLoop]: Abstraction has 3391 states and 4245 transitions. [2019-11-23 22:37:26,108 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-11-23 22:37:26,108 INFO L276 IsEmpty]: Start isEmpty. Operand 3391 states and 4245 transitions. [2019-11-23 22:37:26,111 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 141 [2019-11-23 22:37:26,111 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:37:26,111 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:37:26,314 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 11 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-11-23 22:37:26,315 INFO L410 AbstractCegarLoop]: === Iteration 41 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:37:26,316 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:37:26,316 INFO L82 PathProgramCache]: Analyzing trace with hash 1622723187, now seen corresponding path program 1 times [2019-11-23 22:37:26,316 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:37:26,317 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1719784285] [2019-11-23 22:37:26,317 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:37:26,331 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:37:26,367 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 9 proven. 0 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2019-11-23 22:37:26,367 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1719784285] [2019-11-23 22:37:26,368 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-23 22:37:26,368 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-23 22:37:26,368 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [964049706] [2019-11-23 22:37:26,368 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-23 22:37:26,368 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:37:26,369 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-23 22:37:26,369 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-11-23 22:37:26,369 INFO L87 Difference]: Start difference. First operand 3391 states and 4245 transitions. Second operand 4 states. [2019-11-23 22:37:26,879 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:37:26,880 INFO L93 Difference]: Finished difference Result 5881 states and 7429 transitions. [2019-11-23 22:37:26,880 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-11-23 22:37:26,880 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 140 [2019-11-23 22:37:26,880 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:37:26,882 INFO L225 Difference]: With dead ends: 5881 [2019-11-23 22:37:26,882 INFO L226 Difference]: Without dead ends: 2740 [2019-11-23 22:37:26,884 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-11-23 22:37:26,886 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2740 states. [2019-11-23 22:37:27,198 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2740 to 2728. [2019-11-23 22:37:27,198 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2728 states. [2019-11-23 22:37:27,201 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2728 states to 2728 states and 3407 transitions. [2019-11-23 22:37:27,201 INFO L78 Accepts]: Start accepts. Automaton has 2728 states and 3407 transitions. Word has length 140 [2019-11-23 22:37:27,201 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:37:27,201 INFO L462 AbstractCegarLoop]: Abstraction has 2728 states and 3407 transitions. [2019-11-23 22:37:27,201 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-23 22:37:27,201 INFO L276 IsEmpty]: Start isEmpty. Operand 2728 states and 3407 transitions. [2019-11-23 22:37:27,204 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 145 [2019-11-23 22:37:27,204 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:37:27,205 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:37:27,205 INFO L410 AbstractCegarLoop]: === Iteration 42 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:37:27,205 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:37:27,205 INFO L82 PathProgramCache]: Analyzing trace with hash -1882876842, now seen corresponding path program 1 times [2019-11-23 22:37:27,205 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:37:27,205 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2024248556] [2019-11-23 22:37:27,205 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:37:27,242 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:37:27,337 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 24 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2019-11-23 22:37:27,337 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2024248556] [2019-11-23 22:37:27,337 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-23 22:37:27,337 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-23 22:37:27,338 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1878648323] [2019-11-23 22:37:27,338 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-23 22:37:27,338 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:37:27,338 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-23 22:37:27,338 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-11-23 22:37:27,339 INFO L87 Difference]: Start difference. First operand 2728 states and 3407 transitions. Second operand 6 states. [2019-11-23 22:37:28,521 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:37:28,521 INFO L93 Difference]: Finished difference Result 9314 states and 11912 transitions. [2019-11-23 22:37:28,522 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-11-23 22:37:28,522 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 144 [2019-11-23 22:37:28,523 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:37:28,530 INFO L225 Difference]: With dead ends: 9314 [2019-11-23 22:37:28,530 INFO L226 Difference]: Without dead ends: 6856 [2019-11-23 22:37:28,536 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 9 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 16 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=54, Invalid=102, Unknown=0, NotChecked=0, Total=156 [2019-11-23 22:37:28,540 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6856 states. [2019-11-23 22:37:29,290 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6856 to 2808. [2019-11-23 22:37:29,291 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2808 states. [2019-11-23 22:37:29,296 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2808 states to 2808 states and 3500 transitions. [2019-11-23 22:37:29,296 INFO L78 Accepts]: Start accepts. Automaton has 2808 states and 3500 transitions. Word has length 144 [2019-11-23 22:37:29,297 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:37:29,297 INFO L462 AbstractCegarLoop]: Abstraction has 2808 states and 3500 transitions. [2019-11-23 22:37:29,297 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-23 22:37:29,297 INFO L276 IsEmpty]: Start isEmpty. Operand 2808 states and 3500 transitions. [2019-11-23 22:37:29,301 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 146 [2019-11-23 22:37:29,302 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:37:29,302 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:37:29,302 INFO L410 AbstractCegarLoop]: === Iteration 43 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:37:29,303 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:37:29,303 INFO L82 PathProgramCache]: Analyzing trace with hash 27749283, now seen corresponding path program 1 times [2019-11-23 22:37:29,303 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:37:29,303 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1776047513] [2019-11-23 22:37:29,303 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:37:29,318 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:37:29,370 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 11 proven. 0 refuted. 0 times theorem prover too weak. 39 trivial. 0 not checked. [2019-11-23 22:37:29,371 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1776047513] [2019-11-23 22:37:29,371 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-23 22:37:29,371 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-23 22:37:29,372 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [872384589] [2019-11-23 22:37:29,373 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-23 22:37:29,373 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:37:29,374 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-23 22:37:29,374 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-23 22:37:29,374 INFO L87 Difference]: Start difference. First operand 2808 states and 3500 transitions. Second operand 4 states. [2019-11-23 22:37:30,536 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:37:30,536 INFO L93 Difference]: Finished difference Result 7151 states and 8947 transitions. [2019-11-23 22:37:30,536 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-23 22:37:30,536 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 145 [2019-11-23 22:37:30,537 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:37:30,541 INFO L225 Difference]: With dead ends: 7151 [2019-11-23 22:37:30,541 INFO L226 Difference]: Without dead ends: 4491 [2019-11-23 22:37:30,545 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-23 22:37:30,549 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4491 states. [2019-11-23 22:37:31,348 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4491 to 2836. [2019-11-23 22:37:31,349 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2836 states. [2019-11-23 22:37:31,351 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2836 states to 2836 states and 3520 transitions. [2019-11-23 22:37:31,351 INFO L78 Accepts]: Start accepts. Automaton has 2836 states and 3520 transitions. Word has length 145 [2019-11-23 22:37:31,351 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:37:31,351 INFO L462 AbstractCegarLoop]: Abstraction has 2836 states and 3520 transitions. [2019-11-23 22:37:31,352 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-23 22:37:31,352 INFO L276 IsEmpty]: Start isEmpty. Operand 2836 states and 3520 transitions. [2019-11-23 22:37:31,355 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 146 [2019-11-23 22:37:31,355 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:37:31,355 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:37:31,355 INFO L410 AbstractCegarLoop]: === Iteration 44 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:37:31,356 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:37:31,356 INFO L82 PathProgramCache]: Analyzing trace with hash 1387605663, now seen corresponding path program 1 times [2019-11-23 22:37:31,356 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:37:31,356 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [486047606] [2019-11-23 22:37:31,356 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:37:31,373 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:37:31,445 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 41 proven. 9 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-23 22:37:31,446 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [486047606] [2019-11-23 22:37:31,446 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1426240448] [2019-11-23 22:37:31,446 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-11-23 22:37:31,608 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:37:31,610 INFO L255 TraceCheckSpWp]: Trace formula consists of 798 conjuncts, 5 conjunts are in the unsatisfiable core [2019-11-23 22:37:31,613 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2019-11-23 22:37:31,662 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 11 proven. 0 refuted. 0 times theorem prover too weak. 39 trivial. 0 not checked. [2019-11-23 22:37:31,663 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2019-11-23 22:37:31,663 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [7] total 10 [2019-11-23 22:37:31,663 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1977285759] [2019-11-23 22:37:31,663 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-23 22:37:31,664 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:37:31,664 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-23 22:37:31,664 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=67, Unknown=0, NotChecked=0, Total=90 [2019-11-23 22:37:31,664 INFO L87 Difference]: Start difference. First operand 2836 states and 3520 transitions. Second operand 5 states. [2019-11-23 22:37:32,101 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:37:32,101 INFO L93 Difference]: Finished difference Result 5372 states and 6705 transitions. [2019-11-23 22:37:32,101 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-23 22:37:32,101 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 145 [2019-11-23 22:37:32,101 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:37:32,103 INFO L225 Difference]: With dead ends: 5372 [2019-11-23 22:37:32,104 INFO L226 Difference]: Without dead ends: 2615 [2019-11-23 22:37:32,108 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 151 GetRequests, 143 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 12 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=23, Invalid=67, Unknown=0, NotChecked=0, Total=90 [2019-11-23 22:37:32,110 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2615 states. [2019-11-23 22:37:32,521 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2615 to 2615. [2019-11-23 22:37:32,521 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2615 states. [2019-11-23 22:37:32,523 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2615 states to 2615 states and 3261 transitions. [2019-11-23 22:37:32,523 INFO L78 Accepts]: Start accepts. Automaton has 2615 states and 3261 transitions. Word has length 145 [2019-11-23 22:37:32,523 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:37:32,523 INFO L462 AbstractCegarLoop]: Abstraction has 2615 states and 3261 transitions. [2019-11-23 22:37:32,524 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-23 22:37:32,524 INFO L276 IsEmpty]: Start isEmpty. Operand 2615 states and 3261 transitions. [2019-11-23 22:37:32,526 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 146 [2019-11-23 22:37:32,526 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:37:32,526 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:37:32,730 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 12 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-11-23 22:37:32,731 INFO L410 AbstractCegarLoop]: === Iteration 45 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:37:32,731 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:37:32,731 INFO L82 PathProgramCache]: Analyzing trace with hash 439953908, now seen corresponding path program 1 times [2019-11-23 22:37:32,732 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:37:32,732 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1339541947] [2019-11-23 22:37:32,732 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:37:32,779 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:37:32,942 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 17 proven. 24 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-23 22:37:32,943 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1339541947] [2019-11-23 22:37:32,943 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1113521025] [2019-11-23 22:37:32,943 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-11-23 22:37:33,137 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:37:33,140 INFO L255 TraceCheckSpWp]: Trace formula consists of 787 conjuncts, 14 conjunts are in the unsatisfiable core [2019-11-23 22:37:33,143 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2019-11-23 22:37:33,213 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 17 proven. 24 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-23 22:37:33,213 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-11-23 22:37:33,213 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 7 [2019-11-23 22:37:33,214 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1075383627] [2019-11-23 22:37:33,214 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-11-23 22:37:33,214 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:37:33,214 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-11-23 22:37:33,215 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-11-23 22:37:33,215 INFO L87 Difference]: Start difference. First operand 2615 states and 3261 transitions. Second operand 7 states. [2019-11-23 22:37:34,521 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:37:34,521 INFO L93 Difference]: Finished difference Result 7727 states and 9807 transitions. [2019-11-23 22:37:34,521 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2019-11-23 22:37:34,521 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 145 [2019-11-23 22:37:34,522 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:37:34,525 INFO L225 Difference]: With dead ends: 7727 [2019-11-23 22:37:34,525 INFO L226 Difference]: Without dead ends: 5319 [2019-11-23 22:37:34,527 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 172 GetRequests, 150 SyntacticMatches, 2 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 86 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=138, Invalid=324, Unknown=0, NotChecked=0, Total=462 [2019-11-23 22:37:34,530 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5319 states. [2019-11-23 22:37:34,864 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5319 to 2615. [2019-11-23 22:37:34,864 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2615 states. [2019-11-23 22:37:34,866 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2615 states to 2615 states and 3237 transitions. [2019-11-23 22:37:34,867 INFO L78 Accepts]: Start accepts. Automaton has 2615 states and 3237 transitions. Word has length 145 [2019-11-23 22:37:34,867 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:37:34,867 INFO L462 AbstractCegarLoop]: Abstraction has 2615 states and 3237 transitions. [2019-11-23 22:37:34,867 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-11-23 22:37:34,867 INFO L276 IsEmpty]: Start isEmpty. Operand 2615 states and 3237 transitions. [2019-11-23 22:37:34,870 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 146 [2019-11-23 22:37:34,870 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:37:34,870 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:37:35,073 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 13 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-11-23 22:37:35,074 INFO L410 AbstractCegarLoop]: === Iteration 46 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:37:35,074 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:37:35,075 INFO L82 PathProgramCache]: Analyzing trace with hash -372990953, now seen corresponding path program 1 times [2019-11-23 22:37:35,075 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:37:35,075 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1392154547] [2019-11-23 22:37:35,075 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:37:35,134 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-11-23 22:37:35,203 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-11-23 22:37:35,331 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-11-23 22:37:35,331 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-11-23 22:37:35,593 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 23.11 10:37:35 BoogieIcfgContainer [2019-11-23 22:37:35,594 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-11-23 22:37:35,596 INFO L168 Benchmark]: Toolchain (without parser) took 60353.00 ms. Allocated memory was 146.8 MB in the beginning and 993.0 MB in the end (delta: 846.2 MB). Free memory was 104.5 MB in the beginning and 449.9 MB in the end (delta: -345.4 MB). Peak memory consumption was 500.8 MB. Max. memory is 7.1 GB. [2019-11-23 22:37:35,596 INFO L168 Benchmark]: CDTParser took 1.15 ms. Allocated memory is still 146.8 MB. Free memory was 123.2 MB in the beginning and 122.9 MB in the end (delta: 210.0 kB). Peak memory consumption was 210.0 kB. Max. memory is 7.1 GB. [2019-11-23 22:37:35,597 INFO L168 Benchmark]: CACSL2BoogieTranslator took 657.82 ms. Allocated memory was 146.8 MB in the beginning and 206.6 MB in the end (delta: 59.8 MB). Free memory was 104.3 MB in the beginning and 178.8 MB in the end (delta: -74.6 MB). Peak memory consumption was 22.8 MB. Max. memory is 7.1 GB. [2019-11-23 22:37:35,597 INFO L168 Benchmark]: Boogie Procedure Inliner took 78.90 ms. Allocated memory is still 206.6 MB. Free memory was 178.8 MB in the beginning and 174.1 MB in the end (delta: 4.7 MB). Peak memory consumption was 4.7 MB. Max. memory is 7.1 GB. [2019-11-23 22:37:35,597 INFO L168 Benchmark]: Boogie Preprocessor took 62.37 ms. Allocated memory is still 206.6 MB. Free memory was 174.1 MB in the beginning and 170.1 MB in the end (delta: 4.1 MB). Peak memory consumption was 4.1 MB. Max. memory is 7.1 GB. [2019-11-23 22:37:35,598 INFO L168 Benchmark]: RCFGBuilder took 1225.82 ms. Allocated memory was 206.6 MB in the beginning and 232.8 MB in the end (delta: 26.2 MB). Free memory was 170.1 MB in the beginning and 192.3 MB in the end (delta: -22.2 MB). Peak memory consumption was 81.1 MB. Max. memory is 7.1 GB. [2019-11-23 22:37:35,598 INFO L168 Benchmark]: TraceAbstraction took 58323.38 ms. Allocated memory was 232.8 MB in the beginning and 993.0 MB in the end (delta: 760.2 MB). Free memory was 192.3 MB in the beginning and 449.9 MB in the end (delta: -257.6 MB). Peak memory consumption was 502.6 MB. Max. memory is 7.1 GB. [2019-11-23 22:37:35,600 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 1.15 ms. Allocated memory is still 146.8 MB. Free memory was 123.2 MB in the beginning and 122.9 MB in the end (delta: 210.0 kB). Peak memory consumption was 210.0 kB. Max. memory is 7.1 GB. * CACSL2BoogieTranslator took 657.82 ms. Allocated memory was 146.8 MB in the beginning and 206.6 MB in the end (delta: 59.8 MB). Free memory was 104.3 MB in the beginning and 178.8 MB in the end (delta: -74.6 MB). Peak memory consumption was 22.8 MB. Max. memory is 7.1 GB. * Boogie Procedure Inliner took 78.90 ms. Allocated memory is still 206.6 MB. Free memory was 178.8 MB in the beginning and 174.1 MB in the end (delta: 4.7 MB). Peak memory consumption was 4.7 MB. Max. memory is 7.1 GB. * Boogie Preprocessor took 62.37 ms. Allocated memory is still 206.6 MB. Free memory was 174.1 MB in the beginning and 170.1 MB in the end (delta: 4.1 MB). Peak memory consumption was 4.1 MB. Max. memory is 7.1 GB. * RCFGBuilder took 1225.82 ms. Allocated memory was 206.6 MB in the beginning and 232.8 MB in the end (delta: 26.2 MB). Free memory was 170.1 MB in the beginning and 192.3 MB in the end (delta: -22.2 MB). Peak memory consumption was 81.1 MB. Max. memory is 7.1 GB. * TraceAbstraction took 58323.38 ms. Allocated memory was 232.8 MB in the beginning and 993.0 MB in the end (delta: 760.2 MB). Free memory was 192.3 MB in the beginning and 449.9 MB in the end (delta: -257.6 MB). Peak memory consumption was 502.6 MB. Max. memory is 7.1 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 662]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L96] _Bool side1Failed ; [L97] _Bool side2Failed ; [L102] static _Bool side1Failed_History_0 ; [L103] static _Bool side1Failed_History_1 ; [L104] static _Bool side1Failed_History_2 ; [L105] static _Bool side2Failed_History_0 ; [L106] static _Bool side2Failed_History_1 ; [L107] static _Bool side2Failed_History_2 ; [L69] msg_t nomsg = (msg_t )-1; [L70] port_t cs1 ; [L71] int8_t cs1_old ; [L72] int8_t cs1_new ; [L73] port_t cs2 ; [L74] int8_t cs2_old ; [L75] int8_t cs2_new ; [L76] port_t s1s2 ; [L77] int8_t s1s2_old ; [L78] int8_t s1s2_new ; [L79] port_t s1s1 ; [L80] int8_t s1s1_old ; [L81] int8_t s1s1_new ; [L82] port_t s2s1 ; [L83] int8_t s2s1_old ; [L84] int8_t s2s1_new ; [L85] port_t s2s2 ; [L86] int8_t s2s2_old ; [L87] int8_t s2s2_new ; [L88] port_t s1p ; [L89] int8_t s1p_old ; [L90] int8_t s1p_new ; [L91] port_t s2p ; [L92] int8_t s2p_old ; [L93] int8_t s2p_new ; [L98] msg_t side1_written ; [L99] msg_t side2_written ; [L108] static int8_t active_side_History_0 ; [L109] static int8_t active_side_History_1 ; [L110] static int8_t active_side_History_2 ; [L111] static msg_t manual_selection_History_0 ; [L112] static msg_t manual_selection_History_1 ; [L113] static msg_t manual_selection_History_2 ; [L463] void (*nodes[4])(void) = { & Console_task_each_pals_period, & Side1_activestandby_task_each_pals_period, & Side2_activestandby_task_each_pals_period, & Pendulum_prism_task_each_pals_period}; VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=0, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L585] int c1 ; [L586] int i2 ; [L589] c1 = 0 [L590] side1Failed = __VERIFIER_nondet_bool() [L591] side2Failed = __VERIFIER_nondet_bool() [L592] side1_written = __VERIFIER_nondet_char() [L593] side2_written = __VERIFIER_nondet_char() [L594] side1Failed_History_0 = __VERIFIER_nondet_bool() [L595] side1Failed_History_1 = __VERIFIER_nondet_bool() [L596] side1Failed_History_2 = __VERIFIER_nondet_bool() [L597] side2Failed_History_0 = __VERIFIER_nondet_bool() [L598] side2Failed_History_1 = __VERIFIER_nondet_bool() [L599] side2Failed_History_2 = __VERIFIER_nondet_bool() [L600] active_side_History_0 = __VERIFIER_nondet_char() [L601] active_side_History_1 = __VERIFIER_nondet_char() [L602] active_side_History_2 = __VERIFIER_nondet_char() [L603] manual_selection_History_0 = __VERIFIER_nondet_char() [L604] manual_selection_History_1 = __VERIFIER_nondet_char() [L605] manual_selection_History_2 = __VERIFIER_nondet_char() [L239] COND FALSE !((int )side1Failed_History_0 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L242] COND FALSE !((int )side2Failed_History_0 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L245] COND FALSE !((int )active_side_History_0 != -2) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L248] COND FALSE !((int )manual_selection_History_0 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L251] COND FALSE !((int )side1Failed_History_1 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L254] COND FALSE !((int )side2Failed_History_1 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L257] COND FALSE !((int )active_side_History_1 != -2) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L260] COND FALSE !((int )manual_selection_History_1 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L263] COND FALSE !((int )side1Failed_History_2 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L266] COND FALSE !((int )side2Failed_History_2 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L269] COND FALSE !((int )active_side_History_2 != -2) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L272] COND FALSE !((int )manual_selection_History_2 != 0) [L275] return (1); VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L606] i2 = init() [L608] cs1_old = nomsg [L609] cs1_new = nomsg [L610] cs2_old = nomsg [L611] cs2_new = nomsg [L612] s1s2_old = nomsg [L613] s1s2_new = nomsg [L614] s1s1_old = nomsg [L615] s1s1_new = nomsg [L616] s2s1_old = nomsg [L617] s2s1_new = nomsg [L618] s2s2_old = nomsg [L619] s2s2_new = nomsg [L620] s1p_old = nomsg [L621] s1p_new = nomsg [L622] s2p_old = nomsg [L623] s2p_new = nomsg [L624] i2 = 0 VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L625] COND TRUE i2 < 10 [L293] msg_t manual_selection ; [L294] char tmp ; [L297] tmp = __VERIFIER_nondet_char() [L298] manual_selection = tmp [L209] manual_selection_History_2 = manual_selection_History_1 [L210] manual_selection_History_1 = manual_selection_History_0 [L211] manual_selection_History_0 = val VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L300] EXPR manual_selection != nomsg && cs1_new == nomsg ? manual_selection : cs1_new VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L300] cs1_new = manual_selection != nomsg && cs1_new == nomsg ? manual_selection : cs1_new [L301] EXPR manual_selection != nomsg && cs2_new == nomsg ? manual_selection : cs2_new VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L301] cs2_new = manual_selection != nomsg && cs2_new == nomsg ? manual_selection : cs2_new [L302] manual_selection = (msg_t )0 VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L308] int8_t side1 ; [L309] int8_t side2 ; [L310] msg_t manual_selection ; [L311] int8_t next_state ; [L314] side1 = nomsg [L315] side2 = nomsg [L316] manual_selection = (msg_t )0 [L317] side1Failed = __VERIFIER_nondet_bool() [L119] side1Failed_History_2 = side1Failed_History_1 [L120] side1Failed_History_1 = side1Failed_History_0 [L121] side1Failed_History_0 = val VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L319] COND TRUE \read(side1Failed) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L320] EXPR nomsg != nomsg && s1s1_new == nomsg ? nomsg : s1s1_new VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L320] s1s1_new = nomsg != nomsg && s1s1_new == nomsg ? nomsg : s1s1_new [L321] EXPR nomsg != nomsg && s1s2_new == nomsg ? nomsg : s1s2_new VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L321] s1s2_new = nomsg != nomsg && s1s2_new == nomsg ? nomsg : s1s2_new [L322] EXPR nomsg != nomsg && s1p_new == nomsg ? nomsg : s1p_new VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L322] s1p_new = nomsg != nomsg && s1p_new == nomsg ? nomsg : s1p_new [L323] side1_written = nomsg VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L365] int8_t side1 ; [L366] int8_t side2 ; [L367] msg_t manual_selection ; [L368] int8_t next_state ; [L371] side1 = nomsg [L372] side2 = nomsg [L373] manual_selection = (msg_t )0 [L374] side2Failed = __VERIFIER_nondet_bool() [L149] side2Failed_History_2 = side2Failed_History_1 [L150] side2Failed_History_1 = side2Failed_History_0 [L151] side2Failed_History_0 = val VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L376] COND FALSE !(\read(side2Failed)) [L383] side1 = s1s2_old [L384] s1s2_old = nomsg [L385] side2 = s2s2_old [L386] s2s2_old = nomsg [L387] manual_selection = cs2_old [L388] cs2_old = nomsg VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L389] COND TRUE (int )side1 == (int )side2 [L390] next_state = (int8_t )0 VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L413] EXPR next_state != nomsg && s2s1_new == nomsg ? next_state : s2s1_new VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L413] s2s1_new = next_state != nomsg && s2s1_new == nomsg ? next_state : s2s1_new [L414] EXPR next_state != nomsg && s2s2_new == nomsg ? next_state : s2s2_new VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L414] s2s2_new = next_state != nomsg && s2s2_new == nomsg ? next_state : s2s2_new [L415] EXPR next_state != nomsg && s2p_new == nomsg ? next_state : s2p_new VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L415] s2p_new = next_state != nomsg && s2p_new == nomsg ? next_state : s2p_new [L416] side2_written = next_state VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L422] int8_t active_side ; [L423] int8_t tmp ; [L424] int8_t side1 ; [L425] int8_t side2 ; [L190] COND TRUE (int )index == 0 [L191] return (active_side_History_0); VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L428] tmp = read_active_side_history((unsigned char)0) [L429] active_side = tmp [L430] side1 = nomsg [L431] side2 = nomsg [L432] side1 = s1p_old [L433] s1p_old = nomsg [L434] side2 = s2p_old [L435] s2p_old = nomsg VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L436] COND FALSE !((int )side1 == 1) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L439] COND FALSE !((int )side2 == 1) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L442] COND FALSE !((int )side1 == 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L450] COND TRUE (int )side1 == (int )nomsg VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L451] COND FALSE !((int )side2 == 0) [L454] active_side = (int8_t )0 VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L179] active_side_History_2 = active_side_History_1 [L180] active_side_History_1 = active_side_History_0 [L181] active_side_History_0 = val VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L631] cs1_old = cs1_new [L632] cs1_new = nomsg [L633] cs2_old = cs2_new [L634] cs2_new = nomsg [L635] s1s2_old = s1s2_new [L636] s1s2_new = nomsg [L637] s1s1_old = s1s1_new [L638] s1s1_new = nomsg [L639] s2s1_old = s2s1_new [L640] s2s1_new = nomsg [L641] s2s2_old = s2s2_new [L642] s2s2_new = nomsg [L643] s1p_old = s1p_new [L644] s1p_new = nomsg [L645] s2p_old = s2p_new [L646] s2p_new = nomsg [L466] int tmp ; [L467] msg_t tmp___0 ; [L468] _Bool tmp___1 ; [L469] _Bool tmp___2 ; [L470] _Bool tmp___3 ; [L471] _Bool tmp___4 ; [L472] int8_t tmp___5 ; [L473] _Bool tmp___6 ; [L474] _Bool tmp___7 ; [L475] _Bool tmp___8 ; [L476] int8_t tmp___9 ; [L477] _Bool tmp___10 ; [L478] _Bool tmp___11 ; [L479] _Bool tmp___12 ; [L480] msg_t tmp___13 ; [L481] _Bool tmp___14 ; [L482] _Bool tmp___15 ; [L483] _Bool tmp___16 ; [L484] _Bool tmp___17 ; [L485] int8_t tmp___18 ; [L486] int8_t tmp___19 ; [L487] int8_t tmp___20 ; VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L490] COND FALSE !(! side1Failed) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L493] COND TRUE ! side2Failed [L494] tmp = 1 VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L220] COND FALSE !((int )index == 0) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L223] COND TRUE (int )index == 1 [L224] return (manual_selection_History_1); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L499] tmp___0 = read_manual_selection_history((unsigned char)1) [L500] COND TRUE ! tmp___0 [L130] COND FALSE !((int )index == 0) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L133] COND TRUE (int )index == 1 [L134] return (side1Failed_History_1); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L501] tmp___1 = read_side1_failed_history((unsigned char)1) [L502] COND TRUE ! tmp___1 [L130] COND TRUE (int )index == 0 [L131] return (side1Failed_History_0); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L503] tmp___2 = read_side1_failed_history((unsigned char)0) [L504] COND FALSE !(! tmp___2) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L130] COND FALSE !((int )index == 0) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L133] COND TRUE (int )index == 1 [L134] return (side1Failed_History_1); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L529] tmp___7 = read_side1_failed_history((unsigned char)1) [L530] COND FALSE !(\read(tmp___7)) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L130] COND FALSE !((int )index == 0) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L133] COND TRUE (int )index == 1 [L134] return (side1Failed_History_1); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L545] tmp___11 = read_side1_failed_history((unsigned char)1) [L546] COND TRUE ! tmp___11 [L160] COND FALSE !((int )index == 0) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L163] COND TRUE (int )index == 1 [L164] return (side2Failed_History_1); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L547] tmp___12 = read_side2_failed_history((unsigned char)1) [L548] COND FALSE !(\read(tmp___12)) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L190] COND FALSE !((int )index == 0) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L193] COND FALSE !((int )index == 1) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L196] COND TRUE (int )index == 2 [L197] return (active_side_History_2); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L561] tmp___20 = read_active_side_history((unsigned char)2) [L562] COND FALSE !((int )tmp___20 > -2) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L580] return (1); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L647] c1 = check() [L660] COND FALSE !(! arg) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L649] i2 ++ VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L625] COND TRUE i2 < 10 [L293] msg_t manual_selection ; [L294] char tmp ; [L297] tmp = __VERIFIER_nondet_char() [L298] manual_selection = tmp [L209] manual_selection_History_2 = manual_selection_History_1 [L210] manual_selection_History_1 = manual_selection_History_0 [L211] manual_selection_History_0 = val VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-3, manual_selection_History_1=-128, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L300] EXPR manual_selection != nomsg && cs1_new == nomsg ? manual_selection : cs1_new VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-3, manual_selection_History_1=-128, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L300] cs1_new = manual_selection != nomsg && cs1_new == nomsg ? manual_selection : cs1_new [L301] EXPR manual_selection != nomsg && cs2_new == nomsg ? manual_selection : cs2_new VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-3, manual_selection_History_1=-128, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L301] cs2_new = manual_selection != nomsg && cs2_new == nomsg ? manual_selection : cs2_new [L302] manual_selection = (msg_t )0 VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-128, cs2=0, cs2_new=-3, cs2_old=-128, manual_selection_History_0=-3, manual_selection_History_1=-128, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L308] int8_t side1 ; [L309] int8_t side2 ; [L310] msg_t manual_selection ; [L311] int8_t next_state ; [L314] side1 = nomsg [L315] side2 = nomsg [L316] manual_selection = (msg_t )0 [L317] side1Failed = __VERIFIER_nondet_bool() [L119] side1Failed_History_2 = side1Failed_History_1 [L120] side1Failed_History_1 = side1Failed_History_0 [L121] side1Failed_History_0 = val VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-128, cs2=0, cs2_new=-3, cs2_old=-128, manual_selection_History_0=-3, manual_selection_History_1=-128, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L319] COND TRUE \read(side1Failed) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-128, cs2=0, cs2_new=-3, cs2_old=-128, manual_selection_History_0=-3, manual_selection_History_1=-128, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L320] EXPR nomsg != nomsg && s1s1_new == nomsg ? nomsg : s1s1_new VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-128, cs2=0, cs2_new=-3, cs2_old=-128, manual_selection_History_0=-3, manual_selection_History_1=-128, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L320] s1s1_new = nomsg != nomsg && s1s1_new == nomsg ? nomsg : s1s1_new [L321] EXPR nomsg != nomsg && s1s2_new == nomsg ? nomsg : s1s2_new VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-128, cs2=0, cs2_new=-3, cs2_old=-128, manual_selection_History_0=-3, manual_selection_History_1=-128, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L321] s1s2_new = nomsg != nomsg && s1s2_new == nomsg ? nomsg : s1s2_new [L322] EXPR nomsg != nomsg && s1p_new == nomsg ? nomsg : s1p_new VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-128, cs2=0, cs2_new=-3, cs2_old=-128, manual_selection_History_0=-3, manual_selection_History_1=-128, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L322] s1p_new = nomsg != nomsg && s1p_new == nomsg ? nomsg : s1p_new [L323] side1_written = nomsg VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-128, cs2=0, cs2_new=-3, cs2_old=-128, manual_selection_History_0=-3, manual_selection_History_1=-128, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L365] int8_t side1 ; [L366] int8_t side2 ; [L367] msg_t manual_selection ; [L368] int8_t next_state ; [L371] side1 = nomsg [L372] side2 = nomsg [L373] manual_selection = (msg_t )0 [L374] side2Failed = __VERIFIER_nondet_bool() [L149] side2Failed_History_2 = side2Failed_History_1 [L150] side2Failed_History_1 = side2Failed_History_0 [L151] side2Failed_History_0 = val VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-128, cs2=0, cs2_new=-3, cs2_old=-128, manual_selection_History_0=-3, manual_selection_History_1=-128, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L376] COND FALSE !(\read(side2Failed)) [L383] side1 = s1s2_old [L384] s1s2_old = nomsg [L385] side2 = s2s2_old [L386] s2s2_old = nomsg [L387] manual_selection = cs2_old [L388] cs2_old = nomsg VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-128, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=-128, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L389] COND FALSE !((int )side1 == (int )side2) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-128, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=-128, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L392] COND TRUE (int )side1 == (int )nomsg VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-128, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=-128, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L393] COND TRUE (int )side2 != (int )nomsg [L394] next_state = (int8_t )0 VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-128, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=-128, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L413] EXPR next_state != nomsg && s2s1_new == nomsg ? next_state : s2s1_new VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-128, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=-128, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L413] s2s1_new = next_state != nomsg && s2s1_new == nomsg ? next_state : s2s1_new [L414] EXPR next_state != nomsg && s2s2_new == nomsg ? next_state : s2s2_new VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-128, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=-128, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L414] s2s2_new = next_state != nomsg && s2s2_new == nomsg ? next_state : s2s2_new [L415] EXPR next_state != nomsg && s2p_new == nomsg ? next_state : s2p_new VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-128, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=-128, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L415] s2p_new = next_state != nomsg && s2p_new == nomsg ? next_state : s2p_new [L416] side2_written = next_state VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-128, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=-128, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L422] int8_t active_side ; [L423] int8_t tmp ; [L424] int8_t side1 ; [L425] int8_t side2 ; [L190] COND TRUE (int )index == 0 [L191] return (active_side_History_0); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-128, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=-128, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L428] tmp = read_active_side_history((unsigned char)0) [L429] active_side = tmp [L430] side1 = nomsg [L431] side2 = nomsg [L432] side1 = s1p_old [L433] s1p_old = nomsg [L434] side2 = s2p_old [L435] s2p_old = nomsg VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-128, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=-128, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L436] COND FALSE !((int )side1 == 1) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-128, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=-128, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L439] COND FALSE !((int )side2 == 1) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-128, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=-128, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L442] COND FALSE !((int )side1 == 0) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-128, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=-128, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L450] COND TRUE (int )side1 == (int )nomsg VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-128, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=-128, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L451] COND TRUE (int )side2 == 0 [L452] active_side = (int8_t )2 VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-128, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=-128, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L179] active_side_History_2 = active_side_History_1 [L180] active_side_History_1 = active_side_History_0 [L181] active_side_History_0 = val VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-128, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=-128, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L631] cs1_old = cs1_new [L632] cs1_new = nomsg [L633] cs2_old = cs2_new [L634] cs2_new = nomsg [L635] s1s2_old = s1s2_new [L636] s1s2_new = nomsg [L637] s1s1_old = s1s1_new [L638] s1s1_new = nomsg [L639] s2s1_old = s2s1_new [L640] s2s1_new = nomsg [L641] s2s2_old = s2s2_new [L642] s2s2_new = nomsg [L643] s1p_old = s1p_new [L644] s1p_new = nomsg [L645] s2p_old = s2p_new [L646] s2p_new = nomsg [L466] int tmp ; [L467] msg_t tmp___0 ; [L468] _Bool tmp___1 ; [L469] _Bool tmp___2 ; [L470] _Bool tmp___3 ; [L471] _Bool tmp___4 ; [L472] int8_t tmp___5 ; [L473] _Bool tmp___6 ; [L474] _Bool tmp___7 ; [L475] _Bool tmp___8 ; [L476] int8_t tmp___9 ; [L477] _Bool tmp___10 ; [L478] _Bool tmp___11 ; [L479] _Bool tmp___12 ; [L480] msg_t tmp___13 ; [L481] _Bool tmp___14 ; [L482] _Bool tmp___15 ; [L483] _Bool tmp___16 ; [L484] _Bool tmp___17 ; [L485] int8_t tmp___18 ; [L486] int8_t tmp___19 ; [L487] int8_t tmp___20 ; VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=-128, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L490] COND FALSE !(! side1Failed) VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=-128, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L493] COND TRUE ! side2Failed [L494] tmp = 1 VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=-128, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L220] COND FALSE !((int )index == 0) VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=-128, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L223] COND TRUE (int )index == 1 [L224] return (manual_selection_History_1); VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=-128, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L499] tmp___0 = read_manual_selection_history((unsigned char)1) [L500] COND FALSE !(! tmp___0) VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=-128, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L130] COND FALSE !((int )index == 0) VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=-128, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L133] COND TRUE (int )index == 1 [L134] return (side1Failed_History_1); VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=-128, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L529] tmp___7 = read_side1_failed_history((unsigned char)1) [L530] COND TRUE \read(tmp___7) [L160] COND FALSE !((int )index == 0) VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=-128, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L163] COND TRUE (int )index == 1 [L164] return (side2Failed_History_1); VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=-128, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L531] tmp___8 = read_side2_failed_history((unsigned char)1) [L532] COND TRUE ! tmp___8 [L190] COND TRUE (int )index == 0 [L191] return (active_side_History_0); VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=-128, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L533] tmp___5 = read_active_side_history((unsigned char)0) [L534] COND FALSE !(! ((int )tmp___5 == 2)) [L160] COND TRUE (int )index == 0 [L161] return (side2Failed_History_0); VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=-128, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L537] tmp___6 = read_side2_failed_history((unsigned char)0) [L538] COND TRUE ! tmp___6 VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=-128, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L539] COND TRUE ! ((int )side2_written == 1) [L540] return (0); VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=-128, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L647] c1 = check() [L660] COND TRUE ! arg VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=-128, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L662] __VERIFIER_error() VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=-128, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] - StatisticsResult: Ultimate Automizer benchmark data CFG has 1 procedures, 293 locations, 23 error locations. Result: UNSAFE, OverallTime: 58.2s, OverallIterations: 46, TraceHistogramMax: 2, AutomataDifference: 35.4s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 20637 SDtfs, 43165 SDslu, 53254 SDs, 0 SdLazy, 10392 SolverSat, 622 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 9.1s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 2329 GetRequests, 1700 SyntacticMatches, 29 SemanticMatches, 600 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 12786 ImplicationChecksByTransitivity, 14.9s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=3391occurred in iteration=40, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 7.5s AutomataMinimizationTime, 45 MinimizatonAttempts, 39349 StatesRemovedByMinimization, 40 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.7s SsaConstructionTime, 2.7s SatisfiabilityAnalysisTime, 6.8s InterpolantComputationTime, 6060 NumberOfCodeBlocks, 6060 NumberOfCodeBlocksAsserted, 58 NumberOfCheckSat, 5858 ConstructedInterpolants, 0 QuantifiedInterpolants, 2923532 SizeOfPredicates, 60 NumberOfNonLiveVariables, 9206 ConjunctsInSsa, 213 ConjunctsInUnsatCore, 57 InterpolantComputations, 39 PerfectInterpolantSequences, 915/1156 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...