/usr/bin/java -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata ./data -tc ../../../trunk/examples/toolchains/AutomizerCInline.xml -s ../../../trunk/examples/settings/default/automizer/svcomp-Reach-32bit-Automizer_Default.epf -i ../../../trunk/examples/svcomp/seq-mthreaded/pals_STARTPALS_ActiveStandby.4_2.ufo.UNBOUNDED.pals.c -------------------------------------------------------------------------------- This is Ultimate 0.1.24-6598664 [2019-11-23 22:36:46,632 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-11-23 22:36:46,634 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-11-23 22:36:46,655 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-11-23 22:36:46,656 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-11-23 22:36:46,658 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-11-23 22:36:46,660 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-11-23 22:36:46,672 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-11-23 22:36:46,674 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-11-23 22:36:46,676 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-11-23 22:36:46,677 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-11-23 22:36:46,679 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-11-23 22:36:46,679 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-11-23 22:36:46,680 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-11-23 22:36:46,681 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-11-23 22:36:46,683 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-11-23 22:36:46,683 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-11-23 22:36:46,684 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-11-23 22:36:46,686 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-11-23 22:36:46,687 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-11-23 22:36:46,689 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-11-23 22:36:46,690 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-11-23 22:36:46,691 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-11-23 22:36:46,691 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-11-23 22:36:46,694 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... 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[2019-11-23 22:36:46,696 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-11-23 22:36:46,697 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-11-23 22:36:46,698 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-11-23 22:36:46,699 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-11-23 22:36:46,700 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-11-23 22:36:46,700 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-11-23 22:36:46,700 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-11-23 22:36:46,701 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-11-23 22:36:46,701 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-11-23 22:36:46,702 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-11-23 22:36:46,702 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-11-23 22:36:46,703 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/default/automizer/svcomp-Reach-32bit-Automizer_Default.epf [2019-11-23 22:36:46,717 INFO L113 SettingsManager]: Loading preferences was successful [2019-11-23 22:36:46,717 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-11-23 22:36:46,718 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-11-23 22:36:46,718 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-11-23 22:36:46,718 INFO L138 SettingsManager]: * Use SBE=true [2019-11-23 22:36:46,719 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-11-23 22:36:46,719 INFO L138 SettingsManager]: * sizeof long=4 [2019-11-23 22:36:46,719 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-11-23 22:36:46,719 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-11-23 22:36:46,719 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-11-23 22:36:46,720 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-11-23 22:36:46,720 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-11-23 22:36:46,720 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-11-23 22:36:46,720 INFO L138 SettingsManager]: * Adapt memory model on pointer casts if necessary=true [2019-11-23 22:36:46,720 INFO L138 SettingsManager]: * sizeof long double=12 [2019-11-23 22:36:46,721 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-11-23 22:36:46,721 INFO L138 SettingsManager]: * Use constant arrays=true [2019-11-23 22:36:46,721 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-11-23 22:36:46,721 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-11-23 22:36:46,721 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-11-23 22:36:46,722 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-11-23 22:36:46,722 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-11-23 22:36:46,722 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-11-23 22:36:46,722 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-11-23 22:36:46,722 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-11-23 22:36:46,723 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-11-23 22:36:46,723 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-11-23 22:36:46,723 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-11-23 22:36:46,723 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-11-23 22:36:46,723 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2019-11-23 22:36:46,990 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-11-23 22:36:47,002 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-11-23 22:36:47,006 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-11-23 22:36:47,007 INFO L271 PluginConnector]: Initializing CDTParser... [2019-11-23 22:36:47,007 INFO L275 PluginConnector]: CDTParser initialized [2019-11-23 22:36:47,008 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/seq-mthreaded/pals_STARTPALS_ActiveStandby.4_2.ufo.UNBOUNDED.pals.c [2019-11-23 22:36:47,068 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/85a7fdb46/5437532a85784c5a9a0e84c2e5059e2d/FLAGe568215b6 [2019-11-23 22:36:47,551 INFO L306 CDTParser]: Found 1 translation units. [2019-11-23 22:36:47,551 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/seq-mthreaded/pals_STARTPALS_ActiveStandby.4_2.ufo.UNBOUNDED.pals.c [2019-11-23 22:36:47,571 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/85a7fdb46/5437532a85784c5a9a0e84c2e5059e2d/FLAGe568215b6 [2019-11-23 22:36:47,903 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/85a7fdb46/5437532a85784c5a9a0e84c2e5059e2d [2019-11-23 22:36:47,911 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-11-23 22:36:47,912 INFO L131 ToolchainWalker]: Walking toolchain with 5 elements. [2019-11-23 22:36:47,913 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-11-23 22:36:47,913 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-11-23 22:36:47,917 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-11-23 22:36:47,918 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 23.11 10:36:47" (1/1) ... [2019-11-23 22:36:47,921 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@26809f63 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:36:47, skipping insertion in model container [2019-11-23 22:36:47,921 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 23.11 10:36:47" (1/1) ... [2019-11-23 22:36:47,929 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-11-23 22:36:47,986 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-11-23 22:36:48,391 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-11-23 22:36:48,403 INFO L203 MainTranslator]: Completed pre-run [2019-11-23 22:36:48,485 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-11-23 22:36:48,524 INFO L208 MainTranslator]: Completed translation [2019-11-23 22:36:48,524 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:36:48 WrapperNode [2019-11-23 22:36:48,525 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-11-23 22:36:48,526 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-11-23 22:36:48,526 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-11-23 22:36:48,526 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-11-23 22:36:48,534 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:36:48" (1/1) ... [2019-11-23 22:36:48,547 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:36:48" (1/1) ... [2019-11-23 22:36:48,614 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-11-23 22:36:48,614 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-11-23 22:36:48,614 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-11-23 22:36:48,614 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-11-23 22:36:48,625 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:36:48" (1/1) ... [2019-11-23 22:36:48,626 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:36:48" (1/1) ... [2019-11-23 22:36:48,632 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:36:48" (1/1) ... [2019-11-23 22:36:48,633 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:36:48" (1/1) ... [2019-11-23 22:36:48,649 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:36:48" (1/1) ... [2019-11-23 22:36:48,663 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:36:48" (1/1) ... [2019-11-23 22:36:48,668 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:36:48" (1/1) ... [2019-11-23 22:36:48,676 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-11-23 22:36:48,677 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-11-23 22:36:48,677 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-11-23 22:36:48,677 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-11-23 22:36:48,678 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:36:48" (1/1) ... No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-11-23 22:36:48,756 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-11-23 22:36:48,756 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-11-23 22:36:50,015 INFO L279 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-11-23 22:36:50,016 INFO L284 CfgBuilder]: Removed 119 assume(true) statements. [2019-11-23 22:36:50,018 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 23.11 10:36:50 BoogieIcfgContainer [2019-11-23 22:36:50,018 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-11-23 22:36:50,020 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-11-23 22:36:50,021 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-11-23 22:36:50,025 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-11-23 22:36:50,026 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 23.11 10:36:47" (1/3) ... [2019-11-23 22:36:50,027 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@333802b5 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 23.11 10:36:50, skipping insertion in model container [2019-11-23 22:36:50,027 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:36:48" (2/3) ... [2019-11-23 22:36:50,028 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@333802b5 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 23.11 10:36:50, skipping insertion in model container [2019-11-23 22:36:50,028 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 23.11 10:36:50" (3/3) ... [2019-11-23 22:36:50,031 INFO L109 eAbstractionObserver]: Analyzing ICFG pals_STARTPALS_ActiveStandby.4_2.ufo.UNBOUNDED.pals.c [2019-11-23 22:36:50,040 INFO L153 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-11-23 22:36:50,048 INFO L165 ceAbstractionStarter]: Appying trace abstraction to program that has 23 error locations. [2019-11-23 22:36:50,057 INFO L249 AbstractCegarLoop]: Starting to check reachability of 23 error locations. [2019-11-23 22:36:50,083 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-11-23 22:36:50,083 INFO L374 AbstractCegarLoop]: Hoare is true [2019-11-23 22:36:50,084 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-11-23 22:36:50,084 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-11-23 22:36:50,084 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-11-23 22:36:50,084 INFO L378 AbstractCegarLoop]: Difference is false [2019-11-23 22:36:50,084 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-11-23 22:36:50,084 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-11-23 22:36:50,112 INFO L276 IsEmpty]: Start isEmpty. Operand 292 states. [2019-11-23 22:36:50,119 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2019-11-23 22:36:50,120 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:36:50,121 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:36:50,122 INFO L410 AbstractCegarLoop]: === Iteration 1 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:36:50,128 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:36:50,129 INFO L82 PathProgramCache]: Analyzing trace with hash 211735483, now seen corresponding path program 1 times [2019-11-23 22:36:50,136 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:36:50,137 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [434877761] [2019-11-23 22:36:50,137 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:36:50,297 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:36:50,423 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-23 22:36:50,424 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [434877761] [2019-11-23 22:36:50,425 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-23 22:36:50,425 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-23 22:36:50,427 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1259553332] [2019-11-23 22:36:50,433 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-23 22:36:50,433 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:36:50,447 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-23 22:36:50,448 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:36:50,451 INFO L87 Difference]: Start difference. First operand 292 states. Second operand 3 states. [2019-11-23 22:36:50,545 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:36:50,546 INFO L93 Difference]: Finished difference Result 566 states and 887 transitions. [2019-11-23 22:36:50,546 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-23 22:36:50,547 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 31 [2019-11-23 22:36:50,548 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:36:50,574 INFO L225 Difference]: With dead ends: 566 [2019-11-23 22:36:50,575 INFO L226 Difference]: Without dead ends: 288 [2019-11-23 22:36:50,588 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:36:50,609 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 288 states. [2019-11-23 22:36:50,646 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 288 to 288. [2019-11-23 22:36:50,648 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 288 states. [2019-11-23 22:36:50,651 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 288 states to 288 states and 412 transitions. [2019-11-23 22:36:50,653 INFO L78 Accepts]: Start accepts. Automaton has 288 states and 412 transitions. Word has length 31 [2019-11-23 22:36:50,653 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:36:50,653 INFO L462 AbstractCegarLoop]: Abstraction has 288 states and 412 transitions. [2019-11-23 22:36:50,653 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-23 22:36:50,654 INFO L276 IsEmpty]: Start isEmpty. Operand 288 states and 412 transitions. [2019-11-23 22:36:50,655 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2019-11-23 22:36:50,655 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:36:50,656 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:36:50,656 INFO L410 AbstractCegarLoop]: === Iteration 2 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:36:50,657 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:36:50,657 INFO L82 PathProgramCache]: Analyzing trace with hash -1187444686, now seen corresponding path program 1 times [2019-11-23 22:36:50,657 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:36:50,658 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [771430060] [2019-11-23 22:36:50,658 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:36:50,758 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:36:50,865 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-23 22:36:50,866 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [771430060] [2019-11-23 22:36:50,866 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-23 22:36:50,866 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-23 22:36:50,867 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1810291642] [2019-11-23 22:36:50,868 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-23 22:36:50,869 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:36:50,869 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-23 22:36:50,869 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:36:50,869 INFO L87 Difference]: Start difference. First operand 288 states and 412 transitions. Second operand 3 states. [2019-11-23 22:36:50,987 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:36:50,987 INFO L93 Difference]: Finished difference Result 594 states and 858 transitions. [2019-11-23 22:36:50,989 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-23 22:36:50,990 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 42 [2019-11-23 22:36:50,990 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:36:50,994 INFO L225 Difference]: With dead ends: 594 [2019-11-23 22:36:50,996 INFO L226 Difference]: Without dead ends: 321 [2019-11-23 22:36:51,002 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:36:51,008 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 321 states. [2019-11-23 22:36:51,041 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 321 to 264. [2019-11-23 22:36:51,041 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 264 states. [2019-11-23 22:36:51,044 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 264 states to 264 states and 376 transitions. [2019-11-23 22:36:51,045 INFO L78 Accepts]: Start accepts. Automaton has 264 states and 376 transitions. Word has length 42 [2019-11-23 22:36:51,045 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:36:51,045 INFO L462 AbstractCegarLoop]: Abstraction has 264 states and 376 transitions. [2019-11-23 22:36:51,047 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-23 22:36:51,047 INFO L276 IsEmpty]: Start isEmpty. Operand 264 states and 376 transitions. [2019-11-23 22:36:51,050 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2019-11-23 22:36:51,050 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:36:51,050 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:36:51,052 INFO L410 AbstractCegarLoop]: === Iteration 3 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:36:51,053 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:36:51,053 INFO L82 PathProgramCache]: Analyzing trace with hash 1273755287, now seen corresponding path program 1 times [2019-11-23 22:36:51,053 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:36:51,054 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2022391231] [2019-11-23 22:36:51,054 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:36:51,123 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:36:51,234 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-23 22:36:51,235 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2022391231] [2019-11-23 22:36:51,236 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-23 22:36:51,236 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-23 22:36:51,237 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1768639688] [2019-11-23 22:36:51,238 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-23 22:36:51,239 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:36:51,240 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-23 22:36:51,240 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:36:51,240 INFO L87 Difference]: Start difference. First operand 264 states and 376 transitions. Second operand 3 states. [2019-11-23 22:36:51,299 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:36:51,299 INFO L93 Difference]: Finished difference Result 739 states and 1063 transitions. [2019-11-23 22:36:51,300 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-23 22:36:51,300 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 49 [2019-11-23 22:36:51,300 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:36:51,303 INFO L225 Difference]: With dead ends: 739 [2019-11-23 22:36:51,303 INFO L226 Difference]: Without dead ends: 490 [2019-11-23 22:36:51,305 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:36:51,307 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 490 states. [2019-11-23 22:36:51,347 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 490 to 299. [2019-11-23 22:36:51,347 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 299 states. [2019-11-23 22:36:51,351 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 299 states to 299 states and 428 transitions. [2019-11-23 22:36:51,354 INFO L78 Accepts]: Start accepts. Automaton has 299 states and 428 transitions. Word has length 49 [2019-11-23 22:36:51,354 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:36:51,355 INFO L462 AbstractCegarLoop]: Abstraction has 299 states and 428 transitions. [2019-11-23 22:36:51,355 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-23 22:36:51,355 INFO L276 IsEmpty]: Start isEmpty. Operand 299 states and 428 transitions. [2019-11-23 22:36:51,356 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 51 [2019-11-23 22:36:51,357 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:36:51,357 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:36:51,357 INFO L410 AbstractCegarLoop]: === Iteration 4 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:36:51,357 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:36:51,358 INFO L82 PathProgramCache]: Analyzing trace with hash -1910840580, now seen corresponding path program 1 times [2019-11-23 22:36:51,359 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:36:51,360 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1844680933] [2019-11-23 22:36:51,360 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:36:51,422 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:36:51,499 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-23 22:36:51,500 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1844680933] [2019-11-23 22:36:51,500 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-23 22:36:51,501 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-23 22:36:51,501 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [906661813] [2019-11-23 22:36:51,502 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-23 22:36:51,502 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:36:51,502 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-23 22:36:51,503 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-23 22:36:51,503 INFO L87 Difference]: Start difference. First operand 299 states and 428 transitions. Second operand 5 states. [2019-11-23 22:36:51,810 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:36:51,810 INFO L93 Difference]: Finished difference Result 939 states and 1357 transitions. [2019-11-23 22:36:51,810 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-11-23 22:36:51,811 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 50 [2019-11-23 22:36:51,811 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:36:51,815 INFO L225 Difference]: With dead ends: 939 [2019-11-23 22:36:51,815 INFO L226 Difference]: Without dead ends: 655 [2019-11-23 22:36:51,816 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2019-11-23 22:36:51,817 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 655 states. [2019-11-23 22:36:51,833 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 655 to 385. [2019-11-23 22:36:51,833 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 385 states. [2019-11-23 22:36:51,835 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 385 states to 385 states and 551 transitions. [2019-11-23 22:36:51,835 INFO L78 Accepts]: Start accepts. Automaton has 385 states and 551 transitions. Word has length 50 [2019-11-23 22:36:51,836 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:36:51,836 INFO L462 AbstractCegarLoop]: Abstraction has 385 states and 551 transitions. [2019-11-23 22:36:51,836 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-23 22:36:51,836 INFO L276 IsEmpty]: Start isEmpty. Operand 385 states and 551 transitions. [2019-11-23 22:36:51,838 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2019-11-23 22:36:51,838 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:36:51,838 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:36:51,839 INFO L410 AbstractCegarLoop]: === Iteration 5 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:36:51,839 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:36:51,839 INFO L82 PathProgramCache]: Analyzing trace with hash -1041102253, now seen corresponding path program 1 times [2019-11-23 22:36:51,839 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:36:51,840 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1608413075] [2019-11-23 22:36:51,840 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:36:51,869 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:36:51,920 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-23 22:36:51,920 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1608413075] [2019-11-23 22:36:51,921 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-23 22:36:51,921 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-23 22:36:51,921 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1834722230] [2019-11-23 22:36:51,922 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-23 22:36:51,922 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:36:51,922 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-23 22:36:51,922 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-23 22:36:51,923 INFO L87 Difference]: Start difference. First operand 385 states and 551 transitions. Second operand 5 states. [2019-11-23 22:36:52,191 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:36:52,191 INFO L93 Difference]: Finished difference Result 941 states and 1357 transitions. [2019-11-23 22:36:52,192 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-11-23 22:36:52,192 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 51 [2019-11-23 22:36:52,193 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:36:52,197 INFO L225 Difference]: With dead ends: 941 [2019-11-23 22:36:52,198 INFO L226 Difference]: Without dead ends: 657 [2019-11-23 22:36:52,199 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2019-11-23 22:36:52,200 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 657 states. [2019-11-23 22:36:52,221 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 657 to 389. [2019-11-23 22:36:52,221 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 389 states. [2019-11-23 22:36:52,223 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 389 states to 389 states and 555 transitions. [2019-11-23 22:36:52,223 INFO L78 Accepts]: Start accepts. Automaton has 389 states and 555 transitions. Word has length 51 [2019-11-23 22:36:52,224 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:36:52,224 INFO L462 AbstractCegarLoop]: Abstraction has 389 states and 555 transitions. [2019-11-23 22:36:52,224 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-23 22:36:52,224 INFO L276 IsEmpty]: Start isEmpty. Operand 389 states and 555 transitions. [2019-11-23 22:36:52,229 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2019-11-23 22:36:52,229 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:36:52,230 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:36:52,230 INFO L410 AbstractCegarLoop]: === Iteration 6 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:36:52,230 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:36:52,230 INFO L82 PathProgramCache]: Analyzing trace with hash -458607163, now seen corresponding path program 1 times [2019-11-23 22:36:52,231 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:36:52,231 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1795225770] [2019-11-23 22:36:52,232 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:36:52,280 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:36:52,387 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-23 22:36:52,388 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1795225770] [2019-11-23 22:36:52,389 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-23 22:36:52,389 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-23 22:36:52,389 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [89954519] [2019-11-23 22:36:52,391 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-23 22:36:52,391 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:36:52,392 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-23 22:36:52,392 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-23 22:36:52,392 INFO L87 Difference]: Start difference. First operand 389 states and 555 transitions. Second operand 4 states. [2019-11-23 22:36:52,636 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:36:52,637 INFO L93 Difference]: Finished difference Result 941 states and 1353 transitions. [2019-11-23 22:36:52,637 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-23 22:36:52,637 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 53 [2019-11-23 22:36:52,639 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:36:52,642 INFO L225 Difference]: With dead ends: 941 [2019-11-23 22:36:52,643 INFO L226 Difference]: Without dead ends: 657 [2019-11-23 22:36:52,644 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-23 22:36:52,646 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 657 states. [2019-11-23 22:36:52,663 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 657 to 389. [2019-11-23 22:36:52,663 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 389 states. [2019-11-23 22:36:52,665 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 389 states to 389 states and 553 transitions. [2019-11-23 22:36:52,665 INFO L78 Accepts]: Start accepts. Automaton has 389 states and 553 transitions. Word has length 53 [2019-11-23 22:36:52,666 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:36:52,666 INFO L462 AbstractCegarLoop]: Abstraction has 389 states and 553 transitions. [2019-11-23 22:36:52,666 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-23 22:36:52,666 INFO L276 IsEmpty]: Start isEmpty. Operand 389 states and 553 transitions. [2019-11-23 22:36:52,667 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2019-11-23 22:36:52,667 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:36:52,667 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:36:52,667 INFO L410 AbstractCegarLoop]: === Iteration 7 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:36:52,668 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:36:52,668 INFO L82 PathProgramCache]: Analyzing trace with hash 1789775306, now seen corresponding path program 1 times [2019-11-23 22:36:52,668 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:36:52,668 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [946303881] [2019-11-23 22:36:52,668 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:36:52,719 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:36:52,843 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-23 22:36:52,843 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [946303881] [2019-11-23 22:36:52,844 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-23 22:36:52,844 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-23 22:36:52,844 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1970433831] [2019-11-23 22:36:52,845 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-23 22:36:52,845 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:36:52,845 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-23 22:36:52,845 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-11-23 22:36:52,846 INFO L87 Difference]: Start difference. First operand 389 states and 553 transitions. Second operand 5 states. [2019-11-23 22:36:52,904 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:36:52,904 INFO L93 Difference]: Finished difference Result 773 states and 1114 transitions. [2019-11-23 22:36:52,905 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-11-23 22:36:52,905 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 54 [2019-11-23 22:36:52,905 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:36:52,908 INFO L225 Difference]: With dead ends: 773 [2019-11-23 22:36:52,908 INFO L226 Difference]: Without dead ends: 489 [2019-11-23 22:36:52,909 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 4 SyntacticMatches, 1 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2019-11-23 22:36:52,910 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 489 states. [2019-11-23 22:36:52,929 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 489 to 384. [2019-11-23 22:36:52,929 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 384 states. [2019-11-23 22:36:52,931 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 384 states to 384 states and 545 transitions. [2019-11-23 22:36:52,931 INFO L78 Accepts]: Start accepts. Automaton has 384 states and 545 transitions. Word has length 54 [2019-11-23 22:36:52,931 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:36:52,931 INFO L462 AbstractCegarLoop]: Abstraction has 384 states and 545 transitions. [2019-11-23 22:36:52,932 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-23 22:36:52,932 INFO L276 IsEmpty]: Start isEmpty. Operand 384 states and 545 transitions. [2019-11-23 22:36:52,932 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 59 [2019-11-23 22:36:52,932 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:36:52,933 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:36:52,933 INFO L410 AbstractCegarLoop]: === Iteration 8 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:36:52,933 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:36:52,933 INFO L82 PathProgramCache]: Analyzing trace with hash 1630366882, now seen corresponding path program 1 times [2019-11-23 22:36:52,934 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:36:52,934 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [235205247] [2019-11-23 22:36:52,934 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:36:52,957 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:36:53,048 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-23 22:36:53,048 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [235205247] [2019-11-23 22:36:53,048 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-23 22:36:53,048 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-23 22:36:53,049 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [331132045] [2019-11-23 22:36:53,049 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-23 22:36:53,049 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:36:53,050 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-23 22:36:53,050 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-11-23 22:36:53,050 INFO L87 Difference]: Start difference. First operand 384 states and 545 transitions. Second operand 5 states. [2019-11-23 22:36:53,180 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:36:53,180 INFO L93 Difference]: Finished difference Result 804 states and 1163 transitions. [2019-11-23 22:36:53,181 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-23 22:36:53,181 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 58 [2019-11-23 22:36:53,181 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:36:53,184 INFO L225 Difference]: With dead ends: 804 [2019-11-23 22:36:53,184 INFO L226 Difference]: Without dead ends: 525 [2019-11-23 22:36:53,185 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 5 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-11-23 22:36:53,186 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 525 states. [2019-11-23 22:36:53,204 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 525 to 354. [2019-11-23 22:36:53,204 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 354 states. [2019-11-23 22:36:53,206 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 354 states to 354 states and 499 transitions. [2019-11-23 22:36:53,206 INFO L78 Accepts]: Start accepts. Automaton has 354 states and 499 transitions. Word has length 58 [2019-11-23 22:36:53,206 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:36:53,206 INFO L462 AbstractCegarLoop]: Abstraction has 354 states and 499 transitions. [2019-11-23 22:36:53,207 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-23 22:36:53,207 INFO L276 IsEmpty]: Start isEmpty. Operand 354 states and 499 transitions. [2019-11-23 22:36:53,207 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 64 [2019-11-23 22:36:53,207 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:36:53,208 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:36:53,208 INFO L410 AbstractCegarLoop]: === Iteration 9 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:36:53,209 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:36:53,209 INFO L82 PathProgramCache]: Analyzing trace with hash 644191382, now seen corresponding path program 1 times [2019-11-23 22:36:53,209 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:36:53,210 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1669238670] [2019-11-23 22:36:53,210 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:36:53,234 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:36:53,379 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-23 22:36:53,379 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1669238670] [2019-11-23 22:36:53,379 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-23 22:36:53,380 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-23 22:36:53,380 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1145214323] [2019-11-23 22:36:53,380 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-23 22:36:53,381 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:36:53,381 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-23 22:36:53,381 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-11-23 22:36:53,381 INFO L87 Difference]: Start difference. First operand 354 states and 499 transitions. Second operand 5 states. [2019-11-23 22:36:53,526 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:36:53,526 INFO L93 Difference]: Finished difference Result 900 states and 1292 transitions. [2019-11-23 22:36:53,526 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-23 22:36:53,526 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 63 [2019-11-23 22:36:53,527 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:36:53,530 INFO L225 Difference]: With dead ends: 900 [2019-11-23 22:36:53,530 INFO L226 Difference]: Without dead ends: 651 [2019-11-23 22:36:53,531 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 5 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-11-23 22:36:53,532 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 651 states. [2019-11-23 22:36:53,553 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 651 to 324. [2019-11-23 22:36:53,553 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 324 states. [2019-11-23 22:36:53,554 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 324 states to 324 states and 453 transitions. [2019-11-23 22:36:53,555 INFO L78 Accepts]: Start accepts. Automaton has 324 states and 453 transitions. Word has length 63 [2019-11-23 22:36:53,555 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:36:53,555 INFO L462 AbstractCegarLoop]: Abstraction has 324 states and 453 transitions. [2019-11-23 22:36:53,555 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-23 22:36:53,555 INFO L276 IsEmpty]: Start isEmpty. Operand 324 states and 453 transitions. [2019-11-23 22:36:53,556 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 69 [2019-11-23 22:36:53,556 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:36:53,556 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:36:53,556 INFO L410 AbstractCegarLoop]: === Iteration 10 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:36:53,557 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:36:53,557 INFO L82 PathProgramCache]: Analyzing trace with hash 157991886, now seen corresponding path program 1 times [2019-11-23 22:36:53,557 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:36:53,557 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [292922260] [2019-11-23 22:36:53,557 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:36:53,625 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:36:53,724 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-23 22:36:53,725 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [292922260] [2019-11-23 22:36:53,725 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-23 22:36:53,725 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-23 22:36:53,725 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1454615527] [2019-11-23 22:36:53,726 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-23 22:36:53,726 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:36:53,726 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-23 22:36:53,726 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-11-23 22:36:53,727 INFO L87 Difference]: Start difference. First operand 324 states and 453 transitions. Second operand 6 states. [2019-11-23 22:36:53,974 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:36:53,975 INFO L93 Difference]: Finished difference Result 1098 states and 1557 transitions. [2019-11-23 22:36:53,975 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2019-11-23 22:36:53,975 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 68 [2019-11-23 22:36:53,975 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:36:53,980 INFO L225 Difference]: With dead ends: 1098 [2019-11-23 22:36:53,980 INFO L226 Difference]: Without dead ends: 879 [2019-11-23 22:36:53,981 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=33, Invalid=77, Unknown=0, NotChecked=0, Total=110 [2019-11-23 22:36:53,982 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 879 states. [2019-11-23 22:36:54,010 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 879 to 363. [2019-11-23 22:36:54,011 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 363 states. [2019-11-23 22:36:54,012 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 363 states to 363 states and 507 transitions. [2019-11-23 22:36:54,012 INFO L78 Accepts]: Start accepts. Automaton has 363 states and 507 transitions. Word has length 68 [2019-11-23 22:36:54,021 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:36:54,021 INFO L462 AbstractCegarLoop]: Abstraction has 363 states and 507 transitions. [2019-11-23 22:36:54,021 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-23 22:36:54,022 INFO L276 IsEmpty]: Start isEmpty. Operand 363 states and 507 transitions. [2019-11-23 22:36:54,026 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 70 [2019-11-23 22:36:54,026 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:36:54,026 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:36:54,027 INFO L410 AbstractCegarLoop]: === Iteration 11 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:36:54,027 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:36:54,027 INFO L82 PathProgramCache]: Analyzing trace with hash -2134355609, now seen corresponding path program 1 times [2019-11-23 22:36:54,027 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:36:54,029 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [288657979] [2019-11-23 22:36:54,030 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:36:54,073 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:36:54,133 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-23 22:36:54,133 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [288657979] [2019-11-23 22:36:54,134 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-23 22:36:54,134 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-23 22:36:54,134 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [666016952] [2019-11-23 22:36:54,135 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-23 22:36:54,135 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:36:54,135 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-23 22:36:54,136 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:36:54,136 INFO L87 Difference]: Start difference. First operand 363 states and 507 transitions. Second operand 3 states. [2019-11-23 22:36:54,230 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:36:54,231 INFO L93 Difference]: Finished difference Result 659 states and 932 transitions. [2019-11-23 22:36:54,231 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-23 22:36:54,231 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 69 [2019-11-23 22:36:54,231 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:36:54,234 INFO L225 Difference]: With dead ends: 659 [2019-11-23 22:36:54,234 INFO L226 Difference]: Without dead ends: 440 [2019-11-23 22:36:54,235 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:36:54,235 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 440 states. [2019-11-23 22:36:54,258 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 440 to 359. [2019-11-23 22:36:54,258 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 359 states. [2019-11-23 22:36:54,259 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 359 states to 359 states and 500 transitions. [2019-11-23 22:36:54,259 INFO L78 Accepts]: Start accepts. Automaton has 359 states and 500 transitions. Word has length 69 [2019-11-23 22:36:54,260 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:36:54,260 INFO L462 AbstractCegarLoop]: Abstraction has 359 states and 500 transitions. [2019-11-23 22:36:54,260 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-23 22:36:54,260 INFO L276 IsEmpty]: Start isEmpty. Operand 359 states and 500 transitions. [2019-11-23 22:36:54,261 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-11-23 22:36:54,261 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:36:54,261 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:36:54,263 INFO L410 AbstractCegarLoop]: === Iteration 12 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:36:54,263 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:36:54,263 INFO L82 PathProgramCache]: Analyzing trace with hash 1585943340, now seen corresponding path program 1 times [2019-11-23 22:36:54,263 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:36:54,264 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1252603971] [2019-11-23 22:36:54,264 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:36:54,287 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:36:54,359 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-23 22:36:54,360 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1252603971] [2019-11-23 22:36:54,360 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-23 22:36:54,360 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-23 22:36:54,361 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1279032570] [2019-11-23 22:36:54,361 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-23 22:36:54,361 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:36:54,361 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-23 22:36:54,361 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-23 22:36:54,362 INFO L87 Difference]: Start difference. First operand 359 states and 500 transitions. Second operand 4 states. [2019-11-23 22:36:54,498 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:36:54,499 INFO L93 Difference]: Finished difference Result 949 states and 1326 transitions. [2019-11-23 22:36:54,499 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-23 22:36:54,499 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 72 [2019-11-23 22:36:54,500 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:36:54,503 INFO L225 Difference]: With dead ends: 949 [2019-11-23 22:36:54,503 INFO L226 Difference]: Without dead ends: 724 [2019-11-23 22:36:54,504 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-23 22:36:54,505 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 724 states. [2019-11-23 22:36:54,545 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 724 to 529. [2019-11-23 22:36:54,545 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 529 states. [2019-11-23 22:36:54,547 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 529 states to 529 states and 733 transitions. [2019-11-23 22:36:54,547 INFO L78 Accepts]: Start accepts. Automaton has 529 states and 733 transitions. Word has length 72 [2019-11-23 22:36:54,548 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:36:54,548 INFO L462 AbstractCegarLoop]: Abstraction has 529 states and 733 transitions. [2019-11-23 22:36:54,548 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-23 22:36:54,548 INFO L276 IsEmpty]: Start isEmpty. Operand 529 states and 733 transitions. [2019-11-23 22:36:54,549 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-11-23 22:36:54,549 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:36:54,549 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:36:54,550 INFO L410 AbstractCegarLoop]: === Iteration 13 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:36:54,550 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:36:54,550 INFO L82 PathProgramCache]: Analyzing trace with hash -2083950892, now seen corresponding path program 1 times [2019-11-23 22:36:54,550 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:36:54,550 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1618397198] [2019-11-23 22:36:54,551 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:36:54,585 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:36:54,626 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-23 22:36:54,627 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1618397198] [2019-11-23 22:36:54,627 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-23 22:36:54,627 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-23 22:36:54,627 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [369279809] [2019-11-23 22:36:54,628 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-23 22:36:54,628 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:36:54,629 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-23 22:36:54,629 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:36:54,629 INFO L87 Difference]: Start difference. First operand 529 states and 733 transitions. Second operand 3 states. [2019-11-23 22:36:54,669 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:36:54,670 INFO L93 Difference]: Finished difference Result 907 states and 1262 transitions. [2019-11-23 22:36:54,670 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-23 22:36:54,670 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 72 [2019-11-23 22:36:54,671 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:36:54,673 INFO L225 Difference]: With dead ends: 907 [2019-11-23 22:36:54,673 INFO L226 Difference]: Without dead ends: 529 [2019-11-23 22:36:54,674 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:36:54,675 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 529 states. [2019-11-23 22:36:54,708 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 529 to 529. [2019-11-23 22:36:54,708 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 529 states. [2019-11-23 22:36:54,710 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 529 states to 529 states and 729 transitions. [2019-11-23 22:36:54,710 INFO L78 Accepts]: Start accepts. Automaton has 529 states and 729 transitions. Word has length 72 [2019-11-23 22:36:54,711 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:36:54,711 INFO L462 AbstractCegarLoop]: Abstraction has 529 states and 729 transitions. [2019-11-23 22:36:54,711 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-23 22:36:54,711 INFO L276 IsEmpty]: Start isEmpty. Operand 529 states and 729 transitions. [2019-11-23 22:36:54,712 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-11-23 22:36:54,712 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:36:54,712 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:36:54,713 INFO L410 AbstractCegarLoop]: === Iteration 14 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:36:54,713 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:36:54,713 INFO L82 PathProgramCache]: Analyzing trace with hash 2070467794, now seen corresponding path program 1 times [2019-11-23 22:36:54,713 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:36:54,717 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1730094039] [2019-11-23 22:36:54,718 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:36:54,737 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:36:54,766 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-23 22:36:54,766 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1730094039] [2019-11-23 22:36:54,767 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-23 22:36:54,768 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-23 22:36:54,768 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [76089909] [2019-11-23 22:36:54,768 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-23 22:36:54,768 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:36:54,768 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-23 22:36:54,769 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:36:54,769 INFO L87 Difference]: Start difference. First operand 529 states and 729 transitions. Second operand 3 states. [2019-11-23 22:36:54,856 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:36:54,857 INFO L93 Difference]: Finished difference Result 1250 states and 1717 transitions. [2019-11-23 22:36:54,857 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-23 22:36:54,857 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 72 [2019-11-23 22:36:54,857 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:36:54,861 INFO L225 Difference]: With dead ends: 1250 [2019-11-23 22:36:54,861 INFO L226 Difference]: Without dead ends: 835 [2019-11-23 22:36:54,863 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:36:54,864 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 835 states. [2019-11-23 22:36:54,903 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 835 to 563. [2019-11-23 22:36:54,903 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 563 states. [2019-11-23 22:36:54,905 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 563 states to 563 states and 773 transitions. [2019-11-23 22:36:54,906 INFO L78 Accepts]: Start accepts. Automaton has 563 states and 773 transitions. Word has length 72 [2019-11-23 22:36:54,906 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:36:54,906 INFO L462 AbstractCegarLoop]: Abstraction has 563 states and 773 transitions. [2019-11-23 22:36:54,906 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-23 22:36:54,906 INFO L276 IsEmpty]: Start isEmpty. Operand 563 states and 773 transitions. [2019-11-23 22:36:54,907 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 74 [2019-11-23 22:36:54,907 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:36:54,908 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:36:54,908 INFO L410 AbstractCegarLoop]: === Iteration 15 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:36:54,908 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:36:54,908 INFO L82 PathProgramCache]: Analyzing trace with hash -1917205063, now seen corresponding path program 1 times [2019-11-23 22:36:54,909 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:36:54,909 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1420658677] [2019-11-23 22:36:54,909 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:36:54,956 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:36:55,050 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-23 22:36:55,051 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1420658677] [2019-11-23 22:36:55,052 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-23 22:36:55,052 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-23 22:36:55,052 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [610719637] [2019-11-23 22:36:55,052 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-23 22:36:55,053 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:36:55,053 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-23 22:36:55,053 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-11-23 22:36:55,053 INFO L87 Difference]: Start difference. First operand 563 states and 773 transitions. Second operand 6 states. [2019-11-23 22:36:55,425 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:36:55,425 INFO L93 Difference]: Finished difference Result 1763 states and 2476 transitions. [2019-11-23 22:36:55,425 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2019-11-23 22:36:55,426 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 73 [2019-11-23 22:36:55,426 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:36:55,434 INFO L225 Difference]: With dead ends: 1763 [2019-11-23 22:36:55,434 INFO L226 Difference]: Without dead ends: 1430 [2019-11-23 22:36:55,437 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=33, Invalid=77, Unknown=0, NotChecked=0, Total=110 [2019-11-23 22:36:55,440 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1430 states. [2019-11-23 22:36:55,488 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1430 to 567. [2019-11-23 22:36:55,488 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 567 states. [2019-11-23 22:36:55,490 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 567 states to 567 states and 778 transitions. [2019-11-23 22:36:55,491 INFO L78 Accepts]: Start accepts. Automaton has 567 states and 778 transitions. Word has length 73 [2019-11-23 22:36:55,491 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:36:55,491 INFO L462 AbstractCegarLoop]: Abstraction has 567 states and 778 transitions. [2019-11-23 22:36:55,491 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-23 22:36:55,491 INFO L276 IsEmpty]: Start isEmpty. Operand 567 states and 778 transitions. [2019-11-23 22:36:55,492 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 74 [2019-11-23 22:36:55,492 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:36:55,492 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:36:55,493 INFO L410 AbstractCegarLoop]: === Iteration 16 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:36:55,493 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:36:55,493 INFO L82 PathProgramCache]: Analyzing trace with hash 197100160, now seen corresponding path program 1 times [2019-11-23 22:36:55,493 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:36:55,494 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [103812639] [2019-11-23 22:36:55,494 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:36:55,525 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:36:55,603 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-23 22:36:55,603 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [103812639] [2019-11-23 22:36:55,607 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-23 22:36:55,607 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-23 22:36:55,607 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [300518409] [2019-11-23 22:36:55,608 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-23 22:36:55,608 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:36:55,609 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-23 22:36:55,609 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-11-23 22:36:55,609 INFO L87 Difference]: Start difference. First operand 567 states and 778 transitions. Second operand 5 states. [2019-11-23 22:36:55,841 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:36:55,842 INFO L93 Difference]: Finished difference Result 886 states and 1237 transitions. [2019-11-23 22:36:55,842 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-11-23 22:36:55,842 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 73 [2019-11-23 22:36:55,842 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:36:55,847 INFO L225 Difference]: With dead ends: 886 [2019-11-23 22:36:55,848 INFO L226 Difference]: Without dead ends: 884 [2019-11-23 22:36:55,848 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2019-11-23 22:36:55,850 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 884 states. [2019-11-23 22:36:55,895 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 884 to 569. [2019-11-23 22:36:55,895 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 569 states. [2019-11-23 22:36:55,897 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 569 states to 569 states and 780 transitions. [2019-11-23 22:36:55,897 INFO L78 Accepts]: Start accepts. Automaton has 569 states and 780 transitions. Word has length 73 [2019-11-23 22:36:55,898 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:36:55,898 INFO L462 AbstractCegarLoop]: Abstraction has 569 states and 780 transitions. [2019-11-23 22:36:55,898 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-23 22:36:55,898 INFO L276 IsEmpty]: Start isEmpty. Operand 569 states and 780 transitions. [2019-11-23 22:36:55,899 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 74 [2019-11-23 22:36:55,899 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:36:55,899 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:36:55,900 INFO L410 AbstractCegarLoop]: === Iteration 17 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:36:55,901 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:36:55,901 INFO L82 PathProgramCache]: Analyzing trace with hash 2083582807, now seen corresponding path program 1 times [2019-11-23 22:36:55,901 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:36:55,901 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1224745956] [2019-11-23 22:36:55,901 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:36:55,935 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:36:56,026 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-23 22:36:56,026 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1224745956] [2019-11-23 22:36:56,026 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-23 22:36:56,027 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-23 22:36:56,027 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2139734400] [2019-11-23 22:36:56,028 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-23 22:36:56,028 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:36:56,028 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-23 22:36:56,029 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-11-23 22:36:56,029 INFO L87 Difference]: Start difference. First operand 569 states and 780 transitions. Second operand 6 states. [2019-11-23 22:36:56,679 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:36:56,679 INFO L93 Difference]: Finished difference Result 2030 states and 2821 transitions. [2019-11-23 22:36:56,680 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-11-23 22:36:56,680 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 73 [2019-11-23 22:36:56,680 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:36:56,688 INFO L225 Difference]: With dead ends: 2030 [2019-11-23 22:36:56,688 INFO L226 Difference]: Without dead ends: 1656 [2019-11-23 22:36:56,690 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 7 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=54, Invalid=102, Unknown=0, NotChecked=0, Total=156 [2019-11-23 22:36:56,692 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1656 states. [2019-11-23 22:36:56,768 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1656 to 615. [2019-11-23 22:36:56,769 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 615 states. [2019-11-23 22:36:56,771 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 615 states to 615 states and 838 transitions. [2019-11-23 22:36:56,771 INFO L78 Accepts]: Start accepts. Automaton has 615 states and 838 transitions. Word has length 73 [2019-11-23 22:36:56,772 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:36:56,772 INFO L462 AbstractCegarLoop]: Abstraction has 615 states and 838 transitions. [2019-11-23 22:36:56,772 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-23 22:36:56,772 INFO L276 IsEmpty]: Start isEmpty. Operand 615 states and 838 transitions. [2019-11-23 22:36:56,773 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 75 [2019-11-23 22:36:56,773 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:36:56,773 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:36:56,774 INFO L410 AbstractCegarLoop]: === Iteration 18 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:36:56,774 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:36:56,774 INFO L82 PathProgramCache]: Analyzing trace with hash 1204676769, now seen corresponding path program 1 times [2019-11-23 22:36:56,774 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:36:56,774 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [4994729] [2019-11-23 22:36:56,775 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:36:56,805 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:36:56,948 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-23 22:36:56,949 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [4994729] [2019-11-23 22:36:56,949 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-23 22:36:56,949 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-23 22:36:56,949 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [928178574] [2019-11-23 22:36:56,950 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-23 22:36:56,954 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:36:56,955 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-23 22:36:56,955 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-11-23 22:36:56,955 INFO L87 Difference]: Start difference. First operand 615 states and 838 transitions. Second operand 6 states. [2019-11-23 22:36:57,389 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:36:57,390 INFO L93 Difference]: Finished difference Result 2356 states and 3253 transitions. [2019-11-23 22:36:57,390 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-11-23 22:36:57,390 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 74 [2019-11-23 22:36:57,391 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:36:57,400 INFO L225 Difference]: With dead ends: 2356 [2019-11-23 22:36:57,401 INFO L226 Difference]: Without dead ends: 1974 [2019-11-23 22:36:57,402 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 16 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=54, Invalid=102, Unknown=0, NotChecked=0, Total=156 [2019-11-23 22:36:57,405 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1974 states. [2019-11-23 22:36:57,475 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1974 to 693. [2019-11-23 22:36:57,476 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 693 states. [2019-11-23 22:36:57,478 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 693 states to 693 states and 940 transitions. [2019-11-23 22:36:57,478 INFO L78 Accepts]: Start accepts. Automaton has 693 states and 940 transitions. Word has length 74 [2019-11-23 22:36:57,478 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:36:57,479 INFO L462 AbstractCegarLoop]: Abstraction has 693 states and 940 transitions. [2019-11-23 22:36:57,479 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-23 22:36:57,479 INFO L276 IsEmpty]: Start isEmpty. Operand 693 states and 940 transitions. [2019-11-23 22:36:57,480 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 75 [2019-11-23 22:36:57,480 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:36:57,480 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:36:57,480 INFO L410 AbstractCegarLoop]: === Iteration 19 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:36:57,481 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:36:57,481 INFO L82 PathProgramCache]: Analyzing trace with hash -217796256, now seen corresponding path program 1 times [2019-11-23 22:36:57,482 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:36:57,483 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [867554029] [2019-11-23 22:36:57,483 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:36:57,502 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:36:57,565 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-23 22:36:57,566 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [867554029] [2019-11-23 22:36:57,566 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-23 22:36:57,566 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-23 22:36:57,566 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [620039900] [2019-11-23 22:36:57,567 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-23 22:36:57,568 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:36:57,568 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-23 22:36:57,568 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-11-23 22:36:57,568 INFO L87 Difference]: Start difference. First operand 693 states and 940 transitions. Second operand 6 states. [2019-11-23 22:36:57,806 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:36:57,806 INFO L93 Difference]: Finished difference Result 1555 states and 2195 transitions. [2019-11-23 22:36:57,806 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-11-23 22:36:57,806 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 74 [2019-11-23 22:36:57,807 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:36:57,812 INFO L225 Difference]: With dead ends: 1555 [2019-11-23 22:36:57,812 INFO L226 Difference]: Without dead ends: 1156 [2019-11-23 22:36:57,813 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=28, Invalid=62, Unknown=0, NotChecked=0, Total=90 [2019-11-23 22:36:57,815 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1156 states. [2019-11-23 22:36:57,877 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1156 to 699. [2019-11-23 22:36:57,878 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 699 states. [2019-11-23 22:36:57,879 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 699 states to 699 states and 946 transitions. [2019-11-23 22:36:57,880 INFO L78 Accepts]: Start accepts. Automaton has 699 states and 946 transitions. Word has length 74 [2019-11-23 22:36:57,880 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:36:57,880 INFO L462 AbstractCegarLoop]: Abstraction has 699 states and 946 transitions. [2019-11-23 22:36:57,880 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-23 22:36:57,880 INFO L276 IsEmpty]: Start isEmpty. Operand 699 states and 946 transitions. [2019-11-23 22:36:57,881 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 75 [2019-11-23 22:36:57,881 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:36:57,881 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:36:57,882 INFO L410 AbstractCegarLoop]: === Iteration 20 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:36:57,882 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:36:57,882 INFO L82 PathProgramCache]: Analyzing trace with hash -1278252476, now seen corresponding path program 1 times [2019-11-23 22:36:57,882 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:36:57,882 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1921079414] [2019-11-23 22:36:57,883 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:36:57,904 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:36:57,933 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-23 22:36:57,934 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1921079414] [2019-11-23 22:36:57,934 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-23 22:36:57,934 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-23 22:36:57,934 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1987207980] [2019-11-23 22:36:57,935 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-23 22:36:57,935 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:36:57,935 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-23 22:36:57,935 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:36:57,935 INFO L87 Difference]: Start difference. First operand 699 states and 946 transitions. Second operand 3 states. [2019-11-23 22:36:58,057 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:36:58,057 INFO L93 Difference]: Finished difference Result 1371 states and 1888 transitions. [2019-11-23 22:36:58,058 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-23 22:36:58,058 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 74 [2019-11-23 22:36:58,058 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:36:58,062 INFO L225 Difference]: With dead ends: 1371 [2019-11-23 22:36:58,062 INFO L226 Difference]: Without dead ends: 903 [2019-11-23 22:36:58,064 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:36:58,065 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 903 states. [2019-11-23 22:36:58,125 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 903 to 678. [2019-11-23 22:36:58,125 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 678 states. [2019-11-23 22:36:58,127 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 678 states to 678 states and 909 transitions. [2019-11-23 22:36:58,128 INFO L78 Accepts]: Start accepts. Automaton has 678 states and 909 transitions. Word has length 74 [2019-11-23 22:36:58,128 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:36:58,128 INFO L462 AbstractCegarLoop]: Abstraction has 678 states and 909 transitions. [2019-11-23 22:36:58,128 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-23 22:36:58,128 INFO L276 IsEmpty]: Start isEmpty. Operand 678 states and 909 transitions. [2019-11-23 22:36:58,129 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 76 [2019-11-23 22:36:58,129 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:36:58,129 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:36:58,130 INFO L410 AbstractCegarLoop]: === Iteration 21 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:36:58,130 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:36:58,130 INFO L82 PathProgramCache]: Analyzing trace with hash -1698648942, now seen corresponding path program 1 times [2019-11-23 22:36:58,130 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:36:58,131 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [238933670] [2019-11-23 22:36:58,131 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:36:58,148 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:36:58,185 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-23 22:36:58,185 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [238933670] [2019-11-23 22:36:58,185 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-23 22:36:58,185 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-23 22:36:58,186 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1840039892] [2019-11-23 22:36:58,186 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-23 22:36:58,186 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:36:58,186 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-23 22:36:58,187 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-23 22:36:58,187 INFO L87 Difference]: Start difference. First operand 678 states and 909 transitions. Second operand 4 states. [2019-11-23 22:36:58,370 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:36:58,370 INFO L93 Difference]: Finished difference Result 1740 states and 2346 transitions. [2019-11-23 22:36:58,370 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-23 22:36:58,370 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 75 [2019-11-23 22:36:58,371 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:36:58,377 INFO L225 Difference]: With dead ends: 1740 [2019-11-23 22:36:58,377 INFO L226 Difference]: Without dead ends: 1325 [2019-11-23 22:36:58,378 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-23 22:36:58,380 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1325 states. [2019-11-23 22:36:58,495 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1325 to 922. [2019-11-23 22:36:58,495 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 922 states. [2019-11-23 22:36:58,498 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 922 states to 922 states and 1236 transitions. [2019-11-23 22:36:58,498 INFO L78 Accepts]: Start accepts. Automaton has 922 states and 1236 transitions. Word has length 75 [2019-11-23 22:36:58,498 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:36:58,499 INFO L462 AbstractCegarLoop]: Abstraction has 922 states and 1236 transitions. [2019-11-23 22:36:58,499 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-23 22:36:58,499 INFO L276 IsEmpty]: Start isEmpty. Operand 922 states and 1236 transitions. [2019-11-23 22:36:58,500 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 76 [2019-11-23 22:36:58,500 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:36:58,500 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:36:58,500 INFO L410 AbstractCegarLoop]: === Iteration 22 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:36:58,501 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:36:58,501 INFO L82 PathProgramCache]: Analyzing trace with hash -1596781464, now seen corresponding path program 1 times [2019-11-23 22:36:58,501 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:36:58,501 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1346910904] [2019-11-23 22:36:58,501 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:36:58,524 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:36:58,562 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-23 22:36:58,562 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1346910904] [2019-11-23 22:36:58,562 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-23 22:36:58,562 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-23 22:36:58,563 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [302760205] [2019-11-23 22:36:58,563 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-23 22:36:58,563 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:36:58,563 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-23 22:36:58,564 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:36:58,565 INFO L87 Difference]: Start difference. First operand 922 states and 1236 transitions. Second operand 3 states. [2019-11-23 22:36:58,724 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:36:58,725 INFO L93 Difference]: Finished difference Result 1929 states and 2618 transitions. [2019-11-23 22:36:58,727 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-23 22:36:58,727 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 75 [2019-11-23 22:36:58,727 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:36:58,733 INFO L225 Difference]: With dead ends: 1929 [2019-11-23 22:36:58,733 INFO L226 Difference]: Without dead ends: 1325 [2019-11-23 22:36:58,735 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:36:58,737 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1325 states. [2019-11-23 22:36:58,818 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1325 to 876. [2019-11-23 22:36:58,818 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 876 states. [2019-11-23 22:36:58,821 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 876 states to 876 states and 1170 transitions. [2019-11-23 22:36:58,821 INFO L78 Accepts]: Start accepts. Automaton has 876 states and 1170 transitions. Word has length 75 [2019-11-23 22:36:58,821 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:36:58,821 INFO L462 AbstractCegarLoop]: Abstraction has 876 states and 1170 transitions. [2019-11-23 22:36:58,821 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-23 22:36:58,821 INFO L276 IsEmpty]: Start isEmpty. Operand 876 states and 1170 transitions. [2019-11-23 22:36:58,822 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 76 [2019-11-23 22:36:58,822 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:36:58,823 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:36:58,823 INFO L410 AbstractCegarLoop]: === Iteration 23 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:36:58,823 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:36:58,823 INFO L82 PathProgramCache]: Analyzing trace with hash -216337278, now seen corresponding path program 1 times [2019-11-23 22:36:58,823 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:36:58,824 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [671041113] [2019-11-23 22:36:58,824 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:36:58,840 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:36:58,877 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-23 22:36:58,880 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [671041113] [2019-11-23 22:36:58,880 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-23 22:36:58,881 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-23 22:36:58,881 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1637959253] [2019-11-23 22:36:58,881 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-23 22:36:58,881 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:36:58,882 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-23 22:36:58,882 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-23 22:36:58,882 INFO L87 Difference]: Start difference. First operand 876 states and 1170 transitions. Second operand 4 states. [2019-11-23 22:36:59,123 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:36:59,123 INFO L93 Difference]: Finished difference Result 2038 states and 2720 transitions. [2019-11-23 22:36:59,124 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-23 22:36:59,124 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 75 [2019-11-23 22:36:59,124 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:36:59,132 INFO L225 Difference]: With dead ends: 2038 [2019-11-23 22:36:59,132 INFO L226 Difference]: Without dead ends: 1463 [2019-11-23 22:36:59,134 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-23 22:36:59,136 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1463 states. [2019-11-23 22:36:59,302 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1463 to 1168. [2019-11-23 22:36:59,302 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1168 states. [2019-11-23 22:36:59,305 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1168 states to 1168 states and 1550 transitions. [2019-11-23 22:36:59,305 INFO L78 Accepts]: Start accepts. Automaton has 1168 states and 1550 transitions. Word has length 75 [2019-11-23 22:36:59,305 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:36:59,305 INFO L462 AbstractCegarLoop]: Abstraction has 1168 states and 1550 transitions. [2019-11-23 22:36:59,306 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-23 22:36:59,306 INFO L276 IsEmpty]: Start isEmpty. Operand 1168 states and 1550 transitions. [2019-11-23 22:36:59,307 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 77 [2019-11-23 22:36:59,307 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:36:59,307 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:36:59,307 INFO L410 AbstractCegarLoop]: === Iteration 24 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:36:59,308 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:36:59,308 INFO L82 PathProgramCache]: Analyzing trace with hash -1065252519, now seen corresponding path program 1 times [2019-11-23 22:36:59,308 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:36:59,308 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [702180600] [2019-11-23 22:36:59,308 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:36:59,320 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:36:59,337 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-23 22:36:59,337 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [702180600] [2019-11-23 22:36:59,338 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-23 22:36:59,338 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-23 22:36:59,338 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [567538116] [2019-11-23 22:36:59,338 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-23 22:36:59,338 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:36:59,339 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-23 22:36:59,339 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:36:59,339 INFO L87 Difference]: Start difference. First operand 1168 states and 1550 transitions. Second operand 3 states. [2019-11-23 22:36:59,705 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:36:59,705 INFO L93 Difference]: Finished difference Result 2879 states and 3814 transitions. [2019-11-23 22:36:59,706 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-23 22:36:59,706 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 76 [2019-11-23 22:36:59,706 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:36:59,718 INFO L225 Difference]: With dead ends: 2879 [2019-11-23 22:36:59,718 INFO L226 Difference]: Without dead ends: 1954 [2019-11-23 22:36:59,723 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:36:59,726 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1954 states. [2019-11-23 22:36:59,883 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1954 to 1170. [2019-11-23 22:36:59,884 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1170 states. [2019-11-23 22:36:59,887 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1170 states to 1170 states and 1552 transitions. [2019-11-23 22:36:59,887 INFO L78 Accepts]: Start accepts. Automaton has 1170 states and 1552 transitions. Word has length 76 [2019-11-23 22:36:59,887 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:36:59,887 INFO L462 AbstractCegarLoop]: Abstraction has 1170 states and 1552 transitions. [2019-11-23 22:36:59,887 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-23 22:36:59,888 INFO L276 IsEmpty]: Start isEmpty. Operand 1170 states and 1552 transitions. [2019-11-23 22:36:59,889 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 78 [2019-11-23 22:36:59,889 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:36:59,889 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:36:59,890 INFO L410 AbstractCegarLoop]: === Iteration 25 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:36:59,890 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:36:59,890 INFO L82 PathProgramCache]: Analyzing trace with hash -2019206059, now seen corresponding path program 1 times [2019-11-23 22:36:59,890 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:36:59,891 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1466709587] [2019-11-23 22:36:59,891 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:36:59,913 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:36:59,959 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-23 22:36:59,959 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1466709587] [2019-11-23 22:36:59,960 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-23 22:36:59,960 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-23 22:36:59,960 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [635674562] [2019-11-23 22:36:59,960 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-23 22:36:59,961 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:36:59,961 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-23 22:36:59,961 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-23 22:36:59,961 INFO L87 Difference]: Start difference. First operand 1170 states and 1552 transitions. Second operand 4 states. [2019-11-23 22:37:00,149 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:37:00,150 INFO L93 Difference]: Finished difference Result 2434 states and 3222 transitions. [2019-11-23 22:37:00,150 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-23 22:37:00,150 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 77 [2019-11-23 22:37:00,150 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:37:00,156 INFO L225 Difference]: With dead ends: 2434 [2019-11-23 22:37:00,156 INFO L226 Difference]: Without dead ends: 1321 [2019-11-23 22:37:00,158 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-23 22:37:00,160 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1321 states. [2019-11-23 22:37:00,292 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1321 to 975. [2019-11-23 22:37:00,292 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 975 states. [2019-11-23 22:37:00,294 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 975 states to 975 states and 1288 transitions. [2019-11-23 22:37:00,295 INFO L78 Accepts]: Start accepts. Automaton has 975 states and 1288 transitions. Word has length 77 [2019-11-23 22:37:00,295 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:37:00,295 INFO L462 AbstractCegarLoop]: Abstraction has 975 states and 1288 transitions. [2019-11-23 22:37:00,295 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-23 22:37:00,295 INFO L276 IsEmpty]: Start isEmpty. Operand 975 states and 1288 transitions. [2019-11-23 22:37:00,296 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 79 [2019-11-23 22:37:00,297 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:37:00,297 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:37:00,297 INFO L410 AbstractCegarLoop]: === Iteration 26 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:37:00,297 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:37:00,298 INFO L82 PathProgramCache]: Analyzing trace with hash -113428458, now seen corresponding path program 1 times [2019-11-23 22:37:00,298 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:37:00,298 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1006738785] [2019-11-23 22:37:00,298 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:37:00,320 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:37:00,381 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-23 22:37:00,381 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1006738785] [2019-11-23 22:37:00,382 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-23 22:37:00,382 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-23 22:37:00,382 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1021024208] [2019-11-23 22:37:00,383 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-23 22:37:00,383 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:37:00,383 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-23 22:37:00,384 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-23 22:37:00,384 INFO L87 Difference]: Start difference. First operand 975 states and 1288 transitions. Second operand 4 states. [2019-11-23 22:37:00,601 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:37:00,601 INFO L93 Difference]: Finished difference Result 2239 states and 2968 transitions. [2019-11-23 22:37:00,602 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-23 22:37:00,602 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 78 [2019-11-23 22:37:00,602 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:37:00,608 INFO L225 Difference]: With dead ends: 2239 [2019-11-23 22:37:00,608 INFO L226 Difference]: Without dead ends: 1341 [2019-11-23 22:37:00,610 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-23 22:37:00,612 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1341 states. [2019-11-23 22:37:00,720 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1341 to 919. [2019-11-23 22:37:00,720 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 919 states. [2019-11-23 22:37:00,723 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 919 states to 919 states and 1208 transitions. [2019-11-23 22:37:00,723 INFO L78 Accepts]: Start accepts. Automaton has 919 states and 1208 transitions. Word has length 78 [2019-11-23 22:37:00,723 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:37:00,724 INFO L462 AbstractCegarLoop]: Abstraction has 919 states and 1208 transitions. [2019-11-23 22:37:00,724 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-23 22:37:00,724 INFO L276 IsEmpty]: Start isEmpty. Operand 919 states and 1208 transitions. [2019-11-23 22:37:00,727 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 122 [2019-11-23 22:37:00,727 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:37:00,727 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:37:00,728 INFO L410 AbstractCegarLoop]: === Iteration 27 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:37:00,728 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:37:00,728 INFO L82 PathProgramCache]: Analyzing trace with hash 691547713, now seen corresponding path program 1 times [2019-11-23 22:37:00,728 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:37:00,729 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [311949010] [2019-11-23 22:37:00,729 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:37:00,773 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:37:01,017 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 33 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-23 22:37:01,017 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [311949010] [2019-11-23 22:37:01,017 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1914816381] [2019-11-23 22:37:01,017 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-11-23 22:37:01,179 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:37:01,182 INFO L255 TraceCheckSpWp]: Trace formula consists of 723 conjuncts, 9 conjunts are in the unsatisfiable core [2019-11-23 22:37:01,202 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2019-11-23 22:37:01,290 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 34 proven. 0 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2019-11-23 22:37:01,291 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2019-11-23 22:37:01,291 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [11] total 16 [2019-11-23 22:37:01,291 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [821019753] [2019-11-23 22:37:01,292 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-23 22:37:01,292 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:37:01,292 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-23 22:37:01,292 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=34, Invalid=206, Unknown=0, NotChecked=0, Total=240 [2019-11-23 22:37:01,293 INFO L87 Difference]: Start difference. First operand 919 states and 1208 transitions. Second operand 6 states. [2019-11-23 22:37:01,893 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:37:01,893 INFO L93 Difference]: Finished difference Result 2830 states and 3892 transitions. [2019-11-23 22:37:01,894 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-11-23 22:37:01,894 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 121 [2019-11-23 22:37:01,895 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:37:01,925 INFO L225 Difference]: With dead ends: 2830 [2019-11-23 22:37:01,925 INFO L226 Difference]: Without dead ends: 2058 [2019-11-23 22:37:01,933 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 136 GetRequests, 118 SyntacticMatches, 0 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 63 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=53, Invalid=327, Unknown=0, NotChecked=0, Total=380 [2019-11-23 22:37:01,940 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2058 states. [2019-11-23 22:37:02,116 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2058 to 919. [2019-11-23 22:37:02,116 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 919 states. [2019-11-23 22:37:02,121 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 919 states to 919 states and 1205 transitions. [2019-11-23 22:37:02,122 INFO L78 Accepts]: Start accepts. Automaton has 919 states and 1205 transitions. Word has length 121 [2019-11-23 22:37:02,122 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:37:02,122 INFO L462 AbstractCegarLoop]: Abstraction has 919 states and 1205 transitions. [2019-11-23 22:37:02,122 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-23 22:37:02,122 INFO L276 IsEmpty]: Start isEmpty. Operand 919 states and 1205 transitions. [2019-11-23 22:37:02,130 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 126 [2019-11-23 22:37:02,130 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:37:02,130 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:37:02,335 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 2 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-11-23 22:37:02,335 INFO L410 AbstractCegarLoop]: === Iteration 28 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:37:02,335 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:37:02,335 INFO L82 PathProgramCache]: Analyzing trace with hash 344042918, now seen corresponding path program 1 times [2019-11-23 22:37:02,336 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:37:02,336 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1821064771] [2019-11-23 22:37:02,336 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:37:02,376 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:37:02,681 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 33 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-23 22:37:02,682 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1821064771] [2019-11-23 22:37:02,682 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1080648415] [2019-11-23 22:37:02,682 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-11-23 22:37:02,864 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:37:02,866 INFO L255 TraceCheckSpWp]: Trace formula consists of 736 conjuncts, 8 conjunts are in the unsatisfiable core [2019-11-23 22:37:02,873 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2019-11-23 22:37:02,988 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 34 proven. 0 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2019-11-23 22:37:02,988 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2019-11-23 22:37:02,989 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [11] total 16 [2019-11-23 22:37:02,989 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [973001581] [2019-11-23 22:37:02,989 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-23 22:37:02,990 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:37:02,990 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-23 22:37:02,990 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=34, Invalid=206, Unknown=0, NotChecked=0, Total=240 [2019-11-23 22:37:02,991 INFO L87 Difference]: Start difference. First operand 919 states and 1205 transitions. Second operand 6 states. [2019-11-23 22:37:03,531 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:37:03,531 INFO L93 Difference]: Finished difference Result 2537 states and 3445 transitions. [2019-11-23 22:37:03,531 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2019-11-23 22:37:03,531 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 125 [2019-11-23 22:37:03,532 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:37:03,535 INFO L225 Difference]: With dead ends: 2537 [2019-11-23 22:37:03,535 INFO L226 Difference]: Without dead ends: 1765 [2019-11-23 22:37:03,537 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 141 GetRequests, 122 SyntacticMatches, 0 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 71 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=58, Invalid=362, Unknown=0, NotChecked=0, Total=420 [2019-11-23 22:37:03,539 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1765 states. [2019-11-23 22:37:03,650 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1765 to 919. [2019-11-23 22:37:03,650 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 919 states. [2019-11-23 22:37:03,652 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 919 states to 919 states and 1202 transitions. [2019-11-23 22:37:03,653 INFO L78 Accepts]: Start accepts. Automaton has 919 states and 1202 transitions. Word has length 125 [2019-11-23 22:37:03,653 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:37:03,653 INFO L462 AbstractCegarLoop]: Abstraction has 919 states and 1202 transitions. [2019-11-23 22:37:03,653 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-23 22:37:03,653 INFO L276 IsEmpty]: Start isEmpty. Operand 919 states and 1202 transitions. [2019-11-23 22:37:03,655 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 129 [2019-11-23 22:37:03,655 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:37:03,656 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:37:03,860 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-11-23 22:37:03,861 INFO L410 AbstractCegarLoop]: === Iteration 29 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:37:03,861 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:37:03,861 INFO L82 PathProgramCache]: Analyzing trace with hash 1182819496, now seen corresponding path program 1 times [2019-11-23 22:37:03,861 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:37:03,861 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1210175590] [2019-11-23 22:37:03,861 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:37:03,911 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:37:04,190 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 33 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-23 22:37:04,191 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1210175590] [2019-11-23 22:37:04,191 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1852137741] [2019-11-23 22:37:04,192 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-11-23 22:37:04,441 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:37:04,444 INFO L255 TraceCheckSpWp]: Trace formula consists of 748 conjuncts, 12 conjunts are in the unsatisfiable core [2019-11-23 22:37:04,458 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2019-11-23 22:37:04,557 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 34 proven. 0 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2019-11-23 22:37:04,559 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2019-11-23 22:37:04,560 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [11] total 16 [2019-11-23 22:37:04,560 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [522665024] [2019-11-23 22:37:04,560 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-23 22:37:04,561 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:37:04,561 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-23 22:37:04,561 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=34, Invalid=206, Unknown=0, NotChecked=0, Total=240 [2019-11-23 22:37:04,561 INFO L87 Difference]: Start difference. First operand 919 states and 1202 transitions. Second operand 6 states. [2019-11-23 22:37:05,114 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:37:05,114 INFO L93 Difference]: Finished difference Result 2921 states and 3998 transitions. [2019-11-23 22:37:05,115 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2019-11-23 22:37:05,115 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 128 [2019-11-23 22:37:05,115 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:37:05,153 INFO L225 Difference]: With dead ends: 2921 [2019-11-23 22:37:05,153 INFO L226 Difference]: Without dead ends: 2136 [2019-11-23 22:37:05,156 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 149 GetRequests, 128 SyntacticMatches, 0 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 86 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=79, Invalid=427, Unknown=0, NotChecked=0, Total=506 [2019-11-23 22:37:05,158 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2136 states. [2019-11-23 22:37:05,263 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2136 to 867. [2019-11-23 22:37:05,263 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 867 states. [2019-11-23 22:37:05,269 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 867 states to 867 states and 1124 transitions. [2019-11-23 22:37:05,269 INFO L78 Accepts]: Start accepts. Automaton has 867 states and 1124 transitions. Word has length 128 [2019-11-23 22:37:05,269 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:37:05,269 INFO L462 AbstractCegarLoop]: Abstraction has 867 states and 1124 transitions. [2019-11-23 22:37:05,270 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-23 22:37:05,270 INFO L276 IsEmpty]: Start isEmpty. Operand 867 states and 1124 transitions. [2019-11-23 22:37:05,272 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 130 [2019-11-23 22:37:05,272 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:37:05,272 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:37:05,484 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 4 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-11-23 22:37:05,485 INFO L410 AbstractCegarLoop]: === Iteration 30 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:37:05,485 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:37:05,485 INFO L82 PathProgramCache]: Analyzing trace with hash 677857235, now seen corresponding path program 1 times [2019-11-23 22:37:05,485 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:37:05,485 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [913800134] [2019-11-23 22:37:05,485 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:37:05,528 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:37:05,697 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 15 proven. 13 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-23 22:37:05,698 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [913800134] [2019-11-23 22:37:05,698 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1557617053] [2019-11-23 22:37:05,698 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-11-23 22:37:05,851 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:37:05,853 INFO L255 TraceCheckSpWp]: Trace formula consists of 749 conjuncts, 8 conjunts are in the unsatisfiable core [2019-11-23 22:37:05,857 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2019-11-23 22:37:05,942 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 26 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2019-11-23 22:37:05,942 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2019-11-23 22:37:05,942 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [8] total 13 [2019-11-23 22:37:05,942 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [279841292] [2019-11-23 22:37:05,943 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-23 22:37:05,943 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:37:05,943 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-23 22:37:05,943 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=25, Invalid=131, Unknown=0, NotChecked=0, Total=156 [2019-11-23 22:37:05,944 INFO L87 Difference]: Start difference. First operand 867 states and 1124 transitions. Second operand 6 states. [2019-11-23 22:37:06,283 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:37:06,283 INFO L93 Difference]: Finished difference Result 2253 states and 3058 transitions. [2019-11-23 22:37:06,283 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-11-23 22:37:06,284 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 129 [2019-11-23 22:37:06,284 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:37:06,287 INFO L225 Difference]: With dead ends: 2253 [2019-11-23 22:37:06,287 INFO L226 Difference]: Without dead ends: 1547 [2019-11-23 22:37:06,289 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 141 GetRequests, 126 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 24 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=44, Invalid=228, Unknown=0, NotChecked=0, Total=272 [2019-11-23 22:37:06,290 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1547 states. [2019-11-23 22:37:06,393 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1547 to 867. [2019-11-23 22:37:06,393 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 867 states. [2019-11-23 22:37:06,394 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 867 states to 867 states and 1123 transitions. [2019-11-23 22:37:06,395 INFO L78 Accepts]: Start accepts. Automaton has 867 states and 1123 transitions. Word has length 129 [2019-11-23 22:37:06,395 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:37:06,395 INFO L462 AbstractCegarLoop]: Abstraction has 867 states and 1123 transitions. [2019-11-23 22:37:06,395 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-23 22:37:06,395 INFO L276 IsEmpty]: Start isEmpty. Operand 867 states and 1123 transitions. [2019-11-23 22:37:06,397 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 134 [2019-11-23 22:37:06,397 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:37:06,397 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:37:06,601 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 5 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-11-23 22:37:06,602 INFO L410 AbstractCegarLoop]: === Iteration 31 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:37:06,602 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:37:06,602 INFO L82 PathProgramCache]: Analyzing trace with hash 960872696, now seen corresponding path program 1 times [2019-11-23 22:37:06,602 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:37:06,603 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1247206413] [2019-11-23 22:37:06,603 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:37:06,655 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:37:06,899 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 21 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-23 22:37:06,899 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1247206413] [2019-11-23 22:37:06,899 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [371698469] [2019-11-23 22:37:06,899 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-11-23 22:37:07,077 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:37:07,081 INFO L255 TraceCheckSpWp]: Trace formula consists of 763 conjuncts, 45 conjunts are in the unsatisfiable core [2019-11-23 22:37:07,088 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2019-11-23 22:37:07,516 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 21 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-23 22:37:07,517 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-11-23 22:37:07,517 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 12] total 20 [2019-11-23 22:37:07,517 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [42497168] [2019-11-23 22:37:07,519 INFO L442 AbstractCegarLoop]: Interpolant automaton has 21 states [2019-11-23 22:37:07,519 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:37:07,519 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2019-11-23 22:37:07,520 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=66, Invalid=354, Unknown=0, NotChecked=0, Total=420 [2019-11-23 22:37:07,520 INFO L87 Difference]: Start difference. First operand 867 states and 1123 transitions. Second operand 21 states. [2019-11-23 22:37:09,547 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:37:09,547 INFO L93 Difference]: Finished difference Result 2300 states and 3037 transitions. [2019-11-23 22:37:09,548 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2019-11-23 22:37:09,548 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 133 [2019-11-23 22:37:09,548 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:37:09,552 INFO L225 Difference]: With dead ends: 2300 [2019-11-23 22:37:09,552 INFO L226 Difference]: Without dead ends: 1600 [2019-11-23 22:37:09,554 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 165 GetRequests, 119 SyntacticMatches, 4 SemanticMatches, 42 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 392 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=376, Invalid=1516, Unknown=0, NotChecked=0, Total=1892 [2019-11-23 22:37:09,556 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1600 states. [2019-11-23 22:37:09,716 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1600 to 1035. [2019-11-23 22:37:09,716 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1035 states. [2019-11-23 22:37:09,718 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1035 states to 1035 states and 1337 transitions. [2019-11-23 22:37:09,718 INFO L78 Accepts]: Start accepts. Automaton has 1035 states and 1337 transitions. Word has length 133 [2019-11-23 22:37:09,718 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:37:09,719 INFO L462 AbstractCegarLoop]: Abstraction has 1035 states and 1337 transitions. [2019-11-23 22:37:09,719 INFO L463 AbstractCegarLoop]: Interpolant automaton has 21 states. [2019-11-23 22:37:09,719 INFO L276 IsEmpty]: Start isEmpty. Operand 1035 states and 1337 transitions. [2019-11-23 22:37:09,720 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 134 [2019-11-23 22:37:09,721 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:37:09,721 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:37:09,929 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 6 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-11-23 22:37:09,930 INFO L410 AbstractCegarLoop]: === Iteration 32 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:37:09,930 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:37:09,930 INFO L82 PathProgramCache]: Analyzing trace with hash -905835978, now seen corresponding path program 1 times [2019-11-23 22:37:09,931 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:37:09,932 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1468506686] [2019-11-23 22:37:09,932 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:37:09,949 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:37:09,985 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 9 proven. 0 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2019-11-23 22:37:09,986 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1468506686] [2019-11-23 22:37:09,986 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-23 22:37:09,986 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-23 22:37:09,986 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1681735543] [2019-11-23 22:37:09,987 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-23 22:37:09,987 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:37:09,987 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-23 22:37:09,987 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-23 22:37:09,988 INFO L87 Difference]: Start difference. First operand 1035 states and 1337 transitions. Second operand 4 states. [2019-11-23 22:37:10,286 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:37:10,286 INFO L93 Difference]: Finished difference Result 2508 states and 3266 transitions. [2019-11-23 22:37:10,287 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-23 22:37:10,287 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 133 [2019-11-23 22:37:10,287 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:37:10,290 INFO L225 Difference]: With dead ends: 2508 [2019-11-23 22:37:10,291 INFO L226 Difference]: Without dead ends: 1605 [2019-11-23 22:37:10,292 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-23 22:37:10,293 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1605 states. [2019-11-23 22:37:10,423 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1605 to 1067. [2019-11-23 22:37:10,423 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1067 states. [2019-11-23 22:37:10,425 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1067 states to 1067 states and 1365 transitions. [2019-11-23 22:37:10,425 INFO L78 Accepts]: Start accepts. Automaton has 1067 states and 1365 transitions. Word has length 133 [2019-11-23 22:37:10,426 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:37:10,426 INFO L462 AbstractCegarLoop]: Abstraction has 1067 states and 1365 transitions. [2019-11-23 22:37:10,426 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-23 22:37:10,426 INFO L276 IsEmpty]: Start isEmpty. Operand 1067 states and 1365 transitions. [2019-11-23 22:37:10,428 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 134 [2019-11-23 22:37:10,428 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:37:10,428 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:37:10,429 INFO L410 AbstractCegarLoop]: === Iteration 33 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:37:10,429 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:37:10,429 INFO L82 PathProgramCache]: Analyzing trace with hash -914742478, now seen corresponding path program 1 times [2019-11-23 22:37:10,429 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:37:10,429 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1913369058] [2019-11-23 22:37:10,429 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:37:10,443 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:37:10,664 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 9 proven. 0 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2019-11-23 22:37:10,664 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1913369058] [2019-11-23 22:37:10,665 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-23 22:37:10,665 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-23 22:37:10,665 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [271796685] [2019-11-23 22:37:10,665 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-23 22:37:10,666 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:37:10,666 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-23 22:37:10,666 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-11-23 22:37:10,666 INFO L87 Difference]: Start difference. First operand 1067 states and 1365 transitions. Second operand 5 states. [2019-11-23 22:37:10,994 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:37:10,994 INFO L93 Difference]: Finished difference Result 1927 states and 2501 transitions. [2019-11-23 22:37:10,994 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-23 22:37:10,994 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 133 [2019-11-23 22:37:10,995 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:37:10,996 INFO L225 Difference]: With dead ends: 1927 [2019-11-23 22:37:10,996 INFO L226 Difference]: Without dead ends: 992 [2019-11-23 22:37:10,998 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-11-23 22:37:10,999 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 992 states. [2019-11-23 22:37:11,158 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 992 to 992. [2019-11-23 22:37:11,159 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 992 states. [2019-11-23 22:37:11,160 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 992 states to 992 states and 1276 transitions. [2019-11-23 22:37:11,161 INFO L78 Accepts]: Start accepts. Automaton has 992 states and 1276 transitions. Word has length 133 [2019-11-23 22:37:11,161 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:37:11,161 INFO L462 AbstractCegarLoop]: Abstraction has 992 states and 1276 transitions. [2019-11-23 22:37:11,161 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-23 22:37:11,161 INFO L276 IsEmpty]: Start isEmpty. Operand 992 states and 1276 transitions. [2019-11-23 22:37:11,163 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 135 [2019-11-23 22:37:11,163 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:37:11,163 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:37:11,164 INFO L410 AbstractCegarLoop]: === Iteration 34 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:37:11,164 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:37:11,164 INFO L82 PathProgramCache]: Analyzing trace with hash 219147919, now seen corresponding path program 1 times [2019-11-23 22:37:11,164 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:37:11,164 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [273249733] [2019-11-23 22:37:11,165 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:37:11,245 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:37:11,403 INFO L134 CoverageAnalysis]: Checked inductivity of 42 backedges. 26 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-23 22:37:11,403 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [273249733] [2019-11-23 22:37:11,403 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [284172150] [2019-11-23 22:37:11,403 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-11-23 22:37:11,553 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:37:11,556 INFO L255 TraceCheckSpWp]: Trace formula consists of 764 conjuncts, 47 conjunts are in the unsatisfiable core [2019-11-23 22:37:11,559 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2019-11-23 22:37:11,867 INFO L134 CoverageAnalysis]: Checked inductivity of 42 backedges. 26 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-23 22:37:11,867 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-11-23 22:37:11,867 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 12] total 20 [2019-11-23 22:37:11,867 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [201742872] [2019-11-23 22:37:11,868 INFO L442 AbstractCegarLoop]: Interpolant automaton has 21 states [2019-11-23 22:37:11,868 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:37:11,868 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2019-11-23 22:37:11,868 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=68, Invalid=352, Unknown=0, NotChecked=0, Total=420 [2019-11-23 22:37:11,869 INFO L87 Difference]: Start difference. First operand 992 states and 1276 transitions. Second operand 21 states. [2019-11-23 22:37:15,212 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:37:15,212 INFO L93 Difference]: Finished difference Result 2980 states and 3873 transitions. [2019-11-23 22:37:15,212 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 54 states. [2019-11-23 22:37:15,212 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 134 [2019-11-23 22:37:15,213 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:37:15,215 INFO L225 Difference]: With dead ends: 2980 [2019-11-23 22:37:15,216 INFO L226 Difference]: Without dead ends: 2175 [2019-11-23 22:37:15,219 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 194 GetRequests, 120 SyntacticMatches, 4 SemanticMatches, 70 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1431 ImplicationChecksByTransitivity, 1.8s TimeCoverageRelationStatistics Valid=927, Invalid=4185, Unknown=0, NotChecked=0, Total=5112 [2019-11-23 22:37:15,221 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2175 states. [2019-11-23 22:37:15,414 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2175 to 1178. [2019-11-23 22:37:15,415 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1178 states. [2019-11-23 22:37:15,416 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1178 states to 1178 states and 1510 transitions. [2019-11-23 22:37:15,417 INFO L78 Accepts]: Start accepts. Automaton has 1178 states and 1510 transitions. Word has length 134 [2019-11-23 22:37:15,417 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:37:15,417 INFO L462 AbstractCegarLoop]: Abstraction has 1178 states and 1510 transitions. [2019-11-23 22:37:15,417 INFO L463 AbstractCegarLoop]: Interpolant automaton has 21 states. [2019-11-23 22:37:15,417 INFO L276 IsEmpty]: Start isEmpty. Operand 1178 states and 1510 transitions. [2019-11-23 22:37:15,419 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 135 [2019-11-23 22:37:15,419 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:37:15,420 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:37:15,623 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 7 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-11-23 22:37:15,624 INFO L410 AbstractCegarLoop]: === Iteration 35 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:37:15,624 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:37:15,625 INFO L82 PathProgramCache]: Analyzing trace with hash -1087994479, now seen corresponding path program 1 times [2019-11-23 22:37:15,625 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:37:15,626 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1889021645] [2019-11-23 22:37:15,626 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:37:15,640 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:37:15,675 INFO L134 CoverageAnalysis]: Checked inductivity of 42 backedges. 19 proven. 0 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2019-11-23 22:37:15,676 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1889021645] [2019-11-23 22:37:15,676 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-23 22:37:15,676 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-23 22:37:15,676 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [499355163] [2019-11-23 22:37:15,677 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-23 22:37:15,677 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:37:15,677 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-23 22:37:15,677 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-11-23 22:37:15,677 INFO L87 Difference]: Start difference. First operand 1178 states and 1510 transitions. Second operand 4 states. [2019-11-23 22:37:15,861 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:37:15,862 INFO L93 Difference]: Finished difference Result 2062 states and 2671 transitions. [2019-11-23 22:37:15,862 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-11-23 22:37:15,862 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 134 [2019-11-23 22:37:15,862 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:37:15,863 INFO L225 Difference]: With dead ends: 2062 [2019-11-23 22:37:15,863 INFO L226 Difference]: Without dead ends: 1014 [2019-11-23 22:37:15,864 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-11-23 22:37:15,865 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1014 states. [2019-11-23 22:37:15,968 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1014 to 1014. [2019-11-23 22:37:15,968 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1014 states. [2019-11-23 22:37:15,969 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1014 states to 1014 states and 1292 transitions. [2019-11-23 22:37:15,970 INFO L78 Accepts]: Start accepts. Automaton has 1014 states and 1292 transitions. Word has length 134 [2019-11-23 22:37:15,970 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:37:15,970 INFO L462 AbstractCegarLoop]: Abstraction has 1014 states and 1292 transitions. [2019-11-23 22:37:15,970 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-23 22:37:15,970 INFO L276 IsEmpty]: Start isEmpty. Operand 1014 states and 1292 transitions. [2019-11-23 22:37:15,972 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 136 [2019-11-23 22:37:15,972 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:37:15,972 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:37:15,973 INFO L410 AbstractCegarLoop]: === Iteration 36 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:37:15,973 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:37:15,973 INFO L82 PathProgramCache]: Analyzing trace with hash 440475699, now seen corresponding path program 1 times [2019-11-23 22:37:15,973 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:37:15,973 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [164687] [2019-11-23 22:37:15,973 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:37:16,012 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:37:16,175 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 15 proven. 13 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-23 22:37:16,175 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [164687] [2019-11-23 22:37:16,175 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2129624990] [2019-11-23 22:37:16,176 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-11-23 22:37:16,332 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:37:16,335 INFO L255 TraceCheckSpWp]: Trace formula consists of 765 conjuncts, 31 conjunts are in the unsatisfiable core [2019-11-23 22:37:16,338 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2019-11-23 22:37:16,567 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 15 proven. 13 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-23 22:37:16,567 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-11-23 22:37:16,567 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 11] total 17 [2019-11-23 22:37:16,568 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [641087106] [2019-11-23 22:37:16,568 INFO L442 AbstractCegarLoop]: Interpolant automaton has 18 states [2019-11-23 22:37:16,568 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:37:16,568 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2019-11-23 22:37:16,568 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=67, Invalid=239, Unknown=0, NotChecked=0, Total=306 [2019-11-23 22:37:16,569 INFO L87 Difference]: Start difference. First operand 1014 states and 1292 transitions. Second operand 18 states. [2019-11-23 22:37:19,451 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:37:19,451 INFO L93 Difference]: Finished difference Result 4336 states and 5610 transitions. [2019-11-23 22:37:19,452 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 50 states. [2019-11-23 22:37:19,452 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 135 [2019-11-23 22:37:19,452 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:37:19,455 INFO L225 Difference]: With dead ends: 4336 [2019-11-23 22:37:19,455 INFO L226 Difference]: Without dead ends: 3509 [2019-11-23 22:37:19,458 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 189 GetRequests, 123 SyntacticMatches, 3 SemanticMatches, 63 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1399 ImplicationChecksByTransitivity, 1.2s TimeCoverageRelationStatistics Valid=942, Invalid=3218, Unknown=0, NotChecked=0, Total=4160 [2019-11-23 22:37:19,461 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3509 states. [2019-11-23 22:37:19,669 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3509 to 1471. [2019-11-23 22:37:19,669 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1471 states. [2019-11-23 22:37:19,670 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1471 states to 1471 states and 1889 transitions. [2019-11-23 22:37:19,670 INFO L78 Accepts]: Start accepts. Automaton has 1471 states and 1889 transitions. Word has length 135 [2019-11-23 22:37:19,671 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:37:19,671 INFO L462 AbstractCegarLoop]: Abstraction has 1471 states and 1889 transitions. [2019-11-23 22:37:19,671 INFO L463 AbstractCegarLoop]: Interpolant automaton has 18 states. [2019-11-23 22:37:19,671 INFO L276 IsEmpty]: Start isEmpty. Operand 1471 states and 1889 transitions. [2019-11-23 22:37:19,672 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 137 [2019-11-23 22:37:19,672 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:37:19,672 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:37:19,873 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 8 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-11-23 22:37:19,873 INFO L410 AbstractCegarLoop]: === Iteration 37 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:37:19,874 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:37:19,874 INFO L82 PathProgramCache]: Analyzing trace with hash -416406862, now seen corresponding path program 1 times [2019-11-23 22:37:19,874 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:37:19,875 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [4294409] [2019-11-23 22:37:19,875 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:37:19,911 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:37:20,154 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 33 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-23 22:37:20,155 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [4294409] [2019-11-23 22:37:20,155 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2012360336] [2019-11-23 22:37:20,155 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-11-23 22:37:20,304 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:37:20,306 INFO L255 TraceCheckSpWp]: Trace formula consists of 775 conjuncts, 8 conjunts are in the unsatisfiable core [2019-11-23 22:37:20,309 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2019-11-23 22:37:20,427 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 34 proven. 0 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2019-11-23 22:37:20,427 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2019-11-23 22:37:20,428 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [11] total 16 [2019-11-23 22:37:20,428 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1554986952] [2019-11-23 22:37:20,428 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-23 22:37:20,428 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:37:20,429 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-23 22:37:20,429 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=34, Invalid=206, Unknown=0, NotChecked=0, Total=240 [2019-11-23 22:37:20,429 INFO L87 Difference]: Start difference. First operand 1471 states and 1889 transitions. Second operand 6 states. [2019-11-23 22:37:21,229 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:37:21,229 INFO L93 Difference]: Finished difference Result 4365 states and 5753 transitions. [2019-11-23 22:37:21,229 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2019-11-23 22:37:21,230 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 136 [2019-11-23 22:37:21,230 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:37:21,233 INFO L225 Difference]: With dead ends: 4365 [2019-11-23 22:37:21,233 INFO L226 Difference]: Without dead ends: 3228 [2019-11-23 22:37:21,234 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 152 GetRequests, 133 SyntacticMatches, 0 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 71 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=58, Invalid=362, Unknown=0, NotChecked=0, Total=420 [2019-11-23 22:37:21,237 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3228 states. [2019-11-23 22:37:21,388 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3228 to 1471. [2019-11-23 22:37:21,388 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1471 states. [2019-11-23 22:37:21,389 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1471 states to 1471 states and 1887 transitions. [2019-11-23 22:37:21,390 INFO L78 Accepts]: Start accepts. Automaton has 1471 states and 1887 transitions. Word has length 136 [2019-11-23 22:37:21,390 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:37:21,390 INFO L462 AbstractCegarLoop]: Abstraction has 1471 states and 1887 transitions. [2019-11-23 22:37:21,390 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-23 22:37:21,390 INFO L276 IsEmpty]: Start isEmpty. Operand 1471 states and 1887 transitions. [2019-11-23 22:37:21,391 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 137 [2019-11-23 22:37:21,391 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:37:21,392 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:37:21,593 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 9 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-11-23 22:37:21,593 INFO L410 AbstractCegarLoop]: === Iteration 38 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:37:21,594 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:37:21,594 INFO L82 PathProgramCache]: Analyzing trace with hash -330077116, now seen corresponding path program 1 times [2019-11-23 22:37:21,595 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:37:21,595 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [469675461] [2019-11-23 22:37:21,596 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:37:21,618 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:37:21,678 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 15 proven. 0 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2019-11-23 22:37:21,678 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [469675461] [2019-11-23 22:37:21,678 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-23 22:37:21,679 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-23 22:37:21,679 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1781704636] [2019-11-23 22:37:21,679 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-23 22:37:21,679 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:37:21,680 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-23 22:37:21,680 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-11-23 22:37:21,680 INFO L87 Difference]: Start difference. First operand 1471 states and 1887 transitions. Second operand 6 states. [2019-11-23 22:37:22,686 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:37:22,686 INFO L93 Difference]: Finished difference Result 7797 states and 10159 transitions. [2019-11-23 22:37:22,687 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2019-11-23 22:37:22,687 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 136 [2019-11-23 22:37:22,687 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:37:22,692 INFO L225 Difference]: With dead ends: 7797 [2019-11-23 22:37:22,692 INFO L226 Difference]: Without dead ends: 6513 [2019-11-23 22:37:22,694 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 21 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 32 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=66, Invalid=144, Unknown=0, NotChecked=0, Total=210 [2019-11-23 22:37:22,699 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6513 states. [2019-11-23 22:37:22,910 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6513 to 1841. [2019-11-23 22:37:22,911 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1841 states. [2019-11-23 22:37:22,913 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1841 states to 1841 states and 2319 transitions. [2019-11-23 22:37:22,913 INFO L78 Accepts]: Start accepts. Automaton has 1841 states and 2319 transitions. Word has length 136 [2019-11-23 22:37:22,914 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:37:22,914 INFO L462 AbstractCegarLoop]: Abstraction has 1841 states and 2319 transitions. [2019-11-23 22:37:22,914 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-23 22:37:22,914 INFO L276 IsEmpty]: Start isEmpty. Operand 1841 states and 2319 transitions. [2019-11-23 22:37:22,916 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 140 [2019-11-23 22:37:22,917 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:37:22,917 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:37:22,917 INFO L410 AbstractCegarLoop]: === Iteration 39 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:37:22,917 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:37:22,918 INFO L82 PathProgramCache]: Analyzing trace with hash 633057662, now seen corresponding path program 1 times [2019-11-23 22:37:22,918 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:37:22,918 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [799483843] [2019-11-23 22:37:22,918 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:37:22,946 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:37:23,157 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 33 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-23 22:37:23,158 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [799483843] [2019-11-23 22:37:23,158 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [617774251] [2019-11-23 22:37:23,158 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-11-23 22:37:23,299 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:37:23,301 INFO L255 TraceCheckSpWp]: Trace formula consists of 787 conjuncts, 14 conjunts are in the unsatisfiable core [2019-11-23 22:37:23,304 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2019-11-23 22:37:23,409 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 8 proven. 33 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-23 22:37:23,409 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-11-23 22:37:23,409 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 7] total 17 [2019-11-23 22:37:23,410 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [494520627] [2019-11-23 22:37:23,410 INFO L442 AbstractCegarLoop]: Interpolant automaton has 17 states [2019-11-23 22:37:23,410 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:37:23,411 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2019-11-23 22:37:23,411 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=36, Invalid=236, Unknown=0, NotChecked=0, Total=272 [2019-11-23 22:37:23,411 INFO L87 Difference]: Start difference. First operand 1841 states and 2319 transitions. Second operand 17 states. [2019-11-23 22:37:33,706 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:37:33,706 INFO L93 Difference]: Finished difference Result 9713 states and 12603 transitions. [2019-11-23 22:37:33,706 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 147 states. [2019-11-23 22:37:33,707 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 139 [2019-11-23 22:37:33,711 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:37:33,719 INFO L225 Difference]: With dead ends: 9713 [2019-11-23 22:37:33,719 INFO L226 Difference]: Without dead ends: 8254 [2019-11-23 22:37:33,729 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 320 GetRequests, 161 SyntacticMatches, 0 SemanticMatches, 159 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10632 ImplicationChecksByTransitivity, 5.8s TimeCoverageRelationStatistics Valid=4619, Invalid=21141, Unknown=0, NotChecked=0, Total=25760 [2019-11-23 22:37:33,734 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8254 states. [2019-11-23 22:37:34,183 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8254 to 2444. [2019-11-23 22:37:34,183 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2444 states. [2019-11-23 22:37:34,185 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2444 states to 2444 states and 3084 transitions. [2019-11-23 22:37:34,185 INFO L78 Accepts]: Start accepts. Automaton has 2444 states and 3084 transitions. Word has length 139 [2019-11-23 22:37:34,185 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:37:34,186 INFO L462 AbstractCegarLoop]: Abstraction has 2444 states and 3084 transitions. [2019-11-23 22:37:34,186 INFO L463 AbstractCegarLoop]: Interpolant automaton has 17 states. [2019-11-23 22:37:34,186 INFO L276 IsEmpty]: Start isEmpty. Operand 2444 states and 3084 transitions. [2019-11-23 22:37:34,187 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 140 [2019-11-23 22:37:34,188 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:37:34,188 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:37:34,391 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 10 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-11-23 22:37:34,392 INFO L410 AbstractCegarLoop]: === Iteration 40 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:37:34,392 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:37:34,393 INFO L82 PathProgramCache]: Analyzing trace with hash -1379305215, now seen corresponding path program 1 times [2019-11-23 22:37:34,393 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:37:34,393 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2085654478] [2019-11-23 22:37:34,394 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:37:34,455 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:37:34,590 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 24 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-23 22:37:34,590 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2085654478] [2019-11-23 22:37:34,591 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1294893974] [2019-11-23 22:37:34,591 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-11-23 22:37:34,743 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:37:34,745 INFO L255 TraceCheckSpWp]: Trace formula consists of 769 conjuncts, 18 conjunts are in the unsatisfiable core [2019-11-23 22:37:34,748 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2019-11-23 22:37:34,770 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 24 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-23 22:37:34,771 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-11-23 22:37:34,771 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 8] total 8 [2019-11-23 22:37:34,771 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [578221177] [2019-11-23 22:37:34,771 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-11-23 22:37:34,771 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:37:34,772 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-11-23 22:37:34,772 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=42, Unknown=0, NotChecked=0, Total=56 [2019-11-23 22:37:34,772 INFO L87 Difference]: Start difference. First operand 2444 states and 3084 transitions. Second operand 8 states. [2019-11-23 22:37:35,946 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:37:35,946 INFO L93 Difference]: Finished difference Result 9037 states and 11497 transitions. [2019-11-23 22:37:35,946 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2019-11-23 22:37:35,946 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 139 [2019-11-23 22:37:35,947 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:37:35,952 INFO L225 Difference]: With dead ends: 9037 [2019-11-23 22:37:35,952 INFO L226 Difference]: Without dead ends: 6843 [2019-11-23 22:37:35,954 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 165 GetRequests, 143 SyntacticMatches, 0 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 96 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=129, Invalid=423, Unknown=0, NotChecked=0, Total=552 [2019-11-23 22:37:35,958 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6843 states. [2019-11-23 22:37:36,466 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6843 to 3832. [2019-11-23 22:37:36,466 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3832 states. [2019-11-23 22:37:36,470 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3832 states to 3832 states and 4851 transitions. [2019-11-23 22:37:36,470 INFO L78 Accepts]: Start accepts. Automaton has 3832 states and 4851 transitions. Word has length 139 [2019-11-23 22:37:36,470 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:37:36,470 INFO L462 AbstractCegarLoop]: Abstraction has 3832 states and 4851 transitions. [2019-11-23 22:37:36,470 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-11-23 22:37:36,470 INFO L276 IsEmpty]: Start isEmpty. Operand 3832 states and 4851 transitions. [2019-11-23 22:37:36,473 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 140 [2019-11-23 22:37:36,473 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:37:36,474 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:37:36,677 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 11 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-11-23 22:37:36,678 INFO L410 AbstractCegarLoop]: === Iteration 41 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:37:36,678 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:37:36,678 INFO L82 PathProgramCache]: Analyzing trace with hash 9988799, now seen corresponding path program 1 times [2019-11-23 22:37:36,679 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:37:36,679 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [781995675] [2019-11-23 22:37:36,679 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:37:36,694 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:37:36,732 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 9 proven. 0 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2019-11-23 22:37:36,732 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [781995675] [2019-11-23 22:37:36,732 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-23 22:37:36,732 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-23 22:37:36,732 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [560656118] [2019-11-23 22:37:36,733 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-23 22:37:36,734 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:37:36,734 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-23 22:37:36,735 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-11-23 22:37:36,735 INFO L87 Difference]: Start difference. First operand 3832 states and 4851 transitions. Second operand 4 states. [2019-11-23 22:37:37,380 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:37:37,380 INFO L93 Difference]: Finished difference Result 6501 states and 8303 transitions. [2019-11-23 22:37:37,380 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-11-23 22:37:37,380 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 139 [2019-11-23 22:37:37,380 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:37:37,383 INFO L225 Difference]: With dead ends: 6501 [2019-11-23 22:37:37,383 INFO L226 Difference]: Without dead ends: 2919 [2019-11-23 22:37:37,386 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-11-23 22:37:37,387 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2919 states. [2019-11-23 22:37:37,869 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2919 to 2907. [2019-11-23 22:37:37,869 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2907 states. [2019-11-23 22:37:37,872 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2907 states to 2907 states and 3673 transitions. [2019-11-23 22:37:37,872 INFO L78 Accepts]: Start accepts. Automaton has 2907 states and 3673 transitions. Word has length 139 [2019-11-23 22:37:37,872 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:37:37,872 INFO L462 AbstractCegarLoop]: Abstraction has 2907 states and 3673 transitions. [2019-11-23 22:37:37,872 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-23 22:37:37,872 INFO L276 IsEmpty]: Start isEmpty. Operand 2907 states and 3673 transitions. [2019-11-23 22:37:37,874 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 144 [2019-11-23 22:37:37,874 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:37:37,874 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:37:37,876 INFO L410 AbstractCegarLoop]: === Iteration 42 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:37:37,876 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:37:37,876 INFO L82 PathProgramCache]: Analyzing trace with hash 850968806, now seen corresponding path program 1 times [2019-11-23 22:37:37,876 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:37:37,877 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [567596750] [2019-11-23 22:37:37,877 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:37:37,922 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:37:38,011 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 24 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2019-11-23 22:37:38,011 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [567596750] [2019-11-23 22:37:38,011 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-23 22:37:38,012 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-23 22:37:38,012 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [110458974] [2019-11-23 22:37:38,012 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-23 22:37:38,012 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:37:38,012 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-23 22:37:38,013 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-11-23 22:37:38,013 INFO L87 Difference]: Start difference. First operand 2907 states and 3673 transitions. Second operand 6 states. [2019-11-23 22:37:39,218 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:37:39,219 INFO L93 Difference]: Finished difference Result 9661 states and 12524 transitions. [2019-11-23 22:37:39,219 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-11-23 22:37:39,219 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 143 [2019-11-23 22:37:39,219 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:37:39,225 INFO L225 Difference]: With dead ends: 9661 [2019-11-23 22:37:39,225 INFO L226 Difference]: Without dead ends: 7191 [2019-11-23 22:37:39,228 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 9 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 16 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=54, Invalid=102, Unknown=0, NotChecked=0, Total=156 [2019-11-23 22:37:39,231 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7191 states. [2019-11-23 22:37:39,597 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7191 to 2987. [2019-11-23 22:37:39,597 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2987 states. [2019-11-23 22:37:39,600 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2987 states to 2987 states and 3766 transitions. [2019-11-23 22:37:39,600 INFO L78 Accepts]: Start accepts. Automaton has 2987 states and 3766 transitions. Word has length 143 [2019-11-23 22:37:39,600 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:37:39,600 INFO L462 AbstractCegarLoop]: Abstraction has 2987 states and 3766 transitions. [2019-11-23 22:37:39,601 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-23 22:37:39,601 INFO L276 IsEmpty]: Start isEmpty. Operand 2987 states and 3766 transitions. [2019-11-23 22:37:39,603 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 145 [2019-11-23 22:37:39,603 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:37:39,603 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:37:39,603 INFO L410 AbstractCegarLoop]: === Iteration 43 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:37:39,603 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:37:39,603 INFO L82 PathProgramCache]: Analyzing trace with hash 1499523083, now seen corresponding path program 1 times [2019-11-23 22:37:39,603 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:37:39,603 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [827855765] [2019-11-23 22:37:39,604 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:37:39,614 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:37:39,653 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 11 proven. 0 refuted. 0 times theorem prover too weak. 39 trivial. 0 not checked. [2019-11-23 22:37:39,653 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [827855765] [2019-11-23 22:37:39,653 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-23 22:37:39,654 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-23 22:37:39,654 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1772075800] [2019-11-23 22:37:39,654 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-23 22:37:39,654 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:37:39,655 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-23 22:37:39,655 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-23 22:37:39,655 INFO L87 Difference]: Start difference. First operand 2987 states and 3766 transitions. Second operand 4 states. [2019-11-23 22:37:40,332 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:37:40,333 INFO L93 Difference]: Finished difference Result 7420 states and 9386 transitions. [2019-11-23 22:37:40,412 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-23 22:37:40,412 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 144 [2019-11-23 22:37:40,412 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:37:40,415 INFO L225 Difference]: With dead ends: 7420 [2019-11-23 22:37:40,415 INFO L226 Difference]: Without dead ends: 4714 [2019-11-23 22:37:40,417 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-23 22:37:40,420 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4714 states. [2019-11-23 22:37:40,784 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4714 to 3019. [2019-11-23 22:37:40,784 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3019 states. [2019-11-23 22:37:40,787 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3019 states to 3019 states and 3790 transitions. [2019-11-23 22:37:40,787 INFO L78 Accepts]: Start accepts. Automaton has 3019 states and 3790 transitions. Word has length 144 [2019-11-23 22:37:40,787 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:37:40,787 INFO L462 AbstractCegarLoop]: Abstraction has 3019 states and 3790 transitions. [2019-11-23 22:37:40,787 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-23 22:37:40,787 INFO L276 IsEmpty]: Start isEmpty. Operand 3019 states and 3790 transitions. [2019-11-23 22:37:40,790 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 145 [2019-11-23 22:37:40,790 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:37:40,790 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:37:40,791 INFO L410 AbstractCegarLoop]: === Iteration 44 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:37:40,791 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:37:40,791 INFO L82 PathProgramCache]: Analyzing trace with hash -1504651889, now seen corresponding path program 1 times [2019-11-23 22:37:40,791 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:37:40,791 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1160709992] [2019-11-23 22:37:40,791 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:37:40,807 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:37:40,890 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 41 proven. 9 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-23 22:37:40,891 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1160709992] [2019-11-23 22:37:40,891 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1650111370] [2019-11-23 22:37:40,891 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-11-23 22:37:41,037 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:37:41,039 INFO L255 TraceCheckSpWp]: Trace formula consists of 794 conjuncts, 5 conjunts are in the unsatisfiable core [2019-11-23 22:37:41,041 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2019-11-23 22:37:41,086 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 11 proven. 0 refuted. 0 times theorem prover too weak. 39 trivial. 0 not checked. [2019-11-23 22:37:41,086 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2019-11-23 22:37:41,086 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [7] total 10 [2019-11-23 22:37:41,087 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1222538] [2019-11-23 22:37:41,087 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-23 22:37:41,087 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:37:41,087 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-23 22:37:41,087 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=67, Unknown=0, NotChecked=0, Total=90 [2019-11-23 22:37:41,088 INFO L87 Difference]: Start difference. First operand 3019 states and 3790 transitions. Second operand 5 states. [2019-11-23 22:37:41,509 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:37:41,509 INFO L93 Difference]: Finished difference Result 5566 states and 7031 transitions. [2019-11-23 22:37:41,510 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-23 22:37:41,510 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 144 [2019-11-23 22:37:41,510 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:37:41,512 INFO L225 Difference]: With dead ends: 5566 [2019-11-23 22:37:41,512 INFO L226 Difference]: Without dead ends: 2797 [2019-11-23 22:37:41,515 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 150 GetRequests, 142 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 12 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=23, Invalid=67, Unknown=0, NotChecked=0, Total=90 [2019-11-23 22:37:41,517 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2797 states. [2019-11-23 22:37:41,946 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2797 to 2797. [2019-11-23 22:37:41,947 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2797 states. [2019-11-23 22:37:41,949 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2797 states to 2797 states and 3527 transitions. [2019-11-23 22:37:41,949 INFO L78 Accepts]: Start accepts. Automaton has 2797 states and 3527 transitions. Word has length 144 [2019-11-23 22:37:41,949 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:37:41,949 INFO L462 AbstractCegarLoop]: Abstraction has 2797 states and 3527 transitions. [2019-11-23 22:37:41,949 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-23 22:37:41,950 INFO L276 IsEmpty]: Start isEmpty. Operand 2797 states and 3527 transitions. [2019-11-23 22:37:41,951 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 145 [2019-11-23 22:37:41,951 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:37:41,951 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:37:42,153 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 12 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-11-23 22:37:42,154 INFO L410 AbstractCegarLoop]: === Iteration 45 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:37:42,154 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:37:42,154 INFO L82 PathProgramCache]: Analyzing trace with hash -710176924, now seen corresponding path program 1 times [2019-11-23 22:37:42,154 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:37:42,155 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [502726778] [2019-11-23 22:37:42,155 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:37:42,207 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:37:42,340 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 17 proven. 24 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-23 22:37:42,340 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [502726778] [2019-11-23 22:37:42,340 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [732352432] [2019-11-23 22:37:42,340 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-11-23 22:37:42,492 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:37:42,494 INFO L255 TraceCheckSpWp]: Trace formula consists of 783 conjuncts, 14 conjunts are in the unsatisfiable core [2019-11-23 22:37:42,498 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2019-11-23 22:37:42,572 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 17 proven. 24 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-23 22:37:42,573 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-11-23 22:37:42,573 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 7 [2019-11-23 22:37:42,573 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [856128383] [2019-11-23 22:37:42,574 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-11-23 22:37:42,574 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:37:42,574 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-11-23 22:37:42,574 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-11-23 22:37:42,574 INFO L87 Difference]: Start difference. First operand 2797 states and 3527 transitions. Second operand 7 states. [2019-11-23 22:37:43,780 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:37:43,780 INFO L93 Difference]: Finished difference Result 8201 states and 10547 transitions. [2019-11-23 22:37:43,781 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2019-11-23 22:37:43,781 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 144 [2019-11-23 22:37:43,781 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:37:43,785 INFO L225 Difference]: With dead ends: 8201 [2019-11-23 22:37:43,786 INFO L226 Difference]: Without dead ends: 5611 [2019-11-23 22:37:43,789 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 171 GetRequests, 149 SyntacticMatches, 2 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 86 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=138, Invalid=324, Unknown=0, NotChecked=0, Total=462 [2019-11-23 22:37:43,792 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5611 states. [2019-11-23 22:37:44,274 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5611 to 2797. [2019-11-23 22:37:44,275 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2797 states. [2019-11-23 22:37:44,277 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2797 states to 2797 states and 3502 transitions. [2019-11-23 22:37:44,277 INFO L78 Accepts]: Start accepts. Automaton has 2797 states and 3502 transitions. Word has length 144 [2019-11-23 22:37:44,278 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:37:44,278 INFO L462 AbstractCegarLoop]: Abstraction has 2797 states and 3502 transitions. [2019-11-23 22:37:44,278 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-11-23 22:37:44,278 INFO L276 IsEmpty]: Start isEmpty. Operand 2797 states and 3502 transitions. [2019-11-23 22:37:44,279 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 145 [2019-11-23 22:37:44,279 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:37:44,280 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:37:44,480 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 13 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-11-23 22:37:44,481 INFO L410 AbstractCegarLoop]: === Iteration 46 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:37:44,481 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:37:44,481 INFO L82 PathProgramCache]: Analyzing trace with hash -1523121785, now seen corresponding path program 1 times [2019-11-23 22:37:44,481 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:37:44,482 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [65570726] [2019-11-23 22:37:44,482 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:37:44,533 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-11-23 22:37:44,581 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-11-23 22:37:44,685 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-11-23 22:37:44,685 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-11-23 22:37:44,969 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 23.11 10:37:44 BoogieIcfgContainer [2019-11-23 22:37:44,969 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-11-23 22:37:44,971 INFO L168 Benchmark]: Toolchain (without parser) took 57058.55 ms. Allocated memory was 145.2 MB in the beginning and 1.2 GB in the end (delta: 1.1 GB). Free memory was 102.1 MB in the beginning and 787.6 MB in the end (delta: -685.4 MB). Peak memory consumption was 380.4 MB. Max. memory is 7.1 GB. [2019-11-23 22:37:44,972 INFO L168 Benchmark]: CDTParser took 0.20 ms. Allocated memory is still 145.2 MB. Free memory was 121.6 MB in the beginning and 121.3 MB in the end (delta: 210.0 kB). Peak memory consumption was 210.0 kB. Max. memory is 7.1 GB. [2019-11-23 22:37:44,972 INFO L168 Benchmark]: CACSL2BoogieTranslator took 611.78 ms. Allocated memory was 145.2 MB in the beginning and 202.4 MB in the end (delta: 57.1 MB). Free memory was 101.9 MB in the beginning and 172.9 MB in the end (delta: -71.0 MB). Peak memory consumption was 20.1 MB. Max. memory is 7.1 GB. [2019-11-23 22:37:44,972 INFO L168 Benchmark]: Boogie Procedure Inliner took 88.39 ms. Allocated memory is still 202.4 MB. Free memory was 172.9 MB in the beginning and 167.6 MB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 7.1 GB. [2019-11-23 22:37:44,973 INFO L168 Benchmark]: Boogie Preprocessor took 62.25 ms. Allocated memory is still 202.4 MB. Free memory was 167.6 MB in the beginning and 164.2 MB in the end (delta: 3.4 MB). Peak memory consumption was 3.4 MB. Max. memory is 7.1 GB. [2019-11-23 22:37:44,973 INFO L168 Benchmark]: RCFGBuilder took 1341.77 ms. Allocated memory was 202.4 MB in the beginning and 235.9 MB in the end (delta: 33.6 MB). Free memory was 164.2 MB in the beginning and 194.5 MB in the end (delta: -30.3 MB). Peak memory consumption was 82.1 MB. Max. memory is 7.1 GB. [2019-11-23 22:37:44,973 INFO L168 Benchmark]: TraceAbstraction took 54948.48 ms. Allocated memory was 235.9 MB in the beginning and 1.2 GB in the end (delta: 975.2 MB). Free memory was 194.5 MB in the beginning and 787.6 MB in the end (delta: -593.1 MB). Peak memory consumption was 382.1 MB. Max. memory is 7.1 GB. [2019-11-23 22:37:44,975 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.20 ms. Allocated memory is still 145.2 MB. Free memory was 121.6 MB in the beginning and 121.3 MB in the end (delta: 210.0 kB). Peak memory consumption was 210.0 kB. Max. memory is 7.1 GB. * CACSL2BoogieTranslator took 611.78 ms. Allocated memory was 145.2 MB in the beginning and 202.4 MB in the end (delta: 57.1 MB). Free memory was 101.9 MB in the beginning and 172.9 MB in the end (delta: -71.0 MB). Peak memory consumption was 20.1 MB. Max. memory is 7.1 GB. * Boogie Procedure Inliner took 88.39 ms. Allocated memory is still 202.4 MB. Free memory was 172.9 MB in the beginning and 167.6 MB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 7.1 GB. * Boogie Preprocessor took 62.25 ms. Allocated memory is still 202.4 MB. Free memory was 167.6 MB in the beginning and 164.2 MB in the end (delta: 3.4 MB). Peak memory consumption was 3.4 MB. Max. memory is 7.1 GB. * RCFGBuilder took 1341.77 ms. Allocated memory was 202.4 MB in the beginning and 235.9 MB in the end (delta: 33.6 MB). Free memory was 164.2 MB in the beginning and 194.5 MB in the end (delta: -30.3 MB). Peak memory consumption was 82.1 MB. Max. memory is 7.1 GB. * TraceAbstraction took 54948.48 ms. Allocated memory was 235.9 MB in the beginning and 1.2 GB in the end (delta: 975.2 MB). Free memory was 194.5 MB in the beginning and 787.6 MB in the end (delta: -593.1 MB). Peak memory consumption was 382.1 MB. Max. memory is 7.1 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 661]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L96] _Bool side1Failed ; [L97] _Bool side2Failed ; [L102] static _Bool side1Failed_History_0 ; [L103] static _Bool side1Failed_History_1 ; [L104] static _Bool side1Failed_History_2 ; [L105] static _Bool side2Failed_History_0 ; [L106] static _Bool side2Failed_History_1 ; [L107] static _Bool side2Failed_History_2 ; [L69] msg_t nomsg = (msg_t )-1; [L70] port_t cs1 ; [L71] int8_t cs1_old ; [L72] int8_t cs1_new ; [L73] port_t cs2 ; [L74] int8_t cs2_old ; [L75] int8_t cs2_new ; [L76] port_t s1s2 ; [L77] int8_t s1s2_old ; [L78] int8_t s1s2_new ; [L79] port_t s1s1 ; [L80] int8_t s1s1_old ; [L81] int8_t s1s1_new ; [L82] port_t s2s1 ; [L83] int8_t s2s1_old ; [L84] int8_t s2s1_new ; [L85] port_t s2s2 ; [L86] int8_t s2s2_old ; [L87] int8_t s2s2_new ; [L88] port_t s1p ; [L89] int8_t s1p_old ; [L90] int8_t s1p_new ; [L91] port_t s2p ; [L92] int8_t s2p_old ; [L93] int8_t s2p_new ; [L98] msg_t side1_written ; [L99] msg_t side2_written ; [L108] static int8_t active_side_History_0 ; [L109] static int8_t active_side_History_1 ; [L110] static int8_t active_side_History_2 ; [L111] static msg_t manual_selection_History_0 ; [L112] static msg_t manual_selection_History_1 ; [L113] static msg_t manual_selection_History_2 ; [L463] void (*nodes[4])(void) = { & Console_task_each_pals_period, & Side1_activestandby_task_each_pals_period, & Side2_activestandby_task_each_pals_period, & Pendulum_prism_task_each_pals_period}; VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=0, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L585] int c1 ; [L586] int i2 ; [L589] c1 = 0 [L590] side1Failed = __VERIFIER_nondet_bool() [L591] side2Failed = __VERIFIER_nondet_bool() [L592] side1_written = __VERIFIER_nondet_char() [L593] side2_written = __VERIFIER_nondet_char() [L594] side1Failed_History_0 = __VERIFIER_nondet_bool() [L595] side1Failed_History_1 = __VERIFIER_nondet_bool() [L596] side1Failed_History_2 = __VERIFIER_nondet_bool() [L597] side2Failed_History_0 = __VERIFIER_nondet_bool() [L598] side2Failed_History_1 = __VERIFIER_nondet_bool() [L599] side2Failed_History_2 = __VERIFIER_nondet_bool() [L600] active_side_History_0 = __VERIFIER_nondet_char() [L601] active_side_History_1 = __VERIFIER_nondet_char() [L602] active_side_History_2 = __VERIFIER_nondet_char() [L603] manual_selection_History_0 = __VERIFIER_nondet_char() [L604] manual_selection_History_1 = __VERIFIER_nondet_char() [L605] manual_selection_History_2 = __VERIFIER_nondet_char() [L239] COND FALSE !((int )side1Failed_History_0 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L242] COND FALSE !((int )side2Failed_History_0 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L245] COND FALSE !((int )active_side_History_0 != -2) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L248] COND FALSE !((int )manual_selection_History_0 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L251] COND FALSE !((int )side1Failed_History_1 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L254] COND FALSE !((int )side2Failed_History_1 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L257] COND FALSE !((int )active_side_History_1 != -2) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L260] COND FALSE !((int )manual_selection_History_1 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L263] COND FALSE !((int )side1Failed_History_2 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L266] COND FALSE !((int )side2Failed_History_2 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L269] COND FALSE !((int )active_side_History_2 != -2) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L272] COND FALSE !((int )manual_selection_History_2 != 0) [L275] return (1); VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L606] i2 = init() [L608] cs1_old = nomsg [L609] cs1_new = nomsg [L610] cs2_old = nomsg [L611] cs2_new = nomsg [L612] s1s2_old = nomsg [L613] s1s2_new = nomsg [L614] s1s1_old = nomsg [L615] s1s1_new = nomsg [L616] s2s1_old = nomsg [L617] s2s1_new = nomsg [L618] s2s2_old = nomsg [L619] s2s2_new = nomsg [L620] s1p_old = nomsg [L621] s1p_new = nomsg [L622] s2p_old = nomsg [L623] s2p_new = nomsg [L624] i2 = 0 VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L625] COND TRUE 1 [L293] msg_t manual_selection ; [L294] char tmp ; [L297] tmp = __VERIFIER_nondet_char() [L298] manual_selection = tmp [L209] manual_selection_History_2 = manual_selection_History_1 [L210] manual_selection_History_1 = manual_selection_History_0 [L211] manual_selection_History_0 = val VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L300] EXPR manual_selection != nomsg && cs1_new == nomsg ? manual_selection : cs1_new VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L300] cs1_new = manual_selection != nomsg && cs1_new == nomsg ? manual_selection : cs1_new [L301] EXPR manual_selection != nomsg && cs2_new == nomsg ? manual_selection : cs2_new VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L301] cs2_new = manual_selection != nomsg && cs2_new == nomsg ? manual_selection : cs2_new [L302] manual_selection = (msg_t )0 VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L308] int8_t side1 ; [L309] int8_t side2 ; [L310] msg_t manual_selection ; [L311] int8_t next_state ; [L314] side1 = nomsg [L315] side2 = nomsg [L316] manual_selection = (msg_t )0 [L317] side1Failed = __VERIFIER_nondet_bool() [L119] side1Failed_History_2 = side1Failed_History_1 [L120] side1Failed_History_1 = side1Failed_History_0 [L121] side1Failed_History_0 = val VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L319] COND TRUE \read(side1Failed) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L320] EXPR nomsg != nomsg && s1s1_new == nomsg ? nomsg : s1s1_new VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L320] s1s1_new = nomsg != nomsg && s1s1_new == nomsg ? nomsg : s1s1_new [L321] EXPR nomsg != nomsg && s1s2_new == nomsg ? nomsg : s1s2_new VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L321] s1s2_new = nomsg != nomsg && s1s2_new == nomsg ? nomsg : s1s2_new [L322] EXPR nomsg != nomsg && s1p_new == nomsg ? nomsg : s1p_new VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L322] s1p_new = nomsg != nomsg && s1p_new == nomsg ? nomsg : s1p_new [L323] side1_written = nomsg VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L365] int8_t side1 ; [L366] int8_t side2 ; [L367] msg_t manual_selection ; [L368] int8_t next_state ; [L371] side1 = nomsg [L372] side2 = nomsg [L373] manual_selection = (msg_t )0 [L374] side2Failed = __VERIFIER_nondet_bool() [L149] side2Failed_History_2 = side2Failed_History_1 [L150] side2Failed_History_1 = side2Failed_History_0 [L151] side2Failed_History_0 = val VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L376] COND FALSE !(\read(side2Failed)) [L383] side1 = s1s2_old [L384] s1s2_old = nomsg [L385] side2 = s2s2_old [L386] s2s2_old = nomsg [L387] manual_selection = cs2_old [L388] cs2_old = nomsg VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L389] COND TRUE (int )side1 == (int )side2 [L390] next_state = (int8_t )0 VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L413] EXPR next_state != nomsg && s2s1_new == nomsg ? next_state : s2s1_new VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L413] s2s1_new = next_state != nomsg && s2s1_new == nomsg ? next_state : s2s1_new [L414] EXPR next_state != nomsg && s2s2_new == nomsg ? next_state : s2s2_new VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L414] s2s2_new = next_state != nomsg && s2s2_new == nomsg ? next_state : s2s2_new [L415] EXPR next_state != nomsg && s2p_new == nomsg ? next_state : s2p_new VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L415] s2p_new = next_state != nomsg && s2p_new == nomsg ? next_state : s2p_new [L416] side2_written = next_state VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L422] int8_t active_side ; [L423] int8_t tmp ; [L424] int8_t side1 ; [L425] int8_t side2 ; [L190] COND TRUE (int )index == 0 [L191] return (active_side_History_0); VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L428] tmp = read_active_side_history((unsigned char)0) [L429] active_side = tmp [L430] side1 = nomsg [L431] side2 = nomsg [L432] side1 = s1p_old [L433] s1p_old = nomsg [L434] side2 = s2p_old [L435] s2p_old = nomsg VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L436] COND FALSE !((int )side1 == 1) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L439] COND FALSE !((int )side2 == 1) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L442] COND FALSE !((int )side1 == 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L450] COND TRUE (int )side1 == (int )nomsg VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L451] COND FALSE !((int )side2 == 0) [L454] active_side = (int8_t )0 VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L179] active_side_History_2 = active_side_History_1 [L180] active_side_History_1 = active_side_History_0 [L181] active_side_History_0 = val VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L631] cs1_old = cs1_new [L632] cs1_new = nomsg [L633] cs2_old = cs2_new [L634] cs2_new = nomsg [L635] s1s2_old = s1s2_new [L636] s1s2_new = nomsg [L637] s1s1_old = s1s1_new [L638] s1s1_new = nomsg [L639] s2s1_old = s2s1_new [L640] s2s1_new = nomsg [L641] s2s2_old = s2s2_new [L642] s2s2_new = nomsg [L643] s1p_old = s1p_new [L644] s1p_new = nomsg [L645] s2p_old = s2p_new [L646] s2p_new = nomsg [L466] int tmp ; [L467] msg_t tmp___0 ; [L468] _Bool tmp___1 ; [L469] _Bool tmp___2 ; [L470] _Bool tmp___3 ; [L471] _Bool tmp___4 ; [L472] int8_t tmp___5 ; [L473] _Bool tmp___6 ; [L474] _Bool tmp___7 ; [L475] _Bool tmp___8 ; [L476] int8_t tmp___9 ; [L477] _Bool tmp___10 ; [L478] _Bool tmp___11 ; [L479] _Bool tmp___12 ; [L480] msg_t tmp___13 ; [L481] _Bool tmp___14 ; [L482] _Bool tmp___15 ; [L483] _Bool tmp___16 ; [L484] _Bool tmp___17 ; [L485] int8_t tmp___18 ; [L486] int8_t tmp___19 ; [L487] int8_t tmp___20 ; VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L490] COND FALSE !(! side1Failed) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L493] COND TRUE ! side2Failed [L494] tmp = 1 VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L220] COND FALSE !((int )index == 0) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L223] COND TRUE (int )index == 1 [L224] return (manual_selection_History_1); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L499] tmp___0 = read_manual_selection_history((unsigned char)1) [L500] COND TRUE ! tmp___0 [L130] COND FALSE !((int )index == 0) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L133] COND TRUE (int )index == 1 [L134] return (side1Failed_History_1); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L501] tmp___1 = read_side1_failed_history((unsigned char)1) [L502] COND TRUE ! tmp___1 [L130] COND TRUE (int )index == 0 [L131] return (side1Failed_History_0); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L503] tmp___2 = read_side1_failed_history((unsigned char)0) [L504] COND FALSE !(! tmp___2) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L130] COND FALSE !((int )index == 0) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L133] COND TRUE (int )index == 1 [L134] return (side1Failed_History_1); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L529] tmp___7 = read_side1_failed_history((unsigned char)1) [L530] COND FALSE !(\read(tmp___7)) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L130] COND FALSE !((int )index == 0) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L133] COND TRUE (int )index == 1 [L134] return (side1Failed_History_1); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L545] tmp___11 = read_side1_failed_history((unsigned char)1) [L546] COND TRUE ! tmp___11 [L160] COND FALSE !((int )index == 0) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L163] COND TRUE (int )index == 1 [L164] return (side2Failed_History_1); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L547] tmp___12 = read_side2_failed_history((unsigned char)1) [L548] COND FALSE !(\read(tmp___12)) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L190] COND FALSE !((int )index == 0) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L193] COND FALSE !((int )index == 1) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L196] COND TRUE (int )index == 2 [L197] return (active_side_History_2); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L561] tmp___20 = read_active_side_history((unsigned char)2) [L562] COND FALSE !((int )tmp___20 > -2) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L580] return (1); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L647] c1 = check() [L659] COND FALSE !(! arg) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L625] COND TRUE 1 [L293] msg_t manual_selection ; [L294] char tmp ; [L297] tmp = __VERIFIER_nondet_char() [L298] manual_selection = tmp [L209] manual_selection_History_2 = manual_selection_History_1 [L210] manual_selection_History_1 = manual_selection_History_0 [L211] manual_selection_History_0 = val VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=0, manual_selection_History_1=-128, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L300] EXPR manual_selection != nomsg && cs1_new == nomsg ? manual_selection : cs1_new VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=0, manual_selection_History_1=-128, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L300] cs1_new = manual_selection != nomsg && cs1_new == nomsg ? manual_selection : cs1_new [L301] EXPR manual_selection != nomsg && cs2_new == nomsg ? manual_selection : cs2_new VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=0, manual_selection_History_1=-128, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L301] cs2_new = manual_selection != nomsg && cs2_new == nomsg ? manual_selection : cs2_new [L302] manual_selection = (msg_t )0 VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=-128, cs2=0, cs2_new=0, cs2_old=-128, manual_selection_History_0=0, manual_selection_History_1=-128, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L308] int8_t side1 ; [L309] int8_t side2 ; [L310] msg_t manual_selection ; [L311] int8_t next_state ; [L314] side1 = nomsg [L315] side2 = nomsg [L316] manual_selection = (msg_t )0 [L317] side1Failed = __VERIFIER_nondet_bool() [L119] side1Failed_History_2 = side1Failed_History_1 [L120] side1Failed_History_1 = side1Failed_History_0 [L121] side1Failed_History_0 = val VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=-128, cs2=0, cs2_new=0, cs2_old=-128, manual_selection_History_0=0, manual_selection_History_1=-128, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L319] COND TRUE \read(side1Failed) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=-128, cs2=0, cs2_new=0, cs2_old=-128, manual_selection_History_0=0, manual_selection_History_1=-128, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L320] EXPR nomsg != nomsg && s1s1_new == nomsg ? nomsg : s1s1_new VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=-128, cs2=0, cs2_new=0, cs2_old=-128, manual_selection_History_0=0, manual_selection_History_1=-128, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L320] s1s1_new = nomsg != nomsg && s1s1_new == nomsg ? nomsg : s1s1_new [L321] EXPR nomsg != nomsg && s1s2_new == nomsg ? nomsg : s1s2_new VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=-128, cs2=0, cs2_new=0, cs2_old=-128, manual_selection_History_0=0, manual_selection_History_1=-128, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L321] s1s2_new = nomsg != nomsg && s1s2_new == nomsg ? nomsg : s1s2_new [L322] EXPR nomsg != nomsg && s1p_new == nomsg ? nomsg : s1p_new VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=-128, cs2=0, cs2_new=0, cs2_old=-128, manual_selection_History_0=0, manual_selection_History_1=-128, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L322] s1p_new = nomsg != nomsg && s1p_new == nomsg ? nomsg : s1p_new [L323] side1_written = nomsg VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=-128, cs2=0, cs2_new=0, cs2_old=-128, manual_selection_History_0=0, manual_selection_History_1=-128, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L365] int8_t side1 ; [L366] int8_t side2 ; [L367] msg_t manual_selection ; [L368] int8_t next_state ; [L371] side1 = nomsg [L372] side2 = nomsg [L373] manual_selection = (msg_t )0 [L374] side2Failed = __VERIFIER_nondet_bool() [L149] side2Failed_History_2 = side2Failed_History_1 [L150] side2Failed_History_1 = side2Failed_History_0 [L151] side2Failed_History_0 = val VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=-128, cs2=0, cs2_new=0, cs2_old=-128, manual_selection_History_0=0, manual_selection_History_1=-128, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L376] COND FALSE !(\read(side2Failed)) [L383] side1 = s1s2_old [L384] s1s2_old = nomsg [L385] side2 = s2s2_old [L386] s2s2_old = nomsg [L387] manual_selection = cs2_old [L388] cs2_old = nomsg VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=-128, cs2=0, cs2_new=0, cs2_old=-1, manual_selection_History_0=0, manual_selection_History_1=-128, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L389] COND FALSE !((int )side1 == (int )side2) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=-128, cs2=0, cs2_new=0, cs2_old=-1, manual_selection_History_0=0, manual_selection_History_1=-128, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L392] COND TRUE (int )side1 == (int )nomsg VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=-128, cs2=0, cs2_new=0, cs2_old=-1, manual_selection_History_0=0, manual_selection_History_1=-128, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L393] COND TRUE (int )side2 != (int )nomsg [L394] next_state = (int8_t )0 VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=-128, cs2=0, cs2_new=0, cs2_old=-1, manual_selection_History_0=0, manual_selection_History_1=-128, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L413] EXPR next_state != nomsg && s2s1_new == nomsg ? next_state : s2s1_new VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=-128, cs2=0, cs2_new=0, cs2_old=-1, manual_selection_History_0=0, manual_selection_History_1=-128, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L413] s2s1_new = next_state != nomsg && s2s1_new == nomsg ? next_state : s2s1_new [L414] EXPR next_state != nomsg && s2s2_new == nomsg ? next_state : s2s2_new VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=-128, cs2=0, cs2_new=0, cs2_old=-1, manual_selection_History_0=0, manual_selection_History_1=-128, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L414] s2s2_new = next_state != nomsg && s2s2_new == nomsg ? next_state : s2s2_new [L415] EXPR next_state != nomsg && s2p_new == nomsg ? next_state : s2p_new VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=-128, cs2=0, cs2_new=0, cs2_old=-1, manual_selection_History_0=0, manual_selection_History_1=-128, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L415] s2p_new = next_state != nomsg && s2p_new == nomsg ? next_state : s2p_new [L416] side2_written = next_state VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=-128, cs2=0, cs2_new=0, cs2_old=-1, manual_selection_History_0=0, manual_selection_History_1=-128, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L422] int8_t active_side ; [L423] int8_t tmp ; [L424] int8_t side1 ; [L425] int8_t side2 ; [L190] COND TRUE (int )index == 0 [L191] return (active_side_History_0); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=-128, cs2=0, cs2_new=0, cs2_old=-1, manual_selection_History_0=0, manual_selection_History_1=-128, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L428] tmp = read_active_side_history((unsigned char)0) [L429] active_side = tmp [L430] side1 = nomsg [L431] side2 = nomsg [L432] side1 = s1p_old [L433] s1p_old = nomsg [L434] side2 = s2p_old [L435] s2p_old = nomsg VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=-128, cs2=0, cs2_new=0, cs2_old=-1, manual_selection_History_0=0, manual_selection_History_1=-128, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L436] COND FALSE !((int )side1 == 1) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=-128, cs2=0, cs2_new=0, cs2_old=-1, manual_selection_History_0=0, manual_selection_History_1=-128, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L439] COND FALSE !((int )side2 == 1) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=-128, cs2=0, cs2_new=0, cs2_old=-1, manual_selection_History_0=0, manual_selection_History_1=-128, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L442] COND FALSE !((int )side1 == 0) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=-128, cs2=0, cs2_new=0, cs2_old=-1, manual_selection_History_0=0, manual_selection_History_1=-128, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L450] COND TRUE (int )side1 == (int )nomsg VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=-128, cs2=0, cs2_new=0, cs2_old=-1, manual_selection_History_0=0, manual_selection_History_1=-128, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L451] COND TRUE (int )side2 == 0 [L452] active_side = (int8_t )2 VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=-128, cs2=0, cs2_new=0, cs2_old=-1, manual_selection_History_0=0, manual_selection_History_1=-128, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L179] active_side_History_2 = active_side_History_1 [L180] active_side_History_1 = active_side_History_0 [L181] active_side_History_0 = val VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=-128, cs2=0, cs2_new=0, cs2_old=-1, manual_selection_History_0=0, manual_selection_History_1=-128, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L631] cs1_old = cs1_new [L632] cs1_new = nomsg [L633] cs2_old = cs2_new [L634] cs2_new = nomsg [L635] s1s2_old = s1s2_new [L636] s1s2_new = nomsg [L637] s1s1_old = s1s1_new [L638] s1s1_new = nomsg [L639] s2s1_old = s2s1_new [L640] s2s1_new = nomsg [L641] s2s2_old = s2s2_new [L642] s2s2_new = nomsg [L643] s1p_old = s1p_new [L644] s1p_new = nomsg [L645] s2p_old = s2p_new [L646] s2p_new = nomsg [L466] int tmp ; [L467] msg_t tmp___0 ; [L468] _Bool tmp___1 ; [L469] _Bool tmp___2 ; [L470] _Bool tmp___3 ; [L471] _Bool tmp___4 ; [L472] int8_t tmp___5 ; [L473] _Bool tmp___6 ; [L474] _Bool tmp___7 ; [L475] _Bool tmp___8 ; [L476] int8_t tmp___9 ; [L477] _Bool tmp___10 ; [L478] _Bool tmp___11 ; [L479] _Bool tmp___12 ; [L480] msg_t tmp___13 ; [L481] _Bool tmp___14 ; [L482] _Bool tmp___15 ; [L483] _Bool tmp___16 ; [L484] _Bool tmp___17 ; [L485] int8_t tmp___18 ; [L486] int8_t tmp___19 ; [L487] int8_t tmp___20 ; VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=0, cs2=0, cs2_new=-1, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=-128, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L490] COND FALSE !(! side1Failed) VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=0, cs2=0, cs2_new=-1, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=-128, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L493] COND TRUE ! side2Failed [L494] tmp = 1 VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=0, cs2=0, cs2_new=-1, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=-128, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L220] COND FALSE !((int )index == 0) VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=0, cs2=0, cs2_new=-1, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=-128, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L223] COND TRUE (int )index == 1 [L224] return (manual_selection_History_1); VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=0, cs2=0, cs2_new=-1, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=-128, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L499] tmp___0 = read_manual_selection_history((unsigned char)1) [L500] COND FALSE !(! tmp___0) VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=0, cs2=0, cs2_new=-1, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=-128, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L130] COND FALSE !((int )index == 0) VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=0, cs2=0, cs2_new=-1, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=-128, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L133] COND TRUE (int )index == 1 [L134] return (side1Failed_History_1); VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=0, cs2=0, cs2_new=-1, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=-128, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L529] tmp___7 = read_side1_failed_history((unsigned char)1) [L530] COND TRUE \read(tmp___7) [L160] COND FALSE !((int )index == 0) VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=0, cs2=0, cs2_new=-1, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=-128, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L163] COND TRUE (int )index == 1 [L164] return (side2Failed_History_1); VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=0, cs2=0, cs2_new=-1, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=-128, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L531] tmp___8 = read_side2_failed_history((unsigned char)1) [L532] COND TRUE ! tmp___8 [L190] COND TRUE (int )index == 0 [L191] return (active_side_History_0); VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=0, cs2=0, cs2_new=-1, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=-128, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L533] tmp___5 = read_active_side_history((unsigned char)0) [L534] COND FALSE !(! ((int )tmp___5 == 2)) [L160] COND TRUE (int )index == 0 [L161] return (side2Failed_History_0); VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=0, cs2=0, cs2_new=-1, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=-128, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L537] tmp___6 = read_side2_failed_history((unsigned char)0) [L538] COND TRUE ! tmp___6 VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=0, cs2=0, cs2_new=-1, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=-128, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L539] COND TRUE ! ((int )side2_written == 1) [L540] return (0); VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=0, cs2=0, cs2_new=-1, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=-128, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L647] c1 = check() [L659] COND TRUE ! arg VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=0, cs2=0, cs2_new=-1, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=-128, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L661] __VERIFIER_error() VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=0, cs2=0, cs2_new=-1, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=-128, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] - StatisticsResult: Ultimate Automizer benchmark data CFG has 1 procedures, 292 locations, 23 error locations. Result: UNSAFE, OverallTime: 54.8s, OverallIterations: 46, TraceHistogramMax: 2, AutomataDifference: 34.5s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 20833 SDtfs, 43914 SDslu, 57800 SDs, 0 SdLazy, 11322 SolverSat, 632 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 9.0s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 2332 GetRequests, 1687 SyntacticMatches, 25 SemanticMatches, 620 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14472 ImplicationChecksByTransitivity, 13.5s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=3832occurred in iteration=40, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 6.6s AutomataMinimizationTime, 45 MinimizatonAttempts, 41649 StatesRemovedByMinimization, 40 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.6s SsaConstructionTime, 2.4s SatisfiabilityAnalysisTime, 5.9s InterpolantComputationTime, 6021 NumberOfCodeBlocks, 6021 NumberOfCodeBlocksAsserted, 58 NumberOfCheckSat, 5820 ConstructedInterpolants, 0 QuantifiedInterpolants, 2762353 SizeOfPredicates, 63 NumberOfNonLiveVariables, 9156 ConjunctsInSsa, 219 ConjunctsInUnsatCore, 57 InterpolantComputations, 39 PerfectInterpolantSequences, 918/1149 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...