/usr/bin/java -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata ./data -tc ../../../trunk/examples/toolchains/AutomizerCInline.xml -s ../../../trunk/examples/settings/default/automizer/svcomp-Reach-32bit-Automizer_Default.epf -i ../../../trunk/examples/svcomp/systemc/toy1.cil.c -------------------------------------------------------------------------------- This is Ultimate 0.1.24-6598664 [2019-11-23 22:49:34,041 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-11-23 22:49:34,043 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-11-23 22:49:34,055 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-11-23 22:49:34,056 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-11-23 22:49:34,057 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-11-23 22:49:34,058 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-11-23 22:49:34,060 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-11-23 22:49:34,061 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-11-23 22:49:34,062 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-11-23 22:49:34,063 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-11-23 22:49:34,064 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-11-23 22:49:34,065 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-11-23 22:49:34,065 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-11-23 22:49:34,066 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-11-23 22:49:34,067 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-11-23 22:49:34,068 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-11-23 22:49:34,069 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-11-23 22:49:34,071 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-11-23 22:49:34,073 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-11-23 22:49:34,074 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-11-23 22:49:34,075 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-11-23 22:49:34,076 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-11-23 22:49:34,077 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-11-23 22:49:34,079 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-11-23 22:49:34,079 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-11-23 22:49:34,080 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-11-23 22:49:34,081 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-11-23 22:49:34,081 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-11-23 22:49:34,082 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-11-23 22:49:34,082 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-11-23 22:49:34,083 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-11-23 22:49:34,084 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-11-23 22:49:34,085 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-11-23 22:49:34,086 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-11-23 22:49:34,086 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-11-23 22:49:34,087 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-11-23 22:49:34,087 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-11-23 22:49:34,087 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-11-23 22:49:34,088 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-11-23 22:49:34,089 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-11-23 22:49:34,089 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/default/automizer/svcomp-Reach-32bit-Automizer_Default.epf [2019-11-23 22:49:34,103 INFO L113 SettingsManager]: Loading preferences was successful [2019-11-23 22:49:34,103 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-11-23 22:49:34,104 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-11-23 22:49:34,105 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-11-23 22:49:34,105 INFO L138 SettingsManager]: * Use SBE=true [2019-11-23 22:49:34,105 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-11-23 22:49:34,105 INFO L138 SettingsManager]: * sizeof long=4 [2019-11-23 22:49:34,105 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-11-23 22:49:34,106 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-11-23 22:49:34,106 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-11-23 22:49:34,106 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-11-23 22:49:34,106 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-11-23 22:49:34,106 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-11-23 22:49:34,107 INFO L138 SettingsManager]: * Adapt memory model on pointer casts if necessary=true [2019-11-23 22:49:34,107 INFO L138 SettingsManager]: * sizeof long double=12 [2019-11-23 22:49:34,107 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-11-23 22:49:34,107 INFO L138 SettingsManager]: * Use constant arrays=true [2019-11-23 22:49:34,107 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-11-23 22:49:34,108 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-11-23 22:49:34,108 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-11-23 22:49:34,108 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-11-23 22:49:34,108 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-11-23 22:49:34,108 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-11-23 22:49:34,109 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-11-23 22:49:34,109 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-11-23 22:49:34,109 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-11-23 22:49:34,109 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-11-23 22:49:34,109 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-11-23 22:49:34,110 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-11-23 22:49:34,110 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2019-11-23 22:49:34,405 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-11-23 22:49:34,419 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-11-23 22:49:34,422 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-11-23 22:49:34,423 INFO L271 PluginConnector]: Initializing CDTParser... [2019-11-23 22:49:34,424 INFO L275 PluginConnector]: CDTParser initialized [2019-11-23 22:49:34,425 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/systemc/toy1.cil.c [2019-11-23 22:49:34,504 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/63dea6e13/c2b59944126948d8b76143368a581650/FLAG45ad81823 [2019-11-23 22:49:35,057 INFO L306 CDTParser]: Found 1 translation units. [2019-11-23 22:49:35,058 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/systemc/toy1.cil.c [2019-11-23 22:49:35,081 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/63dea6e13/c2b59944126948d8b76143368a581650/FLAG45ad81823 [2019-11-23 22:49:35,418 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/63dea6e13/c2b59944126948d8b76143368a581650 [2019-11-23 22:49:35,432 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-11-23 22:49:35,435 INFO L131 ToolchainWalker]: Walking toolchain with 5 elements. [2019-11-23 22:49:35,438 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-11-23 22:49:35,439 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-11-23 22:49:35,442 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-11-23 22:49:35,444 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 23.11 10:49:35" (1/1) ... [2019-11-23 22:49:35,446 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@2a1bdec8 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:49:35, skipping insertion in model container [2019-11-23 22:49:35,447 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 23.11 10:49:35" (1/1) ... [2019-11-23 22:49:35,455 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-11-23 22:49:35,507 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-11-23 22:49:35,765 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-11-23 22:49:35,771 INFO L203 MainTranslator]: Completed pre-run [2019-11-23 22:49:35,911 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-11-23 22:49:35,931 INFO L208 MainTranslator]: Completed translation [2019-11-23 22:49:35,932 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:49:35 WrapperNode [2019-11-23 22:49:35,932 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-11-23 22:49:35,932 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-11-23 22:49:35,933 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-11-23 22:49:35,933 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-11-23 22:49:35,939 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:49:35" (1/1) ... [2019-11-23 22:49:35,947 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:49:35" (1/1) ... [2019-11-23 22:49:35,978 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-11-23 22:49:35,979 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-11-23 22:49:35,979 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-11-23 22:49:35,979 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-11-23 22:49:35,988 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:49:35" (1/1) ... [2019-11-23 22:49:35,988 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:49:35" (1/1) ... [2019-11-23 22:49:35,991 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:49:35" (1/1) ... [2019-11-23 22:49:35,992 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:49:35" (1/1) ... [2019-11-23 22:49:36,008 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:49:35" (1/1) ... [2019-11-23 22:49:36,032 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:49:35" (1/1) ... [2019-11-23 22:49:36,035 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:49:35" (1/1) ... [2019-11-23 22:49:36,039 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-11-23 22:49:36,046 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-11-23 22:49:36,046 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-11-23 22:49:36,046 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-11-23 22:49:36,047 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:49:35" (1/1) ... No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-11-23 22:49:36,104 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-11-23 22:49:36,104 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-11-23 22:49:36,796 INFO L279 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-11-23 22:49:36,796 INFO L284 CfgBuilder]: Removed 28 assume(true) statements. [2019-11-23 22:49:36,798 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 23.11 10:49:36 BoogieIcfgContainer [2019-11-23 22:49:36,798 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-11-23 22:49:36,799 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-11-23 22:49:36,799 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-11-23 22:49:36,803 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-11-23 22:49:36,803 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 23.11 10:49:35" (1/3) ... [2019-11-23 22:49:36,804 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@7f98248c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 23.11 10:49:36, skipping insertion in model container [2019-11-23 22:49:36,804 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:49:35" (2/3) ... [2019-11-23 22:49:36,804 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@7f98248c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 23.11 10:49:36, skipping insertion in model container [2019-11-23 22:49:36,805 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 23.11 10:49:36" (3/3) ... [2019-11-23 22:49:36,807 INFO L109 eAbstractionObserver]: Analyzing ICFG toy1.cil.c [2019-11-23 22:49:36,816 INFO L153 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-11-23 22:49:36,823 INFO L165 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-11-23 22:49:36,835 INFO L249 AbstractCegarLoop]: Starting to check reachability of 2 error locations. [2019-11-23 22:49:36,867 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-11-23 22:49:36,868 INFO L374 AbstractCegarLoop]: Hoare is true [2019-11-23 22:49:36,868 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-11-23 22:49:36,868 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-11-23 22:49:36,868 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-11-23 22:49:36,869 INFO L378 AbstractCegarLoop]: Difference is false [2019-11-23 22:49:36,869 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-11-23 22:49:36,869 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-11-23 22:49:36,887 INFO L276 IsEmpty]: Start isEmpty. Operand 129 states. [2019-11-23 22:49:36,894 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2019-11-23 22:49:36,894 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:49:36,896 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:49:36,896 INFO L410 AbstractCegarLoop]: === Iteration 1 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:49:36,902 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:49:36,902 INFO L82 PathProgramCache]: Analyzing trace with hash -895778166, now seen corresponding path program 1 times [2019-11-23 22:49:36,912 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:49:36,912 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1124820688] [2019-11-23 22:49:36,913 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:49:37,006 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:49:37,099 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-23 22:49:37,100 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1124820688] [2019-11-23 22:49:37,101 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-23 22:49:37,102 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-23 22:49:37,103 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1438130744] [2019-11-23 22:49:37,110 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-23 22:49:37,111 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:49:37,124 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-23 22:49:37,125 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:49:37,126 INFO L87 Difference]: Start difference. First operand 129 states. Second operand 3 states. [2019-11-23 22:49:37,171 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:49:37,172 INFO L93 Difference]: Finished difference Result 250 states and 461 transitions. [2019-11-23 22:49:37,172 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-23 22:49:37,173 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 36 [2019-11-23 22:49:37,174 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:49:37,184 INFO L225 Difference]: With dead ends: 250 [2019-11-23 22:49:37,185 INFO L226 Difference]: Without dead ends: 125 [2019-11-23 22:49:37,188 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:49:37,205 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 125 states. [2019-11-23 22:49:37,229 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 125 to 125. [2019-11-23 22:49:37,230 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 125 states. [2019-11-23 22:49:37,233 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 125 states to 125 states and 218 transitions. [2019-11-23 22:49:37,234 INFO L78 Accepts]: Start accepts. Automaton has 125 states and 218 transitions. Word has length 36 [2019-11-23 22:49:37,235 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:49:37,235 INFO L462 AbstractCegarLoop]: Abstraction has 125 states and 218 transitions. [2019-11-23 22:49:37,235 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-23 22:49:37,235 INFO L276 IsEmpty]: Start isEmpty. Operand 125 states and 218 transitions. [2019-11-23 22:49:37,237 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2019-11-23 22:49:37,237 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:49:37,238 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:49:37,238 INFO L410 AbstractCegarLoop]: === Iteration 2 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:49:37,238 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:49:37,239 INFO L82 PathProgramCache]: Analyzing trace with hash -1597378040, now seen corresponding path program 1 times [2019-11-23 22:49:37,239 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:49:37,239 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2024281654] [2019-11-23 22:49:37,239 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:49:37,259 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:49:37,304 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-23 22:49:37,305 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2024281654] [2019-11-23 22:49:37,306 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-23 22:49:37,306 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-23 22:49:37,306 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1911034367] [2019-11-23 22:49:37,308 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-23 22:49:37,308 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:49:37,309 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-23 22:49:37,309 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:49:37,309 INFO L87 Difference]: Start difference. First operand 125 states and 218 transitions. Second operand 3 states. [2019-11-23 22:49:37,337 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:49:37,337 INFO L93 Difference]: Finished difference Result 240 states and 420 transitions. [2019-11-23 22:49:37,338 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-23 22:49:37,338 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 36 [2019-11-23 22:49:37,338 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:49:37,340 INFO L225 Difference]: With dead ends: 240 [2019-11-23 22:49:37,340 INFO L226 Difference]: Without dead ends: 125 [2019-11-23 22:49:37,342 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:49:37,342 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 125 states. [2019-11-23 22:49:37,360 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 125 to 125. [2019-11-23 22:49:37,360 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 125 states. [2019-11-23 22:49:37,362 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 125 states to 125 states and 217 transitions. [2019-11-23 22:49:37,362 INFO L78 Accepts]: Start accepts. Automaton has 125 states and 217 transitions. Word has length 36 [2019-11-23 22:49:37,362 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:49:37,362 INFO L462 AbstractCegarLoop]: Abstraction has 125 states and 217 transitions. [2019-11-23 22:49:37,363 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-23 22:49:37,363 INFO L276 IsEmpty]: Start isEmpty. Operand 125 states and 217 transitions. [2019-11-23 22:49:37,364 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2019-11-23 22:49:37,364 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:49:37,365 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:49:37,365 INFO L410 AbstractCegarLoop]: === Iteration 3 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:49:37,365 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:49:37,366 INFO L82 PathProgramCache]: Analyzing trace with hash -211174646, now seen corresponding path program 1 times [2019-11-23 22:49:37,366 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:49:37,366 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [406329260] [2019-11-23 22:49:37,366 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:49:37,400 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:49:37,488 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-23 22:49:37,488 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [406329260] [2019-11-23 22:49:37,489 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-23 22:49:37,489 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-23 22:49:37,489 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [287534222] [2019-11-23 22:49:37,490 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-23 22:49:37,490 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:49:37,490 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-23 22:49:37,491 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:49:37,492 INFO L87 Difference]: Start difference. First operand 125 states and 217 transitions. Second operand 3 states. [2019-11-23 22:49:37,638 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:49:37,638 INFO L93 Difference]: Finished difference Result 328 states and 568 transitions. [2019-11-23 22:49:37,639 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-23 22:49:37,639 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 36 [2019-11-23 22:49:37,639 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:49:37,641 INFO L225 Difference]: With dead ends: 328 [2019-11-23 22:49:37,641 INFO L226 Difference]: Without dead ends: 214 [2019-11-23 22:49:37,643 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:49:37,644 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 214 states. [2019-11-23 22:49:37,662 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 214 to 200. [2019-11-23 22:49:37,663 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 200 states. [2019-11-23 22:49:37,664 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 200 states to 200 states and 335 transitions. [2019-11-23 22:49:37,664 INFO L78 Accepts]: Start accepts. Automaton has 200 states and 335 transitions. Word has length 36 [2019-11-23 22:49:37,665 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:49:37,665 INFO L462 AbstractCegarLoop]: Abstraction has 200 states and 335 transitions. [2019-11-23 22:49:37,665 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-23 22:49:37,665 INFO L276 IsEmpty]: Start isEmpty. Operand 200 states and 335 transitions. [2019-11-23 22:49:37,667 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2019-11-23 22:49:37,667 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:49:37,667 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:49:37,667 INFO L410 AbstractCegarLoop]: === Iteration 4 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:49:37,668 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:49:37,668 INFO L82 PathProgramCache]: Analyzing trace with hash 1832431686, now seen corresponding path program 1 times [2019-11-23 22:49:37,668 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:49:37,668 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1123384217] [2019-11-23 22:49:37,669 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:49:37,686 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:49:37,726 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-23 22:49:37,726 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1123384217] [2019-11-23 22:49:37,726 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-23 22:49:37,727 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-23 22:49:37,727 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1828132906] [2019-11-23 22:49:37,727 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-23 22:49:37,728 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:49:37,728 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-23 22:49:37,728 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-23 22:49:37,728 INFO L87 Difference]: Start difference. First operand 200 states and 335 transitions. Second operand 4 states. [2019-11-23 22:49:37,867 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:49:37,867 INFO L93 Difference]: Finished difference Result 542 states and 911 transitions. [2019-11-23 22:49:37,869 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-23 22:49:37,869 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 36 [2019-11-23 22:49:37,869 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:49:37,872 INFO L225 Difference]: With dead ends: 542 [2019-11-23 22:49:37,873 INFO L226 Difference]: Without dead ends: 354 [2019-11-23 22:49:37,876 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-23 22:49:37,877 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 354 states. [2019-11-23 22:49:37,916 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 354 to 344. [2019-11-23 22:49:37,917 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 344 states. [2019-11-23 22:49:37,919 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 344 states to 344 states and 577 transitions. [2019-11-23 22:49:37,919 INFO L78 Accepts]: Start accepts. Automaton has 344 states and 577 transitions. Word has length 36 [2019-11-23 22:49:37,919 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:49:37,919 INFO L462 AbstractCegarLoop]: Abstraction has 344 states and 577 transitions. [2019-11-23 22:49:37,919 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-23 22:49:37,919 INFO L276 IsEmpty]: Start isEmpty. Operand 344 states and 577 transitions. [2019-11-23 22:49:37,922 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2019-11-23 22:49:37,922 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:49:37,922 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:49:37,922 INFO L410 AbstractCegarLoop]: === Iteration 5 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:49:37,923 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:49:37,923 INFO L82 PathProgramCache]: Analyzing trace with hash -539307576, now seen corresponding path program 1 times [2019-11-23 22:49:37,923 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:49:37,923 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [990227992] [2019-11-23 22:49:37,924 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:49:37,934 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:49:37,967 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-23 22:49:37,967 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [990227992] [2019-11-23 22:49:37,968 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-23 22:49:37,969 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-23 22:49:37,969 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [925152000] [2019-11-23 22:49:37,969 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-23 22:49:37,970 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:49:37,970 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-23 22:49:37,971 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-23 22:49:37,971 INFO L87 Difference]: Start difference. First operand 344 states and 577 transitions. Second operand 4 states. [2019-11-23 22:49:38,093 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:49:38,093 INFO L93 Difference]: Finished difference Result 967 states and 1626 transitions. [2019-11-23 22:49:38,094 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-23 22:49:38,094 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 36 [2019-11-23 22:49:38,094 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:49:38,099 INFO L225 Difference]: With dead ends: 967 [2019-11-23 22:49:38,099 INFO L226 Difference]: Without dead ends: 636 [2019-11-23 22:49:38,104 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-23 22:49:38,106 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 636 states. [2019-11-23 22:49:38,146 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 636 to 626. [2019-11-23 22:49:38,147 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 626 states. [2019-11-23 22:49:38,149 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 626 states to 626 states and 1047 transitions. [2019-11-23 22:49:38,150 INFO L78 Accepts]: Start accepts. Automaton has 626 states and 1047 transitions. Word has length 36 [2019-11-23 22:49:38,150 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:49:38,150 INFO L462 AbstractCegarLoop]: Abstraction has 626 states and 1047 transitions. [2019-11-23 22:49:38,150 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-23 22:49:38,150 INFO L276 IsEmpty]: Start isEmpty. Operand 626 states and 1047 transitions. [2019-11-23 22:49:38,158 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2019-11-23 22:49:38,158 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:49:38,159 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:49:38,159 INFO L410 AbstractCegarLoop]: === Iteration 6 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:49:38,159 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:49:38,160 INFO L82 PathProgramCache]: Analyzing trace with hash -477267962, now seen corresponding path program 1 times [2019-11-23 22:49:38,160 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:49:38,160 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [931745367] [2019-11-23 22:49:38,160 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:49:38,192 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:49:38,243 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-23 22:49:38,244 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [931745367] [2019-11-23 22:49:38,244 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-23 22:49:38,245 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-23 22:49:38,245 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [601749514] [2019-11-23 22:49:38,245 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-23 22:49:38,246 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:49:38,247 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-23 22:49:38,247 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-23 22:49:38,247 INFO L87 Difference]: Start difference. First operand 626 states and 1047 transitions. Second operand 4 states. [2019-11-23 22:49:38,392 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:49:38,392 INFO L93 Difference]: Finished difference Result 1903 states and 3163 transitions. [2019-11-23 22:49:38,392 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-23 22:49:38,393 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 36 [2019-11-23 22:49:38,393 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:49:38,401 INFO L225 Difference]: With dead ends: 1903 [2019-11-23 22:49:38,401 INFO L226 Difference]: Without dead ends: 1291 [2019-11-23 22:49:38,403 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-23 22:49:38,405 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1291 states. [2019-11-23 22:49:38,470 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1291 to 1281. [2019-11-23 22:49:38,470 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1281 states. [2019-11-23 22:49:38,476 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1281 states to 1281 states and 2107 transitions. [2019-11-23 22:49:38,476 INFO L78 Accepts]: Start accepts. Automaton has 1281 states and 2107 transitions. Word has length 36 [2019-11-23 22:49:38,478 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:49:38,479 INFO L462 AbstractCegarLoop]: Abstraction has 1281 states and 2107 transitions. [2019-11-23 22:49:38,479 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-23 22:49:38,479 INFO L276 IsEmpty]: Start isEmpty. Operand 1281 states and 2107 transitions. [2019-11-23 22:49:38,484 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2019-11-23 22:49:38,484 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:49:38,484 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:49:38,484 INFO L410 AbstractCegarLoop]: === Iteration 7 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:49:38,485 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:49:38,485 INFO L82 PathProgramCache]: Analyzing trace with hash -336719352, now seen corresponding path program 1 times [2019-11-23 22:49:38,485 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:49:38,486 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [324318479] [2019-11-23 22:49:38,486 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:49:38,513 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:49:38,597 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-23 22:49:38,597 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [324318479] [2019-11-23 22:49:38,597 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-23 22:49:38,598 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-23 22:49:38,598 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1721096028] [2019-11-23 22:49:38,598 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-23 22:49:38,598 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:49:38,600 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-23 22:49:38,601 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:49:38,601 INFO L87 Difference]: Start difference. First operand 1281 states and 2107 transitions. Second operand 3 states. [2019-11-23 22:49:38,712 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:49:38,712 INFO L93 Difference]: Finished difference Result 2615 states and 4310 transitions. [2019-11-23 22:49:38,713 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-23 22:49:38,713 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 36 [2019-11-23 22:49:38,713 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:49:38,720 INFO L225 Difference]: With dead ends: 2615 [2019-11-23 22:49:38,720 INFO L226 Difference]: Without dead ends: 1391 [2019-11-23 22:49:38,723 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:49:38,725 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1391 states. [2019-11-23 22:49:38,778 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1391 to 1382. [2019-11-23 22:49:38,778 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1382 states. [2019-11-23 22:49:38,783 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1382 states to 1382 states and 2266 transitions. [2019-11-23 22:49:38,784 INFO L78 Accepts]: Start accepts. Automaton has 1382 states and 2266 transitions. Word has length 36 [2019-11-23 22:49:38,784 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:49:38,785 INFO L462 AbstractCegarLoop]: Abstraction has 1382 states and 2266 transitions. [2019-11-23 22:49:38,785 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-23 22:49:38,785 INFO L276 IsEmpty]: Start isEmpty. Operand 1382 states and 2266 transitions. [2019-11-23 22:49:38,787 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2019-11-23 22:49:38,787 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:49:38,788 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:49:38,788 INFO L410 AbstractCegarLoop]: === Iteration 8 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:49:38,788 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:49:38,788 INFO L82 PathProgramCache]: Analyzing trace with hash 952985988, now seen corresponding path program 1 times [2019-11-23 22:49:38,789 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:49:38,790 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1453819265] [2019-11-23 22:49:38,790 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:49:38,809 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:49:38,847 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-23 22:49:38,847 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1453819265] [2019-11-23 22:49:38,847 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-23 22:49:38,848 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-23 22:49:38,848 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1387295529] [2019-11-23 22:49:38,848 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-23 22:49:38,849 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:49:38,849 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-23 22:49:38,849 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-23 22:49:38,849 INFO L87 Difference]: Start difference. First operand 1382 states and 2266 transitions. Second operand 4 states. [2019-11-23 22:49:38,984 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:49:38,984 INFO L93 Difference]: Finished difference Result 2900 states and 4764 transitions. [2019-11-23 22:49:38,985 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-11-23 22:49:38,985 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 36 [2019-11-23 22:49:38,986 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:49:38,994 INFO L225 Difference]: With dead ends: 2900 [2019-11-23 22:49:38,994 INFO L226 Difference]: Without dead ends: 1552 [2019-11-23 22:49:38,997 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-23 22:49:38,999 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1552 states. [2019-11-23 22:49:39,066 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1552 to 1539. [2019-11-23 22:49:39,066 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1539 states. [2019-11-23 22:49:39,072 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1539 states to 1539 states and 2488 transitions. [2019-11-23 22:49:39,072 INFO L78 Accepts]: Start accepts. Automaton has 1539 states and 2488 transitions. Word has length 36 [2019-11-23 22:49:39,072 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:49:39,072 INFO L462 AbstractCegarLoop]: Abstraction has 1539 states and 2488 transitions. [2019-11-23 22:49:39,073 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-23 22:49:39,073 INFO L276 IsEmpty]: Start isEmpty. Operand 1539 states and 2488 transitions. [2019-11-23 22:49:39,074 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2019-11-23 22:49:39,074 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:49:39,074 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:49:39,074 INFO L410 AbstractCegarLoop]: === Iteration 9 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:49:39,074 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:49:39,075 INFO L82 PathProgramCache]: Analyzing trace with hash -635361914, now seen corresponding path program 1 times [2019-11-23 22:49:39,075 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:49:39,076 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1110295681] [2019-11-23 22:49:39,076 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:49:39,086 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:49:39,110 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-23 22:49:39,111 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1110295681] [2019-11-23 22:49:39,111 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-23 22:49:39,111 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-23 22:49:39,111 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [739119785] [2019-11-23 22:49:39,112 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-23 22:49:39,112 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:49:39,113 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-23 22:49:39,114 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-23 22:49:39,114 INFO L87 Difference]: Start difference. First operand 1539 states and 2488 transitions. Second operand 4 states. [2019-11-23 22:49:39,292 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:49:39,292 INFO L93 Difference]: Finished difference Result 3378 states and 5467 transitions. [2019-11-23 22:49:39,293 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-11-23 22:49:39,293 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 36 [2019-11-23 22:49:39,294 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:49:39,303 INFO L225 Difference]: With dead ends: 3378 [2019-11-23 22:49:39,303 INFO L226 Difference]: Without dead ends: 1885 [2019-11-23 22:49:39,306 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-23 22:49:39,308 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1885 states. [2019-11-23 22:49:39,388 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1885 to 1859. [2019-11-23 22:49:39,389 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1859 states. [2019-11-23 22:49:39,396 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1859 states to 1859 states and 2968 transitions. [2019-11-23 22:49:39,396 INFO L78 Accepts]: Start accepts. Automaton has 1859 states and 2968 transitions. Word has length 36 [2019-11-23 22:49:39,397 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:49:39,397 INFO L462 AbstractCegarLoop]: Abstraction has 1859 states and 2968 transitions. [2019-11-23 22:49:39,397 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-23 22:49:39,397 INFO L276 IsEmpty]: Start isEmpty. Operand 1859 states and 2968 transitions. [2019-11-23 22:49:39,398 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2019-11-23 22:49:39,398 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:49:39,398 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:49:39,398 INFO L410 AbstractCegarLoop]: === Iteration 10 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:49:39,399 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:49:39,399 INFO L82 PathProgramCache]: Analyzing trace with hash -1915225592, now seen corresponding path program 1 times [2019-11-23 22:49:39,399 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:49:39,399 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [809977161] [2019-11-23 22:49:39,399 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:49:39,424 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:49:39,455 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-23 22:49:39,455 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [809977161] [2019-11-23 22:49:39,456 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-23 22:49:39,456 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-23 22:49:39,457 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1817550118] [2019-11-23 22:49:39,457 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-23 22:49:39,457 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:49:39,458 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-23 22:49:39,458 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:49:39,458 INFO L87 Difference]: Start difference. First operand 1859 states and 2968 transitions. Second operand 3 states. [2019-11-23 22:49:39,571 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:49:39,571 INFO L93 Difference]: Finished difference Result 3335 states and 5328 transitions. [2019-11-23 22:49:39,571 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-23 22:49:39,572 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 36 [2019-11-23 22:49:39,573 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:49:39,582 INFO L225 Difference]: With dead ends: 3335 [2019-11-23 22:49:39,582 INFO L226 Difference]: Without dead ends: 1504 [2019-11-23 22:49:39,585 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:49:39,588 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1504 states. [2019-11-23 22:49:39,658 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1504 to 1493. [2019-11-23 22:49:39,659 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1493 states. [2019-11-23 22:49:39,664 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1493 states to 1493 states and 2352 transitions. [2019-11-23 22:49:39,666 INFO L78 Accepts]: Start accepts. Automaton has 1493 states and 2352 transitions. Word has length 36 [2019-11-23 22:49:39,674 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:49:39,675 INFO L462 AbstractCegarLoop]: Abstraction has 1493 states and 2352 transitions. [2019-11-23 22:49:39,675 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-23 22:49:39,675 INFO L276 IsEmpty]: Start isEmpty. Operand 1493 states and 2352 transitions. [2019-11-23 22:49:39,678 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2019-11-23 22:49:39,678 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:49:39,678 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:49:39,679 INFO L410 AbstractCegarLoop]: === Iteration 11 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:49:39,679 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:49:39,679 INFO L82 PathProgramCache]: Analyzing trace with hash -547155332, now seen corresponding path program 1 times [2019-11-23 22:49:39,679 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:49:39,680 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [451024575] [2019-11-23 22:49:39,680 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:49:39,692 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:49:39,716 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-23 22:49:39,717 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [451024575] [2019-11-23 22:49:39,717 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-23 22:49:39,717 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-23 22:49:39,717 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [691078735] [2019-11-23 22:49:39,718 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-23 22:49:39,718 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:49:39,718 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-23 22:49:39,718 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:49:39,718 INFO L87 Difference]: Start difference. First operand 1493 states and 2352 transitions. Second operand 3 states. [2019-11-23 22:49:39,849 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:49:39,850 INFO L93 Difference]: Finished difference Result 3728 states and 5928 transitions. [2019-11-23 22:49:39,850 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-23 22:49:39,850 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 46 [2019-11-23 22:49:39,851 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:49:39,867 INFO L225 Difference]: With dead ends: 3728 [2019-11-23 22:49:39,867 INFO L226 Difference]: Without dead ends: 2289 [2019-11-23 22:49:39,871 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:49:39,879 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2289 states. [2019-11-23 22:49:40,013 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2289 to 2285. [2019-11-23 22:49:40,014 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2285 states. [2019-11-23 22:49:40,022 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2285 states to 2285 states and 3596 transitions. [2019-11-23 22:49:40,022 INFO L78 Accepts]: Start accepts. Automaton has 2285 states and 3596 transitions. Word has length 46 [2019-11-23 22:49:40,022 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:49:40,023 INFO L462 AbstractCegarLoop]: Abstraction has 2285 states and 3596 transitions. [2019-11-23 22:49:40,023 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-23 22:49:40,023 INFO L276 IsEmpty]: Start isEmpty. Operand 2285 states and 3596 transitions. [2019-11-23 22:49:40,025 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2019-11-23 22:49:40,025 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:49:40,026 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:49:40,026 INFO L410 AbstractCegarLoop]: === Iteration 12 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:49:40,027 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:49:40,027 INFO L82 PathProgramCache]: Analyzing trace with hash -299008838, now seen corresponding path program 1 times [2019-11-23 22:49:40,027 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:49:40,028 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [488909561] [2019-11-23 22:49:40,028 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:49:40,035 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:49:40,052 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2019-11-23 22:49:40,053 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [488909561] [2019-11-23 22:49:40,053 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-23 22:49:40,053 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-23 22:49:40,053 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1973190954] [2019-11-23 22:49:40,054 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-23 22:49:40,054 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:49:40,054 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-23 22:49:40,054 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:49:40,055 INFO L87 Difference]: Start difference. First operand 2285 states and 3596 transitions. Second operand 3 states. [2019-11-23 22:49:40,153 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:49:40,153 INFO L93 Difference]: Finished difference Result 4472 states and 7066 transitions. [2019-11-23 22:49:40,153 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-23 22:49:40,154 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 46 [2019-11-23 22:49:40,154 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:49:40,166 INFO L225 Difference]: With dead ends: 4472 [2019-11-23 22:49:40,167 INFO L226 Difference]: Without dead ends: 2241 [2019-11-23 22:49:40,170 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:49:40,173 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2241 states. [2019-11-23 22:49:40,268 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2241 to 2241. [2019-11-23 22:49:40,269 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2241 states. [2019-11-23 22:49:40,277 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2241 states to 2241 states and 3539 transitions. [2019-11-23 22:49:40,277 INFO L78 Accepts]: Start accepts. Automaton has 2241 states and 3539 transitions. Word has length 46 [2019-11-23 22:49:40,277 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:49:40,277 INFO L462 AbstractCegarLoop]: Abstraction has 2241 states and 3539 transitions. [2019-11-23 22:49:40,277 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-23 22:49:40,278 INFO L276 IsEmpty]: Start isEmpty. Operand 2241 states and 3539 transitions. [2019-11-23 22:49:40,280 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2019-11-23 22:49:40,280 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:49:40,280 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:49:40,280 INFO L410 AbstractCegarLoop]: === Iteration 13 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:49:40,280 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:49:40,280 INFO L82 PathProgramCache]: Analyzing trace with hash -336670593, now seen corresponding path program 1 times [2019-11-23 22:49:40,281 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:49:40,281 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1661685686] [2019-11-23 22:49:40,281 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:49:40,292 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:49:40,324 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-23 22:49:40,325 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1661685686] [2019-11-23 22:49:40,325 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-23 22:49:40,325 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-23 22:49:40,325 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [243852377] [2019-11-23 22:49:40,326 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-23 22:49:40,326 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:49:40,326 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-23 22:49:40,326 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:49:40,327 INFO L87 Difference]: Start difference. First operand 2241 states and 3539 transitions. Second operand 3 states. [2019-11-23 22:49:40,536 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:49:40,537 INFO L93 Difference]: Finished difference Result 5761 states and 9163 transitions. [2019-11-23 22:49:40,537 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-23 22:49:40,537 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 47 [2019-11-23 22:49:40,538 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:49:40,557 INFO L225 Difference]: With dead ends: 5761 [2019-11-23 22:49:40,557 INFO L226 Difference]: Without dead ends: 3574 [2019-11-23 22:49:40,590 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:49:40,594 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3574 states. [2019-11-23 22:49:40,741 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3574 to 3570. [2019-11-23 22:49:40,741 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3570 states. [2019-11-23 22:49:40,755 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3570 states to 3570 states and 5623 transitions. [2019-11-23 22:49:40,756 INFO L78 Accepts]: Start accepts. Automaton has 3570 states and 5623 transitions. Word has length 47 [2019-11-23 22:49:40,756 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:49:40,756 INFO L462 AbstractCegarLoop]: Abstraction has 3570 states and 5623 transitions. [2019-11-23 22:49:40,756 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-23 22:49:40,756 INFO L276 IsEmpty]: Start isEmpty. Operand 3570 states and 5623 transitions. [2019-11-23 22:49:40,759 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2019-11-23 22:49:40,759 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:49:40,759 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:49:40,760 INFO L410 AbstractCegarLoop]: === Iteration 14 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:49:40,760 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:49:40,760 INFO L82 PathProgramCache]: Analyzing trace with hash 1825522215, now seen corresponding path program 1 times [2019-11-23 22:49:40,760 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:49:40,764 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1463005789] [2019-11-23 22:49:40,767 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:49:40,777 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:49:40,802 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-23 22:49:40,803 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1463005789] [2019-11-23 22:49:40,803 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-23 22:49:40,803 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-23 22:49:40,803 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [579387262] [2019-11-23 22:49:40,804 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-23 22:49:40,804 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:49:40,805 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-23 22:49:40,805 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:49:40,805 INFO L87 Difference]: Start difference. First operand 3570 states and 5623 transitions. Second operand 3 states. [2019-11-23 22:49:41,045 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:49:41,045 INFO L93 Difference]: Finished difference Result 9081 states and 14487 transitions. [2019-11-23 22:49:41,046 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-23 22:49:41,046 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 48 [2019-11-23 22:49:41,047 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:49:41,075 INFO L225 Difference]: With dead ends: 9081 [2019-11-23 22:49:41,076 INFO L226 Difference]: Without dead ends: 5569 [2019-11-23 22:49:41,083 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:49:41,089 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5569 states. [2019-11-23 22:49:41,376 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5569 to 5565. [2019-11-23 22:49:41,376 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5565 states. [2019-11-23 22:49:41,401 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5565 states to 5565 states and 8840 transitions. [2019-11-23 22:49:41,401 INFO L78 Accepts]: Start accepts. Automaton has 5565 states and 8840 transitions. Word has length 48 [2019-11-23 22:49:41,402 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:49:41,402 INFO L462 AbstractCegarLoop]: Abstraction has 5565 states and 8840 transitions. [2019-11-23 22:49:41,402 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-23 22:49:41,402 INFO L276 IsEmpty]: Start isEmpty. Operand 5565 states and 8840 transitions. [2019-11-23 22:49:41,407 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2019-11-23 22:49:41,407 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:49:41,407 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:49:41,407 INFO L410 AbstractCegarLoop]: === Iteration 15 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:49:41,408 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:49:41,408 INFO L82 PathProgramCache]: Analyzing trace with hash 2073668709, now seen corresponding path program 1 times [2019-11-23 22:49:41,408 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:49:41,408 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [129879433] [2019-11-23 22:49:41,408 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:49:41,413 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:49:41,425 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2019-11-23 22:49:41,425 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [129879433] [2019-11-23 22:49:41,425 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-23 22:49:41,426 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-23 22:49:41,426 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [906316815] [2019-11-23 22:49:41,426 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-23 22:49:41,426 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:49:41,427 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-23 22:49:41,427 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:49:41,427 INFO L87 Difference]: Start difference. First operand 5565 states and 8840 transitions. Second operand 3 states. [2019-11-23 22:49:41,652 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:49:41,653 INFO L93 Difference]: Finished difference Result 11028 states and 17554 transitions. [2019-11-23 22:49:41,653 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-23 22:49:41,653 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 48 [2019-11-23 22:49:41,653 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:49:41,678 INFO L225 Difference]: With dead ends: 11028 [2019-11-23 22:49:41,678 INFO L226 Difference]: Without dead ends: 5521 [2019-11-23 22:49:41,686 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:49:41,694 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5521 states. [2019-11-23 22:49:41,990 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5521 to 5521. [2019-11-23 22:49:41,990 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5521 states. [2019-11-23 22:49:42,003 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5521 states to 5521 states and 8785 transitions. [2019-11-23 22:49:42,003 INFO L78 Accepts]: Start accepts. Automaton has 5521 states and 8785 transitions. Word has length 48 [2019-11-23 22:49:42,003 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:49:42,003 INFO L462 AbstractCegarLoop]: Abstraction has 5521 states and 8785 transitions. [2019-11-23 22:49:42,003 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-23 22:49:42,004 INFO L276 IsEmpty]: Start isEmpty. Operand 5521 states and 8785 transitions. [2019-11-23 22:49:42,007 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2019-11-23 22:49:42,007 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:49:42,007 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:49:42,007 INFO L410 AbstractCegarLoop]: === Iteration 16 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:49:42,008 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:49:42,008 INFO L82 PathProgramCache]: Analyzing trace with hash 963117268, now seen corresponding path program 1 times [2019-11-23 22:49:42,008 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:49:42,008 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1608035752] [2019-11-23 22:49:42,008 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:49:42,019 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:49:42,041 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-23 22:49:42,042 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1608035752] [2019-11-23 22:49:42,042 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-23 22:49:42,042 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-23 22:49:42,042 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2122849909] [2019-11-23 22:49:42,043 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-23 22:49:42,043 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:49:42,043 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-23 22:49:42,043 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:49:42,044 INFO L87 Difference]: Start difference. First operand 5521 states and 8785 transitions. Second operand 3 states. [2019-11-23 22:49:42,557 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:49:42,557 INFO L93 Difference]: Finished difference Result 15573 states and 24710 transitions. [2019-11-23 22:49:42,557 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-23 22:49:42,558 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 49 [2019-11-23 22:49:42,558 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:49:42,585 INFO L225 Difference]: With dead ends: 15573 [2019-11-23 22:49:42,585 INFO L226 Difference]: Without dead ends: 8340 [2019-11-23 22:49:42,595 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:49:42,605 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8340 states. [2019-11-23 22:49:42,917 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8340 to 8340. [2019-11-23 22:49:42,917 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8340 states. [2019-11-23 22:49:42,934 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8340 states to 8340 states and 13079 transitions. [2019-11-23 22:49:42,934 INFO L78 Accepts]: Start accepts. Automaton has 8340 states and 13079 transitions. Word has length 49 [2019-11-23 22:49:42,935 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:49:42,935 INFO L462 AbstractCegarLoop]: Abstraction has 8340 states and 13079 transitions. [2019-11-23 22:49:42,935 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-23 22:49:42,935 INFO L276 IsEmpty]: Start isEmpty. Operand 8340 states and 13079 transitions. [2019-11-23 22:49:42,941 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2019-11-23 22:49:42,941 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:49:42,941 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:49:42,941 INFO L410 AbstractCegarLoop]: === Iteration 17 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:49:42,942 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:49:42,942 INFO L82 PathProgramCache]: Analyzing trace with hash 1798060104, now seen corresponding path program 1 times [2019-11-23 22:49:42,942 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:49:42,942 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [810416003] [2019-11-23 22:49:42,942 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:49:42,953 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:49:42,983 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-23 22:49:42,984 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [810416003] [2019-11-23 22:49:42,984 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-23 22:49:42,984 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-23 22:49:42,984 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1019843882] [2019-11-23 22:49:42,985 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-23 22:49:42,985 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:49:42,985 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-23 22:49:42,985 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:49:42,986 INFO L87 Difference]: Start difference. First operand 8340 states and 13079 transitions. Second operand 3 states. [2019-11-23 22:49:43,434 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:49:43,434 INFO L93 Difference]: Finished difference Result 17187 states and 26897 transitions. [2019-11-23 22:49:43,435 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-23 22:49:43,435 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 53 [2019-11-23 22:49:43,435 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:49:43,457 INFO L225 Difference]: With dead ends: 17187 [2019-11-23 22:49:43,457 INFO L226 Difference]: Without dead ends: 8883 [2019-11-23 22:49:43,469 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:49:43,480 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8883 states. [2019-11-23 22:49:43,767 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8883 to 8322. [2019-11-23 22:49:43,767 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8322 states. [2019-11-23 22:49:43,781 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8322 states to 8322 states and 12796 transitions. [2019-11-23 22:49:43,782 INFO L78 Accepts]: Start accepts. Automaton has 8322 states and 12796 transitions. Word has length 53 [2019-11-23 22:49:43,782 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:49:43,782 INFO L462 AbstractCegarLoop]: Abstraction has 8322 states and 12796 transitions. [2019-11-23 22:49:43,782 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-23 22:49:43,782 INFO L276 IsEmpty]: Start isEmpty. Operand 8322 states and 12796 transitions. [2019-11-23 22:49:43,788 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2019-11-23 22:49:43,788 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:49:43,789 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:49:43,789 INFO L410 AbstractCegarLoop]: === Iteration 18 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:49:43,789 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:49:43,789 INFO L82 PathProgramCache]: Analyzing trace with hash -833394239, now seen corresponding path program 1 times [2019-11-23 22:49:43,790 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:49:43,790 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [267361458] [2019-11-23 22:49:43,790 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:49:43,795 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:49:43,816 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2019-11-23 22:49:43,816 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [267361458] [2019-11-23 22:49:43,816 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-23 22:49:43,817 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-23 22:49:43,817 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [896079347] [2019-11-23 22:49:43,817 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-23 22:49:43,818 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:49:43,818 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-23 22:49:43,818 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:49:43,819 INFO L87 Difference]: Start difference. First operand 8322 states and 12796 transitions. Second operand 3 states. [2019-11-23 22:49:44,630 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:49:44,631 INFO L93 Difference]: Finished difference Result 24654 states and 37995 transitions. [2019-11-23 22:49:44,631 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-23 22:49:44,631 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 55 [2019-11-23 22:49:44,631 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:49:44,675 INFO L225 Difference]: With dead ends: 24654 [2019-11-23 22:49:44,675 INFO L226 Difference]: Without dead ends: 16335 [2019-11-23 22:49:44,693 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:49:44,721 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16335 states. [2019-11-23 22:49:45,485 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16335 to 16203. [2019-11-23 22:49:45,486 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16203 states. [2019-11-23 22:49:45,511 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16203 states to 16203 states and 25040 transitions. [2019-11-23 22:49:45,511 INFO L78 Accepts]: Start accepts. Automaton has 16203 states and 25040 transitions. Word has length 55 [2019-11-23 22:49:45,512 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:49:45,512 INFO L462 AbstractCegarLoop]: Abstraction has 16203 states and 25040 transitions. [2019-11-23 22:49:45,512 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-23 22:49:45,512 INFO L276 IsEmpty]: Start isEmpty. Operand 16203 states and 25040 transitions. [2019-11-23 22:49:45,522 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 87 [2019-11-23 22:49:45,522 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:49:45,522 INFO L410 BasicCegarLoop]: trace histogram [3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:49:45,522 INFO L410 AbstractCegarLoop]: === Iteration 19 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:49:45,523 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:49:45,523 INFO L82 PathProgramCache]: Analyzing trace with hash -539805076, now seen corresponding path program 1 times [2019-11-23 22:49:45,524 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:49:45,525 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [267249230] [2019-11-23 22:49:45,525 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:49:45,533 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:49:45,572 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 11 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-23 22:49:45,572 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [267249230] [2019-11-23 22:49:45,572 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-23 22:49:45,572 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-23 22:49:45,573 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1940712852] [2019-11-23 22:49:45,574 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-23 22:49:45,574 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:49:45,574 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-23 22:49:45,575 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:49:45,575 INFO L87 Difference]: Start difference. First operand 16203 states and 25040 transitions. Second operand 3 states. [2019-11-23 22:49:46,285 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:49:46,285 INFO L93 Difference]: Finished difference Result 33061 states and 51038 transitions. [2019-11-23 22:49:46,286 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-23 22:49:46,286 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 86 [2019-11-23 22:49:46,286 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:49:46,320 INFO L225 Difference]: With dead ends: 33061 [2019-11-23 22:49:46,320 INFO L226 Difference]: Without dead ends: 16887 [2019-11-23 22:49:46,343 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:49:46,358 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16887 states. [2019-11-23 22:49:47,029 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16887 to 16823. [2019-11-23 22:49:47,030 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16823 states. [2019-11-23 22:49:47,057 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16823 states to 16823 states and 25342 transitions. [2019-11-23 22:49:47,058 INFO L78 Accepts]: Start accepts. Automaton has 16823 states and 25342 transitions. Word has length 86 [2019-11-23 22:49:47,058 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:49:47,058 INFO L462 AbstractCegarLoop]: Abstraction has 16823 states and 25342 transitions. [2019-11-23 22:49:47,058 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-23 22:49:47,058 INFO L276 IsEmpty]: Start isEmpty. Operand 16823 states and 25342 transitions. [2019-11-23 22:49:47,069 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 88 [2019-11-23 22:49:47,069 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:49:47,070 INFO L410 BasicCegarLoop]: trace histogram [3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:49:47,070 INFO L410 AbstractCegarLoop]: === Iteration 20 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:49:47,070 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:49:47,070 INFO L82 PathProgramCache]: Analyzing trace with hash -1404681213, now seen corresponding path program 1 times [2019-11-23 22:49:47,070 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:49:47,071 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [753318239] [2019-11-23 22:49:47,071 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:49:47,081 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:49:47,113 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 9 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2019-11-23 22:49:47,114 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [753318239] [2019-11-23 22:49:47,114 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-23 22:49:47,114 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-23 22:49:47,115 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [722761475] [2019-11-23 22:49:47,115 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-23 22:49:47,116 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:49:47,116 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-23 22:49:47,116 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-23 22:49:47,116 INFO L87 Difference]: Start difference. First operand 16823 states and 25342 transitions. Second operand 4 states. [2019-11-23 22:49:47,843 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:49:47,844 INFO L93 Difference]: Finished difference Result 27813 states and 42042 transitions. [2019-11-23 22:49:47,844 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-11-23 22:49:47,844 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 87 [2019-11-23 22:49:47,844 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:49:47,879 INFO L225 Difference]: With dead ends: 27813 [2019-11-23 22:49:47,879 INFO L226 Difference]: Without dead ends: 15935 [2019-11-23 22:49:47,890 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-23 22:49:47,903 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15935 states. [2019-11-23 22:49:48,648 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15935 to 15811. [2019-11-23 22:49:48,649 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15811 states. [2019-11-23 22:49:48,677 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15811 states to 15811 states and 23636 transitions. [2019-11-23 22:49:48,677 INFO L78 Accepts]: Start accepts. Automaton has 15811 states and 23636 transitions. Word has length 87 [2019-11-23 22:49:48,677 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:49:48,677 INFO L462 AbstractCegarLoop]: Abstraction has 15811 states and 23636 transitions. [2019-11-23 22:49:48,678 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-23 22:49:48,678 INFO L276 IsEmpty]: Start isEmpty. Operand 15811 states and 23636 transitions. [2019-11-23 22:49:48,686 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 88 [2019-11-23 22:49:48,686 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:49:48,687 INFO L410 BasicCegarLoop]: trace histogram [3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:49:48,687 INFO L410 AbstractCegarLoop]: === Iteration 21 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:49:48,687 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:49:48,687 INFO L82 PathProgramCache]: Analyzing trace with hash 1520792899, now seen corresponding path program 1 times [2019-11-23 22:49:48,688 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:49:48,688 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1796035871] [2019-11-23 22:49:48,688 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:49:48,697 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:49:48,721 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 11 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-23 22:49:48,721 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1796035871] [2019-11-23 22:49:48,722 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-23 22:49:48,722 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-23 22:49:48,722 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [207695730] [2019-11-23 22:49:48,723 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-23 22:49:48,723 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:49:48,723 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-23 22:49:48,723 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:49:48,723 INFO L87 Difference]: Start difference. First operand 15811 states and 23636 transitions. Second operand 3 states. [2019-11-23 22:49:49,579 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:49:49,580 INFO L93 Difference]: Finished difference Result 32391 states and 48370 transitions. [2019-11-23 22:49:49,580 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-23 22:49:49,580 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 87 [2019-11-23 22:49:49,580 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:49:49,622 INFO L225 Difference]: With dead ends: 32391 [2019-11-23 22:49:49,622 INFO L226 Difference]: Without dead ends: 16621 [2019-11-23 22:49:49,636 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:49:49,651 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16621 states. [2019-11-23 22:49:50,664 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16621 to 16541. [2019-11-23 22:49:50,665 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16541 states. [2019-11-23 22:49:50,688 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16541 states to 16541 states and 24008 transitions. [2019-11-23 22:49:50,688 INFO L78 Accepts]: Start accepts. Automaton has 16541 states and 24008 transitions. Word has length 87 [2019-11-23 22:49:50,689 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:49:50,689 INFO L462 AbstractCegarLoop]: Abstraction has 16541 states and 24008 transitions. [2019-11-23 22:49:50,689 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-23 22:49:50,689 INFO L276 IsEmpty]: Start isEmpty. Operand 16541 states and 24008 transitions. [2019-11-23 22:49:50,701 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 89 [2019-11-23 22:49:50,701 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:49:50,702 INFO L410 BasicCegarLoop]: trace histogram [3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:49:50,702 INFO L410 AbstractCegarLoop]: === Iteration 22 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:49:50,702 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:49:50,702 INFO L82 PathProgramCache]: Analyzing trace with hash -1973365524, now seen corresponding path program 1 times [2019-11-23 22:49:50,702 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:49:50,703 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2097440887] [2019-11-23 22:49:50,703 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:49:50,711 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:49:50,744 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 11 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-23 22:49:50,744 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2097440887] [2019-11-23 22:49:50,744 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-23 22:49:50,745 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-23 22:49:50,745 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1026713436] [2019-11-23 22:49:50,745 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-23 22:49:50,745 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:49:50,746 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-23 22:49:50,746 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:49:50,746 INFO L87 Difference]: Start difference. First operand 16541 states and 24008 transitions. Second operand 3 states. [2019-11-23 22:49:51,518 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:49:51,518 INFO L93 Difference]: Finished difference Result 33498 states and 48738 transitions. [2019-11-23 22:49:51,518 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-23 22:49:51,519 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 88 [2019-11-23 22:49:51,519 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:49:51,551 INFO L225 Difference]: With dead ends: 33498 [2019-11-23 22:49:51,551 INFO L226 Difference]: Without dead ends: 17018 [2019-11-23 22:49:51,568 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:49:51,585 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17018 states. [2019-11-23 22:49:52,807 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17018 to 13513. [2019-11-23 22:49:52,807 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13513 states. [2019-11-23 22:49:52,829 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13513 states to 13513 states and 18922 transitions. [2019-11-23 22:49:52,829 INFO L78 Accepts]: Start accepts. Automaton has 13513 states and 18922 transitions. Word has length 88 [2019-11-23 22:49:52,830 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:49:52,830 INFO L462 AbstractCegarLoop]: Abstraction has 13513 states and 18922 transitions. [2019-11-23 22:49:52,830 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-23 22:49:52,830 INFO L276 IsEmpty]: Start isEmpty. Operand 13513 states and 18922 transitions. [2019-11-23 22:49:52,842 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 90 [2019-11-23 22:49:52,842 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:49:52,842 INFO L410 BasicCegarLoop]: trace histogram [3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:49:52,842 INFO L410 AbstractCegarLoop]: === Iteration 23 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:49:52,843 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:49:52,843 INFO L82 PathProgramCache]: Analyzing trace with hash 663253701, now seen corresponding path program 1 times [2019-11-23 22:49:52,843 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:49:52,844 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1499002190] [2019-11-23 22:49:52,845 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:49:52,858 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:49:52,891 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 9 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2019-11-23 22:49:52,892 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1499002190] [2019-11-23 22:49:52,892 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-23 22:49:52,892 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-23 22:49:52,892 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [235604255] [2019-11-23 22:49:52,893 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-23 22:49:52,893 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:49:52,893 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-23 22:49:52,893 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:49:52,893 INFO L87 Difference]: Start difference. First operand 13513 states and 18922 transitions. Second operand 3 states. [2019-11-23 22:49:53,395 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:49:53,396 INFO L93 Difference]: Finished difference Result 24045 states and 33699 transitions. [2019-11-23 22:49:53,396 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-23 22:49:53,396 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 89 [2019-11-23 22:49:53,397 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:49:53,418 INFO L225 Difference]: With dead ends: 24045 [2019-11-23 22:49:53,418 INFO L226 Difference]: Without dead ends: 15655 [2019-11-23 22:49:53,428 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:49:53,441 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15655 states. [2019-11-23 22:49:54,081 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15655 to 15175. [2019-11-23 22:49:54,081 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15175 states. [2019-11-23 22:49:54,111 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15175 states to 15175 states and 20753 transitions. [2019-11-23 22:49:54,111 INFO L78 Accepts]: Start accepts. Automaton has 15175 states and 20753 transitions. Word has length 89 [2019-11-23 22:49:54,112 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:49:54,112 INFO L462 AbstractCegarLoop]: Abstraction has 15175 states and 20753 transitions. [2019-11-23 22:49:54,112 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-23 22:49:54,112 INFO L276 IsEmpty]: Start isEmpty. Operand 15175 states and 20753 transitions. [2019-11-23 22:49:54,139 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 117 [2019-11-23 22:49:54,139 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:49:54,140 INFO L410 BasicCegarLoop]: trace histogram [4, 3, 3, 3, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:49:54,140 INFO L410 AbstractCegarLoop]: === Iteration 24 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:49:54,140 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:49:54,141 INFO L82 PathProgramCache]: Analyzing trace with hash 1690650567, now seen corresponding path program 1 times [2019-11-23 22:49:54,141 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:49:54,141 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [649851438] [2019-11-23 22:49:54,141 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:49:54,152 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:49:54,181 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 17 proven. 0 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2019-11-23 22:49:54,181 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [649851438] [2019-11-23 22:49:54,181 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-23 22:49:54,181 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-23 22:49:54,182 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2127085522] [2019-11-23 22:49:54,182 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-23 22:49:54,182 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:49:54,183 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-23 22:49:54,183 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:49:54,184 INFO L87 Difference]: Start difference. First operand 15175 states and 20753 transitions. Second operand 3 states. [2019-11-23 22:49:54,754 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:49:54,755 INFO L93 Difference]: Finished difference Result 29588 states and 40424 transitions. [2019-11-23 22:49:54,755 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-23 22:49:54,755 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 116 [2019-11-23 22:49:54,755 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:49:54,769 INFO L225 Difference]: With dead ends: 29588 [2019-11-23 22:49:54,769 INFO L226 Difference]: Without dead ends: 15105 [2019-11-23 22:49:54,780 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:49:54,792 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15105 states. [2019-11-23 22:49:55,225 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15105 to 15105. [2019-11-23 22:49:55,225 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15105 states. [2019-11-23 22:49:55,240 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15105 states to 15105 states and 20599 transitions. [2019-11-23 22:49:55,241 INFO L78 Accepts]: Start accepts. Automaton has 15105 states and 20599 transitions. Word has length 116 [2019-11-23 22:49:55,241 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:49:55,241 INFO L462 AbstractCegarLoop]: Abstraction has 15105 states and 20599 transitions. [2019-11-23 22:49:55,241 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-23 22:49:55,241 INFO L276 IsEmpty]: Start isEmpty. Operand 15105 states and 20599 transitions. [2019-11-23 22:49:55,258 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 128 [2019-11-23 22:49:55,258 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:49:55,258 INFO L410 BasicCegarLoop]: trace histogram [5, 4, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:49:55,258 INFO L410 AbstractCegarLoop]: === Iteration 25 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:49:55,259 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:49:55,259 INFO L82 PathProgramCache]: Analyzing trace with hash -1184080698, now seen corresponding path program 1 times [2019-11-23 22:49:55,259 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:49:55,259 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [592112376] [2019-11-23 22:49:55,259 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:49:55,266 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:49:55,297 INFO L134 CoverageAnalysis]: Checked inductivity of 51 backedges. 13 proven. 0 refuted. 0 times theorem prover too weak. 38 trivial. 0 not checked. [2019-11-23 22:49:55,298 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [592112376] [2019-11-23 22:49:55,298 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-23 22:49:55,298 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-23 22:49:55,298 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [477259795] [2019-11-23 22:49:55,299 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-23 22:49:55,299 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:49:55,299 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-23 22:49:55,299 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:49:55,299 INFO L87 Difference]: Start difference. First operand 15105 states and 20599 transitions. Second operand 3 states. [2019-11-23 22:49:55,650 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:49:55,650 INFO L93 Difference]: Finished difference Result 25662 states and 34928 transitions. [2019-11-23 22:49:55,650 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-23 22:49:55,651 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 127 [2019-11-23 22:49:55,651 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:49:55,660 INFO L225 Difference]: With dead ends: 25662 [2019-11-23 22:49:55,660 INFO L226 Difference]: Without dead ends: 10614 [2019-11-23 22:49:55,671 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:49:55,679 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10614 states. [2019-11-23 22:49:56,038 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10614 to 8646. [2019-11-23 22:49:56,039 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8646 states. [2019-11-23 22:49:56,047 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8646 states to 8646 states and 11323 transitions. [2019-11-23 22:49:56,047 INFO L78 Accepts]: Start accepts. Automaton has 8646 states and 11323 transitions. Word has length 127 [2019-11-23 22:49:56,047 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:49:56,047 INFO L462 AbstractCegarLoop]: Abstraction has 8646 states and 11323 transitions. [2019-11-23 22:49:56,047 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-23 22:49:56,048 INFO L276 IsEmpty]: Start isEmpty. Operand 8646 states and 11323 transitions. [2019-11-23 22:49:56,056 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 129 [2019-11-23 22:49:56,057 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:49:56,057 INFO L410 BasicCegarLoop]: trace histogram [5, 4, 4, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:49:56,057 INFO L410 AbstractCegarLoop]: === Iteration 26 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:49:56,057 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:49:56,058 INFO L82 PathProgramCache]: Analyzing trace with hash 762576065, now seen corresponding path program 1 times [2019-11-23 22:49:56,058 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:49:56,058 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [926178212] [2019-11-23 22:49:56,058 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:49:56,066 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:49:56,098 INFO L134 CoverageAnalysis]: Checked inductivity of 54 backedges. 43 proven. 0 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2019-11-23 22:49:56,099 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [926178212] [2019-11-23 22:49:56,099 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-23 22:49:56,099 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-23 22:49:56,099 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [849032479] [2019-11-23 22:49:56,100 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-23 22:49:56,100 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:49:56,100 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-23 22:49:56,100 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:49:56,100 INFO L87 Difference]: Start difference. First operand 8646 states and 11323 transitions. Second operand 3 states. [2019-11-23 22:49:56,308 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:49:56,309 INFO L93 Difference]: Finished difference Result 14253 states and 18666 transitions. [2019-11-23 22:49:56,309 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-23 22:49:56,309 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 128 [2019-11-23 22:49:56,309 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:49:56,316 INFO L225 Difference]: With dead ends: 14253 [2019-11-23 22:49:56,316 INFO L226 Difference]: Without dead ends: 6761 [2019-11-23 22:49:56,321 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:49:56,327 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6761 states. [2019-11-23 22:49:56,510 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6761 to 6175. [2019-11-23 22:49:56,511 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6175 states. [2019-11-23 22:49:56,517 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6175 states to 6175 states and 7922 transitions. [2019-11-23 22:49:56,517 INFO L78 Accepts]: Start accepts. Automaton has 6175 states and 7922 transitions. Word has length 128 [2019-11-23 22:49:56,517 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:49:56,517 INFO L462 AbstractCegarLoop]: Abstraction has 6175 states and 7922 transitions. [2019-11-23 22:49:56,517 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-23 22:49:56,517 INFO L276 IsEmpty]: Start isEmpty. Operand 6175 states and 7922 transitions. [2019-11-23 22:49:56,522 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 135 [2019-11-23 22:49:56,522 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:49:56,522 INFO L410 BasicCegarLoop]: trace histogram [5, 4, 4, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:49:56,522 INFO L410 AbstractCegarLoop]: === Iteration 27 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:49:56,522 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:49:56,522 INFO L82 PathProgramCache]: Analyzing trace with hash 843157933, now seen corresponding path program 1 times [2019-11-23 22:49:56,523 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:49:56,523 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1846503341] [2019-11-23 22:49:56,523 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:49:56,531 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:49:56,567 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 36 proven. 0 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2019-11-23 22:49:56,568 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1846503341] [2019-11-23 22:49:56,568 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-23 22:49:56,568 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-23 22:49:56,568 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [94540830] [2019-11-23 22:49:56,569 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-23 22:49:56,569 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:49:56,569 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-23 22:49:56,569 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:49:56,569 INFO L87 Difference]: Start difference. First operand 6175 states and 7922 transitions. Second operand 3 states. [2019-11-23 22:49:56,854 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:49:56,854 INFO L93 Difference]: Finished difference Result 11963 states and 15332 transitions. [2019-11-23 22:49:56,855 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-23 22:49:56,855 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 134 [2019-11-23 22:49:56,855 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:49:56,864 INFO L225 Difference]: With dead ends: 11963 [2019-11-23 22:49:56,864 INFO L226 Difference]: Without dead ends: 6174 [2019-11-23 22:49:56,869 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:49:56,875 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6174 states. [2019-11-23 22:49:57,136 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6174 to 6134. [2019-11-23 22:49:57,137 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6134 states. [2019-11-23 22:49:57,144 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6134 states to 6134 states and 7839 transitions. [2019-11-23 22:49:57,145 INFO L78 Accepts]: Start accepts. Automaton has 6134 states and 7839 transitions. Word has length 134 [2019-11-23 22:49:57,145 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:49:57,145 INFO L462 AbstractCegarLoop]: Abstraction has 6134 states and 7839 transitions. [2019-11-23 22:49:57,145 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-23 22:49:57,145 INFO L276 IsEmpty]: Start isEmpty. Operand 6134 states and 7839 transitions. [2019-11-23 22:49:57,150 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 135 [2019-11-23 22:49:57,150 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:49:57,150 INFO L410 BasicCegarLoop]: trace histogram [5, 4, 4, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:49:57,151 INFO L410 AbstractCegarLoop]: === Iteration 28 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:49:57,151 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:49:57,151 INFO L82 PathProgramCache]: Analyzing trace with hash 713131341, now seen corresponding path program 1 times [2019-11-23 22:49:57,151 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:49:57,151 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1729432251] [2019-11-23 22:49:57,152 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:49:57,173 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:49:57,201 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 36 proven. 0 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2019-11-23 22:49:57,201 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1729432251] [2019-11-23 22:49:57,202 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-23 22:49:57,202 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-23 22:49:57,202 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1316423598] [2019-11-23 22:49:57,202 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-23 22:49:57,202 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:49:57,203 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-23 22:49:57,203 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:49:57,203 INFO L87 Difference]: Start difference. First operand 6134 states and 7839 transitions. Second operand 3 states. [2019-11-23 22:49:57,434 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:49:57,434 INFO L93 Difference]: Finished difference Result 11902 states and 15193 transitions. [2019-11-23 22:49:57,434 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-23 22:49:57,434 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 134 [2019-11-23 22:49:57,435 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:49:57,440 INFO L225 Difference]: With dead ends: 11902 [2019-11-23 22:49:57,440 INFO L226 Difference]: Without dead ends: 6144 [2019-11-23 22:49:57,444 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:49:57,447 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6144 states. [2019-11-23 22:49:57,701 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6144 to 6104. [2019-11-23 22:49:57,702 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6104 states. [2019-11-23 22:49:57,707 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6104 states to 6104 states and 7768 transitions. [2019-11-23 22:49:57,707 INFO L78 Accepts]: Start accepts. Automaton has 6104 states and 7768 transitions. Word has length 134 [2019-11-23 22:49:57,707 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:49:57,707 INFO L462 AbstractCegarLoop]: Abstraction has 6104 states and 7768 transitions. [2019-11-23 22:49:57,707 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-23 22:49:57,707 INFO L276 IsEmpty]: Start isEmpty. Operand 6104 states and 7768 transitions. [2019-11-23 22:49:57,710 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 138 [2019-11-23 22:49:57,710 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:49:57,710 INFO L410 BasicCegarLoop]: trace histogram [5, 4, 4, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:49:57,711 INFO L410 AbstractCegarLoop]: === Iteration 29 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:49:57,711 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:49:57,711 INFO L82 PathProgramCache]: Analyzing trace with hash -57826629, now seen corresponding path program 1 times [2019-11-23 22:49:57,711 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:49:57,711 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2079456474] [2019-11-23 22:49:57,711 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:49:57,718 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:49:57,744 INFO L134 CoverageAnalysis]: Checked inductivity of 58 backedges. 46 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2019-11-23 22:49:57,745 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2079456474] [2019-11-23 22:49:57,745 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-23 22:49:57,745 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-23 22:49:57,745 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [118806586] [2019-11-23 22:49:57,746 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-23 22:49:57,746 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:49:57,746 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-23 22:49:57,746 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:49:57,747 INFO L87 Difference]: Start difference. First operand 6104 states and 7768 transitions. Second operand 3 states. [2019-11-23 22:49:58,026 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:49:58,026 INFO L93 Difference]: Finished difference Result 10914 states and 13936 transitions. [2019-11-23 22:49:58,027 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-23 22:49:58,027 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 137 [2019-11-23 22:49:58,027 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:49:58,034 INFO L225 Difference]: With dead ends: 10914 [2019-11-23 22:49:58,034 INFO L226 Difference]: Without dead ends: 5174 [2019-11-23 22:49:58,039 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:49:58,043 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5174 states. [2019-11-23 22:49:58,382 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5174 to 5102. [2019-11-23 22:49:58,383 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5102 states. [2019-11-23 22:49:58,393 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5102 states to 5102 states and 6390 transitions. [2019-11-23 22:49:58,393 INFO L78 Accepts]: Start accepts. Automaton has 5102 states and 6390 transitions. Word has length 137 [2019-11-23 22:49:58,394 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:49:58,394 INFO L462 AbstractCegarLoop]: Abstraction has 5102 states and 6390 transitions. [2019-11-23 22:49:58,394 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-23 22:49:58,394 INFO L276 IsEmpty]: Start isEmpty. Operand 5102 states and 6390 transitions. [2019-11-23 22:49:58,399 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 138 [2019-11-23 22:49:58,399 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:49:58,400 INFO L410 BasicCegarLoop]: trace histogram [5, 4, 4, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:49:58,400 INFO L410 AbstractCegarLoop]: === Iteration 30 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:49:58,400 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:49:58,400 INFO L82 PathProgramCache]: Analyzing trace with hash -76782736, now seen corresponding path program 1 times [2019-11-23 22:49:58,401 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:49:58,401 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1272682435] [2019-11-23 22:49:58,401 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:49:58,415 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:49:58,475 INFO L134 CoverageAnalysis]: Checked inductivity of 58 backedges. 45 proven. 0 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2019-11-23 22:49:58,476 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1272682435] [2019-11-23 22:49:58,476 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-23 22:49:58,477 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-23 22:49:58,480 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [493753849] [2019-11-23 22:49:58,481 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-23 22:49:58,481 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:49:58,481 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-23 22:49:58,481 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:49:58,482 INFO L87 Difference]: Start difference. First operand 5102 states and 6390 transitions. Second operand 3 states. [2019-11-23 22:49:58,759 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:49:58,759 INFO L93 Difference]: Finished difference Result 9187 states and 11545 transitions. [2019-11-23 22:49:58,760 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-23 22:49:58,760 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 137 [2019-11-23 22:49:58,760 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:49:58,765 INFO L225 Difference]: With dead ends: 9187 [2019-11-23 22:49:58,765 INFO L226 Difference]: Without dead ends: 4126 [2019-11-23 22:49:58,771 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:49:58,774 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4126 states. [2019-11-23 22:49:58,941 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4126 to 4106. [2019-11-23 22:49:58,941 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4106 states. [2019-11-23 22:49:58,947 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4106 states to 4106 states and 5057 transitions. [2019-11-23 22:49:58,947 INFO L78 Accepts]: Start accepts. Automaton has 4106 states and 5057 transitions. Word has length 137 [2019-11-23 22:49:58,948 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:49:58,948 INFO L462 AbstractCegarLoop]: Abstraction has 4106 states and 5057 transitions. [2019-11-23 22:49:58,948 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-23 22:49:58,948 INFO L276 IsEmpty]: Start isEmpty. Operand 4106 states and 5057 transitions. [2019-11-23 22:49:58,951 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 171 [2019-11-23 22:49:58,951 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:49:58,952 INFO L410 BasicCegarLoop]: trace histogram [6, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:49:58,952 INFO L410 AbstractCegarLoop]: === Iteration 31 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:49:58,952 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:49:58,952 INFO L82 PathProgramCache]: Analyzing trace with hash -691267920, now seen corresponding path program 1 times [2019-11-23 22:49:58,952 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:49:58,953 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [426346432] [2019-11-23 22:49:58,953 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:49:58,973 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:49:59,010 INFO L134 CoverageAnalysis]: Checked inductivity of 99 backedges. 75 proven. 0 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2019-11-23 22:49:59,011 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [426346432] [2019-11-23 22:49:59,011 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-23 22:49:59,011 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-23 22:49:59,011 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [560002725] [2019-11-23 22:49:59,012 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-23 22:49:59,012 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:49:59,012 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-23 22:49:59,012 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:49:59,012 INFO L87 Difference]: Start difference. First operand 4106 states and 5057 transitions. Second operand 3 states. [2019-11-23 22:49:59,258 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:49:59,258 INFO L93 Difference]: Finished difference Result 7627 states and 9455 transitions. [2019-11-23 22:49:59,259 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-23 22:49:59,259 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 170 [2019-11-23 22:49:59,259 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:49:59,264 INFO L225 Difference]: With dead ends: 7627 [2019-11-23 22:49:59,264 INFO L226 Difference]: Without dead ends: 3797 [2019-11-23 22:49:59,267 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:49:59,270 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3797 states. [2019-11-23 22:49:59,525 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3797 to 3568. [2019-11-23 22:49:59,525 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3568 states. [2019-11-23 22:49:59,532 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3568 states to 3568 states and 4348 transitions. [2019-11-23 22:49:59,533 INFO L78 Accepts]: Start accepts. Automaton has 3568 states and 4348 transitions. Word has length 170 [2019-11-23 22:49:59,533 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:49:59,533 INFO L462 AbstractCegarLoop]: Abstraction has 3568 states and 4348 transitions. [2019-11-23 22:49:59,533 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-23 22:49:59,534 INFO L276 IsEmpty]: Start isEmpty. Operand 3568 states and 4348 transitions. [2019-11-23 22:49:59,538 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 178 [2019-11-23 22:49:59,538 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:49:59,538 INFO L410 BasicCegarLoop]: trace histogram [6, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:49:59,539 INFO L410 AbstractCegarLoop]: === Iteration 32 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:49:59,539 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:49:59,540 INFO L82 PathProgramCache]: Analyzing trace with hash 307077909, now seen corresponding path program 1 times [2019-11-23 22:49:59,540 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:49:59,540 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1851486091] [2019-11-23 22:49:59,540 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:49:59,555 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:49:59,605 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 82 proven. 0 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2019-11-23 22:49:59,606 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1851486091] [2019-11-23 22:49:59,606 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-23 22:49:59,606 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-23 22:49:59,606 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1350284554] [2019-11-23 22:49:59,607 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-23 22:49:59,607 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:49:59,608 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-23 22:49:59,608 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:49:59,608 INFO L87 Difference]: Start difference. First operand 3568 states and 4348 transitions. Second operand 3 states. [2019-11-23 22:49:59,990 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:49:59,991 INFO L93 Difference]: Finished difference Result 8940 states and 10936 transitions. [2019-11-23 22:49:59,991 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-23 22:49:59,991 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 177 [2019-11-23 22:49:59,992 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:49:59,999 INFO L225 Difference]: With dead ends: 8940 [2019-11-23 22:49:59,999 INFO L226 Difference]: Without dead ends: 5648 [2019-11-23 22:50:00,005 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:50:00,010 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5648 states. [2019-11-23 22:50:00,343 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5648 to 5422. [2019-11-23 22:50:00,344 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5422 states. [2019-11-23 22:50:00,353 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5422 states to 5422 states and 6526 transitions. [2019-11-23 22:50:00,353 INFO L78 Accepts]: Start accepts. Automaton has 5422 states and 6526 transitions. Word has length 177 [2019-11-23 22:50:00,354 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:50:00,354 INFO L462 AbstractCegarLoop]: Abstraction has 5422 states and 6526 transitions. [2019-11-23 22:50:00,354 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-23 22:50:00,354 INFO L276 IsEmpty]: Start isEmpty. Operand 5422 states and 6526 transitions. [2019-11-23 22:50:00,358 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 181 [2019-11-23 22:50:00,358 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:50:00,359 INFO L410 BasicCegarLoop]: trace histogram [6, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:50:00,359 INFO L410 AbstractCegarLoop]: === Iteration 33 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:50:00,359 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:50:00,359 INFO L82 PathProgramCache]: Analyzing trace with hash -2095538940, now seen corresponding path program 1 times [2019-11-23 22:50:00,360 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:50:00,360 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1839837024] [2019-11-23 22:50:00,360 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:50:00,377 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:50:00,457 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 79 proven. 0 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2019-11-23 22:50:00,458 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1839837024] [2019-11-23 22:50:00,458 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-23 22:50:00,458 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-23 22:50:00,458 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1664515683] [2019-11-23 22:50:00,459 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-23 22:50:00,459 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:50:00,459 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-23 22:50:00,459 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:50:00,459 INFO L87 Difference]: Start difference. First operand 5422 states and 6526 transitions. Second operand 3 states. [2019-11-23 22:50:00,632 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:50:00,632 INFO L93 Difference]: Finished difference Result 8854 states and 10720 transitions. [2019-11-23 22:50:00,632 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-23 22:50:00,632 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 180 [2019-11-23 22:50:00,633 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:50:00,636 INFO L225 Difference]: With dead ends: 8854 [2019-11-23 22:50:00,636 INFO L226 Difference]: Without dead ends: 3708 [2019-11-23 22:50:00,638 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:50:00,640 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3708 states. [2019-11-23 22:50:00,732 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3708 to 3100. [2019-11-23 22:50:00,733 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3100 states. [2019-11-23 22:50:00,735 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3100 states to 3100 states and 3693 transitions. [2019-11-23 22:50:00,735 INFO L78 Accepts]: Start accepts. Automaton has 3100 states and 3693 transitions. Word has length 180 [2019-11-23 22:50:00,736 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:50:00,736 INFO L462 AbstractCegarLoop]: Abstraction has 3100 states and 3693 transitions. [2019-11-23 22:50:00,736 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-23 22:50:00,736 INFO L276 IsEmpty]: Start isEmpty. Operand 3100 states and 3693 transitions. [2019-11-23 22:50:00,738 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 181 [2019-11-23 22:50:00,738 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:50:00,738 INFO L410 BasicCegarLoop]: trace histogram [6, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:50:00,738 INFO L410 AbstractCegarLoop]: === Iteration 34 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:50:00,738 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:50:00,738 INFO L82 PathProgramCache]: Analyzing trace with hash -1037700862, now seen corresponding path program 1 times [2019-11-23 22:50:00,739 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:50:00,739 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1156205233] [2019-11-23 22:50:00,739 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:50:00,750 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:50:00,795 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 91 proven. 0 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2019-11-23 22:50:00,795 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1156205233] [2019-11-23 22:50:00,795 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-23 22:50:00,795 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-23 22:50:00,795 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [830753896] [2019-11-23 22:50:00,796 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-23 22:50:00,796 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:50:00,796 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-23 22:50:00,796 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-23 22:50:00,797 INFO L87 Difference]: Start difference. First operand 3100 states and 3693 transitions. Second operand 4 states. [2019-11-23 22:50:00,946 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:50:00,946 INFO L93 Difference]: Finished difference Result 4701 states and 5585 transitions. [2019-11-23 22:50:00,947 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-23 22:50:00,947 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 180 [2019-11-23 22:50:00,948 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:50:00,950 INFO L225 Difference]: With dead ends: 4701 [2019-11-23 22:50:00,950 INFO L226 Difference]: Without dead ends: 1877 [2019-11-23 22:50:00,953 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-23 22:50:00,954 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1877 states. [2019-11-23 22:50:01,040 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1877 to 1590. [2019-11-23 22:50:01,040 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1590 states. [2019-11-23 22:50:01,042 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1590 states to 1590 states and 1853 transitions. [2019-11-23 22:50:01,042 INFO L78 Accepts]: Start accepts. Automaton has 1590 states and 1853 transitions. Word has length 180 [2019-11-23 22:50:01,043 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:50:01,043 INFO L462 AbstractCegarLoop]: Abstraction has 1590 states and 1853 transitions. [2019-11-23 22:50:01,043 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-23 22:50:01,043 INFO L276 IsEmpty]: Start isEmpty. Operand 1590 states and 1853 transitions. [2019-11-23 22:50:01,044 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 185 [2019-11-23 22:50:01,044 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:50:01,045 INFO L410 BasicCegarLoop]: trace histogram [6, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:50:01,045 INFO L410 AbstractCegarLoop]: === Iteration 35 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:50:01,045 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:50:01,045 INFO L82 PathProgramCache]: Analyzing trace with hash 1351947795, now seen corresponding path program 1 times [2019-11-23 22:50:01,047 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:50:01,050 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [747481478] [2019-11-23 22:50:01,051 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:50:01,065 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:50:01,109 INFO L134 CoverageAnalysis]: Checked inductivity of 107 backedges. 100 proven. 0 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2019-11-23 22:50:01,109 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [747481478] [2019-11-23 22:50:01,110 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-23 22:50:01,110 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-23 22:50:01,110 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [177536427] [2019-11-23 22:50:01,110 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-23 22:50:01,111 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:50:01,111 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-23 22:50:01,111 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:50:01,111 INFO L87 Difference]: Start difference. First operand 1590 states and 1853 transitions. Second operand 3 states. [2019-11-23 22:50:01,299 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:50:01,300 INFO L93 Difference]: Finished difference Result 4058 states and 4759 transitions. [2019-11-23 22:50:01,300 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-23 22:50:01,300 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 184 [2019-11-23 22:50:01,301 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:50:01,304 INFO L225 Difference]: With dead ends: 4058 [2019-11-23 22:50:01,304 INFO L226 Difference]: Without dead ends: 2438 [2019-11-23 22:50:01,306 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:50:01,308 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2438 states. [2019-11-23 22:50:01,453 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2438 to 2426. [2019-11-23 22:50:01,453 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2426 states. [2019-11-23 22:50:01,464 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2426 states to 2426 states and 2829 transitions. [2019-11-23 22:50:01,465 INFO L78 Accepts]: Start accepts. Automaton has 2426 states and 2829 transitions. Word has length 184 [2019-11-23 22:50:01,465 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:50:01,465 INFO L462 AbstractCegarLoop]: Abstraction has 2426 states and 2829 transitions. [2019-11-23 22:50:01,465 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-23 22:50:01,465 INFO L276 IsEmpty]: Start isEmpty. Operand 2426 states and 2829 transitions. [2019-11-23 22:50:01,467 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 185 [2019-11-23 22:50:01,467 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:50:01,467 INFO L410 BasicCegarLoop]: trace histogram [6, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:50:01,468 INFO L410 AbstractCegarLoop]: === Iteration 36 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:50:01,468 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:50:01,468 INFO L82 PathProgramCache]: Analyzing trace with hash 1047126543, now seen corresponding path program 1 times [2019-11-23 22:50:01,468 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:50:01,468 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1629669403] [2019-11-23 22:50:01,468 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:50:01,478 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:50:01,520 INFO L134 CoverageAnalysis]: Checked inductivity of 107 backedges. 93 proven. 0 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2019-11-23 22:50:01,520 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1629669403] [2019-11-23 22:50:01,520 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-23 22:50:01,520 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-23 22:50:01,521 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1889325412] [2019-11-23 22:50:01,521 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-23 22:50:01,521 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:50:01,521 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-23 22:50:01,522 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:50:01,522 INFO L87 Difference]: Start difference. First operand 2426 states and 2829 transitions. Second operand 3 states. [2019-11-23 22:50:01,611 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:50:01,611 INFO L93 Difference]: Finished difference Result 3380 states and 3910 transitions. [2019-11-23 22:50:01,612 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-23 22:50:01,612 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 184 [2019-11-23 22:50:01,612 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:50:01,613 INFO L225 Difference]: With dead ends: 3380 [2019-11-23 22:50:01,613 INFO L226 Difference]: Without dead ends: 1220 [2019-11-23 22:50:01,615 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:50:01,616 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1220 states. [2019-11-23 22:50:01,676 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1220 to 1198. [2019-11-23 22:50:01,676 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1198 states. [2019-11-23 22:50:01,678 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1198 states to 1198 states and 1326 transitions. [2019-11-23 22:50:01,678 INFO L78 Accepts]: Start accepts. Automaton has 1198 states and 1326 transitions. Word has length 184 [2019-11-23 22:50:01,679 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:50:01,679 INFO L462 AbstractCegarLoop]: Abstraction has 1198 states and 1326 transitions. [2019-11-23 22:50:01,679 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-23 22:50:01,679 INFO L276 IsEmpty]: Start isEmpty. Operand 1198 states and 1326 transitions. [2019-11-23 22:50:01,680 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 186 [2019-11-23 22:50:01,680 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:50:01,681 INFO L410 BasicCegarLoop]: trace histogram [6, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:50:01,681 INFO L410 AbstractCegarLoop]: === Iteration 37 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:50:01,681 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:50:01,681 INFO L82 PathProgramCache]: Analyzing trace with hash -1330592792, now seen corresponding path program 1 times [2019-11-23 22:50:01,682 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:50:01,682 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [184739684] [2019-11-23 22:50:01,682 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:50:01,694 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:50:01,740 INFO L134 CoverageAnalysis]: Checked inductivity of 107 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 107 trivial. 0 not checked. [2019-11-23 22:50:01,741 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [184739684] [2019-11-23 22:50:01,741 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-23 22:50:01,741 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-23 22:50:01,742 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [122153255] [2019-11-23 22:50:01,742 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-23 22:50:01,742 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:50:01,743 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-23 22:50:01,743 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:50:01,743 INFO L87 Difference]: Start difference. First operand 1198 states and 1326 transitions. Second operand 3 states. [2019-11-23 22:50:01,844 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:50:01,844 INFO L93 Difference]: Finished difference Result 1202 states and 1331 transitions. [2019-11-23 22:50:01,845 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-23 22:50:01,845 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 185 [2019-11-23 22:50:01,845 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:50:01,847 INFO L225 Difference]: With dead ends: 1202 [2019-11-23 22:50:01,847 INFO L226 Difference]: Without dead ends: 1200 [2019-11-23 22:50:01,848 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:50:01,849 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1200 states. [2019-11-23 22:50:01,956 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1200 to 1200. [2019-11-23 22:50:01,957 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1200 states. [2019-11-23 22:50:01,959 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1200 states to 1200 states and 1328 transitions. [2019-11-23 22:50:01,959 INFO L78 Accepts]: Start accepts. Automaton has 1200 states and 1328 transitions. Word has length 185 [2019-11-23 22:50:01,960 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:50:01,960 INFO L462 AbstractCegarLoop]: Abstraction has 1200 states and 1328 transitions. [2019-11-23 22:50:01,960 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-23 22:50:01,960 INFO L276 IsEmpty]: Start isEmpty. Operand 1200 states and 1328 transitions. [2019-11-23 22:50:01,962 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 186 [2019-11-23 22:50:01,962 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:50:01,963 INFO L410 BasicCegarLoop]: trace histogram [6, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:50:01,963 INFO L410 AbstractCegarLoop]: === Iteration 38 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:50:01,963 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:50:01,964 INFO L82 PathProgramCache]: Analyzing trace with hash -1330591190, now seen corresponding path program 1 times [2019-11-23 22:50:01,964 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:50:01,964 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [794182118] [2019-11-23 22:50:01,965 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:50:02,012 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:50:02,248 INFO L134 CoverageAnalysis]: Checked inductivity of 107 backedges. 81 proven. 15 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2019-11-23 22:50:02,248 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [794182118] [2019-11-23 22:50:02,249 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2091332551] [2019-11-23 22:50:02,249 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-11-23 22:50:02,361 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:50:02,364 INFO L255 TraceCheckSpWp]: Trace formula consists of 499 conjuncts, 19 conjunts are in the unsatisfiable core [2019-11-23 22:50:02,389 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2019-11-23 22:50:02,525 INFO L134 CoverageAnalysis]: Checked inductivity of 107 backedges. 81 proven. 15 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2019-11-23 22:50:02,526 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-11-23 22:50:02,526 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10] total 10 [2019-11-23 22:50:02,526 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [734383263] [2019-11-23 22:50:02,527 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-11-23 22:50:02,527 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:50:02,527 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-11-23 22:50:02,527 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=73, Unknown=0, NotChecked=0, Total=90 [2019-11-23 22:50:02,527 INFO L87 Difference]: Start difference. First operand 1200 states and 1328 transitions. Second operand 10 states. [2019-11-23 22:50:03,017 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:50:03,017 INFO L93 Difference]: Finished difference Result 2336 states and 2602 transitions. [2019-11-23 22:50:03,018 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2019-11-23 22:50:03,018 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 185 [2019-11-23 22:50:03,018 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:50:03,022 INFO L225 Difference]: With dead ends: 2336 [2019-11-23 22:50:03,022 INFO L226 Difference]: Without dead ends: 1732 [2019-11-23 22:50:03,023 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 206 GetRequests, 188 SyntacticMatches, 2 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 21 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=64, Invalid=242, Unknown=0, NotChecked=0, Total=306 [2019-11-23 22:50:03,025 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1732 states. [2019-11-23 22:50:03,156 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1732 to 1546. [2019-11-23 22:50:03,156 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1546 states. [2019-11-23 22:50:03,159 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1546 states to 1546 states and 1714 transitions. [2019-11-23 22:50:03,159 INFO L78 Accepts]: Start accepts. Automaton has 1546 states and 1714 transitions. Word has length 185 [2019-11-23 22:50:03,159 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:50:03,159 INFO L462 AbstractCegarLoop]: Abstraction has 1546 states and 1714 transitions. [2019-11-23 22:50:03,159 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-11-23 22:50:03,160 INFO L276 IsEmpty]: Start isEmpty. Operand 1546 states and 1714 transitions. [2019-11-23 22:50:03,162 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 187 [2019-11-23 22:50:03,162 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:50:03,162 INFO L410 BasicCegarLoop]: trace histogram [6, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:50:03,370 WARN L499 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 2 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-11-23 22:50:03,370 INFO L410 AbstractCegarLoop]: === Iteration 39 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:50:03,371 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:50:03,371 INFO L82 PathProgramCache]: Analyzing trace with hash 1701344696, now seen corresponding path program 1 times [2019-11-23 22:50:03,371 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:50:03,371 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [565070671] [2019-11-23 22:50:03,372 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:50:03,401 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-11-23 22:50:03,425 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-11-23 22:50:03,540 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-11-23 22:50:03,540 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-11-23 22:50:03,775 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 23.11 10:50:03 BoogieIcfgContainer [2019-11-23 22:50:03,776 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-11-23 22:50:03,779 INFO L168 Benchmark]: Toolchain (without parser) took 28342.94 ms. Allocated memory was 142.1 MB in the beginning and 2.0 GB in the end (delta: 1.8 GB). Free memory was 98.9 MB in the beginning and 425.6 MB in the end (delta: -326.7 MB). Peak memory consumption was 1.5 GB. Max. memory is 7.1 GB. [2019-11-23 22:50:03,779 INFO L168 Benchmark]: CDTParser took 0.24 ms. Allocated memory is still 142.1 MB. Free memory was 118.4 MB in the beginning and 118.2 MB in the end (delta: 209.7 kB). Peak memory consumption was 209.7 kB. Max. memory is 7.1 GB. [2019-11-23 22:50:03,780 INFO L168 Benchmark]: CACSL2BoogieTranslator took 493.70 ms. Allocated memory was 142.1 MB in the beginning and 199.2 MB in the end (delta: 57.1 MB). Free memory was 98.7 MB in the beginning and 175.0 MB in the end (delta: -76.3 MB). Peak memory consumption was 21.8 MB. Max. memory is 7.1 GB. [2019-11-23 22:50:03,780 INFO L168 Benchmark]: Boogie Procedure Inliner took 46.11 ms. Allocated memory is still 199.2 MB. Free memory was 175.0 MB in the beginning and 172.1 MB in the end (delta: 2.8 MB). Peak memory consumption was 2.8 MB. Max. memory is 7.1 GB. [2019-11-23 22:50:03,780 INFO L168 Benchmark]: Boogie Preprocessor took 60.60 ms. Allocated memory is still 199.2 MB. Free memory was 172.1 MB in the beginning and 169.6 MB in the end (delta: 2.5 MB). Peak memory consumption was 2.5 MB. Max. memory is 7.1 GB. [2019-11-23 22:50:03,781 INFO L168 Benchmark]: RCFGBuilder took 752.31 ms. Allocated memory is still 199.2 MB. Free memory was 169.6 MB in the beginning and 129.8 MB in the end (delta: 39.8 MB). Peak memory consumption was 39.8 MB. Max. memory is 7.1 GB. [2019-11-23 22:50:03,781 INFO L168 Benchmark]: TraceAbstraction took 26976.44 ms. Allocated memory was 199.2 MB in the beginning and 2.0 GB in the end (delta: 1.8 GB). Free memory was 129.1 MB in the beginning and 425.6 MB in the end (delta: -296.5 MB). Peak memory consumption was 1.5 GB. Max. memory is 7.1 GB. [2019-11-23 22:50:03,783 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.24 ms. Allocated memory is still 142.1 MB. Free memory was 118.4 MB in the beginning and 118.2 MB in the end (delta: 209.7 kB). Peak memory consumption was 209.7 kB. Max. memory is 7.1 GB. * CACSL2BoogieTranslator took 493.70 ms. Allocated memory was 142.1 MB in the beginning and 199.2 MB in the end (delta: 57.1 MB). Free memory was 98.7 MB in the beginning and 175.0 MB in the end (delta: -76.3 MB). Peak memory consumption was 21.8 MB. Max. memory is 7.1 GB. * Boogie Procedure Inliner took 46.11 ms. Allocated memory is still 199.2 MB. Free memory was 175.0 MB in the beginning and 172.1 MB in the end (delta: 2.8 MB). Peak memory consumption was 2.8 MB. Max. memory is 7.1 GB. * Boogie Preprocessor took 60.60 ms. Allocated memory is still 199.2 MB. Free memory was 172.1 MB in the beginning and 169.6 MB in the end (delta: 2.5 MB). Peak memory consumption was 2.5 MB. Max. memory is 7.1 GB. * RCFGBuilder took 752.31 ms. Allocated memory is still 199.2 MB. Free memory was 169.6 MB in the beginning and 129.8 MB in the end (delta: 39.8 MB). Peak memory consumption was 39.8 MB. Max. memory is 7.1 GB. * TraceAbstraction took 26976.44 ms. Allocated memory was 199.2 MB in the beginning and 2.0 GB in the end (delta: 1.8 GB). Free memory was 129.1 MB in the beginning and 425.6 MB in the end (delta: -296.5 MB). Peak memory consumption was 1.5 GB. Max. memory is 7.1 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 13]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L18] int c ; [L19] int c_t ; [L20] int c_req_up ; [L21] int p_in ; [L22] int p_out ; [L23] int wl_st ; [L24] int c1_st ; [L25] int c2_st ; [L26] int wb_st ; [L27] int r_st ; [L28] int wl_i ; [L29] int c1_i ; [L30] int c2_i ; [L31] int wb_i ; [L32] int r_i ; [L33] int wl_pc ; [L34] int c1_pc ; [L35] int c2_pc ; [L36] int wb_pc ; [L37] int e_e ; [L38] int e_f ; [L39] int e_g ; [L40] int e_c ; [L41] int e_p_in ; [L42] int e_wl ; [L48] int d ; [L49] int data ; [L50] int processed ; [L51] static int t_b ; VAL [c=0, c1_i=0, c1_pc=0, c1_st=0, c2_i=0, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=0, e_e=0, e_f=0, e_g=0, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=0, t_b=0, wb_i=0, wb_pc=0, wb_st=0, wl_i=0, wl_pc=0, wl_st=0] [L691] int __retres1 ; [L695] e_wl = 2 [L696] e_c = e_wl [L697] e_g = e_c [L698] e_f = e_g [L699] e_e = e_f [L700] wl_pc = 0 [L701] c1_pc = 0 [L702] c2_pc = 0 [L703] wb_pc = 0 [L704] wb_i = 1 [L705] c2_i = wb_i [L706] c1_i = c2_i [L707] wl_i = c1_i [L708] r_i = 0 [L709] c_req_up = 0 [L710] d = 0 [L711] c = 0 [L402] int kernel_st ; [L405] kernel_st = 0 VAL [c=0, c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L406] COND FALSE !((int )c_req_up == 1) VAL [c=0, c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L417] COND TRUE (int )wl_i == 1 [L418] wl_st = 0 VAL [c=0, c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L422] COND TRUE (int )c1_i == 1 [L423] c1_st = 0 VAL [c=0, c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L427] COND TRUE (int )c2_i == 1 [L428] c2_st = 0 VAL [c=0, c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L432] COND TRUE (int )wb_i == 1 [L433] wb_st = 0 VAL [c=0, c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L437] COND FALSE !((int )r_i == 1) [L440] r_st = 2 VAL [c=0, c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L442] COND FALSE !((int )e_f == 0) VAL [c=0, c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L447] COND FALSE !((int )e_g == 0) VAL [c=0, c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L452] COND FALSE !((int )e_e == 0) VAL [c=0, c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L457] COND FALSE !((int )e_c == 0) VAL [c=0, c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L462] COND FALSE !((int )e_wl == 0) VAL [c=0, c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L467] COND FALSE !((int )wl_pc == 1) VAL [c=0, c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L475] COND FALSE !((int )wl_pc == 2) VAL [c=0, c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L485] COND FALSE !((int )c1_pc == 1) VAL [c=0, c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L494] COND FALSE !((int )c2_pc == 1) VAL [c=0, c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L503] COND FALSE !((int )wb_pc == 1) VAL [c=0, c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L512] COND FALSE !((int )e_c == 1) VAL [c=0, c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L517] COND FALSE !((int )e_e == 1) VAL [c=0, c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L522] COND FALSE !((int )e_f == 1) VAL [c=0, c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L527] COND FALSE !((int )e_g == 1) VAL [c=0, c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L532] COND FALSE !((int )e_c == 1) VAL [c=0, c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L537] COND FALSE !((int )e_wl == 1) VAL [c=0, c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L543] COND TRUE 1 VAL [c=0, c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L546] kernel_st = 1 [L288] int tmp ; [L289] int tmp___0 ; [L290] int tmp___1 ; [L291] int tmp___2 ; [L292] int tmp___3 ; VAL [c=0, c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L296] COND TRUE 1 VAL [c=0, c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L298] COND TRUE (int )wl_st == 0 VAL [c=0, c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L319] COND TRUE (int )wl_st == 0 [L321] tmp = __VERIFIER_nondet_int() [L323] COND TRUE \read(tmp) [L325] wl_st = 1 [L53] int t ; VAL [c=0, c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=1] [L56] COND TRUE (int )wl_pc == 0 VAL [c=0, c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=1] [L70] wl_st = 2 [L71] wl_pc = 1 [L72] e_wl = 0 VAL [c=0, c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=1, wl_st=2] [L334] COND TRUE (int )c1_st == 0 [L336] tmp___0 = __VERIFIER_nondet_int() [L338] COND TRUE \read(tmp___0) [L340] c1_st = 1 VAL [c=0, c1_i=1, c1_pc=0, c1_st=1, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=1, wl_st=2] [L139] COND TRUE (int )c1_pc == 0 VAL [c=0, c1_i=1, c1_pc=0, c1_st=1, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=1, wl_st=2] [L150] COND TRUE 1 VAL [c=0, c1_i=1, c1_pc=0, c1_st=1, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=1, wl_st=2] [L152] c1_st = 2 [L153] c1_pc = 1 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=1, wl_st=2] [L349] COND TRUE (int )c2_st == 0 [L351] tmp___1 = __VERIFIER_nondet_int() [L353] COND TRUE \read(tmp___1) [L355] c2_st = 1 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=0, c2_st=1, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=1, wl_st=2] [L184] COND TRUE (int )c2_pc == 0 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=0, c2_st=1, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=1, wl_st=2] [L195] COND TRUE 1 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=0, c2_st=1, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=1, wl_st=2] [L197] c2_st = 2 [L198] c2_pc = 1 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=1, wl_st=2] [L364] COND TRUE (int )wb_st == 0 [L366] tmp___2 = __VERIFIER_nondet_int() [L368] COND TRUE \read(tmp___2) [L370] wb_st = 1 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=1, wl_i=1, wl_pc=1, wl_st=2] [L229] COND TRUE (int )wb_pc == 0 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=1, wl_i=1, wl_pc=1, wl_st=2] [L240] COND TRUE 1 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=1, wl_i=1, wl_pc=1, wl_st=2] [L242] wb_st = 2 [L243] wb_pc = 1 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=2] [L379] COND FALSE !((int )r_st == 0) VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=2] [L296] COND TRUE 1 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=2] [L298] COND FALSE !((int )wl_st == 0) VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=2] [L301] COND FALSE !((int )c1_st == 0) VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=2] [L304] COND FALSE !((int )c2_st == 0) VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=2] [L307] COND FALSE !((int )wb_st == 0) VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=2] [L310] COND FALSE !((int )r_st == 0) VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=2] [L549] kernel_st = 2 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=2] [L550] COND FALSE !((int )c_req_up == 1) VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=2] [L561] kernel_st = 3 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=2] [L562] COND FALSE !((int )e_f == 0) VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=2] [L567] COND FALSE !((int )e_g == 0) VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=2] [L572] COND FALSE !((int )e_e == 0) VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=2] [L577] COND FALSE !((int )e_c == 0) VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=2] [L582] COND TRUE (int )e_wl == 0 [L583] e_wl = 1 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=1, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=2] [L587] COND TRUE (int )wl_pc == 1 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=1, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=2] [L588] COND TRUE (int )e_wl == 1 [L589] wl_st = 0 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=1, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=0] [L605] COND TRUE (int )c1_pc == 1 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=1, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=0] [L606] COND FALSE !((int )e_f == 1) VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=1, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=0] [L614] COND TRUE (int )c2_pc == 1 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=1, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=0] [L615] COND FALSE !((int )e_f == 1) VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=1, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=0] [L623] COND TRUE (int )wb_pc == 1 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=1, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=0] [L624] COND FALSE !((int )e_g == 1) VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=1, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=0] [L632] COND FALSE !((int )e_c == 1) VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=1, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=0] [L637] COND FALSE !((int )e_e == 1) VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=1, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=0] [L642] COND FALSE !((int )e_f == 1) VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=1, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=0] [L647] COND FALSE !((int )e_g == 1) VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=1, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=0] [L652] COND FALSE !((int )e_c == 1) VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=1, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=0] [L657] COND TRUE (int )e_wl == 1 [L658] e_wl = 2 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=0] [L662] COND TRUE (int )wl_st == 0 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=0] [L543] COND TRUE 1 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=0] [L546] kernel_st = 1 [L288] int tmp ; [L289] int tmp___0 ; [L290] int tmp___1 ; [L291] int tmp___2 ; [L292] int tmp___3 ; VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=0] [L296] COND TRUE 1 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=0] [L298] COND TRUE (int )wl_st == 0 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=0] [L319] COND TRUE (int )wl_st == 0 [L321] tmp = __VERIFIER_nondet_int() [L323] COND TRUE \read(tmp) [L325] wl_st = 1 [L53] int t ; VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=1] [L56] COND FALSE !((int )wl_pc == 0) VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=1] [L59] COND FALSE !((int )wl_pc == 2) VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=1] [L62] COND TRUE (int )wl_pc == 1 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=1] [L77] COND TRUE 1 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=1] [L79] t = d [L80] data = d [L81] processed = 0 [L82] e_f = 1 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=1, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=1] [L83] COND TRUE (int )c1_pc == 1 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=1, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=1] [L84] COND TRUE (int )e_f == 1 [L85] c1_st = 0 VAL [c=0, c1_i=1, c1_pc=1, c1_st=0, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=1, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=1] [L92] COND TRUE (int )c2_pc == 1 VAL [c=0, c1_i=1, c1_pc=1, c1_st=0, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=1, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=1] [L93] COND TRUE (int )e_f == 1 [L94] c2_st = 0 VAL [c=0, c1_i=1, c1_pc=1, c1_st=0, c2_i=1, c2_pc=1, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=1, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=1] [L101] e_f = 2 [L102] wl_st = 2 [L103] wl_pc = 2 [L104] t_b = t VAL [c=0, c1_i=1, c1_pc=1, c1_st=0, c2_i=1, c2_pc=1, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L334] COND TRUE (int )c1_st == 0 [L336] tmp___0 = __VERIFIER_nondet_int() [L338] COND TRUE \read(tmp___0) [L340] c1_st = 1 VAL [c=0, c1_i=1, c1_pc=1, c1_st=1, c2_i=1, c2_pc=1, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L139] COND FALSE !((int )c1_pc == 0) VAL [c=0, c1_i=1, c1_pc=1, c1_st=1, c2_i=1, c2_pc=1, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L142] COND TRUE (int )c1_pc == 1 VAL [c=0, c1_i=1, c1_pc=1, c1_st=1, c2_i=1, c2_pc=1, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L157] COND TRUE ! processed [L158] data += 1 [L159] e_g = 1 VAL [c=0, c1_i=1, c1_pc=1, c1_st=1, c2_i=1, c2_pc=1, c2_st=0, c_req_up=0, c_t=0, d=0, data=1, e_c=2, e_e=2, e_f=2, e_g=1, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L160] COND TRUE (int )wb_pc == 1 VAL [c=0, c1_i=1, c1_pc=1, c1_st=1, c2_i=1, c2_pc=1, c2_st=0, c_req_up=0, c_t=0, d=0, data=1, e_c=2, e_e=2, e_f=2, e_g=1, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L161] COND TRUE (int )e_g == 1 [L162] wb_st = 0 VAL [c=0, c1_i=1, c1_pc=1, c1_st=1, c2_i=1, c2_pc=1, c2_st=0, c_req_up=0, c_t=0, d=0, data=1, e_c=2, e_e=2, e_f=2, e_g=1, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=0, wl_i=1, wl_pc=2, wl_st=2] [L169] e_g = 2 VAL [c=0, c1_i=1, c1_pc=1, c1_st=1, c2_i=1, c2_pc=1, c2_st=0, c_req_up=0, c_t=0, d=0, data=1, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=0, wl_i=1, wl_pc=2, wl_st=2] [L150] COND TRUE 1 VAL [c=0, c1_i=1, c1_pc=1, c1_st=1, c2_i=1, c2_pc=1, c2_st=0, c_req_up=0, c_t=0, d=0, data=1, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=0, wl_i=1, wl_pc=2, wl_st=2] [L152] c1_st = 2 [L153] c1_pc = 1 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=0, c_req_up=0, c_t=0, d=0, data=1, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=0, wl_i=1, wl_pc=2, wl_st=2] [L349] COND TRUE (int )c2_st == 0 [L351] tmp___1 = __VERIFIER_nondet_int() [L353] COND TRUE \read(tmp___1) [L355] c2_st = 1 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=1, c_req_up=0, c_t=0, d=0, data=1, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=0, wl_i=1, wl_pc=2, wl_st=2] [L184] COND FALSE !((int )c2_pc == 0) VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=1, c_req_up=0, c_t=0, d=0, data=1, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=0, wl_i=1, wl_pc=2, wl_st=2] [L187] COND TRUE (int )c2_pc == 1 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=1, c_req_up=0, c_t=0, d=0, data=1, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=0, wl_i=1, wl_pc=2, wl_st=2] [L202] COND TRUE ! processed [L203] data += 1 [L204] e_g = 1 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=1, c_req_up=0, c_t=0, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=1, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=0, wl_i=1, wl_pc=2, wl_st=2] [L205] COND TRUE (int )wb_pc == 1 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=1, c_req_up=0, c_t=0, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=1, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=0, wl_i=1, wl_pc=2, wl_st=2] [L206] COND TRUE (int )e_g == 1 [L207] wb_st = 0 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=1, c_req_up=0, c_t=0, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=1, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=0, wl_i=1, wl_pc=2, wl_st=2] [L214] e_g = 2 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=1, c_req_up=0, c_t=0, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=0, wl_i=1, wl_pc=2, wl_st=2] [L195] COND TRUE 1 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=1, c_req_up=0, c_t=0, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=0, wl_i=1, wl_pc=2, wl_st=2] [L197] c2_st = 2 [L198] c2_pc = 1 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=0, wl_i=1, wl_pc=2, wl_st=2] [L364] COND TRUE (int )wb_st == 0 [L366] tmp___2 = __VERIFIER_nondet_int() [L368] COND TRUE \read(tmp___2) [L370] wb_st = 1 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=1, wl_i=1, wl_pc=2, wl_st=2] [L229] COND FALSE !((int )wb_pc == 0) VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=1, wl_i=1, wl_pc=2, wl_st=2] [L232] COND TRUE (int )wb_pc == 1 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=1, wl_i=1, wl_pc=2, wl_st=2] [L247] c_t = data [L248] c_req_up = 1 [L249] processed = 1 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=1, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=1, wl_i=1, wl_pc=2, wl_st=2] [L240] COND TRUE 1 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=1, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=1, wl_i=1, wl_pc=2, wl_st=2] [L242] wb_st = 2 [L243] wb_pc = 1 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=1, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L379] COND FALSE !((int )r_st == 0) VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=1, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L296] COND TRUE 1 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=1, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L298] COND FALSE !((int )wl_st == 0) VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=1, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L301] COND FALSE !((int )c1_st == 0) VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=1, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L304] COND FALSE !((int )c2_st == 0) VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=1, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L307] COND FALSE !((int )wb_st == 0) VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=1, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L310] COND FALSE !((int )r_st == 0) VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=1, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L549] kernel_st = 2 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=1, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L550] COND TRUE (int )c_req_up == 1 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=1, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L551] COND TRUE c != c_t [L552] c = c_t [L553] e_c = 0 VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=1, c_t=2, d=0, data=2, e_c=0, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L557] c_req_up = 0 VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=0, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L561] kernel_st = 3 VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=0, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L562] COND FALSE !((int )e_f == 0) VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=0, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L567] COND FALSE !((int )e_g == 0) VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=0, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L572] COND FALSE !((int )e_e == 0) VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=0, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L577] COND TRUE (int )e_c == 0 [L578] e_c = 1 VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=1, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L582] COND FALSE !((int )e_wl == 0) VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=1, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L587] COND FALSE !((int )wl_pc == 1) VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=1, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L595] COND TRUE (int )wl_pc == 2 VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=1, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L596] COND FALSE !((int )e_e == 1) VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=1, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L605] COND TRUE (int )c1_pc == 1 VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=1, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L606] COND FALSE !((int )e_f == 1) VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=1, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L614] COND TRUE (int )c2_pc == 1 VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=1, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L615] COND FALSE !((int )e_f == 1) VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=1, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L623] COND TRUE (int )wb_pc == 1 VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=1, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L624] COND FALSE !((int )e_g == 1) VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=1, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L632] COND TRUE (int )e_c == 1 [L633] r_st = 0 VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=1, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L637] COND FALSE !((int )e_e == 1) VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=1, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L642] COND FALSE !((int )e_f == 1) VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=1, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L647] COND FALSE !((int )e_g == 1) VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=1, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L652] COND TRUE (int )e_c == 1 [L653] e_c = 2 VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L657] COND FALSE !((int )e_wl == 1) VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L662] COND FALSE !((int )wl_st == 0) VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L665] COND FALSE !((int )c1_st == 0) VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L668] COND FALSE !((int )c2_st == 0) VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L671] COND FALSE !((int )wb_st == 0) VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L674] COND TRUE (int )r_st == 0 VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L543] COND TRUE 1 VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L546] kernel_st = 1 [L288] int tmp ; [L289] int tmp___0 ; [L290] int tmp___1 ; [L291] int tmp___2 ; [L292] int tmp___3 ; VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L296] COND TRUE 1 VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L298] COND FALSE !((int )wl_st == 0) VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L301] COND FALSE !((int )c1_st == 0) VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L304] COND FALSE !((int )c2_st == 0) VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L307] COND FALSE !((int )wb_st == 0) VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L310] COND TRUE (int )r_st == 0 VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L319] COND FALSE !((int )wl_st == 0) VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L334] COND FALSE !((int )c1_st == 0) VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L349] COND FALSE !((int )c2_st == 0) VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L364] COND FALSE !((int )wb_st == 0) VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L379] COND TRUE (int )r_st == 0 [L381] tmp___3 = __VERIFIER_nondet_int() [L383] COND TRUE \read(tmp___3) [L385] r_st = 1 [L261] d = c [L262] e_e = 1 VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=2, data=2, e_c=2, e_e=1, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=1, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L263] COND FALSE !((int )wl_pc == 1) VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=2, data=2, e_c=2, e_e=1, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=1, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L271] COND TRUE (int )wl_pc == 2 VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=2, data=2, e_c=2, e_e=1, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=1, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L272] COND TRUE (int )e_e == 1 [L273] wl_st = 0 VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=2, data=2, e_c=2, e_e=1, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=1, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=0] [L281] e_e = 2 [L282] r_st = 2 VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=2, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=0] [L296] COND TRUE 1 VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=2, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=0] [L298] COND TRUE (int )wl_st == 0 VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=2, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=0] [L319] COND TRUE (int )wl_st == 0 [L321] tmp = __VERIFIER_nondet_int() [L323] COND TRUE \read(tmp) [L325] wl_st = 1 [L53] int t ; VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=2, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=1] [L56] COND FALSE !((int )wl_pc == 0) VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=2, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=1] [L59] COND TRUE (int )wl_pc == 2 VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=2, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=1] [L108] t = t_b VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=2, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=1] [L109] COND FALSE !(d == t + 1) VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=2, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=1] [L112] COND TRUE d == t + 2 VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=2, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=1] [L120] COND FALSE !(d == t + 1) VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=2, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=1] [L13] __VERIFIER_error() VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=2, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=1] - StatisticsResult: Ultimate Automizer benchmark data CFG has 1 procedures, 129 locations, 2 error locations. Result: UNSAFE, OverallTime: 26.9s, OverallIterations: 39, TraceHistogramMax: 6, AutomataDifference: 12.2s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 8305 SDtfs, 6676 SDslu, 6853 SDs, 0 SdLazy, 904 SolverSat, 221 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 1.2s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 337 GetRequests, 266 SyntacticMatches, 4 SemanticMatches, 67 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 21 ImplicationChecksByTransitivity, 0.6s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=16823occurred in iteration=19, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 10.9s AutomataMinimizationTime, 38 MinimizatonAttempts, 9357 StatesRemovedByMinimization, 31 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.1s SsaConstructionTime, 0.5s SatisfiabilityAnalysisTime, 1.4s InterpolantComputationTime, 3918 NumberOfCodeBlocks, 3918 NumberOfCodeBlocksAsserted, 40 NumberOfCheckSat, 3693 ConstructedInterpolants, 0 QuantifiedInterpolants, 995189 SizeOfPredicates, 8 NumberOfNonLiveVariables, 499 ConjunctsInSsa, 19 ConjunctsInUnsatCore, 39 InterpolantComputations, 37 PerfectInterpolantSequences, 1373/1403 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...