/usr/bin/java -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata ./data -tc ../../../trunk/examples/toolchains/AutomizerCInline.xml -s ../../../trunk/examples/settings/default/automizer/svcomp-Reach-32bit-Automizer_Default.epf -i ../../../trunk/examples/svcomp/systemc/toy2.cil.c -------------------------------------------------------------------------------- This is Ultimate 0.1.24-6598664 [2019-11-23 22:49:53,824 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-11-23 22:49:53,826 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-11-23 22:49:53,842 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... 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[2019-11-23 22:49:53,851 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-11-23 22:49:53,852 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-11-23 22:49:53,853 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-11-23 22:49:53,854 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-11-23 22:49:53,854 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-11-23 22:49:53,855 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-11-23 22:49:53,857 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-11-23 22:49:53,859 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-11-23 22:49:53,861 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-11-23 22:49:53,862 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-11-23 22:49:53,863 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-11-23 22:49:53,864 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-11-23 22:49:53,866 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... 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[2019-11-23 22:49:53,876 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/default/automizer/svcomp-Reach-32bit-Automizer_Default.epf [2019-11-23 22:49:53,895 INFO L113 SettingsManager]: Loading preferences was successful [2019-11-23 22:49:53,896 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-11-23 22:49:53,898 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-11-23 22:49:53,898 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-11-23 22:49:53,899 INFO L138 SettingsManager]: * Use SBE=true [2019-11-23 22:49:53,899 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-11-23 22:49:53,899 INFO L138 SettingsManager]: * sizeof long=4 [2019-11-23 22:49:53,899 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-11-23 22:49:53,899 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-11-23 22:49:53,900 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-11-23 22:49:53,900 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-11-23 22:49:53,900 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-11-23 22:49:53,900 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-11-23 22:49:53,900 INFO L138 SettingsManager]: * Adapt memory model on pointer casts if necessary=true [2019-11-23 22:49:53,901 INFO L138 SettingsManager]: * sizeof long double=12 [2019-11-23 22:49:53,901 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-11-23 22:49:53,901 INFO L138 SettingsManager]: * Use constant arrays=true [2019-11-23 22:49:53,901 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-11-23 22:49:53,901 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-11-23 22:49:53,901 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-11-23 22:49:53,902 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-11-23 22:49:53,902 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-11-23 22:49:53,902 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-11-23 22:49:53,902 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-11-23 22:49:53,903 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-11-23 22:49:53,903 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-11-23 22:49:53,903 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-11-23 22:49:53,903 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-11-23 22:49:53,903 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-11-23 22:49:53,904 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2019-11-23 22:49:54,174 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-11-23 22:49:54,193 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-11-23 22:49:54,196 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-11-23 22:49:54,198 INFO L271 PluginConnector]: Initializing CDTParser... [2019-11-23 22:49:54,198 INFO L275 PluginConnector]: CDTParser initialized [2019-11-23 22:49:54,199 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/systemc/toy2.cil.c [2019-11-23 22:49:54,270 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/c8517ab1f/10c82d5c3aba404493179aded66692da/FLAGd3872e690 [2019-11-23 22:49:54,843 INFO L306 CDTParser]: Found 1 translation units. [2019-11-23 22:49:54,844 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/systemc/toy2.cil.c [2019-11-23 22:49:54,854 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/c8517ab1f/10c82d5c3aba404493179aded66692da/FLAGd3872e690 [2019-11-23 22:49:55,217 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/c8517ab1f/10c82d5c3aba404493179aded66692da [2019-11-23 22:49:55,228 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-11-23 22:49:55,229 INFO L131 ToolchainWalker]: Walking toolchain with 5 elements. [2019-11-23 22:49:55,230 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-11-23 22:49:55,231 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-11-23 22:49:55,237 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-11-23 22:49:55,246 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 23.11 10:49:55" (1/1) ... [2019-11-23 22:49:55,249 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@4096ed7f and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:49:55, skipping insertion in model container [2019-11-23 22:49:55,249 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 23.11 10:49:55" (1/1) ... [2019-11-23 22:49:55,257 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-11-23 22:49:55,311 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-11-23 22:49:55,618 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-11-23 22:49:55,627 INFO L203 MainTranslator]: Completed pre-run [2019-11-23 22:49:55,761 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-11-23 22:49:55,778 INFO L208 MainTranslator]: Completed translation [2019-11-23 22:49:55,779 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:49:55 WrapperNode [2019-11-23 22:49:55,779 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-11-23 22:49:55,780 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-11-23 22:49:55,780 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-11-23 22:49:55,780 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-11-23 22:49:55,789 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:49:55" (1/1) ... [2019-11-23 22:49:55,798 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:49:55" (1/1) ... [2019-11-23 22:49:55,847 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-11-23 22:49:55,848 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-11-23 22:49:55,848 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-11-23 22:49:55,848 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-11-23 22:49:55,858 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:49:55" (1/1) ... [2019-11-23 22:49:55,858 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:49:55" (1/1) ... [2019-11-23 22:49:55,865 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:49:55" (1/1) ... [2019-11-23 22:49:55,865 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:49:55" (1/1) ... [2019-11-23 22:49:55,879 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:49:55" (1/1) ... [2019-11-23 22:49:55,896 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:49:55" (1/1) ... [2019-11-23 22:49:55,898 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:49:55" (1/1) ... [2019-11-23 22:49:55,901 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-11-23 22:49:55,902 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-11-23 22:49:55,902 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-11-23 22:49:55,902 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-11-23 22:49:55,903 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:49:55" (1/1) ... No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-11-23 22:49:55,969 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-11-23 22:49:55,970 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-11-23 22:49:56,587 INFO L279 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-11-23 22:49:56,587 INFO L284 CfgBuilder]: Removed 26 assume(true) statements. [2019-11-23 22:49:56,589 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 23.11 10:49:56 BoogieIcfgContainer [2019-11-23 22:49:56,589 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-11-23 22:49:56,590 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-11-23 22:49:56,590 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-11-23 22:49:56,594 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-11-23 22:49:56,594 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 23.11 10:49:55" (1/3) ... [2019-11-23 22:49:56,595 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@1001489b and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 23.11 10:49:56, skipping insertion in model container [2019-11-23 22:49:56,595 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:49:55" (2/3) ... [2019-11-23 22:49:56,596 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@1001489b and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 23.11 10:49:56, skipping insertion in model container [2019-11-23 22:49:56,596 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 23.11 10:49:56" (3/3) ... [2019-11-23 22:49:56,598 INFO L109 eAbstractionObserver]: Analyzing ICFG toy2.cil.c [2019-11-23 22:49:56,608 INFO L153 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-11-23 22:49:56,615 INFO L165 ceAbstractionStarter]: Appying trace abstraction to program that has 1 error locations. [2019-11-23 22:49:56,628 INFO L249 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2019-11-23 22:49:56,660 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-11-23 22:49:56,660 INFO L374 AbstractCegarLoop]: Hoare is true [2019-11-23 22:49:56,660 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-11-23 22:49:56,661 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-11-23 22:49:56,661 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-11-23 22:49:56,662 INFO L378 AbstractCegarLoop]: Difference is false [2019-11-23 22:49:56,662 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-11-23 22:49:56,662 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-11-23 22:49:56,693 INFO L276 IsEmpty]: Start isEmpty. Operand 125 states. [2019-11-23 22:49:56,705 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2019-11-23 22:49:56,705 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:49:56,706 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:49:56,707 INFO L410 AbstractCegarLoop]: === Iteration 1 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:49:56,713 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:49:56,714 INFO L82 PathProgramCache]: Analyzing trace with hash 1633671955, now seen corresponding path program 1 times [2019-11-23 22:49:56,724 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:49:56,724 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1888776495] [2019-11-23 22:49:56,725 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:49:56,828 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:49:56,896 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-23 22:49:56,896 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1888776495] [2019-11-23 22:49:56,897 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-23 22:49:56,898 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-23 22:49:56,899 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [541292436] [2019-11-23 22:49:56,904 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-23 22:49:56,905 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:49:56,918 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-23 22:49:56,919 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:49:56,921 INFO L87 Difference]: Start difference. First operand 125 states. Second operand 3 states. [2019-11-23 22:49:56,969 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:49:56,969 INFO L93 Difference]: Finished difference Result 242 states and 449 transitions. [2019-11-23 22:49:56,970 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-23 22:49:56,971 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 35 [2019-11-23 22:49:56,971 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:49:56,982 INFO L225 Difference]: With dead ends: 242 [2019-11-23 22:49:56,983 INFO L226 Difference]: Without dead ends: 121 [2019-11-23 22:49:56,986 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:49:57,002 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 121 states. [2019-11-23 22:49:57,026 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 121 to 121. [2019-11-23 22:49:57,027 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 121 states. [2019-11-23 22:49:57,030 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 121 states to 121 states and 213 transitions. [2019-11-23 22:49:57,031 INFO L78 Accepts]: Start accepts. Automaton has 121 states and 213 transitions. Word has length 35 [2019-11-23 22:49:57,031 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:49:57,032 INFO L462 AbstractCegarLoop]: Abstraction has 121 states and 213 transitions. [2019-11-23 22:49:57,032 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-23 22:49:57,032 INFO L276 IsEmpty]: Start isEmpty. Operand 121 states and 213 transitions. [2019-11-23 22:49:57,034 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2019-11-23 22:49:57,034 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:49:57,034 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:49:57,034 INFO L410 AbstractCegarLoop]: === Iteration 2 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:49:57,035 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:49:57,035 INFO L82 PathProgramCache]: Analyzing trace with hash 1611039701, now seen corresponding path program 1 times [2019-11-23 22:49:57,035 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:49:57,039 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1668519949] [2019-11-23 22:49:57,039 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:49:57,061 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:49:57,108 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-23 22:49:57,108 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1668519949] [2019-11-23 22:49:57,109 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-23 22:49:57,109 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-23 22:49:57,109 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1308594348] [2019-11-23 22:49:57,111 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-23 22:49:57,111 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:49:57,112 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-23 22:49:57,112 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:49:57,112 INFO L87 Difference]: Start difference. First operand 121 states and 213 transitions. Second operand 3 states. [2019-11-23 22:49:57,138 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:49:57,138 INFO L93 Difference]: Finished difference Result 232 states and 410 transitions. [2019-11-23 22:49:57,139 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-23 22:49:57,139 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 35 [2019-11-23 22:49:57,139 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:49:57,141 INFO L225 Difference]: With dead ends: 232 [2019-11-23 22:49:57,141 INFO L226 Difference]: Without dead ends: 121 [2019-11-23 22:49:57,146 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:49:57,147 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 121 states. [2019-11-23 22:49:57,159 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 121 to 121. [2019-11-23 22:49:57,159 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 121 states. [2019-11-23 22:49:57,161 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 121 states to 121 states and 212 transitions. [2019-11-23 22:49:57,161 INFO L78 Accepts]: Start accepts. Automaton has 121 states and 212 transitions. Word has length 35 [2019-11-23 22:49:57,161 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:49:57,161 INFO L462 AbstractCegarLoop]: Abstraction has 121 states and 212 transitions. [2019-11-23 22:49:57,162 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-23 22:49:57,162 INFO L276 IsEmpty]: Start isEmpty. Operand 121 states and 212 transitions. [2019-11-23 22:49:57,163 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2019-11-23 22:49:57,163 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:49:57,164 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:49:57,164 INFO L410 AbstractCegarLoop]: === Iteration 3 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:49:57,164 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:49:57,165 INFO L82 PathProgramCache]: Analyzing trace with hash 1101566611, now seen corresponding path program 1 times [2019-11-23 22:49:57,165 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:49:57,165 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [28672698] [2019-11-23 22:49:57,165 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:49:57,195 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:49:57,293 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-23 22:49:57,294 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [28672698] [2019-11-23 22:49:57,294 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-23 22:49:57,294 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-23 22:49:57,295 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1285177183] [2019-11-23 22:49:57,295 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-23 22:49:57,296 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:49:57,296 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-23 22:49:57,296 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:49:57,296 INFO L87 Difference]: Start difference. First operand 121 states and 212 transitions. Second operand 3 states. [2019-11-23 22:49:57,421 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:49:57,421 INFO L93 Difference]: Finished difference Result 316 states and 553 transitions. [2019-11-23 22:49:57,422 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-23 22:49:57,422 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 35 [2019-11-23 22:49:57,423 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:49:57,426 INFO L225 Difference]: With dead ends: 316 [2019-11-23 22:49:57,426 INFO L226 Difference]: Without dead ends: 206 [2019-11-23 22:49:57,427 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:49:57,428 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 206 states. [2019-11-23 22:49:57,448 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 206 to 196. [2019-11-23 22:49:57,448 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 196 states. [2019-11-23 22:49:57,450 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 196 states to 196 states and 330 transitions. [2019-11-23 22:49:57,450 INFO L78 Accepts]: Start accepts. Automaton has 196 states and 330 transitions. Word has length 35 [2019-11-23 22:49:57,450 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:49:57,450 INFO L462 AbstractCegarLoop]: Abstraction has 196 states and 330 transitions. [2019-11-23 22:49:57,451 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-23 22:49:57,451 INFO L276 IsEmpty]: Start isEmpty. Operand 196 states and 330 transitions. [2019-11-23 22:49:57,452 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2019-11-23 22:49:57,452 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:49:57,452 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:49:57,453 INFO L410 AbstractCegarLoop]: === Iteration 4 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:49:57,453 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:49:57,453 INFO L82 PathProgramCache]: Analyzing trace with hash 197658071, now seen corresponding path program 1 times [2019-11-23 22:49:57,453 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:49:57,454 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [682515582] [2019-11-23 22:49:57,454 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:49:57,476 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:49:57,531 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-23 22:49:57,531 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [682515582] [2019-11-23 22:49:57,531 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-23 22:49:57,532 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-23 22:49:57,533 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [413486876] [2019-11-23 22:49:57,533 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-23 22:49:57,533 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:49:57,533 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-23 22:49:57,534 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-23 22:49:57,534 INFO L87 Difference]: Start difference. First operand 196 states and 330 transitions. Second operand 4 states. [2019-11-23 22:49:57,676 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:49:57,676 INFO L93 Difference]: Finished difference Result 530 states and 896 transitions. [2019-11-23 22:49:57,677 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-23 22:49:57,677 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 35 [2019-11-23 22:49:57,677 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:49:57,680 INFO L225 Difference]: With dead ends: 530 [2019-11-23 22:49:57,680 INFO L226 Difference]: Without dead ends: 346 [2019-11-23 22:49:57,682 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-23 22:49:57,683 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 346 states. [2019-11-23 22:49:57,710 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 346 to 340. [2019-11-23 22:49:57,710 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 340 states. [2019-11-23 22:49:57,712 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 340 states to 340 states and 572 transitions. [2019-11-23 22:49:57,712 INFO L78 Accepts]: Start accepts. Automaton has 340 states and 572 transitions. Word has length 35 [2019-11-23 22:49:57,712 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:49:57,712 INFO L462 AbstractCegarLoop]: Abstraction has 340 states and 572 transitions. [2019-11-23 22:49:57,713 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-23 22:49:57,713 INFO L276 IsEmpty]: Start isEmpty. Operand 340 states and 572 transitions. [2019-11-23 22:49:57,714 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2019-11-23 22:49:57,715 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:49:57,715 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:49:57,715 INFO L410 AbstractCegarLoop]: === Iteration 5 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:49:57,715 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:49:57,716 INFO L82 PathProgramCache]: Analyzing trace with hash 259697685, now seen corresponding path program 1 times [2019-11-23 22:49:57,716 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:49:57,716 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [315201324] [2019-11-23 22:49:57,716 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:49:57,726 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:49:57,767 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-23 22:49:57,767 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [315201324] [2019-11-23 22:49:57,767 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-23 22:49:57,767 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-23 22:49:57,768 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1988063775] [2019-11-23 22:49:57,769 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-23 22:49:57,769 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:49:57,769 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-23 22:49:57,769 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-23 22:49:57,770 INFO L87 Difference]: Start difference. First operand 340 states and 572 transitions. Second operand 4 states. [2019-11-23 22:49:57,881 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:49:57,881 INFO L93 Difference]: Finished difference Result 955 states and 1611 transitions. [2019-11-23 22:49:57,881 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-23 22:49:57,882 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 35 [2019-11-23 22:49:57,882 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:49:57,885 INFO L225 Difference]: With dead ends: 955 [2019-11-23 22:49:57,886 INFO L226 Difference]: Without dead ends: 628 [2019-11-23 22:49:57,887 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-23 22:49:57,889 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 628 states. [2019-11-23 22:49:57,927 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 628 to 622. [2019-11-23 22:49:57,928 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 622 states. [2019-11-23 22:49:57,931 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 622 states to 622 states and 1042 transitions. [2019-11-23 22:49:57,932 INFO L78 Accepts]: Start accepts. Automaton has 622 states and 1042 transitions. Word has length 35 [2019-11-23 22:49:57,932 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:49:57,932 INFO L462 AbstractCegarLoop]: Abstraction has 622 states and 1042 transitions. [2019-11-23 22:49:57,932 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-23 22:49:57,933 INFO L276 IsEmpty]: Start isEmpty. Operand 622 states and 1042 transitions. [2019-11-23 22:49:57,942 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2019-11-23 22:49:57,942 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:49:57,942 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:49:57,943 INFO L410 AbstractCegarLoop]: === Iteration 6 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:49:57,943 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:49:57,943 INFO L82 PathProgramCache]: Analyzing trace with hash 400246295, now seen corresponding path program 1 times [2019-11-23 22:49:57,944 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:49:57,944 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1611322167] [2019-11-23 22:49:57,944 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:49:57,966 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:49:58,016 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-23 22:49:58,017 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1611322167] [2019-11-23 22:49:58,017 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-23 22:49:58,017 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-23 22:49:58,017 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [457227230] [2019-11-23 22:49:58,018 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-23 22:49:58,019 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:49:58,019 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-23 22:49:58,019 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-23 22:49:58,019 INFO L87 Difference]: Start difference. First operand 622 states and 1042 transitions. Second operand 4 states. [2019-11-23 22:49:58,168 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:49:58,168 INFO L93 Difference]: Finished difference Result 1891 states and 3148 transitions. [2019-11-23 22:49:58,168 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-23 22:49:58,168 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 35 [2019-11-23 22:49:58,169 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:49:58,177 INFO L225 Difference]: With dead ends: 1891 [2019-11-23 22:49:58,177 INFO L226 Difference]: Without dead ends: 1283 [2019-11-23 22:49:58,180 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-23 22:49:58,181 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1283 states. [2019-11-23 22:49:58,244 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1283 to 1277. [2019-11-23 22:49:58,245 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1277 states. [2019-11-23 22:49:58,250 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1277 states to 1277 states and 2102 transitions. [2019-11-23 22:49:58,250 INFO L78 Accepts]: Start accepts. Automaton has 1277 states and 2102 transitions. Word has length 35 [2019-11-23 22:49:58,253 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:49:58,253 INFO L462 AbstractCegarLoop]: Abstraction has 1277 states and 2102 transitions. [2019-11-23 22:49:58,253 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-23 22:49:58,253 INFO L276 IsEmpty]: Start isEmpty. Operand 1277 states and 2102 transitions. [2019-11-23 22:49:58,256 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2019-11-23 22:49:58,256 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:49:58,256 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:49:58,256 INFO L410 AbstractCegarLoop]: === Iteration 7 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:49:58,257 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:49:58,257 INFO L82 PathProgramCache]: Analyzing trace with hash 266232789, now seen corresponding path program 1 times [2019-11-23 22:49:58,257 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:49:58,258 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [251140974] [2019-11-23 22:49:58,258 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:49:58,287 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:49:58,349 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-23 22:49:58,350 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [251140974] [2019-11-23 22:49:58,350 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-23 22:49:58,350 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-23 22:49:58,350 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [701378046] [2019-11-23 22:49:58,353 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-23 22:49:58,353 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:49:58,353 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-23 22:49:58,354 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:49:58,359 INFO L87 Difference]: Start difference. First operand 1277 states and 2102 transitions. Second operand 3 states. [2019-11-23 22:49:58,488 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:49:58,489 INFO L93 Difference]: Finished difference Result 2603 states and 4295 transitions. [2019-11-23 22:49:58,489 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-23 22:49:58,489 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 35 [2019-11-23 22:49:58,489 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:49:58,497 INFO L225 Difference]: With dead ends: 2603 [2019-11-23 22:49:58,498 INFO L226 Difference]: Without dead ends: 1383 [2019-11-23 22:49:58,500 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:49:58,502 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1383 states. [2019-11-23 22:49:58,556 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1383 to 1376. [2019-11-23 22:49:58,556 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1376 states. [2019-11-23 22:49:58,561 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1376 states to 1376 states and 2257 transitions. [2019-11-23 22:49:58,562 INFO L78 Accepts]: Start accepts. Automaton has 1376 states and 2257 transitions. Word has length 35 [2019-11-23 22:49:58,562 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:49:58,562 INFO L462 AbstractCegarLoop]: Abstraction has 1376 states and 2257 transitions. [2019-11-23 22:49:58,562 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-23 22:49:58,562 INFO L276 IsEmpty]: Start isEmpty. Operand 1376 states and 2257 transitions. [2019-11-23 22:49:58,564 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2019-11-23 22:49:58,564 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:49:58,565 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:49:58,565 INFO L410 AbstractCegarLoop]: === Iteration 8 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:49:58,565 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:49:58,565 INFO L82 PathProgramCache]: Analyzing trace with hash -1908921127, now seen corresponding path program 1 times [2019-11-23 22:49:58,566 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:49:58,567 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [287280672] [2019-11-23 22:49:58,567 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:49:58,583 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:49:58,620 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-23 22:49:58,620 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [287280672] [2019-11-23 22:49:58,621 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-23 22:49:58,621 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-23 22:49:58,621 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1508250120] [2019-11-23 22:49:58,621 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-23 22:49:58,622 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:49:58,622 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-23 22:49:58,622 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-23 22:49:58,622 INFO L87 Difference]: Start difference. First operand 1376 states and 2257 transitions. Second operand 4 states. [2019-11-23 22:49:58,740 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:49:58,740 INFO L93 Difference]: Finished difference Result 2882 states and 4737 transitions. [2019-11-23 22:49:58,741 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-11-23 22:49:58,741 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 35 [2019-11-23 22:49:58,741 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:49:58,749 INFO L225 Difference]: With dead ends: 2882 [2019-11-23 22:49:58,749 INFO L226 Difference]: Without dead ends: 1540 [2019-11-23 22:49:58,751 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-23 22:49:58,753 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1540 states. [2019-11-23 22:49:58,818 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1540 to 1529. [2019-11-23 22:49:58,818 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1529 states. [2019-11-23 22:49:58,823 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1529 states to 1529 states and 2471 transitions. [2019-11-23 22:49:58,824 INFO L78 Accepts]: Start accepts. Automaton has 1529 states and 2471 transitions. Word has length 35 [2019-11-23 22:49:58,824 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:49:58,824 INFO L462 AbstractCegarLoop]: Abstraction has 1529 states and 2471 transitions. [2019-11-23 22:49:58,824 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-23 22:49:58,824 INFO L276 IsEmpty]: Start isEmpty. Operand 1529 states and 2471 transitions. [2019-11-23 22:49:58,825 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2019-11-23 22:49:58,825 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:49:58,825 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:49:58,826 INFO L410 AbstractCegarLoop]: === Iteration 9 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:49:58,826 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:49:58,826 INFO L82 PathProgramCache]: Analyzing trace with hash 1364977815, now seen corresponding path program 1 times [2019-11-23 22:49:58,826 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:49:58,827 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1898587479] [2019-11-23 22:49:58,827 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:49:58,837 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:49:58,861 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-23 22:49:58,862 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1898587479] [2019-11-23 22:49:58,863 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-23 22:49:58,863 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-23 22:49:58,863 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1067894789] [2019-11-23 22:49:58,863 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-23 22:49:58,864 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:49:58,864 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-23 22:49:58,864 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-23 22:49:58,864 INFO L87 Difference]: Start difference. First operand 1529 states and 2471 transitions. Second operand 4 states. [2019-11-23 22:49:59,015 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:49:59,016 INFO L93 Difference]: Finished difference Result 3348 states and 5416 transitions. [2019-11-23 22:49:59,016 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-11-23 22:49:59,016 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 35 [2019-11-23 22:49:59,017 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:49:59,027 INFO L225 Difference]: With dead ends: 3348 [2019-11-23 22:49:59,028 INFO L226 Difference]: Without dead ends: 1865 [2019-11-23 22:49:59,031 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-23 22:49:59,035 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1865 states. [2019-11-23 22:49:59,128 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1865 to 1841. [2019-11-23 22:49:59,128 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1841 states. [2019-11-23 22:49:59,136 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1841 states to 1841 states and 2935 transitions. [2019-11-23 22:49:59,137 INFO L78 Accepts]: Start accepts. Automaton has 1841 states and 2935 transitions. Word has length 35 [2019-11-23 22:49:59,137 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:49:59,137 INFO L462 AbstractCegarLoop]: Abstraction has 1841 states and 2935 transitions. [2019-11-23 22:49:59,137 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-23 22:49:59,138 INFO L276 IsEmpty]: Start isEmpty. Operand 1841 states and 2935 transitions. [2019-11-23 22:49:59,140 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2019-11-23 22:49:59,140 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:49:59,140 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:49:59,140 INFO L410 AbstractCegarLoop]: === Iteration 10 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:49:59,140 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:49:59,141 INFO L82 PathProgramCache]: Analyzing trace with hash 353860565, now seen corresponding path program 1 times [2019-11-23 22:49:59,141 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:49:59,141 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1185151194] [2019-11-23 22:49:59,142 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:49:59,155 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:49:59,181 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-23 22:49:59,182 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1185151194] [2019-11-23 22:49:59,182 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-23 22:49:59,182 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-23 22:49:59,183 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [946975335] [2019-11-23 22:49:59,183 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-23 22:49:59,183 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:49:59,184 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-23 22:49:59,184 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:49:59,184 INFO L87 Difference]: Start difference. First operand 1841 states and 2935 transitions. Second operand 3 states. [2019-11-23 22:49:59,279 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:49:59,279 INFO L93 Difference]: Finished difference Result 3307 states and 5278 transitions. [2019-11-23 22:49:59,280 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-23 22:49:59,280 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 35 [2019-11-23 22:49:59,282 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:49:59,290 INFO L225 Difference]: With dead ends: 3307 [2019-11-23 22:49:59,290 INFO L226 Difference]: Without dead ends: 1494 [2019-11-23 22:49:59,293 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:49:59,295 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1494 states. [2019-11-23 22:49:59,353 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1494 to 1483. [2019-11-23 22:49:59,354 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1483 states. [2019-11-23 22:49:59,359 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1483 states to 1483 states and 2335 transitions. [2019-11-23 22:49:59,360 INFO L78 Accepts]: Start accepts. Automaton has 1483 states and 2335 transitions. Word has length 35 [2019-11-23 22:49:59,363 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:49:59,363 INFO L462 AbstractCegarLoop]: Abstraction has 1483 states and 2335 transitions. [2019-11-23 22:49:59,364 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-23 22:49:59,364 INFO L276 IsEmpty]: Start isEmpty. Operand 1483 states and 2335 transitions. [2019-11-23 22:49:59,365 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 46 [2019-11-23 22:49:59,365 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:49:59,366 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:49:59,366 INFO L410 AbstractCegarLoop]: === Iteration 11 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:49:59,366 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:49:59,366 INFO L82 PathProgramCache]: Analyzing trace with hash -209495903, now seen corresponding path program 1 times [2019-11-23 22:49:59,367 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:49:59,367 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1373179754] [2019-11-23 22:49:59,367 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:49:59,378 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:49:59,406 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-23 22:49:59,407 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1373179754] [2019-11-23 22:49:59,407 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-23 22:49:59,407 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-23 22:49:59,407 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1124894373] [2019-11-23 22:49:59,408 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-23 22:49:59,408 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:49:59,408 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-23 22:49:59,408 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:49:59,409 INFO L87 Difference]: Start difference. First operand 1483 states and 2335 transitions. Second operand 3 states. [2019-11-23 22:49:59,530 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:49:59,530 INFO L93 Difference]: Finished difference Result 3698 states and 5877 transitions. [2019-11-23 22:49:59,531 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-23 22:49:59,531 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 45 [2019-11-23 22:49:59,531 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:49:59,545 INFO L225 Difference]: With dead ends: 3698 [2019-11-23 22:49:59,546 INFO L226 Difference]: Without dead ends: 2269 [2019-11-23 22:49:59,549 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:49:59,551 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2269 states. [2019-11-23 22:49:59,652 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2269 to 2267. [2019-11-23 22:49:59,652 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2267 states. [2019-11-23 22:49:59,660 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2267 states to 2267 states and 3563 transitions. [2019-11-23 22:49:59,660 INFO L78 Accepts]: Start accepts. Automaton has 2267 states and 3563 transitions. Word has length 45 [2019-11-23 22:49:59,661 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:49:59,661 INFO L462 AbstractCegarLoop]: Abstraction has 2267 states and 3563 transitions. [2019-11-23 22:49:59,661 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-23 22:49:59,661 INFO L276 IsEmpty]: Start isEmpty. Operand 2267 states and 3563 transitions. [2019-11-23 22:49:59,663 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 46 [2019-11-23 22:49:59,663 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:49:59,663 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:49:59,664 INFO L410 AbstractCegarLoop]: === Iteration 12 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:49:59,664 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:49:59,664 INFO L82 PathProgramCache]: Analyzing trace with hash 214150819, now seen corresponding path program 1 times [2019-11-23 22:49:59,664 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:49:59,665 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2137680417] [2019-11-23 22:49:59,665 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:49:59,674 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:49:59,689 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2019-11-23 22:49:59,690 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2137680417] [2019-11-23 22:49:59,690 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-23 22:49:59,690 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-23 22:49:59,691 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1316549020] [2019-11-23 22:49:59,691 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-23 22:49:59,691 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:49:59,691 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-23 22:49:59,692 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:49:59,692 INFO L87 Difference]: Start difference. First operand 2267 states and 3563 transitions. Second operand 3 states. [2019-11-23 22:49:59,779 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:49:59,779 INFO L93 Difference]: Finished difference Result 4436 states and 7000 transitions. [2019-11-23 22:49:59,779 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-23 22:49:59,780 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 45 [2019-11-23 22:49:59,780 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:49:59,792 INFO L225 Difference]: With dead ends: 4436 [2019-11-23 22:49:59,792 INFO L226 Difference]: Without dead ends: 2223 [2019-11-23 22:49:59,795 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:49:59,799 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2223 states. [2019-11-23 22:49:59,891 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2223 to 2223. [2019-11-23 22:49:59,891 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2223 states. [2019-11-23 22:49:59,899 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2223 states to 2223 states and 3506 transitions. [2019-11-23 22:49:59,899 INFO L78 Accepts]: Start accepts. Automaton has 2223 states and 3506 transitions. Word has length 45 [2019-11-23 22:49:59,899 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:49:59,900 INFO L462 AbstractCegarLoop]: Abstraction has 2223 states and 3506 transitions. [2019-11-23 22:49:59,900 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-23 22:49:59,900 INFO L276 IsEmpty]: Start isEmpty. Operand 2223 states and 3506 transitions. [2019-11-23 22:49:59,904 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2019-11-23 22:49:59,905 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:49:59,905 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:49:59,905 INFO L410 AbstractCegarLoop]: === Iteration 13 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:49:59,905 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:49:59,905 INFO L82 PathProgramCache]: Analyzing trace with hash 1700232685, now seen corresponding path program 1 times [2019-11-23 22:49:59,905 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:49:59,906 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1139992966] [2019-11-23 22:49:59,906 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:49:59,916 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:49:59,946 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-23 22:49:59,947 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1139992966] [2019-11-23 22:49:59,947 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-23 22:49:59,947 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-23 22:49:59,947 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1716014154] [2019-11-23 22:49:59,948 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-23 22:49:59,948 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:49:59,948 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-23 22:49:59,949 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:49:59,949 INFO L87 Difference]: Start difference. First operand 2223 states and 3506 transitions. Second operand 3 states. [2019-11-23 22:50:00,160 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:50:00,160 INFO L93 Difference]: Finished difference Result 5707 states and 9064 transitions. [2019-11-23 22:50:00,161 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-23 22:50:00,161 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 46 [2019-11-23 22:50:00,161 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:50:00,183 INFO L225 Difference]: With dead ends: 5707 [2019-11-23 22:50:00,183 INFO L226 Difference]: Without dead ends: 3538 [2019-11-23 22:50:00,187 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:50:00,191 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3538 states. [2019-11-23 22:50:00,383 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3538 to 3536. [2019-11-23 22:50:00,383 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3536 states. [2019-11-23 22:50:00,398 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3536 states to 3536 states and 5558 transitions. [2019-11-23 22:50:00,398 INFO L78 Accepts]: Start accepts. Automaton has 3536 states and 5558 transitions. Word has length 46 [2019-11-23 22:50:00,398 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:50:00,399 INFO L462 AbstractCegarLoop]: Abstraction has 3536 states and 5558 transitions. [2019-11-23 22:50:00,399 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-23 22:50:00,399 INFO L276 IsEmpty]: Start isEmpty. Operand 3536 states and 5558 transitions. [2019-11-23 22:50:00,401 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2019-11-23 22:50:00,401 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:50:00,401 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:50:00,401 INFO L410 AbstractCegarLoop]: === Iteration 14 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:50:00,402 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:50:00,402 INFO L82 PathProgramCache]: Analyzing trace with hash 1601371510, now seen corresponding path program 1 times [2019-11-23 22:50:00,402 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:50:00,402 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [361456065] [2019-11-23 22:50:00,402 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:50:00,410 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:50:00,427 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-23 22:50:00,428 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [361456065] [2019-11-23 22:50:00,428 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-23 22:50:00,428 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-23 22:50:00,428 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1056606164] [2019-11-23 22:50:00,429 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-23 22:50:00,429 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:50:00,429 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-23 22:50:00,429 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:50:00,430 INFO L87 Difference]: Start difference. First operand 3536 states and 5558 transitions. Second operand 3 states. [2019-11-23 22:50:00,712 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:50:00,712 INFO L93 Difference]: Finished difference Result 8979 states and 14292 transitions. [2019-11-23 22:50:00,713 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-23 22:50:00,713 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 47 [2019-11-23 22:50:00,713 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:50:00,740 INFO L225 Difference]: With dead ends: 8979 [2019-11-23 22:50:00,740 INFO L226 Difference]: Without dead ends: 5501 [2019-11-23 22:50:00,745 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:50:00,751 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5501 states. [2019-11-23 22:50:00,985 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5501 to 5499. [2019-11-23 22:50:00,985 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5499 states. [2019-11-23 22:50:01,004 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5499 states to 5499 states and 8711 transitions. [2019-11-23 22:50:01,005 INFO L78 Accepts]: Start accepts. Automaton has 5499 states and 8711 transitions. Word has length 47 [2019-11-23 22:50:01,005 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:50:01,005 INFO L462 AbstractCegarLoop]: Abstraction has 5499 states and 8711 transitions. [2019-11-23 22:50:01,005 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-23 22:50:01,006 INFO L276 IsEmpty]: Start isEmpty. Operand 5499 states and 8711 transitions. [2019-11-23 22:50:01,009 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2019-11-23 22:50:01,009 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:50:01,009 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:50:01,009 INFO L410 AbstractCegarLoop]: === Iteration 15 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:50:01,010 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:50:01,010 INFO L82 PathProgramCache]: Analyzing trace with hash 2025018232, now seen corresponding path program 1 times [2019-11-23 22:50:01,010 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:50:01,010 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1738363027] [2019-11-23 22:50:01,010 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:50:01,015 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:50:01,028 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2019-11-23 22:50:01,028 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1738363027] [2019-11-23 22:50:01,029 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-23 22:50:01,029 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-23 22:50:01,029 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [116077158] [2019-11-23 22:50:01,029 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-23 22:50:01,029 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:50:01,030 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-23 22:50:01,030 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:50:01,030 INFO L87 Difference]: Start difference. First operand 5499 states and 8711 transitions. Second operand 3 states. [2019-11-23 22:50:01,283 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:50:01,284 INFO L93 Difference]: Finished difference Result 10896 states and 17296 transitions. [2019-11-23 22:50:01,284 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-23 22:50:01,284 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 47 [2019-11-23 22:50:01,284 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:50:01,308 INFO L225 Difference]: With dead ends: 10896 [2019-11-23 22:50:01,308 INFO L226 Difference]: Without dead ends: 5455 [2019-11-23 22:50:01,316 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:50:01,322 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5455 states. [2019-11-23 22:50:01,535 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5455 to 5455. [2019-11-23 22:50:01,535 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5455 states. [2019-11-23 22:50:01,547 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5455 states to 5455 states and 8656 transitions. [2019-11-23 22:50:01,547 INFO L78 Accepts]: Start accepts. Automaton has 5455 states and 8656 transitions. Word has length 47 [2019-11-23 22:50:01,547 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:50:01,548 INFO L462 AbstractCegarLoop]: Abstraction has 5455 states and 8656 transitions. [2019-11-23 22:50:01,548 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-23 22:50:01,548 INFO L276 IsEmpty]: Start isEmpty. Operand 5455 states and 8656 transitions. [2019-11-23 22:50:01,550 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2019-11-23 22:50:01,551 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:50:01,551 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:50:01,551 INFO L410 AbstractCegarLoop]: === Iteration 16 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:50:01,551 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:50:01,551 INFO L82 PathProgramCache]: Analyzing trace with hash -2129316584, now seen corresponding path program 1 times [2019-11-23 22:50:01,552 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:50:01,552 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1934622026] [2019-11-23 22:50:01,552 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:50:01,560 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:50:01,580 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-23 22:50:01,580 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1934622026] [2019-11-23 22:50:01,580 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-23 22:50:01,580 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-23 22:50:01,581 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [751358273] [2019-11-23 22:50:01,581 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-23 22:50:01,581 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:50:01,581 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-23 22:50:01,582 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:50:01,582 INFO L87 Difference]: Start difference. First operand 5455 states and 8656 transitions. Second operand 3 states. [2019-11-23 22:50:01,992 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:50:01,993 INFO L93 Difference]: Finished difference Result 15441 states and 24452 transitions. [2019-11-23 22:50:01,993 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-23 22:50:01,993 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 48 [2019-11-23 22:50:01,993 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:50:02,020 INFO L225 Difference]: With dead ends: 15441 [2019-11-23 22:50:02,020 INFO L226 Difference]: Without dead ends: 8274 [2019-11-23 22:50:02,031 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:50:02,041 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8274 states. [2019-11-23 22:50:02,468 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8274 to 8274. [2019-11-23 22:50:02,468 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8274 states. [2019-11-23 22:50:02,488 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8274 states to 8274 states and 12950 transitions. [2019-11-23 22:50:02,489 INFO L78 Accepts]: Start accepts. Automaton has 8274 states and 12950 transitions. Word has length 48 [2019-11-23 22:50:02,490 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:50:02,490 INFO L462 AbstractCegarLoop]: Abstraction has 8274 states and 12950 transitions. [2019-11-23 22:50:02,490 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-23 22:50:02,490 INFO L276 IsEmpty]: Start isEmpty. Operand 8274 states and 12950 transitions. [2019-11-23 22:50:02,496 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2019-11-23 22:50:02,496 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:50:02,497 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:50:02,497 INFO L410 AbstractCegarLoop]: === Iteration 17 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:50:02,497 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:50:02,497 INFO L82 PathProgramCache]: Analyzing trace with hash -1392856220, now seen corresponding path program 1 times [2019-11-23 22:50:02,498 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:50:02,498 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [681370442] [2019-11-23 22:50:02,498 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:50:02,516 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:50:02,550 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-23 22:50:02,550 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [681370442] [2019-11-23 22:50:02,550 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-23 22:50:02,550 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-23 22:50:02,551 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1148338923] [2019-11-23 22:50:02,551 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-23 22:50:02,551 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:50:02,551 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-23 22:50:02,552 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:50:02,552 INFO L87 Difference]: Start difference. First operand 8274 states and 12950 transitions. Second operand 3 states. [2019-11-23 22:50:02,825 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:50:02,825 INFO L93 Difference]: Finished difference Result 17053 states and 26638 transitions. [2019-11-23 22:50:02,825 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-23 22:50:02,826 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 52 [2019-11-23 22:50:02,826 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:50:02,844 INFO L225 Difference]: With dead ends: 17053 [2019-11-23 22:50:02,844 INFO L226 Difference]: Without dead ends: 8815 [2019-11-23 22:50:02,857 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:50:02,867 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8815 states. [2019-11-23 22:50:03,280 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8815 to 8272. [2019-11-23 22:50:03,280 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8272 states. [2019-11-23 22:50:03,301 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8272 states to 8272 states and 12699 transitions. [2019-11-23 22:50:03,301 INFO L78 Accepts]: Start accepts. Automaton has 8272 states and 12699 transitions. Word has length 52 [2019-11-23 22:50:03,302 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:50:03,302 INFO L462 AbstractCegarLoop]: Abstraction has 8272 states and 12699 transitions. [2019-11-23 22:50:03,302 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-23 22:50:03,302 INFO L276 IsEmpty]: Start isEmpty. Operand 8272 states and 12699 transitions. [2019-11-23 22:50:03,310 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2019-11-23 22:50:03,310 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:50:03,310 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:50:03,311 INFO L410 AbstractCegarLoop]: === Iteration 18 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:50:03,311 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:50:03,311 INFO L82 PathProgramCache]: Analyzing trace with hash 1708846795, now seen corresponding path program 1 times [2019-11-23 22:50:03,312 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:50:03,312 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [287049547] [2019-11-23 22:50:03,312 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:50:03,326 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:50:03,365 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2019-11-23 22:50:03,366 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [287049547] [2019-11-23 22:50:03,366 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-23 22:50:03,366 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-23 22:50:03,367 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [78745716] [2019-11-23 22:50:03,367 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-23 22:50:03,367 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:50:03,367 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-23 22:50:03,367 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:50:03,368 INFO L87 Difference]: Start difference. First operand 8272 states and 12699 transitions. Second operand 3 states. [2019-11-23 22:50:04,044 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:50:04,045 INFO L93 Difference]: Finished difference Result 24504 states and 37704 transitions. [2019-11-23 22:50:04,045 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-23 22:50:04,045 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 54 [2019-11-23 22:50:04,045 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:50:04,077 INFO L225 Difference]: With dead ends: 24504 [2019-11-23 22:50:04,077 INFO L226 Difference]: Without dead ends: 16235 [2019-11-23 22:50:04,089 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:50:04,108 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16235 states. [2019-11-23 22:50:05,265 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16235 to 16105. [2019-11-23 22:50:05,265 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16105 states. [2019-11-23 22:50:05,292 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16105 states to 16105 states and 24847 transitions. [2019-11-23 22:50:05,292 INFO L78 Accepts]: Start accepts. Automaton has 16105 states and 24847 transitions. Word has length 54 [2019-11-23 22:50:05,292 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:50:05,292 INFO L462 AbstractCegarLoop]: Abstraction has 16105 states and 24847 transitions. [2019-11-23 22:50:05,292 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-23 22:50:05,293 INFO L276 IsEmpty]: Start isEmpty. Operand 16105 states and 24847 transitions. [2019-11-23 22:50:05,306 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 86 [2019-11-23 22:50:05,306 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:50:05,306 INFO L410 BasicCegarLoop]: trace histogram [3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:50:05,306 INFO L410 AbstractCegarLoop]: === Iteration 19 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:50:05,307 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:50:05,307 INFO L82 PathProgramCache]: Analyzing trace with hash 194830513, now seen corresponding path program 1 times [2019-11-23 22:50:05,308 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:50:05,308 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [761817590] [2019-11-23 22:50:05,309 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:50:05,317 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:50:05,339 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 11 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-23 22:50:05,340 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [761817590] [2019-11-23 22:50:05,340 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-23 22:50:05,340 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-23 22:50:05,340 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1350773855] [2019-11-23 22:50:05,341 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-23 22:50:05,341 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:50:05,342 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-23 22:50:05,342 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:50:05,342 INFO L87 Difference]: Start difference. First operand 16105 states and 24847 transitions. Second operand 3 states. [2019-11-23 22:50:05,986 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:50:05,986 INFO L93 Difference]: Finished difference Result 32865 states and 50652 transitions. [2019-11-23 22:50:05,987 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-23 22:50:05,987 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 85 [2019-11-23 22:50:05,987 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:50:06,026 INFO L225 Difference]: With dead ends: 32865 [2019-11-23 22:50:06,026 INFO L226 Difference]: Without dead ends: 16789 [2019-11-23 22:50:06,051 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:50:06,069 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16789 states. [2019-11-23 22:50:06,843 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16789 to 16725. [2019-11-23 22:50:06,843 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16725 states. [2019-11-23 22:50:06,872 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16725 states to 16725 states and 25149 transitions. [2019-11-23 22:50:06,873 INFO L78 Accepts]: Start accepts. Automaton has 16725 states and 25149 transitions. Word has length 85 [2019-11-23 22:50:06,873 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:50:06,873 INFO L462 AbstractCegarLoop]: Abstraction has 16725 states and 25149 transitions. [2019-11-23 22:50:06,873 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-23 22:50:06,873 INFO L276 IsEmpty]: Start isEmpty. Operand 16725 states and 25149 transitions. [2019-11-23 22:50:06,883 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 87 [2019-11-23 22:50:06,883 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:50:06,884 INFO L410 BasicCegarLoop]: trace histogram [3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:50:06,884 INFO L410 AbstractCegarLoop]: === Iteration 20 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:50:06,884 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:50:06,884 INFO L82 PathProgramCache]: Analyzing trace with hash 164482089, now seen corresponding path program 1 times [2019-11-23 22:50:06,884 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:50:06,885 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1441117767] [2019-11-23 22:50:06,885 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:50:06,893 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:50:06,924 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 9 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2019-11-23 22:50:06,924 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1441117767] [2019-11-23 22:50:06,924 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-23 22:50:06,924 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-23 22:50:06,925 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1733632888] [2019-11-23 22:50:06,925 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-23 22:50:06,925 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:50:06,926 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-23 22:50:06,926 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-23 22:50:06,926 INFO L87 Difference]: Start difference. First operand 16725 states and 25149 transitions. Second operand 4 states. [2019-11-23 22:50:07,741 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:50:07,741 INFO L93 Difference]: Finished difference Result 27583 states and 41591 transitions. [2019-11-23 22:50:07,741 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-11-23 22:50:07,742 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 86 [2019-11-23 22:50:07,742 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:50:07,774 INFO L225 Difference]: With dead ends: 27583 [2019-11-23 22:50:07,774 INFO L226 Difference]: Without dead ends: 15803 [2019-11-23 22:50:07,786 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-23 22:50:07,799 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15803 states. [2019-11-23 22:50:08,498 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15803 to 15713. [2019-11-23 22:50:08,499 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15713 states. [2019-11-23 22:50:08,540 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15713 states to 15713 states and 23443 transitions. [2019-11-23 22:50:08,541 INFO L78 Accepts]: Start accepts. Automaton has 15713 states and 23443 transitions. Word has length 86 [2019-11-23 22:50:08,541 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:50:08,542 INFO L462 AbstractCegarLoop]: Abstraction has 15713 states and 23443 transitions. [2019-11-23 22:50:08,542 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-23 22:50:08,542 INFO L276 IsEmpty]: Start isEmpty. Operand 15713 states and 23443 transitions. [2019-11-23 22:50:08,553 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 87 [2019-11-23 22:50:08,553 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:50:08,553 INFO L410 BasicCegarLoop]: trace histogram [3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:50:08,553 INFO L410 AbstractCegarLoop]: === Iteration 21 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:50:08,554 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:50:08,554 INFO L82 PathProgramCache]: Analyzing trace with hash -433884439, now seen corresponding path program 1 times [2019-11-23 22:50:08,554 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:50:08,554 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1179093866] [2019-11-23 22:50:08,555 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:50:08,564 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:50:08,743 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 11 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-23 22:50:08,744 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1179093866] [2019-11-23 22:50:08,744 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-23 22:50:08,744 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-23 22:50:08,744 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1362034852] [2019-11-23 22:50:08,745 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-23 22:50:08,745 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:50:08,745 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-23 22:50:08,745 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:50:08,745 INFO L87 Difference]: Start difference. First operand 15713 states and 23443 transitions. Second operand 3 states. [2019-11-23 22:50:09,485 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:50:09,485 INFO L93 Difference]: Finished difference Result 32195 states and 47984 transitions. [2019-11-23 22:50:09,486 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-23 22:50:09,486 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 86 [2019-11-23 22:50:09,487 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:50:09,530 INFO L225 Difference]: With dead ends: 32195 [2019-11-23 22:50:09,530 INFO L226 Difference]: Without dead ends: 16523 [2019-11-23 22:50:09,546 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:50:09,564 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16523 states. [2019-11-23 22:50:10,406 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16523 to 16443. [2019-11-23 22:50:10,406 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16443 states. [2019-11-23 22:50:10,430 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16443 states to 16443 states and 23815 transitions. [2019-11-23 22:50:10,431 INFO L78 Accepts]: Start accepts. Automaton has 16443 states and 23815 transitions. Word has length 86 [2019-11-23 22:50:10,431 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:50:10,431 INFO L462 AbstractCegarLoop]: Abstraction has 16443 states and 23815 transitions. [2019-11-23 22:50:10,431 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-23 22:50:10,431 INFO L276 IsEmpty]: Start isEmpty. Operand 16443 states and 23815 transitions. [2019-11-23 22:50:10,439 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 88 [2019-11-23 22:50:10,440 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:50:10,440 INFO L410 BasicCegarLoop]: trace histogram [3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:50:10,440 INFO L410 AbstractCegarLoop]: === Iteration 22 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:50:10,440 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:50:10,440 INFO L82 PathProgramCache]: Analyzing trace with hash -1869450223, now seen corresponding path program 1 times [2019-11-23 22:50:10,441 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:50:10,441 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1155849803] [2019-11-23 22:50:10,441 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:50:10,464 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:50:10,495 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 11 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-23 22:50:10,495 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1155849803] [2019-11-23 22:50:10,495 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-23 22:50:10,496 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-23 22:50:10,496 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [843959991] [2019-11-23 22:50:10,496 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-23 22:50:10,496 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:50:10,497 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-23 22:50:10,497 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:50:10,497 INFO L87 Difference]: Start difference. First operand 16443 states and 23815 transitions. Second operand 3 states. [2019-11-23 22:50:11,000 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:50:11,001 INFO L93 Difference]: Finished difference Result 33302 states and 48352 transitions. [2019-11-23 22:50:11,001 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-23 22:50:11,001 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 87 [2019-11-23 22:50:11,001 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:50:11,025 INFO L225 Difference]: With dead ends: 33302 [2019-11-23 22:50:11,025 INFO L226 Difference]: Without dead ends: 16920 [2019-11-23 22:50:11,040 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:50:11,055 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16920 states. [2019-11-23 22:50:11,709 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16920 to 13439. [2019-11-23 22:50:11,709 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13439 states. [2019-11-23 22:50:11,723 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13439 states to 13439 states and 18777 transitions. [2019-11-23 22:50:11,723 INFO L78 Accepts]: Start accepts. Automaton has 13439 states and 18777 transitions. Word has length 87 [2019-11-23 22:50:11,723 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:50:11,723 INFO L462 AbstractCegarLoop]: Abstraction has 13439 states and 18777 transitions. [2019-11-23 22:50:11,723 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-23 22:50:11,724 INFO L276 IsEmpty]: Start isEmpty. Operand 13439 states and 18777 transitions. [2019-11-23 22:50:11,732 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 89 [2019-11-23 22:50:11,733 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:50:11,733 INFO L410 BasicCegarLoop]: trace histogram [3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:50:11,733 INFO L410 AbstractCegarLoop]: === Iteration 23 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:50:11,733 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:50:11,734 INFO L82 PathProgramCache]: Analyzing trace with hash -2059863225, now seen corresponding path program 1 times [2019-11-23 22:50:11,734 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:50:11,734 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [907217849] [2019-11-23 22:50:11,734 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:50:11,743 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:50:11,777 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 9 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2019-11-23 22:50:11,777 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [907217849] [2019-11-23 22:50:11,777 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-23 22:50:11,777 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-23 22:50:11,778 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [308377097] [2019-11-23 22:50:11,778 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-23 22:50:11,778 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:50:11,778 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-23 22:50:11,779 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:50:11,779 INFO L87 Difference]: Start difference. First operand 13439 states and 18777 transitions. Second operand 3 states. [2019-11-23 22:50:12,335 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:50:12,335 INFO L93 Difference]: Finished difference Result 23921 states and 33457 transitions. [2019-11-23 22:50:12,336 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-23 22:50:12,336 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 88 [2019-11-23 22:50:12,336 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:50:12,355 INFO L225 Difference]: With dead ends: 23921 [2019-11-23 22:50:12,356 INFO L226 Difference]: Without dead ends: 15605 [2019-11-23 22:50:12,366 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:50:12,382 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15605 states. [2019-11-23 22:50:13,309 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15605 to 15125. [2019-11-23 22:50:13,310 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15125 states. [2019-11-23 22:50:13,340 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15125 states to 15125 states and 20656 transitions. [2019-11-23 22:50:13,340 INFO L78 Accepts]: Start accepts. Automaton has 15125 states and 20656 transitions. Word has length 88 [2019-11-23 22:50:13,341 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:50:13,341 INFO L462 AbstractCegarLoop]: Abstraction has 15125 states and 20656 transitions. [2019-11-23 22:50:13,341 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-23 22:50:13,341 INFO L276 IsEmpty]: Start isEmpty. Operand 15125 states and 20656 transitions. [2019-11-23 22:50:13,362 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 116 [2019-11-23 22:50:13,362 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:50:13,363 INFO L410 BasicCegarLoop]: trace histogram [4, 3, 3, 3, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:50:13,363 INFO L410 AbstractCegarLoop]: === Iteration 24 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:50:13,363 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:50:13,364 INFO L82 PathProgramCache]: Analyzing trace with hash 1061949686, now seen corresponding path program 1 times [2019-11-23 22:50:13,364 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:50:13,364 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1184742994] [2019-11-23 22:50:13,364 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:50:13,376 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:50:13,416 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 17 proven. 0 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2019-11-23 22:50:13,416 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1184742994] [2019-11-23 22:50:13,417 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-23 22:50:13,417 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-23 22:50:13,417 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1535559303] [2019-11-23 22:50:13,417 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-23 22:50:13,417 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:50:13,418 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-23 22:50:13,418 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:50:13,418 INFO L87 Difference]: Start difference. First operand 15125 states and 20656 transitions. Second operand 3 states. [2019-11-23 22:50:14,158 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:50:14,158 INFO L93 Difference]: Finished difference Result 29488 states and 40230 transitions. [2019-11-23 22:50:14,158 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-23 22:50:14,159 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 115 [2019-11-23 22:50:14,159 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:50:14,177 INFO L225 Difference]: With dead ends: 29488 [2019-11-23 22:50:14,177 INFO L226 Difference]: Without dead ends: 15055 [2019-11-23 22:50:14,189 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:50:14,202 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15055 states. [2019-11-23 22:50:15,096 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15055 to 15055. [2019-11-23 22:50:15,096 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15055 states. [2019-11-23 22:50:15,110 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15055 states to 15055 states and 20502 transitions. [2019-11-23 22:50:15,110 INFO L78 Accepts]: Start accepts. Automaton has 15055 states and 20502 transitions. Word has length 115 [2019-11-23 22:50:15,110 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:50:15,110 INFO L462 AbstractCegarLoop]: Abstraction has 15055 states and 20502 transitions. [2019-11-23 22:50:15,110 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-23 22:50:15,111 INFO L276 IsEmpty]: Start isEmpty. Operand 15055 states and 20502 transitions. [2019-11-23 22:50:15,126 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 127 [2019-11-23 22:50:15,127 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:50:15,127 INFO L410 BasicCegarLoop]: trace histogram [5, 4, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:50:15,127 INFO L410 AbstractCegarLoop]: === Iteration 25 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:50:15,127 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:50:15,128 INFO L82 PathProgramCache]: Analyzing trace with hash -1410428474, now seen corresponding path program 1 times [2019-11-23 22:50:15,128 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:50:15,128 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1549955860] [2019-11-23 22:50:15,128 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:50:15,134 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:50:15,158 INFO L134 CoverageAnalysis]: Checked inductivity of 51 backedges. 13 proven. 0 refuted. 0 times theorem prover too weak. 38 trivial. 0 not checked. [2019-11-23 22:50:15,159 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1549955860] [2019-11-23 22:50:15,159 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-23 22:50:15,159 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-23 22:50:15,159 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [183667814] [2019-11-23 22:50:15,160 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-23 22:50:15,160 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:50:15,160 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-23 22:50:15,160 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:50:15,160 INFO L87 Difference]: Start difference. First operand 15055 states and 20502 transitions. Second operand 3 states. [2019-11-23 22:50:15,481 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:50:15,481 INFO L93 Difference]: Finished difference Result 25586 states and 34782 transitions. [2019-11-23 22:50:15,482 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-23 22:50:15,482 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 126 [2019-11-23 22:50:15,482 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:50:15,494 INFO L225 Difference]: With dead ends: 25586 [2019-11-23 22:50:15,494 INFO L226 Difference]: Without dead ends: 10588 [2019-11-23 22:50:15,505 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:50:15,513 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10588 states. [2019-11-23 22:50:15,809 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10588 to 8620. [2019-11-23 22:50:15,809 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8620 states. [2019-11-23 22:50:15,817 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8620 states to 8620 states and 11274 transitions. [2019-11-23 22:50:15,817 INFO L78 Accepts]: Start accepts. Automaton has 8620 states and 11274 transitions. Word has length 126 [2019-11-23 22:50:15,818 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:50:15,818 INFO L462 AbstractCegarLoop]: Abstraction has 8620 states and 11274 transitions. [2019-11-23 22:50:15,818 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-23 22:50:15,818 INFO L276 IsEmpty]: Start isEmpty. Operand 8620 states and 11274 transitions. [2019-11-23 22:50:15,829 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 128 [2019-11-23 22:50:15,829 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:50:15,829 INFO L410 BasicCegarLoop]: trace histogram [5, 4, 4, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:50:15,829 INFO L410 AbstractCegarLoop]: === Iteration 26 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:50:15,830 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:50:15,830 INFO L82 PathProgramCache]: Analyzing trace with hash 314934891, now seen corresponding path program 1 times [2019-11-23 22:50:15,830 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:50:15,830 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1662072027] [2019-11-23 22:50:15,830 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:50:15,838 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:50:15,872 INFO L134 CoverageAnalysis]: Checked inductivity of 54 backedges. 43 proven. 0 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2019-11-23 22:50:15,872 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1662072027] [2019-11-23 22:50:15,873 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-23 22:50:15,873 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-23 22:50:15,873 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1976343285] [2019-11-23 22:50:15,873 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-23 22:50:15,873 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:50:15,874 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-23 22:50:15,874 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:50:15,874 INFO L87 Difference]: Start difference. First operand 8620 states and 11274 transitions. Second operand 3 states. [2019-11-23 22:50:16,106 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:50:16,106 INFO L93 Difference]: Finished difference Result 14199 states and 18567 transitions. [2019-11-23 22:50:16,107 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-23 22:50:16,107 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 127 [2019-11-23 22:50:16,107 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:50:16,114 INFO L225 Difference]: With dead ends: 14199 [2019-11-23 22:50:16,114 INFO L226 Difference]: Without dead ends: 6733 [2019-11-23 22:50:16,119 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:50:16,123 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6733 states. [2019-11-23 22:50:16,278 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6733 to 6149. [2019-11-23 22:50:16,278 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6149 states. [2019-11-23 22:50:16,647 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6149 states to 6149 states and 7873 transitions. [2019-11-23 22:50:16,647 INFO L78 Accepts]: Start accepts. Automaton has 6149 states and 7873 transitions. Word has length 127 [2019-11-23 22:50:16,647 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:50:16,647 INFO L462 AbstractCegarLoop]: Abstraction has 6149 states and 7873 transitions. [2019-11-23 22:50:16,647 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-23 22:50:16,647 INFO L276 IsEmpty]: Start isEmpty. Operand 6149 states and 7873 transitions. [2019-11-23 22:50:16,652 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 134 [2019-11-23 22:50:16,653 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:50:16,653 INFO L410 BasicCegarLoop]: trace histogram [5, 4, 4, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:50:16,653 INFO L410 AbstractCegarLoop]: === Iteration 27 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:50:16,654 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:50:16,654 INFO L82 PathProgramCache]: Analyzing trace with hash -146147841, now seen corresponding path program 1 times [2019-11-23 22:50:16,654 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:50:16,654 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1696812823] [2019-11-23 22:50:16,654 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:50:16,662 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:50:16,691 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 36 proven. 0 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2019-11-23 22:50:16,691 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1696812823] [2019-11-23 22:50:16,691 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-23 22:50:16,691 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-23 22:50:16,692 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [934722813] [2019-11-23 22:50:16,692 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-23 22:50:16,692 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:50:16,692 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-23 22:50:16,692 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:50:16,693 INFO L87 Difference]: Start difference. First operand 6149 states and 7873 transitions. Second operand 3 states. [2019-11-23 22:50:16,989 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:50:16,989 INFO L93 Difference]: Finished difference Result 11907 states and 15226 transitions. [2019-11-23 22:50:16,990 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-23 22:50:16,990 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 133 [2019-11-23 22:50:16,990 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:50:16,997 INFO L225 Difference]: With dead ends: 11907 [2019-11-23 22:50:16,997 INFO L226 Difference]: Without dead ends: 6149 [2019-11-23 22:50:17,002 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:50:17,007 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6149 states. [2019-11-23 22:50:17,272 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6149 to 6109. [2019-11-23 22:50:17,272 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6109 states. [2019-11-23 22:50:17,280 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6109 states to 6109 states and 7791 transitions. [2019-11-23 22:50:17,280 INFO L78 Accepts]: Start accepts. Automaton has 6109 states and 7791 transitions. Word has length 133 [2019-11-23 22:50:17,280 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:50:17,280 INFO L462 AbstractCegarLoop]: Abstraction has 6109 states and 7791 transitions. [2019-11-23 22:50:17,280 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-23 22:50:17,280 INFO L276 IsEmpty]: Start isEmpty. Operand 6109 states and 7791 transitions. [2019-11-23 22:50:17,285 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 134 [2019-11-23 22:50:17,286 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:50:17,286 INFO L410 BasicCegarLoop]: trace histogram [5, 4, 4, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:50:17,286 INFO L410 AbstractCegarLoop]: === Iteration 28 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:50:17,286 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:50:17,287 INFO L82 PathProgramCache]: Analyzing trace with hash 1797709215, now seen corresponding path program 1 times [2019-11-23 22:50:17,287 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:50:17,287 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1745947687] [2019-11-23 22:50:17,287 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:50:17,295 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:50:17,327 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 36 proven. 0 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2019-11-23 22:50:17,327 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1745947687] [2019-11-23 22:50:17,327 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-23 22:50:17,327 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-23 22:50:17,327 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [594979058] [2019-11-23 22:50:17,328 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-23 22:50:17,328 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:50:17,328 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-23 22:50:17,328 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:50:17,328 INFO L87 Difference]: Start difference. First operand 6109 states and 7791 transitions. Second operand 3 states. [2019-11-23 22:50:17,527 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:50:17,527 INFO L93 Difference]: Finished difference Result 11855 states and 15104 transitions. [2019-11-23 22:50:17,527 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-23 22:50:17,527 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 133 [2019-11-23 22:50:17,528 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:50:17,533 INFO L225 Difference]: With dead ends: 11855 [2019-11-23 22:50:17,533 INFO L226 Difference]: Without dead ends: 6118 [2019-11-23 22:50:17,537 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:50:17,541 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6118 states. [2019-11-23 22:50:17,699 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6118 to 6078. [2019-11-23 22:50:17,699 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6078 states. [2019-11-23 22:50:17,705 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6078 states to 6078 states and 7719 transitions. [2019-11-23 22:50:17,705 INFO L78 Accepts]: Start accepts. Automaton has 6078 states and 7719 transitions. Word has length 133 [2019-11-23 22:50:17,705 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:50:17,705 INFO L462 AbstractCegarLoop]: Abstraction has 6078 states and 7719 transitions. [2019-11-23 22:50:17,705 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-23 22:50:17,705 INFO L276 IsEmpty]: Start isEmpty. Operand 6078 states and 7719 transitions. [2019-11-23 22:50:17,708 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 137 [2019-11-23 22:50:17,708 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:50:17,709 INFO L410 BasicCegarLoop]: trace histogram [5, 4, 4, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:50:17,709 INFO L410 AbstractCegarLoop]: === Iteration 29 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:50:17,709 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:50:17,709 INFO L82 PathProgramCache]: Analyzing trace with hash 282610594, now seen corresponding path program 1 times [2019-11-23 22:50:17,709 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:50:17,709 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [278215151] [2019-11-23 22:50:17,710 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:50:17,717 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:50:17,748 INFO L134 CoverageAnalysis]: Checked inductivity of 58 backedges. 46 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2019-11-23 22:50:17,748 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [278215151] [2019-11-23 22:50:17,748 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-23 22:50:17,748 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-23 22:50:17,749 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [627212605] [2019-11-23 22:50:17,749 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-23 22:50:17,749 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:50:17,749 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-23 22:50:17,750 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:50:17,750 INFO L87 Difference]: Start difference. First operand 6078 states and 7719 transitions. Second operand 3 states. [2019-11-23 22:50:18,083 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:50:18,084 INFO L93 Difference]: Finished difference Result 10860 states and 13837 transitions. [2019-11-23 22:50:18,084 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-23 22:50:18,084 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 136 [2019-11-23 22:50:18,085 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:50:18,092 INFO L225 Difference]: With dead ends: 10860 [2019-11-23 22:50:18,093 INFO L226 Difference]: Without dead ends: 5146 [2019-11-23 22:50:18,098 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:50:18,102 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5146 states. [2019-11-23 22:50:18,426 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5146 to 5076. [2019-11-23 22:50:18,427 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5076 states. [2019-11-23 22:50:18,435 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5076 states to 5076 states and 6341 transitions. [2019-11-23 22:50:18,435 INFO L78 Accepts]: Start accepts. Automaton has 5076 states and 6341 transitions. Word has length 136 [2019-11-23 22:50:18,436 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:50:18,436 INFO L462 AbstractCegarLoop]: Abstraction has 5076 states and 6341 transitions. [2019-11-23 22:50:18,436 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-23 22:50:18,436 INFO L276 IsEmpty]: Start isEmpty. Operand 5076 states and 6341 transitions. [2019-11-23 22:50:18,440 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 137 [2019-11-23 22:50:18,440 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:50:18,441 INFO L410 BasicCegarLoop]: trace histogram [5, 4, 4, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:50:18,441 INFO L410 AbstractCegarLoop]: === Iteration 30 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:50:18,441 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:50:18,441 INFO L82 PathProgramCache]: Analyzing trace with hash -1519116211, now seen corresponding path program 1 times [2019-11-23 22:50:18,442 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:50:18,442 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [259653809] [2019-11-23 22:50:18,442 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:50:18,451 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:50:18,494 INFO L134 CoverageAnalysis]: Checked inductivity of 58 backedges. 45 proven. 0 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2019-11-23 22:50:18,494 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [259653809] [2019-11-23 22:50:18,494 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-23 22:50:18,495 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-23 22:50:18,495 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1744410006] [2019-11-23 22:50:18,496 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-23 22:50:18,496 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:50:18,496 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-23 22:50:18,496 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:50:18,496 INFO L87 Difference]: Start difference. First operand 5076 states and 6341 transitions. Second operand 3 states. [2019-11-23 22:50:18,748 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:50:18,748 INFO L93 Difference]: Finished difference Result 9133 states and 11446 transitions. [2019-11-23 22:50:18,748 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-23 22:50:18,749 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 136 [2019-11-23 22:50:18,749 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:50:18,753 INFO L225 Difference]: With dead ends: 9133 [2019-11-23 22:50:18,753 INFO L226 Difference]: Without dead ends: 4098 [2019-11-23 22:50:18,757 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:50:18,761 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4098 states. [2019-11-23 22:50:18,928 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4098 to 4080. [2019-11-23 22:50:18,928 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4080 states. [2019-11-23 22:50:18,933 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4080 states to 4080 states and 5008 transitions. [2019-11-23 22:50:18,933 INFO L78 Accepts]: Start accepts. Automaton has 4080 states and 5008 transitions. Word has length 136 [2019-11-23 22:50:18,933 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:50:18,933 INFO L462 AbstractCegarLoop]: Abstraction has 4080 states and 5008 transitions. [2019-11-23 22:50:18,934 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-23 22:50:18,934 INFO L276 IsEmpty]: Start isEmpty. Operand 4080 states and 5008 transitions. [2019-11-23 22:50:18,973 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 170 [2019-11-23 22:50:18,973 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:50:18,973 INFO L410 BasicCegarLoop]: trace histogram [6, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:50:18,973 INFO L410 AbstractCegarLoop]: === Iteration 31 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:50:18,973 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:50:18,974 INFO L82 PathProgramCache]: Analyzing trace with hash -1856914244, now seen corresponding path program 1 times [2019-11-23 22:50:18,974 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:50:18,974 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1573522508] [2019-11-23 22:50:18,974 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:50:18,984 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:50:19,016 INFO L134 CoverageAnalysis]: Checked inductivity of 99 backedges. 75 proven. 0 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2019-11-23 22:50:19,016 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1573522508] [2019-11-23 22:50:19,017 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-23 22:50:19,017 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-23 22:50:19,017 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [485513203] [2019-11-23 22:50:19,017 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-23 22:50:19,017 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:50:19,018 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-23 22:50:19,018 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:50:19,018 INFO L87 Difference]: Start difference. First operand 4080 states and 5008 transitions. Second operand 3 states. [2019-11-23 22:50:19,173 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:50:19,173 INFO L93 Difference]: Finished difference Result 7575 states and 9357 transitions. [2019-11-23 22:50:19,173 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-23 22:50:19,173 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 169 [2019-11-23 22:50:19,173 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:50:19,176 INFO L225 Difference]: With dead ends: 7575 [2019-11-23 22:50:19,176 INFO L226 Difference]: Without dead ends: 3771 [2019-11-23 22:50:19,179 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:50:19,181 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3771 states. [2019-11-23 22:50:19,275 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3771 to 3560. [2019-11-23 22:50:19,275 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3560 states. [2019-11-23 22:50:19,278 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3560 states to 3560 states and 4335 transitions. [2019-11-23 22:50:19,279 INFO L78 Accepts]: Start accepts. Automaton has 3560 states and 4335 transitions. Word has length 169 [2019-11-23 22:50:19,279 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:50:19,283 INFO L462 AbstractCegarLoop]: Abstraction has 3560 states and 4335 transitions. [2019-11-23 22:50:19,283 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-23 22:50:19,283 INFO L276 IsEmpty]: Start isEmpty. Operand 3560 states and 4335 transitions. [2019-11-23 22:50:19,286 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 177 [2019-11-23 22:50:19,286 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:50:19,286 INFO L410 BasicCegarLoop]: trace histogram [6, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:50:19,287 INFO L410 AbstractCegarLoop]: === Iteration 32 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:50:19,287 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:50:19,287 INFO L82 PathProgramCache]: Analyzing trace with hash 38014472, now seen corresponding path program 1 times [2019-11-23 22:50:19,287 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:50:19,287 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [668819430] [2019-11-23 22:50:19,288 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:50:19,298 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:50:19,332 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 82 proven. 0 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2019-11-23 22:50:19,333 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [668819430] [2019-11-23 22:50:19,333 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-23 22:50:19,333 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-23 22:50:19,333 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [593058684] [2019-11-23 22:50:19,334 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-23 22:50:19,334 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:50:19,335 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-23 22:50:19,335 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:50:19,335 INFO L87 Difference]: Start difference. First operand 3560 states and 4335 transitions. Second operand 3 states. [2019-11-23 22:50:19,664 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:50:19,665 INFO L93 Difference]: Finished difference Result 8918 states and 10901 transitions. [2019-11-23 22:50:19,665 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-23 22:50:19,665 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 176 [2019-11-23 22:50:19,666 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:50:19,674 INFO L225 Difference]: With dead ends: 8918 [2019-11-23 22:50:19,674 INFO L226 Difference]: Without dead ends: 5634 [2019-11-23 22:50:19,679 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:50:19,685 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5634 states. [2019-11-23 22:50:19,999 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5634 to 5414. [2019-11-23 22:50:20,000 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5414 states. [2019-11-23 22:50:20,008 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5414 states to 5414 states and 6513 transitions. [2019-11-23 22:50:20,009 INFO L78 Accepts]: Start accepts. Automaton has 5414 states and 6513 transitions. Word has length 176 [2019-11-23 22:50:20,009 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:50:20,009 INFO L462 AbstractCegarLoop]: Abstraction has 5414 states and 6513 transitions. [2019-11-23 22:50:20,009 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-23 22:50:20,009 INFO L276 IsEmpty]: Start isEmpty. Operand 5414 states and 6513 transitions. [2019-11-23 22:50:20,013 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 180 [2019-11-23 22:50:20,013 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:50:20,014 INFO L410 BasicCegarLoop]: trace histogram [6, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:50:20,014 INFO L410 AbstractCegarLoop]: === Iteration 33 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:50:20,014 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:50:20,014 INFO L82 PathProgramCache]: Analyzing trace with hash -1974043446, now seen corresponding path program 1 times [2019-11-23 22:50:20,015 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:50:20,015 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [147435902] [2019-11-23 22:50:20,015 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:50:20,024 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:50:20,068 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 79 proven. 0 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2019-11-23 22:50:20,069 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [147435902] [2019-11-23 22:50:20,069 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-23 22:50:20,069 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-23 22:50:20,069 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1835247164] [2019-11-23 22:50:20,070 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-23 22:50:20,070 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:50:20,070 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-23 22:50:20,070 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:50:20,070 INFO L87 Difference]: Start difference. First operand 5414 states and 6513 transitions. Second operand 3 states. [2019-11-23 22:50:20,279 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:50:20,280 INFO L93 Difference]: Finished difference Result 8838 states and 10694 transitions. [2019-11-23 22:50:20,280 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-23 22:50:20,280 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 179 [2019-11-23 22:50:20,281 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:50:20,286 INFO L225 Difference]: With dead ends: 8838 [2019-11-23 22:50:20,286 INFO L226 Difference]: Without dead ends: 3700 [2019-11-23 22:50:20,292 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:50:20,295 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3700 states. [2019-11-23 22:50:20,509 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3700 to 3094. [2019-11-23 22:50:20,510 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3094 states. [2019-11-23 22:50:20,514 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3094 states to 3094 states and 3684 transitions. [2019-11-23 22:50:20,515 INFO L78 Accepts]: Start accepts. Automaton has 3094 states and 3684 transitions. Word has length 179 [2019-11-23 22:50:20,515 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:50:20,515 INFO L462 AbstractCegarLoop]: Abstraction has 3094 states and 3684 transitions. [2019-11-23 22:50:20,515 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-23 22:50:20,516 INFO L276 IsEmpty]: Start isEmpty. Operand 3094 states and 3684 transitions. [2019-11-23 22:50:20,518 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 180 [2019-11-23 22:50:20,518 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:50:20,519 INFO L410 BasicCegarLoop]: trace histogram [6, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:50:20,519 INFO L410 AbstractCegarLoop]: === Iteration 34 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:50:20,519 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:50:20,520 INFO L82 PathProgramCache]: Analyzing trace with hash -831540980, now seen corresponding path program 1 times [2019-11-23 22:50:20,520 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:50:20,520 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1872469591] [2019-11-23 22:50:20,520 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:50:20,533 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:50:20,581 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 91 proven. 0 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2019-11-23 22:50:20,581 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1872469591] [2019-11-23 22:50:20,581 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-23 22:50:20,581 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-23 22:50:20,581 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1045877785] [2019-11-23 22:50:20,582 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-23 22:50:20,582 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:50:20,582 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-23 22:50:20,582 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-23 22:50:20,583 INFO L87 Difference]: Start difference. First operand 3094 states and 3684 transitions. Second operand 4 states. [2019-11-23 22:50:20,735 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:50:20,736 INFO L93 Difference]: Finished difference Result 4689 states and 5567 transitions. [2019-11-23 22:50:20,736 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-23 22:50:20,736 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 179 [2019-11-23 22:50:20,736 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:50:20,738 INFO L225 Difference]: With dead ends: 4689 [2019-11-23 22:50:20,739 INFO L226 Difference]: Without dead ends: 1871 [2019-11-23 22:50:20,741 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-23 22:50:20,743 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1871 states. [2019-11-23 22:50:20,845 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1871 to 1584. [2019-11-23 22:50:20,846 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1584 states. [2019-11-23 22:50:20,849 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1584 states to 1584 states and 1844 transitions. [2019-11-23 22:50:20,849 INFO L78 Accepts]: Start accepts. Automaton has 1584 states and 1844 transitions. Word has length 179 [2019-11-23 22:50:20,850 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:50:20,850 INFO L462 AbstractCegarLoop]: Abstraction has 1584 states and 1844 transitions. [2019-11-23 22:50:20,850 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-23 22:50:20,850 INFO L276 IsEmpty]: Start isEmpty. Operand 1584 states and 1844 transitions. [2019-11-23 22:50:20,852 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 184 [2019-11-23 22:50:20,852 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:50:20,853 INFO L410 BasicCegarLoop]: trace histogram [6, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:50:20,853 INFO L410 AbstractCegarLoop]: === Iteration 35 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:50:20,853 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:50:20,854 INFO L82 PathProgramCache]: Analyzing trace with hash 1681635082, now seen corresponding path program 1 times [2019-11-23 22:50:20,856 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:50:20,858 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [419028696] [2019-11-23 22:50:20,859 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:50:20,879 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:50:20,940 INFO L134 CoverageAnalysis]: Checked inductivity of 107 backedges. 100 proven. 0 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2019-11-23 22:50:20,940 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [419028696] [2019-11-23 22:50:20,940 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-23 22:50:20,940 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-23 22:50:20,941 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [947868831] [2019-11-23 22:50:20,941 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-23 22:50:20,941 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:50:20,942 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-23 22:50:20,942 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:50:20,942 INFO L87 Difference]: Start difference. First operand 1584 states and 1844 transitions. Second operand 3 states. [2019-11-23 22:50:21,156 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:50:21,157 INFO L93 Difference]: Finished difference Result 4040 states and 4732 transitions. [2019-11-23 22:50:21,157 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-23 22:50:21,157 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 183 [2019-11-23 22:50:21,157 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:50:21,160 INFO L225 Difference]: With dead ends: 4040 [2019-11-23 22:50:21,160 INFO L226 Difference]: Without dead ends: 2426 [2019-11-23 22:50:21,162 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:50:21,163 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2426 states. [2019-11-23 22:50:21,290 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2426 to 2416. [2019-11-23 22:50:21,290 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2416 states. [2019-11-23 22:50:21,293 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2416 states to 2416 states and 2812 transitions. [2019-11-23 22:50:21,294 INFO L78 Accepts]: Start accepts. Automaton has 2416 states and 2812 transitions. Word has length 183 [2019-11-23 22:50:21,294 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:50:21,294 INFO L462 AbstractCegarLoop]: Abstraction has 2416 states and 2812 transitions. [2019-11-23 22:50:21,294 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-23 22:50:21,294 INFO L276 IsEmpty]: Start isEmpty. Operand 2416 states and 2812 transitions. [2019-11-23 22:50:21,296 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 184 [2019-11-23 22:50:21,296 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:50:21,296 INFO L410 BasicCegarLoop]: trace histogram [6, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:50:21,297 INFO L410 AbstractCegarLoop]: === Iteration 36 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:50:21,297 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:50:21,297 INFO L82 PathProgramCache]: Analyzing trace with hash 1256160142, now seen corresponding path program 1 times [2019-11-23 22:50:21,297 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:50:21,297 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [6317929] [2019-11-23 22:50:21,298 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:50:21,309 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-23 22:50:21,382 INFO L134 CoverageAnalysis]: Checked inductivity of 107 backedges. 93 proven. 0 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2019-11-23 22:50:21,383 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [6317929] [2019-11-23 22:50:21,383 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-23 22:50:21,383 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-23 22:50:21,383 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [289043140] [2019-11-23 22:50:21,384 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-23 22:50:21,384 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-11-23 22:50:21,384 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-23 22:50:21,384 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:50:21,384 INFO L87 Difference]: Start difference. First operand 2416 states and 2812 transitions. Second operand 3 states. [2019-11-23 22:50:21,469 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-23 22:50:21,470 INFO L93 Difference]: Finished difference Result 3364 states and 3884 transitions. [2019-11-23 22:50:21,470 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-23 22:50:21,470 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 183 [2019-11-23 22:50:21,470 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-23 22:50:21,471 INFO L225 Difference]: With dead ends: 3364 [2019-11-23 22:50:21,471 INFO L226 Difference]: Without dead ends: 1214 [2019-11-23 22:50:21,472 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-23 22:50:21,474 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1214 states. [2019-11-23 22:50:21,511 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1214 to 1192. [2019-11-23 22:50:21,511 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1192 states. [2019-11-23 22:50:21,512 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1192 states to 1192 states and 1317 transitions. [2019-11-23 22:50:21,512 INFO L78 Accepts]: Start accepts. Automaton has 1192 states and 1317 transitions. Word has length 183 [2019-11-23 22:50:21,512 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-23 22:50:21,513 INFO L462 AbstractCegarLoop]: Abstraction has 1192 states and 1317 transitions. [2019-11-23 22:50:21,513 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-23 22:50:21,513 INFO L276 IsEmpty]: Start isEmpty. Operand 1192 states and 1317 transitions. [2019-11-23 22:50:21,513 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 185 [2019-11-23 22:50:21,514 INFO L402 BasicCegarLoop]: Found error trace [2019-11-23 22:50:21,514 INFO L410 BasicCegarLoop]: trace histogram [6, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-23 22:50:21,514 INFO L410 AbstractCegarLoop]: === Iteration 37 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-11-23 22:50:21,514 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-23 22:50:21,514 INFO L82 PathProgramCache]: Analyzing trace with hash 1772258692, now seen corresponding path program 1 times [2019-11-23 22:50:21,514 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-11-23 22:50:21,514 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1179279836] [2019-11-23 22:50:21,515 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-23 22:50:21,537 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-11-23 22:50:21,556 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-11-23 22:50:21,623 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-11-23 22:50:21,623 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-11-23 22:50:21,775 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 23.11 10:50:21 BoogieIcfgContainer [2019-11-23 22:50:21,775 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-11-23 22:50:21,777 INFO L168 Benchmark]: Toolchain (without parser) took 26547.40 ms. Allocated memory was 144.7 MB in the beginning and 1.9 GB in the end (delta: 1.8 GB). Free memory was 102.0 MB in the beginning and 1.6 GB in the end (delta: -1.5 GB). Peak memory consumption was 227.8 MB. Max. memory is 7.1 GB. [2019-11-23 22:50:21,777 INFO L168 Benchmark]: CDTParser took 0.71 ms. Allocated memory is still 144.7 MB. Free memory was 121.1 MB in the beginning and 120.8 MB in the end (delta: 210.1 kB). Peak memory consumption was 210.1 kB. Max. memory is 7.1 GB. [2019-11-23 22:50:21,778 INFO L168 Benchmark]: CACSL2BoogieTranslator took 549.20 ms. Allocated memory was 144.7 MB in the beginning and 201.3 MB in the end (delta: 56.6 MB). Free memory was 101.8 MB in the beginning and 177.4 MB in the end (delta: -75.6 MB). Peak memory consumption was 21.7 MB. Max. memory is 7.1 GB. [2019-11-23 22:50:21,778 INFO L168 Benchmark]: Boogie Procedure Inliner took 67.44 ms. Allocated memory is still 201.3 MB. Free memory was 176.7 MB in the beginning and 174.1 MB in the end (delta: 2.7 MB). Peak memory consumption was 2.7 MB. Max. memory is 7.1 GB. [2019-11-23 22:50:21,778 INFO L168 Benchmark]: Boogie Preprocessor took 53.85 ms. Allocated memory is still 201.3 MB. Free memory was 174.1 MB in the beginning and 172.0 MB in the end (delta: 2.0 MB). Peak memory consumption was 2.0 MB. Max. memory is 7.1 GB. [2019-11-23 22:50:21,779 INFO L168 Benchmark]: RCFGBuilder took 687.18 ms. Allocated memory is still 201.3 MB. Free memory was 172.0 MB in the beginning and 131.9 MB in the end (delta: 40.2 MB). Peak memory consumption was 40.2 MB. Max. memory is 7.1 GB. [2019-11-23 22:50:21,779 INFO L168 Benchmark]: TraceAbstraction took 25184.71 ms. Allocated memory was 201.3 MB in the beginning and 1.9 GB in the end (delta: 1.7 GB). Free memory was 131.9 MB in the beginning and 1.6 GB in the end (delta: -1.5 GB). Peak memory consumption was 201.0 MB. Max. memory is 7.1 GB. [2019-11-23 22:50:21,781 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.71 ms. Allocated memory is still 144.7 MB. Free memory was 121.1 MB in the beginning and 120.8 MB in the end (delta: 210.1 kB). Peak memory consumption was 210.1 kB. Max. memory is 7.1 GB. * CACSL2BoogieTranslator took 549.20 ms. Allocated memory was 144.7 MB in the beginning and 201.3 MB in the end (delta: 56.6 MB). Free memory was 101.8 MB in the beginning and 177.4 MB in the end (delta: -75.6 MB). Peak memory consumption was 21.7 MB. Max. memory is 7.1 GB. * Boogie Procedure Inliner took 67.44 ms. Allocated memory is still 201.3 MB. Free memory was 176.7 MB in the beginning and 174.1 MB in the end (delta: 2.7 MB). Peak memory consumption was 2.7 MB. Max. memory is 7.1 GB. * Boogie Preprocessor took 53.85 ms. Allocated memory is still 201.3 MB. Free memory was 174.1 MB in the beginning and 172.0 MB in the end (delta: 2.0 MB). Peak memory consumption was 2.0 MB. Max. memory is 7.1 GB. * RCFGBuilder took 687.18 ms. Allocated memory is still 201.3 MB. Free memory was 172.0 MB in the beginning and 131.9 MB in the end (delta: 40.2 MB). Peak memory consumption was 40.2 MB. Max. memory is 7.1 GB. * TraceAbstraction took 25184.71 ms. Allocated memory was 201.3 MB in the beginning and 1.9 GB in the end (delta: 1.7 GB). Free memory was 131.9 MB in the beginning and 1.6 GB in the end (delta: -1.5 GB). Peak memory consumption was 201.0 MB. Max. memory is 7.1 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 13]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L18] int c ; [L19] int c_t ; [L20] int c_req_up ; [L21] int p_in ; [L22] int p_out ; [L23] int wl_st ; [L24] int c1_st ; [L25] int c2_st ; [L26] int wb_st ; [L27] int r_st ; [L28] int wl_i ; [L29] int c1_i ; [L30] int c2_i ; [L31] int wb_i ; [L32] int r_i ; [L33] int wl_pc ; [L34] int c1_pc ; [L35] int c2_pc ; [L36] int wb_pc ; [L37] int e_e ; [L38] int e_f ; [L39] int e_g ; [L40] int e_c ; [L41] int e_p_in ; [L42] int e_wl ; [L48] int d ; [L49] int data ; [L50] int processed ; [L51] static int t_b ; VAL [c=0, c1_i=0, c1_pc=0, c1_st=0, c2_i=0, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=0, e_e=0, e_f=0, e_g=0, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=0, t_b=0, wb_i=0, wb_pc=0, wb_st=0, wl_i=0, wl_pc=0, wl_st=0] [L679] int __retres1 ; [L683] e_wl = 2 [L684] e_c = e_wl [L685] e_g = e_c [L686] e_f = e_g [L687] e_e = e_f [L688] wl_pc = 0 [L689] c1_pc = 0 [L690] c2_pc = 0 [L691] wb_pc = 0 [L692] wb_i = 1 [L693] c2_i = wb_i [L694] c1_i = c2_i [L695] wl_i = c1_i [L696] r_i = 0 [L697] c_req_up = 0 [L698] d = 0 [L699] c = 0 [L390] int kernel_st ; [L393] kernel_st = 0 VAL [c=0, c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L394] COND FALSE !((int )c_req_up == 1) VAL [c=0, c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L405] COND TRUE (int )wl_i == 1 [L406] wl_st = 0 VAL [c=0, c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L410] COND TRUE (int )c1_i == 1 [L411] c1_st = 0 VAL [c=0, c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L415] COND TRUE (int )c2_i == 1 [L416] c2_st = 0 VAL [c=0, c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L420] COND TRUE (int )wb_i == 1 [L421] wb_st = 0 VAL [c=0, c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L425] COND FALSE !((int )r_i == 1) [L428] r_st = 2 VAL [c=0, c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L430] COND FALSE !((int )e_f == 0) VAL [c=0, c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L435] COND FALSE !((int )e_g == 0) VAL [c=0, c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L440] COND FALSE !((int )e_e == 0) VAL [c=0, c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L445] COND FALSE !((int )e_c == 0) VAL [c=0, c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L450] COND FALSE !((int )e_wl == 0) VAL [c=0, c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L455] COND FALSE !((int )wl_pc == 1) VAL [c=0, c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L463] COND FALSE !((int )wl_pc == 2) VAL [c=0, c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L473] COND FALSE !((int )c1_pc == 1) VAL [c=0, c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L482] COND FALSE !((int )c2_pc == 1) VAL [c=0, c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L491] COND FALSE !((int )wb_pc == 1) VAL [c=0, c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L500] COND FALSE !((int )e_c == 1) VAL [c=0, c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L505] COND FALSE !((int )e_e == 1) VAL [c=0, c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L510] COND FALSE !((int )e_f == 1) VAL [c=0, c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L515] COND FALSE !((int )e_g == 1) VAL [c=0, c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L520] COND FALSE !((int )e_c == 1) VAL [c=0, c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L525] COND FALSE !((int )e_wl == 1) VAL [c=0, c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L531] COND TRUE 1 VAL [c=0, c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L534] kernel_st = 1 [L276] int tmp ; [L277] int tmp___0 ; [L278] int tmp___1 ; [L279] int tmp___2 ; [L280] int tmp___3 ; VAL [c=0, c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L284] COND TRUE 1 VAL [c=0, c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L286] COND TRUE (int )wl_st == 0 VAL [c=0, c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L307] COND TRUE (int )wl_st == 0 [L309] tmp = __VERIFIER_nondet_int() [L311] COND TRUE \read(tmp) [L313] wl_st = 1 [L53] int t ; VAL [c=0, c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=1] [L56] COND TRUE (int )wl_pc == 0 VAL [c=0, c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=1] [L70] wl_st = 2 [L71] wl_pc = 1 [L72] e_wl = 0 VAL [c=0, c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=1, wl_st=2] [L322] COND TRUE (int )c1_st == 0 [L324] tmp___0 = __VERIFIER_nondet_int() [L326] COND TRUE \read(tmp___0) [L328] c1_st = 1 VAL [c=0, c1_i=1, c1_pc=0, c1_st=1, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=1, wl_st=2] [L127] COND TRUE (int )c1_pc == 0 VAL [c=0, c1_i=1, c1_pc=0, c1_st=1, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=1, wl_st=2] [L138] COND TRUE 1 VAL [c=0, c1_i=1, c1_pc=0, c1_st=1, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=1, wl_st=2] [L140] c1_st = 2 [L141] c1_pc = 1 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=1, wl_st=2] [L337] COND TRUE (int )c2_st == 0 [L339] tmp___1 = __VERIFIER_nondet_int() [L341] COND TRUE \read(tmp___1) [L343] c2_st = 1 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=0, c2_st=1, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=1, wl_st=2] [L172] COND TRUE (int )c2_pc == 0 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=0, c2_st=1, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=1, wl_st=2] [L183] COND TRUE 1 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=0, c2_st=1, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=1, wl_st=2] [L185] c2_st = 2 [L186] c2_pc = 1 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=1, wl_st=2] [L352] COND TRUE (int )wb_st == 0 [L354] tmp___2 = __VERIFIER_nondet_int() [L356] COND TRUE \read(tmp___2) [L358] wb_st = 1 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=1, wl_i=1, wl_pc=1, wl_st=2] [L217] COND TRUE (int )wb_pc == 0 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=1, wl_i=1, wl_pc=1, wl_st=2] [L228] COND TRUE 1 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=1, wl_i=1, wl_pc=1, wl_st=2] [L230] wb_st = 2 [L231] wb_pc = 1 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=2] [L367] COND FALSE !((int )r_st == 0) VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=2] [L284] COND TRUE 1 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=2] [L286] COND FALSE !((int )wl_st == 0) VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=2] [L289] COND FALSE !((int )c1_st == 0) VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=2] [L292] COND FALSE !((int )c2_st == 0) VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=2] [L295] COND FALSE !((int )wb_st == 0) VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=2] [L298] COND FALSE !((int )r_st == 0) VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=2] [L537] kernel_st = 2 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=2] [L538] COND FALSE !((int )c_req_up == 1) VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=2] [L549] kernel_st = 3 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=2] [L550] COND FALSE !((int )e_f == 0) VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=2] [L555] COND FALSE !((int )e_g == 0) VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=2] [L560] COND FALSE !((int )e_e == 0) VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=2] [L565] COND FALSE !((int )e_c == 0) VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=2] [L570] COND TRUE (int )e_wl == 0 [L571] e_wl = 1 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=1, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=2] [L575] COND TRUE (int )wl_pc == 1 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=1, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=2] [L576] COND TRUE (int )e_wl == 1 [L577] wl_st = 0 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=1, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=0] [L593] COND TRUE (int )c1_pc == 1 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=1, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=0] [L594] COND FALSE !((int )e_f == 1) VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=1, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=0] [L602] COND TRUE (int )c2_pc == 1 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=1, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=0] [L603] COND FALSE !((int )e_f == 1) VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=1, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=0] [L611] COND TRUE (int )wb_pc == 1 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=1, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=0] [L612] COND FALSE !((int )e_g == 1) VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=1, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=0] [L620] COND FALSE !((int )e_c == 1) VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=1, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=0] [L625] COND FALSE !((int )e_e == 1) VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=1, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=0] [L630] COND FALSE !((int )e_f == 1) VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=1, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=0] [L635] COND FALSE !((int )e_g == 1) VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=1, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=0] [L640] COND FALSE !((int )e_c == 1) VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=1, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=0] [L645] COND TRUE (int )e_wl == 1 [L646] e_wl = 2 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=0] [L650] COND TRUE (int )wl_st == 0 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=0] [L531] COND TRUE 1 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=0] [L534] kernel_st = 1 [L276] int tmp ; [L277] int tmp___0 ; [L278] int tmp___1 ; [L279] int tmp___2 ; [L280] int tmp___3 ; VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=0] [L284] COND TRUE 1 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=0] [L286] COND TRUE (int )wl_st == 0 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=0] [L307] COND TRUE (int )wl_st == 0 [L309] tmp = __VERIFIER_nondet_int() [L311] COND TRUE \read(tmp) [L313] wl_st = 1 [L53] int t ; VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=1] [L56] COND FALSE !((int )wl_pc == 0) VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=1] [L59] COND FALSE !((int )wl_pc == 2) VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=1] [L62] COND TRUE (int )wl_pc == 1 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=1] [L77] COND TRUE 1 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=1] [L79] t = d [L80] data = d [L81] processed = 0 [L82] e_f = 1 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=1, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=1] [L83] COND TRUE (int )c1_pc == 1 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=1, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=1] [L84] COND TRUE (int )e_f == 1 [L85] c1_st = 0 VAL [c=0, c1_i=1, c1_pc=1, c1_st=0, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=1, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=1] [L92] COND TRUE (int )c2_pc == 1 VAL [c=0, c1_i=1, c1_pc=1, c1_st=0, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=1, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=1] [L93] COND TRUE (int )e_f == 1 [L94] c2_st = 0 VAL [c=0, c1_i=1, c1_pc=1, c1_st=0, c2_i=1, c2_pc=1, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=1, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=1] [L101] e_f = 2 [L102] wl_st = 2 [L103] wl_pc = 2 [L104] t_b = t VAL [c=0, c1_i=1, c1_pc=1, c1_st=0, c2_i=1, c2_pc=1, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L322] COND TRUE (int )c1_st == 0 [L324] tmp___0 = __VERIFIER_nondet_int() [L326] COND TRUE \read(tmp___0) [L328] c1_st = 1 VAL [c=0, c1_i=1, c1_pc=1, c1_st=1, c2_i=1, c2_pc=1, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L127] COND FALSE !((int )c1_pc == 0) VAL [c=0, c1_i=1, c1_pc=1, c1_st=1, c2_i=1, c2_pc=1, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L130] COND TRUE (int )c1_pc == 1 VAL [c=0, c1_i=1, c1_pc=1, c1_st=1, c2_i=1, c2_pc=1, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L145] COND TRUE ! processed [L146] data += 1 [L147] e_g = 1 VAL [c=0, c1_i=1, c1_pc=1, c1_st=1, c2_i=1, c2_pc=1, c2_st=0, c_req_up=0, c_t=0, d=0, data=1, e_c=2, e_e=2, e_f=2, e_g=1, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L148] COND TRUE (int )wb_pc == 1 VAL [c=0, c1_i=1, c1_pc=1, c1_st=1, c2_i=1, c2_pc=1, c2_st=0, c_req_up=0, c_t=0, d=0, data=1, e_c=2, e_e=2, e_f=2, e_g=1, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L149] COND TRUE (int )e_g == 1 [L150] wb_st = 0 VAL [c=0, c1_i=1, c1_pc=1, c1_st=1, c2_i=1, c2_pc=1, c2_st=0, c_req_up=0, c_t=0, d=0, data=1, e_c=2, e_e=2, e_f=2, e_g=1, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=0, wl_i=1, wl_pc=2, wl_st=2] [L157] e_g = 2 VAL [c=0, c1_i=1, c1_pc=1, c1_st=1, c2_i=1, c2_pc=1, c2_st=0, c_req_up=0, c_t=0, d=0, data=1, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=0, wl_i=1, wl_pc=2, wl_st=2] [L138] COND TRUE 1 VAL [c=0, c1_i=1, c1_pc=1, c1_st=1, c2_i=1, c2_pc=1, c2_st=0, c_req_up=0, c_t=0, d=0, data=1, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=0, wl_i=1, wl_pc=2, wl_st=2] [L140] c1_st = 2 [L141] c1_pc = 1 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=0, c_req_up=0, c_t=0, d=0, data=1, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=0, wl_i=1, wl_pc=2, wl_st=2] [L337] COND TRUE (int )c2_st == 0 [L339] tmp___1 = __VERIFIER_nondet_int() [L341] COND TRUE \read(tmp___1) [L343] c2_st = 1 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=1, c_req_up=0, c_t=0, d=0, data=1, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=0, wl_i=1, wl_pc=2, wl_st=2] [L172] COND FALSE !((int )c2_pc == 0) VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=1, c_req_up=0, c_t=0, d=0, data=1, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=0, wl_i=1, wl_pc=2, wl_st=2] [L175] COND TRUE (int )c2_pc == 1 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=1, c_req_up=0, c_t=0, d=0, data=1, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=0, wl_i=1, wl_pc=2, wl_st=2] [L190] COND TRUE ! processed [L191] data += 1 [L192] e_g = 1 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=1, c_req_up=0, c_t=0, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=1, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=0, wl_i=1, wl_pc=2, wl_st=2] [L193] COND TRUE (int )wb_pc == 1 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=1, c_req_up=0, c_t=0, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=1, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=0, wl_i=1, wl_pc=2, wl_st=2] [L194] COND TRUE (int )e_g == 1 [L195] wb_st = 0 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=1, c_req_up=0, c_t=0, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=1, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=0, wl_i=1, wl_pc=2, wl_st=2] [L202] e_g = 2 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=1, c_req_up=0, c_t=0, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=0, wl_i=1, wl_pc=2, wl_st=2] [L183] COND TRUE 1 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=1, c_req_up=0, c_t=0, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=0, wl_i=1, wl_pc=2, wl_st=2] [L185] c2_st = 2 [L186] c2_pc = 1 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=0, wl_i=1, wl_pc=2, wl_st=2] [L352] COND TRUE (int )wb_st == 0 [L354] tmp___2 = __VERIFIER_nondet_int() [L356] COND TRUE \read(tmp___2) [L358] wb_st = 1 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=1, wl_i=1, wl_pc=2, wl_st=2] [L217] COND FALSE !((int )wb_pc == 0) VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=1, wl_i=1, wl_pc=2, wl_st=2] [L220] COND TRUE (int )wb_pc == 1 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=1, wl_i=1, wl_pc=2, wl_st=2] [L235] c_t = data [L236] c_req_up = 1 [L237] processed = 1 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=1, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=1, wl_i=1, wl_pc=2, wl_st=2] [L228] COND TRUE 1 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=1, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=1, wl_i=1, wl_pc=2, wl_st=2] [L230] wb_st = 2 [L231] wb_pc = 1 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=1, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L367] COND FALSE !((int )r_st == 0) VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=1, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L284] COND TRUE 1 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=1, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L286] COND FALSE !((int )wl_st == 0) VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=1, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L289] COND FALSE !((int )c1_st == 0) VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=1, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L292] COND FALSE !((int )c2_st == 0) VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=1, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L295] COND FALSE !((int )wb_st == 0) VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=1, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L298] COND FALSE !((int )r_st == 0) VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=1, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L537] kernel_st = 2 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=1, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L538] COND TRUE (int )c_req_up == 1 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=1, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L539] COND TRUE c != c_t [L540] c = c_t [L541] e_c = 0 VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=1, c_t=2, d=0, data=2, e_c=0, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L545] c_req_up = 0 VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=0, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L549] kernel_st = 3 VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=0, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L550] COND FALSE !((int )e_f == 0) VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=0, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L555] COND FALSE !((int )e_g == 0) VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=0, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L560] COND FALSE !((int )e_e == 0) VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=0, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L565] COND TRUE (int )e_c == 0 [L566] e_c = 1 VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=1, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L570] COND FALSE !((int )e_wl == 0) VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=1, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L575] COND FALSE !((int )wl_pc == 1) VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=1, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L583] COND TRUE (int )wl_pc == 2 VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=1, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L584] COND FALSE !((int )e_e == 1) VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=1, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L593] COND TRUE (int )c1_pc == 1 VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=1, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L594] COND FALSE !((int )e_f == 1) VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=1, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L602] COND TRUE (int )c2_pc == 1 VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=1, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L603] COND FALSE !((int )e_f == 1) VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=1, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L611] COND TRUE (int )wb_pc == 1 VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=1, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L612] COND FALSE !((int )e_g == 1) VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=1, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L620] COND TRUE (int )e_c == 1 [L621] r_st = 0 VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=1, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L625] COND FALSE !((int )e_e == 1) VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=1, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L630] COND FALSE !((int )e_f == 1) VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=1, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L635] COND FALSE !((int )e_g == 1) VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=1, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L640] COND TRUE (int )e_c == 1 [L641] e_c = 2 VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L645] COND FALSE !((int )e_wl == 1) VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L650] COND FALSE !((int )wl_st == 0) VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L653] COND FALSE !((int )c1_st == 0) VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L656] COND FALSE !((int )c2_st == 0) VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L659] COND FALSE !((int )wb_st == 0) VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L662] COND TRUE (int )r_st == 0 VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L531] COND TRUE 1 VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L534] kernel_st = 1 [L276] int tmp ; [L277] int tmp___0 ; [L278] int tmp___1 ; [L279] int tmp___2 ; [L280] int tmp___3 ; VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L284] COND TRUE 1 VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L286] COND FALSE !((int )wl_st == 0) VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L289] COND FALSE !((int )c1_st == 0) VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L292] COND FALSE !((int )c2_st == 0) VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L295] COND FALSE !((int )wb_st == 0) VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L298] COND TRUE (int )r_st == 0 VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L307] COND FALSE !((int )wl_st == 0) VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L322] COND FALSE !((int )c1_st == 0) VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L337] COND FALSE !((int )c2_st == 0) VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L352] COND FALSE !((int )wb_st == 0) VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L367] COND TRUE (int )r_st == 0 [L369] tmp___3 = __VERIFIER_nondet_int() [L371] COND TRUE \read(tmp___3) [L373] r_st = 1 [L249] d = c [L250] e_e = 1 VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=2, data=2, e_c=2, e_e=1, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=1, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L251] COND FALSE !((int )wl_pc == 1) VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=2, data=2, e_c=2, e_e=1, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=1, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L259] COND TRUE (int )wl_pc == 2 VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=2, data=2, e_c=2, e_e=1, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=1, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L260] COND TRUE (int )e_e == 1 [L261] wl_st = 0 VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=2, data=2, e_c=2, e_e=1, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=1, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=0] [L269] e_e = 2 [L270] r_st = 2 VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=2, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=0] [L284] COND TRUE 1 VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=2, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=0] [L286] COND TRUE (int )wl_st == 0 VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=2, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=0] [L307] COND TRUE (int )wl_st == 0 [L309] tmp = __VERIFIER_nondet_int() [L311] COND TRUE \read(tmp) [L313] wl_st = 1 [L53] int t ; VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=2, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=1] [L56] COND FALSE !((int )wl_pc == 0) VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=2, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=1] [L59] COND TRUE (int )wl_pc == 2 VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=2, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=1] [L108] t = t_b VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=2, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=1] [L109] COND FALSE !(d == t + 1) VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=2, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=1] [L13] __VERIFIER_error() VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=2, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=1] - StatisticsResult: Ultimate Automizer benchmark data CFG has 1 procedures, 125 locations, 1 error locations. Result: UNSAFE, OverallTime: 25.1s, OverallIterations: 37, TraceHistogramMax: 6, AutomataDifference: 10.9s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 7566 SDtfs, 5932 SDslu, 4273 SDs, 0 SdLazy, 705 SolverSat, 210 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 0.8s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 128 GetRequests, 76 SyntacticMatches, 2 SemanticMatches, 50 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.3s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=16725occurred in iteration=19, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 11.3s AutomataMinimizationTime, 36 MinimizatonAttempts, 9031 StatesRemovedByMinimization, 30 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.1s SsaConstructionTime, 0.3s SatisfiabilityAnalysisTime, 1.0s InterpolantComputationTime, 3325 NumberOfCodeBlocks, 3325 NumberOfCodeBlocksAsserted, 37 NumberOfCheckSat, 3105 ConstructedInterpolants, 0 QuantifiedInterpolants, 546256 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 36 InterpolantComputations, 36 PerfectInterpolantSequences, 1082/1082 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...