/usr/bin/java -Xmx16000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata ./data -tc ../../../trunk/examples/toolchains/AutomizerCInline.xml -s ../../../trunk/examples/settings/automizer/concurrent/svcomp-Reach-32bit-Automizer_Default-noMmResRef-Sleep-NoLbe-Delay.epf -i ../../../trunk/examples/svcomp/pthread-wmm/safe006_power.opt.i -------------------------------------------------------------------------------- This is Ultimate 0.2.0-6f57305 [2021-01-26 22:51:14,396 INFO L177 SettingsManager]: Resetting all preferences to default values... [2021-01-26 22:51:14,399 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2021-01-26 22:51:14,436 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2021-01-26 22:51:14,437 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2021-01-26 22:51:14,438 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2021-01-26 22:51:14,440 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2021-01-26 22:51:14,443 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2021-01-26 22:51:14,445 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2021-01-26 22:51:14,447 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2021-01-26 22:51:14,448 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2021-01-26 22:51:14,450 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2021-01-26 22:51:14,450 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2021-01-26 22:51:14,452 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2021-01-26 22:51:14,454 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2021-01-26 22:51:14,455 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2021-01-26 22:51:14,457 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2021-01-26 22:51:14,458 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2021-01-26 22:51:14,460 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2021-01-26 22:51:14,463 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2021-01-26 22:51:14,465 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2021-01-26 22:51:14,467 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2021-01-26 22:51:14,469 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2021-01-26 22:51:14,471 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2021-01-26 22:51:14,475 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... 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[2021-01-26 22:51:14,480 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2021-01-26 22:51:14,481 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2021-01-26 22:51:14,482 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2021-01-26 22:51:14,483 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2021-01-26 22:51:14,484 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2021-01-26 22:51:14,485 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2021-01-26 22:51:14,486 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2021-01-26 22:51:14,486 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2021-01-26 22:51:14,487 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2021-01-26 22:51:14,488 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2021-01-26 22:51:14,489 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2021-01-26 22:51:14,490 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/automizer/concurrent/svcomp-Reach-32bit-Automizer_Default-noMmResRef-Sleep-NoLbe-Delay.epf [2021-01-26 22:51:14,521 INFO L113 SettingsManager]: Loading preferences was successful [2021-01-26 22:51:14,522 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2021-01-26 22:51:14,524 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2021-01-26 22:51:14,524 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2021-01-26 22:51:14,524 INFO L138 SettingsManager]: * Use SBE=true [2021-01-26 22:51:14,525 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2021-01-26 22:51:14,525 INFO L138 SettingsManager]: * sizeof long=4 [2021-01-26 22:51:14,525 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2021-01-26 22:51:14,525 INFO L138 SettingsManager]: * sizeof POINTER=4 [2021-01-26 22:51:14,526 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2021-01-26 22:51:14,526 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2021-01-26 22:51:14,526 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2021-01-26 22:51:14,526 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2021-01-26 22:51:14,527 INFO L138 SettingsManager]: * sizeof long double=12 [2021-01-26 22:51:14,527 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2021-01-26 22:51:14,527 INFO L138 SettingsManager]: * Use constant arrays=true [2021-01-26 22:51:14,528 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2021-01-26 22:51:14,528 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2021-01-26 22:51:14,528 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2021-01-26 22:51:14,529 INFO L138 SettingsManager]: * To the following directory=./dump/ [2021-01-26 22:51:14,529 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2021-01-26 22:51:14,529 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2021-01-26 22:51:14,530 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2021-01-26 22:51:14,530 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2021-01-26 22:51:14,530 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2021-01-26 22:51:14,530 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2021-01-26 22:51:14,531 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2021-01-26 22:51:14,531 INFO L138 SettingsManager]: * Large block encoding in concurrent analysis=OFF [2021-01-26 22:51:14,531 INFO L138 SettingsManager]: * Lazy Petri-NFA conversion=true [2021-01-26 22:51:14,531 INFO L138 SettingsManager]: * Automaton type used in concurrency analysis=SLEEP_SET_FA [2021-01-26 22:51:14,532 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2021-01-26 22:51:14,532 INFO L138 SettingsManager]: * Minimization of abstraction=NONE [2021-01-26 22:51:14,532 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2021-01-26 22:51:14,533 INFO L138 SettingsManager]: * Sleep set reduction in concurrent analysis=DELAY_SET WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release [2021-01-26 22:51:14,913 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2021-01-26 22:51:14,943 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2021-01-26 22:51:14,949 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2021-01-26 22:51:14,950 INFO L271 PluginConnector]: Initializing CDTParser... [2021-01-26 22:51:14,952 INFO L275 PluginConnector]: CDTParser initialized [2021-01-26 22:51:14,953 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/pthread-wmm/safe006_power.opt.i [2021-01-26 22:51:15,049 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/4f249dff4/4c5b1c960a5846d5ab9836bf36fa52f0/FLAG4dcad40e7 [2021-01-26 22:51:15,757 INFO L306 CDTParser]: Found 1 translation units. [2021-01-26 22:51:15,758 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/pthread-wmm/safe006_power.opt.i [2021-01-26 22:51:15,779 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/4f249dff4/4c5b1c960a5846d5ab9836bf36fa52f0/FLAG4dcad40e7 [2021-01-26 22:51:16,051 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/4f249dff4/4c5b1c960a5846d5ab9836bf36fa52f0 [2021-01-26 22:51:16,058 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2021-01-26 22:51:16,069 INFO L131 ToolchainWalker]: Walking toolchain with 5 elements. [2021-01-26 22:51:16,071 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2021-01-26 22:51:16,072 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2021-01-26 22:51:16,075 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2021-01-26 22:51:16,076 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 26.01 10:51:16" (1/1) ... [2021-01-26 22:51:16,080 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@1cc842f8 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.01 10:51:16, skipping insertion in model container [2021-01-26 22:51:16,080 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 26.01 10:51:16" (1/1) ... [2021-01-26 22:51:16,089 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2021-01-26 22:51:16,137 INFO L178 MainTranslator]: Built tables and reachable declarations [2021-01-26 22:51:16,622 INFO L206 PostProcessor]: Analyzing one entry point: main [2021-01-26 22:51:16,647 INFO L203 MainTranslator]: Completed pre-run [2021-01-26 22:51:16,723 INFO L206 PostProcessor]: Analyzing one entry point: main [2021-01-26 22:51:16,887 INFO L208 MainTranslator]: Completed translation [2021-01-26 22:51:16,887 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.01 10:51:16 WrapperNode [2021-01-26 22:51:16,887 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2021-01-26 22:51:16,889 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2021-01-26 22:51:16,889 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2021-01-26 22:51:16,889 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2021-01-26 22:51:16,898 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.01 10:51:16" (1/1) ... [2021-01-26 22:51:16,944 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.01 10:51:16" (1/1) ... [2021-01-26 22:51:16,996 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2021-01-26 22:51:17,000 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2021-01-26 22:51:17,001 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2021-01-26 22:51:17,001 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2021-01-26 22:51:17,011 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.01 10:51:16" (1/1) ... [2021-01-26 22:51:17,011 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.01 10:51:16" (1/1) ... [2021-01-26 22:51:17,034 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.01 10:51:16" (1/1) ... [2021-01-26 22:51:17,035 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.01 10:51:16" (1/1) ... [2021-01-26 22:51:17,060 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.01 10:51:16" (1/1) ... [2021-01-26 22:51:17,071 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.01 10:51:16" (1/1) ... [2021-01-26 22:51:17,079 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.01 10:51:16" (1/1) ... [2021-01-26 22:51:17,093 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2021-01-26 22:51:17,094 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2021-01-26 22:51:17,095 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2021-01-26 22:51:17,095 INFO L275 PluginConnector]: RCFGBuilder initialized [2021-01-26 22:51:17,096 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.01 10:51:16" (1/1) ... No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2021-01-26 22:51:17,181 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2021-01-26 22:51:17,181 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2021-01-26 22:51:17,182 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2021-01-26 22:51:17,182 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2021-01-26 22:51:17,182 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2021-01-26 22:51:17,182 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2021-01-26 22:51:17,182 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2021-01-26 22:51:17,182 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2021-01-26 22:51:17,183 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2021-01-26 22:51:17,183 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2021-01-26 22:51:17,183 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2021-01-26 22:51:17,183 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2021-01-26 22:51:17,183 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2021-01-26 22:51:17,185 WARN L208 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2021-01-26 22:51:21,781 INFO L293 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2021-01-26 22:51:21,781 INFO L298 CfgBuilder]: Removed 14 assume(true) statements. [2021-01-26 22:51:21,784 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 26.01 10:51:21 BoogieIcfgContainer [2021-01-26 22:51:21,784 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2021-01-26 22:51:21,786 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2021-01-26 22:51:21,786 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2021-01-26 22:51:21,790 INFO L275 PluginConnector]: TraceAbstraction initialized [2021-01-26 22:51:21,790 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 26.01 10:51:16" (1/3) ... [2021-01-26 22:51:21,791 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@5f161faf and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 26.01 10:51:21, skipping insertion in model container [2021-01-26 22:51:21,791 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.01 10:51:16" (2/3) ... [2021-01-26 22:51:21,791 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@5f161faf and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 26.01 10:51:21, skipping insertion in model container [2021-01-26 22:51:21,791 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 26.01 10:51:21" (3/3) ... [2021-01-26 22:51:21,793 INFO L111 eAbstractionObserver]: Analyzing ICFG safe006_power.opt.i [2021-01-26 22:51:21,810 WARN L168 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2021-01-26 22:51:21,811 INFO L179 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2021-01-26 22:51:21,815 INFO L191 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2021-01-26 22:51:21,816 INFO L351 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2021-01-26 22:51:21,885 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,885 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,885 WARN L313 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,885 WARN L313 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,886 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,886 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,886 WARN L313 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,886 WARN L313 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,887 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_reach_error_#t~nondet2.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,887 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_reach_error_#t~nondet2.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,887 WARN L313 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,887 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,888 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_reach_error_#t~nondet2.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,888 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_reach_error_#t~nondet2.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,888 WARN L313 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,888 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,888 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_reach_error_#t~nondet2.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,889 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_reach_error_#t~nondet2.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,889 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_reach_error_#t~nondet2.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,889 WARN L313 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,889 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_reach_error_#t~nondet2.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,889 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,890 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_reach_error_#t~nondet2.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,890 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_reach_error_#t~nondet2.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,890 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_reach_error_#t~nondet2.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,890 WARN L313 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,890 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_reach_error_#t~nondet2.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,891 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,891 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~mem5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,891 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,891 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~mem5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,891 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,892 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,892 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,892 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,892 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,892 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,893 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~mem5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,894 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,894 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~mem5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,894 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,894 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,894 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,895 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,895 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,895 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,896 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,896 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,896 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,897 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,897 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,897 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,897 WARN L313 ript$VariableManager]: TermVariabe P1Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,898 WARN L313 ript$VariableManager]: TermVariabe P1Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,898 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,898 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,898 WARN L313 ript$VariableManager]: TermVariabe P1Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,898 WARN L313 ript$VariableManager]: TermVariabe P1Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,899 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~nondet12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,899 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,899 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,899 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite56| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,899 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,899 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,900 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,900 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,900 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite50| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,900 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite54| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,900 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite52| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,901 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,901 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,901 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem59| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,901 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite47| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,901 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,901 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite45| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,901 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,902 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite49| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,902 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,902 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~nondet13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,902 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,902 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,903 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,903 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,903 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite55| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,903 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,903 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite53| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,904 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,904 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,904 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,904 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,904 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite44| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,904 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,905 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,905 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite48| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,905 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,905 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,905 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,906 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~nondet12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,906 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,906 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,906 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite56| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,906 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,906 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,907 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,907 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,907 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite50| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,907 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite54| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,907 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite52| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,908 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,908 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,908 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,909 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem59| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,909 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite47| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,909 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,909 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite45| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,909 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,909 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,910 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite49| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,910 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,910 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite60| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,910 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~nondet13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,910 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,910 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,911 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,911 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,911 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite57| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,911 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,911 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite55| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,911 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,912 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,912 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite53| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,912 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,912 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite51| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,912 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,912 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,913 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem58| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,913 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,913 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite46| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,913 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,913 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite44| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,913 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,913 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,914 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite48| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,914 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,914 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,914 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,921 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~nondet12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,922 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,922 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,922 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite56| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,922 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,923 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,923 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,923 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,923 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite50| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,923 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite54| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,923 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite52| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,924 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,924 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,924 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem59| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,924 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite47| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,924 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,924 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite45| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,925 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,925 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite49| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,925 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,925 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~nondet13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,925 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,925 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,926 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,926 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,926 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite55| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,926 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,926 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite53| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,927 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,927 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,927 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,927 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,927 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite44| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,927 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,928 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,928 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite48| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,928 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,928 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,928 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,928 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~nondet12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,928 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,929 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,929 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite56| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,929 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,929 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,929 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,929 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,930 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite50| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,930 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite54| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,930 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite52| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,930 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,930 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,930 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,930 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem59| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,931 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite47| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,931 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,931 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite45| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,931 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,931 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,931 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite49| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,931 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,931 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite60| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,932 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~nondet13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,932 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,932 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,932 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,932 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,932 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite57| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,932 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,933 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite55| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,933 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,933 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,933 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite53| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,933 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,933 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite51| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,933 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,934 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,934 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem58| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,934 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,934 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite46| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,934 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,934 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite44| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,934 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,935 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,935 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite48| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,935 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,935 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,935 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,942 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem61| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,943 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite62| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,943 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite67| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,943 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite66| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,943 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem61| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,943 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite64| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,943 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite65| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,943 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite62| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,943 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite63| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,944 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem61| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,945 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite62| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,945 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite67| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,945 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite66| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,945 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem61| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,945 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite64| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,945 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite65| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,945 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite62| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,946 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite63| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,947 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,947 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,947 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,947 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,949 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,950 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite47| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,950 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,950 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,950 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite45| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,951 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem61| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,951 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite66| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,951 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,951 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,951 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite49| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,951 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite62| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,952 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite64| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,952 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,952 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,952 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite60| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,952 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,952 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~nondet12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,953 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,953 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem58| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,953 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,953 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite57| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,953 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,953 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,954 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,954 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite55| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,954 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,954 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite53| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,954 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,954 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,955 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite51| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,955 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,955 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite46| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,955 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,955 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,955 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite44| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,956 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite67| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,956 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,956 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,956 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite48| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,956 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~nondet13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,956 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite63| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,957 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,957 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite65| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,957 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,957 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,957 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem59| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,957 WARN L313 ript$VariableManager]: TermVariabe P1Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,957 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,958 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,958 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite56| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,958 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,958 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,958 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,958 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite50| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,959 WARN L313 ript$VariableManager]: TermVariabe P1Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,959 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite54| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,959 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,959 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite52| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,959 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,959 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,963 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,963 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,963 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,964 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_reach_error_#t~nondet2.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,964 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~mem5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,964 WARN L313 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,964 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,964 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,964 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_reach_error_#t~nondet2.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,965 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,965 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,965 WARN L313 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,965 WARN L313 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,965 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,965 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 22:51:21,968 INFO L149 ThreadInstanceAdder]: Constructed 0 joinOtherThreadTransitions. [2021-01-26 22:51:21,983 INFO L253 AbstractCegarLoop]: Starting to check reachability of 5 error locations. [2021-01-26 22:51:22,011 INFO L377 AbstractCegarLoop]: Interprodecural is true [2021-01-26 22:51:22,011 INFO L378 AbstractCegarLoop]: Hoare is true [2021-01-26 22:51:22,011 INFO L379 AbstractCegarLoop]: Compute interpolants for FPandBP [2021-01-26 22:51:22,011 INFO L380 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2021-01-26 22:51:22,011 INFO L381 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2021-01-26 22:51:22,011 INFO L382 AbstractCegarLoop]: Difference is false [2021-01-26 22:51:22,012 INFO L383 AbstractCegarLoop]: Minimize is NONE [2021-01-26 22:51:22,012 INFO L387 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== Size of Word is: 57 and size of Sequence is : 58[2021-01-26 22:51:22,043 INFO L164 SleepSetCegar]: Size of mCounterexample is: 58 [2021-01-26 22:51:22,043 INFO L165 SleepSetCegar]: [110#[ULTIMATE.startENTRY]don't care, 112#[L-1]don't care, 114#[L-1-1]don't care, 116#[L17]don't care, 118#[L17-1]don't care, 120#[L17-2]don't care, 122#[L17-3]don't care, 124#[L17-4]don't care, 126#[L710]don't care, 128#[L712]don't care, 130#[L713]don't care, 132#[L714]don't care, 134#[L715]don't care, 136#[L716]don't care, 138#[L717]don't care, 140#[L718]don't care, 142#[L719]don't care, 144#[L720]don't care, 146#[L721]don't care, 148#[L722]don't care, 150#[L723]don't care, 152#[L724]don't care, 154#[L725]don't care, 156#[L726]don't care, 158#[L727]don't care, 160#[L728]don't care, 162#[L730]don't care, 164#[L730-1]don't care, 166#[L730-2]don't care, 168#[L732]don't care, 170#[L733]don't care, 172#[L734]don't care, 174#[L735]don't care, 176#[L736]don't care, 178#[L737]don't care, 180#[L738]don't care, 182#[L739]don't care, 184#[L740]don't care, 186#[L741]don't care, 188#[L742]don't care, 190#[L743]don't care, 192#[L744]don't care, 194#[L746]don't care, 196#[L747]don't care, 198#[L748]don't care, 200#[L749]don't care, 202#[L-1-2]don't care, 204#[L-1-3]don't care, 206#[L825]don't care, 208#[L825-1]don't care, 210#[L826]don't care, 212#[L826-1, P0ENTRY]don't care, 216#[L827, P0ENTRY]don't care, 220#[L827-1, P0ENTRY]don't care, 224#[L828, P0ENTRY]don't care, 228#[L828, L752]don't care, 232#[L828, L754]don't care, 238#[L828, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]don't care] [2021-01-26 22:51:22,044 INFO L429 AbstractCegarLoop]: === Iteration 1 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-26 22:51:22,050 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-26 22:51:22,051 INFO L82 PathProgramCache]: Analyzing trace with hash -144078324, now seen corresponding path program 1 times [2021-01-26 22:51:22,062 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-26 22:51:22,063 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [335444901] [2021-01-26 22:51:22,063 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-26 22:51:22,226 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-26 22:51:22,463 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-26 22:51:22,463 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [335444901] [2021-01-26 22:51:22,465 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-26 22:51:22,465 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2021-01-26 22:51:22,467 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1349634556] [2021-01-26 22:51:22,478 INFO L461 AbstractCegarLoop]: Interpolant automaton has 3 states [2021-01-26 22:51:22,479 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-26 22:51:22,499 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-01-26 22:51:22,508 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-26 22:51:22,510 INFO L481 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2021-01-26 22:51:22,513 INFO L482 AbstractCegarLoop]: Interpolant automaton has has 3 states, 2 states have (on average 28.5) internal successors, (57), 3 states have internal predecessors, (57), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-01-26 22:51:22,551 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check Size of Word is: 77 and size of Sequence is : 78[2021-01-26 22:51:22,691 INFO L164 SleepSetCegar]: Size of mCounterexample is: 78 [2021-01-26 22:51:22,692 INFO L165 SleepSetCegar]: [242#[ULTIMATE.startENTRY]true, 243#[L-1]true, 244#[L-1-1]true, 245#[L17]true, 246#[L17-1]true, 247#[L17-2]true, 248#[L17-3]true, 249#[L17-4]true, 250#[L710]true, 251#[L712]true, 252#[L713]true, 253#[L714]true, 254#[L715]true, 255#[L716]true, 256#[L717]true, 257#[L718]true, 258#[L719]true, 259#[L720]true, 260#[L721]true, 261#[L722]true, 262#[L723]true, 263#[L724]true, 264#[L725]true, 265#[L726]true, 266#[L727]true, 267#[L728]true, 268#[L730]true, 269#[L730-1]true, 270#[L730-2]true, 271#[L732]true, 272#[L733]true, 273#[L734]true, 274#[L735]true, 275#[L736]true, 276#[L737]true, 277#[L738]true, 278#[L739]true, 279#[L740]true, 280#[L741]true, 281#[L742]true, 282#[L743](= ~x$w_buff0_used~0 0), 283#[L744](= ~x$w_buff0_used~0 0), 284#[L746](= ~x$w_buff0_used~0 0), 285#[L747](= ~x$w_buff0_used~0 0), 286#[L748](= ~x$w_buff0_used~0 0), 287#[L749](= ~x$w_buff0_used~0 0), 288#[L-1-2](= ~x$w_buff0_used~0 0), 289#[L-1-3](= ~x$w_buff0_used~0 0), 290#[L825](= ~x$w_buff0_used~0 0), 291#[L825-1](= ~x$w_buff0_used~0 0), 292#[L826](= ~x$w_buff0_used~0 0), 293#[L826-1, P0ENTRY](= ~x$w_buff0_used~0 0), 295#[L827, P0ENTRY](= ~x$w_buff0_used~0 0), 297#[L827-1, P0ENTRY](= ~x$w_buff0_used~0 0), 299#[L828, P0ENTRY](= ~x$w_buff0_used~0 0), 301#[L828, L752](= ~x$w_buff0_used~0 0), 303#[L828, L754](= ~x$w_buff0_used~0 0), 305#[L828, L765]true, 312#[L772, L828]true, 318#[L828, L775]true, 324#[L828, P0FINAL]true, 330#[L828, P0EXIT]true, 333#[L828-1, P1ENTRY, P0EXIT]true, 339#[P1ENTRY, P0EXIT, L829]true, 345#[L831, P1ENTRY, P0EXIT]true, 351#[P1ENTRY, L832, P0EXIT]true, 357#[L2, P1ENTRY, P0EXIT]true, 363#[L3, P1ENTRY, P0EXIT]true, 371#[L2-1, P1ENTRY, P0EXIT]true, 419#[L839, P1ENTRY, P0EXIT]true, 425#[L844, P1ENTRY, P0EXIT]true, 431#[L845, P1ENTRY, P0EXIT]true, 437#[P1ENTRY, L18, P0EXIT]true, 443#[L18-1, P1ENTRY, P0EXIT]true, 451#[L18-2, P1ENTRY, P0EXIT]true, 458#[L17-5, P1ENTRY, P0EXIT]true, 466#[P1ENTRY, L17-7, P0EXIT]true, 475#[P1ENTRY, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0EXIT]true] [2021-01-26 22:51:22,692 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2021-01-26 22:51:22,693 INFO L429 AbstractCegarLoop]: === Iteration 2 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-26 22:51:22,693 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-26 22:51:22,693 INFO L82 PathProgramCache]: Analyzing trace with hash 288205985, now seen corresponding path program 1 times [2021-01-26 22:51:22,694 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-26 22:51:22,700 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1294656574] [2021-01-26 22:51:22,700 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-26 22:51:22,896 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-26 22:51:23,160 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-26 22:51:23,160 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1294656574] [2021-01-26 22:51:23,161 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-26 22:51:23,161 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2021-01-26 22:51:23,161 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1224181248] [2021-01-26 22:51:23,164 INFO L461 AbstractCegarLoop]: Interpolant automaton has 7 states [2021-01-26 22:51:23,164 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-26 22:51:23,165 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2021-01-26 22:51:23,165 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2021-01-26 22:51:23,166 INFO L481 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2021-01-26 22:51:23,166 INFO L482 AbstractCegarLoop]: Interpolant automaton has has 7 states, 7 states have (on average 11.0) internal successors, (77), 7 states have internal predecessors, (77), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-01-26 22:51:23,467 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check Size of Word is: 79 and size of Sequence is : 80[2021-01-26 22:51:24,027 INFO L164 SleepSetCegar]: Size of mCounterexample is: 80 [2021-01-26 22:51:24,031 INFO L165 SleepSetCegar]: [485#[ULTIMATE.startENTRY]true, 487#[L-1]true, 489#[L-1-1]true, 491#[L17]true, 493#[L17-1]true, 495#[L17-2]true, 497#[L17-3]true, 499#[L17-4]true, 501#[L710]true, 503#[L712]true, 505#[L713](= ~__unbuffered_p1_EAX~0 0), 507#[L714](= ~__unbuffered_p1_EAX~0 0), 509#[L715](= ~__unbuffered_p1_EAX~0 0), 511#[L716](= ~__unbuffered_p1_EAX~0 0), 513#[L717](= ~__unbuffered_p1_EAX~0 0), 515#[L718](= ~__unbuffered_p1_EAX~0 0), 517#[L719](= ~__unbuffered_p1_EAX~0 0), 519#[L720](= ~__unbuffered_p1_EAX~0 0), 521#[L721](= ~__unbuffered_p1_EAX~0 0), 523#[L722](and (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 525#[L723](and (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 527#[L724](and (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 529#[L725](and (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 531#[L726](and (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 533#[L727](and (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 535#[L728](and (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 537#[L730](and (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 539#[L730-1](and (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 541#[L730-2](and (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 543#[L732](and (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 545#[L733](and (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 547#[L734](and (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 549#[L735](and (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 551#[L736](and (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 553#[L737](and (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 555#[L738](and (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 557#[L739](and (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 559#[L740](and (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 561#[L741](and (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 563#[L742](and (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 565#[L743](and (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 567#[L744](and (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 569#[L746](and (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 571#[L747](and (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 573#[L748](and (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 575#[L749](and (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 577#[L-1-2](and (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 579#[L-1-3](and (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 581#[L825](and (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 583#[L825-1](and (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 585#[L826](and (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 587#[L826-1, P0ENTRY](and (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 591#[L827, P0ENTRY](and (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 595#[L827-1, P0ENTRY](and (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 599#[L828, P0ENTRY](and (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 603#[L828, L752](and (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 607#[L828, L754](and (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 611#[L828, L765](and (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 617#[L772, L828](and (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 621#[L828, L775](and (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 625#[L828, P0FINAL](and (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 629#[L828, P0EXIT](and (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 631#[L828-1, P1ENTRY, P0EXIT](and (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 635#[P1ENTRY, P0EXIT, L829](and (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 639#[L831, P1ENTRY, P0EXIT](and (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 643#[P1ENTRY, L832, P0EXIT](and (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 647#[L2, P1ENTRY, P0EXIT](and (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 651#[L3, P1ENTRY, P0EXIT](and (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 655#[L2-1, P1ENTRY, P0EXIT](and (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 691#[L839, P1ENTRY, P0EXIT](and (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 693#[L839, L780, P0EXIT](and (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 1195#[L798, L839, P0EXIT]true, 1202#[L798, L844, P0EXIT]true, 1206#[L798, L845, P0EXIT]true, 1210#[L798, L18, P0EXIT]true, 1214#[L798, L18-1, P0EXIT]true, 1218#[L798, L18-2, P0EXIT]true, 1227#[L17-5, L798, P0EXIT]true, 1238#[L798, L17-7, P0EXIT]true, 1253#[L798, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0EXIT]true] [2021-01-26 22:51:24,031 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2021-01-26 22:51:24,031 INFO L429 AbstractCegarLoop]: === Iteration 3 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-26 22:51:24,034 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-26 22:51:24,034 INFO L82 PathProgramCache]: Analyzing trace with hash -1995331550, now seen corresponding path program 1 times [2021-01-26 22:51:24,034 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-26 22:51:24,035 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [294817180] [2021-01-26 22:51:24,035 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-26 22:51:24,335 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-26 22:51:24,565 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-26 22:51:24,566 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [294817180] [2021-01-26 22:51:24,566 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-26 22:51:24,566 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2021-01-26 22:51:24,566 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1338525198] [2021-01-26 22:51:24,568 INFO L461 AbstractCegarLoop]: Interpolant automaton has 7 states [2021-01-26 22:51:24,569 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-26 22:51:24,575 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2021-01-26 22:51:24,576 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2021-01-26 22:51:24,576 INFO L481 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2021-01-26 22:51:24,576 INFO L482 AbstractCegarLoop]: Interpolant automaton has has 7 states, 7 states have (on average 11.285714285714286) internal successors, (79), 7 states have internal predecessors, (79), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-01-26 22:51:24,871 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-26 22:51:25,177 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-26 22:51:30,155 WARN L146 IndependenceRelation]: Expensive independence query (4164 ms) for statements [1223] L801-->L808: Formula: (let ((.cse12 (= (mod v_~x$w_buff0_used~0_450 256) 0)) (.cse13 (= (mod v_~x$r_buff1_thd2~0_258 256) 0)) (.cse14 (= (mod v_~x$w_buff1_used~0_362 256) 0)) (.cse16 (= (mod v_~x$w_buff0_used~0_451 256) 0)) (.cse15 (= (mod v_~x$r_buff0_thd2~0_286 256) 0))) (let ((.cse0 (select |v_#memory_int_271| |v_~#x~0.base_174|)) (.cse8 (or .cse16 .cse15)) (.cse9 (not .cse16)) (.cse4 (or .cse13 .cse14)) (.cse1 (or .cse12 .cse15)) (.cse2 (not .cse12)) (.cse3 (not .cse15)) (.cse5 (not .cse14)) (.cse6 (not .cse13))) (and (= (store |v_#memory_int_271| |v_~#x~0.base_174| (store .cse0 |v_~#x~0.offset_174| |v_P1_#t~ite63_35|)) |v_#memory_int_270|) (or (and (= v_~x$r_buff0_thd2~0_286 v_~x$r_buff0_thd2~0_285) .cse1) (and (= v_~x$r_buff0_thd2~0_285 0) .cse2 .cse3)) (let ((.cse7 (= |v_P1_#t~mem61_40| |v_P1Thread1of1ForFork0_#t~mem61_1|))) (or (and (or (and (= |v_P1_#t~ite62_35| |v_P1_#t~mem61_40|) (= (select .cse0 |v_~#x~0.offset_174|) |v_P1_#t~mem61_40|) .cse4) (and (= |v_P1_#t~ite62_35| v_~x$w_buff1~0_119) .cse5 .cse6 .cse7)) (= |v_P1_#t~ite62_35| |v_P1_#t~ite63_35|) .cse8) (and (= |v_P1_#t~ite63_35| v_~x$w_buff0~0_134) .cse9 (= |v_P1_#t~ite62_35| |v_P1Thread1of1ForFork0_#t~ite62_1|) .cse3 .cse7))) (let ((.cse10 (= (mod v_~x$r_buff0_thd2~0_285 256) 0)) (.cse11 (= (mod v_~x$w_buff1_used~0_361 256) 0))) (or (and (= v_~x$r_buff1_thd2~0_257 0) (or (and .cse2 (not .cse10)) (and (not .cse11) .cse6))) (and (= v_~x$r_buff1_thd2~0_258 v_~x$r_buff1_thd2~0_257) (or .cse12 .cse10) (or .cse13 .cse11)))) (or (and (= v_~x$w_buff0_used~0_451 v_~x$w_buff0_used~0_450) .cse8) (and .cse9 (= v_~x$w_buff0_used~0_450 0) .cse3)) (or (and (= v_~x$w_buff1_used~0_362 v_~x$w_buff1_used~0_361) .cse4 .cse1) (and (= v_~x$w_buff1_used~0_361 0) (or (and .cse2 .cse3) (and .cse5 .cse6))))))) InVars {~x$w_buff0~0=v_~x$w_buff0~0_134, P1Thread1of1ForFork0_#t~ite62=|v_P1Thread1of1ForFork0_#t~ite62_1|, ~#x~0.offset=|v_~#x~0.offset_174|, ~x$w_buff1~0=v_~x$w_buff1~0_119, #memory_int=|v_#memory_int_271|, ~#x~0.base=|v_~#x~0.base_174|, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_258, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_362, P1Thread1of1ForFork0_#t~mem61=|v_P1Thread1of1ForFork0_#t~mem61_1|, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_286, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_451} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_134, ~#x~0.offset=|v_~#x~0.offset_174|, ~x$w_buff1~0=v_~x$w_buff1~0_119, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_257, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_361, P1Thread1of1ForFork0_#t~mem61=|v_P1Thread1of1ForFork0_#t~mem61_2|, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_285, P1Thread1of1ForFork0_#t~ite66=|v_P1Thread1of1ForFork0_#t~ite66_1|, P1Thread1of1ForFork0_#t~ite67=|v_P1Thread1of1ForFork0_#t~ite67_1|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_450, P1Thread1of1ForFork0_#t~ite62=|v_P1Thread1of1ForFork0_#t~ite62_2|, P1Thread1of1ForFork0_#t~ite63=|v_P1Thread1of1ForFork0_#t~ite63_1|, P1Thread1of1ForFork0_#t~ite64=|v_P1Thread1of1ForFork0_#t~ite64_1|, P1Thread1of1ForFork0_#t~ite65=|v_P1Thread1of1ForFork0_#t~ite65_1|, #memory_int=|v_#memory_int_270|, ~#x~0.base=|v_~#x~0.base_174|} AuxVars[|v_P1_#t~mem61_40|, |v_P1_#t~ite62_35|, |v_P1_#t~ite63_35|] AssignedVars[P1Thread1of1ForFork0_#t~ite62, P1Thread1of1ForFork0_#t~ite63, P1Thread1of1ForFork0_#t~ite64, P1Thread1of1ForFork0_#t~ite65, #memory_int, ~x$r_buff1_thd2~0, ~x$w_buff1_used~0, P1Thread1of1ForFork0_#t~mem61, ~x$r_buff0_thd2~0, P1Thread1of1ForFork0_#t~ite66, P1Thread1of1ForFork0_#t~ite67, ~x$w_buff0_used~0] and [1209] L2-1-->L839: Formula: (let ((.cse15 (= (mod v_~x$w_buff0_used~0_437 256) 0)) (.cse9 (= (mod v_~x$r_buff1_thd0~0_46 256) 0)) (.cse16 (= (mod v_~x$w_buff1_used~0_348 256) 0)) (.cse14 (= (mod v_~x$r_buff0_thd0~0_66 256) 0)) (.cse10 (= (mod v_~x$w_buff0_used~0_436 256) 0))) (let ((.cse2 (or .cse14 .cse10)) (.cse5 (not .cse10)) (.cse0 (select |v_#memory_int_255| |v_~#x~0.base_166|)) (.cse1 (or .cse9 .cse16)) (.cse3 (not .cse9)) (.cse4 (not .cse16)) (.cse13 (or .cse14 .cse15)) (.cse11 (not .cse15)) (.cse6 (not .cse14))) (and (= (store |v_#memory_int_255| |v_~#x~0.base_166| (store .cse0 |v_~#x~0.offset_166| |v_ULTIMATE.start_main_#t~ite72_48|)) |v_#memory_int_254|) (or (and (= v_~x$w_buff1_used~0_348 v_~x$w_buff1_used~0_347) .cse1 .cse2) (and (or (and .cse3 .cse4) (and .cse5 .cse6)) (= v_~x$w_buff1_used~0_347 0))) (let ((.cse7 (= (mod v_~x$w_buff1_used~0_347 256) 0)) (.cse8 (= (mod v_~x$r_buff0_thd0~0_65 256) 0))) (or (and (= v_~x$r_buff1_thd0~0_45 0) (or (and (not .cse7) .cse3) (and (not .cse8) .cse5))) (and (or .cse7 .cse9) (= v_~x$r_buff1_thd0~0_45 v_~x$r_buff1_thd0~0_46) (or .cse10 .cse8)))) (or (and (= v_~x$r_buff0_thd0~0_66 v_~x$r_buff0_thd0~0_65) .cse2) (and (= v_~x$r_buff0_thd0~0_65 0) .cse5 .cse6)) (let ((.cse12 (= |v_ULTIMATE.start_main_#t~mem70_39| |v_ULTIMATE.start_main_#t~mem70_34|))) (or (and .cse11 (= v_~x$w_buff0~0_126 |v_ULTIMATE.start_main_#t~ite72_48|) (= |v_ULTIMATE.start_main_#t~ite71_38| |v_ULTIMATE.start_main_#t~ite71_33|) .cse12 .cse6) (and (or (and (= |v_ULTIMATE.start_main_#t~mem70_39| |v_ULTIMATE.start_main_#t~ite71_38|) (= |v_ULTIMATE.start_main_#t~mem70_39| (select .cse0 |v_~#x~0.offset_166|)) .cse1) (and .cse3 .cse4 (= |v_ULTIMATE.start_main_#t~ite71_38| v_~x$w_buff1~0_111) .cse12)) (= |v_ULTIMATE.start_main_#t~ite71_38| |v_ULTIMATE.start_main_#t~ite72_48|) .cse13))) (or (and (= v_~x$w_buff0_used~0_437 v_~x$w_buff0_used~0_436) .cse13) (and .cse11 (= v_~x$w_buff0_used~0_436 0) .cse6))))) InVars {~x$w_buff0~0=v_~x$w_buff0~0_126, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_66, ULTIMATE.start_main_#t~ite71=|v_ULTIMATE.start_main_#t~ite71_33|, ~#x~0.offset=|v_~#x~0.offset_166|, ~x$w_buff1~0=v_~x$w_buff1~0_111, #memory_int=|v_#memory_int_255|, ~#x~0.base=|v_~#x~0.base_166|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_348, ULTIMATE.start_main_#t~mem70=|v_ULTIMATE.start_main_#t~mem70_34|, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_46, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_437} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_126, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_65, ~#x~0.offset=|v_~#x~0.offset_166|, ~x$w_buff1~0=v_~x$w_buff1~0_111, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_347, ULTIMATE.start_main_#t~mem70=|v_ULTIMATE.start_main_#t~mem70_33|, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_45, ULTIMATE.start_main_#t~ite75=|v_ULTIMATE.start_main_#t~ite75_24|, ULTIMATE.start_main_#t~ite76=|v_ULTIMATE.start_main_#t~ite76_18|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_436, ULTIMATE.start_main_#t~ite73=|v_ULTIMATE.start_main_#t~ite73_26|, ULTIMATE.start_main_#t~ite74=|v_ULTIMATE.start_main_#t~ite74_26|, ULTIMATE.start_main_#t~ite71=|v_ULTIMATE.start_main_#t~ite71_32|, ULTIMATE.start_main_#t~ite72=|v_ULTIMATE.start_main_#t~ite72_44|, #memory_int=|v_#memory_int_254|, ~#x~0.base=|v_~#x~0.base_166|} AuxVars[|v_ULTIMATE.start_main_#t~ite72_48|, |v_ULTIMATE.start_main_#t~ite71_38|, |v_ULTIMATE.start_main_#t~mem70_39|] AssignedVars[ULTIMATE.start_main_#t~ite73, ~x$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite74, ULTIMATE.start_main_#t~ite71, ULTIMATE.start_main_#t~ite72, #memory_int, ~x$w_buff1_used~0, ULTIMATE.start_main_#t~mem70, ~x$r_buff1_thd0~0, ULTIMATE.start_main_#t~ite75, ULTIMATE.start_main_#t~ite76, ~x$w_buff0_used~0] under condition null [2021-01-26 22:51:34,810 WARN L146 IndependenceRelation]: Expensive independence query (4137 ms) for statements [1223] L801-->L808: Formula: (let ((.cse12 (= (mod v_~x$w_buff0_used~0_450 256) 0)) (.cse13 (= (mod v_~x$r_buff1_thd2~0_258 256) 0)) (.cse14 (= (mod v_~x$w_buff1_used~0_362 256) 0)) (.cse16 (= (mod v_~x$w_buff0_used~0_451 256) 0)) (.cse15 (= (mod v_~x$r_buff0_thd2~0_286 256) 0))) (let ((.cse0 (select |v_#memory_int_271| |v_~#x~0.base_174|)) (.cse8 (or .cse16 .cse15)) (.cse9 (not .cse16)) (.cse4 (or .cse13 .cse14)) (.cse1 (or .cse12 .cse15)) (.cse2 (not .cse12)) (.cse3 (not .cse15)) (.cse5 (not .cse14)) (.cse6 (not .cse13))) (and (= (store |v_#memory_int_271| |v_~#x~0.base_174| (store .cse0 |v_~#x~0.offset_174| |v_P1_#t~ite63_35|)) |v_#memory_int_270|) (or (and (= v_~x$r_buff0_thd2~0_286 v_~x$r_buff0_thd2~0_285) .cse1) (and (= v_~x$r_buff0_thd2~0_285 0) .cse2 .cse3)) (let ((.cse7 (= |v_P1_#t~mem61_40| |v_P1Thread1of1ForFork0_#t~mem61_1|))) (or (and (or (and (= |v_P1_#t~ite62_35| |v_P1_#t~mem61_40|) (= (select .cse0 |v_~#x~0.offset_174|) |v_P1_#t~mem61_40|) .cse4) (and (= |v_P1_#t~ite62_35| v_~x$w_buff1~0_119) .cse5 .cse6 .cse7)) (= |v_P1_#t~ite62_35| |v_P1_#t~ite63_35|) .cse8) (and (= |v_P1_#t~ite63_35| v_~x$w_buff0~0_134) .cse9 (= |v_P1_#t~ite62_35| |v_P1Thread1of1ForFork0_#t~ite62_1|) .cse3 .cse7))) (let ((.cse10 (= (mod v_~x$r_buff0_thd2~0_285 256) 0)) (.cse11 (= (mod v_~x$w_buff1_used~0_361 256) 0))) (or (and (= v_~x$r_buff1_thd2~0_257 0) (or (and .cse2 (not .cse10)) (and (not .cse11) .cse6))) (and (= v_~x$r_buff1_thd2~0_258 v_~x$r_buff1_thd2~0_257) (or .cse12 .cse10) (or .cse13 .cse11)))) (or (and (= v_~x$w_buff0_used~0_451 v_~x$w_buff0_used~0_450) .cse8) (and .cse9 (= v_~x$w_buff0_used~0_450 0) .cse3)) (or (and (= v_~x$w_buff1_used~0_362 v_~x$w_buff1_used~0_361) .cse4 .cse1) (and (= v_~x$w_buff1_used~0_361 0) (or (and .cse2 .cse3) (and .cse5 .cse6))))))) InVars {~x$w_buff0~0=v_~x$w_buff0~0_134, P1Thread1of1ForFork0_#t~ite62=|v_P1Thread1of1ForFork0_#t~ite62_1|, ~#x~0.offset=|v_~#x~0.offset_174|, ~x$w_buff1~0=v_~x$w_buff1~0_119, #memory_int=|v_#memory_int_271|, ~#x~0.base=|v_~#x~0.base_174|, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_258, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_362, P1Thread1of1ForFork0_#t~mem61=|v_P1Thread1of1ForFork0_#t~mem61_1|, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_286, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_451} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_134, ~#x~0.offset=|v_~#x~0.offset_174|, ~x$w_buff1~0=v_~x$w_buff1~0_119, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_257, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_361, P1Thread1of1ForFork0_#t~mem61=|v_P1Thread1of1ForFork0_#t~mem61_2|, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_285, P1Thread1of1ForFork0_#t~ite66=|v_P1Thread1of1ForFork0_#t~ite66_1|, P1Thread1of1ForFork0_#t~ite67=|v_P1Thread1of1ForFork0_#t~ite67_1|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_450, P1Thread1of1ForFork0_#t~ite62=|v_P1Thread1of1ForFork0_#t~ite62_2|, P1Thread1of1ForFork0_#t~ite63=|v_P1Thread1of1ForFork0_#t~ite63_1|, P1Thread1of1ForFork0_#t~ite64=|v_P1Thread1of1ForFork0_#t~ite64_1|, P1Thread1of1ForFork0_#t~ite65=|v_P1Thread1of1ForFork0_#t~ite65_1|, #memory_int=|v_#memory_int_270|, ~#x~0.base=|v_~#x~0.base_174|} AuxVars[|v_P1_#t~mem61_40|, |v_P1_#t~ite62_35|, |v_P1_#t~ite63_35|] AssignedVars[P1Thread1of1ForFork0_#t~ite62, P1Thread1of1ForFork0_#t~ite63, P1Thread1of1ForFork0_#t~ite64, P1Thread1of1ForFork0_#t~ite65, #memory_int, ~x$r_buff1_thd2~0, ~x$w_buff1_used~0, P1Thread1of1ForFork0_#t~mem61, ~x$r_buff0_thd2~0, P1Thread1of1ForFork0_#t~ite66, P1Thread1of1ForFork0_#t~ite67, ~x$w_buff0_used~0] and [1216] L765-->L772: Formula: (let ((.cse9 (= (mod v_~x$w_buff0_used~0_444 256) 0)) (.cse14 (= 0 (mod v_~x$r_buff0_thd1~0_71 256))) (.cse16 (= (mod v_~x$w_buff1_used~0_356 256) 0)) (.cse12 (= (mod v_~x$r_buff1_thd1~0_52 256) 0)) (.cse15 (= (mod v_~x$w_buff0_used~0_445 256) 0))) (let ((.cse8 (not .cse15)) (.cse2 (or .cse16 .cse12)) (.cse0 (select |v_#memory_int_263| |v_~#x~0.base_170|)) (.cse5 (not .cse16)) (.cse6 (not .cse12)) (.cse7 (or .cse14 .cse15)) (.cse3 (not .cse14)) (.cse4 (not .cse9)) (.cse1 (or .cse14 .cse9))) (and (= (store |v_#memory_int_263| |v_~#x~0.base_170| (store .cse0 |v_~#x~0.offset_170| |v_P0_#t~ite7_43|)) |v_#memory_int_262|) (or (and .cse1 .cse2 (= v_~x$w_buff1_used~0_356 v_~x$w_buff1_used~0_355)) (and (= v_~x$w_buff1_used~0_355 0) (or (and .cse3 .cse4) (and .cse5 .cse6)))) (or (and (= v_~x$w_buff0_used~0_444 v_~x$w_buff0_used~0_445) .cse7) (and (= v_~x$w_buff0_used~0_444 0) .cse8 .cse3)) (let ((.cse10 (= (mod v_~x$r_buff0_thd1~0_70 256) 0)) (.cse11 (= (mod v_~x$w_buff1_used~0_355 256) 0))) (or (and (or .cse9 .cse10) (or .cse11 .cse12) (= v_~x$r_buff1_thd1~0_52 v_~x$r_buff1_thd1~0_51)) (and (or (and (not .cse10) .cse4) (and .cse6 (not .cse11))) (= v_~x$r_buff1_thd1~0_51 0)))) (let ((.cse13 (= |v_P0_#t~mem5_50| |v_P0Thread1of1ForFork1_#t~mem5_1|))) (or (and (= |v_P0_#t~ite7_43| v_~x$w_buff0~0_130) .cse13 .cse8 .cse3 (= |v_P0_#t~ite6_49| |v_P0Thread1of1ForFork1_#t~ite6_1|)) (and (or (and .cse2 (= |v_P0_#t~ite6_49| |v_P0_#t~mem5_50|) (= (select .cse0 |v_~#x~0.offset_170|) |v_P0_#t~mem5_50|)) (and .cse5 (= |v_P0_#t~ite6_49| v_~x$w_buff1~0_115) .cse13 .cse6)) (= |v_P0_#t~ite7_43| |v_P0_#t~ite6_49|) .cse7))) (or (and (= v_~x$r_buff0_thd1~0_70 0) .cse3 .cse4) (and .cse1 (= v_~x$r_buff0_thd1~0_71 v_~x$r_buff0_thd1~0_70)))))) InVars {~x$w_buff0~0=v_~x$w_buff0~0_130, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_71, ~#x~0.offset=|v_~#x~0.offset_170|, P0Thread1of1ForFork1_#t~ite6=|v_P0Thread1of1ForFork1_#t~ite6_1|, ~x$w_buff1~0=v_~x$w_buff1~0_115, #memory_int=|v_#memory_int_263|, ~#x~0.base=|v_~#x~0.base_170|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_356, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_52, P0Thread1of1ForFork1_#t~mem5=|v_P0Thread1of1ForFork1_#t~mem5_1|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_445} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_130, P0Thread1of1ForFork1_#t~ite10=|v_P0Thread1of1ForFork1_#t~ite10_1|, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_70, ~#x~0.offset=|v_~#x~0.offset_170|, ~x$w_buff1~0=v_~x$w_buff1~0_115, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_355, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_51, P0Thread1of1ForFork1_#t~mem5=|v_P0Thread1of1ForFork1_#t~mem5_2|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_444, P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_1|, P0Thread1of1ForFork1_#t~ite9=|v_P0Thread1of1ForFork1_#t~ite9_1|, P0Thread1of1ForFork1_#t~ite6=|v_P0Thread1of1ForFork1_#t~ite6_2|, P0Thread1of1ForFork1_#t~ite7=|v_P0Thread1of1ForFork1_#t~ite7_1|, #memory_int=|v_#memory_int_262|, ~#x~0.base=|v_~#x~0.base_170|, P0Thread1of1ForFork1_#t~ite11=|v_P0Thread1of1ForFork1_#t~ite11_1|} AuxVars[|v_P0_#t~ite6_49|, |v_P0_#t~mem5_50|, |v_P0_#t~ite7_43|] AssignedVars[P0Thread1of1ForFork1_#t~ite10, ~x$r_buff0_thd1~0, P0Thread1of1ForFork1_#t~ite8, P0Thread1of1ForFork1_#t~ite9, P0Thread1of1ForFork1_#t~ite6, P0Thread1of1ForFork1_#t~ite7, #memory_int, ~x$w_buff1_used~0, ~x$r_buff1_thd1~0, P0Thread1of1ForFork1_#t~mem5, ~x$w_buff0_used~0, P0Thread1of1ForFork1_#t~ite11] under condition null [2021-01-26 22:51:38,925 WARN L146 IndependenceRelation]: Expensive independence query (4112 ms) for statements [1209] L2-1-->L839: Formula: (let ((.cse15 (= (mod v_~x$w_buff0_used~0_437 256) 0)) (.cse9 (= (mod v_~x$r_buff1_thd0~0_46 256) 0)) (.cse16 (= (mod v_~x$w_buff1_used~0_348 256) 0)) (.cse14 (= (mod v_~x$r_buff0_thd0~0_66 256) 0)) (.cse10 (= (mod v_~x$w_buff0_used~0_436 256) 0))) (let ((.cse2 (or .cse14 .cse10)) (.cse5 (not .cse10)) (.cse0 (select |v_#memory_int_255| |v_~#x~0.base_166|)) (.cse1 (or .cse9 .cse16)) (.cse3 (not .cse9)) (.cse4 (not .cse16)) (.cse13 (or .cse14 .cse15)) (.cse11 (not .cse15)) (.cse6 (not .cse14))) (and (= (store |v_#memory_int_255| |v_~#x~0.base_166| (store .cse0 |v_~#x~0.offset_166| |v_ULTIMATE.start_main_#t~ite72_48|)) |v_#memory_int_254|) (or (and (= v_~x$w_buff1_used~0_348 v_~x$w_buff1_used~0_347) .cse1 .cse2) (and (or (and .cse3 .cse4) (and .cse5 .cse6)) (= v_~x$w_buff1_used~0_347 0))) (let ((.cse7 (= (mod v_~x$w_buff1_used~0_347 256) 0)) (.cse8 (= (mod v_~x$r_buff0_thd0~0_65 256) 0))) (or (and (= v_~x$r_buff1_thd0~0_45 0) (or (and (not .cse7) .cse3) (and (not .cse8) .cse5))) (and (or .cse7 .cse9) (= v_~x$r_buff1_thd0~0_45 v_~x$r_buff1_thd0~0_46) (or .cse10 .cse8)))) (or (and (= v_~x$r_buff0_thd0~0_66 v_~x$r_buff0_thd0~0_65) .cse2) (and (= v_~x$r_buff0_thd0~0_65 0) .cse5 .cse6)) (let ((.cse12 (= |v_ULTIMATE.start_main_#t~mem70_39| |v_ULTIMATE.start_main_#t~mem70_34|))) (or (and .cse11 (= v_~x$w_buff0~0_126 |v_ULTIMATE.start_main_#t~ite72_48|) (= |v_ULTIMATE.start_main_#t~ite71_38| |v_ULTIMATE.start_main_#t~ite71_33|) .cse12 .cse6) (and (or (and (= |v_ULTIMATE.start_main_#t~mem70_39| |v_ULTIMATE.start_main_#t~ite71_38|) (= |v_ULTIMATE.start_main_#t~mem70_39| (select .cse0 |v_~#x~0.offset_166|)) .cse1) (and .cse3 .cse4 (= |v_ULTIMATE.start_main_#t~ite71_38| v_~x$w_buff1~0_111) .cse12)) (= |v_ULTIMATE.start_main_#t~ite71_38| |v_ULTIMATE.start_main_#t~ite72_48|) .cse13))) (or (and (= v_~x$w_buff0_used~0_437 v_~x$w_buff0_used~0_436) .cse13) (and .cse11 (= v_~x$w_buff0_used~0_436 0) .cse6))))) InVars {~x$w_buff0~0=v_~x$w_buff0~0_126, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_66, ULTIMATE.start_main_#t~ite71=|v_ULTIMATE.start_main_#t~ite71_33|, ~#x~0.offset=|v_~#x~0.offset_166|, ~x$w_buff1~0=v_~x$w_buff1~0_111, #memory_int=|v_#memory_int_255|, ~#x~0.base=|v_~#x~0.base_166|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_348, ULTIMATE.start_main_#t~mem70=|v_ULTIMATE.start_main_#t~mem70_34|, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_46, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_437} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_126, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_65, ~#x~0.offset=|v_~#x~0.offset_166|, ~x$w_buff1~0=v_~x$w_buff1~0_111, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_347, ULTIMATE.start_main_#t~mem70=|v_ULTIMATE.start_main_#t~mem70_33|, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_45, ULTIMATE.start_main_#t~ite75=|v_ULTIMATE.start_main_#t~ite75_24|, ULTIMATE.start_main_#t~ite76=|v_ULTIMATE.start_main_#t~ite76_18|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_436, ULTIMATE.start_main_#t~ite73=|v_ULTIMATE.start_main_#t~ite73_26|, ULTIMATE.start_main_#t~ite74=|v_ULTIMATE.start_main_#t~ite74_26|, ULTIMATE.start_main_#t~ite71=|v_ULTIMATE.start_main_#t~ite71_32|, ULTIMATE.start_main_#t~ite72=|v_ULTIMATE.start_main_#t~ite72_44|, #memory_int=|v_#memory_int_254|, ~#x~0.base=|v_~#x~0.base_166|} AuxVars[|v_ULTIMATE.start_main_#t~ite72_48|, |v_ULTIMATE.start_main_#t~ite71_38|, |v_ULTIMATE.start_main_#t~mem70_39|] AssignedVars[ULTIMATE.start_main_#t~ite73, ~x$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite74, ULTIMATE.start_main_#t~ite71, ULTIMATE.start_main_#t~ite72, #memory_int, ~x$w_buff1_used~0, ULTIMATE.start_main_#t~mem70, ~x$r_buff1_thd0~0, ULTIMATE.start_main_#t~ite75, ULTIMATE.start_main_#t~ite76, ~x$w_buff0_used~0] and [1216] L765-->L772: Formula: (let ((.cse9 (= (mod v_~x$w_buff0_used~0_444 256) 0)) (.cse14 (= 0 (mod v_~x$r_buff0_thd1~0_71 256))) (.cse16 (= (mod v_~x$w_buff1_used~0_356 256) 0)) (.cse12 (= (mod v_~x$r_buff1_thd1~0_52 256) 0)) (.cse15 (= (mod v_~x$w_buff0_used~0_445 256) 0))) (let ((.cse8 (not .cse15)) (.cse2 (or .cse16 .cse12)) (.cse0 (select |v_#memory_int_263| |v_~#x~0.base_170|)) (.cse5 (not .cse16)) (.cse6 (not .cse12)) (.cse7 (or .cse14 .cse15)) (.cse3 (not .cse14)) (.cse4 (not .cse9)) (.cse1 (or .cse14 .cse9))) (and (= (store |v_#memory_int_263| |v_~#x~0.base_170| (store .cse0 |v_~#x~0.offset_170| |v_P0_#t~ite7_43|)) |v_#memory_int_262|) (or (and .cse1 .cse2 (= v_~x$w_buff1_used~0_356 v_~x$w_buff1_used~0_355)) (and (= v_~x$w_buff1_used~0_355 0) (or (and .cse3 .cse4) (and .cse5 .cse6)))) (or (and (= v_~x$w_buff0_used~0_444 v_~x$w_buff0_used~0_445) .cse7) (and (= v_~x$w_buff0_used~0_444 0) .cse8 .cse3)) (let ((.cse10 (= (mod v_~x$r_buff0_thd1~0_70 256) 0)) (.cse11 (= (mod v_~x$w_buff1_used~0_355 256) 0))) (or (and (or .cse9 .cse10) (or .cse11 .cse12) (= v_~x$r_buff1_thd1~0_52 v_~x$r_buff1_thd1~0_51)) (and (or (and (not .cse10) .cse4) (and .cse6 (not .cse11))) (= v_~x$r_buff1_thd1~0_51 0)))) (let ((.cse13 (= |v_P0_#t~mem5_50| |v_P0Thread1of1ForFork1_#t~mem5_1|))) (or (and (= |v_P0_#t~ite7_43| v_~x$w_buff0~0_130) .cse13 .cse8 .cse3 (= |v_P0_#t~ite6_49| |v_P0Thread1of1ForFork1_#t~ite6_1|)) (and (or (and .cse2 (= |v_P0_#t~ite6_49| |v_P0_#t~mem5_50|) (= (select .cse0 |v_~#x~0.offset_170|) |v_P0_#t~mem5_50|)) (and .cse5 (= |v_P0_#t~ite6_49| v_~x$w_buff1~0_115) .cse13 .cse6)) (= |v_P0_#t~ite7_43| |v_P0_#t~ite6_49|) .cse7))) (or (and (= v_~x$r_buff0_thd1~0_70 0) .cse3 .cse4) (and .cse1 (= v_~x$r_buff0_thd1~0_71 v_~x$r_buff0_thd1~0_70)))))) InVars {~x$w_buff0~0=v_~x$w_buff0~0_130, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_71, ~#x~0.offset=|v_~#x~0.offset_170|, P0Thread1of1ForFork1_#t~ite6=|v_P0Thread1of1ForFork1_#t~ite6_1|, ~x$w_buff1~0=v_~x$w_buff1~0_115, #memory_int=|v_#memory_int_263|, ~#x~0.base=|v_~#x~0.base_170|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_356, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_52, P0Thread1of1ForFork1_#t~mem5=|v_P0Thread1of1ForFork1_#t~mem5_1|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_445} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_130, P0Thread1of1ForFork1_#t~ite10=|v_P0Thread1of1ForFork1_#t~ite10_1|, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_70, ~#x~0.offset=|v_~#x~0.offset_170|, ~x$w_buff1~0=v_~x$w_buff1~0_115, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_355, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_51, P0Thread1of1ForFork1_#t~mem5=|v_P0Thread1of1ForFork1_#t~mem5_2|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_444, P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_1|, P0Thread1of1ForFork1_#t~ite9=|v_P0Thread1of1ForFork1_#t~ite9_1|, P0Thread1of1ForFork1_#t~ite6=|v_P0Thread1of1ForFork1_#t~ite6_2|, P0Thread1of1ForFork1_#t~ite7=|v_P0Thread1of1ForFork1_#t~ite7_1|, #memory_int=|v_#memory_int_262|, ~#x~0.base=|v_~#x~0.base_170|, P0Thread1of1ForFork1_#t~ite11=|v_P0Thread1of1ForFork1_#t~ite11_1|} AuxVars[|v_P0_#t~ite6_49|, |v_P0_#t~mem5_50|, |v_P0_#t~ite7_43|] AssignedVars[P0Thread1of1ForFork1_#t~ite10, ~x$r_buff0_thd1~0, P0Thread1of1ForFork1_#t~ite8, P0Thread1of1ForFork1_#t~ite9, P0Thread1of1ForFork1_#t~ite6, P0Thread1of1ForFork1_#t~ite7, #memory_int, ~x$w_buff1_used~0, ~x$r_buff1_thd1~0, P0Thread1of1ForFork1_#t~mem5, ~x$w_buff0_used~0, P0Thread1of1ForFork1_#t~ite11] under condition null [2021-01-26 22:51:39,435 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-26 22:51:40,517 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-26 22:51:40,779 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-26 22:51:41,981 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-26 22:51:42,069 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-26 22:51:42,189 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-26 22:51:42,254 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-26 22:51:42,277 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check Size of Word is: 75 and size of Sequence is : 76[2021-01-26 22:51:42,440 INFO L164 SleepSetCegar]: Size of mCounterexample is: 76 [2021-01-26 22:51:42,442 INFO L165 SleepSetCegar]: [1266#[ULTIMATE.startENTRY]true, 1268#[L-1]true, 1270#[L-1-1]true, 1272#[L17]true, 1274#[L17-1]true, 1276#[L17-2]true, 1278#[L17-3]true, 1280#[L17-4]true, 1282#[L710]true, 1284#[L712](= ~__unbuffered_p0_EAX~0 0), 1286#[L713](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0)), 1288#[L714](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0)), 1290#[L715](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0)), 1292#[L716](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0)), 1294#[L717](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0)), 1296#[L718](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0)), 1298#[L719](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0)), 1300#[L720](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0)), 1302#[L721](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0)), 1304#[L722](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 1306#[L723](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 1308#[L724](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 1310#[L725](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 1312#[L726](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 1314#[L727](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 1316#[L728](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 1318#[L730](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 1320#[L730-1](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 1322#[L730-2](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 1324#[L732](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 1326#[L733](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 1328#[L734](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 1330#[L735](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 1332#[L736](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 1334#[L737](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 1336#[L738](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 1338#[L739](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 1340#[L740](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 1342#[L741](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 1344#[L742](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 1346#[L743](and (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 1348#[L744](and (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 1350#[L746](and (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 1354#[L747](and (= ~y~0 0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 1356#[L748](and (= ~y~0 0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 1358#[L749](and (= ~y~0 0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 1360#[L-1-2](and (= ~y~0 0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 1362#[L-1-3](and (= ~y~0 0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 1364#[L825](and (= ~y~0 0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 1366#[L825-1](and (= ~y~0 0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 1368#[L826](and (= ~y~0 0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 1370#[L826-1, P0ENTRY](and (= ~y~0 0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 1374#[L827, P0ENTRY](and (= ~y~0 0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 1378#[L827-1, P0ENTRY](and (= ~y~0 0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 1382#[L828, P0ENTRY](and (= ~y~0 0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 1386#[L828, L752](and (= ~y~0 0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 1388#[L828-1, P1ENTRY, L752](and (= ~y~0 0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 11663#[P1ENTRY, L752, L829](and (= ~y~0 0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 11677#[L831, P1ENTRY, L752](and (= ~y~0 0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 11691#[P1ENTRY, L832, L752](and (= ~y~0 0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 11705#[L2, P1ENTRY, L752](and (= ~y~0 0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 11719#[L3, P1ENTRY, L752](and (= ~y~0 0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 11738#[L2-1, P1ENTRY, L752](and (= ~y~0 0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 11925#[L839, P1ENTRY, L752](and (= ~y~0 0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 11937#[L839, L780, L752](and (= ~y~0 0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 13511#[L798, L839, L752](and (= ~y~0 0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0)), 13520#[L839, L801, L752](and (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0)), 14677#[L839, L754, L801](= ~x$w_buff0_used~0 0), 14683#[L844, L754, L801](= ~x$w_buff0_used~0 0), 14691#[L845, L754, L801](= ~x$w_buff0_used~0 0), 14699#[L18, L754, L801](= ~x$w_buff0_used~0 0), 14707#[L18-1, L754, L801](= ~x$w_buff0_used~0 0), 14715#[L18-2, L754, L801](= ~x$w_buff0_used~0 0), 14735#[L17-5, L754, L801](= ~x$w_buff0_used~0 0), 14766#[L754, L801, L17-7](= ~x$w_buff0_used~0 0), 14801#[L754, L801, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION](= ~x$w_buff0_used~0 0)] [2021-01-26 22:51:42,442 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2021-01-26 22:51:42,442 INFO L429 AbstractCegarLoop]: === Iteration 4 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-26 22:51:42,443 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-26 22:51:42,443 INFO L82 PathProgramCache]: Analyzing trace with hash -1003426507, now seen corresponding path program 1 times [2021-01-26 22:51:42,443 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-26 22:51:42,444 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2091788554] [2021-01-26 22:51:42,444 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-26 22:51:42,531 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-26 22:51:43,165 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-26 22:51:43,166 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2091788554] [2021-01-26 22:51:43,166 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-26 22:51:43,166 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [15] imperfect sequences [] total 15 [2021-01-26 22:51:43,166 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1149638293] [2021-01-26 22:51:43,168 INFO L461 AbstractCegarLoop]: Interpolant automaton has 15 states [2021-01-26 22:51:43,168 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-26 22:51:43,171 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2021-01-26 22:51:43,174 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=50, Invalid=160, Unknown=0, NotChecked=0, Total=210 [2021-01-26 22:51:43,174 INFO L481 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2021-01-26 22:51:43,175 INFO L482 AbstractCegarLoop]: Interpolant automaton has has 15 states, 15 states have (on average 5.0) internal successors, (75), 15 states have internal predecessors, (75), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-01-26 22:51:43,406 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-26 22:51:43,646 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-26 22:51:48,620 WARN L146 IndependenceRelation]: Expensive independence query (4153 ms) for statements [1223] L801-->L808: Formula: (let ((.cse12 (= (mod v_~x$w_buff0_used~0_450 256) 0)) (.cse13 (= (mod v_~x$r_buff1_thd2~0_258 256) 0)) (.cse14 (= (mod v_~x$w_buff1_used~0_362 256) 0)) (.cse16 (= (mod v_~x$w_buff0_used~0_451 256) 0)) (.cse15 (= (mod v_~x$r_buff0_thd2~0_286 256) 0))) (let ((.cse0 (select |v_#memory_int_271| |v_~#x~0.base_174|)) (.cse8 (or .cse16 .cse15)) (.cse9 (not .cse16)) (.cse4 (or .cse13 .cse14)) (.cse1 (or .cse12 .cse15)) (.cse2 (not .cse12)) (.cse3 (not .cse15)) (.cse5 (not .cse14)) (.cse6 (not .cse13))) (and (= (store |v_#memory_int_271| |v_~#x~0.base_174| (store .cse0 |v_~#x~0.offset_174| |v_P1_#t~ite63_35|)) |v_#memory_int_270|) (or (and (= v_~x$r_buff0_thd2~0_286 v_~x$r_buff0_thd2~0_285) .cse1) (and (= v_~x$r_buff0_thd2~0_285 0) .cse2 .cse3)) (let ((.cse7 (= |v_P1_#t~mem61_40| |v_P1Thread1of1ForFork0_#t~mem61_1|))) (or (and (or (and (= |v_P1_#t~ite62_35| |v_P1_#t~mem61_40|) (= (select .cse0 |v_~#x~0.offset_174|) |v_P1_#t~mem61_40|) .cse4) (and (= |v_P1_#t~ite62_35| v_~x$w_buff1~0_119) .cse5 .cse6 .cse7)) (= |v_P1_#t~ite62_35| |v_P1_#t~ite63_35|) .cse8) (and (= |v_P1_#t~ite63_35| v_~x$w_buff0~0_134) .cse9 (= |v_P1_#t~ite62_35| |v_P1Thread1of1ForFork0_#t~ite62_1|) .cse3 .cse7))) (let ((.cse10 (= (mod v_~x$r_buff0_thd2~0_285 256) 0)) (.cse11 (= (mod v_~x$w_buff1_used~0_361 256) 0))) (or (and (= v_~x$r_buff1_thd2~0_257 0) (or (and .cse2 (not .cse10)) (and (not .cse11) .cse6))) (and (= v_~x$r_buff1_thd2~0_258 v_~x$r_buff1_thd2~0_257) (or .cse12 .cse10) (or .cse13 .cse11)))) (or (and (= v_~x$w_buff0_used~0_451 v_~x$w_buff0_used~0_450) .cse8) (and .cse9 (= v_~x$w_buff0_used~0_450 0) .cse3)) (or (and (= v_~x$w_buff1_used~0_362 v_~x$w_buff1_used~0_361) .cse4 .cse1) (and (= v_~x$w_buff1_used~0_361 0) (or (and .cse2 .cse3) (and .cse5 .cse6))))))) InVars {~x$w_buff0~0=v_~x$w_buff0~0_134, P1Thread1of1ForFork0_#t~ite62=|v_P1Thread1of1ForFork0_#t~ite62_1|, ~#x~0.offset=|v_~#x~0.offset_174|, ~x$w_buff1~0=v_~x$w_buff1~0_119, #memory_int=|v_#memory_int_271|, ~#x~0.base=|v_~#x~0.base_174|, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_258, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_362, P1Thread1of1ForFork0_#t~mem61=|v_P1Thread1of1ForFork0_#t~mem61_1|, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_286, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_451} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_134, ~#x~0.offset=|v_~#x~0.offset_174|, ~x$w_buff1~0=v_~x$w_buff1~0_119, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_257, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_361, P1Thread1of1ForFork0_#t~mem61=|v_P1Thread1of1ForFork0_#t~mem61_2|, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_285, P1Thread1of1ForFork0_#t~ite66=|v_P1Thread1of1ForFork0_#t~ite66_1|, P1Thread1of1ForFork0_#t~ite67=|v_P1Thread1of1ForFork0_#t~ite67_1|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_450, P1Thread1of1ForFork0_#t~ite62=|v_P1Thread1of1ForFork0_#t~ite62_2|, P1Thread1of1ForFork0_#t~ite63=|v_P1Thread1of1ForFork0_#t~ite63_1|, P1Thread1of1ForFork0_#t~ite64=|v_P1Thread1of1ForFork0_#t~ite64_1|, P1Thread1of1ForFork0_#t~ite65=|v_P1Thread1of1ForFork0_#t~ite65_1|, #memory_int=|v_#memory_int_270|, ~#x~0.base=|v_~#x~0.base_174|} AuxVars[|v_P1_#t~mem61_40|, |v_P1_#t~ite62_35|, |v_P1_#t~ite63_35|] AssignedVars[P1Thread1of1ForFork0_#t~ite62, P1Thread1of1ForFork0_#t~ite63, P1Thread1of1ForFork0_#t~ite64, P1Thread1of1ForFork0_#t~ite65, #memory_int, ~x$r_buff1_thd2~0, ~x$w_buff1_used~0, P1Thread1of1ForFork0_#t~mem61, ~x$r_buff0_thd2~0, P1Thread1of1ForFork0_#t~ite66, P1Thread1of1ForFork0_#t~ite67, ~x$w_buff0_used~0] and [1209] L2-1-->L839: Formula: (let ((.cse15 (= (mod v_~x$w_buff0_used~0_437 256) 0)) (.cse9 (= (mod v_~x$r_buff1_thd0~0_46 256) 0)) (.cse16 (= (mod v_~x$w_buff1_used~0_348 256) 0)) (.cse14 (= (mod v_~x$r_buff0_thd0~0_66 256) 0)) (.cse10 (= (mod v_~x$w_buff0_used~0_436 256) 0))) (let ((.cse2 (or .cse14 .cse10)) (.cse5 (not .cse10)) (.cse0 (select |v_#memory_int_255| |v_~#x~0.base_166|)) (.cse1 (or .cse9 .cse16)) (.cse3 (not .cse9)) (.cse4 (not .cse16)) (.cse13 (or .cse14 .cse15)) (.cse11 (not .cse15)) (.cse6 (not .cse14))) (and (= (store |v_#memory_int_255| |v_~#x~0.base_166| (store .cse0 |v_~#x~0.offset_166| |v_ULTIMATE.start_main_#t~ite72_48|)) |v_#memory_int_254|) (or (and (= v_~x$w_buff1_used~0_348 v_~x$w_buff1_used~0_347) .cse1 .cse2) (and (or (and .cse3 .cse4) (and .cse5 .cse6)) (= v_~x$w_buff1_used~0_347 0))) (let ((.cse7 (= (mod v_~x$w_buff1_used~0_347 256) 0)) (.cse8 (= (mod v_~x$r_buff0_thd0~0_65 256) 0))) (or (and (= v_~x$r_buff1_thd0~0_45 0) (or (and (not .cse7) .cse3) (and (not .cse8) .cse5))) (and (or .cse7 .cse9) (= v_~x$r_buff1_thd0~0_45 v_~x$r_buff1_thd0~0_46) (or .cse10 .cse8)))) (or (and (= v_~x$r_buff0_thd0~0_66 v_~x$r_buff0_thd0~0_65) .cse2) (and (= v_~x$r_buff0_thd0~0_65 0) .cse5 .cse6)) (let ((.cse12 (= |v_ULTIMATE.start_main_#t~mem70_39| |v_ULTIMATE.start_main_#t~mem70_34|))) (or (and .cse11 (= v_~x$w_buff0~0_126 |v_ULTIMATE.start_main_#t~ite72_48|) (= |v_ULTIMATE.start_main_#t~ite71_38| |v_ULTIMATE.start_main_#t~ite71_33|) .cse12 .cse6) (and (or (and (= |v_ULTIMATE.start_main_#t~mem70_39| |v_ULTIMATE.start_main_#t~ite71_38|) (= |v_ULTIMATE.start_main_#t~mem70_39| (select .cse0 |v_~#x~0.offset_166|)) .cse1) (and .cse3 .cse4 (= |v_ULTIMATE.start_main_#t~ite71_38| v_~x$w_buff1~0_111) .cse12)) (= |v_ULTIMATE.start_main_#t~ite71_38| |v_ULTIMATE.start_main_#t~ite72_48|) .cse13))) (or (and (= v_~x$w_buff0_used~0_437 v_~x$w_buff0_used~0_436) .cse13) (and .cse11 (= v_~x$w_buff0_used~0_436 0) .cse6))))) InVars {~x$w_buff0~0=v_~x$w_buff0~0_126, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_66, ULTIMATE.start_main_#t~ite71=|v_ULTIMATE.start_main_#t~ite71_33|, ~#x~0.offset=|v_~#x~0.offset_166|, ~x$w_buff1~0=v_~x$w_buff1~0_111, #memory_int=|v_#memory_int_255|, ~#x~0.base=|v_~#x~0.base_166|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_348, ULTIMATE.start_main_#t~mem70=|v_ULTIMATE.start_main_#t~mem70_34|, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_46, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_437} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_126, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_65, ~#x~0.offset=|v_~#x~0.offset_166|, ~x$w_buff1~0=v_~x$w_buff1~0_111, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_347, ULTIMATE.start_main_#t~mem70=|v_ULTIMATE.start_main_#t~mem70_33|, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_45, ULTIMATE.start_main_#t~ite75=|v_ULTIMATE.start_main_#t~ite75_24|, ULTIMATE.start_main_#t~ite76=|v_ULTIMATE.start_main_#t~ite76_18|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_436, ULTIMATE.start_main_#t~ite73=|v_ULTIMATE.start_main_#t~ite73_26|, ULTIMATE.start_main_#t~ite74=|v_ULTIMATE.start_main_#t~ite74_26|, ULTIMATE.start_main_#t~ite71=|v_ULTIMATE.start_main_#t~ite71_32|, ULTIMATE.start_main_#t~ite72=|v_ULTIMATE.start_main_#t~ite72_44|, #memory_int=|v_#memory_int_254|, ~#x~0.base=|v_~#x~0.base_166|} AuxVars[|v_ULTIMATE.start_main_#t~ite72_48|, |v_ULTIMATE.start_main_#t~ite71_38|, |v_ULTIMATE.start_main_#t~mem70_39|] AssignedVars[ULTIMATE.start_main_#t~ite73, ~x$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite74, ULTIMATE.start_main_#t~ite71, ULTIMATE.start_main_#t~ite72, #memory_int, ~x$w_buff1_used~0, ULTIMATE.start_main_#t~mem70, ~x$r_buff1_thd0~0, ULTIMATE.start_main_#t~ite75, ULTIMATE.start_main_#t~ite76, ~x$w_buff0_used~0] under condition 14812#(= (select |#valid| |~#x~0.base|) 1) [2021-01-26 22:51:48,765 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-26 22:51:53,301 WARN L146 IndependenceRelation]: Expensive independence query (4130 ms) for statements [1223] L801-->L808: Formula: (let ((.cse12 (= (mod v_~x$w_buff0_used~0_450 256) 0)) (.cse13 (= (mod v_~x$r_buff1_thd2~0_258 256) 0)) (.cse14 (= (mod v_~x$w_buff1_used~0_362 256) 0)) (.cse16 (= (mod v_~x$w_buff0_used~0_451 256) 0)) (.cse15 (= (mod v_~x$r_buff0_thd2~0_286 256) 0))) (let ((.cse0 (select |v_#memory_int_271| |v_~#x~0.base_174|)) (.cse8 (or .cse16 .cse15)) (.cse9 (not .cse16)) (.cse4 (or .cse13 .cse14)) (.cse1 (or .cse12 .cse15)) (.cse2 (not .cse12)) (.cse3 (not .cse15)) (.cse5 (not .cse14)) (.cse6 (not .cse13))) (and (= (store |v_#memory_int_271| |v_~#x~0.base_174| (store .cse0 |v_~#x~0.offset_174| |v_P1_#t~ite63_35|)) |v_#memory_int_270|) (or (and (= v_~x$r_buff0_thd2~0_286 v_~x$r_buff0_thd2~0_285) .cse1) (and (= v_~x$r_buff0_thd2~0_285 0) .cse2 .cse3)) (let ((.cse7 (= |v_P1_#t~mem61_40| |v_P1Thread1of1ForFork0_#t~mem61_1|))) (or (and (or (and (= |v_P1_#t~ite62_35| |v_P1_#t~mem61_40|) (= (select .cse0 |v_~#x~0.offset_174|) |v_P1_#t~mem61_40|) .cse4) (and (= |v_P1_#t~ite62_35| v_~x$w_buff1~0_119) .cse5 .cse6 .cse7)) (= |v_P1_#t~ite62_35| |v_P1_#t~ite63_35|) .cse8) (and (= |v_P1_#t~ite63_35| v_~x$w_buff0~0_134) .cse9 (= |v_P1_#t~ite62_35| |v_P1Thread1of1ForFork0_#t~ite62_1|) .cse3 .cse7))) (let ((.cse10 (= (mod v_~x$r_buff0_thd2~0_285 256) 0)) (.cse11 (= (mod v_~x$w_buff1_used~0_361 256) 0))) (or (and (= v_~x$r_buff1_thd2~0_257 0) (or (and .cse2 (not .cse10)) (and (not .cse11) .cse6))) (and (= v_~x$r_buff1_thd2~0_258 v_~x$r_buff1_thd2~0_257) (or .cse12 .cse10) (or .cse13 .cse11)))) (or (and (= v_~x$w_buff0_used~0_451 v_~x$w_buff0_used~0_450) .cse8) (and .cse9 (= v_~x$w_buff0_used~0_450 0) .cse3)) (or (and (= v_~x$w_buff1_used~0_362 v_~x$w_buff1_used~0_361) .cse4 .cse1) (and (= v_~x$w_buff1_used~0_361 0) (or (and .cse2 .cse3) (and .cse5 .cse6))))))) InVars {~x$w_buff0~0=v_~x$w_buff0~0_134, P1Thread1of1ForFork0_#t~ite62=|v_P1Thread1of1ForFork0_#t~ite62_1|, ~#x~0.offset=|v_~#x~0.offset_174|, ~x$w_buff1~0=v_~x$w_buff1~0_119, #memory_int=|v_#memory_int_271|, ~#x~0.base=|v_~#x~0.base_174|, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_258, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_362, P1Thread1of1ForFork0_#t~mem61=|v_P1Thread1of1ForFork0_#t~mem61_1|, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_286, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_451} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_134, ~#x~0.offset=|v_~#x~0.offset_174|, ~x$w_buff1~0=v_~x$w_buff1~0_119, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_257, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_361, P1Thread1of1ForFork0_#t~mem61=|v_P1Thread1of1ForFork0_#t~mem61_2|, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_285, P1Thread1of1ForFork0_#t~ite66=|v_P1Thread1of1ForFork0_#t~ite66_1|, P1Thread1of1ForFork0_#t~ite67=|v_P1Thread1of1ForFork0_#t~ite67_1|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_450, P1Thread1of1ForFork0_#t~ite62=|v_P1Thread1of1ForFork0_#t~ite62_2|, P1Thread1of1ForFork0_#t~ite63=|v_P1Thread1of1ForFork0_#t~ite63_1|, P1Thread1of1ForFork0_#t~ite64=|v_P1Thread1of1ForFork0_#t~ite64_1|, P1Thread1of1ForFork0_#t~ite65=|v_P1Thread1of1ForFork0_#t~ite65_1|, #memory_int=|v_#memory_int_270|, ~#x~0.base=|v_~#x~0.base_174|} AuxVars[|v_P1_#t~mem61_40|, |v_P1_#t~ite62_35|, |v_P1_#t~ite63_35|] AssignedVars[P1Thread1of1ForFork0_#t~ite62, P1Thread1of1ForFork0_#t~ite63, P1Thread1of1ForFork0_#t~ite64, P1Thread1of1ForFork0_#t~ite65, #memory_int, ~x$r_buff1_thd2~0, ~x$w_buff1_used~0, P1Thread1of1ForFork0_#t~mem61, ~x$r_buff0_thd2~0, P1Thread1of1ForFork0_#t~ite66, P1Thread1of1ForFork0_#t~ite67, ~x$w_buff0_used~0] and [1216] L765-->L772: Formula: (let ((.cse9 (= (mod v_~x$w_buff0_used~0_444 256) 0)) (.cse14 (= 0 (mod v_~x$r_buff0_thd1~0_71 256))) (.cse16 (= (mod v_~x$w_buff1_used~0_356 256) 0)) (.cse12 (= (mod v_~x$r_buff1_thd1~0_52 256) 0)) (.cse15 (= (mod v_~x$w_buff0_used~0_445 256) 0))) (let ((.cse8 (not .cse15)) (.cse2 (or .cse16 .cse12)) (.cse0 (select |v_#memory_int_263| |v_~#x~0.base_170|)) (.cse5 (not .cse16)) (.cse6 (not .cse12)) (.cse7 (or .cse14 .cse15)) (.cse3 (not .cse14)) (.cse4 (not .cse9)) (.cse1 (or .cse14 .cse9))) (and (= (store |v_#memory_int_263| |v_~#x~0.base_170| (store .cse0 |v_~#x~0.offset_170| |v_P0_#t~ite7_43|)) |v_#memory_int_262|) (or (and .cse1 .cse2 (= v_~x$w_buff1_used~0_356 v_~x$w_buff1_used~0_355)) (and (= v_~x$w_buff1_used~0_355 0) (or (and .cse3 .cse4) (and .cse5 .cse6)))) (or (and (= v_~x$w_buff0_used~0_444 v_~x$w_buff0_used~0_445) .cse7) (and (= v_~x$w_buff0_used~0_444 0) .cse8 .cse3)) (let ((.cse10 (= (mod v_~x$r_buff0_thd1~0_70 256) 0)) (.cse11 (= (mod v_~x$w_buff1_used~0_355 256) 0))) (or (and (or .cse9 .cse10) (or .cse11 .cse12) (= v_~x$r_buff1_thd1~0_52 v_~x$r_buff1_thd1~0_51)) (and (or (and (not .cse10) .cse4) (and .cse6 (not .cse11))) (= v_~x$r_buff1_thd1~0_51 0)))) (let ((.cse13 (= |v_P0_#t~mem5_50| |v_P0Thread1of1ForFork1_#t~mem5_1|))) (or (and (= |v_P0_#t~ite7_43| v_~x$w_buff0~0_130) .cse13 .cse8 .cse3 (= |v_P0_#t~ite6_49| |v_P0Thread1of1ForFork1_#t~ite6_1|)) (and (or (and .cse2 (= |v_P0_#t~ite6_49| |v_P0_#t~mem5_50|) (= (select .cse0 |v_~#x~0.offset_170|) |v_P0_#t~mem5_50|)) (and .cse5 (= |v_P0_#t~ite6_49| v_~x$w_buff1~0_115) .cse13 .cse6)) (= |v_P0_#t~ite7_43| |v_P0_#t~ite6_49|) .cse7))) (or (and (= v_~x$r_buff0_thd1~0_70 0) .cse3 .cse4) (and .cse1 (= v_~x$r_buff0_thd1~0_71 v_~x$r_buff0_thd1~0_70)))))) InVars {~x$w_buff0~0=v_~x$w_buff0~0_130, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_71, ~#x~0.offset=|v_~#x~0.offset_170|, P0Thread1of1ForFork1_#t~ite6=|v_P0Thread1of1ForFork1_#t~ite6_1|, ~x$w_buff1~0=v_~x$w_buff1~0_115, #memory_int=|v_#memory_int_263|, ~#x~0.base=|v_~#x~0.base_170|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_356, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_52, P0Thread1of1ForFork1_#t~mem5=|v_P0Thread1of1ForFork1_#t~mem5_1|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_445} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_130, P0Thread1of1ForFork1_#t~ite10=|v_P0Thread1of1ForFork1_#t~ite10_1|, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_70, ~#x~0.offset=|v_~#x~0.offset_170|, ~x$w_buff1~0=v_~x$w_buff1~0_115, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_355, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_51, P0Thread1of1ForFork1_#t~mem5=|v_P0Thread1of1ForFork1_#t~mem5_2|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_444, P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_1|, P0Thread1of1ForFork1_#t~ite9=|v_P0Thread1of1ForFork1_#t~ite9_1|, P0Thread1of1ForFork1_#t~ite6=|v_P0Thread1of1ForFork1_#t~ite6_2|, P0Thread1of1ForFork1_#t~ite7=|v_P0Thread1of1ForFork1_#t~ite7_1|, #memory_int=|v_#memory_int_262|, ~#x~0.base=|v_~#x~0.base_170|, P0Thread1of1ForFork1_#t~ite11=|v_P0Thread1of1ForFork1_#t~ite11_1|} AuxVars[|v_P0_#t~ite6_49|, |v_P0_#t~mem5_50|, |v_P0_#t~ite7_43|] AssignedVars[P0Thread1of1ForFork1_#t~ite10, ~x$r_buff0_thd1~0, P0Thread1of1ForFork1_#t~ite8, P0Thread1of1ForFork1_#t~ite9, P0Thread1of1ForFork1_#t~ite6, P0Thread1of1ForFork1_#t~ite7, #memory_int, ~x$w_buff1_used~0, ~x$r_buff1_thd1~0, P0Thread1of1ForFork1_#t~mem5, ~x$w_buff0_used~0, P0Thread1of1ForFork1_#t~ite11] under condition 14812#(= (select |#valid| |~#x~0.base|) 1) [2021-01-26 22:51:53,322 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-26 22:51:57,233 WARN L146 IndependenceRelation]: Expensive independence query (3910 ms) for statements [1209] L2-1-->L839: Formula: (let ((.cse15 (= (mod v_~x$w_buff0_used~0_437 256) 0)) (.cse9 (= (mod v_~x$r_buff1_thd0~0_46 256) 0)) (.cse16 (= (mod v_~x$w_buff1_used~0_348 256) 0)) (.cse14 (= (mod v_~x$r_buff0_thd0~0_66 256) 0)) (.cse10 (= (mod v_~x$w_buff0_used~0_436 256) 0))) (let ((.cse2 (or .cse14 .cse10)) (.cse5 (not .cse10)) (.cse0 (select |v_#memory_int_255| |v_~#x~0.base_166|)) (.cse1 (or .cse9 .cse16)) (.cse3 (not .cse9)) (.cse4 (not .cse16)) (.cse13 (or .cse14 .cse15)) (.cse11 (not .cse15)) (.cse6 (not .cse14))) (and (= (store |v_#memory_int_255| |v_~#x~0.base_166| (store .cse0 |v_~#x~0.offset_166| |v_ULTIMATE.start_main_#t~ite72_48|)) |v_#memory_int_254|) (or (and (= v_~x$w_buff1_used~0_348 v_~x$w_buff1_used~0_347) .cse1 .cse2) (and (or (and .cse3 .cse4) (and .cse5 .cse6)) (= v_~x$w_buff1_used~0_347 0))) (let ((.cse7 (= (mod v_~x$w_buff1_used~0_347 256) 0)) (.cse8 (= (mod v_~x$r_buff0_thd0~0_65 256) 0))) (or (and (= v_~x$r_buff1_thd0~0_45 0) (or (and (not .cse7) .cse3) (and (not .cse8) .cse5))) (and (or .cse7 .cse9) (= v_~x$r_buff1_thd0~0_45 v_~x$r_buff1_thd0~0_46) (or .cse10 .cse8)))) (or (and (= v_~x$r_buff0_thd0~0_66 v_~x$r_buff0_thd0~0_65) .cse2) (and (= v_~x$r_buff0_thd0~0_65 0) .cse5 .cse6)) (let ((.cse12 (= |v_ULTIMATE.start_main_#t~mem70_39| |v_ULTIMATE.start_main_#t~mem70_34|))) (or (and .cse11 (= v_~x$w_buff0~0_126 |v_ULTIMATE.start_main_#t~ite72_48|) (= |v_ULTIMATE.start_main_#t~ite71_38| |v_ULTIMATE.start_main_#t~ite71_33|) .cse12 .cse6) (and (or (and (= |v_ULTIMATE.start_main_#t~mem70_39| |v_ULTIMATE.start_main_#t~ite71_38|) (= |v_ULTIMATE.start_main_#t~mem70_39| (select .cse0 |v_~#x~0.offset_166|)) .cse1) (and .cse3 .cse4 (= |v_ULTIMATE.start_main_#t~ite71_38| v_~x$w_buff1~0_111) .cse12)) (= |v_ULTIMATE.start_main_#t~ite71_38| |v_ULTIMATE.start_main_#t~ite72_48|) .cse13))) (or (and (= v_~x$w_buff0_used~0_437 v_~x$w_buff0_used~0_436) .cse13) (and .cse11 (= v_~x$w_buff0_used~0_436 0) .cse6))))) InVars {~x$w_buff0~0=v_~x$w_buff0~0_126, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_66, ULTIMATE.start_main_#t~ite71=|v_ULTIMATE.start_main_#t~ite71_33|, ~#x~0.offset=|v_~#x~0.offset_166|, ~x$w_buff1~0=v_~x$w_buff1~0_111, #memory_int=|v_#memory_int_255|, ~#x~0.base=|v_~#x~0.base_166|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_348, ULTIMATE.start_main_#t~mem70=|v_ULTIMATE.start_main_#t~mem70_34|, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_46, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_437} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_126, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_65, ~#x~0.offset=|v_~#x~0.offset_166|, ~x$w_buff1~0=v_~x$w_buff1~0_111, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_347, ULTIMATE.start_main_#t~mem70=|v_ULTIMATE.start_main_#t~mem70_33|, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_45, ULTIMATE.start_main_#t~ite75=|v_ULTIMATE.start_main_#t~ite75_24|, ULTIMATE.start_main_#t~ite76=|v_ULTIMATE.start_main_#t~ite76_18|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_436, ULTIMATE.start_main_#t~ite73=|v_ULTIMATE.start_main_#t~ite73_26|, ULTIMATE.start_main_#t~ite74=|v_ULTIMATE.start_main_#t~ite74_26|, ULTIMATE.start_main_#t~ite71=|v_ULTIMATE.start_main_#t~ite71_32|, ULTIMATE.start_main_#t~ite72=|v_ULTIMATE.start_main_#t~ite72_44|, #memory_int=|v_#memory_int_254|, ~#x~0.base=|v_~#x~0.base_166|} AuxVars[|v_ULTIMATE.start_main_#t~ite72_48|, |v_ULTIMATE.start_main_#t~ite71_38|, |v_ULTIMATE.start_main_#t~mem70_39|] AssignedVars[ULTIMATE.start_main_#t~ite73, ~x$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite74, ULTIMATE.start_main_#t~ite71, ULTIMATE.start_main_#t~ite72, #memory_int, ~x$w_buff1_used~0, ULTIMATE.start_main_#t~mem70, ~x$r_buff1_thd0~0, ULTIMATE.start_main_#t~ite75, ULTIMATE.start_main_#t~ite76, ~x$w_buff0_used~0] and [1216] L765-->L772: Formula: (let ((.cse9 (= (mod v_~x$w_buff0_used~0_444 256) 0)) (.cse14 (= 0 (mod v_~x$r_buff0_thd1~0_71 256))) (.cse16 (= (mod v_~x$w_buff1_used~0_356 256) 0)) (.cse12 (= (mod v_~x$r_buff1_thd1~0_52 256) 0)) (.cse15 (= (mod v_~x$w_buff0_used~0_445 256) 0))) (let ((.cse8 (not .cse15)) (.cse2 (or .cse16 .cse12)) (.cse0 (select |v_#memory_int_263| |v_~#x~0.base_170|)) (.cse5 (not .cse16)) (.cse6 (not .cse12)) (.cse7 (or .cse14 .cse15)) (.cse3 (not .cse14)) (.cse4 (not .cse9)) (.cse1 (or .cse14 .cse9))) (and (= (store |v_#memory_int_263| |v_~#x~0.base_170| (store .cse0 |v_~#x~0.offset_170| |v_P0_#t~ite7_43|)) |v_#memory_int_262|) (or (and .cse1 .cse2 (= v_~x$w_buff1_used~0_356 v_~x$w_buff1_used~0_355)) (and (= v_~x$w_buff1_used~0_355 0) (or (and .cse3 .cse4) (and .cse5 .cse6)))) (or (and (= v_~x$w_buff0_used~0_444 v_~x$w_buff0_used~0_445) .cse7) (and (= v_~x$w_buff0_used~0_444 0) .cse8 .cse3)) (let ((.cse10 (= (mod v_~x$r_buff0_thd1~0_70 256) 0)) (.cse11 (= (mod v_~x$w_buff1_used~0_355 256) 0))) (or (and (or .cse9 .cse10) (or .cse11 .cse12) (= v_~x$r_buff1_thd1~0_52 v_~x$r_buff1_thd1~0_51)) (and (or (and (not .cse10) .cse4) (and .cse6 (not .cse11))) (= v_~x$r_buff1_thd1~0_51 0)))) (let ((.cse13 (= |v_P0_#t~mem5_50| |v_P0Thread1of1ForFork1_#t~mem5_1|))) (or (and (= |v_P0_#t~ite7_43| v_~x$w_buff0~0_130) .cse13 .cse8 .cse3 (= |v_P0_#t~ite6_49| |v_P0Thread1of1ForFork1_#t~ite6_1|)) (and (or (and .cse2 (= |v_P0_#t~ite6_49| |v_P0_#t~mem5_50|) (= (select .cse0 |v_~#x~0.offset_170|) |v_P0_#t~mem5_50|)) (and .cse5 (= |v_P0_#t~ite6_49| v_~x$w_buff1~0_115) .cse13 .cse6)) (= |v_P0_#t~ite7_43| |v_P0_#t~ite6_49|) .cse7))) (or (and (= v_~x$r_buff0_thd1~0_70 0) .cse3 .cse4) (and .cse1 (= v_~x$r_buff0_thd1~0_71 v_~x$r_buff0_thd1~0_70)))))) InVars {~x$w_buff0~0=v_~x$w_buff0~0_130, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_71, ~#x~0.offset=|v_~#x~0.offset_170|, P0Thread1of1ForFork1_#t~ite6=|v_P0Thread1of1ForFork1_#t~ite6_1|, ~x$w_buff1~0=v_~x$w_buff1~0_115, #memory_int=|v_#memory_int_263|, ~#x~0.base=|v_~#x~0.base_170|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_356, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_52, P0Thread1of1ForFork1_#t~mem5=|v_P0Thread1of1ForFork1_#t~mem5_1|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_445} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_130, P0Thread1of1ForFork1_#t~ite10=|v_P0Thread1of1ForFork1_#t~ite10_1|, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_70, ~#x~0.offset=|v_~#x~0.offset_170|, ~x$w_buff1~0=v_~x$w_buff1~0_115, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_355, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_51, P0Thread1of1ForFork1_#t~mem5=|v_P0Thread1of1ForFork1_#t~mem5_2|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_444, P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_1|, P0Thread1of1ForFork1_#t~ite9=|v_P0Thread1of1ForFork1_#t~ite9_1|, P0Thread1of1ForFork1_#t~ite6=|v_P0Thread1of1ForFork1_#t~ite6_2|, P0Thread1of1ForFork1_#t~ite7=|v_P0Thread1of1ForFork1_#t~ite7_1|, #memory_int=|v_#memory_int_262|, ~#x~0.base=|v_~#x~0.base_170|, P0Thread1of1ForFork1_#t~ite11=|v_P0Thread1of1ForFork1_#t~ite11_1|} AuxVars[|v_P0_#t~ite6_49|, |v_P0_#t~mem5_50|, |v_P0_#t~ite7_43|] AssignedVars[P0Thread1of1ForFork1_#t~ite10, ~x$r_buff0_thd1~0, P0Thread1of1ForFork1_#t~ite8, P0Thread1of1ForFork1_#t~ite9, P0Thread1of1ForFork1_#t~ite6, P0Thread1of1ForFork1_#t~ite7, #memory_int, ~x$w_buff1_used~0, ~x$r_buff1_thd1~0, P0Thread1of1ForFork1_#t~mem5, ~x$w_buff0_used~0, P0Thread1of1ForFork1_#t~ite11] under condition 14814#(and (= (select |#valid| |~#x~0.base|) 1) (= 0 ~x$r_buff0_thd0~0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0)) [2021-01-26 22:51:57,260 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-26 22:52:02,565 WARN L146 IndependenceRelation]: Expensive independence query (4112 ms) for statements [1216] L765-->L772: Formula: (let ((.cse9 (= (mod v_~x$w_buff0_used~0_444 256) 0)) (.cse14 (= 0 (mod v_~x$r_buff0_thd1~0_71 256))) (.cse16 (= (mod v_~x$w_buff1_used~0_356 256) 0)) (.cse12 (= (mod v_~x$r_buff1_thd1~0_52 256) 0)) (.cse15 (= (mod v_~x$w_buff0_used~0_445 256) 0))) (let ((.cse8 (not .cse15)) (.cse2 (or .cse16 .cse12)) (.cse0 (select |v_#memory_int_263| |v_~#x~0.base_170|)) (.cse5 (not .cse16)) (.cse6 (not .cse12)) (.cse7 (or .cse14 .cse15)) (.cse3 (not .cse14)) (.cse4 (not .cse9)) (.cse1 (or .cse14 .cse9))) (and (= (store |v_#memory_int_263| |v_~#x~0.base_170| (store .cse0 |v_~#x~0.offset_170| |v_P0_#t~ite7_43|)) |v_#memory_int_262|) (or (and .cse1 .cse2 (= v_~x$w_buff1_used~0_356 v_~x$w_buff1_used~0_355)) (and (= v_~x$w_buff1_used~0_355 0) (or (and .cse3 .cse4) (and .cse5 .cse6)))) (or (and (= v_~x$w_buff0_used~0_444 v_~x$w_buff0_used~0_445) .cse7) (and (= v_~x$w_buff0_used~0_444 0) .cse8 .cse3)) (let ((.cse10 (= (mod v_~x$r_buff0_thd1~0_70 256) 0)) (.cse11 (= (mod v_~x$w_buff1_used~0_355 256) 0))) (or (and (or .cse9 .cse10) (or .cse11 .cse12) (= v_~x$r_buff1_thd1~0_52 v_~x$r_buff1_thd1~0_51)) (and (or (and (not .cse10) .cse4) (and .cse6 (not .cse11))) (= v_~x$r_buff1_thd1~0_51 0)))) (let ((.cse13 (= |v_P0_#t~mem5_50| |v_P0Thread1of1ForFork1_#t~mem5_1|))) (or (and (= |v_P0_#t~ite7_43| v_~x$w_buff0~0_130) .cse13 .cse8 .cse3 (= |v_P0_#t~ite6_49| |v_P0Thread1of1ForFork1_#t~ite6_1|)) (and (or (and .cse2 (= |v_P0_#t~ite6_49| |v_P0_#t~mem5_50|) (= (select .cse0 |v_~#x~0.offset_170|) |v_P0_#t~mem5_50|)) (and .cse5 (= |v_P0_#t~ite6_49| v_~x$w_buff1~0_115) .cse13 .cse6)) (= |v_P0_#t~ite7_43| |v_P0_#t~ite6_49|) .cse7))) (or (and (= v_~x$r_buff0_thd1~0_70 0) .cse3 .cse4) (and .cse1 (= v_~x$r_buff0_thd1~0_71 v_~x$r_buff0_thd1~0_70)))))) InVars {~x$w_buff0~0=v_~x$w_buff0~0_130, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_71, ~#x~0.offset=|v_~#x~0.offset_170|, P0Thread1of1ForFork1_#t~ite6=|v_P0Thread1of1ForFork1_#t~ite6_1|, ~x$w_buff1~0=v_~x$w_buff1~0_115, #memory_int=|v_#memory_int_263|, ~#x~0.base=|v_~#x~0.base_170|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_356, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_52, P0Thread1of1ForFork1_#t~mem5=|v_P0Thread1of1ForFork1_#t~mem5_1|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_445} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_130, P0Thread1of1ForFork1_#t~ite10=|v_P0Thread1of1ForFork1_#t~ite10_1|, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_70, ~#x~0.offset=|v_~#x~0.offset_170|, ~x$w_buff1~0=v_~x$w_buff1~0_115, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_355, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_51, P0Thread1of1ForFork1_#t~mem5=|v_P0Thread1of1ForFork1_#t~mem5_2|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_444, P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_1|, P0Thread1of1ForFork1_#t~ite9=|v_P0Thread1of1ForFork1_#t~ite9_1|, P0Thread1of1ForFork1_#t~ite6=|v_P0Thread1of1ForFork1_#t~ite6_2|, P0Thread1of1ForFork1_#t~ite7=|v_P0Thread1of1ForFork1_#t~ite7_1|, #memory_int=|v_#memory_int_262|, ~#x~0.base=|v_~#x~0.base_170|, P0Thread1of1ForFork1_#t~ite11=|v_P0Thread1of1ForFork1_#t~ite11_1|} AuxVars[|v_P0_#t~ite6_49|, |v_P0_#t~mem5_50|, |v_P0_#t~ite7_43|] AssignedVars[P0Thread1of1ForFork1_#t~ite10, ~x$r_buff0_thd1~0, P0Thread1of1ForFork1_#t~ite8, P0Thread1of1ForFork1_#t~ite9, P0Thread1of1ForFork1_#t~ite6, P0Thread1of1ForFork1_#t~ite7, #memory_int, ~x$w_buff1_used~0, ~x$r_buff1_thd1~0, P0Thread1of1ForFork1_#t~mem5, ~x$w_buff0_used~0, P0Thread1of1ForFork1_#t~ite11] and [1209] L2-1-->L839: Formula: (let ((.cse15 (= (mod v_~x$w_buff0_used~0_437 256) 0)) (.cse9 (= (mod v_~x$r_buff1_thd0~0_46 256) 0)) (.cse16 (= (mod v_~x$w_buff1_used~0_348 256) 0)) (.cse14 (= (mod v_~x$r_buff0_thd0~0_66 256) 0)) (.cse10 (= (mod v_~x$w_buff0_used~0_436 256) 0))) (let ((.cse2 (or .cse14 .cse10)) (.cse5 (not .cse10)) (.cse0 (select |v_#memory_int_255| |v_~#x~0.base_166|)) (.cse1 (or .cse9 .cse16)) (.cse3 (not .cse9)) (.cse4 (not .cse16)) (.cse13 (or .cse14 .cse15)) (.cse11 (not .cse15)) (.cse6 (not .cse14))) (and (= (store |v_#memory_int_255| |v_~#x~0.base_166| (store .cse0 |v_~#x~0.offset_166| |v_ULTIMATE.start_main_#t~ite72_48|)) |v_#memory_int_254|) (or (and (= v_~x$w_buff1_used~0_348 v_~x$w_buff1_used~0_347) .cse1 .cse2) (and (or (and .cse3 .cse4) (and .cse5 .cse6)) (= v_~x$w_buff1_used~0_347 0))) (let ((.cse7 (= (mod v_~x$w_buff1_used~0_347 256) 0)) (.cse8 (= (mod v_~x$r_buff0_thd0~0_65 256) 0))) (or (and (= v_~x$r_buff1_thd0~0_45 0) (or (and (not .cse7) .cse3) (and (not .cse8) .cse5))) (and (or .cse7 .cse9) (= v_~x$r_buff1_thd0~0_45 v_~x$r_buff1_thd0~0_46) (or .cse10 .cse8)))) (or (and (= v_~x$r_buff0_thd0~0_66 v_~x$r_buff0_thd0~0_65) .cse2) (and (= v_~x$r_buff0_thd0~0_65 0) .cse5 .cse6)) (let ((.cse12 (= |v_ULTIMATE.start_main_#t~mem70_39| |v_ULTIMATE.start_main_#t~mem70_34|))) (or (and .cse11 (= v_~x$w_buff0~0_126 |v_ULTIMATE.start_main_#t~ite72_48|) (= |v_ULTIMATE.start_main_#t~ite71_38| |v_ULTIMATE.start_main_#t~ite71_33|) .cse12 .cse6) (and (or (and (= |v_ULTIMATE.start_main_#t~mem70_39| |v_ULTIMATE.start_main_#t~ite71_38|) (= |v_ULTIMATE.start_main_#t~mem70_39| (select .cse0 |v_~#x~0.offset_166|)) .cse1) (and .cse3 .cse4 (= |v_ULTIMATE.start_main_#t~ite71_38| v_~x$w_buff1~0_111) .cse12)) (= |v_ULTIMATE.start_main_#t~ite71_38| |v_ULTIMATE.start_main_#t~ite72_48|) .cse13))) (or (and (= v_~x$w_buff0_used~0_437 v_~x$w_buff0_used~0_436) .cse13) (and .cse11 (= v_~x$w_buff0_used~0_436 0) .cse6))))) InVars {~x$w_buff0~0=v_~x$w_buff0~0_126, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_66, ULTIMATE.start_main_#t~ite71=|v_ULTIMATE.start_main_#t~ite71_33|, ~#x~0.offset=|v_~#x~0.offset_166|, ~x$w_buff1~0=v_~x$w_buff1~0_111, #memory_int=|v_#memory_int_255|, ~#x~0.base=|v_~#x~0.base_166|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_348, ULTIMATE.start_main_#t~mem70=|v_ULTIMATE.start_main_#t~mem70_34|, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_46, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_437} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_126, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_65, ~#x~0.offset=|v_~#x~0.offset_166|, ~x$w_buff1~0=v_~x$w_buff1~0_111, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_347, ULTIMATE.start_main_#t~mem70=|v_ULTIMATE.start_main_#t~mem70_33|, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_45, ULTIMATE.start_main_#t~ite75=|v_ULTIMATE.start_main_#t~ite75_24|, ULTIMATE.start_main_#t~ite76=|v_ULTIMATE.start_main_#t~ite76_18|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_436, ULTIMATE.start_main_#t~ite73=|v_ULTIMATE.start_main_#t~ite73_26|, ULTIMATE.start_main_#t~ite74=|v_ULTIMATE.start_main_#t~ite74_26|, ULTIMATE.start_main_#t~ite71=|v_ULTIMATE.start_main_#t~ite71_32|, ULTIMATE.start_main_#t~ite72=|v_ULTIMATE.start_main_#t~ite72_44|, #memory_int=|v_#memory_int_254|, ~#x~0.base=|v_~#x~0.base_166|} AuxVars[|v_ULTIMATE.start_main_#t~ite72_48|, |v_ULTIMATE.start_main_#t~ite71_38|, |v_ULTIMATE.start_main_#t~mem70_39|] AssignedVars[ULTIMATE.start_main_#t~ite73, ~x$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite74, ULTIMATE.start_main_#t~ite71, ULTIMATE.start_main_#t~ite72, #memory_int, ~x$w_buff1_used~0, ULTIMATE.start_main_#t~mem70, ~x$r_buff1_thd0~0, ULTIMATE.start_main_#t~ite75, ULTIMATE.start_main_#t~ite76, ~x$w_buff0_used~0] under condition 14812#(= (select |#valid| |~#x~0.base|) 1) [2021-01-26 22:52:03,152 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-26 22:52:07,262 WARN L146 IndependenceRelation]: Expensive independence query (4109 ms) for statements [1223] L801-->L808: Formula: (let ((.cse12 (= (mod v_~x$w_buff0_used~0_450 256) 0)) (.cse13 (= (mod v_~x$r_buff1_thd2~0_258 256) 0)) (.cse14 (= (mod v_~x$w_buff1_used~0_362 256) 0)) (.cse16 (= (mod v_~x$w_buff0_used~0_451 256) 0)) (.cse15 (= (mod v_~x$r_buff0_thd2~0_286 256) 0))) (let ((.cse0 (select |v_#memory_int_271| |v_~#x~0.base_174|)) (.cse8 (or .cse16 .cse15)) (.cse9 (not .cse16)) (.cse4 (or .cse13 .cse14)) (.cse1 (or .cse12 .cse15)) (.cse2 (not .cse12)) (.cse3 (not .cse15)) (.cse5 (not .cse14)) (.cse6 (not .cse13))) (and (= (store |v_#memory_int_271| |v_~#x~0.base_174| (store .cse0 |v_~#x~0.offset_174| |v_P1_#t~ite63_35|)) |v_#memory_int_270|) (or (and (= v_~x$r_buff0_thd2~0_286 v_~x$r_buff0_thd2~0_285) .cse1) (and (= v_~x$r_buff0_thd2~0_285 0) .cse2 .cse3)) (let ((.cse7 (= |v_P1_#t~mem61_40| |v_P1Thread1of1ForFork0_#t~mem61_1|))) (or (and (or (and (= |v_P1_#t~ite62_35| |v_P1_#t~mem61_40|) (= (select .cse0 |v_~#x~0.offset_174|) |v_P1_#t~mem61_40|) .cse4) (and (= |v_P1_#t~ite62_35| v_~x$w_buff1~0_119) .cse5 .cse6 .cse7)) (= |v_P1_#t~ite62_35| |v_P1_#t~ite63_35|) .cse8) (and (= |v_P1_#t~ite63_35| v_~x$w_buff0~0_134) .cse9 (= |v_P1_#t~ite62_35| |v_P1Thread1of1ForFork0_#t~ite62_1|) .cse3 .cse7))) (let ((.cse10 (= (mod v_~x$r_buff0_thd2~0_285 256) 0)) (.cse11 (= (mod v_~x$w_buff1_used~0_361 256) 0))) (or (and (= v_~x$r_buff1_thd2~0_257 0) (or (and .cse2 (not .cse10)) (and (not .cse11) .cse6))) (and (= v_~x$r_buff1_thd2~0_258 v_~x$r_buff1_thd2~0_257) (or .cse12 .cse10) (or .cse13 .cse11)))) (or (and (= v_~x$w_buff0_used~0_451 v_~x$w_buff0_used~0_450) .cse8) (and .cse9 (= v_~x$w_buff0_used~0_450 0) .cse3)) (or (and (= v_~x$w_buff1_used~0_362 v_~x$w_buff1_used~0_361) .cse4 .cse1) (and (= v_~x$w_buff1_used~0_361 0) (or (and .cse2 .cse3) (and .cse5 .cse6))))))) InVars {~x$w_buff0~0=v_~x$w_buff0~0_134, P1Thread1of1ForFork0_#t~ite62=|v_P1Thread1of1ForFork0_#t~ite62_1|, ~#x~0.offset=|v_~#x~0.offset_174|, ~x$w_buff1~0=v_~x$w_buff1~0_119, #memory_int=|v_#memory_int_271|, ~#x~0.base=|v_~#x~0.base_174|, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_258, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_362, P1Thread1of1ForFork0_#t~mem61=|v_P1Thread1of1ForFork0_#t~mem61_1|, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_286, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_451} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_134, ~#x~0.offset=|v_~#x~0.offset_174|, ~x$w_buff1~0=v_~x$w_buff1~0_119, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_257, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_361, P1Thread1of1ForFork0_#t~mem61=|v_P1Thread1of1ForFork0_#t~mem61_2|, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_285, P1Thread1of1ForFork0_#t~ite66=|v_P1Thread1of1ForFork0_#t~ite66_1|, P1Thread1of1ForFork0_#t~ite67=|v_P1Thread1of1ForFork0_#t~ite67_1|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_450, P1Thread1of1ForFork0_#t~ite62=|v_P1Thread1of1ForFork0_#t~ite62_2|, P1Thread1of1ForFork0_#t~ite63=|v_P1Thread1of1ForFork0_#t~ite63_1|, P1Thread1of1ForFork0_#t~ite64=|v_P1Thread1of1ForFork0_#t~ite64_1|, P1Thread1of1ForFork0_#t~ite65=|v_P1Thread1of1ForFork0_#t~ite65_1|, #memory_int=|v_#memory_int_270|, ~#x~0.base=|v_~#x~0.base_174|} AuxVars[|v_P1_#t~mem61_40|, |v_P1_#t~ite62_35|, |v_P1_#t~ite63_35|] AssignedVars[P1Thread1of1ForFork0_#t~ite62, P1Thread1of1ForFork0_#t~ite63, P1Thread1of1ForFork0_#t~ite64, P1Thread1of1ForFork0_#t~ite65, #memory_int, ~x$r_buff1_thd2~0, ~x$w_buff1_used~0, P1Thread1of1ForFork0_#t~mem61, ~x$r_buff0_thd2~0, P1Thread1of1ForFork0_#t~ite66, P1Thread1of1ForFork0_#t~ite67, ~x$w_buff0_used~0] and [1216] L765-->L772: Formula: (let ((.cse9 (= (mod v_~x$w_buff0_used~0_444 256) 0)) (.cse14 (= 0 (mod v_~x$r_buff0_thd1~0_71 256))) (.cse16 (= (mod v_~x$w_buff1_used~0_356 256) 0)) (.cse12 (= (mod v_~x$r_buff1_thd1~0_52 256) 0)) (.cse15 (= (mod v_~x$w_buff0_used~0_445 256) 0))) (let ((.cse8 (not .cse15)) (.cse2 (or .cse16 .cse12)) (.cse0 (select |v_#memory_int_263| |v_~#x~0.base_170|)) (.cse5 (not .cse16)) (.cse6 (not .cse12)) (.cse7 (or .cse14 .cse15)) (.cse3 (not .cse14)) (.cse4 (not .cse9)) (.cse1 (or .cse14 .cse9))) (and (= (store |v_#memory_int_263| |v_~#x~0.base_170| (store .cse0 |v_~#x~0.offset_170| |v_P0_#t~ite7_43|)) |v_#memory_int_262|) (or (and .cse1 .cse2 (= v_~x$w_buff1_used~0_356 v_~x$w_buff1_used~0_355)) (and (= v_~x$w_buff1_used~0_355 0) (or (and .cse3 .cse4) (and .cse5 .cse6)))) (or (and (= v_~x$w_buff0_used~0_444 v_~x$w_buff0_used~0_445) .cse7) (and (= v_~x$w_buff0_used~0_444 0) .cse8 .cse3)) (let ((.cse10 (= (mod v_~x$r_buff0_thd1~0_70 256) 0)) (.cse11 (= (mod v_~x$w_buff1_used~0_355 256) 0))) (or (and (or .cse9 .cse10) (or .cse11 .cse12) (= v_~x$r_buff1_thd1~0_52 v_~x$r_buff1_thd1~0_51)) (and (or (and (not .cse10) .cse4) (and .cse6 (not .cse11))) (= v_~x$r_buff1_thd1~0_51 0)))) (let ((.cse13 (= |v_P0_#t~mem5_50| |v_P0Thread1of1ForFork1_#t~mem5_1|))) (or (and (= |v_P0_#t~ite7_43| v_~x$w_buff0~0_130) .cse13 .cse8 .cse3 (= |v_P0_#t~ite6_49| |v_P0Thread1of1ForFork1_#t~ite6_1|)) (and (or (and .cse2 (= |v_P0_#t~ite6_49| |v_P0_#t~mem5_50|) (= (select .cse0 |v_~#x~0.offset_170|) |v_P0_#t~mem5_50|)) (and .cse5 (= |v_P0_#t~ite6_49| v_~x$w_buff1~0_115) .cse13 .cse6)) (= |v_P0_#t~ite7_43| |v_P0_#t~ite6_49|) .cse7))) (or (and (= v_~x$r_buff0_thd1~0_70 0) .cse3 .cse4) (and .cse1 (= v_~x$r_buff0_thd1~0_71 v_~x$r_buff0_thd1~0_70)))))) InVars {~x$w_buff0~0=v_~x$w_buff0~0_130, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_71, ~#x~0.offset=|v_~#x~0.offset_170|, P0Thread1of1ForFork1_#t~ite6=|v_P0Thread1of1ForFork1_#t~ite6_1|, ~x$w_buff1~0=v_~x$w_buff1~0_115, #memory_int=|v_#memory_int_263|, ~#x~0.base=|v_~#x~0.base_170|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_356, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_52, P0Thread1of1ForFork1_#t~mem5=|v_P0Thread1of1ForFork1_#t~mem5_1|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_445} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_130, P0Thread1of1ForFork1_#t~ite10=|v_P0Thread1of1ForFork1_#t~ite10_1|, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_70, ~#x~0.offset=|v_~#x~0.offset_170|, ~x$w_buff1~0=v_~x$w_buff1~0_115, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_355, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_51, P0Thread1of1ForFork1_#t~mem5=|v_P0Thread1of1ForFork1_#t~mem5_2|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_444, P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_1|, P0Thread1of1ForFork1_#t~ite9=|v_P0Thread1of1ForFork1_#t~ite9_1|, P0Thread1of1ForFork1_#t~ite6=|v_P0Thread1of1ForFork1_#t~ite6_2|, P0Thread1of1ForFork1_#t~ite7=|v_P0Thread1of1ForFork1_#t~ite7_1|, #memory_int=|v_#memory_int_262|, ~#x~0.base=|v_~#x~0.base_170|, P0Thread1of1ForFork1_#t~ite11=|v_P0Thread1of1ForFork1_#t~ite11_1|} AuxVars[|v_P0_#t~ite6_49|, |v_P0_#t~mem5_50|, |v_P0_#t~ite7_43|] AssignedVars[P0Thread1of1ForFork1_#t~ite10, ~x$r_buff0_thd1~0, P0Thread1of1ForFork1_#t~ite8, P0Thread1of1ForFork1_#t~ite9, P0Thread1of1ForFork1_#t~ite6, P0Thread1of1ForFork1_#t~ite7, #memory_int, ~x$w_buff1_used~0, ~x$r_buff1_thd1~0, P0Thread1of1ForFork1_#t~mem5, ~x$w_buff0_used~0, P0Thread1of1ForFork1_#t~ite11] under condition 17638#(and (= (select |#valid| |~#x~0.base|) 1) (not (= (select (select |#memory_int| ~__unbuffered_p1_EAX$read_delayed_var~0.base) ~__unbuffered_p1_EAX$read_delayed_var~0.offset) 1)) (= 0 ~x$r_buff0_thd0~0) (= ~__unbuffered_p1_EAX$read_delayed~0 1) (not (= ~__unbuffered_p1_EAX~0 1)) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0)) [2021-01-26 22:52:07,279 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-26 22:52:07,385 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-26 22:52:07,955 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-26 22:52:08,005 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-26 22:52:08,488 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-26 22:52:08,592 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-26 22:52:08,779 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-26 22:52:09,229 WARN L193 SmtUtils]: Spent 124.00 ms on a formula simplification. DAG size of input: 42 DAG size of output: 40 [2021-01-26 22:52:09,479 WARN L193 SmtUtils]: Spent 152.00 ms on a formula simplification. DAG size of input: 48 DAG size of output: 46 [2021-01-26 22:52:09,606 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-26 22:52:09,834 WARN L193 SmtUtils]: Spent 176.00 ms on a formula simplification. DAG size of input: 53 DAG size of output: 51 [2021-01-26 22:52:09,926 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-26 22:52:10,155 WARN L193 SmtUtils]: Spent 159.00 ms on a formula simplification. DAG size of input: 50 DAG size of output: 48 [2021-01-26 22:52:10,172 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-26 22:52:10,310 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-26 22:52:10,474 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-26 22:52:14,587 WARN L146 IndependenceRelation]: Expensive independence query (4112 ms) for statements [1223] L801-->L808: Formula: (let ((.cse12 (= (mod v_~x$w_buff0_used~0_450 256) 0)) (.cse13 (= (mod v_~x$r_buff1_thd2~0_258 256) 0)) (.cse14 (= (mod v_~x$w_buff1_used~0_362 256) 0)) (.cse16 (= (mod v_~x$w_buff0_used~0_451 256) 0)) (.cse15 (= (mod v_~x$r_buff0_thd2~0_286 256) 0))) (let ((.cse0 (select |v_#memory_int_271| |v_~#x~0.base_174|)) (.cse8 (or .cse16 .cse15)) (.cse9 (not .cse16)) (.cse4 (or .cse13 .cse14)) (.cse1 (or .cse12 .cse15)) (.cse2 (not .cse12)) (.cse3 (not .cse15)) (.cse5 (not .cse14)) (.cse6 (not .cse13))) (and (= (store |v_#memory_int_271| |v_~#x~0.base_174| (store .cse0 |v_~#x~0.offset_174| |v_P1_#t~ite63_35|)) |v_#memory_int_270|) (or (and (= v_~x$r_buff0_thd2~0_286 v_~x$r_buff0_thd2~0_285) .cse1) (and (= v_~x$r_buff0_thd2~0_285 0) .cse2 .cse3)) (let ((.cse7 (= |v_P1_#t~mem61_40| |v_P1Thread1of1ForFork0_#t~mem61_1|))) (or (and (or (and (= |v_P1_#t~ite62_35| |v_P1_#t~mem61_40|) (= (select .cse0 |v_~#x~0.offset_174|) |v_P1_#t~mem61_40|) .cse4) (and (= |v_P1_#t~ite62_35| v_~x$w_buff1~0_119) .cse5 .cse6 .cse7)) (= |v_P1_#t~ite62_35| |v_P1_#t~ite63_35|) .cse8) (and (= |v_P1_#t~ite63_35| v_~x$w_buff0~0_134) .cse9 (= |v_P1_#t~ite62_35| |v_P1Thread1of1ForFork0_#t~ite62_1|) .cse3 .cse7))) (let ((.cse10 (= (mod v_~x$r_buff0_thd2~0_285 256) 0)) (.cse11 (= (mod v_~x$w_buff1_used~0_361 256) 0))) (or (and (= v_~x$r_buff1_thd2~0_257 0) (or (and .cse2 (not .cse10)) (and (not .cse11) .cse6))) (and (= v_~x$r_buff1_thd2~0_258 v_~x$r_buff1_thd2~0_257) (or .cse12 .cse10) (or .cse13 .cse11)))) (or (and (= v_~x$w_buff0_used~0_451 v_~x$w_buff0_used~0_450) .cse8) (and .cse9 (= v_~x$w_buff0_used~0_450 0) .cse3)) (or (and (= v_~x$w_buff1_used~0_362 v_~x$w_buff1_used~0_361) .cse4 .cse1) (and (= v_~x$w_buff1_used~0_361 0) (or (and .cse2 .cse3) (and .cse5 .cse6))))))) InVars {~x$w_buff0~0=v_~x$w_buff0~0_134, P1Thread1of1ForFork0_#t~ite62=|v_P1Thread1of1ForFork0_#t~ite62_1|, ~#x~0.offset=|v_~#x~0.offset_174|, ~x$w_buff1~0=v_~x$w_buff1~0_119, #memory_int=|v_#memory_int_271|, ~#x~0.base=|v_~#x~0.base_174|, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_258, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_362, P1Thread1of1ForFork0_#t~mem61=|v_P1Thread1of1ForFork0_#t~mem61_1|, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_286, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_451} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_134, ~#x~0.offset=|v_~#x~0.offset_174|, ~x$w_buff1~0=v_~x$w_buff1~0_119, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_257, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_361, P1Thread1of1ForFork0_#t~mem61=|v_P1Thread1of1ForFork0_#t~mem61_2|, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_285, P1Thread1of1ForFork0_#t~ite66=|v_P1Thread1of1ForFork0_#t~ite66_1|, P1Thread1of1ForFork0_#t~ite67=|v_P1Thread1of1ForFork0_#t~ite67_1|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_450, P1Thread1of1ForFork0_#t~ite62=|v_P1Thread1of1ForFork0_#t~ite62_2|, P1Thread1of1ForFork0_#t~ite63=|v_P1Thread1of1ForFork0_#t~ite63_1|, P1Thread1of1ForFork0_#t~ite64=|v_P1Thread1of1ForFork0_#t~ite64_1|, P1Thread1of1ForFork0_#t~ite65=|v_P1Thread1of1ForFork0_#t~ite65_1|, #memory_int=|v_#memory_int_270|, ~#x~0.base=|v_~#x~0.base_174|} AuxVars[|v_P1_#t~mem61_40|, |v_P1_#t~ite62_35|, |v_P1_#t~ite63_35|] AssignedVars[P1Thread1of1ForFork0_#t~ite62, P1Thread1of1ForFork0_#t~ite63, P1Thread1of1ForFork0_#t~ite64, P1Thread1of1ForFork0_#t~ite65, #memory_int, ~x$r_buff1_thd2~0, ~x$w_buff1_used~0, P1Thread1of1ForFork0_#t~mem61, ~x$r_buff0_thd2~0, P1Thread1of1ForFork0_#t~ite66, P1Thread1of1ForFork0_#t~ite67, ~x$w_buff0_used~0] and [1216] L765-->L772: Formula: (let ((.cse9 (= (mod v_~x$w_buff0_used~0_444 256) 0)) (.cse14 (= 0 (mod v_~x$r_buff0_thd1~0_71 256))) (.cse16 (= (mod v_~x$w_buff1_used~0_356 256) 0)) (.cse12 (= (mod v_~x$r_buff1_thd1~0_52 256) 0)) (.cse15 (= (mod v_~x$w_buff0_used~0_445 256) 0))) (let ((.cse8 (not .cse15)) (.cse2 (or .cse16 .cse12)) (.cse0 (select |v_#memory_int_263| |v_~#x~0.base_170|)) (.cse5 (not .cse16)) (.cse6 (not .cse12)) (.cse7 (or .cse14 .cse15)) (.cse3 (not .cse14)) (.cse4 (not .cse9)) (.cse1 (or .cse14 .cse9))) (and (= (store |v_#memory_int_263| |v_~#x~0.base_170| (store .cse0 |v_~#x~0.offset_170| |v_P0_#t~ite7_43|)) |v_#memory_int_262|) (or (and .cse1 .cse2 (= v_~x$w_buff1_used~0_356 v_~x$w_buff1_used~0_355)) (and (= v_~x$w_buff1_used~0_355 0) (or (and .cse3 .cse4) (and .cse5 .cse6)))) (or (and (= v_~x$w_buff0_used~0_444 v_~x$w_buff0_used~0_445) .cse7) (and (= v_~x$w_buff0_used~0_444 0) .cse8 .cse3)) (let ((.cse10 (= (mod v_~x$r_buff0_thd1~0_70 256) 0)) (.cse11 (= (mod v_~x$w_buff1_used~0_355 256) 0))) (or (and (or .cse9 .cse10) (or .cse11 .cse12) (= v_~x$r_buff1_thd1~0_52 v_~x$r_buff1_thd1~0_51)) (and (or (and (not .cse10) .cse4) (and .cse6 (not .cse11))) (= v_~x$r_buff1_thd1~0_51 0)))) (let ((.cse13 (= |v_P0_#t~mem5_50| |v_P0Thread1of1ForFork1_#t~mem5_1|))) (or (and (= |v_P0_#t~ite7_43| v_~x$w_buff0~0_130) .cse13 .cse8 .cse3 (= |v_P0_#t~ite6_49| |v_P0Thread1of1ForFork1_#t~ite6_1|)) (and (or (and .cse2 (= |v_P0_#t~ite6_49| |v_P0_#t~mem5_50|) (= (select .cse0 |v_~#x~0.offset_170|) |v_P0_#t~mem5_50|)) (and .cse5 (= |v_P0_#t~ite6_49| v_~x$w_buff1~0_115) .cse13 .cse6)) (= |v_P0_#t~ite7_43| |v_P0_#t~ite6_49|) .cse7))) (or (and (= v_~x$r_buff0_thd1~0_70 0) .cse3 .cse4) (and .cse1 (= v_~x$r_buff0_thd1~0_71 v_~x$r_buff0_thd1~0_70)))))) InVars {~x$w_buff0~0=v_~x$w_buff0~0_130, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_71, ~#x~0.offset=|v_~#x~0.offset_170|, P0Thread1of1ForFork1_#t~ite6=|v_P0Thread1of1ForFork1_#t~ite6_1|, ~x$w_buff1~0=v_~x$w_buff1~0_115, #memory_int=|v_#memory_int_263|, ~#x~0.base=|v_~#x~0.base_170|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_356, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_52, P0Thread1of1ForFork1_#t~mem5=|v_P0Thread1of1ForFork1_#t~mem5_1|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_445} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_130, P0Thread1of1ForFork1_#t~ite10=|v_P0Thread1of1ForFork1_#t~ite10_1|, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_70, ~#x~0.offset=|v_~#x~0.offset_170|, ~x$w_buff1~0=v_~x$w_buff1~0_115, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_355, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_51, P0Thread1of1ForFork1_#t~mem5=|v_P0Thread1of1ForFork1_#t~mem5_2|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_444, P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_1|, P0Thread1of1ForFork1_#t~ite9=|v_P0Thread1of1ForFork1_#t~ite9_1|, P0Thread1of1ForFork1_#t~ite6=|v_P0Thread1of1ForFork1_#t~ite6_2|, P0Thread1of1ForFork1_#t~ite7=|v_P0Thread1of1ForFork1_#t~ite7_1|, #memory_int=|v_#memory_int_262|, ~#x~0.base=|v_~#x~0.base_170|, P0Thread1of1ForFork1_#t~ite11=|v_P0Thread1of1ForFork1_#t~ite11_1|} AuxVars[|v_P0_#t~ite6_49|, |v_P0_#t~mem5_50|, |v_P0_#t~ite7_43|] AssignedVars[P0Thread1of1ForFork1_#t~ite10, ~x$r_buff0_thd1~0, P0Thread1of1ForFork1_#t~ite8, P0Thread1of1ForFork1_#t~ite9, P0Thread1of1ForFork1_#t~ite6, P0Thread1of1ForFork1_#t~ite7, #memory_int, ~x$w_buff1_used~0, ~x$r_buff1_thd1~0, P0Thread1of1ForFork1_#t~mem5, ~x$w_buff0_used~0, P0Thread1of1ForFork1_#t~ite11] under condition 18716#(and (<= 1 ~main$tmp_guard1~0) (= (select |#valid| |~#x~0.base|) 1) (not (= (select (select |#memory_int| ~__unbuffered_p1_EAX$read_delayed_var~0.base) ~__unbuffered_p1_EAX$read_delayed_var~0.offset) 1)) (<= (div ~main$tmp_guard1~0 256) 0) (= 0 ~x$r_buff0_thd0~0) (or (<= (+ |ULTIMATE.start___VERIFIER_assert_#in~expression| 255) 0) (<= 1 |ULTIMATE.start___VERIFIER_assert_#in~expression|)) (= ~__unbuffered_p1_EAX$read_delayed~0 1) (not (= ~__unbuffered_p1_EAX~0 1)) (or (<= 1 ULTIMATE.start___VERIFIER_assert_~expression) (<= (+ ULTIMATE.start___VERIFIER_assert_~expression 255) 0)) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0)) [2021-01-26 22:52:14,596 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-26 22:52:14,704 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-26 22:52:14,932 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-26 22:52:15,135 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-26 22:52:19,241 WARN L146 IndependenceRelation]: Expensive independence query (4105 ms) for statements [1223] L801-->L808: Formula: (let ((.cse12 (= (mod v_~x$w_buff0_used~0_450 256) 0)) (.cse13 (= (mod v_~x$r_buff1_thd2~0_258 256) 0)) (.cse14 (= (mod v_~x$w_buff1_used~0_362 256) 0)) (.cse16 (= (mod v_~x$w_buff0_used~0_451 256) 0)) (.cse15 (= (mod v_~x$r_buff0_thd2~0_286 256) 0))) (let ((.cse0 (select |v_#memory_int_271| |v_~#x~0.base_174|)) (.cse8 (or .cse16 .cse15)) (.cse9 (not .cse16)) (.cse4 (or .cse13 .cse14)) (.cse1 (or .cse12 .cse15)) (.cse2 (not .cse12)) (.cse3 (not .cse15)) (.cse5 (not .cse14)) (.cse6 (not .cse13))) (and (= (store |v_#memory_int_271| |v_~#x~0.base_174| (store .cse0 |v_~#x~0.offset_174| |v_P1_#t~ite63_35|)) |v_#memory_int_270|) (or (and (= v_~x$r_buff0_thd2~0_286 v_~x$r_buff0_thd2~0_285) .cse1) (and (= v_~x$r_buff0_thd2~0_285 0) .cse2 .cse3)) (let ((.cse7 (= |v_P1_#t~mem61_40| |v_P1Thread1of1ForFork0_#t~mem61_1|))) (or (and (or (and (= |v_P1_#t~ite62_35| |v_P1_#t~mem61_40|) (= (select .cse0 |v_~#x~0.offset_174|) |v_P1_#t~mem61_40|) .cse4) (and (= |v_P1_#t~ite62_35| v_~x$w_buff1~0_119) .cse5 .cse6 .cse7)) (= |v_P1_#t~ite62_35| |v_P1_#t~ite63_35|) .cse8) (and (= |v_P1_#t~ite63_35| v_~x$w_buff0~0_134) .cse9 (= |v_P1_#t~ite62_35| |v_P1Thread1of1ForFork0_#t~ite62_1|) .cse3 .cse7))) (let ((.cse10 (= (mod v_~x$r_buff0_thd2~0_285 256) 0)) (.cse11 (= (mod v_~x$w_buff1_used~0_361 256) 0))) (or (and (= v_~x$r_buff1_thd2~0_257 0) (or (and .cse2 (not .cse10)) (and (not .cse11) .cse6))) (and (= v_~x$r_buff1_thd2~0_258 v_~x$r_buff1_thd2~0_257) (or .cse12 .cse10) (or .cse13 .cse11)))) (or (and (= v_~x$w_buff0_used~0_451 v_~x$w_buff0_used~0_450) .cse8) (and .cse9 (= v_~x$w_buff0_used~0_450 0) .cse3)) (or (and (= v_~x$w_buff1_used~0_362 v_~x$w_buff1_used~0_361) .cse4 .cse1) (and (= v_~x$w_buff1_used~0_361 0) (or (and .cse2 .cse3) (and .cse5 .cse6))))))) InVars {~x$w_buff0~0=v_~x$w_buff0~0_134, P1Thread1of1ForFork0_#t~ite62=|v_P1Thread1of1ForFork0_#t~ite62_1|, ~#x~0.offset=|v_~#x~0.offset_174|, ~x$w_buff1~0=v_~x$w_buff1~0_119, #memory_int=|v_#memory_int_271|, ~#x~0.base=|v_~#x~0.base_174|, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_258, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_362, P1Thread1of1ForFork0_#t~mem61=|v_P1Thread1of1ForFork0_#t~mem61_1|, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_286, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_451} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_134, ~#x~0.offset=|v_~#x~0.offset_174|, ~x$w_buff1~0=v_~x$w_buff1~0_119, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_257, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_361, P1Thread1of1ForFork0_#t~mem61=|v_P1Thread1of1ForFork0_#t~mem61_2|, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_285, P1Thread1of1ForFork0_#t~ite66=|v_P1Thread1of1ForFork0_#t~ite66_1|, P1Thread1of1ForFork0_#t~ite67=|v_P1Thread1of1ForFork0_#t~ite67_1|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_450, P1Thread1of1ForFork0_#t~ite62=|v_P1Thread1of1ForFork0_#t~ite62_2|, P1Thread1of1ForFork0_#t~ite63=|v_P1Thread1of1ForFork0_#t~ite63_1|, P1Thread1of1ForFork0_#t~ite64=|v_P1Thread1of1ForFork0_#t~ite64_1|, P1Thread1of1ForFork0_#t~ite65=|v_P1Thread1of1ForFork0_#t~ite65_1|, #memory_int=|v_#memory_int_270|, ~#x~0.base=|v_~#x~0.base_174|} AuxVars[|v_P1_#t~mem61_40|, |v_P1_#t~ite62_35|, |v_P1_#t~ite63_35|] AssignedVars[P1Thread1of1ForFork0_#t~ite62, P1Thread1of1ForFork0_#t~ite63, P1Thread1of1ForFork0_#t~ite64, P1Thread1of1ForFork0_#t~ite65, #memory_int, ~x$r_buff1_thd2~0, ~x$w_buff1_used~0, P1Thread1of1ForFork0_#t~mem61, ~x$r_buff0_thd2~0, P1Thread1of1ForFork0_#t~ite66, P1Thread1of1ForFork0_#t~ite67, ~x$w_buff0_used~0] and [1216] L765-->L772: Formula: (let ((.cse9 (= (mod v_~x$w_buff0_used~0_444 256) 0)) (.cse14 (= 0 (mod v_~x$r_buff0_thd1~0_71 256))) (.cse16 (= (mod v_~x$w_buff1_used~0_356 256) 0)) (.cse12 (= (mod v_~x$r_buff1_thd1~0_52 256) 0)) (.cse15 (= (mod v_~x$w_buff0_used~0_445 256) 0))) (let ((.cse8 (not .cse15)) (.cse2 (or .cse16 .cse12)) (.cse0 (select |v_#memory_int_263| |v_~#x~0.base_170|)) (.cse5 (not .cse16)) (.cse6 (not .cse12)) (.cse7 (or .cse14 .cse15)) (.cse3 (not .cse14)) (.cse4 (not .cse9)) (.cse1 (or .cse14 .cse9))) (and (= (store |v_#memory_int_263| |v_~#x~0.base_170| (store .cse0 |v_~#x~0.offset_170| |v_P0_#t~ite7_43|)) |v_#memory_int_262|) (or (and .cse1 .cse2 (= v_~x$w_buff1_used~0_356 v_~x$w_buff1_used~0_355)) (and (= v_~x$w_buff1_used~0_355 0) (or (and .cse3 .cse4) (and .cse5 .cse6)))) (or (and (= v_~x$w_buff0_used~0_444 v_~x$w_buff0_used~0_445) .cse7) (and (= v_~x$w_buff0_used~0_444 0) .cse8 .cse3)) (let ((.cse10 (= (mod v_~x$r_buff0_thd1~0_70 256) 0)) (.cse11 (= (mod v_~x$w_buff1_used~0_355 256) 0))) (or (and (or .cse9 .cse10) (or .cse11 .cse12) (= v_~x$r_buff1_thd1~0_52 v_~x$r_buff1_thd1~0_51)) (and (or (and (not .cse10) .cse4) (and .cse6 (not .cse11))) (= v_~x$r_buff1_thd1~0_51 0)))) (let ((.cse13 (= |v_P0_#t~mem5_50| |v_P0Thread1of1ForFork1_#t~mem5_1|))) (or (and (= |v_P0_#t~ite7_43| v_~x$w_buff0~0_130) .cse13 .cse8 .cse3 (= |v_P0_#t~ite6_49| |v_P0Thread1of1ForFork1_#t~ite6_1|)) (and (or (and .cse2 (= |v_P0_#t~ite6_49| |v_P0_#t~mem5_50|) (= (select .cse0 |v_~#x~0.offset_170|) |v_P0_#t~mem5_50|)) (and .cse5 (= |v_P0_#t~ite6_49| v_~x$w_buff1~0_115) .cse13 .cse6)) (= |v_P0_#t~ite7_43| |v_P0_#t~ite6_49|) .cse7))) (or (and (= v_~x$r_buff0_thd1~0_70 0) .cse3 .cse4) (and .cse1 (= v_~x$r_buff0_thd1~0_71 v_~x$r_buff0_thd1~0_70)))))) InVars {~x$w_buff0~0=v_~x$w_buff0~0_130, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_71, ~#x~0.offset=|v_~#x~0.offset_170|, P0Thread1of1ForFork1_#t~ite6=|v_P0Thread1of1ForFork1_#t~ite6_1|, ~x$w_buff1~0=v_~x$w_buff1~0_115, #memory_int=|v_#memory_int_263|, ~#x~0.base=|v_~#x~0.base_170|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_356, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_52, P0Thread1of1ForFork1_#t~mem5=|v_P0Thread1of1ForFork1_#t~mem5_1|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_445} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_130, P0Thread1of1ForFork1_#t~ite10=|v_P0Thread1of1ForFork1_#t~ite10_1|, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_70, ~#x~0.offset=|v_~#x~0.offset_170|, ~x$w_buff1~0=v_~x$w_buff1~0_115, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_355, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_51, P0Thread1of1ForFork1_#t~mem5=|v_P0Thread1of1ForFork1_#t~mem5_2|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_444, P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_1|, P0Thread1of1ForFork1_#t~ite9=|v_P0Thread1of1ForFork1_#t~ite9_1|, P0Thread1of1ForFork1_#t~ite6=|v_P0Thread1of1ForFork1_#t~ite6_2|, P0Thread1of1ForFork1_#t~ite7=|v_P0Thread1of1ForFork1_#t~ite7_1|, #memory_int=|v_#memory_int_262|, ~#x~0.base=|v_~#x~0.base_170|, P0Thread1of1ForFork1_#t~ite11=|v_P0Thread1of1ForFork1_#t~ite11_1|} AuxVars[|v_P0_#t~ite6_49|, |v_P0_#t~mem5_50|, |v_P0_#t~ite7_43|] AssignedVars[P0Thread1of1ForFork1_#t~ite10, ~x$r_buff0_thd1~0, P0Thread1of1ForFork1_#t~ite8, P0Thread1of1ForFork1_#t~ite9, P0Thread1of1ForFork1_#t~ite6, P0Thread1of1ForFork1_#t~ite7, #memory_int, ~x$w_buff1_used~0, ~x$r_buff1_thd1~0, P0Thread1of1ForFork1_#t~mem5, ~x$w_buff0_used~0, P0Thread1of1ForFork1_#t~ite11] under condition 18696#(and (<= 1 ~main$tmp_guard1~0) (= (select |#valid| |~#x~0.base|) 1) (not (= (select (select |#memory_int| ~__unbuffered_p1_EAX$read_delayed_var~0.base) ~__unbuffered_p1_EAX$read_delayed_var~0.offset) 1)) (<= (div ~main$tmp_guard1~0 256) 0) (= 0 ~x$r_buff0_thd0~0) (or (<= (+ |ULTIMATE.start___VERIFIER_assert_#in~expression| 255) 0) (<= 1 |ULTIMATE.start___VERIFIER_assert_#in~expression|)) (= ~__unbuffered_p1_EAX$read_delayed~0 1) (not (= ~__unbuffered_p1_EAX~0 1)) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0)) [2021-01-26 22:52:19,248 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-26 22:52:19,405 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-26 22:52:23,516 WARN L146 IndependenceRelation]: Expensive independence query (4110 ms) for statements [1223] L801-->L808: Formula: (let ((.cse12 (= (mod v_~x$w_buff0_used~0_450 256) 0)) (.cse13 (= (mod v_~x$r_buff1_thd2~0_258 256) 0)) (.cse14 (= (mod v_~x$w_buff1_used~0_362 256) 0)) (.cse16 (= (mod v_~x$w_buff0_used~0_451 256) 0)) (.cse15 (= (mod v_~x$r_buff0_thd2~0_286 256) 0))) (let ((.cse0 (select |v_#memory_int_271| |v_~#x~0.base_174|)) (.cse8 (or .cse16 .cse15)) (.cse9 (not .cse16)) (.cse4 (or .cse13 .cse14)) (.cse1 (or .cse12 .cse15)) (.cse2 (not .cse12)) (.cse3 (not .cse15)) (.cse5 (not .cse14)) (.cse6 (not .cse13))) (and (= (store |v_#memory_int_271| |v_~#x~0.base_174| (store .cse0 |v_~#x~0.offset_174| |v_P1_#t~ite63_35|)) |v_#memory_int_270|) (or (and (= v_~x$r_buff0_thd2~0_286 v_~x$r_buff0_thd2~0_285) .cse1) (and (= v_~x$r_buff0_thd2~0_285 0) .cse2 .cse3)) (let ((.cse7 (= |v_P1_#t~mem61_40| |v_P1Thread1of1ForFork0_#t~mem61_1|))) (or (and (or (and (= |v_P1_#t~ite62_35| |v_P1_#t~mem61_40|) (= (select .cse0 |v_~#x~0.offset_174|) |v_P1_#t~mem61_40|) .cse4) (and (= |v_P1_#t~ite62_35| v_~x$w_buff1~0_119) .cse5 .cse6 .cse7)) (= |v_P1_#t~ite62_35| |v_P1_#t~ite63_35|) .cse8) (and (= |v_P1_#t~ite63_35| v_~x$w_buff0~0_134) .cse9 (= |v_P1_#t~ite62_35| |v_P1Thread1of1ForFork0_#t~ite62_1|) .cse3 .cse7))) (let ((.cse10 (= (mod v_~x$r_buff0_thd2~0_285 256) 0)) (.cse11 (= (mod v_~x$w_buff1_used~0_361 256) 0))) (or (and (= v_~x$r_buff1_thd2~0_257 0) (or (and .cse2 (not .cse10)) (and (not .cse11) .cse6))) (and (= v_~x$r_buff1_thd2~0_258 v_~x$r_buff1_thd2~0_257) (or .cse12 .cse10) (or .cse13 .cse11)))) (or (and (= v_~x$w_buff0_used~0_451 v_~x$w_buff0_used~0_450) .cse8) (and .cse9 (= v_~x$w_buff0_used~0_450 0) .cse3)) (or (and (= v_~x$w_buff1_used~0_362 v_~x$w_buff1_used~0_361) .cse4 .cse1) (and (= v_~x$w_buff1_used~0_361 0) (or (and .cse2 .cse3) (and .cse5 .cse6))))))) InVars {~x$w_buff0~0=v_~x$w_buff0~0_134, P1Thread1of1ForFork0_#t~ite62=|v_P1Thread1of1ForFork0_#t~ite62_1|, ~#x~0.offset=|v_~#x~0.offset_174|, ~x$w_buff1~0=v_~x$w_buff1~0_119, #memory_int=|v_#memory_int_271|, ~#x~0.base=|v_~#x~0.base_174|, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_258, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_362, P1Thread1of1ForFork0_#t~mem61=|v_P1Thread1of1ForFork0_#t~mem61_1|, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_286, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_451} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_134, ~#x~0.offset=|v_~#x~0.offset_174|, ~x$w_buff1~0=v_~x$w_buff1~0_119, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_257, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_361, P1Thread1of1ForFork0_#t~mem61=|v_P1Thread1of1ForFork0_#t~mem61_2|, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_285, P1Thread1of1ForFork0_#t~ite66=|v_P1Thread1of1ForFork0_#t~ite66_1|, P1Thread1of1ForFork0_#t~ite67=|v_P1Thread1of1ForFork0_#t~ite67_1|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_450, P1Thread1of1ForFork0_#t~ite62=|v_P1Thread1of1ForFork0_#t~ite62_2|, P1Thread1of1ForFork0_#t~ite63=|v_P1Thread1of1ForFork0_#t~ite63_1|, P1Thread1of1ForFork0_#t~ite64=|v_P1Thread1of1ForFork0_#t~ite64_1|, P1Thread1of1ForFork0_#t~ite65=|v_P1Thread1of1ForFork0_#t~ite65_1|, #memory_int=|v_#memory_int_270|, ~#x~0.base=|v_~#x~0.base_174|} AuxVars[|v_P1_#t~mem61_40|, |v_P1_#t~ite62_35|, |v_P1_#t~ite63_35|] AssignedVars[P1Thread1of1ForFork0_#t~ite62, P1Thread1of1ForFork0_#t~ite63, P1Thread1of1ForFork0_#t~ite64, P1Thread1of1ForFork0_#t~ite65, #memory_int, ~x$r_buff1_thd2~0, ~x$w_buff1_used~0, P1Thread1of1ForFork0_#t~mem61, ~x$r_buff0_thd2~0, P1Thread1of1ForFork0_#t~ite66, P1Thread1of1ForFork0_#t~ite67, ~x$w_buff0_used~0] and [1216] L765-->L772: Formula: (let ((.cse9 (= (mod v_~x$w_buff0_used~0_444 256) 0)) (.cse14 (= 0 (mod v_~x$r_buff0_thd1~0_71 256))) (.cse16 (= (mod v_~x$w_buff1_used~0_356 256) 0)) (.cse12 (= (mod v_~x$r_buff1_thd1~0_52 256) 0)) (.cse15 (= (mod v_~x$w_buff0_used~0_445 256) 0))) (let ((.cse8 (not .cse15)) (.cse2 (or .cse16 .cse12)) (.cse0 (select |v_#memory_int_263| |v_~#x~0.base_170|)) (.cse5 (not .cse16)) (.cse6 (not .cse12)) (.cse7 (or .cse14 .cse15)) (.cse3 (not .cse14)) (.cse4 (not .cse9)) (.cse1 (or .cse14 .cse9))) (and (= (store |v_#memory_int_263| |v_~#x~0.base_170| (store .cse0 |v_~#x~0.offset_170| |v_P0_#t~ite7_43|)) |v_#memory_int_262|) (or (and .cse1 .cse2 (= v_~x$w_buff1_used~0_356 v_~x$w_buff1_used~0_355)) (and (= v_~x$w_buff1_used~0_355 0) (or (and .cse3 .cse4) (and .cse5 .cse6)))) (or (and (= v_~x$w_buff0_used~0_444 v_~x$w_buff0_used~0_445) .cse7) (and (= v_~x$w_buff0_used~0_444 0) .cse8 .cse3)) (let ((.cse10 (= (mod v_~x$r_buff0_thd1~0_70 256) 0)) (.cse11 (= (mod v_~x$w_buff1_used~0_355 256) 0))) (or (and (or .cse9 .cse10) (or .cse11 .cse12) (= v_~x$r_buff1_thd1~0_52 v_~x$r_buff1_thd1~0_51)) (and (or (and (not .cse10) .cse4) (and .cse6 (not .cse11))) (= v_~x$r_buff1_thd1~0_51 0)))) (let ((.cse13 (= |v_P0_#t~mem5_50| |v_P0Thread1of1ForFork1_#t~mem5_1|))) (or (and (= |v_P0_#t~ite7_43| v_~x$w_buff0~0_130) .cse13 .cse8 .cse3 (= |v_P0_#t~ite6_49| |v_P0Thread1of1ForFork1_#t~ite6_1|)) (and (or (and .cse2 (= |v_P0_#t~ite6_49| |v_P0_#t~mem5_50|) (= (select .cse0 |v_~#x~0.offset_170|) |v_P0_#t~mem5_50|)) (and .cse5 (= |v_P0_#t~ite6_49| v_~x$w_buff1~0_115) .cse13 .cse6)) (= |v_P0_#t~ite7_43| |v_P0_#t~ite6_49|) .cse7))) (or (and (= v_~x$r_buff0_thd1~0_70 0) .cse3 .cse4) (and .cse1 (= v_~x$r_buff0_thd1~0_71 v_~x$r_buff0_thd1~0_70)))))) InVars {~x$w_buff0~0=v_~x$w_buff0~0_130, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_71, ~#x~0.offset=|v_~#x~0.offset_170|, P0Thread1of1ForFork1_#t~ite6=|v_P0Thread1of1ForFork1_#t~ite6_1|, ~x$w_buff1~0=v_~x$w_buff1~0_115, #memory_int=|v_#memory_int_263|, ~#x~0.base=|v_~#x~0.base_170|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_356, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_52, P0Thread1of1ForFork1_#t~mem5=|v_P0Thread1of1ForFork1_#t~mem5_1|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_445} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_130, P0Thread1of1ForFork1_#t~ite10=|v_P0Thread1of1ForFork1_#t~ite10_1|, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_70, ~#x~0.offset=|v_~#x~0.offset_170|, ~x$w_buff1~0=v_~x$w_buff1~0_115, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_355, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_51, P0Thread1of1ForFork1_#t~mem5=|v_P0Thread1of1ForFork1_#t~mem5_2|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_444, P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_1|, P0Thread1of1ForFork1_#t~ite9=|v_P0Thread1of1ForFork1_#t~ite9_1|, P0Thread1of1ForFork1_#t~ite6=|v_P0Thread1of1ForFork1_#t~ite6_2|, P0Thread1of1ForFork1_#t~ite7=|v_P0Thread1of1ForFork1_#t~ite7_1|, #memory_int=|v_#memory_int_262|, ~#x~0.base=|v_~#x~0.base_170|, P0Thread1of1ForFork1_#t~ite11=|v_P0Thread1of1ForFork1_#t~ite11_1|} AuxVars[|v_P0_#t~ite6_49|, |v_P0_#t~mem5_50|, |v_P0_#t~ite7_43|] AssignedVars[P0Thread1of1ForFork1_#t~ite10, ~x$r_buff0_thd1~0, P0Thread1of1ForFork1_#t~ite8, P0Thread1of1ForFork1_#t~ite9, P0Thread1of1ForFork1_#t~ite6, P0Thread1of1ForFork1_#t~ite7, #memory_int, ~x$w_buff1_used~0, ~x$r_buff1_thd1~0, P0Thread1of1ForFork1_#t~mem5, ~x$w_buff0_used~0, P0Thread1of1ForFork1_#t~ite11] under condition 18684#(and (<= 1 ~main$tmp_guard1~0) (= (select |#valid| |~#x~0.base|) 1) (not (= (select (select |#memory_int| ~__unbuffered_p1_EAX$read_delayed_var~0.base) ~__unbuffered_p1_EAX$read_delayed_var~0.offset) 1)) (<= (div ~main$tmp_guard1~0 256) 0) (= 0 ~x$r_buff0_thd0~0) (= ~__unbuffered_p1_EAX$read_delayed~0 1) (not (= ~__unbuffered_p1_EAX~0 1)) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0)) [2021-01-26 22:52:23,522 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-26 22:52:23,621 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-26 22:52:24,287 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-26 22:52:24,388 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-26 22:52:28,523 WARN L146 IndependenceRelation]: Expensive independence query (4134 ms) for statements [1216] L765-->L772: Formula: (let ((.cse9 (= (mod v_~x$w_buff0_used~0_444 256) 0)) (.cse14 (= 0 (mod v_~x$r_buff0_thd1~0_71 256))) (.cse16 (= (mod v_~x$w_buff1_used~0_356 256) 0)) (.cse12 (= (mod v_~x$r_buff1_thd1~0_52 256) 0)) (.cse15 (= (mod v_~x$w_buff0_used~0_445 256) 0))) (let ((.cse8 (not .cse15)) (.cse2 (or .cse16 .cse12)) (.cse0 (select |v_#memory_int_263| |v_~#x~0.base_170|)) (.cse5 (not .cse16)) (.cse6 (not .cse12)) (.cse7 (or .cse14 .cse15)) (.cse3 (not .cse14)) (.cse4 (not .cse9)) (.cse1 (or .cse14 .cse9))) (and (= (store |v_#memory_int_263| |v_~#x~0.base_170| (store .cse0 |v_~#x~0.offset_170| |v_P0_#t~ite7_43|)) |v_#memory_int_262|) (or (and .cse1 .cse2 (= v_~x$w_buff1_used~0_356 v_~x$w_buff1_used~0_355)) (and (= v_~x$w_buff1_used~0_355 0) (or (and .cse3 .cse4) (and .cse5 .cse6)))) (or (and (= v_~x$w_buff0_used~0_444 v_~x$w_buff0_used~0_445) .cse7) (and (= v_~x$w_buff0_used~0_444 0) .cse8 .cse3)) (let ((.cse10 (= (mod v_~x$r_buff0_thd1~0_70 256) 0)) (.cse11 (= (mod v_~x$w_buff1_used~0_355 256) 0))) (or (and (or .cse9 .cse10) (or .cse11 .cse12) (= v_~x$r_buff1_thd1~0_52 v_~x$r_buff1_thd1~0_51)) (and (or (and (not .cse10) .cse4) (and .cse6 (not .cse11))) (= v_~x$r_buff1_thd1~0_51 0)))) (let ((.cse13 (= |v_P0_#t~mem5_50| |v_P0Thread1of1ForFork1_#t~mem5_1|))) (or (and (= |v_P0_#t~ite7_43| v_~x$w_buff0~0_130) .cse13 .cse8 .cse3 (= |v_P0_#t~ite6_49| |v_P0Thread1of1ForFork1_#t~ite6_1|)) (and (or (and .cse2 (= |v_P0_#t~ite6_49| |v_P0_#t~mem5_50|) (= (select .cse0 |v_~#x~0.offset_170|) |v_P0_#t~mem5_50|)) (and .cse5 (= |v_P0_#t~ite6_49| v_~x$w_buff1~0_115) .cse13 .cse6)) (= |v_P0_#t~ite7_43| |v_P0_#t~ite6_49|) .cse7))) (or (and (= v_~x$r_buff0_thd1~0_70 0) .cse3 .cse4) (and .cse1 (= v_~x$r_buff0_thd1~0_71 v_~x$r_buff0_thd1~0_70)))))) InVars {~x$w_buff0~0=v_~x$w_buff0~0_130, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_71, ~#x~0.offset=|v_~#x~0.offset_170|, P0Thread1of1ForFork1_#t~ite6=|v_P0Thread1of1ForFork1_#t~ite6_1|, ~x$w_buff1~0=v_~x$w_buff1~0_115, #memory_int=|v_#memory_int_263|, ~#x~0.base=|v_~#x~0.base_170|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_356, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_52, P0Thread1of1ForFork1_#t~mem5=|v_P0Thread1of1ForFork1_#t~mem5_1|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_445} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_130, P0Thread1of1ForFork1_#t~ite10=|v_P0Thread1of1ForFork1_#t~ite10_1|, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_70, ~#x~0.offset=|v_~#x~0.offset_170|, ~x$w_buff1~0=v_~x$w_buff1~0_115, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_355, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_51, P0Thread1of1ForFork1_#t~mem5=|v_P0Thread1of1ForFork1_#t~mem5_2|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_444, P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_1|, P0Thread1of1ForFork1_#t~ite9=|v_P0Thread1of1ForFork1_#t~ite9_1|, P0Thread1of1ForFork1_#t~ite6=|v_P0Thread1of1ForFork1_#t~ite6_2|, P0Thread1of1ForFork1_#t~ite7=|v_P0Thread1of1ForFork1_#t~ite7_1|, #memory_int=|v_#memory_int_262|, ~#x~0.base=|v_~#x~0.base_170|, P0Thread1of1ForFork1_#t~ite11=|v_P0Thread1of1ForFork1_#t~ite11_1|} AuxVars[|v_P0_#t~ite6_49|, |v_P0_#t~mem5_50|, |v_P0_#t~ite7_43|] AssignedVars[P0Thread1of1ForFork1_#t~ite10, ~x$r_buff0_thd1~0, P0Thread1of1ForFork1_#t~ite8, P0Thread1of1ForFork1_#t~ite9, P0Thread1of1ForFork1_#t~ite6, P0Thread1of1ForFork1_#t~ite7, #memory_int, ~x$w_buff1_used~0, ~x$r_buff1_thd1~0, P0Thread1of1ForFork1_#t~mem5, ~x$w_buff0_used~0, P0Thread1of1ForFork1_#t~ite11] and [1209] L2-1-->L839: Formula: (let ((.cse15 (= (mod v_~x$w_buff0_used~0_437 256) 0)) (.cse9 (= (mod v_~x$r_buff1_thd0~0_46 256) 0)) (.cse16 (= (mod v_~x$w_buff1_used~0_348 256) 0)) (.cse14 (= (mod v_~x$r_buff0_thd0~0_66 256) 0)) (.cse10 (= (mod v_~x$w_buff0_used~0_436 256) 0))) (let ((.cse2 (or .cse14 .cse10)) (.cse5 (not .cse10)) (.cse0 (select |v_#memory_int_255| |v_~#x~0.base_166|)) (.cse1 (or .cse9 .cse16)) (.cse3 (not .cse9)) (.cse4 (not .cse16)) (.cse13 (or .cse14 .cse15)) (.cse11 (not .cse15)) (.cse6 (not .cse14))) (and (= (store |v_#memory_int_255| |v_~#x~0.base_166| (store .cse0 |v_~#x~0.offset_166| |v_ULTIMATE.start_main_#t~ite72_48|)) |v_#memory_int_254|) (or (and (= v_~x$w_buff1_used~0_348 v_~x$w_buff1_used~0_347) .cse1 .cse2) (and (or (and .cse3 .cse4) (and .cse5 .cse6)) (= v_~x$w_buff1_used~0_347 0))) (let ((.cse7 (= (mod v_~x$w_buff1_used~0_347 256) 0)) (.cse8 (= (mod v_~x$r_buff0_thd0~0_65 256) 0))) (or (and (= v_~x$r_buff1_thd0~0_45 0) (or (and (not .cse7) .cse3) (and (not .cse8) .cse5))) (and (or .cse7 .cse9) (= v_~x$r_buff1_thd0~0_45 v_~x$r_buff1_thd0~0_46) (or .cse10 .cse8)))) (or (and (= v_~x$r_buff0_thd0~0_66 v_~x$r_buff0_thd0~0_65) .cse2) (and (= v_~x$r_buff0_thd0~0_65 0) .cse5 .cse6)) (let ((.cse12 (= |v_ULTIMATE.start_main_#t~mem70_39| |v_ULTIMATE.start_main_#t~mem70_34|))) (or (and .cse11 (= v_~x$w_buff0~0_126 |v_ULTIMATE.start_main_#t~ite72_48|) (= |v_ULTIMATE.start_main_#t~ite71_38| |v_ULTIMATE.start_main_#t~ite71_33|) .cse12 .cse6) (and (or (and (= |v_ULTIMATE.start_main_#t~mem70_39| |v_ULTIMATE.start_main_#t~ite71_38|) (= |v_ULTIMATE.start_main_#t~mem70_39| (select .cse0 |v_~#x~0.offset_166|)) .cse1) (and .cse3 .cse4 (= |v_ULTIMATE.start_main_#t~ite71_38| v_~x$w_buff1~0_111) .cse12)) (= |v_ULTIMATE.start_main_#t~ite71_38| |v_ULTIMATE.start_main_#t~ite72_48|) .cse13))) (or (and (= v_~x$w_buff0_used~0_437 v_~x$w_buff0_used~0_436) .cse13) (and .cse11 (= v_~x$w_buff0_used~0_436 0) .cse6))))) InVars {~x$w_buff0~0=v_~x$w_buff0~0_126, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_66, ULTIMATE.start_main_#t~ite71=|v_ULTIMATE.start_main_#t~ite71_33|, ~#x~0.offset=|v_~#x~0.offset_166|, ~x$w_buff1~0=v_~x$w_buff1~0_111, #memory_int=|v_#memory_int_255|, ~#x~0.base=|v_~#x~0.base_166|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_348, ULTIMATE.start_main_#t~mem70=|v_ULTIMATE.start_main_#t~mem70_34|, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_46, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_437} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_126, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_65, ~#x~0.offset=|v_~#x~0.offset_166|, ~x$w_buff1~0=v_~x$w_buff1~0_111, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_347, ULTIMATE.start_main_#t~mem70=|v_ULTIMATE.start_main_#t~mem70_33|, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_45, ULTIMATE.start_main_#t~ite75=|v_ULTIMATE.start_main_#t~ite75_24|, ULTIMATE.start_main_#t~ite76=|v_ULTIMATE.start_main_#t~ite76_18|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_436, ULTIMATE.start_main_#t~ite73=|v_ULTIMATE.start_main_#t~ite73_26|, ULTIMATE.start_main_#t~ite74=|v_ULTIMATE.start_main_#t~ite74_26|, ULTIMATE.start_main_#t~ite71=|v_ULTIMATE.start_main_#t~ite71_32|, ULTIMATE.start_main_#t~ite72=|v_ULTIMATE.start_main_#t~ite72_44|, #memory_int=|v_#memory_int_254|, ~#x~0.base=|v_~#x~0.base_166|} AuxVars[|v_ULTIMATE.start_main_#t~ite72_48|, |v_ULTIMATE.start_main_#t~ite71_38|, |v_ULTIMATE.start_main_#t~mem70_39|] AssignedVars[ULTIMATE.start_main_#t~ite73, ~x$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite74, ULTIMATE.start_main_#t~ite71, ULTIMATE.start_main_#t~ite72, #memory_int, ~x$w_buff1_used~0, ULTIMATE.start_main_#t~mem70, ~x$r_buff1_thd0~0, ULTIMATE.start_main_#t~ite75, ULTIMATE.start_main_#t~ite76, ~x$w_buff0_used~0] under condition 17638#(and (= (select |#valid| |~#x~0.base|) 1) (not (= (select (select |#memory_int| ~__unbuffered_p1_EAX$read_delayed_var~0.base) ~__unbuffered_p1_EAX$read_delayed_var~0.offset) 1)) (= 0 ~x$r_buff0_thd0~0) (= ~__unbuffered_p1_EAX$read_delayed~0 1) (not (= ~__unbuffered_p1_EAX~0 1)) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0)) [2021-01-26 22:52:32,635 WARN L146 IndependenceRelation]: Expensive independence query (4110 ms) for statements [1223] L801-->L808: Formula: (let ((.cse12 (= (mod v_~x$w_buff0_used~0_450 256) 0)) (.cse13 (= (mod v_~x$r_buff1_thd2~0_258 256) 0)) (.cse14 (= (mod v_~x$w_buff1_used~0_362 256) 0)) (.cse16 (= (mod v_~x$w_buff0_used~0_451 256) 0)) (.cse15 (= (mod v_~x$r_buff0_thd2~0_286 256) 0))) (let ((.cse0 (select |v_#memory_int_271| |v_~#x~0.base_174|)) (.cse8 (or .cse16 .cse15)) (.cse9 (not .cse16)) (.cse4 (or .cse13 .cse14)) (.cse1 (or .cse12 .cse15)) (.cse2 (not .cse12)) (.cse3 (not .cse15)) (.cse5 (not .cse14)) (.cse6 (not .cse13))) (and (= (store |v_#memory_int_271| |v_~#x~0.base_174| (store .cse0 |v_~#x~0.offset_174| |v_P1_#t~ite63_35|)) |v_#memory_int_270|) (or (and (= v_~x$r_buff0_thd2~0_286 v_~x$r_buff0_thd2~0_285) .cse1) (and (= v_~x$r_buff0_thd2~0_285 0) .cse2 .cse3)) (let ((.cse7 (= |v_P1_#t~mem61_40| |v_P1Thread1of1ForFork0_#t~mem61_1|))) (or (and (or (and (= |v_P1_#t~ite62_35| |v_P1_#t~mem61_40|) (= (select .cse0 |v_~#x~0.offset_174|) |v_P1_#t~mem61_40|) .cse4) (and (= |v_P1_#t~ite62_35| v_~x$w_buff1~0_119) .cse5 .cse6 .cse7)) (= |v_P1_#t~ite62_35| |v_P1_#t~ite63_35|) .cse8) (and (= |v_P1_#t~ite63_35| v_~x$w_buff0~0_134) .cse9 (= |v_P1_#t~ite62_35| |v_P1Thread1of1ForFork0_#t~ite62_1|) .cse3 .cse7))) (let ((.cse10 (= (mod v_~x$r_buff0_thd2~0_285 256) 0)) (.cse11 (= (mod v_~x$w_buff1_used~0_361 256) 0))) (or (and (= v_~x$r_buff1_thd2~0_257 0) (or (and .cse2 (not .cse10)) (and (not .cse11) .cse6))) (and (= v_~x$r_buff1_thd2~0_258 v_~x$r_buff1_thd2~0_257) (or .cse12 .cse10) (or .cse13 .cse11)))) (or (and (= v_~x$w_buff0_used~0_451 v_~x$w_buff0_used~0_450) .cse8) (and .cse9 (= v_~x$w_buff0_used~0_450 0) .cse3)) (or (and (= v_~x$w_buff1_used~0_362 v_~x$w_buff1_used~0_361) .cse4 .cse1) (and (= v_~x$w_buff1_used~0_361 0) (or (and .cse2 .cse3) (and .cse5 .cse6))))))) InVars {~x$w_buff0~0=v_~x$w_buff0~0_134, P1Thread1of1ForFork0_#t~ite62=|v_P1Thread1of1ForFork0_#t~ite62_1|, ~#x~0.offset=|v_~#x~0.offset_174|, ~x$w_buff1~0=v_~x$w_buff1~0_119, #memory_int=|v_#memory_int_271|, ~#x~0.base=|v_~#x~0.base_174|, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_258, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_362, P1Thread1of1ForFork0_#t~mem61=|v_P1Thread1of1ForFork0_#t~mem61_1|, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_286, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_451} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_134, ~#x~0.offset=|v_~#x~0.offset_174|, ~x$w_buff1~0=v_~x$w_buff1~0_119, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_257, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_361, P1Thread1of1ForFork0_#t~mem61=|v_P1Thread1of1ForFork0_#t~mem61_2|, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_285, P1Thread1of1ForFork0_#t~ite66=|v_P1Thread1of1ForFork0_#t~ite66_1|, P1Thread1of1ForFork0_#t~ite67=|v_P1Thread1of1ForFork0_#t~ite67_1|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_450, P1Thread1of1ForFork0_#t~ite62=|v_P1Thread1of1ForFork0_#t~ite62_2|, P1Thread1of1ForFork0_#t~ite63=|v_P1Thread1of1ForFork0_#t~ite63_1|, P1Thread1of1ForFork0_#t~ite64=|v_P1Thread1of1ForFork0_#t~ite64_1|, P1Thread1of1ForFork0_#t~ite65=|v_P1Thread1of1ForFork0_#t~ite65_1|, #memory_int=|v_#memory_int_270|, ~#x~0.base=|v_~#x~0.base_174|} AuxVars[|v_P1_#t~mem61_40|, |v_P1_#t~ite62_35|, |v_P1_#t~ite63_35|] AssignedVars[P1Thread1of1ForFork0_#t~ite62, P1Thread1of1ForFork0_#t~ite63, P1Thread1of1ForFork0_#t~ite64, P1Thread1of1ForFork0_#t~ite65, #memory_int, ~x$r_buff1_thd2~0, ~x$w_buff1_used~0, P1Thread1of1ForFork0_#t~mem61, ~x$r_buff0_thd2~0, P1Thread1of1ForFork0_#t~ite66, P1Thread1of1ForFork0_#t~ite67, ~x$w_buff0_used~0] and [1209] L2-1-->L839: Formula: (let ((.cse15 (= (mod v_~x$w_buff0_used~0_437 256) 0)) (.cse9 (= (mod v_~x$r_buff1_thd0~0_46 256) 0)) (.cse16 (= (mod v_~x$w_buff1_used~0_348 256) 0)) (.cse14 (= (mod v_~x$r_buff0_thd0~0_66 256) 0)) (.cse10 (= (mod v_~x$w_buff0_used~0_436 256) 0))) (let ((.cse2 (or .cse14 .cse10)) (.cse5 (not .cse10)) (.cse0 (select |v_#memory_int_255| |v_~#x~0.base_166|)) (.cse1 (or .cse9 .cse16)) (.cse3 (not .cse9)) (.cse4 (not .cse16)) (.cse13 (or .cse14 .cse15)) (.cse11 (not .cse15)) (.cse6 (not .cse14))) (and (= (store |v_#memory_int_255| |v_~#x~0.base_166| (store .cse0 |v_~#x~0.offset_166| |v_ULTIMATE.start_main_#t~ite72_48|)) |v_#memory_int_254|) (or (and (= v_~x$w_buff1_used~0_348 v_~x$w_buff1_used~0_347) .cse1 .cse2) (and (or (and .cse3 .cse4) (and .cse5 .cse6)) (= v_~x$w_buff1_used~0_347 0))) (let ((.cse7 (= (mod v_~x$w_buff1_used~0_347 256) 0)) (.cse8 (= (mod v_~x$r_buff0_thd0~0_65 256) 0))) (or (and (= v_~x$r_buff1_thd0~0_45 0) (or (and (not .cse7) .cse3) (and (not .cse8) .cse5))) (and (or .cse7 .cse9) (= v_~x$r_buff1_thd0~0_45 v_~x$r_buff1_thd0~0_46) (or .cse10 .cse8)))) (or (and (= v_~x$r_buff0_thd0~0_66 v_~x$r_buff0_thd0~0_65) .cse2) (and (= v_~x$r_buff0_thd0~0_65 0) .cse5 .cse6)) (let ((.cse12 (= |v_ULTIMATE.start_main_#t~mem70_39| |v_ULTIMATE.start_main_#t~mem70_34|))) (or (and .cse11 (= v_~x$w_buff0~0_126 |v_ULTIMATE.start_main_#t~ite72_48|) (= |v_ULTIMATE.start_main_#t~ite71_38| |v_ULTIMATE.start_main_#t~ite71_33|) .cse12 .cse6) (and (or (and (= |v_ULTIMATE.start_main_#t~mem70_39| |v_ULTIMATE.start_main_#t~ite71_38|) (= |v_ULTIMATE.start_main_#t~mem70_39| (select .cse0 |v_~#x~0.offset_166|)) .cse1) (and .cse3 .cse4 (= |v_ULTIMATE.start_main_#t~ite71_38| v_~x$w_buff1~0_111) .cse12)) (= |v_ULTIMATE.start_main_#t~ite71_38| |v_ULTIMATE.start_main_#t~ite72_48|) .cse13))) (or (and (= v_~x$w_buff0_used~0_437 v_~x$w_buff0_used~0_436) .cse13) (and .cse11 (= v_~x$w_buff0_used~0_436 0) .cse6))))) InVars {~x$w_buff0~0=v_~x$w_buff0~0_126, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_66, ULTIMATE.start_main_#t~ite71=|v_ULTIMATE.start_main_#t~ite71_33|, ~#x~0.offset=|v_~#x~0.offset_166|, ~x$w_buff1~0=v_~x$w_buff1~0_111, #memory_int=|v_#memory_int_255|, ~#x~0.base=|v_~#x~0.base_166|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_348, ULTIMATE.start_main_#t~mem70=|v_ULTIMATE.start_main_#t~mem70_34|, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_46, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_437} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_126, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_65, ~#x~0.offset=|v_~#x~0.offset_166|, ~x$w_buff1~0=v_~x$w_buff1~0_111, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_347, ULTIMATE.start_main_#t~mem70=|v_ULTIMATE.start_main_#t~mem70_33|, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_45, ULTIMATE.start_main_#t~ite75=|v_ULTIMATE.start_main_#t~ite75_24|, ULTIMATE.start_main_#t~ite76=|v_ULTIMATE.start_main_#t~ite76_18|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_436, ULTIMATE.start_main_#t~ite73=|v_ULTIMATE.start_main_#t~ite73_26|, ULTIMATE.start_main_#t~ite74=|v_ULTIMATE.start_main_#t~ite74_26|, ULTIMATE.start_main_#t~ite71=|v_ULTIMATE.start_main_#t~ite71_32|, ULTIMATE.start_main_#t~ite72=|v_ULTIMATE.start_main_#t~ite72_44|, #memory_int=|v_#memory_int_254|, ~#x~0.base=|v_~#x~0.base_166|} AuxVars[|v_ULTIMATE.start_main_#t~ite72_48|, |v_ULTIMATE.start_main_#t~ite71_38|, |v_ULTIMATE.start_main_#t~mem70_39|] AssignedVars[ULTIMATE.start_main_#t~ite73, ~x$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite74, ULTIMATE.start_main_#t~ite71, ULTIMATE.start_main_#t~ite72, #memory_int, ~x$w_buff1_used~0, ULTIMATE.start_main_#t~mem70, ~x$r_buff1_thd0~0, ULTIMATE.start_main_#t~ite75, ULTIMATE.start_main_#t~ite76, ~x$w_buff0_used~0] under condition 17638#(and (= (select |#valid| |~#x~0.base|) 1) (not (= (select (select |#memory_int| ~__unbuffered_p1_EAX$read_delayed_var~0.base) ~__unbuffered_p1_EAX$read_delayed_var~0.offset) 1)) (= 0 ~x$r_buff0_thd0~0) (= ~__unbuffered_p1_EAX$read_delayed~0 1) (not (= ~__unbuffered_p1_EAX~0 1)) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0)) Size of Word is: 77 and size of Sequence is : 78[2021-01-26 22:52:32,842 INFO L164 SleepSetCegar]: Size of mCounterexample is: 78 [2021-01-26 22:52:32,843 INFO L165 SleepSetCegar]: [14826#[ULTIMATE.startENTRY]true, 14828#[L-1]true, 14830#[L-1-1]true, 14832#[L17]true, 14834#[L17-1]true, 14836#[L17-2]true, 14838#[L17-3]true, 14840#[L17-4]true, 14842#[L710]true, 14844#[L712](= ~__unbuffered_p0_EAX~0 0), 14846#[L713](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0)), 14848#[L714](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0)), 14850#[L715](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0)), 14852#[L716](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0)), 14854#[L717](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0)), 14856#[L718](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0)), 14858#[L719](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0)), 14860#[L720](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0)), 14862#[L721](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0)), 14864#[L722](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 14866#[L723](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 14868#[L724](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 14870#[L725](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 14872#[L726](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 14874#[L727](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 14876#[L728](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 14878#[L730](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 14880#[L730-1](and (= (select |#valid| |~#x~0.base|) 1) (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 14882#[L730-2](and (= (select |#valid| |~#x~0.base|) 1) (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0)), 14884#[L732](and (= (select |#valid| |~#x~0.base|) 1) (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0)), 14886#[L733](and (= (select |#valid| |~#x~0.base|) 1) (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0)), 14888#[L734](and (= (select |#valid| |~#x~0.base|) 1) (= 0 ~x$r_buff0_thd0~0) (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0)), 14890#[L735](and (= (select |#valid| |~#x~0.base|) 1) (= 0 ~x$r_buff0_thd0~0) (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0)), 14892#[L736](and (= (select |#valid| |~#x~0.base|) 1) (= 0 ~x$r_buff0_thd0~0) (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0)), 14894#[L737](and (= (select |#valid| |~#x~0.base|) 1) (= 0 ~x$r_buff0_thd0~0) (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0)), 14896#[L738](and (= (select |#valid| |~#x~0.base|) 1) (= 0 ~x$r_buff0_thd0~0) (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0)), 14898#[L739](and (= (select |#valid| |~#x~0.base|) 1) (= 0 ~x$r_buff0_thd0~0) (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0)), 14900#[L740](and (= (select |#valid| |~#x~0.base|) 1) (= 0 ~x$r_buff0_thd0~0) (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0)), 14902#[L741](and (= (select |#valid| |~#x~0.base|) 1) (= 0 ~x$r_buff0_thd0~0) (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0)), 14904#[L742](and (= (select |#valid| |~#x~0.base|) 1) (= 0 ~x$r_buff0_thd0~0) (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0)), 14906#[L743](and (= (select |#valid| |~#x~0.base|) 1) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0)), 14908#[L744](and (= (select |#valid| |~#x~0.base|) 1) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0)), 14910#[L746](and (= (select |#valid| |~#x~0.base|) 1) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0) (= ~x$w_buff1_used~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0)), 14912#[L747](and (= (select |#valid| |~#x~0.base|) 1) (= ~y~0 0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0) (= ~x$w_buff1_used~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0)), 14914#[L748](and (= (select |#valid| |~#x~0.base|) 1) (= ~y~0 0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0) (= ~x$w_buff1_used~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0)), 14916#[L749](and (= (select |#valid| |~#x~0.base|) 1) (= ~y~0 0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0) (= ~x$w_buff1_used~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0)), 14918#[L-1-2](and (= (select |#valid| |~#x~0.base|) 1) (= ~y~0 0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0) (= ~x$w_buff1_used~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0)), 14920#[L-1-3](and (= (select |#valid| |~#x~0.base|) 1) (= ~y~0 0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0) (= ~x$w_buff1_used~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0)), 14922#[L825](and (= (select |#valid| |~#x~0.base|) 1) (= ~y~0 0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0) (= ~x$w_buff1_used~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0)), 14924#[L825-1](and (not (= |~#x~0.base| |ULTIMATE.start_main_~#t1923~0.base|)) (= (select |#valid| |~#x~0.base|) 1) (= ~y~0 0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0) (= ~x$w_buff1_used~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0)), 14926#[L826](and (not (= |~#x~0.base| |ULTIMATE.start_main_~#t1923~0.base|)) (= (select |#valid| |~#x~0.base|) 1) (= ~y~0 0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0) (= ~x$w_buff1_used~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0)), 14928#[L826-1, P0ENTRY](and (not (= |~#x~0.base| |ULTIMATE.start_main_~#t1923~0.base|)) (= (select |#valid| |~#x~0.base|) 1) (= ~y~0 0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0) (= ~x$w_buff1_used~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0)), 14932#[L827, P0ENTRY](and (not (= |~#x~0.base| |ULTIMATE.start_main_~#t1923~0.base|)) (= (select |#valid| |~#x~0.base|) 1) (= ~y~0 0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0) (= ~x$w_buff1_used~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0)), 14938#[L827-1, P0ENTRY](and (not (= |~#x~0.base| |ULTIMATE.start_main_~#t1923~0.base|)) (= (select |#valid| |~#x~0.base|) 1) (not (= |~#x~0.base| |ULTIMATE.start_main_~#t1924~0.base|)) (= ~y~0 0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0) (= ~x$w_buff1_used~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0)), 14942#[L828, P0ENTRY](and (not (= |~#x~0.base| |ULTIMATE.start_main_~#t1923~0.base|)) (= (select |#valid| |~#x~0.base|) 1) (not (= |~#x~0.base| |ULTIMATE.start_main_~#t1924~0.base|)) (= ~y~0 0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0) (= ~x$w_buff1_used~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0)), 14946#[L828, L752](and (not (= |~#x~0.base| |ULTIMATE.start_main_~#t1923~0.base|)) (= (select |#valid| |~#x~0.base|) 1) (not (= |~#x~0.base| |ULTIMATE.start_main_~#t1924~0.base|)) (= ~y~0 0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0) (= ~x$w_buff1_used~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0)), 14948#[L828-1, P1ENTRY, L752](and (not (= |~#x~0.base| |ULTIMATE.start_main_~#t1923~0.base|)) (= (select |#valid| |~#x~0.base|) 1) (not (= |~#x~0.base| |ULTIMATE.start_main_~#t1924~0.base|)) (= ~y~0 0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0) (= ~x$w_buff1_used~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0)), 20314#[P1ENTRY, L752, L829](and (not (= |~#x~0.base| |ULTIMATE.start_main_~#t1923~0.base|)) (= (select |#valid| |~#x~0.base|) 1) (not (= |~#x~0.base| |ULTIMATE.start_main_~#t1924~0.base|)) (= ~y~0 0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0) (= ~x$w_buff1_used~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0)), 20318#[L831, P1ENTRY, L752](and (not (= |~#x~0.base| |ULTIMATE.start_main_~#t1923~0.base|)) (= (select |#valid| |~#x~0.base|) 1) (not (= |~#x~0.base| |ULTIMATE.start_main_~#t1924~0.base|)) (= ~y~0 0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0) (= ~x$w_buff1_used~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0)), 20322#[P1ENTRY, L832, L752](and (not (= |~#x~0.base| |ULTIMATE.start_main_~#t1923~0.base|)) (= (select |#valid| |~#x~0.base|) 1) (not (= |~#x~0.base| |ULTIMATE.start_main_~#t1924~0.base|)) (= ~y~0 0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0) (= ~x$w_buff1_used~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0)), 20326#[L2, P1ENTRY, L752](and (not (= |~#x~0.base| |ULTIMATE.start_main_~#t1923~0.base|)) (= (select |#valid| |~#x~0.base|) 1) (not (= |~#x~0.base| |ULTIMATE.start_main_~#t1924~0.base|)) (= ~y~0 0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0) (= ~x$w_buff1_used~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0)), 20330#[L3, P1ENTRY, L752](and (not (= |~#x~0.base| |ULTIMATE.start_main_~#t1923~0.base|)) (= (select |#valid| |~#x~0.base|) 1) (not (= |~#x~0.base| |ULTIMATE.start_main_~#t1924~0.base|)) (= ~y~0 0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0) (= ~x$w_buff1_used~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0)), 20334#[L2-1, P1ENTRY, L752](and (not (= |~#x~0.base| |ULTIMATE.start_main_~#t1923~0.base|)) (= (select |#valid| |~#x~0.base|) 1) (not (= |~#x~0.base| |ULTIMATE.start_main_~#t1924~0.base|)) (= ~y~0 0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0) (= ~x$w_buff1_used~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0)), 20448#[L839, P1ENTRY, L752](and (not (= |~#x~0.base| |ULTIMATE.start_main_~#t1923~0.base|)) (= (select |#valid| |~#x~0.base|) 1) (not (= |~#x~0.base| |ULTIMATE.start_main_~#t1924~0.base|)) (= ~y~0 0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0) (= ~x$w_buff1_used~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0)), 20450#[L839, L780, L752](and (not (= |~#x~0.base| |ULTIMATE.start_main_~#t1923~0.base|)) (= (select |#valid| |~#x~0.base|) 1) (not (= |~#x~0.base| |ULTIMATE.start_main_~#t1924~0.base|)) (= ~y~0 0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0) (= ~x$w_buff1_used~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0)), 21712#[L798, L839, L752](and (not (= |~#x~0.base| |ULTIMATE.start_main_~#t1923~0.base|)) (= (select |#valid| |~#x~0.base|) 1) (not (= (select (select |#memory_int| ~__unbuffered_p1_EAX$read_delayed_var~0.base) ~__unbuffered_p1_EAX$read_delayed_var~0.offset) 1)) (not (= |~#x~0.base| |ULTIMATE.start_main_~#t1924~0.base|)) (= ~y~0 0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 1) (not (= ~__unbuffered_p1_EAX~0 1)) (= ~__unbuffered_p0_EAX~0 0) (= ~x$w_buff1_used~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0)), 21714#[L839, L801, L752](and (not (= |~#x~0.base| |ULTIMATE.start_main_~#t1923~0.base|)) (= (select |#valid| |~#x~0.base|) 1) (not (= (select (select |#memory_int| ~__unbuffered_p1_EAX$read_delayed_var~0.base) ~__unbuffered_p1_EAX$read_delayed_var~0.offset) 1)) (not (= |~#x~0.base| |ULTIMATE.start_main_~#t1924~0.base|)) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 1) (not (= ~__unbuffered_p1_EAX~0 1)) (= ~__unbuffered_p0_EAX~0 0) (= ~x$w_buff1_used~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0)), 22924#[L839, L754, L801](and (not (= |~#x~0.base| |ULTIMATE.start_main_~#t1923~0.base|)) (= (select |#valid| |~#x~0.base|) 1) (not (= (select (select |#memory_int| ~__unbuffered_p1_EAX$read_delayed_var~0.base) ~__unbuffered_p1_EAX$read_delayed_var~0.offset) 1)) (not (= |~#x~0.base| |ULTIMATE.start_main_~#t1924~0.base|)) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 1) (not (= ~__unbuffered_p1_EAX~0 1)) (= ~x$w_buff1_used~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0)), 22928#[L839, L765, L801](and (= (select |#valid| |~#x~0.base|) 1) (not (= (select (select |#memory_int| ~__unbuffered_p1_EAX$read_delayed_var~0.base) ~__unbuffered_p1_EAX$read_delayed_var~0.offset) 1)) (= 0 ~x$r_buff0_thd0~0) (= ~__unbuffered_p1_EAX$read_delayed~0 1) (not (= ~__unbuffered_p1_EAX~0 1)) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0)), 22942#[L772, L839, L801](= (select |#valid| |~#x~0.base|) 1), 22954#[L772, L844, L801](= (select |#valid| |~#x~0.base|) 1), 22966#[L772, L845, L801](= (select |#valid| |~#x~0.base|) 1), 22978#[L772, L18, L801](= (select |#valid| |~#x~0.base|) 1), 22990#[L772, L18-1, L801](= (select |#valid| |~#x~0.base|) 1), 23004#[L772, L18-2, L801](= (select |#valid| |~#x~0.base|) 1), 23023#[L17-5, L772, L801](= (select |#valid| |~#x~0.base|) 1), 23055#[L772, L801, L17-7](= (select |#valid| |~#x~0.base|) 1), 23091#[L772, L801, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION](= (select |#valid| |~#x~0.base|) 1)] [2021-01-26 22:52:32,843 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3 [2021-01-26 22:52:32,844 INFO L429 AbstractCegarLoop]: === Iteration 5 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-26 22:52:32,844 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-26 22:52:32,844 INFO L82 PathProgramCache]: Analyzing trace with hash -578702570, now seen corresponding path program 1 times [2021-01-26 22:52:32,844 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-26 22:52:32,845 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [164613060] [2021-01-26 22:52:32,845 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-26 22:52:32,983 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-26 22:52:33,132 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-26 22:52:33,132 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [164613060] [2021-01-26 22:52:33,133 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-26 22:52:33,133 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2021-01-26 22:52:33,133 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1881829982] [2021-01-26 22:52:33,133 INFO L461 AbstractCegarLoop]: Interpolant automaton has 6 states [2021-01-26 22:52:33,134 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-26 22:52:33,134 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-01-26 22:52:33,134 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2021-01-26 22:52:33,134 INFO L481 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2021-01-26 22:52:33,135 INFO L482 AbstractCegarLoop]: Interpolant automaton has has 6 states, 6 states have (on average 12.833333333333334) internal successors, (77), 6 states have internal predecessors, (77), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-01-26 22:52:33,283 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-26 22:52:33,479 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check Size of Word is: 82 and size of Sequence is : 83[2021-01-26 22:52:33,558 INFO L164 SleepSetCegar]: Size of mCounterexample is: 83 [2021-01-26 22:52:33,560 INFO L165 SleepSetCegar]: [23105#[ULTIMATE.startENTRY]true, 23107#[L-1]true, 23109#[L-1-1]true, 23111#[L17]true, 23113#[L17-1]true, 23115#[L17-2]true, 23117#[L17-3]true, 23119#[L17-4]true, 23121#[L710](= ~__unbuffered_cnt~0 0), 23123#[L712](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_cnt~0 0)), 23125#[L713](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_cnt~0 0)), 23127#[L714](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_cnt~0 0)), 23129#[L715](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_cnt~0 0)), 23131#[L716](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_cnt~0 0)), 23133#[L717](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_cnt~0 0)), 23135#[L718](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_cnt~0 0)), 23137#[L719](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_cnt~0 0)), 23139#[L720](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_cnt~0 0)), 23141#[L721](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_cnt~0 0)), 23143#[L722](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0) (= ~__unbuffered_cnt~0 0)), 23145#[L723](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0) (= ~__unbuffered_cnt~0 0)), 23147#[L724](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0) (= ~__unbuffered_cnt~0 0)), 23149#[L725](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0) (= ~__unbuffered_cnt~0 0)), 23151#[L726](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0) (= ~__unbuffered_cnt~0 0)), 23153#[L727](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0) (= ~__unbuffered_cnt~0 0)), 23157#[L728](and (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 23159#[L730](and (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 23161#[L730-1](and (= (select |#valid| |~#x~0.base|) 1) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 23163#[L730-2](and (= (select |#valid| |~#x~0.base|) 1) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 23165#[L732](and (= (select |#valid| |~#x~0.base|) 1) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 23167#[L733](and (= (select |#valid| |~#x~0.base|) 1) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 23169#[L734](and (= (select |#valid| |~#x~0.base|) 1) (= 0 ~x$r_buff0_thd0~0) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 23171#[L735](and (= (select |#valid| |~#x~0.base|) 1) (= 0 ~x$r_buff0_thd0~0) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 23173#[L736](and (= (select |#valid| |~#x~0.base|) 1) (= 0 ~x$r_buff0_thd0~0) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 23175#[L737](and (= (select |#valid| |~#x~0.base|) 1) (= 0 ~x$r_buff0_thd0~0) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 23177#[L738](and (= (select |#valid| |~#x~0.base|) 1) (= 0 ~x$r_buff0_thd0~0) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 23179#[L739](and (= (select |#valid| |~#x~0.base|) 1) (= 0 ~x$r_buff0_thd0~0) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 23181#[L740](and (= (select |#valid| |~#x~0.base|) 1) (= 0 ~x$r_buff0_thd0~0) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 23183#[L741](and (= (select |#valid| |~#x~0.base|) 1) (= 0 ~x$r_buff0_thd0~0) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 23185#[L742](and (= (select |#valid| |~#x~0.base|) 1) (= 0 ~x$r_buff0_thd0~0) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 23187#[L743](and (= (select |#valid| |~#x~0.base|) 1) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 23189#[L744](and (= (select |#valid| |~#x~0.base|) 1) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 23191#[L746](and (= (select |#valid| |~#x~0.base|) 1) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= ~x$w_buff1_used~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 23193#[L747](and (= (select |#valid| |~#x~0.base|) 1) (= ~y~0 0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= ~x$w_buff1_used~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 23195#[L748](and (= (select |#valid| |~#x~0.base|) 1) (= ~y~0 0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= ~x$w_buff1_used~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 23197#[L749](and (= (select |#valid| |~#x~0.base|) 1) (= ~y~0 0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= ~x$w_buff1_used~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 23199#[L-1-2](and (= (select |#valid| |~#x~0.base|) 1) (= ~y~0 0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= ~x$w_buff1_used~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 23201#[L-1-3](and (= (select |#valid| |~#x~0.base|) 1) (= ~y~0 0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= ~x$w_buff1_used~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 23203#[L825](and (= (select |#valid| |~#x~0.base|) 1) (= ~y~0 0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= ~x$w_buff1_used~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 23205#[L825-1](and (not (= |~#x~0.base| |ULTIMATE.start_main_~#t1923~0.base|)) (= (select |#valid| |~#x~0.base|) 1) (= ~y~0 0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= ~x$w_buff1_used~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 23207#[L826](and (not (= |~#x~0.base| |ULTIMATE.start_main_~#t1923~0.base|)) (= (select |#valid| |~#x~0.base|) 1) (= ~y~0 0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= ~x$w_buff1_used~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 23209#[L826-1, P0ENTRY](and (not (= |~#x~0.base| |ULTIMATE.start_main_~#t1923~0.base|)) (= (select |#valid| |~#x~0.base|) 1) (= ~y~0 0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= ~x$w_buff1_used~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 23213#[L827, P0ENTRY](and (not (= |~#x~0.base| |ULTIMATE.start_main_~#t1923~0.base|)) (= (select |#valid| |~#x~0.base|) 1) (= ~y~0 0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= ~x$w_buff1_used~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 23217#[L827-1, P0ENTRY](and (not (= |~#x~0.base| |ULTIMATE.start_main_~#t1923~0.base|)) (= (select |#valid| |~#x~0.base|) 1) (not (= |~#x~0.base| |ULTIMATE.start_main_~#t1924~0.base|)) (= ~y~0 0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= ~x$w_buff1_used~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 23221#[L828, P0ENTRY](and (not (= |~#x~0.base| |ULTIMATE.start_main_~#t1923~0.base|)) (= (select |#valid| |~#x~0.base|) 1) (not (= |~#x~0.base| |ULTIMATE.start_main_~#t1924~0.base|)) (= ~y~0 0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= ~x$w_buff1_used~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 23225#[L828, L752](and (not (= |~#x~0.base| |ULTIMATE.start_main_~#t1923~0.base|)) (= (select |#valid| |~#x~0.base|) 1) (not (= |~#x~0.base| |ULTIMATE.start_main_~#t1924~0.base|)) (= ~y~0 0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= ~x$w_buff1_used~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 23227#[L828-1, P1ENTRY, L752](and (not (= |~#x~0.base| |ULTIMATE.start_main_~#t1923~0.base|)) (= (select |#valid| |~#x~0.base|) 1) (not (= |~#x~0.base| |ULTIMATE.start_main_~#t1924~0.base|)) (= ~y~0 0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= ~x$w_buff1_used~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 25725#[P1ENTRY, L752, L829](and (not (= |~#x~0.base| |ULTIMATE.start_main_~#t1923~0.base|)) (= (select |#valid| |~#x~0.base|) 1) (not (= |~#x~0.base| |ULTIMATE.start_main_~#t1924~0.base|)) (= ~y~0 0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= ~x$w_buff1_used~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 25727#[L780, L752, L829](and (not (= |~#x~0.base| |ULTIMATE.start_main_~#t1923~0.base|)) (= (select |#valid| |~#x~0.base|) 1) (not (= |~#x~0.base| |ULTIMATE.start_main_~#t1924~0.base|)) (= ~y~0 0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= ~x$w_buff1_used~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 27286#[L798, L752, L829](and (not (= |~#x~0.base| |ULTIMATE.start_main_~#t1923~0.base|)) (= (select |#valid| |~#x~0.base|) 1) (= ~__unbuffered_p1_EAX$read_delayed~0 1) (not (= ~__unbuffered_p1_EAX~0 1)) (not (= (select (select |#memory_int| ~__unbuffered_p1_EAX$read_delayed_var~0.base) ~__unbuffered_p1_EAX$read_delayed_var~0.offset) 1)) (not (= |~#x~0.base| |ULTIMATE.start_main_~#t1924~0.base|)) (= ~y~0 0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= ~x$w_buff1_used~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 27297#[L801, L752, L829](and (not (= |~#x~0.base| |ULTIMATE.start_main_~#t1923~0.base|)) (= (select |#valid| |~#x~0.base|) 1) (= ~__unbuffered_p1_EAX$read_delayed~0 1) (not (= ~__unbuffered_p1_EAX~0 1)) (not (= (select (select |#memory_int| ~__unbuffered_p1_EAX$read_delayed_var~0.base) ~__unbuffered_p1_EAX$read_delayed_var~0.offset) 1)) (not (= |~#x~0.base| |ULTIMATE.start_main_~#t1924~0.base|)) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= ~x$w_buff1_used~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 27312#[L754, L801, L829](and (not (= |~#x~0.base| |ULTIMATE.start_main_~#t1923~0.base|)) (= (select |#valid| |~#x~0.base|) 1) (= ~__unbuffered_p1_EAX$read_delayed~0 1) (not (= ~__unbuffered_p1_EAX~0 1)) (not (= (select (select |#memory_int| ~__unbuffered_p1_EAX$read_delayed_var~0.base) ~__unbuffered_p1_EAX$read_delayed_var~0.offset) 1)) (not (= |~#x~0.base| |ULTIMATE.start_main_~#t1924~0.base|)) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= ~x$w_buff1_used~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 27328#[L765, L801, L829](and (= (select |#valid| |~#x~0.base|) 1) (not (= (select (select |#memory_int| ~__unbuffered_p1_EAX$read_delayed_var~0.base) ~__unbuffered_p1_EAX$read_delayed_var~0.offset) 1)) (= 0 ~x$r_buff0_thd0~0) (= ~__unbuffered_p1_EAX$read_delayed~0 1) (not (= ~__unbuffered_p1_EAX~0 1)) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 27342#[L772, L801, L829](and (= (select |#valid| |~#x~0.base|) 1) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 27354#[L775, L801, L829](and (= (select |#valid| |~#x~0.base|) 1) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (<= ~main$tmp_guard0~0 0)), 27366#[L801, P0FINAL, L829](and (= (select |#valid| |~#x~0.base|) 1) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (<= ~main$tmp_guard0~0 0)), 27380#[L801, P0EXIT, L829](and (= (select |#valid| |~#x~0.base|) 1) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (<= ~main$tmp_guard0~0 0)), 27392#[L808, P0EXIT, L829](and (= (select |#valid| |~#x~0.base|) 1) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (<= ~main$tmp_guard0~0 0)), 27400#[L811, P0EXIT, L829](and (= (select |#valid| |~#x~0.base|) 1) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (<= ~main$tmp_guard0~0 0)), 27406#[L831, L811, P0EXIT](= (select |#valid| |~#x~0.base|) 1), 27410#[L832, L811, P0EXIT](= (select |#valid| |~#x~0.base|) 1), 27414#[L2, L811, P0EXIT](= (select |#valid| |~#x~0.base|) 1), 27420#[L3, L811, P0EXIT](= (select |#valid| |~#x~0.base|) 1), 27422#[L2-1, L811, P0EXIT](= (select |#valid| |~#x~0.base|) 1), 27438#[L839, L811, P0EXIT](= (select |#valid| |~#x~0.base|) 1), 27450#[L844, L811, P0EXIT](= (select |#valid| |~#x~0.base|) 1), 27462#[L845, L811, P0EXIT](= (select |#valid| |~#x~0.base|) 1), 27474#[L18, L811, P0EXIT](= (select |#valid| |~#x~0.base|) 1), 27484#[L18-1, L811, P0EXIT](= (select |#valid| |~#x~0.base|) 1), 27502#[L18-2, L811, P0EXIT](= (select |#valid| |~#x~0.base|) 1), 27521#[L17-5, L811, P0EXIT](= (select |#valid| |~#x~0.base|) 1), 27550#[L811, L17-7, P0EXIT](= (select |#valid| |~#x~0.base|) 1), 27583#[L811, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0EXIT](= (select |#valid| |~#x~0.base|) 1)] [2021-01-26 22:52:33,560 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4 [2021-01-26 22:52:33,560 INFO L429 AbstractCegarLoop]: === Iteration 6 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-26 22:52:33,560 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-26 22:52:33,561 INFO L82 PathProgramCache]: Analyzing trace with hash -1468381451, now seen corresponding path program 1 times [2021-01-26 22:52:33,561 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-26 22:52:33,561 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1812766647] [2021-01-26 22:52:33,561 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-26 22:52:33,751 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-01-26 22:52:33,751 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-01-26 22:52:33,940 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-01-26 22:52:33,940 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-01-26 22:52:34,037 INFO L173 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-01-26 22:52:34,037 INFO L605 BasicCegarLoop]: Counterexample might be feasible [2021-01-26 22:52:34,037 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5 [2021-01-26 22:52:34,270 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 26.01 10:52:34 BasicIcfg [2021-01-26 22:52:34,270 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2021-01-26 22:52:34,272 INFO L168 Benchmark]: Toolchain (without parser) took 78210.93 ms. Allocated memory was 302.0 MB in the beginning and 585.1 MB in the end (delta: 283.1 MB). Free memory was 277.0 MB in the beginning and 454.6 MB in the end (delta: -177.6 MB). Peak memory consumption was 108.2 MB. Max. memory is 16.0 GB. [2021-01-26 22:52:34,273 INFO L168 Benchmark]: CDTParser took 0.27 ms. Allocated memory is still 302.0 MB. Free memory was 271.9 MB in the beginning and 271.7 MB in the end (delta: 153.9 kB). There was no memory consumed. Max. memory is 16.0 GB. [2021-01-26 22:52:34,274 INFO L168 Benchmark]: CACSL2BoogieTranslator took 816.79 ms. Allocated memory is still 302.0 MB. Free memory was 276.1 MB in the beginning and 282.6 MB in the end (delta: -6.5 MB). Peak memory consumption was 38.0 MB. Max. memory is 16.0 GB. [2021-01-26 22:52:34,275 INFO L168 Benchmark]: Boogie Procedure Inliner took 110.90 ms. Allocated memory is still 302.0 MB. Free memory was 281.6 MB in the beginning and 279.5 MB in the end (delta: 2.1 MB). Peak memory consumption was 2.1 MB. Max. memory is 16.0 GB. [2021-01-26 22:52:34,275 INFO L168 Benchmark]: Boogie Preprocessor took 93.28 ms. Allocated memory is still 302.0 MB. Free memory was 279.5 MB in the beginning and 277.4 MB in the end (delta: 2.1 MB). Peak memory consumption was 2.1 MB. Max. memory is 16.0 GB. [2021-01-26 22:52:34,276 INFO L168 Benchmark]: RCFGBuilder took 4689.66 ms. Allocated memory was 302.0 MB in the beginning and 362.8 MB in the end (delta: 60.8 MB). Free memory was 277.4 MB in the beginning and 334.5 MB in the end (delta: -57.1 MB). Peak memory consumption was 213.0 MB. Max. memory is 16.0 GB. [2021-01-26 22:52:34,277 INFO L168 Benchmark]: TraceAbstraction took 72484.28 ms. Allocated memory was 362.8 MB in the beginning and 585.1 MB in the end (delta: 222.3 MB). Free memory was 334.5 MB in the beginning and 454.6 MB in the end (delta: -120.1 MB). Peak memory consumption was 103.2 MB. Max. memory is 16.0 GB. [2021-01-26 22:52:34,282 INFO L339 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.27 ms. Allocated memory is still 302.0 MB. Free memory was 271.9 MB in the beginning and 271.7 MB in the end (delta: 153.9 kB). There was no memory consumed. Max. memory is 16.0 GB. * CACSL2BoogieTranslator took 816.79 ms. Allocated memory is still 302.0 MB. Free memory was 276.1 MB in the beginning and 282.6 MB in the end (delta: -6.5 MB). Peak memory consumption was 38.0 MB. Max. memory is 16.0 GB. * Boogie Procedure Inliner took 110.90 ms. Allocated memory is still 302.0 MB. Free memory was 281.6 MB in the beginning and 279.5 MB in the end (delta: 2.1 MB). Peak memory consumption was 2.1 MB. Max. memory is 16.0 GB. * Boogie Preprocessor took 93.28 ms. Allocated memory is still 302.0 MB. Free memory was 279.5 MB in the beginning and 277.4 MB in the end (delta: 2.1 MB). Peak memory consumption was 2.1 MB. Max. memory is 16.0 GB. * RCFGBuilder took 4689.66 ms. Allocated memory was 302.0 MB in the beginning and 362.8 MB in the end (delta: 60.8 MB). Free memory was 277.4 MB in the beginning and 334.5 MB in the end (delta: -57.1 MB). Peak memory consumption was 213.0 MB. Max. memory is 16.0 GB. * TraceAbstraction took 72484.28 ms. Allocated memory was 362.8 MB in the beginning and 585.1 MB in the end (delta: 222.3 MB). Free memory was 334.5 MB in the beginning and 454.6 MB in the end (delta: -120.1 MB). Peak memory consumption was 103.2 MB. Max. memory is 16.0 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 17]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L708] 0 int __unbuffered_cnt = 0; VAL [__unbuffered_cnt=0] [L710] 0 int __unbuffered_p0_EAX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0] [L712] 0 int __unbuffered_p1_EAX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0] [L713] 0 _Bool __unbuffered_p1_EAX$flush_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0] [L714] 0 int __unbuffered_p1_EAX$mem_tmp; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0] [L715] 0 _Bool __unbuffered_p1_EAX$r_buff0_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0] [L716] 0 _Bool __unbuffered_p1_EAX$r_buff0_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0] [L717] 0 _Bool __unbuffered_p1_EAX$r_buff0_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0] [L718] 0 _Bool __unbuffered_p1_EAX$r_buff1_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0] [L719] 0 _Bool __unbuffered_p1_EAX$r_buff1_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0] [L720] 0 _Bool __unbuffered_p1_EAX$r_buff1_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0] [L721] 0 _Bool __unbuffered_p1_EAX$read_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0] [L722] 0 int *__unbuffered_p1_EAX$read_delayed_var; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}] [L723] 0 int __unbuffered_p1_EAX$w_buff0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0] [L724] 0 _Bool __unbuffered_p1_EAX$w_buff0_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0] [L725] 0 int __unbuffered_p1_EAX$w_buff1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0] [L726] 0 _Bool __unbuffered_p1_EAX$w_buff1_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0] [L727] 0 _Bool main$tmp_guard0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0] [L728] 0 _Bool main$tmp_guard1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0] [L730] 0 int x = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={7:0}] [L731] 0 _Bool x$flush_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={7:0}, x$flush_delayed=0] [L732] 0 int x$mem_tmp; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={7:0}, x$flush_delayed=0, x$mem_tmp=0] [L733] 0 _Bool x$r_buff0_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={7:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0] [L734] 0 _Bool x$r_buff0_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={7:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0] [L735] 0 _Bool x$r_buff0_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={7:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0] [L736] 0 _Bool x$r_buff1_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={7:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0] [L737] 0 _Bool x$r_buff1_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={7:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0] [L738] 0 _Bool x$r_buff1_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={7:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0] [L739] 0 _Bool x$read_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={7:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0] [L740] 0 int *x$read_delayed_var; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={7:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}] [L741] 0 int x$w_buff0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={7:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0] [L742] 0 _Bool x$w_buff0_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={7:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0] [L743] 0 int x$w_buff1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={7:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0] [L744] 0 _Bool x$w_buff1_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={7:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0] [L746] 0 int y = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={7:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L747] 0 _Bool weak$$choice0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, x={7:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L748] 0 _Bool weak$$choice1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, x={7:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L749] 0 _Bool weak$$choice2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x={7:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L825] 0 pthread_t t1923; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x={7:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L826] FCALL, FORK 0 pthread_create(&t1923, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x={7:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L827] 0 pthread_t t1924; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x={7:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L828] FCALL, FORK 0 pthread_create(&t1924, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x={7:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L781] 2 weak$$choice0 = __VERIFIER_nondet_bool() [L782] 2 weak$$choice2 = __VERIFIER_nondet_bool() [L783] 2 x$flush_delayed = weak$$choice2 [L784] EXPR 2 \read(x) [L784] 2 x$mem_tmp = x [L785] 2 weak$$choice1 = __VERIFIER_nondet_bool() [L786] EXPR 2 !x$w_buff0_used ? x : (x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (weak$$choice0 ? x : (weak$$choice1 ? x$w_buff0 : x$w_buff1)) : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (weak$$choice0 ? x$w_buff1 : x$w_buff0) : (weak$$choice0 ? x$w_buff0 : x)))) [L786] EXPR 2 \read(x) [L786] EXPR 2 !x$w_buff0_used ? x : (x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (weak$$choice0 ? x : (weak$$choice1 ? x$w_buff0 : x$w_buff1)) : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (weak$$choice0 ? x$w_buff1 : x$w_buff0) : (weak$$choice0 ? x$w_buff0 : x)))) [L786] 2 x = !x$w_buff0_used ? x : (x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (weak$$choice0 ? x : (weak$$choice1 ? x$w_buff0 : x$w_buff1)) : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (weak$$choice0 ? x$w_buff1 : x$w_buff0) : (weak$$choice0 ? x$w_buff0 : x)))) [L787] EXPR 2 weak$$choice2 ? x$w_buff0 : (!x$w_buff0_used ? x$w_buff0 : (x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? x$w_buff0 : x$w_buff0)))) [L787] 2 x$w_buff0 = weak$$choice2 ? x$w_buff0 : (!x$w_buff0_used ? x$w_buff0 : (x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? x$w_buff0 : x$w_buff0)))) [L788] EXPR 2 weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff1 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? x$w_buff1 : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? x$w_buff1 : x$w_buff1)))) [L788] 2 x$w_buff1 = weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff1 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? x$w_buff1 : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? x$w_buff1 : x$w_buff1)))) [L789] EXPR 2 weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? weak$$choice0 || !weak$$choice1 : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? weak$$choice0 : weak$$choice0)))) [L789] 2 x$w_buff0_used = weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? weak$$choice0 || !weak$$choice1 : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? weak$$choice0 : weak$$choice0)))) [L790] EXPR 2 weak$$choice2 ? x$w_buff1_used : (!x$w_buff0_used ? x$w_buff1_used : (x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? weak$$choice0 : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)))) [L790] 2 x$w_buff1_used = weak$$choice2 ? x$w_buff1_used : (!x$w_buff0_used ? x$w_buff1_used : (x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? weak$$choice0 : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)))) [L791] EXPR 2 weak$$choice2 ? x$r_buff0_thd2 : (!x$w_buff0_used ? x$r_buff0_thd2 : (x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? x$r_buff0_thd2 : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)))) [L791] 2 x$r_buff0_thd2 = weak$$choice2 ? x$r_buff0_thd2 : (!x$w_buff0_used ? x$r_buff0_thd2 : (x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? x$r_buff0_thd2 : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)))) [L792] EXPR 2 weak$$choice2 ? x$r_buff1_thd2 : (!x$w_buff0_used ? x$r_buff1_thd2 : (x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (weak$$choice0 ? x$r_buff1_thd2 : (_Bool)0) : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)))) [L792] 2 x$r_buff1_thd2 = weak$$choice2 ? x$r_buff1_thd2 : (!x$w_buff0_used ? x$r_buff1_thd2 : (x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (weak$$choice0 ? x$r_buff1_thd2 : (_Bool)0) : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)))) [L793] 2 __unbuffered_p1_EAX$read_delayed = (_Bool)1 [L794] 2 __unbuffered_p1_EAX$read_delayed_var = &x [L795] EXPR 2 \read(x) [L795] 2 __unbuffered_p1_EAX = x [L796] EXPR 2 x$flush_delayed ? x$mem_tmp : x [L796] 2 x = x$flush_delayed ? x$mem_tmp : x [L797] 2 x$flush_delayed = (_Bool)0 VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={7:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=255, x={7:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L800] 2 y = 1 VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={7:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=255, x={7:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L753] 1 __unbuffered_p0_EAX = y VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={7:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=255, x={7:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L756] 1 x$w_buff1 = x$w_buff0 [L757] 1 x$w_buff0 = 1 [L758] 1 x$w_buff1_used = x$w_buff0_used [L759] 1 x$w_buff0_used = (_Bool)1 [L18] COND FALSE 1 !(!expression) [L761] 1 x$r_buff1_thd0 = x$r_buff0_thd0 [L762] 1 x$r_buff1_thd1 = x$r_buff0_thd1 [L763] 1 x$r_buff1_thd2 = x$r_buff0_thd2 [L764] 1 x$r_buff0_thd1 = (_Bool)1 VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={7:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=255, x={7:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1] [L767] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x) [L767] 1 x = x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x) [L768] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$w_buff0_used [L768] 1 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$w_buff0_used [L769] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$w_buff1_used [L769] 1 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$w_buff1_used [L770] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$r_buff0_thd1 [L770] 1 x$r_buff0_thd1 = x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$r_buff0_thd1 [L771] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$r_buff1_thd1 [L771] 1 x$r_buff1_thd1 = x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$r_buff1_thd1 [L774] 1 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={7:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=255, x={7:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L776] 1 return 0; VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={7:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=255, x={7:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L803] EXPR 2 x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x) [L803] EXPR 2 x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x [L803] EXPR 2 \read(x) [L803] EXPR 2 x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x [L803] EXPR 2 x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x) [L803] 2 x = x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x) [L804] EXPR 2 x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$w_buff0_used [L804] 2 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$w_buff0_used [L805] EXPR 2 x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$w_buff1_used [L805] 2 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$w_buff1_used [L806] EXPR 2 x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$r_buff0_thd2 [L806] 2 x$r_buff0_thd2 = x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$r_buff0_thd2 [L807] EXPR 2 x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$r_buff1_thd2 [L807] 2 x$r_buff1_thd2 = x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$r_buff1_thd2 [L810] 2 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={7:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=255, x={7:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L830] 0 main$tmp_guard0 = __unbuffered_cnt == 2 VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={7:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=255, x={7:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L3] COND FALSE 0 !(!cond) VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={7:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=255, x={7:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L834] EXPR 0 x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x) [L834] EXPR 0 x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x [L834] EXPR 0 \read(x) [L834] EXPR 0 x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x [L834] EXPR 0 x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x) [L834] 0 x = x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x) [L835] EXPR 0 x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used [L835] 0 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used [L836] EXPR 0 x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$w_buff1_used [L836] 0 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$w_buff1_used [L837] EXPR 0 x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$r_buff0_thd0 [L837] 0 x$r_buff0_thd0 = x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$r_buff0_thd0 [L838] EXPR 0 x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$r_buff1_thd0 [L838] 0 x$r_buff1_thd0 = x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$r_buff1_thd0 [L841] 0 weak$$choice1 = __VERIFIER_nondet_bool() [L842] EXPR 0 __unbuffered_p1_EAX$read_delayed ? (weak$$choice1 ? *__unbuffered_p1_EAX$read_delayed_var : __unbuffered_p1_EAX) : __unbuffered_p1_EAX [L842] EXPR 0 weak$$choice1 ? *__unbuffered_p1_EAX$read_delayed_var : __unbuffered_p1_EAX [L842] EXPR 0 \read(*__unbuffered_p1_EAX$read_delayed_var) [L842] EXPR 0 weak$$choice1 ? *__unbuffered_p1_EAX$read_delayed_var : __unbuffered_p1_EAX [L842] EXPR 0 __unbuffered_p1_EAX$read_delayed ? (weak$$choice1 ? *__unbuffered_p1_EAX$read_delayed_var : __unbuffered_p1_EAX) : __unbuffered_p1_EAX [L842] 0 __unbuffered_p1_EAX = __unbuffered_p1_EAX$read_delayed ? (weak$$choice1 ? *__unbuffered_p1_EAX$read_delayed_var : __unbuffered_p1_EAX) : __unbuffered_p1_EAX [L843] 0 main$tmp_guard1 = !(__unbuffered_p0_EAX == 1 && __unbuffered_p1_EAX == 1) VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={7:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=255, weak$$choice2=255, x={7:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L18] COND TRUE 0 !expression VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={7:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=255, weak$$choice2=255, x={7:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L17] COND FALSE 0 !(0) VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={7:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=255, weak$$choice2=255, x={7:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L17] 0 __assert_fail ("0", "safe006_power.opt.c", 8, __extension__ __PRETTY_FUNCTION__) VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={7:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=255, weak$$choice2=255, x={7:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] - StatisticsResult: Ultimate Automizer benchmark data CFG has 3 procedures, 99 locations, 2 error locations. Started 1 CEGAR loops. VerificationResult: UNSAFE, OverallTime: 72.0s, OverallIterations: 6, TraceHistogramMax: 0, AutomataDifference: 0.0s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, HoareTripleCheckerStatistics: No data available, PredicateUnifierStatistics: No data available, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=0occurred in iteration=0, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: No data available, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.1s SsaConstructionTime, 0.8s SatisfiabilityAnalysisTime, 1.4s InterpolantComputationTime, 447 NumberOfCodeBlocks, 447 NumberOfCodeBlocksAsserted, 6 NumberOfCheckSat, 360 ConstructedInterpolants, 0 QuantifiedInterpolants, 125162 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 5 InterpolantComputations, 5 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...