/usr/bin/java -Xmx16000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata ./data -tc ../../../trunk/examples/toolchains/AutomizerCInline.xml -s ../../../trunk/examples/settings/automizer/concurrent/svcomp-Reach-32bit-Automizer_Default-noMmResRef-Sleep-NoLbe-Delay.epf -i ../../../trunk/examples/svcomp/pthread-wmm/thin000_power.opt.i -------------------------------------------------------------------------------- This is Ultimate 0.2.0-6f57305 [2021-01-26 23:10:10,038 INFO L177 SettingsManager]: Resetting all preferences to default values... [2021-01-26 23:10:10,042 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2021-01-26 23:10:10,097 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2021-01-26 23:10:10,098 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2021-01-26 23:10:10,102 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2021-01-26 23:10:10,106 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2021-01-26 23:10:10,114 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2021-01-26 23:10:10,118 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2021-01-26 23:10:10,124 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2021-01-26 23:10:10,125 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2021-01-26 23:10:10,127 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2021-01-26 23:10:10,127 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2021-01-26 23:10:10,130 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2021-01-26 23:10:10,132 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2021-01-26 23:10:10,134 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2021-01-26 23:10:10,135 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2021-01-26 23:10:10,139 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2021-01-26 23:10:10,146 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2021-01-26 23:10:10,156 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2021-01-26 23:10:10,158 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2021-01-26 23:10:10,160 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2021-01-26 23:10:10,161 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2021-01-26 23:10:10,164 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2021-01-26 23:10:10,173 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... 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[2021-01-26 23:10:10,179 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2021-01-26 23:10:10,180 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2021-01-26 23:10:10,182 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2021-01-26 23:10:10,183 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2021-01-26 23:10:10,184 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2021-01-26 23:10:10,184 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2021-01-26 23:10:10,185 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2021-01-26 23:10:10,185 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2021-01-26 23:10:10,186 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2021-01-26 23:10:10,187 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2021-01-26 23:10:10,188 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2021-01-26 23:10:10,189 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/automizer/concurrent/svcomp-Reach-32bit-Automizer_Default-noMmResRef-Sleep-NoLbe-Delay.epf [2021-01-26 23:10:10,246 INFO L113 SettingsManager]: Loading preferences was successful [2021-01-26 23:10:10,246 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2021-01-26 23:10:10,251 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2021-01-26 23:10:10,251 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2021-01-26 23:10:10,252 INFO L138 SettingsManager]: * Use SBE=true [2021-01-26 23:10:10,252 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2021-01-26 23:10:10,252 INFO L138 SettingsManager]: * sizeof long=4 [2021-01-26 23:10:10,252 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2021-01-26 23:10:10,253 INFO L138 SettingsManager]: * sizeof POINTER=4 [2021-01-26 23:10:10,253 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2021-01-26 23:10:10,254 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2021-01-26 23:10:10,255 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2021-01-26 23:10:10,255 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2021-01-26 23:10:10,255 INFO L138 SettingsManager]: * sizeof long double=12 [2021-01-26 23:10:10,255 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2021-01-26 23:10:10,255 INFO L138 SettingsManager]: * Use constant arrays=true [2021-01-26 23:10:10,256 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2021-01-26 23:10:10,256 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2021-01-26 23:10:10,256 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2021-01-26 23:10:10,256 INFO L138 SettingsManager]: * To the following directory=./dump/ [2021-01-26 23:10:10,257 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2021-01-26 23:10:10,257 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2021-01-26 23:10:10,257 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2021-01-26 23:10:10,258 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2021-01-26 23:10:10,258 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2021-01-26 23:10:10,258 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2021-01-26 23:10:10,258 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2021-01-26 23:10:10,258 INFO L138 SettingsManager]: * Large block encoding in concurrent analysis=OFF [2021-01-26 23:10:10,259 INFO L138 SettingsManager]: * Lazy Petri-NFA conversion=true [2021-01-26 23:10:10,259 INFO L138 SettingsManager]: * Automaton type used in concurrency analysis=SLEEP_SET_FA [2021-01-26 23:10:10,259 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2021-01-26 23:10:10,259 INFO L138 SettingsManager]: * Minimization of abstraction=NONE [2021-01-26 23:10:10,259 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2021-01-26 23:10:10,260 INFO L138 SettingsManager]: * Sleep set reduction in concurrent analysis=DELAY_SET WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release [2021-01-26 23:10:10,676 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2021-01-26 23:10:10,707 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2021-01-26 23:10:10,710 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2021-01-26 23:10:10,712 INFO L271 PluginConnector]: Initializing CDTParser... [2021-01-26 23:10:10,713 INFO L275 PluginConnector]: CDTParser initialized [2021-01-26 23:10:10,714 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/pthread-wmm/thin000_power.opt.i [2021-01-26 23:10:10,802 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/1edcaa6e2/7705cc8c81ad4637b8db06047f58db9d/FLAG929a9c1ef [2021-01-26 23:10:11,539 INFO L306 CDTParser]: Found 1 translation units. [2021-01-26 23:10:11,540 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/pthread-wmm/thin000_power.opt.i [2021-01-26 23:10:11,563 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/1edcaa6e2/7705cc8c81ad4637b8db06047f58db9d/FLAG929a9c1ef [2021-01-26 23:10:11,758 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/1edcaa6e2/7705cc8c81ad4637b8db06047f58db9d [2021-01-26 23:10:11,761 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2021-01-26 23:10:11,773 INFO L131 ToolchainWalker]: Walking toolchain with 5 elements. [2021-01-26 23:10:11,775 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2021-01-26 23:10:11,775 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2021-01-26 23:10:11,779 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2021-01-26 23:10:11,780 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 26.01 11:10:11" (1/1) ... [2021-01-26 23:10:11,784 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@63f43eb and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.01 11:10:11, skipping insertion in model container [2021-01-26 23:10:11,784 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 26.01 11:10:11" (1/1) ... [2021-01-26 23:10:11,793 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2021-01-26 23:10:11,840 INFO L178 MainTranslator]: Built tables and reachable declarations [2021-01-26 23:10:12,315 INFO L206 PostProcessor]: Analyzing one entry point: main [2021-01-26 23:10:12,335 INFO L203 MainTranslator]: Completed pre-run [2021-01-26 23:10:12,413 INFO L206 PostProcessor]: Analyzing one entry point: main [2021-01-26 23:10:12,522 INFO L208 MainTranslator]: Completed translation [2021-01-26 23:10:12,523 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.01 11:10:12 WrapperNode [2021-01-26 23:10:12,525 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2021-01-26 23:10:12,527 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2021-01-26 23:10:12,527 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2021-01-26 23:10:12,528 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2021-01-26 23:10:12,537 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.01 11:10:12" (1/1) ... [2021-01-26 23:10:12,596 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.01 11:10:12" (1/1) ... [2021-01-26 23:10:12,635 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2021-01-26 23:10:12,636 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2021-01-26 23:10:12,636 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2021-01-26 23:10:12,636 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2021-01-26 23:10:12,647 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.01 11:10:12" (1/1) ... [2021-01-26 23:10:12,647 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.01 11:10:12" (1/1) ... [2021-01-26 23:10:12,652 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.01 11:10:12" (1/1) ... [2021-01-26 23:10:12,653 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.01 11:10:12" (1/1) ... [2021-01-26 23:10:12,666 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.01 11:10:12" (1/1) ... [2021-01-26 23:10:12,674 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.01 11:10:12" (1/1) ... [2021-01-26 23:10:12,679 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.01 11:10:12" (1/1) ... [2021-01-26 23:10:12,686 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2021-01-26 23:10:12,687 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2021-01-26 23:10:12,687 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2021-01-26 23:10:12,687 INFO L275 PluginConnector]: RCFGBuilder initialized [2021-01-26 23:10:12,688 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.01 11:10:12" (1/1) ... No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2021-01-26 23:10:12,809 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2021-01-26 23:10:12,809 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2021-01-26 23:10:12,810 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2021-01-26 23:10:12,810 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2021-01-26 23:10:12,811 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2021-01-26 23:10:12,811 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2021-01-26 23:10:12,812 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2021-01-26 23:10:12,812 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2021-01-26 23:10:12,812 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2021-01-26 23:10:12,812 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2021-01-26 23:10:12,812 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2021-01-26 23:10:12,812 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2021-01-26 23:10:12,812 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2021-01-26 23:10:12,815 WARN L208 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2021-01-26 23:10:16,488 INFO L293 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2021-01-26 23:10:16,488 INFO L298 CfgBuilder]: Removed 14 assume(true) statements. [2021-01-26 23:10:16,491 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 26.01 11:10:16 BoogieIcfgContainer [2021-01-26 23:10:16,491 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2021-01-26 23:10:16,493 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2021-01-26 23:10:16,493 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2021-01-26 23:10:16,497 INFO L275 PluginConnector]: TraceAbstraction initialized [2021-01-26 23:10:16,497 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 26.01 11:10:11" (1/3) ... [2021-01-26 23:10:16,498 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@29dc374a and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 26.01 11:10:16, skipping insertion in model container [2021-01-26 23:10:16,498 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.01 11:10:12" (2/3) ... [2021-01-26 23:10:16,499 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@29dc374a and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 26.01 11:10:16, skipping insertion in model container [2021-01-26 23:10:16,499 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 26.01 11:10:16" (3/3) ... [2021-01-26 23:10:16,500 INFO L111 eAbstractionObserver]: Analyzing ICFG thin000_power.opt.i [2021-01-26 23:10:16,518 WARN L168 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2021-01-26 23:10:16,518 INFO L179 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2021-01-26 23:10:16,522 INFO L191 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2021-01-26 23:10:16,523 INFO L351 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2021-01-26 23:10:16,628 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,629 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,629 WARN L313 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,629 WARN L313 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,629 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,629 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,630 WARN L313 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,630 WARN L313 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,630 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_reach_error_#t~nondet2.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,630 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_reach_error_#t~nondet2.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,630 WARN L313 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,631 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,631 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_reach_error_#t~nondet2.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,631 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_reach_error_#t~nondet2.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,631 WARN L313 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,631 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,632 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_reach_error_#t~nondet2.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,632 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_reach_error_#t~nondet2.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,632 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_reach_error_#t~nondet2.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,632 WARN L313 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,632 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_reach_error_#t~nondet2.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,632 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,633 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_reach_error_#t~nondet2.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,633 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_reach_error_#t~nondet2.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,633 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_reach_error_#t~nondet2.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,633 WARN L313 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,633 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_reach_error_#t~nondet2.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,633 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,634 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,634 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~mem5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,634 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,634 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~mem5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,634 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,635 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,635 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,635 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,635 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,636 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,636 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~mem5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,636 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,636 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~mem5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,636 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,636 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,637 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,637 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,637 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,638 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,638 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,638 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,638 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,638 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,639 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,639 WARN L313 ript$VariableManager]: TermVariabe P1Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,639 WARN L313 ript$VariableManager]: TermVariabe P1Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,639 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,639 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,639 WARN L313 ript$VariableManager]: TermVariabe P1Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,639 WARN L313 ript$VariableManager]: TermVariabe P1Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,640 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~nondet12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,640 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,640 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,640 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite56| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,640 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,640 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,641 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,641 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,641 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite50| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,641 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite54| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,641 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite52| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,641 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,641 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,642 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem59| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,642 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite47| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,642 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,642 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite45| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,642 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,642 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite49| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,642 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,643 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~nondet13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,643 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,643 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,643 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,643 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,643 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite55| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,644 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,644 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite53| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,644 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,644 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,644 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,644 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,644 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite44| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,645 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,645 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,645 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite48| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,645 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,645 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,645 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,645 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~nondet12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,646 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,646 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,646 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite56| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,646 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,646 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,646 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,647 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,647 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite50| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,647 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite54| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,647 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite52| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,647 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,648 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,648 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,648 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem59| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,648 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite47| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,649 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,649 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite45| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,649 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,649 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,649 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite49| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,649 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,649 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite60| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,649 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~nondet13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,650 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,650 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,650 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,650 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,650 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite57| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,650 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,650 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite55| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,651 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,651 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,651 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite53| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,651 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,651 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite51| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,651 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,651 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,651 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem58| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,652 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,652 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite46| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,652 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,652 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite44| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,652 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,652 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,652 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite48| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,652 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,653 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,653 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,657 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~nondet12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,657 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,657 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,658 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite56| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,658 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,658 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,658 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,658 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,658 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite50| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,658 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite54| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,658 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite52| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,659 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,659 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,659 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem59| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,659 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite47| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,659 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,659 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite45| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,659 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,660 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite49| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,660 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,660 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~nondet13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,660 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,660 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,660 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,660 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,660 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite55| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,661 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,661 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite53| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,661 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,661 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,661 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,661 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,661 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite44| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,661 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,662 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,662 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite48| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,662 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,662 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,662 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,662 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~nondet12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,662 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,663 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,663 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite56| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,663 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,663 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,663 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,663 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,663 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite50| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,663 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite54| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,664 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite52| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,664 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,664 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,664 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,664 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem59| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,664 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite47| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,664 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,664 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite45| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,665 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,665 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,665 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite49| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,665 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,665 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite60| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,665 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~nondet13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,665 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,666 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,666 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,666 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,666 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite57| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,666 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,666 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite55| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,666 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,666 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,667 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite53| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,667 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,667 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite51| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,667 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,667 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,667 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem58| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,667 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,668 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite46| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,668 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,668 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite44| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,668 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,668 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,668 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite48| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,668 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,669 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,669 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,674 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem61| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,674 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite62| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,674 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite67| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,674 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite66| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,675 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem61| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,675 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite64| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,675 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite65| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,675 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite62| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,675 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite63| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,676 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem61| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,676 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite62| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,676 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite67| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,676 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite66| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,676 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem61| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,677 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite64| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,677 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite65| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,677 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite62| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,677 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite63| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,678 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,678 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,678 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,678 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,680 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,681 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite47| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,681 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,681 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,681 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite45| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,681 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem61| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,681 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite66| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,682 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,682 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,682 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite49| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,682 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite62| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,682 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite64| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,683 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,683 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,683 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite60| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,683 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,683 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~nondet12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,683 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,684 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem58| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,684 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,684 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite57| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,684 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,684 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,684 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,684 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite55| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,685 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,685 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite53| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,685 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,685 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,685 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite51| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,685 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,686 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite46| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,686 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,686 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,686 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite44| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,686 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite67| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,686 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,686 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,687 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite48| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,687 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~nondet13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,687 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite63| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,687 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,687 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite65| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,687 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,688 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,688 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem59| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,688 WARN L313 ript$VariableManager]: TermVariabe P1Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,688 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,688 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,688 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite56| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,688 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,689 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,689 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,689 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite50| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,689 WARN L313 ript$VariableManager]: TermVariabe P1Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,689 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite54| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,689 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,690 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite52| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,690 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,690 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,692 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,692 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,692 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,693 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_reach_error_#t~nondet2.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,693 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~mem5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,693 WARN L313 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,693 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,693 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,693 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_reach_error_#t~nondet2.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,694 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,694 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,694 WARN L313 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,694 WARN L313 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,694 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,694 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-26 23:10:16,697 INFO L149 ThreadInstanceAdder]: Constructed 0 joinOtherThreadTransitions. [2021-01-26 23:10:16,710 INFO L253 AbstractCegarLoop]: Starting to check reachability of 5 error locations. [2021-01-26 23:10:16,735 INFO L377 AbstractCegarLoop]: Interprodecural is true [2021-01-26 23:10:16,735 INFO L378 AbstractCegarLoop]: Hoare is true [2021-01-26 23:10:16,735 INFO L379 AbstractCegarLoop]: Compute interpolants for FPandBP [2021-01-26 23:10:16,735 INFO L380 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2021-01-26 23:10:16,735 INFO L381 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2021-01-26 23:10:16,736 INFO L382 AbstractCegarLoop]: Difference is false [2021-01-26 23:10:16,736 INFO L383 AbstractCegarLoop]: Minimize is NONE [2021-01-26 23:10:16,736 INFO L387 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== Size of Word is: 57 and size of Sequence is : 58[2021-01-26 23:10:16,764 INFO L164 SleepSetCegar]: Size of mCounterexample is: 58 [2021-01-26 23:10:16,765 INFO L165 SleepSetCegar]: [110#[ULTIMATE.startENTRY]don't care, 112#[L-1]don't care, 114#[L-1-1]don't care, 116#[L17]don't care, 118#[L17-1]don't care, 120#[L17-2]don't care, 122#[L17-3]don't care, 124#[L17-4]don't care, 126#[L710]don't care, 128#[L712]don't care, 130#[L713]don't care, 132#[L714]don't care, 134#[L715]don't care, 136#[L716]don't care, 138#[L717]don't care, 140#[L718]don't care, 142#[L719]don't care, 144#[L720]don't care, 146#[L721]don't care, 148#[L722]don't care, 150#[L723]don't care, 152#[L724]don't care, 154#[L725]don't care, 156#[L726]don't care, 158#[L727]don't care, 160#[L728]don't care, 162#[L730]don't care, 164#[L730-1]don't care, 166#[L730-2]don't care, 168#[L732]don't care, 170#[L733]don't care, 172#[L734]don't care, 174#[L735]don't care, 176#[L736]don't care, 178#[L737]don't care, 180#[L738]don't care, 182#[L739]don't care, 184#[L740]don't care, 186#[L741]don't care, 188#[L742]don't care, 190#[L743]don't care, 192#[L744]don't care, 194#[L746]don't care, 196#[L747]don't care, 198#[L748]don't care, 200#[L749]don't care, 202#[L-1-2]don't care, 204#[L-1-3]don't care, 206#[L825]don't care, 208#[L825-1]don't care, 210#[L826]don't care, 212#[L826-1, P0ENTRY]don't care, 216#[L827, P0ENTRY]don't care, 220#[L827-1, P0ENTRY]don't care, 224#[L828, P0ENTRY]don't care, 228#[L828, L752]don't care, 232#[L828, L754]don't care, 238#[L828, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]don't care] [2021-01-26 23:10:16,765 INFO L429 AbstractCegarLoop]: === Iteration 1 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-26 23:10:16,771 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-26 23:10:16,771 INFO L82 PathProgramCache]: Analyzing trace with hash -144078324, now seen corresponding path program 1 times [2021-01-26 23:10:16,782 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-26 23:10:16,783 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [54496116] [2021-01-26 23:10:16,783 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-26 23:10:16,957 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-26 23:10:17,189 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-26 23:10:17,189 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [54496116] [2021-01-26 23:10:17,190 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-26 23:10:17,190 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2021-01-26 23:10:17,193 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2130070071] [2021-01-26 23:10:17,213 INFO L461 AbstractCegarLoop]: Interpolant automaton has 3 states [2021-01-26 23:10:17,214 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-26 23:10:17,232 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-01-26 23:10:17,241 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-26 23:10:17,243 INFO L481 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2021-01-26 23:10:17,245 INFO L482 AbstractCegarLoop]: Interpolant automaton has has 3 states, 2 states have (on average 28.5) internal successors, (57), 3 states have internal predecessors, (57), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-01-26 23:10:17,278 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check Size of Word is: 77 and size of Sequence is : 78[2021-01-26 23:10:17,392 INFO L164 SleepSetCegar]: Size of mCounterexample is: 78 [2021-01-26 23:10:17,392 INFO L165 SleepSetCegar]: [242#[ULTIMATE.startENTRY]true, 243#[L-1]true, 244#[L-1-1]true, 245#[L17]true, 246#[L17-1]true, 247#[L17-2]true, 248#[L17-3]true, 249#[L17-4]true, 250#[L710]true, 251#[L712]true, 252#[L713]true, 253#[L714]true, 254#[L715]true, 255#[L716]true, 256#[L717]true, 257#[L718]true, 258#[L719]true, 259#[L720]true, 260#[L721]true, 261#[L722]true, 262#[L723]true, 263#[L724]true, 264#[L725]true, 265#[L726]true, 266#[L727]true, 267#[L728]true, 268#[L730]true, 269#[L730-1]true, 270#[L730-2]true, 271#[L732]true, 272#[L733]true, 273#[L734]true, 274#[L735]true, 275#[L736]true, 276#[L737]true, 277#[L738]true, 278#[L739]true, 279#[L740]true, 280#[L741]true, 281#[L742]true, 282#[L743](= ~x$w_buff0_used~0 0), 283#[L744](= ~x$w_buff0_used~0 0), 284#[L746](= ~x$w_buff0_used~0 0), 285#[L747](= ~x$w_buff0_used~0 0), 286#[L748](= ~x$w_buff0_used~0 0), 287#[L749](= ~x$w_buff0_used~0 0), 288#[L-1-2](= ~x$w_buff0_used~0 0), 289#[L-1-3](= ~x$w_buff0_used~0 0), 290#[L825](= ~x$w_buff0_used~0 0), 291#[L825-1](= ~x$w_buff0_used~0 0), 292#[L826](= ~x$w_buff0_used~0 0), 293#[L826-1, P0ENTRY](= ~x$w_buff0_used~0 0), 295#[L827, P0ENTRY](= ~x$w_buff0_used~0 0), 297#[L827-1, P0ENTRY](= ~x$w_buff0_used~0 0), 299#[L828, P0ENTRY](= ~x$w_buff0_used~0 0), 301#[L828, L752](= ~x$w_buff0_used~0 0), 303#[L828, L754](= ~x$w_buff0_used~0 0), 305#[L828, L765]true, 312#[L772, L828]true, 318#[L828, L775]true, 324#[L828, P0FINAL]true, 330#[L828, P0EXIT]true, 333#[L828-1, P1ENTRY, P0EXIT]true, 339#[P1ENTRY, P0EXIT, L829]true, 345#[L831, P1ENTRY, P0EXIT]true, 351#[P1ENTRY, L832, P0EXIT]true, 357#[L2, P1ENTRY, P0EXIT]true, 363#[L3, P1ENTRY, P0EXIT]true, 371#[L2-1, P1ENTRY, P0EXIT]true, 419#[L839, P1ENTRY, P0EXIT]true, 425#[L844, P1ENTRY, P0EXIT]true, 431#[L845, P1ENTRY, P0EXIT]true, 437#[P1ENTRY, L18, P0EXIT]true, 443#[L18-1, P1ENTRY, P0EXIT]true, 451#[L18-2, P1ENTRY, P0EXIT]true, 458#[L17-5, P1ENTRY, P0EXIT]true, 466#[P1ENTRY, L17-7, P0EXIT]true, 475#[P1ENTRY, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0EXIT]true] [2021-01-26 23:10:17,393 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2021-01-26 23:10:17,394 INFO L429 AbstractCegarLoop]: === Iteration 2 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-26 23:10:17,396 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-26 23:10:17,396 INFO L82 PathProgramCache]: Analyzing trace with hash 288205985, now seen corresponding path program 1 times [2021-01-26 23:10:17,396 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-26 23:10:17,398 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1676615101] [2021-01-26 23:10:17,398 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-26 23:10:17,561 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-26 23:10:17,830 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-26 23:10:17,830 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1676615101] [2021-01-26 23:10:17,830 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-26 23:10:17,831 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2021-01-26 23:10:17,831 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1889765435] [2021-01-26 23:10:17,834 INFO L461 AbstractCegarLoop]: Interpolant automaton has 9 states [2021-01-26 23:10:17,834 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-26 23:10:17,835 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2021-01-26 23:10:17,836 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=54, Unknown=0, NotChecked=0, Total=72 [2021-01-26 23:10:17,836 INFO L481 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2021-01-26 23:10:17,836 INFO L482 AbstractCegarLoop]: Interpolant automaton has has 9 states, 9 states have (on average 8.555555555555555) internal successors, (77), 9 states have internal predecessors, (77), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-01-26 23:10:18,315 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-26 23:10:18,808 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-26 23:10:23,330 WARN L146 IndependenceRelation]: Expensive independence query (4164 ms) for statements [1223] L801-->L808: Formula: (let ((.cse6 (= (mod v_~x$w_buff0_used~0_450 256) 0)) (.cse7 (= (mod v_~x$r_buff1_thd2~0_258 256) 0)) (.cse14 (= (mod v_~x$w_buff1_used~0_362 256) 0)) (.cse15 (= (mod v_~x$r_buff0_thd2~0_286 256) 0)) (.cse16 (= (mod v_~x$w_buff0_used~0_451 256) 0))) (let ((.cse9 (not .cse16)) (.cse10 (select |v_#memory_int_271| |v_~#x~0.base_174|)) (.cse8 (or .cse16 .cse15)) (.cse13 (or .cse7 .cse14)) (.cse0 (or .cse6 .cse15)) (.cse1 (not .cse6)) (.cse2 (not .cse15)) (.cse12 (not .cse14)) (.cse5 (not .cse7))) (and (or (and (= v_~x$r_buff0_thd2~0_286 v_~x$r_buff0_thd2~0_285) .cse0) (and (= v_~x$r_buff0_thd2~0_285 0) .cse1 .cse2)) (let ((.cse3 (= (mod v_~x$r_buff0_thd2~0_285 256) 0)) (.cse4 (= (mod v_~x$w_buff1_used~0_361 256) 0))) (or (and (= v_~x$r_buff1_thd2~0_257 0) (or (and .cse1 (not .cse3)) (and (not .cse4) .cse5))) (and (= v_~x$r_buff1_thd2~0_258 v_~x$r_buff1_thd2~0_257) (or .cse6 .cse3) (or .cse7 .cse4)))) (or (and (= v_~x$w_buff0_used~0_451 v_~x$w_buff0_used~0_450) .cse8) (and .cse9 (= v_~x$w_buff0_used~0_450 0) .cse2)) (= |v_#memory_int_270| (store |v_#memory_int_271| |v_~#x~0.base_174| (store .cse10 |v_~#x~0.offset_174| |v_P1_#t~ite63_31|))) (let ((.cse11 (= |v_P1_#t~mem61_42| |v_P1Thread1of1ForFork0_#t~mem61_1|))) (or (and .cse11 (= |v_P1_#t~ite62_37| |v_P1Thread1of1ForFork0_#t~ite62_1|) (= |v_P1_#t~ite63_31| v_~x$w_buff0~0_134) .cse9 .cse2) (and (= |v_P1_#t~ite62_37| |v_P1_#t~ite63_31|) (or (and .cse11 (= |v_P1_#t~ite62_37| v_~x$w_buff1~0_119) .cse12 .cse5) (and (= |v_P1_#t~ite62_37| |v_P1_#t~mem61_42|) .cse13 (= (select .cse10 |v_~#x~0.offset_174|) |v_P1_#t~mem61_42|))) .cse8))) (or (and (= v_~x$w_buff1_used~0_362 v_~x$w_buff1_used~0_361) .cse13 .cse0) (and (= v_~x$w_buff1_used~0_361 0) (or (and .cse1 .cse2) (and .cse12 .cse5))))))) InVars {~x$w_buff0~0=v_~x$w_buff0~0_134, P1Thread1of1ForFork0_#t~ite62=|v_P1Thread1of1ForFork0_#t~ite62_1|, ~#x~0.offset=|v_~#x~0.offset_174|, ~x$w_buff1~0=v_~x$w_buff1~0_119, #memory_int=|v_#memory_int_271|, ~#x~0.base=|v_~#x~0.base_174|, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_258, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_362, P1Thread1of1ForFork0_#t~mem61=|v_P1Thread1of1ForFork0_#t~mem61_1|, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_286, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_451} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_134, ~#x~0.offset=|v_~#x~0.offset_174|, ~x$w_buff1~0=v_~x$w_buff1~0_119, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_257, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_361, P1Thread1of1ForFork0_#t~mem61=|v_P1Thread1of1ForFork0_#t~mem61_2|, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_285, P1Thread1of1ForFork0_#t~ite66=|v_P1Thread1of1ForFork0_#t~ite66_1|, P1Thread1of1ForFork0_#t~ite67=|v_P1Thread1of1ForFork0_#t~ite67_1|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_450, P1Thread1of1ForFork0_#t~ite62=|v_P1Thread1of1ForFork0_#t~ite62_2|, P1Thread1of1ForFork0_#t~ite63=|v_P1Thread1of1ForFork0_#t~ite63_1|, P1Thread1of1ForFork0_#t~ite64=|v_P1Thread1of1ForFork0_#t~ite64_1|, P1Thread1of1ForFork0_#t~ite65=|v_P1Thread1of1ForFork0_#t~ite65_1|, #memory_int=|v_#memory_int_270|, ~#x~0.base=|v_~#x~0.base_174|} AuxVars[|v_P1_#t~ite62_37|, |v_P1_#t~mem61_42|, |v_P1_#t~ite63_31|] AssignedVars[P1Thread1of1ForFork0_#t~ite62, P1Thread1of1ForFork0_#t~ite63, P1Thread1of1ForFork0_#t~ite64, P1Thread1of1ForFork0_#t~ite65, #memory_int, ~x$r_buff1_thd2~0, ~x$w_buff1_used~0, P1Thread1of1ForFork0_#t~mem61, ~x$r_buff0_thd2~0, P1Thread1of1ForFork0_#t~ite66, P1Thread1of1ForFork0_#t~ite67, ~x$w_buff0_used~0] and [1209] L2-1-->L839: Formula: (let ((.cse15 (= (mod v_~x$w_buff0_used~0_437 256) 0)) (.cse14 (= (mod v_~x$r_buff0_thd0~0_66 256) 0)) (.cse13 (= (mod v_~x$w_buff0_used~0_436 256) 0)) (.cse12 (= (mod v_~x$r_buff1_thd0~0_46 256) 0)) (.cse16 (= (mod v_~x$w_buff1_used~0_348 256) 0))) (let ((.cse0 (select |v_#memory_int_255| |v_~#x~0.base_166|)) (.cse4 (or .cse12 .cse16)) (.cse6 (not .cse16)) (.cse5 (not .cse12)) (.cse8 (or .cse14 .cse13)) (.cse9 (not .cse13)) (.cse7 (or .cse14 .cse15)) (.cse1 (not .cse15)) (.cse3 (not .cse14))) (and (= (store |v_#memory_int_255| |v_~#x~0.base_166| (store .cse0 |v_~#x~0.offset_166| |v_ULTIMATE.start_main_#t~ite72_46|)) |v_#memory_int_254|) (let ((.cse2 (= |v_ULTIMATE.start_main_#t~mem70_43| |v_ULTIMATE.start_main_#t~mem70_38|))) (or (and .cse1 .cse2 (= |v_ULTIMATE.start_main_#t~ite71_36| |v_ULTIMATE.start_main_#t~ite71_31|) (= v_~x$w_buff0~0_126 |v_ULTIMATE.start_main_#t~ite72_46|) .cse3) (and (or (and (= |v_ULTIMATE.start_main_#t~mem70_43| |v_ULTIMATE.start_main_#t~ite71_36|) (= |v_ULTIMATE.start_main_#t~mem70_43| (select .cse0 |v_~#x~0.offset_166|)) .cse4) (and (= |v_ULTIMATE.start_main_#t~ite71_36| v_~x$w_buff1~0_111) .cse2 .cse5 .cse6)) .cse7 (= |v_ULTIMATE.start_main_#t~ite71_36| |v_ULTIMATE.start_main_#t~ite72_46|)))) (or (and (= v_~x$w_buff1_used~0_348 v_~x$w_buff1_used~0_347) .cse4 .cse8) (and (or (and .cse5 .cse6) (and .cse9 .cse3)) (= v_~x$w_buff1_used~0_347 0))) (let ((.cse10 (= (mod v_~x$w_buff1_used~0_347 256) 0)) (.cse11 (= (mod v_~x$r_buff0_thd0~0_65 256) 0))) (or (and (= v_~x$r_buff1_thd0~0_45 0) (or (and (not .cse10) .cse5) (and (not .cse11) .cse9))) (and (or .cse10 .cse12) (= v_~x$r_buff1_thd0~0_45 v_~x$r_buff1_thd0~0_46) (or .cse13 .cse11)))) (or (and (= v_~x$r_buff0_thd0~0_66 v_~x$r_buff0_thd0~0_65) .cse8) (and (= v_~x$r_buff0_thd0~0_65 0) .cse9 .cse3)) (or (and (= v_~x$w_buff0_used~0_437 v_~x$w_buff0_used~0_436) .cse7) (and .cse1 (= v_~x$w_buff0_used~0_436 0) .cse3))))) InVars {~x$w_buff0~0=v_~x$w_buff0~0_126, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_66, ULTIMATE.start_main_#t~ite71=|v_ULTIMATE.start_main_#t~ite71_31|, ~#x~0.offset=|v_~#x~0.offset_166|, ~x$w_buff1~0=v_~x$w_buff1~0_111, #memory_int=|v_#memory_int_255|, ~#x~0.base=|v_~#x~0.base_166|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_348, ULTIMATE.start_main_#t~mem70=|v_ULTIMATE.start_main_#t~mem70_38|, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_46, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_437} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_126, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_65, ~#x~0.offset=|v_~#x~0.offset_166|, ~x$w_buff1~0=v_~x$w_buff1~0_111, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_347, ULTIMATE.start_main_#t~mem70=|v_ULTIMATE.start_main_#t~mem70_37|, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_45, ULTIMATE.start_main_#t~ite75=|v_ULTIMATE.start_main_#t~ite75_24|, ULTIMATE.start_main_#t~ite76=|v_ULTIMATE.start_main_#t~ite76_18|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_436, ULTIMATE.start_main_#t~ite73=|v_ULTIMATE.start_main_#t~ite73_26|, ULTIMATE.start_main_#t~ite74=|v_ULTIMATE.start_main_#t~ite74_26|, ULTIMATE.start_main_#t~ite71=|v_ULTIMATE.start_main_#t~ite71_30|, ULTIMATE.start_main_#t~ite72=|v_ULTIMATE.start_main_#t~ite72_42|, #memory_int=|v_#memory_int_254|, ~#x~0.base=|v_~#x~0.base_166|} AuxVars[|v_ULTIMATE.start_main_#t~ite72_46|, |v_ULTIMATE.start_main_#t~ite71_36|, |v_ULTIMATE.start_main_#t~mem70_43|] AssignedVars[ULTIMATE.start_main_#t~ite73, ~x$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite74, ULTIMATE.start_main_#t~ite71, ULTIMATE.start_main_#t~ite72, #memory_int, ~x$w_buff1_used~0, ULTIMATE.start_main_#t~mem70, ~x$r_buff1_thd0~0, ULTIMATE.start_main_#t~ite75, ULTIMATE.start_main_#t~ite76, ~x$w_buff0_used~0] under condition null [2021-01-26 23:10:23,498 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-26 23:10:28,083 WARN L146 IndependenceRelation]: Expensive independence query (4121 ms) for statements [1223] L801-->L808: Formula: (let ((.cse6 (= (mod v_~x$w_buff0_used~0_450 256) 0)) (.cse7 (= (mod v_~x$r_buff1_thd2~0_258 256) 0)) (.cse14 (= (mod v_~x$w_buff1_used~0_362 256) 0)) (.cse15 (= (mod v_~x$r_buff0_thd2~0_286 256) 0)) (.cse16 (= (mod v_~x$w_buff0_used~0_451 256) 0))) (let ((.cse9 (not .cse16)) (.cse10 (select |v_#memory_int_271| |v_~#x~0.base_174|)) (.cse8 (or .cse16 .cse15)) (.cse13 (or .cse7 .cse14)) (.cse0 (or .cse6 .cse15)) (.cse1 (not .cse6)) (.cse2 (not .cse15)) (.cse12 (not .cse14)) (.cse5 (not .cse7))) (and (or (and (= v_~x$r_buff0_thd2~0_286 v_~x$r_buff0_thd2~0_285) .cse0) (and (= v_~x$r_buff0_thd2~0_285 0) .cse1 .cse2)) (let ((.cse3 (= (mod v_~x$r_buff0_thd2~0_285 256) 0)) (.cse4 (= (mod v_~x$w_buff1_used~0_361 256) 0))) (or (and (= v_~x$r_buff1_thd2~0_257 0) (or (and .cse1 (not .cse3)) (and (not .cse4) .cse5))) (and (= v_~x$r_buff1_thd2~0_258 v_~x$r_buff1_thd2~0_257) (or .cse6 .cse3) (or .cse7 .cse4)))) (or (and (= v_~x$w_buff0_used~0_451 v_~x$w_buff0_used~0_450) .cse8) (and .cse9 (= v_~x$w_buff0_used~0_450 0) .cse2)) (= |v_#memory_int_270| (store |v_#memory_int_271| |v_~#x~0.base_174| (store .cse10 |v_~#x~0.offset_174| |v_P1_#t~ite63_31|))) (let ((.cse11 (= |v_P1_#t~mem61_42| |v_P1Thread1of1ForFork0_#t~mem61_1|))) (or (and .cse11 (= |v_P1_#t~ite62_37| |v_P1Thread1of1ForFork0_#t~ite62_1|) (= |v_P1_#t~ite63_31| v_~x$w_buff0~0_134) .cse9 .cse2) (and (= |v_P1_#t~ite62_37| |v_P1_#t~ite63_31|) (or (and .cse11 (= |v_P1_#t~ite62_37| v_~x$w_buff1~0_119) .cse12 .cse5) (and (= |v_P1_#t~ite62_37| |v_P1_#t~mem61_42|) .cse13 (= (select .cse10 |v_~#x~0.offset_174|) |v_P1_#t~mem61_42|))) .cse8))) (or (and (= v_~x$w_buff1_used~0_362 v_~x$w_buff1_used~0_361) .cse13 .cse0) (and (= v_~x$w_buff1_used~0_361 0) (or (and .cse1 .cse2) (and .cse12 .cse5))))))) InVars {~x$w_buff0~0=v_~x$w_buff0~0_134, P1Thread1of1ForFork0_#t~ite62=|v_P1Thread1of1ForFork0_#t~ite62_1|, ~#x~0.offset=|v_~#x~0.offset_174|, ~x$w_buff1~0=v_~x$w_buff1~0_119, #memory_int=|v_#memory_int_271|, ~#x~0.base=|v_~#x~0.base_174|, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_258, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_362, P1Thread1of1ForFork0_#t~mem61=|v_P1Thread1of1ForFork0_#t~mem61_1|, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_286, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_451} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_134, ~#x~0.offset=|v_~#x~0.offset_174|, ~x$w_buff1~0=v_~x$w_buff1~0_119, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_257, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_361, P1Thread1of1ForFork0_#t~mem61=|v_P1Thread1of1ForFork0_#t~mem61_2|, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_285, P1Thread1of1ForFork0_#t~ite66=|v_P1Thread1of1ForFork0_#t~ite66_1|, P1Thread1of1ForFork0_#t~ite67=|v_P1Thread1of1ForFork0_#t~ite67_1|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_450, P1Thread1of1ForFork0_#t~ite62=|v_P1Thread1of1ForFork0_#t~ite62_2|, P1Thread1of1ForFork0_#t~ite63=|v_P1Thread1of1ForFork0_#t~ite63_1|, P1Thread1of1ForFork0_#t~ite64=|v_P1Thread1of1ForFork0_#t~ite64_1|, P1Thread1of1ForFork0_#t~ite65=|v_P1Thread1of1ForFork0_#t~ite65_1|, #memory_int=|v_#memory_int_270|, ~#x~0.base=|v_~#x~0.base_174|} AuxVars[|v_P1_#t~ite62_37|, |v_P1_#t~mem61_42|, |v_P1_#t~ite63_31|] AssignedVars[P1Thread1of1ForFork0_#t~ite62, P1Thread1of1ForFork0_#t~ite63, P1Thread1of1ForFork0_#t~ite64, P1Thread1of1ForFork0_#t~ite65, #memory_int, ~x$r_buff1_thd2~0, ~x$w_buff1_used~0, P1Thread1of1ForFork0_#t~mem61, ~x$r_buff0_thd2~0, P1Thread1of1ForFork0_#t~ite66, P1Thread1of1ForFork0_#t~ite67, ~x$w_buff0_used~0] and [1216] L765-->L772: Formula: (let ((.cse10 (= (mod v_~x$w_buff0_used~0_444 256) 0)) (.cse14 (= 0 (mod v_~x$r_buff0_thd1~0_71 256))) (.cse15 (= (mod v_~x$w_buff0_used~0_445 256) 0)) (.cse16 (= (mod v_~x$w_buff1_used~0_356 256) 0)) (.cse13 (= (mod v_~x$r_buff1_thd1~0_52 256) 0))) (let ((.cse1 (or .cse16 .cse13)) (.cse4 (not .cse16)) (.cse8 (select |v_#memory_int_263| |v_~#x~0.base_170|)) (.cse9 (or .cse14 .cse15)) (.cse6 (not .cse15)) (.cse5 (not .cse13)) (.cse2 (not .cse14)) (.cse3 (not .cse10)) (.cse0 (or .cse14 .cse10))) (and (or (and .cse0 .cse1 (= v_~x$w_buff1_used~0_356 v_~x$w_buff1_used~0_355)) (and (= v_~x$w_buff1_used~0_355 0) (or (and .cse2 .cse3) (and .cse4 .cse5)))) (let ((.cse7 (= |v_P0_#t~mem5_54| |v_P0Thread1of1ForFork1_#t~mem5_1|))) (or (and .cse6 .cse2 (= |v_P0_#t~ite6_49| |v_P0Thread1of1ForFork1_#t~ite6_1|) .cse7 (= |v_P0_#t~ite7_39| v_~x$w_buff0~0_130)) (and (or (and .cse1 (= |v_P0_#t~ite6_49| |v_P0_#t~mem5_54|) (= (select .cse8 |v_~#x~0.offset_170|) |v_P0_#t~mem5_54|)) (and .cse4 (= |v_P0_#t~ite6_49| v_~x$w_buff1~0_115) .cse7 .cse5)) (= |v_P0_#t~ite7_39| |v_P0_#t~ite6_49|) .cse9))) (= (store |v_#memory_int_263| |v_~#x~0.base_170| (store .cse8 |v_~#x~0.offset_170| |v_P0_#t~ite7_39|)) |v_#memory_int_262|) (or (and (= v_~x$w_buff0_used~0_444 v_~x$w_buff0_used~0_445) .cse9) (and (= v_~x$w_buff0_used~0_444 0) .cse6 .cse2)) (let ((.cse11 (= (mod v_~x$r_buff0_thd1~0_70 256) 0)) (.cse12 (= (mod v_~x$w_buff1_used~0_355 256) 0))) (or (and (or .cse10 .cse11) (or .cse12 .cse13) (= v_~x$r_buff1_thd1~0_52 v_~x$r_buff1_thd1~0_51)) (and (or (and (not .cse11) .cse3) (and .cse5 (not .cse12))) (= v_~x$r_buff1_thd1~0_51 0)))) (or (and (= v_~x$r_buff0_thd1~0_70 0) .cse2 .cse3) (and .cse0 (= v_~x$r_buff0_thd1~0_71 v_~x$r_buff0_thd1~0_70)))))) InVars {~x$w_buff0~0=v_~x$w_buff0~0_130, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_71, ~#x~0.offset=|v_~#x~0.offset_170|, P0Thread1of1ForFork1_#t~ite6=|v_P0Thread1of1ForFork1_#t~ite6_1|, ~x$w_buff1~0=v_~x$w_buff1~0_115, #memory_int=|v_#memory_int_263|, ~#x~0.base=|v_~#x~0.base_170|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_356, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_52, P0Thread1of1ForFork1_#t~mem5=|v_P0Thread1of1ForFork1_#t~mem5_1|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_445} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_130, P0Thread1of1ForFork1_#t~ite10=|v_P0Thread1of1ForFork1_#t~ite10_1|, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_70, ~#x~0.offset=|v_~#x~0.offset_170|, ~x$w_buff1~0=v_~x$w_buff1~0_115, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_355, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_51, P0Thread1of1ForFork1_#t~mem5=|v_P0Thread1of1ForFork1_#t~mem5_2|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_444, P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_1|, P0Thread1of1ForFork1_#t~ite9=|v_P0Thread1of1ForFork1_#t~ite9_1|, P0Thread1of1ForFork1_#t~ite6=|v_P0Thread1of1ForFork1_#t~ite6_2|, P0Thread1of1ForFork1_#t~ite7=|v_P0Thread1of1ForFork1_#t~ite7_1|, #memory_int=|v_#memory_int_262|, ~#x~0.base=|v_~#x~0.base_170|, P0Thread1of1ForFork1_#t~ite11=|v_P0Thread1of1ForFork1_#t~ite11_1|} AuxVars[|v_P0_#t~mem5_54|, |v_P0_#t~ite7_39|, |v_P0_#t~ite6_49|] AssignedVars[P0Thread1of1ForFork1_#t~ite10, ~x$r_buff0_thd1~0, P0Thread1of1ForFork1_#t~ite8, P0Thread1of1ForFork1_#t~ite9, P0Thread1of1ForFork1_#t~ite6, P0Thread1of1ForFork1_#t~ite7, #memory_int, ~x$w_buff1_used~0, ~x$r_buff1_thd1~0, P0Thread1of1ForFork1_#t~mem5, ~x$w_buff0_used~0, P0Thread1of1ForFork1_#t~ite11] under condition null [2021-01-26 23:10:28,103 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-26 23:10:32,266 WARN L146 IndependenceRelation]: Expensive independence query (4162 ms) for statements [1209] L2-1-->L839: Formula: (let ((.cse15 (= (mod v_~x$w_buff0_used~0_437 256) 0)) (.cse14 (= (mod v_~x$r_buff0_thd0~0_66 256) 0)) (.cse13 (= (mod v_~x$w_buff0_used~0_436 256) 0)) (.cse12 (= (mod v_~x$r_buff1_thd0~0_46 256) 0)) (.cse16 (= (mod v_~x$w_buff1_used~0_348 256) 0))) (let ((.cse0 (select |v_#memory_int_255| |v_~#x~0.base_166|)) (.cse4 (or .cse12 .cse16)) (.cse6 (not .cse16)) (.cse5 (not .cse12)) (.cse8 (or .cse14 .cse13)) (.cse9 (not .cse13)) (.cse7 (or .cse14 .cse15)) (.cse1 (not .cse15)) (.cse3 (not .cse14))) (and (= (store |v_#memory_int_255| |v_~#x~0.base_166| (store .cse0 |v_~#x~0.offset_166| |v_ULTIMATE.start_main_#t~ite72_46|)) |v_#memory_int_254|) (let ((.cse2 (= |v_ULTIMATE.start_main_#t~mem70_43| |v_ULTIMATE.start_main_#t~mem70_38|))) (or (and .cse1 .cse2 (= |v_ULTIMATE.start_main_#t~ite71_36| |v_ULTIMATE.start_main_#t~ite71_31|) (= v_~x$w_buff0~0_126 |v_ULTIMATE.start_main_#t~ite72_46|) .cse3) (and (or (and (= |v_ULTIMATE.start_main_#t~mem70_43| |v_ULTIMATE.start_main_#t~ite71_36|) (= |v_ULTIMATE.start_main_#t~mem70_43| (select .cse0 |v_~#x~0.offset_166|)) .cse4) (and (= |v_ULTIMATE.start_main_#t~ite71_36| v_~x$w_buff1~0_111) .cse2 .cse5 .cse6)) .cse7 (= |v_ULTIMATE.start_main_#t~ite71_36| |v_ULTIMATE.start_main_#t~ite72_46|)))) (or (and (= v_~x$w_buff1_used~0_348 v_~x$w_buff1_used~0_347) .cse4 .cse8) (and (or (and .cse5 .cse6) (and .cse9 .cse3)) (= v_~x$w_buff1_used~0_347 0))) (let ((.cse10 (= (mod v_~x$w_buff1_used~0_347 256) 0)) (.cse11 (= (mod v_~x$r_buff0_thd0~0_65 256) 0))) (or (and (= v_~x$r_buff1_thd0~0_45 0) (or (and (not .cse10) .cse5) (and (not .cse11) .cse9))) (and (or .cse10 .cse12) (= v_~x$r_buff1_thd0~0_45 v_~x$r_buff1_thd0~0_46) (or .cse13 .cse11)))) (or (and (= v_~x$r_buff0_thd0~0_66 v_~x$r_buff0_thd0~0_65) .cse8) (and (= v_~x$r_buff0_thd0~0_65 0) .cse9 .cse3)) (or (and (= v_~x$w_buff0_used~0_437 v_~x$w_buff0_used~0_436) .cse7) (and .cse1 (= v_~x$w_buff0_used~0_436 0) .cse3))))) InVars {~x$w_buff0~0=v_~x$w_buff0~0_126, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_66, ULTIMATE.start_main_#t~ite71=|v_ULTIMATE.start_main_#t~ite71_31|, ~#x~0.offset=|v_~#x~0.offset_166|, ~x$w_buff1~0=v_~x$w_buff1~0_111, #memory_int=|v_#memory_int_255|, ~#x~0.base=|v_~#x~0.base_166|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_348, ULTIMATE.start_main_#t~mem70=|v_ULTIMATE.start_main_#t~mem70_38|, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_46, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_437} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_126, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_65, ~#x~0.offset=|v_~#x~0.offset_166|, ~x$w_buff1~0=v_~x$w_buff1~0_111, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_347, ULTIMATE.start_main_#t~mem70=|v_ULTIMATE.start_main_#t~mem70_37|, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_45, ULTIMATE.start_main_#t~ite75=|v_ULTIMATE.start_main_#t~ite75_24|, ULTIMATE.start_main_#t~ite76=|v_ULTIMATE.start_main_#t~ite76_18|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_436, ULTIMATE.start_main_#t~ite73=|v_ULTIMATE.start_main_#t~ite73_26|, ULTIMATE.start_main_#t~ite74=|v_ULTIMATE.start_main_#t~ite74_26|, ULTIMATE.start_main_#t~ite71=|v_ULTIMATE.start_main_#t~ite71_30|, ULTIMATE.start_main_#t~ite72=|v_ULTIMATE.start_main_#t~ite72_42|, #memory_int=|v_#memory_int_254|, ~#x~0.base=|v_~#x~0.base_166|} AuxVars[|v_ULTIMATE.start_main_#t~ite72_46|, |v_ULTIMATE.start_main_#t~ite71_36|, |v_ULTIMATE.start_main_#t~mem70_43|] AssignedVars[ULTIMATE.start_main_#t~ite73, ~x$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite74, ULTIMATE.start_main_#t~ite71, ULTIMATE.start_main_#t~ite72, #memory_int, ~x$w_buff1_used~0, ULTIMATE.start_main_#t~mem70, ~x$r_buff1_thd0~0, ULTIMATE.start_main_#t~ite75, ULTIMATE.start_main_#t~ite76, ~x$w_buff0_used~0] and [1216] L765-->L772: Formula: (let ((.cse10 (= (mod v_~x$w_buff0_used~0_444 256) 0)) (.cse14 (= 0 (mod v_~x$r_buff0_thd1~0_71 256))) (.cse15 (= (mod v_~x$w_buff0_used~0_445 256) 0)) (.cse16 (= (mod v_~x$w_buff1_used~0_356 256) 0)) (.cse13 (= (mod v_~x$r_buff1_thd1~0_52 256) 0))) (let ((.cse1 (or .cse16 .cse13)) (.cse4 (not .cse16)) (.cse8 (select |v_#memory_int_263| |v_~#x~0.base_170|)) (.cse9 (or .cse14 .cse15)) (.cse6 (not .cse15)) (.cse5 (not .cse13)) (.cse2 (not .cse14)) (.cse3 (not .cse10)) (.cse0 (or .cse14 .cse10))) (and (or (and .cse0 .cse1 (= v_~x$w_buff1_used~0_356 v_~x$w_buff1_used~0_355)) (and (= v_~x$w_buff1_used~0_355 0) (or (and .cse2 .cse3) (and .cse4 .cse5)))) (let ((.cse7 (= |v_P0_#t~mem5_54| |v_P0Thread1of1ForFork1_#t~mem5_1|))) (or (and .cse6 .cse2 (= |v_P0_#t~ite6_49| |v_P0Thread1of1ForFork1_#t~ite6_1|) .cse7 (= |v_P0_#t~ite7_39| v_~x$w_buff0~0_130)) (and (or (and .cse1 (= |v_P0_#t~ite6_49| |v_P0_#t~mem5_54|) (= (select .cse8 |v_~#x~0.offset_170|) |v_P0_#t~mem5_54|)) (and .cse4 (= |v_P0_#t~ite6_49| v_~x$w_buff1~0_115) .cse7 .cse5)) (= |v_P0_#t~ite7_39| |v_P0_#t~ite6_49|) .cse9))) (= (store |v_#memory_int_263| |v_~#x~0.base_170| (store .cse8 |v_~#x~0.offset_170| |v_P0_#t~ite7_39|)) |v_#memory_int_262|) (or (and (= v_~x$w_buff0_used~0_444 v_~x$w_buff0_used~0_445) .cse9) (and (= v_~x$w_buff0_used~0_444 0) .cse6 .cse2)) (let ((.cse11 (= (mod v_~x$r_buff0_thd1~0_70 256) 0)) (.cse12 (= (mod v_~x$w_buff1_used~0_355 256) 0))) (or (and (or .cse10 .cse11) (or .cse12 .cse13) (= v_~x$r_buff1_thd1~0_52 v_~x$r_buff1_thd1~0_51)) (and (or (and (not .cse11) .cse3) (and .cse5 (not .cse12))) (= v_~x$r_buff1_thd1~0_51 0)))) (or (and (= v_~x$r_buff0_thd1~0_70 0) .cse2 .cse3) (and .cse0 (= v_~x$r_buff0_thd1~0_71 v_~x$r_buff0_thd1~0_70)))))) InVars {~x$w_buff0~0=v_~x$w_buff0~0_130, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_71, ~#x~0.offset=|v_~#x~0.offset_170|, P0Thread1of1ForFork1_#t~ite6=|v_P0Thread1of1ForFork1_#t~ite6_1|, ~x$w_buff1~0=v_~x$w_buff1~0_115, #memory_int=|v_#memory_int_263|, ~#x~0.base=|v_~#x~0.base_170|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_356, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_52, P0Thread1of1ForFork1_#t~mem5=|v_P0Thread1of1ForFork1_#t~mem5_1|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_445} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_130, P0Thread1of1ForFork1_#t~ite10=|v_P0Thread1of1ForFork1_#t~ite10_1|, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_70, ~#x~0.offset=|v_~#x~0.offset_170|, ~x$w_buff1~0=v_~x$w_buff1~0_115, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_355, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_51, P0Thread1of1ForFork1_#t~mem5=|v_P0Thread1of1ForFork1_#t~mem5_2|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_444, P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_1|, P0Thread1of1ForFork1_#t~ite9=|v_P0Thread1of1ForFork1_#t~ite9_1|, P0Thread1of1ForFork1_#t~ite6=|v_P0Thread1of1ForFork1_#t~ite6_2|, P0Thread1of1ForFork1_#t~ite7=|v_P0Thread1of1ForFork1_#t~ite7_1|, #memory_int=|v_#memory_int_262|, ~#x~0.base=|v_~#x~0.base_170|, P0Thread1of1ForFork1_#t~ite11=|v_P0Thread1of1ForFork1_#t~ite11_1|} AuxVars[|v_P0_#t~mem5_54|, |v_P0_#t~ite7_39|, |v_P0_#t~ite6_49|] AssignedVars[P0Thread1of1ForFork1_#t~ite10, ~x$r_buff0_thd1~0, P0Thread1of1ForFork1_#t~ite8, P0Thread1of1ForFork1_#t~ite9, P0Thread1of1ForFork1_#t~ite6, P0Thread1of1ForFork1_#t~ite7, #memory_int, ~x$w_buff1_used~0, ~x$r_buff1_thd1~0, P0Thread1of1ForFork1_#t~mem5, ~x$w_buff0_used~0, P0Thread1of1ForFork1_#t~ite11] under condition null [2021-01-26 23:10:36,352 WARN L146 IndependenceRelation]: Expensive independence query (4084 ms) for statements [1209] L2-1-->L839: Formula: (let ((.cse15 (= (mod v_~x$w_buff0_used~0_437 256) 0)) (.cse14 (= (mod v_~x$r_buff0_thd0~0_66 256) 0)) (.cse13 (= (mod v_~x$w_buff0_used~0_436 256) 0)) (.cse12 (= (mod v_~x$r_buff1_thd0~0_46 256) 0)) (.cse16 (= (mod v_~x$w_buff1_used~0_348 256) 0))) (let ((.cse0 (select |v_#memory_int_255| |v_~#x~0.base_166|)) (.cse4 (or .cse12 .cse16)) (.cse6 (not .cse16)) (.cse5 (not .cse12)) (.cse8 (or .cse14 .cse13)) (.cse9 (not .cse13)) (.cse7 (or .cse14 .cse15)) (.cse1 (not .cse15)) (.cse3 (not .cse14))) (and (= (store |v_#memory_int_255| |v_~#x~0.base_166| (store .cse0 |v_~#x~0.offset_166| |v_ULTIMATE.start_main_#t~ite72_46|)) |v_#memory_int_254|) (let ((.cse2 (= |v_ULTIMATE.start_main_#t~mem70_43| |v_ULTIMATE.start_main_#t~mem70_38|))) (or (and .cse1 .cse2 (= |v_ULTIMATE.start_main_#t~ite71_36| |v_ULTIMATE.start_main_#t~ite71_31|) (= v_~x$w_buff0~0_126 |v_ULTIMATE.start_main_#t~ite72_46|) .cse3) (and (or (and (= |v_ULTIMATE.start_main_#t~mem70_43| |v_ULTIMATE.start_main_#t~ite71_36|) (= |v_ULTIMATE.start_main_#t~mem70_43| (select .cse0 |v_~#x~0.offset_166|)) .cse4) (and (= |v_ULTIMATE.start_main_#t~ite71_36| v_~x$w_buff1~0_111) .cse2 .cse5 .cse6)) .cse7 (= |v_ULTIMATE.start_main_#t~ite71_36| |v_ULTIMATE.start_main_#t~ite72_46|)))) (or (and (= v_~x$w_buff1_used~0_348 v_~x$w_buff1_used~0_347) .cse4 .cse8) (and (or (and .cse5 .cse6) (and .cse9 .cse3)) (= v_~x$w_buff1_used~0_347 0))) (let ((.cse10 (= (mod v_~x$w_buff1_used~0_347 256) 0)) (.cse11 (= (mod v_~x$r_buff0_thd0~0_65 256) 0))) (or (and (= v_~x$r_buff1_thd0~0_45 0) (or (and (not .cse10) .cse5) (and (not .cse11) .cse9))) (and (or .cse10 .cse12) (= v_~x$r_buff1_thd0~0_45 v_~x$r_buff1_thd0~0_46) (or .cse13 .cse11)))) (or (and (= v_~x$r_buff0_thd0~0_66 v_~x$r_buff0_thd0~0_65) .cse8) (and (= v_~x$r_buff0_thd0~0_65 0) .cse9 .cse3)) (or (and (= v_~x$w_buff0_used~0_437 v_~x$w_buff0_used~0_436) .cse7) (and .cse1 (= v_~x$w_buff0_used~0_436 0) .cse3))))) InVars {~x$w_buff0~0=v_~x$w_buff0~0_126, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_66, ULTIMATE.start_main_#t~ite71=|v_ULTIMATE.start_main_#t~ite71_31|, ~#x~0.offset=|v_~#x~0.offset_166|, ~x$w_buff1~0=v_~x$w_buff1~0_111, #memory_int=|v_#memory_int_255|, ~#x~0.base=|v_~#x~0.base_166|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_348, ULTIMATE.start_main_#t~mem70=|v_ULTIMATE.start_main_#t~mem70_38|, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_46, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_437} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_126, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_65, ~#x~0.offset=|v_~#x~0.offset_166|, ~x$w_buff1~0=v_~x$w_buff1~0_111, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_347, ULTIMATE.start_main_#t~mem70=|v_ULTIMATE.start_main_#t~mem70_37|, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_45, ULTIMATE.start_main_#t~ite75=|v_ULTIMATE.start_main_#t~ite75_24|, ULTIMATE.start_main_#t~ite76=|v_ULTIMATE.start_main_#t~ite76_18|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_436, ULTIMATE.start_main_#t~ite73=|v_ULTIMATE.start_main_#t~ite73_26|, ULTIMATE.start_main_#t~ite74=|v_ULTIMATE.start_main_#t~ite74_26|, ULTIMATE.start_main_#t~ite71=|v_ULTIMATE.start_main_#t~ite71_30|, ULTIMATE.start_main_#t~ite72=|v_ULTIMATE.start_main_#t~ite72_42|, #memory_int=|v_#memory_int_254|, ~#x~0.base=|v_~#x~0.base_166|} AuxVars[|v_ULTIMATE.start_main_#t~ite72_46|, |v_ULTIMATE.start_main_#t~ite71_36|, |v_ULTIMATE.start_main_#t~mem70_43|] AssignedVars[ULTIMATE.start_main_#t~ite73, ~x$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite74, ULTIMATE.start_main_#t~ite71, ULTIMATE.start_main_#t~ite72, #memory_int, ~x$w_buff1_used~0, ULTIMATE.start_main_#t~mem70, ~x$r_buff1_thd0~0, ULTIMATE.start_main_#t~ite75, ULTIMATE.start_main_#t~ite76, ~x$w_buff0_used~0] and [1216] L765-->L772: Formula: (let ((.cse10 (= (mod v_~x$w_buff0_used~0_444 256) 0)) (.cse14 (= 0 (mod v_~x$r_buff0_thd1~0_71 256))) (.cse15 (= (mod v_~x$w_buff0_used~0_445 256) 0)) (.cse16 (= (mod v_~x$w_buff1_used~0_356 256) 0)) (.cse13 (= (mod v_~x$r_buff1_thd1~0_52 256) 0))) (let ((.cse1 (or .cse16 .cse13)) (.cse4 (not .cse16)) (.cse8 (select |v_#memory_int_263| |v_~#x~0.base_170|)) (.cse9 (or .cse14 .cse15)) (.cse6 (not .cse15)) (.cse5 (not .cse13)) (.cse2 (not .cse14)) (.cse3 (not .cse10)) (.cse0 (or .cse14 .cse10))) (and (or (and .cse0 .cse1 (= v_~x$w_buff1_used~0_356 v_~x$w_buff1_used~0_355)) (and (= v_~x$w_buff1_used~0_355 0) (or (and .cse2 .cse3) (and .cse4 .cse5)))) (let ((.cse7 (= |v_P0_#t~mem5_54| |v_P0Thread1of1ForFork1_#t~mem5_1|))) (or (and .cse6 .cse2 (= |v_P0_#t~ite6_49| |v_P0Thread1of1ForFork1_#t~ite6_1|) .cse7 (= |v_P0_#t~ite7_39| v_~x$w_buff0~0_130)) (and (or (and .cse1 (= |v_P0_#t~ite6_49| |v_P0_#t~mem5_54|) (= (select .cse8 |v_~#x~0.offset_170|) |v_P0_#t~mem5_54|)) (and .cse4 (= |v_P0_#t~ite6_49| v_~x$w_buff1~0_115) .cse7 .cse5)) (= |v_P0_#t~ite7_39| |v_P0_#t~ite6_49|) .cse9))) (= (store |v_#memory_int_263| |v_~#x~0.base_170| (store .cse8 |v_~#x~0.offset_170| |v_P0_#t~ite7_39|)) |v_#memory_int_262|) (or (and (= v_~x$w_buff0_used~0_444 v_~x$w_buff0_used~0_445) .cse9) (and (= v_~x$w_buff0_used~0_444 0) .cse6 .cse2)) (let ((.cse11 (= (mod v_~x$r_buff0_thd1~0_70 256) 0)) (.cse12 (= (mod v_~x$w_buff1_used~0_355 256) 0))) (or (and (or .cse10 .cse11) (or .cse12 .cse13) (= v_~x$r_buff1_thd1~0_52 v_~x$r_buff1_thd1~0_51)) (and (or (and (not .cse11) .cse3) (and .cse5 (not .cse12))) (= v_~x$r_buff1_thd1~0_51 0)))) (or (and (= v_~x$r_buff0_thd1~0_70 0) .cse2 .cse3) (and .cse0 (= v_~x$r_buff0_thd1~0_71 v_~x$r_buff0_thd1~0_70)))))) InVars {~x$w_buff0~0=v_~x$w_buff0~0_130, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_71, ~#x~0.offset=|v_~#x~0.offset_170|, P0Thread1of1ForFork1_#t~ite6=|v_P0Thread1of1ForFork1_#t~ite6_1|, ~x$w_buff1~0=v_~x$w_buff1~0_115, #memory_int=|v_#memory_int_263|, ~#x~0.base=|v_~#x~0.base_170|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_356, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_52, P0Thread1of1ForFork1_#t~mem5=|v_P0Thread1of1ForFork1_#t~mem5_1|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_445} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_130, P0Thread1of1ForFork1_#t~ite10=|v_P0Thread1of1ForFork1_#t~ite10_1|, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_70, ~#x~0.offset=|v_~#x~0.offset_170|, ~x$w_buff1~0=v_~x$w_buff1~0_115, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_355, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_51, P0Thread1of1ForFork1_#t~mem5=|v_P0Thread1of1ForFork1_#t~mem5_2|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_444, P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_1|, P0Thread1of1ForFork1_#t~ite9=|v_P0Thread1of1ForFork1_#t~ite9_1|, P0Thread1of1ForFork1_#t~ite6=|v_P0Thread1of1ForFork1_#t~ite6_2|, P0Thread1of1ForFork1_#t~ite7=|v_P0Thread1of1ForFork1_#t~ite7_1|, #memory_int=|v_#memory_int_262|, ~#x~0.base=|v_~#x~0.base_170|, P0Thread1of1ForFork1_#t~ite11=|v_P0Thread1of1ForFork1_#t~ite11_1|} AuxVars[|v_P0_#t~mem5_54|, |v_P0_#t~ite7_39|, |v_P0_#t~ite6_49|] AssignedVars[P0Thread1of1ForFork1_#t~ite10, ~x$r_buff0_thd1~0, P0Thread1of1ForFork1_#t~ite8, P0Thread1of1ForFork1_#t~ite9, P0Thread1of1ForFork1_#t~ite6, P0Thread1of1ForFork1_#t~ite7, #memory_int, ~x$w_buff1_used~0, ~x$r_buff1_thd1~0, P0Thread1of1ForFork1_#t~mem5, ~x$w_buff0_used~0, P0Thread1of1ForFork1_#t~ite11] under condition 615#(and (<= 1 ~x$w_buff0_used~0) (<= (div ~x$w_buff0_used~0 256) 0) (= ~y~0 0) (= ~__unbuffered_p0_EAX~0 0) (= 1 ~x$r_buff0_thd1~0)) [2021-01-26 23:10:36,586 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-26 23:10:36,997 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-26 23:10:37,794 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-26 23:10:41,594 WARN L146 IndependenceRelation]: Expensive independence query (3799 ms) for statements [1223] L801-->L808: Formula: (let ((.cse6 (= (mod v_~x$w_buff0_used~0_450 256) 0)) (.cse7 (= (mod v_~x$r_buff1_thd2~0_258 256) 0)) (.cse14 (= (mod v_~x$w_buff1_used~0_362 256) 0)) (.cse15 (= (mod v_~x$r_buff0_thd2~0_286 256) 0)) (.cse16 (= (mod v_~x$w_buff0_used~0_451 256) 0))) (let ((.cse9 (not .cse16)) (.cse10 (select |v_#memory_int_271| |v_~#x~0.base_174|)) (.cse8 (or .cse16 .cse15)) (.cse13 (or .cse7 .cse14)) (.cse0 (or .cse6 .cse15)) (.cse1 (not .cse6)) (.cse2 (not .cse15)) (.cse12 (not .cse14)) (.cse5 (not .cse7))) (and (or (and (= v_~x$r_buff0_thd2~0_286 v_~x$r_buff0_thd2~0_285) .cse0) (and (= v_~x$r_buff0_thd2~0_285 0) .cse1 .cse2)) (let ((.cse3 (= (mod v_~x$r_buff0_thd2~0_285 256) 0)) (.cse4 (= (mod v_~x$w_buff1_used~0_361 256) 0))) (or (and (= v_~x$r_buff1_thd2~0_257 0) (or (and .cse1 (not .cse3)) (and (not .cse4) .cse5))) (and (= v_~x$r_buff1_thd2~0_258 v_~x$r_buff1_thd2~0_257) (or .cse6 .cse3) (or .cse7 .cse4)))) (or (and (= v_~x$w_buff0_used~0_451 v_~x$w_buff0_used~0_450) .cse8) (and .cse9 (= v_~x$w_buff0_used~0_450 0) .cse2)) (= |v_#memory_int_270| (store |v_#memory_int_271| |v_~#x~0.base_174| (store .cse10 |v_~#x~0.offset_174| |v_P1_#t~ite63_31|))) (let ((.cse11 (= |v_P1_#t~mem61_42| |v_P1Thread1of1ForFork0_#t~mem61_1|))) (or (and .cse11 (= |v_P1_#t~ite62_37| |v_P1Thread1of1ForFork0_#t~ite62_1|) (= |v_P1_#t~ite63_31| v_~x$w_buff0~0_134) .cse9 .cse2) (and (= |v_P1_#t~ite62_37| |v_P1_#t~ite63_31|) (or (and .cse11 (= |v_P1_#t~ite62_37| v_~x$w_buff1~0_119) .cse12 .cse5) (and (= |v_P1_#t~ite62_37| |v_P1_#t~mem61_42|) .cse13 (= (select .cse10 |v_~#x~0.offset_174|) |v_P1_#t~mem61_42|))) .cse8))) (or (and (= v_~x$w_buff1_used~0_362 v_~x$w_buff1_used~0_361) .cse13 .cse0) (and (= v_~x$w_buff1_used~0_361 0) (or (and .cse1 .cse2) (and .cse12 .cse5))))))) InVars {~x$w_buff0~0=v_~x$w_buff0~0_134, P1Thread1of1ForFork0_#t~ite62=|v_P1Thread1of1ForFork0_#t~ite62_1|, ~#x~0.offset=|v_~#x~0.offset_174|, ~x$w_buff1~0=v_~x$w_buff1~0_119, #memory_int=|v_#memory_int_271|, ~#x~0.base=|v_~#x~0.base_174|, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_258, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_362, P1Thread1of1ForFork0_#t~mem61=|v_P1Thread1of1ForFork0_#t~mem61_1|, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_286, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_451} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_134, ~#x~0.offset=|v_~#x~0.offset_174|, ~x$w_buff1~0=v_~x$w_buff1~0_119, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_257, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_361, P1Thread1of1ForFork0_#t~mem61=|v_P1Thread1of1ForFork0_#t~mem61_2|, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_285, P1Thread1of1ForFork0_#t~ite66=|v_P1Thread1of1ForFork0_#t~ite66_1|, P1Thread1of1ForFork0_#t~ite67=|v_P1Thread1of1ForFork0_#t~ite67_1|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_450, P1Thread1of1ForFork0_#t~ite62=|v_P1Thread1of1ForFork0_#t~ite62_2|, P1Thread1of1ForFork0_#t~ite63=|v_P1Thread1of1ForFork0_#t~ite63_1|, P1Thread1of1ForFork0_#t~ite64=|v_P1Thread1of1ForFork0_#t~ite64_1|, P1Thread1of1ForFork0_#t~ite65=|v_P1Thread1of1ForFork0_#t~ite65_1|, #memory_int=|v_#memory_int_270|, ~#x~0.base=|v_~#x~0.base_174|} AuxVars[|v_P1_#t~ite62_37|, |v_P1_#t~mem61_42|, |v_P1_#t~ite63_31|] AssignedVars[P1Thread1of1ForFork0_#t~ite62, P1Thread1of1ForFork0_#t~ite63, P1Thread1of1ForFork0_#t~ite64, P1Thread1of1ForFork0_#t~ite65, #memory_int, ~x$r_buff1_thd2~0, ~x$w_buff1_used~0, P1Thread1of1ForFork0_#t~mem61, ~x$r_buff0_thd2~0, P1Thread1of1ForFork0_#t~ite66, P1Thread1of1ForFork0_#t~ite67, ~x$w_buff0_used~0] and [1216] L765-->L772: Formula: (let ((.cse10 (= (mod v_~x$w_buff0_used~0_444 256) 0)) (.cse14 (= 0 (mod v_~x$r_buff0_thd1~0_71 256))) (.cse15 (= (mod v_~x$w_buff0_used~0_445 256) 0)) (.cse16 (= (mod v_~x$w_buff1_used~0_356 256) 0)) (.cse13 (= (mod v_~x$r_buff1_thd1~0_52 256) 0))) (let ((.cse1 (or .cse16 .cse13)) (.cse4 (not .cse16)) (.cse8 (select |v_#memory_int_263| |v_~#x~0.base_170|)) (.cse9 (or .cse14 .cse15)) (.cse6 (not .cse15)) (.cse5 (not .cse13)) (.cse2 (not .cse14)) (.cse3 (not .cse10)) (.cse0 (or .cse14 .cse10))) (and (or (and .cse0 .cse1 (= v_~x$w_buff1_used~0_356 v_~x$w_buff1_used~0_355)) (and (= v_~x$w_buff1_used~0_355 0) (or (and .cse2 .cse3) (and .cse4 .cse5)))) (let ((.cse7 (= |v_P0_#t~mem5_54| |v_P0Thread1of1ForFork1_#t~mem5_1|))) (or (and .cse6 .cse2 (= |v_P0_#t~ite6_49| |v_P0Thread1of1ForFork1_#t~ite6_1|) .cse7 (= |v_P0_#t~ite7_39| v_~x$w_buff0~0_130)) (and (or (and .cse1 (= |v_P0_#t~ite6_49| |v_P0_#t~mem5_54|) (= (select .cse8 |v_~#x~0.offset_170|) |v_P0_#t~mem5_54|)) (and .cse4 (= |v_P0_#t~ite6_49| v_~x$w_buff1~0_115) .cse7 .cse5)) (= |v_P0_#t~ite7_39| |v_P0_#t~ite6_49|) .cse9))) (= (store |v_#memory_int_263| |v_~#x~0.base_170| (store .cse8 |v_~#x~0.offset_170| |v_P0_#t~ite7_39|)) |v_#memory_int_262|) (or (and (= v_~x$w_buff0_used~0_444 v_~x$w_buff0_used~0_445) .cse9) (and (= v_~x$w_buff0_used~0_444 0) .cse6 .cse2)) (let ((.cse11 (= (mod v_~x$r_buff0_thd1~0_70 256) 0)) (.cse12 (= (mod v_~x$w_buff1_used~0_355 256) 0))) (or (and (or .cse10 .cse11) (or .cse12 .cse13) (= v_~x$r_buff1_thd1~0_52 v_~x$r_buff1_thd1~0_51)) (and (or (and (not .cse11) .cse3) (and .cse5 (not .cse12))) (= v_~x$r_buff1_thd1~0_51 0)))) (or (and (= v_~x$r_buff0_thd1~0_70 0) .cse2 .cse3) (and .cse0 (= v_~x$r_buff0_thd1~0_71 v_~x$r_buff0_thd1~0_70)))))) InVars {~x$w_buff0~0=v_~x$w_buff0~0_130, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_71, ~#x~0.offset=|v_~#x~0.offset_170|, P0Thread1of1ForFork1_#t~ite6=|v_P0Thread1of1ForFork1_#t~ite6_1|, ~x$w_buff1~0=v_~x$w_buff1~0_115, #memory_int=|v_#memory_int_263|, ~#x~0.base=|v_~#x~0.base_170|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_356, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_52, P0Thread1of1ForFork1_#t~mem5=|v_P0Thread1of1ForFork1_#t~mem5_1|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_445} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_130, P0Thread1of1ForFork1_#t~ite10=|v_P0Thread1of1ForFork1_#t~ite10_1|, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_70, ~#x~0.offset=|v_~#x~0.offset_170|, ~x$w_buff1~0=v_~x$w_buff1~0_115, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_355, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_51, P0Thread1of1ForFork1_#t~mem5=|v_P0Thread1of1ForFork1_#t~mem5_2|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_444, P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_1|, P0Thread1of1ForFork1_#t~ite9=|v_P0Thread1of1ForFork1_#t~ite9_1|, P0Thread1of1ForFork1_#t~ite6=|v_P0Thread1of1ForFork1_#t~ite6_2|, P0Thread1of1ForFork1_#t~ite7=|v_P0Thread1of1ForFork1_#t~ite7_1|, #memory_int=|v_#memory_int_262|, ~#x~0.base=|v_~#x~0.base_170|, P0Thread1of1ForFork1_#t~ite11=|v_P0Thread1of1ForFork1_#t~ite11_1|} AuxVars[|v_P0_#t~mem5_54|, |v_P0_#t~ite7_39|, |v_P0_#t~ite6_49|] AssignedVars[P0Thread1of1ForFork1_#t~ite10, ~x$r_buff0_thd1~0, P0Thread1of1ForFork1_#t~ite8, P0Thread1of1ForFork1_#t~ite9, P0Thread1of1ForFork1_#t~ite6, P0Thread1of1ForFork1_#t~ite7, #memory_int, ~x$w_buff1_used~0, ~x$r_buff1_thd1~0, P0Thread1of1ForFork1_#t~mem5, ~x$w_buff0_used~0, P0Thread1of1ForFork1_#t~ite11] under condition 481#(and (<= 1 ~x$w_buff0_used~0) (<= (div ~x$w_buff0_used~0 256) 0) (= ~__unbuffered_p0_EAX~0 0) (= 1 ~x$r_buff0_thd1~0)) [2021-01-26 23:10:41,600 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-26 23:10:43,380 WARN L146 IndependenceRelation]: Expensive independence query (1680 ms) for statements [1223] L801-->L808: Formula: (let ((.cse6 (= (mod v_~x$w_buff0_used~0_450 256) 0)) (.cse7 (= (mod v_~x$r_buff1_thd2~0_258 256) 0)) (.cse14 (= (mod v_~x$w_buff1_used~0_362 256) 0)) (.cse15 (= (mod v_~x$r_buff0_thd2~0_286 256) 0)) (.cse16 (= (mod v_~x$w_buff0_used~0_451 256) 0))) (let ((.cse9 (not .cse16)) (.cse10 (select |v_#memory_int_271| |v_~#x~0.base_174|)) (.cse8 (or .cse16 .cse15)) (.cse13 (or .cse7 .cse14)) (.cse0 (or .cse6 .cse15)) (.cse1 (not .cse6)) (.cse2 (not .cse15)) (.cse12 (not .cse14)) (.cse5 (not .cse7))) (and (or (and (= v_~x$r_buff0_thd2~0_286 v_~x$r_buff0_thd2~0_285) .cse0) (and (= v_~x$r_buff0_thd2~0_285 0) .cse1 .cse2)) (let ((.cse3 (= (mod v_~x$r_buff0_thd2~0_285 256) 0)) (.cse4 (= (mod v_~x$w_buff1_used~0_361 256) 0))) (or (and (= v_~x$r_buff1_thd2~0_257 0) (or (and .cse1 (not .cse3)) (and (not .cse4) .cse5))) (and (= v_~x$r_buff1_thd2~0_258 v_~x$r_buff1_thd2~0_257) (or .cse6 .cse3) (or .cse7 .cse4)))) (or (and (= v_~x$w_buff0_used~0_451 v_~x$w_buff0_used~0_450) .cse8) (and .cse9 (= v_~x$w_buff0_used~0_450 0) .cse2)) (= |v_#memory_int_270| (store |v_#memory_int_271| |v_~#x~0.base_174| (store .cse10 |v_~#x~0.offset_174| |v_P1_#t~ite63_31|))) (let ((.cse11 (= |v_P1_#t~mem61_42| |v_P1Thread1of1ForFork0_#t~mem61_1|))) (or (and .cse11 (= |v_P1_#t~ite62_37| |v_P1Thread1of1ForFork0_#t~ite62_1|) (= |v_P1_#t~ite63_31| v_~x$w_buff0~0_134) .cse9 .cse2) (and (= |v_P1_#t~ite62_37| |v_P1_#t~ite63_31|) (or (and .cse11 (= |v_P1_#t~ite62_37| v_~x$w_buff1~0_119) .cse12 .cse5) (and (= |v_P1_#t~ite62_37| |v_P1_#t~mem61_42|) .cse13 (= (select .cse10 |v_~#x~0.offset_174|) |v_P1_#t~mem61_42|))) .cse8))) (or (and (= v_~x$w_buff1_used~0_362 v_~x$w_buff1_used~0_361) .cse13 .cse0) (and (= v_~x$w_buff1_used~0_361 0) (or (and .cse1 .cse2) (and .cse12 .cse5))))))) InVars {~x$w_buff0~0=v_~x$w_buff0~0_134, P1Thread1of1ForFork0_#t~ite62=|v_P1Thread1of1ForFork0_#t~ite62_1|, ~#x~0.offset=|v_~#x~0.offset_174|, ~x$w_buff1~0=v_~x$w_buff1~0_119, #memory_int=|v_#memory_int_271|, ~#x~0.base=|v_~#x~0.base_174|, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_258, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_362, P1Thread1of1ForFork0_#t~mem61=|v_P1Thread1of1ForFork0_#t~mem61_1|, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_286, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_451} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_134, ~#x~0.offset=|v_~#x~0.offset_174|, ~x$w_buff1~0=v_~x$w_buff1~0_119, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_257, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_361, P1Thread1of1ForFork0_#t~mem61=|v_P1Thread1of1ForFork0_#t~mem61_2|, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_285, P1Thread1of1ForFork0_#t~ite66=|v_P1Thread1of1ForFork0_#t~ite66_1|, P1Thread1of1ForFork0_#t~ite67=|v_P1Thread1of1ForFork0_#t~ite67_1|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_450, P1Thread1of1ForFork0_#t~ite62=|v_P1Thread1of1ForFork0_#t~ite62_2|, P1Thread1of1ForFork0_#t~ite63=|v_P1Thread1of1ForFork0_#t~ite63_1|, P1Thread1of1ForFork0_#t~ite64=|v_P1Thread1of1ForFork0_#t~ite64_1|, P1Thread1of1ForFork0_#t~ite65=|v_P1Thread1of1ForFork0_#t~ite65_1|, #memory_int=|v_#memory_int_270|, ~#x~0.base=|v_~#x~0.base_174|} AuxVars[|v_P1_#t~ite62_37|, |v_P1_#t~mem61_42|, |v_P1_#t~ite63_31|] AssignedVars[P1Thread1of1ForFork0_#t~ite62, P1Thread1of1ForFork0_#t~ite63, P1Thread1of1ForFork0_#t~ite64, P1Thread1of1ForFork0_#t~ite65, #memory_int, ~x$r_buff1_thd2~0, ~x$w_buff1_used~0, P1Thread1of1ForFork0_#t~mem61, ~x$r_buff0_thd2~0, P1Thread1of1ForFork0_#t~ite66, P1Thread1of1ForFork0_#t~ite67, ~x$w_buff0_used~0] and [1215] L754-->L765: Formula: (and (= |v_P0Thread1of1ForFork1_reach_error_#t~nondet2.base_3| |v_P0Thread1of1ForFork1_reach_error_#t~nondet2.base_4|) (= v_~x$w_buff0_used~0_Out_3 1) (= (ite (not (and (not (= (mod v_~x$w_buff0_used~0_Out_3 256) 0)) (not (= (mod v_~x$w_buff1_used~0_Out_3 256) 0)))) 1 0) |v_P0Thread1of1ForFork1___VERIFIER_assert_#in~expression_3|) (= v_~x$r_buff0_thd1~0_Out_1 1) (= v_~x$r_buff1_thd2~0_Out_1 v_~x$r_buff0_thd2~0_In_79) (= |v_P0Thread1of1ForFork1_reach_error_#t~nondet2.offset_3| |v_P0Thread1of1ForFork1_reach_error_#t~nondet2.offset_4|) (not (= v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_3 0)) (= v_~x$r_buff1_thd1~0_Out_1 v_~x$r_buff0_thd1~0_In_11) (= v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_3 |v_P0Thread1of1ForFork1___VERIFIER_assert_#in~expression_3|) (= v_~x$w_buff1~0_Out_3 v_~x$w_buff0~0_In_33) (= v_~x$r_buff1_thd0~0_Out_1 v_~x$r_buff0_thd0~0_In_11) (= v_~x$w_buff0~0_Out_3 1) (= v_~x$w_buff1_used~0_Out_3 v_~x$w_buff0_used~0_In_99)) InVars {~x$w_buff0~0=v_~x$w_buff0~0_In_33, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_In_11, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_In_11, P0Thread1of1ForFork1_reach_error_#t~nondet2.offset=|v_P0Thread1of1ForFork1_reach_error_#t~nondet2.offset_3|, P0Thread1of1ForFork1_reach_error_#t~nondet2.base=|v_P0Thread1of1ForFork1_reach_error_#t~nondet2.base_3|, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_In_79, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_In_99} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_Out_3, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_In_11, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_Out_1, ~x$w_buff1~0=v_~x$w_buff1~0_Out_3, P0Thread1of1ForFork1_reach_error_#t~nondet2.base=|v_P0Thread1of1ForFork1_reach_error_#t~nondet2.base_4|, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_Out_1, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_Out_3, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_Out_1, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_In_79, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_Out_1, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_Out_3, P0Thread1of1ForFork1_reach_error_#t~nondet2.offset=|v_P0Thread1of1ForFork1_reach_error_#t~nondet2.offset_4|, P0Thread1of1ForFork1___VERIFIER_assert_~expression=v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_3, P0Thread1of1ForFork1___VERIFIER_assert_#in~expression=|v_P0Thread1of1ForFork1___VERIFIER_assert_#in~expression_3|} AuxVars[] AssignedVars[~x$w_buff0~0, ~x$r_buff0_thd1~0, P0Thread1of1ForFork1_reach_error_#t~nondet2.offset, ~x$w_buff1~0, P0Thread1of1ForFork1_reach_error_#t~nondet2.base, ~x$r_buff1_thd2~0, ~x$w_buff1_used~0, P0Thread1of1ForFork1___VERIFIER_assert_~expression, ~x$r_buff1_thd1~0, ~x$r_buff1_thd0~0, P0Thread1of1ForFork1___VERIFIER_assert_#in~expression, ~x$w_buff0_used~0] under condition null [2021-01-26 23:10:43,447 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-26 23:10:43,806 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-26 23:10:44,098 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-26 23:10:47,767 WARN L146 IndependenceRelation]: Expensive independence query (3668 ms) for statements [1223] L801-->L808: Formula: (let ((.cse6 (= (mod v_~x$w_buff0_used~0_450 256) 0)) (.cse7 (= (mod v_~x$r_buff1_thd2~0_258 256) 0)) (.cse14 (= (mod v_~x$w_buff1_used~0_362 256) 0)) (.cse15 (= (mod v_~x$r_buff0_thd2~0_286 256) 0)) (.cse16 (= (mod v_~x$w_buff0_used~0_451 256) 0))) (let ((.cse9 (not .cse16)) (.cse10 (select |v_#memory_int_271| |v_~#x~0.base_174|)) (.cse8 (or .cse16 .cse15)) (.cse13 (or .cse7 .cse14)) (.cse0 (or .cse6 .cse15)) (.cse1 (not .cse6)) (.cse2 (not .cse15)) (.cse12 (not .cse14)) (.cse5 (not .cse7))) (and (or (and (= v_~x$r_buff0_thd2~0_286 v_~x$r_buff0_thd2~0_285) .cse0) (and (= v_~x$r_buff0_thd2~0_285 0) .cse1 .cse2)) (let ((.cse3 (= (mod v_~x$r_buff0_thd2~0_285 256) 0)) (.cse4 (= (mod v_~x$w_buff1_used~0_361 256) 0))) (or (and (= v_~x$r_buff1_thd2~0_257 0) (or (and .cse1 (not .cse3)) (and (not .cse4) .cse5))) (and (= v_~x$r_buff1_thd2~0_258 v_~x$r_buff1_thd2~0_257) (or .cse6 .cse3) (or .cse7 .cse4)))) (or (and (= v_~x$w_buff0_used~0_451 v_~x$w_buff0_used~0_450) .cse8) (and .cse9 (= v_~x$w_buff0_used~0_450 0) .cse2)) (= |v_#memory_int_270| (store |v_#memory_int_271| |v_~#x~0.base_174| (store .cse10 |v_~#x~0.offset_174| |v_P1_#t~ite63_31|))) (let ((.cse11 (= |v_P1_#t~mem61_42| |v_P1Thread1of1ForFork0_#t~mem61_1|))) (or (and .cse11 (= |v_P1_#t~ite62_37| |v_P1Thread1of1ForFork0_#t~ite62_1|) (= |v_P1_#t~ite63_31| v_~x$w_buff0~0_134) .cse9 .cse2) (and (= |v_P1_#t~ite62_37| |v_P1_#t~ite63_31|) (or (and .cse11 (= |v_P1_#t~ite62_37| v_~x$w_buff1~0_119) .cse12 .cse5) (and (= |v_P1_#t~ite62_37| |v_P1_#t~mem61_42|) .cse13 (= (select .cse10 |v_~#x~0.offset_174|) |v_P1_#t~mem61_42|))) .cse8))) (or (and (= v_~x$w_buff1_used~0_362 v_~x$w_buff1_used~0_361) .cse13 .cse0) (and (= v_~x$w_buff1_used~0_361 0) (or (and .cse1 .cse2) (and .cse12 .cse5))))))) InVars {~x$w_buff0~0=v_~x$w_buff0~0_134, P1Thread1of1ForFork0_#t~ite62=|v_P1Thread1of1ForFork0_#t~ite62_1|, ~#x~0.offset=|v_~#x~0.offset_174|, ~x$w_buff1~0=v_~x$w_buff1~0_119, #memory_int=|v_#memory_int_271|, ~#x~0.base=|v_~#x~0.base_174|, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_258, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_362, P1Thread1of1ForFork0_#t~mem61=|v_P1Thread1of1ForFork0_#t~mem61_1|, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_286, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_451} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_134, ~#x~0.offset=|v_~#x~0.offset_174|, ~x$w_buff1~0=v_~x$w_buff1~0_119, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_257, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_361, P1Thread1of1ForFork0_#t~mem61=|v_P1Thread1of1ForFork0_#t~mem61_2|, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_285, P1Thread1of1ForFork0_#t~ite66=|v_P1Thread1of1ForFork0_#t~ite66_1|, P1Thread1of1ForFork0_#t~ite67=|v_P1Thread1of1ForFork0_#t~ite67_1|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_450, P1Thread1of1ForFork0_#t~ite62=|v_P1Thread1of1ForFork0_#t~ite62_2|, P1Thread1of1ForFork0_#t~ite63=|v_P1Thread1of1ForFork0_#t~ite63_1|, P1Thread1of1ForFork0_#t~ite64=|v_P1Thread1of1ForFork0_#t~ite64_1|, P1Thread1of1ForFork0_#t~ite65=|v_P1Thread1of1ForFork0_#t~ite65_1|, #memory_int=|v_#memory_int_270|, ~#x~0.base=|v_~#x~0.base_174|} AuxVars[|v_P1_#t~ite62_37|, |v_P1_#t~mem61_42|, |v_P1_#t~ite63_31|] AssignedVars[P1Thread1of1ForFork0_#t~ite62, P1Thread1of1ForFork0_#t~ite63, P1Thread1of1ForFork0_#t~ite64, P1Thread1of1ForFork0_#t~ite65, #memory_int, ~x$r_buff1_thd2~0, ~x$w_buff1_used~0, P1Thread1of1ForFork0_#t~mem61, ~x$r_buff0_thd2~0, P1Thread1of1ForFork0_#t~ite66, P1Thread1of1ForFork0_#t~ite67, ~x$w_buff0_used~0] and [1216] L765-->L772: Formula: (let ((.cse10 (= (mod v_~x$w_buff0_used~0_444 256) 0)) (.cse14 (= 0 (mod v_~x$r_buff0_thd1~0_71 256))) (.cse15 (= (mod v_~x$w_buff0_used~0_445 256) 0)) (.cse16 (= (mod v_~x$w_buff1_used~0_356 256) 0)) (.cse13 (= (mod v_~x$r_buff1_thd1~0_52 256) 0))) (let ((.cse1 (or .cse16 .cse13)) (.cse4 (not .cse16)) (.cse8 (select |v_#memory_int_263| |v_~#x~0.base_170|)) (.cse9 (or .cse14 .cse15)) (.cse6 (not .cse15)) (.cse5 (not .cse13)) (.cse2 (not .cse14)) (.cse3 (not .cse10)) (.cse0 (or .cse14 .cse10))) (and (or (and .cse0 .cse1 (= v_~x$w_buff1_used~0_356 v_~x$w_buff1_used~0_355)) (and (= v_~x$w_buff1_used~0_355 0) (or (and .cse2 .cse3) (and .cse4 .cse5)))) (let ((.cse7 (= |v_P0_#t~mem5_54| |v_P0Thread1of1ForFork1_#t~mem5_1|))) (or (and .cse6 .cse2 (= |v_P0_#t~ite6_49| |v_P0Thread1of1ForFork1_#t~ite6_1|) .cse7 (= |v_P0_#t~ite7_39| v_~x$w_buff0~0_130)) (and (or (and .cse1 (= |v_P0_#t~ite6_49| |v_P0_#t~mem5_54|) (= (select .cse8 |v_~#x~0.offset_170|) |v_P0_#t~mem5_54|)) (and .cse4 (= |v_P0_#t~ite6_49| v_~x$w_buff1~0_115) .cse7 .cse5)) (= |v_P0_#t~ite7_39| |v_P0_#t~ite6_49|) .cse9))) (= (store |v_#memory_int_263| |v_~#x~0.base_170| (store .cse8 |v_~#x~0.offset_170| |v_P0_#t~ite7_39|)) |v_#memory_int_262|) (or (and (= v_~x$w_buff0_used~0_444 v_~x$w_buff0_used~0_445) .cse9) (and (= v_~x$w_buff0_used~0_444 0) .cse6 .cse2)) (let ((.cse11 (= (mod v_~x$r_buff0_thd1~0_70 256) 0)) (.cse12 (= (mod v_~x$w_buff1_used~0_355 256) 0))) (or (and (or .cse10 .cse11) (or .cse12 .cse13) (= v_~x$r_buff1_thd1~0_52 v_~x$r_buff1_thd1~0_51)) (and (or (and (not .cse11) .cse3) (and .cse5 (not .cse12))) (= v_~x$r_buff1_thd1~0_51 0)))) (or (and (= v_~x$r_buff0_thd1~0_70 0) .cse2 .cse3) (and .cse0 (= v_~x$r_buff0_thd1~0_71 v_~x$r_buff0_thd1~0_70)))))) InVars {~x$w_buff0~0=v_~x$w_buff0~0_130, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_71, ~#x~0.offset=|v_~#x~0.offset_170|, P0Thread1of1ForFork1_#t~ite6=|v_P0Thread1of1ForFork1_#t~ite6_1|, ~x$w_buff1~0=v_~x$w_buff1~0_115, #memory_int=|v_#memory_int_263|, ~#x~0.base=|v_~#x~0.base_170|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_356, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_52, P0Thread1of1ForFork1_#t~mem5=|v_P0Thread1of1ForFork1_#t~mem5_1|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_445} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_130, P0Thread1of1ForFork1_#t~ite10=|v_P0Thread1of1ForFork1_#t~ite10_1|, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_70, ~#x~0.offset=|v_~#x~0.offset_170|, ~x$w_buff1~0=v_~x$w_buff1~0_115, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_355, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_51, P0Thread1of1ForFork1_#t~mem5=|v_P0Thread1of1ForFork1_#t~mem5_2|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_444, P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_1|, P0Thread1of1ForFork1_#t~ite9=|v_P0Thread1of1ForFork1_#t~ite9_1|, P0Thread1of1ForFork1_#t~ite6=|v_P0Thread1of1ForFork1_#t~ite6_2|, P0Thread1of1ForFork1_#t~ite7=|v_P0Thread1of1ForFork1_#t~ite7_1|, #memory_int=|v_#memory_int_262|, ~#x~0.base=|v_~#x~0.base_170|, P0Thread1of1ForFork1_#t~ite11=|v_P0Thread1of1ForFork1_#t~ite11_1|} AuxVars[|v_P0_#t~mem5_54|, |v_P0_#t~ite7_39|, |v_P0_#t~ite6_49|] AssignedVars[P0Thread1of1ForFork1_#t~ite10, ~x$r_buff0_thd1~0, P0Thread1of1ForFork1_#t~ite8, P0Thread1of1ForFork1_#t~ite9, P0Thread1of1ForFork1_#t~ite6, P0Thread1of1ForFork1_#t~ite7, #memory_int, ~x$w_buff1_used~0, ~x$r_buff1_thd1~0, P0Thread1of1ForFork1_#t~mem5, ~x$w_buff0_used~0, P0Thread1of1ForFork1_#t~ite11] under condition 5508#(and (<= 1 ~main$tmp_guard1~0) (<= 1 ~x$w_buff0_used~0) (<= (div ~x$w_buff0_used~0 256) 0) (<= (div ~main$tmp_guard1~0 256) 0) (or (<= (+ |ULTIMATE.start___VERIFIER_assert_#in~expression| 255) 0) (<= 1 |ULTIMATE.start___VERIFIER_assert_#in~expression|)) (= ~__unbuffered_p0_EAX~0 0) (or (<= 1 ULTIMATE.start___VERIFIER_assert_~expression) (<= (+ ULTIMATE.start___VERIFIER_assert_~expression 255) 0)) (= 1 ~x$r_buff0_thd1~0)) [2021-01-26 23:10:47,819 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-26 23:10:48,130 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-26 23:10:52,217 WARN L146 IndependenceRelation]: Expensive independence query (4086 ms) for statements [1223] L801-->L808: Formula: (let ((.cse6 (= (mod v_~x$w_buff0_used~0_450 256) 0)) (.cse7 (= (mod v_~x$r_buff1_thd2~0_258 256) 0)) (.cse14 (= (mod v_~x$w_buff1_used~0_362 256) 0)) (.cse15 (= (mod v_~x$r_buff0_thd2~0_286 256) 0)) (.cse16 (= (mod v_~x$w_buff0_used~0_451 256) 0))) (let ((.cse9 (not .cse16)) (.cse10 (select |v_#memory_int_271| |v_~#x~0.base_174|)) (.cse8 (or .cse16 .cse15)) (.cse13 (or .cse7 .cse14)) (.cse0 (or .cse6 .cse15)) (.cse1 (not .cse6)) (.cse2 (not .cse15)) (.cse12 (not .cse14)) (.cse5 (not .cse7))) (and (or (and (= v_~x$r_buff0_thd2~0_286 v_~x$r_buff0_thd2~0_285) .cse0) (and (= v_~x$r_buff0_thd2~0_285 0) .cse1 .cse2)) (let ((.cse3 (= (mod v_~x$r_buff0_thd2~0_285 256) 0)) (.cse4 (= (mod v_~x$w_buff1_used~0_361 256) 0))) (or (and (= v_~x$r_buff1_thd2~0_257 0) (or (and .cse1 (not .cse3)) (and (not .cse4) .cse5))) (and (= v_~x$r_buff1_thd2~0_258 v_~x$r_buff1_thd2~0_257) (or .cse6 .cse3) (or .cse7 .cse4)))) (or (and (= v_~x$w_buff0_used~0_451 v_~x$w_buff0_used~0_450) .cse8) (and .cse9 (= v_~x$w_buff0_used~0_450 0) .cse2)) (= |v_#memory_int_270| (store |v_#memory_int_271| |v_~#x~0.base_174| (store .cse10 |v_~#x~0.offset_174| |v_P1_#t~ite63_31|))) (let ((.cse11 (= |v_P1_#t~mem61_42| |v_P1Thread1of1ForFork0_#t~mem61_1|))) (or (and .cse11 (= |v_P1_#t~ite62_37| |v_P1Thread1of1ForFork0_#t~ite62_1|) (= |v_P1_#t~ite63_31| v_~x$w_buff0~0_134) .cse9 .cse2) (and (= |v_P1_#t~ite62_37| |v_P1_#t~ite63_31|) (or (and .cse11 (= |v_P1_#t~ite62_37| v_~x$w_buff1~0_119) .cse12 .cse5) (and (= |v_P1_#t~ite62_37| |v_P1_#t~mem61_42|) .cse13 (= (select .cse10 |v_~#x~0.offset_174|) |v_P1_#t~mem61_42|))) .cse8))) (or (and (= v_~x$w_buff1_used~0_362 v_~x$w_buff1_used~0_361) .cse13 .cse0) (and (= v_~x$w_buff1_used~0_361 0) (or (and .cse1 .cse2) (and .cse12 .cse5))))))) InVars {~x$w_buff0~0=v_~x$w_buff0~0_134, P1Thread1of1ForFork0_#t~ite62=|v_P1Thread1of1ForFork0_#t~ite62_1|, ~#x~0.offset=|v_~#x~0.offset_174|, ~x$w_buff1~0=v_~x$w_buff1~0_119, #memory_int=|v_#memory_int_271|, ~#x~0.base=|v_~#x~0.base_174|, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_258, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_362, P1Thread1of1ForFork0_#t~mem61=|v_P1Thread1of1ForFork0_#t~mem61_1|, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_286, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_451} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_134, ~#x~0.offset=|v_~#x~0.offset_174|, ~x$w_buff1~0=v_~x$w_buff1~0_119, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_257, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_361, P1Thread1of1ForFork0_#t~mem61=|v_P1Thread1of1ForFork0_#t~mem61_2|, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_285, P1Thread1of1ForFork0_#t~ite66=|v_P1Thread1of1ForFork0_#t~ite66_1|, P1Thread1of1ForFork0_#t~ite67=|v_P1Thread1of1ForFork0_#t~ite67_1|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_450, P1Thread1of1ForFork0_#t~ite62=|v_P1Thread1of1ForFork0_#t~ite62_2|, P1Thread1of1ForFork0_#t~ite63=|v_P1Thread1of1ForFork0_#t~ite63_1|, P1Thread1of1ForFork0_#t~ite64=|v_P1Thread1of1ForFork0_#t~ite64_1|, P1Thread1of1ForFork0_#t~ite65=|v_P1Thread1of1ForFork0_#t~ite65_1|, #memory_int=|v_#memory_int_270|, ~#x~0.base=|v_~#x~0.base_174|} AuxVars[|v_P1_#t~ite62_37|, |v_P1_#t~mem61_42|, |v_P1_#t~ite63_31|] AssignedVars[P1Thread1of1ForFork0_#t~ite62, P1Thread1of1ForFork0_#t~ite63, P1Thread1of1ForFork0_#t~ite64, P1Thread1of1ForFork0_#t~ite65, #memory_int, ~x$r_buff1_thd2~0, ~x$w_buff1_used~0, P1Thread1of1ForFork0_#t~mem61, ~x$r_buff0_thd2~0, P1Thread1of1ForFork0_#t~ite66, P1Thread1of1ForFork0_#t~ite67, ~x$w_buff0_used~0] and [1216] L765-->L772: Formula: (let ((.cse10 (= (mod v_~x$w_buff0_used~0_444 256) 0)) (.cse14 (= 0 (mod v_~x$r_buff0_thd1~0_71 256))) (.cse15 (= (mod v_~x$w_buff0_used~0_445 256) 0)) (.cse16 (= (mod v_~x$w_buff1_used~0_356 256) 0)) (.cse13 (= (mod v_~x$r_buff1_thd1~0_52 256) 0))) (let ((.cse1 (or .cse16 .cse13)) (.cse4 (not .cse16)) (.cse8 (select |v_#memory_int_263| |v_~#x~0.base_170|)) (.cse9 (or .cse14 .cse15)) (.cse6 (not .cse15)) (.cse5 (not .cse13)) (.cse2 (not .cse14)) (.cse3 (not .cse10)) (.cse0 (or .cse14 .cse10))) (and (or (and .cse0 .cse1 (= v_~x$w_buff1_used~0_356 v_~x$w_buff1_used~0_355)) (and (= v_~x$w_buff1_used~0_355 0) (or (and .cse2 .cse3) (and .cse4 .cse5)))) (let ((.cse7 (= |v_P0_#t~mem5_54| |v_P0Thread1of1ForFork1_#t~mem5_1|))) (or (and .cse6 .cse2 (= |v_P0_#t~ite6_49| |v_P0Thread1of1ForFork1_#t~ite6_1|) .cse7 (= |v_P0_#t~ite7_39| v_~x$w_buff0~0_130)) (and (or (and .cse1 (= |v_P0_#t~ite6_49| |v_P0_#t~mem5_54|) (= (select .cse8 |v_~#x~0.offset_170|) |v_P0_#t~mem5_54|)) (and .cse4 (= |v_P0_#t~ite6_49| v_~x$w_buff1~0_115) .cse7 .cse5)) (= |v_P0_#t~ite7_39| |v_P0_#t~ite6_49|) .cse9))) (= (store |v_#memory_int_263| |v_~#x~0.base_170| (store .cse8 |v_~#x~0.offset_170| |v_P0_#t~ite7_39|)) |v_#memory_int_262|) (or (and (= v_~x$w_buff0_used~0_444 v_~x$w_buff0_used~0_445) .cse9) (and (= v_~x$w_buff0_used~0_444 0) .cse6 .cse2)) (let ((.cse11 (= (mod v_~x$r_buff0_thd1~0_70 256) 0)) (.cse12 (= (mod v_~x$w_buff1_used~0_355 256) 0))) (or (and (or .cse10 .cse11) (or .cse12 .cse13) (= v_~x$r_buff1_thd1~0_52 v_~x$r_buff1_thd1~0_51)) (and (or (and (not .cse11) .cse3) (and .cse5 (not .cse12))) (= v_~x$r_buff1_thd1~0_51 0)))) (or (and (= v_~x$r_buff0_thd1~0_70 0) .cse2 .cse3) (and .cse0 (= v_~x$r_buff0_thd1~0_71 v_~x$r_buff0_thd1~0_70)))))) InVars {~x$w_buff0~0=v_~x$w_buff0~0_130, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_71, ~#x~0.offset=|v_~#x~0.offset_170|, P0Thread1of1ForFork1_#t~ite6=|v_P0Thread1of1ForFork1_#t~ite6_1|, ~x$w_buff1~0=v_~x$w_buff1~0_115, #memory_int=|v_#memory_int_263|, ~#x~0.base=|v_~#x~0.base_170|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_356, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_52, P0Thread1of1ForFork1_#t~mem5=|v_P0Thread1of1ForFork1_#t~mem5_1|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_445} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_130, P0Thread1of1ForFork1_#t~ite10=|v_P0Thread1of1ForFork1_#t~ite10_1|, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_70, ~#x~0.offset=|v_~#x~0.offset_170|, ~x$w_buff1~0=v_~x$w_buff1~0_115, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_355, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_51, P0Thread1of1ForFork1_#t~mem5=|v_P0Thread1of1ForFork1_#t~mem5_2|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_444, P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_1|, P0Thread1of1ForFork1_#t~ite9=|v_P0Thread1of1ForFork1_#t~ite9_1|, P0Thread1of1ForFork1_#t~ite6=|v_P0Thread1of1ForFork1_#t~ite6_2|, P0Thread1of1ForFork1_#t~ite7=|v_P0Thread1of1ForFork1_#t~ite7_1|, #memory_int=|v_#memory_int_262|, ~#x~0.base=|v_~#x~0.base_170|, P0Thread1of1ForFork1_#t~ite11=|v_P0Thread1of1ForFork1_#t~ite11_1|} AuxVars[|v_P0_#t~mem5_54|, |v_P0_#t~ite7_39|, |v_P0_#t~ite6_49|] AssignedVars[P0Thread1of1ForFork1_#t~ite10, ~x$r_buff0_thd1~0, P0Thread1of1ForFork1_#t~ite8, P0Thread1of1ForFork1_#t~ite9, P0Thread1of1ForFork1_#t~ite6, P0Thread1of1ForFork1_#t~ite7, #memory_int, ~x$w_buff1_used~0, ~x$r_buff1_thd1~0, P0Thread1of1ForFork1_#t~mem5, ~x$w_buff0_used~0, P0Thread1of1ForFork1_#t~ite11] under condition 6256#(and (<= 1 ~main$tmp_guard1~0) (<= 1 ~x$w_buff0_used~0) (<= (div ~x$w_buff0_used~0 256) 0) (<= (div ~main$tmp_guard1~0 256) 0) (or (<= (+ |ULTIMATE.start___VERIFIER_assert_#in~expression| 255) 0) (<= 1 |ULTIMATE.start___VERIFIER_assert_#in~expression|)) (= ~__unbuffered_p0_EAX~0 0) (= 1 ~x$r_buff0_thd1~0)) [2021-01-26 23:10:52,243 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-26 23:10:52,529 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-26 23:10:56,633 WARN L146 IndependenceRelation]: Expensive independence query (4103 ms) for statements [1223] L801-->L808: Formula: (let ((.cse6 (= (mod v_~x$w_buff0_used~0_450 256) 0)) (.cse7 (= (mod v_~x$r_buff1_thd2~0_258 256) 0)) (.cse14 (= (mod v_~x$w_buff1_used~0_362 256) 0)) (.cse15 (= (mod v_~x$r_buff0_thd2~0_286 256) 0)) (.cse16 (= (mod v_~x$w_buff0_used~0_451 256) 0))) (let ((.cse9 (not .cse16)) (.cse10 (select |v_#memory_int_271| |v_~#x~0.base_174|)) (.cse8 (or .cse16 .cse15)) (.cse13 (or .cse7 .cse14)) (.cse0 (or .cse6 .cse15)) (.cse1 (not .cse6)) (.cse2 (not .cse15)) (.cse12 (not .cse14)) (.cse5 (not .cse7))) (and (or (and (= v_~x$r_buff0_thd2~0_286 v_~x$r_buff0_thd2~0_285) .cse0) (and (= v_~x$r_buff0_thd2~0_285 0) .cse1 .cse2)) (let ((.cse3 (= (mod v_~x$r_buff0_thd2~0_285 256) 0)) (.cse4 (= (mod v_~x$w_buff1_used~0_361 256) 0))) (or (and (= v_~x$r_buff1_thd2~0_257 0) (or (and .cse1 (not .cse3)) (and (not .cse4) .cse5))) (and (= v_~x$r_buff1_thd2~0_258 v_~x$r_buff1_thd2~0_257) (or .cse6 .cse3) (or .cse7 .cse4)))) (or (and (= v_~x$w_buff0_used~0_451 v_~x$w_buff0_used~0_450) .cse8) (and .cse9 (= v_~x$w_buff0_used~0_450 0) .cse2)) (= |v_#memory_int_270| (store |v_#memory_int_271| |v_~#x~0.base_174| (store .cse10 |v_~#x~0.offset_174| |v_P1_#t~ite63_31|))) (let ((.cse11 (= |v_P1_#t~mem61_42| |v_P1Thread1of1ForFork0_#t~mem61_1|))) (or (and .cse11 (= |v_P1_#t~ite62_37| |v_P1Thread1of1ForFork0_#t~ite62_1|) (= |v_P1_#t~ite63_31| v_~x$w_buff0~0_134) .cse9 .cse2) (and (= |v_P1_#t~ite62_37| |v_P1_#t~ite63_31|) (or (and .cse11 (= |v_P1_#t~ite62_37| v_~x$w_buff1~0_119) .cse12 .cse5) (and (= |v_P1_#t~ite62_37| |v_P1_#t~mem61_42|) .cse13 (= (select .cse10 |v_~#x~0.offset_174|) |v_P1_#t~mem61_42|))) .cse8))) (or (and (= v_~x$w_buff1_used~0_362 v_~x$w_buff1_used~0_361) .cse13 .cse0) (and (= v_~x$w_buff1_used~0_361 0) (or (and .cse1 .cse2) (and .cse12 .cse5))))))) InVars {~x$w_buff0~0=v_~x$w_buff0~0_134, P1Thread1of1ForFork0_#t~ite62=|v_P1Thread1of1ForFork0_#t~ite62_1|, ~#x~0.offset=|v_~#x~0.offset_174|, ~x$w_buff1~0=v_~x$w_buff1~0_119, #memory_int=|v_#memory_int_271|, ~#x~0.base=|v_~#x~0.base_174|, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_258, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_362, P1Thread1of1ForFork0_#t~mem61=|v_P1Thread1of1ForFork0_#t~mem61_1|, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_286, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_451} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_134, ~#x~0.offset=|v_~#x~0.offset_174|, ~x$w_buff1~0=v_~x$w_buff1~0_119, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_257, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_361, P1Thread1of1ForFork0_#t~mem61=|v_P1Thread1of1ForFork0_#t~mem61_2|, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_285, P1Thread1of1ForFork0_#t~ite66=|v_P1Thread1of1ForFork0_#t~ite66_1|, P1Thread1of1ForFork0_#t~ite67=|v_P1Thread1of1ForFork0_#t~ite67_1|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_450, P1Thread1of1ForFork0_#t~ite62=|v_P1Thread1of1ForFork0_#t~ite62_2|, P1Thread1of1ForFork0_#t~ite63=|v_P1Thread1of1ForFork0_#t~ite63_1|, P1Thread1of1ForFork0_#t~ite64=|v_P1Thread1of1ForFork0_#t~ite64_1|, P1Thread1of1ForFork0_#t~ite65=|v_P1Thread1of1ForFork0_#t~ite65_1|, #memory_int=|v_#memory_int_270|, ~#x~0.base=|v_~#x~0.base_174|} AuxVars[|v_P1_#t~ite62_37|, |v_P1_#t~mem61_42|, |v_P1_#t~ite63_31|] AssignedVars[P1Thread1of1ForFork0_#t~ite62, P1Thread1of1ForFork0_#t~ite63, P1Thread1of1ForFork0_#t~ite64, P1Thread1of1ForFork0_#t~ite65, #memory_int, ~x$r_buff1_thd2~0, ~x$w_buff1_used~0, P1Thread1of1ForFork0_#t~mem61, ~x$r_buff0_thd2~0, P1Thread1of1ForFork0_#t~ite66, P1Thread1of1ForFork0_#t~ite67, ~x$w_buff0_used~0] and [1216] L765-->L772: Formula: (let ((.cse10 (= (mod v_~x$w_buff0_used~0_444 256) 0)) (.cse14 (= 0 (mod v_~x$r_buff0_thd1~0_71 256))) (.cse15 (= (mod v_~x$w_buff0_used~0_445 256) 0)) (.cse16 (= (mod v_~x$w_buff1_used~0_356 256) 0)) (.cse13 (= (mod v_~x$r_buff1_thd1~0_52 256) 0))) (let ((.cse1 (or .cse16 .cse13)) (.cse4 (not .cse16)) (.cse8 (select |v_#memory_int_263| |v_~#x~0.base_170|)) (.cse9 (or .cse14 .cse15)) (.cse6 (not .cse15)) (.cse5 (not .cse13)) (.cse2 (not .cse14)) (.cse3 (not .cse10)) (.cse0 (or .cse14 .cse10))) (and (or (and .cse0 .cse1 (= v_~x$w_buff1_used~0_356 v_~x$w_buff1_used~0_355)) (and (= v_~x$w_buff1_used~0_355 0) (or (and .cse2 .cse3) (and .cse4 .cse5)))) (let ((.cse7 (= |v_P0_#t~mem5_54| |v_P0Thread1of1ForFork1_#t~mem5_1|))) (or (and .cse6 .cse2 (= |v_P0_#t~ite6_49| |v_P0Thread1of1ForFork1_#t~ite6_1|) .cse7 (= |v_P0_#t~ite7_39| v_~x$w_buff0~0_130)) (and (or (and .cse1 (= |v_P0_#t~ite6_49| |v_P0_#t~mem5_54|) (= (select .cse8 |v_~#x~0.offset_170|) |v_P0_#t~mem5_54|)) (and .cse4 (= |v_P0_#t~ite6_49| v_~x$w_buff1~0_115) .cse7 .cse5)) (= |v_P0_#t~ite7_39| |v_P0_#t~ite6_49|) .cse9))) (= (store |v_#memory_int_263| |v_~#x~0.base_170| (store .cse8 |v_~#x~0.offset_170| |v_P0_#t~ite7_39|)) |v_#memory_int_262|) (or (and (= v_~x$w_buff0_used~0_444 v_~x$w_buff0_used~0_445) .cse9) (and (= v_~x$w_buff0_used~0_444 0) .cse6 .cse2)) (let ((.cse11 (= (mod v_~x$r_buff0_thd1~0_70 256) 0)) (.cse12 (= (mod v_~x$w_buff1_used~0_355 256) 0))) (or (and (or .cse10 .cse11) (or .cse12 .cse13) (= v_~x$r_buff1_thd1~0_52 v_~x$r_buff1_thd1~0_51)) (and (or (and (not .cse11) .cse3) (and .cse5 (not .cse12))) (= v_~x$r_buff1_thd1~0_51 0)))) (or (and (= v_~x$r_buff0_thd1~0_70 0) .cse2 .cse3) (and .cse0 (= v_~x$r_buff0_thd1~0_71 v_~x$r_buff0_thd1~0_70)))))) InVars {~x$w_buff0~0=v_~x$w_buff0~0_130, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_71, ~#x~0.offset=|v_~#x~0.offset_170|, P0Thread1of1ForFork1_#t~ite6=|v_P0Thread1of1ForFork1_#t~ite6_1|, ~x$w_buff1~0=v_~x$w_buff1~0_115, #memory_int=|v_#memory_int_263|, ~#x~0.base=|v_~#x~0.base_170|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_356, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_52, P0Thread1of1ForFork1_#t~mem5=|v_P0Thread1of1ForFork1_#t~mem5_1|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_445} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_130, P0Thread1of1ForFork1_#t~ite10=|v_P0Thread1of1ForFork1_#t~ite10_1|, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_70, ~#x~0.offset=|v_~#x~0.offset_170|, ~x$w_buff1~0=v_~x$w_buff1~0_115, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_355, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_51, P0Thread1of1ForFork1_#t~mem5=|v_P0Thread1of1ForFork1_#t~mem5_2|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_444, P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_1|, P0Thread1of1ForFork1_#t~ite9=|v_P0Thread1of1ForFork1_#t~ite9_1|, P0Thread1of1ForFork1_#t~ite6=|v_P0Thread1of1ForFork1_#t~ite6_2|, P0Thread1of1ForFork1_#t~ite7=|v_P0Thread1of1ForFork1_#t~ite7_1|, #memory_int=|v_#memory_int_262|, ~#x~0.base=|v_~#x~0.base_170|, P0Thread1of1ForFork1_#t~ite11=|v_P0Thread1of1ForFork1_#t~ite11_1|} AuxVars[|v_P0_#t~mem5_54|, |v_P0_#t~ite7_39|, |v_P0_#t~ite6_49|] AssignedVars[P0Thread1of1ForFork1_#t~ite10, ~x$r_buff0_thd1~0, P0Thread1of1ForFork1_#t~ite8, P0Thread1of1ForFork1_#t~ite9, P0Thread1of1ForFork1_#t~ite6, P0Thread1of1ForFork1_#t~ite7, #memory_int, ~x$w_buff1_used~0, ~x$r_buff1_thd1~0, P0Thread1of1ForFork1_#t~mem5, ~x$w_buff0_used~0, P0Thread1of1ForFork1_#t~ite11] under condition 6416#(and (<= 1 ~main$tmp_guard1~0) (<= 1 ~x$w_buff0_used~0) (<= (div ~x$w_buff0_used~0 256) 0) (<= (div ~main$tmp_guard1~0 256) 0) (= ~__unbuffered_p0_EAX~0 0) (= 1 ~x$r_buff0_thd1~0)) [2021-01-26 23:10:56,648 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-26 23:10:57,149 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-26 23:10:57,724 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-26 23:11:01,826 WARN L146 IndependenceRelation]: Expensive independence query (4101 ms) for statements [1223] L801-->L808: Formula: (let ((.cse6 (= (mod v_~x$w_buff0_used~0_450 256) 0)) (.cse7 (= (mod v_~x$r_buff1_thd2~0_258 256) 0)) (.cse14 (= (mod v_~x$w_buff1_used~0_362 256) 0)) (.cse15 (= (mod v_~x$r_buff0_thd2~0_286 256) 0)) (.cse16 (= (mod v_~x$w_buff0_used~0_451 256) 0))) (let ((.cse9 (not .cse16)) (.cse10 (select |v_#memory_int_271| |v_~#x~0.base_174|)) (.cse8 (or .cse16 .cse15)) (.cse13 (or .cse7 .cse14)) (.cse0 (or .cse6 .cse15)) (.cse1 (not .cse6)) (.cse2 (not .cse15)) (.cse12 (not .cse14)) (.cse5 (not .cse7))) (and (or (and (= v_~x$r_buff0_thd2~0_286 v_~x$r_buff0_thd2~0_285) .cse0) (and (= v_~x$r_buff0_thd2~0_285 0) .cse1 .cse2)) (let ((.cse3 (= (mod v_~x$r_buff0_thd2~0_285 256) 0)) (.cse4 (= (mod v_~x$w_buff1_used~0_361 256) 0))) (or (and (= v_~x$r_buff1_thd2~0_257 0) (or (and .cse1 (not .cse3)) (and (not .cse4) .cse5))) (and (= v_~x$r_buff1_thd2~0_258 v_~x$r_buff1_thd2~0_257) (or .cse6 .cse3) (or .cse7 .cse4)))) (or (and (= v_~x$w_buff0_used~0_451 v_~x$w_buff0_used~0_450) .cse8) (and .cse9 (= v_~x$w_buff0_used~0_450 0) .cse2)) (= |v_#memory_int_270| (store |v_#memory_int_271| |v_~#x~0.base_174| (store .cse10 |v_~#x~0.offset_174| |v_P1_#t~ite63_31|))) (let ((.cse11 (= |v_P1_#t~mem61_42| |v_P1Thread1of1ForFork0_#t~mem61_1|))) (or (and .cse11 (= |v_P1_#t~ite62_37| |v_P1Thread1of1ForFork0_#t~ite62_1|) (= |v_P1_#t~ite63_31| v_~x$w_buff0~0_134) .cse9 .cse2) (and (= |v_P1_#t~ite62_37| |v_P1_#t~ite63_31|) (or (and .cse11 (= |v_P1_#t~ite62_37| v_~x$w_buff1~0_119) .cse12 .cse5) (and (= |v_P1_#t~ite62_37| |v_P1_#t~mem61_42|) .cse13 (= (select .cse10 |v_~#x~0.offset_174|) |v_P1_#t~mem61_42|))) .cse8))) (or (and (= v_~x$w_buff1_used~0_362 v_~x$w_buff1_used~0_361) .cse13 .cse0) (and (= v_~x$w_buff1_used~0_361 0) (or (and .cse1 .cse2) (and .cse12 .cse5))))))) InVars {~x$w_buff0~0=v_~x$w_buff0~0_134, P1Thread1of1ForFork0_#t~ite62=|v_P1Thread1of1ForFork0_#t~ite62_1|, ~#x~0.offset=|v_~#x~0.offset_174|, ~x$w_buff1~0=v_~x$w_buff1~0_119, #memory_int=|v_#memory_int_271|, ~#x~0.base=|v_~#x~0.base_174|, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_258, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_362, P1Thread1of1ForFork0_#t~mem61=|v_P1Thread1of1ForFork0_#t~mem61_1|, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_286, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_451} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_134, ~#x~0.offset=|v_~#x~0.offset_174|, ~x$w_buff1~0=v_~x$w_buff1~0_119, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_257, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_361, P1Thread1of1ForFork0_#t~mem61=|v_P1Thread1of1ForFork0_#t~mem61_2|, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_285, P1Thread1of1ForFork0_#t~ite66=|v_P1Thread1of1ForFork0_#t~ite66_1|, P1Thread1of1ForFork0_#t~ite67=|v_P1Thread1of1ForFork0_#t~ite67_1|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_450, P1Thread1of1ForFork0_#t~ite62=|v_P1Thread1of1ForFork0_#t~ite62_2|, P1Thread1of1ForFork0_#t~ite63=|v_P1Thread1of1ForFork0_#t~ite63_1|, P1Thread1of1ForFork0_#t~ite64=|v_P1Thread1of1ForFork0_#t~ite64_1|, P1Thread1of1ForFork0_#t~ite65=|v_P1Thread1of1ForFork0_#t~ite65_1|, #memory_int=|v_#memory_int_270|, ~#x~0.base=|v_~#x~0.base_174|} AuxVars[|v_P1_#t~ite62_37|, |v_P1_#t~mem61_42|, |v_P1_#t~ite63_31|] AssignedVars[P1Thread1of1ForFork0_#t~ite62, P1Thread1of1ForFork0_#t~ite63, P1Thread1of1ForFork0_#t~ite64, P1Thread1of1ForFork0_#t~ite65, #memory_int, ~x$r_buff1_thd2~0, ~x$w_buff1_used~0, P1Thread1of1ForFork0_#t~mem61, ~x$r_buff0_thd2~0, P1Thread1of1ForFork0_#t~ite66, P1Thread1of1ForFork0_#t~ite67, ~x$w_buff0_used~0] and [1209] L2-1-->L839: Formula: (let ((.cse15 (= (mod v_~x$w_buff0_used~0_437 256) 0)) (.cse14 (= (mod v_~x$r_buff0_thd0~0_66 256) 0)) (.cse13 (= (mod v_~x$w_buff0_used~0_436 256) 0)) (.cse12 (= (mod v_~x$r_buff1_thd0~0_46 256) 0)) (.cse16 (= (mod v_~x$w_buff1_used~0_348 256) 0))) (let ((.cse0 (select |v_#memory_int_255| |v_~#x~0.base_166|)) (.cse4 (or .cse12 .cse16)) (.cse6 (not .cse16)) (.cse5 (not .cse12)) (.cse8 (or .cse14 .cse13)) (.cse9 (not .cse13)) (.cse7 (or .cse14 .cse15)) (.cse1 (not .cse15)) (.cse3 (not .cse14))) (and (= (store |v_#memory_int_255| |v_~#x~0.base_166| (store .cse0 |v_~#x~0.offset_166| |v_ULTIMATE.start_main_#t~ite72_46|)) |v_#memory_int_254|) (let ((.cse2 (= |v_ULTIMATE.start_main_#t~mem70_43| |v_ULTIMATE.start_main_#t~mem70_38|))) (or (and .cse1 .cse2 (= |v_ULTIMATE.start_main_#t~ite71_36| |v_ULTIMATE.start_main_#t~ite71_31|) (= v_~x$w_buff0~0_126 |v_ULTIMATE.start_main_#t~ite72_46|) .cse3) (and (or (and (= |v_ULTIMATE.start_main_#t~mem70_43| |v_ULTIMATE.start_main_#t~ite71_36|) (= |v_ULTIMATE.start_main_#t~mem70_43| (select .cse0 |v_~#x~0.offset_166|)) .cse4) (and (= |v_ULTIMATE.start_main_#t~ite71_36| v_~x$w_buff1~0_111) .cse2 .cse5 .cse6)) .cse7 (= |v_ULTIMATE.start_main_#t~ite71_36| |v_ULTIMATE.start_main_#t~ite72_46|)))) (or (and (= v_~x$w_buff1_used~0_348 v_~x$w_buff1_used~0_347) .cse4 .cse8) (and (or (and .cse5 .cse6) (and .cse9 .cse3)) (= v_~x$w_buff1_used~0_347 0))) (let ((.cse10 (= (mod v_~x$w_buff1_used~0_347 256) 0)) (.cse11 (= (mod v_~x$r_buff0_thd0~0_65 256) 0))) (or (and (= v_~x$r_buff1_thd0~0_45 0) (or (and (not .cse10) .cse5) (and (not .cse11) .cse9))) (and (or .cse10 .cse12) (= v_~x$r_buff1_thd0~0_45 v_~x$r_buff1_thd0~0_46) (or .cse13 .cse11)))) (or (and (= v_~x$r_buff0_thd0~0_66 v_~x$r_buff0_thd0~0_65) .cse8) (and (= v_~x$r_buff0_thd0~0_65 0) .cse9 .cse3)) (or (and (= v_~x$w_buff0_used~0_437 v_~x$w_buff0_used~0_436) .cse7) (and .cse1 (= v_~x$w_buff0_used~0_436 0) .cse3))))) InVars {~x$w_buff0~0=v_~x$w_buff0~0_126, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_66, ULTIMATE.start_main_#t~ite71=|v_ULTIMATE.start_main_#t~ite71_31|, ~#x~0.offset=|v_~#x~0.offset_166|, ~x$w_buff1~0=v_~x$w_buff1~0_111, #memory_int=|v_#memory_int_255|, ~#x~0.base=|v_~#x~0.base_166|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_348, ULTIMATE.start_main_#t~mem70=|v_ULTIMATE.start_main_#t~mem70_38|, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_46, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_437} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_126, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_65, ~#x~0.offset=|v_~#x~0.offset_166|, ~x$w_buff1~0=v_~x$w_buff1~0_111, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_347, ULTIMATE.start_main_#t~mem70=|v_ULTIMATE.start_main_#t~mem70_37|, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_45, ULTIMATE.start_main_#t~ite75=|v_ULTIMATE.start_main_#t~ite75_24|, ULTIMATE.start_main_#t~ite76=|v_ULTIMATE.start_main_#t~ite76_18|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_436, ULTIMATE.start_main_#t~ite73=|v_ULTIMATE.start_main_#t~ite73_26|, ULTIMATE.start_main_#t~ite74=|v_ULTIMATE.start_main_#t~ite74_26|, ULTIMATE.start_main_#t~ite71=|v_ULTIMATE.start_main_#t~ite71_30|, ULTIMATE.start_main_#t~ite72=|v_ULTIMATE.start_main_#t~ite72_42|, #memory_int=|v_#memory_int_254|, ~#x~0.base=|v_~#x~0.base_166|} AuxVars[|v_ULTIMATE.start_main_#t~ite72_46|, |v_ULTIMATE.start_main_#t~ite71_36|, |v_ULTIMATE.start_main_#t~mem70_43|] AssignedVars[ULTIMATE.start_main_#t~ite73, ~x$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite74, ULTIMATE.start_main_#t~ite71, ULTIMATE.start_main_#t~ite72, #memory_int, ~x$w_buff1_used~0, ULTIMATE.start_main_#t~mem70, ~x$r_buff1_thd0~0, ULTIMATE.start_main_#t~ite75, ULTIMATE.start_main_#t~ite76, ~x$w_buff0_used~0] under condition 481#(and (<= 1 ~x$w_buff0_used~0) (<= (div ~x$w_buff0_used~0 256) 0) (= ~__unbuffered_p0_EAX~0 0) (= 1 ~x$r_buff0_thd1~0)) [2021-01-26 23:11:06,091 WARN L146 IndependenceRelation]: Expensive independence query (4099 ms) for statements [1216] L765-->L772: Formula: (let ((.cse10 (= (mod v_~x$w_buff0_used~0_444 256) 0)) (.cse14 (= 0 (mod v_~x$r_buff0_thd1~0_71 256))) (.cse15 (= (mod v_~x$w_buff0_used~0_445 256) 0)) (.cse16 (= (mod v_~x$w_buff1_used~0_356 256) 0)) (.cse13 (= (mod v_~x$r_buff1_thd1~0_52 256) 0))) (let ((.cse1 (or .cse16 .cse13)) (.cse4 (not .cse16)) (.cse8 (select |v_#memory_int_263| |v_~#x~0.base_170|)) (.cse9 (or .cse14 .cse15)) (.cse6 (not .cse15)) (.cse5 (not .cse13)) (.cse2 (not .cse14)) (.cse3 (not .cse10)) (.cse0 (or .cse14 .cse10))) (and (or (and .cse0 .cse1 (= v_~x$w_buff1_used~0_356 v_~x$w_buff1_used~0_355)) (and (= v_~x$w_buff1_used~0_355 0) (or (and .cse2 .cse3) (and .cse4 .cse5)))) (let ((.cse7 (= |v_P0_#t~mem5_54| |v_P0Thread1of1ForFork1_#t~mem5_1|))) (or (and .cse6 .cse2 (= |v_P0_#t~ite6_49| |v_P0Thread1of1ForFork1_#t~ite6_1|) .cse7 (= |v_P0_#t~ite7_39| v_~x$w_buff0~0_130)) (and (or (and .cse1 (= |v_P0_#t~ite6_49| |v_P0_#t~mem5_54|) (= (select .cse8 |v_~#x~0.offset_170|) |v_P0_#t~mem5_54|)) (and .cse4 (= |v_P0_#t~ite6_49| v_~x$w_buff1~0_115) .cse7 .cse5)) (= |v_P0_#t~ite7_39| |v_P0_#t~ite6_49|) .cse9))) (= (store |v_#memory_int_263| |v_~#x~0.base_170| (store .cse8 |v_~#x~0.offset_170| |v_P0_#t~ite7_39|)) |v_#memory_int_262|) (or (and (= v_~x$w_buff0_used~0_444 v_~x$w_buff0_used~0_445) .cse9) (and (= v_~x$w_buff0_used~0_444 0) .cse6 .cse2)) (let ((.cse11 (= (mod v_~x$r_buff0_thd1~0_70 256) 0)) (.cse12 (= (mod v_~x$w_buff1_used~0_355 256) 0))) (or (and (or .cse10 .cse11) (or .cse12 .cse13) (= v_~x$r_buff1_thd1~0_52 v_~x$r_buff1_thd1~0_51)) (and (or (and (not .cse11) .cse3) (and .cse5 (not .cse12))) (= v_~x$r_buff1_thd1~0_51 0)))) (or (and (= v_~x$r_buff0_thd1~0_70 0) .cse2 .cse3) (and .cse0 (= v_~x$r_buff0_thd1~0_71 v_~x$r_buff0_thd1~0_70)))))) InVars {~x$w_buff0~0=v_~x$w_buff0~0_130, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_71, ~#x~0.offset=|v_~#x~0.offset_170|, P0Thread1of1ForFork1_#t~ite6=|v_P0Thread1of1ForFork1_#t~ite6_1|, ~x$w_buff1~0=v_~x$w_buff1~0_115, #memory_int=|v_#memory_int_263|, ~#x~0.base=|v_~#x~0.base_170|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_356, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_52, P0Thread1of1ForFork1_#t~mem5=|v_P0Thread1of1ForFork1_#t~mem5_1|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_445} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_130, P0Thread1of1ForFork1_#t~ite10=|v_P0Thread1of1ForFork1_#t~ite10_1|, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_70, ~#x~0.offset=|v_~#x~0.offset_170|, ~x$w_buff1~0=v_~x$w_buff1~0_115, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_355, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_51, P0Thread1of1ForFork1_#t~mem5=|v_P0Thread1of1ForFork1_#t~mem5_2|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_444, P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_1|, P0Thread1of1ForFork1_#t~ite9=|v_P0Thread1of1ForFork1_#t~ite9_1|, P0Thread1of1ForFork1_#t~ite6=|v_P0Thread1of1ForFork1_#t~ite6_2|, P0Thread1of1ForFork1_#t~ite7=|v_P0Thread1of1ForFork1_#t~ite7_1|, #memory_int=|v_#memory_int_262|, ~#x~0.base=|v_~#x~0.base_170|, P0Thread1of1ForFork1_#t~ite11=|v_P0Thread1of1ForFork1_#t~ite11_1|} AuxVars[|v_P0_#t~mem5_54|, |v_P0_#t~ite7_39|, |v_P0_#t~ite6_49|] AssignedVars[P0Thread1of1ForFork1_#t~ite10, ~x$r_buff0_thd1~0, P0Thread1of1ForFork1_#t~ite8, P0Thread1of1ForFork1_#t~ite9, P0Thread1of1ForFork1_#t~ite6, P0Thread1of1ForFork1_#t~ite7, #memory_int, ~x$w_buff1_used~0, ~x$r_buff1_thd1~0, P0Thread1of1ForFork1_#t~mem5, ~x$w_buff0_used~0, P0Thread1of1ForFork1_#t~ite11] and [1209] L2-1-->L839: Formula: (let ((.cse15 (= (mod v_~x$w_buff0_used~0_437 256) 0)) (.cse14 (= (mod v_~x$r_buff0_thd0~0_66 256) 0)) (.cse13 (= (mod v_~x$w_buff0_used~0_436 256) 0)) (.cse12 (= (mod v_~x$r_buff1_thd0~0_46 256) 0)) (.cse16 (= (mod v_~x$w_buff1_used~0_348 256) 0))) (let ((.cse0 (select |v_#memory_int_255| |v_~#x~0.base_166|)) (.cse4 (or .cse12 .cse16)) (.cse6 (not .cse16)) (.cse5 (not .cse12)) (.cse8 (or .cse14 .cse13)) (.cse9 (not .cse13)) (.cse7 (or .cse14 .cse15)) (.cse1 (not .cse15)) (.cse3 (not .cse14))) (and (= (store |v_#memory_int_255| |v_~#x~0.base_166| (store .cse0 |v_~#x~0.offset_166| |v_ULTIMATE.start_main_#t~ite72_46|)) |v_#memory_int_254|) (let ((.cse2 (= |v_ULTIMATE.start_main_#t~mem70_43| |v_ULTIMATE.start_main_#t~mem70_38|))) (or (and .cse1 .cse2 (= |v_ULTIMATE.start_main_#t~ite71_36| |v_ULTIMATE.start_main_#t~ite71_31|) (= v_~x$w_buff0~0_126 |v_ULTIMATE.start_main_#t~ite72_46|) .cse3) (and (or (and (= |v_ULTIMATE.start_main_#t~mem70_43| |v_ULTIMATE.start_main_#t~ite71_36|) (= |v_ULTIMATE.start_main_#t~mem70_43| (select .cse0 |v_~#x~0.offset_166|)) .cse4) (and (= |v_ULTIMATE.start_main_#t~ite71_36| v_~x$w_buff1~0_111) .cse2 .cse5 .cse6)) .cse7 (= |v_ULTIMATE.start_main_#t~ite71_36| |v_ULTIMATE.start_main_#t~ite72_46|)))) (or (and (= v_~x$w_buff1_used~0_348 v_~x$w_buff1_used~0_347) .cse4 .cse8) (and (or (and .cse5 .cse6) (and .cse9 .cse3)) (= v_~x$w_buff1_used~0_347 0))) (let ((.cse10 (= (mod v_~x$w_buff1_used~0_347 256) 0)) (.cse11 (= (mod v_~x$r_buff0_thd0~0_65 256) 0))) (or (and (= v_~x$r_buff1_thd0~0_45 0) (or (and (not .cse10) .cse5) (and (not .cse11) .cse9))) (and (or .cse10 .cse12) (= v_~x$r_buff1_thd0~0_45 v_~x$r_buff1_thd0~0_46) (or .cse13 .cse11)))) (or (and (= v_~x$r_buff0_thd0~0_66 v_~x$r_buff0_thd0~0_65) .cse8) (and (= v_~x$r_buff0_thd0~0_65 0) .cse9 .cse3)) (or (and (= v_~x$w_buff0_used~0_437 v_~x$w_buff0_used~0_436) .cse7) (and .cse1 (= v_~x$w_buff0_used~0_436 0) .cse3))))) InVars {~x$w_buff0~0=v_~x$w_buff0~0_126, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_66, ULTIMATE.start_main_#t~ite71=|v_ULTIMATE.start_main_#t~ite71_31|, ~#x~0.offset=|v_~#x~0.offset_166|, ~x$w_buff1~0=v_~x$w_buff1~0_111, #memory_int=|v_#memory_int_255|, ~#x~0.base=|v_~#x~0.base_166|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_348, ULTIMATE.start_main_#t~mem70=|v_ULTIMATE.start_main_#t~mem70_38|, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_46, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_437} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_126, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_65, ~#x~0.offset=|v_~#x~0.offset_166|, ~x$w_buff1~0=v_~x$w_buff1~0_111, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_347, ULTIMATE.start_main_#t~mem70=|v_ULTIMATE.start_main_#t~mem70_37|, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_45, ULTIMATE.start_main_#t~ite75=|v_ULTIMATE.start_main_#t~ite75_24|, ULTIMATE.start_main_#t~ite76=|v_ULTIMATE.start_main_#t~ite76_18|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_436, ULTIMATE.start_main_#t~ite73=|v_ULTIMATE.start_main_#t~ite73_26|, ULTIMATE.start_main_#t~ite74=|v_ULTIMATE.start_main_#t~ite74_26|, ULTIMATE.start_main_#t~ite71=|v_ULTIMATE.start_main_#t~ite71_30|, ULTIMATE.start_main_#t~ite72=|v_ULTIMATE.start_main_#t~ite72_42|, #memory_int=|v_#memory_int_254|, ~#x~0.base=|v_~#x~0.base_166|} AuxVars[|v_ULTIMATE.start_main_#t~ite72_46|, |v_ULTIMATE.start_main_#t~ite71_36|, |v_ULTIMATE.start_main_#t~mem70_43|] AssignedVars[ULTIMATE.start_main_#t~ite73, ~x$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite74, ULTIMATE.start_main_#t~ite71, ULTIMATE.start_main_#t~ite72, #memory_int, ~x$w_buff1_used~0, ULTIMATE.start_main_#t~mem70, ~x$r_buff1_thd0~0, ULTIMATE.start_main_#t~ite75, ULTIMATE.start_main_#t~ite76, ~x$w_buff0_used~0] under condition 481#(and (<= 1 ~x$w_buff0_used~0) (<= (div ~x$w_buff0_used~0 256) 0) (= ~__unbuffered_p0_EAX~0 0) (= 1 ~x$r_buff0_thd1~0)) [2021-01-26 23:11:06,145 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-26 23:11:06,228 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-26 23:11:06,345 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-26 23:11:06,396 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-26 23:11:06,414 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check Size of Word is: 75 and size of Sequence is : 76[2021-01-26 23:11:06,466 INFO L164 SleepSetCegar]: Size of mCounterexample is: 76 [2021-01-26 23:11:06,467 INFO L165 SleepSetCegar]: [487#[ULTIMATE.startENTRY]true, 489#[L-1]true, 491#[L-1-1]true, 493#[L17]true, 495#[L17-1]true, 497#[L17-2]true, 499#[L17-3]true, 501#[L17-4]true, 503#[L710]true, 505#[L712](= ~__unbuffered_p0_EAX~0 0), 507#[L713](= ~__unbuffered_p0_EAX~0 0), 509#[L714](= ~__unbuffered_p0_EAX~0 0), 511#[L715](= ~__unbuffered_p0_EAX~0 0), 513#[L716](= ~__unbuffered_p0_EAX~0 0), 515#[L717](= ~__unbuffered_p0_EAX~0 0), 517#[L718](= ~__unbuffered_p0_EAX~0 0), 519#[L719](= ~__unbuffered_p0_EAX~0 0), 521#[L720](= ~__unbuffered_p0_EAX~0 0), 523#[L721](= ~__unbuffered_p0_EAX~0 0), 525#[L722](= ~__unbuffered_p0_EAX~0 0), 527#[L723](= ~__unbuffered_p0_EAX~0 0), 529#[L724](= ~__unbuffered_p0_EAX~0 0), 531#[L725](= ~__unbuffered_p0_EAX~0 0), 533#[L726](= ~__unbuffered_p0_EAX~0 0), 535#[L727](= ~__unbuffered_p0_EAX~0 0), 537#[L728](= ~__unbuffered_p0_EAX~0 0), 539#[L730](= ~__unbuffered_p0_EAX~0 0), 541#[L730-1](= ~__unbuffered_p0_EAX~0 0), 543#[L730-2](= ~__unbuffered_p0_EAX~0 0), 545#[L732](= ~__unbuffered_p0_EAX~0 0), 547#[L733](= ~__unbuffered_p0_EAX~0 0), 549#[L734](= ~__unbuffered_p0_EAX~0 0), 551#[L735](= ~__unbuffered_p0_EAX~0 0), 553#[L736](= ~__unbuffered_p0_EAX~0 0), 555#[L737](= ~__unbuffered_p0_EAX~0 0), 557#[L738](= ~__unbuffered_p0_EAX~0 0), 559#[L739](= ~__unbuffered_p0_EAX~0 0), 561#[L740](= ~__unbuffered_p0_EAX~0 0), 563#[L741](= ~__unbuffered_p0_EAX~0 0), 565#[L742](= ~__unbuffered_p0_EAX~0 0), 567#[L743](and (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0)), 569#[L744](and (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0)), 571#[L746](and (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0)), 575#[L747](and (= ~y~0 0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0)), 577#[L748](and (= ~y~0 0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0)), 579#[L749](and (= ~y~0 0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0)), 581#[L-1-2](and (= ~y~0 0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0)), 583#[L-1-3](and (= ~y~0 0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0)), 585#[L825](and (= ~y~0 0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0)), 587#[L825-1](and (= ~y~0 0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0)), 589#[L826](and (= ~y~0 0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0)), 591#[L826-1, P0ENTRY](and (= ~y~0 0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0)), 595#[L827, P0ENTRY](and (= ~y~0 0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0)), 599#[L827-1, P0ENTRY](and (= ~y~0 0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0)), 603#[L828, P0ENTRY](and (= ~y~0 0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0)), 607#[L828, L752](and (= ~y~0 0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0)), 609#[L828-1, P1ENTRY, L752](and (= ~y~0 0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0)), 7087#[P1ENTRY, L752, L829](and (= ~y~0 0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0)), 7097#[L831, P1ENTRY, L752](and (= ~y~0 0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0)), 7107#[P1ENTRY, L832, L752](and (= ~y~0 0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0)), 7117#[L2, P1ENTRY, L752](and (= ~y~0 0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0)), 7127#[L3, P1ENTRY, L752](and (= ~y~0 0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0)), 7140#[L2-1, P1ENTRY, L752](and (= ~y~0 0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0)), 7293#[L839, P1ENTRY, L752](and (= ~y~0 0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0)), 7301#[L839, L780, L752](and (= ~y~0 0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0)), 8667#[L798, L839, L752](and (= ~y~0 0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0)), 8672#[L839, L801, L752](and (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0)), 8677#[L839, L754, L801](= ~x$w_buff0_used~0 0), 8683#[L844, L754, L801](= ~x$w_buff0_used~0 0), 8691#[L845, L754, L801](= ~x$w_buff0_used~0 0), 8699#[L18, L754, L801](= ~x$w_buff0_used~0 0), 8707#[L18-1, L754, L801](= ~x$w_buff0_used~0 0), 8715#[L18-2, L754, L801](= ~x$w_buff0_used~0 0), 8731#[L17-5, L754, L801](= ~x$w_buff0_used~0 0), 8752#[L754, L801, L17-7](= ~x$w_buff0_used~0 0), 8777#[L754, L801, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION](= ~x$w_buff0_used~0 0)] [2021-01-26 23:11:06,467 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2021-01-26 23:11:06,468 INFO L429 AbstractCegarLoop]: === Iteration 3 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-26 23:11:06,468 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-26 23:11:06,468 INFO L82 PathProgramCache]: Analyzing trace with hash -1003426507, now seen corresponding path program 1 times [2021-01-26 23:11:06,468 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-26 23:11:06,469 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1783298322] [2021-01-26 23:11:06,469 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-26 23:11:06,697 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-26 23:11:07,223 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-26 23:11:07,224 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1783298322] [2021-01-26 23:11:07,224 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-26 23:11:07,224 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [15] imperfect sequences [] total 15 [2021-01-26 23:11:07,226 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [27734825] [2021-01-26 23:11:07,226 INFO L461 AbstractCegarLoop]: Interpolant automaton has 15 states [2021-01-26 23:11:07,226 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-26 23:11:07,237 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2021-01-26 23:11:07,238 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=49, Invalid=161, Unknown=0, NotChecked=0, Total=210 [2021-01-26 23:11:07,238 INFO L481 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2021-01-26 23:11:07,242 INFO L482 AbstractCegarLoop]: Interpolant automaton has has 15 states, 15 states have (on average 5.0) internal successors, (75), 15 states have internal predecessors, (75), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-01-26 23:11:07,417 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-26 23:11:07,600 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-26 23:11:12,430 WARN L146 IndependenceRelation]: Expensive independence query (4145 ms) for statements [1223] L801-->L808: Formula: (let ((.cse6 (= (mod v_~x$w_buff0_used~0_450 256) 0)) (.cse7 (= (mod v_~x$r_buff1_thd2~0_258 256) 0)) (.cse14 (= (mod v_~x$w_buff1_used~0_362 256) 0)) (.cse15 (= (mod v_~x$r_buff0_thd2~0_286 256) 0)) (.cse16 (= (mod v_~x$w_buff0_used~0_451 256) 0))) (let ((.cse9 (not .cse16)) (.cse10 (select |v_#memory_int_271| |v_~#x~0.base_174|)) (.cse8 (or .cse16 .cse15)) (.cse13 (or .cse7 .cse14)) (.cse0 (or .cse6 .cse15)) (.cse1 (not .cse6)) (.cse2 (not .cse15)) (.cse12 (not .cse14)) (.cse5 (not .cse7))) (and (or (and (= v_~x$r_buff0_thd2~0_286 v_~x$r_buff0_thd2~0_285) .cse0) (and (= v_~x$r_buff0_thd2~0_285 0) .cse1 .cse2)) (let ((.cse3 (= (mod v_~x$r_buff0_thd2~0_285 256) 0)) (.cse4 (= (mod v_~x$w_buff1_used~0_361 256) 0))) (or (and (= v_~x$r_buff1_thd2~0_257 0) (or (and .cse1 (not .cse3)) (and (not .cse4) .cse5))) (and (= v_~x$r_buff1_thd2~0_258 v_~x$r_buff1_thd2~0_257) (or .cse6 .cse3) (or .cse7 .cse4)))) (or (and (= v_~x$w_buff0_used~0_451 v_~x$w_buff0_used~0_450) .cse8) (and .cse9 (= v_~x$w_buff0_used~0_450 0) .cse2)) (= |v_#memory_int_270| (store |v_#memory_int_271| |v_~#x~0.base_174| (store .cse10 |v_~#x~0.offset_174| |v_P1_#t~ite63_31|))) (let ((.cse11 (= |v_P1_#t~mem61_42| |v_P1Thread1of1ForFork0_#t~mem61_1|))) (or (and .cse11 (= |v_P1_#t~ite62_37| |v_P1Thread1of1ForFork0_#t~ite62_1|) (= |v_P1_#t~ite63_31| v_~x$w_buff0~0_134) .cse9 .cse2) (and (= |v_P1_#t~ite62_37| |v_P1_#t~ite63_31|) (or (and .cse11 (= |v_P1_#t~ite62_37| v_~x$w_buff1~0_119) .cse12 .cse5) (and (= |v_P1_#t~ite62_37| |v_P1_#t~mem61_42|) .cse13 (= (select .cse10 |v_~#x~0.offset_174|) |v_P1_#t~mem61_42|))) .cse8))) (or (and (= v_~x$w_buff1_used~0_362 v_~x$w_buff1_used~0_361) .cse13 .cse0) (and (= v_~x$w_buff1_used~0_361 0) (or (and .cse1 .cse2) (and .cse12 .cse5))))))) InVars {~x$w_buff0~0=v_~x$w_buff0~0_134, P1Thread1of1ForFork0_#t~ite62=|v_P1Thread1of1ForFork0_#t~ite62_1|, ~#x~0.offset=|v_~#x~0.offset_174|, ~x$w_buff1~0=v_~x$w_buff1~0_119, #memory_int=|v_#memory_int_271|, ~#x~0.base=|v_~#x~0.base_174|, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_258, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_362, P1Thread1of1ForFork0_#t~mem61=|v_P1Thread1of1ForFork0_#t~mem61_1|, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_286, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_451} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_134, ~#x~0.offset=|v_~#x~0.offset_174|, ~x$w_buff1~0=v_~x$w_buff1~0_119, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_257, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_361, P1Thread1of1ForFork0_#t~mem61=|v_P1Thread1of1ForFork0_#t~mem61_2|, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_285, P1Thread1of1ForFork0_#t~ite66=|v_P1Thread1of1ForFork0_#t~ite66_1|, P1Thread1of1ForFork0_#t~ite67=|v_P1Thread1of1ForFork0_#t~ite67_1|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_450, P1Thread1of1ForFork0_#t~ite62=|v_P1Thread1of1ForFork0_#t~ite62_2|, P1Thread1of1ForFork0_#t~ite63=|v_P1Thread1of1ForFork0_#t~ite63_1|, P1Thread1of1ForFork0_#t~ite64=|v_P1Thread1of1ForFork0_#t~ite64_1|, P1Thread1of1ForFork0_#t~ite65=|v_P1Thread1of1ForFork0_#t~ite65_1|, #memory_int=|v_#memory_int_270|, ~#x~0.base=|v_~#x~0.base_174|} AuxVars[|v_P1_#t~ite62_37|, |v_P1_#t~mem61_42|, |v_P1_#t~ite63_31|] AssignedVars[P1Thread1of1ForFork0_#t~ite62, P1Thread1of1ForFork0_#t~ite63, P1Thread1of1ForFork0_#t~ite64, P1Thread1of1ForFork0_#t~ite65, #memory_int, ~x$r_buff1_thd2~0, ~x$w_buff1_used~0, P1Thread1of1ForFork0_#t~mem61, ~x$r_buff0_thd2~0, P1Thread1of1ForFork0_#t~ite66, P1Thread1of1ForFork0_#t~ite67, ~x$w_buff0_used~0] and [1209] L2-1-->L839: Formula: (let ((.cse15 (= (mod v_~x$w_buff0_used~0_437 256) 0)) (.cse14 (= (mod v_~x$r_buff0_thd0~0_66 256) 0)) (.cse13 (= (mod v_~x$w_buff0_used~0_436 256) 0)) (.cse12 (= (mod v_~x$r_buff1_thd0~0_46 256) 0)) (.cse16 (= (mod v_~x$w_buff1_used~0_348 256) 0))) (let ((.cse0 (select |v_#memory_int_255| |v_~#x~0.base_166|)) (.cse4 (or .cse12 .cse16)) (.cse6 (not .cse16)) (.cse5 (not .cse12)) (.cse8 (or .cse14 .cse13)) (.cse9 (not .cse13)) (.cse7 (or .cse14 .cse15)) (.cse1 (not .cse15)) (.cse3 (not .cse14))) (and (= (store |v_#memory_int_255| |v_~#x~0.base_166| (store .cse0 |v_~#x~0.offset_166| |v_ULTIMATE.start_main_#t~ite72_46|)) |v_#memory_int_254|) (let ((.cse2 (= |v_ULTIMATE.start_main_#t~mem70_43| |v_ULTIMATE.start_main_#t~mem70_38|))) (or (and .cse1 .cse2 (= |v_ULTIMATE.start_main_#t~ite71_36| |v_ULTIMATE.start_main_#t~ite71_31|) (= v_~x$w_buff0~0_126 |v_ULTIMATE.start_main_#t~ite72_46|) .cse3) (and (or (and (= |v_ULTIMATE.start_main_#t~mem70_43| |v_ULTIMATE.start_main_#t~ite71_36|) (= |v_ULTIMATE.start_main_#t~mem70_43| (select .cse0 |v_~#x~0.offset_166|)) .cse4) (and (= |v_ULTIMATE.start_main_#t~ite71_36| v_~x$w_buff1~0_111) .cse2 .cse5 .cse6)) .cse7 (= |v_ULTIMATE.start_main_#t~ite71_36| |v_ULTIMATE.start_main_#t~ite72_46|)))) (or (and (= v_~x$w_buff1_used~0_348 v_~x$w_buff1_used~0_347) .cse4 .cse8) (and (or (and .cse5 .cse6) (and .cse9 .cse3)) (= v_~x$w_buff1_used~0_347 0))) (let ((.cse10 (= (mod v_~x$w_buff1_used~0_347 256) 0)) (.cse11 (= (mod v_~x$r_buff0_thd0~0_65 256) 0))) (or (and (= v_~x$r_buff1_thd0~0_45 0) (or (and (not .cse10) .cse5) (and (not .cse11) .cse9))) (and (or .cse10 .cse12) (= v_~x$r_buff1_thd0~0_45 v_~x$r_buff1_thd0~0_46) (or .cse13 .cse11)))) (or (and (= v_~x$r_buff0_thd0~0_66 v_~x$r_buff0_thd0~0_65) .cse8) (and (= v_~x$r_buff0_thd0~0_65 0) .cse9 .cse3)) (or (and (= v_~x$w_buff0_used~0_437 v_~x$w_buff0_used~0_436) .cse7) (and .cse1 (= v_~x$w_buff0_used~0_436 0) .cse3))))) InVars {~x$w_buff0~0=v_~x$w_buff0~0_126, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_66, ULTIMATE.start_main_#t~ite71=|v_ULTIMATE.start_main_#t~ite71_31|, ~#x~0.offset=|v_~#x~0.offset_166|, ~x$w_buff1~0=v_~x$w_buff1~0_111, #memory_int=|v_#memory_int_255|, ~#x~0.base=|v_~#x~0.base_166|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_348, ULTIMATE.start_main_#t~mem70=|v_ULTIMATE.start_main_#t~mem70_38|, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_46, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_437} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_126, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_65, ~#x~0.offset=|v_~#x~0.offset_166|, ~x$w_buff1~0=v_~x$w_buff1~0_111, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_347, ULTIMATE.start_main_#t~mem70=|v_ULTIMATE.start_main_#t~mem70_37|, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_45, ULTIMATE.start_main_#t~ite75=|v_ULTIMATE.start_main_#t~ite75_24|, ULTIMATE.start_main_#t~ite76=|v_ULTIMATE.start_main_#t~ite76_18|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_436, ULTIMATE.start_main_#t~ite73=|v_ULTIMATE.start_main_#t~ite73_26|, ULTIMATE.start_main_#t~ite74=|v_ULTIMATE.start_main_#t~ite74_26|, ULTIMATE.start_main_#t~ite71=|v_ULTIMATE.start_main_#t~ite71_30|, ULTIMATE.start_main_#t~ite72=|v_ULTIMATE.start_main_#t~ite72_42|, #memory_int=|v_#memory_int_254|, ~#x~0.base=|v_~#x~0.base_166|} AuxVars[|v_ULTIMATE.start_main_#t~ite72_46|, |v_ULTIMATE.start_main_#t~ite71_36|, |v_ULTIMATE.start_main_#t~mem70_43|] AssignedVars[ULTIMATE.start_main_#t~ite73, ~x$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite74, ULTIMATE.start_main_#t~ite71, ULTIMATE.start_main_#t~ite72, #memory_int, ~x$w_buff1_used~0, ULTIMATE.start_main_#t~mem70, ~x$r_buff1_thd0~0, ULTIMATE.start_main_#t~ite75, ULTIMATE.start_main_#t~ite76, ~x$w_buff0_used~0] under condition 8788#(= (select |#valid| |~#x~0.base|) 1) [2021-01-26 23:11:12,552 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-26 23:11:17,016 WARN L146 IndependenceRelation]: Expensive independence query (4095 ms) for statements [1223] L801-->L808: Formula: (let ((.cse6 (= (mod v_~x$w_buff0_used~0_450 256) 0)) (.cse7 (= (mod v_~x$r_buff1_thd2~0_258 256) 0)) (.cse14 (= (mod v_~x$w_buff1_used~0_362 256) 0)) (.cse15 (= (mod v_~x$r_buff0_thd2~0_286 256) 0)) (.cse16 (= (mod v_~x$w_buff0_used~0_451 256) 0))) (let ((.cse9 (not .cse16)) (.cse10 (select |v_#memory_int_271| |v_~#x~0.base_174|)) (.cse8 (or .cse16 .cse15)) (.cse13 (or .cse7 .cse14)) (.cse0 (or .cse6 .cse15)) (.cse1 (not .cse6)) (.cse2 (not .cse15)) (.cse12 (not .cse14)) (.cse5 (not .cse7))) (and (or (and (= v_~x$r_buff0_thd2~0_286 v_~x$r_buff0_thd2~0_285) .cse0) (and (= v_~x$r_buff0_thd2~0_285 0) .cse1 .cse2)) (let ((.cse3 (= (mod v_~x$r_buff0_thd2~0_285 256) 0)) (.cse4 (= (mod v_~x$w_buff1_used~0_361 256) 0))) (or (and (= v_~x$r_buff1_thd2~0_257 0) (or (and .cse1 (not .cse3)) (and (not .cse4) .cse5))) (and (= v_~x$r_buff1_thd2~0_258 v_~x$r_buff1_thd2~0_257) (or .cse6 .cse3) (or .cse7 .cse4)))) (or (and (= v_~x$w_buff0_used~0_451 v_~x$w_buff0_used~0_450) .cse8) (and .cse9 (= v_~x$w_buff0_used~0_450 0) .cse2)) (= |v_#memory_int_270| (store |v_#memory_int_271| |v_~#x~0.base_174| (store .cse10 |v_~#x~0.offset_174| |v_P1_#t~ite63_31|))) (let ((.cse11 (= |v_P1_#t~mem61_42| |v_P1Thread1of1ForFork0_#t~mem61_1|))) (or (and .cse11 (= |v_P1_#t~ite62_37| |v_P1Thread1of1ForFork0_#t~ite62_1|) (= |v_P1_#t~ite63_31| v_~x$w_buff0~0_134) .cse9 .cse2) (and (= |v_P1_#t~ite62_37| |v_P1_#t~ite63_31|) (or (and .cse11 (= |v_P1_#t~ite62_37| v_~x$w_buff1~0_119) .cse12 .cse5) (and (= |v_P1_#t~ite62_37| |v_P1_#t~mem61_42|) .cse13 (= (select .cse10 |v_~#x~0.offset_174|) |v_P1_#t~mem61_42|))) .cse8))) (or (and (= v_~x$w_buff1_used~0_362 v_~x$w_buff1_used~0_361) .cse13 .cse0) (and (= v_~x$w_buff1_used~0_361 0) (or (and .cse1 .cse2) (and .cse12 .cse5))))))) InVars {~x$w_buff0~0=v_~x$w_buff0~0_134, P1Thread1of1ForFork0_#t~ite62=|v_P1Thread1of1ForFork0_#t~ite62_1|, ~#x~0.offset=|v_~#x~0.offset_174|, ~x$w_buff1~0=v_~x$w_buff1~0_119, #memory_int=|v_#memory_int_271|, ~#x~0.base=|v_~#x~0.base_174|, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_258, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_362, P1Thread1of1ForFork0_#t~mem61=|v_P1Thread1of1ForFork0_#t~mem61_1|, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_286, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_451} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_134, ~#x~0.offset=|v_~#x~0.offset_174|, ~x$w_buff1~0=v_~x$w_buff1~0_119, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_257, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_361, P1Thread1of1ForFork0_#t~mem61=|v_P1Thread1of1ForFork0_#t~mem61_2|, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_285, P1Thread1of1ForFork0_#t~ite66=|v_P1Thread1of1ForFork0_#t~ite66_1|, P1Thread1of1ForFork0_#t~ite67=|v_P1Thread1of1ForFork0_#t~ite67_1|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_450, P1Thread1of1ForFork0_#t~ite62=|v_P1Thread1of1ForFork0_#t~ite62_2|, P1Thread1of1ForFork0_#t~ite63=|v_P1Thread1of1ForFork0_#t~ite63_1|, P1Thread1of1ForFork0_#t~ite64=|v_P1Thread1of1ForFork0_#t~ite64_1|, P1Thread1of1ForFork0_#t~ite65=|v_P1Thread1of1ForFork0_#t~ite65_1|, #memory_int=|v_#memory_int_270|, ~#x~0.base=|v_~#x~0.base_174|} AuxVars[|v_P1_#t~ite62_37|, |v_P1_#t~mem61_42|, |v_P1_#t~ite63_31|] AssignedVars[P1Thread1of1ForFork0_#t~ite62, P1Thread1of1ForFork0_#t~ite63, P1Thread1of1ForFork0_#t~ite64, P1Thread1of1ForFork0_#t~ite65, #memory_int, ~x$r_buff1_thd2~0, ~x$w_buff1_used~0, P1Thread1of1ForFork0_#t~mem61, ~x$r_buff0_thd2~0, P1Thread1of1ForFork0_#t~ite66, P1Thread1of1ForFork0_#t~ite67, ~x$w_buff0_used~0] and [1216] L765-->L772: Formula: (let ((.cse10 (= (mod v_~x$w_buff0_used~0_444 256) 0)) (.cse14 (= 0 (mod v_~x$r_buff0_thd1~0_71 256))) (.cse15 (= (mod v_~x$w_buff0_used~0_445 256) 0)) (.cse16 (= (mod v_~x$w_buff1_used~0_356 256) 0)) (.cse13 (= (mod v_~x$r_buff1_thd1~0_52 256) 0))) (let ((.cse1 (or .cse16 .cse13)) (.cse4 (not .cse16)) (.cse8 (select |v_#memory_int_263| |v_~#x~0.base_170|)) (.cse9 (or .cse14 .cse15)) (.cse6 (not .cse15)) (.cse5 (not .cse13)) (.cse2 (not .cse14)) (.cse3 (not .cse10)) (.cse0 (or .cse14 .cse10))) (and (or (and .cse0 .cse1 (= v_~x$w_buff1_used~0_356 v_~x$w_buff1_used~0_355)) (and (= v_~x$w_buff1_used~0_355 0) (or (and .cse2 .cse3) (and .cse4 .cse5)))) (let ((.cse7 (= |v_P0_#t~mem5_54| |v_P0Thread1of1ForFork1_#t~mem5_1|))) (or (and .cse6 .cse2 (= |v_P0_#t~ite6_49| |v_P0Thread1of1ForFork1_#t~ite6_1|) .cse7 (= |v_P0_#t~ite7_39| v_~x$w_buff0~0_130)) (and (or (and .cse1 (= |v_P0_#t~ite6_49| |v_P0_#t~mem5_54|) (= (select .cse8 |v_~#x~0.offset_170|) |v_P0_#t~mem5_54|)) (and .cse4 (= |v_P0_#t~ite6_49| v_~x$w_buff1~0_115) .cse7 .cse5)) (= |v_P0_#t~ite7_39| |v_P0_#t~ite6_49|) .cse9))) (= (store |v_#memory_int_263| |v_~#x~0.base_170| (store .cse8 |v_~#x~0.offset_170| |v_P0_#t~ite7_39|)) |v_#memory_int_262|) (or (and (= v_~x$w_buff0_used~0_444 v_~x$w_buff0_used~0_445) .cse9) (and (= v_~x$w_buff0_used~0_444 0) .cse6 .cse2)) (let ((.cse11 (= (mod v_~x$r_buff0_thd1~0_70 256) 0)) (.cse12 (= (mod v_~x$w_buff1_used~0_355 256) 0))) (or (and (or .cse10 .cse11) (or .cse12 .cse13) (= v_~x$r_buff1_thd1~0_52 v_~x$r_buff1_thd1~0_51)) (and (or (and (not .cse11) .cse3) (and .cse5 (not .cse12))) (= v_~x$r_buff1_thd1~0_51 0)))) (or (and (= v_~x$r_buff0_thd1~0_70 0) .cse2 .cse3) (and .cse0 (= v_~x$r_buff0_thd1~0_71 v_~x$r_buff0_thd1~0_70)))))) InVars {~x$w_buff0~0=v_~x$w_buff0~0_130, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_71, ~#x~0.offset=|v_~#x~0.offset_170|, P0Thread1of1ForFork1_#t~ite6=|v_P0Thread1of1ForFork1_#t~ite6_1|, ~x$w_buff1~0=v_~x$w_buff1~0_115, #memory_int=|v_#memory_int_263|, ~#x~0.base=|v_~#x~0.base_170|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_356, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_52, P0Thread1of1ForFork1_#t~mem5=|v_P0Thread1of1ForFork1_#t~mem5_1|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_445} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_130, P0Thread1of1ForFork1_#t~ite10=|v_P0Thread1of1ForFork1_#t~ite10_1|, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_70, ~#x~0.offset=|v_~#x~0.offset_170|, ~x$w_buff1~0=v_~x$w_buff1~0_115, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_355, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_51, P0Thread1of1ForFork1_#t~mem5=|v_P0Thread1of1ForFork1_#t~mem5_2|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_444, P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_1|, P0Thread1of1ForFork1_#t~ite9=|v_P0Thread1of1ForFork1_#t~ite9_1|, P0Thread1of1ForFork1_#t~ite6=|v_P0Thread1of1ForFork1_#t~ite6_2|, P0Thread1of1ForFork1_#t~ite7=|v_P0Thread1of1ForFork1_#t~ite7_1|, #memory_int=|v_#memory_int_262|, ~#x~0.base=|v_~#x~0.base_170|, P0Thread1of1ForFork1_#t~ite11=|v_P0Thread1of1ForFork1_#t~ite11_1|} AuxVars[|v_P0_#t~mem5_54|, |v_P0_#t~ite7_39|, |v_P0_#t~ite6_49|] AssignedVars[P0Thread1of1ForFork1_#t~ite10, ~x$r_buff0_thd1~0, P0Thread1of1ForFork1_#t~ite8, P0Thread1of1ForFork1_#t~ite9, P0Thread1of1ForFork1_#t~ite6, P0Thread1of1ForFork1_#t~ite7, #memory_int, ~x$w_buff1_used~0, ~x$r_buff1_thd1~0, P0Thread1of1ForFork1_#t~mem5, ~x$w_buff0_used~0, P0Thread1of1ForFork1_#t~ite11] under condition 8788#(= (select |#valid| |~#x~0.base|) 1) [2021-01-26 23:11:17,034 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-26 23:11:17,142 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-26 23:11:17,295 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-26 23:11:20,204 WARN L146 IndependenceRelation]: Expensive independence query (2573 ms) for statements [1221] L780-->L798: Formula: (let ((.cse17 (mod v_~x$w_buff0_used~0_499 256)) (.cse8 (= (mod v_~x$r_buff0_thd2~0_334 256) 0)) (.cse10 (= (mod v_~x$r_buff1_thd2~0_300 256) 0))) (let ((.cse15 (select |v_#memory_int_294| |v_~#x~0.base_188|)) (.cse33 (= (mod v_~weak$$choice0~0_141 256) 0)) (.cse5 (not .cse10)) (.cse2 (not .cse8)) (.cse9 (= (mod v_~x$w_buff1_used~0_410 256) 0)) (.cse20 (= .cse17 0)) (.cse11 (= (mod v_~x$w_buff0_used~0_498 256) 0)) (.cse36 (= (mod v_~x$w_buff1_used~0_409 256) 0)) (.cse0 (= (mod v_~weak$$choice2~0_92 256) 0))) (let ((.cse14 (not .cse0)) (.cse34 (not .cse36)) (.cse12 (or .cse11 .cse8)) (.cse3 (not .cse11)) (.cse21 (or .cse8 .cse20)) (.cse23 (or .cse2 .cse9 .cse10 .cse20)) (.cse25 (or .cse5 .cse2 .cse9 .cse20)) (.cse6 (not .cse9)) (.cse27 (not .cse33)) (.cse26 (= (mod v_~weak$$choice1~0_81 256) 0)) (.cse24 (not .cse20)) (.cse51 (select .cse15 |v_~#x~0.offset_188|))) (and (let ((.cse1 (= |v_P1_#t~ite42_87| |v_P1Thread1of1ForFork0_#t~ite42_1|)) (.cse4 (= |v_P1_#t~ite43_73| |v_P1Thread1of1ForFork0_#t~ite43_1|)) (.cse13 (= |v_P1_#t~ite44_69| |v_P1Thread1of1ForFork0_#t~ite44_1|))) (or (and (= |v_P1_#t~ite45_59| v_~x$w_buff1_used~0_409) .cse0 (or (and (= |v_P1_#t~ite44_69| |v_P1_#t~ite45_59|) (or (and .cse1 .cse2 .cse3 (= |v_P1_#t~ite44_69| 0) .cse4) (and (= |v_P1_#t~ite43_73| |v_P1_#t~ite44_69|) (or (and (= |v_P1_#t~ite42_87| |v_P1_#t~ite43_73|) (let ((.cse7 (= |v_P1_#t~ite42_87| 0))) (or (and .cse5 .cse6 .cse7 .cse3 .cse8) (and .cse7 (or .cse2 .cse9 .cse10 .cse11)))) (or .cse5 .cse2 .cse9 .cse11)) (and .cse6 .cse1 .cse3 (= |v_P1_#t~ite43_73| v_~weak$$choice0~0_141) .cse10 .cse8)) .cse12)) .cse3) (and (= |v_P1_#t~ite45_59| v_~x$w_buff1_used~0_410) .cse1 .cse11 .cse4 .cse13))) (and .cse14 .cse1 (= |v_P1_#t~ite45_59| |v_P1Thread1of1ForFork0_#t~ite45_1|) (= v_~x$w_buff1_used~0_410 v_~x$w_buff1_used~0_409) .cse4 .cse13))) (= v_~__unbuffered_p1_EAX$read_delayed~0_27 1) (= (store |v_#memory_int_294| |v_~#x~0.base_188| (store .cse15 |v_~#x~0.offset_188| |v_P1_#t~ite60_29|)) |v_#memory_int_292|) (or (and (= |v_P1_#t~ite60_29| v_~x$mem_tmp~0_28) .cse14 (= |v_P1_#t~mem59_30| |v_P1Thread1of1ForFork0_#t~mem59_1|)) (and (= |v_P1_#t~ite60_29| |v_P1_#t~mem59_30|) (= |v_P1_#t~mem59_30| v_~__unbuffered_p1_EAX~0_41) .cse0)) (let ((.cse19 (= |v_P1_#t~ite39_73| |v_P1Thread1of1ForFork0_#t~ite39_1|)) (.cse16 (= |v_P1_#t~ite38_87| |v_P1Thread1of1ForFork0_#t~ite38_1|)) (.cse18 (= |v_P1_#t~ite37_91| |v_P1Thread1of1ForFork0_#t~ite37_1|))) (or (and .cse16 .cse14 (= |v_P1_#t~ite40_63| |v_P1Thread1of1ForFork0_#t~ite40_1|) (= |v_P1_#t~ite41_59| .cse17) .cse18 .cse19) (and (or (and .cse16 .cse18 .cse19 (= |v_P1_#t~ite40_63| .cse17) .cse20) (and (or (and .cse21 (= |v_P1_#t~ite38_87| |v_P1_#t~ite39_73|) (or (and (let ((.cse22 (= |v_P1_#t~ite37_91| v_~weak$$choice0~0_141))) (or (and .cse22 .cse23) (and .cse5 .cse6 .cse24 .cse22 .cse8))) .cse25 (= |v_P1_#t~ite38_87| (mod |v_P1_#t~ite37_91| 256))) (and .cse6 .cse24 .cse18 .cse10 (= |v_P1_#t~ite38_87| (ite (or .cse26 .cse27) 1 0)) .cse8))) (and (= |v_P1_#t~ite39_73| 0) .cse16 .cse2 .cse24 .cse18)) (= |v_P1_#t~ite39_73| |v_P1_#t~ite40_63|) .cse24)) (= |v_P1_#t~ite40_63| |v_P1_#t~ite41_59|) .cse0))) (= v_~__unbuffered_p1_EAX$read_delayed_var~0.offset_30 |v_~#x~0.offset_188|) (let ((.cse28 (= |v_P1Thread1of1ForFork0_#t~ite53_1| |v_P1_#t~ite53_61|)) (.cse29 (= |v_P1Thread1of1ForFork0_#t~ite55_1| |v_P1_#t~ite55_41|)) (.cse30 (= |v_P1Thread1of1ForFork0_#t~ite52_1| |v_P1_#t~ite52_65|)) (.cse31 (= |v_P1Thread1of1ForFork0_#t~ite54_1| |v_P1_#t~ite54_59|))) (or (and (= |v_P1_#t~ite56_35| v_~x$r_buff1_thd2~0_299) .cse0 (or (and (= |v_P1_#t~ite56_35| v_~x$r_buff1_thd2~0_300) .cse28 .cse29 .cse30 .cse11 .cse31) (and .cse3 (let ((.cse35 (= (mod v_~x$r_buff0_thd2~0_333 256) 0))) (let ((.cse32 (not .cse35))) (or (and .cse28 .cse3 .cse32 .cse30 (= |v_P1_#t~ite55_41| 0) .cse31) (and (or (and .cse28 .cse3 (= |v_P1_#t~ite52_65| |v_P1_#t~ite54_59|) (or (and .cse33 (= |v_P1_#t~ite52_65| 0)) (and (= |v_P1_#t~ite52_65| v_~x$r_buff1_thd2~0_300) .cse27)) .cse34 .cse35 .cse10) (and (or .cse36 .cse5 .cse32 .cse11) .cse30 (= |v_P1_#t~ite53_61| |v_P1_#t~ite54_59|) (let ((.cse37 (= |v_P1_#t~ite53_61| 0))) (or (and .cse5 .cse3 .cse34 .cse37 .cse35) (and (or .cse36 .cse32 .cse10 .cse11) .cse37))))) (= |v_P1_#t~ite54_59| |v_P1_#t~ite55_41|) (or .cse35 .cse11))))) (= |v_P1_#t~ite56_35| |v_P1_#t~ite55_41|)))) (and .cse14 (= |v_P1Thread1of1ForFork0_#t~ite56_1| |v_P1_#t~ite56_35|) .cse28 (= v_~x$r_buff1_thd2~0_299 v_~x$r_buff1_thd2~0_300) .cse29 .cse30 .cse31))) (= |v_P1Thread1of1ForFork0_#t~nondet13_1| v_~weak$$choice2~0_92) (= v_~x$flush_delayed~0_44 0) (let ((.cse40 (= |v_P1_#t~ite34_59| |v_P1Thread1of1ForFork0_#t~ite34_1|)) (.cse38 (= |v_P1_#t~ite33_73| |v_P1Thread1of1ForFork0_#t~ite33_1|)) (.cse39 (= |v_P1_#t~ite32_79| |v_P1Thread1of1ForFork0_#t~ite32_1|))) (or (and (= v_~x$w_buff1~0_149 v_~x$w_buff1~0_150) .cse14 .cse38 .cse39 .cse40 (= |v_P1_#t~ite35_51| |v_P1Thread1of1ForFork0_#t~ite35_1|)) (and (= |v_P1_#t~ite35_51| v_~x$w_buff1~0_149) .cse0 (or (and (= |v_P1_#t~ite35_51| v_~x$w_buff1~0_150) .cse38 .cse39 .cse40 .cse20) (and .cse24 (or (and .cse38 .cse39 .cse2 (= |v_P1_#t~ite34_59| v_~x$w_buff1~0_150) .cse24) (and .cse21 (or (and (let ((.cse41 (= |v_P1_#t~ite32_79| v_~x$w_buff1~0_150))) (or (and .cse5 .cse6 .cse24 .cse41 .cse8) (and .cse23 .cse41))) (= |v_P1_#t~ite32_79| |v_P1_#t~ite33_73|) .cse25) (and .cse6 (= |v_P1_#t~ite33_73| v_~x$w_buff1~0_150) .cse39 .cse24 .cse10 .cse8)) (= |v_P1_#t~ite33_73| |v_P1_#t~ite34_59|))) (= |v_P1_#t~ite34_59| |v_P1_#t~ite35_51|)))))) (let ((.cse42 (= |v_P1_#t~ite29_59| |v_P1Thread1of1ForFork0_#t~ite29_1|)) (.cse43 (= |v_P1_#t~ite28_69| |v_P1Thread1of1ForFork0_#t~ite28_1|)) (.cse44 (= |v_P1_#t~ite27_79| |v_P1Thread1of1ForFork0_#t~ite27_1|))) (or (and .cse14 .cse42 (= v_~x$w_buff0~0_155 v_~x$w_buff0~0_154) (= |v_P1_#t~ite30_59| |v_P1Thread1of1ForFork0_#t~ite30_1|) .cse43 .cse44) (and (= |v_P1_#t~ite30_59| v_~x$w_buff0~0_154) .cse0 (or (and (= |v_P1_#t~ite30_59| v_~x$w_buff0~0_155) .cse42 .cse43 .cse44 .cse20) (and .cse24 (= |v_P1_#t~ite29_59| |v_P1_#t~ite30_59|) (or (and (or (and (= |v_P1_#t~ite27_79| |v_P1_#t~ite28_69|) (let ((.cse45 (= |v_P1_#t~ite27_79| v_~x$w_buff0~0_155))) (or (and .cse45 .cse23) (and .cse5 .cse6 .cse24 .cse45 .cse8))) .cse25) (and .cse6 (= |v_P1_#t~ite28_69| v_~x$w_buff0~0_155) .cse24 .cse10 .cse8 .cse44)) .cse21 (= |v_P1_#t~ite28_69| |v_P1_#t~ite29_59|)) (and .cse2 .cse24 (= |v_P1_#t~ite29_59| v_~x$w_buff0~0_155) .cse43 .cse44))))))) (= |v_P1Thread1of1ForFork0_#t~nondet15_1| v_~weak$$choice1~0_81) (= v_~__unbuffered_p1_EAX$read_delayed_var~0.base_30 |v_~#x~0.base_188|) (= |v_P1Thread1of1ForFork0_#t~nondet12_1| v_~weak$$choice0~0_141) (let ((.cse48 (= |v_P1_#t~ite49_73| |v_P1Thread1of1ForFork0_#t~ite49_1|)) (.cse46 (= |v_P1_#t~ite48_77| |v_P1Thread1of1ForFork0_#t~ite48_1|)) (.cse47 (= |v_P1_#t~ite47_81| |v_P1Thread1of1ForFork0_#t~ite47_1|))) (or (and .cse46 .cse14 (= v_~x$r_buff0_thd2~0_334 v_~x$r_buff0_thd2~0_333) .cse47 (= |v_P1_#t~ite50_63| |v_P1Thread1of1ForFork0_#t~ite50_1|) .cse48) (and (= |v_P1_#t~ite50_63| v_~x$r_buff0_thd2~0_333) .cse0 (or (and .cse46 (= |v_P1_#t~ite50_63| v_~x$r_buff0_thd2~0_334) .cse47 .cse48 .cse11) (and (= |v_P1_#t~ite49_73| |v_P1_#t~ite50_63|) .cse3 (or (and (or (and (= |v_P1_#t~ite47_81| |v_P1_#t~ite48_77|) (or .cse36 .cse5 .cse2 .cse11) (let ((.cse49 (= |v_P1_#t~ite47_81| 0))) (or (and .cse49 (or .cse36 .cse2 .cse10 .cse11)) (and .cse5 .cse3 .cse49 .cse34 .cse8)))) (and .cse47 .cse3 (= |v_P1_#t~ite48_77| v_~x$r_buff0_thd2~0_334) .cse34 .cse10 .cse8)) (= |v_P1_#t~ite48_77| |v_P1_#t~ite49_73|) .cse12) (and .cse46 .cse2 .cse47 .cse3 (= |v_P1_#t~ite49_73| 0)))))))) (let ((.cse54 (= |v_P1_#t~ite22_77| |v_P1Thread1of1ForFork0_#t~ite22_1|)) (.cse58 (= |v_P1_#t~ite24_73| |v_P1Thread1of1ForFork0_#t~ite24_1|)) (.cse50 (= |v_P1_#t~mem17_88| |v_P1Thread1of1ForFork0_#t~mem17_1|)) (.cse55 (= |v_P1_#t~ite19_75| |v_P1Thread1of1ForFork0_#t~ite19_1|)) (.cse57 (= |v_P1_#t~ite23_83| |v_P1Thread1of1ForFork0_#t~ite23_1|)) (.cse53 (= |v_P1_#t~ite20_75| |v_P1Thread1of1ForFork0_#t~ite20_1|)) (.cse56 (= |v_P1_#t~ite18_85| |v_P1Thread1of1ForFork0_#t~ite18_1|)) (.cse52 (= |v_P1_#t~mem21_90| |v_P1Thread1of1ForFork0_#t~mem21_1|))) (or (and (= |v_P1_#t~ite25_55| v_~__unbuffered_p1_EAX~0_41) (= |v_P1_#t~mem16_52| |v_P1Thread1of1ForFork0_#t~mem16_1|) .cse24 (or (and .cse21 (= |v_P1_#t~ite24_73| |v_P1_#t~ite25_55|) (or (and .cse50 (or (and (or (and (= |v_P1_#t~mem21_90| .cse51) .cse33 (= |v_P1_#t~ite22_77| |v_P1_#t~mem21_90|)) (and (= |v_P1_#t~ite22_77| v_~x$w_buff0~0_155) .cse27 .cse52)) (= |v_P1_#t~ite22_77| |v_P1_#t~ite23_83|) .cse53 .cse23) (and .cse5 .cse54 .cse6 .cse24 (= |v_P1_#t~ite23_83| |v_P1_#t~ite20_75|) (or (and (= |v_P1_#t~ite20_75| v_~x$w_buff1~0_150) .cse27) (and (= |v_P1_#t~ite20_75| v_~x$w_buff0~0_155) .cse33)) .cse8 .cse52)) .cse55 .cse56 .cse25 (= |v_P1_#t~ite23_83| |v_P1_#t~ite24_73|)) (and .cse54 .cse6 (= |v_P1_#t~ite19_75| |v_P1_#t~ite24_73|) .cse24 .cse57 .cse53 .cse10 (or (and (= |v_P1_#t~ite19_75| |v_P1_#t~mem17_88|) (= |v_P1_#t~mem17_88| .cse51) .cse56 .cse27) (and .cse50 .cse33 (= |v_P1_#t~ite18_85| |v_P1_#t~ite19_75|) (or (and (= |v_P1_#t~ite18_85| v_~x$w_buff0~0_155) (not .cse26)) (and (= |v_P1_#t~ite18_85| v_~x$w_buff1~0_150) .cse26)))) .cse8 .cse52))) (and (= |v_P1_#t~ite25_55| v_~x$w_buff0~0_155) .cse54 .cse58 .cse50 .cse2 .cse24 .cse55 .cse57 .cse53 .cse56 .cse52))) (and .cse54 .cse58 .cse50 (= |v_P1_#t~ite25_55| |v_P1Thread1of1ForFork0_#t~ite25_1|) .cse55 .cse57 .cse53 .cse56 .cse20 (= |v_P1_#t~mem16_52| .cse51) (= |v_P1_#t~mem16_52| v_~__unbuffered_p1_EAX~0_41) .cse52))) (= v_~x$w_buff0_used~0_498 (ite (= |v_P1_#t~ite41_59| 0) 0 1)) (= v_~x$mem_tmp~0_28 .cse51))))) InVars {~x$w_buff0~0=v_~x$w_buff0~0_155, P1Thread1of1ForFork0_#t~mem21=|v_P1Thread1of1ForFork0_#t~mem21_1|, P1Thread1of1ForFork0_#t~ite47=|v_P1Thread1of1ForFork0_#t~ite47_1|, P1Thread1of1ForFork0_#t~ite24=|v_P1Thread1of1ForFork0_#t~ite24_1|, P1Thread1of1ForFork0_#t~ite22=|v_P1Thread1of1ForFork0_#t~ite22_1|, P1Thread1of1ForFork0_#t~ite45=|v_P1Thread1of1ForFork0_#t~ite45_1|, P1Thread1of1ForFork0_#t~ite28=|v_P1Thread1of1ForFork0_#t~ite28_1|, P1Thread1of1ForFork0_#t~ite49=|v_P1Thread1of1ForFork0_#t~ite49_1|, P1Thread1of1ForFork0_#t~ite43=|v_P1Thread1of1ForFork0_#t~ite43_1|, P1Thread1of1ForFork0_#t~ite20=|v_P1Thread1of1ForFork0_#t~ite20_1|, P1Thread1of1ForFork0_#t~nondet12=|v_P1Thread1of1ForFork0_#t~nondet12_1|, P1Thread1of1ForFork0_#t~ite19=|v_P1Thread1of1ForFork0_#t~ite19_1|, ~#x~0.offset=|v_~#x~0.offset_188|, ~x$w_buff1~0=v_~x$w_buff1~0_150, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_300, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_410, P1Thread1of1ForFork0_#t~ite34=|v_P1Thread1of1ForFork0_#t~ite34_1|, P1Thread1of1ForFork0_#t~ite55=|v_P1Thread1of1ForFork0_#t~ite55_1|, P1Thread1of1ForFork0_#t~ite38=|v_P1Thread1of1ForFork0_#t~ite38_1|, P1Thread1of1ForFork0_#t~ite53=|v_P1Thread1of1ForFork0_#t~ite53_1|, P1Thread1of1ForFork0_#t~ite32=|v_P1Thread1of1ForFork0_#t~ite32_1|, P1Thread1of1ForFork0_#t~ite30=|v_P1Thread1of1ForFork0_#t~ite30_1|, P1Thread1of1ForFork0_#t~mem16=|v_P1Thread1of1ForFork0_#t~mem16_1|, P1Thread1of1ForFork0_#t~ite25=|v_P1Thread1of1ForFork0_#t~ite25_1|, P1Thread1of1ForFork0_#t~ite23=|v_P1Thread1of1ForFork0_#t~ite23_1|, P1Thread1of1ForFork0_#t~ite44=|v_P1Thread1of1ForFork0_#t~ite44_1|, P1Thread1of1ForFork0_#t~ite29=|v_P1Thread1of1ForFork0_#t~ite29_1|, P1Thread1of1ForFork0_#t~ite27=|v_P1Thread1of1ForFork0_#t~ite27_1|, P1Thread1of1ForFork0_#t~ite48=|v_P1Thread1of1ForFork0_#t~ite48_1|, P1Thread1of1ForFork0_#t~nondet13=|v_P1Thread1of1ForFork0_#t~nondet13_1|, P1Thread1of1ForFork0_#t~nondet15=|v_P1Thread1of1ForFork0_#t~nondet15_1|, P1Thread1of1ForFork0_#t~ite42=|v_P1Thread1of1ForFork0_#t~ite42_1|, P1Thread1of1ForFork0_#t~ite40=|v_P1Thread1of1ForFork0_#t~ite40_1|, P1Thread1of1ForFork0_#t~mem59=|v_P1Thread1of1ForFork0_#t~mem59_1|, P1Thread1of1ForFork0_#t~ite35=|v_P1Thread1of1ForFork0_#t~ite35_1|, P1Thread1of1ForFork0_#t~ite33=|v_P1Thread1of1ForFork0_#t~ite33_1|, P1Thread1of1ForFork0_#t~ite56=|v_P1Thread1of1ForFork0_#t~ite56_1|, P1Thread1of1ForFork0_#t~ite39=|v_P1Thread1of1ForFork0_#t~ite39_1|, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_334, P1Thread1of1ForFork0_#t~ite37=|v_P1Thread1of1ForFork0_#t~ite37_1|, P1Thread1of1ForFork0_#t~ite18=|v_P1Thread1of1ForFork0_#t~ite18_1|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_499, P1Thread1of1ForFork0_#t~ite50=|v_P1Thread1of1ForFork0_#t~ite50_1|, P1Thread1of1ForFork0_#t~ite54=|v_P1Thread1of1ForFork0_#t~ite54_1|, P1Thread1of1ForFork0_#t~ite52=|v_P1Thread1of1ForFork0_#t~ite52_1|, #memory_int=|v_#memory_int_294|, ~#x~0.base=|v_~#x~0.base_188|, P1Thread1of1ForFork0_#t~mem17=|v_P1Thread1of1ForFork0_#t~mem17_1|} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_154, P1Thread1of1ForFork0_#t~mem21=|v_P1Thread1of1ForFork0_#t~mem21_2|, ~x$flush_delayed~0=v_~x$flush_delayed~0_44, P1Thread1of1ForFork0_#t~ite47=|v_P1Thread1of1ForFork0_#t~ite47_2|, P1Thread1of1ForFork0_#t~ite24=|v_P1Thread1of1ForFork0_#t~ite24_2|, P1Thread1of1ForFork0_#t~ite22=|v_P1Thread1of1ForFork0_#t~ite22_2|, P1Thread1of1ForFork0_#t~ite45=|v_P1Thread1of1ForFork0_#t~ite45_2|, P1Thread1of1ForFork0_#t~ite28=|v_P1Thread1of1ForFork0_#t~ite28_2|, P1Thread1of1ForFork0_#t~ite26=|v_P1Thread1of1ForFork0_#t~ite26_1|, P1Thread1of1ForFork0_#t~ite49=|v_P1Thread1of1ForFork0_#t~ite49_2|, ~weak$$choice1~0=v_~weak$$choice1~0_81, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_41, P1Thread1of1ForFork0_#t~ite43=|v_P1Thread1of1ForFork0_#t~ite43_2|, P1Thread1of1ForFork0_#t~ite20=|v_P1Thread1of1ForFork0_#t~ite20_2|, P1Thread1of1ForFork0_#t~ite60=|v_P1Thread1of1ForFork0_#t~ite60_1|, P1Thread1of1ForFork0_#t~ite41=|v_P1Thread1of1ForFork0_#t~ite41_1|, ~__unbuffered_p1_EAX$read_delayed_var~0.base=v_~__unbuffered_p1_EAX$read_delayed_var~0.base_30, P1Thread1of1ForFork0_#t~nondet12=|v_P1Thread1of1ForFork0_#t~nondet12_2|, P1Thread1of1ForFork0_#t~ite19=|v_P1Thread1of1ForFork0_#t~ite19_2|, P1Thread1of1ForFork0_#t~mem58=|v_P1Thread1of1ForFork0_#t~mem58_1|, P1Thread1of1ForFork0_#t~mem14=|v_P1Thread1of1ForFork0_#t~mem14_1|, ~#x~0.offset=|v_~#x~0.offset_188|, ~x$w_buff1~0=v_~x$w_buff1~0_149, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_299, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_409, P1Thread1of1ForFork0_#t~ite57=|v_P1Thread1of1ForFork0_#t~ite57_1|, P1Thread1of1ForFork0_#t~ite36=|v_P1Thread1of1ForFork0_#t~ite36_1|, P1Thread1of1ForFork0_#t~ite34=|v_P1Thread1of1ForFork0_#t~ite34_2|, P1Thread1of1ForFork0_#t~ite55=|v_P1Thread1of1ForFork0_#t~ite55_2|, P1Thread1of1ForFork0_#t~ite38=|v_P1Thread1of1ForFork0_#t~ite38_2|, ~weak$$choice0~0=v_~weak$$choice0~0_141, P1Thread1of1ForFork0_#t~ite53=|v_P1Thread1of1ForFork0_#t~ite53_2|, P1Thread1of1ForFork0_#t~ite32=|v_P1Thread1of1ForFork0_#t~ite32_2|, P1Thread1of1ForFork0_#t~ite30=|v_P1Thread1of1ForFork0_#t~ite30_2|, P1Thread1of1ForFork0_#t~ite51=|v_P1Thread1of1ForFork0_#t~ite51_1|, P1Thread1of1ForFork0_#t~mem16=|v_P1Thread1of1ForFork0_#t~mem16_2|, ~__unbuffered_p1_EAX$read_delayed~0=v_~__unbuffered_p1_EAX$read_delayed~0_27, P1Thread1of1ForFork0_#t~ite46=|v_P1Thread1of1ForFork0_#t~ite46_1|, P1Thread1of1ForFork0_#t~ite25=|v_P1Thread1of1ForFork0_#t~ite25_2|, ~x$mem_tmp~0=v_~x$mem_tmp~0_28, P1Thread1of1ForFork0_#t~ite23=|v_P1Thread1of1ForFork0_#t~ite23_2|, P1Thread1of1ForFork0_#t~ite44=|v_P1Thread1of1ForFork0_#t~ite44_2|, P1Thread1of1ForFork0_#t~ite29=|v_P1Thread1of1ForFork0_#t~ite29_2|, P1Thread1of1ForFork0_#t~ite27=|v_P1Thread1of1ForFork0_#t~ite27_2|, P1Thread1of1ForFork0_#t~ite48=|v_P1Thread1of1ForFork0_#t~ite48_2|, P1Thread1of1ForFork0_#t~nondet13=|v_P1Thread1of1ForFork0_#t~nondet13_2|, P1Thread1of1ForFork0_#t~nondet15=|v_P1Thread1of1ForFork0_#t~nondet15_2|, P1Thread1of1ForFork0_#t~ite42=|v_P1Thread1of1ForFork0_#t~ite42_2|, P1Thread1of1ForFork0_#t~ite40=|v_P1Thread1of1ForFork0_#t~ite40_2|, P1Thread1of1ForFork0_#t~mem59=|v_P1Thread1of1ForFork0_#t~mem59_2|, P1Thread1of1ForFork0_#t~ite35=|v_P1Thread1of1ForFork0_#t~ite35_2|, ~__unbuffered_p1_EAX$read_delayed_var~0.offset=v_~__unbuffered_p1_EAX$read_delayed_var~0.offset_30, P1Thread1of1ForFork0_#t~ite33=|v_P1Thread1of1ForFork0_#t~ite33_2|, P1Thread1of1ForFork0_#t~ite56=|v_P1Thread1of1ForFork0_#t~ite56_2|, P1Thread1of1ForFork0_#t~ite39=|v_P1Thread1of1ForFork0_#t~ite39_2|, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_333, P1Thread1of1ForFork0_#t~ite37=|v_P1Thread1of1ForFork0_#t~ite37_2|, P1Thread1of1ForFork0_#t~ite18=|v_P1Thread1of1ForFork0_#t~ite18_2|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_498, P1Thread1of1ForFork0_#t~ite50=|v_P1Thread1of1ForFork0_#t~ite50_2|, P1Thread1of1ForFork0_#t~ite54=|v_P1Thread1of1ForFork0_#t~ite54_2|, P1Thread1of1ForFork0_#t~ite31=|v_P1Thread1of1ForFork0_#t~ite31_1|, P1Thread1of1ForFork0_#t~ite52=|v_P1Thread1of1ForFork0_#t~ite52_2|, #memory_int=|v_#memory_int_292|, ~#x~0.base=|v_~#x~0.base_188|, P1Thread1of1ForFork0_#t~mem17=|v_P1Thread1of1ForFork0_#t~mem17_2|, ~weak$$choice2~0=v_~weak$$choice2~0_92} AuxVars[|v_P1_#t~mem16_52|, |v_P1_#t~ite22_77|, |v_P1_#t~ite20_75|, |v_P1_#t~mem17_88|, |v_P1_#t~ite49_73|, |v_P1_#t~ite23_83|, |v_P1_#t~ite30_59|, |v_P1_#t~ite52_65|, |v_P1_#t~ite34_59|, |v_P1_#t~ite50_63|, |v_P1_#t~ite24_73|, |v_P1_#t~ite60_29|, |v_P1_#t~ite32_79|, |v_P1_#t~ite54_59|, |v_P1_#t~mem21_90|, |v_P1_#t~ite33_73|, |v_P1_#t~ite39_73|, |v_P1_#t~ite38_87|, |v_P1_#t~ite35_51|, |v_P1_#t~ite43_73|, |v_P1_#t~ite37_91|, |v_P1_#t~ite40_63|, |v_P1_#t~ite42_87|, |v_P1_#t~ite25_55|, |v_P1_#t~ite27_79|, |v_P1_#t~ite28_69|, |v_P1_#t~ite29_59|, |v_P1_#t~ite41_59|, |v_P1_#t~ite48_77|, |v_P1_#t~ite53_61|, |v_P1_#t~ite55_41|, |v_P1_#t~ite47_81|, |v_P1_#t~ite56_35|, |v_P1_#t~ite19_75|, |v_P1_#t~ite18_85|, |v_P1_#t~mem59_30|, |v_P1_#t~ite44_69|, |v_P1_#t~ite45_59|] AssignedVars[~x$w_buff0~0, P1Thread1of1ForFork0_#t~mem21, ~x$flush_delayed~0, P1Thread1of1ForFork0_#t~ite47, P1Thread1of1ForFork0_#t~ite24, P1Thread1of1ForFork0_#t~ite22, P1Thread1of1ForFork0_#t~ite45, P1Thread1of1ForFork0_#t~ite28, P1Thread1of1ForFork0_#t~ite26, P1Thread1of1ForFork0_#t~ite49, ~weak$$choice1~0, ~__unbuffered_p1_EAX~0, P1Thread1of1ForFork0_#t~ite43, P1Thread1of1ForFork0_#t~ite20, P1Thread1of1ForFork0_#t~ite60, P1Thread1of1ForFork0_#t~ite41, ~__unbuffered_p1_EAX$read_delayed_var~0.base, P1Thread1of1ForFork0_#t~nondet12, P1Thread1of1ForFork0_#t~ite19, P1Thread1of1ForFork0_#t~mem58, P1Thread1of1ForFork0_#t~mem14, ~x$w_buff1~0, ~x$r_buff1_thd2~0, ~x$w_buff1_used~0, P1Thread1of1ForFork0_#t~ite57, P1Thread1of1ForFork0_#t~ite36, P1Thread1of1ForFork0_#t~ite34, P1Thread1of1ForFork0_#t~ite55, P1Thread1of1ForFork0_#t~ite38, ~weak$$choice0~0, P1Thread1of1ForFork0_#t~ite53, P1Thread1of1ForFork0_#t~ite32, P1Thread1of1ForFork0_#t~ite30, P1Thread1of1ForFork0_#t~ite51, P1Thread1of1ForFork0_#t~mem16, ~__unbuffered_p1_EAX$read_delayed~0, P1Thread1of1ForFork0_#t~ite46, P1Thread1of1ForFork0_#t~ite25, ~x$mem_tmp~0, P1Thread1of1ForFork0_#t~ite23, P1Thread1of1ForFork0_#t~ite44, P1Thread1of1ForFork0_#t~ite29, P1Thread1of1ForFork0_#t~ite27, P1Thread1of1ForFork0_#t~ite48, P1Thread1of1ForFork0_#t~nondet13, P1Thread1of1ForFork0_#t~nondet15, P1Thread1of1ForFork0_#t~ite42, P1Thread1of1ForFork0_#t~ite40, P1Thread1of1ForFork0_#t~mem59, P1Thread1of1ForFork0_#t~ite35, ~__unbuffered_p1_EAX$read_delayed_var~0.offset, P1Thread1of1ForFork0_#t~ite33, P1Thread1of1ForFork0_#t~ite56, P1Thread1of1ForFork0_#t~ite39, ~x$r_buff0_thd2~0, P1Thread1of1ForFork0_#t~ite37, P1Thread1of1ForFork0_#t~ite18, ~x$w_buff0_used~0, P1Thread1of1ForFork0_#t~ite50, P1Thread1of1ForFork0_#t~ite54, P1Thread1of1ForFork0_#t~ite31, P1Thread1of1ForFork0_#t~ite52, #memory_int, P1Thread1of1ForFork0_#t~mem17, ~weak$$choice2~0] and [1209] L2-1-->L839: Formula: (let ((.cse15 (= (mod v_~x$w_buff0_used~0_437 256) 0)) (.cse14 (= (mod v_~x$r_buff0_thd0~0_66 256) 0)) (.cse13 (= (mod v_~x$w_buff0_used~0_436 256) 0)) (.cse12 (= (mod v_~x$r_buff1_thd0~0_46 256) 0)) (.cse16 (= (mod v_~x$w_buff1_used~0_348 256) 0))) (let ((.cse0 (select |v_#memory_int_255| |v_~#x~0.base_166|)) (.cse4 (or .cse12 .cse16)) (.cse6 (not .cse16)) (.cse5 (not .cse12)) (.cse8 (or .cse14 .cse13)) (.cse9 (not .cse13)) (.cse7 (or .cse14 .cse15)) (.cse1 (not .cse15)) (.cse3 (not .cse14))) (and (= (store |v_#memory_int_255| |v_~#x~0.base_166| (store .cse0 |v_~#x~0.offset_166| |v_ULTIMATE.start_main_#t~ite72_46|)) |v_#memory_int_254|) (let ((.cse2 (= |v_ULTIMATE.start_main_#t~mem70_43| |v_ULTIMATE.start_main_#t~mem70_38|))) (or (and .cse1 .cse2 (= |v_ULTIMATE.start_main_#t~ite71_36| |v_ULTIMATE.start_main_#t~ite71_31|) (= v_~x$w_buff0~0_126 |v_ULTIMATE.start_main_#t~ite72_46|) .cse3) (and (or (and (= |v_ULTIMATE.start_main_#t~mem70_43| |v_ULTIMATE.start_main_#t~ite71_36|) (= |v_ULTIMATE.start_main_#t~mem70_43| (select .cse0 |v_~#x~0.offset_166|)) .cse4) (and (= |v_ULTIMATE.start_main_#t~ite71_36| v_~x$w_buff1~0_111) .cse2 .cse5 .cse6)) .cse7 (= |v_ULTIMATE.start_main_#t~ite71_36| |v_ULTIMATE.start_main_#t~ite72_46|)))) (or (and (= v_~x$w_buff1_used~0_348 v_~x$w_buff1_used~0_347) .cse4 .cse8) (and (or (and .cse5 .cse6) (and .cse9 .cse3)) (= v_~x$w_buff1_used~0_347 0))) (let ((.cse10 (= (mod v_~x$w_buff1_used~0_347 256) 0)) (.cse11 (= (mod v_~x$r_buff0_thd0~0_65 256) 0))) (or (and (= v_~x$r_buff1_thd0~0_45 0) (or (and (not .cse10) .cse5) (and (not .cse11) .cse9))) (and (or .cse10 .cse12) (= v_~x$r_buff1_thd0~0_45 v_~x$r_buff1_thd0~0_46) (or .cse13 .cse11)))) (or (and (= v_~x$r_buff0_thd0~0_66 v_~x$r_buff0_thd0~0_65) .cse8) (and (= v_~x$r_buff0_thd0~0_65 0) .cse9 .cse3)) (or (and (= v_~x$w_buff0_used~0_437 v_~x$w_buff0_used~0_436) .cse7) (and .cse1 (= v_~x$w_buff0_used~0_436 0) .cse3))))) InVars {~x$w_buff0~0=v_~x$w_buff0~0_126, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_66, ULTIMATE.start_main_#t~ite71=|v_ULTIMATE.start_main_#t~ite71_31|, ~#x~0.offset=|v_~#x~0.offset_166|, ~x$w_buff1~0=v_~x$w_buff1~0_111, #memory_int=|v_#memory_int_255|, ~#x~0.base=|v_~#x~0.base_166|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_348, ULTIMATE.start_main_#t~mem70=|v_ULTIMATE.start_main_#t~mem70_38|, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_46, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_437} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_126, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_65, ~#x~0.offset=|v_~#x~0.offset_166|, ~x$w_buff1~0=v_~x$w_buff1~0_111, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_347, ULTIMATE.start_main_#t~mem70=|v_ULTIMATE.start_main_#t~mem70_37|, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_45, ULTIMATE.start_main_#t~ite75=|v_ULTIMATE.start_main_#t~ite75_24|, ULTIMATE.start_main_#t~ite76=|v_ULTIMATE.start_main_#t~ite76_18|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_436, ULTIMATE.start_main_#t~ite73=|v_ULTIMATE.start_main_#t~ite73_26|, ULTIMATE.start_main_#t~ite74=|v_ULTIMATE.start_main_#t~ite74_26|, ULTIMATE.start_main_#t~ite71=|v_ULTIMATE.start_main_#t~ite71_30|, ULTIMATE.start_main_#t~ite72=|v_ULTIMATE.start_main_#t~ite72_42|, #memory_int=|v_#memory_int_254|, ~#x~0.base=|v_~#x~0.base_166|} AuxVars[|v_ULTIMATE.start_main_#t~ite72_46|, |v_ULTIMATE.start_main_#t~ite71_36|, |v_ULTIMATE.start_main_#t~mem70_43|] AssignedVars[ULTIMATE.start_main_#t~ite73, ~x$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite74, ULTIMATE.start_main_#t~ite71, ULTIMATE.start_main_#t~ite72, #memory_int, ~x$w_buff1_used~0, ULTIMATE.start_main_#t~mem70, ~x$r_buff1_thd0~0, ULTIMATE.start_main_#t~ite75, ULTIMATE.start_main_#t~ite76, ~x$w_buff0_used~0] under condition 8791#(and (= (select |#valid| |~#x~0.base|) 1) (= 0 ~x$r_buff0_thd0~0) (= ~x$r_buff1_thd0~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0)) [2021-01-26 23:11:24,292 WARN L146 IndependenceRelation]: Expensive independence query (4086 ms) for statements [1216] L765-->L772: Formula: (let ((.cse10 (= (mod v_~x$w_buff0_used~0_444 256) 0)) (.cse14 (= 0 (mod v_~x$r_buff0_thd1~0_71 256))) (.cse15 (= (mod v_~x$w_buff0_used~0_445 256) 0)) (.cse16 (= (mod v_~x$w_buff1_used~0_356 256) 0)) (.cse13 (= (mod v_~x$r_buff1_thd1~0_52 256) 0))) (let ((.cse1 (or .cse16 .cse13)) (.cse4 (not .cse16)) (.cse8 (select |v_#memory_int_263| |v_~#x~0.base_170|)) (.cse9 (or .cse14 .cse15)) (.cse6 (not .cse15)) (.cse5 (not .cse13)) (.cse2 (not .cse14)) (.cse3 (not .cse10)) (.cse0 (or .cse14 .cse10))) (and (or (and .cse0 .cse1 (= v_~x$w_buff1_used~0_356 v_~x$w_buff1_used~0_355)) (and (= v_~x$w_buff1_used~0_355 0) (or (and .cse2 .cse3) (and .cse4 .cse5)))) (let ((.cse7 (= |v_P0_#t~mem5_54| |v_P0Thread1of1ForFork1_#t~mem5_1|))) (or (and .cse6 .cse2 (= |v_P0_#t~ite6_49| |v_P0Thread1of1ForFork1_#t~ite6_1|) .cse7 (= |v_P0_#t~ite7_39| v_~x$w_buff0~0_130)) (and (or (and .cse1 (= |v_P0_#t~ite6_49| |v_P0_#t~mem5_54|) (= (select .cse8 |v_~#x~0.offset_170|) |v_P0_#t~mem5_54|)) (and .cse4 (= |v_P0_#t~ite6_49| v_~x$w_buff1~0_115) .cse7 .cse5)) (= |v_P0_#t~ite7_39| |v_P0_#t~ite6_49|) .cse9))) (= (store |v_#memory_int_263| |v_~#x~0.base_170| (store .cse8 |v_~#x~0.offset_170| |v_P0_#t~ite7_39|)) |v_#memory_int_262|) (or (and (= v_~x$w_buff0_used~0_444 v_~x$w_buff0_used~0_445) .cse9) (and (= v_~x$w_buff0_used~0_444 0) .cse6 .cse2)) (let ((.cse11 (= (mod v_~x$r_buff0_thd1~0_70 256) 0)) (.cse12 (= (mod v_~x$w_buff1_used~0_355 256) 0))) (or (and (or .cse10 .cse11) (or .cse12 .cse13) (= v_~x$r_buff1_thd1~0_52 v_~x$r_buff1_thd1~0_51)) (and (or (and (not .cse11) .cse3) (and .cse5 (not .cse12))) (= v_~x$r_buff1_thd1~0_51 0)))) (or (and (= v_~x$r_buff0_thd1~0_70 0) .cse2 .cse3) (and .cse0 (= v_~x$r_buff0_thd1~0_71 v_~x$r_buff0_thd1~0_70)))))) InVars {~x$w_buff0~0=v_~x$w_buff0~0_130, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_71, ~#x~0.offset=|v_~#x~0.offset_170|, P0Thread1of1ForFork1_#t~ite6=|v_P0Thread1of1ForFork1_#t~ite6_1|, ~x$w_buff1~0=v_~x$w_buff1~0_115, #memory_int=|v_#memory_int_263|, ~#x~0.base=|v_~#x~0.base_170|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_356, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_52, P0Thread1of1ForFork1_#t~mem5=|v_P0Thread1of1ForFork1_#t~mem5_1|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_445} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_130, P0Thread1of1ForFork1_#t~ite10=|v_P0Thread1of1ForFork1_#t~ite10_1|, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_70, ~#x~0.offset=|v_~#x~0.offset_170|, ~x$w_buff1~0=v_~x$w_buff1~0_115, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_355, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_51, P0Thread1of1ForFork1_#t~mem5=|v_P0Thread1of1ForFork1_#t~mem5_2|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_444, P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_1|, P0Thread1of1ForFork1_#t~ite9=|v_P0Thread1of1ForFork1_#t~ite9_1|, P0Thread1of1ForFork1_#t~ite6=|v_P0Thread1of1ForFork1_#t~ite6_2|, P0Thread1of1ForFork1_#t~ite7=|v_P0Thread1of1ForFork1_#t~ite7_1|, #memory_int=|v_#memory_int_262|, ~#x~0.base=|v_~#x~0.base_170|, P0Thread1of1ForFork1_#t~ite11=|v_P0Thread1of1ForFork1_#t~ite11_1|} AuxVars[|v_P0_#t~mem5_54|, |v_P0_#t~ite7_39|, |v_P0_#t~ite6_49|] AssignedVars[P0Thread1of1ForFork1_#t~ite10, ~x$r_buff0_thd1~0, P0Thread1of1ForFork1_#t~ite8, P0Thread1of1ForFork1_#t~ite9, P0Thread1of1ForFork1_#t~ite6, P0Thread1of1ForFork1_#t~ite7, #memory_int, ~x$w_buff1_used~0, ~x$r_buff1_thd1~0, P0Thread1of1ForFork1_#t~mem5, ~x$w_buff0_used~0, P0Thread1of1ForFork1_#t~ite11] and [1209] L2-1-->L839: Formula: (let ((.cse15 (= (mod v_~x$w_buff0_used~0_437 256) 0)) (.cse14 (= (mod v_~x$r_buff0_thd0~0_66 256) 0)) (.cse13 (= (mod v_~x$w_buff0_used~0_436 256) 0)) (.cse12 (= (mod v_~x$r_buff1_thd0~0_46 256) 0)) (.cse16 (= (mod v_~x$w_buff1_used~0_348 256) 0))) (let ((.cse0 (select |v_#memory_int_255| |v_~#x~0.base_166|)) (.cse4 (or .cse12 .cse16)) (.cse6 (not .cse16)) (.cse5 (not .cse12)) (.cse8 (or .cse14 .cse13)) (.cse9 (not .cse13)) (.cse7 (or .cse14 .cse15)) (.cse1 (not .cse15)) (.cse3 (not .cse14))) (and (= (store |v_#memory_int_255| |v_~#x~0.base_166| (store .cse0 |v_~#x~0.offset_166| |v_ULTIMATE.start_main_#t~ite72_46|)) |v_#memory_int_254|) (let ((.cse2 (= |v_ULTIMATE.start_main_#t~mem70_43| |v_ULTIMATE.start_main_#t~mem70_38|))) (or (and .cse1 .cse2 (= |v_ULTIMATE.start_main_#t~ite71_36| |v_ULTIMATE.start_main_#t~ite71_31|) (= v_~x$w_buff0~0_126 |v_ULTIMATE.start_main_#t~ite72_46|) .cse3) (and (or (and (= |v_ULTIMATE.start_main_#t~mem70_43| |v_ULTIMATE.start_main_#t~ite71_36|) (= |v_ULTIMATE.start_main_#t~mem70_43| (select .cse0 |v_~#x~0.offset_166|)) .cse4) (and (= |v_ULTIMATE.start_main_#t~ite71_36| v_~x$w_buff1~0_111) .cse2 .cse5 .cse6)) .cse7 (= |v_ULTIMATE.start_main_#t~ite71_36| |v_ULTIMATE.start_main_#t~ite72_46|)))) (or (and (= v_~x$w_buff1_used~0_348 v_~x$w_buff1_used~0_347) .cse4 .cse8) (and (or (and .cse5 .cse6) (and .cse9 .cse3)) (= v_~x$w_buff1_used~0_347 0))) (let ((.cse10 (= (mod v_~x$w_buff1_used~0_347 256) 0)) (.cse11 (= (mod v_~x$r_buff0_thd0~0_65 256) 0))) (or (and (= v_~x$r_buff1_thd0~0_45 0) (or (and (not .cse10) .cse5) (and (not .cse11) .cse9))) (and (or .cse10 .cse12) (= v_~x$r_buff1_thd0~0_45 v_~x$r_buff1_thd0~0_46) (or .cse13 .cse11)))) (or (and (= v_~x$r_buff0_thd0~0_66 v_~x$r_buff0_thd0~0_65) .cse8) (and (= v_~x$r_buff0_thd0~0_65 0) .cse9 .cse3)) (or (and (= v_~x$w_buff0_used~0_437 v_~x$w_buff0_used~0_436) .cse7) (and .cse1 (= v_~x$w_buff0_used~0_436 0) .cse3))))) InVars {~x$w_buff0~0=v_~x$w_buff0~0_126, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_66, ULTIMATE.start_main_#t~ite71=|v_ULTIMATE.start_main_#t~ite71_31|, ~#x~0.offset=|v_~#x~0.offset_166|, ~x$w_buff1~0=v_~x$w_buff1~0_111, #memory_int=|v_#memory_int_255|, ~#x~0.base=|v_~#x~0.base_166|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_348, ULTIMATE.start_main_#t~mem70=|v_ULTIMATE.start_main_#t~mem70_38|, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_46, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_437} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_126, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_65, ~#x~0.offset=|v_~#x~0.offset_166|, ~x$w_buff1~0=v_~x$w_buff1~0_111, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_347, ULTIMATE.start_main_#t~mem70=|v_ULTIMATE.start_main_#t~mem70_37|, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_45, ULTIMATE.start_main_#t~ite75=|v_ULTIMATE.start_main_#t~ite75_24|, ULTIMATE.start_main_#t~ite76=|v_ULTIMATE.start_main_#t~ite76_18|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_436, ULTIMATE.start_main_#t~ite73=|v_ULTIMATE.start_main_#t~ite73_26|, ULTIMATE.start_main_#t~ite74=|v_ULTIMATE.start_main_#t~ite74_26|, ULTIMATE.start_main_#t~ite71=|v_ULTIMATE.start_main_#t~ite71_30|, ULTIMATE.start_main_#t~ite72=|v_ULTIMATE.start_main_#t~ite72_42|, #memory_int=|v_#memory_int_254|, ~#x~0.base=|v_~#x~0.base_166|} AuxVars[|v_ULTIMATE.start_main_#t~ite72_46|, |v_ULTIMATE.start_main_#t~ite71_36|, |v_ULTIMATE.start_main_#t~mem70_43|] AssignedVars[ULTIMATE.start_main_#t~ite73, ~x$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite74, ULTIMATE.start_main_#t~ite71, ULTIMATE.start_main_#t~ite72, #memory_int, ~x$w_buff1_used~0, ULTIMATE.start_main_#t~mem70, ~x$r_buff1_thd0~0, ULTIMATE.start_main_#t~ite75, ULTIMATE.start_main_#t~ite76, ~x$w_buff0_used~0] under condition 8788#(= (select |#valid| |~#x~0.base|) 1) [2021-01-26 23:11:24,741 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-26 23:11:28,822 WARN L146 IndependenceRelation]: Expensive independence query (4080 ms) for statements [1223] L801-->L808: Formula: (let ((.cse6 (= (mod v_~x$w_buff0_used~0_450 256) 0)) (.cse7 (= (mod v_~x$r_buff1_thd2~0_258 256) 0)) (.cse14 (= (mod v_~x$w_buff1_used~0_362 256) 0)) (.cse15 (= (mod v_~x$r_buff0_thd2~0_286 256) 0)) (.cse16 (= (mod v_~x$w_buff0_used~0_451 256) 0))) (let ((.cse9 (not .cse16)) (.cse10 (select |v_#memory_int_271| |v_~#x~0.base_174|)) (.cse8 (or .cse16 .cse15)) (.cse13 (or .cse7 .cse14)) (.cse0 (or .cse6 .cse15)) (.cse1 (not .cse6)) (.cse2 (not .cse15)) (.cse12 (not .cse14)) (.cse5 (not .cse7))) (and (or (and (= v_~x$r_buff0_thd2~0_286 v_~x$r_buff0_thd2~0_285) .cse0) (and (= v_~x$r_buff0_thd2~0_285 0) .cse1 .cse2)) (let ((.cse3 (= (mod v_~x$r_buff0_thd2~0_285 256) 0)) (.cse4 (= (mod v_~x$w_buff1_used~0_361 256) 0))) (or (and (= v_~x$r_buff1_thd2~0_257 0) (or (and .cse1 (not .cse3)) (and (not .cse4) .cse5))) (and (= v_~x$r_buff1_thd2~0_258 v_~x$r_buff1_thd2~0_257) (or .cse6 .cse3) (or .cse7 .cse4)))) (or (and (= v_~x$w_buff0_used~0_451 v_~x$w_buff0_used~0_450) .cse8) (and .cse9 (= v_~x$w_buff0_used~0_450 0) .cse2)) (= |v_#memory_int_270| (store |v_#memory_int_271| |v_~#x~0.base_174| (store .cse10 |v_~#x~0.offset_174| |v_P1_#t~ite63_31|))) (let ((.cse11 (= |v_P1_#t~mem61_42| |v_P1Thread1of1ForFork0_#t~mem61_1|))) (or (and .cse11 (= |v_P1_#t~ite62_37| |v_P1Thread1of1ForFork0_#t~ite62_1|) (= |v_P1_#t~ite63_31| v_~x$w_buff0~0_134) .cse9 .cse2) (and (= |v_P1_#t~ite62_37| |v_P1_#t~ite63_31|) (or (and .cse11 (= |v_P1_#t~ite62_37| v_~x$w_buff1~0_119) .cse12 .cse5) (and (= |v_P1_#t~ite62_37| |v_P1_#t~mem61_42|) .cse13 (= (select .cse10 |v_~#x~0.offset_174|) |v_P1_#t~mem61_42|))) .cse8))) (or (and (= v_~x$w_buff1_used~0_362 v_~x$w_buff1_used~0_361) .cse13 .cse0) (and (= v_~x$w_buff1_used~0_361 0) (or (and .cse1 .cse2) (and .cse12 .cse5))))))) InVars {~x$w_buff0~0=v_~x$w_buff0~0_134, P1Thread1of1ForFork0_#t~ite62=|v_P1Thread1of1ForFork0_#t~ite62_1|, ~#x~0.offset=|v_~#x~0.offset_174|, ~x$w_buff1~0=v_~x$w_buff1~0_119, #memory_int=|v_#memory_int_271|, ~#x~0.base=|v_~#x~0.base_174|, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_258, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_362, P1Thread1of1ForFork0_#t~mem61=|v_P1Thread1of1ForFork0_#t~mem61_1|, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_286, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_451} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_134, ~#x~0.offset=|v_~#x~0.offset_174|, ~x$w_buff1~0=v_~x$w_buff1~0_119, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_257, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_361, P1Thread1of1ForFork0_#t~mem61=|v_P1Thread1of1ForFork0_#t~mem61_2|, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_285, P1Thread1of1ForFork0_#t~ite66=|v_P1Thread1of1ForFork0_#t~ite66_1|, P1Thread1of1ForFork0_#t~ite67=|v_P1Thread1of1ForFork0_#t~ite67_1|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_450, P1Thread1of1ForFork0_#t~ite62=|v_P1Thread1of1ForFork0_#t~ite62_2|, P1Thread1of1ForFork0_#t~ite63=|v_P1Thread1of1ForFork0_#t~ite63_1|, P1Thread1of1ForFork0_#t~ite64=|v_P1Thread1of1ForFork0_#t~ite64_1|, P1Thread1of1ForFork0_#t~ite65=|v_P1Thread1of1ForFork0_#t~ite65_1|, #memory_int=|v_#memory_int_270|, ~#x~0.base=|v_~#x~0.base_174|} AuxVars[|v_P1_#t~ite62_37|, |v_P1_#t~mem61_42|, |v_P1_#t~ite63_31|] AssignedVars[P1Thread1of1ForFork0_#t~ite62, P1Thread1of1ForFork0_#t~ite63, P1Thread1of1ForFork0_#t~ite64, P1Thread1of1ForFork0_#t~ite65, #memory_int, ~x$r_buff1_thd2~0, ~x$w_buff1_used~0, P1Thread1of1ForFork0_#t~mem61, ~x$r_buff0_thd2~0, P1Thread1of1ForFork0_#t~ite66, P1Thread1of1ForFork0_#t~ite67, ~x$w_buff0_used~0] and [1216] L765-->L772: Formula: (let ((.cse10 (= (mod v_~x$w_buff0_used~0_444 256) 0)) (.cse14 (= 0 (mod v_~x$r_buff0_thd1~0_71 256))) (.cse15 (= (mod v_~x$w_buff0_used~0_445 256) 0)) (.cse16 (= (mod v_~x$w_buff1_used~0_356 256) 0)) (.cse13 (= (mod v_~x$r_buff1_thd1~0_52 256) 0))) (let ((.cse1 (or .cse16 .cse13)) (.cse4 (not .cse16)) (.cse8 (select |v_#memory_int_263| |v_~#x~0.base_170|)) (.cse9 (or .cse14 .cse15)) (.cse6 (not .cse15)) (.cse5 (not .cse13)) (.cse2 (not .cse14)) (.cse3 (not .cse10)) (.cse0 (or .cse14 .cse10))) (and (or (and .cse0 .cse1 (= v_~x$w_buff1_used~0_356 v_~x$w_buff1_used~0_355)) (and (= v_~x$w_buff1_used~0_355 0) (or (and .cse2 .cse3) (and .cse4 .cse5)))) (let ((.cse7 (= |v_P0_#t~mem5_54| |v_P0Thread1of1ForFork1_#t~mem5_1|))) (or (and .cse6 .cse2 (= |v_P0_#t~ite6_49| |v_P0Thread1of1ForFork1_#t~ite6_1|) .cse7 (= |v_P0_#t~ite7_39| v_~x$w_buff0~0_130)) (and (or (and .cse1 (= |v_P0_#t~ite6_49| |v_P0_#t~mem5_54|) (= (select .cse8 |v_~#x~0.offset_170|) |v_P0_#t~mem5_54|)) (and .cse4 (= |v_P0_#t~ite6_49| v_~x$w_buff1~0_115) .cse7 .cse5)) (= |v_P0_#t~ite7_39| |v_P0_#t~ite6_49|) .cse9))) (= (store |v_#memory_int_263| |v_~#x~0.base_170| (store .cse8 |v_~#x~0.offset_170| |v_P0_#t~ite7_39|)) |v_#memory_int_262|) (or (and (= v_~x$w_buff0_used~0_444 v_~x$w_buff0_used~0_445) .cse9) (and (= v_~x$w_buff0_used~0_444 0) .cse6 .cse2)) (let ((.cse11 (= (mod v_~x$r_buff0_thd1~0_70 256) 0)) (.cse12 (= (mod v_~x$w_buff1_used~0_355 256) 0))) (or (and (or .cse10 .cse11) (or .cse12 .cse13) (= v_~x$r_buff1_thd1~0_52 v_~x$r_buff1_thd1~0_51)) (and (or (and (not .cse11) .cse3) (and .cse5 (not .cse12))) (= v_~x$r_buff1_thd1~0_51 0)))) (or (and (= v_~x$r_buff0_thd1~0_70 0) .cse2 .cse3) (and .cse0 (= v_~x$r_buff0_thd1~0_71 v_~x$r_buff0_thd1~0_70)))))) InVars {~x$w_buff0~0=v_~x$w_buff0~0_130, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_71, ~#x~0.offset=|v_~#x~0.offset_170|, P0Thread1of1ForFork1_#t~ite6=|v_P0Thread1of1ForFork1_#t~ite6_1|, ~x$w_buff1~0=v_~x$w_buff1~0_115, #memory_int=|v_#memory_int_263|, ~#x~0.base=|v_~#x~0.base_170|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_356, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_52, P0Thread1of1ForFork1_#t~mem5=|v_P0Thread1of1ForFork1_#t~mem5_1|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_445} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_130, P0Thread1of1ForFork1_#t~ite10=|v_P0Thread1of1ForFork1_#t~ite10_1|, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_70, ~#x~0.offset=|v_~#x~0.offset_170|, ~x$w_buff1~0=v_~x$w_buff1~0_115, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_355, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_51, P0Thread1of1ForFork1_#t~mem5=|v_P0Thread1of1ForFork1_#t~mem5_2|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_444, P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_1|, P0Thread1of1ForFork1_#t~ite9=|v_P0Thread1of1ForFork1_#t~ite9_1|, P0Thread1of1ForFork1_#t~ite6=|v_P0Thread1of1ForFork1_#t~ite6_2|, P0Thread1of1ForFork1_#t~ite7=|v_P0Thread1of1ForFork1_#t~ite7_1|, #memory_int=|v_#memory_int_262|, ~#x~0.base=|v_~#x~0.base_170|, P0Thread1of1ForFork1_#t~ite11=|v_P0Thread1of1ForFork1_#t~ite11_1|} AuxVars[|v_P0_#t~mem5_54|, |v_P0_#t~ite7_39|, |v_P0_#t~ite6_49|] AssignedVars[P0Thread1of1ForFork1_#t~ite10, ~x$r_buff0_thd1~0, P0Thread1of1ForFork1_#t~ite8, P0Thread1of1ForFork1_#t~ite9, P0Thread1of1ForFork1_#t~ite6, P0Thread1of1ForFork1_#t~ite7, #memory_int, ~x$w_buff1_used~0, ~x$r_buff1_thd1~0, P0Thread1of1ForFork1_#t~mem5, ~x$w_buff0_used~0, P0Thread1of1ForFork1_#t~ite11] under condition 10834#(and (= (select |#valid| |~#x~0.base|) 1) (not (= (select (select |#memory_int| ~__unbuffered_p1_EAX$read_delayed_var~0.base) ~__unbuffered_p1_EAX$read_delayed_var~0.offset) 1)) (= 0 ~x$r_buff0_thd0~0) (= ~__unbuffered_p1_EAX$read_delayed~0 1) (not (= ~__unbuffered_p1_EAX~0 1)) (= ~x$r_buff1_thd0~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0)) [2021-01-26 23:11:28,839 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-26 23:11:28,923 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-26 23:11:29,325 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-26 23:11:31,398 WARN L146 IndependenceRelation]: Expensive independence query (2043 ms) for statements [1223] L801-->L808: Formula: (let ((.cse6 (= (mod v_~x$w_buff0_used~0_450 256) 0)) (.cse7 (= (mod v_~x$r_buff1_thd2~0_258 256) 0)) (.cse14 (= (mod v_~x$w_buff1_used~0_362 256) 0)) (.cse15 (= (mod v_~x$r_buff0_thd2~0_286 256) 0)) (.cse16 (= (mod v_~x$w_buff0_used~0_451 256) 0))) (let ((.cse9 (not .cse16)) (.cse10 (select |v_#memory_int_271| |v_~#x~0.base_174|)) (.cse8 (or .cse16 .cse15)) (.cse13 (or .cse7 .cse14)) (.cse0 (or .cse6 .cse15)) (.cse1 (not .cse6)) (.cse2 (not .cse15)) (.cse12 (not .cse14)) (.cse5 (not .cse7))) (and (or (and (= v_~x$r_buff0_thd2~0_286 v_~x$r_buff0_thd2~0_285) .cse0) (and (= v_~x$r_buff0_thd2~0_285 0) .cse1 .cse2)) (let ((.cse3 (= (mod v_~x$r_buff0_thd2~0_285 256) 0)) (.cse4 (= (mod v_~x$w_buff1_used~0_361 256) 0))) (or (and (= v_~x$r_buff1_thd2~0_257 0) (or (and .cse1 (not .cse3)) (and (not .cse4) .cse5))) (and (= v_~x$r_buff1_thd2~0_258 v_~x$r_buff1_thd2~0_257) (or .cse6 .cse3) (or .cse7 .cse4)))) (or (and (= v_~x$w_buff0_used~0_451 v_~x$w_buff0_used~0_450) .cse8) (and .cse9 (= v_~x$w_buff0_used~0_450 0) .cse2)) (= |v_#memory_int_270| (store |v_#memory_int_271| |v_~#x~0.base_174| (store .cse10 |v_~#x~0.offset_174| |v_P1_#t~ite63_31|))) (let ((.cse11 (= |v_P1_#t~mem61_42| |v_P1Thread1of1ForFork0_#t~mem61_1|))) (or (and .cse11 (= |v_P1_#t~ite62_37| |v_P1Thread1of1ForFork0_#t~ite62_1|) (= |v_P1_#t~ite63_31| v_~x$w_buff0~0_134) .cse9 .cse2) (and (= |v_P1_#t~ite62_37| |v_P1_#t~ite63_31|) (or (and .cse11 (= |v_P1_#t~ite62_37| v_~x$w_buff1~0_119) .cse12 .cse5) (and (= |v_P1_#t~ite62_37| |v_P1_#t~mem61_42|) .cse13 (= (select .cse10 |v_~#x~0.offset_174|) |v_P1_#t~mem61_42|))) .cse8))) (or (and (= v_~x$w_buff1_used~0_362 v_~x$w_buff1_used~0_361) .cse13 .cse0) (and (= v_~x$w_buff1_used~0_361 0) (or (and .cse1 .cse2) (and .cse12 .cse5))))))) InVars {~x$w_buff0~0=v_~x$w_buff0~0_134, P1Thread1of1ForFork0_#t~ite62=|v_P1Thread1of1ForFork0_#t~ite62_1|, ~#x~0.offset=|v_~#x~0.offset_174|, ~x$w_buff1~0=v_~x$w_buff1~0_119, #memory_int=|v_#memory_int_271|, ~#x~0.base=|v_~#x~0.base_174|, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_258, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_362, P1Thread1of1ForFork0_#t~mem61=|v_P1Thread1of1ForFork0_#t~mem61_1|, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_286, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_451} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_134, ~#x~0.offset=|v_~#x~0.offset_174|, ~x$w_buff1~0=v_~x$w_buff1~0_119, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_257, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_361, P1Thread1of1ForFork0_#t~mem61=|v_P1Thread1of1ForFork0_#t~mem61_2|, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_285, P1Thread1of1ForFork0_#t~ite66=|v_P1Thread1of1ForFork0_#t~ite66_1|, P1Thread1of1ForFork0_#t~ite67=|v_P1Thread1of1ForFork0_#t~ite67_1|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_450, P1Thread1of1ForFork0_#t~ite62=|v_P1Thread1of1ForFork0_#t~ite62_2|, P1Thread1of1ForFork0_#t~ite63=|v_P1Thread1of1ForFork0_#t~ite63_1|, P1Thread1of1ForFork0_#t~ite64=|v_P1Thread1of1ForFork0_#t~ite64_1|, P1Thread1of1ForFork0_#t~ite65=|v_P1Thread1of1ForFork0_#t~ite65_1|, #memory_int=|v_#memory_int_270|, ~#x~0.base=|v_~#x~0.base_174|} AuxVars[|v_P1_#t~ite62_37|, |v_P1_#t~mem61_42|, |v_P1_#t~ite63_31|] AssignedVars[P1Thread1of1ForFork0_#t~ite62, P1Thread1of1ForFork0_#t~ite63, P1Thread1of1ForFork0_#t~ite64, P1Thread1of1ForFork0_#t~ite65, #memory_int, ~x$r_buff1_thd2~0, ~x$w_buff1_used~0, P1Thread1of1ForFork0_#t~mem61, ~x$r_buff0_thd2~0, P1Thread1of1ForFork0_#t~ite66, P1Thread1of1ForFork0_#t~ite67, ~x$w_buff0_used~0] and [1215] L754-->L765: Formula: (and (= |v_P0Thread1of1ForFork1_reach_error_#t~nondet2.base_3| |v_P0Thread1of1ForFork1_reach_error_#t~nondet2.base_4|) (= v_~x$w_buff0_used~0_Out_3 1) (= (ite (not (and (not (= (mod v_~x$w_buff0_used~0_Out_3 256) 0)) (not (= (mod v_~x$w_buff1_used~0_Out_3 256) 0)))) 1 0) |v_P0Thread1of1ForFork1___VERIFIER_assert_#in~expression_3|) (= v_~x$r_buff0_thd1~0_Out_1 1) (= v_~x$r_buff1_thd2~0_Out_1 v_~x$r_buff0_thd2~0_In_79) (= |v_P0Thread1of1ForFork1_reach_error_#t~nondet2.offset_3| |v_P0Thread1of1ForFork1_reach_error_#t~nondet2.offset_4|) (not (= v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_3 0)) (= v_~x$r_buff1_thd1~0_Out_1 v_~x$r_buff0_thd1~0_In_11) (= v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_3 |v_P0Thread1of1ForFork1___VERIFIER_assert_#in~expression_3|) (= v_~x$w_buff1~0_Out_3 v_~x$w_buff0~0_In_33) (= v_~x$r_buff1_thd0~0_Out_1 v_~x$r_buff0_thd0~0_In_11) (= v_~x$w_buff0~0_Out_3 1) (= v_~x$w_buff1_used~0_Out_3 v_~x$w_buff0_used~0_In_99)) InVars {~x$w_buff0~0=v_~x$w_buff0~0_In_33, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_In_11, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_In_11, P0Thread1of1ForFork1_reach_error_#t~nondet2.offset=|v_P0Thread1of1ForFork1_reach_error_#t~nondet2.offset_3|, P0Thread1of1ForFork1_reach_error_#t~nondet2.base=|v_P0Thread1of1ForFork1_reach_error_#t~nondet2.base_3|, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_In_79, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_In_99} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_Out_3, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_In_11, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_Out_1, ~x$w_buff1~0=v_~x$w_buff1~0_Out_3, P0Thread1of1ForFork1_reach_error_#t~nondet2.base=|v_P0Thread1of1ForFork1_reach_error_#t~nondet2.base_4|, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_Out_1, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_Out_3, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_Out_1, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_In_79, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_Out_1, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_Out_3, P0Thread1of1ForFork1_reach_error_#t~nondet2.offset=|v_P0Thread1of1ForFork1_reach_error_#t~nondet2.offset_4|, P0Thread1of1ForFork1___VERIFIER_assert_~expression=v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_3, P0Thread1of1ForFork1___VERIFIER_assert_#in~expression=|v_P0Thread1of1ForFork1___VERIFIER_assert_#in~expression_3|} AuxVars[] AssignedVars[~x$w_buff0~0, ~x$r_buff0_thd1~0, P0Thread1of1ForFork1_reach_error_#t~nondet2.offset, ~x$w_buff1~0, P0Thread1of1ForFork1_reach_error_#t~nondet2.base, ~x$r_buff1_thd2~0, ~x$w_buff1_used~0, P0Thread1of1ForFork1___VERIFIER_assert_~expression, ~x$r_buff1_thd1~0, ~x$r_buff1_thd0~0, P0Thread1of1ForFork1___VERIFIER_assert_#in~expression, ~x$w_buff0_used~0] under condition 10996#(and (= (select |#valid| |~#x~0.base|) 1) (not (= (select (select |#memory_int| ~__unbuffered_p1_EAX$read_delayed_var~0.base) ~__unbuffered_p1_EAX$read_delayed_var~0.offset) 1)) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 1) (not (= ~__unbuffered_p1_EAX~0 1)) (= ~x$r_buff1_thd0~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0)) [2021-01-26 23:11:31,709 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-26 23:11:31,889 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-26 23:11:32,488 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-26 23:11:32,631 WARN L193 SmtUtils]: Spent 107.00 ms on a formula simplification. DAG size of input: 53 DAG size of output: 51 [2021-01-26 23:11:32,702 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-26 23:11:32,868 WARN L193 SmtUtils]: Spent 102.00 ms on a formula simplification. DAG size of input: 50 DAG size of output: 48 [2021-01-26 23:11:32,882 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-26 23:11:32,980 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-26 23:11:33,096 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-26 23:11:37,183 WARN L146 IndependenceRelation]: Expensive independence query (4087 ms) for statements [1223] L801-->L808: Formula: (let ((.cse6 (= (mod v_~x$w_buff0_used~0_450 256) 0)) (.cse7 (= (mod v_~x$r_buff1_thd2~0_258 256) 0)) (.cse14 (= (mod v_~x$w_buff1_used~0_362 256) 0)) (.cse15 (= (mod v_~x$r_buff0_thd2~0_286 256) 0)) (.cse16 (= (mod v_~x$w_buff0_used~0_451 256) 0))) (let ((.cse9 (not .cse16)) (.cse10 (select |v_#memory_int_271| |v_~#x~0.base_174|)) (.cse8 (or .cse16 .cse15)) (.cse13 (or .cse7 .cse14)) (.cse0 (or .cse6 .cse15)) (.cse1 (not .cse6)) (.cse2 (not .cse15)) (.cse12 (not .cse14)) (.cse5 (not .cse7))) (and (or (and (= v_~x$r_buff0_thd2~0_286 v_~x$r_buff0_thd2~0_285) .cse0) (and (= v_~x$r_buff0_thd2~0_285 0) .cse1 .cse2)) (let ((.cse3 (= (mod v_~x$r_buff0_thd2~0_285 256) 0)) (.cse4 (= (mod v_~x$w_buff1_used~0_361 256) 0))) (or (and (= v_~x$r_buff1_thd2~0_257 0) (or (and .cse1 (not .cse3)) (and (not .cse4) .cse5))) (and (= v_~x$r_buff1_thd2~0_258 v_~x$r_buff1_thd2~0_257) (or .cse6 .cse3) (or .cse7 .cse4)))) (or (and (= v_~x$w_buff0_used~0_451 v_~x$w_buff0_used~0_450) .cse8) (and .cse9 (= v_~x$w_buff0_used~0_450 0) .cse2)) (= |v_#memory_int_270| (store |v_#memory_int_271| |v_~#x~0.base_174| (store .cse10 |v_~#x~0.offset_174| |v_P1_#t~ite63_31|))) (let ((.cse11 (= |v_P1_#t~mem61_42| |v_P1Thread1of1ForFork0_#t~mem61_1|))) (or (and .cse11 (= |v_P1_#t~ite62_37| |v_P1Thread1of1ForFork0_#t~ite62_1|) (= |v_P1_#t~ite63_31| v_~x$w_buff0~0_134) .cse9 .cse2) (and (= |v_P1_#t~ite62_37| |v_P1_#t~ite63_31|) (or (and .cse11 (= |v_P1_#t~ite62_37| v_~x$w_buff1~0_119) .cse12 .cse5) (and (= |v_P1_#t~ite62_37| |v_P1_#t~mem61_42|) .cse13 (= (select .cse10 |v_~#x~0.offset_174|) |v_P1_#t~mem61_42|))) .cse8))) (or (and (= v_~x$w_buff1_used~0_362 v_~x$w_buff1_used~0_361) .cse13 .cse0) (and (= v_~x$w_buff1_used~0_361 0) (or (and .cse1 .cse2) (and .cse12 .cse5))))))) InVars {~x$w_buff0~0=v_~x$w_buff0~0_134, P1Thread1of1ForFork0_#t~ite62=|v_P1Thread1of1ForFork0_#t~ite62_1|, ~#x~0.offset=|v_~#x~0.offset_174|, ~x$w_buff1~0=v_~x$w_buff1~0_119, #memory_int=|v_#memory_int_271|, ~#x~0.base=|v_~#x~0.base_174|, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_258, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_362, P1Thread1of1ForFork0_#t~mem61=|v_P1Thread1of1ForFork0_#t~mem61_1|, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_286, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_451} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_134, ~#x~0.offset=|v_~#x~0.offset_174|, ~x$w_buff1~0=v_~x$w_buff1~0_119, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_257, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_361, P1Thread1of1ForFork0_#t~mem61=|v_P1Thread1of1ForFork0_#t~mem61_2|, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_285, P1Thread1of1ForFork0_#t~ite66=|v_P1Thread1of1ForFork0_#t~ite66_1|, P1Thread1of1ForFork0_#t~ite67=|v_P1Thread1of1ForFork0_#t~ite67_1|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_450, P1Thread1of1ForFork0_#t~ite62=|v_P1Thread1of1ForFork0_#t~ite62_2|, P1Thread1of1ForFork0_#t~ite63=|v_P1Thread1of1ForFork0_#t~ite63_1|, P1Thread1of1ForFork0_#t~ite64=|v_P1Thread1of1ForFork0_#t~ite64_1|, P1Thread1of1ForFork0_#t~ite65=|v_P1Thread1of1ForFork0_#t~ite65_1|, #memory_int=|v_#memory_int_270|, ~#x~0.base=|v_~#x~0.base_174|} AuxVars[|v_P1_#t~ite62_37|, |v_P1_#t~mem61_42|, |v_P1_#t~ite63_31|] AssignedVars[P1Thread1of1ForFork0_#t~ite62, P1Thread1of1ForFork0_#t~ite63, P1Thread1of1ForFork0_#t~ite64, P1Thread1of1ForFork0_#t~ite65, #memory_int, ~x$r_buff1_thd2~0, ~x$w_buff1_used~0, P1Thread1of1ForFork0_#t~mem61, ~x$r_buff0_thd2~0, P1Thread1of1ForFork0_#t~ite66, P1Thread1of1ForFork0_#t~ite67, ~x$w_buff0_used~0] and [1216] L765-->L772: Formula: (let ((.cse10 (= (mod v_~x$w_buff0_used~0_444 256) 0)) (.cse14 (= 0 (mod v_~x$r_buff0_thd1~0_71 256))) (.cse15 (= (mod v_~x$w_buff0_used~0_445 256) 0)) (.cse16 (= (mod v_~x$w_buff1_used~0_356 256) 0)) (.cse13 (= (mod v_~x$r_buff1_thd1~0_52 256) 0))) (let ((.cse1 (or .cse16 .cse13)) (.cse4 (not .cse16)) (.cse8 (select |v_#memory_int_263| |v_~#x~0.base_170|)) (.cse9 (or .cse14 .cse15)) (.cse6 (not .cse15)) (.cse5 (not .cse13)) (.cse2 (not .cse14)) (.cse3 (not .cse10)) (.cse0 (or .cse14 .cse10))) (and (or (and .cse0 .cse1 (= v_~x$w_buff1_used~0_356 v_~x$w_buff1_used~0_355)) (and (= v_~x$w_buff1_used~0_355 0) (or (and .cse2 .cse3) (and .cse4 .cse5)))) (let ((.cse7 (= |v_P0_#t~mem5_54| |v_P0Thread1of1ForFork1_#t~mem5_1|))) (or (and .cse6 .cse2 (= |v_P0_#t~ite6_49| |v_P0Thread1of1ForFork1_#t~ite6_1|) .cse7 (= |v_P0_#t~ite7_39| v_~x$w_buff0~0_130)) (and (or (and .cse1 (= |v_P0_#t~ite6_49| |v_P0_#t~mem5_54|) (= (select .cse8 |v_~#x~0.offset_170|) |v_P0_#t~mem5_54|)) (and .cse4 (= |v_P0_#t~ite6_49| v_~x$w_buff1~0_115) .cse7 .cse5)) (= |v_P0_#t~ite7_39| |v_P0_#t~ite6_49|) .cse9))) (= (store |v_#memory_int_263| |v_~#x~0.base_170| (store .cse8 |v_~#x~0.offset_170| |v_P0_#t~ite7_39|)) |v_#memory_int_262|) (or (and (= v_~x$w_buff0_used~0_444 v_~x$w_buff0_used~0_445) .cse9) (and (= v_~x$w_buff0_used~0_444 0) .cse6 .cse2)) (let ((.cse11 (= (mod v_~x$r_buff0_thd1~0_70 256) 0)) (.cse12 (= (mod v_~x$w_buff1_used~0_355 256) 0))) (or (and (or .cse10 .cse11) (or .cse12 .cse13) (= v_~x$r_buff1_thd1~0_52 v_~x$r_buff1_thd1~0_51)) (and (or (and (not .cse11) .cse3) (and .cse5 (not .cse12))) (= v_~x$r_buff1_thd1~0_51 0)))) (or (and (= v_~x$r_buff0_thd1~0_70 0) .cse2 .cse3) (and .cse0 (= v_~x$r_buff0_thd1~0_71 v_~x$r_buff0_thd1~0_70)))))) InVars {~x$w_buff0~0=v_~x$w_buff0~0_130, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_71, ~#x~0.offset=|v_~#x~0.offset_170|, P0Thread1of1ForFork1_#t~ite6=|v_P0Thread1of1ForFork1_#t~ite6_1|, ~x$w_buff1~0=v_~x$w_buff1~0_115, #memory_int=|v_#memory_int_263|, ~#x~0.base=|v_~#x~0.base_170|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_356, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_52, P0Thread1of1ForFork1_#t~mem5=|v_P0Thread1of1ForFork1_#t~mem5_1|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_445} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_130, P0Thread1of1ForFork1_#t~ite10=|v_P0Thread1of1ForFork1_#t~ite10_1|, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_70, ~#x~0.offset=|v_~#x~0.offset_170|, ~x$w_buff1~0=v_~x$w_buff1~0_115, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_355, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_51, P0Thread1of1ForFork1_#t~mem5=|v_P0Thread1of1ForFork1_#t~mem5_2|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_444, P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_1|, P0Thread1of1ForFork1_#t~ite9=|v_P0Thread1of1ForFork1_#t~ite9_1|, P0Thread1of1ForFork1_#t~ite6=|v_P0Thread1of1ForFork1_#t~ite6_2|, P0Thread1of1ForFork1_#t~ite7=|v_P0Thread1of1ForFork1_#t~ite7_1|, #memory_int=|v_#memory_int_262|, ~#x~0.base=|v_~#x~0.base_170|, P0Thread1of1ForFork1_#t~ite11=|v_P0Thread1of1ForFork1_#t~ite11_1|} AuxVars[|v_P0_#t~mem5_54|, |v_P0_#t~ite7_39|, |v_P0_#t~ite6_49|] AssignedVars[P0Thread1of1ForFork1_#t~ite10, ~x$r_buff0_thd1~0, P0Thread1of1ForFork1_#t~ite8, P0Thread1of1ForFork1_#t~ite9, P0Thread1of1ForFork1_#t~ite6, P0Thread1of1ForFork1_#t~ite7, #memory_int, ~x$w_buff1_used~0, ~x$r_buff1_thd1~0, P0Thread1of1ForFork1_#t~mem5, ~x$w_buff0_used~0, P0Thread1of1ForFork1_#t~ite11] under condition 11914#(and (<= 1 ~main$tmp_guard1~0) (= (select |#valid| |~#x~0.base|) 1) (not (= (select (select |#memory_int| ~__unbuffered_p1_EAX$read_delayed_var~0.base) ~__unbuffered_p1_EAX$read_delayed_var~0.offset) 1)) (<= (div ~main$tmp_guard1~0 256) 0) (= 0 ~x$r_buff0_thd0~0) (or (<= (+ |ULTIMATE.start___VERIFIER_assert_#in~expression| 255) 0) (<= 1 |ULTIMATE.start___VERIFIER_assert_#in~expression|)) (= ~__unbuffered_p1_EAX$read_delayed~0 1) (not (= ~__unbuffered_p1_EAX~0 1)) (= ~x$r_buff1_thd0~0 0) (or (<= 1 ULTIMATE.start___VERIFIER_assert_~expression) (<= (+ ULTIMATE.start___VERIFIER_assert_~expression 255) 0)) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0)) [2021-01-26 23:11:37,196 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-26 23:11:37,297 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-26 23:11:37,469 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-26 23:11:37,639 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-26 23:11:41,736 WARN L146 IndependenceRelation]: Expensive independence query (4096 ms) for statements [1223] L801-->L808: Formula: (let ((.cse6 (= (mod v_~x$w_buff0_used~0_450 256) 0)) (.cse7 (= (mod v_~x$r_buff1_thd2~0_258 256) 0)) (.cse14 (= (mod v_~x$w_buff1_used~0_362 256) 0)) (.cse15 (= (mod v_~x$r_buff0_thd2~0_286 256) 0)) (.cse16 (= (mod v_~x$w_buff0_used~0_451 256) 0))) (let ((.cse9 (not .cse16)) (.cse10 (select |v_#memory_int_271| |v_~#x~0.base_174|)) (.cse8 (or .cse16 .cse15)) (.cse13 (or .cse7 .cse14)) (.cse0 (or .cse6 .cse15)) (.cse1 (not .cse6)) (.cse2 (not .cse15)) (.cse12 (not .cse14)) (.cse5 (not .cse7))) (and (or (and (= v_~x$r_buff0_thd2~0_286 v_~x$r_buff0_thd2~0_285) .cse0) (and (= v_~x$r_buff0_thd2~0_285 0) .cse1 .cse2)) (let ((.cse3 (= (mod v_~x$r_buff0_thd2~0_285 256) 0)) (.cse4 (= (mod v_~x$w_buff1_used~0_361 256) 0))) (or (and (= v_~x$r_buff1_thd2~0_257 0) (or (and .cse1 (not .cse3)) (and (not .cse4) .cse5))) (and (= v_~x$r_buff1_thd2~0_258 v_~x$r_buff1_thd2~0_257) (or .cse6 .cse3) (or .cse7 .cse4)))) (or (and (= v_~x$w_buff0_used~0_451 v_~x$w_buff0_used~0_450) .cse8) (and .cse9 (= v_~x$w_buff0_used~0_450 0) .cse2)) (= |v_#memory_int_270| (store |v_#memory_int_271| |v_~#x~0.base_174| (store .cse10 |v_~#x~0.offset_174| |v_P1_#t~ite63_31|))) (let ((.cse11 (= |v_P1_#t~mem61_42| |v_P1Thread1of1ForFork0_#t~mem61_1|))) (or (and .cse11 (= |v_P1_#t~ite62_37| |v_P1Thread1of1ForFork0_#t~ite62_1|) (= |v_P1_#t~ite63_31| v_~x$w_buff0~0_134) .cse9 .cse2) (and (= |v_P1_#t~ite62_37| |v_P1_#t~ite63_31|) (or (and .cse11 (= |v_P1_#t~ite62_37| v_~x$w_buff1~0_119) .cse12 .cse5) (and (= |v_P1_#t~ite62_37| |v_P1_#t~mem61_42|) .cse13 (= (select .cse10 |v_~#x~0.offset_174|) |v_P1_#t~mem61_42|))) .cse8))) (or (and (= v_~x$w_buff1_used~0_362 v_~x$w_buff1_used~0_361) .cse13 .cse0) (and (= v_~x$w_buff1_used~0_361 0) (or (and .cse1 .cse2) (and .cse12 .cse5))))))) InVars {~x$w_buff0~0=v_~x$w_buff0~0_134, P1Thread1of1ForFork0_#t~ite62=|v_P1Thread1of1ForFork0_#t~ite62_1|, ~#x~0.offset=|v_~#x~0.offset_174|, ~x$w_buff1~0=v_~x$w_buff1~0_119, #memory_int=|v_#memory_int_271|, ~#x~0.base=|v_~#x~0.base_174|, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_258, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_362, P1Thread1of1ForFork0_#t~mem61=|v_P1Thread1of1ForFork0_#t~mem61_1|, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_286, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_451} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_134, ~#x~0.offset=|v_~#x~0.offset_174|, ~x$w_buff1~0=v_~x$w_buff1~0_119, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_257, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_361, P1Thread1of1ForFork0_#t~mem61=|v_P1Thread1of1ForFork0_#t~mem61_2|, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_285, P1Thread1of1ForFork0_#t~ite66=|v_P1Thread1of1ForFork0_#t~ite66_1|, P1Thread1of1ForFork0_#t~ite67=|v_P1Thread1of1ForFork0_#t~ite67_1|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_450, P1Thread1of1ForFork0_#t~ite62=|v_P1Thread1of1ForFork0_#t~ite62_2|, P1Thread1of1ForFork0_#t~ite63=|v_P1Thread1of1ForFork0_#t~ite63_1|, P1Thread1of1ForFork0_#t~ite64=|v_P1Thread1of1ForFork0_#t~ite64_1|, P1Thread1of1ForFork0_#t~ite65=|v_P1Thread1of1ForFork0_#t~ite65_1|, #memory_int=|v_#memory_int_270|, ~#x~0.base=|v_~#x~0.base_174|} AuxVars[|v_P1_#t~ite62_37|, |v_P1_#t~mem61_42|, |v_P1_#t~ite63_31|] AssignedVars[P1Thread1of1ForFork0_#t~ite62, P1Thread1of1ForFork0_#t~ite63, P1Thread1of1ForFork0_#t~ite64, P1Thread1of1ForFork0_#t~ite65, #memory_int, ~x$r_buff1_thd2~0, ~x$w_buff1_used~0, P1Thread1of1ForFork0_#t~mem61, ~x$r_buff0_thd2~0, P1Thread1of1ForFork0_#t~ite66, P1Thread1of1ForFork0_#t~ite67, ~x$w_buff0_used~0] and [1216] L765-->L772: Formula: (let ((.cse10 (= (mod v_~x$w_buff0_used~0_444 256) 0)) (.cse14 (= 0 (mod v_~x$r_buff0_thd1~0_71 256))) (.cse15 (= (mod v_~x$w_buff0_used~0_445 256) 0)) (.cse16 (= (mod v_~x$w_buff1_used~0_356 256) 0)) (.cse13 (= (mod v_~x$r_buff1_thd1~0_52 256) 0))) (let ((.cse1 (or .cse16 .cse13)) (.cse4 (not .cse16)) (.cse8 (select |v_#memory_int_263| |v_~#x~0.base_170|)) (.cse9 (or .cse14 .cse15)) (.cse6 (not .cse15)) (.cse5 (not .cse13)) (.cse2 (not .cse14)) (.cse3 (not .cse10)) (.cse0 (or .cse14 .cse10))) (and (or (and .cse0 .cse1 (= v_~x$w_buff1_used~0_356 v_~x$w_buff1_used~0_355)) (and (= v_~x$w_buff1_used~0_355 0) (or (and .cse2 .cse3) (and .cse4 .cse5)))) (let ((.cse7 (= |v_P0_#t~mem5_54| |v_P0Thread1of1ForFork1_#t~mem5_1|))) (or (and .cse6 .cse2 (= |v_P0_#t~ite6_49| |v_P0Thread1of1ForFork1_#t~ite6_1|) .cse7 (= |v_P0_#t~ite7_39| v_~x$w_buff0~0_130)) (and (or (and .cse1 (= |v_P0_#t~ite6_49| |v_P0_#t~mem5_54|) (= (select .cse8 |v_~#x~0.offset_170|) |v_P0_#t~mem5_54|)) (and .cse4 (= |v_P0_#t~ite6_49| v_~x$w_buff1~0_115) .cse7 .cse5)) (= |v_P0_#t~ite7_39| |v_P0_#t~ite6_49|) .cse9))) (= (store |v_#memory_int_263| |v_~#x~0.base_170| (store .cse8 |v_~#x~0.offset_170| |v_P0_#t~ite7_39|)) |v_#memory_int_262|) (or (and (= v_~x$w_buff0_used~0_444 v_~x$w_buff0_used~0_445) .cse9) (and (= v_~x$w_buff0_used~0_444 0) .cse6 .cse2)) (let ((.cse11 (= (mod v_~x$r_buff0_thd1~0_70 256) 0)) (.cse12 (= (mod v_~x$w_buff1_used~0_355 256) 0))) (or (and (or .cse10 .cse11) (or .cse12 .cse13) (= v_~x$r_buff1_thd1~0_52 v_~x$r_buff1_thd1~0_51)) (and (or (and (not .cse11) .cse3) (and .cse5 (not .cse12))) (= v_~x$r_buff1_thd1~0_51 0)))) (or (and (= v_~x$r_buff0_thd1~0_70 0) .cse2 .cse3) (and .cse0 (= v_~x$r_buff0_thd1~0_71 v_~x$r_buff0_thd1~0_70)))))) InVars {~x$w_buff0~0=v_~x$w_buff0~0_130, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_71, ~#x~0.offset=|v_~#x~0.offset_170|, P0Thread1of1ForFork1_#t~ite6=|v_P0Thread1of1ForFork1_#t~ite6_1|, ~x$w_buff1~0=v_~x$w_buff1~0_115, #memory_int=|v_#memory_int_263|, ~#x~0.base=|v_~#x~0.base_170|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_356, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_52, P0Thread1of1ForFork1_#t~mem5=|v_P0Thread1of1ForFork1_#t~mem5_1|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_445} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_130, P0Thread1of1ForFork1_#t~ite10=|v_P0Thread1of1ForFork1_#t~ite10_1|, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_70, ~#x~0.offset=|v_~#x~0.offset_170|, ~x$w_buff1~0=v_~x$w_buff1~0_115, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_355, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_51, P0Thread1of1ForFork1_#t~mem5=|v_P0Thread1of1ForFork1_#t~mem5_2|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_444, P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_1|, P0Thread1of1ForFork1_#t~ite9=|v_P0Thread1of1ForFork1_#t~ite9_1|, P0Thread1of1ForFork1_#t~ite6=|v_P0Thread1of1ForFork1_#t~ite6_2|, P0Thread1of1ForFork1_#t~ite7=|v_P0Thread1of1ForFork1_#t~ite7_1|, #memory_int=|v_#memory_int_262|, ~#x~0.base=|v_~#x~0.base_170|, P0Thread1of1ForFork1_#t~ite11=|v_P0Thread1of1ForFork1_#t~ite11_1|} AuxVars[|v_P0_#t~mem5_54|, |v_P0_#t~ite7_39|, |v_P0_#t~ite6_49|] AssignedVars[P0Thread1of1ForFork1_#t~ite10, ~x$r_buff0_thd1~0, P0Thread1of1ForFork1_#t~ite8, P0Thread1of1ForFork1_#t~ite9, P0Thread1of1ForFork1_#t~ite6, P0Thread1of1ForFork1_#t~ite7, #memory_int, ~x$w_buff1_used~0, ~x$r_buff1_thd1~0, P0Thread1of1ForFork1_#t~mem5, ~x$w_buff0_used~0, P0Thread1of1ForFork1_#t~ite11] under condition 11898#(and (<= 1 ~main$tmp_guard1~0) (= (select |#valid| |~#x~0.base|) 1) (not (= (select (select |#memory_int| ~__unbuffered_p1_EAX$read_delayed_var~0.base) ~__unbuffered_p1_EAX$read_delayed_var~0.offset) 1)) (<= (div ~main$tmp_guard1~0 256) 0) (= 0 ~x$r_buff0_thd0~0) (or (<= (+ |ULTIMATE.start___VERIFIER_assert_#in~expression| 255) 0) (<= 1 |ULTIMATE.start___VERIFIER_assert_#in~expression|)) (= ~__unbuffered_p1_EAX$read_delayed~0 1) (not (= ~__unbuffered_p1_EAX~0 1)) (= ~x$r_buff1_thd0~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0)) [2021-01-26 23:11:41,742 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-26 23:11:43,372 WARN L146 IndependenceRelation]: Expensive independence query (1629 ms) for statements [1223] L801-->L808: Formula: (let ((.cse6 (= (mod v_~x$w_buff0_used~0_450 256) 0)) (.cse7 (= (mod v_~x$r_buff1_thd2~0_258 256) 0)) (.cse14 (= (mod v_~x$w_buff1_used~0_362 256) 0)) (.cse15 (= (mod v_~x$r_buff0_thd2~0_286 256) 0)) (.cse16 (= (mod v_~x$w_buff0_used~0_451 256) 0))) (let ((.cse9 (not .cse16)) (.cse10 (select |v_#memory_int_271| |v_~#x~0.base_174|)) (.cse8 (or .cse16 .cse15)) (.cse13 (or .cse7 .cse14)) (.cse0 (or .cse6 .cse15)) (.cse1 (not .cse6)) (.cse2 (not .cse15)) (.cse12 (not .cse14)) (.cse5 (not .cse7))) (and (or (and (= v_~x$r_buff0_thd2~0_286 v_~x$r_buff0_thd2~0_285) .cse0) (and (= v_~x$r_buff0_thd2~0_285 0) .cse1 .cse2)) (let ((.cse3 (= (mod v_~x$r_buff0_thd2~0_285 256) 0)) (.cse4 (= (mod v_~x$w_buff1_used~0_361 256) 0))) (or (and (= v_~x$r_buff1_thd2~0_257 0) (or (and .cse1 (not .cse3)) (and (not .cse4) .cse5))) (and (= v_~x$r_buff1_thd2~0_258 v_~x$r_buff1_thd2~0_257) (or .cse6 .cse3) (or .cse7 .cse4)))) (or (and (= v_~x$w_buff0_used~0_451 v_~x$w_buff0_used~0_450) .cse8) (and .cse9 (= v_~x$w_buff0_used~0_450 0) .cse2)) (= |v_#memory_int_270| (store |v_#memory_int_271| |v_~#x~0.base_174| (store .cse10 |v_~#x~0.offset_174| |v_P1_#t~ite63_31|))) (let ((.cse11 (= |v_P1_#t~mem61_42| |v_P1Thread1of1ForFork0_#t~mem61_1|))) (or (and .cse11 (= |v_P1_#t~ite62_37| |v_P1Thread1of1ForFork0_#t~ite62_1|) (= |v_P1_#t~ite63_31| v_~x$w_buff0~0_134) .cse9 .cse2) (and (= |v_P1_#t~ite62_37| |v_P1_#t~ite63_31|) (or (and .cse11 (= |v_P1_#t~ite62_37| v_~x$w_buff1~0_119) .cse12 .cse5) (and (= |v_P1_#t~ite62_37| |v_P1_#t~mem61_42|) .cse13 (= (select .cse10 |v_~#x~0.offset_174|) |v_P1_#t~mem61_42|))) .cse8))) (or (and (= v_~x$w_buff1_used~0_362 v_~x$w_buff1_used~0_361) .cse13 .cse0) (and (= v_~x$w_buff1_used~0_361 0) (or (and .cse1 .cse2) (and .cse12 .cse5))))))) InVars {~x$w_buff0~0=v_~x$w_buff0~0_134, P1Thread1of1ForFork0_#t~ite62=|v_P1Thread1of1ForFork0_#t~ite62_1|, ~#x~0.offset=|v_~#x~0.offset_174|, ~x$w_buff1~0=v_~x$w_buff1~0_119, #memory_int=|v_#memory_int_271|, ~#x~0.base=|v_~#x~0.base_174|, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_258, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_362, P1Thread1of1ForFork0_#t~mem61=|v_P1Thread1of1ForFork0_#t~mem61_1|, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_286, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_451} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_134, ~#x~0.offset=|v_~#x~0.offset_174|, ~x$w_buff1~0=v_~x$w_buff1~0_119, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_257, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_361, P1Thread1of1ForFork0_#t~mem61=|v_P1Thread1of1ForFork0_#t~mem61_2|, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_285, P1Thread1of1ForFork0_#t~ite66=|v_P1Thread1of1ForFork0_#t~ite66_1|, P1Thread1of1ForFork0_#t~ite67=|v_P1Thread1of1ForFork0_#t~ite67_1|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_450, P1Thread1of1ForFork0_#t~ite62=|v_P1Thread1of1ForFork0_#t~ite62_2|, P1Thread1of1ForFork0_#t~ite63=|v_P1Thread1of1ForFork0_#t~ite63_1|, P1Thread1of1ForFork0_#t~ite64=|v_P1Thread1of1ForFork0_#t~ite64_1|, P1Thread1of1ForFork0_#t~ite65=|v_P1Thread1of1ForFork0_#t~ite65_1|, #memory_int=|v_#memory_int_270|, ~#x~0.base=|v_~#x~0.base_174|} AuxVars[|v_P1_#t~ite62_37|, |v_P1_#t~mem61_42|, |v_P1_#t~ite63_31|] AssignedVars[P1Thread1of1ForFork0_#t~ite62, P1Thread1of1ForFork0_#t~ite63, P1Thread1of1ForFork0_#t~ite64, P1Thread1of1ForFork0_#t~ite65, #memory_int, ~x$r_buff1_thd2~0, ~x$w_buff1_used~0, P1Thread1of1ForFork0_#t~mem61, ~x$r_buff0_thd2~0, P1Thread1of1ForFork0_#t~ite66, P1Thread1of1ForFork0_#t~ite67, ~x$w_buff0_used~0] and [1215] L754-->L765: Formula: (and (= |v_P0Thread1of1ForFork1_reach_error_#t~nondet2.base_3| |v_P0Thread1of1ForFork1_reach_error_#t~nondet2.base_4|) (= v_~x$w_buff0_used~0_Out_3 1) (= (ite (not (and (not (= (mod v_~x$w_buff0_used~0_Out_3 256) 0)) (not (= (mod v_~x$w_buff1_used~0_Out_3 256) 0)))) 1 0) |v_P0Thread1of1ForFork1___VERIFIER_assert_#in~expression_3|) (= v_~x$r_buff0_thd1~0_Out_1 1) (= v_~x$r_buff1_thd2~0_Out_1 v_~x$r_buff0_thd2~0_In_79) (= |v_P0Thread1of1ForFork1_reach_error_#t~nondet2.offset_3| |v_P0Thread1of1ForFork1_reach_error_#t~nondet2.offset_4|) (not (= v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_3 0)) (= v_~x$r_buff1_thd1~0_Out_1 v_~x$r_buff0_thd1~0_In_11) (= v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_3 |v_P0Thread1of1ForFork1___VERIFIER_assert_#in~expression_3|) (= v_~x$w_buff1~0_Out_3 v_~x$w_buff0~0_In_33) (= v_~x$r_buff1_thd0~0_Out_1 v_~x$r_buff0_thd0~0_In_11) (= v_~x$w_buff0~0_Out_3 1) (= v_~x$w_buff1_used~0_Out_3 v_~x$w_buff0_used~0_In_99)) InVars {~x$w_buff0~0=v_~x$w_buff0~0_In_33, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_In_11, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_In_11, P0Thread1of1ForFork1_reach_error_#t~nondet2.offset=|v_P0Thread1of1ForFork1_reach_error_#t~nondet2.offset_3|, P0Thread1of1ForFork1_reach_error_#t~nondet2.base=|v_P0Thread1of1ForFork1_reach_error_#t~nondet2.base_3|, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_In_79, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_In_99} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_Out_3, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_In_11, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_Out_1, ~x$w_buff1~0=v_~x$w_buff1~0_Out_3, P0Thread1of1ForFork1_reach_error_#t~nondet2.base=|v_P0Thread1of1ForFork1_reach_error_#t~nondet2.base_4|, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_Out_1, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_Out_3, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_Out_1, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_In_79, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_Out_1, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_Out_3, P0Thread1of1ForFork1_reach_error_#t~nondet2.offset=|v_P0Thread1of1ForFork1_reach_error_#t~nondet2.offset_4|, P0Thread1of1ForFork1___VERIFIER_assert_~expression=v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_3, P0Thread1of1ForFork1___VERIFIER_assert_#in~expression=|v_P0Thread1of1ForFork1___VERIFIER_assert_#in~expression_3|} AuxVars[] AssignedVars[~x$w_buff0~0, ~x$r_buff0_thd1~0, P0Thread1of1ForFork1_reach_error_#t~nondet2.offset, ~x$w_buff1~0, P0Thread1of1ForFork1_reach_error_#t~nondet2.base, ~x$r_buff1_thd2~0, ~x$w_buff1_used~0, P0Thread1of1ForFork1___VERIFIER_assert_~expression, ~x$r_buff1_thd1~0, ~x$r_buff1_thd0~0, P0Thread1of1ForFork1___VERIFIER_assert_#in~expression, ~x$w_buff0_used~0] under condition 11894#(and (= (select |#valid| |~#x~0.base|) 1) (not (= |~#x~0.base| |ULTIMATE.start_main_~#t2667~0.base|)) (or (<= (+ |ULTIMATE.start___VERIFIER_assert_#in~expression| 255) 0) (<= 1 |ULTIMATE.start___VERIFIER_assert_#in~expression|)) (= ~__unbuffered_p1_EAX$read_delayed~0 1) (not (= ~__unbuffered_p1_EAX~0 1)) (= ~x$r_buff1_thd0~0 0) (<= 1 ~main$tmp_guard1~0) (not (= (select (select |#memory_int| ~__unbuffered_p1_EAX$read_delayed_var~0.base) ~__unbuffered_p1_EAX$read_delayed_var~0.offset) 1)) (<= (div ~main$tmp_guard1~0 256) 0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0) (not (= |~#x~0.base| |ULTIMATE.start_main_~#t2668~0.base|))) [2021-01-26 23:11:43,430 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-26 23:11:47,517 WARN L146 IndependenceRelation]: Expensive independence query (4085 ms) for statements [1223] L801-->L808: Formula: (let ((.cse6 (= (mod v_~x$w_buff0_used~0_450 256) 0)) (.cse7 (= (mod v_~x$r_buff1_thd2~0_258 256) 0)) (.cse14 (= (mod v_~x$w_buff1_used~0_362 256) 0)) (.cse15 (= (mod v_~x$r_buff0_thd2~0_286 256) 0)) (.cse16 (= (mod v_~x$w_buff0_used~0_451 256) 0))) (let ((.cse9 (not .cse16)) (.cse10 (select |v_#memory_int_271| |v_~#x~0.base_174|)) (.cse8 (or .cse16 .cse15)) (.cse13 (or .cse7 .cse14)) (.cse0 (or .cse6 .cse15)) (.cse1 (not .cse6)) (.cse2 (not .cse15)) (.cse12 (not .cse14)) (.cse5 (not .cse7))) (and (or (and (= v_~x$r_buff0_thd2~0_286 v_~x$r_buff0_thd2~0_285) .cse0) (and (= v_~x$r_buff0_thd2~0_285 0) .cse1 .cse2)) (let ((.cse3 (= (mod v_~x$r_buff0_thd2~0_285 256) 0)) (.cse4 (= (mod v_~x$w_buff1_used~0_361 256) 0))) (or (and (= v_~x$r_buff1_thd2~0_257 0) (or (and .cse1 (not .cse3)) (and (not .cse4) .cse5))) (and (= v_~x$r_buff1_thd2~0_258 v_~x$r_buff1_thd2~0_257) (or .cse6 .cse3) (or .cse7 .cse4)))) (or (and (= v_~x$w_buff0_used~0_451 v_~x$w_buff0_used~0_450) .cse8) (and .cse9 (= v_~x$w_buff0_used~0_450 0) .cse2)) (= |v_#memory_int_270| (store |v_#memory_int_271| |v_~#x~0.base_174| (store .cse10 |v_~#x~0.offset_174| |v_P1_#t~ite63_31|))) (let ((.cse11 (= |v_P1_#t~mem61_42| |v_P1Thread1of1ForFork0_#t~mem61_1|))) (or (and .cse11 (= |v_P1_#t~ite62_37| |v_P1Thread1of1ForFork0_#t~ite62_1|) (= |v_P1_#t~ite63_31| v_~x$w_buff0~0_134) .cse9 .cse2) (and (= |v_P1_#t~ite62_37| |v_P1_#t~ite63_31|) (or (and .cse11 (= |v_P1_#t~ite62_37| v_~x$w_buff1~0_119) .cse12 .cse5) (and (= |v_P1_#t~ite62_37| |v_P1_#t~mem61_42|) .cse13 (= (select .cse10 |v_~#x~0.offset_174|) |v_P1_#t~mem61_42|))) .cse8))) (or (and (= v_~x$w_buff1_used~0_362 v_~x$w_buff1_used~0_361) .cse13 .cse0) (and (= v_~x$w_buff1_used~0_361 0) (or (and .cse1 .cse2) (and .cse12 .cse5))))))) InVars {~x$w_buff0~0=v_~x$w_buff0~0_134, P1Thread1of1ForFork0_#t~ite62=|v_P1Thread1of1ForFork0_#t~ite62_1|, ~#x~0.offset=|v_~#x~0.offset_174|, ~x$w_buff1~0=v_~x$w_buff1~0_119, #memory_int=|v_#memory_int_271|, ~#x~0.base=|v_~#x~0.base_174|, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_258, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_362, P1Thread1of1ForFork0_#t~mem61=|v_P1Thread1of1ForFork0_#t~mem61_1|, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_286, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_451} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_134, ~#x~0.offset=|v_~#x~0.offset_174|, ~x$w_buff1~0=v_~x$w_buff1~0_119, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_257, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_361, P1Thread1of1ForFork0_#t~mem61=|v_P1Thread1of1ForFork0_#t~mem61_2|, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_285, P1Thread1of1ForFork0_#t~ite66=|v_P1Thread1of1ForFork0_#t~ite66_1|, P1Thread1of1ForFork0_#t~ite67=|v_P1Thread1of1ForFork0_#t~ite67_1|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_450, P1Thread1of1ForFork0_#t~ite62=|v_P1Thread1of1ForFork0_#t~ite62_2|, P1Thread1of1ForFork0_#t~ite63=|v_P1Thread1of1ForFork0_#t~ite63_1|, P1Thread1of1ForFork0_#t~ite64=|v_P1Thread1of1ForFork0_#t~ite64_1|, P1Thread1of1ForFork0_#t~ite65=|v_P1Thread1of1ForFork0_#t~ite65_1|, #memory_int=|v_#memory_int_270|, ~#x~0.base=|v_~#x~0.base_174|} AuxVars[|v_P1_#t~ite62_37|, |v_P1_#t~mem61_42|, |v_P1_#t~ite63_31|] AssignedVars[P1Thread1of1ForFork0_#t~ite62, P1Thread1of1ForFork0_#t~ite63, P1Thread1of1ForFork0_#t~ite64, P1Thread1of1ForFork0_#t~ite65, #memory_int, ~x$r_buff1_thd2~0, ~x$w_buff1_used~0, P1Thread1of1ForFork0_#t~mem61, ~x$r_buff0_thd2~0, P1Thread1of1ForFork0_#t~ite66, P1Thread1of1ForFork0_#t~ite67, ~x$w_buff0_used~0] and [1216] L765-->L772: Formula: (let ((.cse10 (= (mod v_~x$w_buff0_used~0_444 256) 0)) (.cse14 (= 0 (mod v_~x$r_buff0_thd1~0_71 256))) (.cse15 (= (mod v_~x$w_buff0_used~0_445 256) 0)) (.cse16 (= (mod v_~x$w_buff1_used~0_356 256) 0)) (.cse13 (= (mod v_~x$r_buff1_thd1~0_52 256) 0))) (let ((.cse1 (or .cse16 .cse13)) (.cse4 (not .cse16)) (.cse8 (select |v_#memory_int_263| |v_~#x~0.base_170|)) (.cse9 (or .cse14 .cse15)) (.cse6 (not .cse15)) (.cse5 (not .cse13)) (.cse2 (not .cse14)) (.cse3 (not .cse10)) (.cse0 (or .cse14 .cse10))) (and (or (and .cse0 .cse1 (= v_~x$w_buff1_used~0_356 v_~x$w_buff1_used~0_355)) (and (= v_~x$w_buff1_used~0_355 0) (or (and .cse2 .cse3) (and .cse4 .cse5)))) (let ((.cse7 (= |v_P0_#t~mem5_54| |v_P0Thread1of1ForFork1_#t~mem5_1|))) (or (and .cse6 .cse2 (= |v_P0_#t~ite6_49| |v_P0Thread1of1ForFork1_#t~ite6_1|) .cse7 (= |v_P0_#t~ite7_39| v_~x$w_buff0~0_130)) (and (or (and .cse1 (= |v_P0_#t~ite6_49| |v_P0_#t~mem5_54|) (= (select .cse8 |v_~#x~0.offset_170|) |v_P0_#t~mem5_54|)) (and .cse4 (= |v_P0_#t~ite6_49| v_~x$w_buff1~0_115) .cse7 .cse5)) (= |v_P0_#t~ite7_39| |v_P0_#t~ite6_49|) .cse9))) (= (store |v_#memory_int_263| |v_~#x~0.base_170| (store .cse8 |v_~#x~0.offset_170| |v_P0_#t~ite7_39|)) |v_#memory_int_262|) (or (and (= v_~x$w_buff0_used~0_444 v_~x$w_buff0_used~0_445) .cse9) (and (= v_~x$w_buff0_used~0_444 0) .cse6 .cse2)) (let ((.cse11 (= (mod v_~x$r_buff0_thd1~0_70 256) 0)) (.cse12 (= (mod v_~x$w_buff1_used~0_355 256) 0))) (or (and (or .cse10 .cse11) (or .cse12 .cse13) (= v_~x$r_buff1_thd1~0_52 v_~x$r_buff1_thd1~0_51)) (and (or (and (not .cse11) .cse3) (and .cse5 (not .cse12))) (= v_~x$r_buff1_thd1~0_51 0)))) (or (and (= v_~x$r_buff0_thd1~0_70 0) .cse2 .cse3) (and .cse0 (= v_~x$r_buff0_thd1~0_71 v_~x$r_buff0_thd1~0_70)))))) InVars {~x$w_buff0~0=v_~x$w_buff0~0_130, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_71, ~#x~0.offset=|v_~#x~0.offset_170|, P0Thread1of1ForFork1_#t~ite6=|v_P0Thread1of1ForFork1_#t~ite6_1|, ~x$w_buff1~0=v_~x$w_buff1~0_115, #memory_int=|v_#memory_int_263|, ~#x~0.base=|v_~#x~0.base_170|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_356, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_52, P0Thread1of1ForFork1_#t~mem5=|v_P0Thread1of1ForFork1_#t~mem5_1|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_445} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_130, P0Thread1of1ForFork1_#t~ite10=|v_P0Thread1of1ForFork1_#t~ite10_1|, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_70, ~#x~0.offset=|v_~#x~0.offset_170|, ~x$w_buff1~0=v_~x$w_buff1~0_115, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_355, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_51, P0Thread1of1ForFork1_#t~mem5=|v_P0Thread1of1ForFork1_#t~mem5_2|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_444, P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_1|, P0Thread1of1ForFork1_#t~ite9=|v_P0Thread1of1ForFork1_#t~ite9_1|, P0Thread1of1ForFork1_#t~ite6=|v_P0Thread1of1ForFork1_#t~ite6_2|, P0Thread1of1ForFork1_#t~ite7=|v_P0Thread1of1ForFork1_#t~ite7_1|, #memory_int=|v_#memory_int_262|, ~#x~0.base=|v_~#x~0.base_170|, P0Thread1of1ForFork1_#t~ite11=|v_P0Thread1of1ForFork1_#t~ite11_1|} AuxVars[|v_P0_#t~mem5_54|, |v_P0_#t~ite7_39|, |v_P0_#t~ite6_49|] AssignedVars[P0Thread1of1ForFork1_#t~ite10, ~x$r_buff0_thd1~0, P0Thread1of1ForFork1_#t~ite8, P0Thread1of1ForFork1_#t~ite9, P0Thread1of1ForFork1_#t~ite6, P0Thread1of1ForFork1_#t~ite7, #memory_int, ~x$w_buff1_used~0, ~x$r_buff1_thd1~0, P0Thread1of1ForFork1_#t~mem5, ~x$w_buff0_used~0, P0Thread1of1ForFork1_#t~ite11] under condition 11888#(and (<= 1 ~main$tmp_guard1~0) (= (select |#valid| |~#x~0.base|) 1) (not (= (select (select |#memory_int| ~__unbuffered_p1_EAX$read_delayed_var~0.base) ~__unbuffered_p1_EAX$read_delayed_var~0.offset) 1)) (<= (div ~main$tmp_guard1~0 256) 0) (= 0 ~x$r_buff0_thd0~0) (= ~__unbuffered_p1_EAX$read_delayed~0 1) (not (= ~__unbuffered_p1_EAX~0 1)) (= ~x$r_buff1_thd0~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0)) [2021-01-26 23:11:47,523 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-26 23:11:49,586 WARN L146 IndependenceRelation]: Expensive independence query (2062 ms) for statements [1223] L801-->L808: Formula: (let ((.cse6 (= (mod v_~x$w_buff0_used~0_450 256) 0)) (.cse7 (= (mod v_~x$r_buff1_thd2~0_258 256) 0)) (.cse14 (= (mod v_~x$w_buff1_used~0_362 256) 0)) (.cse15 (= (mod v_~x$r_buff0_thd2~0_286 256) 0)) (.cse16 (= (mod v_~x$w_buff0_used~0_451 256) 0))) (let ((.cse9 (not .cse16)) (.cse10 (select |v_#memory_int_271| |v_~#x~0.base_174|)) (.cse8 (or .cse16 .cse15)) (.cse13 (or .cse7 .cse14)) (.cse0 (or .cse6 .cse15)) (.cse1 (not .cse6)) (.cse2 (not .cse15)) (.cse12 (not .cse14)) (.cse5 (not .cse7))) (and (or (and (= v_~x$r_buff0_thd2~0_286 v_~x$r_buff0_thd2~0_285) .cse0) (and (= v_~x$r_buff0_thd2~0_285 0) .cse1 .cse2)) (let ((.cse3 (= (mod v_~x$r_buff0_thd2~0_285 256) 0)) (.cse4 (= (mod v_~x$w_buff1_used~0_361 256) 0))) (or (and (= v_~x$r_buff1_thd2~0_257 0) (or (and .cse1 (not .cse3)) (and (not .cse4) .cse5))) (and (= v_~x$r_buff1_thd2~0_258 v_~x$r_buff1_thd2~0_257) (or .cse6 .cse3) (or .cse7 .cse4)))) (or (and (= v_~x$w_buff0_used~0_451 v_~x$w_buff0_used~0_450) .cse8) (and .cse9 (= v_~x$w_buff0_used~0_450 0) .cse2)) (= |v_#memory_int_270| (store |v_#memory_int_271| |v_~#x~0.base_174| (store .cse10 |v_~#x~0.offset_174| |v_P1_#t~ite63_31|))) (let ((.cse11 (= |v_P1_#t~mem61_42| |v_P1Thread1of1ForFork0_#t~mem61_1|))) (or (and .cse11 (= |v_P1_#t~ite62_37| |v_P1Thread1of1ForFork0_#t~ite62_1|) (= |v_P1_#t~ite63_31| v_~x$w_buff0~0_134) .cse9 .cse2) (and (= |v_P1_#t~ite62_37| |v_P1_#t~ite63_31|) (or (and .cse11 (= |v_P1_#t~ite62_37| v_~x$w_buff1~0_119) .cse12 .cse5) (and (= |v_P1_#t~ite62_37| |v_P1_#t~mem61_42|) .cse13 (= (select .cse10 |v_~#x~0.offset_174|) |v_P1_#t~mem61_42|))) .cse8))) (or (and (= v_~x$w_buff1_used~0_362 v_~x$w_buff1_used~0_361) .cse13 .cse0) (and (= v_~x$w_buff1_used~0_361 0) (or (and .cse1 .cse2) (and .cse12 .cse5))))))) InVars {~x$w_buff0~0=v_~x$w_buff0~0_134, P1Thread1of1ForFork0_#t~ite62=|v_P1Thread1of1ForFork0_#t~ite62_1|, ~#x~0.offset=|v_~#x~0.offset_174|, ~x$w_buff1~0=v_~x$w_buff1~0_119, #memory_int=|v_#memory_int_271|, ~#x~0.base=|v_~#x~0.base_174|, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_258, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_362, P1Thread1of1ForFork0_#t~mem61=|v_P1Thread1of1ForFork0_#t~mem61_1|, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_286, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_451} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_134, ~#x~0.offset=|v_~#x~0.offset_174|, ~x$w_buff1~0=v_~x$w_buff1~0_119, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_257, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_361, P1Thread1of1ForFork0_#t~mem61=|v_P1Thread1of1ForFork0_#t~mem61_2|, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_285, P1Thread1of1ForFork0_#t~ite66=|v_P1Thread1of1ForFork0_#t~ite66_1|, P1Thread1of1ForFork0_#t~ite67=|v_P1Thread1of1ForFork0_#t~ite67_1|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_450, P1Thread1of1ForFork0_#t~ite62=|v_P1Thread1of1ForFork0_#t~ite62_2|, P1Thread1of1ForFork0_#t~ite63=|v_P1Thread1of1ForFork0_#t~ite63_1|, P1Thread1of1ForFork0_#t~ite64=|v_P1Thread1of1ForFork0_#t~ite64_1|, P1Thread1of1ForFork0_#t~ite65=|v_P1Thread1of1ForFork0_#t~ite65_1|, #memory_int=|v_#memory_int_270|, ~#x~0.base=|v_~#x~0.base_174|} AuxVars[|v_P1_#t~ite62_37|, |v_P1_#t~mem61_42|, |v_P1_#t~ite63_31|] AssignedVars[P1Thread1of1ForFork0_#t~ite62, P1Thread1of1ForFork0_#t~ite63, P1Thread1of1ForFork0_#t~ite64, P1Thread1of1ForFork0_#t~ite65, #memory_int, ~x$r_buff1_thd2~0, ~x$w_buff1_used~0, P1Thread1of1ForFork0_#t~mem61, ~x$r_buff0_thd2~0, P1Thread1of1ForFork0_#t~ite66, P1Thread1of1ForFork0_#t~ite67, ~x$w_buff0_used~0] and [1215] L754-->L765: Formula: (and (= |v_P0Thread1of1ForFork1_reach_error_#t~nondet2.base_3| |v_P0Thread1of1ForFork1_reach_error_#t~nondet2.base_4|) (= v_~x$w_buff0_used~0_Out_3 1) (= (ite (not (and (not (= (mod v_~x$w_buff0_used~0_Out_3 256) 0)) (not (= (mod v_~x$w_buff1_used~0_Out_3 256) 0)))) 1 0) |v_P0Thread1of1ForFork1___VERIFIER_assert_#in~expression_3|) (= v_~x$r_buff0_thd1~0_Out_1 1) (= v_~x$r_buff1_thd2~0_Out_1 v_~x$r_buff0_thd2~0_In_79) (= |v_P0Thread1of1ForFork1_reach_error_#t~nondet2.offset_3| |v_P0Thread1of1ForFork1_reach_error_#t~nondet2.offset_4|) (not (= v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_3 0)) (= v_~x$r_buff1_thd1~0_Out_1 v_~x$r_buff0_thd1~0_In_11) (= v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_3 |v_P0Thread1of1ForFork1___VERIFIER_assert_#in~expression_3|) (= v_~x$w_buff1~0_Out_3 v_~x$w_buff0~0_In_33) (= v_~x$r_buff1_thd0~0_Out_1 v_~x$r_buff0_thd0~0_In_11) (= v_~x$w_buff0~0_Out_3 1) (= v_~x$w_buff1_used~0_Out_3 v_~x$w_buff0_used~0_In_99)) InVars {~x$w_buff0~0=v_~x$w_buff0~0_In_33, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_In_11, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_In_11, P0Thread1of1ForFork1_reach_error_#t~nondet2.offset=|v_P0Thread1of1ForFork1_reach_error_#t~nondet2.offset_3|, P0Thread1of1ForFork1_reach_error_#t~nondet2.base=|v_P0Thread1of1ForFork1_reach_error_#t~nondet2.base_3|, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_In_79, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_In_99} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_Out_3, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_In_11, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_Out_1, ~x$w_buff1~0=v_~x$w_buff1~0_Out_3, P0Thread1of1ForFork1_reach_error_#t~nondet2.base=|v_P0Thread1of1ForFork1_reach_error_#t~nondet2.base_4|, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_Out_1, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_Out_3, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_Out_1, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_In_79, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_Out_1, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_Out_3, P0Thread1of1ForFork1_reach_error_#t~nondet2.offset=|v_P0Thread1of1ForFork1_reach_error_#t~nondet2.offset_4|, P0Thread1of1ForFork1___VERIFIER_assert_~expression=v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_3, P0Thread1of1ForFork1___VERIFIER_assert_#in~expression=|v_P0Thread1of1ForFork1___VERIFIER_assert_#in~expression_3|} AuxVars[] AssignedVars[~x$w_buff0~0, ~x$r_buff0_thd1~0, P0Thread1of1ForFork1_reach_error_#t~nondet2.offset, ~x$w_buff1~0, P0Thread1of1ForFork1_reach_error_#t~nondet2.base, ~x$r_buff1_thd2~0, ~x$w_buff1_used~0, P0Thread1of1ForFork1___VERIFIER_assert_~expression, ~x$r_buff1_thd1~0, ~x$r_buff1_thd0~0, P0Thread1of1ForFork1___VERIFIER_assert_#in~expression, ~x$w_buff0_used~0] under condition 11882#(and (<= 1 ~main$tmp_guard1~0) (= (select |#valid| |~#x~0.base|) 1) (not (= (select (select |#memory_int| ~__unbuffered_p1_EAX$read_delayed_var~0.base) ~__unbuffered_p1_EAX$read_delayed_var~0.offset) 1)) (<= (div ~main$tmp_guard1~0 256) 0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (not (= |~#x~0.base| |ULTIMATE.start_main_~#t2667~0.base|)) (= ~__unbuffered_p1_EAX$read_delayed~0 1) (not (= ~__unbuffered_p1_EAX~0 1)) (= ~x$r_buff1_thd0~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0) (not (= |~#x~0.base| |ULTIMATE.start_main_~#t2668~0.base|))) [2021-01-26 23:11:49,595 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-26 23:11:50,156 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-26 23:11:50,234 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check Size of Word is: 77 and size of Sequence is : 78[2021-01-26 23:11:50,743 INFO L164 SleepSetCegar]: Size of mCounterexample is: 78 [2021-01-26 23:11:50,745 INFO L165 SleepSetCegar]: [8802#[ULTIMATE.startENTRY]true, 8804#[L-1]true, 8806#[L-1-1]true, 8808#[L17]true, 8810#[L17-1]true, 8812#[L17-2]true, 8814#[L17-3]true, 8816#[L17-4]true, 8818#[L710]true, 8820#[L712](= ~__unbuffered_p0_EAX~0 0), 8822#[L713](= ~__unbuffered_p0_EAX~0 0), 8824#[L714](= ~__unbuffered_p0_EAX~0 0), 8826#[L715](= ~__unbuffered_p0_EAX~0 0), 8828#[L716](= ~__unbuffered_p0_EAX~0 0), 8830#[L717](= ~__unbuffered_p0_EAX~0 0), 8832#[L718](= ~__unbuffered_p0_EAX~0 0), 8834#[L719](= ~__unbuffered_p0_EAX~0 0), 8836#[L720](= ~__unbuffered_p0_EAX~0 0), 8838#[L721](= ~__unbuffered_p0_EAX~0 0), 8840#[L722](= ~__unbuffered_p0_EAX~0 0), 8842#[L723](= ~__unbuffered_p0_EAX~0 0), 8844#[L724](= ~__unbuffered_p0_EAX~0 0), 8846#[L725](= ~__unbuffered_p0_EAX~0 0), 8848#[L726](= ~__unbuffered_p0_EAX~0 0), 8850#[L727](= ~__unbuffered_p0_EAX~0 0), 8852#[L728](= ~__unbuffered_p0_EAX~0 0), 8854#[L730](= ~__unbuffered_p0_EAX~0 0), 8856#[L730-1](and (= (select |#valid| |~#x~0.base|) 1) (= ~__unbuffered_p0_EAX~0 0)), 8858#[L730-2](and (= (select |#valid| |~#x~0.base|) 1) (= ~__unbuffered_p0_EAX~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0)), 8860#[L732](and (= (select |#valid| |~#x~0.base|) 1) (= ~__unbuffered_p0_EAX~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0)), 8862#[L733](and (= (select |#valid| |~#x~0.base|) 1) (= ~__unbuffered_p0_EAX~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0)), 8864#[L734](and (= (select |#valid| |~#x~0.base|) 1) (= 0 ~x$r_buff0_thd0~0) (= ~__unbuffered_p0_EAX~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0)), 8866#[L735](and (= (select |#valid| |~#x~0.base|) 1) (= 0 ~x$r_buff0_thd0~0) (= ~__unbuffered_p0_EAX~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0)), 8868#[L736](and (= (select |#valid| |~#x~0.base|) 1) (= 0 ~x$r_buff0_thd0~0) (= ~__unbuffered_p0_EAX~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0)), 8870#[L737](and (= (select |#valid| |~#x~0.base|) 1) (= 0 ~x$r_buff0_thd0~0) (= ~__unbuffered_p0_EAX~0 0) (= ~x$r_buff1_thd0~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0)), 8872#[L738](and (= (select |#valid| |~#x~0.base|) 1) (= 0 ~x$r_buff0_thd0~0) (= ~__unbuffered_p0_EAX~0 0) (= ~x$r_buff1_thd0~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0)), 8874#[L739](and (= (select |#valid| |~#x~0.base|) 1) (= 0 ~x$r_buff0_thd0~0) (= ~__unbuffered_p0_EAX~0 0) (= ~x$r_buff1_thd0~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0)), 8876#[L740](and (= (select |#valid| |~#x~0.base|) 1) (= 0 ~x$r_buff0_thd0~0) (= ~__unbuffered_p0_EAX~0 0) (= ~x$r_buff1_thd0~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0)), 8878#[L741](and (= (select |#valid| |~#x~0.base|) 1) (= 0 ~x$r_buff0_thd0~0) (= ~__unbuffered_p0_EAX~0 0) (= ~x$r_buff1_thd0~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0)), 8880#[L742](and (= (select |#valid| |~#x~0.base|) 1) (= 0 ~x$r_buff0_thd0~0) (= ~__unbuffered_p0_EAX~0 0) (= ~x$r_buff1_thd0~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0)), 8882#[L743](and (= (select |#valid| |~#x~0.base|) 1) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0) (= ~x$r_buff1_thd0~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0)), 8884#[L744](and (= (select |#valid| |~#x~0.base|) 1) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0) (= ~x$r_buff1_thd0~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0)), 8886#[L746](and (= (select |#valid| |~#x~0.base|) 1) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0) (= ~x$r_buff1_thd0~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0)), 8888#[L747](and (= (select |#valid| |~#x~0.base|) 1) (= ~y~0 0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0) (= ~x$r_buff1_thd0~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0)), 8890#[L748](and (= (select |#valid| |~#x~0.base|) 1) (= ~y~0 0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0) (= ~x$r_buff1_thd0~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0)), 8892#[L749](and (= (select |#valid| |~#x~0.base|) 1) (= ~y~0 0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0) (= ~x$r_buff1_thd0~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0)), 8894#[L-1-2](and (= (select |#valid| |~#x~0.base|) 1) (= ~y~0 0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0) (= ~x$r_buff1_thd0~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0)), 8896#[L-1-3](and (= (select |#valid| |~#x~0.base|) 1) (= ~y~0 0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0) (= ~x$r_buff1_thd0~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0)), 8898#[L825](and (= (select |#valid| |~#x~0.base|) 1) (= ~y~0 0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0) (= ~x$r_buff1_thd0~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0)), 8900#[L825-1](and (= (select |#valid| |~#x~0.base|) 1) (= ~y~0 0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (not (= |~#x~0.base| |ULTIMATE.start_main_~#t2667~0.base|)) (= ~__unbuffered_p0_EAX~0 0) (= ~x$r_buff1_thd0~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0)), 8902#[L826](and (= (select |#valid| |~#x~0.base|) 1) (= ~y~0 0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (not (= |~#x~0.base| |ULTIMATE.start_main_~#t2667~0.base|)) (= ~__unbuffered_p0_EAX~0 0) (= ~x$r_buff1_thd0~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0)), 8904#[L826-1, P0ENTRY](and (= (select |#valid| |~#x~0.base|) 1) (= ~y~0 0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (not (= |~#x~0.base| |ULTIMATE.start_main_~#t2667~0.base|)) (= ~__unbuffered_p0_EAX~0 0) (= ~x$r_buff1_thd0~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0)), 8908#[L827, P0ENTRY](and (= (select |#valid| |~#x~0.base|) 1) (= ~y~0 0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (not (= |~#x~0.base| |ULTIMATE.start_main_~#t2667~0.base|)) (= ~__unbuffered_p0_EAX~0 0) (= ~x$r_buff1_thd0~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0)), 8914#[L827-1, P0ENTRY](and (= (select |#valid| |~#x~0.base|) 1) (= ~y~0 0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (not (= |~#x~0.base| |ULTIMATE.start_main_~#t2667~0.base|)) (= ~__unbuffered_p0_EAX~0 0) (= ~x$r_buff1_thd0~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0) (not (= |~#x~0.base| |ULTIMATE.start_main_~#t2668~0.base|))), 8918#[L828, P0ENTRY](and (= (select |#valid| |~#x~0.base|) 1) (= ~y~0 0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (not (= |~#x~0.base| |ULTIMATE.start_main_~#t2667~0.base|)) (= ~__unbuffered_p0_EAX~0 0) (= ~x$r_buff1_thd0~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0) (not (= |~#x~0.base| |ULTIMATE.start_main_~#t2668~0.base|))), 8922#[L828, L752](and (= (select |#valid| |~#x~0.base|) 1) (= ~y~0 0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (not (= |~#x~0.base| |ULTIMATE.start_main_~#t2667~0.base|)) (= ~__unbuffered_p0_EAX~0 0) (= ~x$r_buff1_thd0~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0) (not (= |~#x~0.base| |ULTIMATE.start_main_~#t2668~0.base|))), 8924#[L828-1, P1ENTRY, L752](and (= (select |#valid| |~#x~0.base|) 1) (= ~y~0 0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (not (= |~#x~0.base| |ULTIMATE.start_main_~#t2667~0.base|)) (= ~__unbuffered_p0_EAX~0 0) (= ~x$r_buff1_thd0~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0) (not (= |~#x~0.base| |ULTIMATE.start_main_~#t2668~0.base|))), 13602#[P1ENTRY, L752, L829](and (= (select |#valid| |~#x~0.base|) 1) (= ~y~0 0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (not (= |~#x~0.base| |ULTIMATE.start_main_~#t2667~0.base|)) (= ~__unbuffered_p0_EAX~0 0) (= ~x$r_buff1_thd0~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0) (not (= |~#x~0.base| |ULTIMATE.start_main_~#t2668~0.base|))), 13606#[L831, P1ENTRY, L752](and (= (select |#valid| |~#x~0.base|) 1) (= ~y~0 0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (not (= |~#x~0.base| |ULTIMATE.start_main_~#t2667~0.base|)) (= ~__unbuffered_p0_EAX~0 0) (= ~x$r_buff1_thd0~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0) (not (= |~#x~0.base| |ULTIMATE.start_main_~#t2668~0.base|))), 13610#[P1ENTRY, L832, L752](and (= (select |#valid| |~#x~0.base|) 1) (= ~y~0 0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (not (= |~#x~0.base| |ULTIMATE.start_main_~#t2667~0.base|)) (= ~__unbuffered_p0_EAX~0 0) (= ~x$r_buff1_thd0~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0) (not (= |~#x~0.base| |ULTIMATE.start_main_~#t2668~0.base|))), 13614#[L2, P1ENTRY, L752](and (= (select |#valid| |~#x~0.base|) 1) (= ~y~0 0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (not (= |~#x~0.base| |ULTIMATE.start_main_~#t2667~0.base|)) (= ~__unbuffered_p0_EAX~0 0) (= ~x$r_buff1_thd0~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0) (not (= |~#x~0.base| |ULTIMATE.start_main_~#t2668~0.base|))), 13618#[L3, P1ENTRY, L752](and (= (select |#valid| |~#x~0.base|) 1) (= ~y~0 0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (not (= |~#x~0.base| |ULTIMATE.start_main_~#t2667~0.base|)) (= ~__unbuffered_p0_EAX~0 0) (= ~x$r_buff1_thd0~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0) (not (= |~#x~0.base| |ULTIMATE.start_main_~#t2668~0.base|))), 13622#[L2-1, P1ENTRY, L752](and (= (select |#valid| |~#x~0.base|) 1) (= ~y~0 0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (not (= |~#x~0.base| |ULTIMATE.start_main_~#t2667~0.base|)) (= ~__unbuffered_p0_EAX~0 0) (= ~x$r_buff1_thd0~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0) (not (= |~#x~0.base| |ULTIMATE.start_main_~#t2668~0.base|))), 13728#[L839, P1ENTRY, L752](and (= (select |#valid| |~#x~0.base|) 1) (= ~y~0 0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (not (= |~#x~0.base| |ULTIMATE.start_main_~#t2667~0.base|)) (= ~__unbuffered_p0_EAX~0 0) (= ~x$r_buff1_thd0~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0) (not (= |~#x~0.base| |ULTIMATE.start_main_~#t2668~0.base|))), 13730#[L839, L780, L752](and (= (select |#valid| |~#x~0.base|) 1) (= ~y~0 0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (not (= |~#x~0.base| |ULTIMATE.start_main_~#t2667~0.base|)) (= ~__unbuffered_p0_EAX~0 0) (= ~x$r_buff1_thd0~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0) (not (= |~#x~0.base| |ULTIMATE.start_main_~#t2668~0.base|))), 14912#[L798, L839, L752](and (= (select |#valid| |~#x~0.base|) 1) (not (= (select (select |#memory_int| ~__unbuffered_p1_EAX$read_delayed_var~0.base) ~__unbuffered_p1_EAX$read_delayed_var~0.offset) 1)) (= ~y~0 0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (not (= |~#x~0.base| |ULTIMATE.start_main_~#t2667~0.base|)) (= ~__unbuffered_p1_EAX$read_delayed~0 1) (not (= ~__unbuffered_p1_EAX~0 1)) (= ~__unbuffered_p0_EAX~0 0) (= ~x$r_buff1_thd0~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0) (not (= |~#x~0.base| |ULTIMATE.start_main_~#t2668~0.base|))), 14914#[L839, L801, L752](and (= (select |#valid| |~#x~0.base|) 1) (not (= (select (select |#memory_int| ~__unbuffered_p1_EAX$read_delayed_var~0.base) ~__unbuffered_p1_EAX$read_delayed_var~0.offset) 1)) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (not (= |~#x~0.base| |ULTIMATE.start_main_~#t2667~0.base|)) (= ~__unbuffered_p1_EAX$read_delayed~0 1) (not (= ~__unbuffered_p1_EAX~0 1)) (= ~__unbuffered_p0_EAX~0 0) (= ~x$r_buff1_thd0~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0) (not (= |~#x~0.base| |ULTIMATE.start_main_~#t2668~0.base|))), 16020#[L839, L754, L801](and (= (select |#valid| |~#x~0.base|) 1) (not (= (select (select |#memory_int| ~__unbuffered_p1_EAX$read_delayed_var~0.base) ~__unbuffered_p1_EAX$read_delayed_var~0.offset) 1)) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (not (= |~#x~0.base| |ULTIMATE.start_main_~#t2667~0.base|)) (= ~__unbuffered_p1_EAX$read_delayed~0 1) (not (= ~__unbuffered_p1_EAX~0 1)) (= ~x$r_buff1_thd0~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0) (not (= |~#x~0.base| |ULTIMATE.start_main_~#t2668~0.base|))), 16024#[L839, L765, L801](and (= (select |#valid| |~#x~0.base|) 1) (not (= (select (select |#memory_int| ~__unbuffered_p1_EAX$read_delayed_var~0.base) ~__unbuffered_p1_EAX$read_delayed_var~0.offset) 1)) (= 0 ~x$r_buff0_thd0~0) (= ~__unbuffered_p1_EAX$read_delayed~0 1) (not (= ~__unbuffered_p1_EAX~0 1)) (= ~x$r_buff1_thd0~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0)), 16038#[L772, L839, L801](= (select |#valid| |~#x~0.base|) 1), 16050#[L772, L844, L801](= (select |#valid| |~#x~0.base|) 1), 16062#[L772, L845, L801](= (select |#valid| |~#x~0.base|) 1), 16074#[L772, L18, L801](= (select |#valid| |~#x~0.base|) 1), 16086#[L772, L18-1, L801](= (select |#valid| |~#x~0.base|) 1), 16100#[L772, L18-2, L801](= (select |#valid| |~#x~0.base|) 1), 16117#[L17-5, L772, L801](= (select |#valid| |~#x~0.base|) 1), 16141#[L772, L801, L17-7](= (select |#valid| |~#x~0.base|) 1), 16169#[L772, L801, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION](= (select |#valid| |~#x~0.base|) 1)] [2021-01-26 23:11:50,745 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2021-01-26 23:11:50,745 INFO L429 AbstractCegarLoop]: === Iteration 4 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-26 23:11:50,746 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-26 23:11:50,746 INFO L82 PathProgramCache]: Analyzing trace with hash -578702570, now seen corresponding path program 1 times [2021-01-26 23:11:50,746 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-26 23:11:50,747 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1986804095] [2021-01-26 23:11:50,747 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-26 23:11:50,967 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-26 23:11:51,128 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-26 23:11:51,128 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1986804095] [2021-01-26 23:11:51,129 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-26 23:11:51,129 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2021-01-26 23:11:51,129 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [467926098] [2021-01-26 23:11:51,130 INFO L461 AbstractCegarLoop]: Interpolant automaton has 6 states [2021-01-26 23:11:51,130 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-26 23:11:51,130 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-01-26 23:11:51,131 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2021-01-26 23:11:51,131 INFO L481 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2021-01-26 23:11:51,131 INFO L482 AbstractCegarLoop]: Interpolant automaton has has 6 states, 6 states have (on average 12.833333333333334) internal successors, (77), 6 states have internal predecessors, (77), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-01-26 23:11:51,238 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-26 23:11:51,369 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check Size of Word is: 82 and size of Sequence is : 83[2021-01-26 23:11:51,500 INFO L164 SleepSetCegar]: Size of mCounterexample is: 83 [2021-01-26 23:11:51,501 INFO L165 SleepSetCegar]: [16183#[ULTIMATE.startENTRY]true, 16185#[L-1]true, 16187#[L-1-1]true, 16189#[L17]true, 16191#[L17-1]true, 16193#[L17-2]true, 16195#[L17-3]true, 16197#[L17-4]true, 16199#[L710](= ~__unbuffered_cnt~0 0), 16201#[L712](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_cnt~0 0)), 16203#[L713](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_cnt~0 0)), 16205#[L714](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_cnt~0 0)), 16207#[L715](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_cnt~0 0)), 16209#[L716](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_cnt~0 0)), 16211#[L717](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_cnt~0 0)), 16213#[L718](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_cnt~0 0)), 16215#[L719](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_cnt~0 0)), 16217#[L720](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_cnt~0 0)), 16219#[L721](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_cnt~0 0)), 16221#[L722](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_cnt~0 0)), 16223#[L723](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_cnt~0 0)), 16225#[L724](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_cnt~0 0)), 16227#[L725](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_cnt~0 0)), 16229#[L726](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_cnt~0 0)), 16231#[L727](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_cnt~0 0)), 16235#[L728](and (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 16237#[L730](and (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 16239#[L730-1](and (= (select |#valid| |~#x~0.base|) 1) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 16241#[L730-2](and (= (select |#valid| |~#x~0.base|) 1) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 16243#[L732](and (= (select |#valid| |~#x~0.base|) 1) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 16245#[L733](and (= (select |#valid| |~#x~0.base|) 1) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 16247#[L734](and (= (select |#valid| |~#x~0.base|) 1) (= 0 ~x$r_buff0_thd0~0) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 16249#[L735](and (= (select |#valid| |~#x~0.base|) 1) (= 0 ~x$r_buff0_thd0~0) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 16251#[L736](and (= (select |#valid| |~#x~0.base|) 1) (= 0 ~x$r_buff0_thd0~0) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 16253#[L737](and (= (select |#valid| |~#x~0.base|) 1) (= 0 ~x$r_buff0_thd0~0) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= ~x$r_buff1_thd0~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 16255#[L738](and (= (select |#valid| |~#x~0.base|) 1) (= 0 ~x$r_buff0_thd0~0) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= ~x$r_buff1_thd0~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 16257#[L739](and (= (select |#valid| |~#x~0.base|) 1) (= 0 ~x$r_buff0_thd0~0) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= ~x$r_buff1_thd0~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 16259#[L740](and (= (select |#valid| |~#x~0.base|) 1) (= 0 ~x$r_buff0_thd0~0) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= ~x$r_buff1_thd0~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 16261#[L741](and (= (select |#valid| |~#x~0.base|) 1) (= 0 ~x$r_buff0_thd0~0) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= ~x$r_buff1_thd0~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 16263#[L742](and (= (select |#valid| |~#x~0.base|) 1) (= 0 ~x$r_buff0_thd0~0) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= ~x$r_buff1_thd0~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 16265#[L743](and (= (select |#valid| |~#x~0.base|) 1) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= ~x$r_buff1_thd0~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 16267#[L744](and (= (select |#valid| |~#x~0.base|) 1) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= ~x$r_buff1_thd0~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 16269#[L746](and (= (select |#valid| |~#x~0.base|) 1) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= ~x$r_buff1_thd0~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 16271#[L747](and (= (select |#valid| |~#x~0.base|) 1) (= ~y~0 0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= ~x$r_buff1_thd0~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 16273#[L748](and (= (select |#valid| |~#x~0.base|) 1) (= ~y~0 0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= ~x$r_buff1_thd0~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 16275#[L749](and (= (select |#valid| |~#x~0.base|) 1) (= ~y~0 0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= ~x$r_buff1_thd0~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 16277#[L-1-2](and (= (select |#valid| |~#x~0.base|) 1) (= ~y~0 0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= ~x$r_buff1_thd0~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 16279#[L-1-3](and (= (select |#valid| |~#x~0.base|) 1) (= ~y~0 0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= ~x$r_buff1_thd0~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 16281#[L825](and (= (select |#valid| |~#x~0.base|) 1) (= ~y~0 0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= ~x$r_buff1_thd0~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 16283#[L825-1](and (= (select |#valid| |~#x~0.base|) 1) (= ~y~0 0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (not (= |~#x~0.base| |ULTIMATE.start_main_~#t2667~0.base|)) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= ~x$r_buff1_thd0~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 16285#[L826](and (= (select |#valid| |~#x~0.base|) 1) (= ~y~0 0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (not (= |~#x~0.base| |ULTIMATE.start_main_~#t2667~0.base|)) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= ~x$r_buff1_thd0~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 16287#[L826-1, P0ENTRY](and (= (select |#valid| |~#x~0.base|) 1) (= ~y~0 0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (not (= |~#x~0.base| |ULTIMATE.start_main_~#t2667~0.base|)) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= ~x$r_buff1_thd0~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 16291#[L827, P0ENTRY](and (= (select |#valid| |~#x~0.base|) 1) (= ~y~0 0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (not (= |~#x~0.base| |ULTIMATE.start_main_~#t2667~0.base|)) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= ~x$r_buff1_thd0~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 16295#[L827-1, P0ENTRY](and (= (select |#valid| |~#x~0.base|) 1) (= ~y~0 0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (not (= |~#x~0.base| |ULTIMATE.start_main_~#t2667~0.base|)) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= ~x$r_buff1_thd0~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0) (not (= |~#x~0.base| |ULTIMATE.start_main_~#t2668~0.base|)) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 16299#[L828, P0ENTRY](and (= (select |#valid| |~#x~0.base|) 1) (= ~y~0 0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (not (= |~#x~0.base| |ULTIMATE.start_main_~#t2667~0.base|)) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= ~x$r_buff1_thd0~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0) (not (= |~#x~0.base| |ULTIMATE.start_main_~#t2668~0.base|)) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 16303#[L828, L752](and (= (select |#valid| |~#x~0.base|) 1) (= ~y~0 0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (not (= |~#x~0.base| |ULTIMATE.start_main_~#t2667~0.base|)) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= ~x$r_buff1_thd0~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0) (not (= |~#x~0.base| |ULTIMATE.start_main_~#t2668~0.base|)) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 16305#[L828-1, P1ENTRY, L752](and (= (select |#valid| |~#x~0.base|) 1) (= ~y~0 0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (not (= |~#x~0.base| |ULTIMATE.start_main_~#t2667~0.base|)) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= ~x$r_buff1_thd0~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0) (not (= |~#x~0.base| |ULTIMATE.start_main_~#t2668~0.base|)) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 18335#[P1ENTRY, L752, L829](and (= (select |#valid| |~#x~0.base|) 1) (= ~y~0 0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (not (= |~#x~0.base| |ULTIMATE.start_main_~#t2667~0.base|)) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= ~x$r_buff1_thd0~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0) (not (= |~#x~0.base| |ULTIMATE.start_main_~#t2668~0.base|)) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 18337#[L780, L752, L829](and (= (select |#valid| |~#x~0.base|) 1) (= ~y~0 0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (not (= |~#x~0.base| |ULTIMATE.start_main_~#t2667~0.base|)) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= ~x$r_buff1_thd0~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0) (not (= |~#x~0.base| |ULTIMATE.start_main_~#t2668~0.base|)) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 19746#[L798, L752, L829](and (= (select |#valid| |~#x~0.base|) 1) (not (= |~#x~0.base| |ULTIMATE.start_main_~#t2667~0.base|)) (= ~__unbuffered_p1_EAX$read_delayed~0 1) (not (= ~__unbuffered_p1_EAX~0 1)) (= ~x$r_buff1_thd0~0 0) (not (= (select (select |#memory_int| ~__unbuffered_p1_EAX$read_delayed_var~0.base) ~__unbuffered_p1_EAX$read_delayed_var~0.offset) 1)) (= ~y~0 0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0) (not (= |~#x~0.base| |ULTIMATE.start_main_~#t2668~0.base|)) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 19755#[L801, L752, L829](and (= (select |#valid| |~#x~0.base|) 1) (not (= |~#x~0.base| |ULTIMATE.start_main_~#t2667~0.base|)) (= ~__unbuffered_p1_EAX$read_delayed~0 1) (not (= ~__unbuffered_p1_EAX~0 1)) (= ~x$r_buff1_thd0~0 0) (not (= (select (select |#memory_int| ~__unbuffered_p1_EAX$read_delayed_var~0.base) ~__unbuffered_p1_EAX$read_delayed_var~0.offset) 1)) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0) (not (= |~#x~0.base| |ULTIMATE.start_main_~#t2668~0.base|)) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 19768#[L754, L801, L829](and (= (select |#valid| |~#x~0.base|) 1) (not (= |~#x~0.base| |ULTIMATE.start_main_~#t2667~0.base|)) (= ~__unbuffered_p1_EAX$read_delayed~0 1) (not (= ~__unbuffered_p1_EAX~0 1)) (= ~x$r_buff1_thd0~0 0) (not (= (select (select |#memory_int| ~__unbuffered_p1_EAX$read_delayed_var~0.base) ~__unbuffered_p1_EAX$read_delayed_var~0.offset) 1)) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0) (not (= |~#x~0.base| |ULTIMATE.start_main_~#t2668~0.base|)) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 19784#[L765, L801, L829](and (= (select |#valid| |~#x~0.base|) 1) (not (= (select (select |#memory_int| ~__unbuffered_p1_EAX$read_delayed_var~0.base) ~__unbuffered_p1_EAX$read_delayed_var~0.offset) 1)) (= 0 ~x$r_buff0_thd0~0) (= ~__unbuffered_p1_EAX$read_delayed~0 1) (not (= ~__unbuffered_p1_EAX~0 1)) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= ~x$r_buff1_thd0~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 19798#[L772, L801, L829](and (= (select |#valid| |~#x~0.base|) 1) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 19810#[L775, L801, L829](and (= (select |#valid| |~#x~0.base|) 1) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (<= ~main$tmp_guard0~0 0)), 19822#[L801, P0FINAL, L829](and (= (select |#valid| |~#x~0.base|) 1) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (<= ~main$tmp_guard0~0 0)), 19836#[L801, P0EXIT, L829](and (= (select |#valid| |~#x~0.base|) 1) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (<= ~main$tmp_guard0~0 0)), 19848#[L808, P0EXIT, L829](and (= (select |#valid| |~#x~0.base|) 1) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (<= ~main$tmp_guard0~0 0)), 19856#[L811, P0EXIT, L829](and (= (select |#valid| |~#x~0.base|) 1) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (<= ~main$tmp_guard0~0 0)), 19862#[L831, L811, P0EXIT](= (select |#valid| |~#x~0.base|) 1), 19866#[L832, L811, P0EXIT](= (select |#valid| |~#x~0.base|) 1), 19870#[L2, L811, P0EXIT](= (select |#valid| |~#x~0.base|) 1), 19876#[L3, L811, P0EXIT](= (select |#valid| |~#x~0.base|) 1), 19878#[L2-1, L811, P0EXIT](= (select |#valid| |~#x~0.base|) 1), 19894#[L839, L811, P0EXIT](= (select |#valid| |~#x~0.base|) 1), 19906#[L844, L811, P0EXIT](= (select |#valid| |~#x~0.base|) 1), 19918#[L845, L811, P0EXIT](= (select |#valid| |~#x~0.base|) 1), 19930#[L18, L811, P0EXIT](= (select |#valid| |~#x~0.base|) 1), 19940#[L18-1, L811, P0EXIT](= (select |#valid| |~#x~0.base|) 1), 19958#[L18-2, L811, P0EXIT](= (select |#valid| |~#x~0.base|) 1), 19975#[L17-5, L811, P0EXIT](= (select |#valid| |~#x~0.base|) 1), 19998#[L811, L17-7, P0EXIT](= (select |#valid| |~#x~0.base|) 1), 20025#[L811, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0EXIT](= (select |#valid| |~#x~0.base|) 1)] [2021-01-26 23:11:51,501 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3 [2021-01-26 23:11:51,502 INFO L429 AbstractCegarLoop]: === Iteration 5 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-26 23:11:51,502 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-26 23:11:51,502 INFO L82 PathProgramCache]: Analyzing trace with hash -1468381451, now seen corresponding path program 1 times [2021-01-26 23:11:51,502 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-26 23:11:51,503 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [342090520] [2021-01-26 23:11:51,503 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-26 23:11:51,704 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-01-26 23:11:51,704 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-01-26 23:11:51,920 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-01-26 23:11:51,920 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-01-26 23:11:52,014 INFO L173 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-01-26 23:11:52,014 INFO L605 BasicCegarLoop]: Counterexample might be feasible [2021-01-26 23:11:52,015 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4 [2021-01-26 23:11:52,272 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 26.01 11:11:52 BasicIcfg [2021-01-26 23:11:52,272 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2021-01-26 23:11:52,274 INFO L168 Benchmark]: Toolchain (without parser) took 100510.68 ms. Allocated memory was 302.0 MB in the beginning and 497.0 MB in the end (delta: 195.0 MB). Free memory was 276.8 MB in the beginning and 340.0 MB in the end (delta: -63.3 MB). Peak memory consumption was 133.5 MB. Max. memory is 16.0 GB. [2021-01-26 23:11:52,275 INFO L168 Benchmark]: CDTParser took 0.19 ms. Allocated memory is still 302.0 MB. Free memory is still 272.3 MB. There was no memory consumed. Max. memory is 16.0 GB. [2021-01-26 23:11:52,277 INFO L168 Benchmark]: CACSL2BoogieTranslator took 750.39 ms. Allocated memory is still 302.0 MB. Free memory was 275.7 MB in the beginning and 281.5 MB in the end (delta: -5.8 MB). Peak memory consumption was 40.0 MB. Max. memory is 16.0 GB. [2021-01-26 23:11:52,279 INFO L168 Benchmark]: Boogie Procedure Inliner took 107.83 ms. Allocated memory is still 302.0 MB. Free memory was 281.5 MB in the beginning and 279.3 MB in the end (delta: 2.1 MB). Peak memory consumption was 2.1 MB. Max. memory is 16.0 GB. [2021-01-26 23:11:52,280 INFO L168 Benchmark]: Boogie Preprocessor took 50.71 ms. Allocated memory is still 302.0 MB. Free memory was 279.3 MB in the beginning and 276.2 MB in the end (delta: 3.1 MB). Peak memory consumption was 2.1 MB. Max. memory is 16.0 GB. [2021-01-26 23:11:52,280 INFO L168 Benchmark]: RCFGBuilder took 3803.86 ms. Allocated memory was 302.0 MB in the beginning and 362.8 MB in the end (delta: 60.8 MB). Free memory was 276.2 MB in the beginning and 137.6 MB in the end (delta: 138.6 MB). Peak memory consumption was 202.6 MB. Max. memory is 16.0 GB. [2021-01-26 23:11:52,283 INFO L168 Benchmark]: TraceAbstraction took 95779.43 ms. Allocated memory was 362.8 MB in the beginning and 497.0 MB in the end (delta: 134.2 MB). Free memory was 136.6 MB in the beginning and 340.0 MB in the end (delta: -203.5 MB). There was no memory consumed. Max. memory is 16.0 GB. [2021-01-26 23:11:52,292 INFO L339 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.19 ms. Allocated memory is still 302.0 MB. Free memory is still 272.3 MB. There was no memory consumed. Max. memory is 16.0 GB. * CACSL2BoogieTranslator took 750.39 ms. Allocated memory is still 302.0 MB. Free memory was 275.7 MB in the beginning and 281.5 MB in the end (delta: -5.8 MB). Peak memory consumption was 40.0 MB. Max. memory is 16.0 GB. * Boogie Procedure Inliner took 107.83 ms. Allocated memory is still 302.0 MB. Free memory was 281.5 MB in the beginning and 279.3 MB in the end (delta: 2.1 MB). Peak memory consumption was 2.1 MB. Max. memory is 16.0 GB. * Boogie Preprocessor took 50.71 ms. Allocated memory is still 302.0 MB. Free memory was 279.3 MB in the beginning and 276.2 MB in the end (delta: 3.1 MB). Peak memory consumption was 2.1 MB. Max. memory is 16.0 GB. * RCFGBuilder took 3803.86 ms. Allocated memory was 302.0 MB in the beginning and 362.8 MB in the end (delta: 60.8 MB). Free memory was 276.2 MB in the beginning and 137.6 MB in the end (delta: 138.6 MB). Peak memory consumption was 202.6 MB. Max. memory is 16.0 GB. * TraceAbstraction took 95779.43 ms. Allocated memory was 362.8 MB in the beginning and 497.0 MB in the end (delta: 134.2 MB). Free memory was 136.6 MB in the beginning and 340.0 MB in the end (delta: -203.5 MB). There was no memory consumed. Max. memory is 16.0 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 17]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L708] 0 int __unbuffered_cnt = 0; VAL [__unbuffered_cnt=0] [L710] 0 int __unbuffered_p0_EAX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0] [L712] 0 int __unbuffered_p1_EAX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0] [L713] 0 _Bool __unbuffered_p1_EAX$flush_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0] [L714] 0 int __unbuffered_p1_EAX$mem_tmp; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0] [L715] 0 _Bool __unbuffered_p1_EAX$r_buff0_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0] [L716] 0 _Bool __unbuffered_p1_EAX$r_buff0_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0] [L717] 0 _Bool __unbuffered_p1_EAX$r_buff0_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0] [L718] 0 _Bool __unbuffered_p1_EAX$r_buff1_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0] [L719] 0 _Bool __unbuffered_p1_EAX$r_buff1_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0] [L720] 0 _Bool __unbuffered_p1_EAX$r_buff1_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0] [L721] 0 _Bool __unbuffered_p1_EAX$read_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0] [L722] 0 int *__unbuffered_p1_EAX$read_delayed_var; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}] [L723] 0 int __unbuffered_p1_EAX$w_buff0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0] [L724] 0 _Bool __unbuffered_p1_EAX$w_buff0_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0] [L725] 0 int __unbuffered_p1_EAX$w_buff1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0] [L726] 0 _Bool __unbuffered_p1_EAX$w_buff1_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0] [L727] 0 _Bool main$tmp_guard0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0] [L728] 0 _Bool main$tmp_guard1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0] [L730] 0 int x = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={7:0}] [L731] 0 _Bool x$flush_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={7:0}, x$flush_delayed=0] [L732] 0 int x$mem_tmp; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={7:0}, x$flush_delayed=0, x$mem_tmp=0] [L733] 0 _Bool x$r_buff0_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={7:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0] [L734] 0 _Bool x$r_buff0_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={7:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0] [L735] 0 _Bool x$r_buff0_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={7:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0] [L736] 0 _Bool x$r_buff1_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={7:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0] [L737] 0 _Bool x$r_buff1_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={7:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0] [L738] 0 _Bool x$r_buff1_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={7:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0] [L739] 0 _Bool x$read_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={7:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0] [L740] 0 int *x$read_delayed_var; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={7:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}] [L741] 0 int x$w_buff0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={7:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0] [L742] 0 _Bool x$w_buff0_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={7:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0] [L743] 0 int x$w_buff1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={7:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0] [L744] 0 _Bool x$w_buff1_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={7:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0] [L746] 0 int y = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={7:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L747] 0 _Bool weak$$choice0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, x={7:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L748] 0 _Bool weak$$choice1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, x={7:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L749] 0 _Bool weak$$choice2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x={7:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L825] 0 pthread_t t2667; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x={7:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L826] FCALL, FORK 0 pthread_create(&t2667, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x={7:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L827] 0 pthread_t t2668; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x={7:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L828] FCALL, FORK 0 pthread_create(&t2668, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x={7:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L781] 2 weak$$choice0 = __VERIFIER_nondet_bool() [L782] 2 weak$$choice2 = __VERIFIER_nondet_bool() [L783] 2 x$flush_delayed = weak$$choice2 [L784] EXPR 2 \read(x) [L784] 2 x$mem_tmp = x [L785] 2 weak$$choice1 = __VERIFIER_nondet_bool() [L786] EXPR 2 !x$w_buff0_used ? x : (x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (weak$$choice0 ? x : (weak$$choice1 ? x$w_buff0 : x$w_buff1)) : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (weak$$choice0 ? x$w_buff1 : x$w_buff0) : (weak$$choice0 ? x$w_buff0 : x)))) [L786] EXPR 2 \read(x) [L786] EXPR 2 !x$w_buff0_used ? x : (x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (weak$$choice0 ? x : (weak$$choice1 ? x$w_buff0 : x$w_buff1)) : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (weak$$choice0 ? x$w_buff1 : x$w_buff0) : (weak$$choice0 ? x$w_buff0 : x)))) [L786] 2 x = !x$w_buff0_used ? x : (x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (weak$$choice0 ? x : (weak$$choice1 ? x$w_buff0 : x$w_buff1)) : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (weak$$choice0 ? x$w_buff1 : x$w_buff0) : (weak$$choice0 ? x$w_buff0 : x)))) [L787] EXPR 2 weak$$choice2 ? x$w_buff0 : (!x$w_buff0_used ? x$w_buff0 : (x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? x$w_buff0 : x$w_buff0)))) [L787] 2 x$w_buff0 = weak$$choice2 ? x$w_buff0 : (!x$w_buff0_used ? x$w_buff0 : (x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? x$w_buff0 : x$w_buff0)))) [L788] EXPR 2 weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff1 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? x$w_buff1 : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? x$w_buff1 : x$w_buff1)))) [L788] 2 x$w_buff1 = weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff1 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? x$w_buff1 : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? x$w_buff1 : x$w_buff1)))) [L789] EXPR 2 weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? weak$$choice0 || !weak$$choice1 : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? weak$$choice0 : weak$$choice0)))) [L789] 2 x$w_buff0_used = weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? weak$$choice0 || !weak$$choice1 : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? weak$$choice0 : weak$$choice0)))) [L790] EXPR 2 weak$$choice2 ? x$w_buff1_used : (!x$w_buff0_used ? x$w_buff1_used : (x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? weak$$choice0 : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)))) [L790] 2 x$w_buff1_used = weak$$choice2 ? x$w_buff1_used : (!x$w_buff0_used ? x$w_buff1_used : (x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? weak$$choice0 : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)))) [L791] EXPR 2 weak$$choice2 ? x$r_buff0_thd2 : (!x$w_buff0_used ? x$r_buff0_thd2 : (x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? x$r_buff0_thd2 : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)))) [L791] 2 x$r_buff0_thd2 = weak$$choice2 ? x$r_buff0_thd2 : (!x$w_buff0_used ? x$r_buff0_thd2 : (x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? x$r_buff0_thd2 : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)))) [L792] EXPR 2 weak$$choice2 ? x$r_buff1_thd2 : (!x$w_buff0_used ? x$r_buff1_thd2 : (x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (weak$$choice0 ? x$r_buff1_thd2 : (_Bool)0) : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)))) [L792] 2 x$r_buff1_thd2 = weak$$choice2 ? x$r_buff1_thd2 : (!x$w_buff0_used ? x$r_buff1_thd2 : (x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (weak$$choice0 ? x$r_buff1_thd2 : (_Bool)0) : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)))) [L793] 2 __unbuffered_p1_EAX$read_delayed = (_Bool)1 [L794] 2 __unbuffered_p1_EAX$read_delayed_var = &x [L795] EXPR 2 \read(x) [L795] 2 __unbuffered_p1_EAX = x [L796] EXPR 2 x$flush_delayed ? x$mem_tmp : x [L796] 2 x = x$flush_delayed ? x$mem_tmp : x [L797] 2 x$flush_delayed = (_Bool)0 VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={7:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=255, weak$$choice2=255, x={7:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L800] 2 y = 1 VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={7:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=255, weak$$choice2=255, x={7:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L753] 1 __unbuffered_p0_EAX = y VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={7:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=255, weak$$choice2=255, x={7:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L756] 1 x$w_buff1 = x$w_buff0 [L757] 1 x$w_buff0 = 1 [L758] 1 x$w_buff1_used = x$w_buff0_used [L759] 1 x$w_buff0_used = (_Bool)1 [L18] COND FALSE 1 !(!expression) [L761] 1 x$r_buff1_thd0 = x$r_buff0_thd0 [L762] 1 x$r_buff1_thd1 = x$r_buff0_thd1 [L763] 1 x$r_buff1_thd2 = x$r_buff0_thd2 [L764] 1 x$r_buff0_thd1 = (_Bool)1 VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={7:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=255, weak$$choice2=255, x={7:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1] [L767] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x) [L767] 1 x = x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x) [L768] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$w_buff0_used [L768] 1 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$w_buff0_used [L769] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$w_buff1_used [L769] 1 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$w_buff1_used [L770] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$r_buff0_thd1 [L770] 1 x$r_buff0_thd1 = x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$r_buff0_thd1 [L771] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$r_buff1_thd1 [L771] 1 x$r_buff1_thd1 = x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$r_buff1_thd1 [L774] 1 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={7:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=255, weak$$choice2=255, x={7:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L776] 1 return 0; VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={7:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=255, weak$$choice2=255, x={7:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L803] EXPR 2 x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x) [L803] EXPR 2 x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x [L803] EXPR 2 \read(x) [L803] EXPR 2 x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x [L803] EXPR 2 x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x) [L803] 2 x = x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x) [L804] EXPR 2 x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$w_buff0_used [L804] 2 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$w_buff0_used [L805] EXPR 2 x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$w_buff1_used [L805] 2 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$w_buff1_used [L806] EXPR 2 x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$r_buff0_thd2 [L806] 2 x$r_buff0_thd2 = x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$r_buff0_thd2 [L807] EXPR 2 x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$r_buff1_thd2 [L807] 2 x$r_buff1_thd2 = x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$r_buff1_thd2 [L810] 2 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={7:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=255, weak$$choice2=255, x={7:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L830] 0 main$tmp_guard0 = __unbuffered_cnt == 2 VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={7:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=255, weak$$choice2=255, x={7:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L3] COND FALSE 0 !(!cond) VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={7:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=255, weak$$choice2=255, x={7:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L834] EXPR 0 x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x) [L834] EXPR 0 x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x [L834] EXPR 0 \read(x) [L834] EXPR 0 x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x [L834] EXPR 0 x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x) [L834] 0 x = x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x) [L835] EXPR 0 x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used [L835] 0 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used [L836] EXPR 0 x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$w_buff1_used [L836] 0 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$w_buff1_used [L837] EXPR 0 x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$r_buff0_thd0 [L837] 0 x$r_buff0_thd0 = x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$r_buff0_thd0 [L838] EXPR 0 x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$r_buff1_thd0 [L838] 0 x$r_buff1_thd0 = x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$r_buff1_thd0 [L841] 0 weak$$choice1 = __VERIFIER_nondet_bool() [L842] EXPR 0 __unbuffered_p1_EAX$read_delayed ? (weak$$choice1 ? *__unbuffered_p1_EAX$read_delayed_var : __unbuffered_p1_EAX) : __unbuffered_p1_EAX [L842] EXPR 0 weak$$choice1 ? *__unbuffered_p1_EAX$read_delayed_var : __unbuffered_p1_EAX [L842] EXPR 0 \read(*__unbuffered_p1_EAX$read_delayed_var) [L842] EXPR 0 weak$$choice1 ? *__unbuffered_p1_EAX$read_delayed_var : __unbuffered_p1_EAX [L842] EXPR 0 __unbuffered_p1_EAX$read_delayed ? (weak$$choice1 ? *__unbuffered_p1_EAX$read_delayed_var : __unbuffered_p1_EAX) : __unbuffered_p1_EAX [L842] 0 __unbuffered_p1_EAX = __unbuffered_p1_EAX$read_delayed ? (weak$$choice1 ? *__unbuffered_p1_EAX$read_delayed_var : __unbuffered_p1_EAX) : __unbuffered_p1_EAX [L843] 0 main$tmp_guard1 = !(__unbuffered_p0_EAX == 1 && __unbuffered_p1_EAX == 1) VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={7:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=255, weak$$choice2=255, x={7:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L18] COND TRUE 0 !expression VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={7:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=255, weak$$choice2=255, x={7:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L17] COND FALSE 0 !(0) VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={7:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=255, weak$$choice2=255, x={7:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L17] 0 __assert_fail ("0", "thin000_power.opt.c", 8, __extension__ __PRETTY_FUNCTION__) VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={7:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=255, weak$$choice2=255, x={7:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] - StatisticsResult: Ultimate Automizer benchmark data CFG has 3 procedures, 99 locations, 2 error locations. Started 1 CEGAR loops. VerificationResult: UNSAFE, OverallTime: 95.2s, OverallIterations: 5, TraceHistogramMax: 0, AutomataDifference: 0.0s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, HoareTripleCheckerStatistics: No data available, PredicateUnifierStatistics: No data available, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=0occurred in iteration=0, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: No data available, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.7s SatisfiabilityAnalysisTime, 1.1s InterpolantComputationTime, 368 NumberOfCodeBlocks, 368 NumberOfCodeBlocksAsserted, 5 NumberOfCheckSat, 282 ConstructedInterpolants, 0 QuantifiedInterpolants, 95138 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 4 InterpolantComputations, 4 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...