/usr/bin/java -Xmx16000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata ./data -tc ../../../trunk/examples/toolchains/AutomizerCInline.xml -s ../../../trunk/examples/settings/automizer/concurrent/svcomp-Reach-32bit-Automizer_Default-noMmResRef-Sleep-NoLbe-New_States.epf -i ../../../trunk/examples/svcomp/pthread-wmm/safe016_rmo.opt.i -------------------------------------------------------------------------------- This is Ultimate 0.2.0-6f57305 [2021-01-27 02:28:20,717 INFO L177 SettingsManager]: Resetting all preferences to default values... [2021-01-27 02:28:20,722 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2021-01-27 02:28:20,775 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2021-01-27 02:28:20,776 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2021-01-27 02:28:20,780 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2021-01-27 02:28:20,783 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2021-01-27 02:28:20,790 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2021-01-27 02:28:20,794 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2021-01-27 02:28:20,800 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2021-01-27 02:28:20,801 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2021-01-27 02:28:20,803 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2021-01-27 02:28:20,803 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2021-01-27 02:28:20,806 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2021-01-27 02:28:20,808 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2021-01-27 02:28:20,810 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2021-01-27 02:28:20,811 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2021-01-27 02:28:20,814 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2021-01-27 02:28:20,822 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2021-01-27 02:28:20,824 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2021-01-27 02:28:20,829 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2021-01-27 02:28:20,833 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2021-01-27 02:28:20,834 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2021-01-27 02:28:20,835 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2021-01-27 02:28:20,838 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... 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[2021-01-27 02:28:20,847 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2021-01-27 02:28:20,848 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2021-01-27 02:28:20,849 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2021-01-27 02:28:20,850 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/automizer/concurrent/svcomp-Reach-32bit-Automizer_Default-noMmResRef-Sleep-NoLbe-New_States.epf [2021-01-27 02:28:20,875 INFO L113 SettingsManager]: Loading preferences was successful [2021-01-27 02:28:20,875 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2021-01-27 02:28:20,879 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2021-01-27 02:28:20,879 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2021-01-27 02:28:20,880 INFO L138 SettingsManager]: * Use SBE=true [2021-01-27 02:28:20,880 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2021-01-27 02:28:20,880 INFO L138 SettingsManager]: * sizeof long=4 [2021-01-27 02:28:20,880 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2021-01-27 02:28:20,881 INFO L138 SettingsManager]: * sizeof POINTER=4 [2021-01-27 02:28:20,881 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2021-01-27 02:28:20,881 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2021-01-27 02:28:20,881 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2021-01-27 02:28:20,882 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2021-01-27 02:28:20,883 INFO L138 SettingsManager]: * sizeof long double=12 [2021-01-27 02:28:20,883 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2021-01-27 02:28:20,884 INFO L138 SettingsManager]: * Use constant arrays=true [2021-01-27 02:28:20,884 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2021-01-27 02:28:20,884 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2021-01-27 02:28:20,884 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2021-01-27 02:28:20,885 INFO L138 SettingsManager]: * To the following directory=./dump/ [2021-01-27 02:28:20,885 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2021-01-27 02:28:20,885 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2021-01-27 02:28:20,886 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2021-01-27 02:28:20,886 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2021-01-27 02:28:20,886 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2021-01-27 02:28:20,887 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2021-01-27 02:28:20,887 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2021-01-27 02:28:20,887 INFO L138 SettingsManager]: * Large block encoding in concurrent analysis=OFF [2021-01-27 02:28:20,888 INFO L138 SettingsManager]: * Lazy Petri-NFA conversion=true [2021-01-27 02:28:20,888 INFO L138 SettingsManager]: * Automaton type used in concurrency analysis=SLEEP_SET_FA [2021-01-27 02:28:20,888 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2021-01-27 02:28:20,889 INFO L138 SettingsManager]: * Minimization of abstraction=NONE [2021-01-27 02:28:20,889 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2021-01-27 02:28:20,890 INFO L138 SettingsManager]: * Sleep set reduction in concurrent analysis=NEW_STATES WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release [2021-01-27 02:28:21,280 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2021-01-27 02:28:21,311 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2021-01-27 02:28:21,314 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2021-01-27 02:28:21,316 INFO L271 PluginConnector]: Initializing CDTParser... [2021-01-27 02:28:21,317 INFO L275 PluginConnector]: CDTParser initialized [2021-01-27 02:28:21,318 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/pthread-wmm/safe016_rmo.opt.i [2021-01-27 02:28:21,399 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/124b97448/296e3ea6e4c74f1b8f1155c0bb5c25b5/FLAGc007408fb [2021-01-27 02:28:22,060 INFO L306 CDTParser]: Found 1 translation units. [2021-01-27 02:28:22,061 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/pthread-wmm/safe016_rmo.opt.i [2021-01-27 02:28:22,080 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/124b97448/296e3ea6e4c74f1b8f1155c0bb5c25b5/FLAGc007408fb [2021-01-27 02:28:22,302 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/124b97448/296e3ea6e4c74f1b8f1155c0bb5c25b5 [2021-01-27 02:28:22,307 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2021-01-27 02:28:22,320 INFO L131 ToolchainWalker]: Walking toolchain with 5 elements. [2021-01-27 02:28:22,324 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2021-01-27 02:28:22,324 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2021-01-27 02:28:22,328 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2021-01-27 02:28:22,328 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 27.01 02:28:22" (1/1) ... [2021-01-27 02:28:22,336 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@1082fff5 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.01 02:28:22, skipping insertion in model container [2021-01-27 02:28:22,336 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 27.01 02:28:22" (1/1) ... [2021-01-27 02:28:22,351 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2021-01-27 02:28:22,431 INFO L178 MainTranslator]: Built tables and reachable declarations [2021-01-27 02:28:22,938 INFO L206 PostProcessor]: Analyzing one entry point: main [2021-01-27 02:28:22,958 INFO L203 MainTranslator]: Completed pre-run [2021-01-27 02:28:23,030 INFO L206 PostProcessor]: Analyzing one entry point: main [2021-01-27 02:28:23,196 INFO L208 MainTranslator]: Completed translation [2021-01-27 02:28:23,196 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.01 02:28:23 WrapperNode [2021-01-27 02:28:23,197 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2021-01-27 02:28:23,198 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2021-01-27 02:28:23,198 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2021-01-27 02:28:23,198 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2021-01-27 02:28:23,209 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.01 02:28:23" (1/1) ... [2021-01-27 02:28:23,246 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.01 02:28:23" (1/1) ... [2021-01-27 02:28:23,284 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2021-01-27 02:28:23,285 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2021-01-27 02:28:23,288 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2021-01-27 02:28:23,288 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2021-01-27 02:28:23,297 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.01 02:28:23" (1/1) ... [2021-01-27 02:28:23,297 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.01 02:28:23" (1/1) ... [2021-01-27 02:28:23,307 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.01 02:28:23" (1/1) ... [2021-01-27 02:28:23,307 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.01 02:28:23" (1/1) ... [2021-01-27 02:28:23,323 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.01 02:28:23" (1/1) ... [2021-01-27 02:28:23,328 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.01 02:28:23" (1/1) ... [2021-01-27 02:28:23,334 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.01 02:28:23" (1/1) ... [2021-01-27 02:28:23,341 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2021-01-27 02:28:23,342 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2021-01-27 02:28:23,342 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2021-01-27 02:28:23,343 INFO L275 PluginConnector]: RCFGBuilder initialized [2021-01-27 02:28:23,344 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.01 02:28:23" (1/1) ... No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2021-01-27 02:28:23,460 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2021-01-27 02:28:23,462 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2021-01-27 02:28:23,462 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2021-01-27 02:28:23,463 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2021-01-27 02:28:23,463 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2021-01-27 02:28:23,464 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2021-01-27 02:28:23,464 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2021-01-27 02:28:23,464 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2021-01-27 02:28:23,464 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2021-01-27 02:28:23,464 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2021-01-27 02:28:23,465 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2021-01-27 02:28:23,465 INFO L130 BoogieDeclarations]: Found specification of procedure P3 [2021-01-27 02:28:23,465 INFO L138 BoogieDeclarations]: Found implementation of procedure P3 [2021-01-27 02:28:23,465 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2021-01-27 02:28:23,465 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2021-01-27 02:28:23,465 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2021-01-27 02:28:23,466 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2021-01-27 02:28:23,468 WARN L208 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2021-01-27 02:28:27,042 INFO L293 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2021-01-27 02:28:27,042 INFO L298 CfgBuilder]: Removed 10 assume(true) statements. [2021-01-27 02:28:27,044 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 27.01 02:28:27 BoogieIcfgContainer [2021-01-27 02:28:27,044 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2021-01-27 02:28:27,046 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2021-01-27 02:28:27,046 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2021-01-27 02:28:27,049 INFO L275 PluginConnector]: TraceAbstraction initialized [2021-01-27 02:28:27,049 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 27.01 02:28:22" (1/3) ... [2021-01-27 02:28:27,050 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@782fb0bb and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 27.01 02:28:27, skipping insertion in model container [2021-01-27 02:28:27,050 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.01 02:28:23" (2/3) ... [2021-01-27 02:28:27,051 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@782fb0bb and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 27.01 02:28:27, skipping insertion in model container [2021-01-27 02:28:27,051 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 27.01 02:28:27" (3/3) ... [2021-01-27 02:28:27,052 INFO L111 eAbstractionObserver]: Analyzing ICFG safe016_rmo.opt.i [2021-01-27 02:28:27,067 WARN L168 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2021-01-27 02:28:27,068 INFO L179 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2021-01-27 02:28:27,072 INFO L191 ceAbstractionStarter]: Appying trace abstraction to program that has 1 error locations. [2021-01-27 02:28:27,072 INFO L351 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2021-01-27 02:28:27,124 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,124 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,124 WARN L313 ript$VariableManager]: TermVariabe P0Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,124 WARN L313 ript$VariableManager]: TermVariabe P0Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,124 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,125 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,125 WARN L313 ript$VariableManager]: TermVariabe P0Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,125 WARN L313 ript$VariableManager]: TermVariabe P0Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,125 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~mem5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,125 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,126 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~mem5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,126 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,126 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,126 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,126 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,126 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,126 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,127 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~mem5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,127 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,127 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~mem5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,128 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,128 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,128 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,128 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,128 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,128 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,129 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,129 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,130 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,130 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,130 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork3_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,130 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork3_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,130 WARN L313 ript$VariableManager]: TermVariabe P1Thread1of1ForFork3_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,131 WARN L313 ript$VariableManager]: TermVariabe P1Thread1of1ForFork3_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,131 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork3_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,131 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork3_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,131 WARN L313 ript$VariableManager]: TermVariabe P1Thread1of1ForFork3_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,131 WARN L313 ript$VariableManager]: TermVariabe P1Thread1of1ForFork3_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,131 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork3_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,132 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork3_#t~mem12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,132 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork3_#t~mem12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,132 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork3_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,132 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork3_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,132 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork3_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,132 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork3_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,132 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork3_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,133 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork3_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,133 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork3_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,133 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork3_#t~mem12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,134 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork3_#t~mem12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,134 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork3_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,134 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork3_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,134 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork3_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,134 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork3_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,134 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork3_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,134 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork3_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,135 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork3_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,135 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork3_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,135 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork3_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,136 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork3_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,136 WARN L313 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,136 WARN L313 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,136 WARN L313 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,136 WARN L313 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,137 WARN L313 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,137 WARN L313 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,137 WARN L313 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,137 WARN L313 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,137 WARN L313 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,137 WARN L313 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~mem22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,138 WARN L313 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~mem44| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,138 WARN L313 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,138 WARN L313 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,138 WARN L313 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,138 WARN L313 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,138 WARN L313 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,139 WARN L313 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,139 WARN L313 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,139 WARN L313 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,139 WARN L313 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,139 WARN L313 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,139 WARN L313 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,139 WARN L313 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,140 WARN L313 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,140 WARN L313 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,140 WARN L313 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~mem43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,140 WARN L313 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,140 WARN L313 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~mem21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,140 WARN L313 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~mem22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,140 WARN L313 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~mem44| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,141 WARN L313 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,141 WARN L313 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,141 WARN L313 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,141 WARN L313 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,141 WARN L313 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,141 WARN L313 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,142 WARN L313 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,142 WARN L313 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,142 WARN L313 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,142 WARN L313 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,142 WARN L313 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,142 WARN L313 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite45| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,143 WARN L313 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,143 WARN L313 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,143 WARN L313 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,143 WARN L313 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,143 WARN L313 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,143 WARN L313 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,143 WARN L313 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,144 WARN L313 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,144 WARN L313 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,144 WARN L313 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,146 WARN L313 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,146 WARN L313 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~mem22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,146 WARN L313 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~mem44| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,147 WARN L313 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,147 WARN L313 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,147 WARN L313 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,147 WARN L313 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,147 WARN L313 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,147 WARN L313 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,147 WARN L313 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,147 WARN L313 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,148 WARN L313 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,148 WARN L313 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,148 WARN L313 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,148 WARN L313 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,148 WARN L313 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,148 WARN L313 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,148 WARN L313 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~mem43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,148 WARN L313 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,149 WARN L313 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~mem21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,149 WARN L313 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~mem22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,149 WARN L313 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~mem44| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,149 WARN L313 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,149 WARN L313 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,149 WARN L313 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,149 WARN L313 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,150 WARN L313 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,150 WARN L313 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,150 WARN L313 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,150 WARN L313 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,150 WARN L313 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,150 WARN L313 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,150 WARN L313 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,150 WARN L313 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite45| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,151 WARN L313 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,151 WARN L313 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,151 WARN L313 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,151 WARN L313 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,151 WARN L313 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,151 WARN L313 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,151 WARN L313 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,152 WARN L313 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,152 WARN L313 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,152 WARN L313 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,154 WARN L313 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite47| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,154 WARN L313 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~mem46| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,155 WARN L313 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~mem46| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,155 WARN L313 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite49| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,155 WARN L313 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite47| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,155 WARN L313 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite48| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,155 WARN L313 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite52| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,155 WARN L313 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite50| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,155 WARN L313 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite51| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,156 WARN L313 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite47| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,156 WARN L313 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~mem46| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,156 WARN L313 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~mem46| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,156 WARN L313 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite49| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,157 WARN L313 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite47| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,157 WARN L313 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite48| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,157 WARN L313 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite52| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,157 WARN L313 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite50| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,157 WARN L313 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite51| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,158 WARN L313 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,158 WARN L313 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,158 WARN L313 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,158 WARN L313 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,159 WARN L313 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,159 WARN L313 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,159 WARN L313 ript$VariableManager]: TermVariabe P3Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,159 WARN L313 ript$VariableManager]: TermVariabe P3Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,159 WARN L313 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,159 WARN L313 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,159 WARN L313 ript$VariableManager]: TermVariabe P3Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,160 WARN L313 ript$VariableManager]: TermVariabe P3Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,160 WARN L313 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork1_#t~ite54| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,160 WARN L313 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork1_#t~mem53| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,160 WARN L313 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork1_#t~mem53| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,160 WARN L313 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork1_#t~ite55| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,160 WARN L313 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork1_#t~ite56| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,160 WARN L313 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork1_#t~ite54| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,161 WARN L313 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork1_#t~ite59| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,161 WARN L313 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork1_#t~ite57| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,161 WARN L313 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork1_#t~ite58| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,161 WARN L313 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork1_#t~ite54| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,162 WARN L313 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork1_#t~mem53| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,162 WARN L313 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork1_#t~mem53| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,162 WARN L313 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork1_#t~ite55| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,162 WARN L313 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork1_#t~ite56| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,162 WARN L313 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork1_#t~ite54| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,162 WARN L313 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork1_#t~ite59| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,162 WARN L313 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork1_#t~ite57| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,163 WARN L313 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork1_#t~ite58| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,163 WARN L313 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,164 WARN L313 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,164 WARN L313 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,164 WARN L313 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,166 WARN L313 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,166 WARN L313 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,166 WARN L313 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,166 WARN L313 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,167 WARN L313 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,167 WARN L313 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite48| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,167 WARN L313 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,167 WARN L313 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite47| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,167 WARN L313 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,167 WARN L313 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,168 WARN L313 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite49| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,168 WARN L313 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,168 WARN L313 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,168 WARN L313 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite45| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,168 WARN L313 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,168 WARN L313 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,169 WARN L313 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,169 WARN L313 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,169 WARN L313 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,169 WARN L313 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite52| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,169 WARN L313 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,170 WARN L313 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite50| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,170 WARN L313 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,170 WARN L313 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite51| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,170 WARN L313 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,170 WARN L313 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,170 WARN L313 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,171 WARN L313 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,171 WARN L313 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,171 WARN L313 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,171 WARN L313 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,171 WARN L313 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,171 WARN L313 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,172 WARN L313 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~mem46| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,172 WARN L313 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~mem22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,172 WARN L313 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~mem44| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,172 WARN L313 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~mem43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,172 WARN L313 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~mem21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,177 WARN L313 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork1_#t~ite54| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,177 WARN L313 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork1_#t~ite55| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,177 WARN L313 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork1_#t~ite56| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,177 WARN L313 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,178 WARN L313 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork1_#t~ite57| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,178 WARN L313 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork1_#t~ite58| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,178 WARN L313 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork1_#t~ite59| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,178 WARN L313 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,178 WARN L313 ript$VariableManager]: TermVariabe P3Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,178 WARN L313 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork1_#t~mem53| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,179 WARN L313 ript$VariableManager]: TermVariabe P3Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,181 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,181 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,181 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,182 WARN L313 ript$VariableManager]: TermVariabe P0Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,182 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,182 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,182 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,182 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,182 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~mem5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,183 WARN L313 ript$VariableManager]: TermVariabe P0Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,183 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,184 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork3_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,184 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork3_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,184 WARN L313 ript$VariableManager]: TermVariabe P1Thread1of1ForFork3_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,185 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork3_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,185 WARN L313 ript$VariableManager]: TermVariabe P1Thread1of1ForFork3_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,185 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork3_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,185 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork3_#t~mem12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,185 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork3_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,185 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork3_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,186 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork3_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,186 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork3_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:28:27,187 INFO L149 ThreadInstanceAdder]: Constructed 0 joinOtherThreadTransitions. [2021-01-27 02:28:27,200 INFO L253 AbstractCegarLoop]: Starting to check reachability of 5 error locations. [2021-01-27 02:28:27,224 INFO L377 AbstractCegarLoop]: Interprodecural is true [2021-01-27 02:28:27,224 INFO L378 AbstractCegarLoop]: Hoare is true [2021-01-27 02:28:27,224 INFO L379 AbstractCegarLoop]: Compute interpolants for FPandBP [2021-01-27 02:28:27,224 INFO L380 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2021-01-27 02:28:27,224 INFO L381 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2021-01-27 02:28:27,224 INFO L382 AbstractCegarLoop]: Difference is false [2021-01-27 02:28:27,224 INFO L383 AbstractCegarLoop]: Minimize is NONE [2021-01-27 02:28:27,225 INFO L387 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== Size of Word is: 107 and size of Sequence is : 108[2021-01-27 02:28:27,274 INFO L164 SleepSetCegar]: Size of mCounterexample is: 108 [2021-01-27 02:28:27,274 INFO L165 SleepSetCegar]: [149#[ULTIMATE.startENTRY]don't care, 152#[L-1]don't care, 155#[L-1-1]don't care, 158#[L17]don't care, 161#[L17-1]don't care, 164#[L17-2]don't care, 167#[L17-3]don't care, 170#[L17-4]don't care, 173#[L712]don't care, 176#[L714]don't care, 179#[L715]don't care, 182#[L716]don't care, 185#[L717]don't care, 188#[L718]don't care, 191#[L719]don't care, 194#[L720]don't care, 197#[L721]don't care, 200#[L722]don't care, 203#[L723]don't care, 206#[L724]don't care, 209#[L725]don't care, 212#[L726]don't care, 215#[L727]don't care, 218#[L728]don't care, 221#[L729]don't care, 224#[L730]don't care, 227#[L731]don't care, 230#[L732]don't care, 233#[L733]don't care, 236#[L734]don't care, 239#[L736]don't care, 242#[L736-1]don't care, 245#[L736-2]don't care, 248#[L738]don't care, 251#[L739]don't care, 254#[L740]don't care, 257#[L741]don't care, 260#[L742]don't care, 263#[L743]don't care, 266#[L744]don't care, 269#[L745]don't care, 272#[L746]don't care, 275#[L747]don't care, 278#[L748]don't care, 281#[L749]don't care, 284#[L750]don't care, 287#[L751]don't care, 290#[L752]don't care, 293#[L753]don't care, 296#[L754]don't care, 299#[L756]don't care, 302#[L757]don't care, 305#[L758]don't care, 308#[L759]don't care, 311#[L-1-2]don't care, 314#[L-1-3]don't care, 317#[L860]don't care, 320#[L860-1]don't care, 323#[L861]don't care, 326#[L861-1, P0ENTRY]don't care, 329#[P0ENTRY, L862]don't care, 335#[L862-1, P0ENTRY]don't care, 341#[L863, P0ENTRY]don't care, 349#[L863, L762]don't care, 353#[L863, L764]don't care, 361#[L863, L766]don't care, 367#[L863, L774]don't care, 373#[L863, L777]don't care, 379#[L863, P0FINAL]don't care, 385#[L863, P0EXIT]don't care, 389#[P1ENTRY, P0EXIT, L863-1]don't care, 392#[P1ENTRY, P0EXIT, L864]don't care, 398#[P1ENTRY, L864-1, P0EXIT]don't care, 406#[P1ENTRY, P0EXIT, L865]don't care, 410#[P0EXIT, L782, L865]don't care, 416#[P0EXIT, L783, L865]don't care, 422#[P0EXIT, L791, L865]don't care, 428#[P0EXIT, L794, L865]don't care, 434#[P0EXIT, P1FINAL, L865]don't care, 442#[P0EXIT, P1EXIT, L865]don't care, 446#[P2ENTRY, P0EXIT, P1EXIT, L865-1]don't care, 451#[P2ENTRY, P0EXIT, L866, P1EXIT]don't care, 457#[P2ENTRY, P0EXIT, L866-1, P1EXIT]don't care, 463#[P2ENTRY, P0EXIT, P1EXIT, L867]don't care, 469#[P0EXIT, L799, P1EXIT, L867]don't care, 475#[P0EXIT, P1EXIT, L867, L816]don't care, 481#[P0EXIT, P1EXIT, L867, L819]don't care, 485#[P0EXIT, L826, P1EXIT, L867]don't care, 493#[P0EXIT, P1EXIT, L867, L829]don't care, 499#[P0EXIT, P1EXIT, L867, P2FINAL]don't care, 505#[P0EXIT, P2EXIT, P1EXIT, L867]don't care, 509#[P0EXIT, P2EXIT, P1EXIT, L867-1, P3ENTRY]don't care, 512#[P0EXIT, P2EXIT, L868, P1EXIT, P3ENTRY]don't care, 520#[P0EXIT, P2EXIT, L870, P1EXIT, P3ENTRY]don't care, 524#[P0EXIT, L871, P2EXIT, P1EXIT, P3ENTRY]don't care, 532#[P0EXIT, P2EXIT, L2, P1EXIT, P3ENTRY]don't care, 536#[P0EXIT, P2EXIT, L3, P1EXIT, P3ENTRY]don't care, 542#[P0EXIT, P2EXIT, L3-1, P1EXIT, P3ENTRY]don't care, 544#[P0EXIT, P2EXIT, L2-1, P1EXIT, P3ENTRY]don't care, 555#[P0EXIT, P2EXIT, L878, P1EXIT, P3ENTRY]don't care, 561#[P0EXIT, P2EXIT, P1EXIT, P3ENTRY, L896]don't care, 569#[P0EXIT, P2EXIT, P1EXIT, P3ENTRY, L897]don't care, 573#[P0EXIT, P2EXIT, P1EXIT, L18, P3ENTRY]don't care, 579#[P0EXIT, P2EXIT, L18-1, P1EXIT, P3ENTRY]don't care, 585#[P0EXIT, P2EXIT, L18-2, P1EXIT, P3ENTRY]don't care, 594#[P0EXIT, L17-5, P2EXIT, P1EXIT, P3ENTRY]don't care, 604#[P0EXIT, P2EXIT, P1EXIT, P3ENTRY, L17-7]don't care, 877#[P0EXIT, P2EXIT, P1EXIT, P3ENTRY, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]don't care] [2021-01-27 02:28:27,275 INFO L429 AbstractCegarLoop]: === Iteration 1 === [ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-27 02:28:27,280 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-27 02:28:27,281 INFO L82 PathProgramCache]: Analyzing trace with hash -1201716919, now seen corresponding path program 1 times [2021-01-27 02:28:27,290 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-27 02:28:27,290 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1640760617] [2021-01-27 02:28:27,291 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-27 02:28:27,559 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-27 02:28:27,719 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-27 02:28:27,720 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1640760617] [2021-01-27 02:28:27,721 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-27 02:28:27,721 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2021-01-27 02:28:27,722 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1148244356] [2021-01-27 02:28:27,731 INFO L461 AbstractCegarLoop]: Interpolant automaton has 2 states [2021-01-27 02:28:27,731 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-27 02:28:27,745 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2021-01-27 02:28:27,747 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2021-01-27 02:28:27,749 INFO L481 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2021-01-27 02:28:27,751 INFO L482 AbstractCegarLoop]: Interpolant automaton has has 2 states, 2 states have (on average 53.5) internal successors, (107), 2 states have internal predecessors, (107), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Size of Word is: 106 and size of Sequence is : 107[2021-01-27 02:28:27,777 INFO L164 SleepSetCegar]: Size of mCounterexample is: 107 [2021-01-27 02:28:27,778 INFO L165 SleepSetCegar]: [885#[ULTIMATE.startENTRY]true, 887#[L-1]true, 889#[L-1-1]true, 891#[L17]true, 893#[L17-1]true, 895#[L17-2]true, 897#[L17-3]true, 899#[L17-4]true, 901#[L712]true, 903#[L714]true, 905#[L715]true, 907#[L716]true, 909#[L717]true, 911#[L718]true, 913#[L719]true, 915#[L720]true, 917#[L721]true, 919#[L722]true, 921#[L723]true, 923#[L724]true, 925#[L725]true, 927#[L726]true, 929#[L727]true, 931#[L728]true, 933#[L729]true, 935#[L730]true, 937#[L731]true, 939#[L732]true, 941#[L733]true, 943#[L734]true, 945#[L736]true, 947#[L736-1]true, 949#[L736-2]true, 951#[L738]true, 953#[L739]true, 955#[L740]true, 957#[L741]true, 959#[L742]true, 961#[L743]true, 963#[L744]true, 965#[L745]true, 967#[L746]true, 969#[L747]true, 971#[L748]true, 973#[L749]true, 975#[L750]true, 977#[L751]true, 979#[L752]true, 981#[L753]true, 983#[L754]true, 985#[L756]true, 987#[L757]true, 989#[L758]true, 991#[L759]true, 993#[L-1-2]true, 995#[L-1-3]true, 997#[L860]true, 999#[L860-1]true, 1001#[L861]true, 1003#[L861-1, P0ENTRY]true, 1005#[P0ENTRY, L862]true, 1009#[L862-1, P0ENTRY]true, 1013#[L863, P0ENTRY]true, 1018#[L863, L762]true, 1021#[L863, L764]true, 1026#[L863, L766]true, 1030#[L863, L774]true, 1034#[L863, L777]true, 1038#[L863, P0FINAL]true, 1042#[L863, P0EXIT]true, 1045#[P1ENTRY, P0EXIT, L863-1]true, 1047#[P1ENTRY, P0EXIT, L864]true, 1051#[P1ENTRY, L864-1, P0EXIT]true, 1056#[P1ENTRY, P0EXIT, L865]true, 1059#[P0EXIT, L782, L865]true, 1063#[P0EXIT, L783, L865]true, 1067#[P0EXIT, L791, L865]true, 1071#[P0EXIT, L794, L865]true, 1075#[P0EXIT, P1FINAL, L865]true, 1080#[P0EXIT, P1EXIT, L865]true, 1083#[P2ENTRY, P0EXIT, P1EXIT, L865-1]true, 1086#[P2ENTRY, P0EXIT, L866, P1EXIT]true, 1090#[P2ENTRY, P0EXIT, L866-1, P1EXIT]true, 1094#[P2ENTRY, P0EXIT, P1EXIT, L867]true, 1098#[P0EXIT, L799, P1EXIT, L867]true, 1102#[P0EXIT, P1EXIT, L867, L816]true, 1106#[P0EXIT, P1EXIT, L867, L819]true, 1109#[P0EXIT, L826, P1EXIT, L867]true, 1114#[P0EXIT, P1EXIT, L867, L829]true, 1118#[P0EXIT, P1EXIT, L867, P2FINAL]true, 1122#[P0EXIT, P2EXIT, P1EXIT, L867]true, 1125#[P0EXIT, P2EXIT, P1EXIT, L867-1, P3ENTRY]true, 1127#[P0EXIT, P2EXIT, L868, P1EXIT, P3ENTRY]true, 1132#[P0EXIT, P2EXIT, L870, P1EXIT, P3ENTRY]true, 1135#[P0EXIT, L871, P2EXIT, P1EXIT, P3ENTRY]true, 1140#[P0EXIT, P2EXIT, L2, P1EXIT, P3ENTRY]true, 1143#[P0EXIT, P2EXIT, L3, P1EXIT, P3ENTRY]true, 1148#[P0EXIT, P2EXIT, L2-1, P1EXIT, P3ENTRY]true, 1193#[P0EXIT, P2EXIT, L878, P1EXIT, P3ENTRY]true, 1197#[P0EXIT, P2EXIT, P1EXIT, P3ENTRY, L896]true, 1202#[P0EXIT, P2EXIT, P1EXIT, P3ENTRY, L897]true, 1205#[P0EXIT, P2EXIT, P1EXIT, L18, P3ENTRY]true, 1209#[P0EXIT, P2EXIT, L18-1, P1EXIT, P3ENTRY]true, 1213#[P0EXIT, P2EXIT, L18-2, P1EXIT, P3ENTRY]true, 1219#[P0EXIT, L17-5, P2EXIT, P1EXIT, P3ENTRY]true, 1225#[P0EXIT, P2EXIT, P1EXIT, P3ENTRY, L17-7]true, 1229#[P0EXIT, P2EXIT, P1EXIT, P3ENTRY, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]true] [2021-01-27 02:28:27,778 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2021-01-27 02:28:27,778 INFO L429 AbstractCegarLoop]: === Iteration 2 === [ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-27 02:28:27,779 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-27 02:28:27,779 INFO L82 PathProgramCache]: Analyzing trace with hash 453390377, now seen corresponding path program 1 times [2021-01-27 02:28:27,779 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-27 02:28:27,780 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [767908380] [2021-01-27 02:28:27,780 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-27 02:28:28,189 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-27 02:28:28,415 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-27 02:28:28,416 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [767908380] [2021-01-27 02:28:28,416 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-27 02:28:28,416 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2021-01-27 02:28:28,417 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [974845652] [2021-01-27 02:28:28,418 INFO L461 AbstractCegarLoop]: Interpolant automaton has 7 states [2021-01-27 02:28:28,418 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-27 02:28:28,419 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2021-01-27 02:28:28,420 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2021-01-27 02:28:28,420 INFO L481 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2021-01-27 02:28:28,420 INFO L482 AbstractCegarLoop]: Interpolant automaton has has 7 states, 7 states have (on average 15.142857142857142) internal successors, (106), 7 states have internal predecessors, (106), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-01-27 02:28:28,575 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-27 02:28:33,594 WARN L146 IndependenceRelation]: Expensive independence query (3894 ms) for statements [1500] L836-->L843: Formula: (let ((.cse9 (= (mod v_~x$r_buff1_thd4~0_51 256) 0)) (.cse14 (= (mod v_~x$w_buff1_used~0_455 256) 0)) (.cse15 (= (mod v_~x$w_buff0_used~0_603 256) 0)) (.cse16 (= (mod v_~x$r_buff0_thd4~0_57 256) 0)) (.cse11 (= (mod v_~x$w_buff0_used~0_602 256) 0))) (let ((.cse3 (not .cse11)) (.cse0 (or .cse11 .cse16)) (.cse2 (not .cse16)) (.cse8 (not .cse15)) (.cse7 (or .cse15 .cse16)) (.cse6 (select |v_#memory_int_377| |v_~#x~0.base_232|)) (.cse1 (or .cse9 .cse14)) (.cse4 (not .cse14)) (.cse5 (not .cse9))) (and (or (and (= v_~x$w_buff1_used~0_455 v_~x$w_buff1_used~0_454) .cse0 .cse1) (and (or (and .cse2 .cse3) (and .cse4 .cse5)) (= v_~x$w_buff1_used~0_454 0))) (= (store |v_#memory_int_377| |v_~#x~0.base_232| (store .cse6 |v_~#x~0.offset_232| |v_P3_#t~ite55_35|)) |v_#memory_int_376|) (or (and (= v_~x$w_buff0_used~0_603 v_~x$w_buff0_used~0_602) .cse7) (and .cse2 .cse8 (= v_~x$w_buff0_used~0_602 0))) (let ((.cse12 (= (mod v_~x$r_buff0_thd4~0_56 256) 0)) (.cse10 (= (mod v_~x$w_buff1_used~0_454 256) 0))) (or (and (or .cse9 .cse10) (or .cse11 .cse12) (= v_~x$r_buff1_thd4~0_51 v_~x$r_buff1_thd4~0_50)) (and (= v_~x$r_buff1_thd4~0_50 0) (or (and .cse3 (not .cse12)) (and .cse5 (not .cse10)))))) (or (and .cse2 .cse3 (= v_~x$r_buff0_thd4~0_56 0)) (and (= v_~x$r_buff0_thd4~0_57 v_~x$r_buff0_thd4~0_56) .cse0)) (let ((.cse13 (= |v_P3_#t~mem53_40| |v_P3Thread1of1ForFork1_#t~mem53_1|))) (or (and .cse2 (= |v_P3_#t~ite55_35| v_~x$w_buff0~0_121) (= |v_P3_#t~ite54_35| |v_P3Thread1of1ForFork1_#t~ite54_1|) .cse8 .cse13) (and (= |v_P3_#t~ite54_35| |v_P3_#t~ite55_35|) .cse7 (or (and (= (select .cse6 |v_~#x~0.offset_232|) |v_P3_#t~mem53_40|) (= |v_P3_#t~ite54_35| |v_P3_#t~mem53_40|) .cse1) (and .cse4 (= |v_P3_#t~ite54_35| v_~x$w_buff1~0_133) .cse5 .cse13)))))))) InVars {~x$w_buff0~0=v_~x$w_buff0~0_121, P3Thread1of1ForFork1_#t~ite54=|v_P3Thread1of1ForFork1_#t~ite54_1|, ~#x~0.offset=|v_~#x~0.offset_232|, ~x$w_buff1~0=v_~x$w_buff1~0_133, #memory_int=|v_#memory_int_377|, ~#x~0.base=|v_~#x~0.base_232|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_455, ~x$r_buff0_thd4~0=v_~x$r_buff0_thd4~0_57, P3Thread1of1ForFork1_#t~mem53=|v_P3Thread1of1ForFork1_#t~mem53_1|, ~x$r_buff1_thd4~0=v_~x$r_buff1_thd4~0_51, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_603} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_121, P3Thread1of1ForFork1_#t~ite54=|v_P3Thread1of1ForFork1_#t~ite54_2|, P3Thread1of1ForFork1_#t~ite55=|v_P3Thread1of1ForFork1_#t~ite55_1|, P3Thread1of1ForFork1_#t~ite56=|v_P3Thread1of1ForFork1_#t~ite56_1|, ~#x~0.offset=|v_~#x~0.offset_232|, P3Thread1of1ForFork1_#t~ite57=|v_P3Thread1of1ForFork1_#t~ite57_1|, P3Thread1of1ForFork1_#t~ite58=|v_P3Thread1of1ForFork1_#t~ite58_1|, ~x$w_buff1~0=v_~x$w_buff1~0_133, P3Thread1of1ForFork1_#t~ite59=|v_P3Thread1of1ForFork1_#t~ite59_1|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_454, ~x$r_buff0_thd4~0=v_~x$r_buff0_thd4~0_56, P3Thread1of1ForFork1_#t~mem53=|v_P3Thread1of1ForFork1_#t~mem53_2|, ~x$r_buff1_thd4~0=v_~x$r_buff1_thd4~0_50, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_602, #memory_int=|v_#memory_int_376|, ~#x~0.base=|v_~#x~0.base_232|} AuxVars[|v_P3_#t~ite54_35|, |v_P3_#t~ite55_35|, |v_P3_#t~mem53_40|] AssignedVars[P3Thread1of1ForFork1_#t~ite54, P3Thread1of1ForFork1_#t~ite55, P3Thread1of1ForFork1_#t~ite56, P3Thread1of1ForFork1_#t~ite57, P3Thread1of1ForFork1_#t~ite58, P3Thread1of1ForFork1_#t~ite59, #memory_int, ~x$w_buff1_used~0, ~x$r_buff0_thd4~0, P3Thread1of1ForFork1_#t~mem53, ~x$r_buff1_thd4~0, ~x$w_buff0_used~0] and [1475] L2-1-->L878: Formula: (let ((.cse15 (= (mod v_~x$w_buff0_used~0_567 256) 0)) (.cse13 (= (mod v_~x$r_buff1_thd0~0_166 256) 0)) (.cse16 (= (mod v_~x$w_buff1_used~0_423 256) 0)) (.cse12 (= (mod v_~x$w_buff0_used~0_566 256) 0)) (.cse14 (= (mod v_~x$r_buff0_thd0~0_213 256) 0))) (let ((.cse9 (or .cse12 .cse14)) (.cse5 (or .cse13 .cse16)) (.cse3 (not .cse16)) (.cse4 (select |v_#memory_int_341| |v_~#x~0.base_212|)) (.cse1 (not .cse13)) (.cse8 (not .cse12)) (.cse6 (not .cse15)) (.cse7 (not .cse14)) (.cse0 (or .cse14 .cse15))) (and (let ((.cse2 (= |v_ULTIMATE.start_main_#t~mem64_25| |v_ULTIMATE.start_main_#t~mem64_29|))) (or (and .cse0 (or (and .cse1 .cse2 .cse3 (= |v_ULTIMATE.start_main_#t~ite65_26| v_~x$w_buff1~0_113)) (and (= |v_ULTIMATE.start_main_#t~mem64_29| (select .cse4 |v_~#x~0.offset_212|)) (= |v_ULTIMATE.start_main_#t~mem64_29| |v_ULTIMATE.start_main_#t~ite65_26|) .cse5)) (= |v_ULTIMATE.start_main_#t~ite65_26| |v_ULTIMATE.start_main_#t~ite66_28|)) (and .cse2 (= |v_ULTIMATE.start_main_#t~ite65_22| |v_ULTIMATE.start_main_#t~ite65_26|) .cse6 (= v_~x$w_buff0~0_103 |v_ULTIMATE.start_main_#t~ite66_28|) .cse7))) (or (and (= v_~x$r_buff0_thd0~0_212 0) .cse8 .cse7) (and .cse9 (= v_~x$r_buff0_thd0~0_213 v_~x$r_buff0_thd0~0_212))) (or (and .cse9 (= v_~x$w_buff1_used~0_423 v_~x$w_buff1_used~0_422) .cse5) (and (= v_~x$w_buff1_used~0_422 0) (or (and .cse8 .cse7) (and .cse1 .cse3)))) (= |v_#memory_int_340| (store |v_#memory_int_341| |v_~#x~0.base_212| (store .cse4 |v_~#x~0.offset_212| |v_ULTIMATE.start_main_#t~ite66_28|))) (let ((.cse11 (= (mod v_~x$r_buff0_thd0~0_212 256) 0)) (.cse10 (= (mod v_~x$w_buff1_used~0_422 256) 0))) (or (and (= v_~x$r_buff1_thd0~0_165 0) (or (and .cse1 (not .cse10)) (and (not .cse11) .cse8))) (and (or .cse12 .cse11) (or .cse13 .cse10) (= v_~x$r_buff1_thd0~0_166 v_~x$r_buff1_thd0~0_165)))) (or (and .cse6 (= v_~x$w_buff0_used~0_566 0) .cse7) (and .cse0 (= v_~x$w_buff0_used~0_567 v_~x$w_buff0_used~0_566)))))) InVars {~x$w_buff0~0=v_~x$w_buff0~0_103, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_213, ULTIMATE.start_main_#t~mem64=|v_ULTIMATE.start_main_#t~mem64_25|, ~#x~0.offset=|v_~#x~0.offset_212|, ~x$w_buff1~0=v_~x$w_buff1~0_113, #memory_int=|v_#memory_int_341|, ~#x~0.base=|v_~#x~0.base_212|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_423, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_166, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_567, ULTIMATE.start_main_#t~ite65=|v_ULTIMATE.start_main_#t~ite65_22|} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_103, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_212, ULTIMATE.start_main_#t~mem64=|v_ULTIMATE.start_main_#t~mem64_23|, ~#x~0.offset=|v_~#x~0.offset_212|, ~x$w_buff1~0=v_~x$w_buff1~0_113, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_422, ULTIMATE.start_main_#t~ite68=|v_ULTIMATE.start_main_#t~ite68_26|, ULTIMATE.start_main_#t~ite69=|v_ULTIMATE.start_main_#t~ite69_32|, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_165, ULTIMATE.start_main_#t~ite66=|v_ULTIMATE.start_main_#t~ite66_24|, ULTIMATE.start_main_#t~ite67=|v_ULTIMATE.start_main_#t~ite67_28|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_566, ULTIMATE.start_main_#t~ite65=|v_ULTIMATE.start_main_#t~ite65_20|, ULTIMATE.start_main_#t~ite70=|v_ULTIMATE.start_main_#t~ite70_28|, #memory_int=|v_#memory_int_340|, ~#x~0.base=|v_~#x~0.base_212|} AuxVars[|v_ULTIMATE.start_main_#t~mem64_29|, |v_ULTIMATE.start_main_#t~ite65_26|, |v_ULTIMATE.start_main_#t~ite66_28|] AssignedVars[~x$r_buff0_thd0~0, ULTIMATE.start_main_#t~mem64, ULTIMATE.start_main_#t~ite70, #memory_int, ~x$w_buff1_used~0, ULTIMATE.start_main_#t~ite68, ULTIMATE.start_main_#t~ite69, ~x$r_buff1_thd0~0, ULTIMATE.start_main_#t~ite66, ULTIMATE.start_main_#t~ite67, ~x$w_buff0_used~0, ULTIMATE.start_main_#t~ite65] under condition null [2021-01-27 02:28:37,707 WARN L146 IndependenceRelation]: Expensive independence query (3967 ms) for statements [1500] L836-->L843: Formula: (let ((.cse9 (= (mod v_~x$r_buff1_thd4~0_51 256) 0)) (.cse14 (= (mod v_~x$w_buff1_used~0_455 256) 0)) (.cse15 (= (mod v_~x$w_buff0_used~0_603 256) 0)) (.cse16 (= (mod v_~x$r_buff0_thd4~0_57 256) 0)) (.cse11 (= (mod v_~x$w_buff0_used~0_602 256) 0))) (let ((.cse3 (not .cse11)) (.cse0 (or .cse11 .cse16)) (.cse2 (not .cse16)) (.cse8 (not .cse15)) (.cse7 (or .cse15 .cse16)) (.cse6 (select |v_#memory_int_377| |v_~#x~0.base_232|)) (.cse1 (or .cse9 .cse14)) (.cse4 (not .cse14)) (.cse5 (not .cse9))) (and (or (and (= v_~x$w_buff1_used~0_455 v_~x$w_buff1_used~0_454) .cse0 .cse1) (and (or (and .cse2 .cse3) (and .cse4 .cse5)) (= v_~x$w_buff1_used~0_454 0))) (= (store |v_#memory_int_377| |v_~#x~0.base_232| (store .cse6 |v_~#x~0.offset_232| |v_P3_#t~ite55_35|)) |v_#memory_int_376|) (or (and (= v_~x$w_buff0_used~0_603 v_~x$w_buff0_used~0_602) .cse7) (and .cse2 .cse8 (= v_~x$w_buff0_used~0_602 0))) (let ((.cse12 (= (mod v_~x$r_buff0_thd4~0_56 256) 0)) (.cse10 (= (mod v_~x$w_buff1_used~0_454 256) 0))) (or (and (or .cse9 .cse10) (or .cse11 .cse12) (= v_~x$r_buff1_thd4~0_51 v_~x$r_buff1_thd4~0_50)) (and (= v_~x$r_buff1_thd4~0_50 0) (or (and .cse3 (not .cse12)) (and .cse5 (not .cse10)))))) (or (and .cse2 .cse3 (= v_~x$r_buff0_thd4~0_56 0)) (and (= v_~x$r_buff0_thd4~0_57 v_~x$r_buff0_thd4~0_56) .cse0)) (let ((.cse13 (= |v_P3_#t~mem53_40| |v_P3Thread1of1ForFork1_#t~mem53_1|))) (or (and .cse2 (= |v_P3_#t~ite55_35| v_~x$w_buff0~0_121) (= |v_P3_#t~ite54_35| |v_P3Thread1of1ForFork1_#t~ite54_1|) .cse8 .cse13) (and (= |v_P3_#t~ite54_35| |v_P3_#t~ite55_35|) .cse7 (or (and (= (select .cse6 |v_~#x~0.offset_232|) |v_P3_#t~mem53_40|) (= |v_P3_#t~ite54_35| |v_P3_#t~mem53_40|) .cse1) (and .cse4 (= |v_P3_#t~ite54_35| v_~x$w_buff1~0_133) .cse5 .cse13)))))))) InVars {~x$w_buff0~0=v_~x$w_buff0~0_121, P3Thread1of1ForFork1_#t~ite54=|v_P3Thread1of1ForFork1_#t~ite54_1|, ~#x~0.offset=|v_~#x~0.offset_232|, ~x$w_buff1~0=v_~x$w_buff1~0_133, #memory_int=|v_#memory_int_377|, ~#x~0.base=|v_~#x~0.base_232|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_455, ~x$r_buff0_thd4~0=v_~x$r_buff0_thd4~0_57, P3Thread1of1ForFork1_#t~mem53=|v_P3Thread1of1ForFork1_#t~mem53_1|, ~x$r_buff1_thd4~0=v_~x$r_buff1_thd4~0_51, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_603} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_121, P3Thread1of1ForFork1_#t~ite54=|v_P3Thread1of1ForFork1_#t~ite54_2|, P3Thread1of1ForFork1_#t~ite55=|v_P3Thread1of1ForFork1_#t~ite55_1|, P3Thread1of1ForFork1_#t~ite56=|v_P3Thread1of1ForFork1_#t~ite56_1|, ~#x~0.offset=|v_~#x~0.offset_232|, P3Thread1of1ForFork1_#t~ite57=|v_P3Thread1of1ForFork1_#t~ite57_1|, P3Thread1of1ForFork1_#t~ite58=|v_P3Thread1of1ForFork1_#t~ite58_1|, ~x$w_buff1~0=v_~x$w_buff1~0_133, P3Thread1of1ForFork1_#t~ite59=|v_P3Thread1of1ForFork1_#t~ite59_1|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_454, ~x$r_buff0_thd4~0=v_~x$r_buff0_thd4~0_56, P3Thread1of1ForFork1_#t~mem53=|v_P3Thread1of1ForFork1_#t~mem53_2|, ~x$r_buff1_thd4~0=v_~x$r_buff1_thd4~0_50, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_602, #memory_int=|v_#memory_int_376|, ~#x~0.base=|v_~#x~0.base_232|} AuxVars[|v_P3_#t~ite54_35|, |v_P3_#t~ite55_35|, |v_P3_#t~mem53_40|] AssignedVars[P3Thread1of1ForFork1_#t~ite54, P3Thread1of1ForFork1_#t~ite55, P3Thread1of1ForFork1_#t~ite56, P3Thread1of1ForFork1_#t~ite57, P3Thread1of1ForFork1_#t~ite58, P3Thread1of1ForFork1_#t~ite59, #memory_int, ~x$w_buff1_used~0, ~x$r_buff0_thd4~0, P3Thread1of1ForFork1_#t~mem53, ~x$r_buff1_thd4~0, ~x$w_buff0_used~0] and [1494] L819-->L826: Formula: (let ((.cse14 (= (mod v_~x$w_buff0_used~0_541 256) 0)) (.cse15 (= (mod v_~x$r_buff0_thd3~0_209 256) 0)) (.cse13 (= (mod v_~x$w_buff0_used~0_540 256) 0)) (.cse16 (= (mod v_~x$w_buff1_used~0_395 256) 0)) (.cse12 (= (mod v_~x$r_buff1_thd3~0_152 256) 0))) (let ((.cse3 (select |v_#memory_int_329| |v_~#x~0.base_204|)) (.cse7 (not .cse12)) (.cse8 (not .cse16)) (.cse1 (not .cse13)) (.cse0 (or .cse13 .cse15)) (.cse9 (or .cse16 .cse12)) (.cse5 (not .cse14)) (.cse2 (not .cse15)) (.cse6 (or .cse14 .cse15))) (and (or (and .cse0 (= v_~x$r_buff0_thd3~0_209 v_~x$r_buff0_thd3~0_208)) (and .cse1 (= v_~x$r_buff0_thd3~0_208 0) .cse2)) (= (store |v_#memory_int_329| |v_~#x~0.base_204| (store .cse3 |v_~#x~0.offset_204| |v_P2_#t~ite48_39|)) |v_#memory_int_328|) (let ((.cse4 (= |v_P2_#t~mem46_36| |v_P2Thread1of1ForFork0_#t~mem46_1|))) (or (and .cse4 .cse5 (= |v_P2Thread1of1ForFork0_#t~ite47_1| |v_P2_#t~ite47_35|) .cse2 (= |v_P2_#t~ite48_39| v_~x$w_buff0~0_101)) (and (= |v_P2_#t~ite48_39| |v_P2_#t~ite47_35|) .cse6 (or (and (= |v_P2_#t~ite47_35| v_~x$w_buff1~0_103) .cse4 .cse7 .cse8) (and (= |v_P2_#t~ite47_35| |v_P2_#t~mem46_36|) (= (select .cse3 |v_~#x~0.offset_204|) |v_P2_#t~mem46_36|) .cse9))))) (let ((.cse11 (= (mod v_~x$w_buff1_used~0_394 256) 0)) (.cse10 (= (mod v_~x$r_buff0_thd3~0_208 256) 0))) (or (and (= v_~x$r_buff1_thd3~0_151 0) (or (and (not .cse10) .cse1) (and (not .cse11) .cse7))) (and (= v_~x$r_buff1_thd3~0_152 v_~x$r_buff1_thd3~0_151) (or .cse11 .cse12) (or .cse10 .cse13)))) (or (and (or (and .cse7 .cse8) (and .cse1 .cse2)) (= v_~x$w_buff1_used~0_394 0)) (and .cse0 (= v_~x$w_buff1_used~0_395 v_~x$w_buff1_used~0_394) .cse9)) (or (and .cse5 (= v_~x$w_buff0_used~0_540 0) .cse2) (and (= v_~x$w_buff0_used~0_541 v_~x$w_buff0_used~0_540) .cse6))))) InVars {~x$w_buff0~0=v_~x$w_buff0~0_101, P2Thread1of1ForFork0_#t~ite47=|v_P2Thread1of1ForFork0_#t~ite47_1|, ~#x~0.offset=|v_~#x~0.offset_204|, ~x$w_buff1~0=v_~x$w_buff1~0_103, #memory_int=|v_#memory_int_329|, ~#x~0.base=|v_~#x~0.base_204|, P2Thread1of1ForFork0_#t~mem46=|v_P2Thread1of1ForFork0_#t~mem46_1|, ~x$r_buff1_thd3~0=v_~x$r_buff1_thd3~0_152, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_395, ~x$r_buff0_thd3~0=v_~x$r_buff0_thd3~0_209, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_541} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_101, ~#x~0.offset=|v_~#x~0.offset_204|, ~x$w_buff1~0=v_~x$w_buff1~0_103, P2Thread1of1ForFork0_#t~ite52=|v_P2Thread1of1ForFork0_#t~ite52_1|, ~x$r_buff1_thd3~0=v_~x$r_buff1_thd3~0_151, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_394, P2Thread1of1ForFork0_#t~ite50=|v_P2Thread1of1ForFork0_#t~ite50_1|, ~x$r_buff0_thd3~0=v_~x$r_buff0_thd3~0_208, P2Thread1of1ForFork0_#t~ite51=|v_P2Thread1of1ForFork0_#t~ite51_1|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_540, P2Thread1of1ForFork0_#t~ite48=|v_P2Thread1of1ForFork0_#t~ite48_1|, P2Thread1of1ForFork0_#t~ite47=|v_P2Thread1of1ForFork0_#t~ite47_2|, P2Thread1of1ForFork0_#t~ite49=|v_P2Thread1of1ForFork0_#t~ite49_1|, P2Thread1of1ForFork0_#t~mem46=|v_P2Thread1of1ForFork0_#t~mem46_2|, #memory_int=|v_#memory_int_328|, ~#x~0.base=|v_~#x~0.base_204|} AuxVars[|v_P2_#t~ite47_35|, |v_P2_#t~mem46_36|, |v_P2_#t~ite48_39|] AssignedVars[P2Thread1of1ForFork0_#t~ite48, P2Thread1of1ForFork0_#t~ite47, P2Thread1of1ForFork0_#t~ite49, P2Thread1of1ForFork0_#t~ite52, P2Thread1of1ForFork0_#t~mem46, #memory_int, ~x$r_buff1_thd3~0, ~x$w_buff1_used~0, P2Thread1of1ForFork0_#t~ite50, ~x$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite51, ~x$w_buff0_used~0] under condition null [2021-01-27 02:28:41,547 WARN L146 IndependenceRelation]: Expensive independence query (3836 ms) for statements [1475] L2-1-->L878: Formula: (let ((.cse15 (= (mod v_~x$w_buff0_used~0_567 256) 0)) (.cse13 (= (mod v_~x$r_buff1_thd0~0_166 256) 0)) (.cse16 (= (mod v_~x$w_buff1_used~0_423 256) 0)) (.cse12 (= (mod v_~x$w_buff0_used~0_566 256) 0)) (.cse14 (= (mod v_~x$r_buff0_thd0~0_213 256) 0))) (let ((.cse9 (or .cse12 .cse14)) (.cse5 (or .cse13 .cse16)) (.cse3 (not .cse16)) (.cse4 (select |v_#memory_int_341| |v_~#x~0.base_212|)) (.cse1 (not .cse13)) (.cse8 (not .cse12)) (.cse6 (not .cse15)) (.cse7 (not .cse14)) (.cse0 (or .cse14 .cse15))) (and (let ((.cse2 (= |v_ULTIMATE.start_main_#t~mem64_25| |v_ULTIMATE.start_main_#t~mem64_29|))) (or (and .cse0 (or (and .cse1 .cse2 .cse3 (= |v_ULTIMATE.start_main_#t~ite65_26| v_~x$w_buff1~0_113)) (and (= |v_ULTIMATE.start_main_#t~mem64_29| (select .cse4 |v_~#x~0.offset_212|)) (= |v_ULTIMATE.start_main_#t~mem64_29| |v_ULTIMATE.start_main_#t~ite65_26|) .cse5)) (= |v_ULTIMATE.start_main_#t~ite65_26| |v_ULTIMATE.start_main_#t~ite66_28|)) (and .cse2 (= |v_ULTIMATE.start_main_#t~ite65_22| |v_ULTIMATE.start_main_#t~ite65_26|) .cse6 (= v_~x$w_buff0~0_103 |v_ULTIMATE.start_main_#t~ite66_28|) .cse7))) (or (and (= v_~x$r_buff0_thd0~0_212 0) .cse8 .cse7) (and .cse9 (= v_~x$r_buff0_thd0~0_213 v_~x$r_buff0_thd0~0_212))) (or (and .cse9 (= v_~x$w_buff1_used~0_423 v_~x$w_buff1_used~0_422) .cse5) (and (= v_~x$w_buff1_used~0_422 0) (or (and .cse8 .cse7) (and .cse1 .cse3)))) (= |v_#memory_int_340| (store |v_#memory_int_341| |v_~#x~0.base_212| (store .cse4 |v_~#x~0.offset_212| |v_ULTIMATE.start_main_#t~ite66_28|))) (let ((.cse11 (= (mod v_~x$r_buff0_thd0~0_212 256) 0)) (.cse10 (= (mod v_~x$w_buff1_used~0_422 256) 0))) (or (and (= v_~x$r_buff1_thd0~0_165 0) (or (and .cse1 (not .cse10)) (and (not .cse11) .cse8))) (and (or .cse12 .cse11) (or .cse13 .cse10) (= v_~x$r_buff1_thd0~0_166 v_~x$r_buff1_thd0~0_165)))) (or (and .cse6 (= v_~x$w_buff0_used~0_566 0) .cse7) (and .cse0 (= v_~x$w_buff0_used~0_567 v_~x$w_buff0_used~0_566)))))) InVars {~x$w_buff0~0=v_~x$w_buff0~0_103, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_213, ULTIMATE.start_main_#t~mem64=|v_ULTIMATE.start_main_#t~mem64_25|, ~#x~0.offset=|v_~#x~0.offset_212|, ~x$w_buff1~0=v_~x$w_buff1~0_113, #memory_int=|v_#memory_int_341|, ~#x~0.base=|v_~#x~0.base_212|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_423, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_166, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_567, ULTIMATE.start_main_#t~ite65=|v_ULTIMATE.start_main_#t~ite65_22|} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_103, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_212, ULTIMATE.start_main_#t~mem64=|v_ULTIMATE.start_main_#t~mem64_23|, ~#x~0.offset=|v_~#x~0.offset_212|, ~x$w_buff1~0=v_~x$w_buff1~0_113, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_422, ULTIMATE.start_main_#t~ite68=|v_ULTIMATE.start_main_#t~ite68_26|, ULTIMATE.start_main_#t~ite69=|v_ULTIMATE.start_main_#t~ite69_32|, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_165, ULTIMATE.start_main_#t~ite66=|v_ULTIMATE.start_main_#t~ite66_24|, ULTIMATE.start_main_#t~ite67=|v_ULTIMATE.start_main_#t~ite67_28|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_566, ULTIMATE.start_main_#t~ite65=|v_ULTIMATE.start_main_#t~ite65_20|, ULTIMATE.start_main_#t~ite70=|v_ULTIMATE.start_main_#t~ite70_28|, #memory_int=|v_#memory_int_340|, ~#x~0.base=|v_~#x~0.base_212|} AuxVars[|v_ULTIMATE.start_main_#t~mem64_29|, |v_ULTIMATE.start_main_#t~ite65_26|, |v_ULTIMATE.start_main_#t~ite66_28|] AssignedVars[~x$r_buff0_thd0~0, ULTIMATE.start_main_#t~mem64, ULTIMATE.start_main_#t~ite70, #memory_int, ~x$w_buff1_used~0, ULTIMATE.start_main_#t~ite68, ULTIMATE.start_main_#t~ite69, ~x$r_buff1_thd0~0, ULTIMATE.start_main_#t~ite66, ULTIMATE.start_main_#t~ite67, ~x$w_buff0_used~0, ULTIMATE.start_main_#t~ite65] and [1494] L819-->L826: Formula: (let ((.cse14 (= (mod v_~x$w_buff0_used~0_541 256) 0)) (.cse15 (= (mod v_~x$r_buff0_thd3~0_209 256) 0)) (.cse13 (= (mod v_~x$w_buff0_used~0_540 256) 0)) (.cse16 (= (mod v_~x$w_buff1_used~0_395 256) 0)) (.cse12 (= (mod v_~x$r_buff1_thd3~0_152 256) 0))) (let ((.cse3 (select |v_#memory_int_329| |v_~#x~0.base_204|)) (.cse7 (not .cse12)) (.cse8 (not .cse16)) (.cse1 (not .cse13)) (.cse0 (or .cse13 .cse15)) (.cse9 (or .cse16 .cse12)) (.cse5 (not .cse14)) (.cse2 (not .cse15)) (.cse6 (or .cse14 .cse15))) (and (or (and .cse0 (= v_~x$r_buff0_thd3~0_209 v_~x$r_buff0_thd3~0_208)) (and .cse1 (= v_~x$r_buff0_thd3~0_208 0) .cse2)) (= (store |v_#memory_int_329| |v_~#x~0.base_204| (store .cse3 |v_~#x~0.offset_204| |v_P2_#t~ite48_39|)) |v_#memory_int_328|) (let ((.cse4 (= |v_P2_#t~mem46_36| |v_P2Thread1of1ForFork0_#t~mem46_1|))) (or (and .cse4 .cse5 (= |v_P2Thread1of1ForFork0_#t~ite47_1| |v_P2_#t~ite47_35|) .cse2 (= |v_P2_#t~ite48_39| v_~x$w_buff0~0_101)) (and (= |v_P2_#t~ite48_39| |v_P2_#t~ite47_35|) .cse6 (or (and (= |v_P2_#t~ite47_35| v_~x$w_buff1~0_103) .cse4 .cse7 .cse8) (and (= |v_P2_#t~ite47_35| |v_P2_#t~mem46_36|) (= (select .cse3 |v_~#x~0.offset_204|) |v_P2_#t~mem46_36|) .cse9))))) (let ((.cse11 (= (mod v_~x$w_buff1_used~0_394 256) 0)) (.cse10 (= (mod v_~x$r_buff0_thd3~0_208 256) 0))) (or (and (= v_~x$r_buff1_thd3~0_151 0) (or (and (not .cse10) .cse1) (and (not .cse11) .cse7))) (and (= v_~x$r_buff1_thd3~0_152 v_~x$r_buff1_thd3~0_151) (or .cse11 .cse12) (or .cse10 .cse13)))) (or (and (or (and .cse7 .cse8) (and .cse1 .cse2)) (= v_~x$w_buff1_used~0_394 0)) (and .cse0 (= v_~x$w_buff1_used~0_395 v_~x$w_buff1_used~0_394) .cse9)) (or (and .cse5 (= v_~x$w_buff0_used~0_540 0) .cse2) (and (= v_~x$w_buff0_used~0_541 v_~x$w_buff0_used~0_540) .cse6))))) InVars {~x$w_buff0~0=v_~x$w_buff0~0_101, P2Thread1of1ForFork0_#t~ite47=|v_P2Thread1of1ForFork0_#t~ite47_1|, ~#x~0.offset=|v_~#x~0.offset_204|, ~x$w_buff1~0=v_~x$w_buff1~0_103, #memory_int=|v_#memory_int_329|, ~#x~0.base=|v_~#x~0.base_204|, P2Thread1of1ForFork0_#t~mem46=|v_P2Thread1of1ForFork0_#t~mem46_1|, ~x$r_buff1_thd3~0=v_~x$r_buff1_thd3~0_152, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_395, ~x$r_buff0_thd3~0=v_~x$r_buff0_thd3~0_209, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_541} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_101, ~#x~0.offset=|v_~#x~0.offset_204|, ~x$w_buff1~0=v_~x$w_buff1~0_103, P2Thread1of1ForFork0_#t~ite52=|v_P2Thread1of1ForFork0_#t~ite52_1|, ~x$r_buff1_thd3~0=v_~x$r_buff1_thd3~0_151, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_394, P2Thread1of1ForFork0_#t~ite50=|v_P2Thread1of1ForFork0_#t~ite50_1|, ~x$r_buff0_thd3~0=v_~x$r_buff0_thd3~0_208, P2Thread1of1ForFork0_#t~ite51=|v_P2Thread1of1ForFork0_#t~ite51_1|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_540, P2Thread1of1ForFork0_#t~ite48=|v_P2Thread1of1ForFork0_#t~ite48_1|, P2Thread1of1ForFork0_#t~ite47=|v_P2Thread1of1ForFork0_#t~ite47_2|, P2Thread1of1ForFork0_#t~ite49=|v_P2Thread1of1ForFork0_#t~ite49_1|, P2Thread1of1ForFork0_#t~mem46=|v_P2Thread1of1ForFork0_#t~mem46_2|, #memory_int=|v_#memory_int_328|, ~#x~0.base=|v_~#x~0.base_204|} AuxVars[|v_P2_#t~ite47_35|, |v_P2_#t~mem46_36|, |v_P2_#t~ite48_39|] AssignedVars[P2Thread1of1ForFork0_#t~ite48, P2Thread1of1ForFork0_#t~ite47, P2Thread1of1ForFork0_#t~ite49, P2Thread1of1ForFork0_#t~ite52, P2Thread1of1ForFork0_#t~mem46, #memory_int, ~x$r_buff1_thd3~0, ~x$w_buff1_used~0, P2Thread1of1ForFork0_#t~ite50, ~x$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite51, ~x$w_buff0_used~0] under condition null [2021-01-27 02:28:41,944 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-27 02:28:42,897 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-27 02:28:48,314 WARN L146 IndependenceRelation]: Expensive independence query (3049 ms) for statements [1494] L819-->L826: Formula: (let ((.cse14 (= (mod v_~x$w_buff0_used~0_541 256) 0)) (.cse15 (= (mod v_~x$r_buff0_thd3~0_209 256) 0)) (.cse13 (= (mod v_~x$w_buff0_used~0_540 256) 0)) (.cse16 (= (mod v_~x$w_buff1_used~0_395 256) 0)) (.cse12 (= (mod v_~x$r_buff1_thd3~0_152 256) 0))) (let ((.cse3 (select |v_#memory_int_329| |v_~#x~0.base_204|)) (.cse7 (not .cse12)) (.cse8 (not .cse16)) (.cse1 (not .cse13)) (.cse0 (or .cse13 .cse15)) (.cse9 (or .cse16 .cse12)) (.cse5 (not .cse14)) (.cse2 (not .cse15)) (.cse6 (or .cse14 .cse15))) (and (or (and .cse0 (= v_~x$r_buff0_thd3~0_209 v_~x$r_buff0_thd3~0_208)) (and .cse1 (= v_~x$r_buff0_thd3~0_208 0) .cse2)) (= (store |v_#memory_int_329| |v_~#x~0.base_204| (store .cse3 |v_~#x~0.offset_204| |v_P2_#t~ite48_39|)) |v_#memory_int_328|) (let ((.cse4 (= |v_P2_#t~mem46_36| |v_P2Thread1of1ForFork0_#t~mem46_1|))) (or (and .cse4 .cse5 (= |v_P2Thread1of1ForFork0_#t~ite47_1| |v_P2_#t~ite47_35|) .cse2 (= |v_P2_#t~ite48_39| v_~x$w_buff0~0_101)) (and (= |v_P2_#t~ite48_39| |v_P2_#t~ite47_35|) .cse6 (or (and (= |v_P2_#t~ite47_35| v_~x$w_buff1~0_103) .cse4 .cse7 .cse8) (and (= |v_P2_#t~ite47_35| |v_P2_#t~mem46_36|) (= (select .cse3 |v_~#x~0.offset_204|) |v_P2_#t~mem46_36|) .cse9))))) (let ((.cse11 (= (mod v_~x$w_buff1_used~0_394 256) 0)) (.cse10 (= (mod v_~x$r_buff0_thd3~0_208 256) 0))) (or (and (= v_~x$r_buff1_thd3~0_151 0) (or (and (not .cse10) .cse1) (and (not .cse11) .cse7))) (and (= v_~x$r_buff1_thd3~0_152 v_~x$r_buff1_thd3~0_151) (or .cse11 .cse12) (or .cse10 .cse13)))) (or (and (or (and .cse7 .cse8) (and .cse1 .cse2)) (= v_~x$w_buff1_used~0_394 0)) (and .cse0 (= v_~x$w_buff1_used~0_395 v_~x$w_buff1_used~0_394) .cse9)) (or (and .cse5 (= v_~x$w_buff0_used~0_540 0) .cse2) (and (= v_~x$w_buff0_used~0_541 v_~x$w_buff0_used~0_540) .cse6))))) InVars {~x$w_buff0~0=v_~x$w_buff0~0_101, P2Thread1of1ForFork0_#t~ite47=|v_P2Thread1of1ForFork0_#t~ite47_1|, ~#x~0.offset=|v_~#x~0.offset_204|, ~x$w_buff1~0=v_~x$w_buff1~0_103, #memory_int=|v_#memory_int_329|, ~#x~0.base=|v_~#x~0.base_204|, P2Thread1of1ForFork0_#t~mem46=|v_P2Thread1of1ForFork0_#t~mem46_1|, ~x$r_buff1_thd3~0=v_~x$r_buff1_thd3~0_152, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_395, ~x$r_buff0_thd3~0=v_~x$r_buff0_thd3~0_209, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_541} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_101, ~#x~0.offset=|v_~#x~0.offset_204|, ~x$w_buff1~0=v_~x$w_buff1~0_103, P2Thread1of1ForFork0_#t~ite52=|v_P2Thread1of1ForFork0_#t~ite52_1|, ~x$r_buff1_thd3~0=v_~x$r_buff1_thd3~0_151, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_394, P2Thread1of1ForFork0_#t~ite50=|v_P2Thread1of1ForFork0_#t~ite50_1|, ~x$r_buff0_thd3~0=v_~x$r_buff0_thd3~0_208, P2Thread1of1ForFork0_#t~ite51=|v_P2Thread1of1ForFork0_#t~ite51_1|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_540, P2Thread1of1ForFork0_#t~ite48=|v_P2Thread1of1ForFork0_#t~ite48_1|, P2Thread1of1ForFork0_#t~ite47=|v_P2Thread1of1ForFork0_#t~ite47_2|, P2Thread1of1ForFork0_#t~ite49=|v_P2Thread1of1ForFork0_#t~ite49_1|, P2Thread1of1ForFork0_#t~mem46=|v_P2Thread1of1ForFork0_#t~mem46_2|, #memory_int=|v_#memory_int_328|, ~#x~0.base=|v_~#x~0.base_204|} AuxVars[|v_P2_#t~ite47_35|, |v_P2_#t~mem46_36|, |v_P2_#t~ite48_39|] AssignedVars[P2Thread1of1ForFork0_#t~ite48, P2Thread1of1ForFork0_#t~ite47, P2Thread1of1ForFork0_#t~ite49, P2Thread1of1ForFork0_#t~ite52, P2Thread1of1ForFork0_#t~mem46, #memory_int, ~x$r_buff1_thd3~0, ~x$w_buff1_used~0, P2Thread1of1ForFork0_#t~ite50, ~x$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite51, ~x$w_buff0_used~0] and [1354] L866-1-->L867: Formula: (= |v_#memory_int_31| (store |v_#memory_int_32| |v_ULTIMATE.start_main_~#t2168~0.base_3| (store (select |v_#memory_int_32| |v_ULTIMATE.start_main_~#t2168~0.base_3|) |v_ULTIMATE.start_main_~#t2168~0.offset_3| 3))) InVars {#memory_int=|v_#memory_int_32|, ULTIMATE.start_main_~#t2168~0.base=|v_ULTIMATE.start_main_~#t2168~0.base_3|, ULTIMATE.start_main_~#t2168~0.offset=|v_ULTIMATE.start_main_~#t2168~0.offset_3|} OutVars{#memory_int=|v_#memory_int_31|, ULTIMATE.start_main_~#t2168~0.base=|v_ULTIMATE.start_main_~#t2168~0.base_3|, ULTIMATE.start_main_~#t2168~0.offset=|v_ULTIMATE.start_main_~#t2168~0.offset_3|} AuxVars[] AssignedVars[#memory_int] under condition null [2021-01-27 02:28:52,592 WARN L146 IndependenceRelation]: Expensive independence query (3119 ms) for statements [1354] L866-1-->L867: Formula: (= |v_#memory_int_31| (store |v_#memory_int_32| |v_ULTIMATE.start_main_~#t2168~0.base_3| (store (select |v_#memory_int_32| |v_ULTIMATE.start_main_~#t2168~0.base_3|) |v_ULTIMATE.start_main_~#t2168~0.offset_3| 3))) InVars {#memory_int=|v_#memory_int_32|, ULTIMATE.start_main_~#t2168~0.base=|v_ULTIMATE.start_main_~#t2168~0.base_3|, ULTIMATE.start_main_~#t2168~0.offset=|v_ULTIMATE.start_main_~#t2168~0.offset_3|} OutVars{#memory_int=|v_#memory_int_31|, ULTIMATE.start_main_~#t2168~0.base=|v_ULTIMATE.start_main_~#t2168~0.base_3|, ULTIMATE.start_main_~#t2168~0.offset=|v_ULTIMATE.start_main_~#t2168~0.offset_3|} AuxVars[] AssignedVars[#memory_int] and [1487] L783-->L791: Formula: (let ((.cse14 (= (mod v_~x$w_buff0_used~0_575 256) 0)) (.cse15 (= (mod v_~x$r_buff0_thd2~0_63 256) 0)) (.cse3 (= (mod v_~x$r_buff1_thd2~0_43 256) 0)) (.cse16 (= 0 (mod v_~x$w_buff1_used~0_431 256))) (.cse1 (= (mod v_~x$w_buff0_used~0_574 256) 0))) (let ((.cse5 (not .cse1)) (.cse13 (not .cse16)) (.cse4 (not .cse3)) (.cse6 (or .cse15 .cse1)) (.cse12 (or .cse16 .cse3)) (.cse10 (or .cse14 .cse15)) (.cse7 (not .cse15)) (.cse8 (not .cse14)) (.cse11 (select |v_#memory_int_349| |v_~#x~0.base_218|))) (and (let ((.cse2 (= (mod v_~x$w_buff1_used~0_430 256) 0)) (.cse0 (= (mod v_~x$r_buff0_thd2~0_62 256) 0))) (or (and (= v_~x$r_buff1_thd2~0_43 v_~x$r_buff1_thd2~0_42) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and .cse4 (not .cse2)) (and (not .cse0) .cse5)) (= v_~x$r_buff1_thd2~0_42 0)))) (or (and (= v_~x$r_buff0_thd2~0_63 v_~x$r_buff0_thd2~0_62) .cse6) (and (= v_~x$r_buff0_thd2~0_62 0) .cse7 .cse5)) (let ((.cse9 (= |v_P1_#t~mem12_36| |v_P1Thread1of1ForFork3_#t~mem12_1|))) (or (and .cse7 .cse8 (= |v_P1Thread1of1ForFork3_#t~ite13_1| |v_P1_#t~ite13_31|) .cse9 (= |v_P1_#t~ite14_43| v_~x$w_buff0~0_105)) (and (= |v_P1_#t~ite13_31| |v_P1_#t~ite14_43|) .cse10 (or (and (= |v_P1_#t~ite13_31| |v_P1_#t~mem12_36|) (= |v_P1_#t~mem12_36| (select .cse11 |v_~#x~0.offset_218|)) .cse12) (and .cse13 .cse4 .cse9 (= |v_P1_#t~ite13_31| v_~x$w_buff1~0_119)))))) (or (and (= v_~x$w_buff1_used~0_430 0) (or (and .cse7 .cse5) (and .cse13 .cse4))) (and (= v_~x$w_buff1_used~0_431 v_~x$w_buff1_used~0_430) .cse6 .cse12)) (or (and .cse10 (= v_~x$w_buff0_used~0_575 v_~x$w_buff0_used~0_574)) (and (= v_~x$w_buff0_used~0_574 0) .cse7 .cse8)) (= (store |v_#memory_int_349| |v_~#x~0.base_218| (store .cse11 |v_~#x~0.offset_218| |v_P1_#t~ite14_43|)) |v_#memory_int_348|)))) InVars {~x$w_buff0~0=v_~x$w_buff0~0_105, ~#x~0.offset=|v_~#x~0.offset_218|, P1Thread1of1ForFork3_#t~mem12=|v_P1Thread1of1ForFork3_#t~mem12_1|, ~x$w_buff1~0=v_~x$w_buff1~0_119, #memory_int=|v_#memory_int_349|, ~#x~0.base=|v_~#x~0.base_218|, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_43, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_431, P1Thread1of1ForFork3_#t~ite13=|v_P1Thread1of1ForFork3_#t~ite13_1|, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_63, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_575} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_105, P1Thread1of1ForFork3_#t~ite17=|v_P1Thread1of1ForFork3_#t~ite17_1|, P1Thread1of1ForFork3_#t~ite16=|v_P1Thread1of1ForFork3_#t~ite16_1|, P1Thread1of1ForFork3_#t~ite18=|v_P1Thread1of1ForFork3_#t~ite18_1|, ~#x~0.offset=|v_~#x~0.offset_218|, P1Thread1of1ForFork3_#t~mem12=|v_P1Thread1of1ForFork3_#t~mem12_2|, ~x$w_buff1~0=v_~x$w_buff1~0_119, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_42, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_430, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_62, P1Thread1of1ForFork3_#t~ite13=|v_P1Thread1of1ForFork3_#t~ite13_2|, P1Thread1of1ForFork3_#t~ite15=|v_P1Thread1of1ForFork3_#t~ite15_1|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_574, P1Thread1of1ForFork3_#t~ite14=|v_P1Thread1of1ForFork3_#t~ite14_1|, #memory_int=|v_#memory_int_348|, ~#x~0.base=|v_~#x~0.base_218|} AuxVars[|v_P1_#t~ite13_31|, |v_P1_#t~ite14_43|, |v_P1_#t~mem12_36|] AssignedVars[P1Thread1of1ForFork3_#t~ite17, P1Thread1of1ForFork3_#t~ite16, P1Thread1of1ForFork3_#t~ite18, P1Thread1of1ForFork3_#t~mem12, #memory_int, ~x$r_buff1_thd2~0, ~x$w_buff1_used~0, ~x$r_buff0_thd2~0, P1Thread1of1ForFork3_#t~ite13, P1Thread1of1ForFork3_#t~ite15, ~x$w_buff0_used~0, P1Thread1of1ForFork3_#t~ite14] under condition null [2021-01-27 02:28:56,608 WARN L146 IndependenceRelation]: Expensive independence query (3887 ms) for statements [1494] L819-->L826: Formula: (let ((.cse14 (= (mod v_~x$w_buff0_used~0_541 256) 0)) (.cse15 (= (mod v_~x$r_buff0_thd3~0_209 256) 0)) (.cse13 (= (mod v_~x$w_buff0_used~0_540 256) 0)) (.cse16 (= (mod v_~x$w_buff1_used~0_395 256) 0)) (.cse12 (= (mod v_~x$r_buff1_thd3~0_152 256) 0))) (let ((.cse3 (select |v_#memory_int_329| |v_~#x~0.base_204|)) (.cse7 (not .cse12)) (.cse8 (not .cse16)) (.cse1 (not .cse13)) (.cse0 (or .cse13 .cse15)) (.cse9 (or .cse16 .cse12)) (.cse5 (not .cse14)) (.cse2 (not .cse15)) (.cse6 (or .cse14 .cse15))) (and (or (and .cse0 (= v_~x$r_buff0_thd3~0_209 v_~x$r_buff0_thd3~0_208)) (and .cse1 (= v_~x$r_buff0_thd3~0_208 0) .cse2)) (= (store |v_#memory_int_329| |v_~#x~0.base_204| (store .cse3 |v_~#x~0.offset_204| |v_P2_#t~ite48_39|)) |v_#memory_int_328|) (let ((.cse4 (= |v_P2_#t~mem46_36| |v_P2Thread1of1ForFork0_#t~mem46_1|))) (or (and .cse4 .cse5 (= |v_P2Thread1of1ForFork0_#t~ite47_1| |v_P2_#t~ite47_35|) .cse2 (= |v_P2_#t~ite48_39| v_~x$w_buff0~0_101)) (and (= |v_P2_#t~ite48_39| |v_P2_#t~ite47_35|) .cse6 (or (and (= |v_P2_#t~ite47_35| v_~x$w_buff1~0_103) .cse4 .cse7 .cse8) (and (= |v_P2_#t~ite47_35| |v_P2_#t~mem46_36|) (= (select .cse3 |v_~#x~0.offset_204|) |v_P2_#t~mem46_36|) .cse9))))) (let ((.cse11 (= (mod v_~x$w_buff1_used~0_394 256) 0)) (.cse10 (= (mod v_~x$r_buff0_thd3~0_208 256) 0))) (or (and (= v_~x$r_buff1_thd3~0_151 0) (or (and (not .cse10) .cse1) (and (not .cse11) .cse7))) (and (= v_~x$r_buff1_thd3~0_152 v_~x$r_buff1_thd3~0_151) (or .cse11 .cse12) (or .cse10 .cse13)))) (or (and (or (and .cse7 .cse8) (and .cse1 .cse2)) (= v_~x$w_buff1_used~0_394 0)) (and .cse0 (= v_~x$w_buff1_used~0_395 v_~x$w_buff1_used~0_394) .cse9)) (or (and .cse5 (= v_~x$w_buff0_used~0_540 0) .cse2) (and (= v_~x$w_buff0_used~0_541 v_~x$w_buff0_used~0_540) .cse6))))) InVars {~x$w_buff0~0=v_~x$w_buff0~0_101, P2Thread1of1ForFork0_#t~ite47=|v_P2Thread1of1ForFork0_#t~ite47_1|, ~#x~0.offset=|v_~#x~0.offset_204|, ~x$w_buff1~0=v_~x$w_buff1~0_103, #memory_int=|v_#memory_int_329|, ~#x~0.base=|v_~#x~0.base_204|, P2Thread1of1ForFork0_#t~mem46=|v_P2Thread1of1ForFork0_#t~mem46_1|, ~x$r_buff1_thd3~0=v_~x$r_buff1_thd3~0_152, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_395, ~x$r_buff0_thd3~0=v_~x$r_buff0_thd3~0_209, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_541} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_101, ~#x~0.offset=|v_~#x~0.offset_204|, ~x$w_buff1~0=v_~x$w_buff1~0_103, P2Thread1of1ForFork0_#t~ite52=|v_P2Thread1of1ForFork0_#t~ite52_1|, ~x$r_buff1_thd3~0=v_~x$r_buff1_thd3~0_151, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_394, P2Thread1of1ForFork0_#t~ite50=|v_P2Thread1of1ForFork0_#t~ite50_1|, ~x$r_buff0_thd3~0=v_~x$r_buff0_thd3~0_208, P2Thread1of1ForFork0_#t~ite51=|v_P2Thread1of1ForFork0_#t~ite51_1|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_540, P2Thread1of1ForFork0_#t~ite48=|v_P2Thread1of1ForFork0_#t~ite48_1|, P2Thread1of1ForFork0_#t~ite47=|v_P2Thread1of1ForFork0_#t~ite47_2|, P2Thread1of1ForFork0_#t~ite49=|v_P2Thread1of1ForFork0_#t~ite49_1|, P2Thread1of1ForFork0_#t~mem46=|v_P2Thread1of1ForFork0_#t~mem46_2|, #memory_int=|v_#memory_int_328|, ~#x~0.base=|v_~#x~0.base_204|} AuxVars[|v_P2_#t~ite47_35|, |v_P2_#t~mem46_36|, |v_P2_#t~ite48_39|] AssignedVars[P2Thread1of1ForFork0_#t~ite48, P2Thread1of1ForFork0_#t~ite47, P2Thread1of1ForFork0_#t~ite49, P2Thread1of1ForFork0_#t~ite52, P2Thread1of1ForFork0_#t~mem46, #memory_int, ~x$r_buff1_thd3~0, ~x$w_buff1_used~0, P2Thread1of1ForFork0_#t~ite50, ~x$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite51, ~x$w_buff0_used~0] and [1487] L783-->L791: Formula: (let ((.cse14 (= (mod v_~x$w_buff0_used~0_575 256) 0)) (.cse15 (= (mod v_~x$r_buff0_thd2~0_63 256) 0)) (.cse3 (= (mod v_~x$r_buff1_thd2~0_43 256) 0)) (.cse16 (= 0 (mod v_~x$w_buff1_used~0_431 256))) (.cse1 (= (mod v_~x$w_buff0_used~0_574 256) 0))) (let ((.cse5 (not .cse1)) (.cse13 (not .cse16)) (.cse4 (not .cse3)) (.cse6 (or .cse15 .cse1)) (.cse12 (or .cse16 .cse3)) (.cse10 (or .cse14 .cse15)) (.cse7 (not .cse15)) (.cse8 (not .cse14)) (.cse11 (select |v_#memory_int_349| |v_~#x~0.base_218|))) (and (let ((.cse2 (= (mod v_~x$w_buff1_used~0_430 256) 0)) (.cse0 (= (mod v_~x$r_buff0_thd2~0_62 256) 0))) (or (and (= v_~x$r_buff1_thd2~0_43 v_~x$r_buff1_thd2~0_42) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and .cse4 (not .cse2)) (and (not .cse0) .cse5)) (= v_~x$r_buff1_thd2~0_42 0)))) (or (and (= v_~x$r_buff0_thd2~0_63 v_~x$r_buff0_thd2~0_62) .cse6) (and (= v_~x$r_buff0_thd2~0_62 0) .cse7 .cse5)) (let ((.cse9 (= |v_P1_#t~mem12_36| |v_P1Thread1of1ForFork3_#t~mem12_1|))) (or (and .cse7 .cse8 (= |v_P1Thread1of1ForFork3_#t~ite13_1| |v_P1_#t~ite13_31|) .cse9 (= |v_P1_#t~ite14_43| v_~x$w_buff0~0_105)) (and (= |v_P1_#t~ite13_31| |v_P1_#t~ite14_43|) .cse10 (or (and (= |v_P1_#t~ite13_31| |v_P1_#t~mem12_36|) (= |v_P1_#t~mem12_36| (select .cse11 |v_~#x~0.offset_218|)) .cse12) (and .cse13 .cse4 .cse9 (= |v_P1_#t~ite13_31| v_~x$w_buff1~0_119)))))) (or (and (= v_~x$w_buff1_used~0_430 0) (or (and .cse7 .cse5) (and .cse13 .cse4))) (and (= v_~x$w_buff1_used~0_431 v_~x$w_buff1_used~0_430) .cse6 .cse12)) (or (and .cse10 (= v_~x$w_buff0_used~0_575 v_~x$w_buff0_used~0_574)) (and (= v_~x$w_buff0_used~0_574 0) .cse7 .cse8)) (= (store |v_#memory_int_349| |v_~#x~0.base_218| (store .cse11 |v_~#x~0.offset_218| |v_P1_#t~ite14_43|)) |v_#memory_int_348|)))) InVars {~x$w_buff0~0=v_~x$w_buff0~0_105, ~#x~0.offset=|v_~#x~0.offset_218|, P1Thread1of1ForFork3_#t~mem12=|v_P1Thread1of1ForFork3_#t~mem12_1|, ~x$w_buff1~0=v_~x$w_buff1~0_119, #memory_int=|v_#memory_int_349|, ~#x~0.base=|v_~#x~0.base_218|, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_43, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_431, P1Thread1of1ForFork3_#t~ite13=|v_P1Thread1of1ForFork3_#t~ite13_1|, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_63, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_575} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_105, P1Thread1of1ForFork3_#t~ite17=|v_P1Thread1of1ForFork3_#t~ite17_1|, P1Thread1of1ForFork3_#t~ite16=|v_P1Thread1of1ForFork3_#t~ite16_1|, P1Thread1of1ForFork3_#t~ite18=|v_P1Thread1of1ForFork3_#t~ite18_1|, ~#x~0.offset=|v_~#x~0.offset_218|, P1Thread1of1ForFork3_#t~mem12=|v_P1Thread1of1ForFork3_#t~mem12_2|, ~x$w_buff1~0=v_~x$w_buff1~0_119, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_42, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_430, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_62, P1Thread1of1ForFork3_#t~ite13=|v_P1Thread1of1ForFork3_#t~ite13_2|, P1Thread1of1ForFork3_#t~ite15=|v_P1Thread1of1ForFork3_#t~ite15_1|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_574, P1Thread1of1ForFork3_#t~ite14=|v_P1Thread1of1ForFork3_#t~ite14_1|, #memory_int=|v_#memory_int_348|, ~#x~0.base=|v_~#x~0.base_218|} AuxVars[|v_P1_#t~ite13_31|, |v_P1_#t~ite14_43|, |v_P1_#t~mem12_36|] AssignedVars[P1Thread1of1ForFork3_#t~ite17, P1Thread1of1ForFork3_#t~ite16, P1Thread1of1ForFork3_#t~ite18, P1Thread1of1ForFork3_#t~mem12, #memory_int, ~x$r_buff1_thd2~0, ~x$w_buff1_used~0, ~x$r_buff0_thd2~0, P1Thread1of1ForFork3_#t~ite13, P1Thread1of1ForFork3_#t~ite15, ~x$w_buff0_used~0, P1Thread1of1ForFork3_#t~ite14] under condition null [2021-01-27 02:29:00,575 WARN L146 IndependenceRelation]: Expensive independence query (3963 ms) for statements [1500] L836-->L843: Formula: (let ((.cse9 (= (mod v_~x$r_buff1_thd4~0_51 256) 0)) (.cse14 (= (mod v_~x$w_buff1_used~0_455 256) 0)) (.cse15 (= (mod v_~x$w_buff0_used~0_603 256) 0)) (.cse16 (= (mod v_~x$r_buff0_thd4~0_57 256) 0)) (.cse11 (= (mod v_~x$w_buff0_used~0_602 256) 0))) (let ((.cse3 (not .cse11)) (.cse0 (or .cse11 .cse16)) (.cse2 (not .cse16)) (.cse8 (not .cse15)) (.cse7 (or .cse15 .cse16)) (.cse6 (select |v_#memory_int_377| |v_~#x~0.base_232|)) (.cse1 (or .cse9 .cse14)) (.cse4 (not .cse14)) (.cse5 (not .cse9))) (and (or (and (= v_~x$w_buff1_used~0_455 v_~x$w_buff1_used~0_454) .cse0 .cse1) (and (or (and .cse2 .cse3) (and .cse4 .cse5)) (= v_~x$w_buff1_used~0_454 0))) (= (store |v_#memory_int_377| |v_~#x~0.base_232| (store .cse6 |v_~#x~0.offset_232| |v_P3_#t~ite55_35|)) |v_#memory_int_376|) (or (and (= v_~x$w_buff0_used~0_603 v_~x$w_buff0_used~0_602) .cse7) (and .cse2 .cse8 (= v_~x$w_buff0_used~0_602 0))) (let ((.cse12 (= (mod v_~x$r_buff0_thd4~0_56 256) 0)) (.cse10 (= (mod v_~x$w_buff1_used~0_454 256) 0))) (or (and (or .cse9 .cse10) (or .cse11 .cse12) (= v_~x$r_buff1_thd4~0_51 v_~x$r_buff1_thd4~0_50)) (and (= v_~x$r_buff1_thd4~0_50 0) (or (and .cse3 (not .cse12)) (and .cse5 (not .cse10)))))) (or (and .cse2 .cse3 (= v_~x$r_buff0_thd4~0_56 0)) (and (= v_~x$r_buff0_thd4~0_57 v_~x$r_buff0_thd4~0_56) .cse0)) (let ((.cse13 (= |v_P3_#t~mem53_40| |v_P3Thread1of1ForFork1_#t~mem53_1|))) (or (and .cse2 (= |v_P3_#t~ite55_35| v_~x$w_buff0~0_121) (= |v_P3_#t~ite54_35| |v_P3Thread1of1ForFork1_#t~ite54_1|) .cse8 .cse13) (and (= |v_P3_#t~ite54_35| |v_P3_#t~ite55_35|) .cse7 (or (and (= (select .cse6 |v_~#x~0.offset_232|) |v_P3_#t~mem53_40|) (= |v_P3_#t~ite54_35| |v_P3_#t~mem53_40|) .cse1) (and .cse4 (= |v_P3_#t~ite54_35| v_~x$w_buff1~0_133) .cse5 .cse13)))))))) InVars {~x$w_buff0~0=v_~x$w_buff0~0_121, P3Thread1of1ForFork1_#t~ite54=|v_P3Thread1of1ForFork1_#t~ite54_1|, ~#x~0.offset=|v_~#x~0.offset_232|, ~x$w_buff1~0=v_~x$w_buff1~0_133, #memory_int=|v_#memory_int_377|, ~#x~0.base=|v_~#x~0.base_232|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_455, ~x$r_buff0_thd4~0=v_~x$r_buff0_thd4~0_57, P3Thread1of1ForFork1_#t~mem53=|v_P3Thread1of1ForFork1_#t~mem53_1|, ~x$r_buff1_thd4~0=v_~x$r_buff1_thd4~0_51, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_603} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_121, P3Thread1of1ForFork1_#t~ite54=|v_P3Thread1of1ForFork1_#t~ite54_2|, P3Thread1of1ForFork1_#t~ite55=|v_P3Thread1of1ForFork1_#t~ite55_1|, P3Thread1of1ForFork1_#t~ite56=|v_P3Thread1of1ForFork1_#t~ite56_1|, ~#x~0.offset=|v_~#x~0.offset_232|, P3Thread1of1ForFork1_#t~ite57=|v_P3Thread1of1ForFork1_#t~ite57_1|, P3Thread1of1ForFork1_#t~ite58=|v_P3Thread1of1ForFork1_#t~ite58_1|, ~x$w_buff1~0=v_~x$w_buff1~0_133, P3Thread1of1ForFork1_#t~ite59=|v_P3Thread1of1ForFork1_#t~ite59_1|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_454, ~x$r_buff0_thd4~0=v_~x$r_buff0_thd4~0_56, P3Thread1of1ForFork1_#t~mem53=|v_P3Thread1of1ForFork1_#t~mem53_2|, ~x$r_buff1_thd4~0=v_~x$r_buff1_thd4~0_50, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_602, #memory_int=|v_#memory_int_376|, ~#x~0.base=|v_~#x~0.base_232|} AuxVars[|v_P3_#t~ite54_35|, |v_P3_#t~ite55_35|, |v_P3_#t~mem53_40|] AssignedVars[P3Thread1of1ForFork1_#t~ite54, P3Thread1of1ForFork1_#t~ite55, P3Thread1of1ForFork1_#t~ite56, P3Thread1of1ForFork1_#t~ite57, P3Thread1of1ForFork1_#t~ite58, P3Thread1of1ForFork1_#t~ite59, #memory_int, ~x$w_buff1_used~0, ~x$r_buff0_thd4~0, P3Thread1of1ForFork1_#t~mem53, ~x$r_buff1_thd4~0, ~x$w_buff0_used~0] and [1487] L783-->L791: Formula: (let ((.cse14 (= (mod v_~x$w_buff0_used~0_575 256) 0)) (.cse15 (= (mod v_~x$r_buff0_thd2~0_63 256) 0)) (.cse3 (= (mod v_~x$r_buff1_thd2~0_43 256) 0)) (.cse16 (= 0 (mod v_~x$w_buff1_used~0_431 256))) (.cse1 (= (mod v_~x$w_buff0_used~0_574 256) 0))) (let ((.cse5 (not .cse1)) (.cse13 (not .cse16)) (.cse4 (not .cse3)) (.cse6 (or .cse15 .cse1)) (.cse12 (or .cse16 .cse3)) (.cse10 (or .cse14 .cse15)) (.cse7 (not .cse15)) (.cse8 (not .cse14)) (.cse11 (select |v_#memory_int_349| |v_~#x~0.base_218|))) (and (let ((.cse2 (= (mod v_~x$w_buff1_used~0_430 256) 0)) (.cse0 (= (mod v_~x$r_buff0_thd2~0_62 256) 0))) (or (and (= v_~x$r_buff1_thd2~0_43 v_~x$r_buff1_thd2~0_42) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and .cse4 (not .cse2)) (and (not .cse0) .cse5)) (= v_~x$r_buff1_thd2~0_42 0)))) (or (and (= v_~x$r_buff0_thd2~0_63 v_~x$r_buff0_thd2~0_62) .cse6) (and (= v_~x$r_buff0_thd2~0_62 0) .cse7 .cse5)) (let ((.cse9 (= |v_P1_#t~mem12_36| |v_P1Thread1of1ForFork3_#t~mem12_1|))) (or (and .cse7 .cse8 (= |v_P1Thread1of1ForFork3_#t~ite13_1| |v_P1_#t~ite13_31|) .cse9 (= |v_P1_#t~ite14_43| v_~x$w_buff0~0_105)) (and (= |v_P1_#t~ite13_31| |v_P1_#t~ite14_43|) .cse10 (or (and (= |v_P1_#t~ite13_31| |v_P1_#t~mem12_36|) (= |v_P1_#t~mem12_36| (select .cse11 |v_~#x~0.offset_218|)) .cse12) (and .cse13 .cse4 .cse9 (= |v_P1_#t~ite13_31| v_~x$w_buff1~0_119)))))) (or (and (= v_~x$w_buff1_used~0_430 0) (or (and .cse7 .cse5) (and .cse13 .cse4))) (and (= v_~x$w_buff1_used~0_431 v_~x$w_buff1_used~0_430) .cse6 .cse12)) (or (and .cse10 (= v_~x$w_buff0_used~0_575 v_~x$w_buff0_used~0_574)) (and (= v_~x$w_buff0_used~0_574 0) .cse7 .cse8)) (= (store |v_#memory_int_349| |v_~#x~0.base_218| (store .cse11 |v_~#x~0.offset_218| |v_P1_#t~ite14_43|)) |v_#memory_int_348|)))) InVars {~x$w_buff0~0=v_~x$w_buff0~0_105, ~#x~0.offset=|v_~#x~0.offset_218|, P1Thread1of1ForFork3_#t~mem12=|v_P1Thread1of1ForFork3_#t~mem12_1|, ~x$w_buff1~0=v_~x$w_buff1~0_119, #memory_int=|v_#memory_int_349|, ~#x~0.base=|v_~#x~0.base_218|, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_43, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_431, P1Thread1of1ForFork3_#t~ite13=|v_P1Thread1of1ForFork3_#t~ite13_1|, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_63, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_575} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_105, P1Thread1of1ForFork3_#t~ite17=|v_P1Thread1of1ForFork3_#t~ite17_1|, P1Thread1of1ForFork3_#t~ite16=|v_P1Thread1of1ForFork3_#t~ite16_1|, P1Thread1of1ForFork3_#t~ite18=|v_P1Thread1of1ForFork3_#t~ite18_1|, ~#x~0.offset=|v_~#x~0.offset_218|, P1Thread1of1ForFork3_#t~mem12=|v_P1Thread1of1ForFork3_#t~mem12_2|, ~x$w_buff1~0=v_~x$w_buff1~0_119, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_42, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_430, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_62, P1Thread1of1ForFork3_#t~ite13=|v_P1Thread1of1ForFork3_#t~ite13_2|, P1Thread1of1ForFork3_#t~ite15=|v_P1Thread1of1ForFork3_#t~ite15_1|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_574, P1Thread1of1ForFork3_#t~ite14=|v_P1Thread1of1ForFork3_#t~ite14_1|, #memory_int=|v_#memory_int_348|, ~#x~0.base=|v_~#x~0.base_218|} AuxVars[|v_P1_#t~ite13_31|, |v_P1_#t~ite14_43|, |v_P1_#t~mem12_36|] AssignedVars[P1Thread1of1ForFork3_#t~ite17, P1Thread1of1ForFork3_#t~ite16, P1Thread1of1ForFork3_#t~ite18, P1Thread1of1ForFork3_#t~mem12, #memory_int, ~x$r_buff1_thd2~0, ~x$w_buff1_used~0, ~x$r_buff0_thd2~0, P1Thread1of1ForFork3_#t~ite13, P1Thread1of1ForFork3_#t~ite15, ~x$w_buff0_used~0, P1Thread1of1ForFork3_#t~ite14] under condition null [2021-01-27 02:29:04,555 WARN L146 IndependenceRelation]: Expensive independence query (3978 ms) for statements [1475] L2-1-->L878: Formula: (let ((.cse15 (= (mod v_~x$w_buff0_used~0_567 256) 0)) (.cse13 (= (mod v_~x$r_buff1_thd0~0_166 256) 0)) (.cse16 (= (mod v_~x$w_buff1_used~0_423 256) 0)) (.cse12 (= (mod v_~x$w_buff0_used~0_566 256) 0)) (.cse14 (= (mod v_~x$r_buff0_thd0~0_213 256) 0))) (let ((.cse9 (or .cse12 .cse14)) (.cse5 (or .cse13 .cse16)) (.cse3 (not .cse16)) (.cse4 (select |v_#memory_int_341| |v_~#x~0.base_212|)) (.cse1 (not .cse13)) (.cse8 (not .cse12)) (.cse6 (not .cse15)) (.cse7 (not .cse14)) (.cse0 (or .cse14 .cse15))) (and (let ((.cse2 (= |v_ULTIMATE.start_main_#t~mem64_25| |v_ULTIMATE.start_main_#t~mem64_29|))) (or (and .cse0 (or (and .cse1 .cse2 .cse3 (= |v_ULTIMATE.start_main_#t~ite65_26| v_~x$w_buff1~0_113)) (and (= |v_ULTIMATE.start_main_#t~mem64_29| (select .cse4 |v_~#x~0.offset_212|)) (= |v_ULTIMATE.start_main_#t~mem64_29| |v_ULTIMATE.start_main_#t~ite65_26|) .cse5)) (= |v_ULTIMATE.start_main_#t~ite65_26| |v_ULTIMATE.start_main_#t~ite66_28|)) (and .cse2 (= |v_ULTIMATE.start_main_#t~ite65_22| |v_ULTIMATE.start_main_#t~ite65_26|) .cse6 (= v_~x$w_buff0~0_103 |v_ULTIMATE.start_main_#t~ite66_28|) .cse7))) (or (and (= v_~x$r_buff0_thd0~0_212 0) .cse8 .cse7) (and .cse9 (= v_~x$r_buff0_thd0~0_213 v_~x$r_buff0_thd0~0_212))) (or (and .cse9 (= v_~x$w_buff1_used~0_423 v_~x$w_buff1_used~0_422) .cse5) (and (= v_~x$w_buff1_used~0_422 0) (or (and .cse8 .cse7) (and .cse1 .cse3)))) (= |v_#memory_int_340| (store |v_#memory_int_341| |v_~#x~0.base_212| (store .cse4 |v_~#x~0.offset_212| |v_ULTIMATE.start_main_#t~ite66_28|))) (let ((.cse11 (= (mod v_~x$r_buff0_thd0~0_212 256) 0)) (.cse10 (= (mod v_~x$w_buff1_used~0_422 256) 0))) (or (and (= v_~x$r_buff1_thd0~0_165 0) (or (and .cse1 (not .cse10)) (and (not .cse11) .cse8))) (and (or .cse12 .cse11) (or .cse13 .cse10) (= v_~x$r_buff1_thd0~0_166 v_~x$r_buff1_thd0~0_165)))) (or (and .cse6 (= v_~x$w_buff0_used~0_566 0) .cse7) (and .cse0 (= v_~x$w_buff0_used~0_567 v_~x$w_buff0_used~0_566)))))) InVars {~x$w_buff0~0=v_~x$w_buff0~0_103, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_213, ULTIMATE.start_main_#t~mem64=|v_ULTIMATE.start_main_#t~mem64_25|, ~#x~0.offset=|v_~#x~0.offset_212|, ~x$w_buff1~0=v_~x$w_buff1~0_113, #memory_int=|v_#memory_int_341|, ~#x~0.base=|v_~#x~0.base_212|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_423, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_166, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_567, ULTIMATE.start_main_#t~ite65=|v_ULTIMATE.start_main_#t~ite65_22|} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_103, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_212, ULTIMATE.start_main_#t~mem64=|v_ULTIMATE.start_main_#t~mem64_23|, ~#x~0.offset=|v_~#x~0.offset_212|, ~x$w_buff1~0=v_~x$w_buff1~0_113, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_422, ULTIMATE.start_main_#t~ite68=|v_ULTIMATE.start_main_#t~ite68_26|, ULTIMATE.start_main_#t~ite69=|v_ULTIMATE.start_main_#t~ite69_32|, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_165, ULTIMATE.start_main_#t~ite66=|v_ULTIMATE.start_main_#t~ite66_24|, ULTIMATE.start_main_#t~ite67=|v_ULTIMATE.start_main_#t~ite67_28|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_566, ULTIMATE.start_main_#t~ite65=|v_ULTIMATE.start_main_#t~ite65_20|, ULTIMATE.start_main_#t~ite70=|v_ULTIMATE.start_main_#t~ite70_28|, #memory_int=|v_#memory_int_340|, ~#x~0.base=|v_~#x~0.base_212|} AuxVars[|v_ULTIMATE.start_main_#t~mem64_29|, |v_ULTIMATE.start_main_#t~ite65_26|, |v_ULTIMATE.start_main_#t~ite66_28|] AssignedVars[~x$r_buff0_thd0~0, ULTIMATE.start_main_#t~mem64, ULTIMATE.start_main_#t~ite70, #memory_int, ~x$w_buff1_used~0, ULTIMATE.start_main_#t~ite68, ULTIMATE.start_main_#t~ite69, ~x$r_buff1_thd0~0, ULTIMATE.start_main_#t~ite66, ULTIMATE.start_main_#t~ite67, ~x$w_buff0_used~0, ULTIMATE.start_main_#t~ite65] and [1487] L783-->L791: Formula: (let ((.cse14 (= (mod v_~x$w_buff0_used~0_575 256) 0)) (.cse15 (= (mod v_~x$r_buff0_thd2~0_63 256) 0)) (.cse3 (= (mod v_~x$r_buff1_thd2~0_43 256) 0)) (.cse16 (= 0 (mod v_~x$w_buff1_used~0_431 256))) (.cse1 (= (mod v_~x$w_buff0_used~0_574 256) 0))) (let ((.cse5 (not .cse1)) (.cse13 (not .cse16)) (.cse4 (not .cse3)) (.cse6 (or .cse15 .cse1)) (.cse12 (or .cse16 .cse3)) (.cse10 (or .cse14 .cse15)) (.cse7 (not .cse15)) (.cse8 (not .cse14)) (.cse11 (select |v_#memory_int_349| |v_~#x~0.base_218|))) (and (let ((.cse2 (= (mod v_~x$w_buff1_used~0_430 256) 0)) (.cse0 (= (mod v_~x$r_buff0_thd2~0_62 256) 0))) (or (and (= v_~x$r_buff1_thd2~0_43 v_~x$r_buff1_thd2~0_42) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and .cse4 (not .cse2)) (and (not .cse0) .cse5)) (= v_~x$r_buff1_thd2~0_42 0)))) (or (and (= v_~x$r_buff0_thd2~0_63 v_~x$r_buff0_thd2~0_62) .cse6) (and (= v_~x$r_buff0_thd2~0_62 0) .cse7 .cse5)) (let ((.cse9 (= |v_P1_#t~mem12_36| |v_P1Thread1of1ForFork3_#t~mem12_1|))) (or (and .cse7 .cse8 (= |v_P1Thread1of1ForFork3_#t~ite13_1| |v_P1_#t~ite13_31|) .cse9 (= |v_P1_#t~ite14_43| v_~x$w_buff0~0_105)) (and (= |v_P1_#t~ite13_31| |v_P1_#t~ite14_43|) .cse10 (or (and (= |v_P1_#t~ite13_31| |v_P1_#t~mem12_36|) (= |v_P1_#t~mem12_36| (select .cse11 |v_~#x~0.offset_218|)) .cse12) (and .cse13 .cse4 .cse9 (= |v_P1_#t~ite13_31| v_~x$w_buff1~0_119)))))) (or (and (= v_~x$w_buff1_used~0_430 0) (or (and .cse7 .cse5) (and .cse13 .cse4))) (and (= v_~x$w_buff1_used~0_431 v_~x$w_buff1_used~0_430) .cse6 .cse12)) (or (and .cse10 (= v_~x$w_buff0_used~0_575 v_~x$w_buff0_used~0_574)) (and (= v_~x$w_buff0_used~0_574 0) .cse7 .cse8)) (= (store |v_#memory_int_349| |v_~#x~0.base_218| (store .cse11 |v_~#x~0.offset_218| |v_P1_#t~ite14_43|)) |v_#memory_int_348|)))) InVars {~x$w_buff0~0=v_~x$w_buff0~0_105, ~#x~0.offset=|v_~#x~0.offset_218|, P1Thread1of1ForFork3_#t~mem12=|v_P1Thread1of1ForFork3_#t~mem12_1|, ~x$w_buff1~0=v_~x$w_buff1~0_119, #memory_int=|v_#memory_int_349|, ~#x~0.base=|v_~#x~0.base_218|, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_43, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_431, P1Thread1of1ForFork3_#t~ite13=|v_P1Thread1of1ForFork3_#t~ite13_1|, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_63, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_575} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_105, P1Thread1of1ForFork3_#t~ite17=|v_P1Thread1of1ForFork3_#t~ite17_1|, P1Thread1of1ForFork3_#t~ite16=|v_P1Thread1of1ForFork3_#t~ite16_1|, P1Thread1of1ForFork3_#t~ite18=|v_P1Thread1of1ForFork3_#t~ite18_1|, ~#x~0.offset=|v_~#x~0.offset_218|, P1Thread1of1ForFork3_#t~mem12=|v_P1Thread1of1ForFork3_#t~mem12_2|, ~x$w_buff1~0=v_~x$w_buff1~0_119, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_42, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_430, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_62, P1Thread1of1ForFork3_#t~ite13=|v_P1Thread1of1ForFork3_#t~ite13_2|, P1Thread1of1ForFork3_#t~ite15=|v_P1Thread1of1ForFork3_#t~ite15_1|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_574, P1Thread1of1ForFork3_#t~ite14=|v_P1Thread1of1ForFork3_#t~ite14_1|, #memory_int=|v_#memory_int_348|, ~#x~0.base=|v_~#x~0.base_218|} AuxVars[|v_P1_#t~ite13_31|, |v_P1_#t~ite14_43|, |v_P1_#t~mem12_36|] AssignedVars[P1Thread1of1ForFork3_#t~ite17, P1Thread1of1ForFork3_#t~ite16, P1Thread1of1ForFork3_#t~ite18, P1Thread1of1ForFork3_#t~mem12, #memory_int, ~x$r_buff1_thd2~0, ~x$w_buff1_used~0, ~x$r_buff0_thd2~0, P1Thread1of1ForFork3_#t~ite13, P1Thread1of1ForFork3_#t~ite15, ~x$w_buff0_used~0, P1Thread1of1ForFork3_#t~ite14] under condition null [2021-01-27 02:29:07,942 WARN L146 IndependenceRelation]: Expensive independence query (2173 ms) for statements [1494] L819-->L826: Formula: (let ((.cse14 (= (mod v_~x$w_buff0_used~0_541 256) 0)) (.cse15 (= (mod v_~x$r_buff0_thd3~0_209 256) 0)) (.cse13 (= (mod v_~x$w_buff0_used~0_540 256) 0)) (.cse16 (= (mod v_~x$w_buff1_used~0_395 256) 0)) (.cse12 (= (mod v_~x$r_buff1_thd3~0_152 256) 0))) (let ((.cse3 (select |v_#memory_int_329| |v_~#x~0.base_204|)) (.cse7 (not .cse12)) (.cse8 (not .cse16)) (.cse1 (not .cse13)) (.cse0 (or .cse13 .cse15)) (.cse9 (or .cse16 .cse12)) (.cse5 (not .cse14)) (.cse2 (not .cse15)) (.cse6 (or .cse14 .cse15))) (and (or (and .cse0 (= v_~x$r_buff0_thd3~0_209 v_~x$r_buff0_thd3~0_208)) (and .cse1 (= v_~x$r_buff0_thd3~0_208 0) .cse2)) (= (store |v_#memory_int_329| |v_~#x~0.base_204| (store .cse3 |v_~#x~0.offset_204| |v_P2_#t~ite48_39|)) |v_#memory_int_328|) (let ((.cse4 (= |v_P2_#t~mem46_36| |v_P2Thread1of1ForFork0_#t~mem46_1|))) (or (and .cse4 .cse5 (= |v_P2Thread1of1ForFork0_#t~ite47_1| |v_P2_#t~ite47_35|) .cse2 (= |v_P2_#t~ite48_39| v_~x$w_buff0~0_101)) (and (= |v_P2_#t~ite48_39| |v_P2_#t~ite47_35|) .cse6 (or (and (= |v_P2_#t~ite47_35| v_~x$w_buff1~0_103) .cse4 .cse7 .cse8) (and (= |v_P2_#t~ite47_35| |v_P2_#t~mem46_36|) (= (select .cse3 |v_~#x~0.offset_204|) |v_P2_#t~mem46_36|) .cse9))))) (let ((.cse11 (= (mod v_~x$w_buff1_used~0_394 256) 0)) (.cse10 (= (mod v_~x$r_buff0_thd3~0_208 256) 0))) (or (and (= v_~x$r_buff1_thd3~0_151 0) (or (and (not .cse10) .cse1) (and (not .cse11) .cse7))) (and (= v_~x$r_buff1_thd3~0_152 v_~x$r_buff1_thd3~0_151) (or .cse11 .cse12) (or .cse10 .cse13)))) (or (and (or (and .cse7 .cse8) (and .cse1 .cse2)) (= v_~x$w_buff1_used~0_394 0)) (and .cse0 (= v_~x$w_buff1_used~0_395 v_~x$w_buff1_used~0_394) .cse9)) (or (and .cse5 (= v_~x$w_buff0_used~0_540 0) .cse2) (and (= v_~x$w_buff0_used~0_541 v_~x$w_buff0_used~0_540) .cse6))))) InVars {~x$w_buff0~0=v_~x$w_buff0~0_101, P2Thread1of1ForFork0_#t~ite47=|v_P2Thread1of1ForFork0_#t~ite47_1|, ~#x~0.offset=|v_~#x~0.offset_204|, ~x$w_buff1~0=v_~x$w_buff1~0_103, #memory_int=|v_#memory_int_329|, ~#x~0.base=|v_~#x~0.base_204|, P2Thread1of1ForFork0_#t~mem46=|v_P2Thread1of1ForFork0_#t~mem46_1|, ~x$r_buff1_thd3~0=v_~x$r_buff1_thd3~0_152, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_395, ~x$r_buff0_thd3~0=v_~x$r_buff0_thd3~0_209, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_541} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_101, ~#x~0.offset=|v_~#x~0.offset_204|, ~x$w_buff1~0=v_~x$w_buff1~0_103, P2Thread1of1ForFork0_#t~ite52=|v_P2Thread1of1ForFork0_#t~ite52_1|, ~x$r_buff1_thd3~0=v_~x$r_buff1_thd3~0_151, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_394, P2Thread1of1ForFork0_#t~ite50=|v_P2Thread1of1ForFork0_#t~ite50_1|, ~x$r_buff0_thd3~0=v_~x$r_buff0_thd3~0_208, P2Thread1of1ForFork0_#t~ite51=|v_P2Thread1of1ForFork0_#t~ite51_1|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_540, P2Thread1of1ForFork0_#t~ite48=|v_P2Thread1of1ForFork0_#t~ite48_1|, P2Thread1of1ForFork0_#t~ite47=|v_P2Thread1of1ForFork0_#t~ite47_2|, P2Thread1of1ForFork0_#t~ite49=|v_P2Thread1of1ForFork0_#t~ite49_1|, P2Thread1of1ForFork0_#t~mem46=|v_P2Thread1of1ForFork0_#t~mem46_2|, #memory_int=|v_#memory_int_328|, ~#x~0.base=|v_~#x~0.base_204|} AuxVars[|v_P2_#t~ite47_35|, |v_P2_#t~mem46_36|, |v_P2_#t~ite48_39|] AssignedVars[P2Thread1of1ForFork0_#t~ite48, P2Thread1of1ForFork0_#t~ite47, P2Thread1of1ForFork0_#t~ite49, P2Thread1of1ForFork0_#t~ite52, P2Thread1of1ForFork0_#t~mem46, #memory_int, ~x$r_buff1_thd3~0, ~x$w_buff1_used~0, P2Thread1of1ForFork0_#t~ite50, ~x$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite51, ~x$w_buff0_used~0] and [1486] L782-->L783: Formula: (= |v_#memory_int_6| (store |v_#memory_int_7| |v_~#x~0.base_4| (store (select |v_#memory_int_7| |v_~#x~0.base_4|) |v_~#x~0.offset_4| 2))) InVars {#memory_int=|v_#memory_int_7|, ~#x~0.base=|v_~#x~0.base_4|, ~#x~0.offset=|v_~#x~0.offset_4|} OutVars{#memory_int=|v_#memory_int_6|, ~#x~0.base=|v_~#x~0.base_4|, ~#x~0.offset=|v_~#x~0.offset_4|} AuxVars[] AssignedVars[#memory_int] under condition null [2021-01-27 02:29:10,013 WARN L146 IndependenceRelation]: Expensive independence query (2068 ms) for statements [1500] L836-->L843: Formula: (let ((.cse9 (= (mod v_~x$r_buff1_thd4~0_51 256) 0)) (.cse14 (= (mod v_~x$w_buff1_used~0_455 256) 0)) (.cse15 (= (mod v_~x$w_buff0_used~0_603 256) 0)) (.cse16 (= (mod v_~x$r_buff0_thd4~0_57 256) 0)) (.cse11 (= (mod v_~x$w_buff0_used~0_602 256) 0))) (let ((.cse3 (not .cse11)) (.cse0 (or .cse11 .cse16)) (.cse2 (not .cse16)) (.cse8 (not .cse15)) (.cse7 (or .cse15 .cse16)) (.cse6 (select |v_#memory_int_377| |v_~#x~0.base_232|)) (.cse1 (or .cse9 .cse14)) (.cse4 (not .cse14)) (.cse5 (not .cse9))) (and (or (and (= v_~x$w_buff1_used~0_455 v_~x$w_buff1_used~0_454) .cse0 .cse1) (and (or (and .cse2 .cse3) (and .cse4 .cse5)) (= v_~x$w_buff1_used~0_454 0))) (= (store |v_#memory_int_377| |v_~#x~0.base_232| (store .cse6 |v_~#x~0.offset_232| |v_P3_#t~ite55_35|)) |v_#memory_int_376|) (or (and (= v_~x$w_buff0_used~0_603 v_~x$w_buff0_used~0_602) .cse7) (and .cse2 .cse8 (= v_~x$w_buff0_used~0_602 0))) (let ((.cse12 (= (mod v_~x$r_buff0_thd4~0_56 256) 0)) (.cse10 (= (mod v_~x$w_buff1_used~0_454 256) 0))) (or (and (or .cse9 .cse10) (or .cse11 .cse12) (= v_~x$r_buff1_thd4~0_51 v_~x$r_buff1_thd4~0_50)) (and (= v_~x$r_buff1_thd4~0_50 0) (or (and .cse3 (not .cse12)) (and .cse5 (not .cse10)))))) (or (and .cse2 .cse3 (= v_~x$r_buff0_thd4~0_56 0)) (and (= v_~x$r_buff0_thd4~0_57 v_~x$r_buff0_thd4~0_56) .cse0)) (let ((.cse13 (= |v_P3_#t~mem53_40| |v_P3Thread1of1ForFork1_#t~mem53_1|))) (or (and .cse2 (= |v_P3_#t~ite55_35| v_~x$w_buff0~0_121) (= |v_P3_#t~ite54_35| |v_P3Thread1of1ForFork1_#t~ite54_1|) .cse8 .cse13) (and (= |v_P3_#t~ite54_35| |v_P3_#t~ite55_35|) .cse7 (or (and (= (select .cse6 |v_~#x~0.offset_232|) |v_P3_#t~mem53_40|) (= |v_P3_#t~ite54_35| |v_P3_#t~mem53_40|) .cse1) (and .cse4 (= |v_P3_#t~ite54_35| v_~x$w_buff1~0_133) .cse5 .cse13)))))))) InVars {~x$w_buff0~0=v_~x$w_buff0~0_121, P3Thread1of1ForFork1_#t~ite54=|v_P3Thread1of1ForFork1_#t~ite54_1|, ~#x~0.offset=|v_~#x~0.offset_232|, ~x$w_buff1~0=v_~x$w_buff1~0_133, #memory_int=|v_#memory_int_377|, ~#x~0.base=|v_~#x~0.base_232|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_455, ~x$r_buff0_thd4~0=v_~x$r_buff0_thd4~0_57, P3Thread1of1ForFork1_#t~mem53=|v_P3Thread1of1ForFork1_#t~mem53_1|, ~x$r_buff1_thd4~0=v_~x$r_buff1_thd4~0_51, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_603} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_121, P3Thread1of1ForFork1_#t~ite54=|v_P3Thread1of1ForFork1_#t~ite54_2|, P3Thread1of1ForFork1_#t~ite55=|v_P3Thread1of1ForFork1_#t~ite55_1|, P3Thread1of1ForFork1_#t~ite56=|v_P3Thread1of1ForFork1_#t~ite56_1|, ~#x~0.offset=|v_~#x~0.offset_232|, P3Thread1of1ForFork1_#t~ite57=|v_P3Thread1of1ForFork1_#t~ite57_1|, P3Thread1of1ForFork1_#t~ite58=|v_P3Thread1of1ForFork1_#t~ite58_1|, ~x$w_buff1~0=v_~x$w_buff1~0_133, P3Thread1of1ForFork1_#t~ite59=|v_P3Thread1of1ForFork1_#t~ite59_1|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_454, ~x$r_buff0_thd4~0=v_~x$r_buff0_thd4~0_56, P3Thread1of1ForFork1_#t~mem53=|v_P3Thread1of1ForFork1_#t~mem53_2|, ~x$r_buff1_thd4~0=v_~x$r_buff1_thd4~0_50, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_602, #memory_int=|v_#memory_int_376|, ~#x~0.base=|v_~#x~0.base_232|} AuxVars[|v_P3_#t~ite54_35|, |v_P3_#t~ite55_35|, |v_P3_#t~mem53_40|] AssignedVars[P3Thread1of1ForFork1_#t~ite54, P3Thread1of1ForFork1_#t~ite55, P3Thread1of1ForFork1_#t~ite56, P3Thread1of1ForFork1_#t~ite57, P3Thread1of1ForFork1_#t~ite58, P3Thread1of1ForFork1_#t~ite59, #memory_int, ~x$w_buff1_used~0, ~x$r_buff0_thd4~0, P3Thread1of1ForFork1_#t~mem53, ~x$r_buff1_thd4~0, ~x$w_buff0_used~0] and [1486] L782-->L783: Formula: (= |v_#memory_int_6| (store |v_#memory_int_7| |v_~#x~0.base_4| (store (select |v_#memory_int_7| |v_~#x~0.base_4|) |v_~#x~0.offset_4| 2))) InVars {#memory_int=|v_#memory_int_7|, ~#x~0.base=|v_~#x~0.base_4|, ~#x~0.offset=|v_~#x~0.offset_4|} OutVars{#memory_int=|v_#memory_int_6|, ~#x~0.base=|v_~#x~0.base_4|, ~#x~0.offset=|v_~#x~0.offset_4|} AuxVars[] AssignedVars[#memory_int] under condition null [2021-01-27 02:29:12,144 WARN L146 IndependenceRelation]: Expensive independence query (2129 ms) for statements [1475] L2-1-->L878: Formula: (let ((.cse15 (= (mod v_~x$w_buff0_used~0_567 256) 0)) (.cse13 (= (mod v_~x$r_buff1_thd0~0_166 256) 0)) (.cse16 (= (mod v_~x$w_buff1_used~0_423 256) 0)) (.cse12 (= (mod v_~x$w_buff0_used~0_566 256) 0)) (.cse14 (= (mod v_~x$r_buff0_thd0~0_213 256) 0))) (let ((.cse9 (or .cse12 .cse14)) (.cse5 (or .cse13 .cse16)) (.cse3 (not .cse16)) (.cse4 (select |v_#memory_int_341| |v_~#x~0.base_212|)) (.cse1 (not .cse13)) (.cse8 (not .cse12)) (.cse6 (not .cse15)) (.cse7 (not .cse14)) (.cse0 (or .cse14 .cse15))) (and (let ((.cse2 (= |v_ULTIMATE.start_main_#t~mem64_25| |v_ULTIMATE.start_main_#t~mem64_29|))) (or (and .cse0 (or (and .cse1 .cse2 .cse3 (= |v_ULTIMATE.start_main_#t~ite65_26| v_~x$w_buff1~0_113)) (and (= |v_ULTIMATE.start_main_#t~mem64_29| (select .cse4 |v_~#x~0.offset_212|)) (= |v_ULTIMATE.start_main_#t~mem64_29| |v_ULTIMATE.start_main_#t~ite65_26|) .cse5)) (= |v_ULTIMATE.start_main_#t~ite65_26| |v_ULTIMATE.start_main_#t~ite66_28|)) (and .cse2 (= |v_ULTIMATE.start_main_#t~ite65_22| |v_ULTIMATE.start_main_#t~ite65_26|) .cse6 (= v_~x$w_buff0~0_103 |v_ULTIMATE.start_main_#t~ite66_28|) .cse7))) (or (and (= v_~x$r_buff0_thd0~0_212 0) .cse8 .cse7) (and .cse9 (= v_~x$r_buff0_thd0~0_213 v_~x$r_buff0_thd0~0_212))) (or (and .cse9 (= v_~x$w_buff1_used~0_423 v_~x$w_buff1_used~0_422) .cse5) (and (= v_~x$w_buff1_used~0_422 0) (or (and .cse8 .cse7) (and .cse1 .cse3)))) (= |v_#memory_int_340| (store |v_#memory_int_341| |v_~#x~0.base_212| (store .cse4 |v_~#x~0.offset_212| |v_ULTIMATE.start_main_#t~ite66_28|))) (let ((.cse11 (= (mod v_~x$r_buff0_thd0~0_212 256) 0)) (.cse10 (= (mod v_~x$w_buff1_used~0_422 256) 0))) (or (and (= v_~x$r_buff1_thd0~0_165 0) (or (and .cse1 (not .cse10)) (and (not .cse11) .cse8))) (and (or .cse12 .cse11) (or .cse13 .cse10) (= v_~x$r_buff1_thd0~0_166 v_~x$r_buff1_thd0~0_165)))) (or (and .cse6 (= v_~x$w_buff0_used~0_566 0) .cse7) (and .cse0 (= v_~x$w_buff0_used~0_567 v_~x$w_buff0_used~0_566)))))) InVars {~x$w_buff0~0=v_~x$w_buff0~0_103, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_213, ULTIMATE.start_main_#t~mem64=|v_ULTIMATE.start_main_#t~mem64_25|, ~#x~0.offset=|v_~#x~0.offset_212|, ~x$w_buff1~0=v_~x$w_buff1~0_113, #memory_int=|v_#memory_int_341|, ~#x~0.base=|v_~#x~0.base_212|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_423, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_166, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_567, ULTIMATE.start_main_#t~ite65=|v_ULTIMATE.start_main_#t~ite65_22|} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_103, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_212, ULTIMATE.start_main_#t~mem64=|v_ULTIMATE.start_main_#t~mem64_23|, ~#x~0.offset=|v_~#x~0.offset_212|, ~x$w_buff1~0=v_~x$w_buff1~0_113, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_422, ULTIMATE.start_main_#t~ite68=|v_ULTIMATE.start_main_#t~ite68_26|, ULTIMATE.start_main_#t~ite69=|v_ULTIMATE.start_main_#t~ite69_32|, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_165, ULTIMATE.start_main_#t~ite66=|v_ULTIMATE.start_main_#t~ite66_24|, ULTIMATE.start_main_#t~ite67=|v_ULTIMATE.start_main_#t~ite67_28|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_566, ULTIMATE.start_main_#t~ite65=|v_ULTIMATE.start_main_#t~ite65_20|, ULTIMATE.start_main_#t~ite70=|v_ULTIMATE.start_main_#t~ite70_28|, #memory_int=|v_#memory_int_340|, ~#x~0.base=|v_~#x~0.base_212|} AuxVars[|v_ULTIMATE.start_main_#t~mem64_29|, |v_ULTIMATE.start_main_#t~ite65_26|, |v_ULTIMATE.start_main_#t~ite66_28|] AssignedVars[~x$r_buff0_thd0~0, ULTIMATE.start_main_#t~mem64, ULTIMATE.start_main_#t~ite70, #memory_int, ~x$w_buff1_used~0, ULTIMATE.start_main_#t~ite68, ULTIMATE.start_main_#t~ite69, ~x$r_buff1_thd0~0, ULTIMATE.start_main_#t~ite66, ULTIMATE.start_main_#t~ite67, ~x$w_buff0_used~0, ULTIMATE.start_main_#t~ite65] and [1486] L782-->L783: Formula: (= |v_#memory_int_6| (store |v_#memory_int_7| |v_~#x~0.base_4| (store (select |v_#memory_int_7| |v_~#x~0.base_4|) |v_~#x~0.offset_4| 2))) InVars {#memory_int=|v_#memory_int_7|, ~#x~0.base=|v_~#x~0.base_4|, ~#x~0.offset=|v_~#x~0.offset_4|} OutVars{#memory_int=|v_#memory_int_6|, ~#x~0.base=|v_~#x~0.base_4|, ~#x~0.offset=|v_~#x~0.offset_4|} AuxVars[] AssignedVars[#memory_int] under condition null [2021-01-27 02:29:16,035 WARN L146 IndependenceRelation]: Expensive independence query (2855 ms) for statements [1487] L783-->L791: Formula: (let ((.cse14 (= (mod v_~x$w_buff0_used~0_575 256) 0)) (.cse15 (= (mod v_~x$r_buff0_thd2~0_63 256) 0)) (.cse3 (= (mod v_~x$r_buff1_thd2~0_43 256) 0)) (.cse16 (= 0 (mod v_~x$w_buff1_used~0_431 256))) (.cse1 (= (mod v_~x$w_buff0_used~0_574 256) 0))) (let ((.cse5 (not .cse1)) (.cse13 (not .cse16)) (.cse4 (not .cse3)) (.cse6 (or .cse15 .cse1)) (.cse12 (or .cse16 .cse3)) (.cse10 (or .cse14 .cse15)) (.cse7 (not .cse15)) (.cse8 (not .cse14)) (.cse11 (select |v_#memory_int_349| |v_~#x~0.base_218|))) (and (let ((.cse2 (= (mod v_~x$w_buff1_used~0_430 256) 0)) (.cse0 (= (mod v_~x$r_buff0_thd2~0_62 256) 0))) (or (and (= v_~x$r_buff1_thd2~0_43 v_~x$r_buff1_thd2~0_42) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and .cse4 (not .cse2)) (and (not .cse0) .cse5)) (= v_~x$r_buff1_thd2~0_42 0)))) (or (and (= v_~x$r_buff0_thd2~0_63 v_~x$r_buff0_thd2~0_62) .cse6) (and (= v_~x$r_buff0_thd2~0_62 0) .cse7 .cse5)) (let ((.cse9 (= |v_P1_#t~mem12_36| |v_P1Thread1of1ForFork3_#t~mem12_1|))) (or (and .cse7 .cse8 (= |v_P1Thread1of1ForFork3_#t~ite13_1| |v_P1_#t~ite13_31|) .cse9 (= |v_P1_#t~ite14_43| v_~x$w_buff0~0_105)) (and (= |v_P1_#t~ite13_31| |v_P1_#t~ite14_43|) .cse10 (or (and (= |v_P1_#t~ite13_31| |v_P1_#t~mem12_36|) (= |v_P1_#t~mem12_36| (select .cse11 |v_~#x~0.offset_218|)) .cse12) (and .cse13 .cse4 .cse9 (= |v_P1_#t~ite13_31| v_~x$w_buff1~0_119)))))) (or (and (= v_~x$w_buff1_used~0_430 0) (or (and .cse7 .cse5) (and .cse13 .cse4))) (and (= v_~x$w_buff1_used~0_431 v_~x$w_buff1_used~0_430) .cse6 .cse12)) (or (and .cse10 (= v_~x$w_buff0_used~0_575 v_~x$w_buff0_used~0_574)) (and (= v_~x$w_buff0_used~0_574 0) .cse7 .cse8)) (= (store |v_#memory_int_349| |v_~#x~0.base_218| (store .cse11 |v_~#x~0.offset_218| |v_P1_#t~ite14_43|)) |v_#memory_int_348|)))) InVars {~x$w_buff0~0=v_~x$w_buff0~0_105, ~#x~0.offset=|v_~#x~0.offset_218|, P1Thread1of1ForFork3_#t~mem12=|v_P1Thread1of1ForFork3_#t~mem12_1|, ~x$w_buff1~0=v_~x$w_buff1~0_119, #memory_int=|v_#memory_int_349|, ~#x~0.base=|v_~#x~0.base_218|, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_43, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_431, P1Thread1of1ForFork3_#t~ite13=|v_P1Thread1of1ForFork3_#t~ite13_1|, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_63, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_575} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_105, P1Thread1of1ForFork3_#t~ite17=|v_P1Thread1of1ForFork3_#t~ite17_1|, P1Thread1of1ForFork3_#t~ite16=|v_P1Thread1of1ForFork3_#t~ite16_1|, P1Thread1of1ForFork3_#t~ite18=|v_P1Thread1of1ForFork3_#t~ite18_1|, ~#x~0.offset=|v_~#x~0.offset_218|, P1Thread1of1ForFork3_#t~mem12=|v_P1Thread1of1ForFork3_#t~mem12_2|, ~x$w_buff1~0=v_~x$w_buff1~0_119, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_42, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_430, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_62, P1Thread1of1ForFork3_#t~ite13=|v_P1Thread1of1ForFork3_#t~ite13_2|, P1Thread1of1ForFork3_#t~ite15=|v_P1Thread1of1ForFork3_#t~ite15_1|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_574, P1Thread1of1ForFork3_#t~ite14=|v_P1Thread1of1ForFork3_#t~ite14_1|, #memory_int=|v_#memory_int_348|, ~#x~0.base=|v_~#x~0.base_218|} AuxVars[|v_P1_#t~ite13_31|, |v_P1_#t~ite14_43|, |v_P1_#t~mem12_36|] AssignedVars[P1Thread1of1ForFork3_#t~ite17, P1Thread1of1ForFork3_#t~ite16, P1Thread1of1ForFork3_#t~ite18, P1Thread1of1ForFork3_#t~mem12, #memory_int, ~x$r_buff1_thd2~0, ~x$w_buff1_used~0, ~x$r_buff0_thd2~0, P1Thread1of1ForFork3_#t~ite13, P1Thread1of1ForFork3_#t~ite15, ~x$w_buff0_used~0, P1Thread1of1ForFork3_#t~ite14] and [1452] L864-1-->L865: Formula: (= |v_#memory_int_29| (store |v_#memory_int_30| |v_ULTIMATE.start_main_~#t2167~0.base_3| (store (select |v_#memory_int_30| |v_ULTIMATE.start_main_~#t2167~0.base_3|) |v_ULTIMATE.start_main_~#t2167~0.offset_3| 2))) InVars {ULTIMATE.start_main_~#t2167~0.offset=|v_ULTIMATE.start_main_~#t2167~0.offset_3|, #memory_int=|v_#memory_int_30|, ULTIMATE.start_main_~#t2167~0.base=|v_ULTIMATE.start_main_~#t2167~0.base_3|} OutVars{ULTIMATE.start_main_~#t2167~0.offset=|v_ULTIMATE.start_main_~#t2167~0.offset_3|, #memory_int=|v_#memory_int_29|, ULTIMATE.start_main_~#t2167~0.base=|v_ULTIMATE.start_main_~#t2167~0.base_3|} AuxVars[] AssignedVars[#memory_int] under condition null [2021-01-27 02:29:28,192 WARN L146 IndependenceRelation]: Expensive independence query (3038 ms) for statements [1452] L864-1-->L865: Formula: (= |v_#memory_int_29| (store |v_#memory_int_30| |v_ULTIMATE.start_main_~#t2167~0.base_3| (store (select |v_#memory_int_30| |v_ULTIMATE.start_main_~#t2167~0.base_3|) |v_ULTIMATE.start_main_~#t2167~0.offset_3| 2))) InVars {ULTIMATE.start_main_~#t2167~0.offset=|v_ULTIMATE.start_main_~#t2167~0.offset_3|, #memory_int=|v_#memory_int_30|, ULTIMATE.start_main_~#t2167~0.base=|v_ULTIMATE.start_main_~#t2167~0.base_3|} OutVars{ULTIMATE.start_main_~#t2167~0.offset=|v_ULTIMATE.start_main_~#t2167~0.offset_3|, #memory_int=|v_#memory_int_29|, ULTIMATE.start_main_~#t2167~0.base=|v_ULTIMATE.start_main_~#t2167~0.base_3|} AuxVars[] AssignedVars[#memory_int] and [1481] L766-->L774: Formula: (let ((.cse14 (= (mod v_~x$w_buff0_used~0_597 256) 0)) (.cse15 (= (mod v_~x$r_buff0_thd1~0_61 256) 0)) (.cse2 (= (mod v_~x$w_buff0_used~0_596 256) 0)) (.cse16 (= 0 (mod v_~x$w_buff1_used~0_449 256))) (.cse4 (= (mod v_~x$r_buff1_thd1~0_41 256) 0))) (let ((.cse9 (or .cse16 .cse4)) (.cse0 (select |v_#memory_int_369| |v_~#x~0.base_228|)) (.cse5 (not .cse4)) (.cse7 (not .cse16)) (.cse6 (not .cse2)) (.cse10 (or .cse15 .cse2)) (.cse13 (or .cse14 .cse15)) (.cse8 (not .cse15)) (.cse12 (not .cse14))) (and (= (store |v_#memory_int_369| |v_~#x~0.base_228| (store .cse0 |v_~#x~0.offset_228| |v_P0_#t~ite7_39|)) |v_#memory_int_368|) (let ((.cse3 (= (mod v_~x$w_buff1_used~0_448 256) 0)) (.cse1 (= (mod v_~x$r_buff0_thd1~0_60 256) 0))) (or (and (= v_~x$r_buff1_thd1~0_41 v_~x$r_buff1_thd1~0_40) (or .cse1 .cse2) (or .cse3 .cse4)) (and (or (and (not .cse3) .cse5) (and .cse6 (not .cse1))) (= v_~x$r_buff1_thd1~0_40 0)))) (or (and (or (and .cse5 .cse7) (and .cse8 .cse6)) (= v_~x$w_buff1_used~0_448 0)) (and (= v_~x$w_buff1_used~0_449 v_~x$w_buff1_used~0_448) .cse9 .cse10)) (let ((.cse11 (= |v_P0_#t~mem5_44| |v_P0Thread1of1ForFork2_#t~mem5_1|))) (or (and (= |v_P0Thread1of1ForFork2_#t~ite6_1| |v_P0_#t~ite6_43|) .cse8 .cse11 (= |v_P0_#t~ite7_39| v_~x$w_buff0~0_117) .cse12) (and (= |v_P0_#t~ite7_39| |v_P0_#t~ite6_43|) (or (and .cse9 (= |v_P0_#t~mem5_44| (select .cse0 |v_~#x~0.offset_228|)) (= |v_P0_#t~ite6_43| |v_P0_#t~mem5_44|)) (and (= |v_P0_#t~ite6_43| v_~x$w_buff1~0_129) .cse11 .cse5 .cse7)) .cse13))) (or (and (= v_~x$r_buff0_thd1~0_60 0) .cse8 .cse6) (and (= v_~x$r_buff0_thd1~0_61 v_~x$r_buff0_thd1~0_60) .cse10)) (or (and (= v_~x$w_buff0_used~0_597 v_~x$w_buff0_used~0_596) .cse13) (and .cse8 .cse12 (= v_~x$w_buff0_used~0_596 0)))))) InVars {~x$w_buff0~0=v_~x$w_buff0~0_117, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_61, ~#x~0.offset=|v_~#x~0.offset_228|, P0Thread1of1ForFork2_#t~ite6=|v_P0Thread1of1ForFork2_#t~ite6_1|, ~x$w_buff1~0=v_~x$w_buff1~0_129, #memory_int=|v_#memory_int_369|, ~#x~0.base=|v_~#x~0.base_228|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_449, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_41, P0Thread1of1ForFork2_#t~mem5=|v_P0Thread1of1ForFork2_#t~mem5_1|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_597} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_117, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_60, ~#x~0.offset=|v_~#x~0.offset_228|, ~x$w_buff1~0=v_~x$w_buff1~0_129, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_448, P0Thread1of1ForFork2_#t~ite9=|v_P0Thread1of1ForFork2_#t~ite9_1|, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_40, P0Thread1of1ForFork2_#t~mem5=|v_P0Thread1of1ForFork2_#t~mem5_2|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_596, P0Thread1of1ForFork2_#t~ite7=|v_P0Thread1of1ForFork2_#t~ite7_1|, P0Thread1of1ForFork2_#t~ite8=|v_P0Thread1of1ForFork2_#t~ite8_1|, P0Thread1of1ForFork2_#t~ite6=|v_P0Thread1of1ForFork2_#t~ite6_2|, #memory_int=|v_#memory_int_368|, ~#x~0.base=|v_~#x~0.base_228|, P0Thread1of1ForFork2_#t~ite11=|v_P0Thread1of1ForFork2_#t~ite11_1|, P0Thread1of1ForFork2_#t~ite10=|v_P0Thread1of1ForFork2_#t~ite10_1|} AuxVars[|v_P0_#t~ite7_39|, |v_P0_#t~mem5_44|, |v_P0_#t~ite6_43|] AssignedVars[~x$r_buff0_thd1~0, P0Thread1of1ForFork2_#t~ite7, P0Thread1of1ForFork2_#t~ite8, P0Thread1of1ForFork2_#t~ite6, #memory_int, ~x$w_buff1_used~0, P0Thread1of1ForFork2_#t~ite9, ~x$r_buff1_thd1~0, P0Thread1of1ForFork2_#t~ite11, P0Thread1of1ForFork2_#t~mem5, ~x$w_buff0_used~0, P0Thread1of1ForFork2_#t~ite10] under condition null [2021-01-27 02:29:30,396 WARN L146 IndependenceRelation]: Expensive independence query (2202 ms) for statements [1486] L782-->L783: Formula: (= |v_#memory_int_6| (store |v_#memory_int_7| |v_~#x~0.base_4| (store (select |v_#memory_int_7| |v_~#x~0.base_4|) |v_~#x~0.offset_4| 2))) InVars {#memory_int=|v_#memory_int_7|, ~#x~0.base=|v_~#x~0.base_4|, ~#x~0.offset=|v_~#x~0.offset_4|} OutVars{#memory_int=|v_#memory_int_6|, ~#x~0.base=|v_~#x~0.base_4|, ~#x~0.offset=|v_~#x~0.offset_4|} AuxVars[] AssignedVars[#memory_int] and [1481] L766-->L774: Formula: (let ((.cse14 (= (mod v_~x$w_buff0_used~0_597 256) 0)) (.cse15 (= (mod v_~x$r_buff0_thd1~0_61 256) 0)) (.cse2 (= (mod v_~x$w_buff0_used~0_596 256) 0)) (.cse16 (= 0 (mod v_~x$w_buff1_used~0_449 256))) (.cse4 (= (mod v_~x$r_buff1_thd1~0_41 256) 0))) (let ((.cse9 (or .cse16 .cse4)) (.cse0 (select |v_#memory_int_369| |v_~#x~0.base_228|)) (.cse5 (not .cse4)) (.cse7 (not .cse16)) (.cse6 (not .cse2)) (.cse10 (or .cse15 .cse2)) (.cse13 (or .cse14 .cse15)) (.cse8 (not .cse15)) (.cse12 (not .cse14))) (and (= (store |v_#memory_int_369| |v_~#x~0.base_228| (store .cse0 |v_~#x~0.offset_228| |v_P0_#t~ite7_39|)) |v_#memory_int_368|) (let ((.cse3 (= (mod v_~x$w_buff1_used~0_448 256) 0)) (.cse1 (= (mod v_~x$r_buff0_thd1~0_60 256) 0))) (or (and (= v_~x$r_buff1_thd1~0_41 v_~x$r_buff1_thd1~0_40) (or .cse1 .cse2) (or .cse3 .cse4)) (and (or (and (not .cse3) .cse5) (and .cse6 (not .cse1))) (= v_~x$r_buff1_thd1~0_40 0)))) (or (and (or (and .cse5 .cse7) (and .cse8 .cse6)) (= v_~x$w_buff1_used~0_448 0)) (and (= v_~x$w_buff1_used~0_449 v_~x$w_buff1_used~0_448) .cse9 .cse10)) (let ((.cse11 (= |v_P0_#t~mem5_44| |v_P0Thread1of1ForFork2_#t~mem5_1|))) (or (and (= |v_P0Thread1of1ForFork2_#t~ite6_1| |v_P0_#t~ite6_43|) .cse8 .cse11 (= |v_P0_#t~ite7_39| v_~x$w_buff0~0_117) .cse12) (and (= |v_P0_#t~ite7_39| |v_P0_#t~ite6_43|) (or (and .cse9 (= |v_P0_#t~mem5_44| (select .cse0 |v_~#x~0.offset_228|)) (= |v_P0_#t~ite6_43| |v_P0_#t~mem5_44|)) (and (= |v_P0_#t~ite6_43| v_~x$w_buff1~0_129) .cse11 .cse5 .cse7)) .cse13))) (or (and (= v_~x$r_buff0_thd1~0_60 0) .cse8 .cse6) (and (= v_~x$r_buff0_thd1~0_61 v_~x$r_buff0_thd1~0_60) .cse10)) (or (and (= v_~x$w_buff0_used~0_597 v_~x$w_buff0_used~0_596) .cse13) (and .cse8 .cse12 (= v_~x$w_buff0_used~0_596 0)))))) InVars {~x$w_buff0~0=v_~x$w_buff0~0_117, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_61, ~#x~0.offset=|v_~#x~0.offset_228|, P0Thread1of1ForFork2_#t~ite6=|v_P0Thread1of1ForFork2_#t~ite6_1|, ~x$w_buff1~0=v_~x$w_buff1~0_129, #memory_int=|v_#memory_int_369|, ~#x~0.base=|v_~#x~0.base_228|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_449, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_41, P0Thread1of1ForFork2_#t~mem5=|v_P0Thread1of1ForFork2_#t~mem5_1|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_597} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_117, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_60, ~#x~0.offset=|v_~#x~0.offset_228|, ~x$w_buff1~0=v_~x$w_buff1~0_129, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_448, P0Thread1of1ForFork2_#t~ite9=|v_P0Thread1of1ForFork2_#t~ite9_1|, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_40, P0Thread1of1ForFork2_#t~mem5=|v_P0Thread1of1ForFork2_#t~mem5_2|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_596, P0Thread1of1ForFork2_#t~ite7=|v_P0Thread1of1ForFork2_#t~ite7_1|, P0Thread1of1ForFork2_#t~ite8=|v_P0Thread1of1ForFork2_#t~ite8_1|, P0Thread1of1ForFork2_#t~ite6=|v_P0Thread1of1ForFork2_#t~ite6_2|, #memory_int=|v_#memory_int_368|, ~#x~0.base=|v_~#x~0.base_228|, P0Thread1of1ForFork2_#t~ite11=|v_P0Thread1of1ForFork2_#t~ite11_1|, P0Thread1of1ForFork2_#t~ite10=|v_P0Thread1of1ForFork2_#t~ite10_1|} AuxVars[|v_P0_#t~ite7_39|, |v_P0_#t~mem5_44|, |v_P0_#t~ite6_43|] AssignedVars[~x$r_buff0_thd1~0, P0Thread1of1ForFork2_#t~ite7, P0Thread1of1ForFork2_#t~ite8, P0Thread1of1ForFork2_#t~ite6, #memory_int, ~x$w_buff1_used~0, P0Thread1of1ForFork2_#t~ite9, ~x$r_buff1_thd1~0, P0Thread1of1ForFork2_#t~ite11, P0Thread1of1ForFork2_#t~mem5, ~x$w_buff0_used~0, P0Thread1of1ForFork2_#t~ite10] under condition null [2021-01-27 02:29:34,461 WARN L146 IndependenceRelation]: Expensive independence query (4063 ms) for statements [1487] L783-->L791: Formula: (let ((.cse14 (= (mod v_~x$w_buff0_used~0_575 256) 0)) (.cse15 (= (mod v_~x$r_buff0_thd2~0_63 256) 0)) (.cse3 (= (mod v_~x$r_buff1_thd2~0_43 256) 0)) (.cse16 (= 0 (mod v_~x$w_buff1_used~0_431 256))) (.cse1 (= (mod v_~x$w_buff0_used~0_574 256) 0))) (let ((.cse5 (not .cse1)) (.cse13 (not .cse16)) (.cse4 (not .cse3)) (.cse6 (or .cse15 .cse1)) (.cse12 (or .cse16 .cse3)) (.cse10 (or .cse14 .cse15)) (.cse7 (not .cse15)) (.cse8 (not .cse14)) (.cse11 (select |v_#memory_int_349| |v_~#x~0.base_218|))) (and (let ((.cse2 (= (mod v_~x$w_buff1_used~0_430 256) 0)) (.cse0 (= (mod v_~x$r_buff0_thd2~0_62 256) 0))) (or (and (= v_~x$r_buff1_thd2~0_43 v_~x$r_buff1_thd2~0_42) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and .cse4 (not .cse2)) (and (not .cse0) .cse5)) (= v_~x$r_buff1_thd2~0_42 0)))) (or (and (= v_~x$r_buff0_thd2~0_63 v_~x$r_buff0_thd2~0_62) .cse6) (and (= v_~x$r_buff0_thd2~0_62 0) .cse7 .cse5)) (let ((.cse9 (= |v_P1_#t~mem12_36| |v_P1Thread1of1ForFork3_#t~mem12_1|))) (or (and .cse7 .cse8 (= |v_P1Thread1of1ForFork3_#t~ite13_1| |v_P1_#t~ite13_31|) .cse9 (= |v_P1_#t~ite14_43| v_~x$w_buff0~0_105)) (and (= |v_P1_#t~ite13_31| |v_P1_#t~ite14_43|) .cse10 (or (and (= |v_P1_#t~ite13_31| |v_P1_#t~mem12_36|) (= |v_P1_#t~mem12_36| (select .cse11 |v_~#x~0.offset_218|)) .cse12) (and .cse13 .cse4 .cse9 (= |v_P1_#t~ite13_31| v_~x$w_buff1~0_119)))))) (or (and (= v_~x$w_buff1_used~0_430 0) (or (and .cse7 .cse5) (and .cse13 .cse4))) (and (= v_~x$w_buff1_used~0_431 v_~x$w_buff1_used~0_430) .cse6 .cse12)) (or (and .cse10 (= v_~x$w_buff0_used~0_575 v_~x$w_buff0_used~0_574)) (and (= v_~x$w_buff0_used~0_574 0) .cse7 .cse8)) (= (store |v_#memory_int_349| |v_~#x~0.base_218| (store .cse11 |v_~#x~0.offset_218| |v_P1_#t~ite14_43|)) |v_#memory_int_348|)))) InVars {~x$w_buff0~0=v_~x$w_buff0~0_105, ~#x~0.offset=|v_~#x~0.offset_218|, P1Thread1of1ForFork3_#t~mem12=|v_P1Thread1of1ForFork3_#t~mem12_1|, ~x$w_buff1~0=v_~x$w_buff1~0_119, #memory_int=|v_#memory_int_349|, ~#x~0.base=|v_~#x~0.base_218|, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_43, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_431, P1Thread1of1ForFork3_#t~ite13=|v_P1Thread1of1ForFork3_#t~ite13_1|, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_63, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_575} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_105, P1Thread1of1ForFork3_#t~ite17=|v_P1Thread1of1ForFork3_#t~ite17_1|, P1Thread1of1ForFork3_#t~ite16=|v_P1Thread1of1ForFork3_#t~ite16_1|, P1Thread1of1ForFork3_#t~ite18=|v_P1Thread1of1ForFork3_#t~ite18_1|, ~#x~0.offset=|v_~#x~0.offset_218|, P1Thread1of1ForFork3_#t~mem12=|v_P1Thread1of1ForFork3_#t~mem12_2|, ~x$w_buff1~0=v_~x$w_buff1~0_119, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_42, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_430, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_62, P1Thread1of1ForFork3_#t~ite13=|v_P1Thread1of1ForFork3_#t~ite13_2|, P1Thread1of1ForFork3_#t~ite15=|v_P1Thread1of1ForFork3_#t~ite15_1|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_574, P1Thread1of1ForFork3_#t~ite14=|v_P1Thread1of1ForFork3_#t~ite14_1|, #memory_int=|v_#memory_int_348|, ~#x~0.base=|v_~#x~0.base_218|} AuxVars[|v_P1_#t~ite13_31|, |v_P1_#t~ite14_43|, |v_P1_#t~mem12_36|] AssignedVars[P1Thread1of1ForFork3_#t~ite17, P1Thread1of1ForFork3_#t~ite16, P1Thread1of1ForFork3_#t~ite18, P1Thread1of1ForFork3_#t~mem12, #memory_int, ~x$r_buff1_thd2~0, ~x$w_buff1_used~0, ~x$r_buff0_thd2~0, P1Thread1of1ForFork3_#t~ite13, P1Thread1of1ForFork3_#t~ite15, ~x$w_buff0_used~0, P1Thread1of1ForFork3_#t~ite14] and [1481] L766-->L774: Formula: (let ((.cse14 (= (mod v_~x$w_buff0_used~0_597 256) 0)) (.cse15 (= (mod v_~x$r_buff0_thd1~0_61 256) 0)) (.cse2 (= (mod v_~x$w_buff0_used~0_596 256) 0)) (.cse16 (= 0 (mod v_~x$w_buff1_used~0_449 256))) (.cse4 (= (mod v_~x$r_buff1_thd1~0_41 256) 0))) (let ((.cse9 (or .cse16 .cse4)) (.cse0 (select |v_#memory_int_369| |v_~#x~0.base_228|)) (.cse5 (not .cse4)) (.cse7 (not .cse16)) (.cse6 (not .cse2)) (.cse10 (or .cse15 .cse2)) (.cse13 (or .cse14 .cse15)) (.cse8 (not .cse15)) (.cse12 (not .cse14))) (and (= (store |v_#memory_int_369| |v_~#x~0.base_228| (store .cse0 |v_~#x~0.offset_228| |v_P0_#t~ite7_39|)) |v_#memory_int_368|) (let ((.cse3 (= (mod v_~x$w_buff1_used~0_448 256) 0)) (.cse1 (= (mod v_~x$r_buff0_thd1~0_60 256) 0))) (or (and (= v_~x$r_buff1_thd1~0_41 v_~x$r_buff1_thd1~0_40) (or .cse1 .cse2) (or .cse3 .cse4)) (and (or (and (not .cse3) .cse5) (and .cse6 (not .cse1))) (= v_~x$r_buff1_thd1~0_40 0)))) (or (and (or (and .cse5 .cse7) (and .cse8 .cse6)) (= v_~x$w_buff1_used~0_448 0)) (and (= v_~x$w_buff1_used~0_449 v_~x$w_buff1_used~0_448) .cse9 .cse10)) (let ((.cse11 (= |v_P0_#t~mem5_44| |v_P0Thread1of1ForFork2_#t~mem5_1|))) (or (and (= |v_P0Thread1of1ForFork2_#t~ite6_1| |v_P0_#t~ite6_43|) .cse8 .cse11 (= |v_P0_#t~ite7_39| v_~x$w_buff0~0_117) .cse12) (and (= |v_P0_#t~ite7_39| |v_P0_#t~ite6_43|) (or (and .cse9 (= |v_P0_#t~mem5_44| (select .cse0 |v_~#x~0.offset_228|)) (= |v_P0_#t~ite6_43| |v_P0_#t~mem5_44|)) (and (= |v_P0_#t~ite6_43| v_~x$w_buff1~0_129) .cse11 .cse5 .cse7)) .cse13))) (or (and (= v_~x$r_buff0_thd1~0_60 0) .cse8 .cse6) (and (= v_~x$r_buff0_thd1~0_61 v_~x$r_buff0_thd1~0_60) .cse10)) (or (and (= v_~x$w_buff0_used~0_597 v_~x$w_buff0_used~0_596) .cse13) (and .cse8 .cse12 (= v_~x$w_buff0_used~0_596 0)))))) InVars {~x$w_buff0~0=v_~x$w_buff0~0_117, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_61, ~#x~0.offset=|v_~#x~0.offset_228|, P0Thread1of1ForFork2_#t~ite6=|v_P0Thread1of1ForFork2_#t~ite6_1|, ~x$w_buff1~0=v_~x$w_buff1~0_129, #memory_int=|v_#memory_int_369|, ~#x~0.base=|v_~#x~0.base_228|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_449, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_41, P0Thread1of1ForFork2_#t~mem5=|v_P0Thread1of1ForFork2_#t~mem5_1|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_597} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_117, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_60, ~#x~0.offset=|v_~#x~0.offset_228|, ~x$w_buff1~0=v_~x$w_buff1~0_129, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_448, P0Thread1of1ForFork2_#t~ite9=|v_P0Thread1of1ForFork2_#t~ite9_1|, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_40, P0Thread1of1ForFork2_#t~mem5=|v_P0Thread1of1ForFork2_#t~mem5_2|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_596, P0Thread1of1ForFork2_#t~ite7=|v_P0Thread1of1ForFork2_#t~ite7_1|, P0Thread1of1ForFork2_#t~ite8=|v_P0Thread1of1ForFork2_#t~ite8_1|, P0Thread1of1ForFork2_#t~ite6=|v_P0Thread1of1ForFork2_#t~ite6_2|, #memory_int=|v_#memory_int_368|, ~#x~0.base=|v_~#x~0.base_228|, P0Thread1of1ForFork2_#t~ite11=|v_P0Thread1of1ForFork2_#t~ite11_1|, P0Thread1of1ForFork2_#t~ite10=|v_P0Thread1of1ForFork2_#t~ite10_1|} AuxVars[|v_P0_#t~ite7_39|, |v_P0_#t~mem5_44|, |v_P0_#t~ite6_43|] AssignedVars[~x$r_buff0_thd1~0, P0Thread1of1ForFork2_#t~ite7, P0Thread1of1ForFork2_#t~ite8, P0Thread1of1ForFork2_#t~ite6, #memory_int, ~x$w_buff1_used~0, P0Thread1of1ForFork2_#t~ite9, ~x$r_buff1_thd1~0, P0Thread1of1ForFork2_#t~ite11, P0Thread1of1ForFork2_#t~mem5, ~x$w_buff0_used~0, P0Thread1of1ForFork2_#t~ite10] under condition null [2021-01-27 02:29:37,609 WARN L146 IndependenceRelation]: Expensive independence query (3146 ms) for statements [1354] L866-1-->L867: Formula: (= |v_#memory_int_31| (store |v_#memory_int_32| |v_ULTIMATE.start_main_~#t2168~0.base_3| (store (select |v_#memory_int_32| |v_ULTIMATE.start_main_~#t2168~0.base_3|) |v_ULTIMATE.start_main_~#t2168~0.offset_3| 3))) InVars {#memory_int=|v_#memory_int_32|, ULTIMATE.start_main_~#t2168~0.base=|v_ULTIMATE.start_main_~#t2168~0.base_3|, ULTIMATE.start_main_~#t2168~0.offset=|v_ULTIMATE.start_main_~#t2168~0.offset_3|} OutVars{#memory_int=|v_#memory_int_31|, ULTIMATE.start_main_~#t2168~0.base=|v_ULTIMATE.start_main_~#t2168~0.base_3|, ULTIMATE.start_main_~#t2168~0.offset=|v_ULTIMATE.start_main_~#t2168~0.offset_3|} AuxVars[] AssignedVars[#memory_int] and [1481] L766-->L774: Formula: (let ((.cse14 (= (mod v_~x$w_buff0_used~0_597 256) 0)) (.cse15 (= (mod v_~x$r_buff0_thd1~0_61 256) 0)) (.cse2 (= (mod v_~x$w_buff0_used~0_596 256) 0)) (.cse16 (= 0 (mod v_~x$w_buff1_used~0_449 256))) (.cse4 (= (mod v_~x$r_buff1_thd1~0_41 256) 0))) (let ((.cse9 (or .cse16 .cse4)) (.cse0 (select |v_#memory_int_369| |v_~#x~0.base_228|)) (.cse5 (not .cse4)) (.cse7 (not .cse16)) (.cse6 (not .cse2)) (.cse10 (or .cse15 .cse2)) (.cse13 (or .cse14 .cse15)) (.cse8 (not .cse15)) (.cse12 (not .cse14))) (and (= (store |v_#memory_int_369| |v_~#x~0.base_228| (store .cse0 |v_~#x~0.offset_228| |v_P0_#t~ite7_39|)) |v_#memory_int_368|) (let ((.cse3 (= (mod v_~x$w_buff1_used~0_448 256) 0)) (.cse1 (= (mod v_~x$r_buff0_thd1~0_60 256) 0))) (or (and (= v_~x$r_buff1_thd1~0_41 v_~x$r_buff1_thd1~0_40) (or .cse1 .cse2) (or .cse3 .cse4)) (and (or (and (not .cse3) .cse5) (and .cse6 (not .cse1))) (= v_~x$r_buff1_thd1~0_40 0)))) (or (and (or (and .cse5 .cse7) (and .cse8 .cse6)) (= v_~x$w_buff1_used~0_448 0)) (and (= v_~x$w_buff1_used~0_449 v_~x$w_buff1_used~0_448) .cse9 .cse10)) (let ((.cse11 (= |v_P0_#t~mem5_44| |v_P0Thread1of1ForFork2_#t~mem5_1|))) (or (and (= |v_P0Thread1of1ForFork2_#t~ite6_1| |v_P0_#t~ite6_43|) .cse8 .cse11 (= |v_P0_#t~ite7_39| v_~x$w_buff0~0_117) .cse12) (and (= |v_P0_#t~ite7_39| |v_P0_#t~ite6_43|) (or (and .cse9 (= |v_P0_#t~mem5_44| (select .cse0 |v_~#x~0.offset_228|)) (= |v_P0_#t~ite6_43| |v_P0_#t~mem5_44|)) (and (= |v_P0_#t~ite6_43| v_~x$w_buff1~0_129) .cse11 .cse5 .cse7)) .cse13))) (or (and (= v_~x$r_buff0_thd1~0_60 0) .cse8 .cse6) (and (= v_~x$r_buff0_thd1~0_61 v_~x$r_buff0_thd1~0_60) .cse10)) (or (and (= v_~x$w_buff0_used~0_597 v_~x$w_buff0_used~0_596) .cse13) (and .cse8 .cse12 (= v_~x$w_buff0_used~0_596 0)))))) InVars {~x$w_buff0~0=v_~x$w_buff0~0_117, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_61, ~#x~0.offset=|v_~#x~0.offset_228|, P0Thread1of1ForFork2_#t~ite6=|v_P0Thread1of1ForFork2_#t~ite6_1|, ~x$w_buff1~0=v_~x$w_buff1~0_129, #memory_int=|v_#memory_int_369|, ~#x~0.base=|v_~#x~0.base_228|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_449, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_41, P0Thread1of1ForFork2_#t~mem5=|v_P0Thread1of1ForFork2_#t~mem5_1|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_597} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_117, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_60, ~#x~0.offset=|v_~#x~0.offset_228|, ~x$w_buff1~0=v_~x$w_buff1~0_129, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_448, P0Thread1of1ForFork2_#t~ite9=|v_P0Thread1of1ForFork2_#t~ite9_1|, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_40, P0Thread1of1ForFork2_#t~mem5=|v_P0Thread1of1ForFork2_#t~mem5_2|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_596, P0Thread1of1ForFork2_#t~ite7=|v_P0Thread1of1ForFork2_#t~ite7_1|, P0Thread1of1ForFork2_#t~ite8=|v_P0Thread1of1ForFork2_#t~ite8_1|, P0Thread1of1ForFork2_#t~ite6=|v_P0Thread1of1ForFork2_#t~ite6_2|, #memory_int=|v_#memory_int_368|, ~#x~0.base=|v_~#x~0.base_228|, P0Thread1of1ForFork2_#t~ite11=|v_P0Thread1of1ForFork2_#t~ite11_1|, P0Thread1of1ForFork2_#t~ite10=|v_P0Thread1of1ForFork2_#t~ite10_1|} AuxVars[|v_P0_#t~ite7_39|, |v_P0_#t~mem5_44|, |v_P0_#t~ite6_43|] AssignedVars[~x$r_buff0_thd1~0, P0Thread1of1ForFork2_#t~ite7, P0Thread1of1ForFork2_#t~ite8, P0Thread1of1ForFork2_#t~ite6, #memory_int, ~x$w_buff1_used~0, P0Thread1of1ForFork2_#t~ite9, ~x$r_buff1_thd1~0, P0Thread1of1ForFork2_#t~ite11, P0Thread1of1ForFork2_#t~mem5, ~x$w_buff0_used~0, P0Thread1of1ForFork2_#t~ite10] under condition null [2021-01-27 02:29:41,736 WARN L146 IndependenceRelation]: Expensive independence query (4027 ms) for statements [1494] L819-->L826: Formula: (let ((.cse14 (= (mod v_~x$w_buff0_used~0_541 256) 0)) (.cse15 (= (mod v_~x$r_buff0_thd3~0_209 256) 0)) (.cse13 (= (mod v_~x$w_buff0_used~0_540 256) 0)) (.cse16 (= (mod v_~x$w_buff1_used~0_395 256) 0)) (.cse12 (= (mod v_~x$r_buff1_thd3~0_152 256) 0))) (let ((.cse3 (select |v_#memory_int_329| |v_~#x~0.base_204|)) (.cse7 (not .cse12)) (.cse8 (not .cse16)) (.cse1 (not .cse13)) (.cse0 (or .cse13 .cse15)) (.cse9 (or .cse16 .cse12)) (.cse5 (not .cse14)) (.cse2 (not .cse15)) (.cse6 (or .cse14 .cse15))) (and (or (and .cse0 (= v_~x$r_buff0_thd3~0_209 v_~x$r_buff0_thd3~0_208)) (and .cse1 (= v_~x$r_buff0_thd3~0_208 0) .cse2)) (= (store |v_#memory_int_329| |v_~#x~0.base_204| (store .cse3 |v_~#x~0.offset_204| |v_P2_#t~ite48_39|)) |v_#memory_int_328|) (let ((.cse4 (= |v_P2_#t~mem46_36| |v_P2Thread1of1ForFork0_#t~mem46_1|))) (or (and .cse4 .cse5 (= |v_P2Thread1of1ForFork0_#t~ite47_1| |v_P2_#t~ite47_35|) .cse2 (= |v_P2_#t~ite48_39| v_~x$w_buff0~0_101)) (and (= |v_P2_#t~ite48_39| |v_P2_#t~ite47_35|) .cse6 (or (and (= |v_P2_#t~ite47_35| v_~x$w_buff1~0_103) .cse4 .cse7 .cse8) (and (= |v_P2_#t~ite47_35| |v_P2_#t~mem46_36|) (= (select .cse3 |v_~#x~0.offset_204|) |v_P2_#t~mem46_36|) .cse9))))) (let ((.cse11 (= (mod v_~x$w_buff1_used~0_394 256) 0)) (.cse10 (= (mod v_~x$r_buff0_thd3~0_208 256) 0))) (or (and (= v_~x$r_buff1_thd3~0_151 0) (or (and (not .cse10) .cse1) (and (not .cse11) .cse7))) (and (= v_~x$r_buff1_thd3~0_152 v_~x$r_buff1_thd3~0_151) (or .cse11 .cse12) (or .cse10 .cse13)))) (or (and (or (and .cse7 .cse8) (and .cse1 .cse2)) (= v_~x$w_buff1_used~0_394 0)) (and .cse0 (= v_~x$w_buff1_used~0_395 v_~x$w_buff1_used~0_394) .cse9)) (or (and .cse5 (= v_~x$w_buff0_used~0_540 0) .cse2) (and (= v_~x$w_buff0_used~0_541 v_~x$w_buff0_used~0_540) .cse6))))) InVars {~x$w_buff0~0=v_~x$w_buff0~0_101, P2Thread1of1ForFork0_#t~ite47=|v_P2Thread1of1ForFork0_#t~ite47_1|, ~#x~0.offset=|v_~#x~0.offset_204|, ~x$w_buff1~0=v_~x$w_buff1~0_103, #memory_int=|v_#memory_int_329|, ~#x~0.base=|v_~#x~0.base_204|, P2Thread1of1ForFork0_#t~mem46=|v_P2Thread1of1ForFork0_#t~mem46_1|, ~x$r_buff1_thd3~0=v_~x$r_buff1_thd3~0_152, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_395, ~x$r_buff0_thd3~0=v_~x$r_buff0_thd3~0_209, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_541} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_101, ~#x~0.offset=|v_~#x~0.offset_204|, ~x$w_buff1~0=v_~x$w_buff1~0_103, P2Thread1of1ForFork0_#t~ite52=|v_P2Thread1of1ForFork0_#t~ite52_1|, ~x$r_buff1_thd3~0=v_~x$r_buff1_thd3~0_151, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_394, P2Thread1of1ForFork0_#t~ite50=|v_P2Thread1of1ForFork0_#t~ite50_1|, ~x$r_buff0_thd3~0=v_~x$r_buff0_thd3~0_208, P2Thread1of1ForFork0_#t~ite51=|v_P2Thread1of1ForFork0_#t~ite51_1|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_540, P2Thread1of1ForFork0_#t~ite48=|v_P2Thread1of1ForFork0_#t~ite48_1|, P2Thread1of1ForFork0_#t~ite47=|v_P2Thread1of1ForFork0_#t~ite47_2|, P2Thread1of1ForFork0_#t~ite49=|v_P2Thread1of1ForFork0_#t~ite49_1|, P2Thread1of1ForFork0_#t~mem46=|v_P2Thread1of1ForFork0_#t~mem46_2|, #memory_int=|v_#memory_int_328|, ~#x~0.base=|v_~#x~0.base_204|} AuxVars[|v_P2_#t~ite47_35|, |v_P2_#t~mem46_36|, |v_P2_#t~ite48_39|] AssignedVars[P2Thread1of1ForFork0_#t~ite48, P2Thread1of1ForFork0_#t~ite47, P2Thread1of1ForFork0_#t~ite49, P2Thread1of1ForFork0_#t~ite52, P2Thread1of1ForFork0_#t~mem46, #memory_int, ~x$r_buff1_thd3~0, ~x$w_buff1_used~0, P2Thread1of1ForFork0_#t~ite50, ~x$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite51, ~x$w_buff0_used~0] and [1481] L766-->L774: Formula: (let ((.cse14 (= (mod v_~x$w_buff0_used~0_597 256) 0)) (.cse15 (= (mod v_~x$r_buff0_thd1~0_61 256) 0)) (.cse2 (= (mod v_~x$w_buff0_used~0_596 256) 0)) (.cse16 (= 0 (mod v_~x$w_buff1_used~0_449 256))) (.cse4 (= (mod v_~x$r_buff1_thd1~0_41 256) 0))) (let ((.cse9 (or .cse16 .cse4)) (.cse0 (select |v_#memory_int_369| |v_~#x~0.base_228|)) (.cse5 (not .cse4)) (.cse7 (not .cse16)) (.cse6 (not .cse2)) (.cse10 (or .cse15 .cse2)) (.cse13 (or .cse14 .cse15)) (.cse8 (not .cse15)) (.cse12 (not .cse14))) (and (= (store |v_#memory_int_369| |v_~#x~0.base_228| (store .cse0 |v_~#x~0.offset_228| |v_P0_#t~ite7_39|)) |v_#memory_int_368|) (let ((.cse3 (= (mod v_~x$w_buff1_used~0_448 256) 0)) (.cse1 (= (mod v_~x$r_buff0_thd1~0_60 256) 0))) (or (and (= v_~x$r_buff1_thd1~0_41 v_~x$r_buff1_thd1~0_40) (or .cse1 .cse2) (or .cse3 .cse4)) (and (or (and (not .cse3) .cse5) (and .cse6 (not .cse1))) (= v_~x$r_buff1_thd1~0_40 0)))) (or (and (or (and .cse5 .cse7) (and .cse8 .cse6)) (= v_~x$w_buff1_used~0_448 0)) (and (= v_~x$w_buff1_used~0_449 v_~x$w_buff1_used~0_448) .cse9 .cse10)) (let ((.cse11 (= |v_P0_#t~mem5_44| |v_P0Thread1of1ForFork2_#t~mem5_1|))) (or (and (= |v_P0Thread1of1ForFork2_#t~ite6_1| |v_P0_#t~ite6_43|) .cse8 .cse11 (= |v_P0_#t~ite7_39| v_~x$w_buff0~0_117) .cse12) (and (= |v_P0_#t~ite7_39| |v_P0_#t~ite6_43|) (or (and .cse9 (= |v_P0_#t~mem5_44| (select .cse0 |v_~#x~0.offset_228|)) (= |v_P0_#t~ite6_43| |v_P0_#t~mem5_44|)) (and (= |v_P0_#t~ite6_43| v_~x$w_buff1~0_129) .cse11 .cse5 .cse7)) .cse13))) (or (and (= v_~x$r_buff0_thd1~0_60 0) .cse8 .cse6) (and (= v_~x$r_buff0_thd1~0_61 v_~x$r_buff0_thd1~0_60) .cse10)) (or (and (= v_~x$w_buff0_used~0_597 v_~x$w_buff0_used~0_596) .cse13) (and .cse8 .cse12 (= v_~x$w_buff0_used~0_596 0)))))) InVars {~x$w_buff0~0=v_~x$w_buff0~0_117, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_61, ~#x~0.offset=|v_~#x~0.offset_228|, P0Thread1of1ForFork2_#t~ite6=|v_P0Thread1of1ForFork2_#t~ite6_1|, ~x$w_buff1~0=v_~x$w_buff1~0_129, #memory_int=|v_#memory_int_369|, ~#x~0.base=|v_~#x~0.base_228|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_449, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_41, P0Thread1of1ForFork2_#t~mem5=|v_P0Thread1of1ForFork2_#t~mem5_1|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_597} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_117, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_60, ~#x~0.offset=|v_~#x~0.offset_228|, ~x$w_buff1~0=v_~x$w_buff1~0_129, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_448, P0Thread1of1ForFork2_#t~ite9=|v_P0Thread1of1ForFork2_#t~ite9_1|, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_40, P0Thread1of1ForFork2_#t~mem5=|v_P0Thread1of1ForFork2_#t~mem5_2|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_596, P0Thread1of1ForFork2_#t~ite7=|v_P0Thread1of1ForFork2_#t~ite7_1|, P0Thread1of1ForFork2_#t~ite8=|v_P0Thread1of1ForFork2_#t~ite8_1|, P0Thread1of1ForFork2_#t~ite6=|v_P0Thread1of1ForFork2_#t~ite6_2|, #memory_int=|v_#memory_int_368|, ~#x~0.base=|v_~#x~0.base_228|, P0Thread1of1ForFork2_#t~ite11=|v_P0Thread1of1ForFork2_#t~ite11_1|, P0Thread1of1ForFork2_#t~ite10=|v_P0Thread1of1ForFork2_#t~ite10_1|} AuxVars[|v_P0_#t~ite7_39|, |v_P0_#t~mem5_44|, |v_P0_#t~ite6_43|] AssignedVars[~x$r_buff0_thd1~0, P0Thread1of1ForFork2_#t~ite7, P0Thread1of1ForFork2_#t~ite8, P0Thread1of1ForFork2_#t~ite6, #memory_int, ~x$w_buff1_used~0, P0Thread1of1ForFork2_#t~ite9, ~x$r_buff1_thd1~0, P0Thread1of1ForFork2_#t~ite11, P0Thread1of1ForFork2_#t~mem5, ~x$w_buff0_used~0, P0Thread1of1ForFork2_#t~ite10] under condition null [2021-01-27 02:29:45,610 WARN L146 IndependenceRelation]: Expensive independence query (3868 ms) for statements [1500] L836-->L843: Formula: (let ((.cse9 (= (mod v_~x$r_buff1_thd4~0_51 256) 0)) (.cse14 (= (mod v_~x$w_buff1_used~0_455 256) 0)) (.cse15 (= (mod v_~x$w_buff0_used~0_603 256) 0)) (.cse16 (= (mod v_~x$r_buff0_thd4~0_57 256) 0)) (.cse11 (= (mod v_~x$w_buff0_used~0_602 256) 0))) (let ((.cse3 (not .cse11)) (.cse0 (or .cse11 .cse16)) (.cse2 (not .cse16)) (.cse8 (not .cse15)) (.cse7 (or .cse15 .cse16)) (.cse6 (select |v_#memory_int_377| |v_~#x~0.base_232|)) (.cse1 (or .cse9 .cse14)) (.cse4 (not .cse14)) (.cse5 (not .cse9))) (and (or (and (= v_~x$w_buff1_used~0_455 v_~x$w_buff1_used~0_454) .cse0 .cse1) (and (or (and .cse2 .cse3) (and .cse4 .cse5)) (= v_~x$w_buff1_used~0_454 0))) (= (store |v_#memory_int_377| |v_~#x~0.base_232| (store .cse6 |v_~#x~0.offset_232| |v_P3_#t~ite55_35|)) |v_#memory_int_376|) (or (and (= v_~x$w_buff0_used~0_603 v_~x$w_buff0_used~0_602) .cse7) (and .cse2 .cse8 (= v_~x$w_buff0_used~0_602 0))) (let ((.cse12 (= (mod v_~x$r_buff0_thd4~0_56 256) 0)) (.cse10 (= (mod v_~x$w_buff1_used~0_454 256) 0))) (or (and (or .cse9 .cse10) (or .cse11 .cse12) (= v_~x$r_buff1_thd4~0_51 v_~x$r_buff1_thd4~0_50)) (and (= v_~x$r_buff1_thd4~0_50 0) (or (and .cse3 (not .cse12)) (and .cse5 (not .cse10)))))) (or (and .cse2 .cse3 (= v_~x$r_buff0_thd4~0_56 0)) (and (= v_~x$r_buff0_thd4~0_57 v_~x$r_buff0_thd4~0_56) .cse0)) (let ((.cse13 (= |v_P3_#t~mem53_40| |v_P3Thread1of1ForFork1_#t~mem53_1|))) (or (and .cse2 (= |v_P3_#t~ite55_35| v_~x$w_buff0~0_121) (= |v_P3_#t~ite54_35| |v_P3Thread1of1ForFork1_#t~ite54_1|) .cse8 .cse13) (and (= |v_P3_#t~ite54_35| |v_P3_#t~ite55_35|) .cse7 (or (and (= (select .cse6 |v_~#x~0.offset_232|) |v_P3_#t~mem53_40|) (= |v_P3_#t~ite54_35| |v_P3_#t~mem53_40|) .cse1) (and .cse4 (= |v_P3_#t~ite54_35| v_~x$w_buff1~0_133) .cse5 .cse13)))))))) InVars {~x$w_buff0~0=v_~x$w_buff0~0_121, P3Thread1of1ForFork1_#t~ite54=|v_P3Thread1of1ForFork1_#t~ite54_1|, ~#x~0.offset=|v_~#x~0.offset_232|, ~x$w_buff1~0=v_~x$w_buff1~0_133, #memory_int=|v_#memory_int_377|, ~#x~0.base=|v_~#x~0.base_232|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_455, ~x$r_buff0_thd4~0=v_~x$r_buff0_thd4~0_57, P3Thread1of1ForFork1_#t~mem53=|v_P3Thread1of1ForFork1_#t~mem53_1|, ~x$r_buff1_thd4~0=v_~x$r_buff1_thd4~0_51, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_603} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_121, P3Thread1of1ForFork1_#t~ite54=|v_P3Thread1of1ForFork1_#t~ite54_2|, P3Thread1of1ForFork1_#t~ite55=|v_P3Thread1of1ForFork1_#t~ite55_1|, P3Thread1of1ForFork1_#t~ite56=|v_P3Thread1of1ForFork1_#t~ite56_1|, ~#x~0.offset=|v_~#x~0.offset_232|, P3Thread1of1ForFork1_#t~ite57=|v_P3Thread1of1ForFork1_#t~ite57_1|, P3Thread1of1ForFork1_#t~ite58=|v_P3Thread1of1ForFork1_#t~ite58_1|, ~x$w_buff1~0=v_~x$w_buff1~0_133, P3Thread1of1ForFork1_#t~ite59=|v_P3Thread1of1ForFork1_#t~ite59_1|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_454, ~x$r_buff0_thd4~0=v_~x$r_buff0_thd4~0_56, P3Thread1of1ForFork1_#t~mem53=|v_P3Thread1of1ForFork1_#t~mem53_2|, ~x$r_buff1_thd4~0=v_~x$r_buff1_thd4~0_50, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_602, #memory_int=|v_#memory_int_376|, ~#x~0.base=|v_~#x~0.base_232|} AuxVars[|v_P3_#t~ite54_35|, |v_P3_#t~ite55_35|, |v_P3_#t~mem53_40|] AssignedVars[P3Thread1of1ForFork1_#t~ite54, P3Thread1of1ForFork1_#t~ite55, P3Thread1of1ForFork1_#t~ite56, P3Thread1of1ForFork1_#t~ite57, P3Thread1of1ForFork1_#t~ite58, P3Thread1of1ForFork1_#t~ite59, #memory_int, ~x$w_buff1_used~0, ~x$r_buff0_thd4~0, P3Thread1of1ForFork1_#t~mem53, ~x$r_buff1_thd4~0, ~x$w_buff0_used~0] and [1481] L766-->L774: Formula: (let ((.cse14 (= (mod v_~x$w_buff0_used~0_597 256) 0)) (.cse15 (= (mod v_~x$r_buff0_thd1~0_61 256) 0)) (.cse2 (= (mod v_~x$w_buff0_used~0_596 256) 0)) (.cse16 (= 0 (mod v_~x$w_buff1_used~0_449 256))) (.cse4 (= (mod v_~x$r_buff1_thd1~0_41 256) 0))) (let ((.cse9 (or .cse16 .cse4)) (.cse0 (select |v_#memory_int_369| |v_~#x~0.base_228|)) (.cse5 (not .cse4)) (.cse7 (not .cse16)) (.cse6 (not .cse2)) (.cse10 (or .cse15 .cse2)) (.cse13 (or .cse14 .cse15)) (.cse8 (not .cse15)) (.cse12 (not .cse14))) (and (= (store |v_#memory_int_369| |v_~#x~0.base_228| (store .cse0 |v_~#x~0.offset_228| |v_P0_#t~ite7_39|)) |v_#memory_int_368|) (let ((.cse3 (= (mod v_~x$w_buff1_used~0_448 256) 0)) (.cse1 (= (mod v_~x$r_buff0_thd1~0_60 256) 0))) (or (and (= v_~x$r_buff1_thd1~0_41 v_~x$r_buff1_thd1~0_40) (or .cse1 .cse2) (or .cse3 .cse4)) (and (or (and (not .cse3) .cse5) (and .cse6 (not .cse1))) (= v_~x$r_buff1_thd1~0_40 0)))) (or (and (or (and .cse5 .cse7) (and .cse8 .cse6)) (= v_~x$w_buff1_used~0_448 0)) (and (= v_~x$w_buff1_used~0_449 v_~x$w_buff1_used~0_448) .cse9 .cse10)) (let ((.cse11 (= |v_P0_#t~mem5_44| |v_P0Thread1of1ForFork2_#t~mem5_1|))) (or (and (= |v_P0Thread1of1ForFork2_#t~ite6_1| |v_P0_#t~ite6_43|) .cse8 .cse11 (= |v_P0_#t~ite7_39| v_~x$w_buff0~0_117) .cse12) (and (= |v_P0_#t~ite7_39| |v_P0_#t~ite6_43|) (or (and .cse9 (= |v_P0_#t~mem5_44| (select .cse0 |v_~#x~0.offset_228|)) (= |v_P0_#t~ite6_43| |v_P0_#t~mem5_44|)) (and (= |v_P0_#t~ite6_43| v_~x$w_buff1~0_129) .cse11 .cse5 .cse7)) .cse13))) (or (and (= v_~x$r_buff0_thd1~0_60 0) .cse8 .cse6) (and (= v_~x$r_buff0_thd1~0_61 v_~x$r_buff0_thd1~0_60) .cse10)) (or (and (= v_~x$w_buff0_used~0_597 v_~x$w_buff0_used~0_596) .cse13) (and .cse8 .cse12 (= v_~x$w_buff0_used~0_596 0)))))) InVars {~x$w_buff0~0=v_~x$w_buff0~0_117, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_61, ~#x~0.offset=|v_~#x~0.offset_228|, P0Thread1of1ForFork2_#t~ite6=|v_P0Thread1of1ForFork2_#t~ite6_1|, ~x$w_buff1~0=v_~x$w_buff1~0_129, #memory_int=|v_#memory_int_369|, ~#x~0.base=|v_~#x~0.base_228|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_449, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_41, P0Thread1of1ForFork2_#t~mem5=|v_P0Thread1of1ForFork2_#t~mem5_1|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_597} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_117, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_60, ~#x~0.offset=|v_~#x~0.offset_228|, ~x$w_buff1~0=v_~x$w_buff1~0_129, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_448, P0Thread1of1ForFork2_#t~ite9=|v_P0Thread1of1ForFork2_#t~ite9_1|, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_40, P0Thread1of1ForFork2_#t~mem5=|v_P0Thread1of1ForFork2_#t~mem5_2|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_596, P0Thread1of1ForFork2_#t~ite7=|v_P0Thread1of1ForFork2_#t~ite7_1|, P0Thread1of1ForFork2_#t~ite8=|v_P0Thread1of1ForFork2_#t~ite8_1|, P0Thread1of1ForFork2_#t~ite6=|v_P0Thread1of1ForFork2_#t~ite6_2|, #memory_int=|v_#memory_int_368|, ~#x~0.base=|v_~#x~0.base_228|, P0Thread1of1ForFork2_#t~ite11=|v_P0Thread1of1ForFork2_#t~ite11_1|, P0Thread1of1ForFork2_#t~ite10=|v_P0Thread1of1ForFork2_#t~ite10_1|} AuxVars[|v_P0_#t~ite7_39|, |v_P0_#t~mem5_44|, |v_P0_#t~ite6_43|] AssignedVars[~x$r_buff0_thd1~0, P0Thread1of1ForFork2_#t~ite7, P0Thread1of1ForFork2_#t~ite8, P0Thread1of1ForFork2_#t~ite6, #memory_int, ~x$w_buff1_used~0, P0Thread1of1ForFork2_#t~ite9, ~x$r_buff1_thd1~0, P0Thread1of1ForFork2_#t~ite11, P0Thread1of1ForFork2_#t~mem5, ~x$w_buff0_used~0, P0Thread1of1ForFork2_#t~ite10] under condition null [2021-01-27 02:29:49,713 WARN L146 IndependenceRelation]: Expensive independence query (4101 ms) for statements [1475] L2-1-->L878: Formula: (let ((.cse15 (= (mod v_~x$w_buff0_used~0_567 256) 0)) (.cse13 (= (mod v_~x$r_buff1_thd0~0_166 256) 0)) (.cse16 (= (mod v_~x$w_buff1_used~0_423 256) 0)) (.cse12 (= (mod v_~x$w_buff0_used~0_566 256) 0)) (.cse14 (= (mod v_~x$r_buff0_thd0~0_213 256) 0))) (let ((.cse9 (or .cse12 .cse14)) (.cse5 (or .cse13 .cse16)) (.cse3 (not .cse16)) (.cse4 (select |v_#memory_int_341| |v_~#x~0.base_212|)) (.cse1 (not .cse13)) (.cse8 (not .cse12)) (.cse6 (not .cse15)) (.cse7 (not .cse14)) (.cse0 (or .cse14 .cse15))) (and (let ((.cse2 (= |v_ULTIMATE.start_main_#t~mem64_25| |v_ULTIMATE.start_main_#t~mem64_29|))) (or (and .cse0 (or (and .cse1 .cse2 .cse3 (= |v_ULTIMATE.start_main_#t~ite65_26| v_~x$w_buff1~0_113)) (and (= |v_ULTIMATE.start_main_#t~mem64_29| (select .cse4 |v_~#x~0.offset_212|)) (= |v_ULTIMATE.start_main_#t~mem64_29| |v_ULTIMATE.start_main_#t~ite65_26|) .cse5)) (= |v_ULTIMATE.start_main_#t~ite65_26| |v_ULTIMATE.start_main_#t~ite66_28|)) (and .cse2 (= |v_ULTIMATE.start_main_#t~ite65_22| |v_ULTIMATE.start_main_#t~ite65_26|) .cse6 (= v_~x$w_buff0~0_103 |v_ULTIMATE.start_main_#t~ite66_28|) .cse7))) (or (and (= v_~x$r_buff0_thd0~0_212 0) .cse8 .cse7) (and .cse9 (= v_~x$r_buff0_thd0~0_213 v_~x$r_buff0_thd0~0_212))) (or (and .cse9 (= v_~x$w_buff1_used~0_423 v_~x$w_buff1_used~0_422) .cse5) (and (= v_~x$w_buff1_used~0_422 0) (or (and .cse8 .cse7) (and .cse1 .cse3)))) (= |v_#memory_int_340| (store |v_#memory_int_341| |v_~#x~0.base_212| (store .cse4 |v_~#x~0.offset_212| |v_ULTIMATE.start_main_#t~ite66_28|))) (let ((.cse11 (= (mod v_~x$r_buff0_thd0~0_212 256) 0)) (.cse10 (= (mod v_~x$w_buff1_used~0_422 256) 0))) (or (and (= v_~x$r_buff1_thd0~0_165 0) (or (and .cse1 (not .cse10)) (and (not .cse11) .cse8))) (and (or .cse12 .cse11) (or .cse13 .cse10) (= v_~x$r_buff1_thd0~0_166 v_~x$r_buff1_thd0~0_165)))) (or (and .cse6 (= v_~x$w_buff0_used~0_566 0) .cse7) (and .cse0 (= v_~x$w_buff0_used~0_567 v_~x$w_buff0_used~0_566)))))) InVars {~x$w_buff0~0=v_~x$w_buff0~0_103, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_213, ULTIMATE.start_main_#t~mem64=|v_ULTIMATE.start_main_#t~mem64_25|, ~#x~0.offset=|v_~#x~0.offset_212|, ~x$w_buff1~0=v_~x$w_buff1~0_113, #memory_int=|v_#memory_int_341|, ~#x~0.base=|v_~#x~0.base_212|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_423, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_166, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_567, ULTIMATE.start_main_#t~ite65=|v_ULTIMATE.start_main_#t~ite65_22|} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_103, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_212, ULTIMATE.start_main_#t~mem64=|v_ULTIMATE.start_main_#t~mem64_23|, ~#x~0.offset=|v_~#x~0.offset_212|, ~x$w_buff1~0=v_~x$w_buff1~0_113, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_422, ULTIMATE.start_main_#t~ite68=|v_ULTIMATE.start_main_#t~ite68_26|, ULTIMATE.start_main_#t~ite69=|v_ULTIMATE.start_main_#t~ite69_32|, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_165, ULTIMATE.start_main_#t~ite66=|v_ULTIMATE.start_main_#t~ite66_24|, ULTIMATE.start_main_#t~ite67=|v_ULTIMATE.start_main_#t~ite67_28|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_566, ULTIMATE.start_main_#t~ite65=|v_ULTIMATE.start_main_#t~ite65_20|, ULTIMATE.start_main_#t~ite70=|v_ULTIMATE.start_main_#t~ite70_28|, #memory_int=|v_#memory_int_340|, ~#x~0.base=|v_~#x~0.base_212|} AuxVars[|v_ULTIMATE.start_main_#t~mem64_29|, |v_ULTIMATE.start_main_#t~ite65_26|, |v_ULTIMATE.start_main_#t~ite66_28|] AssignedVars[~x$r_buff0_thd0~0, ULTIMATE.start_main_#t~mem64, ULTIMATE.start_main_#t~ite70, #memory_int, ~x$w_buff1_used~0, ULTIMATE.start_main_#t~ite68, ULTIMATE.start_main_#t~ite69, ~x$r_buff1_thd0~0, ULTIMATE.start_main_#t~ite66, ULTIMATE.start_main_#t~ite67, ~x$w_buff0_used~0, ULTIMATE.start_main_#t~ite65] and [1481] L766-->L774: Formula: (let ((.cse14 (= (mod v_~x$w_buff0_used~0_597 256) 0)) (.cse15 (= (mod v_~x$r_buff0_thd1~0_61 256) 0)) (.cse2 (= (mod v_~x$w_buff0_used~0_596 256) 0)) (.cse16 (= 0 (mod v_~x$w_buff1_used~0_449 256))) (.cse4 (= (mod v_~x$r_buff1_thd1~0_41 256) 0))) (let ((.cse9 (or .cse16 .cse4)) (.cse0 (select |v_#memory_int_369| |v_~#x~0.base_228|)) (.cse5 (not .cse4)) (.cse7 (not .cse16)) (.cse6 (not .cse2)) (.cse10 (or .cse15 .cse2)) (.cse13 (or .cse14 .cse15)) (.cse8 (not .cse15)) (.cse12 (not .cse14))) (and (= (store |v_#memory_int_369| |v_~#x~0.base_228| (store .cse0 |v_~#x~0.offset_228| |v_P0_#t~ite7_39|)) |v_#memory_int_368|) (let ((.cse3 (= (mod v_~x$w_buff1_used~0_448 256) 0)) (.cse1 (= (mod v_~x$r_buff0_thd1~0_60 256) 0))) (or (and (= v_~x$r_buff1_thd1~0_41 v_~x$r_buff1_thd1~0_40) (or .cse1 .cse2) (or .cse3 .cse4)) (and (or (and (not .cse3) .cse5) (and .cse6 (not .cse1))) (= v_~x$r_buff1_thd1~0_40 0)))) (or (and (or (and .cse5 .cse7) (and .cse8 .cse6)) (= v_~x$w_buff1_used~0_448 0)) (and (= v_~x$w_buff1_used~0_449 v_~x$w_buff1_used~0_448) .cse9 .cse10)) (let ((.cse11 (= |v_P0_#t~mem5_44| |v_P0Thread1of1ForFork2_#t~mem5_1|))) (or (and (= |v_P0Thread1of1ForFork2_#t~ite6_1| |v_P0_#t~ite6_43|) .cse8 .cse11 (= |v_P0_#t~ite7_39| v_~x$w_buff0~0_117) .cse12) (and (= |v_P0_#t~ite7_39| |v_P0_#t~ite6_43|) (or (and .cse9 (= |v_P0_#t~mem5_44| (select .cse0 |v_~#x~0.offset_228|)) (= |v_P0_#t~ite6_43| |v_P0_#t~mem5_44|)) (and (= |v_P0_#t~ite6_43| v_~x$w_buff1~0_129) .cse11 .cse5 .cse7)) .cse13))) (or (and (= v_~x$r_buff0_thd1~0_60 0) .cse8 .cse6) (and (= v_~x$r_buff0_thd1~0_61 v_~x$r_buff0_thd1~0_60) .cse10)) (or (and (= v_~x$w_buff0_used~0_597 v_~x$w_buff0_used~0_596) .cse13) (and .cse8 .cse12 (= v_~x$w_buff0_used~0_596 0)))))) InVars {~x$w_buff0~0=v_~x$w_buff0~0_117, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_61, ~#x~0.offset=|v_~#x~0.offset_228|, P0Thread1of1ForFork2_#t~ite6=|v_P0Thread1of1ForFork2_#t~ite6_1|, ~x$w_buff1~0=v_~x$w_buff1~0_129, #memory_int=|v_#memory_int_369|, ~#x~0.base=|v_~#x~0.base_228|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_449, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_41, P0Thread1of1ForFork2_#t~mem5=|v_P0Thread1of1ForFork2_#t~mem5_1|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_597} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_117, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_60, ~#x~0.offset=|v_~#x~0.offset_228|, ~x$w_buff1~0=v_~x$w_buff1~0_129, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_448, P0Thread1of1ForFork2_#t~ite9=|v_P0Thread1of1ForFork2_#t~ite9_1|, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_40, P0Thread1of1ForFork2_#t~mem5=|v_P0Thread1of1ForFork2_#t~mem5_2|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_596, P0Thread1of1ForFork2_#t~ite7=|v_P0Thread1of1ForFork2_#t~ite7_1|, P0Thread1of1ForFork2_#t~ite8=|v_P0Thread1of1ForFork2_#t~ite8_1|, P0Thread1of1ForFork2_#t~ite6=|v_P0Thread1of1ForFork2_#t~ite6_2|, #memory_int=|v_#memory_int_368|, ~#x~0.base=|v_~#x~0.base_228|, P0Thread1of1ForFork2_#t~ite11=|v_P0Thread1of1ForFork2_#t~ite11_1|, P0Thread1of1ForFork2_#t~ite10=|v_P0Thread1of1ForFork2_#t~ite10_1|} AuxVars[|v_P0_#t~ite7_39|, |v_P0_#t~mem5_44|, |v_P0_#t~ite6_43|] AssignedVars[~x$r_buff0_thd1~0, P0Thread1of1ForFork2_#t~ite7, P0Thread1of1ForFork2_#t~ite8, P0Thread1of1ForFork2_#t~ite6, #memory_int, ~x$w_buff1_used~0, P0Thread1of1ForFork2_#t~ite9, ~x$r_buff1_thd1~0, P0Thread1of1ForFork2_#t~ite11, P0Thread1of1ForFork2_#t~mem5, ~x$w_buff0_used~0, P0Thread1of1ForFork2_#t~ite10] under condition null [2021-01-27 02:29:59,854 WARN L146 IndependenceRelation]: Expensive independence query (2502 ms) for statements [1487] L783-->L791: Formula: (let ((.cse14 (= (mod v_~x$w_buff0_used~0_575 256) 0)) (.cse15 (= (mod v_~x$r_buff0_thd2~0_63 256) 0)) (.cse3 (= (mod v_~x$r_buff1_thd2~0_43 256) 0)) (.cse16 (= 0 (mod v_~x$w_buff1_used~0_431 256))) (.cse1 (= (mod v_~x$w_buff0_used~0_574 256) 0))) (let ((.cse5 (not .cse1)) (.cse13 (not .cse16)) (.cse4 (not .cse3)) (.cse6 (or .cse15 .cse1)) (.cse12 (or .cse16 .cse3)) (.cse10 (or .cse14 .cse15)) (.cse7 (not .cse15)) (.cse8 (not .cse14)) (.cse11 (select |v_#memory_int_349| |v_~#x~0.base_218|))) (and (let ((.cse2 (= (mod v_~x$w_buff1_used~0_430 256) 0)) (.cse0 (= (mod v_~x$r_buff0_thd2~0_62 256) 0))) (or (and (= v_~x$r_buff1_thd2~0_43 v_~x$r_buff1_thd2~0_42) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and .cse4 (not .cse2)) (and (not .cse0) .cse5)) (= v_~x$r_buff1_thd2~0_42 0)))) (or (and (= v_~x$r_buff0_thd2~0_63 v_~x$r_buff0_thd2~0_62) .cse6) (and (= v_~x$r_buff0_thd2~0_62 0) .cse7 .cse5)) (let ((.cse9 (= |v_P1_#t~mem12_36| |v_P1Thread1of1ForFork3_#t~mem12_1|))) (or (and .cse7 .cse8 (= |v_P1Thread1of1ForFork3_#t~ite13_1| |v_P1_#t~ite13_31|) .cse9 (= |v_P1_#t~ite14_43| v_~x$w_buff0~0_105)) (and (= |v_P1_#t~ite13_31| |v_P1_#t~ite14_43|) .cse10 (or (and (= |v_P1_#t~ite13_31| |v_P1_#t~mem12_36|) (= |v_P1_#t~mem12_36| (select .cse11 |v_~#x~0.offset_218|)) .cse12) (and .cse13 .cse4 .cse9 (= |v_P1_#t~ite13_31| v_~x$w_buff1~0_119)))))) (or (and (= v_~x$w_buff1_used~0_430 0) (or (and .cse7 .cse5) (and .cse13 .cse4))) (and (= v_~x$w_buff1_used~0_431 v_~x$w_buff1_used~0_430) .cse6 .cse12)) (or (and .cse10 (= v_~x$w_buff0_used~0_575 v_~x$w_buff0_used~0_574)) (and (= v_~x$w_buff0_used~0_574 0) .cse7 .cse8)) (= (store |v_#memory_int_349| |v_~#x~0.base_218| (store .cse11 |v_~#x~0.offset_218| |v_P1_#t~ite14_43|)) |v_#memory_int_348|)))) InVars {~x$w_buff0~0=v_~x$w_buff0~0_105, ~#x~0.offset=|v_~#x~0.offset_218|, P1Thread1of1ForFork3_#t~mem12=|v_P1Thread1of1ForFork3_#t~mem12_1|, ~x$w_buff1~0=v_~x$w_buff1~0_119, #memory_int=|v_#memory_int_349|, ~#x~0.base=|v_~#x~0.base_218|, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_43, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_431, P1Thread1of1ForFork3_#t~ite13=|v_P1Thread1of1ForFork3_#t~ite13_1|, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_63, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_575} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_105, P1Thread1of1ForFork3_#t~ite17=|v_P1Thread1of1ForFork3_#t~ite17_1|, P1Thread1of1ForFork3_#t~ite16=|v_P1Thread1of1ForFork3_#t~ite16_1|, P1Thread1of1ForFork3_#t~ite18=|v_P1Thread1of1ForFork3_#t~ite18_1|, ~#x~0.offset=|v_~#x~0.offset_218|, P1Thread1of1ForFork3_#t~mem12=|v_P1Thread1of1ForFork3_#t~mem12_2|, ~x$w_buff1~0=v_~x$w_buff1~0_119, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_42, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_430, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_62, P1Thread1of1ForFork3_#t~ite13=|v_P1Thread1of1ForFork3_#t~ite13_2|, P1Thread1of1ForFork3_#t~ite15=|v_P1Thread1of1ForFork3_#t~ite15_1|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_574, P1Thread1of1ForFork3_#t~ite14=|v_P1Thread1of1ForFork3_#t~ite14_1|, #memory_int=|v_#memory_int_348|, ~#x~0.base=|v_~#x~0.base_218|} AuxVars[|v_P1_#t~ite13_31|, |v_P1_#t~ite14_43|, |v_P1_#t~mem12_36|] AssignedVars[P1Thread1of1ForFork3_#t~ite17, P1Thread1of1ForFork3_#t~ite16, P1Thread1of1ForFork3_#t~ite18, P1Thread1of1ForFork3_#t~mem12, #memory_int, ~x$r_buff1_thd2~0, ~x$w_buff1_used~0, ~x$r_buff0_thd2~0, P1Thread1of1ForFork3_#t~ite13, P1Thread1of1ForFork3_#t~ite15, ~x$w_buff0_used~0, P1Thread1of1ForFork3_#t~ite14] and [1480] L764-->L766: Formula: (= (store |v_#memory_int_2| |v_~#x~0.base_1| (store (select |v_#memory_int_2| |v_~#x~0.base_1|) |v_~#x~0.offset_1| 1)) |v_#memory_int_1|) InVars {#memory_int=|v_#memory_int_2|, ~#x~0.base=|v_~#x~0.base_1|, ~#x~0.offset=|v_~#x~0.offset_1|} OutVars{#memory_int=|v_#memory_int_1|, ~#x~0.base=|v_~#x~0.base_1|, ~#x~0.offset=|v_~#x~0.offset_1|} AuxVars[] AssignedVars[#memory_int] under condition null [2021-01-27 02:30:02,063 WARN L146 IndependenceRelation]: Expensive independence query (2128 ms) for statements [1494] L819-->L826: Formula: (let ((.cse14 (= (mod v_~x$w_buff0_used~0_541 256) 0)) (.cse15 (= (mod v_~x$r_buff0_thd3~0_209 256) 0)) (.cse13 (= (mod v_~x$w_buff0_used~0_540 256) 0)) (.cse16 (= (mod v_~x$w_buff1_used~0_395 256) 0)) (.cse12 (= (mod v_~x$r_buff1_thd3~0_152 256) 0))) (let ((.cse3 (select |v_#memory_int_329| |v_~#x~0.base_204|)) (.cse7 (not .cse12)) (.cse8 (not .cse16)) (.cse1 (not .cse13)) (.cse0 (or .cse13 .cse15)) (.cse9 (or .cse16 .cse12)) (.cse5 (not .cse14)) (.cse2 (not .cse15)) (.cse6 (or .cse14 .cse15))) (and (or (and .cse0 (= v_~x$r_buff0_thd3~0_209 v_~x$r_buff0_thd3~0_208)) (and .cse1 (= v_~x$r_buff0_thd3~0_208 0) .cse2)) (= (store |v_#memory_int_329| |v_~#x~0.base_204| (store .cse3 |v_~#x~0.offset_204| |v_P2_#t~ite48_39|)) |v_#memory_int_328|) (let ((.cse4 (= |v_P2_#t~mem46_36| |v_P2Thread1of1ForFork0_#t~mem46_1|))) (or (and .cse4 .cse5 (= |v_P2Thread1of1ForFork0_#t~ite47_1| |v_P2_#t~ite47_35|) .cse2 (= |v_P2_#t~ite48_39| v_~x$w_buff0~0_101)) (and (= |v_P2_#t~ite48_39| |v_P2_#t~ite47_35|) .cse6 (or (and (= |v_P2_#t~ite47_35| v_~x$w_buff1~0_103) .cse4 .cse7 .cse8) (and (= |v_P2_#t~ite47_35| |v_P2_#t~mem46_36|) (= (select .cse3 |v_~#x~0.offset_204|) |v_P2_#t~mem46_36|) .cse9))))) (let ((.cse11 (= (mod v_~x$w_buff1_used~0_394 256) 0)) (.cse10 (= (mod v_~x$r_buff0_thd3~0_208 256) 0))) (or (and (= v_~x$r_buff1_thd3~0_151 0) (or (and (not .cse10) .cse1) (and (not .cse11) .cse7))) (and (= v_~x$r_buff1_thd3~0_152 v_~x$r_buff1_thd3~0_151) (or .cse11 .cse12) (or .cse10 .cse13)))) (or (and (or (and .cse7 .cse8) (and .cse1 .cse2)) (= v_~x$w_buff1_used~0_394 0)) (and .cse0 (= v_~x$w_buff1_used~0_395 v_~x$w_buff1_used~0_394) .cse9)) (or (and .cse5 (= v_~x$w_buff0_used~0_540 0) .cse2) (and (= v_~x$w_buff0_used~0_541 v_~x$w_buff0_used~0_540) .cse6))))) InVars {~x$w_buff0~0=v_~x$w_buff0~0_101, P2Thread1of1ForFork0_#t~ite47=|v_P2Thread1of1ForFork0_#t~ite47_1|, ~#x~0.offset=|v_~#x~0.offset_204|, ~x$w_buff1~0=v_~x$w_buff1~0_103, #memory_int=|v_#memory_int_329|, ~#x~0.base=|v_~#x~0.base_204|, P2Thread1of1ForFork0_#t~mem46=|v_P2Thread1of1ForFork0_#t~mem46_1|, ~x$r_buff1_thd3~0=v_~x$r_buff1_thd3~0_152, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_395, ~x$r_buff0_thd3~0=v_~x$r_buff0_thd3~0_209, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_541} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_101, ~#x~0.offset=|v_~#x~0.offset_204|, ~x$w_buff1~0=v_~x$w_buff1~0_103, P2Thread1of1ForFork0_#t~ite52=|v_P2Thread1of1ForFork0_#t~ite52_1|, ~x$r_buff1_thd3~0=v_~x$r_buff1_thd3~0_151, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_394, P2Thread1of1ForFork0_#t~ite50=|v_P2Thread1of1ForFork0_#t~ite50_1|, ~x$r_buff0_thd3~0=v_~x$r_buff0_thd3~0_208, P2Thread1of1ForFork0_#t~ite51=|v_P2Thread1of1ForFork0_#t~ite51_1|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_540, P2Thread1of1ForFork0_#t~ite48=|v_P2Thread1of1ForFork0_#t~ite48_1|, P2Thread1of1ForFork0_#t~ite47=|v_P2Thread1of1ForFork0_#t~ite47_2|, P2Thread1of1ForFork0_#t~ite49=|v_P2Thread1of1ForFork0_#t~ite49_1|, P2Thread1of1ForFork0_#t~mem46=|v_P2Thread1of1ForFork0_#t~mem46_2|, #memory_int=|v_#memory_int_328|, ~#x~0.base=|v_~#x~0.base_204|} AuxVars[|v_P2_#t~ite47_35|, |v_P2_#t~mem46_36|, |v_P2_#t~ite48_39|] AssignedVars[P2Thread1of1ForFork0_#t~ite48, P2Thread1of1ForFork0_#t~ite47, P2Thread1of1ForFork0_#t~ite49, P2Thread1of1ForFork0_#t~ite52, P2Thread1of1ForFork0_#t~mem46, #memory_int, ~x$r_buff1_thd3~0, ~x$w_buff1_used~0, P2Thread1of1ForFork0_#t~ite50, ~x$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite51, ~x$w_buff0_used~0] and [1480] L764-->L766: Formula: (= (store |v_#memory_int_2| |v_~#x~0.base_1| (store (select |v_#memory_int_2| |v_~#x~0.base_1|) |v_~#x~0.offset_1| 1)) |v_#memory_int_1|) InVars {#memory_int=|v_#memory_int_2|, ~#x~0.base=|v_~#x~0.base_1|, ~#x~0.offset=|v_~#x~0.offset_1|} OutVars{#memory_int=|v_#memory_int_1|, ~#x~0.base=|v_~#x~0.base_1|, ~#x~0.offset=|v_~#x~0.offset_1|} AuxVars[] AssignedVars[#memory_int] under condition null [2021-01-27 02:30:04,405 WARN L146 IndependenceRelation]: Expensive independence query (2337 ms) for statements [1500] L836-->L843: Formula: (let ((.cse9 (= (mod v_~x$r_buff1_thd4~0_51 256) 0)) (.cse14 (= (mod v_~x$w_buff1_used~0_455 256) 0)) (.cse15 (= (mod v_~x$w_buff0_used~0_603 256) 0)) (.cse16 (= (mod v_~x$r_buff0_thd4~0_57 256) 0)) (.cse11 (= (mod v_~x$w_buff0_used~0_602 256) 0))) (let ((.cse3 (not .cse11)) (.cse0 (or .cse11 .cse16)) (.cse2 (not .cse16)) (.cse8 (not .cse15)) (.cse7 (or .cse15 .cse16)) (.cse6 (select |v_#memory_int_377| |v_~#x~0.base_232|)) (.cse1 (or .cse9 .cse14)) (.cse4 (not .cse14)) (.cse5 (not .cse9))) (and (or (and (= v_~x$w_buff1_used~0_455 v_~x$w_buff1_used~0_454) .cse0 .cse1) (and (or (and .cse2 .cse3) (and .cse4 .cse5)) (= v_~x$w_buff1_used~0_454 0))) (= (store |v_#memory_int_377| |v_~#x~0.base_232| (store .cse6 |v_~#x~0.offset_232| |v_P3_#t~ite55_35|)) |v_#memory_int_376|) (or (and (= v_~x$w_buff0_used~0_603 v_~x$w_buff0_used~0_602) .cse7) (and .cse2 .cse8 (= v_~x$w_buff0_used~0_602 0))) (let ((.cse12 (= (mod v_~x$r_buff0_thd4~0_56 256) 0)) (.cse10 (= (mod v_~x$w_buff1_used~0_454 256) 0))) (or (and (or .cse9 .cse10) (or .cse11 .cse12) (= v_~x$r_buff1_thd4~0_51 v_~x$r_buff1_thd4~0_50)) (and (= v_~x$r_buff1_thd4~0_50 0) (or (and .cse3 (not .cse12)) (and .cse5 (not .cse10)))))) (or (and .cse2 .cse3 (= v_~x$r_buff0_thd4~0_56 0)) (and (= v_~x$r_buff0_thd4~0_57 v_~x$r_buff0_thd4~0_56) .cse0)) (let ((.cse13 (= |v_P3_#t~mem53_40| |v_P3Thread1of1ForFork1_#t~mem53_1|))) (or (and .cse2 (= |v_P3_#t~ite55_35| v_~x$w_buff0~0_121) (= |v_P3_#t~ite54_35| |v_P3Thread1of1ForFork1_#t~ite54_1|) .cse8 .cse13) (and (= |v_P3_#t~ite54_35| |v_P3_#t~ite55_35|) .cse7 (or (and (= (select .cse6 |v_~#x~0.offset_232|) |v_P3_#t~mem53_40|) (= |v_P3_#t~ite54_35| |v_P3_#t~mem53_40|) .cse1) (and .cse4 (= |v_P3_#t~ite54_35| v_~x$w_buff1~0_133) .cse5 .cse13)))))))) InVars {~x$w_buff0~0=v_~x$w_buff0~0_121, P3Thread1of1ForFork1_#t~ite54=|v_P3Thread1of1ForFork1_#t~ite54_1|, ~#x~0.offset=|v_~#x~0.offset_232|, ~x$w_buff1~0=v_~x$w_buff1~0_133, #memory_int=|v_#memory_int_377|, ~#x~0.base=|v_~#x~0.base_232|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_455, ~x$r_buff0_thd4~0=v_~x$r_buff0_thd4~0_57, P3Thread1of1ForFork1_#t~mem53=|v_P3Thread1of1ForFork1_#t~mem53_1|, ~x$r_buff1_thd4~0=v_~x$r_buff1_thd4~0_51, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_603} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_121, P3Thread1of1ForFork1_#t~ite54=|v_P3Thread1of1ForFork1_#t~ite54_2|, P3Thread1of1ForFork1_#t~ite55=|v_P3Thread1of1ForFork1_#t~ite55_1|, P3Thread1of1ForFork1_#t~ite56=|v_P3Thread1of1ForFork1_#t~ite56_1|, ~#x~0.offset=|v_~#x~0.offset_232|, P3Thread1of1ForFork1_#t~ite57=|v_P3Thread1of1ForFork1_#t~ite57_1|, P3Thread1of1ForFork1_#t~ite58=|v_P3Thread1of1ForFork1_#t~ite58_1|, ~x$w_buff1~0=v_~x$w_buff1~0_133, P3Thread1of1ForFork1_#t~ite59=|v_P3Thread1of1ForFork1_#t~ite59_1|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_454, ~x$r_buff0_thd4~0=v_~x$r_buff0_thd4~0_56, P3Thread1of1ForFork1_#t~mem53=|v_P3Thread1of1ForFork1_#t~mem53_2|, ~x$r_buff1_thd4~0=v_~x$r_buff1_thd4~0_50, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_602, #memory_int=|v_#memory_int_376|, ~#x~0.base=|v_~#x~0.base_232|} AuxVars[|v_P3_#t~ite54_35|, |v_P3_#t~ite55_35|, |v_P3_#t~mem53_40|] AssignedVars[P3Thread1of1ForFork1_#t~ite54, P3Thread1of1ForFork1_#t~ite55, P3Thread1of1ForFork1_#t~ite56, P3Thread1of1ForFork1_#t~ite57, P3Thread1of1ForFork1_#t~ite58, P3Thread1of1ForFork1_#t~ite59, #memory_int, ~x$w_buff1_used~0, ~x$r_buff0_thd4~0, P3Thread1of1ForFork1_#t~mem53, ~x$r_buff1_thd4~0, ~x$w_buff0_used~0] and [1480] L764-->L766: Formula: (= (store |v_#memory_int_2| |v_~#x~0.base_1| (store (select |v_#memory_int_2| |v_~#x~0.base_1|) |v_~#x~0.offset_1| 1)) |v_#memory_int_1|) InVars {#memory_int=|v_#memory_int_2|, ~#x~0.base=|v_~#x~0.base_1|, ~#x~0.offset=|v_~#x~0.offset_1|} OutVars{#memory_int=|v_#memory_int_1|, ~#x~0.base=|v_~#x~0.base_1|, ~#x~0.offset=|v_~#x~0.offset_1|} AuxVars[] AssignedVars[#memory_int] under condition null [2021-01-27 02:30:06,654 WARN L146 IndependenceRelation]: Expensive independence query (2247 ms) for statements [1475] L2-1-->L878: Formula: (let ((.cse15 (= (mod v_~x$w_buff0_used~0_567 256) 0)) (.cse13 (= (mod v_~x$r_buff1_thd0~0_166 256) 0)) (.cse16 (= (mod v_~x$w_buff1_used~0_423 256) 0)) (.cse12 (= (mod v_~x$w_buff0_used~0_566 256) 0)) (.cse14 (= (mod v_~x$r_buff0_thd0~0_213 256) 0))) (let ((.cse9 (or .cse12 .cse14)) (.cse5 (or .cse13 .cse16)) (.cse3 (not .cse16)) (.cse4 (select |v_#memory_int_341| |v_~#x~0.base_212|)) (.cse1 (not .cse13)) (.cse8 (not .cse12)) (.cse6 (not .cse15)) (.cse7 (not .cse14)) (.cse0 (or .cse14 .cse15))) (and (let ((.cse2 (= |v_ULTIMATE.start_main_#t~mem64_25| |v_ULTIMATE.start_main_#t~mem64_29|))) (or (and .cse0 (or (and .cse1 .cse2 .cse3 (= |v_ULTIMATE.start_main_#t~ite65_26| v_~x$w_buff1~0_113)) (and (= |v_ULTIMATE.start_main_#t~mem64_29| (select .cse4 |v_~#x~0.offset_212|)) (= |v_ULTIMATE.start_main_#t~mem64_29| |v_ULTIMATE.start_main_#t~ite65_26|) .cse5)) (= |v_ULTIMATE.start_main_#t~ite65_26| |v_ULTIMATE.start_main_#t~ite66_28|)) (and .cse2 (= |v_ULTIMATE.start_main_#t~ite65_22| |v_ULTIMATE.start_main_#t~ite65_26|) .cse6 (= v_~x$w_buff0~0_103 |v_ULTIMATE.start_main_#t~ite66_28|) .cse7))) (or (and (= v_~x$r_buff0_thd0~0_212 0) .cse8 .cse7) (and .cse9 (= v_~x$r_buff0_thd0~0_213 v_~x$r_buff0_thd0~0_212))) (or (and .cse9 (= v_~x$w_buff1_used~0_423 v_~x$w_buff1_used~0_422) .cse5) (and (= v_~x$w_buff1_used~0_422 0) (or (and .cse8 .cse7) (and .cse1 .cse3)))) (= |v_#memory_int_340| (store |v_#memory_int_341| |v_~#x~0.base_212| (store .cse4 |v_~#x~0.offset_212| |v_ULTIMATE.start_main_#t~ite66_28|))) (let ((.cse11 (= (mod v_~x$r_buff0_thd0~0_212 256) 0)) (.cse10 (= (mod v_~x$w_buff1_used~0_422 256) 0))) (or (and (= v_~x$r_buff1_thd0~0_165 0) (or (and .cse1 (not .cse10)) (and (not .cse11) .cse8))) (and (or .cse12 .cse11) (or .cse13 .cse10) (= v_~x$r_buff1_thd0~0_166 v_~x$r_buff1_thd0~0_165)))) (or (and .cse6 (= v_~x$w_buff0_used~0_566 0) .cse7) (and .cse0 (= v_~x$w_buff0_used~0_567 v_~x$w_buff0_used~0_566)))))) InVars {~x$w_buff0~0=v_~x$w_buff0~0_103, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_213, ULTIMATE.start_main_#t~mem64=|v_ULTIMATE.start_main_#t~mem64_25|, ~#x~0.offset=|v_~#x~0.offset_212|, ~x$w_buff1~0=v_~x$w_buff1~0_113, #memory_int=|v_#memory_int_341|, ~#x~0.base=|v_~#x~0.base_212|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_423, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_166, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_567, ULTIMATE.start_main_#t~ite65=|v_ULTIMATE.start_main_#t~ite65_22|} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_103, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_212, ULTIMATE.start_main_#t~mem64=|v_ULTIMATE.start_main_#t~mem64_23|, ~#x~0.offset=|v_~#x~0.offset_212|, ~x$w_buff1~0=v_~x$w_buff1~0_113, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_422, ULTIMATE.start_main_#t~ite68=|v_ULTIMATE.start_main_#t~ite68_26|, ULTIMATE.start_main_#t~ite69=|v_ULTIMATE.start_main_#t~ite69_32|, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_165, ULTIMATE.start_main_#t~ite66=|v_ULTIMATE.start_main_#t~ite66_24|, ULTIMATE.start_main_#t~ite67=|v_ULTIMATE.start_main_#t~ite67_28|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_566, ULTIMATE.start_main_#t~ite65=|v_ULTIMATE.start_main_#t~ite65_20|, ULTIMATE.start_main_#t~ite70=|v_ULTIMATE.start_main_#t~ite70_28|, #memory_int=|v_#memory_int_340|, ~#x~0.base=|v_~#x~0.base_212|} AuxVars[|v_ULTIMATE.start_main_#t~mem64_29|, |v_ULTIMATE.start_main_#t~ite65_26|, |v_ULTIMATE.start_main_#t~ite66_28|] AssignedVars[~x$r_buff0_thd0~0, ULTIMATE.start_main_#t~mem64, ULTIMATE.start_main_#t~ite70, #memory_int, ~x$w_buff1_used~0, ULTIMATE.start_main_#t~ite68, ULTIMATE.start_main_#t~ite69, ~x$r_buff1_thd0~0, ULTIMATE.start_main_#t~ite66, ULTIMATE.start_main_#t~ite67, ~x$w_buff0_used~0, ULTIMATE.start_main_#t~ite65] and [1480] L764-->L766: Formula: (= (store |v_#memory_int_2| |v_~#x~0.base_1| (store (select |v_#memory_int_2| |v_~#x~0.base_1|) |v_~#x~0.offset_1| 1)) |v_#memory_int_1|) InVars {#memory_int=|v_#memory_int_2|, ~#x~0.base=|v_~#x~0.base_1|, ~#x~0.offset=|v_~#x~0.offset_1|} OutVars{#memory_int=|v_#memory_int_1|, ~#x~0.base=|v_~#x~0.base_1|, ~#x~0.offset=|v_~#x~0.offset_1|} AuxVars[] AssignedVars[#memory_int] under condition null Size of Word is: 106 and size of Sequence is : 107[2021-01-27 02:30:11,693 INFO L164 SleepSetCegar]: Size of mCounterexample is: 107 [2021-01-27 02:30:11,694 INFO L165 SleepSetCegar]: [1241#[ULTIMATE.startENTRY]true, 1244#[L-1]true, 1247#[L-1-1]true, 1250#[L17]true, 1253#[L17-1]true, 1256#[L17-2]true, 1259#[L17-3]true, 1262#[L17-4]true, 1265#[L712]true, 1268#[L714](= ~__unbuffered_p0_EAX~0 0), 1271#[L715](= ~__unbuffered_p0_EAX~0 0), 1274#[L716](= ~__unbuffered_p0_EAX~0 0), 1277#[L717](= ~__unbuffered_p0_EAX~0 0), 1280#[L718](= ~__unbuffered_p0_EAX~0 0), 1283#[L719](= ~__unbuffered_p0_EAX~0 0), 1286#[L720](= ~__unbuffered_p0_EAX~0 0), 1289#[L721](= ~__unbuffered_p0_EAX~0 0), 1292#[L722](= ~__unbuffered_p0_EAX~0 0), 1295#[L723](= ~__unbuffered_p0_EAX~0 0), 1298#[L724](= ~__unbuffered_p0_EAX~0 0), 1301#[L725](= ~__unbuffered_p0_EAX~0 0), 1304#[L726](= ~__unbuffered_p0_EAX~0 0), 1307#[L727](= ~__unbuffered_p0_EAX~0 0), 1310#[L728](= ~__unbuffered_p0_EAX~0 0), 1313#[L729](= ~__unbuffered_p0_EAX~0 0), 1316#[L730](= ~__unbuffered_p0_EAX~0 0), 1319#[L731](= ~__unbuffered_p0_EAX~0 0), 1322#[L732](= ~__unbuffered_p0_EAX~0 0), 1325#[L733](= ~__unbuffered_p0_EAX~0 0), 1328#[L734](= ~__unbuffered_p0_EAX~0 0), 1331#[L736](= ~__unbuffered_p0_EAX~0 0), 1334#[L736-1](= ~__unbuffered_p0_EAX~0 0), 1337#[L736-2](= ~__unbuffered_p0_EAX~0 0), 1340#[L738](= ~__unbuffered_p0_EAX~0 0), 1343#[L739](= ~__unbuffered_p0_EAX~0 0), 1346#[L740](= ~__unbuffered_p0_EAX~0 0), 1349#[L741](= ~__unbuffered_p0_EAX~0 0), 1352#[L742](= ~__unbuffered_p0_EAX~0 0), 1355#[L743](= ~__unbuffered_p0_EAX~0 0), 1358#[L744](= ~__unbuffered_p0_EAX~0 0), 1361#[L745](= ~__unbuffered_p0_EAX~0 0), 1364#[L746](= ~__unbuffered_p0_EAX~0 0), 1367#[L747](= ~__unbuffered_p0_EAX~0 0), 1370#[L748](= ~__unbuffered_p0_EAX~0 0), 1373#[L749](= ~__unbuffered_p0_EAX~0 0), 1376#[L750](= ~__unbuffered_p0_EAX~0 0), 1379#[L751](= ~__unbuffered_p0_EAX~0 0), 1382#[L752](= ~__unbuffered_p0_EAX~0 0), 1385#[L753](= ~__unbuffered_p0_EAX~0 0), 1388#[L754](= ~__unbuffered_p0_EAX~0 0), 1391#[L756](= ~__unbuffered_p0_EAX~0 0), 1396#[L757](and (= ~y~0 0) (= ~__unbuffered_p0_EAX~0 0)), 1399#[L758](and (= ~y~0 0) (= ~__unbuffered_p0_EAX~0 0)), 1402#[L759](and (= ~y~0 0) (= ~__unbuffered_p0_EAX~0 0)), 1405#[L-1-2](and (= ~y~0 0) (= ~__unbuffered_p0_EAX~0 0)), 1408#[L-1-3](and (= ~y~0 0) (= ~__unbuffered_p0_EAX~0 0)), 1411#[L860](and (= ~y~0 0) (= ~__unbuffered_p0_EAX~0 0)), 1414#[L860-1](and (= ~y~0 0) (= ~__unbuffered_p0_EAX~0 0)), 1417#[L861](and (= ~y~0 0) (= ~__unbuffered_p0_EAX~0 0)), 1420#[L861-1, P0ENTRY](and (= ~y~0 0) (= ~__unbuffered_p0_EAX~0 0)), 1423#[P0ENTRY, L862](and (= ~y~0 0) (= ~__unbuffered_p0_EAX~0 0)), 1429#[L862-1, P0ENTRY](and (= ~y~0 0) (= ~__unbuffered_p0_EAX~0 0)), 1435#[L863, P0ENTRY](and (= ~y~0 0) (= ~__unbuffered_p0_EAX~0 0)), 1443#[L863, L762](and (= ~y~0 0) (= ~__unbuffered_p0_EAX~0 0)), 1449#[L762, P1ENTRY, L863-1](and (= ~y~0 0) (= ~__unbuffered_p0_EAX~0 0)), 461053#[L762, P1ENTRY, L864](and (= ~y~0 0) (= ~__unbuffered_p0_EAX~0 0)), 461065#[L762, P1ENTRY, L864-1](and (= ~y~0 0) (= ~__unbuffered_p0_EAX~0 0)), 461079#[L762, P1ENTRY, L865](and (= ~y~0 0) (= ~__unbuffered_p0_EAX~0 0)), 461089#[L762, L782, L865](and (= ~y~0 0) (= ~__unbuffered_p0_EAX~0 0)), 461101#[L762, L783, L865](and (= ~y~0 0) (= ~__unbuffered_p0_EAX~0 0)), 461113#[L762, L791, L865](and (= ~y~0 0) (= ~__unbuffered_p0_EAX~0 0)), 461125#[L762, L794, L865](and (= ~y~0 0) (= ~__unbuffered_p0_EAX~0 0)), 461137#[L762, P1FINAL, L865](and (= ~y~0 0) (= ~__unbuffered_p0_EAX~0 0)), 461151#[L762, P1EXIT, L865](and (= ~y~0 0) (= ~__unbuffered_p0_EAX~0 0)), 461158#[L762, P2ENTRY, P1EXIT, L865-1](and (= ~y~0 0) (= ~__unbuffered_p0_EAX~0 0)), 461169#[L762, P2ENTRY, L866, P1EXIT](and (= ~y~0 0) (= ~__unbuffered_p0_EAX~0 0)), 461181#[L762, P2ENTRY, L866-1, P1EXIT](and (= ~y~0 0) (= ~__unbuffered_p0_EAX~0 0)), 461193#[L762, P2ENTRY, P1EXIT, L867](and (= ~y~0 0) (= ~__unbuffered_p0_EAX~0 0)), 461205#[L762, L799, P1EXIT, L867](and (= ~y~0 0) (= ~__unbuffered_p0_EAX~0 0)), 461217#[L762, P1EXIT, L867, L816](and (= ~y~0 0) (= ~__unbuffered_p0_EAX~0 0)), 461229#[L762, P1EXIT, L867, L819](= ~__unbuffered_p0_EAX~0 0), 461243#[L764, P1EXIT, L867, L819]true, 461252#[P1EXIT, L867, L819, L766]true, 461261#[P1EXIT, L867, L819, L774]true, 461270#[P1EXIT, L867, L819, L777]true, 461279#[P0FINAL, P1EXIT, L867, L819]true, 461288#[P0EXIT, P1EXIT, L867, L819]true, 461293#[P0EXIT, L826, P1EXIT, L867]true, 461301#[P0EXIT, P1EXIT, L867, L829]true, 461307#[P0EXIT, P1EXIT, L867, P2FINAL]true, 461313#[P0EXIT, P2EXIT, P1EXIT, L867]true, 461317#[P0EXIT, P2EXIT, P1EXIT, L867-1, P3ENTRY]true, 461320#[P0EXIT, P2EXIT, L868, P1EXIT, P3ENTRY]true, 461328#[P0EXIT, P2EXIT, L870, P1EXIT, P3ENTRY]true, 461332#[P0EXIT, L871, P2EXIT, P1EXIT, P3ENTRY]true, 461340#[P0EXIT, P2EXIT, L2, P1EXIT, P3ENTRY]true, 461344#[P0EXIT, P2EXIT, L3, P1EXIT, P3ENTRY]true, 461352#[P0EXIT, P2EXIT, L2-1, P1EXIT, P3ENTRY]true, 461377#[P0EXIT, P2EXIT, L878, P1EXIT, P3ENTRY]true, 461383#[P0EXIT, P2EXIT, P1EXIT, P3ENTRY, L896]true, 461391#[P0EXIT, P2EXIT, P1EXIT, P3ENTRY, L897]true, 461395#[P0EXIT, P2EXIT, P1EXIT, L18, P3ENTRY]true, 461401#[P0EXIT, P2EXIT, L18-1, P1EXIT, P3ENTRY]true, 461407#[P0EXIT, P2EXIT, L18-2, P1EXIT, P3ENTRY]true, 461416#[P0EXIT, L17-5, P2EXIT, P1EXIT, P3ENTRY]true, 461426#[P0EXIT, P2EXIT, P1EXIT, P3ENTRY, L17-7]true, 461431#[P0EXIT, P2EXIT, P1EXIT, P3ENTRY, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]true] [2021-01-27 02:30:11,694 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2021-01-27 02:30:11,694 INFO L429 AbstractCegarLoop]: === Iteration 3 === [ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-27 02:30:11,695 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-27 02:30:11,695 INFO L82 PathProgramCache]: Analyzing trace with hash -1938418545, now seen corresponding path program 2 times [2021-01-27 02:30:11,695 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-27 02:30:11,696 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [981509002] [2021-01-27 02:30:11,696 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-27 02:30:11,866 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-27 02:30:12,010 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-27 02:30:12,010 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [981509002] [2021-01-27 02:30:12,011 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-27 02:30:12,011 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2021-01-27 02:30:12,011 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [269484268] [2021-01-27 02:30:12,012 INFO L461 AbstractCegarLoop]: Interpolant automaton has 6 states [2021-01-27 02:30:12,012 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-27 02:30:12,012 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-01-27 02:30:12,013 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2021-01-27 02:30:12,013 INFO L481 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2021-01-27 02:30:12,013 INFO L482 AbstractCegarLoop]: Interpolant automaton has has 6 states, 6 states have (on average 17.666666666666668) internal successors, (106), 6 states have internal predecessors, (106), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-01-27 02:30:12,398 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-27 02:30:13,018 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-27 02:31:13,520 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check Size of Word is: 108 and size of Sequence is : 109[2021-01-27 02:31:13,634 INFO L164 SleepSetCegar]: Size of mCounterexample is: 109 [2021-01-27 02:31:13,635 INFO L165 SleepSetCegar]: [461444#[ULTIMATE.startENTRY]true, 461447#[L-1]true, 461450#[L-1-1]true, 461453#[L17]true, 461456#[L17-1]true, 461459#[L17-2]true, 461462#[L17-3]true, 461465#[L17-4]true, 461468#[L712]true, 461471#[L714](= ~__unbuffered_p0_EAX~0 0), 461474#[L715](= ~__unbuffered_p0_EAX~0 0), 461477#[L716](= ~__unbuffered_p0_EAX~0 0), 461480#[L717](= ~__unbuffered_p0_EAX~0 0), 461483#[L718](= ~__unbuffered_p0_EAX~0 0), 461486#[L719](= ~__unbuffered_p0_EAX~0 0), 461489#[L720](= ~__unbuffered_p0_EAX~0 0), 461492#[L721](= ~__unbuffered_p0_EAX~0 0), 461495#[L722](= ~__unbuffered_p0_EAX~0 0), 461498#[L723](= ~__unbuffered_p0_EAX~0 0), 461501#[L724](= ~__unbuffered_p0_EAX~0 0), 461504#[L725](= ~__unbuffered_p0_EAX~0 0), 461507#[L726](= ~__unbuffered_p0_EAX~0 0), 461510#[L727](= ~__unbuffered_p0_EAX~0 0), 461513#[L728](= ~__unbuffered_p0_EAX~0 0), 461516#[L729](= ~__unbuffered_p0_EAX~0 0), 461519#[L730](= ~__unbuffered_p0_EAX~0 0), 461522#[L731](= ~__unbuffered_p0_EAX~0 0), 461525#[L732](= ~__unbuffered_p0_EAX~0 0), 461528#[L733](= ~__unbuffered_p0_EAX~0 0), 461531#[L734](= ~__unbuffered_p0_EAX~0 0), 461534#[L736](= ~__unbuffered_p0_EAX~0 0), 461537#[L736-1](= ~__unbuffered_p0_EAX~0 0), 461540#[L736-2](= ~__unbuffered_p0_EAX~0 0), 461543#[L738](= ~__unbuffered_p0_EAX~0 0), 461546#[L739](= ~__unbuffered_p0_EAX~0 0), 461549#[L740](= ~__unbuffered_p0_EAX~0 0), 461552#[L741](= ~__unbuffered_p0_EAX~0 0), 461555#[L742](= ~__unbuffered_p0_EAX~0 0), 461558#[L743](= ~__unbuffered_p0_EAX~0 0), 461561#[L744](= ~__unbuffered_p0_EAX~0 0), 461564#[L745](= ~__unbuffered_p0_EAX~0 0), 461567#[L746](= ~__unbuffered_p0_EAX~0 0), 461570#[L747](= ~__unbuffered_p0_EAX~0 0), 461573#[L748](= ~__unbuffered_p0_EAX~0 0), 461576#[L749](= ~__unbuffered_p0_EAX~0 0), 461579#[L750](= ~__unbuffered_p0_EAX~0 0), 461582#[L751](= ~__unbuffered_p0_EAX~0 0), 461585#[L752](= ~__unbuffered_p0_EAX~0 0), 461588#[L753](= ~__unbuffered_p0_EAX~0 0), 461591#[L754](= ~__unbuffered_p0_EAX~0 0), 461594#[L756](= ~__unbuffered_p0_EAX~0 0), 461597#[L757](and (= ~y~0 0) (= ~__unbuffered_p0_EAX~0 0)), 461600#[L758](and (= ~y~0 0) (= ~__unbuffered_p0_EAX~0 0)), 461603#[L759](and (= ~y~0 0) (= ~__unbuffered_p0_EAX~0 0)), 461606#[L-1-2](and (= ~y~0 0) (= ~__unbuffered_p0_EAX~0 0)), 461609#[L-1-3](and (= ~y~0 0) (= ~__unbuffered_p0_EAX~0 0)), 461612#[L860](and (= ~y~0 0) (= ~__unbuffered_p0_EAX~0 0)), 461615#[L860-1](and (= ~y~0 0) (= ~__unbuffered_p0_EAX~0 0)), 461618#[L861](and (= ~y~0 0) (= ~__unbuffered_p0_EAX~0 0)), 461621#[L861-1, P0ENTRY](and (= ~y~0 0) (= ~__unbuffered_p0_EAX~0 0)), 461624#[P0ENTRY, L862](and (= ~y~0 0) (= ~__unbuffered_p0_EAX~0 0)), 461630#[L862-1, P0ENTRY](and (= ~y~0 0) (= ~__unbuffered_p0_EAX~0 0)), 461636#[L863, P0ENTRY](and (= ~y~0 0) (= ~__unbuffered_p0_EAX~0 0)), 461644#[L863, L762](and (= ~y~0 0) (= ~__unbuffered_p0_EAX~0 0)), 461650#[L762, P1ENTRY, L863-1](and (= ~y~0 0) (= ~__unbuffered_p0_EAX~0 0)), 978873#[L762, P1ENTRY, L864](and (= ~y~0 0) (= ~__unbuffered_p0_EAX~0 0)), 978879#[L762, P1ENTRY, L864-1](and (= ~y~0 0) (= ~__unbuffered_p0_EAX~0 0)), 978887#[L762, P1ENTRY, L865](and (= ~y~0 0) (= ~__unbuffered_p0_EAX~0 0)), 978891#[L762, L782, L865](and (= ~y~0 0) (= ~__unbuffered_p0_EAX~0 0)), 978897#[L762, L783, L865](and (= ~y~0 0) (= ~__unbuffered_p0_EAX~0 0)), 978903#[L762, L791, L865](and (= ~y~0 0) (= ~__unbuffered_p0_EAX~0 0)), 978909#[L762, L794, L865](and (= ~y~0 0) (= ~__unbuffered_p0_EAX~0 0)), 978915#[L762, P1FINAL, L865](and (= ~y~0 0) (= ~__unbuffered_p0_EAX~0 0)), 978923#[L762, P1EXIT, L865](and (= ~y~0 0) (= ~__unbuffered_p0_EAX~0 0)), 978927#[L762, P2ENTRY, P1EXIT, L865-1](and (= ~y~0 0) (= ~__unbuffered_p0_EAX~0 0)), 978932#[L762, P2ENTRY, L866, P1EXIT](and (= ~y~0 0) (= ~__unbuffered_p0_EAX~0 0)), 978938#[L762, P2ENTRY, L866-1, P1EXIT](and (= ~y~0 0) (= ~__unbuffered_p0_EAX~0 0)), 978944#[L762, P2ENTRY, P1EXIT, L867](and (= ~y~0 0) (= ~__unbuffered_p0_EAX~0 0)), 978950#[L762, L799, P1EXIT, L867](and (= ~y~0 0) (= ~__unbuffered_p0_EAX~0 0)), 978956#[L762, P1EXIT, L867, L816](and (= ~y~0 0) (= ~__unbuffered_p0_EAX~0 0)), 978962#[L762, P1EXIT, L867, L819](and (= ~y~0 1) (= ~__unbuffered_p0_EAX~0 0)), 978970#[L764, P1EXIT, L867, L819](= ~y~0 1), 978979#[P1EXIT, L867, L819, L766](= ~y~0 1), 978988#[P1EXIT, L867, L819, L774](= ~y~0 1), 978997#[P1EXIT, L867, L819, L777](= ~y~0 1), 979006#[P0FINAL, P1EXIT, L867, L819](= ~y~0 1), 979015#[P0EXIT, P1EXIT, L867, L819](= ~y~0 1), 979020#[P0EXIT, L826, P1EXIT, L867](= ~y~0 1), 979028#[P0EXIT, P1EXIT, L867, L829](= ~y~0 1), 979034#[P0EXIT, P1EXIT, L867, P2FINAL](= ~y~0 1), 979040#[P0EXIT, P2EXIT, P1EXIT, L867](= ~y~0 1), 979044#[P0EXIT, P2EXIT, P1EXIT, L867-1, P3ENTRY](= ~y~0 1), 979047#[P0EXIT, P2EXIT, L868, P1EXIT, P3ENTRY](= ~y~0 1), 979055#[P0EXIT, P2EXIT, L870, P1EXIT, P3ENTRY](= ~y~0 1), 979059#[P0EXIT, L871, P2EXIT, P1EXIT, P3ENTRY](= ~y~0 1), 979067#[P0EXIT, P2EXIT, L2, P1EXIT, P3ENTRY](= ~y~0 1), 979071#[P0EXIT, P2EXIT, L3, P1EXIT, P3ENTRY](= ~y~0 1), 979079#[P0EXIT, P2EXIT, L2-1, P1EXIT, P3ENTRY](= ~y~0 1), 979104#[P0EXIT, P2EXIT, L878, P1EXIT, P3ENTRY](= ~y~0 1), 979112#[P0EXIT, L834, P2EXIT, L878, P1EXIT](= ~y~0 1), 979682#[P0EXIT, P2EXIT, L836, L878, P1EXIT]true, 979687#[P0EXIT, P2EXIT, L836, P1EXIT, L896]true, 979695#[P0EXIT, P2EXIT, L836, P1EXIT, L897]true, 979701#[P0EXIT, P2EXIT, L836, P1EXIT, L18]true, 979707#[P0EXIT, P2EXIT, L836, L18-1, P1EXIT]true, 979711#[P0EXIT, P2EXIT, L836, L18-2, P1EXIT]true, 979725#[P0EXIT, L17-5, P2EXIT, L836, P1EXIT]true, 979748#[P0EXIT, P2EXIT, L836, P1EXIT, L17-7]true, 979768#[P0EXIT, P2EXIT, L836, P1EXIT, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]true] [2021-01-27 02:31:13,635 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2021-01-27 02:31:13,636 INFO L429 AbstractCegarLoop]: === Iteration 4 === [ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-27 02:31:13,636 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-27 02:31:13,636 INFO L82 PathProgramCache]: Analyzing trace with hash -607280432, now seen corresponding path program 1 times [2021-01-27 02:31:13,636 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-27 02:31:13,637 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1478775721] [2021-01-27 02:31:13,637 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-27 02:31:13,776 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-27 02:31:13,899 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-27 02:31:13,900 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1478775721] [2021-01-27 02:31:13,900 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-27 02:31:13,900 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2021-01-27 02:31:13,900 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1640428434] [2021-01-27 02:31:13,901 INFO L461 AbstractCegarLoop]: Interpolant automaton has 7 states [2021-01-27 02:31:13,901 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-27 02:31:13,901 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2021-01-27 02:31:13,902 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2021-01-27 02:31:13,902 INFO L481 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2021-01-27 02:31:13,902 INFO L482 AbstractCegarLoop]: Interpolant automaton has has 7 states, 7 states have (on average 15.428571428571429) internal successors, (108), 7 states have internal predecessors, (108), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-01-27 02:32:15,794 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-27 02:32:16,433 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-27 02:32:20,714 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-27 02:32:20,982 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-27 02:32:21,008 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check Size of Word is: 103 and size of Sequence is : 104[2021-01-27 02:32:21,030 INFO L164 SleepSetCegar]: Size of mCounterexample is: 104 [2021-01-27 02:32:21,031 INFO L165 SleepSetCegar]: [979782#[ULTIMATE.startENTRY]true, 979785#[L-1]true, 979788#[L-1-1]true, 979791#[L17]true, 979794#[L17-1]true, 979797#[L17-2]true, 979800#[L17-3]true, 979803#[L17-4]true, 979806#[L712]true, 979809#[L714](= ~__unbuffered_p0_EAX~0 0), 979812#[L715](= ~__unbuffered_p0_EAX~0 0), 979815#[L716](= ~__unbuffered_p0_EAX~0 0), 979818#[L717](= ~__unbuffered_p0_EAX~0 0), 979821#[L718](= ~__unbuffered_p0_EAX~0 0), 979824#[L719](= ~__unbuffered_p0_EAX~0 0), 979827#[L720](= ~__unbuffered_p0_EAX~0 0), 979830#[L721](= ~__unbuffered_p0_EAX~0 0), 979833#[L722](= ~__unbuffered_p0_EAX~0 0), 979836#[L723](= ~__unbuffered_p0_EAX~0 0), 979839#[L724](= ~__unbuffered_p0_EAX~0 0), 979842#[L725](= ~__unbuffered_p0_EAX~0 0), 979845#[L726](= ~__unbuffered_p0_EAX~0 0), 979848#[L727](= ~__unbuffered_p0_EAX~0 0), 979851#[L728](= ~__unbuffered_p0_EAX~0 0), 979854#[L729](= ~__unbuffered_p0_EAX~0 0), 979857#[L730](= ~__unbuffered_p0_EAX~0 0), 979860#[L731](= ~__unbuffered_p0_EAX~0 0), 979863#[L732](= ~__unbuffered_p0_EAX~0 0), 979866#[L733](= ~__unbuffered_p0_EAX~0 0), 979869#[L734](= ~__unbuffered_p0_EAX~0 0), 979872#[L736](= ~__unbuffered_p0_EAX~0 0), 979875#[L736-1](= ~__unbuffered_p0_EAX~0 0), 979878#[L736-2](= ~__unbuffered_p0_EAX~0 0), 979881#[L738](= ~__unbuffered_p0_EAX~0 0), 979884#[L739](= ~__unbuffered_p0_EAX~0 0), 979887#[L740](= ~__unbuffered_p0_EAX~0 0), 979890#[L741](= ~__unbuffered_p0_EAX~0 0), 979893#[L742](= ~__unbuffered_p0_EAX~0 0), 979896#[L743](= ~__unbuffered_p0_EAX~0 0), 979899#[L744](= ~__unbuffered_p0_EAX~0 0), 979902#[L745](= ~__unbuffered_p0_EAX~0 0), 979905#[L746](= ~__unbuffered_p0_EAX~0 0), 979908#[L747](= ~__unbuffered_p0_EAX~0 0), 979911#[L748](= ~__unbuffered_p0_EAX~0 0), 979914#[L749](= ~__unbuffered_p0_EAX~0 0), 979917#[L750](= ~__unbuffered_p0_EAX~0 0), 979920#[L751](= ~__unbuffered_p0_EAX~0 0), 979923#[L752](= ~__unbuffered_p0_EAX~0 0), 979926#[L753](= ~__unbuffered_p0_EAX~0 0), 979929#[L754](= ~__unbuffered_p0_EAX~0 0), 979932#[L756](= ~__unbuffered_p0_EAX~0 0), 979935#[L757](and (= ~y~0 0) (= ~__unbuffered_p0_EAX~0 0)), 979938#[L758](and (= ~y~0 0) (= ~__unbuffered_p0_EAX~0 0)), 979941#[L759](and (= ~y~0 0) (= ~__unbuffered_p0_EAX~0 0)), 979944#[L-1-2](and (= ~y~0 0) (= ~__unbuffered_p0_EAX~0 0)), 979947#[L-1-3](and (= ~y~0 0) (= ~__unbuffered_p0_EAX~0 0)), 979950#[L860](and (= ~y~0 0) (= ~__unbuffered_p0_EAX~0 0)), 979953#[L860-1](and (= ~y~0 0) (= ~__unbuffered_p0_EAX~0 0)), 979956#[L861](and (= ~y~0 0) (= ~__unbuffered_p0_EAX~0 0)), 979959#[L861-1, P0ENTRY](and (= ~y~0 0) (= ~__unbuffered_p0_EAX~0 0)), 979962#[P0ENTRY, L862](and (= ~y~0 0) (= ~__unbuffered_p0_EAX~0 0)), 979968#[L862-1, P0ENTRY](and (= ~y~0 0) (= ~__unbuffered_p0_EAX~0 0)), 979974#[L863, P0ENTRY](and (= ~y~0 0) (= ~__unbuffered_p0_EAX~0 0)), 979982#[L863, L762](and (= ~y~0 0) (= ~__unbuffered_p0_EAX~0 0)), 979988#[L762, P1ENTRY, L863-1](and (= ~y~0 0) (= ~__unbuffered_p0_EAX~0 0)), 1497211#[L762, P1ENTRY, L864](and (= ~y~0 0) (= ~__unbuffered_p0_EAX~0 0)), 1497217#[L762, P1ENTRY, L864-1](and (= ~y~0 0) (= ~__unbuffered_p0_EAX~0 0)), 1497225#[L762, P1ENTRY, L865](and (= ~y~0 0) (= ~__unbuffered_p0_EAX~0 0)), 1497229#[L762, L782, L865](and (= ~y~0 0) (= ~__unbuffered_p0_EAX~0 0)), 1497235#[L762, L783, L865](and (= ~y~0 0) (= ~__unbuffered_p0_EAX~0 0)), 1497241#[L762, L791, L865](and (= ~y~0 0) (= ~__unbuffered_p0_EAX~0 0)), 1497247#[L762, L794, L865](and (= ~y~0 0) (= ~__unbuffered_p0_EAX~0 0)), 1497253#[L762, P1FINAL, L865](and (= ~y~0 0) (= ~__unbuffered_p0_EAX~0 0)), 1497261#[L762, P1EXIT, L865](and (= ~y~0 0) (= ~__unbuffered_p0_EAX~0 0)), 1497265#[L762, P2ENTRY, P1EXIT, L865-1](and (= ~y~0 0) (= ~__unbuffered_p0_EAX~0 0)), 1497270#[L762, P2ENTRY, L866, P1EXIT](and (= ~y~0 0) (= ~__unbuffered_p0_EAX~0 0)), 1497276#[L762, P2ENTRY, L866-1, P1EXIT](and (= ~y~0 0) (= ~__unbuffered_p0_EAX~0 0)), 1497282#[L762, P2ENTRY, P1EXIT, L867](and (= ~y~0 0) (= ~__unbuffered_p0_EAX~0 0)), 1497288#[L762, L799, P1EXIT, L867](and (= ~y~0 0) (= ~__unbuffered_p0_EAX~0 0)), 1497294#[L762, P1EXIT, L867, L816](and (= ~y~0 0) (= ~__unbuffered_p0_EAX~0 0)), 1497300#[L762, P1EXIT, L867, L819](and (= ~y~0 1) (= ~__unbuffered_p0_EAX~0 0)), 1497304#[L762, L826, P1EXIT, L867](and (= ~y~0 1) (= ~__unbuffered_p0_EAX~0 0)), 1549874#[L762, P1EXIT, L867, L829](and (= ~y~0 1) (= ~__unbuffered_p0_EAX~0 0)), 1549894#[L762, P1EXIT, L867, P2FINAL](and (= ~y~0 1) (= ~__unbuffered_p0_EAX~0 0)), 1549914#[L762, P2EXIT, P1EXIT, L867](and (= ~y~0 1) (= ~__unbuffered_p0_EAX~0 0)), 1549925#[L762, P2EXIT, P1EXIT, L867-1, P3ENTRY](and (= ~y~0 1) (= ~__unbuffered_p0_EAX~0 0)), 1549942#[L762, P2EXIT, L868, P1EXIT, P3ENTRY](and (= ~y~0 1) (= ~__unbuffered_p0_EAX~0 0)), 1549964#[L762, P2EXIT, L870, P1EXIT, P3ENTRY](and (= ~y~0 1) (= ~__unbuffered_p0_EAX~0 0)), 1549982#[L762, L871, P2EXIT, P1EXIT, P3ENTRY](and (= ~y~0 1) (= ~__unbuffered_p0_EAX~0 0)), 1550004#[L762, P2EXIT, L2, P1EXIT, P3ENTRY](and (= ~y~0 1) (= ~__unbuffered_p0_EAX~0 0)), 1550022#[L762, P2EXIT, L3, P1EXIT, P3ENTRY](and (= ~y~0 1) (= ~__unbuffered_p0_EAX~0 0)), 1550051#[L762, P2EXIT, L2-1, P1EXIT, P3ENTRY](and (= ~y~0 1) (= ~__unbuffered_p0_EAX~0 0)), 1550285#[L762, P2EXIT, L878, P1EXIT, P3ENTRY](and (= ~y~0 1) (= ~__unbuffered_p0_EAX~0 0)), 1550307#[L762, L834, P2EXIT, L878, P1EXIT](and (= ~y~0 1) (= ~__unbuffered_p0_EAX~0 0)), 1555096#[L762, P2EXIT, L836, L878, P1EXIT](= ~__unbuffered_p0_EAX~0 0), 1555108#[L764, P2EXIT, L836, L878, P1EXIT]true, 1555116#[L764, P2EXIT, L836, P1EXIT, L896]true, 1555129#[L764, P2EXIT, L836, P1EXIT, L897]true, 1555142#[L764, P2EXIT, L836, P1EXIT, L18]true, 1555155#[L764, P2EXIT, L836, L18-1, P1EXIT]true, 1555168#[L764, P2EXIT, L836, L18-2, P1EXIT]true, 1555189#[L764, L17-5, P2EXIT, L836, P1EXIT]true, 1555232#[L764, P2EXIT, L836, P1EXIT, L17-7]true, 1555266#[L764, P2EXIT, L836, P1EXIT, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]true] [2021-01-27 02:32:21,031 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3 [2021-01-27 02:32:21,031 INFO L429 AbstractCegarLoop]: === Iteration 5 === [ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-27 02:32:21,032 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-27 02:32:21,032 INFO L82 PathProgramCache]: Analyzing trace with hash 201331544, now seen corresponding path program 1 times [2021-01-27 02:32:21,032 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-27 02:32:21,032 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [78634213] [2021-01-27 02:32:21,032 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-27 02:32:21,158 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-27 02:32:21,304 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-27 02:32:21,305 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [78634213] [2021-01-27 02:32:21,305 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-27 02:32:21,305 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2021-01-27 02:32:21,305 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1682823569] [2021-01-27 02:32:21,306 INFO L461 AbstractCegarLoop]: Interpolant automaton has 8 states [2021-01-27 02:32:21,306 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-27 02:32:21,306 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2021-01-27 02:32:21,307 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=40, Unknown=0, NotChecked=0, Total=56 [2021-01-27 02:32:21,307 INFO L481 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2021-01-27 02:32:21,307 INFO L482 AbstractCegarLoop]: Interpolant automaton has has 8 states, 8 states have (on average 12.875) internal successors, (103), 8 states have internal predecessors, (103), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-01-27 02:32:21,537 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-27 02:32:21,672 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-27 02:32:22,315 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-27 02:32:22,367 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-27 02:32:22,482 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-27 02:32:26,416 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-27 02:32:26,466 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-27 02:32:27,086 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-27 02:32:27,224 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check Size of Word is: 110 and size of Sequence is : 111[2021-01-27 02:32:31,996 INFO L164 SleepSetCegar]: Size of mCounterexample is: 111 [2021-01-27 02:32:31,997 INFO L165 SleepSetCegar]: [1555283#[ULTIMATE.startENTRY]true, 1555286#[L-1]true, 1555289#[L-1-1]true, 1555292#[L17]true, 1555295#[L17-1]true, 1555298#[L17-2]true, 1555301#[L17-3]true, 1555304#[L17-4]true, 1555307#[L712](= ~__unbuffered_cnt~0 0), 1555310#[L714](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_cnt~0 0)), 1555313#[L715](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_cnt~0 0)), 1555316#[L716](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_cnt~0 0)), 1555319#[L717](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_cnt~0 0)), 1555322#[L718](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_cnt~0 0)), 1555325#[L719](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_cnt~0 0)), 1555328#[L720](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_cnt~0 0)), 1555331#[L721](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_cnt~0 0)), 1555334#[L722](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_cnt~0 0)), 1555337#[L723](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_cnt~0 0)), 1555340#[L724](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_cnt~0 0)), 1555343#[L725](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_cnt~0 0)), 1555346#[L726](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_cnt~0 0)), 1555349#[L727](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_cnt~0 0)), 1555352#[L728](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_cnt~0 0)), 1555355#[L729](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_cnt~0 0)), 1555358#[L730](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_cnt~0 0)), 1555361#[L731](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_cnt~0 0)), 1555364#[L732](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_cnt~0 0)), 1555367#[L733](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_cnt~0 0)), 1555372#[L734](and (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 1555375#[L736](and (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 1555378#[L736-1](and (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 1555381#[L736-2](and (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 1555384#[L738](and (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 1555387#[L739](and (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 1555390#[L740](and (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 1555393#[L741](and (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 1555396#[L742](and (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 1555399#[L743](and (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 1555402#[L744](and (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 1555405#[L745](and (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 1555408#[L746](and (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 1555411#[L747](and (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 1555414#[L748](and (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 1555417#[L749](and (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 1555420#[L750](and (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 1555423#[L751](and (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 1555426#[L752](and (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 1555429#[L753](and (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 1555432#[L754](and (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 1555435#[L756](and (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 1555438#[L757](and (= ~y~0 0) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 1555441#[L758](and (= ~y~0 0) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 1555444#[L759](and (= ~y~0 0) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 1555447#[L-1-2](and (= ~y~0 0) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 1555450#[L-1-3](and (= ~y~0 0) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 1555453#[L860](and (= ~y~0 0) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 1555456#[L860-1](and (= ~y~0 0) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 1555459#[L861](and (= ~y~0 0) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 1555462#[L861-1, P0ENTRY](and (= ~y~0 0) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 1555465#[P0ENTRY, L862](and (= ~y~0 0) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 1555471#[L862-1, P0ENTRY](and (= ~y~0 0) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 1555477#[L863, P0ENTRY](and (= ~y~0 0) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 1555485#[L863, L762](and (= ~y~0 0) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 1555491#[L762, P1ENTRY, L863-1](and (= ~y~0 0) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 1677408#[L762, P1ENTRY, L864](and (= ~y~0 0) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 1677414#[L762, P1ENTRY, L864-1](and (= ~y~0 0) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 1677422#[L762, P1ENTRY, L865](and (= ~y~0 0) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 1677426#[L762, L782, L865](and (= ~y~0 0) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 1677432#[L762, L783, L865](and (= ~y~0 0) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 1677438#[L762, L791, L865](and (= ~y~0 0) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 1677444#[L762, L794, L865](and (= ~y~0 0) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (<= ~__unbuffered_cnt~0 1) (<= ~main$tmp_guard0~0 0)), 1677450#[L762, P1FINAL, L865](and (= ~y~0 0) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (<= ~__unbuffered_cnt~0 1) (<= ~main$tmp_guard0~0 0)), 1677458#[L762, P1EXIT, L865](and (= ~y~0 0) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (<= ~__unbuffered_cnt~0 1) (<= ~main$tmp_guard0~0 0)), 1677462#[L762, P2ENTRY, P1EXIT, L865-1](and (= ~y~0 0) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (<= ~__unbuffered_cnt~0 1) (<= ~main$tmp_guard0~0 0)), 1677467#[L762, P2ENTRY, L866, P1EXIT](and (= ~y~0 0) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (<= ~__unbuffered_cnt~0 1) (<= ~main$tmp_guard0~0 0)), 1677473#[L762, P2ENTRY, L866-1, P1EXIT](and (= ~y~0 0) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (<= ~__unbuffered_cnt~0 1) (<= ~main$tmp_guard0~0 0)), 1677479#[L762, P2ENTRY, P1EXIT, L867](and (= ~y~0 0) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (<= ~__unbuffered_cnt~0 1) (<= ~main$tmp_guard0~0 0)), 1677485#[L762, L799, P1EXIT, L867](and (= ~y~0 0) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (<= ~__unbuffered_cnt~0 1) (<= ~main$tmp_guard0~0 0)), 1677491#[L762, P1EXIT, L867, L816](and (= ~y~0 0) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (<= ~__unbuffered_cnt~0 1) (<= ~main$tmp_guard0~0 0)), 1677497#[L762, P1EXIT, L867, L819](and (= ~y~0 1) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (<= ~__unbuffered_cnt~0 1) (<= ~main$tmp_guard0~0 0)), 1677501#[L762, L826, P1EXIT, L867](and (= ~y~0 1) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (<= ~__unbuffered_cnt~0 1) (<= ~main$tmp_guard0~0 0)), 1688996#[L762, P1EXIT, L867, L829](and (= ~y~0 1) (= ~__unbuffered_p0_EAX~0 0) (<= ~__unbuffered_cnt~0 2) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (<= ~main$tmp_guard0~0 0)), 1689002#[L762, P1EXIT, L867, P2FINAL](and (= ~y~0 1) (= ~__unbuffered_p0_EAX~0 0) (<= ~__unbuffered_cnt~0 2) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (<= ~main$tmp_guard0~0 0)), 1689008#[L762, P2EXIT, P1EXIT, L867](and (= ~y~0 1) (= ~__unbuffered_p0_EAX~0 0) (<= ~__unbuffered_cnt~0 2) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (<= ~main$tmp_guard0~0 0)), 1689012#[L762, P2EXIT, P1EXIT, L867-1, P3ENTRY](and (= ~y~0 1) (= ~__unbuffered_p0_EAX~0 0) (<= ~__unbuffered_cnt~0 2) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (<= ~main$tmp_guard0~0 0)), 1689015#[L762, P2EXIT, L868, P1EXIT, P3ENTRY](and (= ~y~0 1) (= ~__unbuffered_p0_EAX~0 0) (<= ~__unbuffered_cnt~0 2) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (<= ~main$tmp_guard0~0 0)), 1689021#[L762, L834, P2EXIT, L868, P1EXIT](and (= ~y~0 1) (= ~__unbuffered_p0_EAX~0 0) (<= ~__unbuffered_cnt~0 2) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (<= ~main$tmp_guard0~0 0)), 1690208#[L762, P2EXIT, L836, L868, P1EXIT](and (= ~__unbuffered_p0_EAX~0 0) (<= ~__unbuffered_cnt~0 2) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (<= ~main$tmp_guard0~0 0)), 1690222#[L764, P2EXIT, L836, L868, P1EXIT](and (<= ~__unbuffered_cnt~0 2) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (<= ~main$tmp_guard0~0 0)), 1690234#[P2EXIT, L836, L868, P1EXIT, L766](and (<= ~__unbuffered_cnt~0 2) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (<= ~main$tmp_guard0~0 0)), 1690244#[P2EXIT, L836, L868, P1EXIT, L774](and (<= ~__unbuffered_cnt~0 2) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (<= ~main$tmp_guard0~0 0)), 1690254#[P2EXIT, L836, L868, P1EXIT, L777](and (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (<= ~main$tmp_guard0~0 0)), 1690264#[P2EXIT, L836, P0FINAL, L868, P1EXIT](and (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (<= ~main$tmp_guard0~0 0)), 1690276#[P0EXIT, P2EXIT, L836, L868, P1EXIT](and (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (<= ~main$tmp_guard0~0 0)), 1690284#[P0EXIT, L843, P2EXIT, L868, P1EXIT](and (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (<= ~main$tmp_guard0~0 0)), 1690291#[P0EXIT, P2EXIT, L868, L846, P1EXIT](and (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (<= ~main$tmp_guard0~0 0)), 1690298#[P0EXIT, P2EXIT, L870, L846, P1EXIT]true, 1690304#[P0EXIT, L871, P2EXIT, L846, P1EXIT]true, 1690312#[P0EXIT, P2EXIT, L2, L846, P1EXIT]true, 1690316#[P0EXIT, P2EXIT, L3, L846, P1EXIT]true, 1690324#[P0EXIT, P2EXIT, L2-1, L846, P1EXIT]true, 1690339#[P0EXIT, P2EXIT, L878, L846, P1EXIT]true, 1690349#[P0EXIT, P2EXIT, L846, P1EXIT, L896]true, 1690359#[P0EXIT, P2EXIT, L846, P1EXIT, L897]true, 1690369#[P0EXIT, P2EXIT, L846, P1EXIT, L18]true, 1690379#[P0EXIT, P2EXIT, L18-1, L846, P1EXIT]true, 1690391#[P0EXIT, P2EXIT, L18-2, L846, P1EXIT]true, 1690411#[P0EXIT, L17-5, P2EXIT, L846, P1EXIT]true, 1690446#[P0EXIT, P2EXIT, L846, P1EXIT, L17-7]true, 1690478#[P0EXIT, P2EXIT, L846, P1EXIT, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]true] [2021-01-27 02:32:31,997 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4 [2021-01-27 02:32:31,997 INFO L429 AbstractCegarLoop]: === Iteration 6 === [ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-27 02:32:31,997 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-27 02:32:31,998 INFO L82 PathProgramCache]: Analyzing trace with hash 1485466705, now seen corresponding path program 1 times [2021-01-27 02:32:31,998 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-27 02:32:31,998 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1342056308] [2021-01-27 02:32:31,998 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-27 02:32:32,133 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-27 02:32:33,039 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-27 02:32:33,039 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1342056308] [2021-01-27 02:32:33,039 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-27 02:32:33,039 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [22] imperfect sequences [] total 22 [2021-01-27 02:32:33,039 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [192103712] [2021-01-27 02:32:33,040 INFO L461 AbstractCegarLoop]: Interpolant automaton has 22 states [2021-01-27 02:32:33,040 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-27 02:32:33,040 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2021-01-27 02:32:33,043 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=110, Invalid=352, Unknown=0, NotChecked=0, Total=462 [2021-01-27 02:32:33,043 INFO L481 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2021-01-27 02:32:33,043 INFO L482 AbstractCegarLoop]: Interpolant automaton has has 22 states, 22 states have (on average 5.0) internal successors, (110), 22 states have internal predecessors, (110), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-01-27 02:32:33,306 WARN L193 SmtUtils]: Spent 164.00 ms on a formula simplification. DAG size of input: 34 DAG size of output: 29 [2021-01-27 02:32:33,636 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-27 02:32:34,522 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-27 02:32:34,677 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-27 02:32:37,400 WARN L146 IndependenceRelation]: Expensive independence query (2722 ms) for statements [1494] L819-->L826: Formula: (let ((.cse14 (= (mod v_~x$w_buff0_used~0_541 256) 0)) (.cse15 (= (mod v_~x$r_buff0_thd3~0_209 256) 0)) (.cse13 (= (mod v_~x$w_buff0_used~0_540 256) 0)) (.cse16 (= (mod v_~x$w_buff1_used~0_395 256) 0)) (.cse12 (= (mod v_~x$r_buff1_thd3~0_152 256) 0))) (let ((.cse3 (select |v_#memory_int_329| |v_~#x~0.base_204|)) (.cse7 (not .cse12)) (.cse8 (not .cse16)) (.cse1 (not .cse13)) (.cse0 (or .cse13 .cse15)) (.cse9 (or .cse16 .cse12)) (.cse5 (not .cse14)) (.cse2 (not .cse15)) (.cse6 (or .cse14 .cse15))) (and (or (and .cse0 (= v_~x$r_buff0_thd3~0_209 v_~x$r_buff0_thd3~0_208)) (and .cse1 (= v_~x$r_buff0_thd3~0_208 0) .cse2)) (= (store |v_#memory_int_329| |v_~#x~0.base_204| (store .cse3 |v_~#x~0.offset_204| |v_P2_#t~ite48_39|)) |v_#memory_int_328|) (let ((.cse4 (= |v_P2_#t~mem46_36| |v_P2Thread1of1ForFork0_#t~mem46_1|))) (or (and .cse4 .cse5 (= |v_P2Thread1of1ForFork0_#t~ite47_1| |v_P2_#t~ite47_35|) .cse2 (= |v_P2_#t~ite48_39| v_~x$w_buff0~0_101)) (and (= |v_P2_#t~ite48_39| |v_P2_#t~ite47_35|) .cse6 (or (and (= |v_P2_#t~ite47_35| v_~x$w_buff1~0_103) .cse4 .cse7 .cse8) (and (= |v_P2_#t~ite47_35| |v_P2_#t~mem46_36|) (= (select .cse3 |v_~#x~0.offset_204|) |v_P2_#t~mem46_36|) .cse9))))) (let ((.cse11 (= (mod v_~x$w_buff1_used~0_394 256) 0)) (.cse10 (= (mod v_~x$r_buff0_thd3~0_208 256) 0))) (or (and (= v_~x$r_buff1_thd3~0_151 0) (or (and (not .cse10) .cse1) (and (not .cse11) .cse7))) (and (= v_~x$r_buff1_thd3~0_152 v_~x$r_buff1_thd3~0_151) (or .cse11 .cse12) (or .cse10 .cse13)))) (or (and (or (and .cse7 .cse8) (and .cse1 .cse2)) (= v_~x$w_buff1_used~0_394 0)) (and .cse0 (= v_~x$w_buff1_used~0_395 v_~x$w_buff1_used~0_394) .cse9)) (or (and .cse5 (= v_~x$w_buff0_used~0_540 0) .cse2) (and (= v_~x$w_buff0_used~0_541 v_~x$w_buff0_used~0_540) .cse6))))) InVars {~x$w_buff0~0=v_~x$w_buff0~0_101, P2Thread1of1ForFork0_#t~ite47=|v_P2Thread1of1ForFork0_#t~ite47_1|, ~#x~0.offset=|v_~#x~0.offset_204|, ~x$w_buff1~0=v_~x$w_buff1~0_103, #memory_int=|v_#memory_int_329|, ~#x~0.base=|v_~#x~0.base_204|, P2Thread1of1ForFork0_#t~mem46=|v_P2Thread1of1ForFork0_#t~mem46_1|, ~x$r_buff1_thd3~0=v_~x$r_buff1_thd3~0_152, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_395, ~x$r_buff0_thd3~0=v_~x$r_buff0_thd3~0_209, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_541} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_101, ~#x~0.offset=|v_~#x~0.offset_204|, ~x$w_buff1~0=v_~x$w_buff1~0_103, P2Thread1of1ForFork0_#t~ite52=|v_P2Thread1of1ForFork0_#t~ite52_1|, ~x$r_buff1_thd3~0=v_~x$r_buff1_thd3~0_151, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_394, P2Thread1of1ForFork0_#t~ite50=|v_P2Thread1of1ForFork0_#t~ite50_1|, ~x$r_buff0_thd3~0=v_~x$r_buff0_thd3~0_208, P2Thread1of1ForFork0_#t~ite51=|v_P2Thread1of1ForFork0_#t~ite51_1|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_540, P2Thread1of1ForFork0_#t~ite48=|v_P2Thread1of1ForFork0_#t~ite48_1|, P2Thread1of1ForFork0_#t~ite47=|v_P2Thread1of1ForFork0_#t~ite47_2|, P2Thread1of1ForFork0_#t~ite49=|v_P2Thread1of1ForFork0_#t~ite49_1|, P2Thread1of1ForFork0_#t~mem46=|v_P2Thread1of1ForFork0_#t~mem46_2|, #memory_int=|v_#memory_int_328|, ~#x~0.base=|v_~#x~0.base_204|} AuxVars[|v_P2_#t~ite47_35|, |v_P2_#t~mem46_36|, |v_P2_#t~ite48_39|] AssignedVars[P2Thread1of1ForFork0_#t~ite48, P2Thread1of1ForFork0_#t~ite47, P2Thread1of1ForFork0_#t~ite49, P2Thread1of1ForFork0_#t~ite52, P2Thread1of1ForFork0_#t~mem46, #memory_int, ~x$r_buff1_thd3~0, ~x$w_buff1_used~0, P2Thread1of1ForFork0_#t~ite50, ~x$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite51, ~x$w_buff0_used~0] and [1354] L866-1-->L867: Formula: (= |v_#memory_int_31| (store |v_#memory_int_32| |v_ULTIMATE.start_main_~#t2168~0.base_3| (store (select |v_#memory_int_32| |v_ULTIMATE.start_main_~#t2168~0.base_3|) |v_ULTIMATE.start_main_~#t2168~0.offset_3| 3))) InVars {#memory_int=|v_#memory_int_32|, ULTIMATE.start_main_~#t2168~0.base=|v_ULTIMATE.start_main_~#t2168~0.base_3|, ULTIMATE.start_main_~#t2168~0.offset=|v_ULTIMATE.start_main_~#t2168~0.offset_3|} OutVars{#memory_int=|v_#memory_int_31|, ULTIMATE.start_main_~#t2168~0.base=|v_ULTIMATE.start_main_~#t2168~0.base_3|, ULTIMATE.start_main_~#t2168~0.offset=|v_ULTIMATE.start_main_~#t2168~0.offset_3|} AuxVars[] AssignedVars[#memory_int] under condition 1690776#(and (= ~x$r_buff1_thd4~0 0) (= ~x$r_buff1_thd2~0 0) (= ~x$w_buff1~0 ~x$w_buff0~0) (= 2 (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|)) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~x$r_buff1_thd1~0 0) (= 0 ~x$r_buff0_thd4~0) (= 0 ~x$r_buff0_thd2~0) (= ~x$r_buff1_thd0~0 0) (= 0 ~x$w_buff0~0)) [2021-01-27 02:32:38,113 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-27 02:32:38,756 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-27 02:32:41,682 WARN L146 IndependenceRelation]: Expensive independence query (2261 ms) for statements [1494] L819-->L826: Formula: (let ((.cse14 (= (mod v_~x$w_buff0_used~0_541 256) 0)) (.cse15 (= (mod v_~x$r_buff0_thd3~0_209 256) 0)) (.cse13 (= (mod v_~x$w_buff0_used~0_540 256) 0)) (.cse16 (= (mod v_~x$w_buff1_used~0_395 256) 0)) (.cse12 (= (mod v_~x$r_buff1_thd3~0_152 256) 0))) (let ((.cse3 (select |v_#memory_int_329| |v_~#x~0.base_204|)) (.cse7 (not .cse12)) (.cse8 (not .cse16)) (.cse1 (not .cse13)) (.cse0 (or .cse13 .cse15)) (.cse9 (or .cse16 .cse12)) (.cse5 (not .cse14)) (.cse2 (not .cse15)) (.cse6 (or .cse14 .cse15))) (and (or (and .cse0 (= v_~x$r_buff0_thd3~0_209 v_~x$r_buff0_thd3~0_208)) (and .cse1 (= v_~x$r_buff0_thd3~0_208 0) .cse2)) (= (store |v_#memory_int_329| |v_~#x~0.base_204| (store .cse3 |v_~#x~0.offset_204| |v_P2_#t~ite48_39|)) |v_#memory_int_328|) (let ((.cse4 (= |v_P2_#t~mem46_36| |v_P2Thread1of1ForFork0_#t~mem46_1|))) (or (and .cse4 .cse5 (= |v_P2Thread1of1ForFork0_#t~ite47_1| |v_P2_#t~ite47_35|) .cse2 (= |v_P2_#t~ite48_39| v_~x$w_buff0~0_101)) (and (= |v_P2_#t~ite48_39| |v_P2_#t~ite47_35|) .cse6 (or (and (= |v_P2_#t~ite47_35| v_~x$w_buff1~0_103) .cse4 .cse7 .cse8) (and (= |v_P2_#t~ite47_35| |v_P2_#t~mem46_36|) (= (select .cse3 |v_~#x~0.offset_204|) |v_P2_#t~mem46_36|) .cse9))))) (let ((.cse11 (= (mod v_~x$w_buff1_used~0_394 256) 0)) (.cse10 (= (mod v_~x$r_buff0_thd3~0_208 256) 0))) (or (and (= v_~x$r_buff1_thd3~0_151 0) (or (and (not .cse10) .cse1) (and (not .cse11) .cse7))) (and (= v_~x$r_buff1_thd3~0_152 v_~x$r_buff1_thd3~0_151) (or .cse11 .cse12) (or .cse10 .cse13)))) (or (and (or (and .cse7 .cse8) (and .cse1 .cse2)) (= v_~x$w_buff1_used~0_394 0)) (and .cse0 (= v_~x$w_buff1_used~0_395 v_~x$w_buff1_used~0_394) .cse9)) (or (and .cse5 (= v_~x$w_buff0_used~0_540 0) .cse2) (and (= v_~x$w_buff0_used~0_541 v_~x$w_buff0_used~0_540) .cse6))))) InVars {~x$w_buff0~0=v_~x$w_buff0~0_101, P2Thread1of1ForFork0_#t~ite47=|v_P2Thread1of1ForFork0_#t~ite47_1|, ~#x~0.offset=|v_~#x~0.offset_204|, ~x$w_buff1~0=v_~x$w_buff1~0_103, #memory_int=|v_#memory_int_329|, ~#x~0.base=|v_~#x~0.base_204|, P2Thread1of1ForFork0_#t~mem46=|v_P2Thread1of1ForFork0_#t~mem46_1|, ~x$r_buff1_thd3~0=v_~x$r_buff1_thd3~0_152, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_395, ~x$r_buff0_thd3~0=v_~x$r_buff0_thd3~0_209, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_541} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_101, ~#x~0.offset=|v_~#x~0.offset_204|, ~x$w_buff1~0=v_~x$w_buff1~0_103, P2Thread1of1ForFork0_#t~ite52=|v_P2Thread1of1ForFork0_#t~ite52_1|, ~x$r_buff1_thd3~0=v_~x$r_buff1_thd3~0_151, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_394, P2Thread1of1ForFork0_#t~ite50=|v_P2Thread1of1ForFork0_#t~ite50_1|, ~x$r_buff0_thd3~0=v_~x$r_buff0_thd3~0_208, P2Thread1of1ForFork0_#t~ite51=|v_P2Thread1of1ForFork0_#t~ite51_1|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_540, P2Thread1of1ForFork0_#t~ite48=|v_P2Thread1of1ForFork0_#t~ite48_1|, P2Thread1of1ForFork0_#t~ite47=|v_P2Thread1of1ForFork0_#t~ite47_2|, P2Thread1of1ForFork0_#t~ite49=|v_P2Thread1of1ForFork0_#t~ite49_1|, P2Thread1of1ForFork0_#t~mem46=|v_P2Thread1of1ForFork0_#t~mem46_2|, #memory_int=|v_#memory_int_328|, ~#x~0.base=|v_~#x~0.base_204|} AuxVars[|v_P2_#t~ite47_35|, |v_P2_#t~mem46_36|, |v_P2_#t~ite48_39|] AssignedVars[P2Thread1of1ForFork0_#t~ite48, P2Thread1of1ForFork0_#t~ite47, P2Thread1of1ForFork0_#t~ite49, P2Thread1of1ForFork0_#t~ite52, P2Thread1of1ForFork0_#t~mem46, #memory_int, ~x$r_buff1_thd3~0, ~x$w_buff1_used~0, P2Thread1of1ForFork0_#t~ite50, ~x$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite51, ~x$w_buff0_used~0] and [1486] L782-->L783: Formula: (= |v_#memory_int_6| (store |v_#memory_int_7| |v_~#x~0.base_4| (store (select |v_#memory_int_7| |v_~#x~0.base_4|) |v_~#x~0.offset_4| 2))) InVars {#memory_int=|v_#memory_int_7|, ~#x~0.base=|v_~#x~0.base_4|, ~#x~0.offset=|v_~#x~0.offset_4|} OutVars{#memory_int=|v_#memory_int_6|, ~#x~0.base=|v_~#x~0.base_4|, ~#x~0.offset=|v_~#x~0.offset_4|} AuxVars[] AssignedVars[#memory_int] under condition 1690495#(and (= ~x$r_buff1_thd4~0 0) (= ~x$r_buff1_thd2~0 0) (= ~x$w_buff1~0 ~x$w_buff0~0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~x$r_buff1_thd1~0 0) (= 0 ~x$r_buff0_thd4~0) (= 0 ~x$r_buff0_thd2~0) (= ~x$r_buff1_thd0~0 0) (= 0 ~x$w_buff0~0)) [2021-01-27 02:32:41,759 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-27 02:32:45,789 WARN L146 IndependenceRelation]: Expensive independence query (2624 ms) for statements [1494] L819-->L826: Formula: (let ((.cse14 (= (mod v_~x$w_buff0_used~0_541 256) 0)) (.cse15 (= (mod v_~x$r_buff0_thd3~0_209 256) 0)) (.cse13 (= (mod v_~x$w_buff0_used~0_540 256) 0)) (.cse16 (= (mod v_~x$w_buff1_used~0_395 256) 0)) (.cse12 (= (mod v_~x$r_buff1_thd3~0_152 256) 0))) (let ((.cse3 (select |v_#memory_int_329| |v_~#x~0.base_204|)) (.cse7 (not .cse12)) (.cse8 (not .cse16)) (.cse1 (not .cse13)) (.cse0 (or .cse13 .cse15)) (.cse9 (or .cse16 .cse12)) (.cse5 (not .cse14)) (.cse2 (not .cse15)) (.cse6 (or .cse14 .cse15))) (and (or (and .cse0 (= v_~x$r_buff0_thd3~0_209 v_~x$r_buff0_thd3~0_208)) (and .cse1 (= v_~x$r_buff0_thd3~0_208 0) .cse2)) (= (store |v_#memory_int_329| |v_~#x~0.base_204| (store .cse3 |v_~#x~0.offset_204| |v_P2_#t~ite48_39|)) |v_#memory_int_328|) (let ((.cse4 (= |v_P2_#t~mem46_36| |v_P2Thread1of1ForFork0_#t~mem46_1|))) (or (and .cse4 .cse5 (= |v_P2Thread1of1ForFork0_#t~ite47_1| |v_P2_#t~ite47_35|) .cse2 (= |v_P2_#t~ite48_39| v_~x$w_buff0~0_101)) (and (= |v_P2_#t~ite48_39| |v_P2_#t~ite47_35|) .cse6 (or (and (= |v_P2_#t~ite47_35| v_~x$w_buff1~0_103) .cse4 .cse7 .cse8) (and (= |v_P2_#t~ite47_35| |v_P2_#t~mem46_36|) (= (select .cse3 |v_~#x~0.offset_204|) |v_P2_#t~mem46_36|) .cse9))))) (let ((.cse11 (= (mod v_~x$w_buff1_used~0_394 256) 0)) (.cse10 (= (mod v_~x$r_buff0_thd3~0_208 256) 0))) (or (and (= v_~x$r_buff1_thd3~0_151 0) (or (and (not .cse10) .cse1) (and (not .cse11) .cse7))) (and (= v_~x$r_buff1_thd3~0_152 v_~x$r_buff1_thd3~0_151) (or .cse11 .cse12) (or .cse10 .cse13)))) (or (and (or (and .cse7 .cse8) (and .cse1 .cse2)) (= v_~x$w_buff1_used~0_394 0)) (and .cse0 (= v_~x$w_buff1_used~0_395 v_~x$w_buff1_used~0_394) .cse9)) (or (and .cse5 (= v_~x$w_buff0_used~0_540 0) .cse2) (and (= v_~x$w_buff0_used~0_541 v_~x$w_buff0_used~0_540) .cse6))))) InVars {~x$w_buff0~0=v_~x$w_buff0~0_101, P2Thread1of1ForFork0_#t~ite47=|v_P2Thread1of1ForFork0_#t~ite47_1|, ~#x~0.offset=|v_~#x~0.offset_204|, ~x$w_buff1~0=v_~x$w_buff1~0_103, #memory_int=|v_#memory_int_329|, ~#x~0.base=|v_~#x~0.base_204|, P2Thread1of1ForFork0_#t~mem46=|v_P2Thread1of1ForFork0_#t~mem46_1|, ~x$r_buff1_thd3~0=v_~x$r_buff1_thd3~0_152, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_395, ~x$r_buff0_thd3~0=v_~x$r_buff0_thd3~0_209, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_541} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_101, ~#x~0.offset=|v_~#x~0.offset_204|, ~x$w_buff1~0=v_~x$w_buff1~0_103, P2Thread1of1ForFork0_#t~ite52=|v_P2Thread1of1ForFork0_#t~ite52_1|, ~x$r_buff1_thd3~0=v_~x$r_buff1_thd3~0_151, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_394, P2Thread1of1ForFork0_#t~ite50=|v_P2Thread1of1ForFork0_#t~ite50_1|, ~x$r_buff0_thd3~0=v_~x$r_buff0_thd3~0_208, P2Thread1of1ForFork0_#t~ite51=|v_P2Thread1of1ForFork0_#t~ite51_1|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_540, P2Thread1of1ForFork0_#t~ite48=|v_P2Thread1of1ForFork0_#t~ite48_1|, P2Thread1of1ForFork0_#t~ite47=|v_P2Thread1of1ForFork0_#t~ite47_2|, P2Thread1of1ForFork0_#t~ite49=|v_P2Thread1of1ForFork0_#t~ite49_1|, P2Thread1of1ForFork0_#t~mem46=|v_P2Thread1of1ForFork0_#t~mem46_2|, #memory_int=|v_#memory_int_328|, ~#x~0.base=|v_~#x~0.base_204|} AuxVars[|v_P2_#t~ite47_35|, |v_P2_#t~mem46_36|, |v_P2_#t~ite48_39|] AssignedVars[P2Thread1of1ForFork0_#t~ite48, P2Thread1of1ForFork0_#t~ite47, P2Thread1of1ForFork0_#t~ite49, P2Thread1of1ForFork0_#t~ite52, P2Thread1of1ForFork0_#t~mem46, #memory_int, ~x$r_buff1_thd3~0, ~x$w_buff1_used~0, P2Thread1of1ForFork0_#t~ite50, ~x$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite51, ~x$w_buff0_used~0] and [1354] L866-1-->L867: Formula: (= |v_#memory_int_31| (store |v_#memory_int_32| |v_ULTIMATE.start_main_~#t2168~0.base_3| (store (select |v_#memory_int_32| |v_ULTIMATE.start_main_~#t2168~0.base_3|) |v_ULTIMATE.start_main_~#t2168~0.offset_3| 3))) InVars {#memory_int=|v_#memory_int_32|, ULTIMATE.start_main_~#t2168~0.base=|v_ULTIMATE.start_main_~#t2168~0.base_3|, ULTIMATE.start_main_~#t2168~0.offset=|v_ULTIMATE.start_main_~#t2168~0.offset_3|} OutVars{#memory_int=|v_#memory_int_31|, ULTIMATE.start_main_~#t2168~0.base=|v_ULTIMATE.start_main_~#t2168~0.base_3|, ULTIMATE.start_main_~#t2168~0.offset=|v_ULTIMATE.start_main_~#t2168~0.offset_3|} AuxVars[] AssignedVars[#memory_int] under condition 1690495#(and (= ~x$r_buff1_thd4~0 0) (= ~x$r_buff1_thd2~0 0) (= ~x$w_buff1~0 ~x$w_buff0~0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~x$r_buff1_thd1~0 0) (= 0 ~x$r_buff0_thd4~0) (= 0 ~x$r_buff0_thd2~0) (= ~x$r_buff1_thd0~0 0) (= 0 ~x$w_buff0~0)) [2021-01-27 02:32:45,949 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-27 02:32:53,891 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-27 02:32:53,942 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-27 02:32:56,927 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-27 02:32:57,029 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-27 02:32:58,908 WARN L146 IndependenceRelation]: Expensive independence query (1878 ms) for statements [1494] L819-->L826: Formula: (let ((.cse14 (= (mod v_~x$w_buff0_used~0_541 256) 0)) (.cse15 (= (mod v_~x$r_buff0_thd3~0_209 256) 0)) (.cse13 (= (mod v_~x$w_buff0_used~0_540 256) 0)) (.cse16 (= (mod v_~x$w_buff1_used~0_395 256) 0)) (.cse12 (= (mod v_~x$r_buff1_thd3~0_152 256) 0))) (let ((.cse3 (select |v_#memory_int_329| |v_~#x~0.base_204|)) (.cse7 (not .cse12)) (.cse8 (not .cse16)) (.cse1 (not .cse13)) (.cse0 (or .cse13 .cse15)) (.cse9 (or .cse16 .cse12)) (.cse5 (not .cse14)) (.cse2 (not .cse15)) (.cse6 (or .cse14 .cse15))) (and (or (and .cse0 (= v_~x$r_buff0_thd3~0_209 v_~x$r_buff0_thd3~0_208)) (and .cse1 (= v_~x$r_buff0_thd3~0_208 0) .cse2)) (= (store |v_#memory_int_329| |v_~#x~0.base_204| (store .cse3 |v_~#x~0.offset_204| |v_P2_#t~ite48_39|)) |v_#memory_int_328|) (let ((.cse4 (= |v_P2_#t~mem46_36| |v_P2Thread1of1ForFork0_#t~mem46_1|))) (or (and .cse4 .cse5 (= |v_P2Thread1of1ForFork0_#t~ite47_1| |v_P2_#t~ite47_35|) .cse2 (= |v_P2_#t~ite48_39| v_~x$w_buff0~0_101)) (and (= |v_P2_#t~ite48_39| |v_P2_#t~ite47_35|) .cse6 (or (and (= |v_P2_#t~ite47_35| v_~x$w_buff1~0_103) .cse4 .cse7 .cse8) (and (= |v_P2_#t~ite47_35| |v_P2_#t~mem46_36|) (= (select .cse3 |v_~#x~0.offset_204|) |v_P2_#t~mem46_36|) .cse9))))) (let ((.cse11 (= (mod v_~x$w_buff1_used~0_394 256) 0)) (.cse10 (= (mod v_~x$r_buff0_thd3~0_208 256) 0))) (or (and (= v_~x$r_buff1_thd3~0_151 0) (or (and (not .cse10) .cse1) (and (not .cse11) .cse7))) (and (= v_~x$r_buff1_thd3~0_152 v_~x$r_buff1_thd3~0_151) (or .cse11 .cse12) (or .cse10 .cse13)))) (or (and (or (and .cse7 .cse8) (and .cse1 .cse2)) (= v_~x$w_buff1_used~0_394 0)) (and .cse0 (= v_~x$w_buff1_used~0_395 v_~x$w_buff1_used~0_394) .cse9)) (or (and .cse5 (= v_~x$w_buff0_used~0_540 0) .cse2) (and (= v_~x$w_buff0_used~0_541 v_~x$w_buff0_used~0_540) .cse6))))) InVars {~x$w_buff0~0=v_~x$w_buff0~0_101, P2Thread1of1ForFork0_#t~ite47=|v_P2Thread1of1ForFork0_#t~ite47_1|, ~#x~0.offset=|v_~#x~0.offset_204|, ~x$w_buff1~0=v_~x$w_buff1~0_103, #memory_int=|v_#memory_int_329|, ~#x~0.base=|v_~#x~0.base_204|, P2Thread1of1ForFork0_#t~mem46=|v_P2Thread1of1ForFork0_#t~mem46_1|, ~x$r_buff1_thd3~0=v_~x$r_buff1_thd3~0_152, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_395, ~x$r_buff0_thd3~0=v_~x$r_buff0_thd3~0_209, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_541} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_101, ~#x~0.offset=|v_~#x~0.offset_204|, ~x$w_buff1~0=v_~x$w_buff1~0_103, P2Thread1of1ForFork0_#t~ite52=|v_P2Thread1of1ForFork0_#t~ite52_1|, ~x$r_buff1_thd3~0=v_~x$r_buff1_thd3~0_151, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_394, P2Thread1of1ForFork0_#t~ite50=|v_P2Thread1of1ForFork0_#t~ite50_1|, ~x$r_buff0_thd3~0=v_~x$r_buff0_thd3~0_208, P2Thread1of1ForFork0_#t~ite51=|v_P2Thread1of1ForFork0_#t~ite51_1|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_540, P2Thread1of1ForFork0_#t~ite48=|v_P2Thread1of1ForFork0_#t~ite48_1|, P2Thread1of1ForFork0_#t~ite47=|v_P2Thread1of1ForFork0_#t~ite47_2|, P2Thread1of1ForFork0_#t~ite49=|v_P2Thread1of1ForFork0_#t~ite49_1|, P2Thread1of1ForFork0_#t~mem46=|v_P2Thread1of1ForFork0_#t~mem46_2|, #memory_int=|v_#memory_int_328|, ~#x~0.base=|v_~#x~0.base_204|} AuxVars[|v_P2_#t~ite47_35|, |v_P2_#t~mem46_36|, |v_P2_#t~ite48_39|] AssignedVars[P2Thread1of1ForFork0_#t~ite48, P2Thread1of1ForFork0_#t~ite47, P2Thread1of1ForFork0_#t~ite49, P2Thread1of1ForFork0_#t~ite52, P2Thread1of1ForFork0_#t~mem46, #memory_int, ~x$r_buff1_thd3~0, ~x$w_buff1_used~0, P2Thread1of1ForFork0_#t~ite50, ~x$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite51, ~x$w_buff0_used~0] and [1486] L782-->L783: Formula: (= |v_#memory_int_6| (store |v_#memory_int_7| |v_~#x~0.base_4| (store (select |v_#memory_int_7| |v_~#x~0.base_4|) |v_~#x~0.offset_4| 2))) InVars {#memory_int=|v_#memory_int_7|, ~#x~0.base=|v_~#x~0.base_4|, ~#x~0.offset=|v_~#x~0.offset_4|} OutVars{#memory_int=|v_#memory_int_6|, ~#x~0.base=|v_~#x~0.base_4|, ~#x~0.offset=|v_~#x~0.offset_4|} AuxVars[] AssignedVars[#memory_int] under condition 1857821#(and (= ~x$r_buff1_thd4~0 0) (= ~x$r_buff1_thd2~0 0) (= ~x$w_buff1~0 ~x$w_buff0~0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~x$r_buff1_thd1~0 0) (= 0 ~x$r_buff0_thd4~0) (= 0 ~x$r_buff0_thd2~0) (= ~x$r_buff1_thd0~0 0) (= 0 ~x$w_buff0~0) (not (= 2 (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|)))) [2021-01-27 02:32:58,926 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-27 02:32:59,371 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-27 02:32:59,561 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-27 02:33:02,439 WARN L146 IndependenceRelation]: Expensive independence query (2877 ms) for statements [1494] L819-->L826: Formula: (let ((.cse14 (= (mod v_~x$w_buff0_used~0_541 256) 0)) (.cse15 (= (mod v_~x$r_buff0_thd3~0_209 256) 0)) (.cse13 (= (mod v_~x$w_buff0_used~0_540 256) 0)) (.cse16 (= (mod v_~x$w_buff1_used~0_395 256) 0)) (.cse12 (= (mod v_~x$r_buff1_thd3~0_152 256) 0))) (let ((.cse3 (select |v_#memory_int_329| |v_~#x~0.base_204|)) (.cse7 (not .cse12)) (.cse8 (not .cse16)) (.cse1 (not .cse13)) (.cse0 (or .cse13 .cse15)) (.cse9 (or .cse16 .cse12)) (.cse5 (not .cse14)) (.cse2 (not .cse15)) (.cse6 (or .cse14 .cse15))) (and (or (and .cse0 (= v_~x$r_buff0_thd3~0_209 v_~x$r_buff0_thd3~0_208)) (and .cse1 (= v_~x$r_buff0_thd3~0_208 0) .cse2)) (= (store |v_#memory_int_329| |v_~#x~0.base_204| (store .cse3 |v_~#x~0.offset_204| |v_P2_#t~ite48_39|)) |v_#memory_int_328|) (let ((.cse4 (= |v_P2_#t~mem46_36| |v_P2Thread1of1ForFork0_#t~mem46_1|))) (or (and .cse4 .cse5 (= |v_P2Thread1of1ForFork0_#t~ite47_1| |v_P2_#t~ite47_35|) .cse2 (= |v_P2_#t~ite48_39| v_~x$w_buff0~0_101)) (and (= |v_P2_#t~ite48_39| |v_P2_#t~ite47_35|) .cse6 (or (and (= |v_P2_#t~ite47_35| v_~x$w_buff1~0_103) .cse4 .cse7 .cse8) (and (= |v_P2_#t~ite47_35| |v_P2_#t~mem46_36|) (= (select .cse3 |v_~#x~0.offset_204|) |v_P2_#t~mem46_36|) .cse9))))) (let ((.cse11 (= (mod v_~x$w_buff1_used~0_394 256) 0)) (.cse10 (= (mod v_~x$r_buff0_thd3~0_208 256) 0))) (or (and (= v_~x$r_buff1_thd3~0_151 0) (or (and (not .cse10) .cse1) (and (not .cse11) .cse7))) (and (= v_~x$r_buff1_thd3~0_152 v_~x$r_buff1_thd3~0_151) (or .cse11 .cse12) (or .cse10 .cse13)))) (or (and (or (and .cse7 .cse8) (and .cse1 .cse2)) (= v_~x$w_buff1_used~0_394 0)) (and .cse0 (= v_~x$w_buff1_used~0_395 v_~x$w_buff1_used~0_394) .cse9)) (or (and .cse5 (= v_~x$w_buff0_used~0_540 0) .cse2) (and (= v_~x$w_buff0_used~0_541 v_~x$w_buff0_used~0_540) .cse6))))) InVars {~x$w_buff0~0=v_~x$w_buff0~0_101, P2Thread1of1ForFork0_#t~ite47=|v_P2Thread1of1ForFork0_#t~ite47_1|, ~#x~0.offset=|v_~#x~0.offset_204|, ~x$w_buff1~0=v_~x$w_buff1~0_103, #memory_int=|v_#memory_int_329|, ~#x~0.base=|v_~#x~0.base_204|, P2Thread1of1ForFork0_#t~mem46=|v_P2Thread1of1ForFork0_#t~mem46_1|, ~x$r_buff1_thd3~0=v_~x$r_buff1_thd3~0_152, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_395, ~x$r_buff0_thd3~0=v_~x$r_buff0_thd3~0_209, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_541} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_101, ~#x~0.offset=|v_~#x~0.offset_204|, ~x$w_buff1~0=v_~x$w_buff1~0_103, P2Thread1of1ForFork0_#t~ite52=|v_P2Thread1of1ForFork0_#t~ite52_1|, ~x$r_buff1_thd3~0=v_~x$r_buff1_thd3~0_151, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_394, P2Thread1of1ForFork0_#t~ite50=|v_P2Thread1of1ForFork0_#t~ite50_1|, ~x$r_buff0_thd3~0=v_~x$r_buff0_thd3~0_208, P2Thread1of1ForFork0_#t~ite51=|v_P2Thread1of1ForFork0_#t~ite51_1|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_540, P2Thread1of1ForFork0_#t~ite48=|v_P2Thread1of1ForFork0_#t~ite48_1|, P2Thread1of1ForFork0_#t~ite47=|v_P2Thread1of1ForFork0_#t~ite47_2|, P2Thread1of1ForFork0_#t~ite49=|v_P2Thread1of1ForFork0_#t~ite49_1|, P2Thread1of1ForFork0_#t~mem46=|v_P2Thread1of1ForFork0_#t~mem46_2|, #memory_int=|v_#memory_int_328|, ~#x~0.base=|v_~#x~0.base_204|} AuxVars[|v_P2_#t~ite47_35|, |v_P2_#t~mem46_36|, |v_P2_#t~ite48_39|] AssignedVars[P2Thread1of1ForFork0_#t~ite48, P2Thread1of1ForFork0_#t~ite47, P2Thread1of1ForFork0_#t~ite49, P2Thread1of1ForFork0_#t~ite52, P2Thread1of1ForFork0_#t~mem46, #memory_int, ~x$r_buff1_thd3~0, ~x$w_buff1_used~0, P2Thread1of1ForFork0_#t~ite50, ~x$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite51, ~x$w_buff0_used~0] and [1354] L866-1-->L867: Formula: (= |v_#memory_int_31| (store |v_#memory_int_32| |v_ULTIMATE.start_main_~#t2168~0.base_3| (store (select |v_#memory_int_32| |v_ULTIMATE.start_main_~#t2168~0.base_3|) |v_ULTIMATE.start_main_~#t2168~0.offset_3| 3))) InVars {#memory_int=|v_#memory_int_32|, ULTIMATE.start_main_~#t2168~0.base=|v_ULTIMATE.start_main_~#t2168~0.base_3|, ULTIMATE.start_main_~#t2168~0.offset=|v_ULTIMATE.start_main_~#t2168~0.offset_3|} OutVars{#memory_int=|v_#memory_int_31|, ULTIMATE.start_main_~#t2168~0.base=|v_ULTIMATE.start_main_~#t2168~0.base_3|, ULTIMATE.start_main_~#t2168~0.offset=|v_ULTIMATE.start_main_~#t2168~0.offset_3|} AuxVars[] AssignedVars[#memory_int] under condition 1690719#(and (= ~x$r_buff1_thd4~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 1) (= ~x$r_buff1_thd2~0 0) (= ~x$w_buff1~0 ~x$w_buff0~0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~x$r_buff1_thd1~0 0) (= 0 ~x$r_buff0_thd4~0) (= 0 ~x$r_buff0_thd2~0) (= ~x$r_buff1_thd0~0 0) (= 0 ~x$w_buff0~0)) [2021-01-27 02:33:04,298 WARN L146 IndependenceRelation]: Expensive independence query (1858 ms) for statements [1494] L819-->L826: Formula: (let ((.cse14 (= (mod v_~x$w_buff0_used~0_541 256) 0)) (.cse15 (= (mod v_~x$r_buff0_thd3~0_209 256) 0)) (.cse13 (= (mod v_~x$w_buff0_used~0_540 256) 0)) (.cse16 (= (mod v_~x$w_buff1_used~0_395 256) 0)) (.cse12 (= (mod v_~x$r_buff1_thd3~0_152 256) 0))) (let ((.cse3 (select |v_#memory_int_329| |v_~#x~0.base_204|)) (.cse7 (not .cse12)) (.cse8 (not .cse16)) (.cse1 (not .cse13)) (.cse0 (or .cse13 .cse15)) (.cse9 (or .cse16 .cse12)) (.cse5 (not .cse14)) (.cse2 (not .cse15)) (.cse6 (or .cse14 .cse15))) (and (or (and .cse0 (= v_~x$r_buff0_thd3~0_209 v_~x$r_buff0_thd3~0_208)) (and .cse1 (= v_~x$r_buff0_thd3~0_208 0) .cse2)) (= (store |v_#memory_int_329| |v_~#x~0.base_204| (store .cse3 |v_~#x~0.offset_204| |v_P2_#t~ite48_39|)) |v_#memory_int_328|) (let ((.cse4 (= |v_P2_#t~mem46_36| |v_P2Thread1of1ForFork0_#t~mem46_1|))) (or (and .cse4 .cse5 (= |v_P2Thread1of1ForFork0_#t~ite47_1| |v_P2_#t~ite47_35|) .cse2 (= |v_P2_#t~ite48_39| v_~x$w_buff0~0_101)) (and (= |v_P2_#t~ite48_39| |v_P2_#t~ite47_35|) .cse6 (or (and (= |v_P2_#t~ite47_35| v_~x$w_buff1~0_103) .cse4 .cse7 .cse8) (and (= |v_P2_#t~ite47_35| |v_P2_#t~mem46_36|) (= (select .cse3 |v_~#x~0.offset_204|) |v_P2_#t~mem46_36|) .cse9))))) (let ((.cse11 (= (mod v_~x$w_buff1_used~0_394 256) 0)) (.cse10 (= (mod v_~x$r_buff0_thd3~0_208 256) 0))) (or (and (= v_~x$r_buff1_thd3~0_151 0) (or (and (not .cse10) .cse1) (and (not .cse11) .cse7))) (and (= v_~x$r_buff1_thd3~0_152 v_~x$r_buff1_thd3~0_151) (or .cse11 .cse12) (or .cse10 .cse13)))) (or (and (or (and .cse7 .cse8) (and .cse1 .cse2)) (= v_~x$w_buff1_used~0_394 0)) (and .cse0 (= v_~x$w_buff1_used~0_395 v_~x$w_buff1_used~0_394) .cse9)) (or (and .cse5 (= v_~x$w_buff0_used~0_540 0) .cse2) (and (= v_~x$w_buff0_used~0_541 v_~x$w_buff0_used~0_540) .cse6))))) InVars {~x$w_buff0~0=v_~x$w_buff0~0_101, P2Thread1of1ForFork0_#t~ite47=|v_P2Thread1of1ForFork0_#t~ite47_1|, ~#x~0.offset=|v_~#x~0.offset_204|, ~x$w_buff1~0=v_~x$w_buff1~0_103, #memory_int=|v_#memory_int_329|, ~#x~0.base=|v_~#x~0.base_204|, P2Thread1of1ForFork0_#t~mem46=|v_P2Thread1of1ForFork0_#t~mem46_1|, ~x$r_buff1_thd3~0=v_~x$r_buff1_thd3~0_152, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_395, ~x$r_buff0_thd3~0=v_~x$r_buff0_thd3~0_209, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_541} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_101, ~#x~0.offset=|v_~#x~0.offset_204|, ~x$w_buff1~0=v_~x$w_buff1~0_103, P2Thread1of1ForFork0_#t~ite52=|v_P2Thread1of1ForFork0_#t~ite52_1|, ~x$r_buff1_thd3~0=v_~x$r_buff1_thd3~0_151, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_394, P2Thread1of1ForFork0_#t~ite50=|v_P2Thread1of1ForFork0_#t~ite50_1|, ~x$r_buff0_thd3~0=v_~x$r_buff0_thd3~0_208, P2Thread1of1ForFork0_#t~ite51=|v_P2Thread1of1ForFork0_#t~ite51_1|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_540, P2Thread1of1ForFork0_#t~ite48=|v_P2Thread1of1ForFork0_#t~ite48_1|, P2Thread1of1ForFork0_#t~ite47=|v_P2Thread1of1ForFork0_#t~ite47_2|, P2Thread1of1ForFork0_#t~ite49=|v_P2Thread1of1ForFork0_#t~ite49_1|, P2Thread1of1ForFork0_#t~mem46=|v_P2Thread1of1ForFork0_#t~mem46_2|, #memory_int=|v_#memory_int_328|, ~#x~0.base=|v_~#x~0.base_204|} AuxVars[|v_P2_#t~ite47_35|, |v_P2_#t~mem46_36|, |v_P2_#t~ite48_39|] AssignedVars[P2Thread1of1ForFork0_#t~ite48, P2Thread1of1ForFork0_#t~ite47, P2Thread1of1ForFork0_#t~ite49, P2Thread1of1ForFork0_#t~ite52, P2Thread1of1ForFork0_#t~mem46, #memory_int, ~x$r_buff1_thd3~0, ~x$w_buff1_used~0, P2Thread1of1ForFork0_#t~ite50, ~x$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite51, ~x$w_buff0_used~0] and [1486] L782-->L783: Formula: (= |v_#memory_int_6| (store |v_#memory_int_7| |v_~#x~0.base_4| (store (select |v_#memory_int_7| |v_~#x~0.base_4|) |v_~#x~0.offset_4| 2))) InVars {#memory_int=|v_#memory_int_7|, ~#x~0.base=|v_~#x~0.base_4|, ~#x~0.offset=|v_~#x~0.offset_4|} OutVars{#memory_int=|v_#memory_int_6|, ~#x~0.base=|v_~#x~0.base_4|, ~#x~0.offset=|v_~#x~0.offset_4|} AuxVars[] AssignedVars[#memory_int] under condition 1690719#(and (= ~x$r_buff1_thd4~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 1) (= ~x$r_buff1_thd2~0 0) (= ~x$w_buff1~0 ~x$w_buff0~0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~x$r_buff1_thd1~0 0) (= 0 ~x$r_buff0_thd4~0) (= 0 ~x$r_buff0_thd2~0) (= ~x$r_buff1_thd0~0 0) (= 0 ~x$w_buff0~0)) [2021-01-27 02:33:04,301 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-27 02:33:05,463 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-27 02:33:06,506 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-27 02:33:06,563 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-27 02:33:06,992 WARN L193 SmtUtils]: Spent 112.00 ms on a formula simplification. DAG size of input: 51 DAG size of output: 47 [2021-01-27 02:33:07,057 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-27 02:33:08,226 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-27 02:33:13,241 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-27 02:33:15,933 WARN L146 IndependenceRelation]: Expensive independence query (2106 ms) for statements [1494] L819-->L826: Formula: (let ((.cse14 (= (mod v_~x$w_buff0_used~0_541 256) 0)) (.cse15 (= (mod v_~x$r_buff0_thd3~0_209 256) 0)) (.cse13 (= (mod v_~x$w_buff0_used~0_540 256) 0)) (.cse16 (= (mod v_~x$w_buff1_used~0_395 256) 0)) (.cse12 (= (mod v_~x$r_buff1_thd3~0_152 256) 0))) (let ((.cse3 (select |v_#memory_int_329| |v_~#x~0.base_204|)) (.cse7 (not .cse12)) (.cse8 (not .cse16)) (.cse1 (not .cse13)) (.cse0 (or .cse13 .cse15)) (.cse9 (or .cse16 .cse12)) (.cse5 (not .cse14)) (.cse2 (not .cse15)) (.cse6 (or .cse14 .cse15))) (and (or (and .cse0 (= v_~x$r_buff0_thd3~0_209 v_~x$r_buff0_thd3~0_208)) (and .cse1 (= v_~x$r_buff0_thd3~0_208 0) .cse2)) (= (store |v_#memory_int_329| |v_~#x~0.base_204| (store .cse3 |v_~#x~0.offset_204| |v_P2_#t~ite48_39|)) |v_#memory_int_328|) (let ((.cse4 (= |v_P2_#t~mem46_36| |v_P2Thread1of1ForFork0_#t~mem46_1|))) (or (and .cse4 .cse5 (= |v_P2Thread1of1ForFork0_#t~ite47_1| |v_P2_#t~ite47_35|) .cse2 (= |v_P2_#t~ite48_39| v_~x$w_buff0~0_101)) (and (= |v_P2_#t~ite48_39| |v_P2_#t~ite47_35|) .cse6 (or (and (= |v_P2_#t~ite47_35| v_~x$w_buff1~0_103) .cse4 .cse7 .cse8) (and (= |v_P2_#t~ite47_35| |v_P2_#t~mem46_36|) (= (select .cse3 |v_~#x~0.offset_204|) |v_P2_#t~mem46_36|) .cse9))))) (let ((.cse11 (= (mod v_~x$w_buff1_used~0_394 256) 0)) (.cse10 (= (mod v_~x$r_buff0_thd3~0_208 256) 0))) (or (and (= v_~x$r_buff1_thd3~0_151 0) (or (and (not .cse10) .cse1) (and (not .cse11) .cse7))) (and (= v_~x$r_buff1_thd3~0_152 v_~x$r_buff1_thd3~0_151) (or .cse11 .cse12) (or .cse10 .cse13)))) (or (and (or (and .cse7 .cse8) (and .cse1 .cse2)) (= v_~x$w_buff1_used~0_394 0)) (and .cse0 (= v_~x$w_buff1_used~0_395 v_~x$w_buff1_used~0_394) .cse9)) (or (and .cse5 (= v_~x$w_buff0_used~0_540 0) .cse2) (and (= v_~x$w_buff0_used~0_541 v_~x$w_buff0_used~0_540) .cse6))))) InVars {~x$w_buff0~0=v_~x$w_buff0~0_101, P2Thread1of1ForFork0_#t~ite47=|v_P2Thread1of1ForFork0_#t~ite47_1|, ~#x~0.offset=|v_~#x~0.offset_204|, ~x$w_buff1~0=v_~x$w_buff1~0_103, #memory_int=|v_#memory_int_329|, ~#x~0.base=|v_~#x~0.base_204|, P2Thread1of1ForFork0_#t~mem46=|v_P2Thread1of1ForFork0_#t~mem46_1|, ~x$r_buff1_thd3~0=v_~x$r_buff1_thd3~0_152, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_395, ~x$r_buff0_thd3~0=v_~x$r_buff0_thd3~0_209, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_541} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_101, ~#x~0.offset=|v_~#x~0.offset_204|, ~x$w_buff1~0=v_~x$w_buff1~0_103, P2Thread1of1ForFork0_#t~ite52=|v_P2Thread1of1ForFork0_#t~ite52_1|, ~x$r_buff1_thd3~0=v_~x$r_buff1_thd3~0_151, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_394, P2Thread1of1ForFork0_#t~ite50=|v_P2Thread1of1ForFork0_#t~ite50_1|, ~x$r_buff0_thd3~0=v_~x$r_buff0_thd3~0_208, P2Thread1of1ForFork0_#t~ite51=|v_P2Thread1of1ForFork0_#t~ite51_1|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_540, P2Thread1of1ForFork0_#t~ite48=|v_P2Thread1of1ForFork0_#t~ite48_1|, P2Thread1of1ForFork0_#t~ite47=|v_P2Thread1of1ForFork0_#t~ite47_2|, P2Thread1of1ForFork0_#t~ite49=|v_P2Thread1of1ForFork0_#t~ite49_1|, P2Thread1of1ForFork0_#t~mem46=|v_P2Thread1of1ForFork0_#t~mem46_2|, #memory_int=|v_#memory_int_328|, ~#x~0.base=|v_~#x~0.base_204|} AuxVars[|v_P2_#t~ite47_35|, |v_P2_#t~mem46_36|, |v_P2_#t~ite48_39|] AssignedVars[P2Thread1of1ForFork0_#t~ite48, P2Thread1of1ForFork0_#t~ite47, P2Thread1of1ForFork0_#t~ite49, P2Thread1of1ForFork0_#t~ite52, P2Thread1of1ForFork0_#t~mem46, #memory_int, ~x$r_buff1_thd3~0, ~x$w_buff1_used~0, P2Thread1of1ForFork0_#t~ite50, ~x$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite51, ~x$w_buff0_used~0] and [1480] L764-->L766: Formula: (= (store |v_#memory_int_2| |v_~#x~0.base_1| (store (select |v_#memory_int_2| |v_~#x~0.base_1|) |v_~#x~0.offset_1| 1)) |v_#memory_int_1|) InVars {#memory_int=|v_#memory_int_2|, ~#x~0.base=|v_~#x~0.base_1|, ~#x~0.offset=|v_~#x~0.offset_1|} OutVars{#memory_int=|v_#memory_int_1|, ~#x~0.base=|v_~#x~0.base_1|, ~#x~0.offset=|v_~#x~0.offset_1|} AuxVars[] AssignedVars[#memory_int] under condition 1690495#(and (= ~x$r_buff1_thd4~0 0) (= ~x$r_buff1_thd2~0 0) (= ~x$w_buff1~0 ~x$w_buff0~0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~x$r_buff1_thd1~0 0) (= 0 ~x$r_buff0_thd4~0) (= 0 ~x$r_buff0_thd2~0) (= ~x$r_buff1_thd0~0 0) (= 0 ~x$w_buff0~0)) [2021-01-27 02:33:16,303 WARN L193 SmtUtils]: Spent 112.00 ms on a formula simplification. DAG size of input: 50 DAG size of output: 45 [2021-01-27 02:33:16,350 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-27 02:33:19,777 WARN L146 IndependenceRelation]: Expensive independence query (2018 ms) for statements [1494] L819-->L826: Formula: (let ((.cse14 (= (mod v_~x$w_buff0_used~0_541 256) 0)) (.cse15 (= (mod v_~x$r_buff0_thd3~0_209 256) 0)) (.cse13 (= (mod v_~x$w_buff0_used~0_540 256) 0)) (.cse16 (= (mod v_~x$w_buff1_used~0_395 256) 0)) (.cse12 (= (mod v_~x$r_buff1_thd3~0_152 256) 0))) (let ((.cse3 (select |v_#memory_int_329| |v_~#x~0.base_204|)) (.cse7 (not .cse12)) (.cse8 (not .cse16)) (.cse1 (not .cse13)) (.cse0 (or .cse13 .cse15)) (.cse9 (or .cse16 .cse12)) (.cse5 (not .cse14)) (.cse2 (not .cse15)) (.cse6 (or .cse14 .cse15))) (and (or (and .cse0 (= v_~x$r_buff0_thd3~0_209 v_~x$r_buff0_thd3~0_208)) (and .cse1 (= v_~x$r_buff0_thd3~0_208 0) .cse2)) (= (store |v_#memory_int_329| |v_~#x~0.base_204| (store .cse3 |v_~#x~0.offset_204| |v_P2_#t~ite48_39|)) |v_#memory_int_328|) (let ((.cse4 (= |v_P2_#t~mem46_36| |v_P2Thread1of1ForFork0_#t~mem46_1|))) (or (and .cse4 .cse5 (= |v_P2Thread1of1ForFork0_#t~ite47_1| |v_P2_#t~ite47_35|) .cse2 (= |v_P2_#t~ite48_39| v_~x$w_buff0~0_101)) (and (= |v_P2_#t~ite48_39| |v_P2_#t~ite47_35|) .cse6 (or (and (= |v_P2_#t~ite47_35| v_~x$w_buff1~0_103) .cse4 .cse7 .cse8) (and (= |v_P2_#t~ite47_35| |v_P2_#t~mem46_36|) (= (select .cse3 |v_~#x~0.offset_204|) |v_P2_#t~mem46_36|) .cse9))))) (let ((.cse11 (= (mod v_~x$w_buff1_used~0_394 256) 0)) (.cse10 (= (mod v_~x$r_buff0_thd3~0_208 256) 0))) (or (and (= v_~x$r_buff1_thd3~0_151 0) (or (and (not .cse10) .cse1) (and (not .cse11) .cse7))) (and (= v_~x$r_buff1_thd3~0_152 v_~x$r_buff1_thd3~0_151) (or .cse11 .cse12) (or .cse10 .cse13)))) (or (and (or (and .cse7 .cse8) (and .cse1 .cse2)) (= v_~x$w_buff1_used~0_394 0)) (and .cse0 (= v_~x$w_buff1_used~0_395 v_~x$w_buff1_used~0_394) .cse9)) (or (and .cse5 (= v_~x$w_buff0_used~0_540 0) .cse2) (and (= v_~x$w_buff0_used~0_541 v_~x$w_buff0_used~0_540) .cse6))))) InVars {~x$w_buff0~0=v_~x$w_buff0~0_101, P2Thread1of1ForFork0_#t~ite47=|v_P2Thread1of1ForFork0_#t~ite47_1|, ~#x~0.offset=|v_~#x~0.offset_204|, ~x$w_buff1~0=v_~x$w_buff1~0_103, #memory_int=|v_#memory_int_329|, ~#x~0.base=|v_~#x~0.base_204|, P2Thread1of1ForFork0_#t~mem46=|v_P2Thread1of1ForFork0_#t~mem46_1|, ~x$r_buff1_thd3~0=v_~x$r_buff1_thd3~0_152, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_395, ~x$r_buff0_thd3~0=v_~x$r_buff0_thd3~0_209, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_541} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_101, ~#x~0.offset=|v_~#x~0.offset_204|, ~x$w_buff1~0=v_~x$w_buff1~0_103, P2Thread1of1ForFork0_#t~ite52=|v_P2Thread1of1ForFork0_#t~ite52_1|, ~x$r_buff1_thd3~0=v_~x$r_buff1_thd3~0_151, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_394, P2Thread1of1ForFork0_#t~ite50=|v_P2Thread1of1ForFork0_#t~ite50_1|, ~x$r_buff0_thd3~0=v_~x$r_buff0_thd3~0_208, P2Thread1of1ForFork0_#t~ite51=|v_P2Thread1of1ForFork0_#t~ite51_1|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_540, P2Thread1of1ForFork0_#t~ite48=|v_P2Thread1of1ForFork0_#t~ite48_1|, P2Thread1of1ForFork0_#t~ite47=|v_P2Thread1of1ForFork0_#t~ite47_2|, P2Thread1of1ForFork0_#t~ite49=|v_P2Thread1of1ForFork0_#t~ite49_1|, P2Thread1of1ForFork0_#t~mem46=|v_P2Thread1of1ForFork0_#t~mem46_2|, #memory_int=|v_#memory_int_328|, ~#x~0.base=|v_~#x~0.base_204|} AuxVars[|v_P2_#t~ite47_35|, |v_P2_#t~mem46_36|, |v_P2_#t~ite48_39|] AssignedVars[P2Thread1of1ForFork0_#t~ite48, P2Thread1of1ForFork0_#t~ite47, P2Thread1of1ForFork0_#t~ite49, P2Thread1of1ForFork0_#t~ite52, P2Thread1of1ForFork0_#t~mem46, #memory_int, ~x$r_buff1_thd3~0, ~x$w_buff1_used~0, P2Thread1of1ForFork0_#t~ite50, ~x$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite51, ~x$w_buff0_used~0] and [1480] L764-->L766: Formula: (= (store |v_#memory_int_2| |v_~#x~0.base_1| (store (select |v_#memory_int_2| |v_~#x~0.base_1|) |v_~#x~0.offset_1| 1)) |v_#memory_int_1|) InVars {#memory_int=|v_#memory_int_2|, ~#x~0.base=|v_~#x~0.base_1|, ~#x~0.offset=|v_~#x~0.offset_1|} OutVars{#memory_int=|v_#memory_int_1|, ~#x~0.base=|v_~#x~0.base_1|, ~#x~0.offset=|v_~#x~0.offset_1|} AuxVars[] AssignedVars[#memory_int] under condition 1690776#(and (= ~x$r_buff1_thd4~0 0) (= ~x$r_buff1_thd2~0 0) (= ~x$w_buff1~0 ~x$w_buff0~0) (= 2 (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|)) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~x$r_buff1_thd1~0 0) (= 0 ~x$r_buff0_thd4~0) (= 0 ~x$r_buff0_thd2~0) (= ~x$r_buff1_thd0~0 0) (= 0 ~x$w_buff0~0)) Size of Word is: 110 and size of Sequence is : 111[2021-01-27 02:33:55,022 INFO L164 SleepSetCegar]: Size of mCounterexample is: 111 [2021-01-27 02:33:55,025 INFO L165 SleepSetCegar]: [1690507#[ULTIMATE.startENTRY]true, 1690510#[L-1]true, 1690513#[L-1-1]true, 1690516#[L17]true, 1690519#[L17-1]true, 1690522#[L17-2]true, 1690525#[L17-3]true, 1690528#[L17-4]true, 1690531#[L712](= ~__unbuffered_cnt~0 0), 1690534#[L714](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_cnt~0 0)), 1690537#[L715](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_cnt~0 0)), 1690540#[L716](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_cnt~0 0)), 1690543#[L717](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_cnt~0 0)), 1690546#[L718](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_cnt~0 0)), 1690549#[L719](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_cnt~0 0)), 1690552#[L720](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_cnt~0 0)), 1690555#[L721](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_cnt~0 0)), 1690558#[L722](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_cnt~0 0)), 1690561#[L723](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_cnt~0 0)), 1690564#[L724](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_cnt~0 0)), 1690567#[L725](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_cnt~0 0)), 1690570#[L726](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_cnt~0 0)), 1690573#[L727](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_cnt~0 0)), 1690576#[L728](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_cnt~0 0)), 1690579#[L729](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_cnt~0 0)), 1690582#[L730](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_cnt~0 0)), 1690585#[L731](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_cnt~0 0)), 1690588#[L732](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_cnt~0 0)), 1690591#[L733](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_cnt~0 0)), 1690594#[L734](and (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 1690597#[L736](and (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 1690600#[L736-1](and (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 1690603#[L736-2](and (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 1690606#[L738](and (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 1690609#[L739](and (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 1690612#[L740](and (= 0 ~x$r_buff0_thd0~0) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 1690615#[L741](and (= 0 ~x$r_buff0_thd0~0) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 1690618#[L742](and (= 0 ~x$r_buff0_thd0~0) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= 0 ~x$r_buff0_thd2~0) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 1690621#[L743](and (= 0 ~x$r_buff0_thd0~0) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= 0 ~x$r_buff0_thd2~0) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 1690624#[L744](and (= 0 ~x$r_buff0_thd0~0) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= 0 ~x$r_buff0_thd4~0) (= 0 ~x$r_buff0_thd2~0) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 1690627#[L745](and (= 0 ~x$r_buff0_thd0~0) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= 0 ~x$r_buff0_thd4~0) (= 0 ~x$r_buff0_thd2~0) (= ~x$r_buff1_thd0~0 0) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 1690630#[L746](and (= 0 ~x$r_buff0_thd0~0) (= ~x$r_buff1_thd1~0 0) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= 0 ~x$r_buff0_thd4~0) (= 0 ~x$r_buff0_thd2~0) (= ~x$r_buff1_thd0~0 0) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 1690633#[L747](and (= ~x$r_buff1_thd2~0 0) (= 0 ~x$r_buff0_thd0~0) (= ~x$r_buff1_thd1~0 0) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= 0 ~x$r_buff0_thd4~0) (= 0 ~x$r_buff0_thd2~0) (= ~x$r_buff1_thd0~0 0) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 1690636#[L748](and (= ~x$r_buff1_thd2~0 0) (= 0 ~x$r_buff0_thd0~0) (= ~x$r_buff1_thd1~0 0) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= 0 ~x$r_buff0_thd4~0) (= 0 ~x$r_buff0_thd2~0) (= ~x$r_buff1_thd0~0 0) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 1690639#[L749](and (= ~x$r_buff1_thd4~0 0) (= ~x$r_buff1_thd2~0 0) (= 0 ~x$r_buff0_thd0~0) (= ~x$r_buff1_thd1~0 0) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= 0 ~x$r_buff0_thd4~0) (= 0 ~x$r_buff0_thd2~0) (= ~x$r_buff1_thd0~0 0) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 1690642#[L750](and (= ~x$r_buff1_thd4~0 0) (= ~x$r_buff1_thd2~0 0) (= 0 ~x$r_buff0_thd0~0) (= ~x$r_buff1_thd1~0 0) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= 0 ~x$r_buff0_thd4~0) (= 0 ~x$r_buff0_thd2~0) (= ~x$r_buff1_thd0~0 0) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 1690645#[L751](and (= ~x$r_buff1_thd4~0 0) (= ~x$r_buff1_thd2~0 0) (= 0 ~x$r_buff0_thd0~0) (= ~x$r_buff1_thd1~0 0) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= 0 ~x$r_buff0_thd4~0) (= 0 ~x$r_buff0_thd2~0) (= ~x$r_buff1_thd0~0 0) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 1690648#[L752](and (= ~x$r_buff1_thd4~0 0) (= ~x$r_buff1_thd2~0 0) (= 0 ~x$r_buff0_thd0~0) (= ~x$r_buff1_thd1~0 0) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= 0 ~x$r_buff0_thd4~0) (= 0 ~x$r_buff0_thd2~0) (= ~x$r_buff1_thd0~0 0) (= 0 ~x$w_buff0~0) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 1690651#[L753](and (= ~x$r_buff1_thd4~0 0) (= ~x$r_buff1_thd0~0 0) (= ~x$r_buff1_thd2~0 0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~x$r_buff1_thd1~0 0) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= 0 ~x$r_buff0_thd4~0) (= 0 ~x$r_buff0_thd2~0) (= 0 ~x$w_buff0~0) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 1690654#[L754](and (= ~x$r_buff1_thd4~0 0) (= ~x$r_buff1_thd0~0 0) (= ~x$r_buff1_thd2~0 0) (= ~x$w_buff1~0 ~x$w_buff0~0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~x$r_buff1_thd1~0 0) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= 0 ~x$r_buff0_thd4~0) (= 0 ~x$r_buff0_thd2~0) (= 0 ~x$w_buff0~0) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 1690657#[L756](and (= ~x$r_buff1_thd4~0 0) (= ~x$r_buff1_thd0~0 0) (= ~x$r_buff1_thd2~0 0) (= ~x$w_buff1~0 ~x$w_buff0~0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~x$r_buff1_thd1~0 0) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= 0 ~x$r_buff0_thd4~0) (= 0 ~x$r_buff0_thd2~0) (= 0 ~x$w_buff0~0) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 1690660#[L757](and (= ~x$r_buff1_thd4~0 0) (= ~x$r_buff1_thd0~0 0) (= ~x$r_buff1_thd2~0 0) (= ~x$w_buff1~0 ~x$w_buff0~0) (= ~y~0 0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~x$r_buff1_thd1~0 0) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= 0 ~x$r_buff0_thd4~0) (= 0 ~x$r_buff0_thd2~0) (= 0 ~x$w_buff0~0) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 1690663#[L758](and (= ~x$r_buff1_thd4~0 0) (= ~x$r_buff1_thd0~0 0) (= ~x$r_buff1_thd2~0 0) (= ~x$w_buff1~0 ~x$w_buff0~0) (= ~y~0 0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~x$r_buff1_thd1~0 0) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= 0 ~x$r_buff0_thd4~0) (= 0 ~x$r_buff0_thd2~0) (= 0 ~x$w_buff0~0) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 1690666#[L759](and (= ~x$r_buff1_thd4~0 0) (= ~x$r_buff1_thd0~0 0) (= ~x$r_buff1_thd2~0 0) (= ~x$w_buff1~0 ~x$w_buff0~0) (= ~y~0 0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~x$r_buff1_thd1~0 0) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= 0 ~x$r_buff0_thd4~0) (= 0 ~x$r_buff0_thd2~0) (= 0 ~x$w_buff0~0) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 1690669#[L-1-2](and (= ~x$r_buff1_thd4~0 0) (= ~x$r_buff1_thd0~0 0) (= ~x$r_buff1_thd2~0 0) (= ~x$w_buff1~0 ~x$w_buff0~0) (= ~y~0 0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~x$r_buff1_thd1~0 0) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= 0 ~x$r_buff0_thd4~0) (= 0 ~x$r_buff0_thd2~0) (= 0 ~x$w_buff0~0) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 1690672#[L-1-3](and (= ~x$r_buff1_thd4~0 0) (= ~x$r_buff1_thd0~0 0) (= ~x$r_buff1_thd2~0 0) (= ~x$w_buff1~0 ~x$w_buff0~0) (= ~y~0 0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~x$r_buff1_thd1~0 0) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= 0 ~x$r_buff0_thd4~0) (= 0 ~x$r_buff0_thd2~0) (= 0 ~x$w_buff0~0) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 1690675#[L860](and (= ~x$r_buff1_thd4~0 0) (= ~x$r_buff1_thd0~0 0) (= ~x$r_buff1_thd2~0 0) (= ~x$w_buff1~0 ~x$w_buff0~0) (= ~y~0 0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~x$r_buff1_thd1~0 0) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= 0 ~x$r_buff0_thd4~0) (= 0 ~x$r_buff0_thd2~0) (= 0 ~x$w_buff0~0) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 1690678#[L860-1](and (= ~x$r_buff1_thd4~0 0) (= ~x$r_buff1_thd0~0 0) (= ~x$r_buff1_thd2~0 0) (= ~x$w_buff1~0 ~x$w_buff0~0) (= ~y~0 0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~x$r_buff1_thd1~0 0) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= 0 ~x$r_buff0_thd4~0) (= 0 ~x$r_buff0_thd2~0) (= 0 ~x$w_buff0~0) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 1690681#[L861](and (= ~x$r_buff1_thd4~0 0) (= ~x$r_buff1_thd0~0 0) (= ~x$r_buff1_thd2~0 0) (= ~x$w_buff1~0 ~x$w_buff0~0) (= ~y~0 0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~x$r_buff1_thd1~0 0) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= 0 ~x$r_buff0_thd4~0) (= 0 ~x$r_buff0_thd2~0) (= 0 ~x$w_buff0~0) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 1690684#[L861-1, P0ENTRY](and (= ~x$r_buff1_thd4~0 0) (= ~x$r_buff1_thd0~0 0) (= ~x$r_buff1_thd2~0 0) (= ~x$w_buff1~0 ~x$w_buff0~0) (= ~y~0 0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~x$r_buff1_thd1~0 0) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= 0 ~x$r_buff0_thd4~0) (= 0 ~x$r_buff0_thd2~0) (= 0 ~x$w_buff0~0) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 1690687#[P0ENTRY, L862](and (= ~x$r_buff1_thd4~0 0) (= ~x$r_buff1_thd0~0 0) (= ~x$r_buff1_thd2~0 0) (= ~x$w_buff1~0 ~x$w_buff0~0) (= ~y~0 0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~x$r_buff1_thd1~0 0) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= 0 ~x$r_buff0_thd4~0) (= 0 ~x$r_buff0_thd2~0) (= 0 ~x$w_buff0~0) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 1690693#[L862-1, P0ENTRY](and (= ~x$r_buff1_thd4~0 0) (= ~x$r_buff1_thd0~0 0) (= ~x$r_buff1_thd2~0 0) (= ~x$w_buff1~0 ~x$w_buff0~0) (= ~y~0 0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~x$r_buff1_thd1~0 0) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= 0 ~x$r_buff0_thd4~0) (= 0 ~x$r_buff0_thd2~0) (= 0 ~x$w_buff0~0) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 1690699#[L863, P0ENTRY](and (= ~x$r_buff1_thd4~0 0) (= ~x$r_buff1_thd0~0 0) (= ~x$r_buff1_thd2~0 0) (= ~x$w_buff1~0 ~x$w_buff0~0) (= ~y~0 0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~x$r_buff1_thd1~0 0) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= 0 ~x$r_buff0_thd4~0) (= 0 ~x$r_buff0_thd2~0) (= 0 ~x$w_buff0~0) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 1690707#[L863, L762](and (= ~x$r_buff1_thd4~0 0) (= ~x$r_buff1_thd0~0 0) (= ~x$r_buff1_thd2~0 0) (= ~x$w_buff1~0 ~x$w_buff0~0) (= ~y~0 0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~x$r_buff1_thd1~0 0) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= 0 ~x$r_buff0_thd4~0) (= 0 ~x$r_buff0_thd2~0) (= 0 ~x$w_buff0~0) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 1690713#[L762, P1ENTRY, L863-1](and (= ~x$r_buff1_thd4~0 0) (= ~x$r_buff1_thd0~0 0) (= ~x$r_buff1_thd2~0 0) (= ~x$w_buff1~0 ~x$w_buff0~0) (= ~y~0 0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~x$r_buff1_thd1~0 0) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= 0 ~x$r_buff0_thd4~0) (= 0 ~x$r_buff0_thd2~0) (= 0 ~x$w_buff0~0) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 2065361#[L762, P1ENTRY, L864](and (= ~x$r_buff1_thd4~0 0) (= ~x$r_buff1_thd0~0 0) (= ~x$r_buff1_thd2~0 0) (= ~x$w_buff1~0 ~x$w_buff0~0) (= ~y~0 0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~x$r_buff1_thd1~0 0) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= 0 ~x$r_buff0_thd4~0) (= 0 ~x$r_buff0_thd2~0) (= 0 ~x$w_buff0~0) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 2065367#[L762, P1ENTRY, L864-1](and (= ~x$r_buff1_thd4~0 0) (= ~x$r_buff1_thd0~0 0) (= ~x$r_buff1_thd2~0 0) (= ~x$w_buff1~0 ~x$w_buff0~0) (= ~y~0 0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~x$r_buff1_thd1~0 0) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= 0 ~x$r_buff0_thd4~0) (= 0 ~x$r_buff0_thd2~0) (= 0 ~x$w_buff0~0) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 2065375#[L762, P1ENTRY, L865](and (= ~x$r_buff1_thd4~0 0) (= ~x$r_buff1_thd0~0 0) (= ~x$r_buff1_thd2~0 0) (= ~x$w_buff1~0 ~x$w_buff0~0) (= ~y~0 0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~x$r_buff1_thd1~0 0) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= 0 ~x$r_buff0_thd4~0) (= 0 ~x$r_buff0_thd2~0) (= 0 ~x$w_buff0~0) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 2065379#[L762, L782, L865](and (= ~x$r_buff1_thd4~0 0) (= ~x$r_buff1_thd0~0 0) (= ~x$r_buff1_thd2~0 0) (= ~x$w_buff1~0 ~x$w_buff0~0) (= ~y~0 0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~x$r_buff1_thd1~0 0) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= 0 ~x$r_buff0_thd4~0) (= 0 ~x$r_buff0_thd2~0) (= 0 ~x$w_buff0~0) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 2065387#[L762, P2ENTRY, L782, L865-1](and (= ~x$r_buff1_thd4~0 0) (= ~x$r_buff1_thd0~0 0) (= ~x$r_buff1_thd2~0 0) (= ~x$w_buff1~0 ~x$w_buff0~0) (= ~y~0 0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~x$r_buff1_thd1~0 0) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= 0 ~x$r_buff0_thd4~0) (= 0 ~x$r_buff0_thd2~0) (= 0 ~x$w_buff0~0) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 2542488#[L762, P2ENTRY, L782, L866](and (= ~x$r_buff1_thd4~0 0) (= ~x$r_buff1_thd0~0 0) (= ~x$r_buff1_thd2~0 0) (= ~x$w_buff1~0 ~x$w_buff0~0) (= ~y~0 0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~x$r_buff1_thd1~0 0) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= 0 ~x$r_buff0_thd4~0) (= 0 ~x$r_buff0_thd2~0) (= 0 ~x$w_buff0~0) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 2542516#[L762, P2ENTRY, L782, L866-1](and (= ~x$r_buff1_thd4~0 0) (= ~x$r_buff1_thd0~0 0) (= ~x$r_buff1_thd2~0 0) (= ~x$w_buff1~0 ~x$w_buff0~0) (= ~y~0 0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~x$r_buff1_thd1~0 0) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= 0 ~x$r_buff0_thd4~0) (= 0 ~x$r_buff0_thd2~0) (= 0 ~x$w_buff0~0) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 2542544#[L762, P2ENTRY, L782, L867](and (= ~x$r_buff1_thd4~0 0) (= ~x$r_buff1_thd0~0 0) (= ~x$r_buff1_thd2~0 0) (= ~x$w_buff1~0 ~x$w_buff0~0) (= ~y~0 0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~x$r_buff1_thd1~0 0) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= 0 ~x$r_buff0_thd4~0) (= 0 ~x$r_buff0_thd2~0) (= 0 ~x$w_buff0~0) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 2542574#[L762, L782, L799, L867](and (= ~x$r_buff1_thd4~0 0) (= ~x$r_buff1_thd0~0 0) (= ~x$r_buff1_thd2~0 0) (= ~x$w_buff1~0 ~x$w_buff0~0) (= ~y~0 0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~x$r_buff1_thd1~0 0) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= 0 ~x$r_buff0_thd4~0) (= 0 ~x$r_buff0_thd2~0) (= 0 ~x$w_buff0~0) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 2550750#[L762, L782, L867, L816](and (= ~x$r_buff1_thd4~0 0) (= ~x$r_buff1_thd0~0 0) (= ~x$r_buff1_thd2~0 0) (= ~x$w_buff1~0 ~x$w_buff0~0) (= ~y~0 0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~x$r_buff1_thd1~0 0) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= 0 ~x$r_buff0_thd4~0) (= 0 ~x$r_buff0_thd2~0) (= 0 ~x$w_buff0~0) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 2550778#[L762, L782, L867, L819](and (= ~x$r_buff1_thd4~0 0) (= ~y~0 1) (= ~x$r_buff1_thd0~0 0) (= ~x$r_buff1_thd2~0 0) (= ~x$w_buff1~0 ~x$w_buff0~0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~x$r_buff1_thd1~0 0) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= 0 ~x$r_buff0_thd4~0) (= 0 ~x$r_buff0_thd2~0) (= 0 ~x$w_buff0~0) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 2550816#[L762, L782, L826, L867](and (= ~x$r_buff1_thd4~0 0) (= ~y~0 1) (= ~x$r_buff1_thd0~0 0) (= ~x$r_buff1_thd2~0 0) (= ~x$w_buff1~0 ~x$w_buff0~0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~x$r_buff1_thd1~0 0) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= 0 ~x$r_buff0_thd4~0) (= 0 ~x$r_buff0_thd2~0) (= 0 ~x$w_buff0~0) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 2645847#[L762, L782, L867, L829](and (= ~x$r_buff1_thd4~0 0) (= ~y~0 1) (= ~x$r_buff1_thd0~0 0) (<= ~__unbuffered_cnt~0 1) (= ~x$r_buff1_thd2~0 0) (= ~x$w_buff1~0 ~x$w_buff0~0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~x$r_buff1_thd1~0 0) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= 0 ~x$r_buff0_thd4~0) (= 0 ~x$r_buff0_thd2~0) (= 0 ~x$w_buff0~0) (<= ~main$tmp_guard0~0 0)), 2651583#[L762, L782, L867, P2FINAL](and (= ~x$r_buff1_thd4~0 0) (= ~y~0 1) (= ~x$r_buff1_thd0~0 0) (<= ~__unbuffered_cnt~0 1) (= ~x$r_buff1_thd2~0 0) (= ~x$w_buff1~0 ~x$w_buff0~0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~x$r_buff1_thd1~0 0) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= 0 ~x$r_buff0_thd4~0) (= 0 ~x$r_buff0_thd2~0) (= 0 ~x$w_buff0~0) (<= ~main$tmp_guard0~0 0)), 2651611#[L762, L782, P2EXIT, L867](and (= ~x$r_buff1_thd4~0 0) (= ~y~0 1) (= ~x$r_buff1_thd0~0 0) (<= ~__unbuffered_cnt~0 1) (= ~x$r_buff1_thd2~0 0) (= ~x$w_buff1~0 ~x$w_buff0~0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~x$r_buff1_thd1~0 0) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= 0 ~x$r_buff0_thd4~0) (= 0 ~x$r_buff0_thd2~0) (= 0 ~x$w_buff0~0) (<= ~main$tmp_guard0~0 0)), 2651626#[L762, L782, P2EXIT, L867-1, P3ENTRY](and (= ~x$r_buff1_thd4~0 0) (= ~y~0 1) (= ~x$r_buff1_thd0~0 0) (<= ~__unbuffered_cnt~0 1) (= ~x$r_buff1_thd2~0 0) (= ~x$w_buff1~0 ~x$w_buff0~0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~x$r_buff1_thd1~0 0) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= 0 ~x$r_buff0_thd4~0) (= 0 ~x$r_buff0_thd2~0) (= 0 ~x$w_buff0~0) (<= ~main$tmp_guard0~0 0)), 2651651#[L762, L782, P2EXIT, L868, P3ENTRY](and (= ~x$r_buff1_thd4~0 0) (= ~y~0 1) (= ~x$r_buff1_thd0~0 0) (<= ~__unbuffered_cnt~0 1) (= ~x$r_buff1_thd2~0 0) (= ~x$w_buff1~0 ~x$w_buff0~0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~x$r_buff1_thd1~0 0) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= 0 ~x$r_buff0_thd4~0) (= 0 ~x$r_buff0_thd2~0) (= 0 ~x$w_buff0~0) (<= ~main$tmp_guard0~0 0)), 2651679#[L762, L782, L834, P2EXIT, L868](and (= ~x$r_buff1_thd4~0 0) (= ~y~0 1) (= ~x$r_buff1_thd0~0 0) (<= ~__unbuffered_cnt~0 1) (= ~x$r_buff1_thd2~0 0) (= ~x$w_buff1~0 ~x$w_buff0~0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~x$r_buff1_thd1~0 0) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= 0 ~x$r_buff0_thd4~0) (= 0 ~x$r_buff0_thd2~0) (= 0 ~x$w_buff0~0) (<= ~main$tmp_guard0~0 0)), 2655697#[L762, L782, P2EXIT, L836, L868](and (= ~x$r_buff1_thd4~0 0) (= ~x$r_buff1_thd0~0 0) (<= ~__unbuffered_cnt~0 1) (= ~x$r_buff1_thd2~0 0) (= ~x$w_buff1~0 ~x$w_buff0~0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~x$r_buff1_thd1~0 0) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= 0 ~x$r_buff0_thd4~0) (= 0 ~x$r_buff0_thd2~0) (= 0 ~x$w_buff0~0) (<= ~main$tmp_guard0~0 0)), 2655715#[L764, L782, P2EXIT, L836, L868](and (= ~x$r_buff1_thd4~0 0) (= ~x$r_buff1_thd0~0 0) (<= ~__unbuffered_cnt~0 1) (= ~x$r_buff1_thd2~0 0) (= ~x$w_buff1~0 ~x$w_buff0~0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~x$r_buff1_thd1~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= 0 ~x$r_buff0_thd4~0) (= 0 ~x$r_buff0_thd2~0) (= 0 ~x$w_buff0~0) (<= ~main$tmp_guard0~0 0)), 2655731#[L782, P2EXIT, L836, L868, L766](and (= ~x$r_buff1_thd4~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 1) (= ~x$r_buff1_thd0~0 0) (<= ~__unbuffered_cnt~0 1) (= ~x$r_buff1_thd2~0 0) (= ~x$w_buff1~0 ~x$w_buff0~0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~x$r_buff1_thd1~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= 0 ~x$r_buff0_thd4~0) (= 0 ~x$r_buff0_thd2~0) (= 0 ~x$w_buff0~0) (<= ~main$tmp_guard0~0 0)), 2655747#[L782, P2EXIT, L836, L868, L774](and (= ~x$r_buff1_thd4~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 1) (= ~x$r_buff1_thd0~0 0) (<= ~__unbuffered_cnt~0 1) (= ~x$r_buff1_thd2~0 0) (= ~x$w_buff1~0 ~x$w_buff0~0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~x$r_buff1_thd1~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= 0 ~x$r_buff0_thd4~0) (= 0 ~x$r_buff0_thd2~0) (= 0 ~x$w_buff0~0) (<= ~main$tmp_guard0~0 0)), 2655764#[L782, P2EXIT, L836, L868, L777](and (= ~x$r_buff1_thd4~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 1) (= ~x$r_buff1_thd0~0 0) (= ~x$r_buff1_thd2~0 0) (= ~x$w_buff1~0 ~x$w_buff0~0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~x$r_buff1_thd1~0 0) (<= ~__unbuffered_cnt~0 2) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= 0 ~x$r_buff0_thd4~0) (= 0 ~x$r_buff0_thd2~0) (= 0 ~x$w_buff0~0) (<= ~main$tmp_guard0~0 0)), 2655781#[L782, P2EXIT, L836, P0FINAL, L868](and (= ~x$r_buff1_thd4~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 1) (= ~x$r_buff1_thd0~0 0) (= ~x$r_buff1_thd2~0 0) (= ~x$w_buff1~0 ~x$w_buff0~0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~x$r_buff1_thd1~0 0) (<= ~__unbuffered_cnt~0 2) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= 0 ~x$r_buff0_thd4~0) (= 0 ~x$r_buff0_thd2~0) (= 0 ~x$w_buff0~0) (<= ~main$tmp_guard0~0 0)), 2655798#[P0EXIT, L782, P2EXIT, L836, L868](and (= ~x$r_buff1_thd4~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 1) (= ~x$r_buff1_thd0~0 0) (= ~x$r_buff1_thd2~0 0) (= ~x$w_buff1~0 ~x$w_buff0~0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~x$r_buff1_thd1~0 0) (<= ~__unbuffered_cnt~0 2) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= 0 ~x$r_buff0_thd4~0) (= 0 ~x$r_buff0_thd2~0) (= 0 ~x$w_buff0~0) (<= ~main$tmp_guard0~0 0)), 2655807#[P0EXIT, P2EXIT, L836, L783, L868](and (= ~x$r_buff1_thd4~0 0) (= ~x$r_buff1_thd0~0 0) (= ~x$r_buff1_thd2~0 0) (= ~x$w_buff1~0 ~x$w_buff0~0) (= 2 (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|)) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~x$r_buff1_thd1~0 0) (<= ~__unbuffered_cnt~0 2) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= 0 ~x$r_buff0_thd4~0) (= 0 ~x$r_buff0_thd2~0) (= 0 ~x$w_buff0~0) (<= ~main$tmp_guard0~0 0)), 2655813#[P0EXIT, P2EXIT, L836, L791, L868](and (= ~x$r_buff1_thd4~0 0) (= ~x$r_buff1_thd0~0 0) (= ~x$r_buff1_thd2~0 0) (= ~x$w_buff1~0 ~x$w_buff0~0) (= 2 (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|)) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~x$r_buff1_thd1~0 0) (<= ~__unbuffered_cnt~0 2) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= 0 ~x$r_buff0_thd4~0) (= 0 ~x$r_buff0_thd2~0) (= 0 ~x$w_buff0~0) (<= ~main$tmp_guard0~0 0)), 2655821#[P0EXIT, P2EXIT, L836, L794, L868](and (= ~x$r_buff1_thd4~0 0) (= ~x$r_buff1_thd0~0 0) (= ~x$r_buff1_thd2~0 0) (= ~x$w_buff1~0 ~x$w_buff0~0) (= 2 (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|)) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~x$r_buff1_thd1~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= 0 ~x$r_buff0_thd4~0) (= 0 ~x$r_buff0_thd2~0) (= 0 ~x$w_buff0~0) (<= ~main$tmp_guard0~0 0)), 2655825#[P0EXIT, P2EXIT, L836, P1FINAL, L868](and (= ~x$r_buff1_thd4~0 0) (= ~x$r_buff1_thd0~0 0) (= ~x$r_buff1_thd2~0 0) (= ~x$w_buff1~0 ~x$w_buff0~0) (= 2 (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|)) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~x$r_buff1_thd1~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= 0 ~x$r_buff0_thd4~0) (= 0 ~x$r_buff0_thd2~0) (= 0 ~x$w_buff0~0) (<= ~main$tmp_guard0~0 0)), 2655835#[P0EXIT, P2EXIT, L836, L868, P1EXIT](and (= ~x$r_buff1_thd4~0 0) (= ~x$r_buff1_thd0~0 0) (= ~x$r_buff1_thd2~0 0) (= ~x$w_buff1~0 ~x$w_buff0~0) (= 2 (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|)) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~x$r_buff1_thd1~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= 0 ~x$r_buff0_thd4~0) (= 0 ~x$r_buff0_thd2~0) (= 0 ~x$w_buff0~0) (<= ~main$tmp_guard0~0 0)), 2655841#[P0EXIT, L843, P2EXIT, L868, P1EXIT](and (= ~x$r_buff1_thd4~0 0) (= ~x$r_buff1_thd0~0 0) (= ~x$r_buff1_thd2~0 0) (= ~x$w_buff1~0 ~x$w_buff0~0) (= 2 (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|)) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~x$r_buff1_thd1~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= 0 ~x$r_buff0_thd4~0) (= 0 ~x$r_buff0_thd2~0) (= 0 ~x$w_buff0~0) (<= ~main$tmp_guard0~0 0)), 2655846#[P0EXIT, P2EXIT, L868, L846, P1EXIT](and (= ~x$r_buff1_thd4~0 0) (= ~x$r_buff1_thd0~0 0) (= ~x$r_buff1_thd2~0 0) (= ~x$w_buff1~0 ~x$w_buff0~0) (= 2 (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|)) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~x$r_buff1_thd1~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= 0 ~x$r_buff0_thd4~0) (= 0 ~x$r_buff0_thd2~0) (= 0 ~x$w_buff0~0) (<= ~main$tmp_guard0~0 0)), 2655851#[P0EXIT, P2EXIT, L870, L846, P1EXIT](and (= ~x$r_buff1_thd4~0 0) (= ~x$r_buff1_thd2~0 0) (= ~x$w_buff1~0 ~x$w_buff0~0) (= 2 (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|)) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~x$r_buff1_thd1~0 0) (= 0 ~x$r_buff0_thd4~0) (= 0 ~x$r_buff0_thd2~0) (= ~x$r_buff1_thd0~0 0) (= 0 ~x$w_buff0~0)), 2655857#[P0EXIT, L871, P2EXIT, L846, P1EXIT](and (= ~x$r_buff1_thd4~0 0) (= ~x$r_buff1_thd2~0 0) (= ~x$w_buff1~0 ~x$w_buff0~0) (= 2 (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|)) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~x$r_buff1_thd1~0 0) (= 0 ~x$r_buff0_thd4~0) (= 0 ~x$r_buff0_thd2~0) (= ~x$r_buff1_thd0~0 0) (= 0 ~x$w_buff0~0)), 2655865#[P0EXIT, P2EXIT, L2, L846, P1EXIT](and (= ~x$r_buff1_thd4~0 0) (= ~x$r_buff1_thd2~0 0) (= ~x$w_buff1~0 ~x$w_buff0~0) (= 2 (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|)) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~x$r_buff1_thd1~0 0) (= 0 ~x$r_buff0_thd4~0) (= 0 ~x$r_buff0_thd2~0) (= ~x$r_buff1_thd0~0 0) (= 0 ~x$w_buff0~0)), 2655869#[P0EXIT, P2EXIT, L3, L846, P1EXIT](and (= ~x$r_buff1_thd4~0 0) (= ~x$r_buff1_thd2~0 0) (= ~x$w_buff1~0 ~x$w_buff0~0) (= 2 (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|)) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~x$r_buff1_thd1~0 0) (= 0 ~x$r_buff0_thd4~0) (= 0 ~x$r_buff0_thd2~0) (= ~x$r_buff1_thd0~0 0) (= 0 ~x$w_buff0~0)), 2655877#[P0EXIT, P2EXIT, L2-1, L846, P1EXIT](and (= ~x$r_buff1_thd4~0 0) (= ~x$r_buff1_thd2~0 0) (= ~x$w_buff1~0 ~x$w_buff0~0) (= 2 (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|)) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~x$r_buff1_thd1~0 0) (= 0 ~x$r_buff0_thd4~0) (= 0 ~x$r_buff0_thd2~0) (= ~x$r_buff1_thd0~0 0) (= 0 ~x$w_buff0~0)), 2655890#[P0EXIT, P2EXIT, L878, L846, P1EXIT](and (= ~x$r_buff1_thd4~0 0) (= ~x$r_buff1_thd2~0 0) (= ~x$w_buff1~0 ~x$w_buff0~0) (= 2 (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|)) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~x$r_buff1_thd1~0 0) (= 0 ~x$r_buff0_thd4~0) (= 0 ~x$r_buff0_thd2~0) (= ~x$r_buff1_thd0~0 0) (= 0 ~x$w_buff0~0)), 2655896#[P0EXIT, P2EXIT, L846, P1EXIT, L896](and (= ~x$r_buff1_thd4~0 0) (= ~x$r_buff1_thd2~0 0) (= ~x$w_buff1~0 ~x$w_buff0~0) (= 2 (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|)) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~x$r_buff1_thd1~0 0) (= 0 ~x$r_buff0_thd4~0) (= 0 ~x$r_buff0_thd2~0) (= ~x$r_buff1_thd0~0 0) (= 0 ~x$w_buff0~0)), 2655902#[P0EXIT, P2EXIT, L846, P1EXIT, L897](and (= ~x$r_buff1_thd4~0 0) (= ~x$r_buff1_thd2~0 0) (= ~x$w_buff1~0 ~x$w_buff0~0) (= 2 (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|)) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~x$r_buff1_thd1~0 0) (= 0 ~x$r_buff0_thd4~0) (= 0 ~x$r_buff0_thd2~0) (= ~x$r_buff1_thd0~0 0) (= 0 ~x$w_buff0~0)), 2655908#[P0EXIT, P2EXIT, L846, P1EXIT, L18](and (= ~x$r_buff1_thd4~0 0) (= ~x$r_buff1_thd2~0 0) (= ~x$w_buff1~0 ~x$w_buff0~0) (= 2 (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|)) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~x$r_buff1_thd1~0 0) (= 0 ~x$r_buff0_thd4~0) (= 0 ~x$r_buff0_thd2~0) (= ~x$r_buff1_thd0~0 0) (= 0 ~x$w_buff0~0)), 2655914#[P0EXIT, P2EXIT, L18-1, L846, P1EXIT](and (= ~x$r_buff1_thd4~0 0) (= ~x$r_buff1_thd2~0 0) (= ~x$w_buff1~0 ~x$w_buff0~0) (= 2 (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|)) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~x$r_buff1_thd1~0 0) (= 0 ~x$r_buff0_thd4~0) (= 0 ~x$r_buff0_thd2~0) (= ~x$r_buff1_thd0~0 0) (= 0 ~x$w_buff0~0)), 2655920#[P0EXIT, P2EXIT, L18-2, L846, P1EXIT](and (= ~x$r_buff1_thd4~0 0) (= ~x$r_buff1_thd2~0 0) (= ~x$w_buff1~0 ~x$w_buff0~0) (= 2 (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|)) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~x$r_buff1_thd1~0 0) (= 0 ~x$r_buff0_thd4~0) (= 0 ~x$r_buff0_thd2~0) (= ~x$r_buff1_thd0~0 0) (= 0 ~x$w_buff0~0)), 2655929#[P0EXIT, L17-5, P2EXIT, L846, P1EXIT](and (= ~x$r_buff1_thd4~0 0) (= ~x$r_buff1_thd2~0 0) (= ~x$w_buff1~0 ~x$w_buff0~0) (= 2 (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|)) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~x$r_buff1_thd1~0 0) (= 0 ~x$r_buff0_thd4~0) (= 0 ~x$r_buff0_thd2~0) (= ~x$r_buff1_thd0~0 0) (= 0 ~x$w_buff0~0)), 2655939#[P0EXIT, P2EXIT, L846, P1EXIT, L17-7](and (= ~x$r_buff1_thd4~0 0) (= ~x$r_buff1_thd2~0 0) (= ~x$w_buff1~0 ~x$w_buff0~0) (= 2 (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|)) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~x$r_buff1_thd1~0 0) (= 0 ~x$r_buff0_thd4~0) (= 0 ~x$r_buff0_thd2~0) (= ~x$r_buff1_thd0~0 0) (= 0 ~x$w_buff0~0)), 2655944#[P0EXIT, P2EXIT, L846, P1EXIT, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION](and (= ~x$r_buff1_thd4~0 0) (= ~x$r_buff1_thd2~0 0) (= ~x$w_buff1~0 ~x$w_buff0~0) (= 2 (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|)) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~x$r_buff1_thd1~0 0) (= 0 ~x$r_buff0_thd4~0) (= 0 ~x$r_buff0_thd2~0) (= ~x$r_buff1_thd0~0 0) (= 0 ~x$w_buff0~0))] [2021-01-27 02:33:55,025 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5 [2021-01-27 02:33:55,025 INFO L429 AbstractCegarLoop]: === Iteration 7 === [ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-27 02:33:55,026 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-27 02:33:55,026 INFO L82 PathProgramCache]: Analyzing trace with hash -821393011, now seen corresponding path program 2 times [2021-01-27 02:33:55,026 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-27 02:33:55,026 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [981037794] [2021-01-27 02:33:55,026 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-27 02:33:55,154 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-01-27 02:33:55,154 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-01-27 02:33:55,288 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-01-27 02:33:55,288 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-01-27 02:33:55,395 INFO L173 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-01-27 02:33:55,395 INFO L605 BasicCegarLoop]: Counterexample might be feasible [2021-01-27 02:33:55,395 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6 [2021-01-27 02:33:55,674 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 27.01 02:33:55 BasicIcfg [2021-01-27 02:33:55,674 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2021-01-27 02:33:55,676 INFO L168 Benchmark]: Toolchain (without parser) took 333366.10 ms. Allocated memory was 302.0 MB in the beginning and 6.5 GB in the end (delta: 6.2 GB). Free memory was 276.6 MB in the beginning and 4.3 GB in the end (delta: -4.0 GB). Peak memory consumption was 2.2 GB. Max. memory is 16.0 GB. [2021-01-27 02:33:55,676 INFO L168 Benchmark]: CDTParser took 0.19 ms. Allocated memory is still 302.0 MB. Free memory was 272.2 MB in the beginning and 272.1 MB in the end (delta: 65.4 kB). There was no memory consumed. Max. memory is 16.0 GB. [2021-01-27 02:33:55,677 INFO L168 Benchmark]: CACSL2BoogieTranslator took 873.26 ms. Allocated memory is still 302.0 MB. Free memory was 275.5 MB in the beginning and 278.7 MB in the end (delta: -3.2 MB). Peak memory consumption was 38.4 MB. Max. memory is 16.0 GB. [2021-01-27 02:33:55,678 INFO L168 Benchmark]: Boogie Procedure Inliner took 86.69 ms. Allocated memory is still 302.0 MB. Free memory was 278.7 MB in the beginning and 275.7 MB in the end (delta: 2.9 MB). There was no memory consumed. Max. memory is 16.0 GB. [2021-01-27 02:33:55,679 INFO L168 Benchmark]: Boogie Preprocessor took 56.38 ms. Allocated memory is still 302.0 MB. Free memory was 275.7 MB in the beginning and 272.6 MB in the end (delta: 3.1 MB). Peak memory consumption was 4.2 MB. Max. memory is 16.0 GB. [2021-01-27 02:33:55,679 INFO L168 Benchmark]: RCFGBuilder took 3701.98 ms. Allocated memory was 302.0 MB in the beginning and 362.8 MB in the end (delta: 60.8 MB). Free memory was 272.6 MB in the beginning and 303.0 MB in the end (delta: -30.5 MB). Peak memory consumption was 206.3 MB. Max. memory is 16.0 GB. [2021-01-27 02:33:55,680 INFO L168 Benchmark]: TraceAbstraction took 328628.18 ms. Allocated memory was 362.8 MB in the beginning and 6.5 GB in the end (delta: 6.2 GB). Free memory was 303.0 MB in the beginning and 4.3 GB in the end (delta: -4.0 GB). Peak memory consumption was 2.2 GB. Max. memory is 16.0 GB. [2021-01-27 02:33:55,684 INFO L339 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.19 ms. Allocated memory is still 302.0 MB. Free memory was 272.2 MB in the beginning and 272.1 MB in the end (delta: 65.4 kB). There was no memory consumed. Max. memory is 16.0 GB. * CACSL2BoogieTranslator took 873.26 ms. Allocated memory is still 302.0 MB. Free memory was 275.5 MB in the beginning and 278.7 MB in the end (delta: -3.2 MB). Peak memory consumption was 38.4 MB. Max. memory is 16.0 GB. * Boogie Procedure Inliner took 86.69 ms. Allocated memory is still 302.0 MB. Free memory was 278.7 MB in the beginning and 275.7 MB in the end (delta: 2.9 MB). There was no memory consumed. Max. memory is 16.0 GB. * Boogie Preprocessor took 56.38 ms. Allocated memory is still 302.0 MB. Free memory was 275.7 MB in the beginning and 272.6 MB in the end (delta: 3.1 MB). Peak memory consumption was 4.2 MB. Max. memory is 16.0 GB. * RCFGBuilder took 3701.98 ms. Allocated memory was 302.0 MB in the beginning and 362.8 MB in the end (delta: 60.8 MB). Free memory was 272.6 MB in the beginning and 303.0 MB in the end (delta: -30.5 MB). Peak memory consumption was 206.3 MB. Max. memory is 16.0 GB. * TraceAbstraction took 328628.18 ms. Allocated memory was 362.8 MB in the beginning and 6.5 GB in the end (delta: 6.2 GB). Free memory was 303.0 MB in the beginning and 4.3 GB in the end (delta: -4.0 GB). Peak memory consumption was 2.2 GB. Max. memory is 16.0 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 17]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L710] 0 int __unbuffered_cnt = 0; VAL [__unbuffered_cnt=0] [L712] 0 int __unbuffered_p0_EAX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0] [L714] 0 int __unbuffered_p2_EAX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0] [L715] 0 _Bool __unbuffered_p2_EAX$flush_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0] [L716] 0 int __unbuffered_p2_EAX$mem_tmp; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0] [L717] 0 _Bool __unbuffered_p2_EAX$r_buff0_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0] [L718] 0 _Bool __unbuffered_p2_EAX$r_buff0_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0] [L719] 0 _Bool __unbuffered_p2_EAX$r_buff0_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0] [L720] 0 _Bool __unbuffered_p2_EAX$r_buff0_thd3; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0] [L721] 0 _Bool __unbuffered_p2_EAX$r_buff0_thd4; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0] [L722] 0 _Bool __unbuffered_p2_EAX$r_buff1_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0] [L723] 0 _Bool __unbuffered_p2_EAX$r_buff1_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0] [L724] 0 _Bool __unbuffered_p2_EAX$r_buff1_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0] [L725] 0 _Bool __unbuffered_p2_EAX$r_buff1_thd3; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0] [L726] 0 _Bool __unbuffered_p2_EAX$r_buff1_thd4; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0] [L727] 0 _Bool __unbuffered_p2_EAX$read_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=0] [L728] 0 int *__unbuffered_p2_EAX$read_delayed_var; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}] [L729] 0 int __unbuffered_p2_EAX$w_buff0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0] [L730] 0 _Bool __unbuffered_p2_EAX$w_buff0_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0] [L731] 0 int __unbuffered_p2_EAX$w_buff1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0] [L732] 0 _Bool __unbuffered_p2_EAX$w_buff1_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0] [L733] 0 _Bool main$tmp_guard0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0] [L734] 0 _Bool main$tmp_guard1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0] [L736] 0 int x = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={8:0}] [L737] 0 _Bool x$flush_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={8:0}, x$flush_delayed=0] [L738] 0 int x$mem_tmp; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={8:0}, x$flush_delayed=0, x$mem_tmp=0] [L739] 0 _Bool x$r_buff0_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={8:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0] [L740] 0 _Bool x$r_buff0_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={8:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0] [L741] 0 _Bool x$r_buff0_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={8:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0] [L742] 0 _Bool x$r_buff0_thd3; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={8:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0] [L743] 0 _Bool x$r_buff0_thd4; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={8:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff0_thd4=0] [L744] 0 _Bool x$r_buff1_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={8:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0] [L745] 0 _Bool x$r_buff1_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={8:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0] [L746] 0 _Bool x$r_buff1_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={8:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0] [L747] 0 _Bool x$r_buff1_thd3; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={8:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0] [L748] 0 _Bool x$r_buff1_thd4; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={8:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0] [L749] 0 _Bool x$read_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={8:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0] [L750] 0 int *x$read_delayed_var; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={8:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}] [L751] 0 int x$w_buff0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={8:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0] [L752] 0 _Bool x$w_buff0_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={8:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0] [L753] 0 int x$w_buff1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={8:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0] [L754] 0 _Bool x$w_buff1_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={8:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0] [L756] 0 int y = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={8:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L757] 0 _Bool weak$$choice0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, x={8:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L758] 0 _Bool weak$$choice1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, x={8:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L759] 0 _Bool weak$$choice2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x={8:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L860] 0 pthread_t t2165; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x={8:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L861] FCALL, FORK 0 pthread_create(&t2165, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x={8:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L862] 0 pthread_t t2166; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x={8:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L863] FCALL, FORK 0 pthread_create(&t2166, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x={8:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L864] 0 pthread_t t2167; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x={8:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L865] FCALL, FORK 0 pthread_create(&t2167, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x={8:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L866] 0 pthread_t t2168; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x={8:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L800] 3 weak$$choice0 = __VERIFIER_nondet_bool() [L801] 3 weak$$choice2 = __VERIFIER_nondet_bool() [L802] 3 x$flush_delayed = weak$$choice2 [L803] EXPR 3 \read(x) [L803] 3 x$mem_tmp = x [L804] EXPR 3 !x$w_buff0_used || !x$r_buff0_thd3 && !x$w_buff1_used || !x$r_buff0_thd3 && !x$r_buff1_thd3 ? x : (x$w_buff0_used && x$r_buff0_thd3 ? x$w_buff0 : x$w_buff1) [L804] EXPR 3 \read(x) [L804] EXPR 3 !x$w_buff0_used || !x$r_buff0_thd3 && !x$w_buff1_used || !x$r_buff0_thd3 && !x$r_buff1_thd3 ? x : (x$w_buff0_used && x$r_buff0_thd3 ? x$w_buff0 : x$w_buff1) [L804] 3 x = !x$w_buff0_used || !x$r_buff0_thd3 && !x$w_buff1_used || !x$r_buff0_thd3 && !x$r_buff1_thd3 ? x : (x$w_buff0_used && x$r_buff0_thd3 ? x$w_buff0 : x$w_buff1) [L805] EXPR 3 weak$$choice2 ? x$w_buff0 : (!x$w_buff0_used || !x$r_buff0_thd3 && !x$w_buff1_used || !x$r_buff0_thd3 && !x$r_buff1_thd3 ? x$w_buff0 : (x$w_buff0_used && x$r_buff0_thd3 ? x$w_buff0 : x$w_buff0)) [L805] EXPR 3 !x$w_buff0_used || !x$r_buff0_thd3 && !x$w_buff1_used || !x$r_buff0_thd3 && !x$r_buff1_thd3 ? x$w_buff0 : (x$w_buff0_used && x$r_buff0_thd3 ? x$w_buff0 : x$w_buff0) [L805] EXPR 3 weak$$choice2 ? x$w_buff0 : (!x$w_buff0_used || !x$r_buff0_thd3 && !x$w_buff1_used || !x$r_buff0_thd3 && !x$r_buff1_thd3 ? x$w_buff0 : (x$w_buff0_used && x$r_buff0_thd3 ? x$w_buff0 : x$w_buff0)) [L805] 3 x$w_buff0 = weak$$choice2 ? x$w_buff0 : (!x$w_buff0_used || !x$r_buff0_thd3 && !x$w_buff1_used || !x$r_buff0_thd3 && !x$r_buff1_thd3 ? x$w_buff0 : (x$w_buff0_used && x$r_buff0_thd3 ? x$w_buff0 : x$w_buff0)) [L806] EXPR 3 weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used || !x$r_buff0_thd3 && !x$w_buff1_used || !x$r_buff0_thd3 && !x$r_buff1_thd3 ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd3 ? x$w_buff1 : x$w_buff1)) [L806] EXPR 3 !x$w_buff0_used || !x$r_buff0_thd3 && !x$w_buff1_used || !x$r_buff0_thd3 && !x$r_buff1_thd3 ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd3 ? x$w_buff1 : x$w_buff1) [L806] EXPR 3 weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used || !x$r_buff0_thd3 && !x$w_buff1_used || !x$r_buff0_thd3 && !x$r_buff1_thd3 ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd3 ? x$w_buff1 : x$w_buff1)) [L806] 3 x$w_buff1 = weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used || !x$r_buff0_thd3 && !x$w_buff1_used || !x$r_buff0_thd3 && !x$r_buff1_thd3 ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd3 ? x$w_buff1 : x$w_buff1)) [L807] EXPR 3 weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used || !x$r_buff0_thd3 && !x$w_buff1_used || !x$r_buff0_thd3 && !x$r_buff1_thd3 ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd3 ? (_Bool)0 : x$w_buff0_used)) [L807] EXPR 3 !x$w_buff0_used || !x$r_buff0_thd3 && !x$w_buff1_used || !x$r_buff0_thd3 && !x$r_buff1_thd3 ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd3 ? (_Bool)0 : x$w_buff0_used) [L807] EXPR 3 weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used || !x$r_buff0_thd3 && !x$w_buff1_used || !x$r_buff0_thd3 && !x$r_buff1_thd3 ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd3 ? (_Bool)0 : x$w_buff0_used)) [L807] 3 x$w_buff0_used = weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used || !x$r_buff0_thd3 && !x$w_buff1_used || !x$r_buff0_thd3 && !x$r_buff1_thd3 ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd3 ? (_Bool)0 : x$w_buff0_used)) [L808] EXPR 3 weak$$choice2 ? x$w_buff1_used : (!x$w_buff0_used || !x$r_buff0_thd3 && !x$w_buff1_used || !x$r_buff0_thd3 && !x$r_buff1_thd3 ? x$w_buff1_used : (x$w_buff0_used && x$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L808] EXPR 3 !x$w_buff0_used || !x$r_buff0_thd3 && !x$w_buff1_used || !x$r_buff0_thd3 && !x$r_buff1_thd3 ? x$w_buff1_used : (x$w_buff0_used && x$r_buff0_thd3 ? (_Bool)0 : (_Bool)0) [L808] EXPR 3 weak$$choice2 ? x$w_buff1_used : (!x$w_buff0_used || !x$r_buff0_thd3 && !x$w_buff1_used || !x$r_buff0_thd3 && !x$r_buff1_thd3 ? x$w_buff1_used : (x$w_buff0_used && x$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L808] 3 x$w_buff1_used = weak$$choice2 ? x$w_buff1_used : (!x$w_buff0_used || !x$r_buff0_thd3 && !x$w_buff1_used || !x$r_buff0_thd3 && !x$r_buff1_thd3 ? x$w_buff1_used : (x$w_buff0_used && x$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L809] EXPR 3 weak$$choice2 ? x$r_buff0_thd3 : (!x$w_buff0_used || !x$r_buff0_thd3 && !x$w_buff1_used || !x$r_buff0_thd3 && !x$r_buff1_thd3 ? x$r_buff0_thd3 : (x$w_buff0_used && x$r_buff0_thd3 ? (_Bool)0 : x$r_buff0_thd3)) [L809] EXPR 3 !x$w_buff0_used || !x$r_buff0_thd3 && !x$w_buff1_used || !x$r_buff0_thd3 && !x$r_buff1_thd3 ? x$r_buff0_thd3 : (x$w_buff0_used && x$r_buff0_thd3 ? (_Bool)0 : x$r_buff0_thd3) [L809] EXPR 3 weak$$choice2 ? x$r_buff0_thd3 : (!x$w_buff0_used || !x$r_buff0_thd3 && !x$w_buff1_used || !x$r_buff0_thd3 && !x$r_buff1_thd3 ? x$r_buff0_thd3 : (x$w_buff0_used && x$r_buff0_thd3 ? (_Bool)0 : x$r_buff0_thd3)) [L809] 3 x$r_buff0_thd3 = weak$$choice2 ? x$r_buff0_thd3 : (!x$w_buff0_used || !x$r_buff0_thd3 && !x$w_buff1_used || !x$r_buff0_thd3 && !x$r_buff1_thd3 ? x$r_buff0_thd3 : (x$w_buff0_used && x$r_buff0_thd3 ? (_Bool)0 : x$r_buff0_thd3)) [L810] EXPR 3 weak$$choice2 ? x$r_buff1_thd3 : (!x$w_buff0_used || !x$r_buff0_thd3 && !x$w_buff1_used || !x$r_buff0_thd3 && !x$r_buff1_thd3 ? x$r_buff1_thd3 : (x$w_buff0_used && x$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L810] EXPR 3 !x$w_buff0_used || !x$r_buff0_thd3 && !x$w_buff1_used || !x$r_buff0_thd3 && !x$r_buff1_thd3 ? x$r_buff1_thd3 : (x$w_buff0_used && x$r_buff0_thd3 ? (_Bool)0 : (_Bool)0) [L810] EXPR 3 weak$$choice2 ? x$r_buff1_thd3 : (!x$w_buff0_used || !x$r_buff0_thd3 && !x$w_buff1_used || !x$r_buff0_thd3 && !x$r_buff1_thd3 ? x$r_buff1_thd3 : (x$w_buff0_used && x$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L810] 3 x$r_buff1_thd3 = weak$$choice2 ? x$r_buff1_thd3 : (!x$w_buff0_used || !x$r_buff0_thd3 && !x$w_buff1_used || !x$r_buff0_thd3 && !x$r_buff1_thd3 ? x$r_buff1_thd3 : (x$w_buff0_used && x$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L811] 3 __unbuffered_p2_EAX$read_delayed = (_Bool)1 [L812] 3 __unbuffered_p2_EAX$read_delayed_var = &x [L813] EXPR 3 \read(x) [L813] 3 __unbuffered_p2_EAX = x [L814] EXPR 3 x$flush_delayed ? x$mem_tmp : x [L814] EXPR 3 \read(x) [L814] EXPR 3 x$flush_delayed ? x$mem_tmp : x [L814] 3 x = x$flush_delayed ? x$mem_tmp : x [L815] 3 x$flush_delayed = (_Bool)0 VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={8:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=49, weak$$choice1=0, weak$$choice2=0, x={8:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L818] 3 y = 1 VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={8:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=49, weak$$choice1=0, weak$$choice2=0, x={8:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L821] EXPR 3 x$w_buff0_used && x$r_buff0_thd3 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd3 ? x$w_buff1 : x) [L821] EXPR 3 x$w_buff1_used && x$r_buff1_thd3 ? x$w_buff1 : x [L821] EXPR 3 \read(x) [L821] EXPR 3 x$w_buff1_used && x$r_buff1_thd3 ? x$w_buff1 : x [L821] EXPR 3 x$w_buff0_used && x$r_buff0_thd3 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd3 ? x$w_buff1 : x) [L821] 3 x = x$w_buff0_used && x$r_buff0_thd3 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd3 ? x$w_buff1 : x) [L822] EXPR 3 x$w_buff0_used && x$r_buff0_thd3 ? (_Bool)0 : x$w_buff0_used [L822] 3 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd3 ? (_Bool)0 : x$w_buff0_used [L823] EXPR 3 x$w_buff0_used && x$r_buff0_thd3 || x$w_buff1_used && x$r_buff1_thd3 ? (_Bool)0 : x$w_buff1_used [L823] 3 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd3 || x$w_buff1_used && x$r_buff1_thd3 ? (_Bool)0 : x$w_buff1_used [L824] EXPR 3 x$w_buff0_used && x$r_buff0_thd3 ? (_Bool)0 : x$r_buff0_thd3 [L824] 3 x$r_buff0_thd3 = x$w_buff0_used && x$r_buff0_thd3 ? (_Bool)0 : x$r_buff0_thd3 [L825] EXPR 3 x$w_buff0_used && x$r_buff0_thd3 || x$w_buff1_used && x$r_buff1_thd3 ? (_Bool)0 : x$r_buff1_thd3 [L825] 3 x$r_buff1_thd3 = x$w_buff0_used && x$r_buff0_thd3 || x$w_buff1_used && x$r_buff1_thd3 ? (_Bool)0 : x$r_buff1_thd3 [L828] 3 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={8:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=49, weak$$choice1=0, weak$$choice2=0, x={8:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L830] 3 return 0; VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={8:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=49, weak$$choice1=0, weak$$choice2=0, x={8:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L867] FCALL, FORK 0 pthread_create(&t2168, ((void *)0), P3, ((void *)0)) VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={8:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=49, weak$$choice1=0, weak$$choice2=0, x={8:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L835] 4 y = 2 VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={8:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=49, weak$$choice1=0, weak$$choice2=0, x={8:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L763] 1 __unbuffered_p0_EAX = y VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p0_EAX=2, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={8:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=49, weak$$choice1=0, weak$$choice2=0, x={8:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L766] 1 x = 1 VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p0_EAX=2, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={8:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=49, weak$$choice1=0, weak$$choice2=0, x={8:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L769] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x) [L769] EXPR 1 x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x [L769] EXPR 1 \read(x) [L769] EXPR 1 x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x [L769] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x) [L769] 1 x = x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x) [L770] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$w_buff0_used [L770] 1 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$w_buff0_used [L771] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$w_buff1_used [L771] 1 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$w_buff1_used [L772] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$r_buff0_thd1 [L772] 1 x$r_buff0_thd1 = x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$r_buff0_thd1 [L773] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$r_buff1_thd1 [L773] 1 x$r_buff1_thd1 = x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$r_buff1_thd1 [L776] 1 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p0_EAX=2, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={8:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=49, weak$$choice1=0, weak$$choice2=0, x={8:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L778] 1 return 0; VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=2, __unbuffered_p0_EAX=2, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={8:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=49, weak$$choice1=0, weak$$choice2=0, x={8:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L783] 2 x = 2 VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=2, __unbuffered_p0_EAX=2, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={8:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=49, weak$$choice1=0, weak$$choice2=0, x={8:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L786] EXPR 2 x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x) [L786] EXPR 2 x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x [L786] EXPR 2 \read(x) [L786] EXPR 2 x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x [L786] EXPR 2 x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x) [L786] 2 x = x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x) [L787] EXPR 2 x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$w_buff0_used [L787] 2 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$w_buff0_used [L788] EXPR 2 x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$w_buff1_used [L788] 2 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$w_buff1_used [L789] EXPR 2 x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$r_buff0_thd2 [L789] 2 x$r_buff0_thd2 = x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$r_buff0_thd2 [L790] EXPR 2 x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$r_buff1_thd2 [L790] 2 x$r_buff1_thd2 = x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$r_buff1_thd2 [L793] 2 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p0_EAX=2, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={8:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=49, weak$$choice1=0, weak$$choice2=0, x={8:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L795] 2 return 0; VAL [\result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p0_EAX=2, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={8:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=49, weak$$choice1=0, weak$$choice2=0, x={8:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L838] EXPR 4 x$w_buff0_used && x$r_buff0_thd4 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd4 ? x$w_buff1 : x) [L838] EXPR 4 x$w_buff1_used && x$r_buff1_thd4 ? x$w_buff1 : x [L838] EXPR 4 \read(x) [L838] EXPR 4 x$w_buff1_used && x$r_buff1_thd4 ? x$w_buff1 : x [L838] EXPR 4 x$w_buff0_used && x$r_buff0_thd4 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd4 ? x$w_buff1 : x) [L838] 4 x = x$w_buff0_used && x$r_buff0_thd4 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd4 ? x$w_buff1 : x) [L839] EXPR 4 x$w_buff0_used && x$r_buff0_thd4 ? (_Bool)0 : x$w_buff0_used [L839] 4 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd4 ? (_Bool)0 : x$w_buff0_used [L840] EXPR 4 x$w_buff0_used && x$r_buff0_thd4 || x$w_buff1_used && x$r_buff1_thd4 ? (_Bool)0 : x$w_buff1_used [L840] 4 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd4 || x$w_buff1_used && x$r_buff1_thd4 ? (_Bool)0 : x$w_buff1_used [L841] EXPR 4 x$w_buff0_used && x$r_buff0_thd4 ? (_Bool)0 : x$r_buff0_thd4 [L841] 4 x$r_buff0_thd4 = x$w_buff0_used && x$r_buff0_thd4 ? (_Bool)0 : x$r_buff0_thd4 [L842] EXPR 4 x$w_buff0_used && x$r_buff0_thd4 || x$w_buff1_used && x$r_buff1_thd4 ? (_Bool)0 : x$r_buff1_thd4 [L842] 4 x$r_buff1_thd4 = x$w_buff0_used && x$r_buff0_thd4 || x$w_buff1_used && x$r_buff1_thd4 ? (_Bool)0 : x$r_buff1_thd4 [L845] 4 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [\result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p0_EAX=2, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={8:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=49, weak$$choice1=0, weak$$choice2=0, x={8:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L869] 0 main$tmp_guard0 = __unbuffered_cnt == 4 VAL [\result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p0_EAX=2, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={8:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=49, weak$$choice1=0, weak$$choice2=0, x={8:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L3] COND FALSE 0 !(!cond) VAL [\result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p0_EAX=2, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={8:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=49, weak$$choice1=0, weak$$choice2=0, x={8:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L873] EXPR 0 x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x) [L873] EXPR 0 x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x [L873] EXPR 0 \read(x) [L873] EXPR 0 x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x [L873] EXPR 0 x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x) [L873] 0 x = x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x) [L874] EXPR 0 x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used [L874] 0 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used [L875] EXPR 0 x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$w_buff1_used [L875] 0 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$w_buff1_used [L876] EXPR 0 x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$r_buff0_thd0 [L876] 0 x$r_buff0_thd0 = x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$r_buff0_thd0 [L877] EXPR 0 x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$r_buff1_thd0 [L877] 0 x$r_buff1_thd0 = x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$r_buff1_thd0 [L880] 0 weak$$choice0 = __VERIFIER_nondet_bool() [L881] 0 weak$$choice2 = __VERIFIER_nondet_bool() [L882] 0 x$flush_delayed = weak$$choice2 [L883] EXPR 0 \read(x) [L883] 0 x$mem_tmp = x [L884] EXPR 0 !x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff1) [L884] EXPR 0 \read(x) [L884] EXPR 0 !x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff1) [L884] 0 x = !x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff1) [L885] EXPR 0 weak$$choice2 ? x$w_buff0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff0)) [L885] 0 x$w_buff0 = weak$$choice2 ? x$w_buff0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff0)) [L886] EXPR 0 weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff1 : x$w_buff1)) [L886] 0 x$w_buff1 = weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff1 : x$w_buff1)) [L887] EXPR 0 weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used)) [L887] 0 x$w_buff0_used = weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used)) [L888] EXPR 0 weak$$choice2 ? x$w_buff1_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff1_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L888] 0 x$w_buff1_used = weak$$choice2 ? x$w_buff1_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff1_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L889] EXPR 0 weak$$choice2 ? x$r_buff0_thd0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$r_buff0_thd0 : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$r_buff0_thd0)) [L889] 0 x$r_buff0_thd0 = weak$$choice2 ? x$r_buff0_thd0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$r_buff0_thd0 : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$r_buff0_thd0)) [L890] EXPR 0 weak$$choice2 ? x$r_buff1_thd0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$r_buff1_thd0 : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L890] 0 x$r_buff1_thd0 = weak$$choice2 ? x$r_buff1_thd0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$r_buff1_thd0 : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L891] 0 weak$$choice1 = __VERIFIER_nondet_bool() [L892] EXPR 0 __unbuffered_p2_EAX$read_delayed ? (weak$$choice1 ? *__unbuffered_p2_EAX$read_delayed_var : __unbuffered_p2_EAX) : __unbuffered_p2_EAX [L892] EXPR 0 weak$$choice1 ? *__unbuffered_p2_EAX$read_delayed_var : __unbuffered_p2_EAX [L892] EXPR 0 \read(*__unbuffered_p2_EAX$read_delayed_var) [L892] EXPR 0 weak$$choice1 ? *__unbuffered_p2_EAX$read_delayed_var : __unbuffered_p2_EAX [L892] EXPR 0 __unbuffered_p2_EAX$read_delayed ? (weak$$choice1 ? *__unbuffered_p2_EAX$read_delayed_var : __unbuffered_p2_EAX) : __unbuffered_p2_EAX [L892] 0 __unbuffered_p2_EAX = __unbuffered_p2_EAX$read_delayed ? (weak$$choice1 ? *__unbuffered_p2_EAX$read_delayed_var : __unbuffered_p2_EAX) : __unbuffered_p2_EAX [L893] EXPR 0 \read(x) [L893] 0 main$tmp_guard1 = !(x == 2 && y == 2 && __unbuffered_p0_EAX == 2 && __unbuffered_p2_EAX == 2) [L894] EXPR 0 x$flush_delayed ? x$mem_tmp : x [L894] 0 x = x$flush_delayed ? x$mem_tmp : x [L895] 0 x$flush_delayed = (_Bool)0 VAL [\result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p0_EAX=2, __unbuffered_p2_EAX=2, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={8:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=50, weak$$choice1=255, weak$$choice2=255, x={8:0}, x$flush_delayed=0, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L18] COND TRUE 0 !expression VAL [\result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p0_EAX=2, __unbuffered_p2_EAX=2, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={8:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=50, weak$$choice1=255, weak$$choice2=255, x={8:0}, x$flush_delayed=0, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L17] COND FALSE 0 !(0) VAL [\result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p0_EAX=2, __unbuffered_p2_EAX=2, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={8:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=50, weak$$choice1=255, weak$$choice2=255, x={8:0}, x$flush_delayed=0, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L17] 0 __assert_fail ("0", "safe016_rmo.opt.c", 8, __extension__ __PRETTY_FUNCTION__) VAL [\result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p0_EAX=2, __unbuffered_p2_EAX=2, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={8:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=50, weak$$choice1=255, weak$$choice2=255, x={8:0}, x$flush_delayed=0, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] - StatisticsResult: Ultimate Automizer benchmark data CFG has 5 procedures, 132 locations, 1 error locations. Started 1 CEGAR loops. VerificationResult: UNSAFE, OverallTime: 328.1s, OverallIterations: 7, TraceHistogramMax: 0, AutomataDifference: 0.0s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, HoareTripleCheckerStatistics: No data available, PredicateUnifierStatistics: No data available, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=0occurred in iteration=0, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: No data available, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 1.1s SatisfiabilityAnalysisTime, 1.5s InterpolantComputationTime, 750 NumberOfCodeBlocks, 750 NumberOfCodeBlocksAsserted, 7 NumberOfCheckSat, 634 ConstructedInterpolants, 0 QuantifiedInterpolants, 297275 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 6 InterpolantComputations, 6 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! [MP z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Forcibly destroying the process Received shutdown request...