/usr/bin/java -Xmx16000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata ./data -tc ../../../trunk/examples/toolchains/AutomizerCInline.xml -s ../../../trunk/examples/settings/automizer/concurrent/svcomp-Reach-32bit-Automizer_Default-noMmResRef-Sleep-NoLbe-New_States.epf -i ../../../trunk/examples/svcomp/pthread-wmm/thin000_power.opt.i -------------------------------------------------------------------------------- This is Ultimate 0.2.0-6f57305 [2021-01-27 02:42:10,066 INFO L177 SettingsManager]: Resetting all preferences to default values... [2021-01-27 02:42:10,069 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2021-01-27 02:42:10,118 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2021-01-27 02:42:10,119 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2021-01-27 02:42:10,120 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2021-01-27 02:42:10,122 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2021-01-27 02:42:10,125 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2021-01-27 02:42:10,127 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2021-01-27 02:42:10,128 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2021-01-27 02:42:10,129 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2021-01-27 02:42:10,131 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2021-01-27 02:42:10,131 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2021-01-27 02:42:10,133 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2021-01-27 02:42:10,134 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2021-01-27 02:42:10,136 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2021-01-27 02:42:10,137 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2021-01-27 02:42:10,138 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2021-01-27 02:42:10,140 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2021-01-27 02:42:10,143 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2021-01-27 02:42:10,145 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2021-01-27 02:42:10,152 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2021-01-27 02:42:10,155 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2021-01-27 02:42:10,156 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2021-01-27 02:42:10,161 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... 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[2021-01-27 02:42:10,185 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2021-01-27 02:42:10,187 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2021-01-27 02:42:10,188 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2021-01-27 02:42:10,190 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/automizer/concurrent/svcomp-Reach-32bit-Automizer_Default-noMmResRef-Sleep-NoLbe-New_States.epf [2021-01-27 02:42:10,249 INFO L113 SettingsManager]: Loading preferences was successful [2021-01-27 02:42:10,249 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2021-01-27 02:42:10,251 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2021-01-27 02:42:10,253 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2021-01-27 02:42:10,253 INFO L138 SettingsManager]: * Use SBE=true [2021-01-27 02:42:10,253 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2021-01-27 02:42:10,253 INFO L138 SettingsManager]: * sizeof long=4 [2021-01-27 02:42:10,254 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2021-01-27 02:42:10,254 INFO L138 SettingsManager]: * sizeof POINTER=4 [2021-01-27 02:42:10,254 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2021-01-27 02:42:10,255 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2021-01-27 02:42:10,256 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2021-01-27 02:42:10,256 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2021-01-27 02:42:10,256 INFO L138 SettingsManager]: * sizeof long double=12 [2021-01-27 02:42:10,256 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2021-01-27 02:42:10,256 INFO L138 SettingsManager]: * Use constant arrays=true [2021-01-27 02:42:10,257 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2021-01-27 02:42:10,257 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2021-01-27 02:42:10,257 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2021-01-27 02:42:10,257 INFO L138 SettingsManager]: * To the following directory=./dump/ [2021-01-27 02:42:10,258 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2021-01-27 02:42:10,258 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2021-01-27 02:42:10,258 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2021-01-27 02:42:10,258 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2021-01-27 02:42:10,258 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2021-01-27 02:42:10,259 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2021-01-27 02:42:10,259 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2021-01-27 02:42:10,259 INFO L138 SettingsManager]: * Large block encoding in concurrent analysis=OFF [2021-01-27 02:42:10,259 INFO L138 SettingsManager]: * Lazy Petri-NFA conversion=true [2021-01-27 02:42:10,260 INFO L138 SettingsManager]: * Automaton type used in concurrency analysis=SLEEP_SET_FA [2021-01-27 02:42:10,260 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2021-01-27 02:42:10,260 INFO L138 SettingsManager]: * Minimization of abstraction=NONE [2021-01-27 02:42:10,260 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2021-01-27 02:42:10,260 INFO L138 SettingsManager]: * Sleep set reduction in concurrent analysis=NEW_STATES WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release [2021-01-27 02:42:10,699 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2021-01-27 02:42:10,748 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2021-01-27 02:42:10,752 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2021-01-27 02:42:10,754 INFO L271 PluginConnector]: Initializing CDTParser... [2021-01-27 02:42:10,755 INFO L275 PluginConnector]: CDTParser initialized [2021-01-27 02:42:10,759 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/pthread-wmm/thin000_power.opt.i [2021-01-27 02:42:10,846 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/bf512d5ea/f61e7e76659c43848f31884f030f4fdf/FLAGf53a82cb2 [2021-01-27 02:42:11,636 INFO L306 CDTParser]: Found 1 translation units. [2021-01-27 02:42:11,637 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/pthread-wmm/thin000_power.opt.i [2021-01-27 02:42:11,655 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/bf512d5ea/f61e7e76659c43848f31884f030f4fdf/FLAGf53a82cb2 [2021-01-27 02:42:11,848 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/bf512d5ea/f61e7e76659c43848f31884f030f4fdf [2021-01-27 02:42:11,854 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2021-01-27 02:42:11,869 INFO L131 ToolchainWalker]: Walking toolchain with 5 elements. [2021-01-27 02:42:11,873 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2021-01-27 02:42:11,873 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2021-01-27 02:42:11,877 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2021-01-27 02:42:11,879 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 27.01 02:42:11" (1/1) ... [2021-01-27 02:42:11,884 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@518dcba8 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.01 02:42:11, skipping insertion in model container [2021-01-27 02:42:11,884 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 27.01 02:42:11" (1/1) ... [2021-01-27 02:42:11,893 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2021-01-27 02:42:11,959 INFO L178 MainTranslator]: Built tables and reachable declarations [2021-01-27 02:42:12,518 INFO L206 PostProcessor]: Analyzing one entry point: main [2021-01-27 02:42:12,533 INFO L203 MainTranslator]: Completed pre-run [2021-01-27 02:42:12,612 INFO L206 PostProcessor]: Analyzing one entry point: main [2021-01-27 02:42:12,771 INFO L208 MainTranslator]: Completed translation [2021-01-27 02:42:12,771 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.01 02:42:12 WrapperNode [2021-01-27 02:42:12,773 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2021-01-27 02:42:12,775 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2021-01-27 02:42:12,776 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2021-01-27 02:42:12,776 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2021-01-27 02:42:12,785 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.01 02:42:12" (1/1) ... [2021-01-27 02:42:12,835 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.01 02:42:12" (1/1) ... [2021-01-27 02:42:12,896 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2021-01-27 02:42:12,897 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2021-01-27 02:42:12,897 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2021-01-27 02:42:12,897 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2021-01-27 02:42:12,908 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.01 02:42:12" (1/1) ... [2021-01-27 02:42:12,909 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.01 02:42:12" (1/1) ... [2021-01-27 02:42:12,925 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.01 02:42:12" (1/1) ... [2021-01-27 02:42:12,926 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.01 02:42:12" (1/1) ... [2021-01-27 02:42:12,958 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.01 02:42:12" (1/1) ... [2021-01-27 02:42:12,964 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.01 02:42:12" (1/1) ... [2021-01-27 02:42:12,975 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.01 02:42:12" (1/1) ... [2021-01-27 02:42:12,983 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2021-01-27 02:42:12,984 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2021-01-27 02:42:12,985 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2021-01-27 02:42:12,985 INFO L275 PluginConnector]: RCFGBuilder initialized [2021-01-27 02:42:12,986 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.01 02:42:12" (1/1) ... No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2021-01-27 02:42:13,068 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2021-01-27 02:42:13,069 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2021-01-27 02:42:13,069 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2021-01-27 02:42:13,070 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2021-01-27 02:42:13,070 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2021-01-27 02:42:13,071 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2021-01-27 02:42:13,072 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2021-01-27 02:42:13,072 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2021-01-27 02:42:13,072 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2021-01-27 02:42:13,072 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2021-01-27 02:42:13,072 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2021-01-27 02:42:13,073 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2021-01-27 02:42:13,073 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2021-01-27 02:42:13,075 WARN L208 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2021-01-27 02:42:17,811 INFO L293 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2021-01-27 02:42:17,811 INFO L298 CfgBuilder]: Removed 14 assume(true) statements. [2021-01-27 02:42:17,814 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 27.01 02:42:17 BoogieIcfgContainer [2021-01-27 02:42:17,814 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2021-01-27 02:42:17,816 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2021-01-27 02:42:17,816 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2021-01-27 02:42:17,820 INFO L275 PluginConnector]: TraceAbstraction initialized [2021-01-27 02:42:17,820 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 27.01 02:42:11" (1/3) ... [2021-01-27 02:42:17,821 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@12b0a5bf and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 27.01 02:42:17, skipping insertion in model container [2021-01-27 02:42:17,822 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.01 02:42:12" (2/3) ... [2021-01-27 02:42:17,822 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@12b0a5bf and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 27.01 02:42:17, skipping insertion in model container [2021-01-27 02:42:17,822 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 27.01 02:42:17" (3/3) ... [2021-01-27 02:42:17,824 INFO L111 eAbstractionObserver]: Analyzing ICFG thin000_power.opt.i [2021-01-27 02:42:17,842 WARN L168 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2021-01-27 02:42:17,843 INFO L179 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2021-01-27 02:42:17,847 INFO L191 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2021-01-27 02:42:17,848 INFO L351 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2021-01-27 02:42:17,920 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,921 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,921 WARN L313 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,921 WARN L313 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,921 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,922 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,922 WARN L313 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,922 WARN L313 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,922 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_reach_error_#t~nondet2.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,923 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_reach_error_#t~nondet2.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,923 WARN L313 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,923 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,923 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_reach_error_#t~nondet2.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,923 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_reach_error_#t~nondet2.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,924 WARN L313 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,924 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,924 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_reach_error_#t~nondet2.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,924 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_reach_error_#t~nondet2.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,924 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_reach_error_#t~nondet2.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,925 WARN L313 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,925 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_reach_error_#t~nondet2.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,925 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,925 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_reach_error_#t~nondet2.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,925 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_reach_error_#t~nondet2.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,926 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_reach_error_#t~nondet2.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,926 WARN L313 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,926 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_reach_error_#t~nondet2.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,926 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,927 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~mem5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,927 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,927 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~mem5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,927 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,927 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,928 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,928 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,928 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,928 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,929 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~mem5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,929 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,929 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~mem5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,930 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,931 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,931 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,931 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,931 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,931 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,933 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,933 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,933 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,933 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,934 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,934 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,934 WARN L313 ript$VariableManager]: TermVariabe P1Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,934 WARN L313 ript$VariableManager]: TermVariabe P1Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,934 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,935 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,935 WARN L313 ript$VariableManager]: TermVariabe P1Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,935 WARN L313 ript$VariableManager]: TermVariabe P1Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,935 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~nondet12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,935 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,936 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,936 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite56| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,936 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,936 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,936 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,936 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,937 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite50| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,937 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite54| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,937 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite52| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,937 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,937 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,937 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem59| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,938 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite47| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,938 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,938 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite45| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,938 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,938 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite49| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,939 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,939 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~nondet13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,939 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,939 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,939 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,939 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,940 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite55| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,940 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,940 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite53| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,940 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,940 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,941 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,941 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,941 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite44| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,941 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,941 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,941 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite48| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,942 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,942 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,942 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,942 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~nondet12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,942 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,943 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,943 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite56| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,943 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,943 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,943 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,944 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,944 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite50| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,944 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite54| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,944 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite52| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,944 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,944 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,945 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,945 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem59| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,945 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite47| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,945 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,945 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite45| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,946 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,946 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,946 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite49| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,946 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,946 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite60| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,947 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~nondet13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,947 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,947 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,947 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,947 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,947 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite57| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,948 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,948 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite55| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,948 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,948 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,948 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite53| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,948 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,949 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite51| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,949 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,949 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,949 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem58| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,949 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,949 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite46| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,950 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,950 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite44| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,950 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,950 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,950 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite48| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,951 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,951 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,951 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,958 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~nondet12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,959 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,959 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,959 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite56| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,959 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,959 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,959 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,960 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,960 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite50| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,960 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite54| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,960 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite52| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,960 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,960 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,961 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem59| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,961 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite47| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,961 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,961 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite45| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,961 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,961 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite49| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,962 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,962 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~nondet13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,962 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,962 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,962 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,962 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,963 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite55| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,963 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,963 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite53| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,963 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,963 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,963 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,964 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,964 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite44| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,964 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,964 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,964 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite48| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,965 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,965 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,965 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,965 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~nondet12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,965 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,965 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,966 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite56| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,966 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,966 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,966 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,966 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,966 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite50| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,967 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite54| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,967 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite52| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,967 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,967 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,967 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,968 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem59| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,968 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite47| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,968 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,968 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite45| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,968 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,968 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,969 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite49| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,969 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,969 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite60| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,969 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~nondet13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,969 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,969 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,970 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,970 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,970 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite57| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,970 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,970 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite55| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,971 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,971 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,971 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite53| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,971 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,971 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite51| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,971 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,972 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,972 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem58| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,972 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,972 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite46| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,972 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,972 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite44| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,973 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,973 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,973 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite48| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,973 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,973 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,974 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,981 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem61| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,982 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite62| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,982 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite67| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,982 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite66| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,982 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem61| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,983 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite64| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,983 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite65| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,983 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite62| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,983 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite63| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,984 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem61| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,984 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite62| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,985 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite67| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,985 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite66| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,985 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem61| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,985 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite64| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,985 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite65| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,985 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite62| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,986 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite63| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,987 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,987 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,987 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,987 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,990 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,990 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite47| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,991 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,991 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,991 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite45| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,991 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem61| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,992 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite66| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,992 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,992 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,992 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite49| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,992 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite62| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,993 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite64| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,993 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,993 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,993 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite60| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,993 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,994 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~nondet12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,994 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,994 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem58| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,994 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,994 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite57| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,995 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,995 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,995 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,995 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite55| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,995 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,996 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite53| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,996 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,996 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,996 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite51| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,996 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,997 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite46| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,997 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,997 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,997 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite44| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,997 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite67| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,998 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,998 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,998 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite48| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,998 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~nondet13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,998 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite63| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,999 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,999 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite65| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,999 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,999 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:17,999 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem59| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:18,000 WARN L313 ript$VariableManager]: TermVariabe P1Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:18,000 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:18,000 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:18,000 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite56| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:18,000 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:18,001 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:18,001 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:18,001 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite50| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:18,001 WARN L313 ript$VariableManager]: TermVariabe P1Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:18,001 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite54| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:18,001 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:18,002 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite52| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:18,002 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:18,002 WARN L313 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:18,005 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:18,005 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:18,006 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:18,006 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_reach_error_#t~nondet2.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:18,006 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~mem5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:18,006 WARN L313 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:18,006 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:18,007 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:18,007 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_reach_error_#t~nondet2.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:18,007 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:18,007 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:18,007 WARN L313 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:18,008 WARN L313 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:18,008 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:18,008 WARN L313 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-01-27 02:42:18,010 INFO L149 ThreadInstanceAdder]: Constructed 0 joinOtherThreadTransitions. [2021-01-27 02:42:18,025 INFO L253 AbstractCegarLoop]: Starting to check reachability of 5 error locations. [2021-01-27 02:42:18,054 INFO L377 AbstractCegarLoop]: Interprodecural is true [2021-01-27 02:42:18,054 INFO L378 AbstractCegarLoop]: Hoare is true [2021-01-27 02:42:18,054 INFO L379 AbstractCegarLoop]: Compute interpolants for FPandBP [2021-01-27 02:42:18,054 INFO L380 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2021-01-27 02:42:18,054 INFO L381 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2021-01-27 02:42:18,055 INFO L382 AbstractCegarLoop]: Difference is false [2021-01-27 02:42:18,055 INFO L383 AbstractCegarLoop]: Minimize is NONE [2021-01-27 02:42:18,055 INFO L387 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== Size of Word is: 57 and size of Sequence is : 58[2021-01-27 02:42:18,088 INFO L164 SleepSetCegar]: Size of mCounterexample is: 58 [2021-01-27 02:42:18,089 INFO L165 SleepSetCegar]: [110#[ULTIMATE.startENTRY]don't care, 113#[L-1]don't care, 116#[L-1-1]don't care, 119#[L17]don't care, 122#[L17-1]don't care, 125#[L17-2]don't care, 128#[L17-3]don't care, 131#[L17-4]don't care, 134#[L710]don't care, 137#[L712]don't care, 140#[L713]don't care, 143#[L714]don't care, 146#[L715]don't care, 149#[L716]don't care, 152#[L717]don't care, 155#[L718]don't care, 158#[L719]don't care, 161#[L720]don't care, 164#[L721]don't care, 167#[L722]don't care, 170#[L723]don't care, 173#[L724]don't care, 176#[L725]don't care, 179#[L726]don't care, 182#[L727]don't care, 185#[L728]don't care, 188#[L730]don't care, 191#[L730-1]don't care, 194#[L730-2]don't care, 197#[L732]don't care, 200#[L733]don't care, 203#[L734]don't care, 206#[L735]don't care, 209#[L736]don't care, 212#[L737]don't care, 215#[L738]don't care, 218#[L739]don't care, 221#[L740]don't care, 224#[L741]don't care, 227#[L742]don't care, 230#[L743]don't care, 233#[L744]don't care, 236#[L746]don't care, 239#[L747]don't care, 242#[L748]don't care, 245#[L749]don't care, 248#[L-1-2]don't care, 251#[L-1-3]don't care, 254#[L825]don't care, 257#[L825-1]don't care, 260#[L826]don't care, 263#[L826-1, P0ENTRY]don't care, 268#[L827, P0ENTRY]don't care, 274#[L827-1, P0ENTRY]don't care, 280#[L828, P0ENTRY]don't care, 286#[L828, L752]don't care, 292#[L828, L754]don't care, 300#[L828, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]don't care] [2021-01-27 02:42:18,089 INFO L429 AbstractCegarLoop]: === Iteration 1 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-27 02:42:18,096 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-27 02:42:18,096 INFO L82 PathProgramCache]: Analyzing trace with hash -144078324, now seen corresponding path program 1 times [2021-01-27 02:42:18,108 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-27 02:42:18,108 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [93535745] [2021-01-27 02:42:18,109 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-27 02:42:18,282 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-27 02:42:18,537 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-27 02:42:18,538 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [93535745] [2021-01-27 02:42:18,540 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-27 02:42:18,540 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2021-01-27 02:42:18,542 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2054174541] [2021-01-27 02:42:18,555 INFO L461 AbstractCegarLoop]: Interpolant automaton has 3 states [2021-01-27 02:42:18,555 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-27 02:42:18,574 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-01-27 02:42:18,583 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-01-27 02:42:18,586 INFO L481 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2021-01-27 02:42:18,590 INFO L482 AbstractCegarLoop]: Interpolant automaton has has 3 states, 2 states have (on average 28.5) internal successors, (57), 3 states have internal predecessors, (57), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-01-27 02:42:18,632 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check Size of Word is: 77 and size of Sequence is : 78[2021-01-27 02:42:18,758 INFO L164 SleepSetCegar]: Size of mCounterexample is: 78 [2021-01-27 02:42:18,759 INFO L165 SleepSetCegar]: [305#[ULTIMATE.startENTRY]true, 307#[L-1]true, 309#[L-1-1]true, 311#[L17]true, 313#[L17-1]true, 315#[L17-2]true, 317#[L17-3]true, 319#[L17-4]true, 321#[L710]true, 323#[L712]true, 325#[L713]true, 327#[L714]true, 329#[L715]true, 331#[L716]true, 333#[L717]true, 335#[L718]true, 337#[L719]true, 339#[L720]true, 341#[L721]true, 343#[L722]true, 345#[L723]true, 347#[L724]true, 349#[L725]true, 351#[L726]true, 353#[L727]true, 355#[L728]true, 357#[L730]true, 359#[L730-1]true, 361#[L730-2]true, 363#[L732]true, 365#[L733]true, 367#[L734]true, 369#[L735]true, 371#[L736]true, 373#[L737]true, 375#[L738]true, 377#[L739]true, 379#[L740]true, 381#[L741]true, 383#[L742]true, 385#[L743](= ~x$w_buff0_used~0 0), 387#[L744](= ~x$w_buff0_used~0 0), 389#[L746](= ~x$w_buff0_used~0 0), 391#[L747](= ~x$w_buff0_used~0 0), 393#[L748](= ~x$w_buff0_used~0 0), 395#[L749](= ~x$w_buff0_used~0 0), 397#[L-1-2](= ~x$w_buff0_used~0 0), 399#[L-1-3](= ~x$w_buff0_used~0 0), 401#[L825](= ~x$w_buff0_used~0 0), 403#[L825-1](= ~x$w_buff0_used~0 0), 405#[L826](= ~x$w_buff0_used~0 0), 407#[L826-1, P0ENTRY](= ~x$w_buff0_used~0 0), 410#[L827, P0ENTRY](= ~x$w_buff0_used~0 0), 414#[L827-1, P0ENTRY](= ~x$w_buff0_used~0 0), 418#[L828, P0ENTRY](= ~x$w_buff0_used~0 0), 422#[L828, L752](= ~x$w_buff0_used~0 0), 426#[L828, L754](= ~x$w_buff0_used~0 0), 430#[L828, L765]true, 440#[L772, L828]true, 448#[L828, L775]true, 456#[L828, P0FINAL]true, 464#[L828, P0EXIT]true, 469#[L828-1, P1ENTRY, P0EXIT]true, 476#[P1ENTRY, P0EXIT, L829]true, 484#[L831, P1ENTRY, P0EXIT]true, 492#[P1ENTRY, L832, P0EXIT]true, 500#[L2, P1ENTRY, P0EXIT]true, 508#[L3, P1ENTRY, P0EXIT]true, 518#[L2-1, P1ENTRY, P0EXIT]true, 577#[L839, P1ENTRY, P0EXIT]true, 585#[L844, P1ENTRY, P0EXIT]true, 593#[L845, P1ENTRY, P0EXIT]true, 601#[P1ENTRY, L18, P0EXIT]true, 609#[L18-1, P1ENTRY, P0EXIT]true, 619#[L18-2, P1ENTRY, P0EXIT]true, 629#[L17-5, P1ENTRY, P0EXIT]true, 639#[P1ENTRY, L17-7, P0EXIT]true, 651#[P1ENTRY, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0EXIT]true] [2021-01-27 02:42:18,760 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2021-01-27 02:42:18,760 INFO L429 AbstractCegarLoop]: === Iteration 2 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-27 02:42:18,761 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-27 02:42:18,761 INFO L82 PathProgramCache]: Analyzing trace with hash 288205985, now seen corresponding path program 1 times [2021-01-27 02:42:18,761 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-27 02:42:18,762 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1746990034] [2021-01-27 02:42:18,762 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-27 02:42:18,921 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-27 02:42:19,246 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-27 02:42:19,247 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1746990034] [2021-01-27 02:42:19,247 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-27 02:42:19,247 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2021-01-27 02:42:19,247 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1439438840] [2021-01-27 02:42:19,249 INFO L461 AbstractCegarLoop]: Interpolant automaton has 7 states [2021-01-27 02:42:19,250 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-27 02:42:19,250 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2021-01-27 02:42:19,251 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2021-01-27 02:42:19,251 INFO L481 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2021-01-27 02:42:19,251 INFO L482 AbstractCegarLoop]: Interpolant automaton has has 7 states, 7 states have (on average 11.0) internal successors, (77), 7 states have internal predecessors, (77), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-01-27 02:42:19,608 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check Size of Word is: 79 and size of Sequence is : 80[2021-01-27 02:42:20,180 INFO L164 SleepSetCegar]: Size of mCounterexample is: 80 [2021-01-27 02:42:20,184 INFO L165 SleepSetCegar]: [662#[ULTIMATE.startENTRY]true, 665#[L-1]true, 668#[L-1-1]true, 671#[L17]true, 674#[L17-1]true, 677#[L17-2]true, 680#[L17-3]true, 683#[L17-4]true, 686#[L710]true, 689#[L712]true, 692#[L713](= ~__unbuffered_p1_EAX~0 0), 695#[L714](= ~__unbuffered_p1_EAX~0 0), 698#[L715](= ~__unbuffered_p1_EAX~0 0), 701#[L716](= ~__unbuffered_p1_EAX~0 0), 704#[L717](= ~__unbuffered_p1_EAX~0 0), 707#[L718](= ~__unbuffered_p1_EAX~0 0), 710#[L719](= ~__unbuffered_p1_EAX~0 0), 713#[L720](= ~__unbuffered_p1_EAX~0 0), 716#[L721](= ~__unbuffered_p1_EAX~0 0), 719#[L722](and (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 722#[L723](and (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 725#[L724](and (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 728#[L725](and (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 731#[L726](and (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 734#[L727](and (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 737#[L728](and (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 740#[L730](and (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 743#[L730-1](and (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 746#[L730-2](and (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 749#[L732](and (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 752#[L733](and (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 755#[L734](and (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 758#[L735](and (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 761#[L736](and (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 764#[L737](and (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 767#[L738](and (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 770#[L739](and (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 773#[L740](and (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 776#[L741](and (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 779#[L742](and (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 782#[L743](and (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 785#[L744](and (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 788#[L746](and (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 791#[L747](and (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 794#[L748](and (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 797#[L749](and (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 800#[L-1-2](and (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 803#[L-1-3](and (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 806#[L825](and (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 809#[L825-1](and (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 812#[L826](and (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 815#[L826-1, P0ENTRY](and (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 820#[L827, P0ENTRY](and (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 826#[L827-1, P0ENTRY](and (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 832#[L828, P0ENTRY](and (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 838#[L828, L752](and (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 844#[L828, L754](and (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 850#[L828, L765](and (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 859#[L772, L828](and (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 865#[L828, L775](and (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 871#[L828, P0FINAL](and (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 877#[L828, P0EXIT](and (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 881#[L828-1, P1ENTRY, P0EXIT](and (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 886#[P1ENTRY, P0EXIT, L829](and (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 892#[L831, P1ENTRY, P0EXIT](and (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 898#[P1ENTRY, L832, P0EXIT](and (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 904#[L2, P1ENTRY, P0EXIT](and (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 910#[L3, P1ENTRY, P0EXIT](and (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 916#[L2-1, P1ENTRY, P0EXIT](and (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 963#[L839, P1ENTRY, P0EXIT](and (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 967#[L839, L780, P0EXIT](and (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 1567#[L798, L839, P0EXIT]true, 1575#[L798, L844, P0EXIT]true, 1581#[L798, L845, P0EXIT]true, 1587#[L798, L18, P0EXIT]true, 1593#[L798, L18-1, P0EXIT]true, 1599#[L798, L18-2, P0EXIT]true, 1611#[L17-5, L798, P0EXIT]true, 1624#[L798, L17-7, P0EXIT]true, 1642#[L798, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0EXIT]true] [2021-01-27 02:42:20,184 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2021-01-27 02:42:20,184 INFO L429 AbstractCegarLoop]: === Iteration 3 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-27 02:42:20,185 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-27 02:42:20,185 INFO L82 PathProgramCache]: Analyzing trace with hash -1995331550, now seen corresponding path program 1 times [2021-01-27 02:42:20,185 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-27 02:42:20,185 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [901669513] [2021-01-27 02:42:20,186 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-27 02:42:20,394 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-27 02:42:20,657 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-27 02:42:20,657 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [901669513] [2021-01-27 02:42:20,658 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-27 02:42:20,658 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2021-01-27 02:42:20,658 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [656788949] [2021-01-27 02:42:20,659 INFO L461 AbstractCegarLoop]: Interpolant automaton has 9 states [2021-01-27 02:42:20,659 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-27 02:42:20,660 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2021-01-27 02:42:20,660 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=54, Unknown=0, NotChecked=0, Total=72 [2021-01-27 02:42:20,660 INFO L481 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2021-01-27 02:42:20,660 INFO L482 AbstractCegarLoop]: Interpolant automaton has has 9 states, 9 states have (on average 8.777777777777779) internal successors, (79), 9 states have internal predecessors, (79), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-01-27 02:42:21,039 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-27 02:42:21,347 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-27 02:42:25,963 WARN L146 IndependenceRelation]: Expensive independence query (4060 ms) for statements [1223] L801-->L808: Formula: (let ((.cse12 (= (mod v_~x$w_buff0_used~0_450 256) 0)) (.cse13 (= (mod v_~x$r_buff1_thd2~0_258 256) 0)) (.cse14 (= (mod v_~x$w_buff1_used~0_362 256) 0)) (.cse16 (= (mod v_~x$w_buff0_used~0_451 256) 0)) (.cse15 (= (mod v_~x$r_buff0_thd2~0_286 256) 0))) (let ((.cse4 (select |v_#memory_int_271| |v_~#x~0.base_174|)) (.cse5 (or .cse16 .cse15)) (.cse6 (not .cse16)) (.cse3 (or .cse13 .cse14)) (.cse8 (or .cse12 .cse15)) (.cse9 (not .cse12)) (.cse7 (not .cse15)) (.cse1 (not .cse14)) (.cse2 (not .cse13))) (and (let ((.cse0 (= |v_P1_#t~mem61_42| |v_P1Thread1of1ForFork0_#t~mem61_1|))) (or (and (= |v_P1_#t~ite62_35| |v_P1_#t~ite63_33|) (or (and .cse0 (= |v_P1_#t~ite62_35| v_~x$w_buff1~0_119) .cse1 .cse2) (and (= |v_P1_#t~ite62_35| |v_P1_#t~mem61_42|) .cse3 (= (select .cse4 |v_~#x~0.offset_174|) |v_P1_#t~mem61_42|))) .cse5) (and .cse0 .cse6 (= |v_P1_#t~ite63_33| v_~x$w_buff0~0_134) (= |v_P1_#t~ite62_35| |v_P1Thread1of1ForFork0_#t~ite62_1|) .cse7))) (= (store |v_#memory_int_271| |v_~#x~0.base_174| (store .cse4 |v_~#x~0.offset_174| |v_P1_#t~ite63_33|)) |v_#memory_int_270|) (or (and (= v_~x$r_buff0_thd2~0_286 v_~x$r_buff0_thd2~0_285) .cse8) (and (= v_~x$r_buff0_thd2~0_285 0) .cse9 .cse7)) (let ((.cse10 (= (mod v_~x$r_buff0_thd2~0_285 256) 0)) (.cse11 (= (mod v_~x$w_buff1_used~0_361 256) 0))) (or (and (= v_~x$r_buff1_thd2~0_257 0) (or (and .cse9 (not .cse10)) (and (not .cse11) .cse2))) (and (= v_~x$r_buff1_thd2~0_258 v_~x$r_buff1_thd2~0_257) (or .cse12 .cse10) (or .cse13 .cse11)))) (or (and (= v_~x$w_buff0_used~0_451 v_~x$w_buff0_used~0_450) .cse5) (and .cse6 (= v_~x$w_buff0_used~0_450 0) .cse7)) (or (and (= v_~x$w_buff1_used~0_362 v_~x$w_buff1_used~0_361) .cse3 .cse8) (and (= v_~x$w_buff1_used~0_361 0) (or (and .cse9 .cse7) (and .cse1 .cse2))))))) InVars {~x$w_buff0~0=v_~x$w_buff0~0_134, P1Thread1of1ForFork0_#t~ite62=|v_P1Thread1of1ForFork0_#t~ite62_1|, ~#x~0.offset=|v_~#x~0.offset_174|, ~x$w_buff1~0=v_~x$w_buff1~0_119, #memory_int=|v_#memory_int_271|, ~#x~0.base=|v_~#x~0.base_174|, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_258, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_362, P1Thread1of1ForFork0_#t~mem61=|v_P1Thread1of1ForFork0_#t~mem61_1|, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_286, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_451} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_134, ~#x~0.offset=|v_~#x~0.offset_174|, ~x$w_buff1~0=v_~x$w_buff1~0_119, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_257, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_361, P1Thread1of1ForFork0_#t~mem61=|v_P1Thread1of1ForFork0_#t~mem61_2|, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_285, P1Thread1of1ForFork0_#t~ite66=|v_P1Thread1of1ForFork0_#t~ite66_1|, P1Thread1of1ForFork0_#t~ite67=|v_P1Thread1of1ForFork0_#t~ite67_1|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_450, P1Thread1of1ForFork0_#t~ite62=|v_P1Thread1of1ForFork0_#t~ite62_2|, P1Thread1of1ForFork0_#t~ite63=|v_P1Thread1of1ForFork0_#t~ite63_1|, P1Thread1of1ForFork0_#t~ite64=|v_P1Thread1of1ForFork0_#t~ite64_1|, P1Thread1of1ForFork0_#t~ite65=|v_P1Thread1of1ForFork0_#t~ite65_1|, #memory_int=|v_#memory_int_270|, ~#x~0.base=|v_~#x~0.base_174|} AuxVars[|v_P1_#t~mem61_42|, |v_P1_#t~ite63_33|, |v_P1_#t~ite62_35|] AssignedVars[P1Thread1of1ForFork0_#t~ite62, P1Thread1of1ForFork0_#t~ite63, P1Thread1of1ForFork0_#t~ite64, P1Thread1of1ForFork0_#t~ite65, #memory_int, ~x$r_buff1_thd2~0, ~x$w_buff1_used~0, P1Thread1of1ForFork0_#t~mem61, ~x$r_buff0_thd2~0, P1Thread1of1ForFork0_#t~ite66, P1Thread1of1ForFork0_#t~ite67, ~x$w_buff0_used~0] and [1209] L2-1-->L839: Formula: (let ((.cse15 (= (mod v_~x$w_buff0_used~0_437 256) 0)) (.cse14 (= (mod v_~x$r_buff0_thd0~0_66 256) 0)) (.cse13 (= (mod v_~x$w_buff0_used~0_436 256) 0)) (.cse12 (= (mod v_~x$r_buff1_thd0~0_46 256) 0)) (.cse16 (= (mod v_~x$w_buff1_used~0_348 256) 0))) (let ((.cse0 (select |v_#memory_int_255| |v_~#x~0.base_166|)) (.cse4 (or .cse12 .cse16)) (.cse6 (not .cse16)) (.cse5 (not .cse12)) (.cse8 (or .cse14 .cse13)) (.cse9 (not .cse13)) (.cse7 (or .cse14 .cse15)) (.cse1 (not .cse15)) (.cse3 (not .cse14))) (and (= (store |v_#memory_int_255| |v_~#x~0.base_166| (store .cse0 |v_~#x~0.offset_166| |v_ULTIMATE.start_main_#t~ite72_46|)) |v_#memory_int_254|) (let ((.cse2 (= |v_ULTIMATE.start_main_#t~mem70_43| |v_ULTIMATE.start_main_#t~mem70_38|))) (or (and .cse1 .cse2 (= |v_ULTIMATE.start_main_#t~ite71_36| |v_ULTIMATE.start_main_#t~ite71_31|) (= v_~x$w_buff0~0_126 |v_ULTIMATE.start_main_#t~ite72_46|) .cse3) (and (or (and (= |v_ULTIMATE.start_main_#t~mem70_43| |v_ULTIMATE.start_main_#t~ite71_36|) (= |v_ULTIMATE.start_main_#t~mem70_43| (select .cse0 |v_~#x~0.offset_166|)) .cse4) (and (= |v_ULTIMATE.start_main_#t~ite71_36| v_~x$w_buff1~0_111) .cse2 .cse5 .cse6)) .cse7 (= |v_ULTIMATE.start_main_#t~ite71_36| |v_ULTIMATE.start_main_#t~ite72_46|)))) (or (and (= v_~x$w_buff1_used~0_348 v_~x$w_buff1_used~0_347) .cse4 .cse8) (and (or (and .cse5 .cse6) (and .cse9 .cse3)) (= v_~x$w_buff1_used~0_347 0))) (let ((.cse10 (= (mod v_~x$w_buff1_used~0_347 256) 0)) (.cse11 (= (mod v_~x$r_buff0_thd0~0_65 256) 0))) (or (and (= v_~x$r_buff1_thd0~0_45 0) (or (and (not .cse10) .cse5) (and (not .cse11) .cse9))) (and (or .cse10 .cse12) (= v_~x$r_buff1_thd0~0_45 v_~x$r_buff1_thd0~0_46) (or .cse13 .cse11)))) (or (and (= v_~x$r_buff0_thd0~0_66 v_~x$r_buff0_thd0~0_65) .cse8) (and (= v_~x$r_buff0_thd0~0_65 0) .cse9 .cse3)) (or (and (= v_~x$w_buff0_used~0_437 v_~x$w_buff0_used~0_436) .cse7) (and .cse1 (= v_~x$w_buff0_used~0_436 0) .cse3))))) InVars {~x$w_buff0~0=v_~x$w_buff0~0_126, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_66, ULTIMATE.start_main_#t~ite71=|v_ULTIMATE.start_main_#t~ite71_31|, ~#x~0.offset=|v_~#x~0.offset_166|, ~x$w_buff1~0=v_~x$w_buff1~0_111, #memory_int=|v_#memory_int_255|, ~#x~0.base=|v_~#x~0.base_166|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_348, ULTIMATE.start_main_#t~mem70=|v_ULTIMATE.start_main_#t~mem70_38|, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_46, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_437} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_126, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_65, ~#x~0.offset=|v_~#x~0.offset_166|, ~x$w_buff1~0=v_~x$w_buff1~0_111, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_347, ULTIMATE.start_main_#t~mem70=|v_ULTIMATE.start_main_#t~mem70_37|, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_45, ULTIMATE.start_main_#t~ite75=|v_ULTIMATE.start_main_#t~ite75_24|, ULTIMATE.start_main_#t~ite76=|v_ULTIMATE.start_main_#t~ite76_18|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_436, ULTIMATE.start_main_#t~ite73=|v_ULTIMATE.start_main_#t~ite73_26|, ULTIMATE.start_main_#t~ite74=|v_ULTIMATE.start_main_#t~ite74_26|, ULTIMATE.start_main_#t~ite71=|v_ULTIMATE.start_main_#t~ite71_30|, ULTIMATE.start_main_#t~ite72=|v_ULTIMATE.start_main_#t~ite72_42|, #memory_int=|v_#memory_int_254|, ~#x~0.base=|v_~#x~0.base_166|} AuxVars[|v_ULTIMATE.start_main_#t~ite72_46|, |v_ULTIMATE.start_main_#t~ite71_36|, |v_ULTIMATE.start_main_#t~mem70_43|] AssignedVars[ULTIMATE.start_main_#t~ite73, ~x$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite74, ULTIMATE.start_main_#t~ite71, ULTIMATE.start_main_#t~ite72, #memory_int, ~x$w_buff1_used~0, ULTIMATE.start_main_#t~mem70, ~x$r_buff1_thd0~0, ULTIMATE.start_main_#t~ite75, ULTIMATE.start_main_#t~ite76, ~x$w_buff0_used~0] under condition null [2021-01-27 02:42:26,191 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-27 02:42:30,870 WARN L146 IndependenceRelation]: Expensive independence query (4107 ms) for statements [1223] L801-->L808: Formula: (let ((.cse12 (= (mod v_~x$w_buff0_used~0_450 256) 0)) (.cse13 (= (mod v_~x$r_buff1_thd2~0_258 256) 0)) (.cse14 (= (mod v_~x$w_buff1_used~0_362 256) 0)) (.cse16 (= (mod v_~x$w_buff0_used~0_451 256) 0)) (.cse15 (= (mod v_~x$r_buff0_thd2~0_286 256) 0))) (let ((.cse4 (select |v_#memory_int_271| |v_~#x~0.base_174|)) (.cse5 (or .cse16 .cse15)) (.cse6 (not .cse16)) (.cse3 (or .cse13 .cse14)) (.cse8 (or .cse12 .cse15)) (.cse9 (not .cse12)) (.cse7 (not .cse15)) (.cse1 (not .cse14)) (.cse2 (not .cse13))) (and (let ((.cse0 (= |v_P1_#t~mem61_42| |v_P1Thread1of1ForFork0_#t~mem61_1|))) (or (and (= |v_P1_#t~ite62_35| |v_P1_#t~ite63_33|) (or (and .cse0 (= |v_P1_#t~ite62_35| v_~x$w_buff1~0_119) .cse1 .cse2) (and (= |v_P1_#t~ite62_35| |v_P1_#t~mem61_42|) .cse3 (= (select .cse4 |v_~#x~0.offset_174|) |v_P1_#t~mem61_42|))) .cse5) (and .cse0 .cse6 (= |v_P1_#t~ite63_33| v_~x$w_buff0~0_134) (= |v_P1_#t~ite62_35| |v_P1Thread1of1ForFork0_#t~ite62_1|) .cse7))) (= (store |v_#memory_int_271| |v_~#x~0.base_174| (store .cse4 |v_~#x~0.offset_174| |v_P1_#t~ite63_33|)) |v_#memory_int_270|) (or (and (= v_~x$r_buff0_thd2~0_286 v_~x$r_buff0_thd2~0_285) .cse8) (and (= v_~x$r_buff0_thd2~0_285 0) .cse9 .cse7)) (let ((.cse10 (= (mod v_~x$r_buff0_thd2~0_285 256) 0)) (.cse11 (= (mod v_~x$w_buff1_used~0_361 256) 0))) (or (and (= v_~x$r_buff1_thd2~0_257 0) (or (and .cse9 (not .cse10)) (and (not .cse11) .cse2))) (and (= v_~x$r_buff1_thd2~0_258 v_~x$r_buff1_thd2~0_257) (or .cse12 .cse10) (or .cse13 .cse11)))) (or (and (= v_~x$w_buff0_used~0_451 v_~x$w_buff0_used~0_450) .cse5) (and .cse6 (= v_~x$w_buff0_used~0_450 0) .cse7)) (or (and (= v_~x$w_buff1_used~0_362 v_~x$w_buff1_used~0_361) .cse3 .cse8) (and (= v_~x$w_buff1_used~0_361 0) (or (and .cse9 .cse7) (and .cse1 .cse2))))))) InVars {~x$w_buff0~0=v_~x$w_buff0~0_134, P1Thread1of1ForFork0_#t~ite62=|v_P1Thread1of1ForFork0_#t~ite62_1|, ~#x~0.offset=|v_~#x~0.offset_174|, ~x$w_buff1~0=v_~x$w_buff1~0_119, #memory_int=|v_#memory_int_271|, ~#x~0.base=|v_~#x~0.base_174|, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_258, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_362, P1Thread1of1ForFork0_#t~mem61=|v_P1Thread1of1ForFork0_#t~mem61_1|, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_286, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_451} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_134, ~#x~0.offset=|v_~#x~0.offset_174|, ~x$w_buff1~0=v_~x$w_buff1~0_119, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_257, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_361, P1Thread1of1ForFork0_#t~mem61=|v_P1Thread1of1ForFork0_#t~mem61_2|, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_285, P1Thread1of1ForFork0_#t~ite66=|v_P1Thread1of1ForFork0_#t~ite66_1|, P1Thread1of1ForFork0_#t~ite67=|v_P1Thread1of1ForFork0_#t~ite67_1|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_450, P1Thread1of1ForFork0_#t~ite62=|v_P1Thread1of1ForFork0_#t~ite62_2|, P1Thread1of1ForFork0_#t~ite63=|v_P1Thread1of1ForFork0_#t~ite63_1|, P1Thread1of1ForFork0_#t~ite64=|v_P1Thread1of1ForFork0_#t~ite64_1|, P1Thread1of1ForFork0_#t~ite65=|v_P1Thread1of1ForFork0_#t~ite65_1|, #memory_int=|v_#memory_int_270|, ~#x~0.base=|v_~#x~0.base_174|} AuxVars[|v_P1_#t~mem61_42|, |v_P1_#t~ite63_33|, |v_P1_#t~ite62_35|] AssignedVars[P1Thread1of1ForFork0_#t~ite62, P1Thread1of1ForFork0_#t~ite63, P1Thread1of1ForFork0_#t~ite64, P1Thread1of1ForFork0_#t~ite65, #memory_int, ~x$r_buff1_thd2~0, ~x$w_buff1_used~0, P1Thread1of1ForFork0_#t~mem61, ~x$r_buff0_thd2~0, P1Thread1of1ForFork0_#t~ite66, P1Thread1of1ForFork0_#t~ite67, ~x$w_buff0_used~0] and [1216] L765-->L772: Formula: (let ((.cse10 (= (mod v_~x$w_buff0_used~0_444 256) 0)) (.cse14 (= 0 (mod v_~x$r_buff0_thd1~0_71 256))) (.cse15 (= (mod v_~x$w_buff0_used~0_445 256) 0)) (.cse16 (= (mod v_~x$w_buff1_used~0_356 256) 0)) (.cse13 (= (mod v_~x$r_buff1_thd1~0_52 256) 0))) (let ((.cse5 (or .cse16 .cse13)) (.cse6 (not .cse16)) (.cse4 (select |v_#memory_int_263| |v_~#x~0.base_170|)) (.cse3 (or .cse14 .cse15)) (.cse0 (not .cse15)) (.cse7 (not .cse13)) (.cse1 (not .cse14)) (.cse9 (not .cse10)) (.cse8 (or .cse14 .cse10))) (and (let ((.cse2 (= |v_P0_#t~mem5_52| |v_P0Thread1of1ForFork1_#t~mem5_1|))) (or (and (= |v_P0_#t~ite6_51| |v_P0Thread1of1ForFork1_#t~ite6_1|) .cse0 .cse1 .cse2 (= |v_P0_#t~ite7_39| v_~x$w_buff0~0_130)) (and (= |v_P0_#t~ite7_39| |v_P0_#t~ite6_51|) .cse3 (or (and (= |v_P0_#t~ite6_51| |v_P0_#t~mem5_52|) (= (select .cse4 |v_~#x~0.offset_170|) |v_P0_#t~mem5_52|) .cse5) (and .cse6 .cse2 .cse7 (= |v_P0_#t~ite6_51| v_~x$w_buff1~0_115)))))) (or (and .cse8 .cse5 (= v_~x$w_buff1_used~0_356 v_~x$w_buff1_used~0_355)) (and (= v_~x$w_buff1_used~0_355 0) (or (and .cse1 .cse9) (and .cse6 .cse7)))) (= (store |v_#memory_int_263| |v_~#x~0.base_170| (store .cse4 |v_~#x~0.offset_170| |v_P0_#t~ite7_39|)) |v_#memory_int_262|) (or (and (= v_~x$w_buff0_used~0_444 v_~x$w_buff0_used~0_445) .cse3) (and (= v_~x$w_buff0_used~0_444 0) .cse0 .cse1)) (let ((.cse11 (= (mod v_~x$r_buff0_thd1~0_70 256) 0)) (.cse12 (= (mod v_~x$w_buff1_used~0_355 256) 0))) (or (and (or .cse10 .cse11) (or .cse12 .cse13) (= v_~x$r_buff1_thd1~0_52 v_~x$r_buff1_thd1~0_51)) (and (or (and (not .cse11) .cse9) (and .cse7 (not .cse12))) (= v_~x$r_buff1_thd1~0_51 0)))) (or (and (= v_~x$r_buff0_thd1~0_70 0) .cse1 .cse9) (and .cse8 (= v_~x$r_buff0_thd1~0_71 v_~x$r_buff0_thd1~0_70)))))) InVars {~x$w_buff0~0=v_~x$w_buff0~0_130, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_71, ~#x~0.offset=|v_~#x~0.offset_170|, P0Thread1of1ForFork1_#t~ite6=|v_P0Thread1of1ForFork1_#t~ite6_1|, ~x$w_buff1~0=v_~x$w_buff1~0_115, #memory_int=|v_#memory_int_263|, ~#x~0.base=|v_~#x~0.base_170|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_356, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_52, P0Thread1of1ForFork1_#t~mem5=|v_P0Thread1of1ForFork1_#t~mem5_1|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_445} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_130, P0Thread1of1ForFork1_#t~ite10=|v_P0Thread1of1ForFork1_#t~ite10_1|, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_70, ~#x~0.offset=|v_~#x~0.offset_170|, ~x$w_buff1~0=v_~x$w_buff1~0_115, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_355, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_51, P0Thread1of1ForFork1_#t~mem5=|v_P0Thread1of1ForFork1_#t~mem5_2|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_444, P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_1|, P0Thread1of1ForFork1_#t~ite9=|v_P0Thread1of1ForFork1_#t~ite9_1|, P0Thread1of1ForFork1_#t~ite6=|v_P0Thread1of1ForFork1_#t~ite6_2|, P0Thread1of1ForFork1_#t~ite7=|v_P0Thread1of1ForFork1_#t~ite7_1|, #memory_int=|v_#memory_int_262|, ~#x~0.base=|v_~#x~0.base_170|, P0Thread1of1ForFork1_#t~ite11=|v_P0Thread1of1ForFork1_#t~ite11_1|} AuxVars[|v_P0_#t~mem5_52|, |v_P0_#t~ite7_39|, |v_P0_#t~ite6_51|] AssignedVars[P0Thread1of1ForFork1_#t~ite10, ~x$r_buff0_thd1~0, P0Thread1of1ForFork1_#t~ite8, P0Thread1of1ForFork1_#t~ite9, P0Thread1of1ForFork1_#t~ite6, P0Thread1of1ForFork1_#t~ite7, #memory_int, ~x$w_buff1_used~0, ~x$r_buff1_thd1~0, P0Thread1of1ForFork1_#t~mem5, ~x$w_buff0_used~0, P0Thread1of1ForFork1_#t~ite11] under condition null [2021-01-27 02:42:30,888 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-27 02:42:35,004 WARN L146 IndependenceRelation]: Expensive independence query (4115 ms) for statements [1209] L2-1-->L839: Formula: (let ((.cse15 (= (mod v_~x$w_buff0_used~0_437 256) 0)) (.cse14 (= (mod v_~x$r_buff0_thd0~0_66 256) 0)) (.cse13 (= (mod v_~x$w_buff0_used~0_436 256) 0)) (.cse12 (= (mod v_~x$r_buff1_thd0~0_46 256) 0)) (.cse16 (= (mod v_~x$w_buff1_used~0_348 256) 0))) (let ((.cse0 (select |v_#memory_int_255| |v_~#x~0.base_166|)) (.cse4 (or .cse12 .cse16)) (.cse6 (not .cse16)) (.cse5 (not .cse12)) (.cse8 (or .cse14 .cse13)) (.cse9 (not .cse13)) (.cse7 (or .cse14 .cse15)) (.cse1 (not .cse15)) (.cse3 (not .cse14))) (and (= (store |v_#memory_int_255| |v_~#x~0.base_166| (store .cse0 |v_~#x~0.offset_166| |v_ULTIMATE.start_main_#t~ite72_46|)) |v_#memory_int_254|) (let ((.cse2 (= |v_ULTIMATE.start_main_#t~mem70_43| |v_ULTIMATE.start_main_#t~mem70_38|))) (or (and .cse1 .cse2 (= |v_ULTIMATE.start_main_#t~ite71_36| |v_ULTIMATE.start_main_#t~ite71_31|) (= v_~x$w_buff0~0_126 |v_ULTIMATE.start_main_#t~ite72_46|) .cse3) (and (or (and (= |v_ULTIMATE.start_main_#t~mem70_43| |v_ULTIMATE.start_main_#t~ite71_36|) (= |v_ULTIMATE.start_main_#t~mem70_43| (select .cse0 |v_~#x~0.offset_166|)) .cse4) (and (= |v_ULTIMATE.start_main_#t~ite71_36| v_~x$w_buff1~0_111) .cse2 .cse5 .cse6)) .cse7 (= |v_ULTIMATE.start_main_#t~ite71_36| |v_ULTIMATE.start_main_#t~ite72_46|)))) (or (and (= v_~x$w_buff1_used~0_348 v_~x$w_buff1_used~0_347) .cse4 .cse8) (and (or (and .cse5 .cse6) (and .cse9 .cse3)) (= v_~x$w_buff1_used~0_347 0))) (let ((.cse10 (= (mod v_~x$w_buff1_used~0_347 256) 0)) (.cse11 (= (mod v_~x$r_buff0_thd0~0_65 256) 0))) (or (and (= v_~x$r_buff1_thd0~0_45 0) (or (and (not .cse10) .cse5) (and (not .cse11) .cse9))) (and (or .cse10 .cse12) (= v_~x$r_buff1_thd0~0_45 v_~x$r_buff1_thd0~0_46) (or .cse13 .cse11)))) (or (and (= v_~x$r_buff0_thd0~0_66 v_~x$r_buff0_thd0~0_65) .cse8) (and (= v_~x$r_buff0_thd0~0_65 0) .cse9 .cse3)) (or (and (= v_~x$w_buff0_used~0_437 v_~x$w_buff0_used~0_436) .cse7) (and .cse1 (= v_~x$w_buff0_used~0_436 0) .cse3))))) InVars {~x$w_buff0~0=v_~x$w_buff0~0_126, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_66, ULTIMATE.start_main_#t~ite71=|v_ULTIMATE.start_main_#t~ite71_31|, ~#x~0.offset=|v_~#x~0.offset_166|, ~x$w_buff1~0=v_~x$w_buff1~0_111, #memory_int=|v_#memory_int_255|, ~#x~0.base=|v_~#x~0.base_166|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_348, ULTIMATE.start_main_#t~mem70=|v_ULTIMATE.start_main_#t~mem70_38|, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_46, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_437} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_126, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_65, ~#x~0.offset=|v_~#x~0.offset_166|, ~x$w_buff1~0=v_~x$w_buff1~0_111, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_347, ULTIMATE.start_main_#t~mem70=|v_ULTIMATE.start_main_#t~mem70_37|, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_45, ULTIMATE.start_main_#t~ite75=|v_ULTIMATE.start_main_#t~ite75_24|, ULTIMATE.start_main_#t~ite76=|v_ULTIMATE.start_main_#t~ite76_18|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_436, ULTIMATE.start_main_#t~ite73=|v_ULTIMATE.start_main_#t~ite73_26|, ULTIMATE.start_main_#t~ite74=|v_ULTIMATE.start_main_#t~ite74_26|, ULTIMATE.start_main_#t~ite71=|v_ULTIMATE.start_main_#t~ite71_30|, ULTIMATE.start_main_#t~ite72=|v_ULTIMATE.start_main_#t~ite72_42|, #memory_int=|v_#memory_int_254|, ~#x~0.base=|v_~#x~0.base_166|} AuxVars[|v_ULTIMATE.start_main_#t~ite72_46|, |v_ULTIMATE.start_main_#t~ite71_36|, |v_ULTIMATE.start_main_#t~mem70_43|] AssignedVars[ULTIMATE.start_main_#t~ite73, ~x$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite74, ULTIMATE.start_main_#t~ite71, ULTIMATE.start_main_#t~ite72, #memory_int, ~x$w_buff1_used~0, ULTIMATE.start_main_#t~mem70, ~x$r_buff1_thd0~0, ULTIMATE.start_main_#t~ite75, ULTIMATE.start_main_#t~ite76, ~x$w_buff0_used~0] and [1216] L765-->L772: Formula: (let ((.cse10 (= (mod v_~x$w_buff0_used~0_444 256) 0)) (.cse14 (= 0 (mod v_~x$r_buff0_thd1~0_71 256))) (.cse15 (= (mod v_~x$w_buff0_used~0_445 256) 0)) (.cse16 (= (mod v_~x$w_buff1_used~0_356 256) 0)) (.cse13 (= (mod v_~x$r_buff1_thd1~0_52 256) 0))) (let ((.cse5 (or .cse16 .cse13)) (.cse6 (not .cse16)) (.cse4 (select |v_#memory_int_263| |v_~#x~0.base_170|)) (.cse3 (or .cse14 .cse15)) (.cse0 (not .cse15)) (.cse7 (not .cse13)) (.cse1 (not .cse14)) (.cse9 (not .cse10)) (.cse8 (or .cse14 .cse10))) (and (let ((.cse2 (= |v_P0_#t~mem5_52| |v_P0Thread1of1ForFork1_#t~mem5_1|))) (or (and (= |v_P0_#t~ite6_51| |v_P0Thread1of1ForFork1_#t~ite6_1|) .cse0 .cse1 .cse2 (= |v_P0_#t~ite7_39| v_~x$w_buff0~0_130)) (and (= |v_P0_#t~ite7_39| |v_P0_#t~ite6_51|) .cse3 (or (and (= |v_P0_#t~ite6_51| |v_P0_#t~mem5_52|) (= (select .cse4 |v_~#x~0.offset_170|) |v_P0_#t~mem5_52|) .cse5) (and .cse6 .cse2 .cse7 (= |v_P0_#t~ite6_51| v_~x$w_buff1~0_115)))))) (or (and .cse8 .cse5 (= v_~x$w_buff1_used~0_356 v_~x$w_buff1_used~0_355)) (and (= v_~x$w_buff1_used~0_355 0) (or (and .cse1 .cse9) (and .cse6 .cse7)))) (= (store |v_#memory_int_263| |v_~#x~0.base_170| (store .cse4 |v_~#x~0.offset_170| |v_P0_#t~ite7_39|)) |v_#memory_int_262|) (or (and (= v_~x$w_buff0_used~0_444 v_~x$w_buff0_used~0_445) .cse3) (and (= v_~x$w_buff0_used~0_444 0) .cse0 .cse1)) (let ((.cse11 (= (mod v_~x$r_buff0_thd1~0_70 256) 0)) (.cse12 (= (mod v_~x$w_buff1_used~0_355 256) 0))) (or (and (or .cse10 .cse11) (or .cse12 .cse13) (= v_~x$r_buff1_thd1~0_52 v_~x$r_buff1_thd1~0_51)) (and (or (and (not .cse11) .cse9) (and .cse7 (not .cse12))) (= v_~x$r_buff1_thd1~0_51 0)))) (or (and (= v_~x$r_buff0_thd1~0_70 0) .cse1 .cse9) (and .cse8 (= v_~x$r_buff0_thd1~0_71 v_~x$r_buff0_thd1~0_70)))))) InVars {~x$w_buff0~0=v_~x$w_buff0~0_130, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_71, ~#x~0.offset=|v_~#x~0.offset_170|, P0Thread1of1ForFork1_#t~ite6=|v_P0Thread1of1ForFork1_#t~ite6_1|, ~x$w_buff1~0=v_~x$w_buff1~0_115, #memory_int=|v_#memory_int_263|, ~#x~0.base=|v_~#x~0.base_170|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_356, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_52, P0Thread1of1ForFork1_#t~mem5=|v_P0Thread1of1ForFork1_#t~mem5_1|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_445} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_130, P0Thread1of1ForFork1_#t~ite10=|v_P0Thread1of1ForFork1_#t~ite10_1|, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_70, ~#x~0.offset=|v_~#x~0.offset_170|, ~x$w_buff1~0=v_~x$w_buff1~0_115, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_355, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_51, P0Thread1of1ForFork1_#t~mem5=|v_P0Thread1of1ForFork1_#t~mem5_2|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_444, P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_1|, P0Thread1of1ForFork1_#t~ite9=|v_P0Thread1of1ForFork1_#t~ite9_1|, P0Thread1of1ForFork1_#t~ite6=|v_P0Thread1of1ForFork1_#t~ite6_2|, P0Thread1of1ForFork1_#t~ite7=|v_P0Thread1of1ForFork1_#t~ite7_1|, #memory_int=|v_#memory_int_262|, ~#x~0.base=|v_~#x~0.base_170|, P0Thread1of1ForFork1_#t~ite11=|v_P0Thread1of1ForFork1_#t~ite11_1|} AuxVars[|v_P0_#t~mem5_52|, |v_P0_#t~ite7_39|, |v_P0_#t~ite6_51|] AssignedVars[P0Thread1of1ForFork1_#t~ite10, ~x$r_buff0_thd1~0, P0Thread1of1ForFork1_#t~ite8, P0Thread1of1ForFork1_#t~ite9, P0Thread1of1ForFork1_#t~ite6, P0Thread1of1ForFork1_#t~ite7, #memory_int, ~x$w_buff1_used~0, ~x$r_buff1_thd1~0, P0Thread1of1ForFork1_#t~mem5, ~x$w_buff0_used~0, P0Thread1of1ForFork1_#t~ite11] under condition null [2021-01-27 02:42:38,561 WARN L146 IndependenceRelation]: Expensive independence query (3555 ms) for statements [1209] L2-1-->L839: Formula: (let ((.cse15 (= (mod v_~x$w_buff0_used~0_437 256) 0)) (.cse14 (= (mod v_~x$r_buff0_thd0~0_66 256) 0)) (.cse13 (= (mod v_~x$w_buff0_used~0_436 256) 0)) (.cse12 (= (mod v_~x$r_buff1_thd0~0_46 256) 0)) (.cse16 (= (mod v_~x$w_buff1_used~0_348 256) 0))) (let ((.cse0 (select |v_#memory_int_255| |v_~#x~0.base_166|)) (.cse4 (or .cse12 .cse16)) (.cse6 (not .cse16)) (.cse5 (not .cse12)) (.cse8 (or .cse14 .cse13)) (.cse9 (not .cse13)) (.cse7 (or .cse14 .cse15)) (.cse1 (not .cse15)) (.cse3 (not .cse14))) (and (= (store |v_#memory_int_255| |v_~#x~0.base_166| (store .cse0 |v_~#x~0.offset_166| |v_ULTIMATE.start_main_#t~ite72_46|)) |v_#memory_int_254|) (let ((.cse2 (= |v_ULTIMATE.start_main_#t~mem70_43| |v_ULTIMATE.start_main_#t~mem70_38|))) (or (and .cse1 .cse2 (= |v_ULTIMATE.start_main_#t~ite71_36| |v_ULTIMATE.start_main_#t~ite71_31|) (= v_~x$w_buff0~0_126 |v_ULTIMATE.start_main_#t~ite72_46|) .cse3) (and (or (and (= |v_ULTIMATE.start_main_#t~mem70_43| |v_ULTIMATE.start_main_#t~ite71_36|) (= |v_ULTIMATE.start_main_#t~mem70_43| (select .cse0 |v_~#x~0.offset_166|)) .cse4) (and (= |v_ULTIMATE.start_main_#t~ite71_36| v_~x$w_buff1~0_111) .cse2 .cse5 .cse6)) .cse7 (= |v_ULTIMATE.start_main_#t~ite71_36| |v_ULTIMATE.start_main_#t~ite72_46|)))) (or (and (= v_~x$w_buff1_used~0_348 v_~x$w_buff1_used~0_347) .cse4 .cse8) (and (or (and .cse5 .cse6) (and .cse9 .cse3)) (= v_~x$w_buff1_used~0_347 0))) (let ((.cse10 (= (mod v_~x$w_buff1_used~0_347 256) 0)) (.cse11 (= (mod v_~x$r_buff0_thd0~0_65 256) 0))) (or (and (= v_~x$r_buff1_thd0~0_45 0) (or (and (not .cse10) .cse5) (and (not .cse11) .cse9))) (and (or .cse10 .cse12) (= v_~x$r_buff1_thd0~0_45 v_~x$r_buff1_thd0~0_46) (or .cse13 .cse11)))) (or (and (= v_~x$r_buff0_thd0~0_66 v_~x$r_buff0_thd0~0_65) .cse8) (and (= v_~x$r_buff0_thd0~0_65 0) .cse9 .cse3)) (or (and (= v_~x$w_buff0_used~0_437 v_~x$w_buff0_used~0_436) .cse7) (and .cse1 (= v_~x$w_buff0_used~0_436 0) .cse3))))) InVars {~x$w_buff0~0=v_~x$w_buff0~0_126, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_66, ULTIMATE.start_main_#t~ite71=|v_ULTIMATE.start_main_#t~ite71_31|, ~#x~0.offset=|v_~#x~0.offset_166|, ~x$w_buff1~0=v_~x$w_buff1~0_111, #memory_int=|v_#memory_int_255|, ~#x~0.base=|v_~#x~0.base_166|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_348, ULTIMATE.start_main_#t~mem70=|v_ULTIMATE.start_main_#t~mem70_38|, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_46, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_437} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_126, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_65, ~#x~0.offset=|v_~#x~0.offset_166|, ~x$w_buff1~0=v_~x$w_buff1~0_111, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_347, ULTIMATE.start_main_#t~mem70=|v_ULTIMATE.start_main_#t~mem70_37|, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_45, ULTIMATE.start_main_#t~ite75=|v_ULTIMATE.start_main_#t~ite75_24|, ULTIMATE.start_main_#t~ite76=|v_ULTIMATE.start_main_#t~ite76_18|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_436, ULTIMATE.start_main_#t~ite73=|v_ULTIMATE.start_main_#t~ite73_26|, ULTIMATE.start_main_#t~ite74=|v_ULTIMATE.start_main_#t~ite74_26|, ULTIMATE.start_main_#t~ite71=|v_ULTIMATE.start_main_#t~ite71_30|, ULTIMATE.start_main_#t~ite72=|v_ULTIMATE.start_main_#t~ite72_42|, #memory_int=|v_#memory_int_254|, ~#x~0.base=|v_~#x~0.base_166|} AuxVars[|v_ULTIMATE.start_main_#t~ite72_46|, |v_ULTIMATE.start_main_#t~ite71_36|, |v_ULTIMATE.start_main_#t~mem70_43|] AssignedVars[ULTIMATE.start_main_#t~ite73, ~x$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite74, ULTIMATE.start_main_#t~ite71, ULTIMATE.start_main_#t~ite72, #memory_int, ~x$w_buff1_used~0, ULTIMATE.start_main_#t~mem70, ~x$r_buff1_thd0~0, ULTIMATE.start_main_#t~ite75, ULTIMATE.start_main_#t~ite76, ~x$w_buff0_used~0] and [1216] L765-->L772: Formula: (let ((.cse10 (= (mod v_~x$w_buff0_used~0_444 256) 0)) (.cse14 (= 0 (mod v_~x$r_buff0_thd1~0_71 256))) (.cse15 (= (mod v_~x$w_buff0_used~0_445 256) 0)) (.cse16 (= (mod v_~x$w_buff1_used~0_356 256) 0)) (.cse13 (= (mod v_~x$r_buff1_thd1~0_52 256) 0))) (let ((.cse5 (or .cse16 .cse13)) (.cse6 (not .cse16)) (.cse4 (select |v_#memory_int_263| |v_~#x~0.base_170|)) (.cse3 (or .cse14 .cse15)) (.cse0 (not .cse15)) (.cse7 (not .cse13)) (.cse1 (not .cse14)) (.cse9 (not .cse10)) (.cse8 (or .cse14 .cse10))) (and (let ((.cse2 (= |v_P0_#t~mem5_52| |v_P0Thread1of1ForFork1_#t~mem5_1|))) (or (and (= |v_P0_#t~ite6_51| |v_P0Thread1of1ForFork1_#t~ite6_1|) .cse0 .cse1 .cse2 (= |v_P0_#t~ite7_39| v_~x$w_buff0~0_130)) (and (= |v_P0_#t~ite7_39| |v_P0_#t~ite6_51|) .cse3 (or (and (= |v_P0_#t~ite6_51| |v_P0_#t~mem5_52|) (= (select .cse4 |v_~#x~0.offset_170|) |v_P0_#t~mem5_52|) .cse5) (and .cse6 .cse2 .cse7 (= |v_P0_#t~ite6_51| v_~x$w_buff1~0_115)))))) (or (and .cse8 .cse5 (= v_~x$w_buff1_used~0_356 v_~x$w_buff1_used~0_355)) (and (= v_~x$w_buff1_used~0_355 0) (or (and .cse1 .cse9) (and .cse6 .cse7)))) (= (store |v_#memory_int_263| |v_~#x~0.base_170| (store .cse4 |v_~#x~0.offset_170| |v_P0_#t~ite7_39|)) |v_#memory_int_262|) (or (and (= v_~x$w_buff0_used~0_444 v_~x$w_buff0_used~0_445) .cse3) (and (= v_~x$w_buff0_used~0_444 0) .cse0 .cse1)) (let ((.cse11 (= (mod v_~x$r_buff0_thd1~0_70 256) 0)) (.cse12 (= (mod v_~x$w_buff1_used~0_355 256) 0))) (or (and (or .cse10 .cse11) (or .cse12 .cse13) (= v_~x$r_buff1_thd1~0_52 v_~x$r_buff1_thd1~0_51)) (and (or (and (not .cse11) .cse9) (and .cse7 (not .cse12))) (= v_~x$r_buff1_thd1~0_51 0)))) (or (and (= v_~x$r_buff0_thd1~0_70 0) .cse1 .cse9) (and .cse8 (= v_~x$r_buff0_thd1~0_71 v_~x$r_buff0_thd1~0_70)))))) InVars {~x$w_buff0~0=v_~x$w_buff0~0_130, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_71, ~#x~0.offset=|v_~#x~0.offset_170|, P0Thread1of1ForFork1_#t~ite6=|v_P0Thread1of1ForFork1_#t~ite6_1|, ~x$w_buff1~0=v_~x$w_buff1~0_115, #memory_int=|v_#memory_int_263|, ~#x~0.base=|v_~#x~0.base_170|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_356, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_52, P0Thread1of1ForFork1_#t~mem5=|v_P0Thread1of1ForFork1_#t~mem5_1|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_445} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_130, P0Thread1of1ForFork1_#t~ite10=|v_P0Thread1of1ForFork1_#t~ite10_1|, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_70, ~#x~0.offset=|v_~#x~0.offset_170|, ~x$w_buff1~0=v_~x$w_buff1~0_115, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_355, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_51, P0Thread1of1ForFork1_#t~mem5=|v_P0Thread1of1ForFork1_#t~mem5_2|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_444, P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_1|, P0Thread1of1ForFork1_#t~ite9=|v_P0Thread1of1ForFork1_#t~ite9_1|, P0Thread1of1ForFork1_#t~ite6=|v_P0Thread1of1ForFork1_#t~ite6_2|, P0Thread1of1ForFork1_#t~ite7=|v_P0Thread1of1ForFork1_#t~ite7_1|, #memory_int=|v_#memory_int_262|, ~#x~0.base=|v_~#x~0.base_170|, P0Thread1of1ForFork1_#t~ite11=|v_P0Thread1of1ForFork1_#t~ite11_1|} AuxVars[|v_P0_#t~mem5_52|, |v_P0_#t~ite7_39|, |v_P0_#t~ite6_51|] AssignedVars[P0Thread1of1ForFork1_#t~ite10, ~x$r_buff0_thd1~0, P0Thread1of1ForFork1_#t~ite8, P0Thread1of1ForFork1_#t~ite9, P0Thread1of1ForFork1_#t~ite6, P0Thread1of1ForFork1_#t~ite7, #memory_int, ~x$w_buff1_used~0, ~x$r_buff1_thd1~0, P0Thread1of1ForFork1_#t~mem5, ~x$w_buff0_used~0, P0Thread1of1ForFork1_#t~ite11] under condition 1848#(and (<= 1 ~x$w_buff0_used~0) (<= (div ~x$w_buff0_used~0 256) 0) (= ~y~0 0) (= ~__unbuffered_p0_EAX~0 0) (= 1 ~x$r_buff0_thd1~0)) [2021-01-27 02:42:38,791 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-27 02:42:39,566 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-27 02:42:40,572 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-27 02:42:44,564 WARN L146 IndependenceRelation]: Expensive independence query (3990 ms) for statements [1223] L801-->L808: Formula: (let ((.cse12 (= (mod v_~x$w_buff0_used~0_450 256) 0)) (.cse13 (= (mod v_~x$r_buff1_thd2~0_258 256) 0)) (.cse14 (= (mod v_~x$w_buff1_used~0_362 256) 0)) (.cse16 (= (mod v_~x$w_buff0_used~0_451 256) 0)) (.cse15 (= (mod v_~x$r_buff0_thd2~0_286 256) 0))) (let ((.cse4 (select |v_#memory_int_271| |v_~#x~0.base_174|)) (.cse5 (or .cse16 .cse15)) (.cse6 (not .cse16)) (.cse3 (or .cse13 .cse14)) (.cse8 (or .cse12 .cse15)) (.cse9 (not .cse12)) (.cse7 (not .cse15)) (.cse1 (not .cse14)) (.cse2 (not .cse13))) (and (let ((.cse0 (= |v_P1_#t~mem61_42| |v_P1Thread1of1ForFork0_#t~mem61_1|))) (or (and (= |v_P1_#t~ite62_35| |v_P1_#t~ite63_33|) (or (and .cse0 (= |v_P1_#t~ite62_35| v_~x$w_buff1~0_119) .cse1 .cse2) (and (= |v_P1_#t~ite62_35| |v_P1_#t~mem61_42|) .cse3 (= (select .cse4 |v_~#x~0.offset_174|) |v_P1_#t~mem61_42|))) .cse5) (and .cse0 .cse6 (= |v_P1_#t~ite63_33| v_~x$w_buff0~0_134) (= |v_P1_#t~ite62_35| |v_P1Thread1of1ForFork0_#t~ite62_1|) .cse7))) (= (store |v_#memory_int_271| |v_~#x~0.base_174| (store .cse4 |v_~#x~0.offset_174| |v_P1_#t~ite63_33|)) |v_#memory_int_270|) (or (and (= v_~x$r_buff0_thd2~0_286 v_~x$r_buff0_thd2~0_285) .cse8) (and (= v_~x$r_buff0_thd2~0_285 0) .cse9 .cse7)) (let ((.cse10 (= (mod v_~x$r_buff0_thd2~0_285 256) 0)) (.cse11 (= (mod v_~x$w_buff1_used~0_361 256) 0))) (or (and (= v_~x$r_buff1_thd2~0_257 0) (or (and .cse9 (not .cse10)) (and (not .cse11) .cse2))) (and (= v_~x$r_buff1_thd2~0_258 v_~x$r_buff1_thd2~0_257) (or .cse12 .cse10) (or .cse13 .cse11)))) (or (and (= v_~x$w_buff0_used~0_451 v_~x$w_buff0_used~0_450) .cse5) (and .cse6 (= v_~x$w_buff0_used~0_450 0) .cse7)) (or (and (= v_~x$w_buff1_used~0_362 v_~x$w_buff1_used~0_361) .cse3 .cse8) (and (= v_~x$w_buff1_used~0_361 0) (or (and .cse9 .cse7) (and .cse1 .cse2))))))) InVars {~x$w_buff0~0=v_~x$w_buff0~0_134, P1Thread1of1ForFork0_#t~ite62=|v_P1Thread1of1ForFork0_#t~ite62_1|, ~#x~0.offset=|v_~#x~0.offset_174|, ~x$w_buff1~0=v_~x$w_buff1~0_119, #memory_int=|v_#memory_int_271|, ~#x~0.base=|v_~#x~0.base_174|, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_258, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_362, P1Thread1of1ForFork0_#t~mem61=|v_P1Thread1of1ForFork0_#t~mem61_1|, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_286, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_451} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_134, ~#x~0.offset=|v_~#x~0.offset_174|, ~x$w_buff1~0=v_~x$w_buff1~0_119, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_257, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_361, P1Thread1of1ForFork0_#t~mem61=|v_P1Thread1of1ForFork0_#t~mem61_2|, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_285, P1Thread1of1ForFork0_#t~ite66=|v_P1Thread1of1ForFork0_#t~ite66_1|, P1Thread1of1ForFork0_#t~ite67=|v_P1Thread1of1ForFork0_#t~ite67_1|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_450, P1Thread1of1ForFork0_#t~ite62=|v_P1Thread1of1ForFork0_#t~ite62_2|, P1Thread1of1ForFork0_#t~ite63=|v_P1Thread1of1ForFork0_#t~ite63_1|, P1Thread1of1ForFork0_#t~ite64=|v_P1Thread1of1ForFork0_#t~ite64_1|, P1Thread1of1ForFork0_#t~ite65=|v_P1Thread1of1ForFork0_#t~ite65_1|, #memory_int=|v_#memory_int_270|, ~#x~0.base=|v_~#x~0.base_174|} AuxVars[|v_P1_#t~mem61_42|, |v_P1_#t~ite63_33|, |v_P1_#t~ite62_35|] AssignedVars[P1Thread1of1ForFork0_#t~ite62, P1Thread1of1ForFork0_#t~ite63, P1Thread1of1ForFork0_#t~ite64, P1Thread1of1ForFork0_#t~ite65, #memory_int, ~x$r_buff1_thd2~0, ~x$w_buff1_used~0, P1Thread1of1ForFork0_#t~mem61, ~x$r_buff0_thd2~0, P1Thread1of1ForFork0_#t~ite66, P1Thread1of1ForFork0_#t~ite67, ~x$w_buff0_used~0] and [1216] L765-->L772: Formula: (let ((.cse10 (= (mod v_~x$w_buff0_used~0_444 256) 0)) (.cse14 (= 0 (mod v_~x$r_buff0_thd1~0_71 256))) (.cse15 (= (mod v_~x$w_buff0_used~0_445 256) 0)) (.cse16 (= (mod v_~x$w_buff1_used~0_356 256) 0)) (.cse13 (= (mod v_~x$r_buff1_thd1~0_52 256) 0))) (let ((.cse5 (or .cse16 .cse13)) (.cse6 (not .cse16)) (.cse4 (select |v_#memory_int_263| |v_~#x~0.base_170|)) (.cse3 (or .cse14 .cse15)) (.cse0 (not .cse15)) (.cse7 (not .cse13)) (.cse1 (not .cse14)) (.cse9 (not .cse10)) (.cse8 (or .cse14 .cse10))) (and (let ((.cse2 (= |v_P0_#t~mem5_52| |v_P0Thread1of1ForFork1_#t~mem5_1|))) (or (and (= |v_P0_#t~ite6_51| |v_P0Thread1of1ForFork1_#t~ite6_1|) .cse0 .cse1 .cse2 (= |v_P0_#t~ite7_39| v_~x$w_buff0~0_130)) (and (= |v_P0_#t~ite7_39| |v_P0_#t~ite6_51|) .cse3 (or (and (= |v_P0_#t~ite6_51| |v_P0_#t~mem5_52|) (= (select .cse4 |v_~#x~0.offset_170|) |v_P0_#t~mem5_52|) .cse5) (and .cse6 .cse2 .cse7 (= |v_P0_#t~ite6_51| v_~x$w_buff1~0_115)))))) (or (and .cse8 .cse5 (= v_~x$w_buff1_used~0_356 v_~x$w_buff1_used~0_355)) (and (= v_~x$w_buff1_used~0_355 0) (or (and .cse1 .cse9) (and .cse6 .cse7)))) (= (store |v_#memory_int_263| |v_~#x~0.base_170| (store .cse4 |v_~#x~0.offset_170| |v_P0_#t~ite7_39|)) |v_#memory_int_262|) (or (and (= v_~x$w_buff0_used~0_444 v_~x$w_buff0_used~0_445) .cse3) (and (= v_~x$w_buff0_used~0_444 0) .cse0 .cse1)) (let ((.cse11 (= (mod v_~x$r_buff0_thd1~0_70 256) 0)) (.cse12 (= (mod v_~x$w_buff1_used~0_355 256) 0))) (or (and (or .cse10 .cse11) (or .cse12 .cse13) (= v_~x$r_buff1_thd1~0_52 v_~x$r_buff1_thd1~0_51)) (and (or (and (not .cse11) .cse9) (and .cse7 (not .cse12))) (= v_~x$r_buff1_thd1~0_51 0)))) (or (and (= v_~x$r_buff0_thd1~0_70 0) .cse1 .cse9) (and .cse8 (= v_~x$r_buff0_thd1~0_71 v_~x$r_buff0_thd1~0_70)))))) InVars {~x$w_buff0~0=v_~x$w_buff0~0_130, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_71, ~#x~0.offset=|v_~#x~0.offset_170|, P0Thread1of1ForFork1_#t~ite6=|v_P0Thread1of1ForFork1_#t~ite6_1|, ~x$w_buff1~0=v_~x$w_buff1~0_115, #memory_int=|v_#memory_int_263|, ~#x~0.base=|v_~#x~0.base_170|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_356, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_52, P0Thread1of1ForFork1_#t~mem5=|v_P0Thread1of1ForFork1_#t~mem5_1|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_445} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_130, P0Thread1of1ForFork1_#t~ite10=|v_P0Thread1of1ForFork1_#t~ite10_1|, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_70, ~#x~0.offset=|v_~#x~0.offset_170|, ~x$w_buff1~0=v_~x$w_buff1~0_115, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_355, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_51, P0Thread1of1ForFork1_#t~mem5=|v_P0Thread1of1ForFork1_#t~mem5_2|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_444, P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_1|, P0Thread1of1ForFork1_#t~ite9=|v_P0Thread1of1ForFork1_#t~ite9_1|, P0Thread1of1ForFork1_#t~ite6=|v_P0Thread1of1ForFork1_#t~ite6_2|, P0Thread1of1ForFork1_#t~ite7=|v_P0Thread1of1ForFork1_#t~ite7_1|, #memory_int=|v_#memory_int_262|, ~#x~0.base=|v_~#x~0.base_170|, P0Thread1of1ForFork1_#t~ite11=|v_P0Thread1of1ForFork1_#t~ite11_1|} AuxVars[|v_P0_#t~mem5_52|, |v_P0_#t~ite7_39|, |v_P0_#t~ite6_51|] AssignedVars[P0Thread1of1ForFork1_#t~ite10, ~x$r_buff0_thd1~0, P0Thread1of1ForFork1_#t~ite8, P0Thread1of1ForFork1_#t~ite9, P0Thread1of1ForFork1_#t~ite6, P0Thread1of1ForFork1_#t~ite7, #memory_int, ~x$w_buff1_used~0, ~x$r_buff1_thd1~0, P0Thread1of1ForFork1_#t~mem5, ~x$w_buff0_used~0, P0Thread1of1ForFork1_#t~ite11] under condition 1652#(and (<= 1 ~x$w_buff0_used~0) (<= (div ~x$w_buff0_used~0 256) 0) (= ~__unbuffered_p0_EAX~0 0) (= 1 ~x$r_buff0_thd1~0)) [2021-01-27 02:42:44,570 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-27 02:42:46,094 WARN L146 IndependenceRelation]: Expensive independence query (1326 ms) for statements [1223] L801-->L808: Formula: (let ((.cse12 (= (mod v_~x$w_buff0_used~0_450 256) 0)) (.cse13 (= (mod v_~x$r_buff1_thd2~0_258 256) 0)) (.cse14 (= (mod v_~x$w_buff1_used~0_362 256) 0)) (.cse16 (= (mod v_~x$w_buff0_used~0_451 256) 0)) (.cse15 (= (mod v_~x$r_buff0_thd2~0_286 256) 0))) (let ((.cse4 (select |v_#memory_int_271| |v_~#x~0.base_174|)) (.cse5 (or .cse16 .cse15)) (.cse6 (not .cse16)) (.cse3 (or .cse13 .cse14)) (.cse8 (or .cse12 .cse15)) (.cse9 (not .cse12)) (.cse7 (not .cse15)) (.cse1 (not .cse14)) (.cse2 (not .cse13))) (and (let ((.cse0 (= |v_P1_#t~mem61_42| |v_P1Thread1of1ForFork0_#t~mem61_1|))) (or (and (= |v_P1_#t~ite62_35| |v_P1_#t~ite63_33|) (or (and .cse0 (= |v_P1_#t~ite62_35| v_~x$w_buff1~0_119) .cse1 .cse2) (and (= |v_P1_#t~ite62_35| |v_P1_#t~mem61_42|) .cse3 (= (select .cse4 |v_~#x~0.offset_174|) |v_P1_#t~mem61_42|))) .cse5) (and .cse0 .cse6 (= |v_P1_#t~ite63_33| v_~x$w_buff0~0_134) (= |v_P1_#t~ite62_35| |v_P1Thread1of1ForFork0_#t~ite62_1|) .cse7))) (= (store |v_#memory_int_271| |v_~#x~0.base_174| (store .cse4 |v_~#x~0.offset_174| |v_P1_#t~ite63_33|)) |v_#memory_int_270|) (or (and (= v_~x$r_buff0_thd2~0_286 v_~x$r_buff0_thd2~0_285) .cse8) (and (= v_~x$r_buff0_thd2~0_285 0) .cse9 .cse7)) (let ((.cse10 (= (mod v_~x$r_buff0_thd2~0_285 256) 0)) (.cse11 (= (mod v_~x$w_buff1_used~0_361 256) 0))) (or (and (= v_~x$r_buff1_thd2~0_257 0) (or (and .cse9 (not .cse10)) (and (not .cse11) .cse2))) (and (= v_~x$r_buff1_thd2~0_258 v_~x$r_buff1_thd2~0_257) (or .cse12 .cse10) (or .cse13 .cse11)))) (or (and (= v_~x$w_buff0_used~0_451 v_~x$w_buff0_used~0_450) .cse5) (and .cse6 (= v_~x$w_buff0_used~0_450 0) .cse7)) (or (and (= v_~x$w_buff1_used~0_362 v_~x$w_buff1_used~0_361) .cse3 .cse8) (and (= v_~x$w_buff1_used~0_361 0) (or (and .cse9 .cse7) (and .cse1 .cse2))))))) InVars {~x$w_buff0~0=v_~x$w_buff0~0_134, P1Thread1of1ForFork0_#t~ite62=|v_P1Thread1of1ForFork0_#t~ite62_1|, ~#x~0.offset=|v_~#x~0.offset_174|, ~x$w_buff1~0=v_~x$w_buff1~0_119, #memory_int=|v_#memory_int_271|, ~#x~0.base=|v_~#x~0.base_174|, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_258, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_362, P1Thread1of1ForFork0_#t~mem61=|v_P1Thread1of1ForFork0_#t~mem61_1|, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_286, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_451} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_134, ~#x~0.offset=|v_~#x~0.offset_174|, ~x$w_buff1~0=v_~x$w_buff1~0_119, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_257, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_361, P1Thread1of1ForFork0_#t~mem61=|v_P1Thread1of1ForFork0_#t~mem61_2|, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_285, P1Thread1of1ForFork0_#t~ite66=|v_P1Thread1of1ForFork0_#t~ite66_1|, P1Thread1of1ForFork0_#t~ite67=|v_P1Thread1of1ForFork0_#t~ite67_1|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_450, P1Thread1of1ForFork0_#t~ite62=|v_P1Thread1of1ForFork0_#t~ite62_2|, P1Thread1of1ForFork0_#t~ite63=|v_P1Thread1of1ForFork0_#t~ite63_1|, P1Thread1of1ForFork0_#t~ite64=|v_P1Thread1of1ForFork0_#t~ite64_1|, P1Thread1of1ForFork0_#t~ite65=|v_P1Thread1of1ForFork0_#t~ite65_1|, #memory_int=|v_#memory_int_270|, ~#x~0.base=|v_~#x~0.base_174|} AuxVars[|v_P1_#t~mem61_42|, |v_P1_#t~ite63_33|, |v_P1_#t~ite62_35|] AssignedVars[P1Thread1of1ForFork0_#t~ite62, P1Thread1of1ForFork0_#t~ite63, P1Thread1of1ForFork0_#t~ite64, P1Thread1of1ForFork0_#t~ite65, #memory_int, ~x$r_buff1_thd2~0, ~x$w_buff1_used~0, P1Thread1of1ForFork0_#t~mem61, ~x$r_buff0_thd2~0, P1Thread1of1ForFork0_#t~ite66, P1Thread1of1ForFork0_#t~ite67, ~x$w_buff0_used~0] and [1215] L754-->L765: Formula: (and (= |v_P0Thread1of1ForFork1_reach_error_#t~nondet2.base_3| |v_P0Thread1of1ForFork1_reach_error_#t~nondet2.base_4|) (= v_~x$w_buff0_used~0_Out_3 1) (= (ite (not (and (not (= (mod v_~x$w_buff0_used~0_Out_3 256) 0)) (not (= (mod v_~x$w_buff1_used~0_Out_3 256) 0)))) 1 0) |v_P0Thread1of1ForFork1___VERIFIER_assert_#in~expression_3|) (= v_~x$r_buff0_thd1~0_Out_1 1) (= v_~x$r_buff1_thd2~0_Out_1 v_~x$r_buff0_thd2~0_In_79) (= |v_P0Thread1of1ForFork1_reach_error_#t~nondet2.offset_3| |v_P0Thread1of1ForFork1_reach_error_#t~nondet2.offset_4|) (not (= v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_3 0)) (= v_~x$r_buff1_thd1~0_Out_1 v_~x$r_buff0_thd1~0_In_11) (= v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_3 |v_P0Thread1of1ForFork1___VERIFIER_assert_#in~expression_3|) (= v_~x$w_buff1~0_Out_3 v_~x$w_buff0~0_In_33) (= v_~x$r_buff1_thd0~0_Out_1 v_~x$r_buff0_thd0~0_In_11) (= v_~x$w_buff0~0_Out_3 1) (= v_~x$w_buff1_used~0_Out_3 v_~x$w_buff0_used~0_In_99)) InVars {~x$w_buff0~0=v_~x$w_buff0~0_In_33, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_In_11, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_In_11, P0Thread1of1ForFork1_reach_error_#t~nondet2.offset=|v_P0Thread1of1ForFork1_reach_error_#t~nondet2.offset_3|, P0Thread1of1ForFork1_reach_error_#t~nondet2.base=|v_P0Thread1of1ForFork1_reach_error_#t~nondet2.base_3|, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_In_79, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_In_99} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_Out_3, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_In_11, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_Out_1, ~x$w_buff1~0=v_~x$w_buff1~0_Out_3, P0Thread1of1ForFork1_reach_error_#t~nondet2.base=|v_P0Thread1of1ForFork1_reach_error_#t~nondet2.base_4|, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_Out_1, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_Out_3, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_Out_1, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_In_79, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_Out_1, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_Out_3, P0Thread1of1ForFork1_reach_error_#t~nondet2.offset=|v_P0Thread1of1ForFork1_reach_error_#t~nondet2.offset_4|, P0Thread1of1ForFork1___VERIFIER_assert_~expression=v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_3, P0Thread1of1ForFork1___VERIFIER_assert_#in~expression=|v_P0Thread1of1ForFork1___VERIFIER_assert_#in~expression_3|} AuxVars[] AssignedVars[~x$w_buff0~0, ~x$r_buff0_thd1~0, P0Thread1of1ForFork1_reach_error_#t~nondet2.offset, ~x$w_buff1~0, P0Thread1of1ForFork1_reach_error_#t~nondet2.base, ~x$r_buff1_thd2~0, ~x$w_buff1_used~0, P0Thread1of1ForFork1___VERIFIER_assert_~expression, ~x$r_buff1_thd1~0, ~x$r_buff1_thd0~0, P0Thread1of1ForFork1___VERIFIER_assert_#in~expression, ~x$w_buff0_used~0] under condition 304#(= ~x$w_buff0_used~0 0) [2021-01-27 02:42:46,111 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-27 02:42:47,487 WARN L146 IndependenceRelation]: Expensive independence query (1198 ms) for statements [1209] L2-1-->L839: Formula: (let ((.cse15 (= (mod v_~x$w_buff0_used~0_437 256) 0)) (.cse14 (= (mod v_~x$r_buff0_thd0~0_66 256) 0)) (.cse13 (= (mod v_~x$w_buff0_used~0_436 256) 0)) (.cse12 (= (mod v_~x$r_buff1_thd0~0_46 256) 0)) (.cse16 (= (mod v_~x$w_buff1_used~0_348 256) 0))) (let ((.cse0 (select |v_#memory_int_255| |v_~#x~0.base_166|)) (.cse4 (or .cse12 .cse16)) (.cse6 (not .cse16)) (.cse5 (not .cse12)) (.cse8 (or .cse14 .cse13)) (.cse9 (not .cse13)) (.cse7 (or .cse14 .cse15)) (.cse1 (not .cse15)) (.cse3 (not .cse14))) (and (= (store |v_#memory_int_255| |v_~#x~0.base_166| (store .cse0 |v_~#x~0.offset_166| |v_ULTIMATE.start_main_#t~ite72_46|)) |v_#memory_int_254|) (let ((.cse2 (= |v_ULTIMATE.start_main_#t~mem70_43| |v_ULTIMATE.start_main_#t~mem70_38|))) (or (and .cse1 .cse2 (= |v_ULTIMATE.start_main_#t~ite71_36| |v_ULTIMATE.start_main_#t~ite71_31|) (= v_~x$w_buff0~0_126 |v_ULTIMATE.start_main_#t~ite72_46|) .cse3) (and (or (and (= |v_ULTIMATE.start_main_#t~mem70_43| |v_ULTIMATE.start_main_#t~ite71_36|) (= |v_ULTIMATE.start_main_#t~mem70_43| (select .cse0 |v_~#x~0.offset_166|)) .cse4) (and (= |v_ULTIMATE.start_main_#t~ite71_36| v_~x$w_buff1~0_111) .cse2 .cse5 .cse6)) .cse7 (= |v_ULTIMATE.start_main_#t~ite71_36| |v_ULTIMATE.start_main_#t~ite72_46|)))) (or (and (= v_~x$w_buff1_used~0_348 v_~x$w_buff1_used~0_347) .cse4 .cse8) (and (or (and .cse5 .cse6) (and .cse9 .cse3)) (= v_~x$w_buff1_used~0_347 0))) (let ((.cse10 (= (mod v_~x$w_buff1_used~0_347 256) 0)) (.cse11 (= (mod v_~x$r_buff0_thd0~0_65 256) 0))) (or (and (= v_~x$r_buff1_thd0~0_45 0) (or (and (not .cse10) .cse5) (and (not .cse11) .cse9))) (and (or .cse10 .cse12) (= v_~x$r_buff1_thd0~0_45 v_~x$r_buff1_thd0~0_46) (or .cse13 .cse11)))) (or (and (= v_~x$r_buff0_thd0~0_66 v_~x$r_buff0_thd0~0_65) .cse8) (and (= v_~x$r_buff0_thd0~0_65 0) .cse9 .cse3)) (or (and (= v_~x$w_buff0_used~0_437 v_~x$w_buff0_used~0_436) .cse7) (and .cse1 (= v_~x$w_buff0_used~0_436 0) .cse3))))) InVars {~x$w_buff0~0=v_~x$w_buff0~0_126, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_66, ULTIMATE.start_main_#t~ite71=|v_ULTIMATE.start_main_#t~ite71_31|, ~#x~0.offset=|v_~#x~0.offset_166|, ~x$w_buff1~0=v_~x$w_buff1~0_111, #memory_int=|v_#memory_int_255|, ~#x~0.base=|v_~#x~0.base_166|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_348, ULTIMATE.start_main_#t~mem70=|v_ULTIMATE.start_main_#t~mem70_38|, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_46, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_437} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_126, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_65, ~#x~0.offset=|v_~#x~0.offset_166|, ~x$w_buff1~0=v_~x$w_buff1~0_111, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_347, ULTIMATE.start_main_#t~mem70=|v_ULTIMATE.start_main_#t~mem70_37|, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_45, ULTIMATE.start_main_#t~ite75=|v_ULTIMATE.start_main_#t~ite75_24|, ULTIMATE.start_main_#t~ite76=|v_ULTIMATE.start_main_#t~ite76_18|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_436, ULTIMATE.start_main_#t~ite73=|v_ULTIMATE.start_main_#t~ite73_26|, ULTIMATE.start_main_#t~ite74=|v_ULTIMATE.start_main_#t~ite74_26|, ULTIMATE.start_main_#t~ite71=|v_ULTIMATE.start_main_#t~ite71_30|, ULTIMATE.start_main_#t~ite72=|v_ULTIMATE.start_main_#t~ite72_42|, #memory_int=|v_#memory_int_254|, ~#x~0.base=|v_~#x~0.base_166|} AuxVars[|v_ULTIMATE.start_main_#t~ite72_46|, |v_ULTIMATE.start_main_#t~ite71_36|, |v_ULTIMATE.start_main_#t~mem70_43|] AssignedVars[ULTIMATE.start_main_#t~ite73, ~x$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite74, ULTIMATE.start_main_#t~ite71, ULTIMATE.start_main_#t~ite72, #memory_int, ~x$w_buff1_used~0, ULTIMATE.start_main_#t~mem70, ~x$r_buff1_thd0~0, ULTIMATE.start_main_#t~ite75, ULTIMATE.start_main_#t~ite76, ~x$w_buff0_used~0] and [1215] L754-->L765: Formula: (and (= |v_P0Thread1of1ForFork1_reach_error_#t~nondet2.base_3| |v_P0Thread1of1ForFork1_reach_error_#t~nondet2.base_4|) (= v_~x$w_buff0_used~0_Out_3 1) (= (ite (not (and (not (= (mod v_~x$w_buff0_used~0_Out_3 256) 0)) (not (= (mod v_~x$w_buff1_used~0_Out_3 256) 0)))) 1 0) |v_P0Thread1of1ForFork1___VERIFIER_assert_#in~expression_3|) (= v_~x$r_buff0_thd1~0_Out_1 1) (= v_~x$r_buff1_thd2~0_Out_1 v_~x$r_buff0_thd2~0_In_79) (= |v_P0Thread1of1ForFork1_reach_error_#t~nondet2.offset_3| |v_P0Thread1of1ForFork1_reach_error_#t~nondet2.offset_4|) (not (= v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_3 0)) (= v_~x$r_buff1_thd1~0_Out_1 v_~x$r_buff0_thd1~0_In_11) (= v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_3 |v_P0Thread1of1ForFork1___VERIFIER_assert_#in~expression_3|) (= v_~x$w_buff1~0_Out_3 v_~x$w_buff0~0_In_33) (= v_~x$r_buff1_thd0~0_Out_1 v_~x$r_buff0_thd0~0_In_11) (= v_~x$w_buff0~0_Out_3 1) (= v_~x$w_buff1_used~0_Out_3 v_~x$w_buff0_used~0_In_99)) InVars {~x$w_buff0~0=v_~x$w_buff0~0_In_33, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_In_11, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_In_11, P0Thread1of1ForFork1_reach_error_#t~nondet2.offset=|v_P0Thread1of1ForFork1_reach_error_#t~nondet2.offset_3|, P0Thread1of1ForFork1_reach_error_#t~nondet2.base=|v_P0Thread1of1ForFork1_reach_error_#t~nondet2.base_3|, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_In_79, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_In_99} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_Out_3, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_In_11, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_Out_1, ~x$w_buff1~0=v_~x$w_buff1~0_Out_3, P0Thread1of1ForFork1_reach_error_#t~nondet2.base=|v_P0Thread1of1ForFork1_reach_error_#t~nondet2.base_4|, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_Out_1, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_Out_3, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_Out_1, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_In_79, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_Out_1, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_Out_3, P0Thread1of1ForFork1_reach_error_#t~nondet2.offset=|v_P0Thread1of1ForFork1_reach_error_#t~nondet2.offset_4|, P0Thread1of1ForFork1___VERIFIER_assert_~expression=v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_3, P0Thread1of1ForFork1___VERIFIER_assert_#in~expression=|v_P0Thread1of1ForFork1___VERIFIER_assert_#in~expression_3|} AuxVars[] AssignedVars[~x$w_buff0~0, ~x$r_buff0_thd1~0, P0Thread1of1ForFork1_reach_error_#t~nondet2.offset, ~x$w_buff1~0, P0Thread1of1ForFork1_reach_error_#t~nondet2.base, ~x$r_buff1_thd2~0, ~x$w_buff1_used~0, P0Thread1of1ForFork1___VERIFIER_assert_~expression, ~x$r_buff1_thd1~0, ~x$r_buff1_thd0~0, P0Thread1of1ForFork1___VERIFIER_assert_#in~expression, ~x$w_buff0_used~0] under condition 304#(= ~x$w_buff0_used~0 0) [2021-01-27 02:42:47,739 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-27 02:42:48,141 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-27 02:42:52,182 WARN L146 IndependenceRelation]: Expensive independence query (4040 ms) for statements [1223] L801-->L808: Formula: (let ((.cse12 (= (mod v_~x$w_buff0_used~0_450 256) 0)) (.cse13 (= (mod v_~x$r_buff1_thd2~0_258 256) 0)) (.cse14 (= (mod v_~x$w_buff1_used~0_362 256) 0)) (.cse16 (= (mod v_~x$w_buff0_used~0_451 256) 0)) (.cse15 (= (mod v_~x$r_buff0_thd2~0_286 256) 0))) (let ((.cse4 (select |v_#memory_int_271| |v_~#x~0.base_174|)) (.cse5 (or .cse16 .cse15)) (.cse6 (not .cse16)) (.cse3 (or .cse13 .cse14)) (.cse8 (or .cse12 .cse15)) (.cse9 (not .cse12)) (.cse7 (not .cse15)) (.cse1 (not .cse14)) (.cse2 (not .cse13))) (and (let ((.cse0 (= |v_P1_#t~mem61_42| |v_P1Thread1of1ForFork0_#t~mem61_1|))) (or (and (= |v_P1_#t~ite62_35| |v_P1_#t~ite63_33|) (or (and .cse0 (= |v_P1_#t~ite62_35| v_~x$w_buff1~0_119) .cse1 .cse2) (and (= |v_P1_#t~ite62_35| |v_P1_#t~mem61_42|) .cse3 (= (select .cse4 |v_~#x~0.offset_174|) |v_P1_#t~mem61_42|))) .cse5) (and .cse0 .cse6 (= |v_P1_#t~ite63_33| v_~x$w_buff0~0_134) (= |v_P1_#t~ite62_35| |v_P1Thread1of1ForFork0_#t~ite62_1|) .cse7))) (= (store |v_#memory_int_271| |v_~#x~0.base_174| (store .cse4 |v_~#x~0.offset_174| |v_P1_#t~ite63_33|)) |v_#memory_int_270|) (or (and (= v_~x$r_buff0_thd2~0_286 v_~x$r_buff0_thd2~0_285) .cse8) (and (= v_~x$r_buff0_thd2~0_285 0) .cse9 .cse7)) (let ((.cse10 (= (mod v_~x$r_buff0_thd2~0_285 256) 0)) (.cse11 (= (mod v_~x$w_buff1_used~0_361 256) 0))) (or (and (= v_~x$r_buff1_thd2~0_257 0) (or (and .cse9 (not .cse10)) (and (not .cse11) .cse2))) (and (= v_~x$r_buff1_thd2~0_258 v_~x$r_buff1_thd2~0_257) (or .cse12 .cse10) (or .cse13 .cse11)))) (or (and (= v_~x$w_buff0_used~0_451 v_~x$w_buff0_used~0_450) .cse5) (and .cse6 (= v_~x$w_buff0_used~0_450 0) .cse7)) (or (and (= v_~x$w_buff1_used~0_362 v_~x$w_buff1_used~0_361) .cse3 .cse8) (and (= v_~x$w_buff1_used~0_361 0) (or (and .cse9 .cse7) (and .cse1 .cse2))))))) InVars {~x$w_buff0~0=v_~x$w_buff0~0_134, P1Thread1of1ForFork0_#t~ite62=|v_P1Thread1of1ForFork0_#t~ite62_1|, ~#x~0.offset=|v_~#x~0.offset_174|, ~x$w_buff1~0=v_~x$w_buff1~0_119, #memory_int=|v_#memory_int_271|, ~#x~0.base=|v_~#x~0.base_174|, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_258, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_362, P1Thread1of1ForFork0_#t~mem61=|v_P1Thread1of1ForFork0_#t~mem61_1|, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_286, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_451} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_134, ~#x~0.offset=|v_~#x~0.offset_174|, ~x$w_buff1~0=v_~x$w_buff1~0_119, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_257, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_361, P1Thread1of1ForFork0_#t~mem61=|v_P1Thread1of1ForFork0_#t~mem61_2|, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_285, P1Thread1of1ForFork0_#t~ite66=|v_P1Thread1of1ForFork0_#t~ite66_1|, P1Thread1of1ForFork0_#t~ite67=|v_P1Thread1of1ForFork0_#t~ite67_1|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_450, P1Thread1of1ForFork0_#t~ite62=|v_P1Thread1of1ForFork0_#t~ite62_2|, P1Thread1of1ForFork0_#t~ite63=|v_P1Thread1of1ForFork0_#t~ite63_1|, P1Thread1of1ForFork0_#t~ite64=|v_P1Thread1of1ForFork0_#t~ite64_1|, P1Thread1of1ForFork0_#t~ite65=|v_P1Thread1of1ForFork0_#t~ite65_1|, #memory_int=|v_#memory_int_270|, ~#x~0.base=|v_~#x~0.base_174|} AuxVars[|v_P1_#t~mem61_42|, |v_P1_#t~ite63_33|, |v_P1_#t~ite62_35|] AssignedVars[P1Thread1of1ForFork0_#t~ite62, P1Thread1of1ForFork0_#t~ite63, P1Thread1of1ForFork0_#t~ite64, P1Thread1of1ForFork0_#t~ite65, #memory_int, ~x$r_buff1_thd2~0, ~x$w_buff1_used~0, P1Thread1of1ForFork0_#t~mem61, ~x$r_buff0_thd2~0, P1Thread1of1ForFork0_#t~ite66, P1Thread1of1ForFork0_#t~ite67, ~x$w_buff0_used~0] and [1216] L765-->L772: Formula: (let ((.cse10 (= (mod v_~x$w_buff0_used~0_444 256) 0)) (.cse14 (= 0 (mod v_~x$r_buff0_thd1~0_71 256))) (.cse15 (= (mod v_~x$w_buff0_used~0_445 256) 0)) (.cse16 (= (mod v_~x$w_buff1_used~0_356 256) 0)) (.cse13 (= (mod v_~x$r_buff1_thd1~0_52 256) 0))) (let ((.cse5 (or .cse16 .cse13)) (.cse6 (not .cse16)) (.cse4 (select |v_#memory_int_263| |v_~#x~0.base_170|)) (.cse3 (or .cse14 .cse15)) (.cse0 (not .cse15)) (.cse7 (not .cse13)) (.cse1 (not .cse14)) (.cse9 (not .cse10)) (.cse8 (or .cse14 .cse10))) (and (let ((.cse2 (= |v_P0_#t~mem5_52| |v_P0Thread1of1ForFork1_#t~mem5_1|))) (or (and (= |v_P0_#t~ite6_51| |v_P0Thread1of1ForFork1_#t~ite6_1|) .cse0 .cse1 .cse2 (= |v_P0_#t~ite7_39| v_~x$w_buff0~0_130)) (and (= |v_P0_#t~ite7_39| |v_P0_#t~ite6_51|) .cse3 (or (and (= |v_P0_#t~ite6_51| |v_P0_#t~mem5_52|) (= (select .cse4 |v_~#x~0.offset_170|) |v_P0_#t~mem5_52|) .cse5) (and .cse6 .cse2 .cse7 (= |v_P0_#t~ite6_51| v_~x$w_buff1~0_115)))))) (or (and .cse8 .cse5 (= v_~x$w_buff1_used~0_356 v_~x$w_buff1_used~0_355)) (and (= v_~x$w_buff1_used~0_355 0) (or (and .cse1 .cse9) (and .cse6 .cse7)))) (= (store |v_#memory_int_263| |v_~#x~0.base_170| (store .cse4 |v_~#x~0.offset_170| |v_P0_#t~ite7_39|)) |v_#memory_int_262|) (or (and (= v_~x$w_buff0_used~0_444 v_~x$w_buff0_used~0_445) .cse3) (and (= v_~x$w_buff0_used~0_444 0) .cse0 .cse1)) (let ((.cse11 (= (mod v_~x$r_buff0_thd1~0_70 256) 0)) (.cse12 (= (mod v_~x$w_buff1_used~0_355 256) 0))) (or (and (or .cse10 .cse11) (or .cse12 .cse13) (= v_~x$r_buff1_thd1~0_52 v_~x$r_buff1_thd1~0_51)) (and (or (and (not .cse11) .cse9) (and .cse7 (not .cse12))) (= v_~x$r_buff1_thd1~0_51 0)))) (or (and (= v_~x$r_buff0_thd1~0_70 0) .cse1 .cse9) (and .cse8 (= v_~x$r_buff0_thd1~0_71 v_~x$r_buff0_thd1~0_70)))))) InVars {~x$w_buff0~0=v_~x$w_buff0~0_130, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_71, ~#x~0.offset=|v_~#x~0.offset_170|, P0Thread1of1ForFork1_#t~ite6=|v_P0Thread1of1ForFork1_#t~ite6_1|, ~x$w_buff1~0=v_~x$w_buff1~0_115, #memory_int=|v_#memory_int_263|, ~#x~0.base=|v_~#x~0.base_170|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_356, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_52, P0Thread1of1ForFork1_#t~mem5=|v_P0Thread1of1ForFork1_#t~mem5_1|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_445} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_130, P0Thread1of1ForFork1_#t~ite10=|v_P0Thread1of1ForFork1_#t~ite10_1|, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_70, ~#x~0.offset=|v_~#x~0.offset_170|, ~x$w_buff1~0=v_~x$w_buff1~0_115, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_355, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_51, P0Thread1of1ForFork1_#t~mem5=|v_P0Thread1of1ForFork1_#t~mem5_2|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_444, P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_1|, P0Thread1of1ForFork1_#t~ite9=|v_P0Thread1of1ForFork1_#t~ite9_1|, P0Thread1of1ForFork1_#t~ite6=|v_P0Thread1of1ForFork1_#t~ite6_2|, P0Thread1of1ForFork1_#t~ite7=|v_P0Thread1of1ForFork1_#t~ite7_1|, #memory_int=|v_#memory_int_262|, ~#x~0.base=|v_~#x~0.base_170|, P0Thread1of1ForFork1_#t~ite11=|v_P0Thread1of1ForFork1_#t~ite11_1|} AuxVars[|v_P0_#t~mem5_52|, |v_P0_#t~ite7_39|, |v_P0_#t~ite6_51|] AssignedVars[P0Thread1of1ForFork1_#t~ite10, ~x$r_buff0_thd1~0, P0Thread1of1ForFork1_#t~ite8, P0Thread1of1ForFork1_#t~ite9, P0Thread1of1ForFork1_#t~ite6, P0Thread1of1ForFork1_#t~ite7, #memory_int, ~x$w_buff1_used~0, ~x$r_buff1_thd1~0, P0Thread1of1ForFork1_#t~mem5, ~x$w_buff0_used~0, P0Thread1of1ForFork1_#t~ite11] under condition 11576#(and (<= 1 ~main$tmp_guard1~0) (<= 1 ~x$w_buff0_used~0) (<= (div ~x$w_buff0_used~0 256) 0) (<= (div ~main$tmp_guard1~0 256) 0) (or (<= (+ |ULTIMATE.start___VERIFIER_assert_#in~expression| 255) 0) (<= 1 |ULTIMATE.start___VERIFIER_assert_#in~expression|)) (= ~__unbuffered_p0_EAX~0 0) (or (<= 1 ULTIMATE.start___VERIFIER_assert_~expression) (<= (+ ULTIMATE.start___VERIFIER_assert_~expression 255) 0)) (= 1 ~x$r_buff0_thd1~0)) [2021-01-27 02:42:52,247 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-27 02:42:52,630 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-27 02:42:56,747 WARN L146 IndependenceRelation]: Expensive independence query (4116 ms) for statements [1223] L801-->L808: Formula: (let ((.cse12 (= (mod v_~x$w_buff0_used~0_450 256) 0)) (.cse13 (= (mod v_~x$r_buff1_thd2~0_258 256) 0)) (.cse14 (= (mod v_~x$w_buff1_used~0_362 256) 0)) (.cse16 (= (mod v_~x$w_buff0_used~0_451 256) 0)) (.cse15 (= (mod v_~x$r_buff0_thd2~0_286 256) 0))) (let ((.cse4 (select |v_#memory_int_271| |v_~#x~0.base_174|)) (.cse5 (or .cse16 .cse15)) (.cse6 (not .cse16)) (.cse3 (or .cse13 .cse14)) (.cse8 (or .cse12 .cse15)) (.cse9 (not .cse12)) (.cse7 (not .cse15)) (.cse1 (not .cse14)) (.cse2 (not .cse13))) (and (let ((.cse0 (= |v_P1_#t~mem61_42| |v_P1Thread1of1ForFork0_#t~mem61_1|))) (or (and (= |v_P1_#t~ite62_35| |v_P1_#t~ite63_33|) (or (and .cse0 (= |v_P1_#t~ite62_35| v_~x$w_buff1~0_119) .cse1 .cse2) (and (= |v_P1_#t~ite62_35| |v_P1_#t~mem61_42|) .cse3 (= (select .cse4 |v_~#x~0.offset_174|) |v_P1_#t~mem61_42|))) .cse5) (and .cse0 .cse6 (= |v_P1_#t~ite63_33| v_~x$w_buff0~0_134) (= |v_P1_#t~ite62_35| |v_P1Thread1of1ForFork0_#t~ite62_1|) .cse7))) (= (store |v_#memory_int_271| |v_~#x~0.base_174| (store .cse4 |v_~#x~0.offset_174| |v_P1_#t~ite63_33|)) |v_#memory_int_270|) (or (and (= v_~x$r_buff0_thd2~0_286 v_~x$r_buff0_thd2~0_285) .cse8) (and (= v_~x$r_buff0_thd2~0_285 0) .cse9 .cse7)) (let ((.cse10 (= (mod v_~x$r_buff0_thd2~0_285 256) 0)) (.cse11 (= (mod v_~x$w_buff1_used~0_361 256) 0))) (or (and (= v_~x$r_buff1_thd2~0_257 0) (or (and .cse9 (not .cse10)) (and (not .cse11) .cse2))) (and (= v_~x$r_buff1_thd2~0_258 v_~x$r_buff1_thd2~0_257) (or .cse12 .cse10) (or .cse13 .cse11)))) (or (and (= v_~x$w_buff0_used~0_451 v_~x$w_buff0_used~0_450) .cse5) (and .cse6 (= v_~x$w_buff0_used~0_450 0) .cse7)) (or (and (= v_~x$w_buff1_used~0_362 v_~x$w_buff1_used~0_361) .cse3 .cse8) (and (= v_~x$w_buff1_used~0_361 0) (or (and .cse9 .cse7) (and .cse1 .cse2))))))) InVars {~x$w_buff0~0=v_~x$w_buff0~0_134, P1Thread1of1ForFork0_#t~ite62=|v_P1Thread1of1ForFork0_#t~ite62_1|, ~#x~0.offset=|v_~#x~0.offset_174|, ~x$w_buff1~0=v_~x$w_buff1~0_119, #memory_int=|v_#memory_int_271|, ~#x~0.base=|v_~#x~0.base_174|, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_258, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_362, P1Thread1of1ForFork0_#t~mem61=|v_P1Thread1of1ForFork0_#t~mem61_1|, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_286, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_451} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_134, ~#x~0.offset=|v_~#x~0.offset_174|, ~x$w_buff1~0=v_~x$w_buff1~0_119, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_257, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_361, P1Thread1of1ForFork0_#t~mem61=|v_P1Thread1of1ForFork0_#t~mem61_2|, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_285, P1Thread1of1ForFork0_#t~ite66=|v_P1Thread1of1ForFork0_#t~ite66_1|, P1Thread1of1ForFork0_#t~ite67=|v_P1Thread1of1ForFork0_#t~ite67_1|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_450, P1Thread1of1ForFork0_#t~ite62=|v_P1Thread1of1ForFork0_#t~ite62_2|, P1Thread1of1ForFork0_#t~ite63=|v_P1Thread1of1ForFork0_#t~ite63_1|, P1Thread1of1ForFork0_#t~ite64=|v_P1Thread1of1ForFork0_#t~ite64_1|, P1Thread1of1ForFork0_#t~ite65=|v_P1Thread1of1ForFork0_#t~ite65_1|, #memory_int=|v_#memory_int_270|, ~#x~0.base=|v_~#x~0.base_174|} AuxVars[|v_P1_#t~mem61_42|, |v_P1_#t~ite63_33|, |v_P1_#t~ite62_35|] AssignedVars[P1Thread1of1ForFork0_#t~ite62, P1Thread1of1ForFork0_#t~ite63, P1Thread1of1ForFork0_#t~ite64, P1Thread1of1ForFork0_#t~ite65, #memory_int, ~x$r_buff1_thd2~0, ~x$w_buff1_used~0, P1Thread1of1ForFork0_#t~mem61, ~x$r_buff0_thd2~0, P1Thread1of1ForFork0_#t~ite66, P1Thread1of1ForFork0_#t~ite67, ~x$w_buff0_used~0] and [1216] L765-->L772: Formula: (let ((.cse10 (= (mod v_~x$w_buff0_used~0_444 256) 0)) (.cse14 (= 0 (mod v_~x$r_buff0_thd1~0_71 256))) (.cse15 (= (mod v_~x$w_buff0_used~0_445 256) 0)) (.cse16 (= (mod v_~x$w_buff1_used~0_356 256) 0)) (.cse13 (= (mod v_~x$r_buff1_thd1~0_52 256) 0))) (let ((.cse5 (or .cse16 .cse13)) (.cse6 (not .cse16)) (.cse4 (select |v_#memory_int_263| |v_~#x~0.base_170|)) (.cse3 (or .cse14 .cse15)) (.cse0 (not .cse15)) (.cse7 (not .cse13)) (.cse1 (not .cse14)) (.cse9 (not .cse10)) (.cse8 (or .cse14 .cse10))) (and (let ((.cse2 (= |v_P0_#t~mem5_52| |v_P0Thread1of1ForFork1_#t~mem5_1|))) (or (and (= |v_P0_#t~ite6_51| |v_P0Thread1of1ForFork1_#t~ite6_1|) .cse0 .cse1 .cse2 (= |v_P0_#t~ite7_39| v_~x$w_buff0~0_130)) (and (= |v_P0_#t~ite7_39| |v_P0_#t~ite6_51|) .cse3 (or (and (= |v_P0_#t~ite6_51| |v_P0_#t~mem5_52|) (= (select .cse4 |v_~#x~0.offset_170|) |v_P0_#t~mem5_52|) .cse5) (and .cse6 .cse2 .cse7 (= |v_P0_#t~ite6_51| v_~x$w_buff1~0_115)))))) (or (and .cse8 .cse5 (= v_~x$w_buff1_used~0_356 v_~x$w_buff1_used~0_355)) (and (= v_~x$w_buff1_used~0_355 0) (or (and .cse1 .cse9) (and .cse6 .cse7)))) (= (store |v_#memory_int_263| |v_~#x~0.base_170| (store .cse4 |v_~#x~0.offset_170| |v_P0_#t~ite7_39|)) |v_#memory_int_262|) (or (and (= v_~x$w_buff0_used~0_444 v_~x$w_buff0_used~0_445) .cse3) (and (= v_~x$w_buff0_used~0_444 0) .cse0 .cse1)) (let ((.cse11 (= (mod v_~x$r_buff0_thd1~0_70 256) 0)) (.cse12 (= (mod v_~x$w_buff1_used~0_355 256) 0))) (or (and (or .cse10 .cse11) (or .cse12 .cse13) (= v_~x$r_buff1_thd1~0_52 v_~x$r_buff1_thd1~0_51)) (and (or (and (not .cse11) .cse9) (and .cse7 (not .cse12))) (= v_~x$r_buff1_thd1~0_51 0)))) (or (and (= v_~x$r_buff0_thd1~0_70 0) .cse1 .cse9) (and .cse8 (= v_~x$r_buff0_thd1~0_71 v_~x$r_buff0_thd1~0_70)))))) InVars {~x$w_buff0~0=v_~x$w_buff0~0_130, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_71, ~#x~0.offset=|v_~#x~0.offset_170|, P0Thread1of1ForFork1_#t~ite6=|v_P0Thread1of1ForFork1_#t~ite6_1|, ~x$w_buff1~0=v_~x$w_buff1~0_115, #memory_int=|v_#memory_int_263|, ~#x~0.base=|v_~#x~0.base_170|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_356, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_52, P0Thread1of1ForFork1_#t~mem5=|v_P0Thread1of1ForFork1_#t~mem5_1|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_445} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_130, P0Thread1of1ForFork1_#t~ite10=|v_P0Thread1of1ForFork1_#t~ite10_1|, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_70, ~#x~0.offset=|v_~#x~0.offset_170|, ~x$w_buff1~0=v_~x$w_buff1~0_115, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_355, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_51, P0Thread1of1ForFork1_#t~mem5=|v_P0Thread1of1ForFork1_#t~mem5_2|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_444, P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_1|, P0Thread1of1ForFork1_#t~ite9=|v_P0Thread1of1ForFork1_#t~ite9_1|, P0Thread1of1ForFork1_#t~ite6=|v_P0Thread1of1ForFork1_#t~ite6_2|, P0Thread1of1ForFork1_#t~ite7=|v_P0Thread1of1ForFork1_#t~ite7_1|, #memory_int=|v_#memory_int_262|, ~#x~0.base=|v_~#x~0.base_170|, P0Thread1of1ForFork1_#t~ite11=|v_P0Thread1of1ForFork1_#t~ite11_1|} AuxVars[|v_P0_#t~mem5_52|, |v_P0_#t~ite7_39|, |v_P0_#t~ite6_51|] AssignedVars[P0Thread1of1ForFork1_#t~ite10, ~x$r_buff0_thd1~0, P0Thread1of1ForFork1_#t~ite8, P0Thread1of1ForFork1_#t~ite9, P0Thread1of1ForFork1_#t~ite6, P0Thread1of1ForFork1_#t~ite7, #memory_int, ~x$w_buff1_used~0, ~x$r_buff1_thd1~0, P0Thread1of1ForFork1_#t~mem5, ~x$w_buff0_used~0, P0Thread1of1ForFork1_#t~ite11] under condition 12689#(and (<= 1 ~main$tmp_guard1~0) (<= 1 ~x$w_buff0_used~0) (<= (div ~x$w_buff0_used~0 256) 0) (<= (div ~main$tmp_guard1~0 256) 0) (or (<= (+ |ULTIMATE.start___VERIFIER_assert_#in~expression| 255) 0) (<= 1 |ULTIMATE.start___VERIFIER_assert_#in~expression|)) (= ~__unbuffered_p0_EAX~0 0) (= 1 ~x$r_buff0_thd1~0)) [2021-01-27 02:42:56,775 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-27 02:42:57,183 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-27 02:43:01,144 WARN L146 IndependenceRelation]: Expensive independence query (3960 ms) for statements [1223] L801-->L808: Formula: (let ((.cse12 (= (mod v_~x$w_buff0_used~0_450 256) 0)) (.cse13 (= (mod v_~x$r_buff1_thd2~0_258 256) 0)) (.cse14 (= (mod v_~x$w_buff1_used~0_362 256) 0)) (.cse16 (= (mod v_~x$w_buff0_used~0_451 256) 0)) (.cse15 (= (mod v_~x$r_buff0_thd2~0_286 256) 0))) (let ((.cse4 (select |v_#memory_int_271| |v_~#x~0.base_174|)) (.cse5 (or .cse16 .cse15)) (.cse6 (not .cse16)) (.cse3 (or .cse13 .cse14)) (.cse8 (or .cse12 .cse15)) (.cse9 (not .cse12)) (.cse7 (not .cse15)) (.cse1 (not .cse14)) (.cse2 (not .cse13))) (and (let ((.cse0 (= |v_P1_#t~mem61_42| |v_P1Thread1of1ForFork0_#t~mem61_1|))) (or (and (= |v_P1_#t~ite62_35| |v_P1_#t~ite63_33|) (or (and .cse0 (= |v_P1_#t~ite62_35| v_~x$w_buff1~0_119) .cse1 .cse2) (and (= |v_P1_#t~ite62_35| |v_P1_#t~mem61_42|) .cse3 (= (select .cse4 |v_~#x~0.offset_174|) |v_P1_#t~mem61_42|))) .cse5) (and .cse0 .cse6 (= |v_P1_#t~ite63_33| v_~x$w_buff0~0_134) (= |v_P1_#t~ite62_35| |v_P1Thread1of1ForFork0_#t~ite62_1|) .cse7))) (= (store |v_#memory_int_271| |v_~#x~0.base_174| (store .cse4 |v_~#x~0.offset_174| |v_P1_#t~ite63_33|)) |v_#memory_int_270|) (or (and (= v_~x$r_buff0_thd2~0_286 v_~x$r_buff0_thd2~0_285) .cse8) (and (= v_~x$r_buff0_thd2~0_285 0) .cse9 .cse7)) (let ((.cse10 (= (mod v_~x$r_buff0_thd2~0_285 256) 0)) (.cse11 (= (mod v_~x$w_buff1_used~0_361 256) 0))) (or (and (= v_~x$r_buff1_thd2~0_257 0) (or (and .cse9 (not .cse10)) (and (not .cse11) .cse2))) (and (= v_~x$r_buff1_thd2~0_258 v_~x$r_buff1_thd2~0_257) (or .cse12 .cse10) (or .cse13 .cse11)))) (or (and (= v_~x$w_buff0_used~0_451 v_~x$w_buff0_used~0_450) .cse5) (and .cse6 (= v_~x$w_buff0_used~0_450 0) .cse7)) (or (and (= v_~x$w_buff1_used~0_362 v_~x$w_buff1_used~0_361) .cse3 .cse8) (and (= v_~x$w_buff1_used~0_361 0) (or (and .cse9 .cse7) (and .cse1 .cse2))))))) InVars {~x$w_buff0~0=v_~x$w_buff0~0_134, P1Thread1of1ForFork0_#t~ite62=|v_P1Thread1of1ForFork0_#t~ite62_1|, ~#x~0.offset=|v_~#x~0.offset_174|, ~x$w_buff1~0=v_~x$w_buff1~0_119, #memory_int=|v_#memory_int_271|, ~#x~0.base=|v_~#x~0.base_174|, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_258, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_362, P1Thread1of1ForFork0_#t~mem61=|v_P1Thread1of1ForFork0_#t~mem61_1|, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_286, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_451} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_134, ~#x~0.offset=|v_~#x~0.offset_174|, ~x$w_buff1~0=v_~x$w_buff1~0_119, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_257, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_361, P1Thread1of1ForFork0_#t~mem61=|v_P1Thread1of1ForFork0_#t~mem61_2|, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_285, P1Thread1of1ForFork0_#t~ite66=|v_P1Thread1of1ForFork0_#t~ite66_1|, P1Thread1of1ForFork0_#t~ite67=|v_P1Thread1of1ForFork0_#t~ite67_1|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_450, P1Thread1of1ForFork0_#t~ite62=|v_P1Thread1of1ForFork0_#t~ite62_2|, P1Thread1of1ForFork0_#t~ite63=|v_P1Thread1of1ForFork0_#t~ite63_1|, P1Thread1of1ForFork0_#t~ite64=|v_P1Thread1of1ForFork0_#t~ite64_1|, P1Thread1of1ForFork0_#t~ite65=|v_P1Thread1of1ForFork0_#t~ite65_1|, #memory_int=|v_#memory_int_270|, ~#x~0.base=|v_~#x~0.base_174|} AuxVars[|v_P1_#t~mem61_42|, |v_P1_#t~ite63_33|, |v_P1_#t~ite62_35|] AssignedVars[P1Thread1of1ForFork0_#t~ite62, P1Thread1of1ForFork0_#t~ite63, P1Thread1of1ForFork0_#t~ite64, P1Thread1of1ForFork0_#t~ite65, #memory_int, ~x$r_buff1_thd2~0, ~x$w_buff1_used~0, P1Thread1of1ForFork0_#t~mem61, ~x$r_buff0_thd2~0, P1Thread1of1ForFork0_#t~ite66, P1Thread1of1ForFork0_#t~ite67, ~x$w_buff0_used~0] and [1216] L765-->L772: Formula: (let ((.cse10 (= (mod v_~x$w_buff0_used~0_444 256) 0)) (.cse14 (= 0 (mod v_~x$r_buff0_thd1~0_71 256))) (.cse15 (= (mod v_~x$w_buff0_used~0_445 256) 0)) (.cse16 (= (mod v_~x$w_buff1_used~0_356 256) 0)) (.cse13 (= (mod v_~x$r_buff1_thd1~0_52 256) 0))) (let ((.cse5 (or .cse16 .cse13)) (.cse6 (not .cse16)) (.cse4 (select |v_#memory_int_263| |v_~#x~0.base_170|)) (.cse3 (or .cse14 .cse15)) (.cse0 (not .cse15)) (.cse7 (not .cse13)) (.cse1 (not .cse14)) (.cse9 (not .cse10)) (.cse8 (or .cse14 .cse10))) (and (let ((.cse2 (= |v_P0_#t~mem5_52| |v_P0Thread1of1ForFork1_#t~mem5_1|))) (or (and (= |v_P0_#t~ite6_51| |v_P0Thread1of1ForFork1_#t~ite6_1|) .cse0 .cse1 .cse2 (= |v_P0_#t~ite7_39| v_~x$w_buff0~0_130)) (and (= |v_P0_#t~ite7_39| |v_P0_#t~ite6_51|) .cse3 (or (and (= |v_P0_#t~ite6_51| |v_P0_#t~mem5_52|) (= (select .cse4 |v_~#x~0.offset_170|) |v_P0_#t~mem5_52|) .cse5) (and .cse6 .cse2 .cse7 (= |v_P0_#t~ite6_51| v_~x$w_buff1~0_115)))))) (or (and .cse8 .cse5 (= v_~x$w_buff1_used~0_356 v_~x$w_buff1_used~0_355)) (and (= v_~x$w_buff1_used~0_355 0) (or (and .cse1 .cse9) (and .cse6 .cse7)))) (= (store |v_#memory_int_263| |v_~#x~0.base_170| (store .cse4 |v_~#x~0.offset_170| |v_P0_#t~ite7_39|)) |v_#memory_int_262|) (or (and (= v_~x$w_buff0_used~0_444 v_~x$w_buff0_used~0_445) .cse3) (and (= v_~x$w_buff0_used~0_444 0) .cse0 .cse1)) (let ((.cse11 (= (mod v_~x$r_buff0_thd1~0_70 256) 0)) (.cse12 (= (mod v_~x$w_buff1_used~0_355 256) 0))) (or (and (or .cse10 .cse11) (or .cse12 .cse13) (= v_~x$r_buff1_thd1~0_52 v_~x$r_buff1_thd1~0_51)) (and (or (and (not .cse11) .cse9) (and .cse7 (not .cse12))) (= v_~x$r_buff1_thd1~0_51 0)))) (or (and (= v_~x$r_buff0_thd1~0_70 0) .cse1 .cse9) (and .cse8 (= v_~x$r_buff0_thd1~0_71 v_~x$r_buff0_thd1~0_70)))))) InVars {~x$w_buff0~0=v_~x$w_buff0~0_130, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_71, ~#x~0.offset=|v_~#x~0.offset_170|, P0Thread1of1ForFork1_#t~ite6=|v_P0Thread1of1ForFork1_#t~ite6_1|, ~x$w_buff1~0=v_~x$w_buff1~0_115, #memory_int=|v_#memory_int_263|, ~#x~0.base=|v_~#x~0.base_170|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_356, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_52, P0Thread1of1ForFork1_#t~mem5=|v_P0Thread1of1ForFork1_#t~mem5_1|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_445} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_130, P0Thread1of1ForFork1_#t~ite10=|v_P0Thread1of1ForFork1_#t~ite10_1|, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_70, ~#x~0.offset=|v_~#x~0.offset_170|, ~x$w_buff1~0=v_~x$w_buff1~0_115, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_355, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_51, P0Thread1of1ForFork1_#t~mem5=|v_P0Thread1of1ForFork1_#t~mem5_2|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_444, P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_1|, P0Thread1of1ForFork1_#t~ite9=|v_P0Thread1of1ForFork1_#t~ite9_1|, P0Thread1of1ForFork1_#t~ite6=|v_P0Thread1of1ForFork1_#t~ite6_2|, P0Thread1of1ForFork1_#t~ite7=|v_P0Thread1of1ForFork1_#t~ite7_1|, #memory_int=|v_#memory_int_262|, ~#x~0.base=|v_~#x~0.base_170|, P0Thread1of1ForFork1_#t~ite11=|v_P0Thread1of1ForFork1_#t~ite11_1|} AuxVars[|v_P0_#t~mem5_52|, |v_P0_#t~ite7_39|, |v_P0_#t~ite6_51|] AssignedVars[P0Thread1of1ForFork1_#t~ite10, ~x$r_buff0_thd1~0, P0Thread1of1ForFork1_#t~ite8, P0Thread1of1ForFork1_#t~ite9, P0Thread1of1ForFork1_#t~ite6, P0Thread1of1ForFork1_#t~ite7, #memory_int, ~x$w_buff1_used~0, ~x$r_buff1_thd1~0, P0Thread1of1ForFork1_#t~mem5, ~x$w_buff0_used~0, P0Thread1of1ForFork1_#t~ite11] under condition 12927#(and (<= 1 ~main$tmp_guard1~0) (<= 1 ~x$w_buff0_used~0) (<= (div ~x$w_buff0_used~0 256) 0) (<= (div ~main$tmp_guard1~0 256) 0) (= ~__unbuffered_p0_EAX~0 0) (= 1 ~x$r_buff0_thd1~0)) [2021-01-27 02:43:01,152 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-27 02:43:01,874 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-27 02:43:02,540 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-27 02:43:06,651 WARN L146 IndependenceRelation]: Expensive independence query (4110 ms) for statements [1223] L801-->L808: Formula: (let ((.cse12 (= (mod v_~x$w_buff0_used~0_450 256) 0)) (.cse13 (= (mod v_~x$r_buff1_thd2~0_258 256) 0)) (.cse14 (= (mod v_~x$w_buff1_used~0_362 256) 0)) (.cse16 (= (mod v_~x$w_buff0_used~0_451 256) 0)) (.cse15 (= (mod v_~x$r_buff0_thd2~0_286 256) 0))) (let ((.cse4 (select |v_#memory_int_271| |v_~#x~0.base_174|)) (.cse5 (or .cse16 .cse15)) (.cse6 (not .cse16)) (.cse3 (or .cse13 .cse14)) (.cse8 (or .cse12 .cse15)) (.cse9 (not .cse12)) (.cse7 (not .cse15)) (.cse1 (not .cse14)) (.cse2 (not .cse13))) (and (let ((.cse0 (= |v_P1_#t~mem61_42| |v_P1Thread1of1ForFork0_#t~mem61_1|))) (or (and (= |v_P1_#t~ite62_35| |v_P1_#t~ite63_33|) (or (and .cse0 (= |v_P1_#t~ite62_35| v_~x$w_buff1~0_119) .cse1 .cse2) (and (= |v_P1_#t~ite62_35| |v_P1_#t~mem61_42|) .cse3 (= (select .cse4 |v_~#x~0.offset_174|) |v_P1_#t~mem61_42|))) .cse5) (and .cse0 .cse6 (= |v_P1_#t~ite63_33| v_~x$w_buff0~0_134) (= |v_P1_#t~ite62_35| |v_P1Thread1of1ForFork0_#t~ite62_1|) .cse7))) (= (store |v_#memory_int_271| |v_~#x~0.base_174| (store .cse4 |v_~#x~0.offset_174| |v_P1_#t~ite63_33|)) |v_#memory_int_270|) (or (and (= v_~x$r_buff0_thd2~0_286 v_~x$r_buff0_thd2~0_285) .cse8) (and (= v_~x$r_buff0_thd2~0_285 0) .cse9 .cse7)) (let ((.cse10 (= (mod v_~x$r_buff0_thd2~0_285 256) 0)) (.cse11 (= (mod v_~x$w_buff1_used~0_361 256) 0))) (or (and (= v_~x$r_buff1_thd2~0_257 0) (or (and .cse9 (not .cse10)) (and (not .cse11) .cse2))) (and (= v_~x$r_buff1_thd2~0_258 v_~x$r_buff1_thd2~0_257) (or .cse12 .cse10) (or .cse13 .cse11)))) (or (and (= v_~x$w_buff0_used~0_451 v_~x$w_buff0_used~0_450) .cse5) (and .cse6 (= v_~x$w_buff0_used~0_450 0) .cse7)) (or (and (= v_~x$w_buff1_used~0_362 v_~x$w_buff1_used~0_361) .cse3 .cse8) (and (= v_~x$w_buff1_used~0_361 0) (or (and .cse9 .cse7) (and .cse1 .cse2))))))) InVars {~x$w_buff0~0=v_~x$w_buff0~0_134, P1Thread1of1ForFork0_#t~ite62=|v_P1Thread1of1ForFork0_#t~ite62_1|, ~#x~0.offset=|v_~#x~0.offset_174|, ~x$w_buff1~0=v_~x$w_buff1~0_119, #memory_int=|v_#memory_int_271|, ~#x~0.base=|v_~#x~0.base_174|, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_258, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_362, P1Thread1of1ForFork0_#t~mem61=|v_P1Thread1of1ForFork0_#t~mem61_1|, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_286, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_451} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_134, ~#x~0.offset=|v_~#x~0.offset_174|, ~x$w_buff1~0=v_~x$w_buff1~0_119, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_257, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_361, P1Thread1of1ForFork0_#t~mem61=|v_P1Thread1of1ForFork0_#t~mem61_2|, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_285, P1Thread1of1ForFork0_#t~ite66=|v_P1Thread1of1ForFork0_#t~ite66_1|, P1Thread1of1ForFork0_#t~ite67=|v_P1Thread1of1ForFork0_#t~ite67_1|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_450, P1Thread1of1ForFork0_#t~ite62=|v_P1Thread1of1ForFork0_#t~ite62_2|, P1Thread1of1ForFork0_#t~ite63=|v_P1Thread1of1ForFork0_#t~ite63_1|, P1Thread1of1ForFork0_#t~ite64=|v_P1Thread1of1ForFork0_#t~ite64_1|, P1Thread1of1ForFork0_#t~ite65=|v_P1Thread1of1ForFork0_#t~ite65_1|, #memory_int=|v_#memory_int_270|, ~#x~0.base=|v_~#x~0.base_174|} AuxVars[|v_P1_#t~mem61_42|, |v_P1_#t~ite63_33|, |v_P1_#t~ite62_35|] AssignedVars[P1Thread1of1ForFork0_#t~ite62, P1Thread1of1ForFork0_#t~ite63, P1Thread1of1ForFork0_#t~ite64, P1Thread1of1ForFork0_#t~ite65, #memory_int, ~x$r_buff1_thd2~0, ~x$w_buff1_used~0, P1Thread1of1ForFork0_#t~mem61, ~x$r_buff0_thd2~0, P1Thread1of1ForFork0_#t~ite66, P1Thread1of1ForFork0_#t~ite67, ~x$w_buff0_used~0] and [1209] L2-1-->L839: Formula: (let ((.cse15 (= (mod v_~x$w_buff0_used~0_437 256) 0)) (.cse14 (= (mod v_~x$r_buff0_thd0~0_66 256) 0)) (.cse13 (= (mod v_~x$w_buff0_used~0_436 256) 0)) (.cse12 (= (mod v_~x$r_buff1_thd0~0_46 256) 0)) (.cse16 (= (mod v_~x$w_buff1_used~0_348 256) 0))) (let ((.cse0 (select |v_#memory_int_255| |v_~#x~0.base_166|)) (.cse4 (or .cse12 .cse16)) (.cse6 (not .cse16)) (.cse5 (not .cse12)) (.cse8 (or .cse14 .cse13)) (.cse9 (not .cse13)) (.cse7 (or .cse14 .cse15)) (.cse1 (not .cse15)) (.cse3 (not .cse14))) (and (= (store |v_#memory_int_255| |v_~#x~0.base_166| (store .cse0 |v_~#x~0.offset_166| |v_ULTIMATE.start_main_#t~ite72_46|)) |v_#memory_int_254|) (let ((.cse2 (= |v_ULTIMATE.start_main_#t~mem70_43| |v_ULTIMATE.start_main_#t~mem70_38|))) (or (and .cse1 .cse2 (= |v_ULTIMATE.start_main_#t~ite71_36| |v_ULTIMATE.start_main_#t~ite71_31|) (= v_~x$w_buff0~0_126 |v_ULTIMATE.start_main_#t~ite72_46|) .cse3) (and (or (and (= |v_ULTIMATE.start_main_#t~mem70_43| |v_ULTIMATE.start_main_#t~ite71_36|) (= |v_ULTIMATE.start_main_#t~mem70_43| (select .cse0 |v_~#x~0.offset_166|)) .cse4) (and (= |v_ULTIMATE.start_main_#t~ite71_36| v_~x$w_buff1~0_111) .cse2 .cse5 .cse6)) .cse7 (= |v_ULTIMATE.start_main_#t~ite71_36| |v_ULTIMATE.start_main_#t~ite72_46|)))) (or (and (= v_~x$w_buff1_used~0_348 v_~x$w_buff1_used~0_347) .cse4 .cse8) (and (or (and .cse5 .cse6) (and .cse9 .cse3)) (= v_~x$w_buff1_used~0_347 0))) (let ((.cse10 (= (mod v_~x$w_buff1_used~0_347 256) 0)) (.cse11 (= (mod v_~x$r_buff0_thd0~0_65 256) 0))) (or (and (= v_~x$r_buff1_thd0~0_45 0) (or (and (not .cse10) .cse5) (and (not .cse11) .cse9))) (and (or .cse10 .cse12) (= v_~x$r_buff1_thd0~0_45 v_~x$r_buff1_thd0~0_46) (or .cse13 .cse11)))) (or (and (= v_~x$r_buff0_thd0~0_66 v_~x$r_buff0_thd0~0_65) .cse8) (and (= v_~x$r_buff0_thd0~0_65 0) .cse9 .cse3)) (or (and (= v_~x$w_buff0_used~0_437 v_~x$w_buff0_used~0_436) .cse7) (and .cse1 (= v_~x$w_buff0_used~0_436 0) .cse3))))) InVars {~x$w_buff0~0=v_~x$w_buff0~0_126, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_66, ULTIMATE.start_main_#t~ite71=|v_ULTIMATE.start_main_#t~ite71_31|, ~#x~0.offset=|v_~#x~0.offset_166|, ~x$w_buff1~0=v_~x$w_buff1~0_111, #memory_int=|v_#memory_int_255|, ~#x~0.base=|v_~#x~0.base_166|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_348, ULTIMATE.start_main_#t~mem70=|v_ULTIMATE.start_main_#t~mem70_38|, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_46, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_437} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_126, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_65, ~#x~0.offset=|v_~#x~0.offset_166|, ~x$w_buff1~0=v_~x$w_buff1~0_111, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_347, ULTIMATE.start_main_#t~mem70=|v_ULTIMATE.start_main_#t~mem70_37|, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_45, ULTIMATE.start_main_#t~ite75=|v_ULTIMATE.start_main_#t~ite75_24|, ULTIMATE.start_main_#t~ite76=|v_ULTIMATE.start_main_#t~ite76_18|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_436, ULTIMATE.start_main_#t~ite73=|v_ULTIMATE.start_main_#t~ite73_26|, ULTIMATE.start_main_#t~ite74=|v_ULTIMATE.start_main_#t~ite74_26|, ULTIMATE.start_main_#t~ite71=|v_ULTIMATE.start_main_#t~ite71_30|, ULTIMATE.start_main_#t~ite72=|v_ULTIMATE.start_main_#t~ite72_42|, #memory_int=|v_#memory_int_254|, ~#x~0.base=|v_~#x~0.base_166|} AuxVars[|v_ULTIMATE.start_main_#t~ite72_46|, |v_ULTIMATE.start_main_#t~ite71_36|, |v_ULTIMATE.start_main_#t~mem70_43|] AssignedVars[ULTIMATE.start_main_#t~ite73, ~x$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite74, ULTIMATE.start_main_#t~ite71, ULTIMATE.start_main_#t~ite72, #memory_int, ~x$w_buff1_used~0, ULTIMATE.start_main_#t~mem70, ~x$r_buff1_thd0~0, ULTIMATE.start_main_#t~ite75, ULTIMATE.start_main_#t~ite76, ~x$w_buff0_used~0] under condition 1652#(and (<= 1 ~x$w_buff0_used~0) (<= (div ~x$w_buff0_used~0 256) 0) (= ~__unbuffered_p0_EAX~0 0) (= 1 ~x$r_buff0_thd1~0)) [2021-01-27 02:43:10,825 WARN L146 IndependenceRelation]: Expensive independence query (4064 ms) for statements [1216] L765-->L772: Formula: (let ((.cse10 (= (mod v_~x$w_buff0_used~0_444 256) 0)) (.cse14 (= 0 (mod v_~x$r_buff0_thd1~0_71 256))) (.cse15 (= (mod v_~x$w_buff0_used~0_445 256) 0)) (.cse16 (= (mod v_~x$w_buff1_used~0_356 256) 0)) (.cse13 (= (mod v_~x$r_buff1_thd1~0_52 256) 0))) (let ((.cse5 (or .cse16 .cse13)) (.cse6 (not .cse16)) (.cse4 (select |v_#memory_int_263| |v_~#x~0.base_170|)) (.cse3 (or .cse14 .cse15)) (.cse0 (not .cse15)) (.cse7 (not .cse13)) (.cse1 (not .cse14)) (.cse9 (not .cse10)) (.cse8 (or .cse14 .cse10))) (and (let ((.cse2 (= |v_P0_#t~mem5_52| |v_P0Thread1of1ForFork1_#t~mem5_1|))) (or (and (= |v_P0_#t~ite6_51| |v_P0Thread1of1ForFork1_#t~ite6_1|) .cse0 .cse1 .cse2 (= |v_P0_#t~ite7_39| v_~x$w_buff0~0_130)) (and (= |v_P0_#t~ite7_39| |v_P0_#t~ite6_51|) .cse3 (or (and (= |v_P0_#t~ite6_51| |v_P0_#t~mem5_52|) (= (select .cse4 |v_~#x~0.offset_170|) |v_P0_#t~mem5_52|) .cse5) (and .cse6 .cse2 .cse7 (= |v_P0_#t~ite6_51| v_~x$w_buff1~0_115)))))) (or (and .cse8 .cse5 (= v_~x$w_buff1_used~0_356 v_~x$w_buff1_used~0_355)) (and (= v_~x$w_buff1_used~0_355 0) (or (and .cse1 .cse9) (and .cse6 .cse7)))) (= (store |v_#memory_int_263| |v_~#x~0.base_170| (store .cse4 |v_~#x~0.offset_170| |v_P0_#t~ite7_39|)) |v_#memory_int_262|) (or (and (= v_~x$w_buff0_used~0_444 v_~x$w_buff0_used~0_445) .cse3) (and (= v_~x$w_buff0_used~0_444 0) .cse0 .cse1)) (let ((.cse11 (= (mod v_~x$r_buff0_thd1~0_70 256) 0)) (.cse12 (= (mod v_~x$w_buff1_used~0_355 256) 0))) (or (and (or .cse10 .cse11) (or .cse12 .cse13) (= v_~x$r_buff1_thd1~0_52 v_~x$r_buff1_thd1~0_51)) (and (or (and (not .cse11) .cse9) (and .cse7 (not .cse12))) (= v_~x$r_buff1_thd1~0_51 0)))) (or (and (= v_~x$r_buff0_thd1~0_70 0) .cse1 .cse9) (and .cse8 (= v_~x$r_buff0_thd1~0_71 v_~x$r_buff0_thd1~0_70)))))) InVars {~x$w_buff0~0=v_~x$w_buff0~0_130, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_71, ~#x~0.offset=|v_~#x~0.offset_170|, P0Thread1of1ForFork1_#t~ite6=|v_P0Thread1of1ForFork1_#t~ite6_1|, ~x$w_buff1~0=v_~x$w_buff1~0_115, #memory_int=|v_#memory_int_263|, ~#x~0.base=|v_~#x~0.base_170|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_356, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_52, P0Thread1of1ForFork1_#t~mem5=|v_P0Thread1of1ForFork1_#t~mem5_1|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_445} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_130, P0Thread1of1ForFork1_#t~ite10=|v_P0Thread1of1ForFork1_#t~ite10_1|, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_70, ~#x~0.offset=|v_~#x~0.offset_170|, ~x$w_buff1~0=v_~x$w_buff1~0_115, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_355, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_51, P0Thread1of1ForFork1_#t~mem5=|v_P0Thread1of1ForFork1_#t~mem5_2|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_444, P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_1|, P0Thread1of1ForFork1_#t~ite9=|v_P0Thread1of1ForFork1_#t~ite9_1|, P0Thread1of1ForFork1_#t~ite6=|v_P0Thread1of1ForFork1_#t~ite6_2|, P0Thread1of1ForFork1_#t~ite7=|v_P0Thread1of1ForFork1_#t~ite7_1|, #memory_int=|v_#memory_int_262|, ~#x~0.base=|v_~#x~0.base_170|, P0Thread1of1ForFork1_#t~ite11=|v_P0Thread1of1ForFork1_#t~ite11_1|} AuxVars[|v_P0_#t~mem5_52|, |v_P0_#t~ite7_39|, |v_P0_#t~ite6_51|] AssignedVars[P0Thread1of1ForFork1_#t~ite10, ~x$r_buff0_thd1~0, P0Thread1of1ForFork1_#t~ite8, P0Thread1of1ForFork1_#t~ite9, P0Thread1of1ForFork1_#t~ite6, P0Thread1of1ForFork1_#t~ite7, #memory_int, ~x$w_buff1_used~0, ~x$r_buff1_thd1~0, P0Thread1of1ForFork1_#t~mem5, ~x$w_buff0_used~0, P0Thread1of1ForFork1_#t~ite11] and [1209] L2-1-->L839: Formula: (let ((.cse15 (= (mod v_~x$w_buff0_used~0_437 256) 0)) (.cse14 (= (mod v_~x$r_buff0_thd0~0_66 256) 0)) (.cse13 (= (mod v_~x$w_buff0_used~0_436 256) 0)) (.cse12 (= (mod v_~x$r_buff1_thd0~0_46 256) 0)) (.cse16 (= (mod v_~x$w_buff1_used~0_348 256) 0))) (let ((.cse0 (select |v_#memory_int_255| |v_~#x~0.base_166|)) (.cse4 (or .cse12 .cse16)) (.cse6 (not .cse16)) (.cse5 (not .cse12)) (.cse8 (or .cse14 .cse13)) (.cse9 (not .cse13)) (.cse7 (or .cse14 .cse15)) (.cse1 (not .cse15)) (.cse3 (not .cse14))) (and (= (store |v_#memory_int_255| |v_~#x~0.base_166| (store .cse0 |v_~#x~0.offset_166| |v_ULTIMATE.start_main_#t~ite72_46|)) |v_#memory_int_254|) (let ((.cse2 (= |v_ULTIMATE.start_main_#t~mem70_43| |v_ULTIMATE.start_main_#t~mem70_38|))) (or (and .cse1 .cse2 (= |v_ULTIMATE.start_main_#t~ite71_36| |v_ULTIMATE.start_main_#t~ite71_31|) (= v_~x$w_buff0~0_126 |v_ULTIMATE.start_main_#t~ite72_46|) .cse3) (and (or (and (= |v_ULTIMATE.start_main_#t~mem70_43| |v_ULTIMATE.start_main_#t~ite71_36|) (= |v_ULTIMATE.start_main_#t~mem70_43| (select .cse0 |v_~#x~0.offset_166|)) .cse4) (and (= |v_ULTIMATE.start_main_#t~ite71_36| v_~x$w_buff1~0_111) .cse2 .cse5 .cse6)) .cse7 (= |v_ULTIMATE.start_main_#t~ite71_36| |v_ULTIMATE.start_main_#t~ite72_46|)))) (or (and (= v_~x$w_buff1_used~0_348 v_~x$w_buff1_used~0_347) .cse4 .cse8) (and (or (and .cse5 .cse6) (and .cse9 .cse3)) (= v_~x$w_buff1_used~0_347 0))) (let ((.cse10 (= (mod v_~x$w_buff1_used~0_347 256) 0)) (.cse11 (= (mod v_~x$r_buff0_thd0~0_65 256) 0))) (or (and (= v_~x$r_buff1_thd0~0_45 0) (or (and (not .cse10) .cse5) (and (not .cse11) .cse9))) (and (or .cse10 .cse12) (= v_~x$r_buff1_thd0~0_45 v_~x$r_buff1_thd0~0_46) (or .cse13 .cse11)))) (or (and (= v_~x$r_buff0_thd0~0_66 v_~x$r_buff0_thd0~0_65) .cse8) (and (= v_~x$r_buff0_thd0~0_65 0) .cse9 .cse3)) (or (and (= v_~x$w_buff0_used~0_437 v_~x$w_buff0_used~0_436) .cse7) (and .cse1 (= v_~x$w_buff0_used~0_436 0) .cse3))))) InVars {~x$w_buff0~0=v_~x$w_buff0~0_126, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_66, ULTIMATE.start_main_#t~ite71=|v_ULTIMATE.start_main_#t~ite71_31|, ~#x~0.offset=|v_~#x~0.offset_166|, ~x$w_buff1~0=v_~x$w_buff1~0_111, #memory_int=|v_#memory_int_255|, ~#x~0.base=|v_~#x~0.base_166|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_348, ULTIMATE.start_main_#t~mem70=|v_ULTIMATE.start_main_#t~mem70_38|, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_46, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_437} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_126, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_65, ~#x~0.offset=|v_~#x~0.offset_166|, ~x$w_buff1~0=v_~x$w_buff1~0_111, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_347, ULTIMATE.start_main_#t~mem70=|v_ULTIMATE.start_main_#t~mem70_37|, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_45, ULTIMATE.start_main_#t~ite75=|v_ULTIMATE.start_main_#t~ite75_24|, ULTIMATE.start_main_#t~ite76=|v_ULTIMATE.start_main_#t~ite76_18|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_436, ULTIMATE.start_main_#t~ite73=|v_ULTIMATE.start_main_#t~ite73_26|, ULTIMATE.start_main_#t~ite74=|v_ULTIMATE.start_main_#t~ite74_26|, ULTIMATE.start_main_#t~ite71=|v_ULTIMATE.start_main_#t~ite71_30|, ULTIMATE.start_main_#t~ite72=|v_ULTIMATE.start_main_#t~ite72_42|, #memory_int=|v_#memory_int_254|, ~#x~0.base=|v_~#x~0.base_166|} AuxVars[|v_ULTIMATE.start_main_#t~ite72_46|, |v_ULTIMATE.start_main_#t~ite71_36|, |v_ULTIMATE.start_main_#t~mem70_43|] AssignedVars[ULTIMATE.start_main_#t~ite73, ~x$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite74, ULTIMATE.start_main_#t~ite71, ULTIMATE.start_main_#t~ite72, #memory_int, ~x$w_buff1_used~0, ULTIMATE.start_main_#t~mem70, ~x$r_buff1_thd0~0, ULTIMATE.start_main_#t~ite75, ULTIMATE.start_main_#t~ite76, ~x$w_buff0_used~0] under condition 1652#(and (<= 1 ~x$w_buff0_used~0) (<= (div ~x$w_buff0_used~0 256) 0) (= ~__unbuffered_p0_EAX~0 0) (= 1 ~x$r_buff0_thd1~0)) [2021-01-27 02:43:10,872 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-27 02:43:10,960 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-27 02:43:11,082 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-27 02:43:11,142 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-27 02:43:11,162 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check Size of Word is: 75 and size of Sequence is : 76[2021-01-27 02:43:11,402 INFO L164 SleepSetCegar]: Size of mCounterexample is: 76 [2021-01-27 02:43:11,403 INFO L165 SleepSetCegar]: [1658#[ULTIMATE.startENTRY]true, 1661#[L-1]true, 1664#[L-1-1]true, 1667#[L17]true, 1670#[L17-1]true, 1673#[L17-2]true, 1676#[L17-3]true, 1679#[L17-4]true, 1682#[L710]true, 1685#[L712](= ~__unbuffered_p0_EAX~0 0), 1688#[L713](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0)), 1691#[L714](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0)), 1694#[L715](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0)), 1697#[L716](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0)), 1700#[L717](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0)), 1703#[L718](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0)), 1706#[L719](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0)), 1709#[L720](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0)), 1712#[L721](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0)), 1715#[L722](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 1718#[L723](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 1721#[L724](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 1724#[L725](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 1727#[L726](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 1730#[L727](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 1733#[L728](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 1736#[L730](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 1739#[L730-1](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 1742#[L730-2](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 1745#[L732](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 1748#[L733](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 1751#[L734](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 1754#[L735](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 1757#[L736](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 1760#[L737](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 1763#[L738](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 1766#[L739](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 1769#[L740](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 1772#[L741](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 1775#[L742](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 1778#[L743](and (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 1781#[L744](and (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 1784#[L746](and (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 1789#[L747](and (= ~y~0 0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 1792#[L748](and (= ~y~0 0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 1795#[L749](and (= ~y~0 0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 1798#[L-1-2](and (= ~y~0 0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 1801#[L-1-3](and (= ~y~0 0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 1804#[L825](and (= ~y~0 0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 1807#[L825-1](and (= ~y~0 0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 1810#[L826](and (= ~y~0 0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 1813#[L826-1, P0ENTRY](and (= ~y~0 0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 1818#[L827, P0ENTRY](and (= ~y~0 0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 1824#[L827-1, P0ENTRY](and (= ~y~0 0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 1830#[L828, P0ENTRY](and (= ~y~0 0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 1836#[L828, L752](and (= ~y~0 0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 1840#[L828-1, P1ENTRY, L752](and (= ~y~0 0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 14875#[P1ENTRY, L752, L829](and (= ~y~0 0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 14891#[L831, P1ENTRY, L752](and (= ~y~0 0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 14907#[P1ENTRY, L832, L752](and (= ~y~0 0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 14923#[L2, P1ENTRY, L752](and (= ~y~0 0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 14939#[L3, P1ENTRY, L752](and (= ~y~0 0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 14960#[L2-1, P1ENTRY, L752](and (= ~y~0 0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 15192#[L839, P1ENTRY, L752](and (= ~y~0 0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 15206#[L839, L780, L752](and (= ~y~0 0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 17286#[L798, L839, L752](and (= ~y~0 0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0)), 17296#[L839, L801, L752](and (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0)), 18935#[L839, L754, L801](= ~x$w_buff0_used~0 0), 18943#[L844, L754, L801](= ~x$w_buff0_used~0 0), 18955#[L845, L754, L801](= ~x$w_buff0_used~0 0), 18967#[L18, L754, L801](= ~x$w_buff0_used~0 0), 18979#[L18-1, L754, L801](= ~x$w_buff0_used~0 0), 18991#[L18-2, L754, L801](= ~x$w_buff0_used~0 0), 19016#[L17-5, L754, L801](= ~x$w_buff0_used~0 0), 19051#[L754, L801, L17-7](= ~x$w_buff0_used~0 0), 19091#[L754, L801, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION](= ~x$w_buff0_used~0 0)] [2021-01-27 02:43:11,403 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2021-01-27 02:43:11,403 INFO L429 AbstractCegarLoop]: === Iteration 4 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-27 02:43:11,404 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-27 02:43:11,404 INFO L82 PathProgramCache]: Analyzing trace with hash -1003426507, now seen corresponding path program 1 times [2021-01-27 02:43:11,404 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-27 02:43:11,404 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2107955029] [2021-01-27 02:43:11,405 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-27 02:43:11,537 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-27 02:43:12,429 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-27 02:43:12,429 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2107955029] [2021-01-27 02:43:12,429 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-27 02:43:12,430 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [16] imperfect sequences [] total 16 [2021-01-27 02:43:12,430 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [903683593] [2021-01-27 02:43:12,430 INFO L461 AbstractCegarLoop]: Interpolant automaton has 16 states [2021-01-27 02:43:12,431 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-27 02:43:12,431 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2021-01-27 02:43:12,432 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=57, Invalid=183, Unknown=0, NotChecked=0, Total=240 [2021-01-27 02:43:12,432 INFO L481 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2021-01-27 02:43:12,432 INFO L482 AbstractCegarLoop]: Interpolant automaton has has 16 states, 16 states have (on average 4.6875) internal successors, (75), 16 states have internal predecessors, (75), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-01-27 02:43:12,672 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-27 02:43:12,871 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-27 02:43:17,679 WARN L146 IndependenceRelation]: Expensive independence query (4106 ms) for statements [1223] L801-->L808: Formula: (let ((.cse12 (= (mod v_~x$w_buff0_used~0_450 256) 0)) (.cse13 (= (mod v_~x$r_buff1_thd2~0_258 256) 0)) (.cse14 (= (mod v_~x$w_buff1_used~0_362 256) 0)) (.cse16 (= (mod v_~x$w_buff0_used~0_451 256) 0)) (.cse15 (= (mod v_~x$r_buff0_thd2~0_286 256) 0))) (let ((.cse4 (select |v_#memory_int_271| |v_~#x~0.base_174|)) (.cse5 (or .cse16 .cse15)) (.cse6 (not .cse16)) (.cse3 (or .cse13 .cse14)) (.cse8 (or .cse12 .cse15)) (.cse9 (not .cse12)) (.cse7 (not .cse15)) (.cse1 (not .cse14)) (.cse2 (not .cse13))) (and (let ((.cse0 (= |v_P1_#t~mem61_42| |v_P1Thread1of1ForFork0_#t~mem61_1|))) (or (and (= |v_P1_#t~ite62_35| |v_P1_#t~ite63_33|) (or (and .cse0 (= |v_P1_#t~ite62_35| v_~x$w_buff1~0_119) .cse1 .cse2) (and (= |v_P1_#t~ite62_35| |v_P1_#t~mem61_42|) .cse3 (= (select .cse4 |v_~#x~0.offset_174|) |v_P1_#t~mem61_42|))) .cse5) (and .cse0 .cse6 (= |v_P1_#t~ite63_33| v_~x$w_buff0~0_134) (= |v_P1_#t~ite62_35| |v_P1Thread1of1ForFork0_#t~ite62_1|) .cse7))) (= (store |v_#memory_int_271| |v_~#x~0.base_174| (store .cse4 |v_~#x~0.offset_174| |v_P1_#t~ite63_33|)) |v_#memory_int_270|) (or (and (= v_~x$r_buff0_thd2~0_286 v_~x$r_buff0_thd2~0_285) .cse8) (and (= v_~x$r_buff0_thd2~0_285 0) .cse9 .cse7)) (let ((.cse10 (= (mod v_~x$r_buff0_thd2~0_285 256) 0)) (.cse11 (= (mod v_~x$w_buff1_used~0_361 256) 0))) (or (and (= v_~x$r_buff1_thd2~0_257 0) (or (and .cse9 (not .cse10)) (and (not .cse11) .cse2))) (and (= v_~x$r_buff1_thd2~0_258 v_~x$r_buff1_thd2~0_257) (or .cse12 .cse10) (or .cse13 .cse11)))) (or (and (= v_~x$w_buff0_used~0_451 v_~x$w_buff0_used~0_450) .cse5) (and .cse6 (= v_~x$w_buff0_used~0_450 0) .cse7)) (or (and (= v_~x$w_buff1_used~0_362 v_~x$w_buff1_used~0_361) .cse3 .cse8) (and (= v_~x$w_buff1_used~0_361 0) (or (and .cse9 .cse7) (and .cse1 .cse2))))))) InVars {~x$w_buff0~0=v_~x$w_buff0~0_134, P1Thread1of1ForFork0_#t~ite62=|v_P1Thread1of1ForFork0_#t~ite62_1|, ~#x~0.offset=|v_~#x~0.offset_174|, ~x$w_buff1~0=v_~x$w_buff1~0_119, #memory_int=|v_#memory_int_271|, ~#x~0.base=|v_~#x~0.base_174|, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_258, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_362, P1Thread1of1ForFork0_#t~mem61=|v_P1Thread1of1ForFork0_#t~mem61_1|, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_286, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_451} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_134, ~#x~0.offset=|v_~#x~0.offset_174|, ~x$w_buff1~0=v_~x$w_buff1~0_119, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_257, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_361, P1Thread1of1ForFork0_#t~mem61=|v_P1Thread1of1ForFork0_#t~mem61_2|, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_285, P1Thread1of1ForFork0_#t~ite66=|v_P1Thread1of1ForFork0_#t~ite66_1|, P1Thread1of1ForFork0_#t~ite67=|v_P1Thread1of1ForFork0_#t~ite67_1|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_450, P1Thread1of1ForFork0_#t~ite62=|v_P1Thread1of1ForFork0_#t~ite62_2|, P1Thread1of1ForFork0_#t~ite63=|v_P1Thread1of1ForFork0_#t~ite63_1|, P1Thread1of1ForFork0_#t~ite64=|v_P1Thread1of1ForFork0_#t~ite64_1|, P1Thread1of1ForFork0_#t~ite65=|v_P1Thread1of1ForFork0_#t~ite65_1|, #memory_int=|v_#memory_int_270|, ~#x~0.base=|v_~#x~0.base_174|} AuxVars[|v_P1_#t~mem61_42|, |v_P1_#t~ite63_33|, |v_P1_#t~ite62_35|] AssignedVars[P1Thread1of1ForFork0_#t~ite62, P1Thread1of1ForFork0_#t~ite63, P1Thread1of1ForFork0_#t~ite64, P1Thread1of1ForFork0_#t~ite65, #memory_int, ~x$r_buff1_thd2~0, ~x$w_buff1_used~0, P1Thread1of1ForFork0_#t~mem61, ~x$r_buff0_thd2~0, P1Thread1of1ForFork0_#t~ite66, P1Thread1of1ForFork0_#t~ite67, ~x$w_buff0_used~0] and [1209] L2-1-->L839: Formula: (let ((.cse15 (= (mod v_~x$w_buff0_used~0_437 256) 0)) (.cse14 (= (mod v_~x$r_buff0_thd0~0_66 256) 0)) (.cse13 (= (mod v_~x$w_buff0_used~0_436 256) 0)) (.cse12 (= (mod v_~x$r_buff1_thd0~0_46 256) 0)) (.cse16 (= (mod v_~x$w_buff1_used~0_348 256) 0))) (let ((.cse0 (select |v_#memory_int_255| |v_~#x~0.base_166|)) (.cse4 (or .cse12 .cse16)) (.cse6 (not .cse16)) (.cse5 (not .cse12)) (.cse8 (or .cse14 .cse13)) (.cse9 (not .cse13)) (.cse7 (or .cse14 .cse15)) (.cse1 (not .cse15)) (.cse3 (not .cse14))) (and (= (store |v_#memory_int_255| |v_~#x~0.base_166| (store .cse0 |v_~#x~0.offset_166| |v_ULTIMATE.start_main_#t~ite72_46|)) |v_#memory_int_254|) (let ((.cse2 (= |v_ULTIMATE.start_main_#t~mem70_43| |v_ULTIMATE.start_main_#t~mem70_38|))) (or (and .cse1 .cse2 (= |v_ULTIMATE.start_main_#t~ite71_36| |v_ULTIMATE.start_main_#t~ite71_31|) (= v_~x$w_buff0~0_126 |v_ULTIMATE.start_main_#t~ite72_46|) .cse3) (and (or (and (= |v_ULTIMATE.start_main_#t~mem70_43| |v_ULTIMATE.start_main_#t~ite71_36|) (= |v_ULTIMATE.start_main_#t~mem70_43| (select .cse0 |v_~#x~0.offset_166|)) .cse4) (and (= |v_ULTIMATE.start_main_#t~ite71_36| v_~x$w_buff1~0_111) .cse2 .cse5 .cse6)) .cse7 (= |v_ULTIMATE.start_main_#t~ite71_36| |v_ULTIMATE.start_main_#t~ite72_46|)))) (or (and (= v_~x$w_buff1_used~0_348 v_~x$w_buff1_used~0_347) .cse4 .cse8) (and (or (and .cse5 .cse6) (and .cse9 .cse3)) (= v_~x$w_buff1_used~0_347 0))) (let ((.cse10 (= (mod v_~x$w_buff1_used~0_347 256) 0)) (.cse11 (= (mod v_~x$r_buff0_thd0~0_65 256) 0))) (or (and (= v_~x$r_buff1_thd0~0_45 0) (or (and (not .cse10) .cse5) (and (not .cse11) .cse9))) (and (or .cse10 .cse12) (= v_~x$r_buff1_thd0~0_45 v_~x$r_buff1_thd0~0_46) (or .cse13 .cse11)))) (or (and (= v_~x$r_buff0_thd0~0_66 v_~x$r_buff0_thd0~0_65) .cse8) (and (= v_~x$r_buff0_thd0~0_65 0) .cse9 .cse3)) (or (and (= v_~x$w_buff0_used~0_437 v_~x$w_buff0_used~0_436) .cse7) (and .cse1 (= v_~x$w_buff0_used~0_436 0) .cse3))))) InVars {~x$w_buff0~0=v_~x$w_buff0~0_126, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_66, ULTIMATE.start_main_#t~ite71=|v_ULTIMATE.start_main_#t~ite71_31|, ~#x~0.offset=|v_~#x~0.offset_166|, ~x$w_buff1~0=v_~x$w_buff1~0_111, #memory_int=|v_#memory_int_255|, ~#x~0.base=|v_~#x~0.base_166|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_348, ULTIMATE.start_main_#t~mem70=|v_ULTIMATE.start_main_#t~mem70_38|, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_46, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_437} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_126, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_65, ~#x~0.offset=|v_~#x~0.offset_166|, ~x$w_buff1~0=v_~x$w_buff1~0_111, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_347, ULTIMATE.start_main_#t~mem70=|v_ULTIMATE.start_main_#t~mem70_37|, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_45, ULTIMATE.start_main_#t~ite75=|v_ULTIMATE.start_main_#t~ite75_24|, ULTIMATE.start_main_#t~ite76=|v_ULTIMATE.start_main_#t~ite76_18|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_436, ULTIMATE.start_main_#t~ite73=|v_ULTIMATE.start_main_#t~ite73_26|, ULTIMATE.start_main_#t~ite74=|v_ULTIMATE.start_main_#t~ite74_26|, ULTIMATE.start_main_#t~ite71=|v_ULTIMATE.start_main_#t~ite71_30|, ULTIMATE.start_main_#t~ite72=|v_ULTIMATE.start_main_#t~ite72_42|, #memory_int=|v_#memory_int_254|, ~#x~0.base=|v_~#x~0.base_166|} AuxVars[|v_ULTIMATE.start_main_#t~ite72_46|, |v_ULTIMATE.start_main_#t~ite71_36|, |v_ULTIMATE.start_main_#t~mem70_43|] AssignedVars[ULTIMATE.start_main_#t~ite73, ~x$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite74, ULTIMATE.start_main_#t~ite71, ULTIMATE.start_main_#t~ite72, #memory_int, ~x$w_buff1_used~0, ULTIMATE.start_main_#t~mem70, ~x$r_buff1_thd0~0, ULTIMATE.start_main_#t~ite75, ULTIMATE.start_main_#t~ite76, ~x$w_buff0_used~0] under condition 19103#(= (select |#valid| |~#x~0.base|) 1) [2021-01-27 02:43:17,888 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-27 02:43:22,320 WARN L146 IndependenceRelation]: Expensive independence query (4113 ms) for statements [1223] L801-->L808: Formula: (let ((.cse12 (= (mod v_~x$w_buff0_used~0_450 256) 0)) (.cse13 (= (mod v_~x$r_buff1_thd2~0_258 256) 0)) (.cse14 (= (mod v_~x$w_buff1_used~0_362 256) 0)) (.cse16 (= (mod v_~x$w_buff0_used~0_451 256) 0)) (.cse15 (= (mod v_~x$r_buff0_thd2~0_286 256) 0))) (let ((.cse4 (select |v_#memory_int_271| |v_~#x~0.base_174|)) (.cse5 (or .cse16 .cse15)) (.cse6 (not .cse16)) (.cse3 (or .cse13 .cse14)) (.cse8 (or .cse12 .cse15)) (.cse9 (not .cse12)) (.cse7 (not .cse15)) (.cse1 (not .cse14)) (.cse2 (not .cse13))) (and (let ((.cse0 (= |v_P1_#t~mem61_42| |v_P1Thread1of1ForFork0_#t~mem61_1|))) (or (and (= |v_P1_#t~ite62_35| |v_P1_#t~ite63_33|) (or (and .cse0 (= |v_P1_#t~ite62_35| v_~x$w_buff1~0_119) .cse1 .cse2) (and (= |v_P1_#t~ite62_35| |v_P1_#t~mem61_42|) .cse3 (= (select .cse4 |v_~#x~0.offset_174|) |v_P1_#t~mem61_42|))) .cse5) (and .cse0 .cse6 (= |v_P1_#t~ite63_33| v_~x$w_buff0~0_134) (= |v_P1_#t~ite62_35| |v_P1Thread1of1ForFork0_#t~ite62_1|) .cse7))) (= (store |v_#memory_int_271| |v_~#x~0.base_174| (store .cse4 |v_~#x~0.offset_174| |v_P1_#t~ite63_33|)) |v_#memory_int_270|) (or (and (= v_~x$r_buff0_thd2~0_286 v_~x$r_buff0_thd2~0_285) .cse8) (and (= v_~x$r_buff0_thd2~0_285 0) .cse9 .cse7)) (let ((.cse10 (= (mod v_~x$r_buff0_thd2~0_285 256) 0)) (.cse11 (= (mod v_~x$w_buff1_used~0_361 256) 0))) (or (and (= v_~x$r_buff1_thd2~0_257 0) (or (and .cse9 (not .cse10)) (and (not .cse11) .cse2))) (and (= v_~x$r_buff1_thd2~0_258 v_~x$r_buff1_thd2~0_257) (or .cse12 .cse10) (or .cse13 .cse11)))) (or (and (= v_~x$w_buff0_used~0_451 v_~x$w_buff0_used~0_450) .cse5) (and .cse6 (= v_~x$w_buff0_used~0_450 0) .cse7)) (or (and (= v_~x$w_buff1_used~0_362 v_~x$w_buff1_used~0_361) .cse3 .cse8) (and (= v_~x$w_buff1_used~0_361 0) (or (and .cse9 .cse7) (and .cse1 .cse2))))))) InVars {~x$w_buff0~0=v_~x$w_buff0~0_134, P1Thread1of1ForFork0_#t~ite62=|v_P1Thread1of1ForFork0_#t~ite62_1|, ~#x~0.offset=|v_~#x~0.offset_174|, ~x$w_buff1~0=v_~x$w_buff1~0_119, #memory_int=|v_#memory_int_271|, ~#x~0.base=|v_~#x~0.base_174|, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_258, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_362, P1Thread1of1ForFork0_#t~mem61=|v_P1Thread1of1ForFork0_#t~mem61_1|, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_286, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_451} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_134, ~#x~0.offset=|v_~#x~0.offset_174|, ~x$w_buff1~0=v_~x$w_buff1~0_119, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_257, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_361, P1Thread1of1ForFork0_#t~mem61=|v_P1Thread1of1ForFork0_#t~mem61_2|, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_285, P1Thread1of1ForFork0_#t~ite66=|v_P1Thread1of1ForFork0_#t~ite66_1|, P1Thread1of1ForFork0_#t~ite67=|v_P1Thread1of1ForFork0_#t~ite67_1|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_450, P1Thread1of1ForFork0_#t~ite62=|v_P1Thread1of1ForFork0_#t~ite62_2|, P1Thread1of1ForFork0_#t~ite63=|v_P1Thread1of1ForFork0_#t~ite63_1|, P1Thread1of1ForFork0_#t~ite64=|v_P1Thread1of1ForFork0_#t~ite64_1|, P1Thread1of1ForFork0_#t~ite65=|v_P1Thread1of1ForFork0_#t~ite65_1|, #memory_int=|v_#memory_int_270|, ~#x~0.base=|v_~#x~0.base_174|} AuxVars[|v_P1_#t~mem61_42|, |v_P1_#t~ite63_33|, |v_P1_#t~ite62_35|] AssignedVars[P1Thread1of1ForFork0_#t~ite62, P1Thread1of1ForFork0_#t~ite63, P1Thread1of1ForFork0_#t~ite64, P1Thread1of1ForFork0_#t~ite65, #memory_int, ~x$r_buff1_thd2~0, ~x$w_buff1_used~0, P1Thread1of1ForFork0_#t~mem61, ~x$r_buff0_thd2~0, P1Thread1of1ForFork0_#t~ite66, P1Thread1of1ForFork0_#t~ite67, ~x$w_buff0_used~0] and [1216] L765-->L772: Formula: (let ((.cse10 (= (mod v_~x$w_buff0_used~0_444 256) 0)) (.cse14 (= 0 (mod v_~x$r_buff0_thd1~0_71 256))) (.cse15 (= (mod v_~x$w_buff0_used~0_445 256) 0)) (.cse16 (= (mod v_~x$w_buff1_used~0_356 256) 0)) (.cse13 (= (mod v_~x$r_buff1_thd1~0_52 256) 0))) (let ((.cse5 (or .cse16 .cse13)) (.cse6 (not .cse16)) (.cse4 (select |v_#memory_int_263| |v_~#x~0.base_170|)) (.cse3 (or .cse14 .cse15)) (.cse0 (not .cse15)) (.cse7 (not .cse13)) (.cse1 (not .cse14)) (.cse9 (not .cse10)) (.cse8 (or .cse14 .cse10))) (and (let ((.cse2 (= |v_P0_#t~mem5_52| |v_P0Thread1of1ForFork1_#t~mem5_1|))) (or (and (= |v_P0_#t~ite6_51| |v_P0Thread1of1ForFork1_#t~ite6_1|) .cse0 .cse1 .cse2 (= |v_P0_#t~ite7_39| v_~x$w_buff0~0_130)) (and (= |v_P0_#t~ite7_39| |v_P0_#t~ite6_51|) .cse3 (or (and (= |v_P0_#t~ite6_51| |v_P0_#t~mem5_52|) (= (select .cse4 |v_~#x~0.offset_170|) |v_P0_#t~mem5_52|) .cse5) (and .cse6 .cse2 .cse7 (= |v_P0_#t~ite6_51| v_~x$w_buff1~0_115)))))) (or (and .cse8 .cse5 (= v_~x$w_buff1_used~0_356 v_~x$w_buff1_used~0_355)) (and (= v_~x$w_buff1_used~0_355 0) (or (and .cse1 .cse9) (and .cse6 .cse7)))) (= (store |v_#memory_int_263| |v_~#x~0.base_170| (store .cse4 |v_~#x~0.offset_170| |v_P0_#t~ite7_39|)) |v_#memory_int_262|) (or (and (= v_~x$w_buff0_used~0_444 v_~x$w_buff0_used~0_445) .cse3) (and (= v_~x$w_buff0_used~0_444 0) .cse0 .cse1)) (let ((.cse11 (= (mod v_~x$r_buff0_thd1~0_70 256) 0)) (.cse12 (= (mod v_~x$w_buff1_used~0_355 256) 0))) (or (and (or .cse10 .cse11) (or .cse12 .cse13) (= v_~x$r_buff1_thd1~0_52 v_~x$r_buff1_thd1~0_51)) (and (or (and (not .cse11) .cse9) (and .cse7 (not .cse12))) (= v_~x$r_buff1_thd1~0_51 0)))) (or (and (= v_~x$r_buff0_thd1~0_70 0) .cse1 .cse9) (and .cse8 (= v_~x$r_buff0_thd1~0_71 v_~x$r_buff0_thd1~0_70)))))) InVars {~x$w_buff0~0=v_~x$w_buff0~0_130, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_71, ~#x~0.offset=|v_~#x~0.offset_170|, P0Thread1of1ForFork1_#t~ite6=|v_P0Thread1of1ForFork1_#t~ite6_1|, ~x$w_buff1~0=v_~x$w_buff1~0_115, #memory_int=|v_#memory_int_263|, ~#x~0.base=|v_~#x~0.base_170|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_356, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_52, P0Thread1of1ForFork1_#t~mem5=|v_P0Thread1of1ForFork1_#t~mem5_1|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_445} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_130, P0Thread1of1ForFork1_#t~ite10=|v_P0Thread1of1ForFork1_#t~ite10_1|, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_70, ~#x~0.offset=|v_~#x~0.offset_170|, ~x$w_buff1~0=v_~x$w_buff1~0_115, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_355, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_51, P0Thread1of1ForFork1_#t~mem5=|v_P0Thread1of1ForFork1_#t~mem5_2|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_444, P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_1|, P0Thread1of1ForFork1_#t~ite9=|v_P0Thread1of1ForFork1_#t~ite9_1|, P0Thread1of1ForFork1_#t~ite6=|v_P0Thread1of1ForFork1_#t~ite6_2|, P0Thread1of1ForFork1_#t~ite7=|v_P0Thread1of1ForFork1_#t~ite7_1|, #memory_int=|v_#memory_int_262|, ~#x~0.base=|v_~#x~0.base_170|, P0Thread1of1ForFork1_#t~ite11=|v_P0Thread1of1ForFork1_#t~ite11_1|} AuxVars[|v_P0_#t~mem5_52|, |v_P0_#t~ite7_39|, |v_P0_#t~ite6_51|] AssignedVars[P0Thread1of1ForFork1_#t~ite10, ~x$r_buff0_thd1~0, P0Thread1of1ForFork1_#t~ite8, P0Thread1of1ForFork1_#t~ite9, P0Thread1of1ForFork1_#t~ite6, P0Thread1of1ForFork1_#t~ite7, #memory_int, ~x$w_buff1_used~0, ~x$r_buff1_thd1~0, P0Thread1of1ForFork1_#t~mem5, ~x$w_buff0_used~0, P0Thread1of1ForFork1_#t~ite11] under condition 19103#(= (select |#valid| |~#x~0.base|) 1) [2021-01-27 02:43:22,349 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-27 02:43:22,561 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-27 02:43:25,764 WARN L146 IndependenceRelation]: Expensive independence query (2803 ms) for statements [1221] L780-->L798: Formula: (let ((.cse22 (mod v_~x$w_buff0_used~0_499 256)) (.cse12 (= (mod v_~x$r_buff0_thd2~0_334 256) 0)) (.cse13 (= (mod v_~x$r_buff1_thd2~0_300 256) 0))) (let ((.cse6 (not .cse13)) (.cse7 (not .cse12)) (.cse8 (= (mod v_~x$w_buff1_used~0_410 256) 0)) (.cse26 (= .cse22 0)) (.cse14 (= (mod v_~weak$$choice2~0_92 256) 0)) (.cse15 (select |v_#memory_int_294| |v_~#x~0.base_188|)) (.cse45 (= (mod v_~weak$$choice0~0_141 256) 0)) (.cse21 (= (mod v_~x$w_buff1_used~0_409 256) 0)) (.cse9 (= (mod v_~x$w_buff0_used~0_498 256) 0))) (let ((.cse5 (or .cse9 .cse12)) (.cse20 (not .cse21)) (.cse4 (not .cse9)) (.cse32 (= (mod v_~weak$$choice1~0_81 256) 0)) (.cse33 (not .cse45)) (.cse50 (select .cse15 |v_~#x~0.offset_188|)) (.cse0 (not .cse14)) (.cse27 (or .cse12 .cse26)) (.cse29 (or .cse7 .cse8 .cse13 .cse26)) (.cse31 (or .cse6 .cse7 .cse8 .cse26)) (.cse10 (not .cse8)) (.cse30 (not .cse26))) (and (let ((.cse1 (= |v_P1_#t~ite43_71| |v_P1Thread1of1ForFork0_#t~ite43_1|)) (.cse2 (= |v_P1_#t~ite44_65| |v_P1Thread1of1ForFork0_#t~ite44_1|)) (.cse3 (= |v_P1_#t~ite42_83| |v_P1Thread1of1ForFork0_#t~ite42_1|))) (or (and (= |v_P1_#t~ite45_61| |v_P1Thread1of1ForFork0_#t~ite45_1|) .cse0 .cse1 .cse2 (= v_~x$w_buff1_used~0_410 v_~x$w_buff1_used~0_409) .cse3) (and (or (and .cse4 (or (and .cse5 (= |v_P1_#t~ite43_71| |v_P1_#t~ite44_65|) (or (and (= |v_P1_#t~ite42_83| |v_P1_#t~ite43_71|) (or .cse6 .cse7 .cse8 .cse9) (let ((.cse11 (= |v_P1_#t~ite42_83| 0))) (or (and .cse6 .cse10 .cse4 .cse11 .cse12) (and (or .cse7 .cse8 .cse13 .cse9) .cse11)))) (and .cse10 .cse4 .cse13 .cse12 .cse3 (= |v_P1_#t~ite43_71| v_~weak$$choice0~0_141)))) (and .cse7 .cse1 .cse4 (= |v_P1_#t~ite44_65| 0) .cse3)) (= |v_P1_#t~ite44_65| |v_P1_#t~ite45_61|)) (and .cse1 .cse2 (= |v_P1_#t~ite45_61| v_~x$w_buff1_used~0_410) .cse9 .cse3)) .cse14 (= |v_P1_#t~ite45_61| v_~x$w_buff1_used~0_409)))) (= v_~__unbuffered_p1_EAX$read_delayed~0_27 1) (= (store |v_#memory_int_294| |v_~#x~0.base_188| (store .cse15 |v_~#x~0.offset_188| |v_P1_#t~ite60_29|)) |v_#memory_int_292|) (or (and (= |v_P1_#t~ite60_29| v_~x$mem_tmp~0_28) .cse0 (= |v_P1_#t~mem59_30| |v_P1Thread1of1ForFork0_#t~mem59_1|)) (and (= |v_P1_#t~ite60_29| |v_P1_#t~mem59_30|) (= |v_P1_#t~mem59_30| v_~__unbuffered_p1_EAX~0_41) .cse14)) (let ((.cse16 (= |v_P1_#t~ite48_81| |v_P1Thread1of1ForFork0_#t~ite48_1|)) (.cse17 (= |v_P1_#t~ite47_85| |v_P1Thread1of1ForFork0_#t~ite47_1|)) (.cse18 (= |v_P1_#t~ite49_71| |v_P1Thread1of1ForFork0_#t~ite49_1|))) (or (and (= |v_P1_#t~ite50_57| v_~x$r_buff0_thd2~0_333) (or (and .cse16 .cse17 (= |v_P1_#t~ite50_57| v_~x$r_buff0_thd2~0_334) .cse9 .cse18) (and (= |v_P1_#t~ite49_71| |v_P1_#t~ite50_57|) .cse4 (or (and (= |v_P1_#t~ite49_71| 0) .cse16 .cse7 .cse4 .cse17) (and (= |v_P1_#t~ite48_81| |v_P1_#t~ite49_71|) .cse5 (or (and (let ((.cse19 (= |v_P1_#t~ite47_85| 0))) (or (and .cse6 .cse19 .cse4 .cse20 .cse12) (and .cse19 (or .cse21 .cse7 .cse13 .cse9)))) (or .cse21 .cse6 .cse7 .cse9) (= |v_P1_#t~ite47_85| |v_P1_#t~ite48_81|)) (and .cse4 .cse17 .cse20 (= |v_P1_#t~ite48_81| v_~x$r_buff0_thd2~0_334) .cse13 .cse12)))))) .cse14) (and (= |v_P1_#t~ite50_57| |v_P1Thread1of1ForFork0_#t~ite50_1|) .cse16 .cse0 (= v_~x$r_buff0_thd2~0_334 v_~x$r_buff0_thd2~0_333) .cse17 .cse18))) (let ((.cse23 (= |v_P1_#t~ite38_81| |v_P1Thread1of1ForFork0_#t~ite38_1|)) (.cse24 (= |v_P1_#t~ite39_75| |v_P1Thread1of1ForFork0_#t~ite39_1|)) (.cse25 (= |v_P1_#t~ite37_93| |v_P1Thread1of1ForFork0_#t~ite37_1|))) (or (and (or (and (= |v_P1_#t~ite40_71| .cse22) .cse23 .cse24 .cse25 .cse26) (and (or (and .cse27 (= |v_P1_#t~ite38_81| |v_P1_#t~ite39_75|) (or (and (= |v_P1_#t~ite38_81| (mod |v_P1_#t~ite37_93| 256)) (let ((.cse28 (= |v_P1_#t~ite37_93| v_~weak$$choice0~0_141))) (or (and .cse28 .cse29) (and .cse6 .cse10 .cse30 .cse28 .cse12))) .cse31) (and .cse10 .cse30 .cse25 .cse13 (= |v_P1_#t~ite38_81| (ite (or .cse32 .cse33) 1 0)) .cse12))) (and .cse7 .cse23 .cse30 .cse25 (= |v_P1_#t~ite39_75| 0))) .cse30 (= |v_P1_#t~ite39_75| |v_P1_#t~ite40_71|))) (= |v_P1_#t~ite40_71| |v_P1_#t~ite41_53|) .cse14) (and .cse0 .cse23 .cse24 .cse25 (= |v_P1_#t~ite41_53| .cse22) (= |v_P1_#t~ite40_71| |v_P1Thread1of1ForFork0_#t~ite40_1|)))) (= v_~__unbuffered_p1_EAX$read_delayed_var~0.offset_30 |v_~#x~0.offset_188|) (= |v_P1Thread1of1ForFork0_#t~nondet13_1| v_~weak$$choice2~0_92) (let ((.cse37 (= |v_P1_#t~ite29_59| |v_P1Thread1of1ForFork0_#t~ite29_1|)) (.cse34 (= |v_P1_#t~ite27_81| |v_P1Thread1of1ForFork0_#t~ite27_1|)) (.cse35 (= |v_P1_#t~ite28_69| |v_P1Thread1of1ForFork0_#t~ite28_1|))) (or (and (or (and (= |v_P1_#t~ite29_59| |v_P1_#t~ite30_55|) (or (and .cse34 .cse7 .cse30 (= |v_P1_#t~ite29_59| v_~x$w_buff0~0_155) .cse35) (and .cse27 (= |v_P1_#t~ite28_69| |v_P1_#t~ite29_59|) (or (and (let ((.cse36 (= |v_P1_#t~ite27_81| v_~x$w_buff0~0_155))) (or (and .cse36 .cse29) (and .cse36 .cse6 .cse10 .cse30 .cse12))) (= |v_P1_#t~ite27_81| |v_P1_#t~ite28_69|) .cse31) (and .cse10 .cse34 (= |v_P1_#t~ite28_69| v_~x$w_buff0~0_155) .cse30 .cse13 .cse12)))) .cse30) (and .cse37 .cse34 (= |v_P1_#t~ite30_55| v_~x$w_buff0~0_155) .cse35 .cse26)) .cse14 (= |v_P1_#t~ite30_55| v_~x$w_buff0~0_154)) (and .cse0 .cse37 .cse34 (= |v_P1_#t~ite30_55| |v_P1Thread1of1ForFork0_#t~ite30_1|) (= v_~x$w_buff0~0_155 v_~x$w_buff0~0_154) .cse35))) (let ((.cse40 (= |v_P1Thread1of1ForFork0_#t~ite55_1| |v_P1_#t~ite55_47|)) (.cse38 (= |v_P1Thread1of1ForFork0_#t~ite54_1| |v_P1_#t~ite54_49|)) (.cse39 (= |v_P1Thread1of1ForFork0_#t~ite53_1| |v_P1_#t~ite53_59|)) (.cse41 (= |v_P1_#t~ite52_61| |v_P1Thread1of1ForFork0_#t~ite52_1|))) (or (and .cse0 .cse38 .cse39 .cse40 .cse41 (= v_~x$r_buff1_thd2~0_299 v_~x$r_buff1_thd2~0_300) (= |v_P1_#t~ite56_43| |v_P1Thread1of1ForFork0_#t~ite56_1|)) (and (= |v_P1_#t~ite56_43| v_~x$r_buff1_thd2~0_299) .cse14 (or (and (= |v_P1_#t~ite56_43| v_~x$r_buff1_thd2~0_300) .cse38 .cse39 .cse40 .cse41 .cse9) (and (= |v_P1_#t~ite56_43| |v_P1_#t~ite55_47|) (let ((.cse44 (= (mod v_~x$r_buff0_thd2~0_333 256) 0))) (let ((.cse42 (not .cse44))) (or (and (= |v_P1_#t~ite54_49| |v_P1_#t~ite55_47|) (or (and (or .cse21 .cse6 .cse42 .cse9) .cse41 (let ((.cse43 (= |v_P1_#t~ite53_59| 0))) (or (and .cse43 (or .cse21 .cse42 .cse13 .cse9)) (and .cse6 .cse43 .cse4 .cse20 .cse44))) (= |v_P1_#t~ite53_59| |v_P1_#t~ite54_49|)) (and (= |v_P1_#t~ite52_61| |v_P1_#t~ite54_49|) .cse39 .cse4 .cse20 .cse44 .cse13 (or (and .cse45 (= |v_P1_#t~ite52_61| 0)) (and (= |v_P1_#t~ite52_61| v_~x$r_buff1_thd2~0_300) .cse33)))) (or .cse44 .cse9)) (and (= |v_P1_#t~ite55_47| 0) .cse38 .cse39 .cse41 .cse4 .cse42)))) .cse4))))) (= v_~x$flush_delayed~0_44 0) (= v_~x$w_buff0_used~0_498 (ite (= |v_P1_#t~ite41_53| 0) 0 1)) (= |v_P1Thread1of1ForFork0_#t~nondet15_1| v_~weak$$choice1~0_81) (= v_~__unbuffered_p1_EAX$read_delayed_var~0.base_30 |v_~#x~0.base_188|) (= |v_P1Thread1of1ForFork0_#t~nondet12_1| v_~weak$$choice0~0_141) (let ((.cse46 (= |v_P1_#t~ite22_77| |v_P1Thread1of1ForFork0_#t~ite22_1|)) (.cse47 (= |v_P1_#t~ite23_81| |v_P1Thread1of1ForFork0_#t~ite23_1|)) (.cse48 (= |v_P1_#t~mem21_94| |v_P1Thread1of1ForFork0_#t~mem21_1|)) (.cse49 (= |v_P1_#t~ite24_65| |v_P1Thread1of1ForFork0_#t~ite24_1|)) (.cse51 (= |v_P1_#t~ite19_71| |v_P1Thread1of1ForFork0_#t~ite19_1|)) (.cse52 (= |v_P1_#t~mem17_68| |v_P1Thread1of1ForFork0_#t~mem17_1|)) (.cse53 (= |v_P1_#t~ite18_83| |v_P1Thread1of1ForFork0_#t~ite18_1|)) (.cse54 (= |v_P1_#t~ite20_87| |v_P1Thread1of1ForFork0_#t~ite20_1|))) (or (and .cse46 .cse47 .cse48 .cse49 (= |v_P1_#t~mem16_64| .cse50) (= |v_P1_#t~mem16_64| v_~__unbuffered_p1_EAX~0_41) .cse51 (= |v_P1_#t~ite25_61| |v_P1Thread1of1ForFork0_#t~ite25_1|) .cse52 .cse53 .cse26 .cse54) (and (or (and .cse27 (= |v_P1_#t~ite24_65| |v_P1_#t~ite25_61|) (or (and .cse46 .cse10 .cse47 .cse48 .cse30 (or (and (or (and (= |v_P1_#t~ite18_83| v_~x$w_buff1~0_150) .cse32) (and (= |v_P1_#t~ite18_83| v_~x$w_buff0~0_155) (not .cse32))) .cse45 (= |v_P1_#t~ite18_83| |v_P1_#t~ite19_71|) .cse52) (and (= |v_P1_#t~mem17_68| .cse50) (= |v_P1_#t~ite19_71| |v_P1_#t~mem17_68|) .cse33 .cse53)) (= |v_P1_#t~ite19_71| |v_P1_#t~ite24_65|) .cse13 .cse12 .cse54) (and (= |v_P1_#t~ite23_81| |v_P1_#t~ite24_65|) .cse51 (or (and (= |v_P1_#t~ite22_77| |v_P1_#t~ite23_81|) (or (and .cse45 (= |v_P1_#t~ite22_77| |v_P1_#t~mem21_94|) (= |v_P1_#t~mem21_94| .cse50)) (and .cse48 (= |v_P1_#t~ite22_77| v_~x$w_buff0~0_155) .cse33)) .cse29 .cse54) (and .cse6 .cse46 .cse10 .cse48 .cse30 (or (and (= |v_P1_#t~ite20_87| v_~x$w_buff1~0_150) .cse33) (and .cse45 (= |v_P1_#t~ite20_87| v_~x$w_buff0~0_155))) .cse12 (= |v_P1_#t~ite23_81| |v_P1_#t~ite20_87|))) .cse52 .cse53 .cse31))) (and .cse46 .cse7 .cse47 .cse48 .cse30 .cse49 (= |v_P1_#t~ite25_61| v_~x$w_buff0~0_155) .cse51 .cse52 .cse53 .cse54)) (= |v_P1_#t~mem16_64| |v_P1Thread1of1ForFork0_#t~mem16_1|) .cse30 (= |v_P1_#t~ite25_61| v_~__unbuffered_p1_EAX~0_41)))) (= v_~x$mem_tmp~0_28 .cse50) (let ((.cse55 (= |v_P1_#t~ite34_61| |v_P1Thread1of1ForFork0_#t~ite34_1|)) (.cse56 (= |v_P1_#t~ite33_67| |v_P1Thread1of1ForFork0_#t~ite33_1|)) (.cse57 (= |v_P1_#t~ite32_81| |v_P1Thread1of1ForFork0_#t~ite32_1|))) (or (and (= v_~x$w_buff1~0_149 v_~x$w_buff1~0_150) .cse0 .cse55 .cse56 .cse57 (= |v_P1_#t~ite35_57| |v_P1Thread1of1ForFork0_#t~ite35_1|)) (and (or (and .cse30 (= |v_P1_#t~ite34_61| |v_P1_#t~ite35_57|) (or (and .cse27 (or (and (let ((.cse58 (= |v_P1_#t~ite32_81| v_~x$w_buff1~0_150))) (or (and .cse6 .cse10 .cse30 .cse12 .cse58) (and .cse29 .cse58))) .cse31 (= |v_P1_#t~ite32_81| |v_P1_#t~ite33_67|)) (and .cse10 (= |v_P1_#t~ite33_67| v_~x$w_buff1~0_150) .cse30 .cse13 .cse12 .cse57)) (= |v_P1_#t~ite33_67| |v_P1_#t~ite34_61|)) (and .cse7 .cse30 .cse56 (= |v_P1_#t~ite34_61| v_~x$w_buff1~0_150) .cse57))) (and (= |v_P1_#t~ite35_57| v_~x$w_buff1~0_150) .cse55 .cse56 .cse26 .cse57)) (= |v_P1_#t~ite35_57| v_~x$w_buff1~0_149) .cse14))))))) InVars {~x$w_buff0~0=v_~x$w_buff0~0_155, P1Thread1of1ForFork0_#t~mem21=|v_P1Thread1of1ForFork0_#t~mem21_1|, P1Thread1of1ForFork0_#t~ite47=|v_P1Thread1of1ForFork0_#t~ite47_1|, P1Thread1of1ForFork0_#t~ite24=|v_P1Thread1of1ForFork0_#t~ite24_1|, P1Thread1of1ForFork0_#t~ite22=|v_P1Thread1of1ForFork0_#t~ite22_1|, P1Thread1of1ForFork0_#t~ite45=|v_P1Thread1of1ForFork0_#t~ite45_1|, P1Thread1of1ForFork0_#t~ite28=|v_P1Thread1of1ForFork0_#t~ite28_1|, P1Thread1of1ForFork0_#t~ite49=|v_P1Thread1of1ForFork0_#t~ite49_1|, P1Thread1of1ForFork0_#t~ite43=|v_P1Thread1of1ForFork0_#t~ite43_1|, P1Thread1of1ForFork0_#t~ite20=|v_P1Thread1of1ForFork0_#t~ite20_1|, P1Thread1of1ForFork0_#t~nondet12=|v_P1Thread1of1ForFork0_#t~nondet12_1|, P1Thread1of1ForFork0_#t~ite19=|v_P1Thread1of1ForFork0_#t~ite19_1|, ~#x~0.offset=|v_~#x~0.offset_188|, ~x$w_buff1~0=v_~x$w_buff1~0_150, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_300, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_410, P1Thread1of1ForFork0_#t~ite34=|v_P1Thread1of1ForFork0_#t~ite34_1|, P1Thread1of1ForFork0_#t~ite55=|v_P1Thread1of1ForFork0_#t~ite55_1|, P1Thread1of1ForFork0_#t~ite38=|v_P1Thread1of1ForFork0_#t~ite38_1|, P1Thread1of1ForFork0_#t~ite53=|v_P1Thread1of1ForFork0_#t~ite53_1|, P1Thread1of1ForFork0_#t~ite32=|v_P1Thread1of1ForFork0_#t~ite32_1|, P1Thread1of1ForFork0_#t~ite30=|v_P1Thread1of1ForFork0_#t~ite30_1|, P1Thread1of1ForFork0_#t~mem16=|v_P1Thread1of1ForFork0_#t~mem16_1|, P1Thread1of1ForFork0_#t~ite25=|v_P1Thread1of1ForFork0_#t~ite25_1|, P1Thread1of1ForFork0_#t~ite23=|v_P1Thread1of1ForFork0_#t~ite23_1|, P1Thread1of1ForFork0_#t~ite44=|v_P1Thread1of1ForFork0_#t~ite44_1|, P1Thread1of1ForFork0_#t~ite29=|v_P1Thread1of1ForFork0_#t~ite29_1|, P1Thread1of1ForFork0_#t~ite27=|v_P1Thread1of1ForFork0_#t~ite27_1|, P1Thread1of1ForFork0_#t~ite48=|v_P1Thread1of1ForFork0_#t~ite48_1|, P1Thread1of1ForFork0_#t~nondet13=|v_P1Thread1of1ForFork0_#t~nondet13_1|, P1Thread1of1ForFork0_#t~nondet15=|v_P1Thread1of1ForFork0_#t~nondet15_1|, P1Thread1of1ForFork0_#t~ite42=|v_P1Thread1of1ForFork0_#t~ite42_1|, P1Thread1of1ForFork0_#t~ite40=|v_P1Thread1of1ForFork0_#t~ite40_1|, P1Thread1of1ForFork0_#t~mem59=|v_P1Thread1of1ForFork0_#t~mem59_1|, P1Thread1of1ForFork0_#t~ite35=|v_P1Thread1of1ForFork0_#t~ite35_1|, P1Thread1of1ForFork0_#t~ite33=|v_P1Thread1of1ForFork0_#t~ite33_1|, P1Thread1of1ForFork0_#t~ite56=|v_P1Thread1of1ForFork0_#t~ite56_1|, P1Thread1of1ForFork0_#t~ite39=|v_P1Thread1of1ForFork0_#t~ite39_1|, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_334, P1Thread1of1ForFork0_#t~ite37=|v_P1Thread1of1ForFork0_#t~ite37_1|, P1Thread1of1ForFork0_#t~ite18=|v_P1Thread1of1ForFork0_#t~ite18_1|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_499, P1Thread1of1ForFork0_#t~ite50=|v_P1Thread1of1ForFork0_#t~ite50_1|, P1Thread1of1ForFork0_#t~ite54=|v_P1Thread1of1ForFork0_#t~ite54_1|, P1Thread1of1ForFork0_#t~ite52=|v_P1Thread1of1ForFork0_#t~ite52_1|, #memory_int=|v_#memory_int_294|, ~#x~0.base=|v_~#x~0.base_188|, P1Thread1of1ForFork0_#t~mem17=|v_P1Thread1of1ForFork0_#t~mem17_1|} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_154, P1Thread1of1ForFork0_#t~mem21=|v_P1Thread1of1ForFork0_#t~mem21_2|, ~x$flush_delayed~0=v_~x$flush_delayed~0_44, P1Thread1of1ForFork0_#t~ite47=|v_P1Thread1of1ForFork0_#t~ite47_2|, P1Thread1of1ForFork0_#t~ite24=|v_P1Thread1of1ForFork0_#t~ite24_2|, P1Thread1of1ForFork0_#t~ite22=|v_P1Thread1of1ForFork0_#t~ite22_2|, P1Thread1of1ForFork0_#t~ite45=|v_P1Thread1of1ForFork0_#t~ite45_2|, P1Thread1of1ForFork0_#t~ite28=|v_P1Thread1of1ForFork0_#t~ite28_2|, P1Thread1of1ForFork0_#t~ite26=|v_P1Thread1of1ForFork0_#t~ite26_1|, P1Thread1of1ForFork0_#t~ite49=|v_P1Thread1of1ForFork0_#t~ite49_2|, ~weak$$choice1~0=v_~weak$$choice1~0_81, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_41, P1Thread1of1ForFork0_#t~ite43=|v_P1Thread1of1ForFork0_#t~ite43_2|, P1Thread1of1ForFork0_#t~ite20=|v_P1Thread1of1ForFork0_#t~ite20_2|, P1Thread1of1ForFork0_#t~ite60=|v_P1Thread1of1ForFork0_#t~ite60_1|, P1Thread1of1ForFork0_#t~ite41=|v_P1Thread1of1ForFork0_#t~ite41_1|, ~__unbuffered_p1_EAX$read_delayed_var~0.base=v_~__unbuffered_p1_EAX$read_delayed_var~0.base_30, P1Thread1of1ForFork0_#t~nondet12=|v_P1Thread1of1ForFork0_#t~nondet12_2|, P1Thread1of1ForFork0_#t~ite19=|v_P1Thread1of1ForFork0_#t~ite19_2|, P1Thread1of1ForFork0_#t~mem58=|v_P1Thread1of1ForFork0_#t~mem58_1|, P1Thread1of1ForFork0_#t~mem14=|v_P1Thread1of1ForFork0_#t~mem14_1|, ~#x~0.offset=|v_~#x~0.offset_188|, ~x$w_buff1~0=v_~x$w_buff1~0_149, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_299, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_409, P1Thread1of1ForFork0_#t~ite57=|v_P1Thread1of1ForFork0_#t~ite57_1|, P1Thread1of1ForFork0_#t~ite36=|v_P1Thread1of1ForFork0_#t~ite36_1|, P1Thread1of1ForFork0_#t~ite34=|v_P1Thread1of1ForFork0_#t~ite34_2|, P1Thread1of1ForFork0_#t~ite55=|v_P1Thread1of1ForFork0_#t~ite55_2|, P1Thread1of1ForFork0_#t~ite38=|v_P1Thread1of1ForFork0_#t~ite38_2|, ~weak$$choice0~0=v_~weak$$choice0~0_141, P1Thread1of1ForFork0_#t~ite53=|v_P1Thread1of1ForFork0_#t~ite53_2|, P1Thread1of1ForFork0_#t~ite32=|v_P1Thread1of1ForFork0_#t~ite32_2|, P1Thread1of1ForFork0_#t~ite30=|v_P1Thread1of1ForFork0_#t~ite30_2|, P1Thread1of1ForFork0_#t~ite51=|v_P1Thread1of1ForFork0_#t~ite51_1|, P1Thread1of1ForFork0_#t~mem16=|v_P1Thread1of1ForFork0_#t~mem16_2|, ~__unbuffered_p1_EAX$read_delayed~0=v_~__unbuffered_p1_EAX$read_delayed~0_27, P1Thread1of1ForFork0_#t~ite46=|v_P1Thread1of1ForFork0_#t~ite46_1|, P1Thread1of1ForFork0_#t~ite25=|v_P1Thread1of1ForFork0_#t~ite25_2|, ~x$mem_tmp~0=v_~x$mem_tmp~0_28, P1Thread1of1ForFork0_#t~ite23=|v_P1Thread1of1ForFork0_#t~ite23_2|, P1Thread1of1ForFork0_#t~ite44=|v_P1Thread1of1ForFork0_#t~ite44_2|, P1Thread1of1ForFork0_#t~ite29=|v_P1Thread1of1ForFork0_#t~ite29_2|, P1Thread1of1ForFork0_#t~ite27=|v_P1Thread1of1ForFork0_#t~ite27_2|, P1Thread1of1ForFork0_#t~ite48=|v_P1Thread1of1ForFork0_#t~ite48_2|, P1Thread1of1ForFork0_#t~nondet13=|v_P1Thread1of1ForFork0_#t~nondet13_2|, P1Thread1of1ForFork0_#t~nondet15=|v_P1Thread1of1ForFork0_#t~nondet15_2|, P1Thread1of1ForFork0_#t~ite42=|v_P1Thread1of1ForFork0_#t~ite42_2|, P1Thread1of1ForFork0_#t~ite40=|v_P1Thread1of1ForFork0_#t~ite40_2|, P1Thread1of1ForFork0_#t~mem59=|v_P1Thread1of1ForFork0_#t~mem59_2|, P1Thread1of1ForFork0_#t~ite35=|v_P1Thread1of1ForFork0_#t~ite35_2|, ~__unbuffered_p1_EAX$read_delayed_var~0.offset=v_~__unbuffered_p1_EAX$read_delayed_var~0.offset_30, P1Thread1of1ForFork0_#t~ite33=|v_P1Thread1of1ForFork0_#t~ite33_2|, P1Thread1of1ForFork0_#t~ite56=|v_P1Thread1of1ForFork0_#t~ite56_2|, P1Thread1of1ForFork0_#t~ite39=|v_P1Thread1of1ForFork0_#t~ite39_2|, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_333, P1Thread1of1ForFork0_#t~ite37=|v_P1Thread1of1ForFork0_#t~ite37_2|, P1Thread1of1ForFork0_#t~ite18=|v_P1Thread1of1ForFork0_#t~ite18_2|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_498, P1Thread1of1ForFork0_#t~ite50=|v_P1Thread1of1ForFork0_#t~ite50_2|, P1Thread1of1ForFork0_#t~ite54=|v_P1Thread1of1ForFork0_#t~ite54_2|, P1Thread1of1ForFork0_#t~ite31=|v_P1Thread1of1ForFork0_#t~ite31_1|, P1Thread1of1ForFork0_#t~ite52=|v_P1Thread1of1ForFork0_#t~ite52_2|, #memory_int=|v_#memory_int_292|, ~#x~0.base=|v_~#x~0.base_188|, P1Thread1of1ForFork0_#t~mem17=|v_P1Thread1of1ForFork0_#t~mem17_2|, ~weak$$choice2~0=v_~weak$$choice2~0_92} AuxVars[|v_P1_#t~ite22_77|, |v_P1_#t~ite44_65|, |v_P1_#t~mem17_68|, |v_P1_#t~ite52_61|, |v_P1_#t~ite23_81|, |v_P1_#t~ite56_43|, |v_P1_#t~ite27_81|, |v_P1_#t~ite60_29|, |v_P1_#t~ite48_81|, |v_P1_#t~ite49_71|, |v_P1_#t~ite30_55|, |v_P1_#t~ite25_61|, |v_P1_#t~mem21_94|, |v_P1_#t~ite55_47|, |v_P1_#t~ite35_57|, |v_P1_#t~ite50_57|, |v_P1_#t~ite32_81|, |v_P1_#t~ite43_71|, |v_P1_#t~ite34_61|, |v_P1_#t~ite42_83|, |v_P1_#t~ite38_81|, |v_P1_#t~ite41_53|, |v_P1_#t~ite37_93|, |v_P1_#t~ite39_75|, |v_P1_#t~ite24_65|, |v_P1_#t~ite28_69|, |v_P1_#t~mem16_64|, |v_P1_#t~ite20_87|, |v_P1_#t~ite29_59|, |v_P1_#t~ite47_85|, |v_P1_#t~ite19_71|, |v_P1_#t~ite45_61|, |v_P1_#t~ite53_59|, |v_P1_#t~ite33_67|, |v_P1_#t~ite54_49|, |v_P1_#t~ite18_83|, |v_P1_#t~mem59_30|, |v_P1_#t~ite40_71|] AssignedVars[~x$w_buff0~0, P1Thread1of1ForFork0_#t~mem21, ~x$flush_delayed~0, P1Thread1of1ForFork0_#t~ite47, P1Thread1of1ForFork0_#t~ite24, P1Thread1of1ForFork0_#t~ite22, P1Thread1of1ForFork0_#t~ite45, P1Thread1of1ForFork0_#t~ite28, P1Thread1of1ForFork0_#t~ite26, P1Thread1of1ForFork0_#t~ite49, ~weak$$choice1~0, ~__unbuffered_p1_EAX~0, P1Thread1of1ForFork0_#t~ite43, P1Thread1of1ForFork0_#t~ite20, P1Thread1of1ForFork0_#t~ite60, P1Thread1of1ForFork0_#t~ite41, ~__unbuffered_p1_EAX$read_delayed_var~0.base, P1Thread1of1ForFork0_#t~nondet12, P1Thread1of1ForFork0_#t~ite19, P1Thread1of1ForFork0_#t~mem58, P1Thread1of1ForFork0_#t~mem14, ~x$w_buff1~0, ~x$r_buff1_thd2~0, ~x$w_buff1_used~0, P1Thread1of1ForFork0_#t~ite57, P1Thread1of1ForFork0_#t~ite36, P1Thread1of1ForFork0_#t~ite34, P1Thread1of1ForFork0_#t~ite55, P1Thread1of1ForFork0_#t~ite38, ~weak$$choice0~0, P1Thread1of1ForFork0_#t~ite53, P1Thread1of1ForFork0_#t~ite32, P1Thread1of1ForFork0_#t~ite30, P1Thread1of1ForFork0_#t~ite51, P1Thread1of1ForFork0_#t~mem16, ~__unbuffered_p1_EAX$read_delayed~0, P1Thread1of1ForFork0_#t~ite46, P1Thread1of1ForFork0_#t~ite25, ~x$mem_tmp~0, P1Thread1of1ForFork0_#t~ite23, P1Thread1of1ForFork0_#t~ite44, P1Thread1of1ForFork0_#t~ite29, P1Thread1of1ForFork0_#t~ite27, P1Thread1of1ForFork0_#t~ite48, P1Thread1of1ForFork0_#t~nondet13, P1Thread1of1ForFork0_#t~nondet15, P1Thread1of1ForFork0_#t~ite42, P1Thread1of1ForFork0_#t~ite40, P1Thread1of1ForFork0_#t~mem59, P1Thread1of1ForFork0_#t~ite35, ~__unbuffered_p1_EAX$read_delayed_var~0.offset, P1Thread1of1ForFork0_#t~ite33, P1Thread1of1ForFork0_#t~ite56, P1Thread1of1ForFork0_#t~ite39, ~x$r_buff0_thd2~0, P1Thread1of1ForFork0_#t~ite37, P1Thread1of1ForFork0_#t~ite18, ~x$w_buff0_used~0, P1Thread1of1ForFork0_#t~ite50, P1Thread1of1ForFork0_#t~ite54, P1Thread1of1ForFork0_#t~ite31, P1Thread1of1ForFork0_#t~ite52, #memory_int, P1Thread1of1ForFork0_#t~mem17, ~weak$$choice2~0] and [1209] L2-1-->L839: Formula: (let ((.cse15 (= (mod v_~x$w_buff0_used~0_437 256) 0)) (.cse14 (= (mod v_~x$r_buff0_thd0~0_66 256) 0)) (.cse13 (= (mod v_~x$w_buff0_used~0_436 256) 0)) (.cse12 (= (mod v_~x$r_buff1_thd0~0_46 256) 0)) (.cse16 (= (mod v_~x$w_buff1_used~0_348 256) 0))) (let ((.cse0 (select |v_#memory_int_255| |v_~#x~0.base_166|)) (.cse4 (or .cse12 .cse16)) (.cse6 (not .cse16)) (.cse5 (not .cse12)) (.cse8 (or .cse14 .cse13)) (.cse9 (not .cse13)) (.cse7 (or .cse14 .cse15)) (.cse1 (not .cse15)) (.cse3 (not .cse14))) (and (= (store |v_#memory_int_255| |v_~#x~0.base_166| (store .cse0 |v_~#x~0.offset_166| |v_ULTIMATE.start_main_#t~ite72_46|)) |v_#memory_int_254|) (let ((.cse2 (= |v_ULTIMATE.start_main_#t~mem70_43| |v_ULTIMATE.start_main_#t~mem70_38|))) (or (and .cse1 .cse2 (= |v_ULTIMATE.start_main_#t~ite71_36| |v_ULTIMATE.start_main_#t~ite71_31|) (= v_~x$w_buff0~0_126 |v_ULTIMATE.start_main_#t~ite72_46|) .cse3) (and (or (and (= |v_ULTIMATE.start_main_#t~mem70_43| |v_ULTIMATE.start_main_#t~ite71_36|) (= |v_ULTIMATE.start_main_#t~mem70_43| (select .cse0 |v_~#x~0.offset_166|)) .cse4) (and (= |v_ULTIMATE.start_main_#t~ite71_36| v_~x$w_buff1~0_111) .cse2 .cse5 .cse6)) .cse7 (= |v_ULTIMATE.start_main_#t~ite71_36| |v_ULTIMATE.start_main_#t~ite72_46|)))) (or (and (= v_~x$w_buff1_used~0_348 v_~x$w_buff1_used~0_347) .cse4 .cse8) (and (or (and .cse5 .cse6) (and .cse9 .cse3)) (= v_~x$w_buff1_used~0_347 0))) (let ((.cse10 (= (mod v_~x$w_buff1_used~0_347 256) 0)) (.cse11 (= (mod v_~x$r_buff0_thd0~0_65 256) 0))) (or (and (= v_~x$r_buff1_thd0~0_45 0) (or (and (not .cse10) .cse5) (and (not .cse11) .cse9))) (and (or .cse10 .cse12) (= v_~x$r_buff1_thd0~0_45 v_~x$r_buff1_thd0~0_46) (or .cse13 .cse11)))) (or (and (= v_~x$r_buff0_thd0~0_66 v_~x$r_buff0_thd0~0_65) .cse8) (and (= v_~x$r_buff0_thd0~0_65 0) .cse9 .cse3)) (or (and (= v_~x$w_buff0_used~0_437 v_~x$w_buff0_used~0_436) .cse7) (and .cse1 (= v_~x$w_buff0_used~0_436 0) .cse3))))) InVars {~x$w_buff0~0=v_~x$w_buff0~0_126, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_66, ULTIMATE.start_main_#t~ite71=|v_ULTIMATE.start_main_#t~ite71_31|, ~#x~0.offset=|v_~#x~0.offset_166|, ~x$w_buff1~0=v_~x$w_buff1~0_111, #memory_int=|v_#memory_int_255|, ~#x~0.base=|v_~#x~0.base_166|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_348, ULTIMATE.start_main_#t~mem70=|v_ULTIMATE.start_main_#t~mem70_38|, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_46, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_437} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_126, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_65, ~#x~0.offset=|v_~#x~0.offset_166|, ~x$w_buff1~0=v_~x$w_buff1~0_111, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_347, ULTIMATE.start_main_#t~mem70=|v_ULTIMATE.start_main_#t~mem70_37|, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_45, ULTIMATE.start_main_#t~ite75=|v_ULTIMATE.start_main_#t~ite75_24|, ULTIMATE.start_main_#t~ite76=|v_ULTIMATE.start_main_#t~ite76_18|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_436, ULTIMATE.start_main_#t~ite73=|v_ULTIMATE.start_main_#t~ite73_26|, ULTIMATE.start_main_#t~ite74=|v_ULTIMATE.start_main_#t~ite74_26|, ULTIMATE.start_main_#t~ite71=|v_ULTIMATE.start_main_#t~ite71_30|, ULTIMATE.start_main_#t~ite72=|v_ULTIMATE.start_main_#t~ite72_42|, #memory_int=|v_#memory_int_254|, ~#x~0.base=|v_~#x~0.base_166|} AuxVars[|v_ULTIMATE.start_main_#t~ite72_46|, |v_ULTIMATE.start_main_#t~ite71_36|, |v_ULTIMATE.start_main_#t~mem70_43|] AssignedVars[ULTIMATE.start_main_#t~ite73, ~x$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite74, ULTIMATE.start_main_#t~ite71, ULTIMATE.start_main_#t~ite72, #memory_int, ~x$w_buff1_used~0, ULTIMATE.start_main_#t~mem70, ~x$r_buff1_thd0~0, ULTIMATE.start_main_#t~ite75, ULTIMATE.start_main_#t~ite76, ~x$w_buff0_used~0] under condition 19106#(and (= (select |#valid| |~#x~0.base|) 1) (= 0 ~x$r_buff0_thd0~0) (= ~x$r_buff1_thd0~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0)) [2021-01-27 02:43:29,872 WARN L146 IndependenceRelation]: Expensive independence query (4107 ms) for statements [1216] L765-->L772: Formula: (let ((.cse10 (= (mod v_~x$w_buff0_used~0_444 256) 0)) (.cse14 (= 0 (mod v_~x$r_buff0_thd1~0_71 256))) (.cse15 (= (mod v_~x$w_buff0_used~0_445 256) 0)) (.cse16 (= (mod v_~x$w_buff1_used~0_356 256) 0)) (.cse13 (= (mod v_~x$r_buff1_thd1~0_52 256) 0))) (let ((.cse5 (or .cse16 .cse13)) (.cse6 (not .cse16)) (.cse4 (select |v_#memory_int_263| |v_~#x~0.base_170|)) (.cse3 (or .cse14 .cse15)) (.cse0 (not .cse15)) (.cse7 (not .cse13)) (.cse1 (not .cse14)) (.cse9 (not .cse10)) (.cse8 (or .cse14 .cse10))) (and (let ((.cse2 (= |v_P0_#t~mem5_52| |v_P0Thread1of1ForFork1_#t~mem5_1|))) (or (and (= |v_P0_#t~ite6_51| |v_P0Thread1of1ForFork1_#t~ite6_1|) .cse0 .cse1 .cse2 (= |v_P0_#t~ite7_39| v_~x$w_buff0~0_130)) (and (= |v_P0_#t~ite7_39| |v_P0_#t~ite6_51|) .cse3 (or (and (= |v_P0_#t~ite6_51| |v_P0_#t~mem5_52|) (= (select .cse4 |v_~#x~0.offset_170|) |v_P0_#t~mem5_52|) .cse5) (and .cse6 .cse2 .cse7 (= |v_P0_#t~ite6_51| v_~x$w_buff1~0_115)))))) (or (and .cse8 .cse5 (= v_~x$w_buff1_used~0_356 v_~x$w_buff1_used~0_355)) (and (= v_~x$w_buff1_used~0_355 0) (or (and .cse1 .cse9) (and .cse6 .cse7)))) (= (store |v_#memory_int_263| |v_~#x~0.base_170| (store .cse4 |v_~#x~0.offset_170| |v_P0_#t~ite7_39|)) |v_#memory_int_262|) (or (and (= v_~x$w_buff0_used~0_444 v_~x$w_buff0_used~0_445) .cse3) (and (= v_~x$w_buff0_used~0_444 0) .cse0 .cse1)) (let ((.cse11 (= (mod v_~x$r_buff0_thd1~0_70 256) 0)) (.cse12 (= (mod v_~x$w_buff1_used~0_355 256) 0))) (or (and (or .cse10 .cse11) (or .cse12 .cse13) (= v_~x$r_buff1_thd1~0_52 v_~x$r_buff1_thd1~0_51)) (and (or (and (not .cse11) .cse9) (and .cse7 (not .cse12))) (= v_~x$r_buff1_thd1~0_51 0)))) (or (and (= v_~x$r_buff0_thd1~0_70 0) .cse1 .cse9) (and .cse8 (= v_~x$r_buff0_thd1~0_71 v_~x$r_buff0_thd1~0_70)))))) InVars {~x$w_buff0~0=v_~x$w_buff0~0_130, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_71, ~#x~0.offset=|v_~#x~0.offset_170|, P0Thread1of1ForFork1_#t~ite6=|v_P0Thread1of1ForFork1_#t~ite6_1|, ~x$w_buff1~0=v_~x$w_buff1~0_115, #memory_int=|v_#memory_int_263|, ~#x~0.base=|v_~#x~0.base_170|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_356, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_52, P0Thread1of1ForFork1_#t~mem5=|v_P0Thread1of1ForFork1_#t~mem5_1|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_445} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_130, P0Thread1of1ForFork1_#t~ite10=|v_P0Thread1of1ForFork1_#t~ite10_1|, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_70, ~#x~0.offset=|v_~#x~0.offset_170|, ~x$w_buff1~0=v_~x$w_buff1~0_115, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_355, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_51, P0Thread1of1ForFork1_#t~mem5=|v_P0Thread1of1ForFork1_#t~mem5_2|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_444, P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_1|, P0Thread1of1ForFork1_#t~ite9=|v_P0Thread1of1ForFork1_#t~ite9_1|, P0Thread1of1ForFork1_#t~ite6=|v_P0Thread1of1ForFork1_#t~ite6_2|, P0Thread1of1ForFork1_#t~ite7=|v_P0Thread1of1ForFork1_#t~ite7_1|, #memory_int=|v_#memory_int_262|, ~#x~0.base=|v_~#x~0.base_170|, P0Thread1of1ForFork1_#t~ite11=|v_P0Thread1of1ForFork1_#t~ite11_1|} AuxVars[|v_P0_#t~mem5_52|, |v_P0_#t~ite7_39|, |v_P0_#t~ite6_51|] AssignedVars[P0Thread1of1ForFork1_#t~ite10, ~x$r_buff0_thd1~0, P0Thread1of1ForFork1_#t~ite8, P0Thread1of1ForFork1_#t~ite9, P0Thread1of1ForFork1_#t~ite6, P0Thread1of1ForFork1_#t~ite7, #memory_int, ~x$w_buff1_used~0, ~x$r_buff1_thd1~0, P0Thread1of1ForFork1_#t~mem5, ~x$w_buff0_used~0, P0Thread1of1ForFork1_#t~ite11] and [1209] L2-1-->L839: Formula: (let ((.cse15 (= (mod v_~x$w_buff0_used~0_437 256) 0)) (.cse14 (= (mod v_~x$r_buff0_thd0~0_66 256) 0)) (.cse13 (= (mod v_~x$w_buff0_used~0_436 256) 0)) (.cse12 (= (mod v_~x$r_buff1_thd0~0_46 256) 0)) (.cse16 (= (mod v_~x$w_buff1_used~0_348 256) 0))) (let ((.cse0 (select |v_#memory_int_255| |v_~#x~0.base_166|)) (.cse4 (or .cse12 .cse16)) (.cse6 (not .cse16)) (.cse5 (not .cse12)) (.cse8 (or .cse14 .cse13)) (.cse9 (not .cse13)) (.cse7 (or .cse14 .cse15)) (.cse1 (not .cse15)) (.cse3 (not .cse14))) (and (= (store |v_#memory_int_255| |v_~#x~0.base_166| (store .cse0 |v_~#x~0.offset_166| |v_ULTIMATE.start_main_#t~ite72_46|)) |v_#memory_int_254|) (let ((.cse2 (= |v_ULTIMATE.start_main_#t~mem70_43| |v_ULTIMATE.start_main_#t~mem70_38|))) (or (and .cse1 .cse2 (= |v_ULTIMATE.start_main_#t~ite71_36| |v_ULTIMATE.start_main_#t~ite71_31|) (= v_~x$w_buff0~0_126 |v_ULTIMATE.start_main_#t~ite72_46|) .cse3) (and (or (and (= |v_ULTIMATE.start_main_#t~mem70_43| |v_ULTIMATE.start_main_#t~ite71_36|) (= |v_ULTIMATE.start_main_#t~mem70_43| (select .cse0 |v_~#x~0.offset_166|)) .cse4) (and (= |v_ULTIMATE.start_main_#t~ite71_36| v_~x$w_buff1~0_111) .cse2 .cse5 .cse6)) .cse7 (= |v_ULTIMATE.start_main_#t~ite71_36| |v_ULTIMATE.start_main_#t~ite72_46|)))) (or (and (= v_~x$w_buff1_used~0_348 v_~x$w_buff1_used~0_347) .cse4 .cse8) (and (or (and .cse5 .cse6) (and .cse9 .cse3)) (= v_~x$w_buff1_used~0_347 0))) (let ((.cse10 (= (mod v_~x$w_buff1_used~0_347 256) 0)) (.cse11 (= (mod v_~x$r_buff0_thd0~0_65 256) 0))) (or (and (= v_~x$r_buff1_thd0~0_45 0) (or (and (not .cse10) .cse5) (and (not .cse11) .cse9))) (and (or .cse10 .cse12) (= v_~x$r_buff1_thd0~0_45 v_~x$r_buff1_thd0~0_46) (or .cse13 .cse11)))) (or (and (= v_~x$r_buff0_thd0~0_66 v_~x$r_buff0_thd0~0_65) .cse8) (and (= v_~x$r_buff0_thd0~0_65 0) .cse9 .cse3)) (or (and (= v_~x$w_buff0_used~0_437 v_~x$w_buff0_used~0_436) .cse7) (and .cse1 (= v_~x$w_buff0_used~0_436 0) .cse3))))) InVars {~x$w_buff0~0=v_~x$w_buff0~0_126, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_66, ULTIMATE.start_main_#t~ite71=|v_ULTIMATE.start_main_#t~ite71_31|, ~#x~0.offset=|v_~#x~0.offset_166|, ~x$w_buff1~0=v_~x$w_buff1~0_111, #memory_int=|v_#memory_int_255|, ~#x~0.base=|v_~#x~0.base_166|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_348, ULTIMATE.start_main_#t~mem70=|v_ULTIMATE.start_main_#t~mem70_38|, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_46, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_437} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_126, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_65, ~#x~0.offset=|v_~#x~0.offset_166|, ~x$w_buff1~0=v_~x$w_buff1~0_111, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_347, ULTIMATE.start_main_#t~mem70=|v_ULTIMATE.start_main_#t~mem70_37|, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_45, ULTIMATE.start_main_#t~ite75=|v_ULTIMATE.start_main_#t~ite75_24|, ULTIMATE.start_main_#t~ite76=|v_ULTIMATE.start_main_#t~ite76_18|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_436, ULTIMATE.start_main_#t~ite73=|v_ULTIMATE.start_main_#t~ite73_26|, ULTIMATE.start_main_#t~ite74=|v_ULTIMATE.start_main_#t~ite74_26|, ULTIMATE.start_main_#t~ite71=|v_ULTIMATE.start_main_#t~ite71_30|, ULTIMATE.start_main_#t~ite72=|v_ULTIMATE.start_main_#t~ite72_42|, #memory_int=|v_#memory_int_254|, ~#x~0.base=|v_~#x~0.base_166|} AuxVars[|v_ULTIMATE.start_main_#t~ite72_46|, |v_ULTIMATE.start_main_#t~ite71_36|, |v_ULTIMATE.start_main_#t~mem70_43|] AssignedVars[ULTIMATE.start_main_#t~ite73, ~x$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite74, ULTIMATE.start_main_#t~ite71, ULTIMATE.start_main_#t~ite72, #memory_int, ~x$w_buff1_used~0, ULTIMATE.start_main_#t~mem70, ~x$r_buff1_thd0~0, ULTIMATE.start_main_#t~ite75, ULTIMATE.start_main_#t~ite76, ~x$w_buff0_used~0] under condition 19103#(= (select |#valid| |~#x~0.base|) 1) [2021-01-27 02:43:30,381 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-27 02:43:34,548 WARN L146 IndependenceRelation]: Expensive independence query (4166 ms) for statements [1223] L801-->L808: Formula: (let ((.cse12 (= (mod v_~x$w_buff0_used~0_450 256) 0)) (.cse13 (= (mod v_~x$r_buff1_thd2~0_258 256) 0)) (.cse14 (= (mod v_~x$w_buff1_used~0_362 256) 0)) (.cse16 (= (mod v_~x$w_buff0_used~0_451 256) 0)) (.cse15 (= (mod v_~x$r_buff0_thd2~0_286 256) 0))) (let ((.cse4 (select |v_#memory_int_271| |v_~#x~0.base_174|)) (.cse5 (or .cse16 .cse15)) (.cse6 (not .cse16)) (.cse3 (or .cse13 .cse14)) (.cse8 (or .cse12 .cse15)) (.cse9 (not .cse12)) (.cse7 (not .cse15)) (.cse1 (not .cse14)) (.cse2 (not .cse13))) (and (let ((.cse0 (= |v_P1_#t~mem61_42| |v_P1Thread1of1ForFork0_#t~mem61_1|))) (or (and (= |v_P1_#t~ite62_35| |v_P1_#t~ite63_33|) (or (and .cse0 (= |v_P1_#t~ite62_35| v_~x$w_buff1~0_119) .cse1 .cse2) (and (= |v_P1_#t~ite62_35| |v_P1_#t~mem61_42|) .cse3 (= (select .cse4 |v_~#x~0.offset_174|) |v_P1_#t~mem61_42|))) .cse5) (and .cse0 .cse6 (= |v_P1_#t~ite63_33| v_~x$w_buff0~0_134) (= |v_P1_#t~ite62_35| |v_P1Thread1of1ForFork0_#t~ite62_1|) .cse7))) (= (store |v_#memory_int_271| |v_~#x~0.base_174| (store .cse4 |v_~#x~0.offset_174| |v_P1_#t~ite63_33|)) |v_#memory_int_270|) (or (and (= v_~x$r_buff0_thd2~0_286 v_~x$r_buff0_thd2~0_285) .cse8) (and (= v_~x$r_buff0_thd2~0_285 0) .cse9 .cse7)) (let ((.cse10 (= (mod v_~x$r_buff0_thd2~0_285 256) 0)) (.cse11 (= (mod v_~x$w_buff1_used~0_361 256) 0))) (or (and (= v_~x$r_buff1_thd2~0_257 0) (or (and .cse9 (not .cse10)) (and (not .cse11) .cse2))) (and (= v_~x$r_buff1_thd2~0_258 v_~x$r_buff1_thd2~0_257) (or .cse12 .cse10) (or .cse13 .cse11)))) (or (and (= v_~x$w_buff0_used~0_451 v_~x$w_buff0_used~0_450) .cse5) (and .cse6 (= v_~x$w_buff0_used~0_450 0) .cse7)) (or (and (= v_~x$w_buff1_used~0_362 v_~x$w_buff1_used~0_361) .cse3 .cse8) (and (= v_~x$w_buff1_used~0_361 0) (or (and .cse9 .cse7) (and .cse1 .cse2))))))) InVars {~x$w_buff0~0=v_~x$w_buff0~0_134, P1Thread1of1ForFork0_#t~ite62=|v_P1Thread1of1ForFork0_#t~ite62_1|, ~#x~0.offset=|v_~#x~0.offset_174|, ~x$w_buff1~0=v_~x$w_buff1~0_119, #memory_int=|v_#memory_int_271|, ~#x~0.base=|v_~#x~0.base_174|, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_258, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_362, P1Thread1of1ForFork0_#t~mem61=|v_P1Thread1of1ForFork0_#t~mem61_1|, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_286, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_451} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_134, ~#x~0.offset=|v_~#x~0.offset_174|, ~x$w_buff1~0=v_~x$w_buff1~0_119, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_257, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_361, P1Thread1of1ForFork0_#t~mem61=|v_P1Thread1of1ForFork0_#t~mem61_2|, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_285, P1Thread1of1ForFork0_#t~ite66=|v_P1Thread1of1ForFork0_#t~ite66_1|, P1Thread1of1ForFork0_#t~ite67=|v_P1Thread1of1ForFork0_#t~ite67_1|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_450, P1Thread1of1ForFork0_#t~ite62=|v_P1Thread1of1ForFork0_#t~ite62_2|, P1Thread1of1ForFork0_#t~ite63=|v_P1Thread1of1ForFork0_#t~ite63_1|, P1Thread1of1ForFork0_#t~ite64=|v_P1Thread1of1ForFork0_#t~ite64_1|, P1Thread1of1ForFork0_#t~ite65=|v_P1Thread1of1ForFork0_#t~ite65_1|, #memory_int=|v_#memory_int_270|, ~#x~0.base=|v_~#x~0.base_174|} AuxVars[|v_P1_#t~mem61_42|, |v_P1_#t~ite63_33|, |v_P1_#t~ite62_35|] AssignedVars[P1Thread1of1ForFork0_#t~ite62, P1Thread1of1ForFork0_#t~ite63, P1Thread1of1ForFork0_#t~ite64, P1Thread1of1ForFork0_#t~ite65, #memory_int, ~x$r_buff1_thd2~0, ~x$w_buff1_used~0, P1Thread1of1ForFork0_#t~mem61, ~x$r_buff0_thd2~0, P1Thread1of1ForFork0_#t~ite66, P1Thread1of1ForFork0_#t~ite67, ~x$w_buff0_used~0] and [1216] L765-->L772: Formula: (let ((.cse10 (= (mod v_~x$w_buff0_used~0_444 256) 0)) (.cse14 (= 0 (mod v_~x$r_buff0_thd1~0_71 256))) (.cse15 (= (mod v_~x$w_buff0_used~0_445 256) 0)) (.cse16 (= (mod v_~x$w_buff1_used~0_356 256) 0)) (.cse13 (= (mod v_~x$r_buff1_thd1~0_52 256) 0))) (let ((.cse5 (or .cse16 .cse13)) (.cse6 (not .cse16)) (.cse4 (select |v_#memory_int_263| |v_~#x~0.base_170|)) (.cse3 (or .cse14 .cse15)) (.cse0 (not .cse15)) (.cse7 (not .cse13)) (.cse1 (not .cse14)) (.cse9 (not .cse10)) (.cse8 (or .cse14 .cse10))) (and (let ((.cse2 (= |v_P0_#t~mem5_52| |v_P0Thread1of1ForFork1_#t~mem5_1|))) (or (and (= |v_P0_#t~ite6_51| |v_P0Thread1of1ForFork1_#t~ite6_1|) .cse0 .cse1 .cse2 (= |v_P0_#t~ite7_39| v_~x$w_buff0~0_130)) (and (= |v_P0_#t~ite7_39| |v_P0_#t~ite6_51|) .cse3 (or (and (= |v_P0_#t~ite6_51| |v_P0_#t~mem5_52|) (= (select .cse4 |v_~#x~0.offset_170|) |v_P0_#t~mem5_52|) .cse5) (and .cse6 .cse2 .cse7 (= |v_P0_#t~ite6_51| v_~x$w_buff1~0_115)))))) (or (and .cse8 .cse5 (= v_~x$w_buff1_used~0_356 v_~x$w_buff1_used~0_355)) (and (= v_~x$w_buff1_used~0_355 0) (or (and .cse1 .cse9) (and .cse6 .cse7)))) (= (store |v_#memory_int_263| |v_~#x~0.base_170| (store .cse4 |v_~#x~0.offset_170| |v_P0_#t~ite7_39|)) |v_#memory_int_262|) (or (and (= v_~x$w_buff0_used~0_444 v_~x$w_buff0_used~0_445) .cse3) (and (= v_~x$w_buff0_used~0_444 0) .cse0 .cse1)) (let ((.cse11 (= (mod v_~x$r_buff0_thd1~0_70 256) 0)) (.cse12 (= (mod v_~x$w_buff1_used~0_355 256) 0))) (or (and (or .cse10 .cse11) (or .cse12 .cse13) (= v_~x$r_buff1_thd1~0_52 v_~x$r_buff1_thd1~0_51)) (and (or (and (not .cse11) .cse9) (and .cse7 (not .cse12))) (= v_~x$r_buff1_thd1~0_51 0)))) (or (and (= v_~x$r_buff0_thd1~0_70 0) .cse1 .cse9) (and .cse8 (= v_~x$r_buff0_thd1~0_71 v_~x$r_buff0_thd1~0_70)))))) InVars {~x$w_buff0~0=v_~x$w_buff0~0_130, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_71, ~#x~0.offset=|v_~#x~0.offset_170|, P0Thread1of1ForFork1_#t~ite6=|v_P0Thread1of1ForFork1_#t~ite6_1|, ~x$w_buff1~0=v_~x$w_buff1~0_115, #memory_int=|v_#memory_int_263|, ~#x~0.base=|v_~#x~0.base_170|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_356, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_52, P0Thread1of1ForFork1_#t~mem5=|v_P0Thread1of1ForFork1_#t~mem5_1|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_445} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_130, P0Thread1of1ForFork1_#t~ite10=|v_P0Thread1of1ForFork1_#t~ite10_1|, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_70, ~#x~0.offset=|v_~#x~0.offset_170|, ~x$w_buff1~0=v_~x$w_buff1~0_115, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_355, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_51, P0Thread1of1ForFork1_#t~mem5=|v_P0Thread1of1ForFork1_#t~mem5_2|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_444, P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_1|, P0Thread1of1ForFork1_#t~ite9=|v_P0Thread1of1ForFork1_#t~ite9_1|, P0Thread1of1ForFork1_#t~ite6=|v_P0Thread1of1ForFork1_#t~ite6_2|, P0Thread1of1ForFork1_#t~ite7=|v_P0Thread1of1ForFork1_#t~ite7_1|, #memory_int=|v_#memory_int_262|, ~#x~0.base=|v_~#x~0.base_170|, P0Thread1of1ForFork1_#t~ite11=|v_P0Thread1of1ForFork1_#t~ite11_1|} AuxVars[|v_P0_#t~mem5_52|, |v_P0_#t~ite7_39|, |v_P0_#t~ite6_51|] AssignedVars[P0Thread1of1ForFork1_#t~ite10, ~x$r_buff0_thd1~0, P0Thread1of1ForFork1_#t~ite8, P0Thread1of1ForFork1_#t~ite9, P0Thread1of1ForFork1_#t~ite6, P0Thread1of1ForFork1_#t~ite7, #memory_int, ~x$w_buff1_used~0, ~x$r_buff1_thd1~0, P0Thread1of1ForFork1_#t~mem5, ~x$w_buff0_used~0, P0Thread1of1ForFork1_#t~ite11] under condition 23774#(and (= (select |#valid| |~#x~0.base|) 1) (= (select (select |#memory_int| ~__unbuffered_p1_EAX$read_delayed_var~0.base) ~__unbuffered_p1_EAX$read_delayed_var~0.offset) ~__unbuffered_p1_EAX~0) (= 0 ~x$r_buff0_thd0~0) (= ~__unbuffered_p1_EAX$read_delayed~0 1) (not (= ~__unbuffered_p1_EAX~0 1)) (= ~x$r_buff1_thd0~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0)) [2021-01-27 02:43:34,566 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-27 02:43:36,431 WARN L146 IndependenceRelation]: Expensive independence query (1864 ms) for statements [1223] L801-->L808: Formula: (let ((.cse12 (= (mod v_~x$w_buff0_used~0_450 256) 0)) (.cse13 (= (mod v_~x$r_buff1_thd2~0_258 256) 0)) (.cse14 (= (mod v_~x$w_buff1_used~0_362 256) 0)) (.cse16 (= (mod v_~x$w_buff0_used~0_451 256) 0)) (.cse15 (= (mod v_~x$r_buff0_thd2~0_286 256) 0))) (let ((.cse4 (select |v_#memory_int_271| |v_~#x~0.base_174|)) (.cse5 (or .cse16 .cse15)) (.cse6 (not .cse16)) (.cse3 (or .cse13 .cse14)) (.cse8 (or .cse12 .cse15)) (.cse9 (not .cse12)) (.cse7 (not .cse15)) (.cse1 (not .cse14)) (.cse2 (not .cse13))) (and (let ((.cse0 (= |v_P1_#t~mem61_42| |v_P1Thread1of1ForFork0_#t~mem61_1|))) (or (and (= |v_P1_#t~ite62_35| |v_P1_#t~ite63_33|) (or (and .cse0 (= |v_P1_#t~ite62_35| v_~x$w_buff1~0_119) .cse1 .cse2) (and (= |v_P1_#t~ite62_35| |v_P1_#t~mem61_42|) .cse3 (= (select .cse4 |v_~#x~0.offset_174|) |v_P1_#t~mem61_42|))) .cse5) (and .cse0 .cse6 (= |v_P1_#t~ite63_33| v_~x$w_buff0~0_134) (= |v_P1_#t~ite62_35| |v_P1Thread1of1ForFork0_#t~ite62_1|) .cse7))) (= (store |v_#memory_int_271| |v_~#x~0.base_174| (store .cse4 |v_~#x~0.offset_174| |v_P1_#t~ite63_33|)) |v_#memory_int_270|) (or (and (= v_~x$r_buff0_thd2~0_286 v_~x$r_buff0_thd2~0_285) .cse8) (and (= v_~x$r_buff0_thd2~0_285 0) .cse9 .cse7)) (let ((.cse10 (= (mod v_~x$r_buff0_thd2~0_285 256) 0)) (.cse11 (= (mod v_~x$w_buff1_used~0_361 256) 0))) (or (and (= v_~x$r_buff1_thd2~0_257 0) (or (and .cse9 (not .cse10)) (and (not .cse11) .cse2))) (and (= v_~x$r_buff1_thd2~0_258 v_~x$r_buff1_thd2~0_257) (or .cse12 .cse10) (or .cse13 .cse11)))) (or (and (= v_~x$w_buff0_used~0_451 v_~x$w_buff0_used~0_450) .cse5) (and .cse6 (= v_~x$w_buff0_used~0_450 0) .cse7)) (or (and (= v_~x$w_buff1_used~0_362 v_~x$w_buff1_used~0_361) .cse3 .cse8) (and (= v_~x$w_buff1_used~0_361 0) (or (and .cse9 .cse7) (and .cse1 .cse2))))))) InVars {~x$w_buff0~0=v_~x$w_buff0~0_134, P1Thread1of1ForFork0_#t~ite62=|v_P1Thread1of1ForFork0_#t~ite62_1|, ~#x~0.offset=|v_~#x~0.offset_174|, ~x$w_buff1~0=v_~x$w_buff1~0_119, #memory_int=|v_#memory_int_271|, ~#x~0.base=|v_~#x~0.base_174|, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_258, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_362, P1Thread1of1ForFork0_#t~mem61=|v_P1Thread1of1ForFork0_#t~mem61_1|, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_286, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_451} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_134, ~#x~0.offset=|v_~#x~0.offset_174|, ~x$w_buff1~0=v_~x$w_buff1~0_119, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_257, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_361, P1Thread1of1ForFork0_#t~mem61=|v_P1Thread1of1ForFork0_#t~mem61_2|, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_285, P1Thread1of1ForFork0_#t~ite66=|v_P1Thread1of1ForFork0_#t~ite66_1|, P1Thread1of1ForFork0_#t~ite67=|v_P1Thread1of1ForFork0_#t~ite67_1|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_450, P1Thread1of1ForFork0_#t~ite62=|v_P1Thread1of1ForFork0_#t~ite62_2|, P1Thread1of1ForFork0_#t~ite63=|v_P1Thread1of1ForFork0_#t~ite63_1|, P1Thread1of1ForFork0_#t~ite64=|v_P1Thread1of1ForFork0_#t~ite64_1|, P1Thread1of1ForFork0_#t~ite65=|v_P1Thread1of1ForFork0_#t~ite65_1|, #memory_int=|v_#memory_int_270|, ~#x~0.base=|v_~#x~0.base_174|} AuxVars[|v_P1_#t~mem61_42|, |v_P1_#t~ite63_33|, |v_P1_#t~ite62_35|] AssignedVars[P1Thread1of1ForFork0_#t~ite62, P1Thread1of1ForFork0_#t~ite63, P1Thread1of1ForFork0_#t~ite64, P1Thread1of1ForFork0_#t~ite65, #memory_int, ~x$r_buff1_thd2~0, ~x$w_buff1_used~0, P1Thread1of1ForFork0_#t~mem61, ~x$r_buff0_thd2~0, P1Thread1of1ForFork0_#t~ite66, P1Thread1of1ForFork0_#t~ite67, ~x$w_buff0_used~0] and [1215] L754-->L765: Formula: (and (= |v_P0Thread1of1ForFork1_reach_error_#t~nondet2.base_3| |v_P0Thread1of1ForFork1_reach_error_#t~nondet2.base_4|) (= v_~x$w_buff0_used~0_Out_3 1) (= (ite (not (and (not (= (mod v_~x$w_buff0_used~0_Out_3 256) 0)) (not (= (mod v_~x$w_buff1_used~0_Out_3 256) 0)))) 1 0) |v_P0Thread1of1ForFork1___VERIFIER_assert_#in~expression_3|) (= v_~x$r_buff0_thd1~0_Out_1 1) (= v_~x$r_buff1_thd2~0_Out_1 v_~x$r_buff0_thd2~0_In_79) (= |v_P0Thread1of1ForFork1_reach_error_#t~nondet2.offset_3| |v_P0Thread1of1ForFork1_reach_error_#t~nondet2.offset_4|) (not (= v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_3 0)) (= v_~x$r_buff1_thd1~0_Out_1 v_~x$r_buff0_thd1~0_In_11) (= v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_3 |v_P0Thread1of1ForFork1___VERIFIER_assert_#in~expression_3|) (= v_~x$w_buff1~0_Out_3 v_~x$w_buff0~0_In_33) (= v_~x$r_buff1_thd0~0_Out_1 v_~x$r_buff0_thd0~0_In_11) (= v_~x$w_buff0~0_Out_3 1) (= v_~x$w_buff1_used~0_Out_3 v_~x$w_buff0_used~0_In_99)) InVars {~x$w_buff0~0=v_~x$w_buff0~0_In_33, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_In_11, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_In_11, P0Thread1of1ForFork1_reach_error_#t~nondet2.offset=|v_P0Thread1of1ForFork1_reach_error_#t~nondet2.offset_3|, P0Thread1of1ForFork1_reach_error_#t~nondet2.base=|v_P0Thread1of1ForFork1_reach_error_#t~nondet2.base_3|, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_In_79, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_In_99} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_Out_3, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_In_11, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_Out_1, ~x$w_buff1~0=v_~x$w_buff1~0_Out_3, P0Thread1of1ForFork1_reach_error_#t~nondet2.base=|v_P0Thread1of1ForFork1_reach_error_#t~nondet2.base_4|, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_Out_1, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_Out_3, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_Out_1, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_In_79, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_Out_1, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_Out_3, P0Thread1of1ForFork1_reach_error_#t~nondet2.offset=|v_P0Thread1of1ForFork1_reach_error_#t~nondet2.offset_4|, P0Thread1of1ForFork1___VERIFIER_assert_~expression=v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_3, P0Thread1of1ForFork1___VERIFIER_assert_#in~expression=|v_P0Thread1of1ForFork1___VERIFIER_assert_#in~expression_3|} AuxVars[] AssignedVars[~x$w_buff0~0, ~x$r_buff0_thd1~0, P0Thread1of1ForFork1_reach_error_#t~nondet2.offset, ~x$w_buff1~0, P0Thread1of1ForFork1_reach_error_#t~nondet2.base, ~x$r_buff1_thd2~0, ~x$w_buff1_used~0, P0Thread1of1ForFork1___VERIFIER_assert_~expression, ~x$r_buff1_thd1~0, ~x$r_buff1_thd0~0, P0Thread1of1ForFork1___VERIFIER_assert_#in~expression, ~x$w_buff0_used~0] under condition 23767#(and (= (select |#valid| |~#x~0.base|) 1) (= (select (select |#memory_int| ~__unbuffered_p1_EAX$read_delayed_var~0.base) ~__unbuffered_p1_EAX$read_delayed_var~0.offset) ~__unbuffered_p1_EAX~0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (not (= |~#x~0.base| |ULTIMATE.start_main_~#t2667~0.base|)) (= ~__unbuffered_p1_EAX$read_delayed~0 1) (not (= ~__unbuffered_p1_EAX~0 1)) (= ~x$r_buff1_thd0~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0) (= 0 ~x$w_buff0~0) (not (= |~#x~0.base| |ULTIMATE.start_main_~#t2668~0.base|))) [2021-01-27 02:43:36,458 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-27 02:43:37,026 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-27 02:43:37,496 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-27 02:43:39,219 WARN L146 IndependenceRelation]: Expensive independence query (1687 ms) for statements [1223] L801-->L808: Formula: (let ((.cse12 (= (mod v_~x$w_buff0_used~0_450 256) 0)) (.cse13 (= (mod v_~x$r_buff1_thd2~0_258 256) 0)) (.cse14 (= (mod v_~x$w_buff1_used~0_362 256) 0)) (.cse16 (= (mod v_~x$w_buff0_used~0_451 256) 0)) (.cse15 (= (mod v_~x$r_buff0_thd2~0_286 256) 0))) (let ((.cse4 (select |v_#memory_int_271| |v_~#x~0.base_174|)) (.cse5 (or .cse16 .cse15)) (.cse6 (not .cse16)) (.cse3 (or .cse13 .cse14)) (.cse8 (or .cse12 .cse15)) (.cse9 (not .cse12)) (.cse7 (not .cse15)) (.cse1 (not .cse14)) (.cse2 (not .cse13))) (and (let ((.cse0 (= |v_P1_#t~mem61_42| |v_P1Thread1of1ForFork0_#t~mem61_1|))) (or (and (= |v_P1_#t~ite62_35| |v_P1_#t~ite63_33|) (or (and .cse0 (= |v_P1_#t~ite62_35| v_~x$w_buff1~0_119) .cse1 .cse2) (and (= |v_P1_#t~ite62_35| |v_P1_#t~mem61_42|) .cse3 (= (select .cse4 |v_~#x~0.offset_174|) |v_P1_#t~mem61_42|))) .cse5) (and .cse0 .cse6 (= |v_P1_#t~ite63_33| v_~x$w_buff0~0_134) (= |v_P1_#t~ite62_35| |v_P1Thread1of1ForFork0_#t~ite62_1|) .cse7))) (= (store |v_#memory_int_271| |v_~#x~0.base_174| (store .cse4 |v_~#x~0.offset_174| |v_P1_#t~ite63_33|)) |v_#memory_int_270|) (or (and (= v_~x$r_buff0_thd2~0_286 v_~x$r_buff0_thd2~0_285) .cse8) (and (= v_~x$r_buff0_thd2~0_285 0) .cse9 .cse7)) (let ((.cse10 (= (mod v_~x$r_buff0_thd2~0_285 256) 0)) (.cse11 (= (mod v_~x$w_buff1_used~0_361 256) 0))) (or (and (= v_~x$r_buff1_thd2~0_257 0) (or (and .cse9 (not .cse10)) (and (not .cse11) .cse2))) (and (= v_~x$r_buff1_thd2~0_258 v_~x$r_buff1_thd2~0_257) (or .cse12 .cse10) (or .cse13 .cse11)))) (or (and (= v_~x$w_buff0_used~0_451 v_~x$w_buff0_used~0_450) .cse5) (and .cse6 (= v_~x$w_buff0_used~0_450 0) .cse7)) (or (and (= v_~x$w_buff1_used~0_362 v_~x$w_buff1_used~0_361) .cse3 .cse8) (and (= v_~x$w_buff1_used~0_361 0) (or (and .cse9 .cse7) (and .cse1 .cse2))))))) InVars {~x$w_buff0~0=v_~x$w_buff0~0_134, P1Thread1of1ForFork0_#t~ite62=|v_P1Thread1of1ForFork0_#t~ite62_1|, ~#x~0.offset=|v_~#x~0.offset_174|, ~x$w_buff1~0=v_~x$w_buff1~0_119, #memory_int=|v_#memory_int_271|, ~#x~0.base=|v_~#x~0.base_174|, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_258, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_362, P1Thread1of1ForFork0_#t~mem61=|v_P1Thread1of1ForFork0_#t~mem61_1|, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_286, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_451} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_134, ~#x~0.offset=|v_~#x~0.offset_174|, ~x$w_buff1~0=v_~x$w_buff1~0_119, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_257, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_361, P1Thread1of1ForFork0_#t~mem61=|v_P1Thread1of1ForFork0_#t~mem61_2|, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_285, P1Thread1of1ForFork0_#t~ite66=|v_P1Thread1of1ForFork0_#t~ite66_1|, P1Thread1of1ForFork0_#t~ite67=|v_P1Thread1of1ForFork0_#t~ite67_1|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_450, P1Thread1of1ForFork0_#t~ite62=|v_P1Thread1of1ForFork0_#t~ite62_2|, P1Thread1of1ForFork0_#t~ite63=|v_P1Thread1of1ForFork0_#t~ite63_1|, P1Thread1of1ForFork0_#t~ite64=|v_P1Thread1of1ForFork0_#t~ite64_1|, P1Thread1of1ForFork0_#t~ite65=|v_P1Thread1of1ForFork0_#t~ite65_1|, #memory_int=|v_#memory_int_270|, ~#x~0.base=|v_~#x~0.base_174|} AuxVars[|v_P1_#t~mem61_42|, |v_P1_#t~ite63_33|, |v_P1_#t~ite62_35|] AssignedVars[P1Thread1of1ForFork0_#t~ite62, P1Thread1of1ForFork0_#t~ite63, P1Thread1of1ForFork0_#t~ite64, P1Thread1of1ForFork0_#t~ite65, #memory_int, ~x$r_buff1_thd2~0, ~x$w_buff1_used~0, P1Thread1of1ForFork0_#t~mem61, ~x$r_buff0_thd2~0, P1Thread1of1ForFork0_#t~ite66, P1Thread1of1ForFork0_#t~ite67, ~x$w_buff0_used~0] and [1215] L754-->L765: Formula: (and (= |v_P0Thread1of1ForFork1_reach_error_#t~nondet2.base_3| |v_P0Thread1of1ForFork1_reach_error_#t~nondet2.base_4|) (= v_~x$w_buff0_used~0_Out_3 1) (= (ite (not (and (not (= (mod v_~x$w_buff0_used~0_Out_3 256) 0)) (not (= (mod v_~x$w_buff1_used~0_Out_3 256) 0)))) 1 0) |v_P0Thread1of1ForFork1___VERIFIER_assert_#in~expression_3|) (= v_~x$r_buff0_thd1~0_Out_1 1) (= v_~x$r_buff1_thd2~0_Out_1 v_~x$r_buff0_thd2~0_In_79) (= |v_P0Thread1of1ForFork1_reach_error_#t~nondet2.offset_3| |v_P0Thread1of1ForFork1_reach_error_#t~nondet2.offset_4|) (not (= v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_3 0)) (= v_~x$r_buff1_thd1~0_Out_1 v_~x$r_buff0_thd1~0_In_11) (= v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_3 |v_P0Thread1of1ForFork1___VERIFIER_assert_#in~expression_3|) (= v_~x$w_buff1~0_Out_3 v_~x$w_buff0~0_In_33) (= v_~x$r_buff1_thd0~0_Out_1 v_~x$r_buff0_thd0~0_In_11) (= v_~x$w_buff0~0_Out_3 1) (= v_~x$w_buff1_used~0_Out_3 v_~x$w_buff0_used~0_In_99)) InVars {~x$w_buff0~0=v_~x$w_buff0~0_In_33, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_In_11, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_In_11, P0Thread1of1ForFork1_reach_error_#t~nondet2.offset=|v_P0Thread1of1ForFork1_reach_error_#t~nondet2.offset_3|, P0Thread1of1ForFork1_reach_error_#t~nondet2.base=|v_P0Thread1of1ForFork1_reach_error_#t~nondet2.base_3|, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_In_79, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_In_99} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_Out_3, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_In_11, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_Out_1, ~x$w_buff1~0=v_~x$w_buff1~0_Out_3, P0Thread1of1ForFork1_reach_error_#t~nondet2.base=|v_P0Thread1of1ForFork1_reach_error_#t~nondet2.base_4|, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_Out_1, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_Out_3, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_Out_1, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_In_79, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_Out_1, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_Out_3, P0Thread1of1ForFork1_reach_error_#t~nondet2.offset=|v_P0Thread1of1ForFork1_reach_error_#t~nondet2.offset_4|, P0Thread1of1ForFork1___VERIFIER_assert_~expression=v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_3, P0Thread1of1ForFork1___VERIFIER_assert_#in~expression=|v_P0Thread1of1ForFork1___VERIFIER_assert_#in~expression_3|} AuxVars[] AssignedVars[~x$w_buff0~0, ~x$r_buff0_thd1~0, P0Thread1of1ForFork1_reach_error_#t~nondet2.offset, ~x$w_buff1~0, P0Thread1of1ForFork1_reach_error_#t~nondet2.base, ~x$r_buff1_thd2~0, ~x$w_buff1_used~0, P0Thread1of1ForFork1___VERIFIER_assert_~expression, ~x$r_buff1_thd1~0, ~x$r_buff1_thd0~0, P0Thread1of1ForFork1___VERIFIER_assert_#in~expression, ~x$w_buff0_used~0] under condition 24394#(and (= (select |#valid| |~#x~0.base|) 1) (= (select (select |#memory_int| ~__unbuffered_p1_EAX$read_delayed_var~0.base) ~__unbuffered_p1_EAX$read_delayed_var~0.offset) ~__unbuffered_p1_EAX~0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 1) (not (= ~__unbuffered_p1_EAX~0 1)) (= ~x$r_buff1_thd0~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0) (= 0 ~x$w_buff0~0) (not (= |~#x~0.base| |ULTIMATE.start_main_~#t2668~0.base|))) [2021-01-27 02:43:39,307 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-27 02:43:39,960 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-27 02:43:40,212 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-27 02:43:40,423 WARN L193 SmtUtils]: Spent 142.00 ms on a formula simplification that was a NOOP. DAG size: 49 [2021-01-27 02:43:40,439 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-27 02:43:40,572 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-27 02:43:40,708 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-27 02:43:44,820 WARN L146 IndependenceRelation]: Expensive independence query (4111 ms) for statements [1223] L801-->L808: Formula: (let ((.cse12 (= (mod v_~x$w_buff0_used~0_450 256) 0)) (.cse13 (= (mod v_~x$r_buff1_thd2~0_258 256) 0)) (.cse14 (= (mod v_~x$w_buff1_used~0_362 256) 0)) (.cse16 (= (mod v_~x$w_buff0_used~0_451 256) 0)) (.cse15 (= (mod v_~x$r_buff0_thd2~0_286 256) 0))) (let ((.cse4 (select |v_#memory_int_271| |v_~#x~0.base_174|)) (.cse5 (or .cse16 .cse15)) (.cse6 (not .cse16)) (.cse3 (or .cse13 .cse14)) (.cse8 (or .cse12 .cse15)) (.cse9 (not .cse12)) (.cse7 (not .cse15)) (.cse1 (not .cse14)) (.cse2 (not .cse13))) (and (let ((.cse0 (= |v_P1_#t~mem61_42| |v_P1Thread1of1ForFork0_#t~mem61_1|))) (or (and (= |v_P1_#t~ite62_35| |v_P1_#t~ite63_33|) (or (and .cse0 (= |v_P1_#t~ite62_35| v_~x$w_buff1~0_119) .cse1 .cse2) (and (= |v_P1_#t~ite62_35| |v_P1_#t~mem61_42|) .cse3 (= (select .cse4 |v_~#x~0.offset_174|) |v_P1_#t~mem61_42|))) .cse5) (and .cse0 .cse6 (= |v_P1_#t~ite63_33| v_~x$w_buff0~0_134) (= |v_P1_#t~ite62_35| |v_P1Thread1of1ForFork0_#t~ite62_1|) .cse7))) (= (store |v_#memory_int_271| |v_~#x~0.base_174| (store .cse4 |v_~#x~0.offset_174| |v_P1_#t~ite63_33|)) |v_#memory_int_270|) (or (and (= v_~x$r_buff0_thd2~0_286 v_~x$r_buff0_thd2~0_285) .cse8) (and (= v_~x$r_buff0_thd2~0_285 0) .cse9 .cse7)) (let ((.cse10 (= (mod v_~x$r_buff0_thd2~0_285 256) 0)) (.cse11 (= (mod v_~x$w_buff1_used~0_361 256) 0))) (or (and (= v_~x$r_buff1_thd2~0_257 0) (or (and .cse9 (not .cse10)) (and (not .cse11) .cse2))) (and (= v_~x$r_buff1_thd2~0_258 v_~x$r_buff1_thd2~0_257) (or .cse12 .cse10) (or .cse13 .cse11)))) (or (and (= v_~x$w_buff0_used~0_451 v_~x$w_buff0_used~0_450) .cse5) (and .cse6 (= v_~x$w_buff0_used~0_450 0) .cse7)) (or (and (= v_~x$w_buff1_used~0_362 v_~x$w_buff1_used~0_361) .cse3 .cse8) (and (= v_~x$w_buff1_used~0_361 0) (or (and .cse9 .cse7) (and .cse1 .cse2))))))) InVars {~x$w_buff0~0=v_~x$w_buff0~0_134, P1Thread1of1ForFork0_#t~ite62=|v_P1Thread1of1ForFork0_#t~ite62_1|, ~#x~0.offset=|v_~#x~0.offset_174|, ~x$w_buff1~0=v_~x$w_buff1~0_119, #memory_int=|v_#memory_int_271|, ~#x~0.base=|v_~#x~0.base_174|, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_258, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_362, P1Thread1of1ForFork0_#t~mem61=|v_P1Thread1of1ForFork0_#t~mem61_1|, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_286, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_451} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_134, ~#x~0.offset=|v_~#x~0.offset_174|, ~x$w_buff1~0=v_~x$w_buff1~0_119, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_257, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_361, P1Thread1of1ForFork0_#t~mem61=|v_P1Thread1of1ForFork0_#t~mem61_2|, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_285, P1Thread1of1ForFork0_#t~ite66=|v_P1Thread1of1ForFork0_#t~ite66_1|, P1Thread1of1ForFork0_#t~ite67=|v_P1Thread1of1ForFork0_#t~ite67_1|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_450, P1Thread1of1ForFork0_#t~ite62=|v_P1Thread1of1ForFork0_#t~ite62_2|, P1Thread1of1ForFork0_#t~ite63=|v_P1Thread1of1ForFork0_#t~ite63_1|, P1Thread1of1ForFork0_#t~ite64=|v_P1Thread1of1ForFork0_#t~ite64_1|, P1Thread1of1ForFork0_#t~ite65=|v_P1Thread1of1ForFork0_#t~ite65_1|, #memory_int=|v_#memory_int_270|, ~#x~0.base=|v_~#x~0.base_174|} AuxVars[|v_P1_#t~mem61_42|, |v_P1_#t~ite63_33|, |v_P1_#t~ite62_35|] AssignedVars[P1Thread1of1ForFork0_#t~ite62, P1Thread1of1ForFork0_#t~ite63, P1Thread1of1ForFork0_#t~ite64, P1Thread1of1ForFork0_#t~ite65, #memory_int, ~x$r_buff1_thd2~0, ~x$w_buff1_used~0, P1Thread1of1ForFork0_#t~mem61, ~x$r_buff0_thd2~0, P1Thread1of1ForFork0_#t~ite66, P1Thread1of1ForFork0_#t~ite67, ~x$w_buff0_used~0] and [1216] L765-->L772: Formula: (let ((.cse10 (= (mod v_~x$w_buff0_used~0_444 256) 0)) (.cse14 (= 0 (mod v_~x$r_buff0_thd1~0_71 256))) (.cse15 (= (mod v_~x$w_buff0_used~0_445 256) 0)) (.cse16 (= (mod v_~x$w_buff1_used~0_356 256) 0)) (.cse13 (= (mod v_~x$r_buff1_thd1~0_52 256) 0))) (let ((.cse5 (or .cse16 .cse13)) (.cse6 (not .cse16)) (.cse4 (select |v_#memory_int_263| |v_~#x~0.base_170|)) (.cse3 (or .cse14 .cse15)) (.cse0 (not .cse15)) (.cse7 (not .cse13)) (.cse1 (not .cse14)) (.cse9 (not .cse10)) (.cse8 (or .cse14 .cse10))) (and (let ((.cse2 (= |v_P0_#t~mem5_52| |v_P0Thread1of1ForFork1_#t~mem5_1|))) (or (and (= |v_P0_#t~ite6_51| |v_P0Thread1of1ForFork1_#t~ite6_1|) .cse0 .cse1 .cse2 (= |v_P0_#t~ite7_39| v_~x$w_buff0~0_130)) (and (= |v_P0_#t~ite7_39| |v_P0_#t~ite6_51|) .cse3 (or (and (= |v_P0_#t~ite6_51| |v_P0_#t~mem5_52|) (= (select .cse4 |v_~#x~0.offset_170|) |v_P0_#t~mem5_52|) .cse5) (and .cse6 .cse2 .cse7 (= |v_P0_#t~ite6_51| v_~x$w_buff1~0_115)))))) (or (and .cse8 .cse5 (= v_~x$w_buff1_used~0_356 v_~x$w_buff1_used~0_355)) (and (= v_~x$w_buff1_used~0_355 0) (or (and .cse1 .cse9) (and .cse6 .cse7)))) (= (store |v_#memory_int_263| |v_~#x~0.base_170| (store .cse4 |v_~#x~0.offset_170| |v_P0_#t~ite7_39|)) |v_#memory_int_262|) (or (and (= v_~x$w_buff0_used~0_444 v_~x$w_buff0_used~0_445) .cse3) (and (= v_~x$w_buff0_used~0_444 0) .cse0 .cse1)) (let ((.cse11 (= (mod v_~x$r_buff0_thd1~0_70 256) 0)) (.cse12 (= (mod v_~x$w_buff1_used~0_355 256) 0))) (or (and (or .cse10 .cse11) (or .cse12 .cse13) (= v_~x$r_buff1_thd1~0_52 v_~x$r_buff1_thd1~0_51)) (and (or (and (not .cse11) .cse9) (and .cse7 (not .cse12))) (= v_~x$r_buff1_thd1~0_51 0)))) (or (and (= v_~x$r_buff0_thd1~0_70 0) .cse1 .cse9) (and .cse8 (= v_~x$r_buff0_thd1~0_71 v_~x$r_buff0_thd1~0_70)))))) InVars {~x$w_buff0~0=v_~x$w_buff0~0_130, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_71, ~#x~0.offset=|v_~#x~0.offset_170|, P0Thread1of1ForFork1_#t~ite6=|v_P0Thread1of1ForFork1_#t~ite6_1|, ~x$w_buff1~0=v_~x$w_buff1~0_115, #memory_int=|v_#memory_int_263|, ~#x~0.base=|v_~#x~0.base_170|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_356, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_52, P0Thread1of1ForFork1_#t~mem5=|v_P0Thread1of1ForFork1_#t~mem5_1|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_445} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_130, P0Thread1of1ForFork1_#t~ite10=|v_P0Thread1of1ForFork1_#t~ite10_1|, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_70, ~#x~0.offset=|v_~#x~0.offset_170|, ~x$w_buff1~0=v_~x$w_buff1~0_115, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_355, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_51, P0Thread1of1ForFork1_#t~mem5=|v_P0Thread1of1ForFork1_#t~mem5_2|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_444, P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_1|, P0Thread1of1ForFork1_#t~ite9=|v_P0Thread1of1ForFork1_#t~ite9_1|, P0Thread1of1ForFork1_#t~ite6=|v_P0Thread1of1ForFork1_#t~ite6_2|, P0Thread1of1ForFork1_#t~ite7=|v_P0Thread1of1ForFork1_#t~ite7_1|, #memory_int=|v_#memory_int_262|, ~#x~0.base=|v_~#x~0.base_170|, P0Thread1of1ForFork1_#t~ite11=|v_P0Thread1of1ForFork1_#t~ite11_1|} AuxVars[|v_P0_#t~mem5_52|, |v_P0_#t~ite7_39|, |v_P0_#t~ite6_51|] AssignedVars[P0Thread1of1ForFork1_#t~ite10, ~x$r_buff0_thd1~0, P0Thread1of1ForFork1_#t~ite8, P0Thread1of1ForFork1_#t~ite9, P0Thread1of1ForFork1_#t~ite6, P0Thread1of1ForFork1_#t~ite7, #memory_int, ~x$w_buff1_used~0, ~x$r_buff1_thd1~0, P0Thread1of1ForFork1_#t~mem5, ~x$w_buff0_used~0, P0Thread1of1ForFork1_#t~ite11] under condition 25242#(and (<= 1 ~main$tmp_guard1~0) (= (select |#valid| |~#x~0.base|) 1) (= (select (select |#memory_int| ~__unbuffered_p1_EAX$read_delayed_var~0.base) ~__unbuffered_p1_EAX$read_delayed_var~0.offset) ~__unbuffered_p1_EAX~0) (<= (div ~main$tmp_guard1~0 256) 0) (= 0 ~x$r_buff0_thd0~0) (or (<= (+ |ULTIMATE.start___VERIFIER_assert_#in~expression| 255) 0) (<= 1 |ULTIMATE.start___VERIFIER_assert_#in~expression|)) (= ~__unbuffered_p1_EAX$read_delayed~0 1) (not (= ~__unbuffered_p1_EAX~0 1)) (= ~x$r_buff1_thd0~0 0) (or (<= 1 ULTIMATE.start___VERIFIER_assert_~expression) (<= (+ ULTIMATE.start___VERIFIER_assert_~expression 255) 0)) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0)) [2021-01-27 02:43:44,835 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-27 02:43:44,970 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-27 02:43:45,215 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-27 02:43:45,435 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-27 02:43:49,543 WARN L146 IndependenceRelation]: Expensive independence query (4107 ms) for statements [1223] L801-->L808: Formula: (let ((.cse12 (= (mod v_~x$w_buff0_used~0_450 256) 0)) (.cse13 (= (mod v_~x$r_buff1_thd2~0_258 256) 0)) (.cse14 (= (mod v_~x$w_buff1_used~0_362 256) 0)) (.cse16 (= (mod v_~x$w_buff0_used~0_451 256) 0)) (.cse15 (= (mod v_~x$r_buff0_thd2~0_286 256) 0))) (let ((.cse4 (select |v_#memory_int_271| |v_~#x~0.base_174|)) (.cse5 (or .cse16 .cse15)) (.cse6 (not .cse16)) (.cse3 (or .cse13 .cse14)) (.cse8 (or .cse12 .cse15)) (.cse9 (not .cse12)) (.cse7 (not .cse15)) (.cse1 (not .cse14)) (.cse2 (not .cse13))) (and (let ((.cse0 (= |v_P1_#t~mem61_42| |v_P1Thread1of1ForFork0_#t~mem61_1|))) (or (and (= |v_P1_#t~ite62_35| |v_P1_#t~ite63_33|) (or (and .cse0 (= |v_P1_#t~ite62_35| v_~x$w_buff1~0_119) .cse1 .cse2) (and (= |v_P1_#t~ite62_35| |v_P1_#t~mem61_42|) .cse3 (= (select .cse4 |v_~#x~0.offset_174|) |v_P1_#t~mem61_42|))) .cse5) (and .cse0 .cse6 (= |v_P1_#t~ite63_33| v_~x$w_buff0~0_134) (= |v_P1_#t~ite62_35| |v_P1Thread1of1ForFork0_#t~ite62_1|) .cse7))) (= (store |v_#memory_int_271| |v_~#x~0.base_174| (store .cse4 |v_~#x~0.offset_174| |v_P1_#t~ite63_33|)) |v_#memory_int_270|) (or (and (= v_~x$r_buff0_thd2~0_286 v_~x$r_buff0_thd2~0_285) .cse8) (and (= v_~x$r_buff0_thd2~0_285 0) .cse9 .cse7)) (let ((.cse10 (= (mod v_~x$r_buff0_thd2~0_285 256) 0)) (.cse11 (= (mod v_~x$w_buff1_used~0_361 256) 0))) (or (and (= v_~x$r_buff1_thd2~0_257 0) (or (and .cse9 (not .cse10)) (and (not .cse11) .cse2))) (and (= v_~x$r_buff1_thd2~0_258 v_~x$r_buff1_thd2~0_257) (or .cse12 .cse10) (or .cse13 .cse11)))) (or (and (= v_~x$w_buff0_used~0_451 v_~x$w_buff0_used~0_450) .cse5) (and .cse6 (= v_~x$w_buff0_used~0_450 0) .cse7)) (or (and (= v_~x$w_buff1_used~0_362 v_~x$w_buff1_used~0_361) .cse3 .cse8) (and (= v_~x$w_buff1_used~0_361 0) (or (and .cse9 .cse7) (and .cse1 .cse2))))))) InVars {~x$w_buff0~0=v_~x$w_buff0~0_134, P1Thread1of1ForFork0_#t~ite62=|v_P1Thread1of1ForFork0_#t~ite62_1|, ~#x~0.offset=|v_~#x~0.offset_174|, ~x$w_buff1~0=v_~x$w_buff1~0_119, #memory_int=|v_#memory_int_271|, ~#x~0.base=|v_~#x~0.base_174|, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_258, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_362, P1Thread1of1ForFork0_#t~mem61=|v_P1Thread1of1ForFork0_#t~mem61_1|, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_286, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_451} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_134, ~#x~0.offset=|v_~#x~0.offset_174|, ~x$w_buff1~0=v_~x$w_buff1~0_119, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_257, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_361, P1Thread1of1ForFork0_#t~mem61=|v_P1Thread1of1ForFork0_#t~mem61_2|, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_285, P1Thread1of1ForFork0_#t~ite66=|v_P1Thread1of1ForFork0_#t~ite66_1|, P1Thread1of1ForFork0_#t~ite67=|v_P1Thread1of1ForFork0_#t~ite67_1|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_450, P1Thread1of1ForFork0_#t~ite62=|v_P1Thread1of1ForFork0_#t~ite62_2|, P1Thread1of1ForFork0_#t~ite63=|v_P1Thread1of1ForFork0_#t~ite63_1|, P1Thread1of1ForFork0_#t~ite64=|v_P1Thread1of1ForFork0_#t~ite64_1|, P1Thread1of1ForFork0_#t~ite65=|v_P1Thread1of1ForFork0_#t~ite65_1|, #memory_int=|v_#memory_int_270|, ~#x~0.base=|v_~#x~0.base_174|} AuxVars[|v_P1_#t~mem61_42|, |v_P1_#t~ite63_33|, |v_P1_#t~ite62_35|] AssignedVars[P1Thread1of1ForFork0_#t~ite62, P1Thread1of1ForFork0_#t~ite63, P1Thread1of1ForFork0_#t~ite64, P1Thread1of1ForFork0_#t~ite65, #memory_int, ~x$r_buff1_thd2~0, ~x$w_buff1_used~0, P1Thread1of1ForFork0_#t~mem61, ~x$r_buff0_thd2~0, P1Thread1of1ForFork0_#t~ite66, P1Thread1of1ForFork0_#t~ite67, ~x$w_buff0_used~0] and [1216] L765-->L772: Formula: (let ((.cse10 (= (mod v_~x$w_buff0_used~0_444 256) 0)) (.cse14 (= 0 (mod v_~x$r_buff0_thd1~0_71 256))) (.cse15 (= (mod v_~x$w_buff0_used~0_445 256) 0)) (.cse16 (= (mod v_~x$w_buff1_used~0_356 256) 0)) (.cse13 (= (mod v_~x$r_buff1_thd1~0_52 256) 0))) (let ((.cse5 (or .cse16 .cse13)) (.cse6 (not .cse16)) (.cse4 (select |v_#memory_int_263| |v_~#x~0.base_170|)) (.cse3 (or .cse14 .cse15)) (.cse0 (not .cse15)) (.cse7 (not .cse13)) (.cse1 (not .cse14)) (.cse9 (not .cse10)) (.cse8 (or .cse14 .cse10))) (and (let ((.cse2 (= |v_P0_#t~mem5_52| |v_P0Thread1of1ForFork1_#t~mem5_1|))) (or (and (= |v_P0_#t~ite6_51| |v_P0Thread1of1ForFork1_#t~ite6_1|) .cse0 .cse1 .cse2 (= |v_P0_#t~ite7_39| v_~x$w_buff0~0_130)) (and (= |v_P0_#t~ite7_39| |v_P0_#t~ite6_51|) .cse3 (or (and (= |v_P0_#t~ite6_51| |v_P0_#t~mem5_52|) (= (select .cse4 |v_~#x~0.offset_170|) |v_P0_#t~mem5_52|) .cse5) (and .cse6 .cse2 .cse7 (= |v_P0_#t~ite6_51| v_~x$w_buff1~0_115)))))) (or (and .cse8 .cse5 (= v_~x$w_buff1_used~0_356 v_~x$w_buff1_used~0_355)) (and (= v_~x$w_buff1_used~0_355 0) (or (and .cse1 .cse9) (and .cse6 .cse7)))) (= (store |v_#memory_int_263| |v_~#x~0.base_170| (store .cse4 |v_~#x~0.offset_170| |v_P0_#t~ite7_39|)) |v_#memory_int_262|) (or (and (= v_~x$w_buff0_used~0_444 v_~x$w_buff0_used~0_445) .cse3) (and (= v_~x$w_buff0_used~0_444 0) .cse0 .cse1)) (let ((.cse11 (= (mod v_~x$r_buff0_thd1~0_70 256) 0)) (.cse12 (= (mod v_~x$w_buff1_used~0_355 256) 0))) (or (and (or .cse10 .cse11) (or .cse12 .cse13) (= v_~x$r_buff1_thd1~0_52 v_~x$r_buff1_thd1~0_51)) (and (or (and (not .cse11) .cse9) (and .cse7 (not .cse12))) (= v_~x$r_buff1_thd1~0_51 0)))) (or (and (= v_~x$r_buff0_thd1~0_70 0) .cse1 .cse9) (and .cse8 (= v_~x$r_buff0_thd1~0_71 v_~x$r_buff0_thd1~0_70)))))) InVars {~x$w_buff0~0=v_~x$w_buff0~0_130, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_71, ~#x~0.offset=|v_~#x~0.offset_170|, P0Thread1of1ForFork1_#t~ite6=|v_P0Thread1of1ForFork1_#t~ite6_1|, ~x$w_buff1~0=v_~x$w_buff1~0_115, #memory_int=|v_#memory_int_263|, ~#x~0.base=|v_~#x~0.base_170|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_356, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_52, P0Thread1of1ForFork1_#t~mem5=|v_P0Thread1of1ForFork1_#t~mem5_1|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_445} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_130, P0Thread1of1ForFork1_#t~ite10=|v_P0Thread1of1ForFork1_#t~ite10_1|, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_70, ~#x~0.offset=|v_~#x~0.offset_170|, ~x$w_buff1~0=v_~x$w_buff1~0_115, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_355, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_51, P0Thread1of1ForFork1_#t~mem5=|v_P0Thread1of1ForFork1_#t~mem5_2|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_444, P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_1|, P0Thread1of1ForFork1_#t~ite9=|v_P0Thread1of1ForFork1_#t~ite9_1|, P0Thread1of1ForFork1_#t~ite6=|v_P0Thread1of1ForFork1_#t~ite6_2|, P0Thread1of1ForFork1_#t~ite7=|v_P0Thread1of1ForFork1_#t~ite7_1|, #memory_int=|v_#memory_int_262|, ~#x~0.base=|v_~#x~0.base_170|, P0Thread1of1ForFork1_#t~ite11=|v_P0Thread1of1ForFork1_#t~ite11_1|} AuxVars[|v_P0_#t~mem5_52|, |v_P0_#t~ite7_39|, |v_P0_#t~ite6_51|] AssignedVars[P0Thread1of1ForFork1_#t~ite10, ~x$r_buff0_thd1~0, P0Thread1of1ForFork1_#t~ite8, P0Thread1of1ForFork1_#t~ite9, P0Thread1of1ForFork1_#t~ite6, P0Thread1of1ForFork1_#t~ite7, #memory_int, ~x$w_buff1_used~0, ~x$r_buff1_thd1~0, P0Thread1of1ForFork1_#t~mem5, ~x$w_buff0_used~0, P0Thread1of1ForFork1_#t~ite11] under condition 25216#(and (<= 1 ~main$tmp_guard1~0) (= (select |#valid| |~#x~0.base|) 1) (= (select (select |#memory_int| ~__unbuffered_p1_EAX$read_delayed_var~0.base) ~__unbuffered_p1_EAX$read_delayed_var~0.offset) ~__unbuffered_p1_EAX~0) (<= (div ~main$tmp_guard1~0 256) 0) (= 0 ~x$r_buff0_thd0~0) (or (<= (+ |ULTIMATE.start___VERIFIER_assert_#in~expression| 255) 0) (<= 1 |ULTIMATE.start___VERIFIER_assert_#in~expression|)) (= ~__unbuffered_p1_EAX$read_delayed~0 1) (not (= ~__unbuffered_p1_EAX~0 1)) (= ~x$r_buff1_thd0~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0)) [2021-01-27 02:43:49,550 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-27 02:43:49,710 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-27 02:43:53,818 WARN L146 IndependenceRelation]: Expensive independence query (4107 ms) for statements [1223] L801-->L808: Formula: (let ((.cse12 (= (mod v_~x$w_buff0_used~0_450 256) 0)) (.cse13 (= (mod v_~x$r_buff1_thd2~0_258 256) 0)) (.cse14 (= (mod v_~x$w_buff1_used~0_362 256) 0)) (.cse16 (= (mod v_~x$w_buff0_used~0_451 256) 0)) (.cse15 (= (mod v_~x$r_buff0_thd2~0_286 256) 0))) (let ((.cse4 (select |v_#memory_int_271| |v_~#x~0.base_174|)) (.cse5 (or .cse16 .cse15)) (.cse6 (not .cse16)) (.cse3 (or .cse13 .cse14)) (.cse8 (or .cse12 .cse15)) (.cse9 (not .cse12)) (.cse7 (not .cse15)) (.cse1 (not .cse14)) (.cse2 (not .cse13))) (and (let ((.cse0 (= |v_P1_#t~mem61_42| |v_P1Thread1of1ForFork0_#t~mem61_1|))) (or (and (= |v_P1_#t~ite62_35| |v_P1_#t~ite63_33|) (or (and .cse0 (= |v_P1_#t~ite62_35| v_~x$w_buff1~0_119) .cse1 .cse2) (and (= |v_P1_#t~ite62_35| |v_P1_#t~mem61_42|) .cse3 (= (select .cse4 |v_~#x~0.offset_174|) |v_P1_#t~mem61_42|))) .cse5) (and .cse0 .cse6 (= |v_P1_#t~ite63_33| v_~x$w_buff0~0_134) (= |v_P1_#t~ite62_35| |v_P1Thread1of1ForFork0_#t~ite62_1|) .cse7))) (= (store |v_#memory_int_271| |v_~#x~0.base_174| (store .cse4 |v_~#x~0.offset_174| |v_P1_#t~ite63_33|)) |v_#memory_int_270|) (or (and (= v_~x$r_buff0_thd2~0_286 v_~x$r_buff0_thd2~0_285) .cse8) (and (= v_~x$r_buff0_thd2~0_285 0) .cse9 .cse7)) (let ((.cse10 (= (mod v_~x$r_buff0_thd2~0_285 256) 0)) (.cse11 (= (mod v_~x$w_buff1_used~0_361 256) 0))) (or (and (= v_~x$r_buff1_thd2~0_257 0) (or (and .cse9 (not .cse10)) (and (not .cse11) .cse2))) (and (= v_~x$r_buff1_thd2~0_258 v_~x$r_buff1_thd2~0_257) (or .cse12 .cse10) (or .cse13 .cse11)))) (or (and (= v_~x$w_buff0_used~0_451 v_~x$w_buff0_used~0_450) .cse5) (and .cse6 (= v_~x$w_buff0_used~0_450 0) .cse7)) (or (and (= v_~x$w_buff1_used~0_362 v_~x$w_buff1_used~0_361) .cse3 .cse8) (and (= v_~x$w_buff1_used~0_361 0) (or (and .cse9 .cse7) (and .cse1 .cse2))))))) InVars {~x$w_buff0~0=v_~x$w_buff0~0_134, P1Thread1of1ForFork0_#t~ite62=|v_P1Thread1of1ForFork0_#t~ite62_1|, ~#x~0.offset=|v_~#x~0.offset_174|, ~x$w_buff1~0=v_~x$w_buff1~0_119, #memory_int=|v_#memory_int_271|, ~#x~0.base=|v_~#x~0.base_174|, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_258, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_362, P1Thread1of1ForFork0_#t~mem61=|v_P1Thread1of1ForFork0_#t~mem61_1|, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_286, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_451} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_134, ~#x~0.offset=|v_~#x~0.offset_174|, ~x$w_buff1~0=v_~x$w_buff1~0_119, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_257, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_361, P1Thread1of1ForFork0_#t~mem61=|v_P1Thread1of1ForFork0_#t~mem61_2|, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_285, P1Thread1of1ForFork0_#t~ite66=|v_P1Thread1of1ForFork0_#t~ite66_1|, P1Thread1of1ForFork0_#t~ite67=|v_P1Thread1of1ForFork0_#t~ite67_1|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_450, P1Thread1of1ForFork0_#t~ite62=|v_P1Thread1of1ForFork0_#t~ite62_2|, P1Thread1of1ForFork0_#t~ite63=|v_P1Thread1of1ForFork0_#t~ite63_1|, P1Thread1of1ForFork0_#t~ite64=|v_P1Thread1of1ForFork0_#t~ite64_1|, P1Thread1of1ForFork0_#t~ite65=|v_P1Thread1of1ForFork0_#t~ite65_1|, #memory_int=|v_#memory_int_270|, ~#x~0.base=|v_~#x~0.base_174|} AuxVars[|v_P1_#t~mem61_42|, |v_P1_#t~ite63_33|, |v_P1_#t~ite62_35|] AssignedVars[P1Thread1of1ForFork0_#t~ite62, P1Thread1of1ForFork0_#t~ite63, P1Thread1of1ForFork0_#t~ite64, P1Thread1of1ForFork0_#t~ite65, #memory_int, ~x$r_buff1_thd2~0, ~x$w_buff1_used~0, P1Thread1of1ForFork0_#t~mem61, ~x$r_buff0_thd2~0, P1Thread1of1ForFork0_#t~ite66, P1Thread1of1ForFork0_#t~ite67, ~x$w_buff0_used~0] and [1216] L765-->L772: Formula: (let ((.cse10 (= (mod v_~x$w_buff0_used~0_444 256) 0)) (.cse14 (= 0 (mod v_~x$r_buff0_thd1~0_71 256))) (.cse15 (= (mod v_~x$w_buff0_used~0_445 256) 0)) (.cse16 (= (mod v_~x$w_buff1_used~0_356 256) 0)) (.cse13 (= (mod v_~x$r_buff1_thd1~0_52 256) 0))) (let ((.cse5 (or .cse16 .cse13)) (.cse6 (not .cse16)) (.cse4 (select |v_#memory_int_263| |v_~#x~0.base_170|)) (.cse3 (or .cse14 .cse15)) (.cse0 (not .cse15)) (.cse7 (not .cse13)) (.cse1 (not .cse14)) (.cse9 (not .cse10)) (.cse8 (or .cse14 .cse10))) (and (let ((.cse2 (= |v_P0_#t~mem5_52| |v_P0Thread1of1ForFork1_#t~mem5_1|))) (or (and (= |v_P0_#t~ite6_51| |v_P0Thread1of1ForFork1_#t~ite6_1|) .cse0 .cse1 .cse2 (= |v_P0_#t~ite7_39| v_~x$w_buff0~0_130)) (and (= |v_P0_#t~ite7_39| |v_P0_#t~ite6_51|) .cse3 (or (and (= |v_P0_#t~ite6_51| |v_P0_#t~mem5_52|) (= (select .cse4 |v_~#x~0.offset_170|) |v_P0_#t~mem5_52|) .cse5) (and .cse6 .cse2 .cse7 (= |v_P0_#t~ite6_51| v_~x$w_buff1~0_115)))))) (or (and .cse8 .cse5 (= v_~x$w_buff1_used~0_356 v_~x$w_buff1_used~0_355)) (and (= v_~x$w_buff1_used~0_355 0) (or (and .cse1 .cse9) (and .cse6 .cse7)))) (= (store |v_#memory_int_263| |v_~#x~0.base_170| (store .cse4 |v_~#x~0.offset_170| |v_P0_#t~ite7_39|)) |v_#memory_int_262|) (or (and (= v_~x$w_buff0_used~0_444 v_~x$w_buff0_used~0_445) .cse3) (and (= v_~x$w_buff0_used~0_444 0) .cse0 .cse1)) (let ((.cse11 (= (mod v_~x$r_buff0_thd1~0_70 256) 0)) (.cse12 (= (mod v_~x$w_buff1_used~0_355 256) 0))) (or (and (or .cse10 .cse11) (or .cse12 .cse13) (= v_~x$r_buff1_thd1~0_52 v_~x$r_buff1_thd1~0_51)) (and (or (and (not .cse11) .cse9) (and .cse7 (not .cse12))) (= v_~x$r_buff1_thd1~0_51 0)))) (or (and (= v_~x$r_buff0_thd1~0_70 0) .cse1 .cse9) (and .cse8 (= v_~x$r_buff0_thd1~0_71 v_~x$r_buff0_thd1~0_70)))))) InVars {~x$w_buff0~0=v_~x$w_buff0~0_130, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_71, ~#x~0.offset=|v_~#x~0.offset_170|, P0Thread1of1ForFork1_#t~ite6=|v_P0Thread1of1ForFork1_#t~ite6_1|, ~x$w_buff1~0=v_~x$w_buff1~0_115, #memory_int=|v_#memory_int_263|, ~#x~0.base=|v_~#x~0.base_170|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_356, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_52, P0Thread1of1ForFork1_#t~mem5=|v_P0Thread1of1ForFork1_#t~mem5_1|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_445} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_130, P0Thread1of1ForFork1_#t~ite10=|v_P0Thread1of1ForFork1_#t~ite10_1|, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_70, ~#x~0.offset=|v_~#x~0.offset_170|, ~x$w_buff1~0=v_~x$w_buff1~0_115, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_355, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_51, P0Thread1of1ForFork1_#t~mem5=|v_P0Thread1of1ForFork1_#t~mem5_2|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_444, P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_1|, P0Thread1of1ForFork1_#t~ite9=|v_P0Thread1of1ForFork1_#t~ite9_1|, P0Thread1of1ForFork1_#t~ite6=|v_P0Thread1of1ForFork1_#t~ite6_2|, P0Thread1of1ForFork1_#t~ite7=|v_P0Thread1of1ForFork1_#t~ite7_1|, #memory_int=|v_#memory_int_262|, ~#x~0.base=|v_~#x~0.base_170|, P0Thread1of1ForFork1_#t~ite11=|v_P0Thread1of1ForFork1_#t~ite11_1|} AuxVars[|v_P0_#t~mem5_52|, |v_P0_#t~ite7_39|, |v_P0_#t~ite6_51|] AssignedVars[P0Thread1of1ForFork1_#t~ite10, ~x$r_buff0_thd1~0, P0Thread1of1ForFork1_#t~ite8, P0Thread1of1ForFork1_#t~ite9, P0Thread1of1ForFork1_#t~ite6, P0Thread1of1ForFork1_#t~ite7, #memory_int, ~x$w_buff1_used~0, ~x$r_buff1_thd1~0, P0Thread1of1ForFork1_#t~mem5, ~x$w_buff0_used~0, P0Thread1of1ForFork1_#t~ite11] under condition 25201#(and (<= 1 ~main$tmp_guard1~0) (= (select |#valid| |~#x~0.base|) 1) (= (select (select |#memory_int| ~__unbuffered_p1_EAX$read_delayed_var~0.base) ~__unbuffered_p1_EAX$read_delayed_var~0.offset) ~__unbuffered_p1_EAX~0) (<= (div ~main$tmp_guard1~0 256) 0) (= 0 ~x$r_buff0_thd0~0) (= ~__unbuffered_p1_EAX$read_delayed~0 1) (not (= ~__unbuffered_p1_EAX~0 1)) (= ~x$r_buff1_thd0~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0)) [2021-01-27 02:43:53,825 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-27 02:43:53,921 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-27 02:43:54,589 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-27 02:43:54,686 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-27 02:43:56,390 WARN L146 IndependenceRelation]: Expensive independence query (1464 ms) for statements [1215] L754-->L765: Formula: (and (= |v_P0Thread1of1ForFork1_reach_error_#t~nondet2.base_3| |v_P0Thread1of1ForFork1_reach_error_#t~nondet2.base_4|) (= v_~x$w_buff0_used~0_Out_3 1) (= (ite (not (and (not (= (mod v_~x$w_buff0_used~0_Out_3 256) 0)) (not (= (mod v_~x$w_buff1_used~0_Out_3 256) 0)))) 1 0) |v_P0Thread1of1ForFork1___VERIFIER_assert_#in~expression_3|) (= v_~x$r_buff0_thd1~0_Out_1 1) (= v_~x$r_buff1_thd2~0_Out_1 v_~x$r_buff0_thd2~0_In_79) (= |v_P0Thread1of1ForFork1_reach_error_#t~nondet2.offset_3| |v_P0Thread1of1ForFork1_reach_error_#t~nondet2.offset_4|) (not (= v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_3 0)) (= v_~x$r_buff1_thd1~0_Out_1 v_~x$r_buff0_thd1~0_In_11) (= v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_3 |v_P0Thread1of1ForFork1___VERIFIER_assert_#in~expression_3|) (= v_~x$w_buff1~0_Out_3 v_~x$w_buff0~0_In_33) (= v_~x$r_buff1_thd0~0_Out_1 v_~x$r_buff0_thd0~0_In_11) (= v_~x$w_buff0~0_Out_3 1) (= v_~x$w_buff1_used~0_Out_3 v_~x$w_buff0_used~0_In_99)) InVars {~x$w_buff0~0=v_~x$w_buff0~0_In_33, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_In_11, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_In_11, P0Thread1of1ForFork1_reach_error_#t~nondet2.offset=|v_P0Thread1of1ForFork1_reach_error_#t~nondet2.offset_3|, P0Thread1of1ForFork1_reach_error_#t~nondet2.base=|v_P0Thread1of1ForFork1_reach_error_#t~nondet2.base_3|, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_In_79, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_In_99} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_Out_3, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_In_11, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_Out_1, ~x$w_buff1~0=v_~x$w_buff1~0_Out_3, P0Thread1of1ForFork1_reach_error_#t~nondet2.base=|v_P0Thread1of1ForFork1_reach_error_#t~nondet2.base_4|, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_Out_1, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_Out_3, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_Out_1, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_In_79, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_Out_1, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_Out_3, P0Thread1of1ForFork1_reach_error_#t~nondet2.offset=|v_P0Thread1of1ForFork1_reach_error_#t~nondet2.offset_4|, P0Thread1of1ForFork1___VERIFIER_assert_~expression=v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_3, P0Thread1of1ForFork1___VERIFIER_assert_#in~expression=|v_P0Thread1of1ForFork1___VERIFIER_assert_#in~expression_3|} AuxVars[] AssignedVars[~x$w_buff0~0, ~x$r_buff0_thd1~0, P0Thread1of1ForFork1_reach_error_#t~nondet2.offset, ~x$w_buff1~0, P0Thread1of1ForFork1_reach_error_#t~nondet2.base, ~x$r_buff1_thd2~0, ~x$w_buff1_used~0, P0Thread1of1ForFork1___VERIFIER_assert_~expression, ~x$r_buff1_thd1~0, ~x$r_buff1_thd0~0, P0Thread1of1ForFork1___VERIFIER_assert_#in~expression, ~x$w_buff0_used~0] and [1209] L2-1-->L839: Formula: (let ((.cse15 (= (mod v_~x$w_buff0_used~0_437 256) 0)) (.cse14 (= (mod v_~x$r_buff0_thd0~0_66 256) 0)) (.cse13 (= (mod v_~x$w_buff0_used~0_436 256) 0)) (.cse12 (= (mod v_~x$r_buff1_thd0~0_46 256) 0)) (.cse16 (= (mod v_~x$w_buff1_used~0_348 256) 0))) (let ((.cse0 (select |v_#memory_int_255| |v_~#x~0.base_166|)) (.cse4 (or .cse12 .cse16)) (.cse6 (not .cse16)) (.cse5 (not .cse12)) (.cse8 (or .cse14 .cse13)) (.cse9 (not .cse13)) (.cse7 (or .cse14 .cse15)) (.cse1 (not .cse15)) (.cse3 (not .cse14))) (and (= (store |v_#memory_int_255| |v_~#x~0.base_166| (store .cse0 |v_~#x~0.offset_166| |v_ULTIMATE.start_main_#t~ite72_46|)) |v_#memory_int_254|) (let ((.cse2 (= |v_ULTIMATE.start_main_#t~mem70_43| |v_ULTIMATE.start_main_#t~mem70_38|))) (or (and .cse1 .cse2 (= |v_ULTIMATE.start_main_#t~ite71_36| |v_ULTIMATE.start_main_#t~ite71_31|) (= v_~x$w_buff0~0_126 |v_ULTIMATE.start_main_#t~ite72_46|) .cse3) (and (or (and (= |v_ULTIMATE.start_main_#t~mem70_43| |v_ULTIMATE.start_main_#t~ite71_36|) (= |v_ULTIMATE.start_main_#t~mem70_43| (select .cse0 |v_~#x~0.offset_166|)) .cse4) (and (= |v_ULTIMATE.start_main_#t~ite71_36| v_~x$w_buff1~0_111) .cse2 .cse5 .cse6)) .cse7 (= |v_ULTIMATE.start_main_#t~ite71_36| |v_ULTIMATE.start_main_#t~ite72_46|)))) (or (and (= v_~x$w_buff1_used~0_348 v_~x$w_buff1_used~0_347) .cse4 .cse8) (and (or (and .cse5 .cse6) (and .cse9 .cse3)) (= v_~x$w_buff1_used~0_347 0))) (let ((.cse10 (= (mod v_~x$w_buff1_used~0_347 256) 0)) (.cse11 (= (mod v_~x$r_buff0_thd0~0_65 256) 0))) (or (and (= v_~x$r_buff1_thd0~0_45 0) (or (and (not .cse10) .cse5) (and (not .cse11) .cse9))) (and (or .cse10 .cse12) (= v_~x$r_buff1_thd0~0_45 v_~x$r_buff1_thd0~0_46) (or .cse13 .cse11)))) (or (and (= v_~x$r_buff0_thd0~0_66 v_~x$r_buff0_thd0~0_65) .cse8) (and (= v_~x$r_buff0_thd0~0_65 0) .cse9 .cse3)) (or (and (= v_~x$w_buff0_used~0_437 v_~x$w_buff0_used~0_436) .cse7) (and .cse1 (= v_~x$w_buff0_used~0_436 0) .cse3))))) InVars {~x$w_buff0~0=v_~x$w_buff0~0_126, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_66, ULTIMATE.start_main_#t~ite71=|v_ULTIMATE.start_main_#t~ite71_31|, ~#x~0.offset=|v_~#x~0.offset_166|, ~x$w_buff1~0=v_~x$w_buff1~0_111, #memory_int=|v_#memory_int_255|, ~#x~0.base=|v_~#x~0.base_166|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_348, ULTIMATE.start_main_#t~mem70=|v_ULTIMATE.start_main_#t~mem70_38|, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_46, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_437} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_126, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_65, ~#x~0.offset=|v_~#x~0.offset_166|, ~x$w_buff1~0=v_~x$w_buff1~0_111, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_347, ULTIMATE.start_main_#t~mem70=|v_ULTIMATE.start_main_#t~mem70_37|, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_45, ULTIMATE.start_main_#t~ite75=|v_ULTIMATE.start_main_#t~ite75_24|, ULTIMATE.start_main_#t~ite76=|v_ULTIMATE.start_main_#t~ite76_18|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_436, ULTIMATE.start_main_#t~ite73=|v_ULTIMATE.start_main_#t~ite73_26|, ULTIMATE.start_main_#t~ite74=|v_ULTIMATE.start_main_#t~ite74_26|, ULTIMATE.start_main_#t~ite71=|v_ULTIMATE.start_main_#t~ite71_30|, ULTIMATE.start_main_#t~ite72=|v_ULTIMATE.start_main_#t~ite72_42|, #memory_int=|v_#memory_int_254|, ~#x~0.base=|v_~#x~0.base_166|} AuxVars[|v_ULTIMATE.start_main_#t~ite72_46|, |v_ULTIMATE.start_main_#t~ite71_36|, |v_ULTIMATE.start_main_#t~mem70_43|] AssignedVars[ULTIMATE.start_main_#t~ite73, ~x$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite74, ULTIMATE.start_main_#t~ite71, ULTIMATE.start_main_#t~ite72, #memory_int, ~x$w_buff1_used~0, ULTIMATE.start_main_#t~mem70, ~x$r_buff1_thd0~0, ULTIMATE.start_main_#t~ite75, ULTIMATE.start_main_#t~ite76, ~x$w_buff0_used~0] under condition 19103#(= (select |#valid| |~#x~0.base|) 1) Size of Word is: 77 and size of Sequence is : 78[2021-01-27 02:43:56,640 INFO L164 SleepSetCegar]: Size of mCounterexample is: 78 [2021-01-27 02:43:56,642 INFO L165 SleepSetCegar]: [19118#[ULTIMATE.startENTRY]true, 19121#[L-1]true, 19124#[L-1-1]true, 19127#[L17]true, 19130#[L17-1]true, 19133#[L17-2]true, 19136#[L17-3]true, 19139#[L17-4]true, 19142#[L710]true, 19145#[L712](= ~__unbuffered_p0_EAX~0 0), 19148#[L713](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0)), 19151#[L714](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0)), 19154#[L715](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0)), 19157#[L716](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0)), 19160#[L717](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0)), 19163#[L718](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0)), 19166#[L719](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0)), 19169#[L720](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0)), 19172#[L721](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0)), 19175#[L722](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 19178#[L723](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 19181#[L724](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 19184#[L725](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 19187#[L726](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 19190#[L727](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 19193#[L728](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 19196#[L730](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 19199#[L730-1](and (= (select |#valid| |~#x~0.base|) 1) (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0)), 19202#[L730-2](and (= (select |#valid| |~#x~0.base|) 1) (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0)), 19205#[L732](and (= (select |#valid| |~#x~0.base|) 1) (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0)), 19208#[L733](and (= (select |#valid| |~#x~0.base|) 1) (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0)), 19211#[L734](and (= (select |#valid| |~#x~0.base|) 1) (= 0 ~x$r_buff0_thd0~0) (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0)), 19214#[L735](and (= (select |#valid| |~#x~0.base|) 1) (= 0 ~x$r_buff0_thd0~0) (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0)), 19217#[L736](and (= (select |#valid| |~#x~0.base|) 1) (= 0 ~x$r_buff0_thd0~0) (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0)), 19220#[L737](and (= (select |#valid| |~#x~0.base|) 1) (= 0 ~x$r_buff0_thd0~0) (= ~__unbuffered_p0_EAX~0 0) (= ~x$r_buff1_thd0~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0)), 19223#[L738](and (= (select |#valid| |~#x~0.base|) 1) (= 0 ~x$r_buff0_thd0~0) (= ~__unbuffered_p0_EAX~0 0) (= ~x$r_buff1_thd0~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0)), 19226#[L739](and (= (select |#valid| |~#x~0.base|) 1) (= 0 ~x$r_buff0_thd0~0) (= ~__unbuffered_p0_EAX~0 0) (= ~x$r_buff1_thd0~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0)), 19229#[L740](and (= (select |#valid| |~#x~0.base|) 1) (= 0 ~x$r_buff0_thd0~0) (= ~__unbuffered_p0_EAX~0 0) (= ~x$r_buff1_thd0~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0)), 19232#[L741](and (= (select |#valid| |~#x~0.base|) 1) (= 0 ~x$r_buff0_thd0~0) (= ~__unbuffered_p0_EAX~0 0) (= ~x$r_buff1_thd0~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0)), 19235#[L742](and (= (select |#valid| |~#x~0.base|) 1) (= 0 ~x$r_buff0_thd0~0) (= ~__unbuffered_p0_EAX~0 0) (= ~x$r_buff1_thd0~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0) (= 0 ~x$w_buff0~0)), 19238#[L743](and (= (select |#valid| |~#x~0.base|) 1) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0) (= ~x$r_buff1_thd0~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0) (= 0 ~x$w_buff0~0)), 19241#[L744](and (= (select |#valid| |~#x~0.base|) 1) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0) (= ~x$r_buff1_thd0~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0) (= 0 ~x$w_buff0~0)), 19244#[L746](and (= (select |#valid| |~#x~0.base|) 1) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0) (= ~x$r_buff1_thd0~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0) (= 0 ~x$w_buff0~0)), 19247#[L747](and (= (select |#valid| |~#x~0.base|) 1) (= ~y~0 0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0) (= ~x$r_buff1_thd0~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0) (= 0 ~x$w_buff0~0)), 19250#[L748](and (= (select |#valid| |~#x~0.base|) 1) (= ~y~0 0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0) (= ~x$r_buff1_thd0~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0) (= 0 ~x$w_buff0~0)), 19253#[L749](and (= (select |#valid| |~#x~0.base|) 1) (= ~y~0 0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0) (= ~x$r_buff1_thd0~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0) (= 0 ~x$w_buff0~0)), 19256#[L-1-2](and (= (select |#valid| |~#x~0.base|) 1) (= ~y~0 0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0) (= ~x$r_buff1_thd0~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0) (= 0 ~x$w_buff0~0)), 19259#[L-1-3](and (= (select |#valid| |~#x~0.base|) 1) (= ~y~0 0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0) (= ~x$r_buff1_thd0~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0) (= 0 ~x$w_buff0~0)), 19262#[L825](and (= (select |#valid| |~#x~0.base|) 1) (= ~y~0 0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0) (= ~x$r_buff1_thd0~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0) (= 0 ~x$w_buff0~0)), 19265#[L825-1](and (= (select |#valid| |~#x~0.base|) 1) (= ~y~0 0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (not (= |~#x~0.base| |ULTIMATE.start_main_~#t2667~0.base|)) (= ~__unbuffered_p0_EAX~0 0) (= ~x$r_buff1_thd0~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0) (= 0 ~x$w_buff0~0)), 19268#[L826](and (= (select |#valid| |~#x~0.base|) 1) (= ~y~0 0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (not (= |~#x~0.base| |ULTIMATE.start_main_~#t2667~0.base|)) (= ~__unbuffered_p0_EAX~0 0) (= ~x$r_buff1_thd0~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0) (= 0 ~x$w_buff0~0)), 19271#[L826-1, P0ENTRY](and (= (select |#valid| |~#x~0.base|) 1) (= ~y~0 0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (not (= |~#x~0.base| |ULTIMATE.start_main_~#t2667~0.base|)) (= ~__unbuffered_p0_EAX~0 0) (= ~x$r_buff1_thd0~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0) (= 0 ~x$w_buff0~0)), 19276#[L827, P0ENTRY](and (= (select |#valid| |~#x~0.base|) 1) (= ~y~0 0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (not (= |~#x~0.base| |ULTIMATE.start_main_~#t2667~0.base|)) (= ~__unbuffered_p0_EAX~0 0) (= ~x$r_buff1_thd0~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0) (= 0 ~x$w_buff0~0)), 19284#[L827-1, P0ENTRY](and (= (select |#valid| |~#x~0.base|) 1) (= ~y~0 0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (not (= |~#x~0.base| |ULTIMATE.start_main_~#t2667~0.base|)) (= ~__unbuffered_p0_EAX~0 0) (= ~x$r_buff1_thd0~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0) (= 0 ~x$w_buff0~0) (not (= |~#x~0.base| |ULTIMATE.start_main_~#t2668~0.base|))), 19290#[L828, P0ENTRY](and (= (select |#valid| |~#x~0.base|) 1) (= ~y~0 0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (not (= |~#x~0.base| |ULTIMATE.start_main_~#t2667~0.base|)) (= ~__unbuffered_p0_EAX~0 0) (= ~x$r_buff1_thd0~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0) (= 0 ~x$w_buff0~0) (not (= |~#x~0.base| |ULTIMATE.start_main_~#t2668~0.base|))), 19296#[L828, L752](and (= (select |#valid| |~#x~0.base|) 1) (= ~y~0 0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (not (= |~#x~0.base| |ULTIMATE.start_main_~#t2667~0.base|)) (= ~__unbuffered_p0_EAX~0 0) (= ~x$r_buff1_thd0~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0) (= 0 ~x$w_buff0~0) (not (= |~#x~0.base| |ULTIMATE.start_main_~#t2668~0.base|))), 19300#[L828-1, P1ENTRY, L752](and (= (select |#valid| |~#x~0.base|) 1) (= ~y~0 0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (not (= |~#x~0.base| |ULTIMATE.start_main_~#t2667~0.base|)) (= ~__unbuffered_p0_EAX~0 0) (= ~x$r_buff1_thd0~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0) (= 0 ~x$w_buff0~0) (not (= |~#x~0.base| |ULTIMATE.start_main_~#t2668~0.base|))), 27895#[P1ENTRY, L752, L829](and (= (select |#valid| |~#x~0.base|) 1) (= ~y~0 0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (not (= |~#x~0.base| |ULTIMATE.start_main_~#t2667~0.base|)) (= ~__unbuffered_p0_EAX~0 0) (= ~x$r_buff1_thd0~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0) (= 0 ~x$w_buff0~0) (not (= |~#x~0.base| |ULTIMATE.start_main_~#t2668~0.base|))), 27901#[L831, P1ENTRY, L752](and (= (select |#valid| |~#x~0.base|) 1) (= ~y~0 0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (not (= |~#x~0.base| |ULTIMATE.start_main_~#t2667~0.base|)) (= ~__unbuffered_p0_EAX~0 0) (= ~x$r_buff1_thd0~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0) (= 0 ~x$w_buff0~0) (not (= |~#x~0.base| |ULTIMATE.start_main_~#t2668~0.base|))), 27907#[P1ENTRY, L832, L752](and (= (select |#valid| |~#x~0.base|) 1) (= ~y~0 0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (not (= |~#x~0.base| |ULTIMATE.start_main_~#t2667~0.base|)) (= ~__unbuffered_p0_EAX~0 0) (= ~x$r_buff1_thd0~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0) (= 0 ~x$w_buff0~0) (not (= |~#x~0.base| |ULTIMATE.start_main_~#t2668~0.base|))), 27913#[L2, P1ENTRY, L752](and (= (select |#valid| |~#x~0.base|) 1) (= ~y~0 0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (not (= |~#x~0.base| |ULTIMATE.start_main_~#t2667~0.base|)) (= ~__unbuffered_p0_EAX~0 0) (= ~x$r_buff1_thd0~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0) (= 0 ~x$w_buff0~0) (not (= |~#x~0.base| |ULTIMATE.start_main_~#t2668~0.base|))), 27919#[L3, P1ENTRY, L752](and (= (select |#valid| |~#x~0.base|) 1) (= ~y~0 0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (not (= |~#x~0.base| |ULTIMATE.start_main_~#t2667~0.base|)) (= ~__unbuffered_p0_EAX~0 0) (= ~x$r_buff1_thd0~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0) (= 0 ~x$w_buff0~0) (not (= |~#x~0.base| |ULTIMATE.start_main_~#t2668~0.base|))), 27925#[L2-1, P1ENTRY, L752](and (= (select |#valid| |~#x~0.base|) 1) (= ~y~0 0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (not (= |~#x~0.base| |ULTIMATE.start_main_~#t2667~0.base|)) (= ~__unbuffered_p0_EAX~0 0) (= ~x$r_buff1_thd0~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0) (= 0 ~x$w_buff0~0) (not (= |~#x~0.base| |ULTIMATE.start_main_~#t2668~0.base|))), 28076#[L839, P1ENTRY, L752](and (= (select |#valid| |~#x~0.base|) 1) (= ~y~0 0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (not (= |~#x~0.base| |ULTIMATE.start_main_~#t2667~0.base|)) (= ~__unbuffered_p0_EAX~0 0) (= ~x$r_buff1_thd0~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0) (= 0 ~x$w_buff0~0) (not (= |~#x~0.base| |ULTIMATE.start_main_~#t2668~0.base|))), 28080#[L839, L780, L752](and (= (select |#valid| |~#x~0.base|) 1) (= ~y~0 0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (not (= |~#x~0.base| |ULTIMATE.start_main_~#t2667~0.base|)) (= ~__unbuffered_p0_EAX~0 0) (= ~x$r_buff1_thd0~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0) (= 0 ~x$w_buff0~0) (not (= |~#x~0.base| |ULTIMATE.start_main_~#t2668~0.base|))), 29768#[L798, L839, L752](and (= (select |#valid| |~#x~0.base|) 1) (not (= |~#x~0.base| |ULTIMATE.start_main_~#t2667~0.base|)) (= ~__unbuffered_p1_EAX$read_delayed~0 1) (not (= ~__unbuffered_p1_EAX~0 1)) (= ~x$r_buff1_thd0~0 0) (= (select (select |#memory_int| ~__unbuffered_p1_EAX$read_delayed_var~0.base) ~__unbuffered_p1_EAX$read_delayed_var~0.offset) ~__unbuffered_p1_EAX~0) (= ~y~0 0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0) (= 0 ~x$w_buff0~0) (not (= |~#x~0.base| |ULTIMATE.start_main_~#t2668~0.base|))), 29771#[L839, L801, L752](and (= (select |#valid| |~#x~0.base|) 1) (= (select (select |#memory_int| ~__unbuffered_p1_EAX$read_delayed_var~0.base) ~__unbuffered_p1_EAX$read_delayed_var~0.offset) ~__unbuffered_p1_EAX~0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (not (= |~#x~0.base| |ULTIMATE.start_main_~#t2667~0.base|)) (= ~__unbuffered_p1_EAX$read_delayed~0 1) (not (= ~__unbuffered_p1_EAX~0 1)) (= ~__unbuffered_p0_EAX~0 0) (= ~x$r_buff1_thd0~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0) (= 0 ~x$w_buff0~0) (not (= |~#x~0.base| |ULTIMATE.start_main_~#t2668~0.base|))), 31383#[L839, L754, L801](and (= (select |#valid| |~#x~0.base|) 1) (= (select (select |#memory_int| ~__unbuffered_p1_EAX$read_delayed_var~0.base) ~__unbuffered_p1_EAX$read_delayed_var~0.offset) ~__unbuffered_p1_EAX~0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (not (= |~#x~0.base| |ULTIMATE.start_main_~#t2667~0.base|)) (= ~__unbuffered_p1_EAX$read_delayed~0 1) (not (= ~__unbuffered_p1_EAX~0 1)) (= ~x$r_buff1_thd0~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0) (= 0 ~x$w_buff0~0) (not (= |~#x~0.base| |ULTIMATE.start_main_~#t2668~0.base|))), 31389#[L839, L765, L801](and (= (select |#valid| |~#x~0.base|) 1) (= (select (select |#memory_int| ~__unbuffered_p1_EAX$read_delayed_var~0.base) ~__unbuffered_p1_EAX$read_delayed_var~0.offset) ~__unbuffered_p1_EAX~0) (= 0 ~x$r_buff0_thd0~0) (= ~__unbuffered_p1_EAX$read_delayed~0 1) (not (= ~__unbuffered_p1_EAX~0 1)) (= ~x$r_buff1_thd0~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0)), 31406#[L772, L839, L801](= (select |#valid| |~#x~0.base|) 1), 31420#[L772, L844, L801](= (select |#valid| |~#x~0.base|) 1), 31435#[L772, L845, L801](= (select |#valid| |~#x~0.base|) 1), 31450#[L772, L18, L801](= (select |#valid| |~#x~0.base|) 1), 31465#[L772, L18-1, L801](= (select |#valid| |~#x~0.base|) 1), 31482#[L772, L18-2, L801](= (select |#valid| |~#x~0.base|) 1), 31505#[L17-5, L772, L801](= (select |#valid| |~#x~0.base|) 1), 31540#[L772, L801, L17-7](= (select |#valid| |~#x~0.base|) 1), 31580#[L772, L801, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION](= (select |#valid| |~#x~0.base|) 1)] [2021-01-27 02:43:56,642 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3 [2021-01-27 02:43:56,642 INFO L429 AbstractCegarLoop]: === Iteration 5 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-27 02:43:56,642 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-27 02:43:56,643 INFO L82 PathProgramCache]: Analyzing trace with hash -578702570, now seen corresponding path program 1 times [2021-01-27 02:43:56,643 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-27 02:43:56,643 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [800062915] [2021-01-27 02:43:56,643 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-27 02:43:56,767 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-01-27 02:43:56,920 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-01-27 02:43:56,921 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [800062915] [2021-01-27 02:43:56,921 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-01-27 02:43:56,921 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2021-01-27 02:43:56,921 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [492962138] [2021-01-27 02:43:56,922 INFO L461 AbstractCegarLoop]: Interpolant automaton has 6 states [2021-01-27 02:43:56,922 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-01-27 02:43:56,923 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-01-27 02:43:56,923 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2021-01-27 02:43:56,923 INFO L481 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2021-01-27 02:43:56,923 INFO L482 AbstractCegarLoop]: Interpolant automaton has has 6 states, 6 states have (on average 12.833333333333334) internal successors, (77), 6 states have internal predecessors, (77), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-01-27 02:43:57,077 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check [2021-01-27 02:43:57,268 WARN L160 IndependenceRelation]: Requesting ManagedScript unlock before implication check Size of Word is: 82 and size of Sequence is : 83[2021-01-27 02:43:57,342 INFO L164 SleepSetCegar]: Size of mCounterexample is: 83 [2021-01-27 02:43:57,344 INFO L165 SleepSetCegar]: [31595#[ULTIMATE.startENTRY]true, 31598#[L-1]true, 31601#[L-1-1]true, 31604#[L17]true, 31607#[L17-1]true, 31610#[L17-2]true, 31613#[L17-3]true, 31616#[L17-4]true, 31619#[L710](= ~__unbuffered_cnt~0 0), 31622#[L712](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_cnt~0 0)), 31625#[L713](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_cnt~0 0)), 31628#[L714](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_cnt~0 0)), 31631#[L715](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_cnt~0 0)), 31634#[L716](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_cnt~0 0)), 31637#[L717](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_cnt~0 0)), 31640#[L718](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_cnt~0 0)), 31643#[L719](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_cnt~0 0)), 31646#[L720](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_cnt~0 0)), 31649#[L721](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_cnt~0 0)), 31652#[L722](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0) (= ~__unbuffered_cnt~0 0)), 31655#[L723](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0) (= ~__unbuffered_cnt~0 0)), 31658#[L724](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0) (= ~__unbuffered_cnt~0 0)), 31661#[L725](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0) (= ~__unbuffered_cnt~0 0)), 31664#[L726](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0) (= ~__unbuffered_cnt~0 0)), 31667#[L727](and (= ~__unbuffered_p0_EAX~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0) (= ~__unbuffered_cnt~0 0)), 31672#[L728](and (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 31675#[L730](and (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 31678#[L730-1](and (= (select |#valid| |~#x~0.base|) 1) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 31681#[L730-2](and (= (select |#valid| |~#x~0.base|) 1) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 31684#[L732](and (= (select |#valid| |~#x~0.base|) 1) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 31687#[L733](and (= (select |#valid| |~#x~0.base|) 1) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 31690#[L734](and (= (select |#valid| |~#x~0.base|) 1) (= 0 ~x$r_buff0_thd0~0) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 31693#[L735](and (= (select |#valid| |~#x~0.base|) 1) (= 0 ~x$r_buff0_thd0~0) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 31696#[L736](and (= (select |#valid| |~#x~0.base|) 1) (= 0 ~x$r_buff0_thd0~0) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 31699#[L737](and (= (select |#valid| |~#x~0.base|) 1) (= 0 ~x$r_buff0_thd0~0) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= ~x$r_buff1_thd0~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 31702#[L738](and (= (select |#valid| |~#x~0.base|) 1) (= 0 ~x$r_buff0_thd0~0) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= ~x$r_buff1_thd0~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 31705#[L739](and (= (select |#valid| |~#x~0.base|) 1) (= 0 ~x$r_buff0_thd0~0) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= ~x$r_buff1_thd0~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 31708#[L740](and (= (select |#valid| |~#x~0.base|) 1) (= 0 ~x$r_buff0_thd0~0) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= ~x$r_buff1_thd0~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 31711#[L741](and (= (select |#valid| |~#x~0.base|) 1) (= 0 ~x$r_buff0_thd0~0) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= ~x$r_buff1_thd0~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 31714#[L742](and (= (select |#valid| |~#x~0.base|) 1) (= 0 ~x$r_buff0_thd0~0) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= ~x$r_buff1_thd0~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0) (= 0 ~x$w_buff0~0) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 31717#[L743](and (= (select |#valid| |~#x~0.base|) 1) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= ~x$r_buff1_thd0~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0) (= 0 ~x$w_buff0~0) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 31720#[L744](and (= (select |#valid| |~#x~0.base|) 1) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= ~x$r_buff1_thd0~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0) (= 0 ~x$w_buff0~0) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 31723#[L746](and (= (select |#valid| |~#x~0.base|) 1) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= ~x$r_buff1_thd0~0 0) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0) (= 0 ~x$w_buff0~0) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 31726#[L747](and (= (select |#valid| |~#x~0.base|) 1) (= ~x$r_buff1_thd0~0 0) (= ~y~0 0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0) (= 0 ~x$w_buff0~0) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 31729#[L748](and (= (select |#valid| |~#x~0.base|) 1) (= ~x$r_buff1_thd0~0 0) (= ~y~0 0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0) (= 0 ~x$w_buff0~0) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 31732#[L749](and (= (select |#valid| |~#x~0.base|) 1) (= ~x$r_buff1_thd0~0 0) (= ~y~0 0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0) (= 0 ~x$w_buff0~0) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 31735#[L-1-2](and (= (select |#valid| |~#x~0.base|) 1) (= ~x$r_buff1_thd0~0 0) (= ~y~0 0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0) (= 0 ~x$w_buff0~0) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 31738#[L-1-3](and (= (select |#valid| |~#x~0.base|) 1) (= ~x$r_buff1_thd0~0 0) (= ~y~0 0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0) (= 0 ~x$w_buff0~0) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 31741#[L825](and (= (select |#valid| |~#x~0.base|) 1) (= ~x$r_buff1_thd0~0 0) (= ~y~0 0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0) (= 0 ~x$w_buff0~0) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 31744#[L825-1](and (= (select |#valid| |~#x~0.base|) 1) (not (= |~#x~0.base| |ULTIMATE.start_main_~#t2667~0.base|)) (= ~x$r_buff1_thd0~0 0) (= ~y~0 0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0) (= 0 ~x$w_buff0~0) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 31747#[L826](and (= (select |#valid| |~#x~0.base|) 1) (not (= |~#x~0.base| |ULTIMATE.start_main_~#t2667~0.base|)) (= ~x$r_buff1_thd0~0 0) (= ~y~0 0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0) (= 0 ~x$w_buff0~0) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 31750#[L826-1, P0ENTRY](and (= (select |#valid| |~#x~0.base|) 1) (not (= |~#x~0.base| |ULTIMATE.start_main_~#t2667~0.base|)) (= ~x$r_buff1_thd0~0 0) (= ~y~0 0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0) (= 0 ~x$w_buff0~0) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 31755#[L827, P0ENTRY](and (= (select |#valid| |~#x~0.base|) 1) (not (= |~#x~0.base| |ULTIMATE.start_main_~#t2667~0.base|)) (= ~x$r_buff1_thd0~0 0) (= ~y~0 0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0) (= 0 ~x$w_buff0~0) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 31761#[L827-1, P0ENTRY](and (= (select |#valid| |~#x~0.base|) 1) (not (= |~#x~0.base| |ULTIMATE.start_main_~#t2667~0.base|)) (= ~x$r_buff1_thd0~0 0) (= ~y~0 0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0) (= 0 ~x$w_buff0~0) (not (= |~#x~0.base| |ULTIMATE.start_main_~#t2668~0.base|)) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 31767#[L828, P0ENTRY](and (= (select |#valid| |~#x~0.base|) 1) (not (= |~#x~0.base| |ULTIMATE.start_main_~#t2667~0.base|)) (= ~x$r_buff1_thd0~0 0) (= ~y~0 0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0) (= 0 ~x$w_buff0~0) (not (= |~#x~0.base| |ULTIMATE.start_main_~#t2668~0.base|)) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 31773#[L828, L752](and (= (select |#valid| |~#x~0.base|) 1) (not (= |~#x~0.base| |ULTIMATE.start_main_~#t2667~0.base|)) (= ~x$r_buff1_thd0~0 0) (= ~y~0 0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0) (= 0 ~x$w_buff0~0) (not (= |~#x~0.base| |ULTIMATE.start_main_~#t2668~0.base|)) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 31777#[L828-1, P1ENTRY, L752](and (= (select |#valid| |~#x~0.base|) 1) (not (= |~#x~0.base| |ULTIMATE.start_main_~#t2667~0.base|)) (= ~x$r_buff1_thd0~0 0) (= ~y~0 0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0) (= 0 ~x$w_buff0~0) (not (= |~#x~0.base| |ULTIMATE.start_main_~#t2668~0.base|)) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 35446#[P1ENTRY, L752, L829](and (= (select |#valid| |~#x~0.base|) 1) (not (= |~#x~0.base| |ULTIMATE.start_main_~#t2667~0.base|)) (= ~x$r_buff1_thd0~0 0) (= ~y~0 0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0) (= 0 ~x$w_buff0~0) (not (= |~#x~0.base| |ULTIMATE.start_main_~#t2668~0.base|)) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 35450#[L780, L752, L829](and (= (select |#valid| |~#x~0.base|) 1) (not (= |~#x~0.base| |ULTIMATE.start_main_~#t2667~0.base|)) (= ~x$r_buff1_thd0~0 0) (= ~y~0 0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= ~__unbuffered_p1_EAX~0 0) (= ~__unbuffered_p1_EAX$read_delayed~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0) (= 0 ~x$w_buff0~0) (not (= |~#x~0.base| |ULTIMATE.start_main_~#t2668~0.base|)) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 37134#[L798, L752, L829](and (= (select |#valid| |~#x~0.base|) 1) (not (= |~#x~0.base| |ULTIMATE.start_main_~#t2667~0.base|)) (= ~__unbuffered_p1_EAX$read_delayed~0 1) (not (= ~__unbuffered_p1_EAX~0 1)) (= ~x$r_buff1_thd0~0 0) (= (select (select |#memory_int| ~__unbuffered_p1_EAX$read_delayed_var~0.base) ~__unbuffered_p1_EAX$read_delayed_var~0.offset) ~__unbuffered_p1_EAX~0) (= ~y~0 0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0) (= 0 ~x$w_buff0~0) (not (= |~#x~0.base| |ULTIMATE.start_main_~#t2668~0.base|)) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 37146#[L801, L752, L829](and (= (select |#valid| |~#x~0.base|) 1) (not (= |~#x~0.base| |ULTIMATE.start_main_~#t2667~0.base|)) (= ~__unbuffered_p1_EAX$read_delayed~0 1) (not (= ~__unbuffered_p1_EAX~0 1)) (= ~x$r_buff1_thd0~0 0) (= (select (select |#memory_int| ~__unbuffered_p1_EAX$read_delayed_var~0.base) ~__unbuffered_p1_EAX$read_delayed_var~0.offset) ~__unbuffered_p1_EAX~0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (= ~__unbuffered_p0_EAX~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0) (= 0 ~x$w_buff0~0) (not (= |~#x~0.base| |ULTIMATE.start_main_~#t2668~0.base|)) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 37162#[L754, L801, L829](and (= (select |#valid| |~#x~0.base|) 1) (not (= |~#x~0.base| |ULTIMATE.start_main_~#t2667~0.base|)) (= ~__unbuffered_p1_EAX$read_delayed~0 1) (not (= ~__unbuffered_p1_EAX~0 1)) (= ~x$r_buff1_thd0~0 0) (= (select (select |#memory_int| ~__unbuffered_p1_EAX$read_delayed_var~0.base) ~__unbuffered_p1_EAX$read_delayed_var~0.offset) ~__unbuffered_p1_EAX~0) (= 0 ~x$r_buff0_thd0~0) (= ~x$w_buff0_used~0 0) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0) (= 0 ~x$w_buff0~0) (not (= |~#x~0.base| |ULTIMATE.start_main_~#t2668~0.base|)) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 37180#[L765, L801, L829](and (= (select |#valid| |~#x~0.base|) 1) (= (select (select |#memory_int| ~__unbuffered_p1_EAX$read_delayed_var~0.base) ~__unbuffered_p1_EAX$read_delayed_var~0.offset) ~__unbuffered_p1_EAX~0) (= 0 ~x$r_buff0_thd0~0) (= ~__unbuffered_p1_EAX$read_delayed~0 1) (not (= ~__unbuffered_p1_EAX~0 1)) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= ~x$r_buff1_thd0~0 0) (= (select (select |#memory_int| |~#x~0.base|) |~#x~0.offset|) 0) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 37197#[L772, L801, L829](and (= (select |#valid| |~#x~0.base|) 1) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (= ~__unbuffered_cnt~0 0) (<= ~main$tmp_guard0~0 0)), 37211#[L775, L801, L829](and (= (select |#valid| |~#x~0.base|) 1) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (<= ~main$tmp_guard0~0 0)), 37225#[L801, P0FINAL, L829](and (= (select |#valid| |~#x~0.base|) 1) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (<= ~main$tmp_guard0~0 0)), 37241#[L801, P0EXIT, L829](and (= (select |#valid| |~#x~0.base|) 1) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (<= ~main$tmp_guard0~0 0)), 37255#[L808, P0EXIT, L829](and (= (select |#valid| |~#x~0.base|) 1) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (<= ~main$tmp_guard0~0 0)), 37264#[L811, P0EXIT, L829](and (= (select |#valid| |~#x~0.base|) 1) (< 0 (+ (div ~main$tmp_guard0~0 256) 1)) (<= ~main$tmp_guard0~0 0)), 37271#[L831, L811, P0EXIT](= (select |#valid| |~#x~0.base|) 1), 37277#[L832, L811, P0EXIT](= (select |#valid| |~#x~0.base|) 1), 37283#[L2, L811, P0EXIT](= (select |#valid| |~#x~0.base|) 1), 37291#[L3, L811, P0EXIT](= (select |#valid| |~#x~0.base|) 1), 37295#[L2-1, L811, P0EXIT](= (select |#valid| |~#x~0.base|) 1), 37316#[L839, L811, P0EXIT](= (select |#valid| |~#x~0.base|) 1), 37330#[L844, L811, P0EXIT](= (select |#valid| |~#x~0.base|) 1), 37344#[L845, L811, P0EXIT](= (select |#valid| |~#x~0.base|) 1), 37358#[L18, L811, P0EXIT](= (select |#valid| |~#x~0.base|) 1), 37370#[L18-1, L811, P0EXIT](= (select |#valid| |~#x~0.base|) 1), 37390#[L18-2, L811, P0EXIT](= (select |#valid| |~#x~0.base|) 1), 37412#[L17-5, L811, P0EXIT](= (select |#valid| |~#x~0.base|) 1), 37443#[L811, L17-7, P0EXIT](= (select |#valid| |~#x~0.base|) 1), 37479#[L811, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0EXIT](= (select |#valid| |~#x~0.base|) 1)] [2021-01-27 02:43:57,344 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4 [2021-01-27 02:43:57,344 INFO L429 AbstractCegarLoop]: === Iteration 6 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-01-27 02:43:57,345 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-01-27 02:43:57,345 INFO L82 PathProgramCache]: Analyzing trace with hash -1468381451, now seen corresponding path program 1 times [2021-01-27 02:43:57,345 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-01-27 02:43:57,345 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1775154186] [2021-01-27 02:43:57,346 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-01-27 02:43:57,472 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-01-27 02:43:57,473 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-01-27 02:43:57,584 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-01-27 02:43:57,584 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-01-27 02:43:57,646 INFO L173 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-01-27 02:43:57,646 INFO L605 BasicCegarLoop]: Counterexample might be feasible [2021-01-27 02:43:57,646 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5 [2021-01-27 02:43:57,855 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 27.01 02:43:57 BasicIcfg [2021-01-27 02:43:57,855 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2021-01-27 02:43:57,857 INFO L168 Benchmark]: Toolchain (without parser) took 105999.26 ms. Allocated memory was 302.0 MB in the beginning and 518.0 MB in the end (delta: 216.0 MB). Free memory was 275.9 MB in the beginning and 191.1 MB in the end (delta: 84.9 MB). Peak memory consumption was 302.1 MB. Max. memory is 16.0 GB. [2021-01-27 02:43:57,859 INFO L168 Benchmark]: CDTParser took 0.25 ms. Allocated memory is still 302.0 MB. Free memory was 273.1 MB in the beginning and 273.0 MB in the end (delta: 76.3 kB). There was no memory consumed. Max. memory is 16.0 GB. [2021-01-27 02:43:57,861 INFO L168 Benchmark]: CACSL2BoogieTranslator took 900.82 ms. Allocated memory is still 302.0 MB. Free memory was 274.9 MB in the beginning and 270.5 MB in the end (delta: 4.4 MB). Peak memory consumption was 28.7 MB. Max. memory is 16.0 GB. [2021-01-27 02:43:57,862 INFO L168 Benchmark]: Boogie Procedure Inliner took 120.71 ms. Allocated memory is still 302.0 MB. Free memory was 270.5 MB in the beginning and 268.3 MB in the end (delta: 2.2 MB). Peak memory consumption was 2.1 MB. Max. memory is 16.0 GB. [2021-01-27 02:43:57,863 INFO L168 Benchmark]: Boogie Preprocessor took 86.94 ms. Allocated memory is still 302.0 MB. Free memory was 268.3 MB in the beginning and 265.2 MB in the end (delta: 3.0 MB). Peak memory consumption was 2.1 MB. Max. memory is 16.0 GB. [2021-01-27 02:43:57,866 INFO L168 Benchmark]: RCFGBuilder took 4830.05 ms. Allocated memory was 302.0 MB in the beginning and 396.4 MB in the end (delta: 94.4 MB). Free memory was 265.2 MB in the beginning and 325.0 MB in the end (delta: -59.8 MB). Peak memory consumption was 165.7 MB. Max. memory is 16.0 GB. [2021-01-27 02:43:57,867 INFO L168 Benchmark]: TraceAbstraction took 100038.59 ms. Allocated memory was 396.4 MB in the beginning and 518.0 MB in the end (delta: 121.6 MB). Free memory was 324.0 MB in the beginning and 191.1 MB in the end (delta: 132.9 MB). Peak memory consumption was 254.5 MB. Max. memory is 16.0 GB. [2021-01-27 02:43:57,880 INFO L339 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.25 ms. Allocated memory is still 302.0 MB. Free memory was 273.1 MB in the beginning and 273.0 MB in the end (delta: 76.3 kB). There was no memory consumed. Max. memory is 16.0 GB. * CACSL2BoogieTranslator took 900.82 ms. Allocated memory is still 302.0 MB. Free memory was 274.9 MB in the beginning and 270.5 MB in the end (delta: 4.4 MB). Peak memory consumption was 28.7 MB. Max. memory is 16.0 GB. * Boogie Procedure Inliner took 120.71 ms. Allocated memory is still 302.0 MB. Free memory was 270.5 MB in the beginning and 268.3 MB in the end (delta: 2.2 MB). Peak memory consumption was 2.1 MB. Max. memory is 16.0 GB. * Boogie Preprocessor took 86.94 ms. Allocated memory is still 302.0 MB. Free memory was 268.3 MB in the beginning and 265.2 MB in the end (delta: 3.0 MB). Peak memory consumption was 2.1 MB. Max. memory is 16.0 GB. * RCFGBuilder took 4830.05 ms. Allocated memory was 302.0 MB in the beginning and 396.4 MB in the end (delta: 94.4 MB). Free memory was 265.2 MB in the beginning and 325.0 MB in the end (delta: -59.8 MB). Peak memory consumption was 165.7 MB. Max. memory is 16.0 GB. * TraceAbstraction took 100038.59 ms. Allocated memory was 396.4 MB in the beginning and 518.0 MB in the end (delta: 121.6 MB). Free memory was 324.0 MB in the beginning and 191.1 MB in the end (delta: 132.9 MB). Peak memory consumption was 254.5 MB. Max. memory is 16.0 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 17]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L708] 0 int __unbuffered_cnt = 0; VAL [__unbuffered_cnt=0] [L710] 0 int __unbuffered_p0_EAX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0] [L712] 0 int __unbuffered_p1_EAX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0] [L713] 0 _Bool __unbuffered_p1_EAX$flush_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0] [L714] 0 int __unbuffered_p1_EAX$mem_tmp; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0] [L715] 0 _Bool __unbuffered_p1_EAX$r_buff0_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0] [L716] 0 _Bool __unbuffered_p1_EAX$r_buff0_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0] [L717] 0 _Bool __unbuffered_p1_EAX$r_buff0_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0] [L718] 0 _Bool __unbuffered_p1_EAX$r_buff1_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0] [L719] 0 _Bool __unbuffered_p1_EAX$r_buff1_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0] [L720] 0 _Bool __unbuffered_p1_EAX$r_buff1_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0] [L721] 0 _Bool __unbuffered_p1_EAX$read_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0] [L722] 0 int *__unbuffered_p1_EAX$read_delayed_var; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}] [L723] 0 int __unbuffered_p1_EAX$w_buff0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0] [L724] 0 _Bool __unbuffered_p1_EAX$w_buff0_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0] [L725] 0 int __unbuffered_p1_EAX$w_buff1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0] [L726] 0 _Bool __unbuffered_p1_EAX$w_buff1_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0] [L727] 0 _Bool main$tmp_guard0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0] [L728] 0 _Bool main$tmp_guard1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0] [L730] 0 int x = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={7:0}] [L731] 0 _Bool x$flush_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={7:0}, x$flush_delayed=0] [L732] 0 int x$mem_tmp; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={7:0}, x$flush_delayed=0, x$mem_tmp=0] [L733] 0 _Bool x$r_buff0_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={7:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0] [L734] 0 _Bool x$r_buff0_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={7:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0] [L735] 0 _Bool x$r_buff0_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={7:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0] [L736] 0 _Bool x$r_buff1_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={7:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0] [L737] 0 _Bool x$r_buff1_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={7:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0] [L738] 0 _Bool x$r_buff1_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={7:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0] [L739] 0 _Bool x$read_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={7:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0] [L740] 0 int *x$read_delayed_var; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={7:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}] [L741] 0 int x$w_buff0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={7:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0] [L742] 0 _Bool x$w_buff0_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={7:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0] [L743] 0 int x$w_buff1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={7:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0] [L744] 0 _Bool x$w_buff1_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={7:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0] [L746] 0 int y = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={7:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L747] 0 _Bool weak$$choice0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, x={7:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L748] 0 _Bool weak$$choice1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, x={7:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L749] 0 _Bool weak$$choice2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x={7:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L825] 0 pthread_t t2667; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x={7:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L826] FCALL, FORK 0 pthread_create(&t2667, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x={7:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L827] 0 pthread_t t2668; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x={7:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L828] FCALL, FORK 0 pthread_create(&t2668, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x={7:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L781] 2 weak$$choice0 = __VERIFIER_nondet_bool() [L782] 2 weak$$choice2 = __VERIFIER_nondet_bool() [L783] 2 x$flush_delayed = weak$$choice2 [L784] EXPR 2 \read(x) [L784] 2 x$mem_tmp = x [L785] 2 weak$$choice1 = __VERIFIER_nondet_bool() [L786] EXPR 2 !x$w_buff0_used ? x : (x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (weak$$choice0 ? x : (weak$$choice1 ? x$w_buff0 : x$w_buff1)) : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (weak$$choice0 ? x$w_buff1 : x$w_buff0) : (weak$$choice0 ? x$w_buff0 : x)))) [L786] EXPR 2 \read(x) [L786] EXPR 2 !x$w_buff0_used ? x : (x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (weak$$choice0 ? x : (weak$$choice1 ? x$w_buff0 : x$w_buff1)) : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (weak$$choice0 ? x$w_buff1 : x$w_buff0) : (weak$$choice0 ? x$w_buff0 : x)))) [L786] 2 x = !x$w_buff0_used ? x : (x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (weak$$choice0 ? x : (weak$$choice1 ? x$w_buff0 : x$w_buff1)) : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (weak$$choice0 ? x$w_buff1 : x$w_buff0) : (weak$$choice0 ? x$w_buff0 : x)))) [L787] EXPR 2 weak$$choice2 ? x$w_buff0 : (!x$w_buff0_used ? x$w_buff0 : (x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? x$w_buff0 : x$w_buff0)))) [L787] EXPR 2 !x$w_buff0_used ? x$w_buff0 : (x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? x$w_buff0 : x$w_buff0))) [L787] EXPR 2 weak$$choice2 ? x$w_buff0 : (!x$w_buff0_used ? x$w_buff0 : (x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? x$w_buff0 : x$w_buff0)))) [L787] 2 x$w_buff0 = weak$$choice2 ? x$w_buff0 : (!x$w_buff0_used ? x$w_buff0 : (x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? x$w_buff0 : x$w_buff0)))) [L788] EXPR 2 weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff1 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? x$w_buff1 : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? x$w_buff1 : x$w_buff1)))) [L788] EXPR 2 !x$w_buff0_used ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff1 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? x$w_buff1 : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? x$w_buff1 : x$w_buff1))) [L788] EXPR 2 weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff1 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? x$w_buff1 : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? x$w_buff1 : x$w_buff1)))) [L788] 2 x$w_buff1 = weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff1 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? x$w_buff1 : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? x$w_buff1 : x$w_buff1)))) [L789] EXPR 2 weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? weak$$choice0 || !weak$$choice1 : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? weak$$choice0 : weak$$choice0)))) [L789] EXPR 2 !x$w_buff0_used ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? weak$$choice0 || !weak$$choice1 : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? weak$$choice0 : weak$$choice0))) [L789] EXPR 2 weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? weak$$choice0 || !weak$$choice1 : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? weak$$choice0 : weak$$choice0)))) [L789] 2 x$w_buff0_used = weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? weak$$choice0 || !weak$$choice1 : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? weak$$choice0 : weak$$choice0)))) [L790] EXPR 2 weak$$choice2 ? x$w_buff1_used : (!x$w_buff0_used ? x$w_buff1_used : (x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? weak$$choice0 : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)))) [L790] EXPR 2 !x$w_buff0_used ? x$w_buff1_used : (x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? weak$$choice0 : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (_Bool)0 : (_Bool)0))) [L790] EXPR 2 weak$$choice2 ? x$w_buff1_used : (!x$w_buff0_used ? x$w_buff1_used : (x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? weak$$choice0 : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)))) [L790] 2 x$w_buff1_used = weak$$choice2 ? x$w_buff1_used : (!x$w_buff0_used ? x$w_buff1_used : (x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? weak$$choice0 : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)))) [L791] EXPR 2 weak$$choice2 ? x$r_buff0_thd2 : (!x$w_buff0_used ? x$r_buff0_thd2 : (x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? x$r_buff0_thd2 : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)))) [L791] EXPR 2 !x$w_buff0_used ? x$r_buff0_thd2 : (x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? x$r_buff0_thd2 : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (_Bool)0 : (_Bool)0))) [L791] EXPR 2 weak$$choice2 ? x$r_buff0_thd2 : (!x$w_buff0_used ? x$r_buff0_thd2 : (x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? x$r_buff0_thd2 : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)))) [L791] 2 x$r_buff0_thd2 = weak$$choice2 ? x$r_buff0_thd2 : (!x$w_buff0_used ? x$r_buff0_thd2 : (x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? x$r_buff0_thd2 : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)))) [L792] EXPR 2 weak$$choice2 ? x$r_buff1_thd2 : (!x$w_buff0_used ? x$r_buff1_thd2 : (x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (weak$$choice0 ? x$r_buff1_thd2 : (_Bool)0) : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)))) [L792] EXPR 2 !x$w_buff0_used ? x$r_buff1_thd2 : (x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (weak$$choice0 ? x$r_buff1_thd2 : (_Bool)0) : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (_Bool)0 : (_Bool)0))) [L792] EXPR 2 weak$$choice2 ? x$r_buff1_thd2 : (!x$w_buff0_used ? x$r_buff1_thd2 : (x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (weak$$choice0 ? x$r_buff1_thd2 : (_Bool)0) : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)))) [L792] 2 x$r_buff1_thd2 = weak$$choice2 ? x$r_buff1_thd2 : (!x$w_buff0_used ? x$r_buff1_thd2 : (x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (weak$$choice0 ? x$r_buff1_thd2 : (_Bool)0) : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)))) [L793] 2 __unbuffered_p1_EAX$read_delayed = (_Bool)1 [L794] 2 __unbuffered_p1_EAX$read_delayed_var = &x [L795] EXPR 2 \read(x) [L795] 2 __unbuffered_p1_EAX = x [L796] EXPR 2 x$flush_delayed ? x$mem_tmp : x [L796] EXPR 2 \read(x) [L796] EXPR 2 x$flush_delayed ? x$mem_tmp : x [L796] 2 x = x$flush_delayed ? x$mem_tmp : x [L797] 2 x$flush_delayed = (_Bool)0 VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={7:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice1=255, weak$$choice2=0, x={7:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L800] 2 y = 1 VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={7:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice1=255, weak$$choice2=0, x={7:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L753] 1 __unbuffered_p0_EAX = y VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={7:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice1=255, weak$$choice2=0, x={7:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L756] 1 x$w_buff1 = x$w_buff0 [L757] 1 x$w_buff0 = 1 [L758] 1 x$w_buff1_used = x$w_buff0_used [L759] 1 x$w_buff0_used = (_Bool)1 [L18] COND FALSE 1 !(!expression) [L761] 1 x$r_buff1_thd0 = x$r_buff0_thd0 [L762] 1 x$r_buff1_thd1 = x$r_buff0_thd1 [L763] 1 x$r_buff1_thd2 = x$r_buff0_thd2 [L764] 1 x$r_buff0_thd1 = (_Bool)1 VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={7:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice1=255, weak$$choice2=0, x={7:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1] [L767] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x) [L767] 1 x = x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x) [L768] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$w_buff0_used [L768] 1 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$w_buff0_used [L769] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$w_buff1_used [L769] 1 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$w_buff1_used [L770] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$r_buff0_thd1 [L770] 1 x$r_buff0_thd1 = x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$r_buff0_thd1 [L771] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$r_buff1_thd1 [L771] 1 x$r_buff1_thd1 = x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$r_buff1_thd1 [L774] 1 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={7:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice1=255, weak$$choice2=0, x={7:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L776] 1 return 0; VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={7:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice1=255, weak$$choice2=0, x={7:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L803] EXPR 2 x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x) [L803] EXPR 2 x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x [L803] EXPR 2 \read(x) [L803] EXPR 2 x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x [L803] EXPR 2 x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x) [L803] 2 x = x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x) [L804] EXPR 2 x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$w_buff0_used [L804] 2 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$w_buff0_used [L805] EXPR 2 x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$w_buff1_used [L805] 2 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$w_buff1_used [L806] EXPR 2 x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$r_buff0_thd2 [L806] 2 x$r_buff0_thd2 = x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$r_buff0_thd2 [L807] EXPR 2 x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$r_buff1_thd2 [L807] 2 x$r_buff1_thd2 = x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$r_buff1_thd2 [L810] 2 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={7:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice1=255, weak$$choice2=0, x={7:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L830] 0 main$tmp_guard0 = __unbuffered_cnt == 2 VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={7:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice1=255, weak$$choice2=0, x={7:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L3] COND FALSE 0 !(!cond) VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={7:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice1=255, weak$$choice2=0, x={7:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L834] EXPR 0 x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x) [L834] EXPR 0 x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x [L834] EXPR 0 \read(x) [L834] EXPR 0 x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x [L834] EXPR 0 x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x) [L834] 0 x = x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x) [L835] EXPR 0 x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used [L835] 0 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used [L836] EXPR 0 x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$w_buff1_used [L836] 0 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$w_buff1_used [L837] EXPR 0 x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$r_buff0_thd0 [L837] 0 x$r_buff0_thd0 = x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$r_buff0_thd0 [L838] EXPR 0 x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$r_buff1_thd0 [L838] 0 x$r_buff1_thd0 = x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$r_buff1_thd0 [L841] 0 weak$$choice1 = __VERIFIER_nondet_bool() [L842] EXPR 0 __unbuffered_p1_EAX$read_delayed ? (weak$$choice1 ? *__unbuffered_p1_EAX$read_delayed_var : __unbuffered_p1_EAX) : __unbuffered_p1_EAX [L842] EXPR 0 weak$$choice1 ? *__unbuffered_p1_EAX$read_delayed_var : __unbuffered_p1_EAX [L842] EXPR 0 \read(*__unbuffered_p1_EAX$read_delayed_var) [L842] EXPR 0 weak$$choice1 ? *__unbuffered_p1_EAX$read_delayed_var : __unbuffered_p1_EAX [L842] EXPR 0 __unbuffered_p1_EAX$read_delayed ? (weak$$choice1 ? *__unbuffered_p1_EAX$read_delayed_var : __unbuffered_p1_EAX) : __unbuffered_p1_EAX [L842] 0 __unbuffered_p1_EAX = __unbuffered_p1_EAX$read_delayed ? (weak$$choice1 ? *__unbuffered_p1_EAX$read_delayed_var : __unbuffered_p1_EAX) : __unbuffered_p1_EAX [L843] 0 main$tmp_guard1 = !(__unbuffered_p0_EAX == 1 && __unbuffered_p1_EAX == 1) VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={7:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice1=1, weak$$choice2=0, x={7:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L18] COND TRUE 0 !expression VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={7:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice1=1, weak$$choice2=0, x={7:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L17] COND FALSE 0 !(0) VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={7:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice1=1, weak$$choice2=0, x={7:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L17] 0 __assert_fail ("0", "thin000_power.opt.c", 8, __extension__ __PRETTY_FUNCTION__) VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={7:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice1=1, weak$$choice2=0, x={7:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] - StatisticsResult: Ultimate Automizer benchmark data CFG has 3 procedures, 99 locations, 2 error locations. Started 1 CEGAR loops. VerificationResult: UNSAFE, OverallTime: 99.5s, OverallIterations: 6, TraceHistogramMax: 0, AutomataDifference: 0.0s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, HoareTripleCheckerStatistics: No data available, PredicateUnifierStatistics: No data available, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=0occurred in iteration=0, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: No data available, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.6s SatisfiabilityAnalysisTime, 1.8s InterpolantComputationTime, 447 NumberOfCodeBlocks, 447 NumberOfCodeBlocksAsserted, 6 NumberOfCheckSat, 360 ConstructedInterpolants, 0 QuantifiedInterpolants, 133332 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 5 InterpolantComputations, 5 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...