./Ultimate.py --spec ../../../trunk/examples/svcomp/properties/unreach-call.prp --file ../../../trunk/examples/svcomp/hardware-verification-bv/btor2c-lazyMod.vis_QF_BV_fru32_p2.c --full-output --witness-type violation_witness --validate ./svcomp-yaml-violation-generation.2024-08-01_14-26-22.files/Default/btor2c-lazyMod.vis_QF_BV_fru32_p2.yml/witness.yml --preprocessor.replace.while.statements.and.if-then-else.statements false --icfgbuilder.size.of.a.code.block SequenceOfStatements --architecture 64bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version 26998269 Calling Ultimate with: /root/.sdkman/candidates/java/current/bin/java -Dosgi.configuration.area=/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/config -Xmx15G -Xms4m -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/AutomizerReachWitnessValidation.xml -i ../../../trunk/examples/svcomp/hardware-verification-bv/btor2c-lazyMod.vis_QF_BV_fru32_p2.c ./svcomp-yaml-violation-generation.2024-08-01_14-26-22.files/Default/btor2c-lazyMod.vis_QF_BV_fru32_p2.yml/witness.yml -s /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-64bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --traceabstraction.compute.hoare.annotation.of.negated.interpolant.automaton,.abstraction.and.cfg false --preprocessor.replace.while.statements.and.if-then-else.statements false --icfgbuilder.size.of.a.code.block SequenceOfStatements --- Real Ultimate output --- This is Ultimate 0.2.4-wip.fs.yaml-violation-witnesses-2699826-m [2024-08-14 14:27:34,778 INFO L188 SettingsManager]: Resetting all preferences to default values... [2024-08-14 14:27:34,844 INFO L114 SettingsManager]: Loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-64bit-Automizer_Default.epf [2024-08-14 14:27:34,851 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2024-08-14 14:27:34,851 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2024-08-14 14:27:34,882 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2024-08-14 14:27:34,883 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2024-08-14 14:27:34,883 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2024-08-14 14:27:34,884 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2024-08-14 14:27:34,888 INFO L153 SettingsManager]: * Use memory slicer=true [2024-08-14 14:27:34,888 INFO L151 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2024-08-14 14:27:34,889 INFO L153 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2024-08-14 14:27:34,889 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2024-08-14 14:27:34,889 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2024-08-14 14:27:34,890 INFO L153 SettingsManager]: * Use SBE=true [2024-08-14 14:27:34,890 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2024-08-14 14:27:34,890 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2024-08-14 14:27:34,890 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2024-08-14 14:27:34,891 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2024-08-14 14:27:34,891 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2024-08-14 14:27:34,893 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2024-08-14 14:27:34,894 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2024-08-14 14:27:34,894 INFO L153 SettingsManager]: * Allow undefined functions=false [2024-08-14 14:27:34,895 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2024-08-14 14:27:34,895 INFO L153 SettingsManager]: * Use constant arrays=true [2024-08-14 14:27:34,895 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2024-08-14 14:27:34,895 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-08-14 14:27:34,896 INFO L153 SettingsManager]: * Only consider context switches at boundaries of atomic blocks=true [2024-08-14 14:27:34,896 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2024-08-14 14:27:34,896 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2024-08-14 14:27:34,897 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2024-08-14 14:27:34,897 INFO L153 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2024-08-14 14:27:34,897 INFO L153 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopHeads [2024-08-14 14:27:34,897 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2024-08-14 14:27:34,897 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2024-08-14 14:27:34,898 INFO L153 SettingsManager]: * Apply one-shot large block encoding in concurrent analysis=false [2024-08-14 14:27:34,898 INFO L153 SettingsManager]: * Automaton type used in concurrency analysis=PETRI_NET [2024-08-14 14:27:34,899 INFO L153 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2024-08-14 14:27:34,899 INFO L153 SettingsManager]: * Order on configurations for Petri net unfoldings=DBO [2024-08-14 14:27:34,899 INFO L153 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2024-08-14 14:27:34,900 INFO L153 SettingsManager]: * Looper check in Petri net analysis=SEMANTIC WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.boogie.preprocessor: Replace while statements and if-then-else statements -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder: Size of a code block -> SequenceOfStatements [2024-08-14 14:27:35,192 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2024-08-14 14:27:35,211 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2024-08-14 14:27:35,216 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2024-08-14 14:27:35,217 INFO L270 PluginConnector]: Initializing CDTParser... [2024-08-14 14:27:35,217 INFO L274 PluginConnector]: CDTParser initialized [2024-08-14 14:27:35,219 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/hardware-verification-bv/btor2c-lazyMod.vis_QF_BV_fru32_p2.c [2024-08-14 14:27:36,602 INFO L533 CDTParser]: Created temporary CDT project at NULL [2024-08-14 14:27:36,818 INFO L384 CDTParser]: Found 1 translation units. [2024-08-14 14:27:36,819 INFO L180 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/hardware-verification-bv/btor2c-lazyMod.vis_QF_BV_fru32_p2.c [2024-08-14 14:27:36,832 INFO L427 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/ef1078890/a470cdf73b174273a27a4a2f5228d69a/FLAG2354c96c8 [2024-08-14 14:27:36,846 INFO L435 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/ef1078890/a470cdf73b174273a27a4a2f5228d69a [2024-08-14 14:27:36,849 INFO L270 PluginConnector]: Initializing Witness Parser... [2024-08-14 14:27:36,850 INFO L274 PluginConnector]: Witness Parser initialized [2024-08-14 14:27:36,851 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/./svcomp-yaml-violation-generation.2024-08-01_14-26-22.files/Default/btor2c-lazyMod.vis_QF_BV_fru32_p2.yml/witness.yml [2024-08-14 14:27:36,913 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2024-08-14 14:27:36,914 INFO L133 ToolchainWalker]: Walking toolchain with 4 elements. [2024-08-14 14:27:36,916 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2024-08-14 14:27:36,916 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2024-08-14 14:27:36,921 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2024-08-14 14:27:36,921 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 14.08 02:27:36" (1/2) ... [2024-08-14 14:27:36,922 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@b8c0c59 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.08 02:27:36, skipping insertion in model container [2024-08-14 14:27:36,922 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 14.08 02:27:36" (1/2) ... [2024-08-14 14:27:36,923 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.CACSL2BoogieTranslatorObserver@a8506de and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.08 02:27:36, skipping insertion in model container [2024-08-14 14:27:36,923 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "witness.yml de.uni_freiburg.informatik.ultimate.witnessparser VIOLATION_WITNESS 14.08 02:27:36" (2/2) ... [2024-08-14 14:27:36,924 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@b8c0c59 and model type witness.yml de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator VIOLATION_WITNESS 14.08 02:27:36, skipping insertion in model container [2024-08-14 14:27:36,924 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "witness.yml de.uni_freiburg.informatik.ultimate.witnessparser VIOLATION_WITNESS 14.08 02:27:36" (2/2) ... [2024-08-14 14:27:36,963 INFO L175 MainTranslator]: Built tables and reachable declarations [2024-08-14 14:27:37,112 WARN L247 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/hardware-verification-bv/btor2c-lazyMod.vis_QF_BV_fru32_p2.c[1258,1271] [2024-08-14 14:27:37,232 INFO L207 PostProcessor]: Analyzing one entry point: main [2024-08-14 14:27:37,247 INFO L200 MainTranslator]: Completed pre-run [2024-08-14 14:27:37,261 WARN L247 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/hardware-verification-bv/btor2c-lazyMod.vis_QF_BV_fru32_p2.c[1258,1271] [2024-08-14 14:27:37,409 INFO L207 PostProcessor]: Analyzing one entry point: main [2024-08-14 14:27:37,461 INFO L204 MainTranslator]: Completed translation [2024-08-14 14:27:37,462 INFO L201 PluginConnector]: Adding new model witness.yml de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator VIOLATION_WITNESS 14.08 02:27:37 WrapperNode [2024-08-14 14:27:37,462 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2024-08-14 14:27:37,463 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2024-08-14 14:27:37,464 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2024-08-14 14:27:37,464 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2024-08-14 14:27:37,476 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "witness.yml de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator VIOLATION_WITNESS 14.08 02:27:37" (1/1) ... [2024-08-14 14:27:37,476 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "witness.yml de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator VIOLATION_WITNESS 14.08 02:27:37" (1/1) ... [2024-08-14 14:27:37,503 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "witness.yml de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator VIOLATION_WITNESS 14.08 02:27:37" (1/1) ... [2024-08-14 14:27:37,567 INFO L175 MemorySlicer]: Split 2 memory accesses to 1 slices as follows [2]. 100 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2]. The 0 writes are split as follows [0]. [2024-08-14 14:27:37,567 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "witness.yml de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator VIOLATION_WITNESS 14.08 02:27:37" (1/1) ... [2024-08-14 14:27:37,567 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "witness.yml de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator VIOLATION_WITNESS 14.08 02:27:37" (1/1) ... [2024-08-14 14:27:37,592 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "witness.yml de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator VIOLATION_WITNESS 14.08 02:27:37" (1/1) ... [2024-08-14 14:27:37,601 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "witness.yml de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator VIOLATION_WITNESS 14.08 02:27:37" (1/1) ... [2024-08-14 14:27:37,609 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "witness.yml de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator VIOLATION_WITNESS 14.08 02:27:37" (1/1) ... [2024-08-14 14:27:37,618 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2024-08-14 14:27:37,619 INFO L112 PluginConnector]: ------------------------IcfgBuilder---------------------------- [2024-08-14 14:27:37,619 INFO L270 PluginConnector]: Initializing IcfgBuilder... [2024-08-14 14:27:37,619 INFO L274 PluginConnector]: IcfgBuilder initialized [2024-08-14 14:27:37,620 INFO L184 PluginConnector]: Executing the observer IcfgBuilderObserver from plugin IcfgBuilder for "witness.yml de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator VIOLATION_WITNESS 14.08 02:27:37" (1/1) ... [2024-08-14 14:27:37,625 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-08-14 14:27:37,644 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-08-14 14:27:37,662 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-08-14 14:27:37,665 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2024-08-14 14:27:37,708 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2024-08-14 14:27:37,708 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2024-08-14 14:27:37,708 INFO L138 BoogieDeclarations]: Found implementation of procedure reach_error [2024-08-14 14:27:37,708 INFO L138 BoogieDeclarations]: Found implementation of procedure __VERIFIER_assert [2024-08-14 14:27:37,708 INFO L138 BoogieDeclarations]: Found implementation of procedure assume_abort_if_not [2024-08-14 14:27:37,708 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2024-08-14 14:27:37,708 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_uchar [2024-08-14 14:27:37,709 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_ushort [2024-08-14 14:27:37,709 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_uint [2024-08-14 14:27:37,709 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_ulong [2024-08-14 14:27:37,709 INFO L130 BoogieDeclarations]: Found specification of procedure abort [2024-08-14 14:27:37,709 INFO L130 BoogieDeclarations]: Found specification of procedure __assert_fail [2024-08-14 14:27:37,709 INFO L130 BoogieDeclarations]: Found specification of procedure reach_error [2024-08-14 14:27:37,709 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2024-08-14 14:27:37,709 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_assert [2024-08-14 14:27:37,709 INFO L130 BoogieDeclarations]: Found specification of procedure assume_abort_if_not [2024-08-14 14:27:37,709 INFO L130 BoogieDeclarations]: Found specification of procedure main [2024-08-14 14:27:37,710 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2024-08-14 14:27:37,710 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#0 [2024-08-14 14:27:37,710 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2024-08-14 14:27:37,710 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#0 [2024-08-14 14:27:37,710 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#0 [2024-08-14 14:27:37,710 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2024-08-14 14:27:37,857 INFO L273 CfgBuilder]: Building ICFG [2024-08-14 14:27:37,859 INFO L304 CfgBuilder]: Building CFG for each procedure with an implementation [2024-08-14 14:27:38,835 INFO L? ?]: Removed 454 outVars from TransFormulas that were not future-live. [2024-08-14 14:27:38,836 INFO L327 CfgBuilder]: Performing block encoding [2024-08-14 14:27:38,853 INFO L349 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2024-08-14 14:27:38,854 INFO L354 CfgBuilder]: Removed 0 assume(true) statements. [2024-08-14 14:27:38,854 INFO L201 PluginConnector]: Adding new model witness.yml de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 14.08 02:27:38 BoogieIcfgContainer [2024-08-14 14:27:38,855 INFO L131 PluginConnector]: ------------------------ END IcfgBuilder---------------------------- [2024-08-14 14:27:38,857 INFO L112 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2024-08-14 14:27:38,858 INFO L270 PluginConnector]: Initializing TraceAbstraction... [2024-08-14 14:27:38,861 INFO L274 PluginConnector]: TraceAbstraction initialized [2024-08-14 14:27:38,861 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 14.08 02:27:36" (1/4) ... [2024-08-14 14:27:38,862 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@12afb915 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 14.08 02:27:38, skipping insertion in model container [2024-08-14 14:27:38,862 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "witness.yml de.uni_freiburg.informatik.ultimate.witnessparser VIOLATION_WITNESS 14.08 02:27:36" (2/4) ... [2024-08-14 14:27:38,863 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@12afb915 and model type witness.yml de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction VIOLATION_WITNESS 14.08 02:27:38, skipping insertion in model container [2024-08-14 14:27:38,863 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "witness.yml de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator VIOLATION_WITNESS 14.08 02:27:37" (3/4) ... [2024-08-14 14:27:38,863 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@12afb915 and model type witness.yml de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction VIOLATION_WITNESS 14.08 02:27:38, skipping insertion in model container [2024-08-14 14:27:38,863 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "witness.yml de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 14.08 02:27:38" (4/4) ... [2024-08-14 14:27:38,865 INFO L119 eAbstractionObserver]: Analyzing ICFG btor2c-lazyMod.vis_QF_BV_fru32_p2.c [2024-08-14 14:27:38,865 WARN L130 eAbstractionObserver]: Found a witness in the YAML format. I will only consider traces that are accepted by the witness [2024-08-14 14:27:38,885 INFO L221 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2024-08-14 14:27:38,885 INFO L180 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2024-08-14 14:27:38,921 INFO L92 WitnessUtils]: Constructing product of automaton with 198 states and violation witness of the following lengths: [6] [2024-08-14 14:27:38,926 INFO L82 GeneralOperation]: Start removeDeadEnds. Operand has 198 states, 190 states have (on average 1.6368421052631579) internal successors, (311), 191 states have internal predecessors, (311), 3 states have call successors, (3), 3 states have call predecessors, (3), 3 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-08-14 14:27:39,251 INFO L88 GeneralOperation]: Finished removeDeadEnds. Reduced from 720 states to 694 states. [2024-08-14 14:27:39,272 INFO L356 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2024-08-14 14:27:39,281 INFO L357 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=false, mAutomataTypeConcurrency=PETRI_NET, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopHeads, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@c25604d, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2024-08-14 14:27:39,283 INFO L358 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2024-08-14 14:27:39,284 INFO L276 IsEmpty]: Start isEmpty. Operand 694 states. [2024-08-14 14:27:39,300 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 209 [2024-08-14 14:27:39,300 INFO L187 NwaCegarLoop]: Found error trace [2024-08-14 14:27:39,301 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-08-14 14:27:39,302 INFO L420 AbstractCegarLoop]: === Iteration 1 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-08-14 14:27:39,306 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-08-14 14:27:39,306 INFO L85 PathProgramCache]: Analyzing trace with hash 155171138, now seen corresponding path program 1 times [2024-08-14 14:27:39,316 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-08-14 14:27:39,316 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1280942296] [2024-08-14 14:27:39,316 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-08-14 14:27:39,317 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-08-14 14:27:39,841 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-08-14 14:27:41,145 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2024-08-14 14:27:41,147 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-08-14 14:27:41,153 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 115 [2024-08-14 14:27:41,159 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-08-14 14:27:41,164 INFO L134 CoverageAnalysis]: Checked inductivity of 76 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 72 trivial. 0 not checked. [2024-08-14 14:27:41,165 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-08-14 14:27:41,165 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1280942296] [2024-08-14 14:27:41,166 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1280942296] provided 1 perfect and 0 imperfect interpolant sequences [2024-08-14 14:27:41,166 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-08-14 14:27:41,166 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-08-14 14:27:41,168 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [888034695] [2024-08-14 14:27:41,169 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-08-14 14:27:41,173 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-08-14 14:27:41,175 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-08-14 14:27:41,207 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-08-14 14:27:41,208 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2024-08-14 14:27:41,210 INFO L87 Difference]: Start difference. First operand 694 states. Second operand has 6 states, 5 states have (on average 26.2) internal successors, (131), 5 states have internal predecessors, (131), 2 states have call successors, (4), 2 states have call predecessors, (4), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) [2024-08-14 14:27:41,317 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-08-14 14:27:41,318 INFO L93 Difference]: Finished difference Result 479 states and 773 transitions. [2024-08-14 14:27:41,319 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-08-14 14:27:41,321 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 5 states have (on average 26.2) internal successors, (131), 5 states have internal predecessors, (131), 2 states have call successors, (4), 2 states have call predecessors, (4), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) Word has length 208 [2024-08-14 14:27:41,322 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-08-14 14:27:41,324 INFO L225 Difference]: With dead ends: 479 [2024-08-14 14:27:41,324 INFO L226 Difference]: Without dead ends: 478 [2024-08-14 14:27:41,326 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 6 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2024-08-14 14:27:41,330 INFO L413 NwaCegarLoop]: 306 mSDtfsCounter, 28 mSDsluCounter, 1220 mSDsCounter, 0 mSdLazyCounter, 23 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 29 SdHoareTripleChecker+Valid, 1526 SdHoareTripleChecker+Invalid, 23 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 23 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-08-14 14:27:41,331 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [29 Valid, 1526 Invalid, 23 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 23 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-08-14 14:27:41,349 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 478 states. [2024-08-14 14:27:41,393 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 478 to 306. [2024-08-14 14:27:41,398 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 306 states, 298 states have (on average 1.6409395973154361) internal successors, (489), 299 states have internal predecessors, (489), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) [2024-08-14 14:27:41,405 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 306 states to 306 states and 496 transitions. [2024-08-14 14:27:41,407 INFO L78 Accepts]: Start accepts. Automaton has 306 states and 496 transitions. Word has length 208 [2024-08-14 14:27:41,408 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-08-14 14:27:41,411 INFO L495 AbstractCegarLoop]: Abstraction has 306 states and 496 transitions. [2024-08-14 14:27:41,411 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 5 states have (on average 26.2) internal successors, (131), 5 states have internal predecessors, (131), 2 states have call successors, (4), 2 states have call predecessors, (4), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) [2024-08-14 14:27:41,411 INFO L276 IsEmpty]: Start isEmpty. Operand 306 states and 496 transitions. [2024-08-14 14:27:41,414 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 210 [2024-08-14 14:27:41,414 INFO L187 NwaCegarLoop]: Found error trace [2024-08-14 14:27:41,415 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-08-14 14:27:41,415 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2024-08-14 14:27:41,419 INFO L420 AbstractCegarLoop]: === Iteration 2 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-08-14 14:27:41,420 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-08-14 14:27:41,420 INFO L85 PathProgramCache]: Analyzing trace with hash -1323925125, now seen corresponding path program 1 times [2024-08-14 14:27:41,420 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-08-14 14:27:41,420 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [260487456] [2024-08-14 14:27:41,420 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-08-14 14:27:41,421 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-08-14 14:27:41,608 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-08-14 14:27:42,166 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2024-08-14 14:27:42,168 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-08-14 14:27:42,170 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 115 [2024-08-14 14:27:42,172 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-08-14 14:27:42,175 INFO L134 CoverageAnalysis]: Checked inductivity of 76 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 70 trivial. 0 not checked. [2024-08-14 14:27:42,175 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-08-14 14:27:42,175 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [260487456] [2024-08-14 14:27:42,176 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [260487456] provided 1 perfect and 0 imperfect interpolant sequences [2024-08-14 14:27:42,176 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-08-14 14:27:42,176 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-08-14 14:27:42,176 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [703329568] [2024-08-14 14:27:42,176 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-08-14 14:27:42,177 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-08-14 14:27:42,178 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-08-14 14:27:42,179 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-08-14 14:27:42,179 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-08-14 14:27:42,179 INFO L87 Difference]: Start difference. First operand 306 states and 496 transitions. Second operand has 4 states, 4 states have (on average 33.5) internal successors, (134), 4 states have internal predecessors, (134), 2 states have call successors, (4), 2 states have call predecessors, (4), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) [2024-08-14 14:27:42,206 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-08-14 14:27:42,207 INFO L93 Difference]: Finished difference Result 310 states and 500 transitions. [2024-08-14 14:27:42,207 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-08-14 14:27:42,207 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 33.5) internal successors, (134), 4 states have internal predecessors, (134), 2 states have call successors, (4), 2 states have call predecessors, (4), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) Word has length 209 [2024-08-14 14:27:42,208 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-08-14 14:27:42,210 INFO L225 Difference]: With dead ends: 310 [2024-08-14 14:27:42,210 INFO L226 Difference]: Without dead ends: 310 [2024-08-14 14:27:42,210 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 7 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-08-14 14:27:42,211 INFO L413 NwaCegarLoop]: 308 mSDtfsCounter, 0 mSDsluCounter, 609 mSDsCounter, 0 mSdLazyCounter, 12 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 917 SdHoareTripleChecker+Invalid, 12 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 12 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-08-14 14:27:42,212 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 917 Invalid, 12 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 12 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-08-14 14:27:42,213 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 310 states. [2024-08-14 14:27:42,224 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 310 to 308. [2024-08-14 14:27:42,225 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 308 states, 300 states have (on average 1.6366666666666667) internal successors, (491), 301 states have internal predecessors, (491), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) [2024-08-14 14:27:42,227 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 308 states to 308 states and 498 transitions. [2024-08-14 14:27:42,227 INFO L78 Accepts]: Start accepts. Automaton has 308 states and 498 transitions. Word has length 209 [2024-08-14 14:27:42,228 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-08-14 14:27:42,228 INFO L495 AbstractCegarLoop]: Abstraction has 308 states and 498 transitions. [2024-08-14 14:27:42,228 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 33.5) internal successors, (134), 4 states have internal predecessors, (134), 2 states have call successors, (4), 2 states have call predecessors, (4), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) [2024-08-14 14:27:42,229 INFO L276 IsEmpty]: Start isEmpty. Operand 308 states and 498 transitions. [2024-08-14 14:27:42,232 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 211 [2024-08-14 14:27:42,232 INFO L187 NwaCegarLoop]: Found error trace [2024-08-14 14:27:42,232 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-08-14 14:27:42,232 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2024-08-14 14:27:42,232 INFO L420 AbstractCegarLoop]: === Iteration 3 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-08-14 14:27:42,233 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-08-14 14:27:42,233 INFO L85 PathProgramCache]: Analyzing trace with hash 1014555487, now seen corresponding path program 1 times [2024-08-14 14:27:42,233 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-08-14 14:27:42,234 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [381274973] [2024-08-14 14:27:42,234 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-08-14 14:27:42,234 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-08-14 14:27:43,256 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-08-14 14:27:43,965 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2024-08-14 14:27:43,966 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-08-14 14:27:43,968 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 115 [2024-08-14 14:27:43,969 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-08-14 14:27:43,973 INFO L134 CoverageAnalysis]: Checked inductivity of 76 backedges. 8 proven. 0 refuted. 0 times theorem prover too weak. 68 trivial. 0 not checked. [2024-08-14 14:27:43,974 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-08-14 14:27:43,974 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [381274973] [2024-08-14 14:27:43,974 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [381274973] provided 1 perfect and 0 imperfect interpolant sequences [2024-08-14 14:27:43,974 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-08-14 14:27:43,974 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-08-14 14:27:43,975 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [114944356] [2024-08-14 14:27:43,975 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-08-14 14:27:43,976 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-08-14 14:27:43,977 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-08-14 14:27:43,977 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-08-14 14:27:43,978 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-08-14 14:27:43,978 INFO L87 Difference]: Start difference. First operand 308 states and 498 transitions. Second operand has 4 states, 4 states have (on average 34.25) internal successors, (137), 4 states have internal predecessors, (137), 2 states have call successors, (4), 2 states have call predecessors, (4), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) [2024-08-14 14:27:44,006 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-08-14 14:27:44,006 INFO L93 Difference]: Finished difference Result 312 states and 502 transitions. [2024-08-14 14:27:44,007 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-08-14 14:27:44,007 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 34.25) internal successors, (137), 4 states have internal predecessors, (137), 2 states have call successors, (4), 2 states have call predecessors, (4), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) Word has length 210 [2024-08-14 14:27:44,008 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-08-14 14:27:44,009 INFO L225 Difference]: With dead ends: 312 [2024-08-14 14:27:44,010 INFO L226 Difference]: Without dead ends: 312 [2024-08-14 14:27:44,010 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 7 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-08-14 14:27:44,012 INFO L413 NwaCegarLoop]: 308 mSDtfsCounter, 0 mSDsluCounter, 609 mSDsCounter, 0 mSdLazyCounter, 12 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 917 SdHoareTripleChecker+Invalid, 12 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 12 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-08-14 14:27:44,013 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 917 Invalid, 12 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 12 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-08-14 14:27:44,014 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 312 states. [2024-08-14 14:27:44,024 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 312 to 310. [2024-08-14 14:27:44,025 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 310 states, 302 states have (on average 1.6324503311258278) internal successors, (493), 303 states have internal predecessors, (493), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) [2024-08-14 14:27:44,027 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 310 states to 310 states and 500 transitions. [2024-08-14 14:27:44,030 INFO L78 Accepts]: Start accepts. Automaton has 310 states and 500 transitions. Word has length 210 [2024-08-14 14:27:44,031 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-08-14 14:27:44,031 INFO L495 AbstractCegarLoop]: Abstraction has 310 states and 500 transitions. [2024-08-14 14:27:44,031 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 34.25) internal successors, (137), 4 states have internal predecessors, (137), 2 states have call successors, (4), 2 states have call predecessors, (4), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) [2024-08-14 14:27:44,031 INFO L276 IsEmpty]: Start isEmpty. Operand 310 states and 500 transitions. [2024-08-14 14:27:44,033 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 212 [2024-08-14 14:27:44,033 INFO L187 NwaCegarLoop]: Found error trace [2024-08-14 14:27:44,033 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-08-14 14:27:44,033 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2024-08-14 14:27:44,034 INFO L420 AbstractCegarLoop]: === Iteration 4 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-08-14 14:27:44,034 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-08-14 14:27:44,037 INFO L85 PathProgramCache]: Analyzing trace with hash -1729471010, now seen corresponding path program 1 times [2024-08-14 14:27:44,037 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-08-14 14:27:44,038 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [346797524] [2024-08-14 14:27:44,038 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-08-14 14:27:44,038 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-08-14 14:27:44,535 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-08-14 14:27:45,728 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2024-08-14 14:27:45,729 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-08-14 14:27:45,731 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 115 [2024-08-14 14:27:45,732 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-08-14 14:27:45,738 INFO L134 CoverageAnalysis]: Checked inductivity of 76 backedges. 9 proven. 45 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2024-08-14 14:27:45,739 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-08-14 14:27:45,739 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [346797524] [2024-08-14 14:27:45,740 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [346797524] provided 0 perfect and 1 imperfect interpolant sequences [2024-08-14 14:27:45,740 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [844270919] [2024-08-14 14:27:45,740 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-08-14 14:27:45,740 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-08-14 14:27:45,741 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-08-14 14:27:45,745 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-08-14 14:27:45,746 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2024-08-14 14:27:46,351 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-08-14 14:27:46,361 INFO L262 TraceCheckSpWp]: Trace formula consists of 1301 conjuncts, 67 conjunts are in the unsatisfiable core [2024-08-14 14:27:46,374 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2024-08-14 14:27:48,508 INFO L134 CoverageAnalysis]: Checked inductivity of 76 backedges. 21 proven. 33 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2024-08-14 14:27:48,508 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2024-08-14 14:27:49,722 INFO L134 CoverageAnalysis]: Checked inductivity of 76 backedges. 8 proven. 46 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2024-08-14 14:27:49,722 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [844270919] provided 0 perfect and 2 imperfect interpolant sequences [2024-08-14 14:27:49,723 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-08-14 14:27:49,723 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 16, 8] total 27 [2024-08-14 14:27:49,723 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [535696336] [2024-08-14 14:27:49,723 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-08-14 14:27:49,724 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 27 states [2024-08-14 14:27:49,724 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-08-14 14:27:49,726 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2024-08-14 14:27:49,726 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=146, Invalid=556, Unknown=0, NotChecked=0, Total=702 [2024-08-14 14:27:49,726 INFO L87 Difference]: Start difference. First operand 310 states and 500 transitions. Second operand has 27 states, 27 states have (on average 19.51851851851852) internal successors, (527), 27 states have internal predecessors, (527), 5 states have call successors, (6), 2 states have call predecessors, (6), 1 states have return successors, (4), 4 states have call predecessors, (4), 4 states have call successors, (4) [2024-08-14 14:27:50,998 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-08-14 14:27:50,998 INFO L93 Difference]: Finished difference Result 618 states and 1004 transitions. [2024-08-14 14:27:50,999 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2024-08-14 14:27:50,999 INFO L78 Accepts]: Start accepts. Automaton has has 27 states, 27 states have (on average 19.51851851851852) internal successors, (527), 27 states have internal predecessors, (527), 5 states have call successors, (6), 2 states have call predecessors, (6), 1 states have return successors, (4), 4 states have call predecessors, (4), 4 states have call successors, (4) Word has length 211 [2024-08-14 14:27:51,000 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-08-14 14:27:51,003 INFO L225 Difference]: With dead ends: 618 [2024-08-14 14:27:51,004 INFO L226 Difference]: Without dead ends: 618 [2024-08-14 14:27:51,005 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 437 GetRequests, 407 SyntacticMatches, 0 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 278 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=207, Invalid=785, Unknown=0, NotChecked=0, Total=992 [2024-08-14 14:27:51,006 INFO L413 NwaCegarLoop]: 192 mSDtfsCounter, 841 mSDsluCounter, 2041 mSDsCounter, 0 mSdLazyCounter, 1410 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.9s Time, 0 mProtectedPredicate, 0 mProtectedAction, 841 SdHoareTripleChecker+Valid, 2233 SdHoareTripleChecker+Invalid, 1412 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 1410 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.1s IncrementalHoareTripleChecker+Time [2024-08-14 14:27:51,006 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [841 Valid, 2233 Invalid, 1412 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 1410 Invalid, 0 Unknown, 0 Unchecked, 1.1s Time] [2024-08-14 14:27:51,008 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 618 states. [2024-08-14 14:27:51,019 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 618 to 400. [2024-08-14 14:27:51,020 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 400 states, 392 states have (on average 1.6326530612244898) internal successors, (640), 393 states have internal predecessors, (640), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) [2024-08-14 14:27:51,021 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 400 states to 400 states and 647 transitions. [2024-08-14 14:27:51,023 INFO L78 Accepts]: Start accepts. Automaton has 400 states and 647 transitions. Word has length 211 [2024-08-14 14:27:51,023 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-08-14 14:27:51,023 INFO L495 AbstractCegarLoop]: Abstraction has 400 states and 647 transitions. [2024-08-14 14:27:51,024 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 27 states, 27 states have (on average 19.51851851851852) internal successors, (527), 27 states have internal predecessors, (527), 5 states have call successors, (6), 2 states have call predecessors, (6), 1 states have return successors, (4), 4 states have call predecessors, (4), 4 states have call successors, (4) [2024-08-14 14:27:51,024 INFO L276 IsEmpty]: Start isEmpty. Operand 400 states and 647 transitions. [2024-08-14 14:27:51,026 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 213 [2024-08-14 14:27:51,026 INFO L187 NwaCegarLoop]: Found error trace [2024-08-14 14:27:51,027 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-08-14 14:27:51,050 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Forceful destruction successful, exit code 0 [2024-08-14 14:27:51,231 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3,2 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-08-14 14:27:51,232 INFO L420 AbstractCegarLoop]: === Iteration 5 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-08-14 14:27:51,233 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-08-14 14:27:51,233 INFO L85 PathProgramCache]: Analyzing trace with hash 178151802, now seen corresponding path program 1 times [2024-08-14 14:27:51,233 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-08-14 14:27:51,233 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1251400735] [2024-08-14 14:27:51,234 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-08-14 14:27:51,234 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-08-14 14:27:52,244 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-08-14 14:27:53,753 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2024-08-14 14:27:53,755 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-08-14 14:27:53,756 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 115 [2024-08-14 14:27:53,758 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-08-14 14:27:53,760 INFO L134 CoverageAnalysis]: Checked inductivity of 76 backedges. 5 proven. 11 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-08-14 14:27:53,761 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-08-14 14:27:53,761 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1251400735] [2024-08-14 14:27:53,761 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1251400735] provided 0 perfect and 1 imperfect interpolant sequences [2024-08-14 14:27:53,762 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1450642602] [2024-08-14 14:27:53,762 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-08-14 14:27:53,762 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-08-14 14:27:53,763 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-08-14 14:27:53,764 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-08-14 14:27:53,767 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2024-08-14 14:27:54,340 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-08-14 14:27:54,348 INFO L262 TraceCheckSpWp]: Trace formula consists of 1304 conjuncts, 42 conjunts are in the unsatisfiable core [2024-08-14 14:27:54,359 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2024-08-14 14:27:54,882 INFO L134 CoverageAnalysis]: Checked inductivity of 76 backedges. 64 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-08-14 14:27:54,883 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-08-14 14:27:54,885 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1450642602] provided 1 perfect and 0 imperfect interpolant sequences [2024-08-14 14:27:54,885 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-08-14 14:27:54,885 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [8] total 13 [2024-08-14 14:27:54,885 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1374628787] [2024-08-14 14:27:54,885 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-08-14 14:27:54,886 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2024-08-14 14:27:54,886 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-08-14 14:27:54,887 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-08-14 14:27:54,887 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=31, Invalid=125, Unknown=0, NotChecked=0, Total=156 [2024-08-14 14:27:54,887 INFO L87 Difference]: Start difference. First operand 400 states and 647 transitions. Second operand has 7 states, 7 states have (on average 28.428571428571427) internal successors, (199), 7 states have internal predecessors, (199), 2 states have call successors, (3), 2 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2024-08-14 14:27:55,336 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-08-14 14:27:55,337 INFO L93 Difference]: Finished difference Result 418 states and 668 transitions. [2024-08-14 14:27:55,337 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2024-08-14 14:27:55,337 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 28.428571428571427) internal successors, (199), 7 states have internal predecessors, (199), 2 states have call successors, (3), 2 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Word has length 212 [2024-08-14 14:27:55,338 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-08-14 14:27:55,339 INFO L225 Difference]: With dead ends: 418 [2024-08-14 14:27:55,339 INFO L226 Difference]: Without dead ends: 418 [2024-08-14 14:27:55,340 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 226 GetRequests, 212 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 28 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=49, Invalid=191, Unknown=0, NotChecked=0, Total=240 [2024-08-14 14:27:55,340 INFO L413 NwaCegarLoop]: 197 mSDtfsCounter, 210 mSDsluCounter, 784 mSDsCounter, 0 mSdLazyCounter, 579 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 211 SdHoareTripleChecker+Valid, 981 SdHoareTripleChecker+Invalid, 581 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 579 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2024-08-14 14:27:55,341 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [211 Valid, 981 Invalid, 581 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 579 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2024-08-14 14:27:55,342 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 418 states. [2024-08-14 14:27:55,349 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 418 to 418. [2024-08-14 14:27:55,350 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 418 states, 410 states have (on average 1.6121951219512196) internal successors, (661), 411 states have internal predecessors, (661), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) [2024-08-14 14:27:55,351 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 418 states to 418 states and 668 transitions. [2024-08-14 14:27:55,352 INFO L78 Accepts]: Start accepts. Automaton has 418 states and 668 transitions. Word has length 212 [2024-08-14 14:27:55,352 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-08-14 14:27:55,352 INFO L495 AbstractCegarLoop]: Abstraction has 418 states and 668 transitions. [2024-08-14 14:27:55,352 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 28.428571428571427) internal successors, (199), 7 states have internal predecessors, (199), 2 states have call successors, (3), 2 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2024-08-14 14:27:55,352 INFO L276 IsEmpty]: Start isEmpty. Operand 418 states and 668 transitions. [2024-08-14 14:27:55,354 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 215 [2024-08-14 14:27:55,354 INFO L187 NwaCegarLoop]: Found error trace [2024-08-14 14:27:55,355 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-08-14 14:27:55,377 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Forceful destruction successful, exit code 0 [2024-08-14 14:27:55,559 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4,3 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-08-14 14:27:55,560 INFO L420 AbstractCegarLoop]: === Iteration 6 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-08-14 14:27:55,561 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-08-14 14:27:55,561 INFO L85 PathProgramCache]: Analyzing trace with hash 740248774, now seen corresponding path program 1 times [2024-08-14 14:27:55,561 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-08-14 14:27:55,561 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1256825499] [2024-08-14 14:27:55,561 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-08-14 14:27:55,561 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-08-14 14:27:56,430 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-08-14 14:27:56,431 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-08-14 14:27:57,235 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-08-14 14:27:57,324 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-08-14 14:27:57,324 INFO L360 BasicCegarLoop]: Counterexample is feasible [2024-08-14 14:27:57,325 INFO L805 garLoopResultBuilder]: Registering result UNSAFE for location __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION (0 of 1 remaining) [2024-08-14 14:27:57,327 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5 [2024-08-14 14:27:57,330 INFO L445 BasicCegarLoop]: Path program histogram: [1, 1, 1, 1, 1, 1] [2024-08-14 14:27:57,333 INFO L196 ceAbstractionStarter]: Computing trace abstraction results [2024-08-14 14:27:57,459 INFO L201 PluginConnector]: Adding new model witness.yml de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 14.08 02:27:57 BoogieIcfgContainer [2024-08-14 14:27:57,460 INFO L131 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2024-08-14 14:27:57,461 INFO L158 Benchmark]: Toolchain (without parser) took 20546.61ms. Allocated memory was 186.6MB in the beginning and 625.0MB in the end (delta: 438.3MB). Free memory was 108.0MB in the beginning and 517.1MB in the end (delta: -409.1MB). Peak memory consumption was 336.9MB. Max. memory is 16.1GB. [2024-08-14 14:27:57,461 INFO L158 Benchmark]: CDTParser took 0.39ms. Allocated memory is still 186.6MB. Free memory was 156.5MB in the beginning and 156.2MB in the end (delta: 202.1kB). There was no memory consumed. Max. memory is 16.1GB. [2024-08-14 14:27:57,462 INFO L158 Benchmark]: Witness Parser took 0.43ms. Allocated memory is still 186.6MB. Free memory was 110.2MB in the beginning and 110.1MB in the end (delta: 97.8kB). There was no memory consumed. Max. memory is 16.1GB. [2024-08-14 14:27:57,462 INFO L158 Benchmark]: CACSL2BoogieTranslator took 546.57ms. Allocated memory is still 186.6MB. Free memory was 107.8MB in the beginning and 150.8MB in the end (delta: -43.0MB). Peak memory consumption was 25.6MB. Max. memory is 16.1GB. [2024-08-14 14:27:57,462 INFO L158 Benchmark]: Boogie Preprocessor took 154.58ms. Allocated memory is still 186.6MB. Free memory was 150.8MB in the beginning and 143.7MB in the end (delta: 7.1MB). Peak memory consumption was 6.3MB. Max. memory is 16.1GB. [2024-08-14 14:27:57,463 INFO L158 Benchmark]: IcfgBuilder took 1236.18ms. Allocated memory is still 186.6MB. Free memory was 143.7MB in the beginning and 113.3MB in the end (delta: 30.3MB). Peak memory consumption was 88.6MB. Max. memory is 16.1GB. [2024-08-14 14:27:57,463 INFO L158 Benchmark]: TraceAbstraction took 18603.92ms. Allocated memory was 186.6MB in the beginning and 625.0MB in the end (delta: 438.3MB). Free memory was 112.3MB in the beginning and 517.1MB in the end (delta: -404.8MB). Peak memory consumption was 338.0MB. Max. memory is 16.1GB. [2024-08-14 14:27:57,464 INFO L338 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.39ms. Allocated memory is still 186.6MB. Free memory was 156.5MB in the beginning and 156.2MB in the end (delta: 202.1kB). There was no memory consumed. Max. memory is 16.1GB. * Witness Parser took 0.43ms. Allocated memory is still 186.6MB. Free memory was 110.2MB in the beginning and 110.1MB in the end (delta: 97.8kB). There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 546.57ms. Allocated memory is still 186.6MB. Free memory was 107.8MB in the beginning and 150.8MB in the end (delta: -43.0MB). Peak memory consumption was 25.6MB. Max. memory is 16.1GB. * Boogie Preprocessor took 154.58ms. Allocated memory is still 186.6MB. Free memory was 150.8MB in the beginning and 143.7MB in the end (delta: 7.1MB). Peak memory consumption was 6.3MB. Max. memory is 16.1GB. * IcfgBuilder took 1236.18ms. Allocated memory is still 186.6MB. Free memory was 143.7MB in the beginning and 113.3MB in the end (delta: 30.3MB). Peak memory consumption was 88.6MB. Max. memory is 16.1GB. * TraceAbstraction took 18603.92ms. Allocated memory was 186.6MB in the beginning and 625.0MB in the end (delta: 438.3MB). Free memory was 112.3MB in the beginning and 517.1MB in the end (delta: -404.8MB). Peak memory consumption was 338.0MB. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: ErrorAutomatonStatistics NumberErrorTraces: 0, NumberStatementsAllTraces: 0, NumberRelevantStatements: 0, 0.0s ErrorAutomatonConstructionTimeTotal, 0.0s FaulLocalizationTime, NumberStatementsFirstTrace: -1, TraceLengthAvg: 0, 0.0s ErrorAutomatonConstructionTimeAvg, 0.0s ErrorAutomatonDifferenceTimeAvg, 0.0s ErrorAutomatonDifferenceTimeTotal, NumberOfNoEnhancement: 0, NumberOfFiniteEnhancement: 0, NumberOfInfiniteEnhancement: 0 - CounterExampleResult [Line: 21]: a call to reach_error is reachable a call to reach_error is reachable We found a FailurePath: [L26] const SORT_1 mask_SORT_1 = (SORT_1)-1 >> (sizeof(SORT_1) * 8 - 6); [L27] const SORT_1 msb_SORT_1 = (SORT_1)1 << (6 - 1); [L29] const SORT_3 mask_SORT_3 = (SORT_3)-1 >> (sizeof(SORT_3) * 8 - 1); [L30] const SORT_3 msb_SORT_3 = (SORT_3)1 << (1 - 1); [L32] const SORT_6 mask_SORT_6 = (SORT_6)-1 >> (sizeof(SORT_6) * 8 - 32); [L33] const SORT_6 msb_SORT_6 = (SORT_6)1 << (32 - 1); [L35] const SORT_24 mask_SORT_24 = (SORT_24)-1 >> (sizeof(SORT_24) * 8 - 5); [L36] const SORT_24 msb_SORT_24 = (SORT_24)1 << (5 - 1); [L38] const SORT_33 mask_SORT_33 = (SORT_33)-1 >> (sizeof(SORT_33) * 8 - 2); [L39] const SORT_33 msb_SORT_33 = (SORT_33)1 << (2 - 1); [L41] const SORT_1 var_21 = 0; [L42] const SORT_24 var_26 = 31; [L43] const SORT_6 var_28 = 0; [L44] const SORT_33 var_34 = 0; [L45] const SORT_33 var_35 = 1; [L46] const SORT_3 var_39 = 1; [L47] const SORT_3 var_45 = 0; [L48] const SORT_33 var_58 = 2; [L49] const SORT_33 var_75 = 3; [L51] SORT_1 input_2; [L52] SORT_3 input_4; [L53] SORT_1 input_5; [L54] SORT_6 input_7; [L55] SORT_3 input_8; [L56] SORT_6 input_9; [L57] SORT_1 input_10; [L58] SORT_1 input_11; [L59] SORT_1 input_12; [L60] SORT_3 input_13; [L61] SORT_3 input_14; [L62] SORT_3 input_15; [L63] SORT_3 input_16; [L64] SORT_3 input_17; [L65] SORT_3 input_18; [L66] SORT_3 input_19; [L67] SORT_3 input_20; [L68] SORT_3 input_120; [L69] SORT_3 input_124; [L70] SORT_3 input_126; [L71] SORT_33 input_129; [L72] SORT_3 input_131; [L73] SORT_6 input_134; [L74] SORT_3 input_136; [L76] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 [L76] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, mask_SORT_6=-1, var_21=0, var_26=31, var_28=0, var_34=0, var_35=1, var_39=1, var_45=0, var_58=2, var_75=3] [L76] SORT_1 state_22 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L77] EXPR __VERIFIER_nondet_uint() & mask_SORT_6 [L77] EXPR __VERIFIER_nondet_uint() & mask_SORT_6 VAL [mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, mask_SORT_6=-1, var_21=0, var_26=31, var_28=0, var_34=0, var_35=1, var_39=1, var_45=0, var_58=2, var_75=3] [L77] SORT_6 state_29 = __VERIFIER_nondet_uint() & mask_SORT_6; [L78] EXPR __VERIFIER_nondet_uint() & mask_SORT_6 [L78] EXPR __VERIFIER_nondet_uint() & mask_SORT_6 VAL [mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, mask_SORT_6=-1, var_21=0, var_26=31, var_28=0, var_34=0, var_35=1, var_39=1, var_45=0, var_58=2, var_75=3] [L78] SORT_6 state_31 = __VERIFIER_nondet_uint() & mask_SORT_6; [L79] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 [L79] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, mask_SORT_6=-1, var_21=0, var_26=31, var_28=0, var_34=0, var_35=1, var_39=1, var_45=0, var_58=2, var_75=3] [L79] SORT_1 state_36 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L80] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 [L80] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, mask_SORT_6=-1, var_21=0, var_26=31, var_28=0, var_34=0, var_35=1, var_39=1, var_45=0, var_58=2, var_75=3] [L80] SORT_1 state_41 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L81] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 [L81] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, mask_SORT_6=-1, var_21=0, var_26=31, var_28=0, var_34=0, var_35=1, var_39=1, var_45=0, var_58=2, var_75=3] [L81] SORT_3 state_46 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L82] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 [L82] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, mask_SORT_6=-1, var_21=0, var_26=31, var_28=0, var_34=0, var_35=1, var_39=1, var_45=0, var_58=2, var_75=3] [L82] SORT_3 state_50 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L83] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 [L83] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, mask_SORT_6=-1, var_21=0, var_26=31, var_28=0, var_34=0, var_35=1, var_39=1, var_45=0, var_58=2, var_75=3] [L83] SORT_1 state_60 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L84] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 [L84] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, mask_SORT_6=-1, var_21=0, var_26=31, var_28=0, var_34=0, var_35=1, var_39=1, var_45=0, var_58=2, var_75=3] [L84] SORT_3 state_64 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L85] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 [L85] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, mask_SORT_6=-1, var_21=0, var_26=31, var_28=0, var_34=0, var_35=1, var_39=1, var_45=0, var_58=2, var_75=3] [L85] SORT_3 state_68 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L86] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 [L86] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, mask_SORT_6=-1, var_21=0, var_26=31, var_28=0, var_34=0, var_35=1, var_39=1, var_45=0, var_58=2, var_75=3] [L86] SORT_1 state_77 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L87] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 [L87] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, mask_SORT_6=-1, var_21=0, var_26=31, var_28=0, var_34=0, var_35=1, var_39=1, var_45=0, var_58=2, var_75=3] [L87] SORT_3 state_81 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L88] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 [L88] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, mask_SORT_6=-1, var_21=0, var_26=31, var_28=0, var_34=0, var_35=1, var_39=1, var_45=0, var_58=2, var_75=3] [L88] SORT_3 state_85 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L89] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 [L89] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, mask_SORT_6=-1, var_21=0, var_26=31, var_28=0, var_34=0, var_35=1, var_39=1, var_45=0, var_58=2, var_75=3] [L89] SORT_3 state_89 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L90] EXPR __VERIFIER_nondet_uint() & mask_SORT_6 [L90] EXPR __VERIFIER_nondet_uint() & mask_SORT_6 VAL [mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, var_21=0, var_26=31, var_28=0, var_34=0, var_35=1, var_39=1, var_45=0, var_58=2, var_75=3] [L90] SORT_6 state_98 = __VERIFIER_nondet_uint() & mask_SORT_6; [L91] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 [L91] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, var_21=0, var_26=31, var_28=0, var_34=0, var_35=1, var_39=1, var_45=0, var_58=2, var_75=3] [L91] SORT_1 state_116 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L92] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 [L92] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, var_21=0, var_26=31, var_28=0, var_34=0, var_35=1, var_39=1, var_45=0, var_58=2, var_75=3] [L92] SORT_3 state_118 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L93] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 [L93] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, var_21=0, var_26=31, var_28=0, var_34=0, var_35=1, var_39=1, var_45=0, var_58=2, var_75=3] [L93] SORT_3 state_122 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L95] SORT_1 init_23_arg_1 = var_21; [L96] state_22 = init_23_arg_1 [L97] SORT_6 init_30_arg_1 = var_28; [L98] state_29 = init_30_arg_1 [L99] SORT_6 init_32_arg_1 = var_28; [L100] state_31 = init_32_arg_1 [L101] SORT_1 init_37_arg_1 = var_21; [L102] state_36 = init_37_arg_1 [L103] SORT_1 init_42_arg_1 = var_21; [L104] state_41 = init_42_arg_1 [L105] SORT_3 init_47_arg_1 = var_45; [L106] state_46 = init_47_arg_1 [L107] SORT_3 init_51_arg_1 = var_45; [L108] state_50 = init_51_arg_1 [L109] SORT_1 init_61_arg_1 = var_21; [L110] state_60 = init_61_arg_1 [L111] SORT_3 init_65_arg_1 = var_45; [L112] state_64 = init_65_arg_1 [L113] SORT_3 init_69_arg_1 = var_45; [L114] state_68 = init_69_arg_1 [L115] SORT_1 init_78_arg_1 = var_21; [L116] state_77 = init_78_arg_1 [L117] SORT_3 init_82_arg_1 = var_45; [L118] state_81 = init_82_arg_1 [L119] SORT_3 init_86_arg_1 = var_45; [L120] state_85 = init_86_arg_1 [L121] SORT_3 init_90_arg_1 = var_45; [L122] state_89 = init_90_arg_1 [L123] SORT_6 init_99_arg_1 = var_28; [L124] state_98 = init_99_arg_1 [L125] SORT_1 init_117_arg_1 = var_21; [L126] state_116 = init_117_arg_1 [L127] SORT_3 init_119_arg_1 = var_45; [L128] state_118 = init_119_arg_1 [L129] SORT_3 init_123_arg_1 = var_45; [L130] state_122 = init_123_arg_1 VAL [mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=0, state_118=0, state_122=0, state_22=0, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_68=0, state_77=0, state_81=0, state_85=0, state_89=0, state_98=0, var_21=0, var_26=31, var_28=0, var_34=0, var_35=1, var_39=1, var_58=2, var_75=3] [L133] input_2 = __VERIFIER_nondet_uchar() [L134] input_4 = __VERIFIER_nondet_uchar() [L135] EXPR input_4 & mask_SORT_3 [L135] EXPR input_4 & mask_SORT_3 VAL [mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=0, state_118=0, state_122=0, state_22=0, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_68=0, state_77=0, state_81=0, state_85=0, state_89=0, state_98=0, var_21=0, var_26=31, var_28=0, var_34=0, var_35=1, var_39=1, var_58=2, var_75=3] [L135] input_4 = input_4 & mask_SORT_3 [L136] input_5 = __VERIFIER_nondet_uchar() [L137] EXPR input_5 & mask_SORT_1 [L137] EXPR input_5 & mask_SORT_1 VAL [input_4=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=0, state_118=0, state_122=0, state_22=0, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_68=0, state_77=0, state_81=0, state_85=0, state_89=0, state_98=0, var_21=0, var_26=31, var_28=0, var_34=0, var_35=1, var_39=1, var_58=2, var_75=3] [L137] input_5 = input_5 & mask_SORT_1 [L138] input_7 = __VERIFIER_nondet_uint() [L139] input_8 = __VERIFIER_nondet_uchar() [L140] EXPR input_8 & mask_SORT_3 [L140] EXPR input_8 & mask_SORT_3 VAL [input_4=0, input_5=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=0, state_118=0, state_122=0, state_22=0, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_68=0, state_77=0, state_81=0, state_85=0, state_89=0, state_98=0, var_21=0, var_26=31, var_28=0, var_34=0, var_35=1, var_39=1, var_58=2, var_75=3] [L140] input_8 = input_8 & mask_SORT_3 [L141] input_9 = __VERIFIER_nondet_uint() [L142] input_10 = __VERIFIER_nondet_uchar() [L143] EXPR input_10 & mask_SORT_1 [L143] EXPR input_10 & mask_SORT_1 VAL [input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=0, state_118=0, state_122=0, state_22=0, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_68=0, state_77=0, state_81=0, state_85=0, state_89=0, state_98=0, var_21=0, var_26=31, var_28=0, var_34=0, var_35=1, var_39=1, var_58=2, var_75=3] [L143] input_10 = input_10 & mask_SORT_1 [L144] input_11 = __VERIFIER_nondet_uchar() [L145] EXPR input_11 & mask_SORT_1 [L145] EXPR input_11 & mask_SORT_1 VAL [input_10=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=0, state_118=0, state_122=0, state_22=0, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_68=0, state_77=0, state_81=0, state_85=0, state_89=0, state_98=0, var_21=0, var_26=31, var_28=0, var_34=0, var_35=1, var_39=1, var_58=2, var_75=3] [L145] input_11 = input_11 & mask_SORT_1 [L146] input_12 = __VERIFIER_nondet_uchar() [L147] input_13 = __VERIFIER_nondet_uchar() [L148] input_14 = __VERIFIER_nondet_uchar() [L149] EXPR input_14 & mask_SORT_3 [L149] EXPR input_14 & mask_SORT_3 VAL [input_10=0, input_11=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=0, state_118=0, state_122=0, state_22=0, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_68=0, state_77=0, state_81=0, state_85=0, state_89=0, state_98=0, var_21=0, var_26=31, var_28=0, var_34=0, var_35=1, var_39=1, var_58=2, var_75=3] [L149] input_14 = input_14 & mask_SORT_3 [L150] input_15 = __VERIFIER_nondet_uchar() [L151] input_16 = __VERIFIER_nondet_uchar() [L152] EXPR input_16 & mask_SORT_3 [L152] EXPR input_16 & mask_SORT_3 VAL [input_10=0, input_11=0, input_14=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=0, state_118=0, state_122=0, state_22=0, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_68=0, state_77=0, state_81=0, state_85=0, state_89=0, state_98=0, var_21=0, var_26=31, var_28=0, var_34=0, var_35=1, var_39=1, var_58=2, var_75=3] [L152] input_16 = input_16 & mask_SORT_3 [L153] input_17 = __VERIFIER_nondet_uchar() [L154] EXPR input_17 & mask_SORT_3 [L154] EXPR input_17 & mask_SORT_3 VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=0, state_118=0, state_122=0, state_22=0, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_68=0, state_77=0, state_81=0, state_85=0, state_89=0, state_98=0, var_21=0, var_26=31, var_28=0, var_34=0, var_35=1, var_39=1, var_58=2, var_75=3] [L154] input_17 = input_17 & mask_SORT_3 [L155] input_18 = __VERIFIER_nondet_uchar() [L156] EXPR input_18 & mask_SORT_3 [L156] EXPR input_18 & mask_SORT_3 VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=0, state_118=0, state_122=0, state_22=0, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_68=0, state_77=0, state_81=0, state_85=0, state_89=0, state_98=0, var_21=0, var_26=31, var_28=0, var_34=0, var_35=1, var_39=1, var_58=2, var_75=3] [L156] input_18 = input_18 & mask_SORT_3 [L157] input_19 = __VERIFIER_nondet_uchar() [L158] EXPR input_19 & mask_SORT_3 [L158] EXPR input_19 & mask_SORT_3 VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=0, state_118=0, state_122=0, state_22=0, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_68=0, state_77=0, state_81=0, state_85=0, state_89=0, state_98=0, var_21=0, var_26=31, var_28=0, var_34=0, var_35=1, var_39=1, var_58=2, var_75=3] [L158] input_19 = input_19 & mask_SORT_3 [L159] input_20 = __VERIFIER_nondet_uchar() [L160] input_120 = __VERIFIER_nondet_uchar() [L161] input_124 = __VERIFIER_nondet_uchar() [L162] input_126 = __VERIFIER_nondet_uchar() [L163] input_129 = __VERIFIER_nondet_uchar() [L164] input_131 = __VERIFIER_nondet_uchar() [L165] input_134 = __VERIFIER_nondet_uint() [L166] input_136 = __VERIFIER_nondet_uchar() [L169] SORT_1 var_25_arg_0 = state_22; [L170] SORT_24 var_25 = var_25_arg_0 >> 0; VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=0, state_118=0, state_122=0, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_68=0, state_77=0, state_81=0, state_85=0, state_89=0, state_98=0, var_21=0, var_25=0, var_26=31, var_28=0, var_34=0, var_35=1, var_39=1, var_58=2, var_75=3] [L171] EXPR var_25 & mask_SORT_24 [L171] EXPR var_25 & mask_SORT_24 VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=0, state_118=0, state_122=0, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_68=0, state_77=0, state_81=0, state_85=0, state_89=0, state_98=0, var_21=0, var_26=31, var_28=0, var_34=0, var_35=1, var_39=1, var_58=2, var_75=3] [L171] var_25 = var_25 & mask_SORT_24 [L172] SORT_24 var_27_arg_0 = var_25; [L173] SORT_24 var_27_arg_1 = var_26; [L174] SORT_3 var_27 = var_27_arg_0 == var_27_arg_1; [L175] SORT_1 var_54_arg_0 = state_36; [L176] SORT_24 var_54 = var_54_arg_0 >> 0; VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=0, state_118=0, state_122=0, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_68=0, state_77=0, state_81=0, state_85=0, state_89=0, state_98=0, var_21=0, var_26=31, var_27=0, var_28=0, var_34=0, var_35=1, var_39=1, var_54=0, var_58=2, var_75=3] [L177] EXPR var_54 & mask_SORT_24 [L177] EXPR var_54 & mask_SORT_24 VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=0, state_118=0, state_122=0, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_68=0, state_77=0, state_81=0, state_85=0, state_89=0, state_98=0, var_21=0, var_26=31, var_27=0, var_28=0, var_34=0, var_35=1, var_39=1, var_58=2, var_75=3] [L177] var_54 = var_54 & mask_SORT_24 [L178] SORT_24 var_105_arg_0 = var_54; [L179] SORT_24 var_105_arg_1 = var_26; [L180] SORT_3 var_105 = var_105_arg_0 == var_105_arg_1; [L181] SORT_1 var_38_arg_0 = state_36; [L182] SORT_3 var_38 = var_38_arg_0 >> 5; VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=0, state_118=0, state_122=0, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_68=0, state_77=0, state_81=0, state_85=0, state_89=0, state_98=0, var_105=0, var_21=0, var_26=31, var_27=0, var_28=0, var_34=0, var_35=1, var_38=0, var_39=1, var_54=0, var_58=2, var_75=3] [L183] EXPR var_38 & mask_SORT_3 [L183] EXPR var_38 & mask_SORT_3 VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=0, state_118=0, state_122=0, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_68=0, state_77=0, state_81=0, state_85=0, state_89=0, state_98=0, var_105=0, var_21=0, var_26=31, var_27=0, var_28=0, var_34=0, var_35=1, var_39=1, var_54=0, var_58=2, var_75=3] [L183] var_38 = var_38 & mask_SORT_3 [L184] SORT_3 var_76_arg_0 = var_38; [L185] SORT_3 var_76_arg_1 = var_39; [L186] SORT_3 var_76 = var_76_arg_0 == var_76_arg_1; [L187] SORT_1 var_79_arg_0 = state_36; [L188] SORT_1 var_79_arg_1 = state_77; [L189] SORT_3 var_79 = var_79_arg_0 == var_79_arg_1; [L190] SORT_3 var_80_arg_0 = var_76; [L191] SORT_3 var_80_arg_1 = var_79; VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=0, state_118=0, state_122=0, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_68=0, state_81=0, state_85=0, state_89=0, state_98=0, var_105=0, var_21=0, var_26=31, var_27=0, var_28=0, var_34=0, var_35=1, var_38=0, var_39=1, var_54=0, var_58=2, var_75=3, var_80_arg_0=0, var_80_arg_1=1] [L192] EXPR var_80_arg_0 & var_80_arg_1 [L192] EXPR var_80_arg_0 & var_80_arg_1 VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=0, state_118=0, state_122=0, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_68=0, state_81=0, state_85=0, state_89=0, state_98=0, var_105=0, var_21=0, var_26=31, var_27=0, var_28=0, var_34=0, var_35=1, var_38=0, var_39=1, var_54=0, var_58=2, var_75=3] [L192] SORT_3 var_80 = var_80_arg_0 & var_80_arg_1; [L193] SORT_3 var_83_arg_0 = state_81; [L194] SORT_3 var_83_arg_1 = var_39; [L195] SORT_3 var_83 = var_83_arg_0 != var_83_arg_1; [L196] SORT_3 var_84_arg_0 = var_80; [L197] SORT_3 var_84_arg_1 = var_83; VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=0, state_118=0, state_122=0, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_68=0, state_81=0, state_85=0, state_89=0, state_98=0, var_105=0, var_21=0, var_26=31, var_27=0, var_28=0, var_34=0, var_35=1, var_38=0, var_39=1, var_54=0, var_58=2, var_75=3, var_84_arg_0=0, var_84_arg_1=1] [L198] EXPR var_84_arg_0 & var_84_arg_1 [L198] EXPR var_84_arg_0 & var_84_arg_1 VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=0, state_118=0, state_122=0, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_68=0, state_81=0, state_85=0, state_89=0, state_98=0, var_105=0, var_21=0, var_26=31, var_27=0, var_28=0, var_34=0, var_35=1, var_38=0, var_39=1, var_54=0, var_58=2, var_75=3] [L198] SORT_3 var_84 = var_84_arg_0 & var_84_arg_1; [L199] SORT_3 var_87_arg_0 = state_85; [L200] SORT_3 var_87_arg_1 = var_39; [L201] SORT_3 var_87 = var_87_arg_0 == var_87_arg_1; [L202] SORT_3 var_88_arg_0 = var_84; [L203] SORT_3 var_88_arg_1 = var_87; VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=0, state_118=0, state_122=0, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_68=0, state_81=0, state_89=0, state_98=0, var_105=0, var_21=0, var_26=31, var_27=0, var_28=0, var_34=0, var_35=1, var_38=0, var_39=1, var_54=0, var_58=2, var_75=3, var_88_arg_0=0, var_88_arg_1=0] [L204] EXPR var_88_arg_0 & var_88_arg_1 [L204] EXPR var_88_arg_0 & var_88_arg_1 VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=0, state_118=0, state_122=0, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_68=0, state_81=0, state_89=0, state_98=0, var_105=0, var_21=0, var_26=31, var_27=0, var_28=0, var_34=0, var_35=1, var_38=0, var_39=1, var_54=0, var_58=2, var_75=3] [L204] SORT_3 var_88 = var_88_arg_0 & var_88_arg_1; [L205] SORT_3 var_91_arg_0 = state_89; [L206] SORT_3 var_91_arg_1 = var_39; [L207] SORT_3 var_91 = var_91_arg_0 == var_91_arg_1; [L208] SORT_3 var_92_arg_0 = var_88; [L209] SORT_3 var_92_arg_1 = var_91; VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=0, state_118=0, state_122=0, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_68=0, state_81=0, state_98=0, var_105=0, var_21=0, var_26=31, var_27=0, var_28=0, var_34=0, var_35=1, var_38=0, var_39=1, var_54=0, var_58=2, var_75=3, var_92_arg_0=0, var_92_arg_1=0] [L210] EXPR var_92_arg_0 & var_92_arg_1 [L210] EXPR var_92_arg_0 & var_92_arg_1 VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=0, state_118=0, state_122=0, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_68=0, state_81=0, state_98=0, var_105=0, var_21=0, var_26=31, var_27=0, var_28=0, var_34=0, var_35=1, var_38=0, var_39=1, var_54=0, var_58=2, var_75=3] [L210] SORT_3 var_92 = var_92_arg_0 & var_92_arg_1; [L211] SORT_24 var_93_arg_0 = var_54; [L212] SORT_24 var_93_arg_1 = var_26; [L213] SORT_3 var_93 = var_93_arg_0 != var_93_arg_1; [L214] SORT_3 var_94_arg_0 = var_92; [L215] SORT_3 var_94_arg_1 = var_93; VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=0, state_118=0, state_122=0, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_68=0, state_81=0, state_98=0, var_105=0, var_21=0, var_26=31, var_27=0, var_28=0, var_34=0, var_35=1, var_38=0, var_39=1, var_54=0, var_58=2, var_75=3, var_94_arg_0=0, var_94_arg_1=1] [L216] EXPR var_94_arg_0 & var_94_arg_1 [L216] EXPR var_94_arg_0 & var_94_arg_1 VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=0, state_118=0, state_122=0, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_68=0, state_81=0, state_98=0, var_105=0, var_21=0, var_26=31, var_27=0, var_28=0, var_34=0, var_35=1, var_38=0, var_39=1, var_54=0, var_58=2, var_75=3] [L216] SORT_3 var_94 = var_94_arg_0 & var_94_arg_1; [L217] EXPR var_94 & mask_SORT_3 [L217] EXPR var_94 & mask_SORT_3 VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=0, state_118=0, state_122=0, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_68=0, state_81=0, state_98=0, var_105=0, var_21=0, var_26=31, var_27=0, var_28=0, var_34=0, var_35=1, var_38=0, var_39=1, var_54=0, var_58=2, var_75=3] [L217] var_94 = var_94 & mask_SORT_3 [L218] SORT_3 var_59_arg_0 = var_38; [L219] SORT_3 var_59_arg_1 = var_39; [L220] SORT_3 var_59 = var_59_arg_0 == var_59_arg_1; [L221] SORT_1 var_62_arg_0 = state_36; [L222] SORT_1 var_62_arg_1 = state_60; [L223] SORT_3 var_62 = var_62_arg_0 == var_62_arg_1; [L224] SORT_3 var_63_arg_0 = var_59; [L225] SORT_3 var_63_arg_1 = var_62; VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=0, state_118=0, state_122=0, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_68=0, state_81=0, state_98=0, var_105=0, var_21=0, var_26=31, var_27=0, var_28=0, var_34=0, var_35=1, var_38=0, var_39=1, var_54=0, var_58=2, var_63_arg_0=0, var_63_arg_1=1, var_75=3, var_94=0] [L226] EXPR var_63_arg_0 & var_63_arg_1 [L226] EXPR var_63_arg_0 & var_63_arg_1 VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=0, state_118=0, state_122=0, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_68=0, state_81=0, state_98=0, var_105=0, var_21=0, var_26=31, var_27=0, var_28=0, var_34=0, var_35=1, var_38=0, var_39=1, var_54=0, var_58=2, var_75=3, var_94=0] [L226] SORT_3 var_63 = var_63_arg_0 & var_63_arg_1; [L227] SORT_3 var_66_arg_0 = state_64; [L228] SORT_3 var_66_arg_1 = var_39; [L229] SORT_3 var_66 = var_66_arg_0 == var_66_arg_1; [L230] SORT_3 var_67_arg_0 = var_63; [L231] SORT_3 var_67_arg_1 = var_66; VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=0, state_118=0, state_122=0, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_68=0, state_81=0, state_98=0, var_105=0, var_21=0, var_26=31, var_27=0, var_28=0, var_34=0, var_35=1, var_38=0, var_39=1, var_54=0, var_58=2, var_67_arg_0=0, var_67_arg_1=0, var_75=3, var_94=0] [L232] EXPR var_67_arg_0 & var_67_arg_1 [L232] EXPR var_67_arg_0 & var_67_arg_1 VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=0, state_118=0, state_122=0, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_68=0, state_81=0, state_98=0, var_105=0, var_21=0, var_26=31, var_27=0, var_28=0, var_34=0, var_35=1, var_38=0, var_39=1, var_54=0, var_58=2, var_75=3, var_94=0] [L232] SORT_3 var_67 = var_67_arg_0 & var_67_arg_1; [L233] SORT_3 var_70_arg_0 = state_68; [L234] SORT_3 var_70_arg_1 = var_39; [L235] SORT_3 var_70 = var_70_arg_0 == var_70_arg_1; [L236] SORT_3 var_71_arg_0 = var_67; [L237] SORT_3 var_71_arg_1 = var_70; VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=0, state_118=0, state_122=0, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_81=0, state_98=0, var_105=0, var_21=0, var_26=31, var_27=0, var_28=0, var_34=0, var_35=1, var_38=0, var_39=1, var_54=0, var_58=2, var_71_arg_0=0, var_71_arg_1=0, var_75=3, var_94=0] [L238] EXPR var_71_arg_0 & var_71_arg_1 [L238] EXPR var_71_arg_0 & var_71_arg_1 VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=0, state_118=0, state_122=0, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_81=0, state_98=0, var_105=0, var_21=0, var_26=31, var_27=0, var_28=0, var_34=0, var_35=1, var_38=0, var_39=1, var_54=0, var_58=2, var_75=3, var_94=0] [L238] SORT_3 var_71 = var_71_arg_0 & var_71_arg_1; [L239] SORT_24 var_72_arg_0 = var_54; [L240] SORT_24 var_72_arg_1 = var_26; [L241] SORT_3 var_72 = var_72_arg_0 != var_72_arg_1; [L242] SORT_3 var_73_arg_0 = var_71; [L243] SORT_3 var_73_arg_1 = var_72; VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=0, state_118=0, state_122=0, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_81=0, state_98=0, var_105=0, var_21=0, var_26=31, var_27=0, var_28=0, var_34=0, var_35=1, var_38=0, var_39=1, var_54=0, var_58=2, var_73_arg_0=0, var_73_arg_1=1, var_75=3, var_94=0] [L244] EXPR var_73_arg_0 & var_73_arg_1 [L244] EXPR var_73_arg_0 & var_73_arg_1 VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=0, state_118=0, state_122=0, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_81=0, state_98=0, var_105=0, var_21=0, var_26=31, var_27=0, var_28=0, var_34=0, var_35=1, var_38=0, var_39=1, var_54=0, var_58=2, var_75=3, var_94=0] [L244] SORT_3 var_73 = var_73_arg_0 & var_73_arg_1; [L245] EXPR var_73 & mask_SORT_3 [L245] EXPR var_73 & mask_SORT_3 VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=0, state_118=0, state_122=0, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_81=0, state_98=0, var_105=0, var_21=0, var_26=31, var_27=0, var_28=0, var_34=0, var_35=1, var_38=0, var_39=1, var_54=0, var_58=2, var_75=3, var_94=0] [L245] var_73 = var_73 & mask_SORT_3 [L246] SORT_3 var_40_arg_0 = var_38; [L247] SORT_3 var_40_arg_1 = var_39; [L248] SORT_3 var_40 = var_40_arg_0 == var_40_arg_1; [L249] SORT_1 var_43_arg_0 = state_36; [L250] SORT_1 var_43_arg_1 = state_41; [L251] SORT_3 var_43 = var_43_arg_0 == var_43_arg_1; [L252] SORT_3 var_44_arg_0 = var_40; [L253] SORT_3 var_44_arg_1 = var_43; VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=0, state_118=0, state_122=0, state_29=0, state_31=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_81=0, state_98=0, var_105=0, var_21=0, var_26=31, var_27=0, var_28=0, var_34=0, var_35=1, var_39=1, var_44_arg_0=0, var_44_arg_1=1, var_54=0, var_58=2, var_73=0, var_75=3, var_94=0] [L254] EXPR var_44_arg_0 & var_44_arg_1 [L254] EXPR var_44_arg_0 & var_44_arg_1 VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=0, state_118=0, state_122=0, state_29=0, state_31=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_81=0, state_98=0, var_105=0, var_21=0, var_26=31, var_27=0, var_28=0, var_34=0, var_35=1, var_39=1, var_54=0, var_58=2, var_73=0, var_75=3, var_94=0] [L254] SORT_3 var_44 = var_44_arg_0 & var_44_arg_1; [L255] SORT_3 var_48_arg_0 = state_46; [L256] SORT_3 var_48_arg_1 = var_39; [L257] SORT_3 var_48 = var_48_arg_0 == var_48_arg_1; [L258] SORT_3 var_49_arg_0 = var_44; [L259] SORT_3 var_49_arg_1 = var_48; VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=0, state_118=0, state_122=0, state_29=0, state_31=0, state_41=0, state_50=0, state_60=0, state_64=0, state_81=0, state_98=0, var_105=0, var_21=0, var_26=31, var_27=0, var_28=0, var_34=0, var_35=1, var_39=1, var_49_arg_0=0, var_49_arg_1=0, var_54=0, var_58=2, var_73=0, var_75=3, var_94=0] [L260] EXPR var_49_arg_0 & var_49_arg_1 [L260] EXPR var_49_arg_0 & var_49_arg_1 VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=0, state_118=0, state_122=0, state_29=0, state_31=0, state_41=0, state_50=0, state_60=0, state_64=0, state_81=0, state_98=0, var_105=0, var_21=0, var_26=31, var_27=0, var_28=0, var_34=0, var_35=1, var_39=1, var_54=0, var_58=2, var_73=0, var_75=3, var_94=0] [L260] SORT_3 var_49 = var_49_arg_0 & var_49_arg_1; [L261] SORT_3 var_52_arg_0 = state_50; [L262] SORT_3 var_52_arg_1 = var_39; [L263] SORT_3 var_52 = var_52_arg_0 == var_52_arg_1; [L264] SORT_3 var_53_arg_0 = var_49; [L265] SORT_3 var_53_arg_1 = var_52; VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=0, state_118=0, state_122=0, state_29=0, state_31=0, state_41=0, state_50=0, state_60=0, state_64=0, state_81=0, state_98=0, var_105=0, var_21=0, var_26=31, var_27=0, var_28=0, var_34=0, var_35=1, var_39=1, var_53_arg_0=0, var_53_arg_1=0, var_54=0, var_58=2, var_73=0, var_75=3, var_94=0] [L266] EXPR var_53_arg_0 & var_53_arg_1 [L266] EXPR var_53_arg_0 & var_53_arg_1 VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=0, state_118=0, state_122=0, state_29=0, state_31=0, state_41=0, state_50=0, state_60=0, state_64=0, state_81=0, state_98=0, var_105=0, var_21=0, var_26=31, var_27=0, var_28=0, var_34=0, var_35=1, var_39=1, var_54=0, var_58=2, var_73=0, var_75=3, var_94=0] [L266] SORT_3 var_53 = var_53_arg_0 & var_53_arg_1; [L267] SORT_24 var_55_arg_0 = var_54; [L268] SORT_24 var_55_arg_1 = var_26; [L269] SORT_3 var_55 = var_55_arg_0 != var_55_arg_1; [L270] SORT_3 var_56_arg_0 = var_53; [L271] SORT_3 var_56_arg_1 = var_55; VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=0, state_118=0, state_122=0, state_29=0, state_31=0, state_41=0, state_50=0, state_60=0, state_64=0, state_81=0, state_98=0, var_105=0, var_21=0, var_26=31, var_27=0, var_28=0, var_34=0, var_35=1, var_39=1, var_56_arg_0=0, var_56_arg_1=1, var_58=2, var_73=0, var_75=3, var_94=0] [L272] EXPR var_56_arg_0 & var_56_arg_1 [L272] EXPR var_56_arg_0 & var_56_arg_1 VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=0, state_118=0, state_122=0, state_29=0, state_31=0, state_41=0, state_50=0, state_60=0, state_64=0, state_81=0, state_98=0, var_105=0, var_21=0, var_26=31, var_27=0, var_28=0, var_34=0, var_35=1, var_39=1, var_58=2, var_73=0, var_75=3, var_94=0] [L272] SORT_3 var_56 = var_56_arg_0 & var_56_arg_1; [L273] EXPR var_56 & mask_SORT_3 [L273] EXPR var_56 & mask_SORT_3 VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=0, state_118=0, state_122=0, state_29=0, state_31=0, state_41=0, state_50=0, state_60=0, state_64=0, state_81=0, state_98=0, var_105=0, var_21=0, var_26=31, var_27=0, var_28=0, var_34=0, var_35=1, var_39=1, var_58=2, var_73=0, var_75=3, var_94=0] [L273] var_56 = var_56 & mask_SORT_3 [L274] SORT_3 var_57_arg_0 = var_56; [L275] SORT_33 var_57_arg_1 = var_35; [L276] SORT_33 var_57_arg_2 = var_34; [L277] SORT_33 var_57 = var_57_arg_0 ? var_57_arg_1 : var_57_arg_2; [L278] SORT_3 var_74_arg_0 = var_73; [L279] SORT_33 var_74_arg_1 = var_58; [L280] SORT_33 var_74_arg_2 = var_57; [L281] SORT_33 var_74 = var_74_arg_0 ? var_74_arg_1 : var_74_arg_2; [L282] SORT_3 var_95_arg_0 = var_94; [L283] SORT_33 var_95_arg_1 = var_75; [L284] SORT_33 var_95_arg_2 = var_74; [L285] SORT_33 var_95 = var_95_arg_0 ? var_95_arg_1 : var_95_arg_2; VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=0, state_118=0, state_122=0, state_29=0, state_31=0, state_41=0, state_50=0, state_60=0, state_64=0, state_81=0, state_98=0, var_105=0, var_21=0, var_26=31, var_27=0, var_28=0, var_34=0, var_35=1, var_39=1, var_58=2, var_75=3, var_95=0] [L286] EXPR var_95 & mask_SORT_33 [L286] EXPR var_95 & mask_SORT_33 VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=0, state_118=0, state_122=0, state_29=0, state_31=0, state_41=0, state_50=0, state_60=0, state_64=0, state_81=0, state_98=0, var_105=0, var_21=0, var_26=31, var_27=0, var_28=0, var_34=0, var_35=1, var_39=1, var_58=2, var_75=3] [L286] var_95 = var_95 & mask_SORT_33 [L287] SORT_33 var_102_arg_0 = var_95; [L288] SORT_33 var_102_arg_1 = var_35; [L289] SORT_3 var_102 = var_102_arg_0 == var_102_arg_1; [L290] SORT_33 var_100_arg_0 = var_95; [L291] SORT_33 var_100_arg_1 = var_34; [L292] SORT_3 var_100 = var_100_arg_0 == var_100_arg_1; [L293] SORT_3 var_103_arg_0 = var_102; [L294] SORT_3 var_103_arg_1 = var_100; VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=0, state_118=0, state_122=0, state_29=0, state_31=0, state_41=0, state_50=0, state_60=0, state_64=0, state_81=0, state_98=0, var_100=1, var_103_arg_0=0, var_103_arg_1=1, var_105=0, var_21=0, var_26=31, var_27=0, var_28=0, var_34=0, var_35=1, var_39=1, var_58=2, var_75=3, var_95=0] [L295] EXPR var_103_arg_0 | var_103_arg_1 [L295] EXPR var_103_arg_0 | var_103_arg_1 VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=0, state_118=0, state_122=0, state_29=0, state_31=0, state_41=0, state_50=0, state_60=0, state_64=0, state_81=0, state_98=0, var_100=1, var_105=0, var_21=0, var_26=31, var_27=0, var_28=0, var_34=0, var_35=1, var_39=1, var_58=2, var_75=3, var_95=0] [L295] SORT_3 var_103 = var_103_arg_0 | var_103_arg_1; [L296] EXPR var_103 & mask_SORT_3 VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=0, state_118=0, state_122=0, state_29=0, state_31=0, state_41=0, state_50=0, state_60=0, state_64=0, state_81=0, state_98=0, var_100=1, var_103=1, var_105=0, var_21=0, var_26=31, var_27=0, var_28=0, var_34=0, var_35=1, var_39=1, var_58=2, var_75=3, var_95=0] [L296] EXPR var_103 & mask_SORT_3 [L296] EXPR var_103 & mask_SORT_3 VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=0, state_118=0, state_122=0, state_29=0, state_31=0, state_41=0, state_50=0, state_60=0, state_64=0, state_81=0, state_98=0, var_100=1, var_105=0, var_21=0, var_26=31, var_27=0, var_28=0, var_34=0, var_35=1, var_39=1, var_58=2, var_75=3, var_95=0] [L296] var_103 = var_103 & mask_SORT_3 [L297] SORT_3 var_101_arg_0 = var_100; [L298] SORT_6 var_101_arg_1 = var_28; [L299] SORT_6 var_101_arg_2 = state_98; [L300] SORT_6 var_101 = var_101_arg_0 ? var_101_arg_1 : var_101_arg_2; [L301] SORT_33 var_96_arg_0 = var_95; [L302] SORT_33 var_96_arg_1 = var_58; [L303] SORT_3 var_96 = var_96_arg_0 == var_96_arg_1; [L304] SORT_3 var_97_arg_0 = var_96; [L305] SORT_6 var_97_arg_1 = state_31; [L306] SORT_6 var_97_arg_2 = state_29; [L307] SORT_6 var_97 = var_97_arg_0 ? var_97_arg_1 : var_97_arg_2; [L308] SORT_3 var_104_arg_0 = var_103; [L309] SORT_6 var_104_arg_1 = var_101; [L310] SORT_6 var_104_arg_2 = var_97; [L311] SORT_6 var_104 = var_104_arg_0 ? var_104_arg_1 : var_104_arg_2; [L312] SORT_3 var_106_arg_0 = var_105; [L313] SORT_6 var_106_arg_1 = var_28; [L314] SORT_6 var_106_arg_2 = var_104; [L315] SORT_6 var_106 = var_106_arg_0 ? var_106_arg_1 : var_106_arg_2; [L316] SORT_6 var_107_arg_0 = var_106; [L317] SORT_1 var_107 = var_107_arg_0 >> 26; VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=0, state_118=0, state_122=0, state_31=0, state_41=0, state_50=0, state_60=0, state_64=0, state_81=0, state_98=0, var_107=0, var_21=0, var_26=31, var_27=0, var_28=0, var_34=0, var_35=1, var_39=1, var_58=2, var_75=3] [L318] EXPR var_107 & mask_SORT_1 [L318] EXPR var_107 & mask_SORT_1 VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=0, state_118=0, state_122=0, state_31=0, state_41=0, state_50=0, state_60=0, state_64=0, state_81=0, state_98=0, var_21=0, var_26=31, var_27=0, var_28=0, var_34=0, var_35=1, var_39=1, var_58=2, var_75=3] [L318] var_107 = var_107 & mask_SORT_1 [L319] SORT_1 var_108_arg_0 = var_107; [L320] SORT_1 var_108_arg_1 = var_21; [L321] SORT_3 var_108 = var_108_arg_0 == var_108_arg_1; [L322] SORT_3 var_109_arg_0 = var_27; [L323] SORT_3 var_109_arg_1 = var_108; VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=0, state_118=0, state_122=0, state_31=0, state_41=0, state_50=0, state_60=0, state_64=0, state_81=0, state_98=0, var_109_arg_0=0, var_109_arg_1=1, var_21=0, var_26=31, var_28=0, var_34=0, var_35=1, var_39=1, var_58=2, var_75=3] [L324] EXPR var_109_arg_0 & var_109_arg_1 [L324] EXPR var_109_arg_0 & var_109_arg_1 VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=0, state_118=0, state_122=0, state_31=0, state_41=0, state_50=0, state_60=0, state_64=0, state_81=0, state_98=0, var_21=0, var_26=31, var_28=0, var_34=0, var_35=1, var_39=1, var_58=2, var_75=3] [L324] SORT_3 var_109 = var_109_arg_0 & var_109_arg_1; [L325] SORT_3 var_110_arg_0 = var_109; [L326] SORT_3 var_110 = ~var_110_arg_0; [L327] SORT_3 var_113_arg_0 = var_110; [L328] SORT_3 var_113 = ~var_113_arg_0; [L329] SORT_3 var_114_arg_0 = var_39; [L330] SORT_3 var_114_arg_1 = var_113; VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=0, state_118=0, state_122=0, state_31=0, state_41=0, state_50=0, state_60=0, state_64=0, state_81=0, state_98=0, var_114_arg_0=1, var_114_arg_1=-256, var_21=0, var_26=31, var_28=0, var_34=0, var_35=1, var_39=1, var_58=2, var_75=3] [L331] EXPR var_114_arg_0 & var_114_arg_1 [L331] EXPR var_114_arg_0 & var_114_arg_1 VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=0, state_118=0, state_122=0, state_31=0, state_41=0, state_50=0, state_60=0, state_64=0, state_81=0, state_98=0, var_21=0, var_26=31, var_28=0, var_34=0, var_35=1, var_39=1, var_58=2, var_75=3] [L331] SORT_3 var_114 = var_114_arg_0 & var_114_arg_1; [L332] EXPR var_114 & mask_SORT_3 [L332] EXPR var_114 & mask_SORT_3 VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=0, state_118=0, state_122=0, state_31=0, state_41=0, state_50=0, state_60=0, state_64=0, state_81=0, state_98=0, var_21=0, var_26=31, var_28=0, var_34=0, var_35=1, var_39=1, var_58=2, var_75=3] [L332] var_114 = var_114 & mask_SORT_3 [L333] SORT_3 bad_115_arg_0 = var_114; VAL [bad_115_arg_0=0, input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=0, state_118=0, state_122=0, state_31=0, state_41=0, state_50=0, state_60=0, state_64=0, state_81=0, state_98=0, var_21=0, var_26=31, var_28=0, var_34=0, var_35=1, var_39=1, var_58=2, var_75=3] [L334] CALL __VERIFIER_assert(!(bad_115_arg_0)) VAL [\old(cond)=1] [L21] COND FALSE !(!(cond)) VAL [\old(cond)=1] [L334] RET __VERIFIER_assert(!(bad_115_arg_0)) VAL [bad_115_arg_0=0, input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=0, state_118=0, state_122=0, state_31=0, state_41=0, state_50=0, state_60=0, state_64=0, state_81=0, state_98=0, var_21=0, var_26=31, var_28=0, var_34=0, var_35=1, var_39=1, var_58=2, var_75=3] [L336] SORT_1 next_139_arg_1 = input_12; [L337] SORT_6 next_140_arg_1 = input_7; [L338] SORT_6 next_141_arg_1 = input_9; [L339] SORT_1 next_142_arg_1 = input_11; [L340] SORT_3 var_143_arg_0 = state_122; [L341] SORT_1 var_143_arg_1 = state_60; [L342] SORT_1 var_143_arg_2 = state_41; [L343] SORT_1 var_143 = var_143_arg_0 ? var_143_arg_1 : var_143_arg_2; VAL [bad_115_arg_0=0, input_10=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, next_139_arg_1=287, next_140_arg_1=0, next_141_arg_1=0, next_142_arg_1=0, state_116=0, state_118=0, state_122=0, state_31=0, state_50=0, state_64=0, state_81=0, state_98=0, var_143=0, var_21=0, var_26=31, var_28=0, var_34=0, var_35=1, var_39=1, var_58=2, var_75=3] [L344] EXPR var_143 & mask_SORT_1 [L344] EXPR var_143 & mask_SORT_1 VAL [bad_115_arg_0=0, input_10=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, next_139_arg_1=287, next_140_arg_1=0, next_141_arg_1=0, next_142_arg_1=0, state_116=0, state_118=0, state_122=0, state_31=0, state_50=0, state_64=0, state_81=0, state_98=0, var_21=0, var_26=31, var_28=0, var_34=0, var_35=1, var_39=1, var_58=2, var_75=3] [L344] var_143 = var_143 & mask_SORT_1 [L345] SORT_1 next_144_arg_1 = var_143; [L346] SORT_3 next_145_arg_1 = input_19; [L347] SORT_3 var_146_arg_0 = state_122; [L348] SORT_3 var_146_arg_1 = state_64; [L349] SORT_3 var_146_arg_2 = state_50; [L350] SORT_3 var_146 = var_146_arg_0 ? var_146_arg_1 : var_146_arg_2; VAL [bad_115_arg_0=0, input_10=0, input_14=0, input_16=0, input_17=0, input_18=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, next_139_arg_1=287, next_140_arg_1=0, next_141_arg_1=0, next_142_arg_1=0, next_144_arg_1=0, next_145_arg_1=0, state_116=0, state_118=0, state_122=0, state_31=0, state_81=0, state_98=0, var_146=0, var_21=0, var_26=31, var_28=0, var_34=0, var_35=1, var_39=1, var_58=2, var_75=3] [L351] EXPR var_146 & mask_SORT_3 [L351] EXPR var_146 & mask_SORT_3 VAL [bad_115_arg_0=0, input_10=0, input_14=0, input_16=0, input_17=0, input_18=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, next_139_arg_1=287, next_140_arg_1=0, next_141_arg_1=0, next_142_arg_1=0, next_144_arg_1=0, next_145_arg_1=0, state_116=0, state_118=0, state_122=0, state_31=0, state_81=0, state_98=0, var_21=0, var_26=31, var_28=0, var_34=0, var_35=1, var_39=1, var_58=2, var_75=3] [L351] var_146 = var_146 & mask_SORT_3 [L352] SORT_3 next_147_arg_1 = var_146; [L353] SORT_1 next_148_arg_1 = input_10; [L354] SORT_3 next_149_arg_1 = input_8; [L355] SORT_3 next_150_arg_1 = input_18; [L356] SORT_1 next_151_arg_1 = input_5; [L357] SORT_1 var_152_arg_0 = state_116; [L358] SORT_3 var_152 = var_152_arg_0 >> 5; [L359] SORT_1 var_153_arg_0 = state_116; [L360] SORT_3 var_153 = var_153_arg_0 >> 2; [L361] SORT_3 var_154_arg_0 = var_152; [L362] SORT_3 var_154_arg_1 = var_153; VAL [bad_115_arg_0=0, input_14=0, input_16=0, input_17=0, input_4=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, next_139_arg_1=287, next_140_arg_1=0, next_141_arg_1=0, next_142_arg_1=0, next_144_arg_1=0, next_145_arg_1=0, next_147_arg_1=0, next_148_arg_1=0, next_149_arg_1=0, next_150_arg_1=0, next_151_arg_1=0, state_116=0, state_118=0, state_122=0, state_31=0, state_81=0, state_98=0, var_154_arg_0=0, var_154_arg_1=0, var_21=0, var_26=31, var_28=0, var_34=0, var_35=1, var_39=1, var_58=2, var_75=3] [L363] EXPR var_154_arg_0 & var_154_arg_1 [L363] EXPR var_154_arg_0 & var_154_arg_1 VAL [bad_115_arg_0=0, input_14=0, input_16=0, input_17=0, input_4=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, next_139_arg_1=287, next_140_arg_1=0, next_141_arg_1=0, next_142_arg_1=0, next_144_arg_1=0, next_145_arg_1=0, next_147_arg_1=0, next_148_arg_1=0, next_149_arg_1=0, next_150_arg_1=0, next_151_arg_1=0, state_116=0, state_118=0, state_122=0, state_31=0, state_81=0, state_98=0, var_21=0, var_26=31, var_28=0, var_34=0, var_35=1, var_39=1, var_58=2, var_75=3] [L363] SORT_3 var_154 = var_154_arg_0 & var_154_arg_1; [L364] SORT_1 var_155_arg_0 = state_116; [L365] SORT_3 var_155 = var_155_arg_0 >> 0; [L366] SORT_3 var_156_arg_0 = var_155; [L367] SORT_3 var_156 = ~var_156_arg_0; [L368] SORT_3 var_157_arg_0 = var_154; [L369] SORT_3 var_157_arg_1 = var_156; VAL [bad_115_arg_0=0, input_14=0, input_16=0, input_17=0, input_4=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, next_139_arg_1=287, next_140_arg_1=0, next_141_arg_1=0, next_142_arg_1=0, next_144_arg_1=0, next_145_arg_1=0, next_147_arg_1=0, next_148_arg_1=0, next_149_arg_1=0, next_150_arg_1=0, next_151_arg_1=0, state_118=0, state_122=0, state_31=0, state_81=0, state_98=0, var_157_arg_0=0, var_157_arg_1=-1, var_21=0, var_26=31, var_28=0, var_34=0, var_35=1, var_39=1, var_58=2, var_75=3] [L370] EXPR var_157_arg_0 & var_157_arg_1 [L370] EXPR var_157_arg_0 & var_157_arg_1 VAL [bad_115_arg_0=0, input_14=0, input_16=0, input_17=0, input_4=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, next_139_arg_1=287, next_140_arg_1=0, next_141_arg_1=0, next_142_arg_1=0, next_144_arg_1=0, next_145_arg_1=0, next_147_arg_1=0, next_148_arg_1=0, next_149_arg_1=0, next_150_arg_1=0, next_151_arg_1=0, state_118=0, state_122=0, state_31=0, state_81=0, state_98=0, var_21=0, var_26=31, var_28=0, var_34=0, var_35=1, var_39=1, var_58=2, var_75=3] [L370] SORT_3 var_157 = var_157_arg_0 & var_157_arg_1; [L371] SORT_3 var_158_arg_0 = state_118; [L372] SORT_3 var_158_arg_1 = var_157; [L373] SORT_3 var_158_arg_2 = state_81; [L374] SORT_3 var_158 = var_158_arg_0 ? var_158_arg_1 : var_158_arg_2; VAL [bad_115_arg_0=0, input_14=0, input_16=0, input_17=0, input_4=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, next_139_arg_1=287, next_140_arg_1=0, next_141_arg_1=0, next_142_arg_1=0, next_144_arg_1=0, next_145_arg_1=0, next_147_arg_1=0, next_148_arg_1=0, next_149_arg_1=0, next_150_arg_1=0, next_151_arg_1=0, state_122=0, state_31=0, state_98=0, var_158=0, var_21=0, var_26=31, var_28=0, var_34=0, var_35=1, var_39=1, var_58=2, var_75=3] [L375] EXPR var_158 & mask_SORT_3 [L375] EXPR var_158 & mask_SORT_3 VAL [bad_115_arg_0=0, input_14=0, input_16=0, input_17=0, input_4=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, next_139_arg_1=287, next_140_arg_1=0, next_141_arg_1=0, next_142_arg_1=0, next_144_arg_1=0, next_145_arg_1=0, next_147_arg_1=0, next_148_arg_1=0, next_149_arg_1=0, next_150_arg_1=0, next_151_arg_1=0, state_122=0, state_31=0, state_98=0, var_21=0, var_26=31, var_28=0, var_34=0, var_35=1, var_39=1, var_58=2, var_75=3] [L375] var_158 = var_158 & mask_SORT_3 [L376] SORT_3 next_159_arg_1 = var_158; [L377] SORT_3 next_160_arg_1 = input_4; [L378] SORT_3 next_161_arg_1 = input_17; [L379] SORT_3 var_162_arg_0 = state_122; [L380] SORT_6 var_162_arg_1 = state_31; [L381] SORT_6 var_162_arg_2 = state_98; [L382] SORT_6 var_162 = var_162_arg_0 ? var_162_arg_1 : var_162_arg_2; [L383] SORT_6 next_163_arg_1 = var_162; [L384] SORT_1 next_164_arg_1 = input_2; [L385] SORT_3 next_165_arg_1 = input_14; [L386] SORT_3 next_166_arg_1 = input_16; [L388] state_22 = next_139_arg_1 [L389] state_29 = next_140_arg_1 [L390] state_31 = next_141_arg_1 [L391] state_36 = next_142_arg_1 [L392] state_41 = next_144_arg_1 [L393] state_46 = next_145_arg_1 [L394] state_50 = next_147_arg_1 [L395] state_60 = next_148_arg_1 [L396] state_64 = next_149_arg_1 [L397] state_68 = next_150_arg_1 [L398] state_77 = next_151_arg_1 [L399] state_81 = next_159_arg_1 [L400] state_85 = next_160_arg_1 [L401] state_89 = next_161_arg_1 [L402] state_98 = next_163_arg_1 [L403] state_116 = next_164_arg_1 [L404] state_118 = next_165_arg_1 [L405] state_122 = next_166_arg_1 [L133] input_2 = __VERIFIER_nondet_uchar() [L134] input_4 = __VERIFIER_nondet_uchar() [L135] EXPR input_4 & mask_SORT_3 [L135] EXPR input_4 & mask_SORT_3 VAL [mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=2147483649, state_118=0, state_122=0, state_22=287, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_68=0, state_77=0, state_81=0, state_85=0, state_89=0, state_98=0, var_21=0, var_26=31, var_28=0, var_34=0, var_35=1, var_39=1, var_58=2, var_75=3] [L135] input_4 = input_4 & mask_SORT_3 [L136] input_5 = __VERIFIER_nondet_uchar() [L137] EXPR input_5 & mask_SORT_1 [L137] EXPR input_5 & mask_SORT_1 VAL [input_4=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=2147483649, state_118=0, state_122=0, state_22=287, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_68=0, state_77=0, state_81=0, state_85=0, state_89=0, state_98=0, var_21=0, var_26=31, var_28=0, var_34=0, var_35=1, var_39=1, var_58=2, var_75=3] [L137] input_5 = input_5 & mask_SORT_1 [L138] input_7 = __VERIFIER_nondet_uint() [L139] input_8 = __VERIFIER_nondet_uchar() [L140] EXPR input_8 & mask_SORT_3 [L140] EXPR input_8 & mask_SORT_3 VAL [input_4=0, input_5=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=2147483649, state_118=0, state_122=0, state_22=287, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_68=0, state_77=0, state_81=0, state_85=0, state_89=0, state_98=0, var_21=0, var_26=31, var_28=0, var_34=0, var_35=1, var_39=1, var_58=2, var_75=3] [L140] input_8 = input_8 & mask_SORT_3 [L141] input_9 = __VERIFIER_nondet_uint() [L142] input_10 = __VERIFIER_nondet_uchar() [L143] EXPR input_10 & mask_SORT_1 [L143] EXPR input_10 & mask_SORT_1 VAL [input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=2147483649, state_118=0, state_122=0, state_22=287, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_68=0, state_77=0, state_81=0, state_85=0, state_89=0, state_98=0, var_21=0, var_26=31, var_28=0, var_34=0, var_35=1, var_39=1, var_58=2, var_75=3] [L143] input_10 = input_10 & mask_SORT_1 [L144] input_11 = __VERIFIER_nondet_uchar() [L145] EXPR input_11 & mask_SORT_1 [L145] EXPR input_11 & mask_SORT_1 VAL [input_10=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=2147483649, state_118=0, state_122=0, state_22=287, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_68=0, state_77=0, state_81=0, state_85=0, state_89=0, state_98=0, var_21=0, var_26=31, var_28=0, var_34=0, var_35=1, var_39=1, var_58=2, var_75=3] [L145] input_11 = input_11 & mask_SORT_1 [L146] input_12 = __VERIFIER_nondet_uchar() [L147] input_13 = __VERIFIER_nondet_uchar() [L148] input_14 = __VERIFIER_nondet_uchar() [L149] EXPR input_14 & mask_SORT_3 [L149] EXPR input_14 & mask_SORT_3 VAL [input_10=0, input_11=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=2147483649, state_118=0, state_122=0, state_22=287, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_68=0, state_77=0, state_81=0, state_85=0, state_89=0, state_98=0, var_21=0, var_26=31, var_28=0, var_34=0, var_35=1, var_39=1, var_58=2, var_75=3] [L149] input_14 = input_14 & mask_SORT_3 [L150] input_15 = __VERIFIER_nondet_uchar() [L151] input_16 = __VERIFIER_nondet_uchar() [L152] EXPR input_16 & mask_SORT_3 [L152] EXPR input_16 & mask_SORT_3 VAL [input_10=0, input_11=0, input_14=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=2147483649, state_118=0, state_122=0, state_22=287, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_68=0, state_77=0, state_81=0, state_85=0, state_89=0, state_98=0, var_21=0, var_26=31, var_28=0, var_34=0, var_35=1, var_39=1, var_58=2, var_75=3] [L152] input_16 = input_16 & mask_SORT_3 [L153] input_17 = __VERIFIER_nondet_uchar() [L154] EXPR input_17 & mask_SORT_3 [L154] EXPR input_17 & mask_SORT_3 VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=2147483649, state_118=0, state_122=0, state_22=287, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_68=0, state_77=0, state_81=0, state_85=0, state_89=0, state_98=0, var_21=0, var_26=31, var_28=0, var_34=0, var_35=1, var_39=1, var_58=2, var_75=3] [L154] input_17 = input_17 & mask_SORT_3 [L155] input_18 = __VERIFIER_nondet_uchar() [L156] EXPR input_18 & mask_SORT_3 [L156] EXPR input_18 & mask_SORT_3 VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=2147483649, state_118=0, state_122=0, state_22=287, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_68=0, state_77=0, state_81=0, state_85=0, state_89=0, state_98=0, var_21=0, var_26=31, var_28=0, var_34=0, var_35=1, var_39=1, var_58=2, var_75=3] [L156] input_18 = input_18 & mask_SORT_3 [L157] input_19 = __VERIFIER_nondet_uchar() [L158] EXPR input_19 & mask_SORT_3 [L158] EXPR input_19 & mask_SORT_3 VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=2147483649, state_118=0, state_122=0, state_22=287, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_68=0, state_77=0, state_81=0, state_85=0, state_89=0, state_98=0, var_21=0, var_26=31, var_28=0, var_34=0, var_35=1, var_39=1, var_58=2, var_75=3] [L158] input_19 = input_19 & mask_SORT_3 [L159] input_20 = __VERIFIER_nondet_uchar() [L160] input_120 = __VERIFIER_nondet_uchar() [L161] input_124 = __VERIFIER_nondet_uchar() [L162] input_126 = __VERIFIER_nondet_uchar() [L163] input_129 = __VERIFIER_nondet_uchar() [L164] input_131 = __VERIFIER_nondet_uchar() [L165] input_134 = __VERIFIER_nondet_uint() [L166] input_136 = __VERIFIER_nondet_uchar() [L169] SORT_1 var_25_arg_0 = state_22; [L170] SORT_24 var_25 = var_25_arg_0 >> 0; VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=2147483649, state_118=0, state_122=0, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_68=0, state_77=0, state_81=0, state_85=0, state_89=0, state_98=0, var_21=0, var_25=31, var_26=31, var_28=0, var_34=0, var_35=1, var_39=1, var_58=2, var_75=3] [L171] EXPR var_25 & mask_SORT_24 VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=2147483649, state_118=0, state_122=0, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_68=0, state_77=0, state_81=0, state_85=0, state_89=0, state_98=0, var_21=0, var_25=31, var_26=31, var_28=0, var_34=0, var_35=1, var_39=1, var_58=2, var_75=3] [L171] EXPR var_25 & mask_SORT_24 [L171] EXPR var_25 & mask_SORT_24 VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=2147483649, state_118=0, state_122=0, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_68=0, state_77=0, state_81=0, state_85=0, state_89=0, state_98=0, var_21=0, var_26=31, var_28=0, var_34=0, var_35=1, var_39=1, var_58=2, var_75=3] [L171] var_25 = var_25 & mask_SORT_24 [L172] SORT_24 var_27_arg_0 = var_25; [L173] SORT_24 var_27_arg_1 = var_26; [L174] SORT_3 var_27 = var_27_arg_0 == var_27_arg_1; [L175] SORT_1 var_54_arg_0 = state_36; [L176] SORT_24 var_54 = var_54_arg_0 >> 0; VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=2147483649, state_118=0, state_122=0, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_68=0, state_77=0, state_81=0, state_85=0, state_89=0, state_98=0, var_21=0, var_26=31, var_27=1, var_28=0, var_34=0, var_35=1, var_39=1, var_54=0, var_58=2, var_75=3] [L177] EXPR var_54 & mask_SORT_24 [L177] EXPR var_54 & mask_SORT_24 VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=2147483649, state_118=0, state_122=0, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_68=0, state_77=0, state_81=0, state_85=0, state_89=0, state_98=0, var_21=0, var_26=31, var_27=1, var_28=0, var_34=0, var_35=1, var_39=1, var_58=2, var_75=3] [L177] var_54 = var_54 & mask_SORT_24 [L178] SORT_24 var_105_arg_0 = var_54; [L179] SORT_24 var_105_arg_1 = var_26; [L180] SORT_3 var_105 = var_105_arg_0 == var_105_arg_1; [L181] SORT_1 var_38_arg_0 = state_36; [L182] SORT_3 var_38 = var_38_arg_0 >> 5; VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=2147483649, state_118=0, state_122=0, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_68=0, state_77=0, state_81=0, state_85=0, state_89=0, state_98=0, var_105=0, var_21=0, var_26=31, var_27=1, var_28=0, var_34=0, var_35=1, var_38=0, var_39=1, var_54=0, var_58=2, var_75=3] [L183] EXPR var_38 & mask_SORT_3 [L183] EXPR var_38 & mask_SORT_3 VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=2147483649, state_118=0, state_122=0, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_68=0, state_77=0, state_81=0, state_85=0, state_89=0, state_98=0, var_105=0, var_21=0, var_26=31, var_27=1, var_28=0, var_34=0, var_35=1, var_39=1, var_54=0, var_58=2, var_75=3] [L183] var_38 = var_38 & mask_SORT_3 [L184] SORT_3 var_76_arg_0 = var_38; [L185] SORT_3 var_76_arg_1 = var_39; [L186] SORT_3 var_76 = var_76_arg_0 == var_76_arg_1; [L187] SORT_1 var_79_arg_0 = state_36; [L188] SORT_1 var_79_arg_1 = state_77; [L189] SORT_3 var_79 = var_79_arg_0 == var_79_arg_1; [L190] SORT_3 var_80_arg_0 = var_76; [L191] SORT_3 var_80_arg_1 = var_79; VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=2147483649, state_118=0, state_122=0, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_68=0, state_81=0, state_85=0, state_89=0, state_98=0, var_105=0, var_21=0, var_26=31, var_27=1, var_28=0, var_34=0, var_35=1, var_38=0, var_39=1, var_54=0, var_58=2, var_75=3, var_80_arg_0=0, var_80_arg_1=1] [L192] EXPR var_80_arg_0 & var_80_arg_1 [L192] EXPR var_80_arg_0 & var_80_arg_1 VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=2147483649, state_118=0, state_122=0, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_68=0, state_81=0, state_85=0, state_89=0, state_98=0, var_105=0, var_21=0, var_26=31, var_27=1, var_28=0, var_34=0, var_35=1, var_38=0, var_39=1, var_54=0, var_58=2, var_75=3] [L192] SORT_3 var_80 = var_80_arg_0 & var_80_arg_1; [L193] SORT_3 var_83_arg_0 = state_81; [L194] SORT_3 var_83_arg_1 = var_39; [L195] SORT_3 var_83 = var_83_arg_0 != var_83_arg_1; [L196] SORT_3 var_84_arg_0 = var_80; [L197] SORT_3 var_84_arg_1 = var_83; VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=2147483649, state_118=0, state_122=0, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_68=0, state_81=0, state_85=0, state_89=0, state_98=0, var_105=0, var_21=0, var_26=31, var_27=1, var_28=0, var_34=0, var_35=1, var_38=0, var_39=1, var_54=0, var_58=2, var_75=3, var_84_arg_0=0, var_84_arg_1=1] [L198] EXPR var_84_arg_0 & var_84_arg_1 [L198] EXPR var_84_arg_0 & var_84_arg_1 VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=2147483649, state_118=0, state_122=0, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_68=0, state_81=0, state_85=0, state_89=0, state_98=0, var_105=0, var_21=0, var_26=31, var_27=1, var_28=0, var_34=0, var_35=1, var_38=0, var_39=1, var_54=0, var_58=2, var_75=3] [L198] SORT_3 var_84 = var_84_arg_0 & var_84_arg_1; [L199] SORT_3 var_87_arg_0 = state_85; [L200] SORT_3 var_87_arg_1 = var_39; [L201] SORT_3 var_87 = var_87_arg_0 == var_87_arg_1; [L202] SORT_3 var_88_arg_0 = var_84; [L203] SORT_3 var_88_arg_1 = var_87; VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=2147483649, state_118=0, state_122=0, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_68=0, state_81=0, state_89=0, state_98=0, var_105=0, var_21=0, var_26=31, var_27=1, var_28=0, var_34=0, var_35=1, var_38=0, var_39=1, var_54=0, var_58=2, var_75=3, var_88_arg_0=0, var_88_arg_1=0] [L204] EXPR var_88_arg_0 & var_88_arg_1 [L204] EXPR var_88_arg_0 & var_88_arg_1 VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=2147483649, state_118=0, state_122=0, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_68=0, state_81=0, state_89=0, state_98=0, var_105=0, var_21=0, var_26=31, var_27=1, var_28=0, var_34=0, var_35=1, var_38=0, var_39=1, var_54=0, var_58=2, var_75=3] [L204] SORT_3 var_88 = var_88_arg_0 & var_88_arg_1; [L205] SORT_3 var_91_arg_0 = state_89; [L206] SORT_3 var_91_arg_1 = var_39; [L207] SORT_3 var_91 = var_91_arg_0 == var_91_arg_1; [L208] SORT_3 var_92_arg_0 = var_88; [L209] SORT_3 var_92_arg_1 = var_91; VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=2147483649, state_118=0, state_122=0, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_68=0, state_81=0, state_98=0, var_105=0, var_21=0, var_26=31, var_27=1, var_28=0, var_34=0, var_35=1, var_38=0, var_39=1, var_54=0, var_58=2, var_75=3, var_92_arg_0=0, var_92_arg_1=0] [L210] EXPR var_92_arg_0 & var_92_arg_1 [L210] EXPR var_92_arg_0 & var_92_arg_1 VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=2147483649, state_118=0, state_122=0, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_68=0, state_81=0, state_98=0, var_105=0, var_21=0, var_26=31, var_27=1, var_28=0, var_34=0, var_35=1, var_38=0, var_39=1, var_54=0, var_58=2, var_75=3] [L210] SORT_3 var_92 = var_92_arg_0 & var_92_arg_1; [L211] SORT_24 var_93_arg_0 = var_54; [L212] SORT_24 var_93_arg_1 = var_26; [L213] SORT_3 var_93 = var_93_arg_0 != var_93_arg_1; [L214] SORT_3 var_94_arg_0 = var_92; [L215] SORT_3 var_94_arg_1 = var_93; VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=2147483649, state_118=0, state_122=0, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_68=0, state_81=0, state_98=0, var_105=0, var_21=0, var_26=31, var_27=1, var_28=0, var_34=0, var_35=1, var_38=0, var_39=1, var_54=0, var_58=2, var_75=3, var_94_arg_0=0, var_94_arg_1=1] [L216] EXPR var_94_arg_0 & var_94_arg_1 [L216] EXPR var_94_arg_0 & var_94_arg_1 VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=2147483649, state_118=0, state_122=0, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_68=0, state_81=0, state_98=0, var_105=0, var_21=0, var_26=31, var_27=1, var_28=0, var_34=0, var_35=1, var_38=0, var_39=1, var_54=0, var_58=2, var_75=3] [L216] SORT_3 var_94 = var_94_arg_0 & var_94_arg_1; [L217] EXPR var_94 & mask_SORT_3 [L217] EXPR var_94 & mask_SORT_3 VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=2147483649, state_118=0, state_122=0, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_68=0, state_81=0, state_98=0, var_105=0, var_21=0, var_26=31, var_27=1, var_28=0, var_34=0, var_35=1, var_38=0, var_39=1, var_54=0, var_58=2, var_75=3] [L217] var_94 = var_94 & mask_SORT_3 [L218] SORT_3 var_59_arg_0 = var_38; [L219] SORT_3 var_59_arg_1 = var_39; [L220] SORT_3 var_59 = var_59_arg_0 == var_59_arg_1; [L221] SORT_1 var_62_arg_0 = state_36; [L222] SORT_1 var_62_arg_1 = state_60; [L223] SORT_3 var_62 = var_62_arg_0 == var_62_arg_1; [L224] SORT_3 var_63_arg_0 = var_59; [L225] SORT_3 var_63_arg_1 = var_62; VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=2147483649, state_118=0, state_122=0, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_68=0, state_81=0, state_98=0, var_105=0, var_21=0, var_26=31, var_27=1, var_28=0, var_34=0, var_35=1, var_38=0, var_39=1, var_54=0, var_58=2, var_63_arg_0=0, var_63_arg_1=1, var_75=3, var_94=0] [L226] EXPR var_63_arg_0 & var_63_arg_1 [L226] EXPR var_63_arg_0 & var_63_arg_1 VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=2147483649, state_118=0, state_122=0, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_68=0, state_81=0, state_98=0, var_105=0, var_21=0, var_26=31, var_27=1, var_28=0, var_34=0, var_35=1, var_38=0, var_39=1, var_54=0, var_58=2, var_75=3, var_94=0] [L226] SORT_3 var_63 = var_63_arg_0 & var_63_arg_1; [L227] SORT_3 var_66_arg_0 = state_64; [L228] SORT_3 var_66_arg_1 = var_39; [L229] SORT_3 var_66 = var_66_arg_0 == var_66_arg_1; [L230] SORT_3 var_67_arg_0 = var_63; [L231] SORT_3 var_67_arg_1 = var_66; VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=2147483649, state_118=0, state_122=0, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_68=0, state_81=0, state_98=0, var_105=0, var_21=0, var_26=31, var_27=1, var_28=0, var_34=0, var_35=1, var_38=0, var_39=1, var_54=0, var_58=2, var_67_arg_0=0, var_67_arg_1=0, var_75=3, var_94=0] [L232] EXPR var_67_arg_0 & var_67_arg_1 [L232] EXPR var_67_arg_0 & var_67_arg_1 VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=2147483649, state_118=0, state_122=0, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_68=0, state_81=0, state_98=0, var_105=0, var_21=0, var_26=31, var_27=1, var_28=0, var_34=0, var_35=1, var_38=0, var_39=1, var_54=0, var_58=2, var_75=3, var_94=0] [L232] SORT_3 var_67 = var_67_arg_0 & var_67_arg_1; [L233] SORT_3 var_70_arg_0 = state_68; [L234] SORT_3 var_70_arg_1 = var_39; [L235] SORT_3 var_70 = var_70_arg_0 == var_70_arg_1; [L236] SORT_3 var_71_arg_0 = var_67; [L237] SORT_3 var_71_arg_1 = var_70; VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=2147483649, state_118=0, state_122=0, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_81=0, state_98=0, var_105=0, var_21=0, var_26=31, var_27=1, var_28=0, var_34=0, var_35=1, var_38=0, var_39=1, var_54=0, var_58=2, var_71_arg_0=0, var_71_arg_1=0, var_75=3, var_94=0] [L238] EXPR var_71_arg_0 & var_71_arg_1 [L238] EXPR var_71_arg_0 & var_71_arg_1 VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=2147483649, state_118=0, state_122=0, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_81=0, state_98=0, var_105=0, var_21=0, var_26=31, var_27=1, var_28=0, var_34=0, var_35=1, var_38=0, var_39=1, var_54=0, var_58=2, var_75=3, var_94=0] [L238] SORT_3 var_71 = var_71_arg_0 & var_71_arg_1; [L239] SORT_24 var_72_arg_0 = var_54; [L240] SORT_24 var_72_arg_1 = var_26; [L241] SORT_3 var_72 = var_72_arg_0 != var_72_arg_1; [L242] SORT_3 var_73_arg_0 = var_71; [L243] SORT_3 var_73_arg_1 = var_72; VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=2147483649, state_118=0, state_122=0, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_81=0, state_98=0, var_105=0, var_21=0, var_26=31, var_27=1, var_28=0, var_34=0, var_35=1, var_38=0, var_39=1, var_54=0, var_58=2, var_73_arg_0=0, var_73_arg_1=1, var_75=3, var_94=0] [L244] EXPR var_73_arg_0 & var_73_arg_1 [L244] EXPR var_73_arg_0 & var_73_arg_1 VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=2147483649, state_118=0, state_122=0, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_81=0, state_98=0, var_105=0, var_21=0, var_26=31, var_27=1, var_28=0, var_34=0, var_35=1, var_38=0, var_39=1, var_54=0, var_58=2, var_75=3, var_94=0] [L244] SORT_3 var_73 = var_73_arg_0 & var_73_arg_1; [L245] EXPR var_73 & mask_SORT_3 [L245] EXPR var_73 & mask_SORT_3 VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=2147483649, state_118=0, state_122=0, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_81=0, state_98=0, var_105=0, var_21=0, var_26=31, var_27=1, var_28=0, var_34=0, var_35=1, var_38=0, var_39=1, var_54=0, var_58=2, var_75=3, var_94=0] [L245] var_73 = var_73 & mask_SORT_3 [L246] SORT_3 var_40_arg_0 = var_38; [L247] SORT_3 var_40_arg_1 = var_39; [L248] SORT_3 var_40 = var_40_arg_0 == var_40_arg_1; [L249] SORT_1 var_43_arg_0 = state_36; [L250] SORT_1 var_43_arg_1 = state_41; [L251] SORT_3 var_43 = var_43_arg_0 == var_43_arg_1; [L252] SORT_3 var_44_arg_0 = var_40; [L253] SORT_3 var_44_arg_1 = var_43; VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=2147483649, state_118=0, state_122=0, state_29=0, state_31=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_81=0, state_98=0, var_105=0, var_21=0, var_26=31, var_27=1, var_28=0, var_34=0, var_35=1, var_39=1, var_44_arg_0=0, var_44_arg_1=1, var_54=0, var_58=2, var_73=0, var_75=3, var_94=0] [L254] EXPR var_44_arg_0 & var_44_arg_1 [L254] EXPR var_44_arg_0 & var_44_arg_1 VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=2147483649, state_118=0, state_122=0, state_29=0, state_31=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_81=0, state_98=0, var_105=0, var_21=0, var_26=31, var_27=1, var_28=0, var_34=0, var_35=1, var_39=1, var_54=0, var_58=2, var_73=0, var_75=3, var_94=0] [L254] SORT_3 var_44 = var_44_arg_0 & var_44_arg_1; [L255] SORT_3 var_48_arg_0 = state_46; [L256] SORT_3 var_48_arg_1 = var_39; [L257] SORT_3 var_48 = var_48_arg_0 == var_48_arg_1; [L258] SORT_3 var_49_arg_0 = var_44; [L259] SORT_3 var_49_arg_1 = var_48; VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=2147483649, state_118=0, state_122=0, state_29=0, state_31=0, state_41=0, state_50=0, state_60=0, state_64=0, state_81=0, state_98=0, var_105=0, var_21=0, var_26=31, var_27=1, var_28=0, var_34=0, var_35=1, var_39=1, var_49_arg_0=0, var_49_arg_1=0, var_54=0, var_58=2, var_73=0, var_75=3, var_94=0] [L260] EXPR var_49_arg_0 & var_49_arg_1 [L260] EXPR var_49_arg_0 & var_49_arg_1 VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=2147483649, state_118=0, state_122=0, state_29=0, state_31=0, state_41=0, state_50=0, state_60=0, state_64=0, state_81=0, state_98=0, var_105=0, var_21=0, var_26=31, var_27=1, var_28=0, var_34=0, var_35=1, var_39=1, var_54=0, var_58=2, var_73=0, var_75=3, var_94=0] [L260] SORT_3 var_49 = var_49_arg_0 & var_49_arg_1; [L261] SORT_3 var_52_arg_0 = state_50; [L262] SORT_3 var_52_arg_1 = var_39; [L263] SORT_3 var_52 = var_52_arg_0 == var_52_arg_1; [L264] SORT_3 var_53_arg_0 = var_49; [L265] SORT_3 var_53_arg_1 = var_52; VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=2147483649, state_118=0, state_122=0, state_29=0, state_31=0, state_41=0, state_50=0, state_60=0, state_64=0, state_81=0, state_98=0, var_105=0, var_21=0, var_26=31, var_27=1, var_28=0, var_34=0, var_35=1, var_39=1, var_53_arg_0=0, var_53_arg_1=0, var_54=0, var_58=2, var_73=0, var_75=3, var_94=0] [L266] EXPR var_53_arg_0 & var_53_arg_1 [L266] EXPR var_53_arg_0 & var_53_arg_1 VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=2147483649, state_118=0, state_122=0, state_29=0, state_31=0, state_41=0, state_50=0, state_60=0, state_64=0, state_81=0, state_98=0, var_105=0, var_21=0, var_26=31, var_27=1, var_28=0, var_34=0, var_35=1, var_39=1, var_54=0, var_58=2, var_73=0, var_75=3, var_94=0] [L266] SORT_3 var_53 = var_53_arg_0 & var_53_arg_1; [L267] SORT_24 var_55_arg_0 = var_54; [L268] SORT_24 var_55_arg_1 = var_26; [L269] SORT_3 var_55 = var_55_arg_0 != var_55_arg_1; [L270] SORT_3 var_56_arg_0 = var_53; [L271] SORT_3 var_56_arg_1 = var_55; VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=2147483649, state_118=0, state_122=0, state_29=0, state_31=0, state_41=0, state_50=0, state_60=0, state_64=0, state_81=0, state_98=0, var_105=0, var_21=0, var_26=31, var_27=1, var_28=0, var_34=0, var_35=1, var_39=1, var_56_arg_0=0, var_56_arg_1=1, var_58=2, var_73=0, var_75=3, var_94=0] [L272] EXPR var_56_arg_0 & var_56_arg_1 [L272] EXPR var_56_arg_0 & var_56_arg_1 VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=2147483649, state_118=0, state_122=0, state_29=0, state_31=0, state_41=0, state_50=0, state_60=0, state_64=0, state_81=0, state_98=0, var_105=0, var_21=0, var_26=31, var_27=1, var_28=0, var_34=0, var_35=1, var_39=1, var_58=2, var_73=0, var_75=3, var_94=0] [L272] SORT_3 var_56 = var_56_arg_0 & var_56_arg_1; [L273] EXPR var_56 & mask_SORT_3 [L273] EXPR var_56 & mask_SORT_3 VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=2147483649, state_118=0, state_122=0, state_29=0, state_31=0, state_41=0, state_50=0, state_60=0, state_64=0, state_81=0, state_98=0, var_105=0, var_21=0, var_26=31, var_27=1, var_28=0, var_34=0, var_35=1, var_39=1, var_58=2, var_73=0, var_75=3, var_94=0] [L273] var_56 = var_56 & mask_SORT_3 [L274] SORT_3 var_57_arg_0 = var_56; [L275] SORT_33 var_57_arg_1 = var_35; [L276] SORT_33 var_57_arg_2 = var_34; [L277] SORT_33 var_57 = var_57_arg_0 ? var_57_arg_1 : var_57_arg_2; [L278] SORT_3 var_74_arg_0 = var_73; [L279] SORT_33 var_74_arg_1 = var_58; [L280] SORT_33 var_74_arg_2 = var_57; [L281] SORT_33 var_74 = var_74_arg_0 ? var_74_arg_1 : var_74_arg_2; [L282] SORT_3 var_95_arg_0 = var_94; [L283] SORT_33 var_95_arg_1 = var_75; [L284] SORT_33 var_95_arg_2 = var_74; [L285] SORT_33 var_95 = var_95_arg_0 ? var_95_arg_1 : var_95_arg_2; VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=2147483649, state_118=0, state_122=0, state_29=0, state_31=0, state_41=0, state_50=0, state_60=0, state_64=0, state_81=0, state_98=0, var_105=0, var_21=0, var_26=31, var_27=1, var_28=0, var_34=0, var_35=1, var_39=1, var_58=2, var_75=3, var_95=0] [L286] EXPR var_95 & mask_SORT_33 [L286] EXPR var_95 & mask_SORT_33 VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=2147483649, state_118=0, state_122=0, state_29=0, state_31=0, state_41=0, state_50=0, state_60=0, state_64=0, state_81=0, state_98=0, var_105=0, var_21=0, var_26=31, var_27=1, var_28=0, var_34=0, var_35=1, var_39=1, var_58=2, var_75=3] [L286] var_95 = var_95 & mask_SORT_33 [L287] SORT_33 var_102_arg_0 = var_95; [L288] SORT_33 var_102_arg_1 = var_35; [L289] SORT_3 var_102 = var_102_arg_0 == var_102_arg_1; [L290] SORT_33 var_100_arg_0 = var_95; [L291] SORT_33 var_100_arg_1 = var_34; [L292] SORT_3 var_100 = var_100_arg_0 == var_100_arg_1; [L293] SORT_3 var_103_arg_0 = var_102; [L294] SORT_3 var_103_arg_1 = var_100; VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=2147483649, state_118=0, state_122=0, state_29=0, state_31=0, state_41=0, state_50=0, state_60=0, state_64=0, state_81=0, state_98=0, var_100=1, var_103_arg_0=0, var_103_arg_1=1, var_105=0, var_21=0, var_26=31, var_27=1, var_28=0, var_34=0, var_35=1, var_39=1, var_58=2, var_75=3, var_95=0] [L295] EXPR var_103_arg_0 | var_103_arg_1 [L295] EXPR var_103_arg_0 | var_103_arg_1 VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=2147483649, state_118=0, state_122=0, state_29=0, state_31=0, state_41=0, state_50=0, state_60=0, state_64=0, state_81=0, state_98=0, var_100=1, var_105=0, var_21=0, var_26=31, var_27=1, var_28=0, var_34=0, var_35=1, var_39=1, var_58=2, var_75=3, var_95=0] [L295] SORT_3 var_103 = var_103_arg_0 | var_103_arg_1; [L296] EXPR var_103 & mask_SORT_3 VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=2147483649, state_118=0, state_122=0, state_29=0, state_31=0, state_41=0, state_50=0, state_60=0, state_64=0, state_81=0, state_98=0, var_100=1, var_103=1, var_105=0, var_21=0, var_26=31, var_27=1, var_28=0, var_34=0, var_35=1, var_39=1, var_58=2, var_75=3, var_95=0] [L296] EXPR var_103 & mask_SORT_3 [L296] EXPR var_103 & mask_SORT_3 VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=2147483649, state_118=0, state_122=0, state_29=0, state_31=0, state_41=0, state_50=0, state_60=0, state_64=0, state_81=0, state_98=0, var_100=1, var_105=0, var_21=0, var_26=31, var_27=1, var_28=0, var_34=0, var_35=1, var_39=1, var_58=2, var_75=3, var_95=0] [L296] var_103 = var_103 & mask_SORT_3 [L297] SORT_3 var_101_arg_0 = var_100; [L298] SORT_6 var_101_arg_1 = var_28; [L299] SORT_6 var_101_arg_2 = state_98; [L300] SORT_6 var_101 = var_101_arg_0 ? var_101_arg_1 : var_101_arg_2; [L301] SORT_33 var_96_arg_0 = var_95; [L302] SORT_33 var_96_arg_1 = var_58; [L303] SORT_3 var_96 = var_96_arg_0 == var_96_arg_1; [L304] SORT_3 var_97_arg_0 = var_96; [L305] SORT_6 var_97_arg_1 = state_31; [L306] SORT_6 var_97_arg_2 = state_29; [L307] SORT_6 var_97 = var_97_arg_0 ? var_97_arg_1 : var_97_arg_2; [L308] SORT_3 var_104_arg_0 = var_103; [L309] SORT_6 var_104_arg_1 = var_101; [L310] SORT_6 var_104_arg_2 = var_97; [L311] SORT_6 var_104 = var_104_arg_0 ? var_104_arg_1 : var_104_arg_2; [L312] SORT_3 var_106_arg_0 = var_105; [L313] SORT_6 var_106_arg_1 = var_28; [L314] SORT_6 var_106_arg_2 = var_104; [L315] SORT_6 var_106 = var_106_arg_0 ? var_106_arg_1 : var_106_arg_2; [L316] SORT_6 var_107_arg_0 = var_106; [L317] SORT_1 var_107 = var_107_arg_0 >> 26; VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=2147483649, state_118=0, state_122=0, state_31=0, state_41=0, state_50=0, state_60=0, state_64=0, state_81=0, state_98=0, var_107=0, var_21=0, var_26=31, var_27=1, var_28=0, var_34=0, var_35=1, var_39=1, var_58=2, var_75=3] [L318] EXPR var_107 & mask_SORT_1 [L318] EXPR var_107 & mask_SORT_1 VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=2147483649, state_118=0, state_122=0, state_31=0, state_41=0, state_50=0, state_60=0, state_64=0, state_81=0, state_98=0, var_21=0, var_26=31, var_27=1, var_28=0, var_34=0, var_35=1, var_39=1, var_58=2, var_75=3] [L318] var_107 = var_107 & mask_SORT_1 [L319] SORT_1 var_108_arg_0 = var_107; [L320] SORT_1 var_108_arg_1 = var_21; [L321] SORT_3 var_108 = var_108_arg_0 == var_108_arg_1; [L322] SORT_3 var_109_arg_0 = var_27; [L323] SORT_3 var_109_arg_1 = var_108; VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=2147483649, state_118=0, state_122=0, state_31=0, state_41=0, state_50=0, state_60=0, state_64=0, state_81=0, state_98=0, var_109_arg_0=1, var_109_arg_1=1, var_21=0, var_26=31, var_28=0, var_34=0, var_35=1, var_39=1, var_58=2, var_75=3] [L324] EXPR var_109_arg_0 & var_109_arg_1 VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=2147483649, state_118=0, state_122=0, state_31=0, state_41=0, state_50=0, state_60=0, state_64=0, state_81=0, state_98=0, var_109_arg_0=1, var_109_arg_1=1, var_21=0, var_26=31, var_28=0, var_34=0, var_35=1, var_39=1, var_58=2, var_75=3] [L324] EXPR var_109_arg_0 & var_109_arg_1 [L324] EXPR var_109_arg_0 & var_109_arg_1 VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=2147483649, state_118=0, state_122=0, state_31=0, state_41=0, state_50=0, state_60=0, state_64=0, state_81=0, state_98=0, var_21=0, var_26=31, var_28=0, var_34=0, var_35=1, var_39=1, var_58=2, var_75=3] [L324] SORT_3 var_109 = var_109_arg_0 & var_109_arg_1; [L325] SORT_3 var_110_arg_0 = var_109; [L326] SORT_3 var_110 = ~var_110_arg_0; [L327] SORT_3 var_113_arg_0 = var_110; [L328] SORT_3 var_113 = ~var_113_arg_0; [L329] SORT_3 var_114_arg_0 = var_39; [L330] SORT_3 var_114_arg_1 = var_113; VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=2147483649, state_118=0, state_122=0, state_31=0, state_41=0, state_50=0, state_60=0, state_64=0, state_81=0, state_98=0, var_114_arg_0=1, var_114_arg_1=-255, var_21=0, var_26=31, var_28=0, var_34=0, var_35=1, var_39=1, var_58=2, var_75=3] [L331] EXPR var_114_arg_0 & var_114_arg_1 VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=2147483649, state_118=0, state_122=0, state_31=0, state_41=0, state_50=0, state_60=0, state_64=0, state_81=0, state_98=0, var_114_arg_0=1, var_114_arg_1=-255, var_21=0, var_26=31, var_28=0, var_34=0, var_35=1, var_39=1, var_58=2, var_75=3] [L331] EXPR var_114_arg_0 & var_114_arg_1 [L331] EXPR var_114_arg_0 & var_114_arg_1 VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=2147483649, state_118=0, state_122=0, state_31=0, state_41=0, state_50=0, state_60=0, state_64=0, state_81=0, state_98=0, var_21=0, var_26=31, var_28=0, var_34=0, var_35=1, var_39=1, var_58=2, var_75=3] [L331] SORT_3 var_114 = var_114_arg_0 & var_114_arg_1; [L332] EXPR var_114 & mask_SORT_3 VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=2147483649, state_118=0, state_122=0, state_31=0, state_41=0, state_50=0, state_60=0, state_64=0, state_81=0, state_98=0, var_114=1, var_21=0, var_26=31, var_28=0, var_34=0, var_35=1, var_39=1, var_58=2, var_75=3] [L332] EXPR var_114 & mask_SORT_3 [L332] EXPR var_114 & mask_SORT_3 VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=2147483649, state_118=0, state_122=0, state_31=0, state_41=0, state_50=0, state_60=0, state_64=0, state_81=0, state_98=0, var_21=0, var_26=31, var_28=0, var_34=0, var_35=1, var_39=1, var_58=2, var_75=3] [L332] var_114 = var_114 & mask_SORT_3 [L333] SORT_3 bad_115_arg_0 = var_114; VAL [bad_115_arg_0=1, input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=2147483649, state_118=0, state_122=0, state_31=0, state_41=0, state_50=0, state_60=0, state_64=0, state_81=0, state_98=0, var_21=0, var_26=31, var_28=0, var_34=0, var_35=1, var_39=1, var_58=2, var_75=3] [L334] CALL __VERIFIER_assert(!(bad_115_arg_0)) VAL [\old(cond)=0] [L21] COND TRUE !(cond) VAL [\old(cond)=0] [L21] reach_error() VAL [\old(cond)=0] - StatisticsResult: Ultimate Automizer benchmark data CFG has 6 procedures, 205 locations, 1 error locations. Started 1 CEGAR loops. OverallTime: 18.4s, OverallIterations: 6, TraceHistogramMax: 2, PathProgramHistogramMax: 1, EmptinessCheckTime: 0.0s, AutomataDifference: 2.0s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.4s, HoareTripleCheckerStatistics: 0 mSolverCounterUnknown, 1081 SdHoareTripleChecker+Valid, 1.6s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 1079 mSDsluCounter, 6574 SdHoareTripleChecker+Invalid, 1.3s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 0 IncrementalHoareTripleChecker+Unchecked, 5263 mSDsCounter, 4 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 2036 IncrementalHoareTripleChecker+Invalid, 2040 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 4 mSolverCounterUnsat, 1311 mSDtfsCounter, 2036 mSolverCounterSat, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Unknown, PredicateUnifierStatistics: 0 DeclaredPredicates, 692 GetRequests, 639 SyntacticMatches, 0 SemanticMatches, 53 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 306 ImplicationChecksByTransitivity, 0.7s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=694occurred in iteration=0, InterpolantAutomatonStates: 35, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 0.1s AutomataMinimizationTime, 5 MinimizatonAttempts, 394 StatesRemovedByMinimization, 4 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.2s SsaConstructionTime, 4.3s SatisfiabilityAnalysisTime, 9.2s InterpolantComputationTime, 1687 NumberOfCodeBlocks, 1687 NumberOfCodeBlocksAsserted, 8 NumberOfCheckSat, 1676 ConstructedInterpolants, 0 QuantifiedInterpolants, 7948 SizeOfPredicates, 7 NumberOfNonLiveVariables, 2605 ConjunctsInSsa, 109 ConjunctsInUnsatCore, 8 InterpolantComputations, 4 PerfectInterpolantSequences, 473/608 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! [2024-08-14 14:27:57,512 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Ended with exit code 0 Received shutdown request... --- End real Ultimate output --- Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE