extern void abort(void);
extern void __assert_fail(const char *, const char *, unsigned int, const char *) __attribute__ ((__nothrow__ , __leaf__)) __attribute__ ((__noreturn__));
void reach_error() { __assert_fail("0", "drivers--gpu--drm--i915--i915.ko_024.50aa253.32_1.cil_true-unreach-call.i", 3, "reach_error"); }
/* Generated by CIL v. 1.5.1 */
/* print_CIL_Input is false */
typedef unsigned int __kernel_mode_t;
typedef unsigned long __kernel_nlink_t;
typedef long __kernel_off_t;
typedef int __kernel_pid_t;
typedef unsigned int __kernel_uid_t;
typedef unsigned int __kernel_gid_t;
typedef unsigned long __kernel_size_t;
typedef long __kernel_ssize_t;
typedef long __kernel_time_t;
typedef long __kernel_clock_t;
typedef int __kernel_timer_t;
typedef int __kernel_clockid_t;
typedef long long __kernel_loff_t;
typedef __kernel_uid_t __kernel_uid32_t;
typedef __kernel_gid_t __kernel_gid32_t;
typedef signed char __s8;
typedef short __s16;
typedef unsigned short __u16;
typedef int __s32;
typedef unsigned int __u32;
typedef long long __s64;
typedef unsigned long long __u64;
typedef signed char s8;
typedef unsigned char u8;
typedef unsigned short u16;
typedef int s32;
typedef unsigned int u32;
typedef long long s64;
typedef unsigned long long u64;
typedef unsigned short umode_t;
typedef u64 dma_addr_t;
typedef __u32 __kernel_dev_t;
typedef __kernel_dev_t dev_t;
typedef __kernel_mode_t mode_t;
typedef __kernel_nlink_t nlink_t;
typedef __kernel_off_t off_t;
typedef __kernel_pid_t pid_t;
typedef __kernel_timer_t timer_t;
typedef __kernel_clockid_t clockid_t;
typedef _Bool bool;
typedef __kernel_uid32_t uid_t;
typedef __kernel_gid32_t gid_t;
typedef __kernel_loff_t loff_t;
typedef __kernel_size_t size_t;
typedef __kernel_ssize_t ssize_t;
typedef __kernel_time_t time_t;
typedef __kernel_clock_t clock_t;
typedef __u32 uint32_t;
typedef unsigned long sector_t;
typedef unsigned long blkcnt_t;
typedef unsigned int gfp_t;
typedef u64 phys_addr_t;
typedef phys_addr_t resource_size_t;
struct task_struct;
struct mm_struct;
typedef void (*ds_ovfl_callback_t)(struct task_struct * );
struct ds_context {
unsigned char *ds ;
struct task_struct *owner[2] ;
ds_ovfl_callback_t callback[2] ;
void *buffer[2] ;
unsigned int pages[2] ;
unsigned long count ;
struct ds_context **this ;
struct task_struct *task ;
};
struct pt_regs {
unsigned long r15 ;
unsigned long r14 ;
unsigned long r13 ;
unsigned long r12 ;
unsigned long bp ;
unsigned long bx ;
unsigned long r11 ;
unsigned long r10 ;
unsigned long r9 ;
unsigned long r8 ;
unsigned long ax ;
unsigned long cx ;
unsigned long dx ;
unsigned long si ;
unsigned long di ;
unsigned long orig_ax ;
unsigned long ip ;
unsigned long cs ;
unsigned long flags ;
unsigned long sp ;
unsigned long ss ;
};
struct info {
long ___orig_eip ;
long ___ebx ;
long ___ecx ;
long ___edx ;
long ___esi ;
long ___edi ;
long ___ebp ;
long ___eax ;
long ___ds ;
long ___es ;
long ___fs ;
long ___orig_eax ;
long ___eip ;
long ___cs ;
long ___eflags ;
long ___esp ;
long ___ss ;
long ___vm86_es ;
long ___vm86_ds ;
long ___vm86_fs ;
long ___vm86_gs ;
};
typedef __builtin_va_list __gnuc_va_list;
typedef __gnuc_va_list va_list;
struct module;
struct bug_entry {
unsigned long bug_addr ;
char const *file ;
unsigned short line ;
unsigned short flags ;
};
struct completion;
struct pid;
typedef unsigned long pgdval_t;
typedef unsigned long pgprotval_t;
struct page;
struct __anonstruct_pgd_t_9 {
pgdval_t pgd ;
};
typedef struct __anonstruct_pgd_t_9 pgd_t;
struct __anonstruct_pgprot_t_10 {
pgprotval_t pgprot ;
};
typedef struct __anonstruct_pgprot_t_10 pgprot_t;
struct __anonstruct____missing_field_name_14 {
unsigned int a ;
unsigned int b ;
};
struct __anonstruct____missing_field_name_15 {
u16 limit0 ;
u16 base0 ;
unsigned int base1 : 8 ;
unsigned int type : 4 ;
unsigned int s : 1 ;
unsigned int dpl : 2 ;
unsigned int p : 1 ;
unsigned int limit : 4 ;
unsigned int avl : 1 ;
unsigned int l : 1 ;
unsigned int d : 1 ;
unsigned int g : 1 ;
unsigned int base2 : 8 ;
};
union __anonunion____missing_field_name_13 {
struct __anonstruct____missing_field_name_14 __annonCompField2 ;
struct __anonstruct____missing_field_name_15 __annonCompField3 ;
};
struct desc_struct {
union __anonunion____missing_field_name_13 __annonCompField4 ;
} __attribute__((__packed__)) ;
struct __anonstruct_cpumask_t_18 {
unsigned long bits[((8UL + 8UL * sizeof(long )) - 1UL) / (8UL * sizeof(long ))] ;
};
typedef struct __anonstruct_cpumask_t_18 cpumask_t;
struct thread_struct;
struct raw_spinlock;
struct exec_domain;
struct map_segment;
struct exec_domain {
char const *name ;
void (*handler)(int , struct pt_regs * ) ;
unsigned char pers_low ;
unsigned char pers_high ;
unsigned long *signal_map ;
unsigned long *signal_invmap ;
struct map_segment *err_map ;
struct map_segment *socktype_map ;
struct map_segment *sockopt_map ;
struct map_segment *af_map ;
struct module *module ;
struct exec_domain *next ;
};
struct i387_fsave_struct {
u32 cwd ;
u32 swd ;
u32 twd ;
u32 fip ;
u32 fcs ;
u32 foo ;
u32 fos ;
u32 st_space[20] ;
u32 status ;
};
struct __anonstruct____missing_field_name_22 {
u64 rip ;
u64 rdp ;
};
struct __anonstruct____missing_field_name_23 {
u32 fip ;
u32 fcs ;
u32 foo ;
u32 fos ;
};
union __anonunion____missing_field_name_21 {
struct __anonstruct____missing_field_name_22 __annonCompField5 ;
struct __anonstruct____missing_field_name_23 __annonCompField6 ;
};
union __anonunion____missing_field_name_24 {
u32 padding1[12] ;
u32 sw_reserved[12] ;
};
struct i387_fxsave_struct {
u16 cwd ;
u16 swd ;
u16 twd ;
u16 fop ;
union __anonunion____missing_field_name_21 __annonCompField7 ;
u32 mxcsr ;
u32 mxcsr_mask ;
u32 st_space[32] ;
u32 xmm_space[64] ;
u32 padding[12] ;
union __anonunion____missing_field_name_24 __annonCompField8 ;
} __attribute__((__aligned__(16))) ;
struct i387_soft_struct {
u32 cwd ;
u32 swd ;
u32 twd ;
u32 fip ;
u32 fcs ;
u32 foo ;
u32 fos ;
u32 st_space[20] ;
u8 ftop ;
u8 changed ;
u8 lookahead ;
u8 no_update ;
u8 rm ;
u8 alimit ;
struct info *info ;
u32 entry_eip ;
};
struct xsave_hdr_struct {
u64 xstate_bv ;
u64 reserved1[2] ;
u64 reserved2[5] ;
} __attribute__((__packed__)) ;
struct xsave_struct {
struct i387_fxsave_struct i387 ;
struct xsave_hdr_struct xsave_hdr ;
} __attribute__((__packed__, __aligned__(64))) ;
union thread_xstate {
struct i387_fsave_struct fsave ;
struct i387_fxsave_struct fxsave ;
struct i387_soft_struct soft ;
struct xsave_struct xsave ;
};
struct kmem_cache;
struct thread_struct {
struct desc_struct tls_array[3] ;
unsigned long sp0 ;
unsigned long sp ;
unsigned long usersp ;
unsigned short es ;
unsigned short ds ;
unsigned short fsindex ;
unsigned short gsindex ;
unsigned long ip ;
unsigned long fs ;
unsigned long gs ;
unsigned long debugreg0 ;
unsigned long debugreg1 ;
unsigned long debugreg2 ;
unsigned long debugreg3 ;
unsigned long debugreg6 ;
unsigned long debugreg7 ;
unsigned long cr2 ;
unsigned long trap_no ;
unsigned long error_code ;
union thread_xstate *xstate ;
unsigned long *io_bitmap_ptr ;
unsigned long iopl ;
unsigned int io_bitmap_max ;
unsigned long debugctlmsr ;
struct ds_context *ds_ctx ;
unsigned int bts_ovfl_signal ;
};
struct __anonstruct_mm_segment_t_25 {
unsigned long seg ;
};
typedef struct __anonstruct_mm_segment_t_25 mm_segment_t;
struct list_head {
struct list_head *next ;
struct list_head *prev ;
};
struct hlist_node;
struct hlist_head {
struct hlist_node *first ;
};
struct hlist_node {
struct hlist_node *next ;
struct hlist_node **pprev ;
};
struct timespec;
struct compat_timespec;
struct __anonstruct____missing_field_name_27 {
unsigned long arg0 ;
unsigned long arg1 ;
unsigned long arg2 ;
unsigned long arg3 ;
};
struct __anonstruct_futex_28 {
u32 *uaddr ;
u32 val ;
u32 flags ;
u32 bitset ;
u64 time ;
};
struct __anonstruct_nanosleep_29 {
clockid_t index ;
struct timespec *rmtp ;
struct compat_timespec *compat_rmtp ;
u64 expires ;
};
union __anonunion____missing_field_name_26 {
struct __anonstruct____missing_field_name_27 __annonCompField9 ;
struct __anonstruct_futex_28 futex ;
struct __anonstruct_nanosleep_29 nanosleep ;
};
struct restart_block {
long (*fn)(struct restart_block * ) ;
union __anonunion____missing_field_name_26 __annonCompField10 ;
};
struct thread_info {
struct task_struct *task ;
struct exec_domain *exec_domain ;
unsigned long flags ;
__u32 status ;
__u32 cpu ;
int preempt_count ;
mm_segment_t addr_limit ;
struct restart_block restart_block ;
void *sysenter_return ;
};
struct raw_spinlock {
unsigned int slock ;
};
typedef struct raw_spinlock raw_spinlock_t;
struct __anonstruct_raw_rwlock_t_30 {
unsigned int lock ;
};
typedef struct __anonstruct_raw_rwlock_t_30 raw_rwlock_t;
struct lock_class_key {
};
struct __anonstruct_spinlock_t_31 {
raw_spinlock_t raw_lock ;
unsigned int magic ;
unsigned int owner_cpu ;
void *owner ;
};
typedef struct __anonstruct_spinlock_t_31 spinlock_t;
struct __anonstruct_rwlock_t_32 {
raw_rwlock_t raw_lock ;
unsigned int magic ;
unsigned int owner_cpu ;
void *owner ;
};
typedef struct __anonstruct_rwlock_t_32 rwlock_t;
struct __anonstruct_atomic_t_33 {
int counter ;
};
typedef struct __anonstruct_atomic_t_33 atomic_t;
struct __anonstruct_atomic64_t_34 {
long counter ;
};
typedef struct __anonstruct_atomic64_t_34 atomic64_t;
typedef atomic64_t atomic_long_t;
struct timespec {
time_t tv_sec ;
long tv_nsec ;
};
struct kstat {
u64 ino ;
dev_t dev ;
umode_t mode ;
unsigned int nlink ;
uid_t uid ;
gid_t gid ;
dev_t rdev ;
loff_t size ;
struct timespec atime ;
struct timespec mtime ;
struct timespec ctime ;
unsigned long blksize ;
unsigned long long blocks ;
};
struct __wait_queue;
typedef struct __wait_queue wait_queue_t;
struct __wait_queue {
unsigned int flags ;
void *private ;
int (*func)(wait_queue_t *wait , unsigned int mode , int sync , void *key ) ;
struct list_head task_list ;
};
struct __wait_queue_head {
spinlock_t lock ;
struct list_head task_list ;
};
typedef struct __wait_queue_head wait_queue_head_t;
struct __anonstruct_nodemask_t_36 {
unsigned long bits[(((unsigned long )(1 << 6) + 8UL * sizeof(long )) - 1UL) / (8UL * sizeof(long ))] ;
};
typedef struct __anonstruct_nodemask_t_36 nodemask_t;
struct mutex {
atomic_t count ;
spinlock_t wait_lock ;
struct list_head wait_list ;
struct thread_info *owner ;
char const *name ;
void *magic ;
};
struct mutex_waiter {
struct list_head list ;
struct task_struct *task ;
struct mutex *lock ;
void *magic ;
};
struct rw_semaphore;
struct rw_semaphore {
__s32 activity ;
spinlock_t wait_lock ;
struct list_head wait_list ;
};
struct file;
struct device;
struct pm_message {
int event ;
};
typedef struct pm_message pm_message_t;
struct pm_ops {
int (*prepare)(struct device *dev ) ;
void (*complete)(struct device *dev ) ;
int (*suspend)(struct device *dev ) ;
int (*resume)(struct device *dev ) ;
int (*freeze)(struct device *dev ) ;
int (*thaw)(struct device *dev ) ;
int (*poweroff)(struct device *dev ) ;
int (*restore)(struct device *dev ) ;
};
struct pm_ext_ops {
struct pm_ops base ;
int (*suspend_noirq)(struct device *dev ) ;
int (*resume_noirq)(struct device *dev ) ;
int (*freeze_noirq)(struct device *dev ) ;
int (*thaw_noirq)(struct device *dev ) ;
int (*poweroff_noirq)(struct device *dev ) ;
int (*restore_noirq)(struct device *dev ) ;
};
enum dpm_state {
DPM_INVALID = 0,
DPM_ON = 1,
DPM_PREPARING = 2,
DPM_RESUMING = 3,
DPM_SUSPENDING = 4,
DPM_OFF = 5,
DPM_OFF_IRQ = 6
} ;
struct dev_pm_info {
pm_message_t power_state ;
unsigned int can_wakeup : 1 ;
unsigned int should_wakeup : 1 ;
enum dpm_state status ;
struct list_head entry ;
};
struct __anonstruct_mm_context_t_84 {
void *ldt ;
int size ;
struct mutex lock ;
void *vdso ;
};
typedef struct __anonstruct_mm_context_t_84 mm_context_t;
struct pci_bus;
struct vm_area_struct;
struct key;
typedef __u64 Elf64_Addr;
typedef __u16 Elf64_Half;
typedef __u32 Elf64_Word;
typedef __u64 Elf64_Xword;
struct elf64_sym {
Elf64_Word st_name ;
unsigned char st_info ;
unsigned char st_other ;
Elf64_Half st_shndx ;
Elf64_Addr st_value ;
Elf64_Xword st_size ;
};
typedef struct elf64_sym Elf64_Sym;
struct kobject;
struct attribute {
char const *name ;
struct module *owner ;
mode_t mode ;
};
struct attribute_group {
char const *name ;
mode_t (*is_visible)(struct kobject * , struct attribute * , int ) ;
struct attribute **attrs ;
};
struct bin_attribute {
struct attribute attr ;
size_t size ;
void *private ;
ssize_t (*read)(struct kobject * , struct bin_attribute * , char * , loff_t ,
size_t ) ;
ssize_t (*write)(struct kobject * , struct bin_attribute * , char * , loff_t ,
size_t ) ;
int (*mmap)(struct kobject * , struct bin_attribute *attr , struct vm_area_struct *vma ) ;
};
struct sysfs_ops {
ssize_t (*show)(struct kobject * , struct attribute * , char * ) ;
ssize_t (*store)(struct kobject * , struct attribute * , char const * , size_t ) ;
};
struct sysfs_dirent;
struct kref {
atomic_t refcount ;
};
struct kset;
struct kobj_type;
struct kobject {
char const *name ;
struct list_head entry ;
struct kobject *parent ;
struct kset *kset ;
struct kobj_type *ktype ;
struct sysfs_dirent *sd ;
struct kref kref ;
unsigned int state_initialized : 1 ;
unsigned int state_in_sysfs : 1 ;
unsigned int state_add_uevent_sent : 1 ;
unsigned int state_remove_uevent_sent : 1 ;
};
struct kobj_type {
void (*release)(struct kobject *kobj ) ;
struct sysfs_ops *sysfs_ops ;
struct attribute **default_attrs ;
};
struct kobj_uevent_env {
char *envp[32] ;
int envp_idx ;
char buf[2048] ;
int buflen ;
};
struct kset_uevent_ops {
int (*filter)(struct kset *kset , struct kobject *kobj ) ;
char const *(*name)(struct kset *kset , struct kobject *kobj ) ;
int (*uevent)(struct kset *kset , struct kobject *kobj , struct kobj_uevent_env *env ) ;
};
struct kset {
struct list_head list ;
spinlock_t list_lock ;
struct kobject kobj ;
struct kset_uevent_ops *uevent_ops ;
};
struct marker;
typedef void marker_probe_func(void *probe_private , void *call_private , char const *fmt ,
va_list *args );
struct marker_probe_closure {
marker_probe_func *func ;
void *probe_private ;
};
struct marker {
char const *name ;
char const *format ;
char state ;
char ptype ;
void (*call)(struct marker const *mdata , void *call_private , ...) ;
struct marker_probe_closure single ;
struct marker_probe_closure *multi ;
} __attribute__((__aligned__(8))) ;
typedef unsigned long long cycles_t;
union ktime {
s64 tv64 ;
};
typedef union ktime ktime_t;
struct tvec_base;
struct timer_list {
struct list_head entry ;
unsigned long expires ;
void (*function)(unsigned long ) ;
unsigned long data ;
struct tvec_base *base ;
void *start_site ;
char start_comm[16] ;
int start_pid ;
};
struct hrtimer;
enum hrtimer_restart;
struct work_struct;
struct work_struct {
atomic_long_t data ;
struct list_head entry ;
void (*func)(struct work_struct *work ) ;
};
struct delayed_work {
struct work_struct work ;
struct timer_list timer ;
};
enum stat_item {
ALLOC_FASTPATH = 0,
ALLOC_SLOWPATH = 1,
FREE_FASTPATH = 2,
FREE_SLOWPATH = 3,
FREE_FROZEN = 4,
FREE_ADD_PARTIAL = 5,
FREE_REMOVE_PARTIAL = 6,
ALLOC_FROM_PARTIAL = 7,
ALLOC_SLAB = 8,
ALLOC_REFILL = 9,
FREE_SLAB = 10,
CPUSLAB_FLUSH = 11,
DEACTIVATE_FULL = 12,
DEACTIVATE_EMPTY = 13,
DEACTIVATE_TO_HEAD = 14,
DEACTIVATE_TO_TAIL = 15,
DEACTIVATE_REMOTE_FREES = 16,
ORDER_FALLBACK = 17,
NR_SLUB_STAT_ITEMS = 18
} ;
struct kmem_cache_cpu {
void **freelist ;
struct page *page ;
int node ;
unsigned int offset ;
unsigned int objsize ;
unsigned int stat[NR_SLUB_STAT_ITEMS] ;
};
struct kmem_cache_node {
spinlock_t list_lock ;
unsigned long nr_partial ;
unsigned long min_partial ;
struct list_head partial ;
atomic_long_t nr_slabs ;
atomic_long_t total_objects ;
struct list_head full ;
};
struct kmem_cache_order_objects {
unsigned long x ;
};
struct kmem_cache {
unsigned long flags ;
int size ;
int objsize ;
int offset ;
struct kmem_cache_order_objects oo ;
struct kmem_cache_node local_node ;
struct kmem_cache_order_objects max ;
struct kmem_cache_order_objects min ;
gfp_t allocflags ;
int refcount ;
void (*ctor)(void * ) ;
int inuse ;
int align ;
char const *name ;
struct list_head list ;
struct kobject kobj ;
int remote_node_defrag_ratio ;
struct kmem_cache_node *node[1 << 6] ;
struct kmem_cache_cpu *cpu_slab[8] ;
};
struct __anonstruct_local_t_95 {
atomic_long_t a ;
};
typedef struct __anonstruct_local_t_95 local_t;
struct mod_arch_specific {
};
struct kernel_symbol {
unsigned long value ;
char const *name ;
};
struct module_attribute {
struct attribute attr ;
ssize_t (*show)(struct module_attribute * , struct module * , char * ) ;
ssize_t (*store)(struct module_attribute * , struct module * , char const * ,
size_t count ) ;
void (*setup)(struct module * , char const * ) ;
int (*test)(struct module * ) ;
void (*free)(struct module * ) ;
};
struct module_kobject {
struct kobject kobj ;
struct module *mod ;
struct kobject *drivers_dir ;
};
struct exception_table_entry;
struct module_ref {
local_t count ;
} __attribute__((__aligned__((1) << (7) ))) ;
enum module_state {
MODULE_STATE_LIVE = 0,
MODULE_STATE_COMING = 1,
MODULE_STATE_GOING = 2
} ;
struct module_param_attrs;
struct module_sect_attrs;
struct module_notes_attrs;
struct module {
enum module_state state ;
struct list_head list ;
char name[64UL - sizeof(unsigned long )] ;
struct module_kobject mkobj ;
struct module_param_attrs *param_attrs ;
struct module_attribute *modinfo_attrs ;
char const *version ;
char const *srcversion ;
struct kobject *holders_dir ;
struct kernel_symbol const *syms ;
unsigned long const *crcs ;
unsigned int num_syms ;
unsigned int num_gpl_syms ;
struct kernel_symbol const *gpl_syms ;
unsigned long const *gpl_crcs ;
struct kernel_symbol const *unused_syms ;
unsigned long const *unused_crcs ;
unsigned int num_unused_syms ;
unsigned int num_unused_gpl_syms ;
struct kernel_symbol const *unused_gpl_syms ;
unsigned long const *unused_gpl_crcs ;
struct kernel_symbol const *gpl_future_syms ;
unsigned long const *gpl_future_crcs ;
unsigned int num_gpl_future_syms ;
unsigned int num_exentries ;
struct exception_table_entry const *extable ;
int (*init)(void) ;
void *module_init ;
void *module_core ;
unsigned int init_size ;
unsigned int core_size ;
unsigned int init_text_size ;
unsigned int core_text_size ;
void *unwind_info ;
struct mod_arch_specific arch ;
unsigned int taints ;
unsigned int num_bugs ;
struct list_head bug_list ;
struct bug_entry *bug_table ;
Elf64_Sym *symtab ;
unsigned int num_symtab ;
char *strtab ;
struct module_sect_attrs *sect_attrs ;
struct module_notes_attrs *notes_attrs ;
void *percpu ;
char *args ;
struct marker *markers ;
unsigned int num_markers ;
struct list_head modules_which_use_me ;
struct task_struct *waiter ;
void (*exit)(void) ;
struct module_ref ref[8] ;
};
struct device_driver;
struct file_operations;
struct completion {
unsigned int done ;
wait_queue_head_t wait ;
};
struct rcu_head {
struct rcu_head *next ;
void (*func)(struct rcu_head *head ) ;
};
struct nameidata;
struct path;
struct vfsmount;
struct qstr {
unsigned int hash ;
unsigned int len ;
unsigned char const *name ;
};
struct dcookie_struct;
struct inode;
union __anonunion_d_u_96 {
struct list_head d_child ;
struct rcu_head d_rcu ;
};
struct dentry_operations;
struct super_block;
struct dentry {
atomic_t d_count ;
unsigned int d_flags ;
spinlock_t d_lock ;
struct inode *d_inode ;
struct hlist_node d_hash ;
struct dentry *d_parent ;
struct qstr d_name ;
struct list_head d_lru ;
union __anonunion_d_u_96 d_u ;
struct list_head d_subdirs ;
struct list_head d_alias ;
unsigned long d_time ;
struct dentry_operations *d_op ;
struct super_block *d_sb ;
void *d_fsdata ;
struct dcookie_struct *d_cookie ;
int d_mounted ;
unsigned char d_iname[36] ;
};
struct dentry_operations {
int (*d_revalidate)(struct dentry * , struct nameidata * ) ;
int (*d_hash)(struct dentry * , struct qstr * ) ;
int (*d_compare)(struct dentry * , struct qstr * , struct qstr * ) ;
int (*d_delete)(struct dentry * ) ;
void (*d_release)(struct dentry * ) ;
void (*d_iput)(struct dentry * , struct inode * ) ;
char *(*d_dname)(struct dentry * , char * , int ) ;
};
struct path {
struct vfsmount *mnt ;
struct dentry *dentry ;
};
struct radix_tree_node;
struct radix_tree_root {
unsigned int height ;
gfp_t gfp_mask ;
struct radix_tree_node *rnode ;
};
struct prio_tree_node;
struct raw_prio_tree_node {
struct prio_tree_node *left ;
struct prio_tree_node *right ;
struct prio_tree_node *parent ;
};
struct prio_tree_node {
struct prio_tree_node *left ;
struct prio_tree_node *right ;
struct prio_tree_node *parent ;
unsigned long start ;
unsigned long last ;
};
struct prio_tree_root {
struct prio_tree_node *prio_tree_node ;
unsigned short index_bits ;
unsigned short raw ;
};
enum pid_type {
PIDTYPE_PID = 0,
PIDTYPE_PGID = 1,
PIDTYPE_SID = 2,
PIDTYPE_MAX = 3
} ;
struct pid_namespace;
struct upid {
int nr ;
struct pid_namespace *ns ;
struct hlist_node pid_chain ;
};
struct pid {
atomic_t count ;
unsigned int level ;
struct hlist_head tasks[PIDTYPE_MAX] ;
struct rcu_head rcu ;
struct upid numbers[1] ;
};
struct pid_link {
struct hlist_node node ;
struct pid *pid ;
};
struct kernel_cap_struct {
__u32 cap[2] ;
};
typedef struct kernel_cap_struct kernel_cap_t;
struct semaphore {
spinlock_t lock ;
unsigned int count ;
struct list_head wait_list ;
};
struct fiemap_extent {
__u64 fe_logical ;
__u64 fe_physical ;
__u64 fe_length ;
__u64 fe_reserved64[2] ;
__u32 fe_flags ;
__u32 fe_reserved[3] ;
};
struct export_operations;
struct iovec;
struct kiocb;
struct pipe_inode_info;
struct poll_table_struct;
struct kstatfs;
struct iattr {
unsigned int ia_valid ;
umode_t ia_mode ;
uid_t ia_uid ;
gid_t ia_gid ;
loff_t ia_size ;
struct timespec ia_atime ;
struct timespec ia_mtime ;
struct timespec ia_ctime ;
struct file *ia_file ;
};
struct if_dqblk {
__u64 dqb_bhardlimit ;
__u64 dqb_bsoftlimit ;
__u64 dqb_curspace ;
__u64 dqb_ihardlimit ;
__u64 dqb_isoftlimit ;
__u64 dqb_curinodes ;
__u64 dqb_btime ;
__u64 dqb_itime ;
__u32 dqb_valid ;
};
struct if_dqinfo {
__u64 dqi_bgrace ;
__u64 dqi_igrace ;
__u32 dqi_flags ;
__u32 dqi_valid ;
};
struct fs_disk_quota {
__s8 d_version ;
__s8 d_flags ;
__u16 d_fieldmask ;
__u32 d_id ;
__u64 d_blk_hardlimit ;
__u64 d_blk_softlimit ;
__u64 d_ino_hardlimit ;
__u64 d_ino_softlimit ;
__u64 d_bcount ;
__u64 d_icount ;
__s32 d_itimer ;
__s32 d_btimer ;
__u16 d_iwarns ;
__u16 d_bwarns ;
__s32 d_padding2 ;
__u64 d_rtb_hardlimit ;
__u64 d_rtb_softlimit ;
__u64 d_rtbcount ;
__s32 d_rtbtimer ;
__u16 d_rtbwarns ;
__s16 d_padding3 ;
char d_padding4[8] ;
};
struct fs_qfilestat {
__u64 qfs_ino ;
__u64 qfs_nblks ;
__u32 qfs_nextents ;
};
typedef struct fs_qfilestat fs_qfilestat_t;
struct fs_quota_stat {
__s8 qs_version ;
__u16 qs_flags ;
__s8 qs_pad ;
fs_qfilestat_t qs_uquota ;
fs_qfilestat_t qs_gquota ;
__u32 qs_incoredqs ;
__s32 qs_btimelimit ;
__s32 qs_itimelimit ;
__s32 qs_rtbtimelimit ;
__u16 qs_bwarnlimit ;
__u16 qs_iwarnlimit ;
};
struct v1_mem_dqinfo {
};
struct v2_mem_dqinfo {
unsigned int dqi_blocks ;
unsigned int dqi_free_blk ;
unsigned int dqi_free_entry ;
};
typedef __kernel_uid32_t qid_t;
typedef __u64 qsize_t;
struct mem_dqblk {
__u32 dqb_bhardlimit ;
__u32 dqb_bsoftlimit ;
qsize_t dqb_curspace ;
__u32 dqb_ihardlimit ;
__u32 dqb_isoftlimit ;
__u32 dqb_curinodes ;
time_t dqb_btime ;
time_t dqb_itime ;
};
struct quota_format_type;
union __anonunion_u_100 {
struct v1_mem_dqinfo v1_i ;
struct v2_mem_dqinfo v2_i ;
};
struct mem_dqinfo {
struct quota_format_type *dqi_format ;
int dqi_fmt_id ;
struct list_head dqi_dirty_list ;
unsigned long dqi_flags ;
unsigned int dqi_bgrace ;
unsigned int dqi_igrace ;
qsize_t dqi_maxblimit ;
qsize_t dqi_maxilimit ;
union __anonunion_u_100 u ;
};
struct dquot {
struct hlist_node dq_hash ;
struct list_head dq_inuse ;
struct list_head dq_free ;
struct list_head dq_dirty ;
struct mutex dq_lock ;
atomic_t dq_count ;
wait_queue_head_t dq_wait_unused ;
struct super_block *dq_sb ;
unsigned int dq_id ;
loff_t dq_off ;
unsigned long dq_flags ;
short dq_type ;
struct mem_dqblk dq_dqb ;
};
struct quota_format_ops {
int (*check_quota_file)(struct super_block *sb , int type ) ;
int (*read_file_info)(struct super_block *sb , int type ) ;
int (*write_file_info)(struct super_block *sb , int type ) ;
int (*free_file_info)(struct super_block *sb , int type ) ;
int (*read_dqblk)(struct dquot *dquot ) ;
int (*commit_dqblk)(struct dquot *dquot ) ;
int (*release_dqblk)(struct dquot *dquot ) ;
};
struct dquot_operations {
int (*initialize)(struct inode * , int ) ;
int (*drop)(struct inode * ) ;
int (*alloc_space)(struct inode * , qsize_t , int ) ;
int (*alloc_inode)(struct inode const * , unsigned long ) ;
int (*free_space)(struct inode * , qsize_t ) ;
int (*free_inode)(struct inode const * , unsigned long ) ;
int (*transfer)(struct inode * , struct iattr * ) ;
int (*write_dquot)(struct dquot * ) ;
int (*acquire_dquot)(struct dquot * ) ;
int (*release_dquot)(struct dquot * ) ;
int (*mark_dirty)(struct dquot * ) ;
int (*write_info)(struct super_block * , int ) ;
};
struct quotactl_ops {
int (*quota_on)(struct super_block * , int , int , char * , int ) ;
int (*quota_off)(struct super_block * , int , int ) ;
int (*quota_sync)(struct super_block * , int ) ;
int (*get_info)(struct super_block * , int , struct if_dqinfo * ) ;
int (*set_info)(struct super_block * , int , struct if_dqinfo * ) ;
int (*get_dqblk)(struct super_block * , int , qid_t , struct if_dqblk * ) ;
int (*set_dqblk)(struct super_block * , int , qid_t , struct if_dqblk * ) ;
int (*get_xstate)(struct super_block * , struct fs_quota_stat * ) ;
int (*set_xstate)(struct super_block * , unsigned int , int ) ;
int (*get_xquota)(struct super_block * , int , qid_t , struct fs_disk_quota * ) ;
int (*set_xquota)(struct super_block * , int , qid_t , struct fs_disk_quota * ) ;
};
struct quota_format_type {
int qf_fmt_id ;
struct quota_format_ops *qf_ops ;
struct module *qf_owner ;
struct quota_format_type *qf_next ;
};
struct quota_info {
unsigned int flags ;
struct mutex dqio_mutex ;
struct mutex dqonoff_mutex ;
struct rw_semaphore dqptr_sem ;
struct inode *files[2] ;
struct mem_dqinfo info[2] ;
struct quota_format_ops *ops[2] ;
};
struct address_space;
struct writeback_control;
union __anonunion_arg_102 {
char *buf ;
void *data ;
};
struct __anonstruct_read_descriptor_t_101 {
size_t written ;
size_t count ;
union __anonunion_arg_102 arg ;
int error ;
};
typedef struct __anonstruct_read_descriptor_t_101 read_descriptor_t;
struct address_space_operations {
int (*writepage)(struct page *page , struct writeback_control *wbc ) ;
int (*readpage)(struct file * , struct page * ) ;
void (*sync_page)(struct page * ) ;
int (*writepages)(struct address_space * , struct writeback_control * ) ;
int (*set_page_dirty)(struct page *page ) ;
int (*readpages)(struct file *filp , struct address_space *mapping , struct list_head *pages ,
unsigned int nr_pages ) ;
int (*prepare_write)(struct file * , struct page * , unsigned int , unsigned int ) ;
int (*commit_write)(struct file * , struct page * , unsigned int , unsigned int ) ;
int (*write_begin)(struct file * , struct address_space *mapping , loff_t pos ,
unsigned int len , unsigned int flags , struct page **pagep ,
void **fsdata ) ;
int (*write_end)(struct file * , struct address_space *mapping , loff_t pos , unsigned int len ,
unsigned int copied , struct page *page , void *fsdata ) ;
sector_t (*bmap)(struct address_space * , sector_t ) ;
void (*invalidatepage)(struct page * , unsigned long ) ;
int (*releasepage)(struct page * , gfp_t ) ;
ssize_t (*direct_IO)(int , struct kiocb * , struct iovec const *iov , loff_t offset ,
unsigned long nr_segs ) ;
int (*get_xip_mem)(struct address_space * , unsigned long , int , void ** , unsigned long * ) ;
int (*migratepage)(struct address_space * , struct page * , struct page * ) ;
int (*launder_page)(struct page * ) ;
int (*is_partially_uptodate)(struct page * , read_descriptor_t * , unsigned long ) ;
};
struct backing_dev_info;
struct address_space {
struct inode *host ;
struct radix_tree_root page_tree ;
spinlock_t tree_lock ;
unsigned int i_mmap_writable ;
struct prio_tree_root i_mmap ;
struct list_head i_mmap_nonlinear ;
spinlock_t i_mmap_lock ;
unsigned int truncate_count ;
unsigned long nrpages ;
unsigned long writeback_index ;
struct address_space_operations const *a_ops ;
unsigned long flags ;
struct backing_dev_info *backing_dev_info ;
spinlock_t private_lock ;
struct list_head private_list ;
struct address_space *assoc_mapping ;
} __attribute__((__aligned__(sizeof(long )))) ;
struct hd_struct;
struct gendisk;
struct block_device {
dev_t bd_dev ;
struct inode *bd_inode ;
int bd_openers ;
struct mutex bd_mutex ;
struct semaphore bd_mount_sem ;
struct list_head bd_inodes ;
void *bd_holder ;
int bd_holders ;
struct list_head bd_holder_list ;
struct block_device *bd_contains ;
unsigned int bd_block_size ;
struct hd_struct *bd_part ;
unsigned int bd_part_count ;
int bd_invalidated ;
struct gendisk *bd_disk ;
struct list_head bd_list ;
struct backing_dev_info *bd_inode_backing_dev_info ;
unsigned long bd_private ;
};
struct inode_operations;
struct file_lock;
struct cdev;
union __anonunion____missing_field_name_103 {
struct pipe_inode_info *i_pipe ;
struct block_device *i_bdev ;
struct cdev *i_cdev ;
};
struct dnotify_struct;
struct inode {
struct hlist_node i_hash ;
struct list_head i_list ;
struct list_head i_sb_list ;
struct list_head i_dentry ;
unsigned long i_ino ;
atomic_t i_count ;
unsigned int i_nlink ;
uid_t i_uid ;
gid_t i_gid ;
dev_t i_rdev ;
u64 i_version ;
loff_t i_size ;
struct timespec i_atime ;
struct timespec i_mtime ;
struct timespec i_ctime ;
unsigned int i_blkbits ;
blkcnt_t i_blocks ;
unsigned short i_bytes ;
umode_t i_mode ;
spinlock_t i_lock ;
struct mutex i_mutex ;
struct rw_semaphore i_alloc_sem ;
struct inode_operations const *i_op ;
struct file_operations const *i_fop ;
struct super_block *i_sb ;
struct file_lock *i_flock ;
struct address_space *i_mapping ;
struct address_space i_data ;
struct dquot *i_dquot[2] ;
struct list_head i_devices ;
union __anonunion____missing_field_name_103 __annonCompField12 ;
int i_cindex ;
__u32 i_generation ;
unsigned long i_dnotify_mask ;
struct dnotify_struct *i_dnotify ;
struct list_head inotify_watches ;
struct mutex inotify_mutex ;
unsigned long i_state ;
unsigned long dirtied_when ;
unsigned int i_flags ;
atomic_t i_writecount ;
void *i_security ;
void *i_private ;
};
struct fown_struct {
rwlock_t lock ;
struct pid *pid ;
enum pid_type pid_type ;
uid_t uid ;
uid_t euid ;
int signum ;
};
struct file_ra_state {
unsigned long start ;
unsigned int size ;
unsigned int async_size ;
unsigned int ra_pages ;
int mmap_miss ;
loff_t prev_pos ;
};
union __anonunion_f_u_104 {
struct list_head fu_list ;
struct rcu_head fu_rcuhead ;
};
struct file {
union __anonunion_f_u_104 f_u ;
struct path f_path ;
struct file_operations const *f_op ;
atomic_long_t f_count ;
unsigned int f_flags ;
mode_t f_mode ;
loff_t f_pos ;
struct fown_struct f_owner ;
unsigned int f_uid ;
unsigned int f_gid ;
struct file_ra_state f_ra ;
u64 f_version ;
void *f_security ;
void *private_data ;
struct list_head f_ep_links ;
spinlock_t f_ep_lock ;
struct address_space *f_mapping ;
unsigned long f_mnt_write_state ;
};
struct files_struct;
typedef struct files_struct *fl_owner_t;
struct file_lock_operations {
void (*fl_copy_lock)(struct file_lock * , struct file_lock * ) ;
void (*fl_release_private)(struct file_lock * ) ;
};
struct lock_manager_operations {
int (*fl_compare_owner)(struct file_lock * , struct file_lock * ) ;
void (*fl_notify)(struct file_lock * ) ;
int (*fl_grant)(struct file_lock * , struct file_lock * , int ) ;
void (*fl_copy_lock)(struct file_lock * , struct file_lock * ) ;
void (*fl_release_private)(struct file_lock * ) ;
void (*fl_break)(struct file_lock * ) ;
int (*fl_mylease)(struct file_lock * , struct file_lock * ) ;
int (*fl_change)(struct file_lock ** , int ) ;
};
struct nlm_lockowner;
struct nfs_lock_info {
u32 state ;
struct nlm_lockowner *owner ;
struct list_head list ;
};
struct nfs4_lock_state;
struct nfs4_lock_info {
struct nfs4_lock_state *owner ;
};
struct fasync_struct;
struct __anonstruct_afs_106 {
struct list_head link ;
int state ;
};
union __anonunion_fl_u_105 {
struct nfs_lock_info nfs_fl ;
struct nfs4_lock_info nfs4_fl ;
struct __anonstruct_afs_106 afs ;
};
struct file_lock {
struct file_lock *fl_next ;
struct list_head fl_link ;
struct list_head fl_block ;
fl_owner_t fl_owner ;
unsigned char fl_flags ;
unsigned char fl_type ;
unsigned int fl_pid ;
struct pid *fl_nspid ;
wait_queue_head_t fl_wait ;
struct file *fl_file ;
loff_t fl_start ;
loff_t fl_end ;
struct fasync_struct *fl_fasync ;
unsigned long fl_break_time ;
struct file_lock_operations *fl_ops ;
struct lock_manager_operations *fl_lmops ;
union __anonunion_fl_u_105 fl_u ;
};
struct fasync_struct {
int magic ;
int fa_fd ;
struct fasync_struct *fa_next ;
struct file *fa_file ;
};
struct file_system_type;
struct super_operations;
struct xattr_handler;
struct mtd_info;
struct super_block {
struct list_head s_list ;
dev_t s_dev ;
unsigned long s_blocksize ;
unsigned char s_blocksize_bits ;
unsigned char s_dirt ;
unsigned long long s_maxbytes ;
struct file_system_type *s_type ;
struct super_operations const *s_op ;
struct dquot_operations *dq_op ;
struct quotactl_ops *s_qcop ;
struct export_operations const *s_export_op ;
unsigned long s_flags ;
unsigned long s_magic ;
struct dentry *s_root ;
struct rw_semaphore s_umount ;
struct mutex s_lock ;
int s_count ;
int s_syncing ;
int s_need_sync_fs ;
atomic_t s_active ;
void *s_security ;
struct xattr_handler **s_xattr ;
struct list_head s_inodes ;
struct list_head s_dirty ;
struct list_head s_io ;
struct list_head s_more_io ;
struct hlist_head s_anon ;
struct list_head s_files ;
struct list_head s_dentry_lru ;
int s_nr_dentry_unused ;
struct block_device *s_bdev ;
struct mtd_info *s_mtd ;
struct list_head s_instances ;
struct quota_info s_dquot ;
int s_frozen ;
wait_queue_head_t s_wait_unfrozen ;
char s_id[32] ;
void *s_fs_info ;
struct mutex s_vfs_rename_mutex ;
u32 s_time_gran ;
char *s_subtype ;
char *s_options ;
};
struct fiemap_extent_info {
unsigned int fi_flags ;
unsigned int fi_extents_mapped ;
unsigned int fi_extents_max ;
struct fiemap_extent *fi_extents_start ;
};
struct file_operations {
struct module *owner ;
loff_t (*llseek)(struct file * , loff_t , int ) ;
ssize_t (*read)(struct file * , char * , size_t , loff_t * ) ;
ssize_t (*write)(struct file * , char const * , size_t , loff_t * ) ;
ssize_t (*aio_read)(struct kiocb * , struct iovec const * , unsigned long ,
loff_t ) ;
ssize_t (*aio_write)(struct kiocb * , struct iovec const * , unsigned long ,
loff_t ) ;
int (*readdir)(struct file * , void * , int (*)(void * , char const * , int ,
loff_t , u64 , unsigned int ) ) ;
unsigned int (*poll)(struct file * , struct poll_table_struct * ) ;
int (*ioctl)(struct inode * , struct file * , unsigned int , unsigned long ) ;
long (*unlocked_ioctl)(struct file * , unsigned int , unsigned long ) ;
long (*compat_ioctl)(struct file * , unsigned int , unsigned long ) ;
int (*mmap)(struct file * , struct vm_area_struct * ) ;
int (*open)(struct inode * , struct file * ) ;
int (*flush)(struct file * , fl_owner_t id ) ;
int (*release)(struct inode * , struct file * ) ;
int (*fsync)(struct file * , struct dentry * , int datasync ) ;
int (*aio_fsync)(struct kiocb * , int datasync ) ;
int (*fasync)(int , struct file * , int ) ;
int (*lock)(struct file * , int , struct file_lock * ) ;
ssize_t (*sendpage)(struct file * , struct page * , int , size_t , loff_t * ,
int ) ;
unsigned long (*get_unmapped_area)(struct file * , unsigned long , unsigned long ,
unsigned long , unsigned long ) ;
int (*check_flags)(int ) ;
int (*dir_notify)(struct file *filp , unsigned long arg ) ;
int (*flock)(struct file * , int , struct file_lock * ) ;
ssize_t (*splice_write)(struct pipe_inode_info * , struct file * , loff_t * , size_t ,
unsigned int ) ;
ssize_t (*splice_read)(struct file * , loff_t * , struct pipe_inode_info * , size_t ,
unsigned int ) ;
int (*setlease)(struct file * , long , struct file_lock ** ) ;
};
struct inode_operations {
int (*create)(struct inode * , struct dentry * , int , struct nameidata * ) ;
struct dentry *(*lookup)(struct inode * , struct dentry * , struct nameidata * ) ;
int (*link)(struct dentry * , struct inode * , struct dentry * ) ;
int (*unlink)(struct inode * , struct dentry * ) ;
int (*symlink)(struct inode * , struct dentry * , char const * ) ;
int (*mkdir)(struct inode * , struct dentry * , int ) ;
int (*rmdir)(struct inode * , struct dentry * ) ;
int (*mknod)(struct inode * , struct dentry * , int , dev_t ) ;
int (*rename)(struct inode * , struct dentry * , struct inode * , struct dentry * ) ;
int (*readlink)(struct dentry * , char * , int ) ;
void *(*follow_link)(struct dentry * , struct nameidata * ) ;
void (*put_link)(struct dentry * , struct nameidata * , void * ) ;
void (*truncate)(struct inode * ) ;
int (*permission)(struct inode * , int ) ;
int (*setattr)(struct dentry * , struct iattr * ) ;
int (*getattr)(struct vfsmount *mnt , struct dentry * , struct kstat * ) ;
int (*setxattr)(struct dentry * , char const * , void const * , size_t , int ) ;
ssize_t (*getxattr)(struct dentry * , char const * , void * , size_t ) ;
ssize_t (*listxattr)(struct dentry * , char * , size_t ) ;
int (*removexattr)(struct dentry * , char const * ) ;
void (*truncate_range)(struct inode * , loff_t , loff_t ) ;
long (*fallocate)(struct inode *inode , int mode , loff_t offset , loff_t len ) ;
int (*fiemap)(struct inode * , struct fiemap_extent_info * , u64 start , u64 len ) ;
};
struct seq_file;
struct super_operations {
struct inode *(*alloc_inode)(struct super_block *sb ) ;
void (*destroy_inode)(struct inode * ) ;
void (*dirty_inode)(struct inode * ) ;
int (*write_inode)(struct inode * , int ) ;
void (*drop_inode)(struct inode * ) ;
void (*delete_inode)(struct inode * ) ;
void (*put_super)(struct super_block * ) ;
void (*write_super)(struct super_block * ) ;
int (*sync_fs)(struct super_block *sb , int wait ) ;
void (*write_super_lockfs)(struct super_block * ) ;
void (*unlockfs)(struct super_block * ) ;
int (*statfs)(struct dentry * , struct kstatfs * ) ;
int (*remount_fs)(struct super_block * , int * , char * ) ;
void (*clear_inode)(struct inode * ) ;
void (*umount_begin)(struct super_block * ) ;
int (*show_options)(struct seq_file * , struct vfsmount * ) ;
int (*show_stats)(struct seq_file * , struct vfsmount * ) ;
ssize_t (*quota_read)(struct super_block * , int , char * , size_t , loff_t ) ;
ssize_t (*quota_write)(struct super_block * , int , char const * , size_t ,
loff_t ) ;
};
struct file_system_type {
char const *name ;
int fs_flags ;
int (*get_sb)(struct file_system_type * , int , char const * , void * , struct vfsmount * ) ;
void (*kill_sb)(struct super_block * ) ;
struct module *owner ;
struct file_system_type *next ;
struct list_head fs_supers ;
struct lock_class_key s_lock_key ;
struct lock_class_key s_umount_key ;
struct lock_class_key i_lock_key ;
struct lock_class_key i_mutex_key ;
struct lock_class_key i_mutex_dir_key ;
struct lock_class_key i_alloc_sem_key ;
};
struct bio;
typedef int read_proc_t(char *page , char **start , off_t off , int count , int *eof ,
void *data );
typedef int write_proc_t(struct file *file , char const *buffer , unsigned long count ,
void *data );
struct proc_dir_entry {
unsigned int low_ino ;
unsigned short namelen ;
char const *name ;
mode_t mode ;
nlink_t nlink ;
uid_t uid ;
gid_t gid ;
loff_t size ;
struct inode_operations const *proc_iops ;
struct file_operations const *proc_fops ;
struct module *owner ;
struct proc_dir_entry *next ;
struct proc_dir_entry *parent ;
struct proc_dir_entry *subdir ;
void *data ;
read_proc_t *read_proc ;
write_proc_t *write_proc ;
atomic_t count ;
int pde_users ;
spinlock_t pde_unload_lock ;
struct completion *pde_unload_completion ;
struct list_head pde_openers ;
};
typedef unsigned long kernel_ulong_t;
struct pci_device_id {
__u32 vendor ;
__u32 device ;
__u32 subvendor ;
__u32 subdevice ;
__u32 class ;
__u32 class_mask ;
kernel_ulong_t driver_data ;
};
struct resource {
resource_size_t start ;
resource_size_t end ;
char const *name ;
unsigned long flags ;
struct resource *parent ;
struct resource *sibling ;
struct resource *child ;
};
struct pci_dev;
struct klist_node;
struct klist {
spinlock_t k_lock ;
struct list_head k_list ;
void (*get)(struct klist_node * ) ;
void (*put)(struct klist_node * ) ;
};
struct klist_node {
void *n_klist ;
struct list_head n_node ;
struct kref n_ref ;
struct completion n_removed ;
};
struct dma_mapping_ops;
struct dev_archdata {
void *acpi_handle ;
struct dma_mapping_ops *dma_ops ;
void *iommu ;
};
struct driver_private;
struct class;
struct class_private;
struct bus_type;
struct bus_type_private;
struct bus_attribute {
struct attribute attr ;
ssize_t (*show)(struct bus_type *bus , char *buf ) ;
ssize_t (*store)(struct bus_type *bus , char const *buf , size_t count ) ;
};
struct device_attribute;
struct driver_attribute;
struct bus_type {
char const *name ;
struct bus_attribute *bus_attrs ;
struct device_attribute *dev_attrs ;
struct driver_attribute *drv_attrs ;
int (*match)(struct device *dev , struct device_driver *drv ) ;
int (*uevent)(struct device *dev , struct kobj_uevent_env *env ) ;
int (*probe)(struct device *dev ) ;
int (*remove)(struct device *dev ) ;
void (*shutdown)(struct device *dev ) ;
int (*suspend)(struct device *dev , pm_message_t state ) ;
int (*suspend_late)(struct device *dev , pm_message_t state ) ;
int (*resume_early)(struct device *dev ) ;
int (*resume)(struct device *dev ) ;
struct pm_ext_ops *pm ;
struct bus_type_private *p ;
};
struct device_driver {
char const *name ;
struct bus_type *bus ;
struct module *owner ;
char const *mod_name ;
int (*probe)(struct device *dev ) ;
int (*remove)(struct device *dev ) ;
void (*shutdown)(struct device *dev ) ;
int (*suspend)(struct device *dev , pm_message_t state ) ;
int (*resume)(struct device *dev ) ;
struct attribute_group **groups ;
struct pm_ops *pm ;
struct driver_private *p ;
};
struct driver_attribute {
struct attribute attr ;
ssize_t (*show)(struct device_driver *driver , char *buf ) ;
ssize_t (*store)(struct device_driver *driver , char const *buf , size_t count ) ;
};
struct class_attribute;
struct class {
char const *name ;
struct module *owner ;
struct class_attribute *class_attrs ;
struct device_attribute *dev_attrs ;
struct kobject *dev_kobj ;
int (*dev_uevent)(struct device *dev , struct kobj_uevent_env *env ) ;
void (*class_release)(struct class *class ) ;
void (*dev_release)(struct device *dev ) ;
int (*suspend)(struct device *dev , pm_message_t state ) ;
int (*resume)(struct device *dev ) ;
struct pm_ops *pm ;
struct class_private *p ;
};
struct device_type;
struct class_attribute {
struct attribute attr ;
ssize_t (*show)(struct class *class , char *buf ) ;
ssize_t (*store)(struct class *class , char const *buf , size_t count ) ;
};
struct device_type {
char const *name ;
struct attribute_group **groups ;
int (*uevent)(struct device *dev , struct kobj_uevent_env *env ) ;
void (*release)(struct device *dev ) ;
int (*suspend)(struct device *dev , pm_message_t state ) ;
int (*resume)(struct device *dev ) ;
struct pm_ops *pm ;
};
struct device_attribute {
struct attribute attr ;
ssize_t (*show)(struct device *dev , struct device_attribute *attr , char *buf ) ;
ssize_t (*store)(struct device *dev , struct device_attribute *attr , char const *buf ,
size_t count ) ;
};
struct device_dma_parameters {
unsigned int max_segment_size ;
unsigned long segment_boundary_mask ;
};
struct dma_coherent_mem;
struct device {
struct klist klist_children ;
struct klist_node knode_parent ;
struct klist_node knode_driver ;
struct klist_node knode_bus ;
struct device *parent ;
struct kobject kobj ;
char bus_id[20] ;
char const *init_name ;
struct device_type *type ;
unsigned int uevent_suppress : 1 ;
struct semaphore sem ;
struct bus_type *bus ;
struct device_driver *driver ;
void *driver_data ;
void *platform_data ;
struct dev_pm_info power ;
int numa_node ;
u64 *dma_mask ;
u64 coherent_dma_mask ;
struct device_dma_parameters *dma_parms ;
struct list_head dma_pools ;
struct dma_coherent_mem *dma_mem ;
struct dev_archdata archdata ;
spinlock_t devres_lock ;
struct list_head devres_head ;
struct klist_node knode_class ;
struct class *class ;
dev_t devt ;
struct attribute_group **groups ;
void (*release)(struct device *dev ) ;
};
struct hotplug_slot;
struct pci_slot {
struct pci_bus *bus ;
struct list_head list ;
struct hotplug_slot *hotplug ;
unsigned char number ;
struct kobject kobj ;
};
typedef int pci_power_t;
typedef unsigned int pci_channel_state_t;
enum pci_channel_state {
pci_channel_io_normal = (pci_channel_state_t )1,
pci_channel_io_frozen = (pci_channel_state_t )2,
pci_channel_io_perm_failure = (pci_channel_state_t )3
} ;
typedef unsigned short pci_dev_flags_t;
typedef unsigned short pci_bus_flags_t;
struct pcie_link_state;
struct pci_vpd;
struct pci_driver;
struct pci_dev {
struct list_head bus_list ;
struct pci_bus *bus ;
struct pci_bus *subordinate ;
void *sysdata ;
struct proc_dir_entry *procent ;
struct pci_slot *slot ;
unsigned int devfn ;
unsigned short vendor ;
unsigned short device ;
unsigned short subsystem_vendor ;
unsigned short subsystem_device ;
unsigned int class ;
u8 revision ;
u8 hdr_type ;
u8 pcie_type ;
u8 rom_base_reg ;
u8 pin ;
struct pci_driver *driver ;
u64 dma_mask ;
struct device_dma_parameters dma_parms ;
pci_power_t current_state ;
int pm_cap ;
unsigned int pme_support : 5 ;
unsigned int d1_support : 1 ;
unsigned int d2_support : 1 ;
unsigned int no_d1d2 : 1 ;
struct pcie_link_state *link_state ;
pci_channel_state_t error_state ;
struct device dev ;
int cfg_size ;
unsigned int irq ;
struct resource resource[12] ;
unsigned int transparent : 1 ;
unsigned int multifunction : 1 ;
unsigned int is_added : 1 ;
unsigned int is_busmaster : 1 ;
unsigned int no_msi : 1 ;
unsigned int block_ucfg_access : 1 ;
unsigned int broken_parity_status : 1 ;
unsigned int msi_enabled : 1 ;
unsigned int msix_enabled : 1 ;
unsigned int is_managed : 1 ;
unsigned int is_pcie : 1 ;
pci_dev_flags_t dev_flags ;
atomic_t enable_cnt ;
u32 saved_config_space[16] ;
struct hlist_head saved_cap_space ;
struct bin_attribute *rom_attr ;
int rom_attr_enabled ;
struct bin_attribute *res_attr[12] ;
struct bin_attribute *res_attr_wc[12] ;
struct list_head msi_list ;
struct pci_vpd *vpd ;
};
struct pci_ops;
struct pci_bus {
struct list_head node ;
struct pci_bus *parent ;
struct list_head children ;
struct list_head devices ;
struct pci_dev *self ;
struct list_head slots ;
struct resource *resource[16] ;
struct pci_ops *ops ;
void *sysdata ;
struct proc_dir_entry *procdir ;
unsigned char number ;
unsigned char primary ;
unsigned char secondary ;
unsigned char subordinate ;
char name[48] ;
unsigned short bridge_ctl ;
pci_bus_flags_t bus_flags ;
struct device *bridge ;
struct device dev ;
struct bin_attribute *legacy_io ;
struct bin_attribute *legacy_mem ;
unsigned int is_added : 1 ;
};
struct pci_ops {
int (*read)(struct pci_bus *bus , unsigned int devfn , int where , int size , u32 *val ) ;
int (*write)(struct pci_bus *bus , unsigned int devfn , int where , int size ,
u32 val ) ;
};
struct pci_dynids {
spinlock_t lock ;
struct list_head list ;
unsigned int use_driver_data : 1 ;
};
typedef unsigned int pci_ers_result_t;
struct pci_error_handlers {
pci_ers_result_t (*error_detected)(struct pci_dev *dev , enum pci_channel_state error ) ;
pci_ers_result_t (*mmio_enabled)(struct pci_dev *dev ) ;
pci_ers_result_t (*link_reset)(struct pci_dev *dev ) ;
pci_ers_result_t (*slot_reset)(struct pci_dev *dev ) ;
void (*resume)(struct pci_dev *dev ) ;
};
struct pci_driver {
struct list_head node ;
char *name ;
struct pci_device_id const *id_table ;
int (*probe)(struct pci_dev *dev , struct pci_device_id const *id ) ;
void (*remove)(struct pci_dev *dev ) ;
int (*suspend)(struct pci_dev *dev , pm_message_t state ) ;
int (*suspend_late)(struct pci_dev *dev , pm_message_t state ) ;
int (*resume_early)(struct pci_dev *dev ) ;
int (*resume)(struct pci_dev *dev ) ;
void (*shutdown)(struct pci_dev *dev ) ;
struct pm_ext_ops *pm ;
struct pci_error_handlers *err_handler ;
struct device_driver driver ;
struct pci_dynids dynids ;
};
struct scatterlist {
unsigned long sg_magic ;
unsigned long page_link ;
unsigned int offset ;
unsigned int length ;
dma_addr_t dma_address ;
unsigned int dma_length ;
};
struct rb_node {
unsigned long rb_parent_color ;
struct rb_node *rb_right ;
struct rb_node *rb_left ;
} __attribute__((__aligned__(sizeof(long )))) ;
struct rb_root {
struct rb_node *rb_node ;
};
typedef atomic_long_t mm_counter_t;
struct __anonstruct____missing_field_name_112 {
u16 inuse ;
u16 objects ;
};
union __anonunion____missing_field_name_111 {
atomic_t _mapcount ;
struct __anonstruct____missing_field_name_112 __annonCompField13 ;
};
struct __anonstruct____missing_field_name_114 {
unsigned long private ;
struct address_space *mapping ;
};
union __anonunion____missing_field_name_113 {
struct __anonstruct____missing_field_name_114 __annonCompField15 ;
spinlock_t ptl ;
struct kmem_cache *slab ;
struct page *first_page ;
};
union __anonunion____missing_field_name_115 {
unsigned long index ;
void *freelist ;
};
struct page {
unsigned long flags ;
atomic_t _count ;
union __anonunion____missing_field_name_111 __annonCompField14 ;
union __anonunion____missing_field_name_113 __annonCompField16 ;
union __anonunion____missing_field_name_115 __annonCompField17 ;
struct list_head lru ;
unsigned long page_cgroup ;
};
struct __anonstruct_vm_set_117 {
struct list_head list ;
void *parent ;
struct vm_area_struct *head ;
};
union __anonunion_shared_116 {
struct __anonstruct_vm_set_117 vm_set ;
struct raw_prio_tree_node prio_tree_node ;
};
struct anon_vma;
struct vm_operations_struct;
struct mempolicy;
struct vm_area_struct {
struct mm_struct *vm_mm ;
unsigned long vm_start ;
unsigned long vm_end ;
struct vm_area_struct *vm_next ;
pgprot_t vm_page_prot ;
unsigned long vm_flags ;
struct rb_node vm_rb ;
union __anonunion_shared_116 shared ;
struct list_head anon_vma_node ;
struct anon_vma *anon_vma ;
struct vm_operations_struct *vm_ops ;
unsigned long vm_pgoff ;
struct file *vm_file ;
void *vm_private_data ;
unsigned long vm_truncate_count ;
struct mempolicy *vm_policy ;
};
struct core_thread {
struct task_struct *task ;
struct core_thread *next ;
};
struct core_state {
atomic_t nr_threads ;
struct core_thread dumper ;
struct completion startup ;
};
struct kioctx;
struct mmu_notifier_mm;
struct mm_struct {
struct vm_area_struct *mmap ;
struct rb_root mm_rb ;
struct vm_area_struct *mmap_cache ;
unsigned long (*get_unmapped_area)(struct file *filp , unsigned long addr , unsigned long len ,
unsigned long pgoff , unsigned long flags ) ;
void (*unmap_area)(struct mm_struct *mm , unsigned long addr ) ;
unsigned long mmap_base ;
unsigned long task_size ;
unsigned long cached_hole_size ;
unsigned long free_area_cache ;
pgd_t *pgd ;
atomic_t mm_users ;
atomic_t mm_count ;
int map_count ;
struct rw_semaphore mmap_sem ;
spinlock_t page_table_lock ;
struct list_head mmlist ;
mm_counter_t _file_rss ;
mm_counter_t _anon_rss ;
unsigned long hiwater_rss ;
unsigned long hiwater_vm ;
unsigned long total_vm ;
unsigned long locked_vm ;
unsigned long shared_vm ;
unsigned long exec_vm ;
unsigned long stack_vm ;
unsigned long reserved_vm ;
unsigned long def_flags ;
unsigned long nr_ptes ;
unsigned long start_code ;
unsigned long end_code ;
unsigned long start_data ;
unsigned long end_data ;
unsigned long start_brk ;
unsigned long brk ;
unsigned long start_stack ;
unsigned long arg_start ;
unsigned long arg_end ;
unsigned long env_start ;
unsigned long env_end ;
unsigned long saved_auxv[2 * ((2 + 18) + 1)] ;
cpumask_t cpu_vm_mask ;
mm_context_t context ;
unsigned int faultstamp ;
unsigned int token_priority ;
unsigned int last_interval ;
unsigned long flags ;
struct core_state *core_state ;
rwlock_t ioctx_list_lock ;
struct kioctx *ioctx_list ;
struct task_struct *owner ;
struct file *exe_file ;
unsigned long num_exe_file_vmas ;
struct mmu_notifier_mm *mmu_notifier_mm ;
};
struct user_struct;
struct vm_fault {
unsigned int flags ;
unsigned long pgoff ;
void *virtual_address ;
struct page *page ;
};
struct vm_operations_struct {
void (*open)(struct vm_area_struct *area ) ;
void (*close)(struct vm_area_struct *area ) ;
int (*fault)(struct vm_area_struct *vma , struct vm_fault *vmf ) ;
int (*page_mkwrite)(struct vm_area_struct *vma , struct page *page ) ;
int (*access)(struct vm_area_struct *vma , unsigned long addr , void *buf , int len ,
int write ) ;
int (*set_policy)(struct vm_area_struct *vma , struct mempolicy *new ) ;
struct mempolicy *(*get_policy)(struct vm_area_struct *vma , unsigned long addr ) ;
int (*migrate)(struct vm_area_struct *vma , nodemask_t const *from , nodemask_t const *to ,
unsigned long flags ) ;
};
struct dma_mapping_ops {
int (*mapping_error)(struct device *dev , dma_addr_t dma_addr ) ;
void *(*alloc_coherent)(struct device *dev , size_t size , dma_addr_t *dma_handle ,
gfp_t gfp ) ;
void (*free_coherent)(struct device *dev , size_t size , void *vaddr , dma_addr_t dma_handle ) ;
dma_addr_t (*map_single)(struct device *hwdev , phys_addr_t ptr , size_t size ,
int direction ) ;
void (*unmap_single)(struct device *dev , dma_addr_t addr , size_t size , int direction ) ;
void (*sync_single_for_cpu)(struct device *hwdev , dma_addr_t dma_handle , size_t size ,
int direction ) ;
void (*sync_single_for_device)(struct device *hwdev , dma_addr_t dma_handle , size_t size ,
int direction ) ;
void (*sync_single_range_for_cpu)(struct device *hwdev , dma_addr_t dma_handle ,
unsigned long offset , size_t size , int direction ) ;
void (*sync_single_range_for_device)(struct device *hwdev , dma_addr_t dma_handle ,
unsigned long offset , size_t size , int direction ) ;
void (*sync_sg_for_cpu)(struct device *hwdev , struct scatterlist *sg , int nelems ,
int direction ) ;
void (*sync_sg_for_device)(struct device *hwdev , struct scatterlist *sg , int nelems ,
int direction ) ;
int (*map_sg)(struct device *hwdev , struct scatterlist *sg , int nents , int direction ) ;
void (*unmap_sg)(struct device *hwdev , struct scatterlist *sg , int nents , int direction ) ;
int (*dma_supported)(struct device *hwdev , u64 mask ) ;
int is_phys ;
};
typedef unsigned long cputime_t;
struct sem_undo_list;
struct sem_undo_list {
atomic_t refcnt ;
spinlock_t lock ;
struct list_head list_proc ;
};
struct sysv_sem {
struct sem_undo_list *undo_list ;
};
struct siginfo;
struct __anonstruct_sigset_t_119 {
unsigned long sig[64 / 64] ;
};
typedef struct __anonstruct_sigset_t_119 sigset_t;
typedef void __signalfn_t(int );
typedef __signalfn_t *__sighandler_t;
typedef void __restorefn_t(void);
typedef __restorefn_t *__sigrestore_t;
struct sigaction {
__sighandler_t sa_handler ;
unsigned long sa_flags ;
__sigrestore_t sa_restorer ;
sigset_t sa_mask ;
};
struct k_sigaction {
struct sigaction sa ;
};
union sigval {
int sival_int ;
void *sival_ptr ;
};
typedef union sigval sigval_t;
struct __anonstruct__kill_121 {
pid_t _pid ;
uid_t _uid ;
};
struct __anonstruct__timer_122 {
timer_t _tid ;
int _overrun ;
char _pad[sizeof(uid_t ) - sizeof(int )] ;
sigval_t _sigval ;
int _sys_private ;
};
struct __anonstruct__rt_123 {
pid_t _pid ;
uid_t _uid ;
sigval_t _sigval ;
};
struct __anonstruct__sigchld_124 {
pid_t _pid ;
uid_t _uid ;
int _status ;
clock_t _utime ;
clock_t _stime ;
};
struct __anonstruct__sigfault_125 {
void *_addr ;
};
struct __anonstruct__sigpoll_126 {
long _band ;
int _fd ;
};
union __anonunion__sifields_120 {
int _pad[(128UL - 4UL * sizeof(int )) / sizeof(int )] ;
struct __anonstruct__kill_121 _kill ;
struct __anonstruct__timer_122 _timer ;
struct __anonstruct__rt_123 _rt ;
struct __anonstruct__sigchld_124 _sigchld ;
struct __anonstruct__sigfault_125 _sigfault ;
struct __anonstruct__sigpoll_126 _sigpoll ;
};
struct siginfo {
int si_signo ;
int si_errno ;
int si_code ;
union __anonunion__sifields_120 _sifields ;
};
typedef struct siginfo siginfo_t;
struct sigpending {
struct list_head list ;
sigset_t signal ;
};
struct fs_struct {
atomic_t count ;
rwlock_t lock ;
int umask ;
struct path root ;
struct path pwd ;
};
struct prop_local_single {
unsigned long events ;
unsigned long period ;
int shift ;
spinlock_t lock ;
};
struct __anonstruct_seccomp_t_129 {
int mode ;
};
typedef struct __anonstruct_seccomp_t_129 seccomp_t;
struct plist_head {
struct list_head prio_list ;
struct list_head node_list ;
spinlock_t *lock ;
};
struct rt_mutex_waiter;
struct rlimit {
unsigned long rlim_cur ;
unsigned long rlim_max ;
};
struct hrtimer_clock_base;
struct hrtimer_cpu_base;
enum hrtimer_restart {
HRTIMER_NORESTART = 0,
HRTIMER_RESTART = 1
} ;
enum hrtimer_cb_mode {
HRTIMER_CB_SOFTIRQ = 0,
HRTIMER_CB_IRQSAFE = 1,
HRTIMER_CB_IRQSAFE_NO_RESTART = 2,
HRTIMER_CB_IRQSAFE_PERCPU = 3,
HRTIMER_CB_IRQSAFE_UNLOCKED = 4
} ;
struct hrtimer {
struct rb_node node ;
ktime_t expires ;
enum hrtimer_restart (*function)(struct hrtimer * ) ;
struct hrtimer_clock_base *base ;
unsigned long state ;
enum hrtimer_cb_mode cb_mode ;
struct list_head cb_entry ;
void *start_site ;
char start_comm[16] ;
int start_pid ;
};
struct hrtimer_clock_base {
struct hrtimer_cpu_base *cpu_base ;
clockid_t index ;
struct rb_root active ;
struct rb_node *first ;
ktime_t resolution ;
ktime_t (*get_time)(void) ;
ktime_t (*get_softirq_time)(void) ;
ktime_t softirq_time ;
ktime_t offset ;
int (*reprogram)(struct hrtimer *t , struct hrtimer_clock_base *b , ktime_t n ) ;
};
struct hrtimer_cpu_base {
spinlock_t lock ;
struct hrtimer_clock_base clock_base[2] ;
struct list_head cb_pending ;
ktime_t expires_next ;
int hres_active ;
unsigned long nr_events ;
};
struct task_io_accounting {
u64 rchar ;
u64 wchar ;
u64 syscr ;
u64 syscw ;
u64 read_bytes ;
u64 write_bytes ;
u64 cancelled_write_bytes ;
};
struct latency_record {
unsigned long backtrace[12] ;
unsigned int count ;
unsigned long time ;
unsigned long max ;
};
struct futex_pi_state;
struct robust_list_head;
struct cfs_rq;
struct task_group;
struct nsproxy;
struct io_event {
__u64 data ;
__u64 obj ;
__s64 res ;
__s64 res2 ;
};
struct iovec {
void *iov_base ;
__kernel_size_t iov_len ;
};
union __anonunion_ki_obj_131 {
void *user ;
struct task_struct *tsk ;
};
struct kiocb {
struct list_head ki_run_list ;
unsigned long ki_flags ;
int ki_users ;
unsigned int ki_key ;
struct file *ki_filp ;
struct kioctx *ki_ctx ;
int (*ki_cancel)(struct kiocb * , struct io_event * ) ;
ssize_t (*ki_retry)(struct kiocb * ) ;
void (*ki_dtor)(struct kiocb * ) ;
union __anonunion_ki_obj_131 ki_obj ;
__u64 ki_user_data ;
wait_queue_t ki_wait ;
loff_t ki_pos ;
void *private ;
unsigned short ki_opcode ;
size_t ki_nbytes ;
char *ki_buf ;
size_t ki_left ;
struct iovec ki_inline_vec ;
struct iovec *ki_iovec ;
unsigned long ki_nr_segs ;
unsigned long ki_cur_seg ;
struct list_head ki_list ;
struct file *ki_eventfd ;
};
struct aio_ring_info {
unsigned long mmap_base ;
unsigned long mmap_size ;
struct page **ring_pages ;
spinlock_t ring_lock ;
long nr_pages ;
unsigned int nr ;
unsigned int tail ;
struct page *internal_pages[8] ;
};
struct kioctx {
atomic_t users ;
int dead ;
struct mm_struct *mm ;
unsigned long user_id ;
struct kioctx *next ;
wait_queue_head_t wait ;
spinlock_t ctx_lock ;
int reqs_active ;
struct list_head active_reqs ;
struct list_head run_list ;
unsigned int max_reqs ;
struct aio_ring_info ring_info ;
struct delayed_work wq ;
};
struct sighand_struct {
atomic_t count ;
struct k_sigaction action[64] ;
spinlock_t siglock ;
wait_queue_head_t signalfd_wqh ;
};
struct pacct_struct {
int ac_flag ;
long ac_exitcode ;
unsigned long ac_mem ;
cputime_t ac_utime ;
cputime_t ac_stime ;
unsigned long ac_minflt ;
unsigned long ac_majflt ;
};
union __anonunion____missing_field_name_132 {
pid_t pgrp __attribute__((__deprecated__)) ;
pid_t __pgrp ;
};
union __anonunion____missing_field_name_133 {
pid_t session __attribute__((__deprecated__)) ;
pid_t __session ;
};
struct tty_struct;
struct taskstats;
struct tty_audit_buf;
struct signal_struct {
atomic_t count ;
atomic_t live ;
wait_queue_head_t wait_chldexit ;
struct task_struct *curr_target ;
struct sigpending shared_pending ;
int group_exit_code ;
int notify_count ;
struct task_struct *group_exit_task ;
int group_stop_count ;
unsigned int flags ;
struct list_head posix_timers ;
struct hrtimer real_timer ;
struct pid *leader_pid ;
ktime_t it_real_incr ;
cputime_t it_prof_expires ;
cputime_t it_virt_expires ;
cputime_t it_prof_incr ;
cputime_t it_virt_incr ;
union __anonunion____missing_field_name_132 __annonCompField18 ;
struct pid *tty_old_pgrp ;
union __anonunion____missing_field_name_133 __annonCompField19 ;
int leader ;
struct tty_struct *tty ;
cputime_t utime ;
cputime_t stime ;
cputime_t cutime ;
cputime_t cstime ;
cputime_t gtime ;
cputime_t cgtime ;
unsigned long nvcsw ;
unsigned long nivcsw ;
unsigned long cnvcsw ;
unsigned long cnivcsw ;
unsigned long min_flt ;
unsigned long maj_flt ;
unsigned long cmin_flt ;
unsigned long cmaj_flt ;
unsigned long inblock ;
unsigned long oublock ;
unsigned long cinblock ;
unsigned long coublock ;
struct task_io_accounting ioac ;
unsigned long long sum_sched_runtime ;
struct rlimit rlim[16] ;
struct list_head cpu_timers[3] ;
struct key *session_keyring ;
struct key *process_keyring ;
struct pacct_struct pacct ;
struct taskstats *stats ;
unsigned int audit_tty ;
struct tty_audit_buf *tty_audit_buf ;
};
struct user_struct {
atomic_t __count ;
atomic_t processes ;
atomic_t files ;
atomic_t sigpending ;
atomic_t inotify_watches ;
atomic_t inotify_devs ;
unsigned long mq_bytes ;
unsigned long locked_shm ;
struct key *uid_keyring ;
struct key *session_keyring ;
struct hlist_node uidhash_node ;
uid_t uid ;
struct task_group *tg ;
struct kobject kobj ;
struct work_struct work ;
};
struct reclaim_state;
struct sched_info {
unsigned long pcount ;
unsigned long long cpu_time ;
unsigned long long run_delay ;
unsigned long long last_arrival ;
unsigned long long last_queued ;
unsigned int bkl_count ;
};
struct task_delay_info {
spinlock_t lock ;
unsigned int flags ;
struct timespec blkio_start ;
struct timespec blkio_end ;
u64 blkio_delay ;
u64 swapin_delay ;
u32 blkio_count ;
u32 swapin_count ;
struct timespec freepages_start ;
struct timespec freepages_end ;
u64 freepages_delay ;
u32 freepages_count ;
};
enum cpu_idle_type {
CPU_IDLE = 0,
CPU_NOT_IDLE = 1,
CPU_NEWLY_IDLE = 2,
CPU_MAX_IDLE_TYPES = 3
} ;
struct sched_group {
struct sched_group *next ;
cpumask_t cpumask ;
unsigned int __cpu_power ;
u32 reciprocal_cpu_power ;
};
enum sched_domain_level {
SD_LV_NONE = 0,
SD_LV_SIBLING = 1,
SD_LV_MC = 2,
SD_LV_CPU = 3,
SD_LV_NODE = 4,
SD_LV_ALLNODES = 5,
SD_LV_MAX = 6
} ;
struct sched_domain {
struct sched_domain *parent ;
struct sched_domain *child ;
struct sched_group *groups ;
cpumask_t span ;
unsigned long min_interval ;
unsigned long max_interval ;
unsigned int busy_factor ;
unsigned int imbalance_pct ;
unsigned int cache_nice_tries ;
unsigned int busy_idx ;
unsigned int idle_idx ;
unsigned int newidle_idx ;
unsigned int wake_idx ;
unsigned int forkexec_idx ;
int flags ;
enum sched_domain_level level ;
unsigned long last_balance ;
unsigned int balance_interval ;
unsigned int nr_balance_failed ;
u64 last_update ;
unsigned int lb_count[CPU_MAX_IDLE_TYPES] ;
unsigned int lb_failed[CPU_MAX_IDLE_TYPES] ;
unsigned int lb_balanced[CPU_MAX_IDLE_TYPES] ;
unsigned int lb_imbalance[CPU_MAX_IDLE_TYPES] ;
unsigned int lb_gained[CPU_MAX_IDLE_TYPES] ;
unsigned int lb_hot_gained[CPU_MAX_IDLE_TYPES] ;
unsigned int lb_nobusyg[CPU_MAX_IDLE_TYPES] ;
unsigned int lb_nobusyq[CPU_MAX_IDLE_TYPES] ;
unsigned int alb_count ;
unsigned int alb_failed ;
unsigned int alb_pushed ;
unsigned int sbe_count ;
unsigned int sbe_balanced ;
unsigned int sbe_pushed ;
unsigned int sbf_count ;
unsigned int sbf_balanced ;
unsigned int sbf_pushed ;
unsigned int ttwu_wake_remote ;
unsigned int ttwu_move_affine ;
unsigned int ttwu_move_balance ;
char *name ;
};
struct io_context;
struct group_info {
int ngroups ;
atomic_t usage ;
gid_t small_block[32] ;
int nblocks ;
gid_t *blocks[0] ;
};
struct audit_context;
struct rq;
struct sched_class {
struct sched_class const *next ;
void (*enqueue_task)(struct rq *rq , struct task_struct *p , int wakeup ) ;
void (*dequeue_task)(struct rq *rq , struct task_struct *p , int sleep ) ;
void (*yield_task)(struct rq *rq ) ;
int (*select_task_rq)(struct task_struct *p , int sync ) ;
void (*check_preempt_curr)(struct rq *rq , struct task_struct *p , int sync ) ;
struct task_struct *(*pick_next_task)(struct rq *rq ) ;
void (*put_prev_task)(struct rq *rq , struct task_struct *p ) ;
unsigned long (*load_balance)(struct rq *this_rq , int this_cpu , struct rq *busiest ,
unsigned long max_load_move , struct sched_domain *sd ,
enum cpu_idle_type idle , int *all_pinned , int *this_best_prio ) ;
int (*move_one_task)(struct rq *this_rq , int this_cpu , struct rq *busiest , struct sched_domain *sd ,
enum cpu_idle_type idle ) ;
void (*pre_schedule)(struct rq *this_rq , struct task_struct *task ) ;
void (*post_schedule)(struct rq *this_rq ) ;
void (*task_wake_up)(struct rq *this_rq , struct task_struct *task ) ;
void (*set_curr_task)(struct rq *rq ) ;
void (*task_tick)(struct rq *rq , struct task_struct *p , int queued ) ;
void (*task_new)(struct rq *rq , struct task_struct *p ) ;
void (*set_cpus_allowed)(struct task_struct *p , cpumask_t const *newmask ) ;
void (*rq_online)(struct rq *rq ) ;
void (*rq_offline)(struct rq *rq ) ;
void (*switched_from)(struct rq *this_rq , struct task_struct *task , int running ) ;
void (*switched_to)(struct rq *this_rq , struct task_struct *task , int running ) ;
void (*prio_changed)(struct rq *this_rq , struct task_struct *task , int oldprio ,
int running ) ;
void (*moved_group)(struct task_struct *p ) ;
};
struct load_weight {
unsigned long weight ;
unsigned long inv_weight ;
};
struct sched_entity {
struct load_weight load ;
struct rb_node run_node ;
struct list_head group_node ;
unsigned int on_rq ;
u64 exec_start ;
u64 sum_exec_runtime ;
u64 vruntime ;
u64 prev_sum_exec_runtime ;
u64 last_wakeup ;
u64 avg_overlap ;
u64 wait_start ;
u64 wait_max ;
u64 wait_count ;
u64 wait_sum ;
u64 sleep_start ;
u64 sleep_max ;
s64 sum_sleep_runtime ;
u64 block_start ;
u64 block_max ;
u64 exec_max ;
u64 slice_max ;
u64 nr_migrations ;
u64 nr_migrations_cold ;
u64 nr_failed_migrations_affine ;
u64 nr_failed_migrations_running ;
u64 nr_failed_migrations_hot ;
u64 nr_forced_migrations ;
u64 nr_forced2_migrations ;
u64 nr_wakeups ;
u64 nr_wakeups_sync ;
u64 nr_wakeups_migrate ;
u64 nr_wakeups_local ;
u64 nr_wakeups_remote ;
u64 nr_wakeups_affine ;
u64 nr_wakeups_affine_attempts ;
u64 nr_wakeups_passive ;
u64 nr_wakeups_idle ;
struct sched_entity *parent ;
struct cfs_rq *cfs_rq ;
struct cfs_rq *my_q ;
};
struct rt_rq;
struct sched_rt_entity {
struct list_head run_list ;
unsigned long timeout ;
unsigned int time_slice ;
int nr_cpus_allowed ;
struct sched_rt_entity *back ;
struct sched_rt_entity *parent ;
struct rt_rq *rt_rq ;
struct rt_rq *my_q ;
};
struct linux_binfmt;
struct css_set;
struct compat_robust_list_head;
struct task_struct {
long volatile state ;
void *stack ;
atomic_t usage ;
unsigned int flags ;
unsigned int ptrace ;
int lock_depth ;
int prio ;
int static_prio ;
int normal_prio ;
unsigned int rt_priority ;
struct sched_class const *sched_class ;
struct sched_entity se ;
struct sched_rt_entity rt ;
struct hlist_head preempt_notifiers ;
unsigned char fpu_counter ;
s8 oomkilladj ;
unsigned int policy ;
cpumask_t cpus_allowed ;
struct sched_info sched_info ;
struct list_head tasks ;
struct mm_struct *mm ;
struct mm_struct *active_mm ;
struct linux_binfmt *binfmt ;
int exit_state ;
int exit_code ;
int exit_signal ;
int pdeath_signal ;
unsigned int personality ;
unsigned int did_exec : 1 ;
pid_t pid ;
pid_t tgid ;
struct task_struct *real_parent ;
struct task_struct *parent ;
struct list_head children ;
struct list_head sibling ;
struct task_struct *group_leader ;
struct list_head ptraced ;
struct list_head ptrace_entry ;
struct pid_link pids[PIDTYPE_MAX] ;
struct list_head thread_group ;
struct completion *vfork_done ;
int *set_child_tid ;
int *clear_child_tid ;
cputime_t utime ;
cputime_t stime ;
cputime_t utimescaled ;
cputime_t stimescaled ;
cputime_t gtime ;
cputime_t prev_utime ;
cputime_t prev_stime ;
unsigned long nvcsw ;
unsigned long nivcsw ;
struct timespec start_time ;
struct timespec real_start_time ;
unsigned long min_flt ;
unsigned long maj_flt ;
cputime_t it_prof_expires ;
cputime_t it_virt_expires ;
unsigned long long it_sched_expires ;
struct list_head cpu_timers[3] ;
uid_t uid ;
uid_t euid ;
uid_t suid ;
uid_t fsuid ;
gid_t gid ;
gid_t egid ;
gid_t sgid ;
gid_t fsgid ;
struct group_info *group_info ;
kernel_cap_t cap_effective ;
kernel_cap_t cap_inheritable ;
kernel_cap_t cap_permitted ;
kernel_cap_t cap_bset ;
struct user_struct *user ;
unsigned int securebits ;
unsigned char jit_keyring ;
struct key *request_key_auth ;
struct key *thread_keyring ;
char comm[16] ;
int link_count ;
int total_link_count ;
struct sysv_sem sysvsem ;
unsigned long last_switch_timestamp ;
unsigned long last_switch_count ;
struct thread_struct thread ;
struct fs_struct *fs ;
struct files_struct *files ;
struct nsproxy *nsproxy ;
struct signal_struct *signal ;
struct sighand_struct *sighand ;
sigset_t blocked ;
sigset_t real_blocked ;
sigset_t saved_sigmask ;
struct sigpending pending ;
unsigned long sas_ss_sp ;
size_t sas_ss_size ;
int (*notifier)(void *priv ) ;
void *notifier_data ;
sigset_t *notifier_mask ;
void *security ;
struct audit_context *audit_context ;
uid_t loginuid ;
unsigned int sessionid ;
seccomp_t seccomp ;
u32 parent_exec_id ;
u32 self_exec_id ;
spinlock_t alloc_lock ;
spinlock_t pi_lock ;
struct plist_head pi_waiters ;
struct rt_mutex_waiter *pi_blocked_on ;
struct mutex_waiter *blocked_on ;
unsigned int irq_events ;
int hardirqs_enabled ;
unsigned long hardirq_enable_ip ;
unsigned int hardirq_enable_event ;
unsigned long hardirq_disable_ip ;
unsigned int hardirq_disable_event ;
int softirqs_enabled ;
unsigned long softirq_disable_ip ;
unsigned int softirq_disable_event ;
unsigned long softirq_enable_ip ;
unsigned int softirq_enable_event ;
int hardirq_context ;
int softirq_context ;
void *journal_info ;
struct bio *bio_list ;
struct bio **bio_tail ;
struct reclaim_state *reclaim_state ;
struct backing_dev_info *backing_dev_info ;
struct io_context *io_context ;
unsigned long ptrace_message ;
siginfo_t *last_siginfo ;
struct task_io_accounting ioac ;
u64 acct_rss_mem1 ;
u64 acct_vm_mem1 ;
cputime_t acct_timexpd ;
nodemask_t mems_allowed ;
int cpuset_mems_generation ;
int cpuset_mem_spread_rotor ;
struct css_set *cgroups ;
struct list_head cg_list ;
struct robust_list_head *robust_list ;
struct compat_robust_list_head *compat_robust_list ;
struct list_head pi_state_list ;
struct futex_pi_state *pi_state_cache ;
struct mempolicy *mempolicy ;
short il_next ;
atomic_t fs_excl ;
struct rcu_head rcu ;
struct pipe_inode_info *splice_pipe ;
struct task_delay_info *delays ;
int make_it_fail ;
struct prop_local_single dirties ;
int latency_record_count ;
struct latency_record latency_record[32] ;
};
struct cdev {
struct kobject kobj ;
struct module *owner ;
struct file_operations const *ops ;
struct list_head list ;
dev_t dev ;
unsigned int count ;
};
struct exception_table_entry {
unsigned long insn ;
unsigned long fixup ;
};
typedef s32 compat_time_t;
typedef s32 compat_long_t;
struct compat_timespec {
compat_time_t tv_sec ;
s32 tv_nsec ;
};
typedef u32 compat_uptr_t;
struct compat_robust_list {
compat_uptr_t next ;
};
struct compat_robust_list_head {
struct compat_robust_list list ;
compat_long_t futex_offset ;
compat_uptr_t list_op_pending ;
};
enum chipset_type {
NOT_SUPPORTED = 0,
SUPPORTED = 1
} ;
struct agp_version {
u16 major ;
u16 minor ;
};
struct agp_kern_info {
struct agp_version version ;
struct pci_dev *device ;
enum chipset_type chipset ;
unsigned long mode ;
unsigned long aper_base ;
size_t aper_size ;
int max_memory ;
int current_memory ;
bool cant_use_aperture ;
unsigned long page_mask ;
struct vm_operations_struct *vm_ops ;
};
struct agp_bridge_data;
struct poll_table_struct {
void (*qproc)(struct file * , wait_queue_head_t * , struct poll_table_struct * ) ;
};
typedef int irqreturn_t;
typedef unsigned int drm_handle_t;
typedef unsigned int drm_drawable_t;
typedef unsigned int drm_magic_t;
struct drm_tex_region {
unsigned char next ;
unsigned char prev ;
unsigned char in_use ;
unsigned char padding ;
unsigned int age ;
};
struct drm_hw_lock {
unsigned int volatile lock ;
char padding[60] ;
};
enum drm_map_type {
_DRM_FRAME_BUFFER = 0,
_DRM_REGISTERS = 1,
_DRM_SHM = 2,
_DRM_AGP = 3,
_DRM_SCATTER_GATHER = 4,
_DRM_CONSISTENT = 5
} ;
enum drm_map_flags {
_DRM_RESTRICTED = 1,
_DRM_READ_ONLY = 2,
_DRM_LOCKED = 4,
_DRM_KERNEL = 8,
_DRM_WRITE_COMBINING = 16,
_DRM_CONTAINS_LOCK = 32,
_DRM_REMOVABLE = 64,
_DRM_DRIVER = 128
} ;
struct drm_map {
unsigned long offset ;
unsigned long size ;
enum drm_map_type type ;
enum drm_map_flags flags ;
void *handle ;
int mtrr ;
};
enum drm_stat_type {
_DRM_STAT_LOCK = 0,
_DRM_STAT_OPENS = 1,
_DRM_STAT_CLOSES = 2,
_DRM_STAT_IOCTLS = 3,
_DRM_STAT_LOCKS = 4,
_DRM_STAT_UNLOCKS = 5,
_DRM_STAT_VALUE = 6,
_DRM_STAT_BYTE = 7,
_DRM_STAT_COUNT = 8,
_DRM_STAT_IRQ = 9,
_DRM_STAT_PRIMARY = 10,
_DRM_STAT_SECONDARY = 11,
_DRM_STAT_DMA = 12,
_DRM_STAT_SPECIAL = 13,
_DRM_STAT_MISSED = 14
} ;
enum drm_ctx_flags {
_DRM_CONTEXT_PRESERVED = 1,
_DRM_CONTEXT_2DONLY = 2
} ;
struct drm_set_version {
int drm_di_major ;
int drm_di_minor ;
int drm_dd_major ;
int drm_dd_minor ;
};
struct idr_layer {
unsigned long bitmap ;
struct idr_layer *ary[1 << 6] ;
int count ;
struct rcu_head rcu_head ;
};
struct idr {
struct idr_layer *top ;
struct idr_layer *id_free ;
int layers ;
int id_free_cnt ;
spinlock_t lock ;
};
struct drm_file;
struct drm_device;
struct drm_open_hash {
unsigned int size ;
unsigned int order ;
unsigned int fill ;
struct hlist_head *table ;
int use_vmalloc ;
};
typedef int drm_ioctl_t(struct drm_device *dev , void *data , struct drm_file *file_priv );
struct drm_ioctl_desc {
unsigned int cmd ;
drm_ioctl_t *func ;
int flags ;
};
enum __anonenum_list_144 {
DRM_LIST_NONE = 0,
DRM_LIST_FREE = 1,
DRM_LIST_WAIT = 2,
DRM_LIST_PEND = 3,
DRM_LIST_PRIO = 4,
DRM_LIST_RECLAIM = 5
} ;
struct drm_buf {
int idx ;
int total ;
int order ;
int used ;
unsigned long offset ;
void *address ;
unsigned long bus_address ;
struct drm_buf *next ;
int volatile waiting ;
int volatile pending ;
wait_queue_head_t dma_wait ;
struct drm_file *file_priv ;
int context ;
int while_locked ;
enum __anonenum_list_144 list ;
int dev_priv_size ;
void *dev_private ;
};
struct drm_waitlist {
int count ;
struct drm_buf **bufs ;
struct drm_buf **rp ;
struct drm_buf **wp ;
struct drm_buf **end ;
spinlock_t read_lock ;
spinlock_t write_lock ;
};
struct drm_freelist {
int initialized ;
atomic_t count ;
struct drm_buf *next ;
wait_queue_head_t waiting ;
int low_mark ;
int high_mark ;
atomic_t wfh ;
spinlock_t lock ;
};
struct drm_dma_handle {
dma_addr_t busaddr ;
void *vaddr ;
size_t size ;
};
typedef struct drm_dma_handle drm_dma_handle_t;
struct drm_buf_entry {
int buf_size ;
int buf_count ;
struct drm_buf *buflist ;
int seg_count ;
int page_order ;
struct drm_dma_handle **seglist ;
struct drm_freelist freelist ;
};
struct drm_minor;
struct drm_file {
int authenticated ;
int master ;
pid_t pid ;
uid_t uid ;
drm_magic_t magic ;
unsigned long ioctl_count ;
struct list_head lhead ;
struct drm_minor *minor ;
int remove_auth_on_close ;
unsigned long lock_count ;
struct idr object_idr ;
spinlock_t table_lock ;
struct file *filp ;
void *driver_priv ;
};
struct drm_queue {
atomic_t use_count ;
atomic_t finalization ;
atomic_t block_count ;
atomic_t block_read ;
wait_queue_head_t read_queue ;
atomic_t block_write ;
wait_queue_head_t write_queue ;
atomic_t total_queued ;
atomic_t total_flushed ;
atomic_t total_locks ;
enum drm_ctx_flags flags ;
struct drm_waitlist waitlist ;
wait_queue_head_t flush_queue ;
};
struct drm_lock_data {
struct drm_hw_lock *hw_lock ;
struct drm_file *file_priv ;
wait_queue_head_t lock_queue ;
unsigned long lock_time ;
spinlock_t spinlock ;
uint32_t kernel_waiters ;
uint32_t user_waiters ;
int idle_has_lock ;
};
enum __anonenum_flags_145 {
_DRM_DMA_USE_AGP = 1,
_DRM_DMA_USE_SG = 2,
_DRM_DMA_USE_FB = 4,
_DRM_DMA_USE_PCI_RO = 8
} ;
struct drm_device_dma {
struct drm_buf_entry bufs[22 + 1] ;
int buf_count ;
struct drm_buf **buflist ;
int seg_count ;
int page_count ;
unsigned long *pagelist ;
unsigned long byte_count ;
enum __anonenum_flags_145 flags ;
};
struct drm_agp_head {
struct agp_kern_info agp_info ;
struct list_head memory ;
unsigned long mode ;
struct agp_bridge_data *bridge ;
int enabled ;
int acquired ;
unsigned long base ;
int agp_mtrr ;
int cant_use_aperture ;
unsigned long page_mask ;
};
struct drm_sg_mem {
unsigned long handle ;
void *virtual ;
int pages ;
struct page **pagelist ;
dma_addr_t *busaddr ;
};
struct drm_sigdata {
int context ;
struct drm_hw_lock *lock ;
};
struct drm_mm;
struct drm_mm {
struct list_head fl_entry ;
struct list_head ml_entry ;
};
typedef struct drm_map drm_local_map_t;
struct drm_gem_object {
struct kref refcount ;
struct kref handlecount ;
struct drm_device *dev ;
struct file *filp ;
size_t size ;
int name ;
uint32_t read_domains ;
uint32_t write_domain ;
uint32_t pending_read_domains ;
uint32_t pending_write_domain ;
void *driver_private ;
};
struct drm_driver {
int (*load)(struct drm_device * , unsigned long flags ) ;
int (*firstopen)(struct drm_device * ) ;
int (*open)(struct drm_device * , struct drm_file * ) ;
void (*preclose)(struct drm_device * , struct drm_file *file_priv ) ;
void (*postclose)(struct drm_device * , struct drm_file * ) ;
void (*lastclose)(struct drm_device * ) ;
int (*unload)(struct drm_device * ) ;
int (*suspend)(struct drm_device * , pm_message_t state ) ;
int (*resume)(struct drm_device * ) ;
int (*dma_ioctl)(struct drm_device *dev , void *data , struct drm_file *file_priv ) ;
void (*dma_ready)(struct drm_device * ) ;
int (*dma_quiescent)(struct drm_device * ) ;
int (*context_ctor)(struct drm_device *dev , int context ) ;
int (*context_dtor)(struct drm_device *dev , int context ) ;
int (*kernel_context_switch)(struct drm_device *dev , int old , int new ) ;
void (*kernel_context_switch_unlock)(struct drm_device *dev ) ;
int (*dri_library_name)(struct drm_device *dev , char *buf ) ;
u32 (*get_vblank_counter)(struct drm_device *dev , int crtc ) ;
int (*enable_vblank)(struct drm_device *dev , int crtc ) ;
void (*disable_vblank)(struct drm_device *dev , int crtc ) ;
int (*device_is_agp)(struct drm_device *dev ) ;
irqreturn_t (*irq_handler)(int irq , void *arg ) ;
void (*irq_preinstall)(struct drm_device *dev ) ;
int (*irq_postinstall)(struct drm_device *dev ) ;
void (*irq_uninstall)(struct drm_device *dev ) ;
void (*reclaim_buffers)(struct drm_device *dev , struct drm_file *file_priv ) ;
void (*reclaim_buffers_locked)(struct drm_device *dev , struct drm_file *file_priv ) ;
void (*reclaim_buffers_idlelocked)(struct drm_device *dev , struct drm_file *file_priv ) ;
unsigned long (*get_map_ofs)(struct drm_map *map ) ;
unsigned long (*get_reg_ofs)(struct drm_device *dev ) ;
void (*set_version)(struct drm_device *dev , struct drm_set_version *sv ) ;
int (*proc_init)(struct drm_minor *minor ) ;
void (*proc_cleanup)(struct drm_minor *minor ) ;
int (*gem_init_object)(struct drm_gem_object *obj ) ;
void (*gem_free_object)(struct drm_gem_object *obj ) ;
int major ;
int minor ;
int patchlevel ;
char *name ;
char *desc ;
char *date ;
u32 driver_features ;
int dev_priv_size ;
struct drm_ioctl_desc *ioctls ;
int num_ioctls ;
struct file_operations fops ;
struct pci_driver pci_driver ;
};
struct drm_minor {
int index ;
int type ;
dev_t device ;
struct device kdev ;
struct drm_device *dev ;
struct proc_dir_entry *dev_root ;
};
struct drm_device {
char *unique ;
int unique_len ;
char *devname ;
int if_version ;
int blocked ;
spinlock_t count_lock ;
struct mutex struct_mutex ;
int open_count ;
atomic_t ioctl_count ;
atomic_t vma_count ;
int buf_use ;
atomic_t buf_alloc ;
unsigned long counters ;
enum drm_stat_type types[15] ;
atomic_t counts[15] ;
struct list_head filelist ;
struct drm_open_hash magiclist ;
struct list_head magicfree ;
struct list_head maplist ;
int map_count ;
struct drm_open_hash map_hash ;
struct list_head ctxlist ;
int ctx_count ;
struct mutex ctxlist_mutex ;
struct idr ctx_idr ;
struct list_head vmalist ;
struct drm_lock_data lock ;
int queue_count ;
int queue_reserved ;
int queue_slots ;
struct drm_queue **queuelist ;
struct drm_device_dma *dma ;
int irq_enabled ;
long volatile context_flag ;
long volatile interrupt_flag ;
long volatile dma_flag ;
struct timer_list timer ;
wait_queue_head_t context_wait ;
int last_checked ;
int last_context ;
unsigned long last_switch ;
struct work_struct work ;
int vblank_disable_allowed ;
wait_queue_head_t *vbl_queue ;
atomic_t *_vblank_count ;
spinlock_t vbl_lock ;
struct list_head *vbl_sigs ;
atomic_t vbl_signal_pending ;
atomic_t *vblank_refcount ;
u32 *last_vblank ;
int *vblank_enabled ;
int *vblank_inmodeset ;
struct timer_list vblank_disable_timer ;
u32 max_vblank_count ;
spinlock_t tasklet_lock ;
void (*locked_tasklet_func)(struct drm_device *dev ) ;
cycles_t ctx_start ;
cycles_t lck_start ;
struct fasync_struct *buf_async ;
wait_queue_head_t buf_readers ;
wait_queue_head_t buf_writers ;
struct drm_agp_head *agp ;
struct pci_dev *pdev ;
int pci_vendor ;
int pci_device ;
struct drm_sg_mem *sg ;
int num_crtcs ;
void *dev_private ;
struct drm_sigdata sigdata ;
sigset_t sigmask ;
struct drm_driver *driver ;
drm_local_map_t *agp_buffer_map ;
unsigned int agp_buffer_token ;
struct drm_minor *primary ;
spinlock_t drw_lock ;
struct idr drw_idr ;
spinlock_t object_name_lock ;
struct idr object_name_idr ;
atomic_t object_count ;
atomic_t object_memory ;
atomic_t pin_count ;
atomic_t pin_memory ;
atomic_t gtt_count ;
atomic_t gtt_memory ;
uint32_t gtt_total ;
uint32_t invalidate_domains ;
uint32_t flush_domains ;
};
struct _drm_i915_sarea {
struct drm_tex_region texList[255 + 1] ;
int last_upload ;
int last_enqueue ;
int last_dispatch ;
int ctxOwner ;
int texAge ;
int pf_enabled ;
int pf_active ;
int pf_current_page ;
int perf_boxes ;
int width ;
int height ;
drm_handle_t front_handle ;
int front_offset ;
int front_size ;
drm_handle_t back_handle ;
int back_offset ;
int back_size ;
drm_handle_t depth_handle ;
int depth_offset ;
int depth_size ;
drm_handle_t tex_handle ;
int tex_offset ;
int tex_size ;
int log_tex_granularity ;
int pitch ;
int rotation ;
int rotated_offset ;
int rotated_size ;
int rotated_pitch ;
int virtualX ;
int virtualY ;
unsigned int front_tiled ;
unsigned int back_tiled ;
unsigned int depth_tiled ;
unsigned int rotated_tiled ;
unsigned int rotated2_tiled ;
int pipeA_x ;
int pipeA_y ;
int pipeA_w ;
int pipeA_h ;
int pipeB_x ;
int pipeB_y ;
int pipeB_w ;
int pipeB_h ;
};
typedef struct _drm_i915_sarea drm_i915_sarea_t;
struct _drm_i915_ring_buffer {
int tail_mask ;
unsigned long Size ;
u8 *virtual_start ;
int head ;
int tail ;
int space ;
drm_local_map_t map ;
struct drm_gem_object *ring_obj ;
};
typedef struct _drm_i915_ring_buffer drm_i915_ring_buffer_t;
struct mem_block {
struct mem_block *next ;
struct mem_block *prev ;
int start ;
int size ;
struct drm_file *file_priv ;
};
struct _drm_i915_vbl_swap {
struct list_head head ;
drm_drawable_t drw_id ;
unsigned int plane ;
unsigned int sequence ;
};
typedef struct _drm_i915_vbl_swap drm_i915_vbl_swap_t;
struct opregion_header;
struct opregion_acpi;
struct opregion_swsci;
struct opregion_asle;
struct intel_opregion {
struct opregion_header *header ;
struct opregion_acpi *acpi ;
struct opregion_swsci *swsci ;
struct opregion_asle *asle ;
int enabled ;
};
struct __anonstruct_mm_147 {
struct drm_mm gtt_space ;
struct list_head active_list ;
struct list_head flushing_list ;
struct list_head inactive_list ;
struct list_head request_list ;
struct delayed_work retire_work ;
struct work_struct vblank_work ;
uint32_t next_gem_seqno ;
uint32_t waiting_gem_seqno ;
uint32_t irq_gem_seqno ;
int suspended ;
int wedged ;
uint32_t bit_6_swizzle_x ;
uint32_t bit_6_swizzle_y ;
};
struct drm_i915_private {
struct drm_device *dev ;
void *regs ;
drm_local_map_t *sarea ;
drm_i915_sarea_t *sarea_priv ;
drm_i915_ring_buffer_t ring ;
drm_dma_handle_t *status_page_dmah ;
void *hw_status_page ;
dma_addr_t dma_status_page ;
uint32_t counter ;
unsigned int status_gfx_addr ;
drm_local_map_t hws_map ;
struct drm_gem_object *hws_obj ;
unsigned int cpp ;
int back_offset ;
int front_offset ;
int current_page ;
int page_flipping ;
wait_queue_head_t irq_queue ;
atomic_t irq_received ;
spinlock_t user_irq_lock ;
int user_irq_refcount ;
u32 irq_mask_reg ;
int tex_lru_log_granularity ;
int allow_batchbuffer ;
struct mem_block *agp_heap ;
unsigned int sr01 ;
unsigned int adpa ;
unsigned int ppcr ;
unsigned int dvob ;
unsigned int dvoc ;
unsigned int lvds ;
int vblank_pipe ;
spinlock_t swaps_lock ;
drm_i915_vbl_swap_t vbl_swaps ;
unsigned int swaps_pending ;
struct intel_opregion opregion ;
u8 saveLBB ;
u32 saveDSPACNTR ;
u32 saveDSPBCNTR ;
u32 saveDSPARB ;
u32 savePIPEACONF ;
u32 savePIPEBCONF ;
u32 savePIPEASRC ;
u32 savePIPEBSRC ;
u32 saveFPA0 ;
u32 saveFPA1 ;
u32 saveDPLL_A ;
u32 saveDPLL_A_MD ;
u32 saveHTOTAL_A ;
u32 saveHBLANK_A ;
u32 saveHSYNC_A ;
u32 saveVTOTAL_A ;
u32 saveVBLANK_A ;
u32 saveVSYNC_A ;
u32 saveBCLRPAT_A ;
u32 savePIPEASTAT ;
u32 saveDSPASTRIDE ;
u32 saveDSPASIZE ;
u32 saveDSPAPOS ;
u32 saveDSPAADDR ;
u32 saveDSPASURF ;
u32 saveDSPATILEOFF ;
u32 savePFIT_PGM_RATIOS ;
u32 saveBLC_PWM_CTL ;
u32 saveBLC_PWM_CTL2 ;
u32 saveFPB0 ;
u32 saveFPB1 ;
u32 saveDPLL_B ;
u32 saveDPLL_B_MD ;
u32 saveHTOTAL_B ;
u32 saveHBLANK_B ;
u32 saveHSYNC_B ;
u32 saveVTOTAL_B ;
u32 saveVBLANK_B ;
u32 saveVSYNC_B ;
u32 saveBCLRPAT_B ;
u32 savePIPEBSTAT ;
u32 saveDSPBSTRIDE ;
u32 saveDSPBSIZE ;
u32 saveDSPBPOS ;
u32 saveDSPBADDR ;
u32 saveDSPBSURF ;
u32 saveDSPBTILEOFF ;
u32 saveVGA0 ;
u32 saveVGA1 ;
u32 saveVGA_PD ;
u32 saveVGACNTRL ;
u32 saveADPA ;
u32 saveLVDS ;
u32 savePP_ON_DELAYS ;
u32 savePP_OFF_DELAYS ;
u32 saveDVOA ;
u32 saveDVOB ;
u32 saveDVOC ;
u32 savePP_ON ;
u32 savePP_OFF ;
u32 savePP_CONTROL ;
u32 savePP_DIVISOR ;
u32 savePFIT_CONTROL ;
u32 save_palette_a[256] ;
u32 save_palette_b[256] ;
u32 saveFBC_CFB_BASE ;
u32 saveFBC_LL_BASE ;
u32 saveFBC_CONTROL ;
u32 saveFBC_CONTROL2 ;
u32 saveIER ;
u32 saveIIR ;
u32 saveIMR ;
u32 saveCACHE_MODE_0 ;
u32 saveD_STATE ;
u32 saveCG_2D_DIS ;
u32 saveMI_ARB_STATE ;
u32 saveSWF0[16] ;
u32 saveSWF1[16] ;
u32 saveSWF2[3] ;
u8 saveMSR ;
u8 saveSR[8] ;
u8 saveGR[25] ;
u8 saveAR_INDEX ;
u8 saveAR[21] ;
u8 saveDACMASK ;
u8 saveDACDATA[256 * 3] ;
u8 saveCR[37] ;
struct __anonstruct_mm_147 mm ;
};
typedef __u64 uint64_t;
struct x8664_pda {
struct task_struct *pcurrent ;
unsigned long data_offset ;
unsigned long kernelstack ;
unsigned long oldrsp ;
int irqcount ;
unsigned int cpunumber ;
char *irqstackptr ;
short nodenumber ;
short in_bootmem ;
unsigned int __softirq_pending ;
unsigned int __nmi_count ;
short mmu_state ;
short isidle ;
struct mm_struct *active_mm ;
unsigned int apic_timer_irqs ;
unsigned int irq0_irqs ;
unsigned int irq_resched_count ;
unsigned int irq_call_count ;
unsigned int irq_tlb_count ;
unsigned int irq_thermal_count ;
unsigned int irq_threshold_count ;
unsigned int irq_spurious_count ;
} __attribute__((__aligned__((1) << (7) ))) ;
enum hrtimer_restart;
struct __large_struct {
unsigned long buf[100] ;
};
struct drm_clip_rect {
unsigned short x1 ;
unsigned short y1 ;
unsigned short x2 ;
unsigned short y2 ;
};
enum __anonenum_func_146 {
I915_INIT_DMA = 1,
I915_CLEANUP_DMA = 2,
I915_RESUME_DMA = 3
} ;
struct _drm_i915_init {
enum __anonenum_func_146 func ;
unsigned int mmio_offset ;
int sarea_priv_offset ;
unsigned int ring_start ;
unsigned int ring_end ;
unsigned int ring_size ;
unsigned int front_offset ;
unsigned int back_offset ;
unsigned int depth_offset ;
unsigned int w ;
unsigned int h ;
unsigned int pitch ;
unsigned int pitch_bits ;
unsigned int back_pitch ;
unsigned int depth_pitch ;
unsigned int cpp ;
unsigned int chipset ;
};
typedef struct _drm_i915_init drm_i915_init_t;
struct _drm_i915_batchbuffer {
int start ;
int used ;
int DR1 ;
int DR4 ;
int num_cliprects ;
struct drm_clip_rect *cliprects ;
};
typedef struct _drm_i915_batchbuffer drm_i915_batchbuffer_t;
struct _drm_i915_cmdbuffer {
char *buf ;
int sz ;
int DR1 ;
int DR4 ;
int num_cliprects ;
struct drm_clip_rect *cliprects ;
};
typedef struct _drm_i915_cmdbuffer drm_i915_cmdbuffer_t;
struct drm_i915_getparam {
int param ;
int *value ;
};
typedef struct drm_i915_getparam drm_i915_getparam_t;
struct drm_i915_setparam {
int param ;
int value ;
};
typedef struct drm_i915_setparam drm_i915_setparam_t;
struct drm_i915_hws_addr {
uint64_t addr ;
};
typedef struct drm_i915_hws_addr drm_i915_hws_addr_t;
typedef struct drm_i915_private drm_i915_private_t;
struct __anonstruct_mm_148 {
uint32_t last_gem_seqno ;
uint32_t last_gem_throttle_seqno ;
};
struct drm_i915_file_private {
struct __anonstruct_mm_148 mm ;
};
enum hrtimer_restart;
struct drm_drawable_info {
unsigned int num_rects ;
struct drm_clip_rect *rects ;
};
enum drm_vblank_seq_type {
_DRM_VBLANK_ABSOLUTE = 0,
_DRM_VBLANK_RELATIVE = 1,
_DRM_VBLANK_FLIP = 134217728,
_DRM_VBLANK_NEXTONMISS = 268435456,
_DRM_VBLANK_SECONDARY = 536870912,
_DRM_VBLANK_SIGNAL = 1073741824
} ;
struct drm_i915_irq_emit {
int *irq_seq ;
};
typedef struct drm_i915_irq_emit drm_i915_irq_emit_t;
struct drm_i915_irq_wait {
int irq_seq ;
};
typedef struct drm_i915_irq_wait drm_i915_irq_wait_t;
struct drm_i915_vblank_pipe {
int pipe ;
};
typedef struct drm_i915_vblank_pipe drm_i915_vblank_pipe_t;
struct drm_i915_vblank_swap {
drm_drawable_t drawable ;
enum drm_vblank_seq_type seqtype ;
unsigned int sequence ;
};
typedef struct drm_i915_vblank_swap drm_i915_vblank_swap_t;
enum hrtimer_restart;
struct drm_i915_mem_alloc {
int region ;
int alignment ;
int size ;
int *region_offset ;
};
typedef struct drm_i915_mem_alloc drm_i915_mem_alloc_t;
struct drm_i915_mem_free {
int region ;
int region_offset ;
};
typedef struct drm_i915_mem_free drm_i915_mem_free_t;
struct drm_i915_mem_init_heap {
int region ;
int size ;
int start ;
};
typedef struct drm_i915_mem_init_heap drm_i915_mem_init_heap_t;
struct drm_i915_mem_destroy_heap {
int region ;
};
typedef struct drm_i915_mem_destroy_heap drm_i915_mem_destroy_heap_t;
struct notifier_block {
int (*notifier_call)(struct notifier_block * , unsigned long , void * ) ;
struct notifier_block *next ;
int priority ;
};
enum hrtimer_restart;
#pragma pack(1)
#pragma pack()
#pragma pack(1)
#pragma pack()
#pragma pack(1)
#pragma pack()
#pragma pack(8)
#pragma pack()
struct opregion_header {
u8 signature[16] ;
u32 size ;
u32 opregion_ver ;
u8 bios_ver[32] ;
u8 vbios_ver[16] ;
u8 driver_ver[16] ;
u32 mboxes ;
u8 reserved[164] ;
} __attribute__((__packed__)) ;
struct opregion_acpi {
u32 drdy ;
u32 csts ;
u32 cevt ;
u8 rsvd1[20] ;
u32 didl[8] ;
u32 cpdl[8] ;
u32 cadl[8] ;
u32 nadl[8] ;
u32 aslp ;
u32 tidx ;
u32 chpd ;
u32 clid ;
u32 cdck ;
u32 sxsw ;
u32 evts ;
u32 cnot ;
u32 nrdy ;
u8 rsvd2[60] ;
} __attribute__((__packed__)) ;
struct opregion_swsci {
u32 scic ;
u32 parm ;
u32 dslp ;
u8 rsvd[244] ;
} __attribute__((__packed__)) ;
struct opregion_asle {
u32 ardy ;
u32 aslc ;
u32 tche ;
u32 alsi ;
u32 bclp ;
u32 pfit ;
u32 cblv ;
u16 bclm[20] ;
u32 cpfm ;
u32 epfm ;
u8 plut[74] ;
u32 pfmb ;
u8 rsvd[102] ;
} __attribute__((__packed__)) ;
enum hrtimer_restart;
enum pipe {
PIPE_A = 0,
PIPE_B = 1
} ;
typedef unsigned char __u8;
typedef unsigned long uintptr_t;
typedef __s32 int32_t;
typedef __u8 uint8_t;
enum hrtimer_restart;
struct agp_memory {
struct agp_memory *next ;
struct agp_memory *prev ;
struct agp_bridge_data *bridge ;
unsigned long *memory ;
size_t page_count ;
int key ;
int num_scratch_pages ;
off_t pg_start ;
u32 type ;
u32 physical ;
bool is_bound ;
bool is_flushed ;
bool vmalloc_flag ;
struct list_head mapped_list ;
};
typedef int filler_t(void * , struct page * );
struct drm_mm_node {
struct list_head fl_entry ;
struct list_head ml_entry ;
int free ;
unsigned long start ;
unsigned long size ;
struct drm_mm *mm ;
void *private ;
};
struct drm_i915_gem_init {
uint64_t gtt_start ;
uint64_t gtt_end ;
};
struct drm_i915_gem_create {
uint64_t size ;
uint32_t handle ;
uint32_t pad ;
};
struct drm_i915_gem_pread {
uint32_t handle ;
uint32_t pad ;
uint64_t offset ;
uint64_t size ;
uint64_t data_ptr ;
};
struct drm_i915_gem_pwrite {
uint32_t handle ;
uint32_t pad ;
uint64_t offset ;
uint64_t size ;
uint64_t data_ptr ;
};
struct drm_i915_gem_mmap {
uint32_t handle ;
uint32_t pad ;
uint64_t offset ;
uint64_t size ;
uint64_t addr_ptr ;
};
struct drm_i915_gem_set_domain {
uint32_t handle ;
uint32_t read_domains ;
uint32_t write_domain ;
};
struct drm_i915_gem_sw_finish {
uint32_t handle ;
};
struct drm_i915_gem_relocation_entry {
uint32_t target_handle ;
uint32_t delta ;
uint64_t offset ;
uint64_t presumed_offset ;
uint32_t read_domains ;
uint32_t write_domain ;
};
struct drm_i915_gem_exec_object {
uint32_t handle ;
uint32_t relocation_count ;
uint64_t relocs_ptr ;
uint64_t alignment ;
uint64_t offset ;
};
struct drm_i915_gem_execbuffer {
uint64_t buffers_ptr ;
uint32_t buffer_count ;
uint32_t batch_start_offset ;
uint32_t batch_len ;
uint32_t DR1 ;
uint32_t DR4 ;
uint32_t num_cliprects ;
uint64_t cliprects_ptr ;
};
struct drm_i915_gem_pin {
uint32_t handle ;
uint32_t pad ;
uint64_t alignment ;
uint64_t offset ;
};
struct drm_i915_gem_busy {
uint32_t handle ;
uint32_t busy ;
};
struct drm_i915_gem_object {
struct drm_gem_object *obj ;
struct drm_mm_node *gtt_space ;
struct list_head list ;
int active ;
int dirty ;
struct agp_memory *agp_mem ;
struct page **page_list ;
uint32_t gtt_offset ;
int gtt_bound ;
int pin_count ;
uint32_t last_rendering_seqno ;
uint32_t tiling_mode ;
uint8_t *page_cpu_valid ;
};
struct drm_i915_gem_request {
uint32_t seqno ;
unsigned long emitted_jiffies ;
uint32_t flush_domains ;
struct list_head list ;
};
struct reclaim_state {
unsigned long reclaimed_slab ;
};
struct drm_i915_relocation_entry;
enum hrtimer_restart;
struct drm_proc_list {
char const *name ;
int (*f)(char * , char ** , off_t , int , int * , void * ) ;
};
enum hrtimer_restart;
struct drm_i915_gem_set_tiling {
uint32_t handle ;
uint32_t tiling_mode ;
uint32_t stride ;
uint32_t swizzle_mode ;
};
struct drm_i915_gem_get_tiling {
uint32_t handle ;
uint32_t tiling_mode ;
uint32_t swizzle_mode ;
};
enum hrtimer_restart;
typedef int drm_ioctl_compat_t(struct file *filp , unsigned int cmd , unsigned long arg );
struct _drm_i915_batchbuffer32 {
int start ;
int used ;
int DR1 ;
int DR4 ;
int num_cliprects ;
u32 cliprects ;
};
typedef struct _drm_i915_batchbuffer32 drm_i915_batchbuffer32_t;
struct _drm_i915_cmdbuffer32 {
u32 buf ;
int sz ;
int DR1 ;
int DR4 ;
int num_cliprects ;
u32 cliprects ;
};
typedef struct _drm_i915_cmdbuffer32 drm_i915_cmdbuffer32_t;
struct drm_i915_irq_emit32 {
u32 irq_seq ;
};
typedef struct drm_i915_irq_emit32 drm_i915_irq_emit32_t;
struct drm_i915_getparam32 {
int param ;
u32 value ;
};
typedef struct drm_i915_getparam32 drm_i915_getparam32_t;
struct drm_i915_mem_alloc32 {
int region ;
int alignment ;
int size ;
u32 region_offset ;
};
typedef struct drm_i915_mem_alloc32 drm_i915_mem_alloc32_t;
extern int ( /* format attribute */ printk)(char const *fmt , ...) ;
int init_module(void) ;
void cleanup_module(void) ;
extern struct module __this_module ;
extern int ( __attribute__((__warn_unused_result__)) pci_enable_device)(struct pci_dev *dev ) ;
extern void pci_disable_device(struct pci_dev *dev ) ;
extern void pci_set_master(struct pci_dev *dev ) ;
extern int pci_save_state(struct pci_dev *dev ) ;
extern int pci_restore_state(struct pci_dev *dev ) ;
extern int pci_set_power_state(struct pci_dev *dev , pci_power_t state ) ;
extern int drm_init(struct drm_driver *driver ) ;
extern void drm_exit(struct drm_driver *driver ) ;
extern int drm_ioctl(struct inode *inode , struct file *filp , unsigned int cmd ,
unsigned long arg ) ;
extern int drm_open(struct inode *inode , struct file *filp ) ;
extern int drm_fasync(int fd , struct file *filp , int on ) ;
extern int drm_release(struct inode *inode , struct file *filp ) ;
extern int drm_mmap(struct file *filp , struct vm_area_struct *vma ) ;
extern unsigned long drm_core_get_map_ofs(struct drm_map *map ) ;
extern unsigned long drm_core_get_reg_ofs(struct drm_device *dev ) ;
extern unsigned int drm_poll(struct file *filp , struct poll_table_struct *wait ) ;
extern void drm_core_reclaim_buffers(struct drm_device *dev , struct drm_file *filp ) ;
struct drm_ioctl_desc i915_ioctls[35] ;
int i915_max_ioctl ;
int i915_driver_load(struct drm_device *dev , unsigned long flags ) ;
int i915_driver_unload(struct drm_device *dev ) ;
int i915_driver_open(struct drm_device *dev , struct drm_file *file_priv ) ;
void i915_driver_lastclose(struct drm_device *dev ) ;
void i915_driver_preclose(struct drm_device *dev , struct drm_file *file_priv ) ;
void i915_driver_postclose(struct drm_device *dev , struct drm_file *file_priv ) ;
int i915_driver_device_is_agp(struct drm_device *dev ) ;
long i915_compat_ioctl(struct file *filp , unsigned int cmd , unsigned long arg ) ;
irqreturn_t i915_driver_irq_handler(int irq , void *arg ) ;
void i915_driver_irq_preinstall(struct drm_device *dev ) ;
int i915_driver_irq_postinstall(struct drm_device *dev ) ;
void i915_driver_irq_uninstall(struct drm_device *dev ) ;
int i915_enable_vblank(struct drm_device *dev , int plane ) ;
void i915_disable_vblank(struct drm_device *dev , int plane ) ;
u32 i915_get_vblank_counter(struct drm_device *dev , int plane ) ;
int i915_gem_proc_init(struct drm_minor *minor ) ;
void i915_gem_proc_cleanup(struct drm_minor *minor ) ;
int i915_gem_init_object(struct drm_gem_object *obj ) ;
void i915_gem_free_object(struct drm_gem_object *obj ) ;
int i915_save_state(struct drm_device *dev ) ;
int i915_restore_state(struct drm_device *dev ) ;
int intel_opregion_init(struct drm_device *dev ) ;
void intel_opregion_free(struct drm_device *dev ) ;
static struct pci_device_id pciidlist[24] =
{ {32902, 13687, ~ 0, ~ 0, 0, 0, 0},
{32902, 9570, ~ 0, ~ 0, 0, 0, 0},
{32902, 13698, ~ 0, ~ 0, 0, 0, 0},
{32902, 9586, ~ 0, ~ 0, 0, 0, 0},
{32902, 9602, ~ 0, ~ 0, 0, 0, 0},
{32902, 9610, ~ 0, ~ 0, 0, 0, 0},
{32902, 9618, ~ 0, ~ 0, 0, 0, 0},
{32902, 10098, ~ 0, ~ 0, 0, 0, 0},
{32902, 10146, ~ 0, ~ 0, 0, 0, 0},
{32902, 10158, ~ 0, ~ 0, 0, 0, 0},
{32902, 10610, ~ 0, ~ 0, 0, 0, 0},
{32902, 10626, ~ 0, ~ 0, 0, 0, 0},
{32902, 10642, ~ 0, ~ 0, 0, 0, 0},
{32902, 10658, ~ 0, ~ 0, 0, 0, 0},
{32902, 10674, ~ 0, ~ 0, 0, 0, 0},
{32902, 10690, ~ 0, ~ 0, 0, 0, 0},
{32902, 10706, ~ 0, ~ 0, 0, 0, 0},
{32902, 10754, ~ 0, ~ 0, 0, 0, 0},
{32902, 10770, ~ 0, ~ 0, 0, 0, 0},
{32902, 10818, ~ 0, ~ 0, 0, 0, 0},
{32902, 11778, ~ 0, ~ 0, 0, 0, 0},
{32902, 11794, ~ 0, ~ 0, 0, 0, 0},
{32902, 11810, ~ 0, ~ 0, 0, 0, 0},
{0, 0, 0, 0U, 0U, 0U, 0UL}};
static int i915_suspend(struct drm_device *dev , pm_message_t state )
{
struct drm_i915_private *dev_priv ;
{
dev_priv = dev->dev_private;
if (! dev || ! dev_priv) {
printk("<3>dev: %p, dev_priv: %p\n", dev, dev_priv);
printk("<3>DRM not initialized, aborting suspend.\n");
return (-19);
} else {
}
if (state.event == 8) {
return (0);
} else {
}
pci_save_state(dev->pdev);
i915_save_state(dev);
intel_opregion_free(dev);
if (state.event == 2) {
pci_disable_device(dev->pdev);
pci_set_power_state(dev->pdev, 3);
} else {
}
return (0);
}
}
static int i915_resume(struct drm_device *dev )
{
int tmp ;
{
pci_set_power_state(dev->pdev, 0);
pci_restore_state(dev->pdev);
tmp = pci_enable_device(dev->pdev);
if (tmp) {
return (-1);
} else {
}
pci_set_master(dev->pdev);
i915_restore_state(dev);
intel_opregion_init(dev);
return (0);
}
}
static struct drm_driver driver =
{& i915_driver_load, 0, & i915_driver_open, & i915_driver_preclose, & i915_driver_postclose,
& i915_driver_lastclose, & i915_driver_unload, & i915_suspend, & i915_resume,
0, 0, 0, 0, 0, 0, 0, 0, & i915_get_vblank_counter, & i915_enable_vblank, & i915_disable_vblank,
& i915_driver_device_is_agp, & i915_driver_irq_handler, & i915_driver_irq_preinstall,
& i915_driver_irq_postinstall, & i915_driver_irq_uninstall, & drm_core_reclaim_buffers,
0, 0, & drm_core_get_map_ofs, & drm_core_get_reg_ofs, 0, & i915_gem_proc_init,
& i915_gem_proc_cleanup, & i915_gem_init_object, & i915_gem_free_object, 1, 6,
0, "i915", "Intel Graphics", "20080730", (((1 | 2) | 64) | 128) | 4096, 0, i915_ioctls,
0, {& __this_module, 0, 0, 0, 0, 0, 0, & drm_poll, & drm_ioctl, 0, & i915_compat_ioctl,
& drm_mmap, & drm_open, 0, & drm_release, 0, 0, & drm_fasync, 0, 0, 0, 0,
0, 0, 0, 0, 0}, {{0, 0}, "i915", pciidlist, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0},
{{{0U}, 0U, 0U, 0}, {0, 0}, 0U}}};
static int i915_init(void) __attribute__((__section__(".init.text"))) ;
static int i915_init(void)
{
int tmp ;
{
driver.num_ioctls = i915_max_ioctl;
tmp = drm_init(& driver);
return (tmp);
}
}
static void i915_exit(void) __attribute__((__section__(".exit.text"))) ;
static void i915_exit(void)
{
{
drm_exit(& driver);
return;
}
}
int init_module(void)
{
int tmp ;
{
tmp = i915_init();
return (tmp);
}
}
void cleanup_module(void)
{
{
i915_exit();
return;
}
}
static char const __mod_author156[31] __attribute__((__used__, __unused__, __section__(".modinfo"))) =
{ 'a', 'u', 't', 'h',
'o', 'r', '=', 'T',
'u', 'n', 'g', 's',
't', 'e', 'n', ' ',
'G', 'r', 'a', 'p',
'h', 'i', 'c', 's',
',', ' ', 'I', 'n',
'c', '.', '\000'};
static char const __mod_description157[27] __attribute__((__used__, __unused__,
__section__(".modinfo"))) =
{ 'd', 'e', 's', 'c',
'r', 'i', 'p', 't',
'i', 'o', 'n', '=',
'I', 'n', 't', 'e',
'l', ' ', 'G', 'r',
'a', 'p', 'h', 'i',
'c', 's', '\000'};
static char const __mod_license158[34] __attribute__((__used__, __unused__, __section__(".modinfo"))) =
{ 'l', 'i', 'c', 'e',
'n', 's', 'e', '=',
'G', 'P', 'L', ' ',
'a', 'n', 'd', ' ',
'a', 'd', 'd', 'i',
't', 'i', 'o', 'n',
'a', 'l', ' ', 'r',
'i', 'g', 'h', 't',
's', '\000'};
void ldv_check_final_state(void) ;
extern void ldv_initialize(void) ;
extern void ldv_handler_precall(void) ;
extern int nondet_int(void) ;
int LDV_IN_INTERRUPT ;
int main(void)
{
struct drm_device *var_group1 ;
pm_message_t var_i915_suspend_0_p1 ;
int tmp ;
int tmp___0 ;
int tmp___1 ;
{
LDV_IN_INTERRUPT = 1;
ldv_initialize();
ldv_handler_precall();
tmp = i915_init();
if (tmp) {
goto ldv_final;
} else {
}
while (1) {
tmp___1 = nondet_int();
if (tmp___1) {
} else {
break;
}
tmp___0 = nondet_int();
switch (tmp___0) {
case 0:
ldv_handler_precall();
i915_suspend(var_group1, var_i915_suspend_0_p1);
break;
case 1:
ldv_handler_precall();
i915_resume(var_group1);
break;
default:
break;
}
}
ldv_handler_precall();
i915_exit();
ldv_final:
ldv_check_final_state();
return 0;
}
}
long ldv__builtin_expect(long exp , long c ) ;
extern void *memset(void *s , int c , size_t n ) ;
extern __attribute__((__noreturn__)) void __bad_pda_field(void) ;
extern struct x8664_pda _proxy_pda ;
__inline static struct thread_info *current_thread_info(void)
{
struct thread_info *ti ;
unsigned long ret__ ;
{
switch (sizeof(_proxy_pda.kernelstack)) {
case 2UL:
__asm__ ("mov"
"w %%gs:%c1,%0": "=r" (ret__): "i" ((unsigned int )(& ((struct x8664_pda *)0)->kernelstack)),
"m" (_proxy_pda.kernelstack));
break;
case 4UL:
__asm__ ("mov"
"l %%gs:%c1,%0": "=r" (ret__): "i" ((unsigned int )(& ((struct x8664_pda *)0)->kernelstack)),
"m" (_proxy_pda.kernelstack));
break;
case 8UL:
__asm__ ("mov"
"q %%gs:%c1,%0": "=r" (ret__): "i" ((unsigned int )(& ((struct x8664_pda *)0)->kernelstack)),
"m" (_proxy_pda.kernelstack));
break;
default:
__bad_pda_field();
}
ti = (void *)((ret__ + (unsigned long )(5 * 8)) - ((1UL << 12) << 1));
return (ti);
}
}
extern void __spin_lock_init(spinlock_t *lock , char const *name , struct lock_class_key *key ) ;
void mutex_lock(struct mutex *lock ) ;
void mutex_unlock(struct mutex *lock ) ;
extern unsigned long msleep_interruptible(unsigned int msecs ) ;
extern void kfree(void const * ) ;
extern void *__kmalloc(size_t size , gfp_t flags ) ;
__inline static void *( __attribute__((__always_inline__)) kmalloc)(size_t size ,
gfp_t flags )
{
void *tmp___2 ;
{
tmp___2 = __kmalloc(size, flags);
return (tmp___2);
}
}
__inline static unsigned int readl(void const volatile *addr )
{
unsigned int ret ;
{
__asm__ volatile ("mov"
"l"
" %1,%0": "=r" (ret): "m" (*((unsigned int volatile *)addr)): "memory");
return (ret);
}
}
__inline static void writel(unsigned int val , void volatile *addr )
{
{
__asm__ volatile ("mov"
"l"
" %0,%1": : "r" (val), "m" (*((unsigned int volatile *)addr)): "memory");
return;
}
}
extern void *ioremap_nocache(resource_size_t offset , unsigned long size ) ;
__inline static void *ioremap(resource_size_t offset , unsigned long size )
{
void *tmp ;
{
tmp = ioremap_nocache(offset, size);
return (tmp);
}
}
extern void iounmap(void volatile *addr ) ;
extern int pci_enable_msi(struct pci_dev *dev ) ;
extern void pci_disable_msi(struct pci_dev *dev ) ;
extern unsigned long ( __attribute__((__warn_unused_result__)) copy_user_generic)(void *to ,
void const *from ,
unsigned int len ) ;
extern unsigned long ( __attribute__((__warn_unused_result__)) copy_to_user)(void *to ,
void const *from ,
unsigned int len ) ;
__inline static int ( __attribute__((__warn_unused_result__, __always_inline__)) __copy_from_user)(void *dst ,
void const *src ,
unsigned int size )
{
int ret ;
unsigned long tmp ;
long tmp___0 ;
long tmp___1 ;
unsigned long tmp___2 ;
{
ret = 0;
tmp = copy_user_generic(dst, (void *)src, size);
return (tmp);
switch (size) {
case 1U:
__asm__ volatile ("1:\tmov"
"b"
" %2,%"
"b"
"1\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3:\tmov %3,%0\n"
"\txor"
"b"
" %"
"b"
"1,%"
"b"
"1\n"
"\tjmp 2b\n"
".previous\n"
" .section __ex_table,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"1b"
","
"3b"
"\n"
" .previous\n": "=r" (ret), "=q" (*((u8 *)dst)): "m" (*((struct __large_struct *)((u8 *)src))),
"i" (1), "0" (ret));
return (ret);
case 2U:
__asm__ volatile ("1:\tmov"
"w"
" %2,%"
"w"
"1\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3:\tmov %3,%0\n"
"\txor"
"w"
" %"
"w"
"1,%"
"w"
"1\n"
"\tjmp 2b\n"
".previous\n"
" .section __ex_table,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"1b"
","
"3b"
"\n"
" .previous\n": "=r" (ret), "=r" (*((u16 *)dst)): "m" (*((struct __large_struct *)((u16 *)src))),
"i" (2), "0" (ret));
return (ret);
case 4U:
__asm__ volatile ("1:\tmov"
"l"
" %2,%"
"k"
"1\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3:\tmov %3,%0\n"
"\txor"
"l"
" %"
"k"
"1,%"
"k"
"1\n"
"\tjmp 2b\n"
".previous\n"
" .section __ex_table,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"1b"
","
"3b"
"\n"
" .previous\n": "=r" (ret), "=r" (*((u32 *)dst)): "m" (*((struct __large_struct *)((u32 *)src))),
"i" (4), "0" (ret));
return (ret);
case 8U:
__asm__ volatile ("1:\tmov"
"q"
" %2,%"
""
"1\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3:\tmov %3,%0\n"
"\txor"
"q"
" %"
""
"1,%"
""
"1\n"
"\tjmp 2b\n"
".previous\n"
" .section __ex_table,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"1b"
","
"3b"
"\n"
" .previous\n": "=r" (ret), "=r" (*((u64 *)dst)): "m" (*((struct __large_struct *)((u64 *)src))),
"i" (8), "0" (ret));
return (ret);
case 10U:
__asm__ volatile ("1:\tmov"
"q"
" %2,%"
""
"1\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3:\tmov %3,%0\n"
"\txor"
"q"
" %"
""
"1,%"
""
"1\n"
"\tjmp 2b\n"
".previous\n"
" .section __ex_table,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"1b"
","
"3b"
"\n"
" .previous\n": "=r" (ret), "=r" (*((u64 *)dst)): "m" (*((struct __large_struct *)((u64 *)src))),
"i" (16), "0" (ret));
tmp___0 = ldv__builtin_expect(! (! ret), 0);
if (tmp___0) {
return (ret);
} else {
}
__asm__ volatile ("1:\tmov"
"w"
" %2,%"
"w"
"1\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3:\tmov %3,%0\n"
"\txor"
"w"
" %"
"w"
"1,%"
"w"
"1\n"
"\tjmp 2b\n"
".previous\n"
" .section __ex_table,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"1b"
","
"3b"
"\n"
" .previous\n": "=r" (ret), "=r" (*((u16 *)((char *)dst + 8))): "m" (*((struct __large_struct *)((u16 *)((char *)src + 8)))),
"i" (2), "0" (ret));
return (ret);
case 16U:
__asm__ volatile ("1:\tmov"
"q"
" %2,%"
""
"1\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3:\tmov %3,%0\n"
"\txor"
"q"
" %"
""
"1,%"
""
"1\n"
"\tjmp 2b\n"
".previous\n"
" .section __ex_table,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"1b"
","
"3b"
"\n"
" .previous\n": "=r" (ret), "=r" (*((u64 *)dst)): "m" (*((struct __large_struct *)((u64 *)src))),
"i" (16), "0" (ret));
tmp___1 = ldv__builtin_expect(! (! ret), 0);
if (tmp___1) {
return (ret);
} else {
}
__asm__ volatile ("1:\tmov"
"q"
" %2,%"
""
"1\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3:\tmov %3,%0\n"
"\txor"
"q"
" %"
""
"1,%"
""
"1\n"
"\tjmp 2b\n"
".previous\n"
" .section __ex_table,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"1b"
","
"3b"
"\n"
" .previous\n": "=r" (ret), "=r" (*((u64 *)((char *)dst + 8))): "m" (*((struct __large_struct *)((u64 *)((char *)src + 8)))),
"i" (8), "0" (ret));
return (ret);
default:
tmp___2 = copy_user_generic(dst, (void *)src, size);
return (tmp___2);
}
}
}
extern unsigned long drm_get_resource_start(struct drm_device *dev , unsigned int resource ) ;
extern unsigned long drm_get_resource_len(struct drm_device *dev , unsigned int resource ) ;
extern int drm_irq_uninstall(struct drm_device *dev ) ;
extern unsigned int drm_debug ;
extern drm_local_map_t *drm_getsarea(struct drm_device *dev ) ;
extern drm_dma_handle_t *drm_pci_alloc(struct drm_device *dev , size_t size , size_t align ,
dma_addr_t maxaddr ) ;
extern void drm_pci_free(struct drm_device *dev , drm_dma_handle_t *dmah ) ;
extern void drm_core_ioremap(struct drm_map *map , struct drm_device *dev ) ;
extern void drm_core_ioremapfree(struct drm_map *map , struct drm_device *dev ) ;
__inline static void *drm_alloc(size_t size , int area )
{
void *tmp ;
{
tmp = kmalloc(size, (16U | 64U) | 128U);
return (tmp);
}
}
__inline static void drm_free(void *pt , size_t size , int area )
{
{
kfree(pt);
return;
}
}
void i915_kernel_lost_context(struct drm_device *dev ) ;
int i915_emit_box(struct drm_device *dev , struct drm_clip_rect *boxes , int i , int DR1 ,
int DR4 ) ;
int i915_irq_emit(struct drm_device *dev , void *data , struct drm_file *file_priv ) ;
int i915_irq_wait(struct drm_device *dev , void *data , struct drm_file *file_priv ) ;
int i915_vblank_pipe_set(struct drm_device *dev , void *data , struct drm_file *file_priv ) ;
int i915_vblank_pipe_get(struct drm_device *dev , void *data , struct drm_file *file_priv ) ;
int i915_vblank_swap(struct drm_device *dev , void *data , struct drm_file *file_priv ) ;
int i915_mem_alloc(struct drm_device *dev , void *data , struct drm_file *file_priv ) ;
int i915_mem_free(struct drm_device *dev , void *data , struct drm_file *file_priv ) ;
int i915_mem_init_heap(struct drm_device *dev , void *data , struct drm_file *file_priv ) ;
int i915_mem_destroy_heap(struct drm_device *dev , void *data , struct drm_file *file_priv ) ;
void i915_mem_takedown(struct mem_block **heap ) ;
void i915_mem_release(struct drm_device *dev , struct drm_file *file_priv , struct mem_block *heap ) ;
int i915_gem_init_ioctl(struct drm_device *dev , void *data , struct drm_file *file_priv ) ;
int i915_gem_create_ioctl(struct drm_device *dev , void *data , struct drm_file *file_priv ) ;
int i915_gem_pread_ioctl(struct drm_device *dev , void *data , struct drm_file *file_priv ) ;
int i915_gem_pwrite_ioctl(struct drm_device *dev , void *data , struct drm_file *file_priv ) ;
int i915_gem_mmap_ioctl(struct drm_device *dev , void *data , struct drm_file *file_priv ) ;
int i915_gem_set_domain_ioctl(struct drm_device *dev , void *data , struct drm_file *file_priv ) ;
int i915_gem_sw_finish_ioctl(struct drm_device *dev , void *data , struct drm_file *file_priv ) ;
int i915_gem_execbuffer(struct drm_device *dev , void *data , struct drm_file *file_priv ) ;
int i915_gem_pin_ioctl(struct drm_device *dev , void *data , struct drm_file *file_priv ) ;
int i915_gem_unpin_ioctl(struct drm_device *dev , void *data , struct drm_file *file_priv ) ;
int i915_gem_busy_ioctl(struct drm_device *dev , void *data , struct drm_file *file_priv ) ;
int i915_gem_throttle_ioctl(struct drm_device *dev , void *data , struct drm_file *file_priv ) ;
int i915_gem_entervt_ioctl(struct drm_device *dev , void *data , struct drm_file *file_priv ) ;
int i915_gem_leavevt_ioctl(struct drm_device *dev , void *data , struct drm_file *file_priv ) ;
int i915_gem_set_tiling(struct drm_device *dev , void *data , struct drm_file *file_priv ) ;
int i915_gem_get_tiling(struct drm_device *dev , void *data , struct drm_file *file_priv ) ;
void i915_gem_load(struct drm_device *dev ) ;
void i915_gem_lastclose(struct drm_device *dev ) ;
int i915_wait_ring(struct drm_device *dev , int n , char const *caller ) ;
int i915_wait_ring(struct drm_device *dev , int n , char const *caller )
{
drm_i915_private_t *dev_priv ;
drm_i915_ring_buffer_t *ring ;
u32 acthd_reg ;
u32 last_acthd ;
unsigned int tmp ;
u32 acthd ;
u32 last_head ;
unsigned int tmp___0 ;
int i ;
unsigned int tmp___1 ;
{
dev_priv = dev->dev_private;
ring = & dev_priv->ring;
acthd_reg = ((((((((dev->pci_device == 10610 || dev->pci_device == 10626) || dev->pci_device == 10642) || dev->pci_device == 10658) || dev->pci_device == 10754) || dev->pci_device == 10770) || dev->pci_device == 10818) || dev->pci_device == 11778) || dev->pci_device == 11794) || dev->pci_device == 11810 ? 8308 : 8392;
tmp = readl(dev_priv->regs + acthd_reg);
last_acthd = tmp;
tmp___0 = readl(dev_priv->regs + 8244);
last_head = tmp___0 & 2097148U;
i = 0;
while (1) {
if (i < 100000) {
} else {
break;
}
tmp___1 = readl(dev_priv->regs + 8244);
ring->head = tmp___1 & 2097148U;
acthd = readl(dev_priv->regs + acthd_reg);
ring->space = ring->head - (ring->tail + 8);
if (ring->space < 0) {
ring->space = (unsigned long )ring->space + ring->Size;
} else {
}
if (ring->space >= n) {
return (0);
} else {
}
if (dev_priv->sarea_priv) {
(dev_priv->sarea_priv)->perf_boxes = (dev_priv->sarea_priv)->perf_boxes | 4;
} else {
}
if ((u32 )ring->head != last_head) {
i = 0;
} else {
}
if (acthd != last_acthd) {
i = 0;
} else {
}
last_head = ring->head;
last_acthd = acthd;
msleep_interruptible(10);
i = i + 1;
}
return (-16);
}
}
static int i915_init_phys_hws(struct drm_device *dev )
{
drm_i915_private_t *dev_priv ;
{
dev_priv = dev->dev_private;
dev_priv->status_page_dmah = drm_pci_alloc(dev, 1UL << 12, 1UL << 12, 4294967295U);
if (! dev_priv->status_page_dmah) {
printk("<3>[drm:%s] *ERROR* Can not allocate hardware status page\n", "i915_init_phys_hws");
return (-12);
} else {
}
dev_priv->hw_status_page = (dev_priv->status_page_dmah)->vaddr;
dev_priv->dma_status_page = (dev_priv->status_page_dmah)->busaddr;
memset(dev_priv->hw_status_page, 0, 1UL << 12);
writel(dev_priv->dma_status_page, dev_priv->regs + 8320);
while (1) {
if (drm_debug) {
printk("<7>[drm:%s] Enabled hardware status page\n", "i915_init_phys_hws");
} else {
}
break;
}
return (0);
}
}
static void i915_free_hws(struct drm_device *dev )
{
drm_i915_private_t *dev_priv ;
{
dev_priv = dev->dev_private;
if (dev_priv->status_page_dmah) {
drm_pci_free(dev, dev_priv->status_page_dmah);
dev_priv->status_page_dmah = (void *)0;
} else {
}
if (dev_priv->status_gfx_addr) {
dev_priv->status_gfx_addr = 0;
drm_core_ioremapfree(& dev_priv->hws_map, dev);
} else {
}
writel(536866816, dev_priv->regs + 8320);
return;
}
}
void i915_kernel_lost_context(struct drm_device *dev )
{
drm_i915_private_t *dev_priv ;
drm_i915_ring_buffer_t *ring ;
unsigned int tmp ;
unsigned int tmp___0 ;
{
dev_priv = dev->dev_private;
ring = & dev_priv->ring;
tmp = readl(dev_priv->regs + 8244);
ring->head = tmp & 2097148U;
tmp___0 = readl(dev_priv->regs + 8240);
ring->tail = tmp___0 & 2097144U;
ring->space = ring->head - (ring->tail + 8);
if (ring->space < 0) {
ring->space = (unsigned long )ring->space + ring->Size;
} else {
}
if (ring->head == ring->tail && dev_priv->sarea_priv) {
(dev_priv->sarea_priv)->perf_boxes = (dev_priv->sarea_priv)->perf_boxes | 1;
} else {
}
return;
}
}
static int i915_dma_cleanup(struct drm_device *dev )
{
drm_i915_private_t *dev_priv ;
{
dev_priv = dev->dev_private;
if (dev->irq_enabled) {
drm_irq_uninstall(dev);
} else {
}
if (dev_priv->ring.virtual_start) {
drm_core_ioremapfree(& dev_priv->ring.map, dev);
dev_priv->ring.virtual_start = (void *)0;
dev_priv->ring.map.handle = (void *)0;
dev_priv->ring.map.size = 0;
} else {
}
if ((((dev->pci_device == 10690 || dev->pci_device == 10674) || dev->pci_device == 10706) || dev->pci_device == 10818) || ((dev->pci_device == 11778 || dev->pci_device == 11794) || dev->pci_device == 11810)) {
i915_free_hws(dev);
} else {
}
return (0);
}
}
static int i915_initialize(struct drm_device *dev , drm_i915_init_t *init )
{
drm_i915_private_t *dev_priv ;
{
dev_priv = dev->dev_private;
dev_priv->sarea = drm_getsarea(dev);
if (! dev_priv->sarea) {
printk("<3>[drm:%s] *ERROR* can not find sarea!\n", "i915_initialize");
i915_dma_cleanup(dev);
return (-22);
} else {
}
dev_priv->sarea_priv = (drm_i915_sarea_t *)((u8 *)(dev_priv->sarea)->handle + init->sarea_priv_offset);
if (init->ring_size != 0U) {
if ((unsigned long )dev_priv->ring.ring_obj != (unsigned long )((void *)0)) {
i915_dma_cleanup(dev);
printk("<3>[drm:%s] *ERROR* Client tried to initialize ringbuffer in GEM mode\n",
"i915_initialize");
return (-22);
} else {
}
dev_priv->ring.Size = init->ring_size;
dev_priv->ring.tail_mask = dev_priv->ring.Size - 1UL;
dev_priv->ring.map.offset = init->ring_start;
dev_priv->ring.map.size = init->ring_size;
dev_priv->ring.map.type = 0;
dev_priv->ring.map.flags = 0;
dev_priv->ring.map.mtrr = 0;
drm_core_ioremap(& dev_priv->ring.map, dev);
if ((unsigned long )dev_priv->ring.map.handle == (unsigned long )((void *)0)) {
i915_dma_cleanup(dev);
printk("<3>[drm:%s] *ERROR* can not ioremap virtual address for ring buffer\n",
"i915_initialize");
return (-12);
} else {
}
} else {
}
dev_priv->ring.virtual_start = dev_priv->ring.map.handle;
dev_priv->cpp = init->cpp;
dev_priv->back_offset = init->back_offset;
dev_priv->front_offset = init->front_offset;
dev_priv->current_page = 0;
(dev_priv->sarea_priv)->pf_current_page = dev_priv->current_page;
dev_priv->allow_batchbuffer = 1;
return (0);
}
}
static int i915_dma_resume(struct drm_device *dev )
{
drm_i915_private_t *dev_priv ;
{
dev_priv = (drm_i915_private_t *)dev->dev_private;
while (1) {
if (drm_debug) {
printk("<7>[drm:%s] %s\n", "i915_dma_resume", "i915_dma_resume");
} else {
}
break;
}
if (! dev_priv->sarea) {
printk("<3>[drm:%s] *ERROR* can not find sarea!\n", "i915_dma_resume");
return (-22);
} else {
}
if ((unsigned long )dev_priv->ring.map.handle == (unsigned long )((void *)0)) {
printk("<3>[drm:%s] *ERROR* can not ioremap virtual address for ring buffer\n",
"i915_dma_resume");
return (-12);
} else {
}
if (! dev_priv->hw_status_page) {
printk("<3>[drm:%s] *ERROR* Can not find hardware status page\n", "i915_dma_resume");
return (-22);
} else {
}
while (1) {
if (drm_debug) {
printk("<7>[drm:%s] hw status page @ %p\n", "i915_dma_resume", dev_priv->hw_status_page);
} else {
}
break;
}
if (dev_priv->status_gfx_addr != 0U) {
writel(dev_priv->status_gfx_addr, dev_priv->regs + 8320);
} else {
writel(dev_priv->dma_status_page, dev_priv->regs + 8320);
}
while (1) {
if (drm_debug) {
printk("<7>[drm:%s] Enabled hardware status page\n", "i915_dma_resume");
} else {
}
break;
}
return (0);
}
}
static int i915_dma_init(struct drm_device *dev , void *data , struct drm_file *file_priv )
{
drm_i915_init_t *init ;
int retcode ;
{
init = data;
retcode = 0;
switch ((unsigned int )init->func) {
case (unsigned int )I915_INIT_DMA:
retcode = i915_initialize(dev, init);
break;
case (unsigned int )I915_CLEANUP_DMA:
retcode = i915_dma_cleanup(dev);
break;
case (unsigned int )I915_RESUME_DMA:
retcode = i915_dma_resume(dev);
break;
default:
retcode = -22;
break;
}
return (retcode);
}
}
static int do_validate_cmd(int cmd )
{
{
switch ((cmd >> 29) & 7) {
case 0:
switch ((cmd >> 23) & 63) {
case 0:
return (1);
case 4:
return (1);
default:
return (0);
}
break;
case 1:
return (0);
case 2:
return ((cmd & 255) + 2);
case 3:
if (((cmd >> 24) & 31) <= 24) {
return (1);
} else {
}
switch ((cmd >> 24) & 31) {
case 28:
return (1);
case 29:
switch ((cmd >> 16) & 255) {
case 3:
return ((cmd & 31) + 2);
case 4:
return ((cmd & 15) + 2);
default:
return ((cmd & 65535) + 2);
}
case 30:
if (cmd & (1 << 23)) {
return ((cmd & 65535) + 1);
} else {
return (1);
}
case 31:
if ((cmd & (1 << 23)) == 0) {
return ((cmd & 131071) + 2);
} else
if (cmd & (1 << 17)) {
if ((cmd & 65535) == 0) {
return (0);
} else {
return (((cmd & 65535) + 1) / 2 + 1);
}
} else {
return (2);
}
default:
return (0);
}
default:
return (0);
}
return (0);
}
}
static int validate_cmd(int cmd )
{
int ret ;
int tmp ;
{
tmp = do_validate_cmd(cmd);
ret = tmp;
return (ret);
}
}
static int i915_emit_cmds(struct drm_device *dev , int *buffer , int dwords )
{
drm_i915_private_t *dev_priv ;
int i ;
unsigned int outring ;
unsigned int ringmask ;
unsigned int outcount ;
char volatile *virt ;
int cmd ;
int sz ;
int tmp ;
int tmp___0 ;
{
dev_priv = dev->dev_private;
if ((unsigned long )(dwords + 1) * sizeof(int ) >= dev_priv->ring.Size - 8UL) {
return (-22);
} else {
}
while (1) {
if (dev_priv->ring.space < ((dwords + 1) & ~ 1) * 4) {
i915_wait_ring(dev, ((dwords + 1) & ~ 1) * 4, "i915_emit_cmds");
} else {
}
outcount = 0;
outring = dev_priv->ring.tail;
ringmask = dev_priv->ring.tail_mask;
virt = dev_priv->ring.virtual_start;
break;
}
i = 0;
while (1) {
if (i < dwords) {
} else {
break;
}
tmp = __copy_from_user(& cmd, buffer + i, sizeof(cmd));
if (tmp) {
return (-22);
} else {
}
sz = validate_cmd(cmd);
if (sz == 0 || i + sz > dwords) {
return (-22);
} else {
}
while (1) {
*((unsigned int volatile *)(virt + outring)) = cmd;
outcount = outcount + 1U;
outring = outring + 4U;
outring = outring & ringmask;
break;
}
while (1) {
i = i + 1;
sz = sz - 1;
if (sz) {
} else {
break;
}
tmp___0 = __copy_from_user(& cmd, buffer + i, sizeof(cmd));
if (tmp___0) {
return (-22);
} else {
}
while (1) {
*((unsigned int volatile *)(virt + outring)) = cmd;
outcount = outcount + 1U;
outring = outring + 4U;
outring = outring & ringmask;
break;
}
}
}
if (dwords & 1) {
while (1) {
*((unsigned int volatile *)(virt + outring)) = 0;
outcount = outcount + 1U;
outring = outring + 4U;
outring = outring & ringmask;
break;
}
} else {
}
while (1) {
dev_priv->ring.tail = outring;
dev_priv->ring.space = (unsigned int )dev_priv->ring.space - outcount * 4U;
writel(outring, dev_priv->regs + 8240);
break;
}
return (0);
}
}
int i915_emit_box(struct drm_device *dev , struct drm_clip_rect *boxes , int i , int DR1 ,
int DR4 )
{
drm_i915_private_t *dev_priv ;
struct drm_clip_rect box ;
unsigned int outring ;
unsigned int ringmask ;
unsigned int outcount ;
char volatile *virt ;
int tmp ;
{
dev_priv = dev->dev_private;
tmp = __copy_from_user(& box, boxes + i, sizeof(box));
if (tmp) {
return (-14);
} else {
}
if ((((int )box.y2 <= (int )box.y1 || (int )box.x2 <= (int )box.x1) || (int )box.y2 <= 0) || (int )box.x2 <= 0) {
printk("<3>[drm:%s] *ERROR* Bad box %d,%d..%d,%d\n", "i915_emit_box", box.x1,
box.y1, box.x2, box.y2);
return (-22);
} else {
}
if (((((((((dev->pci_device == 10610 || dev->pci_device == 10626) || dev->pci_device == 10642) || dev->pci_device == 10658) || dev->pci_device == 10754) || dev->pci_device == 10770) || dev->pci_device == 10818) || dev->pci_device == 11778) || dev->pci_device == 11794) || dev->pci_device == 11810) {
while (1) {
if (dev_priv->ring.space < 4 * 4) {
i915_wait_ring(dev, 4 * 4, "i915_emit_box");
} else {
}
outcount = 0;
outring = dev_priv->ring.tail;
ringmask = dev_priv->ring.tail_mask;
virt = dev_priv->ring.virtual_start;
break;
}
while (1) {
*((unsigned int volatile *)(virt + outring)) = (30976 << 16) | 2;
outcount = outcount + 1U;
outring = outring + 4U;
outring = outring & ringmask;
break;
}
while (1) {
*((unsigned int volatile *)(virt + outring)) = ((int )box.x1 & 65535) | ((int )box.y1 << 16);
outcount = outcount + 1U;
outring = outring + 4U;
outring = outring & ringmask;
break;
}
while (1) {
*((unsigned int volatile *)(virt + outring)) = (((int )box.x2 - 1) & 65535) | (((int )box.y2 - 1) << 16);
outcount = outcount + 1U;
outring = outring + 4U;
outring = outring & ringmask;
break;
}
while (1) {
*((unsigned int volatile *)(virt + outring)) = DR4;
outcount = outcount + 1U;
outring = outring + 4U;
outring = outring & ringmask;
break;
}
while (1) {
dev_priv->ring.tail = outring;
dev_priv->ring.space = (unsigned int )dev_priv->ring.space - outcount * 4U;
writel(outring, dev_priv->regs + 8240);
break;
}
} else {
while (1) {
if (dev_priv->ring.space < 6 * 4) {
i915_wait_ring(dev, 6 * 4, "i915_emit_box");
} else {
}
outcount = 0;
outring = dev_priv->ring.tail;
ringmask = dev_priv->ring.tail_mask;
virt = dev_priv->ring.virtual_start;
break;
}
while (1) {
*((unsigned int volatile *)(virt + outring)) = (((3 << 29) | (29 << 24)) | (128 << 16)) | 3;
outcount = outcount + 1U;
outring = outring + 4U;
outring = outring & ringmask;
break;
}
while (1) {
*((unsigned int volatile *)(virt + outring)) = DR1;
outcount = outcount + 1U;
outring = outring + 4U;
outring = outring & ringmask;
break;
}
while (1) {
*((unsigned int volatile *)(virt + outring)) = ((int )box.x1 & 65535) | ((int )box.y1 << 16);
outcount = outcount + 1U;
outring = outring + 4U;
outring = outring & ringmask;
break;
}
while (1) {
*((unsigned int volatile *)(virt + outring)) = (((int )box.x2 - 1) & 65535) | (((int )box.y2 - 1) << 16);
outcount = outcount + 1U;
outring = outring + 4U;
outring = outring & ringmask;
break;
}
while (1) {
*((unsigned int volatile *)(virt + outring)) = DR4;
outcount = outcount + 1U;
outring = outring + 4U;
outring = outring & ringmask;
break;
}
while (1) {
*((unsigned int volatile *)(virt + outring)) = 0;
outcount = outcount + 1U;
outring = outring + 4U;
outring = outring & ringmask;
break;
}
while (1) {
dev_priv->ring.tail = outring;
dev_priv->ring.space = (unsigned int )dev_priv->ring.space - outcount * 4U;
writel(outring, dev_priv->regs + 8240);
break;
}
}
return (0);
}
}
static void i915_emit_breadcrumb(struct drm_device *dev )
{
drm_i915_private_t *dev_priv ;
unsigned int outring ;
unsigned int ringmask ;
unsigned int outcount ;
char volatile *virt ;
{
dev_priv = dev->dev_private;
dev_priv->counter = dev_priv->counter + (uint32_t )1;
if ((unsigned long )dev_priv->counter > 2147483647UL) {
dev_priv->counter = 0;
} else {
}
if (dev_priv->sarea_priv) {
(dev_priv->sarea_priv)->last_enqueue = dev_priv->counter;
} else {
}
while (1) {
if (dev_priv->ring.space < 4 * 4) {
i915_wait_ring(dev, 4 * 4, "i915_emit_breadcrumb");
} else {
}
outcount = 0;
outring = dev_priv->ring.tail;
ringmask = dev_priv->ring.tail_mask;
virt = dev_priv->ring.virtual_start;
break;
}
while (1) {
*((unsigned int volatile *)(virt + outring)) = (33 << 23) | 1;
outcount = outcount + 1U;
outring = outring + 4U;
outring = outring & ringmask;
break;
}
while (1) {
*((unsigned int volatile *)(virt + outring)) = 5 << 2;
outcount = outcount + 1U;
outring = outring + 4U;
outring = outring & ringmask;
break;
}
while (1) {
*((unsigned int volatile *)(virt + outring)) = dev_priv->counter;
outcount = outcount + 1U;
outring = outring + 4U;
outring = outring & ringmask;
break;
}
while (1) {
*((unsigned int volatile *)(virt + outring)) = 0;
outcount = outcount + 1U;
outring = outring + 4U;
outring = outring & ringmask;
break;
}
while (1) {
dev_priv->ring.tail = outring;
dev_priv->ring.space = (unsigned int )dev_priv->ring.space - outcount * 4U;
writel(outring, dev_priv->regs + 8240);
break;
}
return;
}
}
static int i915_dispatch_cmdbuffer(struct drm_device *dev , drm_i915_cmdbuffer_t *cmd )
{
int nbox ;
int i ;
int count ;
int ret ;
{
nbox = cmd->num_cliprects;
i = 0;
if (cmd->sz & 3) {
printk("<3>[drm:%s] *ERROR* alignment", "i915_dispatch_cmdbuffer");
return (-22);
} else {
}
i915_kernel_lost_context(dev);
count = nbox ? nbox : 1;
i = 0;
while (1) {
if (i < count) {
} else {
break;
}
if (i < nbox) {
ret = i915_emit_box(dev, cmd->cliprects, i, cmd->DR1, cmd->DR4);
if (ret) {
return (ret);
} else {
}
} else {
}
ret = i915_emit_cmds(dev, (int *)cmd->buf, cmd->sz / 4);
if (ret) {
return (ret);
} else {
}
i = i + 1;
}
i915_emit_breadcrumb(dev);
return (0);
}
}
static int i915_dispatch_batchbuffer(struct drm_device *dev , drm_i915_batchbuffer_t *batch )
{
drm_i915_private_t *dev_priv ;
struct drm_clip_rect *boxes ;
int nbox ;
int i ;
int count ;
unsigned int outring ;
unsigned int ringmask ;
unsigned int outcount ;
char volatile *virt ;
int ret ;
int tmp ;
{
dev_priv = dev->dev_private;
boxes = batch->cliprects;
nbox = batch->num_cliprects;
i = 0;
if ((batch->start | batch->used) & 7) {
printk("<3>[drm:%s] *ERROR* alignment", "i915_dispatch_batchbuffer");
return (-22);
} else {
}
i915_kernel_lost_context(dev);
count = nbox ? nbox : 1;
i = 0;
while (1) {
if (i < count) {
} else {
break;
}
if (i < nbox) {
tmp = i915_emit_box(dev, boxes, i, batch->DR1, batch->DR4);
ret = tmp;
if (ret) {
return (ret);
} else {
}
} else {
}
if (! (dev->pci_device == 13687) && ! (dev->pci_device == 9570)) {
while (1) {
if (dev_priv->ring.space < 2 * 4) {
i915_wait_ring(dev, 2 * 4, "i915_dispatch_batchbuffer");
} else {
}
outcount = 0;
outring = dev_priv->ring.tail;
ringmask = dev_priv->ring.tail_mask;
virt = dev_priv->ring.virtual_start;
break;
}
if (((((((((dev->pci_device == 10610 || dev->pci_device == 10626) || dev->pci_device == 10642) || dev->pci_device == 10658) || dev->pci_device == 10754) || dev->pci_device == 10770) || dev->pci_device == 10818) || dev->pci_device == 11778) || dev->pci_device == 11794) || dev->pci_device == 11810) {
while (1) {
*((unsigned int volatile *)(virt + outring)) = (((49 << 23) | 0) | (2 << 6)) | (1 << 8);
outcount = outcount + 1U;
outring = outring + 4U;
outring = outring & ringmask;
break;
}
while (1) {
*((unsigned int volatile *)(virt + outring)) = batch->start;
outcount = outcount + 1U;
outring = outring + 4U;
outring = outring & ringmask;
break;
}
} else {
while (1) {
*((unsigned int volatile *)(virt + outring)) = ((49 << 23) | 0) | (2 << 6);
outcount = outcount + 1U;
outring = outring + 4U;
outring = outring & ringmask;
break;
}
while (1) {
*((unsigned int volatile *)(virt + outring)) = batch->start | 1;
outcount = outcount + 1U;
outring = outring + 4U;
outring = outring & ringmask;
break;
}
}
while (1) {
dev_priv->ring.tail = outring;
dev_priv->ring.space = (unsigned int )dev_priv->ring.space - outcount * 4U;
writel(outring, dev_priv->regs + 8240);
break;
}
} else {
while (1) {
if (dev_priv->ring.space < 4 * 4) {
i915_wait_ring(dev, 4 * 4, "i915_dispatch_batchbuffer");
} else {
}
outcount = 0;
outring = dev_priv->ring.tail;
ringmask = dev_priv->ring.tail_mask;
virt = dev_priv->ring.virtual_start;
break;
}
while (1) {
*((unsigned int volatile *)(virt + outring)) = (48 << 23) | 1;
outcount = outcount + 1U;
outring = outring + 4U;
outring = outring & ringmask;
break;
}
while (1) {
*((unsigned int volatile *)(virt + outring)) = batch->start | 1;
outcount = outcount + 1U;
outring = outring + 4U;
outring = outring & ringmask;
break;
}
while (1) {
*((unsigned int volatile *)(virt + outring)) = (batch->start + batch->used) - 4;
outcount = outcount + 1U;
outring = outring + 4U;
outring = outring & ringmask;
break;
}
while (1) {
*((unsigned int volatile *)(virt + outring)) = 0;
outcount = outcount + 1U;
outring = outring + 4U;
outring = outring & ringmask;
break;
}
while (1) {
dev_priv->ring.tail = outring;
dev_priv->ring.space = (unsigned int )dev_priv->ring.space - outcount * 4U;
writel(outring, dev_priv->regs + 8240);
break;
}
}
i = i + 1;
}
i915_emit_breadcrumb(dev);
return (0);
}
}
static int i915_dispatch_flip(struct drm_device *dev )
{
drm_i915_private_t *dev_priv ;
unsigned int outring ;
unsigned int ringmask ;
unsigned int outcount ;
char volatile *virt ;
uint32_t tmp ;
{
dev_priv = dev->dev_private;
if (! dev_priv->sarea_priv) {
return (-22);
} else {
}
while (1) {
if (drm_debug) {
printk("<7>[drm:%s] %s: page=%d pfCurrentPage=%d\n", "i915_dispatch_flip", "i915_dispatch_flip",
dev_priv->current_page, (dev_priv->sarea_priv)->pf_current_page);
} else {
}
break;
}
i915_kernel_lost_context(dev);
while (1) {
if (dev_priv->ring.space < 2 * 4) {
i915_wait_ring(dev, 2 * 4, "i915_dispatch_flip");
} else {
}
outcount = 0;
outring = dev_priv->ring.tail;
ringmask = dev_priv->ring.tail_mask;
virt = dev_priv->ring.virtual_start;
break;
}
while (1) {
*((unsigned int volatile *)(virt + outring)) = ((4 << 23) | 0) | (1 << 0);
outcount = outcount + 1U;
outring = outring + 4U;
outring = outring & ringmask;
break;
}
while (1) {
*((unsigned int volatile *)(virt + outring)) = 0;
outcount = outcount + 1U;
outring = outring + 4U;
outring = outring & ringmask;
break;
}
while (1) {
dev_priv->ring.tail = outring;
dev_priv->ring.space = (unsigned int )dev_priv->ring.space - outcount * 4U;
writel(outring, dev_priv->regs + 8240);
break;
}
while (1) {
if (dev_priv->ring.space < 6 * 4) {
i915_wait_ring(dev, 6 * 4, "i915_dispatch_flip");
} else {
}
outcount = 0;
outring = dev_priv->ring.tail;
ringmask = dev_priv->ring.tail_mask;
virt = dev_priv->ring.virtual_start;
break;
}
while (1) {
*((unsigned int volatile *)(virt + outring)) = (((0 << 29) | (20 << 23)) | 2) | (1 << 22);
outcount = outcount + 1U;
outring = outring + 4U;
outring = outring & ringmask;
break;
}
while (1) {
*((unsigned int volatile *)(virt + outring)) = 0;
outcount = outcount + 1U;
outring = outring + 4U;
outring = outring & ringmask;
break;
}
if (dev_priv->current_page == 0) {
while (1) {
*((unsigned int volatile *)(virt + outring)) = dev_priv->back_offset;
outcount = outcount + 1U;
outring = outring + 4U;
outring = outring & ringmask;
break;
}
dev_priv->current_page = 1;
} else {
while (1) {
*((unsigned int volatile *)(virt + outring)) = dev_priv->front_offset;
outcount = outcount + 1U;
outring = outring + 4U;
outring = outring & ringmask;
break;
}
dev_priv->current_page = 0;
}
while (1) {
*((unsigned int volatile *)(virt + outring)) = 0;
outcount = outcount + 1U;
outring = outring + 4U;
outring = outring & ringmask;
break;
}
while (1) {
dev_priv->ring.tail = outring;
dev_priv->ring.space = (unsigned int )dev_priv->ring.space - outcount * 4U;
writel(outring, dev_priv->regs + 8240);
break;
}
while (1) {
if (dev_priv->ring.space < 2 * 4) {
i915_wait_ring(dev, 2 * 4, "i915_dispatch_flip");
} else {
}
outcount = 0;
outring = dev_priv->ring.tail;
ringmask = dev_priv->ring.tail_mask;
virt = dev_priv->ring.virtual_start;
break;
}
while (1) {
*((unsigned int volatile *)(virt + outring)) = ((3 << 23) | 0) | (1 << 2);
outcount = outcount + 1U;
outring = outring + 4U;
outring = outring & ringmask;
break;
}
while (1) {
*((unsigned int volatile *)(virt + outring)) = 0;
outcount = outcount + 1U;
outring = outring + 4U;
outring = outring & ringmask;
break;
}
while (1) {
dev_priv->ring.tail = outring;
dev_priv->ring.space = (unsigned int )dev_priv->ring.space - outcount * 4U;
writel(outring, dev_priv->regs + 8240);
break;
}
tmp = dev_priv->counter;
dev_priv->counter = dev_priv->counter + (uint32_t )1;
(dev_priv->sarea_priv)->last_enqueue = tmp;
while (1) {
if (dev_priv->ring.space < 4 * 4) {
i915_wait_ring(dev, 4 * 4, "i915_dispatch_flip");
} else {
}
outcount = 0;
outring = dev_priv->ring.tail;
ringmask = dev_priv->ring.tail_mask;
virt = dev_priv->ring.virtual_start;
break;
}
while (1) {
*((unsigned int volatile *)(virt + outring)) = (33 << 23) | 1;
outcount = outcount + 1U;
outring = outring + 4U;
outring = outring & ringmask;
break;
}
while (1) {
*((unsigned int volatile *)(virt + outring)) = 5 << 2;
outcount = outcount + 1U;
outring = outring + 4U;
outring = outring & ringmask;
break;
}
while (1) {
*((unsigned int volatile *)(virt + outring)) = dev_priv->counter;
outcount = outcount + 1U;
outring = outring + 4U;
outring = outring & ringmask;
break;
}
while (1) {
*((unsigned int volatile *)(virt + outring)) = 0;
outcount = outcount + 1U;
outring = outring + 4U;
outring = outring & ringmask;
break;
}
while (1) {
dev_priv->ring.tail = outring;
dev_priv->ring.space = (unsigned int )dev_priv->ring.space - outcount * 4U;
writel(outring, dev_priv->regs + 8240);
break;
}
(dev_priv->sarea_priv)->pf_current_page = dev_priv->current_page;
return (0);
}
}
static int i915_quiescent(struct drm_device *dev )
{
drm_i915_private_t *dev_priv ;
int tmp ;
{
dev_priv = dev->dev_private;
i915_kernel_lost_context(dev);
tmp = i915_wait_ring(dev, dev_priv->ring.Size - 8UL, "i915_quiescent");
return (tmp);
}
}
static int i915_flush_ioctl(struct drm_device *dev , void *data , struct drm_file *file_priv )
{
int ret ;
{
while (1) {
if ((unsigned long )((drm_i915_private_t *)dev->dev_private)->ring.ring_obj == (unsigned long )((void *)0)) {
while (1) {
if (! ((dev->lock.hw_lock)->lock & (unsigned int volatile )2147483648U) || (unsigned long )dev->lock.file_priv != (unsigned long )file_priv) {
printk("<3>[drm:%s] *ERROR* %s called without lock held, held %d owner %p %p\n",
"i915_flush_ioctl", "i915_flush_ioctl", (dev->lock.hw_lock)->lock & (unsigned int volatile )2147483648U,
dev->lock.file_priv, file_priv);
return (-22);
} else {
}
break;
}
} else {
}
break;
}
mutex_lock(& dev->struct_mutex);
ret = i915_quiescent(dev);
mutex_unlock(& dev->struct_mutex);
return (ret);
}
}
static int i915_batchbuffer(struct drm_device *dev , void *data , struct drm_file *file_priv )
{
drm_i915_private_t *dev_priv ;
u32 *hw_status ;
drm_i915_sarea_t *sarea_priv ;
drm_i915_batchbuffer_t *batch ;
int ret ;
unsigned long flag ;
unsigned long roksum ;
struct thread_info *tmp ;
int tmp___0 ;
long tmp___1 ;
{
dev_priv = (drm_i915_private_t *)dev->dev_private;
hw_status = dev_priv->hw_status_page;
sarea_priv = dev_priv->sarea_priv;
batch = data;
if (! dev_priv->allow_batchbuffer) {
printk("<3>[drm:%s] *ERROR* Batchbuffer ioctl disabled\n", "i915_batchbuffer");
return (-22);
} else {
}
while (1) {
if (drm_debug) {
printk("<7>[drm:%s] i915 batchbuffer, start %x used %d cliprects %d\n", "i915_batchbuffer",
batch->start, batch->used, batch->num_cliprects);
} else {
}
break;
}
while (1) {
if ((unsigned long )((drm_i915_private_t *)dev->dev_private)->ring.ring_obj == (unsigned long )((void *)0)) {
while (1) {
if (! ((dev->lock.hw_lock)->lock & (unsigned int volatile )2147483648U) || (unsigned long )dev->lock.file_priv != (unsigned long )file_priv) {
printk("<3>[drm:%s] *ERROR* %s called without lock held, held %d owner %p %p\n",
"i915_batchbuffer", "i915_batchbuffer", (dev->lock.hw_lock)->lock & (unsigned int volatile )2147483648U,
dev->lock.file_priv, file_priv);
return (-22);
} else {
}
break;
}
} else {
}
break;
}
if (batch->num_cliprects) {
tmp = current_thread_info();
__asm__ ("add %3,%1 ; sbb %0,%0 ; cmp %1,%4 ; sbb $0,%0": "=&r" (flag), "=r" (roksum): "1" (batch->cliprects),
"g" ((long )((unsigned long )batch->num_cliprects * sizeof(struct drm_clip_rect ))),
"rm" (tmp->addr_limit.seg));
if (flag == 0UL) {
tmp___0 = 1;
} else {
tmp___0 = 0;
}
tmp___1 = ldv__builtin_expect(tmp___0, 1);
if (tmp___1 ? 0 : -14) {
return (-14);
} else {
}
} else {
}
mutex_lock(& dev->struct_mutex);
ret = i915_dispatch_batchbuffer(dev, batch);
mutex_unlock(& dev->struct_mutex);
if (sarea_priv) {
sarea_priv->last_dispatch = (int )*(hw_status + 5);
} else {
}
return (ret);
}
}
static int i915_cmdbuffer(struct drm_device *dev , void *data , struct drm_file *file_priv )
{
drm_i915_private_t *dev_priv ;
u32 *hw_status ;
drm_i915_sarea_t *sarea_priv ;
drm_i915_cmdbuffer_t *cmdbuf ;
int ret ;
unsigned long flag ;
unsigned long roksum ;
struct thread_info *tmp ;
int tmp___0 ;
long tmp___1 ;
{
dev_priv = (drm_i915_private_t *)dev->dev_private;
hw_status = dev_priv->hw_status_page;
sarea_priv = dev_priv->sarea_priv;
cmdbuf = data;
while (1) {
if (drm_debug) {
printk("<7>[drm:%s] i915 cmdbuffer, buf %p sz %d cliprects %d\n", "i915_cmdbuffer",
cmdbuf->buf, cmdbuf->sz, cmdbuf->num_cliprects);
} else {
}
break;
}
while (1) {
if ((unsigned long )((drm_i915_private_t *)dev->dev_private)->ring.ring_obj == (unsigned long )((void *)0)) {
while (1) {
if (! ((dev->lock.hw_lock)->lock & (unsigned int volatile )2147483648U) || (unsigned long )dev->lock.file_priv != (unsigned long )file_priv) {
printk("<3>[drm:%s] *ERROR* %s called without lock held, held %d owner %p %p\n",
"i915_cmdbuffer", "i915_cmdbuffer", (dev->lock.hw_lock)->lock & (unsigned int volatile )2147483648U,
dev->lock.file_priv, file_priv);
return (-22);
} else {
}
break;
}
} else {
}
break;
}
if (cmdbuf->num_cliprects) {
tmp = current_thread_info();
__asm__ ("add %3,%1 ; sbb %0,%0 ; cmp %1,%4 ; sbb $0,%0": "=&r" (flag), "=r" (roksum): "1" (cmdbuf->cliprects),
"g" ((long )((unsigned long )cmdbuf->num_cliprects * sizeof(struct drm_clip_rect ))),
"rm" (tmp->addr_limit.seg));
if (flag == 0UL) {
tmp___0 = 1;
} else {
tmp___0 = 0;
}
tmp___1 = ldv__builtin_expect(tmp___0, 1);
if (tmp___1 ? 0 : -14) {
printk("<3>[drm:%s] *ERROR* Fault accessing cliprects\n", "i915_cmdbuffer");
return (-14);
} else {
}
} else {
}
mutex_lock(& dev->struct_mutex);
ret = i915_dispatch_cmdbuffer(dev, cmdbuf);
mutex_unlock(& dev->struct_mutex);
if (ret) {
printk("<3>[drm:%s] *ERROR* i915_dispatch_cmdbuffer failed\n", "i915_cmdbuffer");
return (ret);
} else {
}
if (sarea_priv) {
sarea_priv->last_dispatch = (int )*(hw_status + 5);
} else {
}
return (0);
}
}
static int i915_flip_bufs(struct drm_device *dev , void *data , struct drm_file *file_priv )
{
int ret ;
{
while (1) {
if (drm_debug) {
printk("<7>[drm:%s] %s\n", "i915_flip_bufs", "i915_flip_bufs");
} else {
}
break;
}
while (1) {
if ((unsigned long )((drm_i915_private_t *)dev->dev_private)->ring.ring_obj == (unsigned long )((void *)0)) {
while (1) {
if (! ((dev->lock.hw_lock)->lock & (unsigned int volatile )2147483648U) || (unsigned long )dev->lock.file_priv != (unsigned long )file_priv) {
printk("<3>[drm:%s] *ERROR* %s called without lock held, held %d owner %p %p\n",
"i915_flip_bufs", "i915_flip_bufs", (dev->lock.hw_lock)->lock & (unsigned int volatile )2147483648U,
dev->lock.file_priv, file_priv);
return (-22);
} else {
}
break;
}
} else {
}
break;
}
mutex_lock(& dev->struct_mutex);
ret = i915_dispatch_flip(dev);
mutex_unlock(& dev->struct_mutex);
return (ret);
}
}
static int i915_getparam(struct drm_device *dev , void *data , struct drm_file *file_priv )
{
drm_i915_private_t *dev_priv ;
drm_i915_getparam_t *param ;
int value ;
unsigned long tmp ;
{
dev_priv = dev->dev_private;
param = data;
if (! dev_priv) {
printk("<3>[drm:%s] *ERROR* called with no initialization\n", "i915_getparam");
return (-22);
} else {
}
switch (param->param) {
case 1:
value = (dev->pdev)->irq ? 1 : 0;
break;
case 2:
value = dev_priv->allow_batchbuffer ? 1 : 0;
break;
case 3:
value = *((u32 volatile *)dev_priv->hw_status_page + 5);
break;
case 4:
value = dev->pci_device;
break;
case 5:
value = 1;
break;
default:
printk("<3>[drm:%s] *ERROR* Unknown parameter %d\n", "i915_getparam", param->param);
return (-22);
}
tmp = copy_to_user(param->value, & value, sizeof(int ));
if (tmp) {
printk("<3>[drm:%s] *ERROR* DRM_COPY_TO_USER failed\n", "i915_getparam");
return (-14);
} else {
}
return (0);
}
}
static int i915_setparam(struct drm_device *dev , void *data , struct drm_file *file_priv )
{
drm_i915_private_t *dev_priv ;
drm_i915_setparam_t *param ;
{
dev_priv = dev->dev_private;
param = data;
if (! dev_priv) {
printk("<3>[drm:%s] *ERROR* called with no initialization\n", "i915_setparam");
return (-22);
} else {
}
switch (param->param) {
case 1:
break;
case 2:
dev_priv->tex_lru_log_granularity = param->value;
break;
case 3:
dev_priv->allow_batchbuffer = param->value;
break;
default:
printk("<3>[drm:%s] *ERROR* unknown parameter %d\n", "i915_setparam", param->param);
return (-22);
}
return (0);
}
}
static int i915_set_status_page(struct drm_device *dev , void *data , struct drm_file *file_priv )
{
drm_i915_private_t *dev_priv ;
drm_i915_hws_addr_t *hws ;
{
dev_priv = dev->dev_private;
hws = data;
if (! ((((dev->pci_device == 10690 || dev->pci_device == 10674) || dev->pci_device == 10706) || dev->pci_device == 10818) || ((dev->pci_device == 11778 || dev->pci_device == 11794) || dev->pci_device == 11810))) {
return (-22);
} else {
}
if (! dev_priv) {
printk("<3>[drm:%s] *ERROR* called with no initialization\n", "i915_set_status_page");
return (-22);
} else {
}
printk("<7>set status page addr 0x%08x\n", (u32 )hws->addr);
dev_priv->status_gfx_addr = hws->addr & (unsigned long long )(131071 << 12);
dev_priv->hws_map.offset = (uint64_t )(dev->agp)->base + hws->addr;
dev_priv->hws_map.size = 4 * 1024;
dev_priv->hws_map.type = 0;
dev_priv->hws_map.flags = 0;
dev_priv->hws_map.mtrr = 0;
drm_core_ioremap(& dev_priv->hws_map, dev);
if ((unsigned long )dev_priv->hws_map.handle == (unsigned long )((void *)0)) {
i915_dma_cleanup(dev);
dev_priv->status_gfx_addr = 0;
printk("<3>[drm:%s] *ERROR* can not ioremap virtual address for G33 hw status page\n",
"i915_set_status_page");
return (-12);
} else {
}
dev_priv->hw_status_page = dev_priv->hws_map.handle;
memset(dev_priv->hw_status_page, 0, 1UL << 12);
writel(dev_priv->status_gfx_addr, dev_priv->regs + 8320);
while (1) {
if (drm_debug) {
printk("<7>[drm:%s] load hws HWS_PGA with gfx mem 0x%x\n", "i915_set_status_page",
dev_priv->status_gfx_addr);
} else {
}
break;
}
while (1) {
if (drm_debug) {
printk("<7>[drm:%s] load hws at %p\n", "i915_set_status_page", dev_priv->hw_status_page);
} else {
}
break;
}
return (0);
}
}
static struct lock_class_key __key___1 ;
int i915_driver_load(struct drm_device *dev , unsigned long flags )
{
struct drm_i915_private *dev_priv ;
unsigned long base ;
unsigned long size ;
int ret ;
int mmio_bar ;
void *tmp ;
int tmp___0 ;
{
dev_priv = dev->dev_private;
ret = 0;
mmio_bar = (((((dev->pci_device == 9602 || dev->pci_device == 9610) || dev->pci_device == 9618) || dev->pci_device == 10098) || (dev->pci_device == 10146 || dev->pci_device == 10158)) || (((((((((dev->pci_device == 10610 || dev->pci_device == 10626) || dev->pci_device == 10642) || dev->pci_device == 10658) || dev->pci_device == 10754) || dev->pci_device == 10770) || dev->pci_device == 10818) || dev->pci_device == 11778) || dev->pci_device == 11794) || dev->pci_device == 11810)) || ((dev->pci_device == 10690 || dev->pci_device == 10674) || dev->pci_device == 10706) ? 0 : 1;
dev->counters = dev->counters + 4UL;
dev->types[6] = _DRM_STAT_IRQ;
dev->types[7] = _DRM_STAT_PRIMARY;
dev->types[8] = _DRM_STAT_SECONDARY;
dev->types[9] = _DRM_STAT_DMA;
tmp = drm_alloc(sizeof(drm_i915_private_t ), 2);
dev_priv = tmp;
if ((unsigned long )dev_priv == (unsigned long )((void *)0)) {
return (-12);
} else {
}
memset(dev_priv, 0, sizeof(drm_i915_private_t ));
dev->dev_private = (void *)dev_priv;
dev_priv->dev = dev;
base = drm_get_resource_start(dev, mmio_bar);
size = drm_get_resource_len(dev, mmio_bar);
dev_priv->regs = ioremap(base, size);
i915_gem_load(dev);
if (! ((((dev->pci_device == 10690 || dev->pci_device == 10674) || dev->pci_device == 10706) || dev->pci_device == 10818) || ((dev->pci_device == 11778 || dev->pci_device == 11794) || dev->pci_device == 11810))) {
ret = i915_init_phys_hws(dev);
if (ret != 0) {
return (ret);
} else {
}
} else {
}
if (! (dev->pci_device == 10098) && ! (dev->pci_device == 10146 || dev->pci_device == 10158)) {
tmp___0 = pci_enable_msi(dev->pdev);
if (tmp___0) {
printk("<3>[drm:%s] *ERROR* failed to enable MSI\n", "i915_driver_load");
} else {
}
} else {
}
intel_opregion_init(dev);
while (1) {
__spin_lock_init(& dev_priv->user_irq_lock, "&dev_priv->user_irq_lock", & __key___1);
break;
}
return (ret);
}
}
int i915_driver_unload(struct drm_device *dev )
{
struct drm_i915_private *dev_priv ;
{
dev_priv = dev->dev_private;
if ((dev->pdev)->msi_enabled) {
pci_disable_msi(dev->pdev);
} else {
}
i915_free_hws(dev);
if ((unsigned long )dev_priv->regs != (unsigned long )((void *)0)) {
iounmap(dev_priv->regs);
} else {
}
intel_opregion_free(dev);
drm_free(dev->dev_private, sizeof(drm_i915_private_t ), 2);
return (0);
}
}
int i915_driver_open(struct drm_device *dev , struct drm_file *file_priv )
{
struct drm_i915_file_private *i915_file_priv ;
void *tmp ;
{
while (1) {
if (drm_debug) {
printk("<7>[drm:%s] \n", "i915_driver_open");
} else {
}
break;
}
tmp = drm_alloc(sizeof(*i915_file_priv), 10);
i915_file_priv = (struct drm_i915_file_private *)tmp;
if (! i915_file_priv) {
return (-12);
} else {
}
file_priv->driver_priv = i915_file_priv;
i915_file_priv->mm.last_gem_seqno = 0;
i915_file_priv->mm.last_gem_throttle_seqno = 0;
return (0);
}
}
void i915_driver_lastclose(struct drm_device *dev )
{
drm_i915_private_t *dev_priv ;
{
dev_priv = dev->dev_private;
if (! dev_priv) {
return;
} else {
}
i915_gem_lastclose(dev);
if (dev_priv->agp_heap) {
i915_mem_takedown(& dev_priv->agp_heap);
} else {
}
i915_dma_cleanup(dev);
return;
}
}
void i915_driver_preclose(struct drm_device *dev , struct drm_file *file_priv )
{
drm_i915_private_t *dev_priv ;
{
dev_priv = dev->dev_private;
i915_mem_release(dev, file_priv, dev_priv->agp_heap);
return;
}
}
void i915_driver_postclose(struct drm_device *dev , struct drm_file *file_priv )
{
struct drm_i915_file_private *i915_file_priv ;
{
i915_file_priv = file_priv->driver_priv;
drm_free(i915_file_priv, sizeof(*i915_file_priv), 10);
return;
}
}
struct drm_ioctl_desc i915_ioctls[35] =
{ {0, & i915_dma_init, (1 | 2) | 4},
{1, & i915_flush_ioctl, 1},
{2, & i915_flip_bufs, 1},
{3, & i915_batchbuffer, 1},
{4, & i915_irq_emit, 1},
{5, & i915_irq_wait, 1},
{6, & i915_getparam, 1},
{7, & i915_setparam, (1 | 2) | 4},
{8, & i915_mem_alloc, 1},
{9, & i915_mem_free, 1},
{10, & i915_mem_init_heap, (1 | 2) | 4},
{11, & i915_cmdbuffer, 1},
{12, & i915_mem_destroy_heap, (1 | 2) | 4},
{13, & i915_vblank_pipe_set, (1 | 2) | 4},
{14, & i915_vblank_pipe_get, 1},
{15, & i915_vblank_swap, 1},
{0U, 0, 0},
{17, & i915_set_status_page, 1},
{0U, 0, 0},
{19, & i915_gem_init_ioctl, (1 | 2) | 4},
{20, & i915_gem_execbuffer, 1},
{21, & i915_gem_pin_ioctl, 1 | 4},
{22, & i915_gem_unpin_ioctl, 1 | 4},
{23, & i915_gem_busy_ioctl, 1},
{24, & i915_gem_throttle_ioctl, 1},
{25, & i915_gem_entervt_ioctl, (1 | 2) | 4},
{26, & i915_gem_leavevt_ioctl, (1 | 2) | 4},
{27, & i915_gem_create_ioctl, 0},
{28, & i915_gem_pread_ioctl, 0},
{29, & i915_gem_pwrite_ioctl, 0},
{30, & i915_gem_mmap_ioctl, 0},
{31, & i915_gem_set_domain_ioctl, 0},
{32, & i915_gem_sw_finish_ioctl, 0},
{33, & i915_gem_set_tiling, 0},
{34, & i915_gem_get_tiling, 0}};
int i915_max_ioctl = sizeof(i915_ioctls) / sizeof(i915_ioctls[0]) + (sizeof(char [1 - 2 * 0]) - 1UL);
int i915_driver_device_is_agp(struct drm_device *dev )
{
{
return (1);
}
}
void __builtin_prefetch(void const * , ...) ;
__inline static int variable_test_bit(int nr , unsigned long const volatile *addr )
{
int oldbit ;
{
__asm__ volatile ("bt %2,%1\n\t"
"sbb %0,%0": "=r" (oldbit): "m" (*((unsigned long *)addr)),
"Ir" (nr));
return (oldbit);
}
}
__inline static struct task_struct *( __attribute__((__always_inline__)) get_current)(void)
{
struct task_struct *ret__ ;
{
switch (sizeof(_proxy_pda.pcurrent)) {
case 2UL:
__asm__ ("mov"
"w %%gs:%c1,%0": "=r" (ret__): "i" ((unsigned int )(& ((struct x8664_pda *)0)->pcurrent)),
"m" (_proxy_pda.pcurrent));
break;
case 4UL:
__asm__ ("mov"
"l %%gs:%c1,%0": "=r" (ret__): "i" ((unsigned int )(& ((struct x8664_pda *)0)->pcurrent)),
"m" (_proxy_pda.pcurrent));
break;
case 8UL:
__asm__ ("mov"
"q %%gs:%c1,%0": "=r" (ret__): "i" ((unsigned int )(& ((struct x8664_pda *)0)->pcurrent)),
"m" (_proxy_pda.pcurrent));
break;
default:
__bad_pda_field();
}
return (ret__);
}
}
__inline static void INIT_LIST_HEAD(struct list_head *list )
{
{
list->next = list;
list->prev = list;
return;
}
}
extern void __list_add(struct list_head *new , struct list_head *prev , struct list_head *next ) ;
__inline static void list_add_tail(struct list_head *new , struct list_head *head )
{
{
__list_add(new, head->prev, head);
return;
}
}
extern void list_del(struct list_head *entry ) ;
__inline static int test_ti_thread_flag(struct thread_info *ti , int flag )
{
int tmp___0 ;
{
tmp___0 = variable_test_bit(flag, & ti->flags);
return (tmp___0);
}
}
__inline static void atomic_inc(atomic_t *v )
{
{
__asm__ volatile (".section .smp_locks,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"661f\n"
".previous\n"
"661:\n\tlock; "
"incl %0": "=m" (v->counter): "m" (v->counter));
return;
}
}
extern void _spin_lock(spinlock_t *lock ) __attribute__((__section__(".spinlock.text"))) ;
extern unsigned long _spin_lock_irqsave(spinlock_t *lock ) __attribute__((__section__(".spinlock.text"))) ;
extern void _spin_unlock(spinlock_t *lock ) __attribute__((__section__(".spinlock.text"))) ;
extern void _spin_unlock_irqrestore(spinlock_t *lock , unsigned long flags ) __attribute__((__section__(".spinlock.text"))) ;
extern int default_wake_function(wait_queue_t *wait , unsigned int mode , int sync ,
void *key ) ;
extern void init_waitqueue_head(wait_queue_head_t *q ) ;
extern void add_wait_queue(wait_queue_head_t *q , wait_queue_t *wait ) ;
extern void remove_wait_queue(wait_queue_head_t *q , wait_queue_t *wait ) ;
extern void __wake_up(wait_queue_head_t *q , unsigned int mode , int nr , void *key ) ;
extern unsigned long volatile jiffies __attribute__((__section__(".data"))) ;
extern int schedule_work(struct work_struct *work ) ;
__inline static void *kcalloc(size_t n , size_t size , gfp_t flags )
{
void *tmp ;
{
if (size != (size_t )0 && n > ~ 0UL / size) {
return ((void *)0);
} else {
}
tmp = __kmalloc(n * size, flags | 32768U);
return (tmp);
}
}
extern long schedule_timeout(long timeout ) ;
__inline static int test_tsk_thread_flag(struct task_struct *tsk , int flag )
{
int tmp ;
{
tmp = test_ti_thread_flag((struct thread_info *)tsk->stack, flag);
return (tmp);
}
}
__inline static int signal_pending(struct task_struct *p )
{
int tmp ;
int tmp___0 ;
long tmp___1 ;
{
tmp = test_tsk_thread_flag(p, 2);
if (tmp) {
tmp___0 = 1;
} else {
tmp___0 = 0;
}
tmp___1 = ldv__builtin_expect(tmp___0, 0);
return (tmp___1);
}
}
extern struct drm_drawable_info *drm_get_drawable_info(struct drm_device *dev , drm_drawable_t id ) ;
extern int drm_vblank_init(struct drm_device *dev , int num_crtcs ) ;
extern void drm_locked_tasklet(struct drm_device *dev , void (*func)(struct drm_device * ) ) ;
extern u32 drm_vblank_count(struct drm_device *dev , int crtc ) ;
extern void drm_handle_vblank(struct drm_device *dev , int crtc ) ;
extern int drm_vblank_get(struct drm_device *dev , int crtc ) ;
extern void drm_vblank_put(struct drm_device *dev , int crtc ) ;
__inline static void *drm_calloc(size_t nmemb , size_t size , int area )
{
void *tmp ;
{
tmp = kcalloc(nmemb, size, (16U | 64U) | 128U);
return (tmp);
}
}
void i915_user_irq_get(struct drm_device *dev ) ;
void i915_user_irq_put(struct drm_device *dev ) ;
void i915_gem_vblank_work_handler(struct work_struct *work ) ;
void i915_enable_irq(drm_i915_private_t *dev_priv , u32 mask ) ;
uint32_t i915_get_gem_seqno(struct drm_device *dev ) ;
void opregion_asle_intr(struct drm_device *dev ) ;
void opregion_enable_asle(struct drm_device *dev ) ;
void i915_enable_irq(drm_i915_private_t *dev_priv , u32 mask )
{
{
if ((dev_priv->irq_mask_reg & mask) != 0U) {
dev_priv->irq_mask_reg = dev_priv->irq_mask_reg & ~ mask;
writel(dev_priv->irq_mask_reg, dev_priv->regs + 8360);
readl(dev_priv->regs + 8360);
} else {
}
return;
}
}
__inline static void i915_disable_irq(drm_i915_private_t *dev_priv , u32 mask )
{
{
if ((dev_priv->irq_mask_reg & mask) != mask) {
dev_priv->irq_mask_reg = dev_priv->irq_mask_reg | mask;
writel(dev_priv->irq_mask_reg, dev_priv->regs + 8360);
readl(dev_priv->regs + 8360);
} else {
}
return;
}
}
static int i915_get_pipe(struct drm_device *dev , int plane )
{
drm_i915_private_t *dev_priv ;
u32 dspcntr ;
unsigned int tmp ;
unsigned int tmp___0 ;
{
dev_priv = (drm_i915_private_t *)dev->dev_private;
if (plane) {
tmp = readl(dev_priv->regs + 463232);
dspcntr = tmp;
} else {
tmp___0 = readl(dev_priv->regs + 459136);
dspcntr = tmp___0;
}
return (dspcntr & (unsigned int )(1 << 24) ? 1 : 0);
}
}
static int i915_get_plane(struct drm_device *dev , int pipe )
{
int tmp ;
{
tmp = i915_get_pipe(dev, 0);
if (tmp == pipe) {
return (0);
} else {
}
return (1);
}
}
static int i915_pipe_enabled(struct drm_device *dev , int pipe )
{
drm_i915_private_t *dev_priv ;
unsigned long pipeconf ;
unsigned int tmp ;
{
dev_priv = (drm_i915_private_t *)dev->dev_private;
pipeconf = pipe ? 462856 : 458760;
tmp = readl(dev_priv->regs + pipeconf);
if (tmp & (unsigned int )(1 << 31)) {
return (1);
} else {
}
return (0);
}
}
static void i915_vblank_tasklet(struct drm_device *dev )
{
drm_i915_private_t *dev_priv ;
unsigned long irqflags ;
struct list_head *list ;
struct list_head *tmp ;
struct list_head hits ;
struct list_head *hit ;
int nhits ;
int nrects ;
int slice[2] ;
int upper[2] ;
int lower[2] ;
int i ;
unsigned int counter[2] ;
struct drm_drawable_info *drw ;
drm_i915_sarea_t *sarea_priv ;
u32 cpp ;
u32 cmd ;
u32 src_pitch ;
u32 dst_pitch ;
u32 ropcpp ;
unsigned int outring ;
unsigned int ringmask ;
unsigned int outcount ;
char volatile *virt ;
drm_i915_vbl_swap_t *vbl_swap ;
struct list_head const *__mptr ;
int pipe ;
int tmp___0 ;
drm_i915_vbl_swap_t *swap_cmp ;
struct list_head const *__mptr___0 ;
struct drm_drawable_info *drw_cmp ;
struct drm_drawable_info *tmp___1 ;
int _max1 ;
int _max2 ;
int _max1___0 ;
int _max2___0 ;
drm_i915_vbl_swap_t *swap_hit ;
struct list_head const *__mptr___1 ;
struct drm_clip_rect *rect ;
int num_rects ;
int plane ;
unsigned short top ;
unsigned short bottom ;
int y1 ;
unsigned short _max1___1 ;
unsigned short _max2___1 ;
int y2 ;
unsigned short _min1 ;
unsigned short _min2 ;
int tmp___2 ;
int tmp___3 ;
drm_i915_vbl_swap_t *swap_hit___0 ;
struct list_head const *__mptr___2 ;
{
dev_priv = (drm_i915_private_t *)dev->dev_private;
sarea_priv = dev_priv->sarea_priv;
cpp = dev_priv->cpp;
cmd = cpp == (u32 )4 ? ((((2 << 29) | (83 << 22)) | 6) | (1 << 21)) | (1 << 20) : ((2 << 29) | (83 << 22)) | 6;
src_pitch = (u32 )sarea_priv->pitch * cpp;
dst_pitch = (u32 )sarea_priv->pitch * cpp;
ropcpp = (unsigned int )(204 << 16) | ((cpp - (u32 )1) << 24);
if ((((((((((dev->pci_device == 10610 || dev->pci_device == 10626) || dev->pci_device == 10642) || dev->pci_device == 10658) || dev->pci_device == 10754) || dev->pci_device == 10770) || dev->pci_device == 10818) || dev->pci_device == 11778) || dev->pci_device == 11794) || dev->pci_device == 11810) && sarea_priv->front_tiled) {
cmd = cmd | (unsigned int )(1 << 11);
dst_pitch = dst_pitch >> 2;
} else {
}
if ((((((((((dev->pci_device == 10610 || dev->pci_device == 10626) || dev->pci_device == 10642) || dev->pci_device == 10658) || dev->pci_device == 10754) || dev->pci_device == 10770) || dev->pci_device == 10818) || dev->pci_device == 11778) || dev->pci_device == 11794) || dev->pci_device == 11810) && sarea_priv->back_tiled) {
cmd = cmd | (unsigned int )(1 << 15);
src_pitch = src_pitch >> 2;
} else {
}
counter[0] = drm_vblank_count(dev, 0);
counter[1] = drm_vblank_count(dev, 1);
while (1) {
if (drm_debug) {
printk("<7>[drm:%s] \n", "i915_vblank_tasklet");
} else {
}
break;
}
INIT_LIST_HEAD(& hits);
nrects = 0;
nhits = nrects;
while (1) {
irqflags = _spin_lock_irqsave(& dev_priv->swaps_lock);
break;
}
list = dev_priv->vbl_swaps.head.next;
tmp = list->next;
while (1) {
if ((unsigned long )list != (unsigned long )(& dev_priv->vbl_swaps.head)) {
} else {
break;
}
__mptr = list;
vbl_swap = (drm_i915_vbl_swap_t *)((char *)__mptr - (unsigned int )(& ((drm_i915_vbl_swap_t *)0)->head));
tmp___0 = i915_get_pipe(dev, vbl_swap->plane);
pipe = tmp___0;
if (counter[pipe] - vbl_swap->sequence > (unsigned int )(1 << 23)) {
goto __Cont;
} else {
}
list_del(list);
dev_priv->swaps_pending = dev_priv->swaps_pending - 1U;
drm_vblank_put(dev, pipe);
_spin_unlock(& dev_priv->swaps_lock);
_spin_lock(& dev->drw_lock);
drw = drm_get_drawable_info(dev, vbl_swap->drw_id);
if (! drw) {
_spin_unlock(& dev->drw_lock);
drm_free(vbl_swap, sizeof(*vbl_swap), 2);
_spin_lock(& dev_priv->swaps_lock);
goto __Cont;
} else {
}
hit = hits.next;
while (1) {
__builtin_prefetch(hit->next);
if ((unsigned long )hit != (unsigned long )(& hits)) {
} else {
break;
}
__mptr___0 = hit;
swap_cmp = (drm_i915_vbl_swap_t *)((char *)__mptr___0 - (unsigned int )(& ((drm_i915_vbl_swap_t *)0)->head));
tmp___1 = drm_get_drawable_info(dev, swap_cmp->drw_id);
drw_cmp = tmp___1;
if (drw_cmp && (int )(drw_cmp->rects + 0)->y1 > (int )(drw->rects + 0)->y1) {
list_add_tail(list, hit);
break;
} else {
}
hit = hit->next;
}
_spin_unlock(& dev->drw_lock);
if ((unsigned long )hit == (unsigned long )(& hits)) {
list_add_tail(list, hits.prev);
} else {
}
nhits = nhits + 1;
_spin_lock(& dev_priv->swaps_lock);
__Cont: /* CIL Label */
list = tmp;
tmp = list->next;
}
if (nhits == 0) {
while (1) {
_spin_unlock_irqrestore(& dev_priv->swaps_lock, irqflags);
break;
}
return;
} else {
}
_spin_unlock(& dev_priv->swaps_lock);
i915_kernel_lost_context(dev);
if (((((((((dev->pci_device == 10610 || dev->pci_device == 10626) || dev->pci_device == 10642) || dev->pci_device == 10658) || dev->pci_device == 10754) || dev->pci_device == 10770) || dev->pci_device == 10818) || dev->pci_device == 11778) || dev->pci_device == 11794) || dev->pci_device == 11810) {
while (1) {
if (dev_priv->ring.space < 4 * 4) {
i915_wait_ring(dev, 4 * 4, "i915_vblank_tasklet");
} else {
}
outcount = 0;
outring = dev_priv->ring.tail;
ringmask = dev_priv->ring.tail_mask;
virt = dev_priv->ring.virtual_start;
break;
}
while (1) {
*((unsigned int volatile *)(virt + outring)) = (30976 << 16) | 2;
outcount = outcount + 1U;
outring = outring + 4U;
outring = outring & ringmask;
break;
}
while (1) {
*((unsigned int volatile *)(virt + outring)) = 0;
outcount = outcount + 1U;
outring = outring + 4U;
outring = outring & ringmask;
break;
}
while (1) {
*((unsigned int volatile *)(virt + outring)) = ((sarea_priv->width - 1) & 65535) | ((sarea_priv->height - 1) << 16);
outcount = outcount + 1U;
outring = outring + 4U;
outring = outring & ringmask;
break;
}
while (1) {
*((unsigned int volatile *)(virt + outring)) = 0;
outcount = outcount + 1U;
outring = outring + 4U;
outring = outring & ringmask;
break;
}
while (1) {
dev_priv->ring.tail = outring;
dev_priv->ring.space = (unsigned int )dev_priv->ring.space - outcount * 4U;
writel(outring, dev_priv->regs + 8240);
break;
}
} else {
while (1) {
if (dev_priv->ring.space < 6 * 4) {
i915_wait_ring(dev, 6 * 4, "i915_vblank_tasklet");
} else {
}
outcount = 0;
outring = dev_priv->ring.tail;
ringmask = dev_priv->ring.tail_mask;
virt = dev_priv->ring.virtual_start;
break;
}
while (1) {
*((unsigned int volatile *)(virt + outring)) = (((3 << 29) | (29 << 24)) | (128 << 16)) | 3;
outcount = outcount + 1U;
outring = outring + 4U;
outring = outring & ringmask;
break;
}
while (1) {
*((unsigned int volatile *)(virt + outring)) = 0;
outcount = outcount + 1U;
outring = outring + 4U;
outring = outring & ringmask;
break;
}
while (1) {
*((unsigned int volatile *)(virt + outring)) = 0;
outcount = outcount + 1U;
outring = outring + 4U;
outring = outring & ringmask;
break;
}
while (1) {
*((unsigned int volatile *)(virt + outring)) = sarea_priv->width | (sarea_priv->height << 16);
outcount = outcount + 1U;
outring = outring + 4U;
outring = outring & ringmask;
break;
}
while (1) {
*((unsigned int volatile *)(virt + outring)) = sarea_priv->width | (sarea_priv->height << 16);
outcount = outcount + 1U;
outring = outring + 4U;
outring = outring & ringmask;
break;
}
while (1) {
*((unsigned int volatile *)(virt + outring)) = 0;
outcount = outcount + 1U;
outring = outring + 4U;
outring = outring & ringmask;
break;
}
while (1) {
dev_priv->ring.tail = outring;
dev_priv->ring.space = (unsigned int )dev_priv->ring.space - outcount * 4U;
writel(outring, dev_priv->regs + 8240);
break;
}
}
sarea_priv->ctxOwner = 0;
upper[1] = 0;
upper[0] = upper[1];
_max1 = sarea_priv->pipeA_h / nhits;
_max2 = 1;
slice[0] = _max1 > _max2 ? _max1 : _max2;
_max1___0 = sarea_priv->pipeB_h / nhits;
_max2___0 = 1;
slice[1] = _max1___0 > _max2___0 ? _max1___0 : _max2___0;
lower[0] = sarea_priv->pipeA_y + slice[0];
lower[1] = sarea_priv->pipeB_y + slice[0];
_spin_lock(& dev->drw_lock);
i = 0;
while (1) {
tmp___3 = i;
i = i + 1;
if (tmp___3 < nhits) {
} else {
break;
}
if (i == nhits) {
lower[1] = sarea_priv->height;
lower[0] = lower[1];
} else {
}
hit = hits.next;
while (1) {
__builtin_prefetch(hit->next);
if ((unsigned long )hit != (unsigned long )(& hits)) {
} else {
break;
}
__mptr___1 = hit;
swap_hit = (drm_i915_vbl_swap_t *)((char *)__mptr___1 - (unsigned int )(& ((drm_i915_vbl_swap_t *)0)->head));
drw = drm_get_drawable_info(dev, swap_hit->drw_id);
if (! drw) {
goto __Cont___0;
} else {
}
rect = drw->rects;
plane = swap_hit->plane;
top = upper[plane];
bottom = lower[plane];
num_rects = drw->num_rects;
while (1) {
tmp___2 = num_rects;
num_rects = num_rects - 1;
if (tmp___2) {
} else {
break;
}
_max1___1 = rect->y1;
_max2___1 = top;
y1 = (int )_max1___1 > (int )_max2___1 ? _max1___1 : _max2___1;
_min1 = rect->y2;
_min2 = bottom;
y2 = (int )_min1 < (int )_min2 ? _min1 : _min2;
if (y1 >= y2) {
goto __Cont___1;
} else {
}
while (1) {
if (dev_priv->ring.space < 8 * 4) {
i915_wait_ring(dev, 8 * 4, "i915_vblank_tasklet");
} else {
}
outcount = 0;
outring = dev_priv->ring.tail;
ringmask = dev_priv->ring.tail_mask;
virt = dev_priv->ring.virtual_start;
break;
}
while (1) {
*((unsigned int volatile *)(virt + outring)) = cmd;
outcount = outcount + 1U;
outring = outring + 4U;
outring = outring & ringmask;
break;
}
while (1) {
*((unsigned int volatile *)(virt + outring)) = ropcpp | dst_pitch;
outcount = outcount + 1U;
outring = outring + 4U;
outring = outring & ringmask;
break;
}
while (1) {
*((unsigned int volatile *)(virt + outring)) = (y1 << 16) | (int )rect->x1;
outcount = outcount + 1U;
outring = outring + 4U;
outring = outring & ringmask;
break;
}
while (1) {
*((unsigned int volatile *)(virt + outring)) = (y2 << 16) | (int )rect->x2;
outcount = outcount + 1U;
outring = outring + 4U;
outring = outring & ringmask;
break;
}
while (1) {
*((unsigned int volatile *)(virt + outring)) = sarea_priv->front_offset;
outcount = outcount + 1U;
outring = outring + 4U;
outring = outring & ringmask;
break;
}
while (1) {
*((unsigned int volatile *)(virt + outring)) = (y1 << 16) | (int )rect->x1;
outcount = outcount + 1U;
outring = outring + 4U;
outring = outring & ringmask;
break;
}
while (1) {
*((unsigned int volatile *)(virt + outring)) = src_pitch;
outcount = outcount + 1U;
outring = outring + 4U;
outring = outring & ringmask;
break;
}
while (1) {
*((unsigned int volatile *)(virt + outring)) = sarea_priv->back_offset;
outcount = outcount + 1U;
outring = outring + 4U;
outring = outring & ringmask;
break;
}
while (1) {
dev_priv->ring.tail = outring;
dev_priv->ring.space = (unsigned int )dev_priv->ring.space - outcount * 4U;
writel(outring, dev_priv->regs + 8240);
break;
}
__Cont___1: /* CIL Label */
rect = rect + 1;
}
__Cont___0: /* CIL Label */
hit = hit->next;
}
upper[0] = lower[0];
lower[0] = lower[0] + slice[0];
upper[1] = lower[1];
lower[1] = lower[1] + slice[1];
}
while (1) {
_spin_unlock_irqrestore(& dev->drw_lock, irqflags);
break;
}
hit = hits.next;
tmp = hit->next;
while (1) {
if ((unsigned long )hit != (unsigned long )(& hits)) {
} else {
break;
}
__mptr___2 = hit;
swap_hit___0 = (drm_i915_vbl_swap_t *)((char *)__mptr___2 - (unsigned int )(& ((drm_i915_vbl_swap_t *)0)->head));
list_del(hit);
drm_free(swap_hit___0, sizeof(*swap_hit___0), 2);
hit = tmp;
tmp = hit->next;
}
return;
}
}
u32 i915_get_vblank_counter(struct drm_device *dev , int plane )
{
drm_i915_private_t *dev_priv ;
unsigned long high_frame ;
unsigned long low_frame ;
u32 high1 ;
u32 high2 ;
u32 low ;
u32 count ;
int pipe ;
int tmp ;
unsigned int tmp___0 ;
unsigned int tmp___1 ;
unsigned int tmp___2 ;
{
dev_priv = (drm_i915_private_t *)dev->dev_private;
pipe = i915_get_pipe(dev, plane);
high_frame = pipe ? 462912 : 458816;
low_frame = pipe ? 462916 : 458820;
tmp = i915_pipe_enabled(dev, pipe);
if (tmp) {
} else {
printk("<3>[drm:%s] *ERROR* trying to get vblank count for disabled pipe %d\n",
"i915_get_vblank_counter", pipe);
return (0);
}
while (1) {
tmp___0 = readl(dev_priv->regs + high_frame);
high1 = (tmp___0 & 65535U) >> 0;
tmp___1 = readl(dev_priv->regs + low_frame);
low = (tmp___1 & 4278190080U) >> 24;
tmp___2 = readl(dev_priv->regs + high_frame);
high2 = (tmp___2 & 65535U) >> 0;
if (high1 != high2) {
} else {
break;
}
}
count = (high1 << 8) | low;
return (count);
}
}
void i915_gem_vblank_work_handler(struct work_struct *work )
{
drm_i915_private_t *dev_priv ;
struct drm_device *dev ;
struct work_struct const *__mptr ;
{
__mptr = work;
dev_priv = (drm_i915_private_t *)((char *)__mptr - (unsigned int )(& ((drm_i915_private_t *)0)->mm.vblank_work));
dev = dev_priv->dev;
mutex_lock(& dev->struct_mutex);
i915_vblank_tasklet(dev);
mutex_unlock(& dev->struct_mutex);
return;
}
}
irqreturn_t i915_driver_irq_handler(int irq , void *arg )
{
struct drm_device *dev ;
drm_i915_private_t *dev_priv ;
u32 iir ;
u32 pipea_stats ;
u32 pipeb_stats ;
int vblank ;
int tmp ;
int tmp___0 ;
{
dev = (struct drm_device *)arg;
dev_priv = (drm_i915_private_t *)dev->dev_private;
vblank = 0;
atomic_inc(& dev_priv->irq_received);
if ((dev->pdev)->msi_enabled) {
writel(~ 0, dev_priv->regs + 8360);
} else {
}
iir = readl(dev_priv->regs + 8356);
if (iir == (u32 )0) {
if ((dev->pdev)->msi_enabled) {
writel(dev_priv->irq_mask_reg, dev_priv->regs + 8360);
readl(dev_priv->regs + 8360);
} else {
}
return (0);
} else {
}
if (iir & (unsigned int )(1 << 6)) {
pipea_stats = readl(dev_priv->regs + 458788);
if (! (dev_priv->vblank_pipe & 1)) {
pipea_stats = (unsigned long )pipea_stats & ~ ((1UL << 18) | (1UL << 17));
} else
if ((unsigned long )pipea_stats & ((1UL << 2) | (1UL << 1))) {
vblank = vblank + 1;
tmp = i915_get_plane(dev, 0);
drm_handle_vblank(dev, tmp);
} else {
}
writel(pipea_stats, dev_priv->regs + 458788);
} else {
}
if (iir & (unsigned int )(1 << 4)) {
pipeb_stats = readl(dev_priv->regs + 462884);
writel(pipeb_stats, dev_priv->regs + 462884);
if (! (dev_priv->vblank_pipe & 2)) {
pipeb_stats = (unsigned long )pipeb_stats & ~ ((1UL << 18) | (1UL << 17));
} else
if ((unsigned long )pipeb_stats & ((1UL << 2) | (1UL << 1))) {
vblank = vblank + 1;
tmp___0 = i915_get_plane(dev, 1);
drm_handle_vblank(dev, tmp___0);
} else {
}
if ((unsigned long )pipeb_stats & (1UL << 6)) {
opregion_asle_intr(dev);
} else {
}
writel(pipeb_stats, dev_priv->regs + 462884);
} else {
}
writel(iir, dev_priv->regs + 8356);
if ((dev->pdev)->msi_enabled) {
writel(dev_priv->irq_mask_reg, dev_priv->regs + 8360);
} else {
}
readl(dev_priv->regs + 8356);
if (dev_priv->sarea_priv) {
(dev_priv->sarea_priv)->last_dispatch = *((u32 volatile *)dev_priv->hw_status_page + 5);
} else {
}
if (iir & (unsigned int )(1 << 1)) {
dev_priv->mm.irq_gem_seqno = i915_get_gem_seqno(dev);
__wake_up(& dev_priv->irq_queue, 1, 1, (void *)0);
} else {
}
if (iir & (unsigned int )(1 << 0)) {
opregion_asle_intr(dev);
} else {
}
if (vblank && dev_priv->swaps_pending > 0U) {
if ((unsigned long )dev_priv->ring.ring_obj == (unsigned long )((void *)0)) {
drm_locked_tasklet(dev, & i915_vblank_tasklet);
} else {
schedule_work(& dev_priv->mm.vblank_work);
}
} else {
}
return (1);
}
}
static int i915_emit_irq(struct drm_device *dev )
{
drm_i915_private_t *dev_priv ;
unsigned int outring ;
unsigned int ringmask ;
unsigned int outcount ;
char volatile *virt ;
{
dev_priv = dev->dev_private;
i915_kernel_lost_context(dev);
while (1) {
if (drm_debug) {
printk("<7>[drm:%s] \n", "i915_emit_irq");
} else {
}
break;
}
dev_priv->counter = dev_priv->counter + (uint32_t )1;
if ((unsigned long )dev_priv->counter > 2147483647UL) {
dev_priv->counter = 1;
} else {
}
if (dev_priv->sarea_priv) {
(dev_priv->sarea_priv)->last_enqueue = dev_priv->counter;
} else {
}
while (1) {
if (dev_priv->ring.space < 6 * 4) {
i915_wait_ring(dev, 6 * 4, "i915_emit_irq");
} else {
}
outcount = 0;
outring = dev_priv->ring.tail;
ringmask = dev_priv->ring.tail_mask;
virt = dev_priv->ring.virtual_start;
break;
}
while (1) {
*((unsigned int volatile *)(virt + outring)) = (33 << 23) | 1;
outcount = outcount + 1U;
outring = outring + 4U;
outring = outring & ringmask;
break;
}
while (1) {
*((unsigned int volatile *)(virt + outring)) = 5 << 2;
outcount = outcount + 1U;
outring = outring + 4U;
outring = outring & ringmask;
break;
}
while (1) {
*((unsigned int volatile *)(virt + outring)) = dev_priv->counter;
outcount = outcount + 1U;
outring = outring + 4U;
outring = outring & ringmask;
break;
}
while (1) {
*((unsigned int volatile *)(virt + outring)) = 0;
outcount = outcount + 1U;
outring = outring + 4U;
outring = outring & ringmask;
break;
}
while (1) {
*((unsigned int volatile *)(virt + outring)) = 0;
outcount = outcount + 1U;
outring = outring + 4U;
outring = outring & ringmask;
break;
}
while (1) {
*((unsigned int volatile *)(virt + outring)) = (2 << 23) | 0;
outcount = outcount + 1U;
outring = outring + 4U;
outring = outring & ringmask;
break;
}
while (1) {
dev_priv->ring.tail = outring;
dev_priv->ring.space = (unsigned int )dev_priv->ring.space - outcount * 4U;
writel(outring, dev_priv->regs + 8240);
break;
}
return (dev_priv->counter);
}
}
void i915_user_irq_get(struct drm_device *dev )
{
drm_i915_private_t *dev_priv ;
{
dev_priv = (drm_i915_private_t *)dev->dev_private;
_spin_lock(& dev_priv->user_irq_lock);
if (dev->irq_enabled) {
dev_priv->user_irq_refcount = dev_priv->user_irq_refcount + 1;
if (dev_priv->user_irq_refcount == 1) {
i915_enable_irq(dev_priv, 1 << 1);
} else {
}
} else {
}
_spin_unlock(& dev_priv->user_irq_lock);
return;
}
}
void i915_user_irq_put(struct drm_device *dev )
{
drm_i915_private_t *dev_priv ;
long tmp ;
{
dev_priv = (drm_i915_private_t *)dev->dev_private;
_spin_lock(& dev_priv->user_irq_lock);
while (1) {
tmp = ldv__builtin_expect(! (! (dev->irq_enabled && dev_priv->user_irq_refcount <= 0)),
0);
if (tmp) {
while (1) {
__asm__ volatile ("1:\tud2\n"
".pushsection __bug_table,\"a\"\n"
"2:\t.quad 1b, %c0\n"
"\t.word %c1, 0\n"
"\t.org 2b+%c2\n"
".popsection": : "i" ("/work/ldvuser/novikov/work/current--X--drivers/gpu/drm/i915/i915.ko--X--defaultlinux--X--32_1--X--cpachecker/linux/csd_deg_dscv/21/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/i915/i915_irq.c"),
"i" (496), "i" (sizeof(struct bug_entry )));
while (1) {
}
break;
}
} else {
}
break;
}
if (dev->irq_enabled) {
dev_priv->user_irq_refcount = dev_priv->user_irq_refcount - 1;
if (dev_priv->user_irq_refcount == 0) {
i915_disable_irq(dev_priv, 1 << 1);
} else {
}
} else {
}
_spin_unlock(& dev_priv->user_irq_lock);
return;
}
}
static int i915_wait_irq(struct drm_device *dev , int irq_nr )
{
drm_i915_private_t *dev_priv ;
int ret ;
wait_queue_t entry ;
struct task_struct *tmp ;
unsigned long end ;
struct task_struct *tmp___0 ;
struct task_struct *tmp___1 ;
int tmp___2 ;
struct task_struct *tmp___3 ;
{
dev_priv = (drm_i915_private_t *)dev->dev_private;
ret = 0;
while (1) {
if (drm_debug) {
printk("<7>[drm:%s] irq_nr=%d breadcrumb=%d\n", "i915_wait_irq", irq_nr, *((u32 volatile *)dev_priv->hw_status_page + 5));
} else {
}
break;
}
if (*((u32 volatile *)dev_priv->hw_status_page + 5) >= (u32 volatile )irq_nr) {
if (dev_priv->sarea_priv) {
(dev_priv->sarea_priv)->last_dispatch = *((u32 volatile *)dev_priv->hw_status_page + 5);
} else {
}
return (0);
} else {
}
if (dev_priv->sarea_priv) {
(dev_priv->sarea_priv)->perf_boxes = (dev_priv->sarea_priv)->perf_boxes | 4;
} else {
}
i915_user_irq_get(dev);
while (1) {
tmp = get_current();
entry.flags = 0U;
entry.private = tmp;
entry.func = & default_wake_function;
entry.task_list.next = (void *)0;
entry.task_list.prev = (void *)0;
end = jiffies + (unsigned long volatile )(3 * 250);
add_wait_queue(& dev_priv->irq_queue, & entry);
while (1) {
while (1) {
tmp___0 = get_current();
tmp___0->state = 1;
break;
}
if (*((u32 volatile *)dev_priv->hw_status_page + 5) >= (u32 volatile )irq_nr) {
break;
} else {
}
if ((long )jiffies - (long )end >= 0L) {
ret = -16;
break;
} else {
}
schedule_timeout(250 / 100 > 1 ? 250 / 100 : 1);
tmp___1 = get_current();
tmp___2 = signal_pending(tmp___1);
if (tmp___2) {
ret = -4;
break;
} else {
}
}
while (1) {
tmp___3 = get_current();
tmp___3->state = 0;
break;
}
remove_wait_queue(& dev_priv->irq_queue, & entry);
break;
}
i915_user_irq_put(dev);
if (ret == -16) {
printk("<3>[drm:%s] *ERROR* EBUSY -- rec: %d emitted: %d\n", "i915_wait_irq",
*((u32 volatile *)dev_priv->hw_status_page + 5), (int )dev_priv->counter);
} else {
}
if (dev_priv->sarea_priv) {
(dev_priv->sarea_priv)->last_dispatch = *((u32 volatile *)dev_priv->hw_status_page + 5);
} else {
}
return (ret);
}
}
int i915_irq_emit(struct drm_device *dev , void *data , struct drm_file *file_priv )
{
drm_i915_private_t *dev_priv ;
drm_i915_irq_emit_t *emit ;
int result ;
unsigned long tmp ;
{
dev_priv = dev->dev_private;
emit = data;
while (1) {
if ((unsigned long )((drm_i915_private_t *)dev->dev_private)->ring.ring_obj == (unsigned long )((void *)0)) {
while (1) {
if (! ((dev->lock.hw_lock)->lock & (unsigned int volatile )2147483648U) || (unsigned long )dev->lock.file_priv != (unsigned long )file_priv) {
printk("<3>[drm:%s] *ERROR* %s called without lock held, held %d owner %p %p\n",
"i915_irq_emit", "i915_irq_emit", (dev->lock.hw_lock)->lock & (unsigned int volatile )2147483648U,
dev->lock.file_priv, file_priv);
return (-22);
} else {
}
break;
}
} else {
}
break;
}
if (! dev_priv) {
printk("<3>[drm:%s] *ERROR* called with no initialization\n", "i915_irq_emit");
return (-22);
} else {
}
mutex_lock(& dev->struct_mutex);
result = i915_emit_irq(dev);
mutex_unlock(& dev->struct_mutex);
tmp = copy_to_user(emit->irq_seq, & result, sizeof(int ));
if (tmp) {
printk("<3>[drm:%s] *ERROR* copy_to_user\n", "i915_irq_emit");
return (-14);
} else {
}
return (0);
}
}
int i915_irq_wait(struct drm_device *dev , void *data , struct drm_file *file_priv )
{
drm_i915_private_t *dev_priv ;
drm_i915_irq_wait_t *irqwait ;
int tmp ;
{
dev_priv = dev->dev_private;
irqwait = data;
if (! dev_priv) {
printk("<3>[drm:%s] *ERROR* called with no initialization\n", "i915_irq_wait");
return (-22);
} else {
}
tmp = i915_wait_irq(dev, irqwait->irq_seq);
return (tmp);
}
}
int i915_enable_vblank(struct drm_device *dev , int plane )
{
drm_i915_private_t *dev_priv ;
int pipe ;
int tmp ;
u32 pipestat_reg ;
u32 pipestat ;
{
dev_priv = (drm_i915_private_t *)dev->dev_private;
tmp = i915_get_pipe(dev, plane);
pipe = tmp;
pipestat_reg = 0;
switch (pipe) {
case 0:
pipestat_reg = 458788;
i915_enable_irq(dev_priv, 1 << 6);
break;
case 1:
pipestat_reg = 462884;
i915_enable_irq(dev_priv, 1 << 4);
break;
default:
printk("<3>[drm:%s] *ERROR* tried to enable vblank on non-existent pipe %d\n", "i915_enable_vblank",
pipe);
break;
}
if (pipestat_reg) {
pipestat = readl(dev_priv->regs + pipestat_reg);
if (((((((((dev->pci_device == 10610 || dev->pci_device == 10626) || dev->pci_device == 10642) || dev->pci_device == 10658) || dev->pci_device == 10754) || dev->pci_device == 10770) || dev->pci_device == 10818) || dev->pci_device == 11778) || dev->pci_device == 11794) || dev->pci_device == 11810) {
pipestat = (unsigned long )pipestat | (1UL << 18);
} else {
pipestat = (unsigned long )pipestat | (1UL << 17);
}
pipestat = (unsigned long )pipestat | ((1UL << 2) | (1UL << 1));
writel(pipestat, dev_priv->regs + pipestat_reg);
} else {
}
return (0);
}
}
void i915_disable_vblank(struct drm_device *dev , int plane )
{
drm_i915_private_t *dev_priv ;
int pipe ;
int tmp ;
u32 pipestat_reg ;
u32 pipestat ;
{
dev_priv = (drm_i915_private_t *)dev->dev_private;
tmp = i915_get_pipe(dev, plane);
pipe = tmp;
pipestat_reg = 0;
switch (pipe) {
case 0:
pipestat_reg = 458788;
i915_disable_irq(dev_priv, 1 << 6);
break;
case 1:
pipestat_reg = 462884;
i915_disable_irq(dev_priv, 1 << 4);
break;
default:
printk("<3>[drm:%s] *ERROR* tried to disable vblank on non-existent pipe %d\n",
"i915_disable_vblank", pipe);
break;
}
if (pipestat_reg) {
pipestat = readl(dev_priv->regs + pipestat_reg);
pipestat = (unsigned long )pipestat & ~ ((1UL << 18) | (1UL << 17));
pipestat = (unsigned long )pipestat | ((1UL << 2) | (1UL << 1));
writel(pipestat, dev_priv->regs + pipestat_reg);
} else {
}
return;
}
}
int i915_vblank_pipe_set(struct drm_device *dev , void *data , struct drm_file *file_priv )
{
drm_i915_private_t *dev_priv ;
{
dev_priv = dev->dev_private;
if (! dev_priv) {
printk("<3>[drm:%s] *ERROR* called with no initialization\n", "i915_vblank_pipe_set");
return (-22);
} else {
}
return (0);
}
}
int i915_vblank_pipe_get(struct drm_device *dev , void *data , struct drm_file *file_priv )
{
drm_i915_private_t *dev_priv ;
drm_i915_vblank_pipe_t *pipe ;
{
dev_priv = dev->dev_private;
pipe = data;
if (! dev_priv) {
printk("<3>[drm:%s] *ERROR* called with no initialization\n", "i915_vblank_pipe_get");
return (-22);
} else {
}
pipe->pipe = 1 | 2;
return (0);
}
}
int i915_vblank_swap(struct drm_device *dev , void *data , struct drm_file *file_priv )
{
drm_i915_private_t *dev_priv ;
drm_i915_vblank_swap_t *swap ;
drm_i915_vbl_swap_t *vbl_swap ;
unsigned int pipe ;
unsigned int seqtype ;
unsigned int curseq ;
unsigned int plane ;
unsigned long irqflags ;
struct list_head *list ;
int ret ;
int tmp ;
struct drm_drawable_info *tmp___0 ;
struct list_head const *__mptr ;
void *tmp___1 ;
{
dev_priv = dev->dev_private;
swap = data;
if (! dev_priv || ! dev_priv->sarea_priv) {
printk("<3>[drm:%s] *ERROR* %s called with no initialization\n", "i915_vblank_swap",
"i915_vblank_swap");
return (-22);
} else {
}
if ((dev_priv->sarea_priv)->rotation) {
while (1) {
if (drm_debug) {
printk("<7>[drm:%s] Rotation not supported\n", "i915_vblank_swap");
} else {
}
break;
}
return (-22);
} else {
}
if ((unsigned int )swap->seqtype & (unsigned int )(~ (((_DRM_VBLANK_RELATIVE | _DRM_VBLANK_ABSOLUTE) | _DRM_VBLANK_SECONDARY) | _DRM_VBLANK_NEXTONMISS))) {
printk("<3>[drm:%s] *ERROR* Invalid sequence type 0x%x\n", "i915_vblank_swap",
swap->seqtype);
return (-22);
} else {
}
plane = (unsigned int )swap->seqtype & (unsigned int )_DRM_VBLANK_SECONDARY ? 1 : 0;
tmp = i915_get_pipe(dev, plane);
pipe = tmp;
seqtype = (unsigned int )swap->seqtype & (unsigned int )(_DRM_VBLANK_RELATIVE | _DRM_VBLANK_ABSOLUTE);
if (! (dev_priv->vblank_pipe & (1 << pipe))) {
printk("<3>[drm:%s] *ERROR* Invalid pipe %d\n", "i915_vblank_swap", pipe);
return (-22);
} else {
}
while (1) {
irqflags = _spin_lock_irqsave(& dev->drw_lock);
break;
}
tmp___0 = drm_get_drawable_info(dev, swap->drawable);
if (tmp___0) {
} else {
while (1) {
_spin_unlock_irqrestore(& dev->drw_lock, irqflags);
break;
}
while (1) {
if (drm_debug) {
printk("<7>[drm:%s] Invalid drawable ID %d\n", "i915_vblank_swap", swap->drawable);
} else {
}
break;
}
return (-22);
}
while (1) {
_spin_unlock_irqrestore(& dev->drw_lock, irqflags);
break;
}
ret = drm_vblank_get(dev, pipe);
if (ret) {
return (ret);
} else {
}
curseq = drm_vblank_count(dev, pipe);
if (seqtype == (unsigned int )_DRM_VBLANK_RELATIVE) {
swap->sequence = swap->sequence + curseq;
} else {
}
if (curseq - swap->sequence <= (unsigned int )(1 << 23)) {
if ((unsigned int )swap->seqtype & (unsigned int )_DRM_VBLANK_NEXTONMISS) {
swap->sequence = curseq + 1U;
} else {
while (1) {
if (drm_debug) {
printk("<7>[drm:%s] Missed target sequence\n", "i915_vblank_swap");
} else {
}
break;
}
drm_vblank_put(dev, pipe);
return (-22);
}
} else {
}
while (1) {
irqflags = _spin_lock_irqsave(& dev_priv->swaps_lock);
break;
}
list = dev_priv->vbl_swaps.head.next;
while (1) {
__builtin_prefetch(list->next);
if ((unsigned long )list != (unsigned long )(& dev_priv->vbl_swaps.head)) {
} else {
break;
}
__mptr = list;
vbl_swap = (drm_i915_vbl_swap_t *)((char *)__mptr - (unsigned int )(& ((drm_i915_vbl_swap_t *)0)->head));
if ((vbl_swap->drw_id == swap->drawable && vbl_swap->plane == plane) && vbl_swap->sequence == swap->sequence) {
while (1) {
_spin_unlock_irqrestore(& dev_priv->swaps_lock, irqflags);
break;
}
while (1) {
if (drm_debug) {
printk("<7>[drm:%s] Already scheduled\n", "i915_vblank_swap");
} else {
}
break;
}
return (0);
} else {
}
list = list->next;
}
while (1) {
_spin_unlock_irqrestore(& dev_priv->swaps_lock, irqflags);
break;
}
if (dev_priv->swaps_pending >= 100U) {
while (1) {
if (drm_debug) {
printk("<7>[drm:%s] Too many swaps queued\n", "i915_vblank_swap");
} else {
}
break;
}
drm_vblank_put(dev, pipe);
return (-16);
} else {
}
tmp___1 = drm_calloc(1, sizeof(*vbl_swap), 2);
vbl_swap = tmp___1;
if (! vbl_swap) {
printk("<3>[drm:%s] *ERROR* Failed to allocate memory to queue swap\n", "i915_vblank_swap");
drm_vblank_put(dev, pipe);
return (-12);
} else {
}
while (1) {
if (drm_debug) {
printk("<7>[drm:%s] \n", "i915_vblank_swap");
} else {
}
break;
}
vbl_swap->drw_id = swap->drawable;
vbl_swap->plane = plane;
vbl_swap->sequence = swap->sequence;
while (1) {
irqflags = _spin_lock_irqsave(& dev_priv->swaps_lock);
break;
}
list_add_tail(& vbl_swap->head, & dev_priv->vbl_swaps.head);
dev_priv->swaps_pending = dev_priv->swaps_pending + 1U;
while (1) {
_spin_unlock_irqrestore(& dev_priv->swaps_lock, irqflags);
break;
}
return (0);
}
}
void i915_driver_irq_preinstall(struct drm_device *dev )
{
drm_i915_private_t *dev_priv ;
{
dev_priv = (drm_i915_private_t *)dev->dev_private;
writel(61438, dev_priv->regs + 8344);
writel(4294967295U, dev_priv->regs + 8360);
writel(0, dev_priv->regs + 8352);
return;
}
}
static struct lock_class_key __key___2 ;
int i915_driver_irq_postinstall(struct drm_device *dev )
{
drm_i915_private_t *dev_priv ;
int ret ;
int num_pipes ;
{
dev_priv = (drm_i915_private_t *)dev->dev_private;
num_pipes = 2;
while (1) {
__spin_lock_init(& dev_priv->swaps_lock, "&dev_priv->swaps_lock", & __key___2);
break;
}
INIT_LIST_HEAD(& dev_priv->vbl_swaps.head);
dev_priv->swaps_pending = 0;
dev_priv->irq_mask_reg = ~ 0;
ret = drm_vblank_init(dev, num_pipes);
if (ret) {
return (ret);
} else {
}
dev_priv->vblank_pipe = 1 | 2;
dev_priv->irq_mask_reg = dev_priv->irq_mask_reg & (unsigned int )(~ (1 << 7));
dev_priv->irq_mask_reg = dev_priv->irq_mask_reg & (unsigned int )(~ (1 << 5));
dev->max_vblank_count = 16777215;
dev_priv->irq_mask_reg = dev_priv->irq_mask_reg & (unsigned int )((((1 << 1) | (1 << 0)) | (1 << 6)) | (1 << 4));
writel(dev_priv->irq_mask_reg, dev_priv->regs + 8360);
writel((((1 << 1) | (1 << 0)) | (1 << 6)) | (1 << 4), dev_priv->regs + 8352);
readl(dev_priv->regs + 8352);
opregion_enable_asle(dev);
init_waitqueue_head(& dev_priv->irq_queue);
return (0);
}
}
void i915_driver_irq_uninstall(struct drm_device *dev )
{
drm_i915_private_t *dev_priv ;
u32 temp ;
{
dev_priv = (drm_i915_private_t *)dev->dev_private;
if (! dev_priv) {
return;
} else {
}
dev_priv->vblank_pipe = 0;
writel(4294967295U, dev_priv->regs + 8344);
writel(4294967295U, dev_priv->regs + 8360);
writel(0, dev_priv->regs + 8352);
temp = readl(dev_priv->regs + 458788);
writel(temp, dev_priv->regs + 458788);
temp = readl(dev_priv->regs + 462884);
writel(temp, dev_priv->regs + 462884);
temp = readl(dev_priv->regs + 8356);
writel(temp, dev_priv->regs + 8356);
return;
}
}
static void mark_block(struct drm_device *dev , struct mem_block *p , int in_use )
{
drm_i915_private_t *dev_priv ;
drm_i915_sarea_t *sarea_priv ;
struct drm_tex_region *list ;
unsigned int shift ;
unsigned int nr ;
unsigned int start ;
unsigned int end ;
unsigned int i ;
int age ;
{
dev_priv = dev->dev_private;
sarea_priv = dev_priv->sarea_priv;
shift = dev_priv->tex_lru_log_granularity;
nr = 255;
start = p->start >> shift;
end = ((p->start + p->size) - 1) >> shift;
sarea_priv->texAge = sarea_priv->texAge + 1;
age = sarea_priv->texAge;
list = sarea_priv->texList;
i = start;
while (1) {
if (i <= end) {
} else {
break;
}
(list + i)->in_use = in_use;
(list + i)->age = age;
(list + (unsigned int )(list + i)->next)->prev = (list + i)->prev;
(list + (unsigned int )(list + i)->prev)->next = (list + i)->next;
(list + i)->prev = nr;
(list + i)->next = (list + nr)->next;
(list + (unsigned int )(list + nr)->next)->prev = i;
(list + nr)->next = i;
i = i + 1U;
}
return;
}
}
static struct mem_block *split_block(struct mem_block *p , int start , int size ,
struct drm_file *file_priv )
{
struct mem_block *newblock ;
void *tmp ;
struct mem_block *newblock___0 ;
void *tmp___0 ;
{
if (start > p->start) {
tmp = drm_alloc(sizeof(*newblock), 14);
newblock = tmp;
if (! newblock) {
goto out;
} else {
}
newblock->start = start;
newblock->size = p->size - (start - p->start);
newblock->file_priv = (void *)0;
newblock->next = p->next;
newblock->prev = p;
(p->next)->prev = newblock;
p->next = newblock;
p->size = p->size - newblock->size;
p = newblock;
} else {
}
if (size < p->size) {
tmp___0 = drm_alloc(sizeof(*newblock___0), 14);
newblock___0 = tmp___0;
if (! newblock___0) {
goto out;
} else {
}
newblock___0->start = start + size;
newblock___0->size = p->size - size;
newblock___0->file_priv = (void *)0;
newblock___0->next = p->next;
newblock___0->prev = p;
(p->next)->prev = newblock___0;
p->next = newblock___0;
p->size = size;
} else {
}
out:
p->file_priv = file_priv;
return (p);
}
}
static struct mem_block *alloc_block(struct mem_block *heap , int size , int align2 ,
struct drm_file *file_priv )
{
struct mem_block *p ;
int mask ;
int start ;
struct mem_block *tmp ;
{
mask = (1 << align2) - 1;
p = heap->next;
while (1) {
if ((unsigned long )p != (unsigned long )heap) {
} else {
break;
}
start = (p->start + mask) & ~ mask;
if ((unsigned long )p->file_priv == (unsigned long )((void *)0) && start + size <= p->start + p->size) {
tmp = split_block(p, start, size, file_priv);
return (tmp);
} else {
}
p = p->next;
}
return ((void *)0);
}
}
static struct mem_block *find_block(struct mem_block *heap , int start )
{
struct mem_block *p ;
{
p = heap->next;
while (1) {
if ((unsigned long )p != (unsigned long )heap) {
} else {
break;
}
if (p->start == start) {
return (p);
} else {
}
p = p->next;
}
return ((void *)0);
}
}
static void free_block(struct mem_block *p )
{
struct mem_block *q ;
struct mem_block *q___0 ;
{
p->file_priv = (void *)0;
if ((unsigned long )(p->next)->file_priv == (unsigned long )((void *)0)) {
q = p->next;
p->size = p->size + q->size;
p->next = q->next;
(p->next)->prev = p;
drm_free(q, sizeof(*q), 14);
} else {
}
if ((unsigned long )(p->prev)->file_priv == (unsigned long )((void *)0)) {
q___0 = p->prev;
q___0->size = q___0->size + p->size;
q___0->next = p->next;
(q___0->next)->prev = q___0;
drm_free(p, sizeof(*q___0), 14);
} else {
}
return;
}
}
static int init_heap(struct mem_block **heap , int start , int size )
{
struct mem_block *blocks ;
void *tmp ;
void *tmp___0 ;
struct mem_block *tmp___1 ;
struct mem_block *tmp___2 ;
{
tmp = drm_alloc(sizeof(*blocks), 14);
blocks = tmp;
if (! blocks) {
return (-12);
} else {
}
tmp___0 = drm_alloc(sizeof(*(*heap)), 14);
*heap = tmp___0;
if (! *heap) {
drm_free(blocks, sizeof(*blocks), 14);
return (-12);
} else {
}
blocks->start = start;
blocks->size = size;
blocks->file_priv = (void *)0;
tmp___1 = *heap;
blocks->prev = tmp___1;
blocks->next = tmp___1;
memset(*heap, 0, sizeof(*(*heap)));
(*heap)->file_priv = (struct drm_file *)-1;
tmp___2 = blocks;
(*heap)->prev = tmp___2;
(*heap)->next = tmp___2;
return (0);
}
}
void i915_mem_release(struct drm_device *dev , struct drm_file *file_priv , struct mem_block *heap )
{
struct mem_block *p ;
struct mem_block *q ;
{
if (! heap || ! heap->next) {
return;
} else {
}
p = heap->next;
while (1) {
if ((unsigned long )p != (unsigned long )heap) {
} else {
break;
}
if ((unsigned long )p->file_priv == (unsigned long )file_priv) {
p->file_priv = (void *)0;
mark_block(dev, p, 0);
} else {
}
p = p->next;
}
p = heap->next;
while (1) {
if ((unsigned long )p != (unsigned long )heap) {
} else {
break;
}
while (1) {
if ((unsigned long )p->file_priv == (unsigned long )((void *)0) && (unsigned long )(p->next)->file_priv == (unsigned long )((void *)0)) {
} else {
break;
}
q = p->next;
p->size = p->size + q->size;
p->next = q->next;
(p->next)->prev = p;
drm_free(q, sizeof(*q), 14);
}
p = p->next;
}
return;
}
}
void i915_mem_takedown(struct mem_block **heap )
{
struct mem_block *p ;
struct mem_block *q ;
{
if (! *heap) {
return;
} else {
}
p = (*heap)->next;
while (1) {
if ((unsigned long )p != (unsigned long )*heap) {
} else {
break;
}
q = p;
p = p->next;
drm_free(q, sizeof(*q), 14);
}
drm_free(*heap, sizeof(*(*heap)), 14);
*heap = (void *)0;
return;
}
}
static struct mem_block **get_heap(drm_i915_private_t *dev_priv , int region )
{
{
switch (region) {
case 1:
return (& dev_priv->agp_heap);
default:
return ((void *)0);
}
}
}
int i915_mem_alloc(struct drm_device *dev , void *data , struct drm_file *file_priv )
{
drm_i915_private_t *dev_priv ;
drm_i915_mem_alloc_t *alloc ;
struct mem_block *block ;
struct mem_block **heap ;
unsigned long tmp ;
{
dev_priv = dev->dev_private;
alloc = data;
if (! dev_priv) {
printk("<3>[drm:%s] *ERROR* called with no initialization\n", "i915_mem_alloc");
return (-22);
} else {
}
heap = get_heap(dev_priv, alloc->region);
if (! heap || ! *heap) {
return (-14);
} else {
}
if (alloc->alignment < 12) {
alloc->alignment = 12;
} else {
}
block = alloc_block(*heap, alloc->size, alloc->alignment, file_priv);
if (! block) {
return (-12);
} else {
}
mark_block(dev, block, 1);
tmp = copy_to_user(alloc->region_offset, & block->start, sizeof(int ));
if (tmp) {
printk("<3>[drm:%s] *ERROR* copy_to_user\n", "i915_mem_alloc");
return (-14);
} else {
}
return (0);
}
}
int i915_mem_free(struct drm_device *dev , void *data , struct drm_file *file_priv )
{
drm_i915_private_t *dev_priv ;
drm_i915_mem_free_t *memfree ;
struct mem_block *block ;
struct mem_block **heap ;
{
dev_priv = dev->dev_private;
memfree = data;
if (! dev_priv) {
printk("<3>[drm:%s] *ERROR* called with no initialization\n", "i915_mem_free");
return (-22);
} else {
}
heap = get_heap(dev_priv, memfree->region);
if (! heap || ! *heap) {
return (-14);
} else {
}
block = find_block(*heap, memfree->region_offset);
if (! block) {
return (-14);
} else {
}
if ((unsigned long )block->file_priv != (unsigned long )file_priv) {
return (-1);
} else {
}
mark_block(dev, block, 0);
free_block(block);
return (0);
}
}
int i915_mem_init_heap(struct drm_device *dev , void *data , struct drm_file *file_priv )
{
drm_i915_private_t *dev_priv ;
drm_i915_mem_init_heap_t *initheap ;
struct mem_block **heap ;
int tmp ;
{
dev_priv = dev->dev_private;
initheap = data;
if (! dev_priv) {
printk("<3>[drm:%s] *ERROR* called with no initialization\n", "i915_mem_init_heap");
return (-22);
} else {
}
heap = get_heap(dev_priv, initheap->region);
if (! heap) {
return (-14);
} else {
}
if (*heap) {
printk("<3>[drm:%s] *ERROR* heap already initialized?", "i915_mem_init_heap");
return (-14);
} else {
}
tmp = init_heap(heap, initheap->start, initheap->size);
return (tmp);
}
}
int i915_mem_destroy_heap(struct drm_device *dev , void *data , struct drm_file *file_priv )
{
drm_i915_private_t *dev_priv ;
drm_i915_mem_destroy_heap_t *destroyheap ;
struct mem_block **heap ;
{
dev_priv = dev->dev_private;
destroyheap = data;
if (! dev_priv) {
printk("<3>[drm:%s] *ERROR* called with no initialization\n", "i915_mem_destroy_heap");
return (-22);
} else {
}
heap = get_heap(dev_priv, destroyheap->region);
if (! heap) {
printk("<3>[drm:%s] *ERROR* get_heap failed", "i915_mem_destroy_heap");
return (-14);
} else {
}
if (! *heap) {
printk("<3>[drm:%s] *ERROR* heap not initialized?", "i915_mem_destroy_heap");
return (-14);
} else {
}
i915_mem_takedown(heap);
return (0);
}
}
extern int memcmp(void const *cs , void const *ct , unsigned long count ) ;
extern int register_acpi_notifier(struct notifier_block * ) ;
extern int unregister_acpi_notifier(struct notifier_block * ) ;
extern int pci_bus_read_config_dword(struct pci_bus *bus , unsigned int devfn , int where ,
u32 *val ) ;
extern int pci_bus_write_config_dword(struct pci_bus *bus , unsigned int devfn , int where ,
u32 val ) ;
__inline static int pci_read_config_dword(struct pci_dev *dev , int where , u32 *val )
{
int tmp ;
{
tmp = pci_bus_read_config_dword(dev->bus, dev->devfn, where, val);
return (tmp);
}
}
__inline static int pci_write_config_dword(struct pci_dev *dev , int where , u32 val )
{
int tmp ;
{
tmp = pci_bus_write_config_dword(dev->bus, dev->devfn, where, val);
return (tmp);
}
}
static u32 asle_set_backlight(struct drm_device *dev , u32 bclp )
{
struct drm_i915_private *dev_priv ;
struct opregion_asle *asle ;
u32 blc_pwm_ctl ;
u32 blc_pwm_ctl2 ;
{
dev_priv = dev->dev_private;
asle = dev_priv->opregion.asle;
if (! (bclp & (unsigned int )(1 << 31))) {
return (2 << 12);
} else {
}
bclp = bclp & (unsigned int )(~ (1 << 31));
if (bclp < (u32 )0 || bclp > (u32 )255) {
return (2 << 12);
} else {
}
blc_pwm_ctl = readl(dev_priv->regs + 397908);
blc_pwm_ctl = blc_pwm_ctl & (unsigned int )(~ 65535);
blc_pwm_ctl2 = readl(dev_priv->regs + 397904);
if (blc_pwm_ctl2 & (unsigned int )(1 << 30)) {
pci_write_config_dword(dev->pdev, 244, bclp);
} else {
writel(blc_pwm_ctl | (bclp * (u32 )257 - (u32 )1), dev_priv->regs + 397908);
}
asle->cblv = (bclp * (u32 )100) / (u32 )255 | (unsigned int )(1 << 31);
return (0);
}
}
static u32 asle_set_als_illum(struct drm_device *dev , u32 alsi )
{
{
return (0);
}
}
static u32 asle_set_pwm_freq(struct drm_device *dev , u32 pfmb )
{
struct drm_i915_private *dev_priv ;
u32 blc_pwm_ctl ;
unsigned int tmp ;
u32 pwm ;
{
dev_priv = dev->dev_private;
if (pfmb & (unsigned int )(1 << 31)) {
tmp = readl(dev_priv->regs + 397908);
blc_pwm_ctl = tmp;
pwm = pfmb & 2147483136U;
blc_pwm_ctl = blc_pwm_ctl & 65535U;
pwm = pwm >> 9;
} else {
}
return (0);
}
}
static u32 asle_set_pfit(struct drm_device *dev , u32 pfit )
{
{
if (! (pfit & (unsigned int )(1 << 31))) {
return (2 << 14);
} else {
}
return (0);
}
}
void opregion_asle_intr(struct drm_device *dev )
{
struct drm_i915_private *dev_priv ;
struct opregion_asle *asle ;
u32 asle_stat ;
u32 asle_req ;
u32 tmp ;
u32 tmp___0 ;
u32 tmp___1 ;
u32 tmp___2 ;
{
dev_priv = dev->dev_private;
asle = dev_priv->opregion.asle;
asle_stat = 0;
if (! asle) {
return;
} else {
}
asle_req = asle->aslc & 15U;
if (! asle_req) {
while (1) {
if (drm_debug) {
printk("<7>[drm:%s] non asle set request??\n", "opregion_asle_intr");
} else {
}
break;
}
return;
} else {
}
if (asle_req & (unsigned int )(1 << 0)) {
tmp = asle_set_als_illum(dev, asle->alsi);
asle_stat = asle_stat | tmp;
} else {
}
if (asle_req & (unsigned int )(1 << 1)) {
tmp___0 = asle_set_backlight(dev, asle->bclp);
asle_stat = asle_stat | tmp___0;
} else {
}
if (asle_req & (unsigned int )(1 << 2)) {
tmp___1 = asle_set_pfit(dev, asle->pfit);
asle_stat = asle_stat | tmp___1;
} else {
}
if (asle_req & (unsigned int )(1 << 3)) {
tmp___2 = asle_set_pwm_freq(dev, asle->pfmb);
asle_stat = asle_stat | tmp___2;
} else {
}
asle->aslc = asle_stat;
return;
}
}
void opregion_enable_asle(struct drm_device *dev )
{
struct drm_i915_private *dev_priv ;
struct opregion_asle *asle ;
u32 pipeb_stats ;
unsigned int tmp ;
{
dev_priv = dev->dev_private;
asle = dev_priv->opregion.asle;
if (asle) {
tmp = readl(dev_priv->regs + 462884);
pipeb_stats = tmp;
if (((((dev->pci_device == 13687 || dev->pci_device == 13698) || dev->pci_device == 9618) || (dev->pci_device == 10146 || dev->pci_device == 10158)) || dev->pci_device == 10754) || dev->pci_device == 10818) {
pipeb_stats = (unsigned long )pipeb_stats | (1UL << 22);
writel(pipeb_stats, dev_priv->regs + 462884);
i915_enable_irq(dev_priv, (1 << 0) | (1 << 4));
} else {
i915_enable_irq(dev_priv, 1 << 0);
}
asle->tche = (((1 << 0) | (1 << 1)) | (1 << 2)) | (1 << 3);
asle->ardy = 1;
} else {
}
return;
}
}
static struct intel_opregion *system_opregion ;
int intel_opregion_video_event(struct notifier_block *nb , unsigned long val , void *data )
{
struct opregion_acpi *acpi ;
{
if (! system_opregion) {
return (0);
} else {
}
acpi = system_opregion->acpi;
acpi->csts = 0;
return (1);
}
}
static struct notifier_block intel_opregion_notifier = {& intel_opregion_video_event, 0, 0};
int intel_opregion_init(struct drm_device *dev )
{
struct drm_i915_private *dev_priv ;
struct intel_opregion *opregion ;
void *base ;
u32 asls ;
u32 mboxes ;
int err ;
int tmp ;
{
dev_priv = dev->dev_private;
opregion = & dev_priv->opregion;
err = 0;
pci_read_config_dword(dev->pdev, 252, & asls);
while (1) {
if (drm_debug) {
printk("<7>[drm:%s] graphic opregion physical addr: 0x%x\n", "intel_opregion_init",
asls);
} else {
}
break;
}
if (asls == (u32 )0) {
while (1) {
if (drm_debug) {
printk("<7>[drm:%s] ACPI OpRegion not supported!\n", "intel_opregion_init");
} else {
}
break;
}
return (-524);
} else {
}
base = ioremap(asls, 8 * 1024);
if (! base) {
return (-12);
} else {
}
opregion->header = base;
tmp = memcmp((opregion->header)->signature, "IntelGraphicsMem", 16);
if (tmp) {
while (1) {
if (drm_debug) {
printk("<7>[drm:%s] opregion signature mismatch\n", "intel_opregion_init");
} else {
}
break;
}
err = -22;
goto err_out;
} else {
}
mboxes = (opregion->header)->mboxes;
if (mboxes & (unsigned int )(1 << 0)) {
while (1) {
if (drm_debug) {
printk("<7>[drm:%s] Public ACPI methods supported\n", "intel_opregion_init");
} else {
}
break;
}
opregion->acpi = base + 256;
} else {
while (1) {
if (drm_debug) {
printk("<7>[drm:%s] Public ACPI methods not supported\n", "intel_opregion_init");
} else {
}
break;
}
err = -524;
goto err_out;
}
opregion->enabled = 1;
if (mboxes & (unsigned int )(1 << 1)) {
while (1) {
if (drm_debug) {
printk("<7>[drm:%s] SWSCI supported\n", "intel_opregion_init");
} else {
}
break;
}
opregion->swsci = base + 512;
} else {
}
if (mboxes & (unsigned int )(1 << 2)) {
while (1) {
if (drm_debug) {
printk("<7>[drm:%s] ASLE supported\n", "intel_opregion_init");
} else {
}
break;
}
opregion->asle = base + 768;
} else {
}
(opregion->acpi)->csts = 0;
(opregion->acpi)->drdy = 1;
system_opregion = opregion;
register_acpi_notifier(& intel_opregion_notifier);
return (0);
err_out:
iounmap(opregion->header);
opregion->header = (void *)0;
return (err);
}
}
void intel_opregion_free(struct drm_device *dev )
{
struct drm_i915_private *dev_priv ;
struct intel_opregion *opregion ;
{
dev_priv = dev->dev_private;
opregion = & dev_priv->opregion;
if (! opregion->enabled) {
return;
} else {
}
(opregion->acpi)->drdy = 0;
system_opregion = (void *)0;
unregister_acpi_notifier(& intel_opregion_notifier);
iounmap(opregion->header);
opregion->header = (void *)0;
opregion->acpi = (void *)0;
opregion->swsci = (void *)0;
opregion->asle = (void *)0;
opregion->enabled = 0;
return;
}
}
void ldv_main4_sequence_infinite_withcheck_stateful(void)
{
struct notifier_block *var_group1 ;
unsigned long var_intel_opregion_video_event_6_p1 ;
void *var_intel_opregion_video_event_6_p2 ;
int tmp ;
int tmp___0 ;
{
LDV_IN_INTERRUPT = 1;
ldv_initialize();
while (1) {
tmp___0 = nondet_int();
if (tmp___0) {
} else {
break;
}
tmp = nondet_int();
switch (tmp) {
case 0:
ldv_handler_precall();
intel_opregion_video_event(var_group1, var_intel_opregion_video_event_6_p1, var_intel_opregion_video_event_6_p2);
break;
default:
break;
}
}
ldv_check_final_state();
return;
}
}
extern void __bad_udelay(void) ;
extern void __const_udelay(unsigned long xloops ) ;
extern int pci_bus_read_config_byte(struct pci_bus *bus , unsigned int devfn , int where ,
u8 *val ) ;
extern int pci_bus_write_config_byte(struct pci_bus *bus , unsigned int devfn , int where ,
u8 val ) ;
__inline static int pci_read_config_byte(struct pci_dev *dev , int where , u8 *val )
{
int tmp ;
{
tmp = pci_bus_read_config_byte(dev->bus, dev->devfn, where, val);
return (tmp);
}
}
__inline static int pci_write_config_byte(struct pci_dev *dev , int where , u8 val )
{
int tmp ;
{
tmp = pci_bus_write_config_byte(dev->bus, dev->devfn, where, val);
return (tmp);
}
}
__inline static unsigned char readb(void const volatile *addr )
{
unsigned char ret ;
{
__asm__ volatile ("mov"
"b"
" %1,%0": "=q" (ret): "m" (*((unsigned char volatile *)addr)): "memory");
return (ret);
}
}
__inline static void writeb(unsigned char val , void volatile *addr )
{
{
__asm__ volatile ("mov"
"b"
" %0,%1": : "q" (val), "m" (*((unsigned char volatile *)addr)): "memory");
return;
}
}
static bool i915_pipe_enabled___0(struct drm_device *dev , enum pipe pipe )
{
struct drm_i915_private *dev_priv ;
unsigned int tmp ;
unsigned int tmp___0 ;
{
dev_priv = dev->dev_private;
if ((unsigned int )pipe == (unsigned int )PIPE_A) {
tmp = readl(dev_priv->regs + 24596);
return (tmp & (unsigned int )(1 << 31));
} else {
tmp___0 = readl(dev_priv->regs + 24600);
return (tmp___0 & (unsigned int )(1 << 31));
}
}
}
static void i915_save_palette(struct drm_device *dev , enum pipe pipe )
{
struct drm_i915_private *dev_priv ;
unsigned long reg ;
u32 *array ;
int i ;
bool tmp ;
{
dev_priv = dev->dev_private;
reg = (unsigned int )pipe == (unsigned int )PIPE_A ? 40960 : 43008;
tmp = i915_pipe_enabled___0(dev, pipe);
if (tmp) {
} else {
return;
}
if ((unsigned int )pipe == (unsigned int )PIPE_A) {
array = dev_priv->save_palette_a;
} else {
array = dev_priv->save_palette_b;
}
i = 0;
while (1) {
if (i < 256) {
} else {
break;
}
*(array + i) = readl(dev_priv->regs + (reg + (unsigned long )(i << 2)));
i = i + 1;
}
return;
}
}
static void i915_restore_palette(struct drm_device *dev , enum pipe pipe )
{
struct drm_i915_private *dev_priv ;
unsigned long reg ;
u32 *array ;
int i ;
bool tmp ;
{
dev_priv = dev->dev_private;
reg = (unsigned int )pipe == (unsigned int )PIPE_A ? 40960 : 43008;
tmp = i915_pipe_enabled___0(dev, pipe);
if (tmp) {
} else {
return;
}
if ((unsigned int )pipe == (unsigned int )PIPE_A) {
array = dev_priv->save_palette_a;
} else {
array = dev_priv->save_palette_b;
}
i = 0;
while (1) {
if (i < 256) {
} else {
break;
}
writel(*(array + i), dev_priv->regs + (reg + (unsigned long )(i << 2)));
i = i + 1;
}
return;
}
}
static u8 i915_read_indexed(struct drm_device *dev , u16 index_port , u16 data_port ,
u8 reg )
{
struct drm_i915_private *dev_priv ;
unsigned char tmp ;
{
dev_priv = dev->dev_private;
writeb(reg, dev_priv->regs + (int )index_port);
tmp = readb(dev_priv->regs + (int )data_port);
return (tmp);
}
}
static u8 i915_read_ar(struct drm_device *dev , u16 st01 , u8 reg , u16 palette_enable )
{
struct drm_i915_private *dev_priv ;
unsigned char tmp ;
{
dev_priv = dev->dev_private;
readb(dev_priv->regs + (int )st01);
writeb((int )palette_enable | (int )reg, dev_priv->regs + 960);
tmp = readb(dev_priv->regs + 961);
return (tmp);
}
}
static void i915_write_ar(struct drm_device *dev , u16 st01 , u8 reg , u8 val , u16 palette_enable )
{
struct drm_i915_private *dev_priv ;
{
dev_priv = dev->dev_private;
readb(dev_priv->regs + (int )st01);
writeb((int )palette_enable | (int )reg, dev_priv->regs + 960);
writeb(val, dev_priv->regs + 960);
return;
}
}
static void i915_write_indexed(struct drm_device *dev , u16 index_port , u16 data_port ,
u8 reg , u8 val )
{
struct drm_i915_private *dev_priv ;
{
dev_priv = dev->dev_private;
writeb(reg, dev_priv->regs + (int )index_port);
writeb(val, dev_priv->regs + (int )data_port);
return;
}
}
static void i915_save_vga(struct drm_device *dev )
{
struct drm_i915_private *dev_priv ;
int i ;
u16 cr_index ;
u16 cr_data ;
u16 st01 ;
u8 tmp ;
{
dev_priv = dev->dev_private;
dev_priv->saveDACMASK = readb(dev_priv->regs + 966);
writeb(0, dev_priv->regs + 967);
i = 0;
while (1) {
if (i < 256 * 3) {
} else {
break;
}
dev_priv->saveDACDATA[i] = readb(dev_priv->regs + 969);
i = i + 1;
}
dev_priv->saveMSR = readb(dev_priv->regs + 972);
if ((int )dev_priv->saveMSR & (1 << 0)) {
cr_index = 980;
cr_data = 981;
st01 = 986;
} else {
cr_index = 948;
cr_data = 949;
st01 = 954;
}
tmp = i915_read_indexed(dev, cr_index, cr_data, 17);
i915_write_indexed(dev, cr_index, cr_data, 17, (int )tmp & ~ 128);
i = 0;
while (1) {
if (i <= 36) {
} else {
break;
}
dev_priv->saveCR[i] = i915_read_indexed(dev, cr_index, cr_data, i);
i = i + 1;
}
dev_priv->saveCR[17] = (int )dev_priv->saveCR[17] & ~ 128;
readb(dev_priv->regs + (int )st01);
dev_priv->saveAR_INDEX = readb(dev_priv->regs + 960);
i = 0;
while (1) {
if (i <= 20) {
} else {
break;
}
dev_priv->saveAR[i] = i915_read_ar(dev, st01, i, 0);
i = i + 1;
}
readb(dev_priv->regs + (int )st01);
writeb(dev_priv->saveAR_INDEX, dev_priv->regs + 960);
readb(dev_priv->regs + (int )st01);
i = 0;
while (1) {
if (i < 9) {
} else {
break;
}
dev_priv->saveGR[i] = i915_read_indexed(dev, 974, 975, i);
i = i + 1;
}
dev_priv->saveGR[16] = i915_read_indexed(dev, 974, 975, 16);
dev_priv->saveGR[17] = i915_read_indexed(dev, 974, 975, 17);
dev_priv->saveGR[24] = i915_read_indexed(dev, 974, 975, 24);
i = 0;
while (1) {
if (i < 8) {
} else {
break;
}
dev_priv->saveSR[i] = i915_read_indexed(dev, 964, 965, i);
i = i + 1;
}
return;
}
}
static void i915_restore_vga(struct drm_device *dev )
{
struct drm_i915_private *dev_priv ;
int i ;
u16 cr_index ;
u16 cr_data ;
u16 st01 ;
{
dev_priv = dev->dev_private;
writeb(dev_priv->saveMSR, dev_priv->regs + 962);
if ((int )dev_priv->saveMSR & (1 << 0)) {
cr_index = 980;
cr_data = 981;
st01 = 986;
} else {
cr_index = 948;
cr_data = 949;
st01 = 954;
}
i = 0;
while (1) {
if (i < 7) {
} else {
break;
}
i915_write_indexed(dev, 964, 965, i, dev_priv->saveSR[i]);
i = i + 1;
}
i915_write_indexed(dev, cr_index, cr_data, 17, dev_priv->saveCR[17]);
i = 0;
while (1) {
if (i <= 36) {
} else {
break;
}
i915_write_indexed(dev, cr_index, cr_data, i, dev_priv->saveCR[i]);
i = i + 1;
}
i = 0;
while (1) {
if (i < 9) {
} else {
break;
}
i915_write_indexed(dev, 974, 975, i, dev_priv->saveGR[i]);
i = i + 1;
}
i915_write_indexed(dev, 974, 975, 16, dev_priv->saveGR[16]);
i915_write_indexed(dev, 974, 975, 17, dev_priv->saveGR[17]);
i915_write_indexed(dev, 974, 975, 24, dev_priv->saveGR[24]);
readb(dev_priv->regs + (int )st01);
i = 0;
while (1) {
if (i <= 20) {
} else {
break;
}
i915_write_ar(dev, st01, i, dev_priv->saveAR[i], 0);
i = i + 1;
}
readb(dev_priv->regs + (int )st01);
writeb((int )dev_priv->saveAR_INDEX | 32, dev_priv->regs + 960);
readb(dev_priv->regs + (int )st01);
writeb(dev_priv->saveDACMASK, dev_priv->regs + 966);
writeb(0, dev_priv->regs + 968);
i = 0;
while (1) {
if (i < 256 * 3) {
} else {
break;
}
writeb(dev_priv->saveDACDATA[i], dev_priv->regs + 969);
i = i + 1;
}
return;
}
}
int i915_save_state(struct drm_device *dev )
{
struct drm_i915_private *dev_priv ;
int i ;
{
dev_priv = dev->dev_private;
pci_read_config_byte(dev->pdev, 244, & dev_priv->saveLBB);
dev_priv->saveDSPARB = readl(dev_priv->regs + 458800);
dev_priv->savePIPEACONF = readl(dev_priv->regs + 458760);
dev_priv->savePIPEASRC = readl(dev_priv->regs + 393244);
dev_priv->saveFPA0 = readl(dev_priv->regs + 24640);
dev_priv->saveFPA1 = readl(dev_priv->regs + 24644);
dev_priv->saveDPLL_A = readl(dev_priv->regs + 24596);
if (((((((((dev->pci_device == 10610 || dev->pci_device == 10626) || dev->pci_device == 10642) || dev->pci_device == 10658) || dev->pci_device == 10754) || dev->pci_device == 10770) || dev->pci_device == 10818) || dev->pci_device == 11778) || dev->pci_device == 11794) || dev->pci_device == 11810) {
dev_priv->saveDPLL_A_MD = readl(dev_priv->regs + 24604);
} else {
}
dev_priv->saveHTOTAL_A = readl(dev_priv->regs + 393216);
dev_priv->saveHBLANK_A = readl(dev_priv->regs + 393220);
dev_priv->saveHSYNC_A = readl(dev_priv->regs + 393224);
dev_priv->saveVTOTAL_A = readl(dev_priv->regs + 393228);
dev_priv->saveVBLANK_A = readl(dev_priv->regs + 393232);
dev_priv->saveVSYNC_A = readl(dev_priv->regs + 393236);
dev_priv->saveBCLRPAT_A = readl(dev_priv->regs + 393248);
dev_priv->saveDSPACNTR = readl(dev_priv->regs + 459136);
dev_priv->saveDSPASTRIDE = readl(dev_priv->regs + 459144);
dev_priv->saveDSPASIZE = readl(dev_priv->regs + 459152);
dev_priv->saveDSPAPOS = readl(dev_priv->regs + 459148);
dev_priv->saveDSPAADDR = readl(dev_priv->regs + 459140);
if (((((((((dev->pci_device == 10610 || dev->pci_device == 10626) || dev->pci_device == 10642) || dev->pci_device == 10658) || dev->pci_device == 10754) || dev->pci_device == 10770) || dev->pci_device == 10818) || dev->pci_device == 11778) || dev->pci_device == 11794) || dev->pci_device == 11810) {
dev_priv->saveDSPASURF = readl(dev_priv->regs + 459164);
dev_priv->saveDSPATILEOFF = readl(dev_priv->regs + 459172);
} else {
}
i915_save_palette(dev, PIPE_A);
dev_priv->savePIPEASTAT = readl(dev_priv->regs + 458788);
dev_priv->savePIPEBCONF = readl(dev_priv->regs + 462856);
dev_priv->savePIPEBSRC = readl(dev_priv->regs + 397340);
dev_priv->saveFPB0 = readl(dev_priv->regs + 24648);
dev_priv->saveFPB1 = readl(dev_priv->regs + 24652);
dev_priv->saveDPLL_B = readl(dev_priv->regs + 24600);
if (((((((((dev->pci_device == 10610 || dev->pci_device == 10626) || dev->pci_device == 10642) || dev->pci_device == 10658) || dev->pci_device == 10754) || dev->pci_device == 10770) || dev->pci_device == 10818) || dev->pci_device == 11778) || dev->pci_device == 11794) || dev->pci_device == 11810) {
dev_priv->saveDPLL_B_MD = readl(dev_priv->regs + 24608);
} else {
}
dev_priv->saveHTOTAL_B = readl(dev_priv->regs + 397312);
dev_priv->saveHBLANK_B = readl(dev_priv->regs + 397316);
dev_priv->saveHSYNC_B = readl(dev_priv->regs + 397320);
dev_priv->saveVTOTAL_B = readl(dev_priv->regs + 397324);
dev_priv->saveVBLANK_B = readl(dev_priv->regs + 397328);
dev_priv->saveVSYNC_B = readl(dev_priv->regs + 397332);
dev_priv->saveBCLRPAT_A = readl(dev_priv->regs + 393248);
dev_priv->saveDSPBCNTR = readl(dev_priv->regs + 463232);
dev_priv->saveDSPBSTRIDE = readl(dev_priv->regs + 463240);
dev_priv->saveDSPBSIZE = readl(dev_priv->regs + 463248);
dev_priv->saveDSPBPOS = readl(dev_priv->regs + 463244);
dev_priv->saveDSPBADDR = readl(dev_priv->regs + 463236);
if (dev->pci_device == 10754 || dev->pci_device == 10818) {
dev_priv->saveDSPBSURF = readl(dev_priv->regs + 463260);
dev_priv->saveDSPBTILEOFF = readl(dev_priv->regs + 463268);
} else {
}
i915_save_palette(dev, PIPE_B);
dev_priv->savePIPEBSTAT = readl(dev_priv->regs + 462884);
dev_priv->saveADPA = readl(dev_priv->regs + 397568);
dev_priv->savePP_CONTROL = readl(dev_priv->regs + 397828);
dev_priv->savePFIT_PGM_RATIOS = readl(dev_priv->regs + 397876);
dev_priv->saveBLC_PWM_CTL = readl(dev_priv->regs + 397908);
if (((((((((dev->pci_device == 10610 || dev->pci_device == 10626) || dev->pci_device == 10642) || dev->pci_device == 10658) || dev->pci_device == 10754) || dev->pci_device == 10770) || dev->pci_device == 10818) || dev->pci_device == 11778) || dev->pci_device == 11794) || dev->pci_device == 11810) {
dev_priv->saveBLC_PWM_CTL2 = readl(dev_priv->regs + 397904);
} else {
}
if ((((((dev->pci_device == 13687 || dev->pci_device == 13698) || dev->pci_device == 9618) || (dev->pci_device == 10146 || dev->pci_device == 10158)) || dev->pci_device == 10754) || dev->pci_device == 10818) && ! (dev->pci_device == 13687)) {
dev_priv->saveLVDS = readl(dev_priv->regs + 397696);
} else {
}
if (! (dev->pci_device == 13687) && ! (dev->pci_device == 9570)) {
dev_priv->savePFIT_CONTROL = readl(dev_priv->regs + 397872);
} else {
}
dev_priv->savePP_ON_DELAYS = readl(dev_priv->regs + 397832);
dev_priv->savePP_OFF_DELAYS = readl(dev_priv->regs + 397836);
dev_priv->savePP_DIVISOR = readl(dev_priv->regs + 397840);
dev_priv->saveFBC_CFB_BASE = readl(dev_priv->regs + 12800);
dev_priv->saveFBC_LL_BASE = readl(dev_priv->regs + 12804);
dev_priv->saveFBC_CONTROL2 = readl(dev_priv->regs + 12820);
dev_priv->saveFBC_CONTROL = readl(dev_priv->regs + 12808);
dev_priv->saveIIR = readl(dev_priv->regs + 8356);
dev_priv->saveIER = readl(dev_priv->regs + 8352);
dev_priv->saveIMR = readl(dev_priv->regs + 8360);
dev_priv->saveVGA0 = readl(dev_priv->regs + 24576);
dev_priv->saveVGA1 = readl(dev_priv->regs + 24580);
dev_priv->saveVGA_PD = readl(dev_priv->regs + 24592);
dev_priv->saveVGACNTRL = readl(dev_priv->regs + 463872);
dev_priv->saveD_STATE = readl(dev_priv->regs + 24836);
dev_priv->saveCG_2D_DIS = readl(dev_priv->regs + 25088);
dev_priv->saveCACHE_MODE_0 = readl(dev_priv->regs + 8480);
dev_priv->saveMI_ARB_STATE = readl(dev_priv->regs + 8420);
i = 0;
while (1) {
if (i < 16) {
} else {
break;
}
dev_priv->saveSWF0[i] = readl(dev_priv->regs + (463888 + (i << 2)));
dev_priv->saveSWF1[i] = readl(dev_priv->regs + (459792 + (i << 2)));
i = i + 1;
}
i = 0;
while (1) {
if (i < 3) {
} else {
break;
}
dev_priv->saveSWF2[i] = readl(dev_priv->regs + (467988 + (i << 2)));
i = i + 1;
}
i915_save_vga(dev);
return (0);
}
}
int i915_restore_state(struct drm_device *dev )
{
struct drm_i915_private *dev_priv ;
int i ;
unsigned int tmp ;
unsigned int tmp___0 ;
{
dev_priv = dev->dev_private;
pci_write_config_byte(dev->pdev, 244, dev_priv->saveLBB);
writel(dev_priv->saveDSPARB, dev_priv->regs + 458800);
if (dev_priv->saveDPLL_A & (unsigned int )(1 << 31)) {
writel(dev_priv->saveDPLL_A & (unsigned int )(~ (1 << 31)), dev_priv->regs + 24596);
if (150 > 20000) {
__bad_udelay();
} else {
__const_udelay(150UL * 4295UL);
}
} else {
}
writel(dev_priv->saveFPA0, dev_priv->regs + 24640);
writel(dev_priv->saveFPA1, dev_priv->regs + 24644);
writel(dev_priv->saveDPLL_A, dev_priv->regs + 24596);
if (150 > 20000) {
__bad_udelay();
} else {
__const_udelay(150UL * 4295UL);
}
if (((((((((dev->pci_device == 10610 || dev->pci_device == 10626) || dev->pci_device == 10642) || dev->pci_device == 10658) || dev->pci_device == 10754) || dev->pci_device == 10770) || dev->pci_device == 10818) || dev->pci_device == 11778) || dev->pci_device == 11794) || dev->pci_device == 11810) {
writel(dev_priv->saveDPLL_A_MD, dev_priv->regs + 24604);
} else {
}
if (150 > 20000) {
__bad_udelay();
} else {
__const_udelay(150UL * 4295UL);
}
writel(dev_priv->saveHTOTAL_A, dev_priv->regs + 393216);
writel(dev_priv->saveHBLANK_A, dev_priv->regs + 393220);
writel(dev_priv->saveHSYNC_A, dev_priv->regs + 393224);
writel(dev_priv->saveVTOTAL_A, dev_priv->regs + 393228);
writel(dev_priv->saveVBLANK_A, dev_priv->regs + 393232);
writel(dev_priv->saveVSYNC_A, dev_priv->regs + 393236);
writel(dev_priv->saveBCLRPAT_A, dev_priv->regs + 393248);
writel(dev_priv->saveDSPASIZE, dev_priv->regs + 459152);
writel(dev_priv->saveDSPAPOS, dev_priv->regs + 459148);
writel(dev_priv->savePIPEASRC, dev_priv->regs + 393244);
writel(dev_priv->saveDSPAADDR, dev_priv->regs + 459140);
writel(dev_priv->saveDSPASTRIDE, dev_priv->regs + 459144);
if (((((((((dev->pci_device == 10610 || dev->pci_device == 10626) || dev->pci_device == 10642) || dev->pci_device == 10658) || dev->pci_device == 10754) || dev->pci_device == 10770) || dev->pci_device == 10818) || dev->pci_device == 11778) || dev->pci_device == 11794) || dev->pci_device == 11810) {
writel(dev_priv->saveDSPASURF, dev_priv->regs + 459164);
writel(dev_priv->saveDSPATILEOFF, dev_priv->regs + 459172);
} else {
}
writel(dev_priv->savePIPEACONF, dev_priv->regs + 458760);
i915_restore_palette(dev, PIPE_A);
writel(dev_priv->saveDSPACNTR, dev_priv->regs + 459136);
tmp = readl(dev_priv->regs + 459140);
writel(tmp, dev_priv->regs + 459140);
if (dev_priv->saveDPLL_B & (unsigned int )(1 << 31)) {
writel(dev_priv->saveDPLL_B & (unsigned int )(~ (1 << 31)), dev_priv->regs + 24600);
if (150 > 20000) {
__bad_udelay();
} else {
__const_udelay(150UL * 4295UL);
}
} else {
}
writel(dev_priv->saveFPB0, dev_priv->regs + 24648);
writel(dev_priv->saveFPB1, dev_priv->regs + 24652);
writel(dev_priv->saveDPLL_B, dev_priv->regs + 24600);
if (150 > 20000) {
__bad_udelay();
} else {
__const_udelay(150UL * 4295UL);
}
if (((((((((dev->pci_device == 10610 || dev->pci_device == 10626) || dev->pci_device == 10642) || dev->pci_device == 10658) || dev->pci_device == 10754) || dev->pci_device == 10770) || dev->pci_device == 10818) || dev->pci_device == 11778) || dev->pci_device == 11794) || dev->pci_device == 11810) {
writel(dev_priv->saveDPLL_B_MD, dev_priv->regs + 24608);
} else {
}
if (150 > 20000) {
__bad_udelay();
} else {
__const_udelay(150UL * 4295UL);
}
writel(dev_priv->saveHTOTAL_B, dev_priv->regs + 397312);
writel(dev_priv->saveHBLANK_B, dev_priv->regs + 397316);
writel(dev_priv->saveHSYNC_B, dev_priv->regs + 397320);
writel(dev_priv->saveVTOTAL_B, dev_priv->regs + 397324);
writel(dev_priv->saveVBLANK_B, dev_priv->regs + 397328);
writel(dev_priv->saveVSYNC_B, dev_priv->regs + 397332);
writel(dev_priv->saveBCLRPAT_B, dev_priv->regs + 397344);
writel(dev_priv->saveDSPBSIZE, dev_priv->regs + 463248);
writel(dev_priv->saveDSPBPOS, dev_priv->regs + 463244);
writel(dev_priv->savePIPEBSRC, dev_priv->regs + 397340);
writel(dev_priv->saveDSPBADDR, dev_priv->regs + 463236);
writel(dev_priv->saveDSPBSTRIDE, dev_priv->regs + 463240);
if (((((((((dev->pci_device == 10610 || dev->pci_device == 10626) || dev->pci_device == 10642) || dev->pci_device == 10658) || dev->pci_device == 10754) || dev->pci_device == 10770) || dev->pci_device == 10818) || dev->pci_device == 11778) || dev->pci_device == 11794) || dev->pci_device == 11810) {
writel(dev_priv->saveDSPBSURF, dev_priv->regs + 463260);
writel(dev_priv->saveDSPBTILEOFF, dev_priv->regs + 463268);
} else {
}
writel(dev_priv->savePIPEBCONF, dev_priv->regs + 462856);
i915_restore_palette(dev, PIPE_B);
writel(dev_priv->saveDSPBCNTR, dev_priv->regs + 463232);
tmp___0 = readl(dev_priv->regs + 463236);
writel(tmp___0, dev_priv->regs + 463236);
writel(dev_priv->saveADPA, dev_priv->regs + 397568);
if (((((((((dev->pci_device == 10610 || dev->pci_device == 10626) || dev->pci_device == 10642) || dev->pci_device == 10658) || dev->pci_device == 10754) || dev->pci_device == 10770) || dev->pci_device == 10818) || dev->pci_device == 11778) || dev->pci_device == 11794) || dev->pci_device == 11810) {
writel(dev_priv->saveBLC_PWM_CTL2, dev_priv->regs + 397904);
} else {
}
if ((((((dev->pci_device == 13687 || dev->pci_device == 13698) || dev->pci_device == 9618) || (dev->pci_device == 10146 || dev->pci_device == 10158)) || dev->pci_device == 10754) || dev->pci_device == 10818) && ! (dev->pci_device == 13687)) {
writel(dev_priv->saveLVDS, dev_priv->regs + 397696);
} else {
}
if (! (dev->pci_device == 13687) && ! (dev->pci_device == 9570)) {
writel(dev_priv->savePFIT_CONTROL, dev_priv->regs + 397872);
} else {
}
writel(dev_priv->savePFIT_PGM_RATIOS, dev_priv->regs + 397876);
writel(dev_priv->saveBLC_PWM_CTL, dev_priv->regs + 397908);
writel(dev_priv->savePP_ON_DELAYS, dev_priv->regs + 397832);
writel(dev_priv->savePP_OFF_DELAYS, dev_priv->regs + 397836);
writel(dev_priv->savePP_DIVISOR, dev_priv->regs + 397840);
writel(dev_priv->savePP_CONTROL, dev_priv->regs + 397828);
writel(dev_priv->saveFBC_CFB_BASE, dev_priv->regs + 12800);
writel(dev_priv->saveFBC_LL_BASE, dev_priv->regs + 12804);
writel(dev_priv->saveFBC_CONTROL2, dev_priv->regs + 12820);
writel(dev_priv->saveFBC_CONTROL, dev_priv->regs + 12808);
writel(dev_priv->saveVGACNTRL, dev_priv->regs + 463872);
writel(dev_priv->saveVGA0, dev_priv->regs + 24576);
writel(dev_priv->saveVGA1, dev_priv->regs + 24580);
writel(dev_priv->saveVGA_PD, dev_priv->regs + 24592);
if (150 > 20000) {
__bad_udelay();
} else {
__const_udelay(150UL * 4295UL);
}
writel(dev_priv->saveD_STATE, dev_priv->regs + 24836);
writel(dev_priv->saveCG_2D_DIS, dev_priv->regs + 25088);
writel(dev_priv->saveCACHE_MODE_0 | 4294901760U, dev_priv->regs + 8480);
writel(dev_priv->saveMI_ARB_STATE | 4294901760U, dev_priv->regs + 8420);
i = 0;
while (1) {
if (i < 16) {
} else {
break;
}
writel(dev_priv->saveSWF0[i], dev_priv->regs + (463888 + (i << 2)));
writel(dev_priv->saveSWF1[i + 7], dev_priv->regs + (459792 + (i << 2)));
i = i + 1;
}
i = 0;
while (1) {
if (i < 3) {
} else {
break;
}
writel(dev_priv->saveSWF2[i], dev_priv->regs + (467988 + (i << 2)));
i = i + 1;
}
i915_restore_vga(dev);
return (0);
}
}
__inline static void __list_del(struct list_head *prev , struct list_head *next )
{
{
next->prev = prev;
prev->next = next;
return;
}
}
__inline static void list_del_init(struct list_head *entry )
{
{
__list_del(entry->prev, entry->next);
INIT_LIST_HEAD(entry);
return;
}
}
__inline static void list_move_tail(struct list_head *list , struct list_head *head )
{
{
__list_del(list->prev, list->next);
list_add_tail(list, head);
return;
}
}
__inline static int list_empty(struct list_head const *head )
{
{
return ((unsigned long )head->next == (unsigned long )head);
}
}
__inline static void atomic_add(int i , atomic_t *v )
{
{
__asm__ volatile (".section .smp_locks,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"661f\n"
".previous\n"
"661:\n\tlock; "
"addl %1,%0": "=m" (v->counter): "ir" (i), "m" (v->counter));
return;
}
}
__inline static void atomic_sub(int i , atomic_t *v )
{
{
__asm__ volatile (".section .smp_locks,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"661f\n"
".previous\n"
"661:\n\tlock; "
"subl %1,%0": "=m" (v->counter): "ir" (i), "m" (v->counter));
return;
}
}
__inline static void atomic_dec(atomic_t *v )
{
{
__asm__ volatile (".section .smp_locks,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"661f\n"
".previous\n"
"661:\n\tlock; "
"decl %0": "=m" (v->counter): "m" (v->counter));
return;
}
}
extern void prepare_to_wait(wait_queue_head_t *q , wait_queue_t *wait , int state ) ;
extern void finish_wait(wait_queue_head_t *q , wait_queue_t *wait ) ;
extern int autoremove_wake_function(wait_queue_t *wait , unsigned int mode , int sync ,
void *key ) ;
__inline static int mutex_is_locked(struct mutex *lock )
{
{
return (lock->count.counter != 1);
}
}
extern void down_write(struct rw_semaphore *sem ) ;
extern void up_write(struct rw_semaphore *sem ) ;
extern void msleep(unsigned int msecs ) ;
extern void kref_get(struct kref *kref ) ;
extern int kref_put(struct kref *kref , void (*release)(struct kref *kref ) ) ;
extern void init_timer(struct timer_list *timer ) ;
extern int schedule_delayed_work(struct delayed_work *work , unsigned long delay ) ;
extern ssize_t vfs_read(struct file * , char * , size_t , loff_t * ) ;
extern ssize_t vfs_write(struct file * , char const * , size_t , loff_t * ) ;
__inline static long PTR_ERR(void const *ptr )
{
{
return ((long )ptr);
}
}
__inline static long IS_ERR(void const *ptr )
{
long tmp ;
{
tmp = ldv__builtin_expect(! (! ((unsigned long )ptr >= 0xfffffffffffff001UL)), 0);
return (tmp);
}
}
extern void *ioremap_wc(unsigned long offset , unsigned long size ) ;
extern void put_page(struct page *page ) ;
extern int set_page_dirty(struct page *page ) ;
extern unsigned long do_mmap_pgoff(struct file *file , unsigned long addr , unsigned long len ,
unsigned long prot , unsigned long flag , unsigned long pgoff ) ;
__inline static unsigned long do_mmap(struct file *file , unsigned long addr , unsigned long len ,
unsigned long prot , unsigned long flag , unsigned long offset )
{
unsigned long ret ;
{
ret = -22;
if (offset + ((len + ((1UL << 12) - 1UL)) & ~ ((1UL << 12) - 1UL)) < offset) {
goto out;
} else {
}
if (! (offset & ~ (~ ((1UL << 12) - 1UL)))) {
ret = do_mmap_pgoff(file, addr, len, prot, flag, offset >> 12);
} else {
}
out:
return (ret);
}
}
extern void schedule(void) ;
extern unsigned long ( __attribute__((__warn_unused_result__)) copy_from_user)(void *to ,
void const *from ,
unsigned int len ) ;
extern struct page *read_cache_page(struct address_space *mapping , unsigned long index ,
filler_t *filler , void *data ) ;
__inline static struct page *read_mapping_page(struct address_space *mapping , unsigned long index ,
void *data )
{
filler_t *filler ;
struct page *tmp ;
{
filler = (filler_t *)(mapping->a_ops)->readpage;
tmp = read_cache_page(mapping, index, filler, data);
return (tmp);
}
}
extern int drm_free_agp(struct agp_memory *handle , int pages ) ;
extern struct agp_memory *drm_agp_bind_pages(struct drm_device *dev , struct page **pages ,
unsigned long num_pages , uint32_t gtt_offset ) ;
extern int drm_unbind_agp(struct agp_memory *handle ) ;
extern void drm_clflush_pages(struct page **pages , unsigned long num_pages ) ;
extern int drm_irq_install(struct drm_device *dev ) ;
extern void drm_agp_chipset_flush(struct drm_device *dev ) ;
extern struct drm_mm_node *drm_mm_get_block(struct drm_mm_node *parent , unsigned long size ,
unsigned int alignment ) ;
extern void drm_mm_put_block(struct drm_mm_node *cur ) ;
extern struct drm_mm_node *drm_mm_search_free(struct drm_mm const *mm , unsigned long size ,
unsigned int alignment , int best_match ) ;
extern int drm_mm_init(struct drm_mm *mm , unsigned long start , unsigned long size ) ;
extern void drm_gem_object_free(struct kref *kref ) ;
extern struct drm_gem_object *drm_gem_object_alloc(struct drm_device *dev , size_t size ) ;
extern void drm_gem_object_handle_free(struct kref *kref ) ;
__inline static void drm_gem_object_reference(struct drm_gem_object *obj )
{
{
kref_get(& obj->refcount);
return;
}
}
__inline static void drm_gem_object_unreference(struct drm_gem_object *obj )
{
{
if ((unsigned long )obj == (unsigned long )((void *)0)) {
return;
} else {
}
kref_put(& obj->refcount, & drm_gem_object_free);
return;
}
}
extern int drm_gem_handle_create(struct drm_file *file_priv , struct drm_gem_object *obj ,
int *handlep ) ;
__inline static void drm_gem_object_handle_unreference(struct drm_gem_object *obj )
{
{
if ((unsigned long )obj == (unsigned long )((void *)0)) {
return;
} else {
}
kref_put(& obj->handlecount, & drm_gem_object_handle_free);
drm_gem_object_unreference(obj);
return;
}
}
extern struct drm_gem_object *drm_gem_object_lookup(struct drm_device *dev , struct drm_file *filp ,
int handle ) ;
extern void drm_core_ioremap_wc(struct drm_map *map , struct drm_device *dev ) ;
int i915_gem_object_pin(struct drm_gem_object *obj , uint32_t alignment ) ;
void i915_gem_object_unpin(struct drm_gem_object *obj ) ;
void i915_gem_retire_requests(struct drm_device *dev ) ;
void i915_gem_retire_work_handler(struct work_struct *work ) ;
void i915_gem_clflush_object(struct drm_gem_object *obj ) ;
void i915_gem_detect_bit_6_swizzle(struct drm_device *dev ) ;
extern void mark_page_accessed(struct page * ) ;
static int i915_gem_object_set_domain(struct drm_gem_object *obj , uint32_t read_domains ,
uint32_t write_domain ) ;
static int i915_gem_object_set_domain_range(struct drm_gem_object *obj , uint64_t offset ,
uint64_t size , uint32_t read_domains ,
uint32_t write_domain ) ;
static int i915_gem_set_domain(struct drm_gem_object *obj , struct drm_file *file_priv ,
uint32_t read_domains , uint32_t write_domain ) ;
static int i915_gem_object_get_page_list(struct drm_gem_object *obj ) ;
static void i915_gem_object_free_page_list(struct drm_gem_object *obj ) ;
static int i915_gem_object_wait_rendering(struct drm_gem_object *obj ) ;
int i915_gem_init_ioctl(struct drm_device *dev , void *data , struct drm_file *file_priv )
{
drm_i915_private_t *dev_priv ;
struct drm_i915_gem_init *args ;
{
dev_priv = dev->dev_private;
args = data;
mutex_lock(& dev->struct_mutex);
if ((args->gtt_start >= args->gtt_end || (args->gtt_start & (unsigned long long )((1UL << 12) - 1UL)) != 0ULL) || (args->gtt_end & (unsigned long long )((1UL << 12) - 1UL)) != 0ULL) {
mutex_unlock(& dev->struct_mutex);
return (-22);
} else {
}
drm_mm_init(& dev_priv->mm.gtt_space, args->gtt_start, args->gtt_end - args->gtt_start);
dev->gtt_total = (uint32_t )(args->gtt_end - args->gtt_start);
mutex_unlock(& dev->struct_mutex);
return (0);
}
}
int i915_gem_create_ioctl(struct drm_device *dev , void *data , struct drm_file *file_priv )
{
struct drm_i915_gem_create *args ;
struct drm_gem_object *obj ;
int handle ;
int ret ;
{
args = data;
args->size = ((args->size + (uint64_t )((1UL << 12) - 1UL)) / (uint64_t )(1UL << 12)) * (uint64_t )(1UL << 12);
obj = drm_gem_object_alloc(dev, args->size);
if ((unsigned long )obj == (unsigned long )((void *)0)) {
return (-12);
} else {
}
ret = drm_gem_handle_create(file_priv, obj, & handle);
mutex_lock(& dev->struct_mutex);
drm_gem_object_handle_unreference(obj);
mutex_unlock(& dev->struct_mutex);
if (ret) {
return (ret);
} else {
}
args->handle = handle;
return (0);
}
}
int i915_gem_pread_ioctl(struct drm_device *dev , void *data , struct drm_file *file_priv )
{
struct drm_i915_gem_pread *args ;
struct drm_gem_object *obj ;
struct drm_i915_gem_object *obj_priv ;
ssize_t read ;
loff_t offset ;
int ret ;
{
args = data;
obj = drm_gem_object_lookup(dev, file_priv, args->handle);
if ((unsigned long )obj == (unsigned long )((void *)0)) {
return (-9);
} else {
}
obj_priv = obj->driver_private;
if ((args->offset > (uint64_t )obj->size || args->size > (uint64_t )obj->size) || args->offset + args->size > (uint64_t )obj->size) {
drm_gem_object_unreference(obj);
return (-22);
} else {
}
mutex_lock(& dev->struct_mutex);
ret = i915_gem_object_set_domain_range(obj, args->offset, args->size, 1, 0);
if (ret != 0) {
drm_gem_object_unreference(obj);
mutex_unlock(& dev->struct_mutex);
return (ret);
} else {
}
offset = args->offset;
read = vfs_read(obj->filp, (char *)((uintptr_t )args->data_ptr), args->size, & offset);
if ((uint64_t )read != args->size) {
drm_gem_object_unreference(obj);
mutex_unlock(& dev->struct_mutex);
if (read < (ssize_t )0) {
return (read);
} else {
return (-22);
}
} else {
}
drm_gem_object_unreference(obj);
mutex_unlock(& dev->struct_mutex);
return (0);
}
}
static int i915_gem_gtt_pwrite(struct drm_device *dev , struct drm_gem_object *obj ,
struct drm_i915_gem_pwrite *args , struct drm_file *file_priv )
{
struct drm_i915_gem_object *obj_priv ;
ssize_t remain ;
loff_t offset ;
char *user_data ;
char *vaddr ;
int i ;
int o ;
int l ;
int ret ;
unsigned long pfn ;
unsigned long unwritten ;
unsigned long flag ;
unsigned long roksum ;
struct thread_info *tmp ;
int tmp___0 ;
long tmp___1 ;
void *tmp___2 ;
int tmp___3 ;
{
obj_priv = obj->driver_private;
ret = 0;
user_data = (char *)((uintptr_t )args->data_ptr);
remain = args->size;
tmp = current_thread_info();
__asm__ ("add %3,%1 ; sbb %0,%0 ; cmp %1,%4 ; sbb $0,%0": "=&r" (flag), "=r" (roksum): "1" (user_data),
"g" (remain), "rm" (tmp->addr_limit.seg));
if (flag == 0UL) {
tmp___0 = 1;
} else {
tmp___0 = 0;
}
tmp___1 = ldv__builtin_expect(tmp___0, 1);
if (tmp___1) {
} else {
return (-14);
}
mutex_lock(& dev->struct_mutex);
ret = i915_gem_object_pin(obj, 0);
if (ret) {
mutex_unlock(& dev->struct_mutex);
return (ret);
} else {
}
ret = i915_gem_set_domain(obj, file_priv, 64, 64);
if (ret) {
goto fail;
} else {
}
obj_priv = obj->driver_private;
offset = (uint64_t )obj_priv->gtt_offset + args->offset;
obj_priv->dirty = 1;
while (1) {
if (remain > (ssize_t )0) {
} else {
break;
}
i = offset >> 12;
o = offset & (long long )((1UL << 12) - 1UL);
l = remain;
if ((unsigned long )(o + l) > 1UL << 12) {
l = (1UL << 12) - (unsigned long )o;
} else {
}
pfn = ((dev->agp)->base >> 12) + (unsigned long )i;
tmp___2 = ioremap_wc(pfn << 12, 1UL << 12);
vaddr = tmp___2;
if ((unsigned long )vaddr == (unsigned long )((void *)0)) {
ret = -14;
goto fail;
} else {
}
tmp___3 = __copy_from_user(vaddr + o, user_data, l);
unwritten = tmp___3;
iounmap(vaddr);
if (unwritten) {
ret = -14;
goto fail;
} else {
}
remain = remain - (ssize_t )l;
user_data = user_data + l;
offset = offset + (loff_t )l;
}
fail:
i915_gem_object_unpin(obj);
mutex_unlock(& dev->struct_mutex);
return (ret);
}
}
static int i915_gem_shmem_pwrite(struct drm_device *dev , struct drm_gem_object *obj ,
struct drm_i915_gem_pwrite *args , struct drm_file *file_priv )
{
int ret ;
loff_t offset ;
ssize_t written ;
{
mutex_lock(& dev->struct_mutex);
ret = i915_gem_set_domain(obj, file_priv, 1, 1);
if (ret) {
mutex_unlock(& dev->struct_mutex);
return (ret);
} else {
}
offset = args->offset;
written = vfs_write(obj->filp, (char *)((uintptr_t )args->data_ptr), args->size,
& offset);
if ((uint64_t )written != args->size) {
mutex_unlock(& dev->struct_mutex);
if (written < (ssize_t )0) {
return (written);
} else {
return (-22);
}
} else {
}
mutex_unlock(& dev->struct_mutex);
return (0);
}
}
int i915_gem_pwrite_ioctl(struct drm_device *dev , void *data , struct drm_file *file_priv )
{
struct drm_i915_gem_pwrite *args ;
struct drm_gem_object *obj ;
struct drm_i915_gem_object *obj_priv ;
int ret ;
{
args = data;
ret = 0;
obj = drm_gem_object_lookup(dev, file_priv, args->handle);
if ((unsigned long )obj == (unsigned long )((void *)0)) {
return (-9);
} else {
}
obj_priv = obj->driver_private;
if ((args->offset > (uint64_t )obj->size || args->size > (uint64_t )obj->size) || args->offset + args->size > (uint64_t )obj->size) {
drm_gem_object_unreference(obj);
return (-22);
} else {
}
if (obj_priv->tiling_mode == (uint32_t )0 && dev->gtt_total != (uint32_t )0) {
ret = i915_gem_gtt_pwrite(dev, obj, args, file_priv);
} else {
ret = i915_gem_shmem_pwrite(dev, obj, args, file_priv);
}
drm_gem_object_unreference(obj);
return (ret);
}
}
int i915_gem_set_domain_ioctl(struct drm_device *dev , void *data , struct drm_file *file_priv )
{
struct drm_i915_gem_set_domain *args ;
struct drm_gem_object *obj ;
int ret ;
{
args = data;
if (! ((dev->driver)->driver_features & 4096U)) {
return (-19);
} else {
}
obj = drm_gem_object_lookup(dev, file_priv, args->handle);
if ((unsigned long )obj == (unsigned long )((void *)0)) {
return (-9);
} else {
}
mutex_lock(& dev->struct_mutex);
ret = i915_gem_set_domain(obj, file_priv, args->read_domains, args->write_domain);
drm_gem_object_unreference(obj);
mutex_unlock(& dev->struct_mutex);
return (ret);
}
}
int i915_gem_sw_finish_ioctl(struct drm_device *dev , void *data , struct drm_file *file_priv )
{
struct drm_i915_gem_sw_finish *args ;
struct drm_gem_object *obj ;
struct drm_i915_gem_object *obj_priv ;
int ret ;
{
args = data;
ret = 0;
if (! ((dev->driver)->driver_features & 4096U)) {
return (-19);
} else {
}
mutex_lock(& dev->struct_mutex);
obj = drm_gem_object_lookup(dev, file_priv, args->handle);
if ((unsigned long )obj == (unsigned long )((void *)0)) {
mutex_unlock(& dev->struct_mutex);
return (-9);
} else {
}
obj_priv = obj->driver_private;
if (obj->write_domain & 1U && obj_priv->pin_count) {
i915_gem_clflush_object(obj);
drm_agp_chipset_flush(dev);
} else {
}
drm_gem_object_unreference(obj);
mutex_unlock(& dev->struct_mutex);
return (ret);
}
}
int i915_gem_mmap_ioctl(struct drm_device *dev , void *data , struct drm_file *file_priv )
{
struct drm_i915_gem_mmap *args ;
struct drm_gem_object *obj ;
loff_t offset ;
unsigned long addr ;
struct task_struct *tmp ;
struct task_struct *tmp___0 ;
long tmp___1 ;
{
args = data;
if (! ((dev->driver)->driver_features & 4096U)) {
return (-19);
} else {
}
obj = drm_gem_object_lookup(dev, file_priv, args->handle);
if ((unsigned long )obj == (unsigned long )((void *)0)) {
return (-9);
} else {
}
offset = args->offset;
tmp = get_current();
down_write(& (tmp->mm)->mmap_sem);
addr = do_mmap(obj->filp, 0, args->size, 1 | 2, 1, args->offset);
tmp___0 = get_current();
up_write(& (tmp___0->mm)->mmap_sem);
mutex_lock(& dev->struct_mutex);
drm_gem_object_unreference(obj);
mutex_unlock(& dev->struct_mutex);
tmp___1 = IS_ERR((void *)addr);
if (tmp___1) {
return (addr);
} else {
}
args->addr_ptr = (uint64_t )addr;
return (0);
}
}
static void i915_gem_object_free_page_list(struct drm_gem_object *obj )
{
struct drm_i915_gem_object *obj_priv ;
int page_count___0 ;
int i ;
{
obj_priv = obj->driver_private;
page_count___0 = obj->size / (1UL << 12);
if ((unsigned long )obj_priv->page_list == (unsigned long )((void *)0)) {
return;
} else {
}
i = 0;
while (1) {
if (i < page_count___0) {
} else {
break;
}
if ((unsigned long )*(obj_priv->page_list + i) != (unsigned long )((void *)0)) {
if (obj_priv->dirty) {
set_page_dirty(*(obj_priv->page_list + i));
} else {
}
mark_page_accessed(*(obj_priv->page_list + i));
put_page(*(obj_priv->page_list + i));
} else {
}
i = i + 1;
}
obj_priv->dirty = 0;
drm_free(obj_priv->page_list, (unsigned long )page_count___0 * sizeof(struct page *),
2);
obj_priv->page_list = (void *)0;
return;
}
}
static void i915_gem_object_move_to_active(struct drm_gem_object *obj )
{
struct drm_device *dev ;
drm_i915_private_t *dev_priv ;
struct drm_i915_gem_object *obj_priv ;
{
dev = obj->dev;
dev_priv = dev->dev_private;
obj_priv = obj->driver_private;
if (! obj_priv->active) {
drm_gem_object_reference(obj);
obj_priv->active = 1;
} else {
}
list_move_tail(& obj_priv->list, & dev_priv->mm.active_list);
return;
}
}
static void i915_gem_object_move_to_inactive(struct drm_gem_object *obj )
{
struct drm_device *dev ;
drm_i915_private_t *dev_priv ;
struct drm_i915_gem_object *obj_priv ;
{
dev = obj->dev;
dev_priv = dev->dev_private;
obj_priv = obj->driver_private;
if (obj_priv->pin_count != 0) {
list_del_init(& obj_priv->list);
} else {
list_move_tail(& obj_priv->list, & dev_priv->mm.inactive_list);
}
if (obj_priv->active) {
obj_priv->active = 0;
drm_gem_object_unreference(obj);
} else {
}
return;
}
}
static uint32_t i915_add_request(struct drm_device *dev , uint32_t flush_domains )
{
drm_i915_private_t *dev_priv ;
struct drm_i915_gem_request *request ;
uint32_t seqno ;
int was_empty ;
unsigned int outring ;
unsigned int ringmask ;
unsigned int outcount ;
char volatile *virt ;
void *tmp ;
{
dev_priv = dev->dev_private;
tmp = drm_calloc(1, sizeof(*request), 2);
request = tmp;
if ((unsigned long )request == (unsigned long )((void *)0)) {
return (0);
} else {
}
seqno = dev_priv->mm.next_gem_seqno;
dev_priv->mm.next_gem_seqno = dev_priv->mm.next_gem_seqno + (uint32_t )1;
if (dev_priv->mm.next_gem_seqno == (uint32_t )0) {
dev_priv->mm.next_gem_seqno = dev_priv->mm.next_gem_seqno + (uint32_t )1;
} else {
}
while (1) {
if (dev_priv->ring.space < 4 * 4) {
i915_wait_ring(dev, 4 * 4, "i915_add_request");
} else {
}
outcount = 0;
outring = dev_priv->ring.tail;
ringmask = dev_priv->ring.tail_mask;
virt = dev_priv->ring.virtual_start;
break;
}
while (1) {
*((unsigned int volatile *)(virt + outring)) = (33 << 23) | 1;
outcount = outcount + 1U;
outring = outring + 4U;
outring = outring & ringmask;
break;
}
while (1) {
*((unsigned int volatile *)(virt + outring)) = 32 << 2;
outcount = outcount + 1U;
outring = outring + 4U;
outring = outring & ringmask;
break;
}
while (1) {
*((unsigned int volatile *)(virt + outring)) = seqno;
outcount = outcount + 1U;
outring = outring + 4U;
outring = outring & ringmask;
break;
}
while (1) {
*((unsigned int volatile *)(virt + outring)) = (2 << 23) | 0;
outcount = outcount + 1U;
outring = outring + 4U;
outring = outring & ringmask;
break;
}
while (1) {
dev_priv->ring.tail = outring;
dev_priv->ring.space = (unsigned int )dev_priv->ring.space - outcount * 4U;
writel(outring, dev_priv->regs + 8240);
break;
}
while (1) {
if (drm_debug) {
printk("<7>[drm:%s] %d\n", "i915_add_request", seqno);
} else {
}
break;
}
request->seqno = seqno;
request->emitted_jiffies = jiffies;
request->flush_domains = flush_domains;
was_empty = list_empty(& dev_priv->mm.request_list);
list_add_tail(& request->list, & dev_priv->mm.request_list);
if (was_empty) {
schedule_delayed_work(& dev_priv->mm.retire_work, 250);
} else {
}
return (seqno);
}
}
static uint32_t i915_retire_commands(struct drm_device *dev )
{
drm_i915_private_t *dev_priv ;
uint32_t cmd ;
uint32_t flush_domains ;
unsigned int outring ;
unsigned int ringmask ;
unsigned int outcount ;
char volatile *virt ;
{
dev_priv = dev->dev_private;
cmd = ((4 << 23) | 0) | (1 << 2);
flush_domains = 0;
if (((((((((dev->pci_device == 10610 || dev->pci_device == 10626) || dev->pci_device == 10642) || dev->pci_device == 10658) || dev->pci_device == 10754) || dev->pci_device == 10770) || dev->pci_device == 10818) || dev->pci_device == 11778) || dev->pci_device == 11794) || dev->pci_device == 11810) {
flush_domains = flush_domains | 4U;
} else {
}
while (1) {
if (dev_priv->ring.space < 2 * 4) {
i915_wait_ring(dev, 2 * 4, "i915_retire_commands");
} else {
}
outcount = 0;
outring = dev_priv->ring.tail;
ringmask = dev_priv->ring.tail_mask;
virt = dev_priv->ring.virtual_start;
break;
}
while (1) {
*((unsigned int volatile *)(virt + outring)) = cmd;
outcount = outcount + 1U;
outring = outring + 4U;
outring = outring & ringmask;
break;
}
while (1) {
*((unsigned int volatile *)(virt + outring)) = 0;
outcount = outcount + 1U;
outring = outring + 4U;
outring = outring & ringmask;
break;
}
while (1) {
dev_priv->ring.tail = outring;
dev_priv->ring.space = (unsigned int )dev_priv->ring.space - outcount * 4U;
writel(outring, dev_priv->regs + 8240);
break;
}
return (flush_domains);
}
}
static void i915_gem_retire_request(struct drm_device *dev , struct drm_i915_gem_request *request )
{
drm_i915_private_t *dev_priv ;
struct drm_gem_object *obj ;
struct drm_i915_gem_object *obj_priv ;
struct list_head const *__mptr ;
int tmp ;
struct drm_i915_gem_object *obj_priv___0 ;
struct drm_i915_gem_object *next ;
struct list_head const *__mptr___0 ;
struct list_head const *__mptr___1 ;
struct list_head const *__mptr___2 ;
struct drm_gem_object *obj___0 ;
{
dev_priv = dev->dev_private;
while (1) {
tmp = list_empty(& dev_priv->mm.active_list);
if (tmp) {
break;
} else {
}
__mptr = dev_priv->mm.active_list.next;
obj_priv = (struct drm_i915_gem_object *)((char *)__mptr - (unsigned int )(& ((struct drm_i915_gem_object *)0)->list));
obj = obj_priv->obj;
if (obj_priv->last_rendering_seqno != request->seqno) {
return;
} else {
}
if (obj->write_domain != (uint32_t )0) {
list_move_tail(& obj_priv->list, & dev_priv->mm.flushing_list);
} else {
i915_gem_object_move_to_inactive(obj);
}
}
if (request->flush_domains != (uint32_t )0) {
__mptr___0 = dev_priv->mm.flushing_list.next;
obj_priv___0 = (struct drm_i915_gem_object *)((char *)__mptr___0 - (unsigned int )(& ((struct drm_i915_gem_object *)0)->list));
__mptr___1 = obj_priv___0->list.next;
next = (struct drm_i915_gem_object *)((char *)__mptr___1 - (unsigned int )(& ((struct drm_i915_gem_object *)0)->list));
while (1) {
if ((unsigned long )(& obj_priv___0->list) != (unsigned long )(& dev_priv->mm.flushing_list)) {
} else {
break;
}
obj___0 = obj_priv___0->obj;
if (obj___0->write_domain & request->flush_domains) {
obj___0->write_domain = 0;
i915_gem_object_move_to_inactive(obj___0);
} else {
}
obj_priv___0 = next;
__mptr___2 = next->list.next;
next = (struct drm_i915_gem_object *)((char *)__mptr___2 - (unsigned int )(& ((struct drm_i915_gem_object *)0)->list));
}
} else {
}
return;
}
}
static int i915_seqno_passed(uint32_t seq1 , uint32_t seq2 )
{
{
return ((int32_t )(seq1 - seq2) >= 0);
}
}
uint32_t i915_get_gem_seqno(struct drm_device *dev )
{
drm_i915_private_t *dev_priv ;
{
dev_priv = dev->dev_private;
return (*((u32 volatile *)dev_priv->hw_status_page + 32));
}
}
void i915_gem_retire_requests(struct drm_device *dev )
{
drm_i915_private_t *dev_priv ;
uint32_t seqno ;
struct drm_i915_gem_request *request ;
uint32_t retiring_seqno ;
struct list_head const *__mptr ;
int tmp ;
int tmp___0 ;
{
dev_priv = dev->dev_private;
seqno = i915_get_gem_seqno(dev);
while (1) {
tmp___0 = list_empty(& dev_priv->mm.request_list);
if (tmp___0) {
break;
} else {
}
__mptr = dev_priv->mm.request_list.next;
request = (struct drm_i915_gem_request *)((char *)__mptr - (unsigned int )(& ((struct drm_i915_gem_request *)0)->list));
retiring_seqno = request->seqno;
tmp = i915_seqno_passed(seqno, retiring_seqno);
if (tmp || dev_priv->mm.wedged) {
i915_gem_retire_request(dev, request);
list_del(& request->list);
drm_free(request, sizeof(*request), 2);
} else {
break;
}
}
return;
}
}
void i915_gem_retire_work_handler(struct work_struct *work )
{
drm_i915_private_t *dev_priv ;
struct drm_device *dev ;
struct work_struct const *__mptr ;
int tmp ;
{
__mptr = work;
dev_priv = (drm_i915_private_t *)((char *)__mptr - (unsigned int )(& ((drm_i915_private_t *)0)->mm.retire_work.work));
dev = dev_priv->dev;
mutex_lock(& dev->struct_mutex);
i915_gem_retire_requests(dev);
tmp = list_empty(& dev_priv->mm.request_list);
if (tmp) {
} else {
schedule_delayed_work(& dev_priv->mm.retire_work, 250);
}
mutex_unlock(& dev->struct_mutex);
return;
}
}
static int i915_wait_request(struct drm_device *dev , uint32_t seqno )
{
drm_i915_private_t *dev_priv ;
int ret ;
long tmp ;
int __ret ;
wait_queue_t __wait ;
struct task_struct *tmp___0 ;
uint32_t tmp___1 ;
int tmp___2 ;
struct task_struct *tmp___3 ;
int tmp___4 ;
uint32_t tmp___5 ;
int tmp___6 ;
uint32_t tmp___7 ;
int tmp___8 ;
uint32_t tmp___9 ;
{
dev_priv = dev->dev_private;
ret = 0;
while (1) {
tmp = ldv__builtin_expect(! (! (seqno == (uint32_t )0)), 0);
if (tmp) {
while (1) {
__asm__ volatile ("1:\tud2\n"
".pushsection __bug_table,\"a\"\n"
"2:\t.quad 1b, %c0\n"
"\t.word %c1, 0\n"
"\t.org 2b+%c2\n"
".popsection": : "i" ("/work/ldvuser/novikov/work/current--X--drivers/gpu/drm/i915/i915.ko--X--defaultlinux--X--32_1--X--cpachecker/linux/csd_deg_dscv/21/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/i915/i915_gem.c"),
"i" (749), "i" (sizeof(struct bug_entry )));
while (1) {
}
break;
}
} else {
}
break;
}
tmp___7 = i915_get_gem_seqno(dev);
tmp___8 = i915_seqno_passed(tmp___7, seqno);
if (tmp___8) {
} else {
dev_priv->mm.waiting_gem_seqno = seqno;
i915_user_irq_get(dev);
__ret = 0;
tmp___5 = i915_get_gem_seqno(dev);
tmp___6 = i915_seqno_passed(tmp___5, seqno);
if (tmp___6 || dev_priv->mm.wedged) {
} else {
while (1) {
tmp___0 = get_current();
__wait.flags = 0U;
__wait.private = tmp___0;
__wait.func = & autoremove_wake_function;
__wait.task_list.next = & __wait.task_list;
__wait.task_list.prev = & __wait.task_list;
while (1) {
prepare_to_wait(& dev_priv->irq_queue, & __wait, 1);
tmp___1 = i915_get_gem_seqno(dev);
tmp___2 = i915_seqno_passed(tmp___1, seqno);
if (tmp___2 || dev_priv->mm.wedged) {
break;
} else {
}
tmp___3 = get_current();
tmp___4 = signal_pending(tmp___3);
if (tmp___4) {
} else {
schedule();
goto __Cont;
}
__ret = -512;
break;
__Cont: /* CIL Label */ ;
}
finish_wait(& dev_priv->irq_queue, & __wait);
break;
}
}
ret = __ret;
i915_user_irq_put(dev);
dev_priv->mm.waiting_gem_seqno = 0;
}
if (dev_priv->mm.wedged) {
ret = -5;
} else {
}
if (ret && ret != -512) {
tmp___9 = i915_get_gem_seqno(dev);
printk("<3>[drm:%s] *ERROR* %s returns %d (awaiting %d at %d)\n", "i915_wait_request",
"i915_wait_request", ret, seqno, tmp___9);
} else {
}
if (ret == 0) {
i915_gem_retire_requests(dev);
} else {
}
return (ret);
}
}
static void i915_gem_flush(struct drm_device *dev , uint32_t invalidate_domains ,
uint32_t flush_domains )
{
drm_i915_private_t *dev_priv ;
uint32_t cmd ;
unsigned int outring ;
unsigned int ringmask ;
unsigned int outcount ;
char volatile *virt ;
{
dev_priv = dev->dev_private;
if (flush_domains & 1U) {
drm_agp_chipset_flush(dev);
} else {
}
if ((invalidate_domains | flush_domains) & (unsigned int )(~ (1 | 64))) {
cmd = ((4 << 23) | 0) | (1 << 2);
if ((invalidate_domains | flush_domains) & 2U) {
cmd = cmd & (unsigned int )(~ (1 << 2));
} else {
}
if (! (((((((((dev->pci_device == 10610 || dev->pci_device == 10626) || dev->pci_device == 10642) || dev->pci_device == 10658) || dev->pci_device == 10754) || dev->pci_device == 10770) || dev->pci_device == 10818) || dev->pci_device == 11778) || dev->pci_device == 11794) || dev->pci_device == 11810)) {
if (invalidate_domains & 4U) {
cmd = cmd | (unsigned int )(1 << 0);
} else {
}
} else {
}
if (invalidate_domains & 16U) {
cmd = cmd | (unsigned int )(1 << 1);
} else {
}
while (1) {
if (dev_priv->ring.space < 2 * 4) {
i915_wait_ring(dev, 2 * 4, "i915_gem_flush");
} else {
}
outcount = 0;
outring = dev_priv->ring.tail;
ringmask = dev_priv->ring.tail_mask;
virt = dev_priv->ring.virtual_start;
break;
}
while (1) {
*((unsigned int volatile *)(virt + outring)) = cmd;
outcount = outcount + 1U;
outring = outring + 4U;
outring = outring & ringmask;
break;
}
while (1) {
*((unsigned int volatile *)(virt + outring)) = 0;
outcount = outcount + 1U;
outring = outring + 4U;
outring = outring & ringmask;
break;
}
while (1) {
dev_priv->ring.tail = outring;
dev_priv->ring.space = (unsigned int )dev_priv->ring.space - outcount * 4U;
writel(outring, dev_priv->regs + 8240);
break;
}
} else {
}
return;
}
}
static int i915_gem_object_wait_rendering(struct drm_gem_object *obj )
{
struct drm_device *dev ;
struct drm_i915_gem_object *obj_priv ;
int ret ;
uint32_t write_domain ;
long tmp ;
{
dev = obj->dev;
obj_priv = obj->driver_private;
if (obj->write_domain & (unsigned int )(~ (1 | 64))) {
write_domain = obj->write_domain;
i915_gem_flush(dev, 0, write_domain);
i915_gem_object_move_to_active(obj);
obj_priv->last_rendering_seqno = i915_add_request(dev, write_domain);
while (1) {
tmp = ldv__builtin_expect(! (! (obj_priv->last_rendering_seqno == (uint32_t )0)),
0);
if (tmp) {
while (1) {
__asm__ volatile ("1:\tud2\n"
".pushsection __bug_table,\"a\"\n"
"2:\t.quad 1b, %c0\n"
"\t.word %c1, 0\n"
"\t.org 2b+%c2\n"
".popsection": : "i" ("/work/ldvuser/novikov/work/current--X--drivers/gpu/drm/i915/i915.ko--X--defaultlinux--X--32_1--X--cpachecker/linux/csd_deg_dscv/21/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/i915/i915_gem.c"),
"i" (876), "i" (sizeof(struct bug_entry )));
while (1) {
}
break;
}
} else {
}
break;
}
} else {
}
if (obj_priv->active) {
ret = i915_wait_request(dev, obj_priv->last_rendering_seqno);
if (ret != 0) {
return (ret);
} else {
}
} else {
}
return (0);
}
}
static int i915_gem_object_unbind(struct drm_gem_object *obj )
{
struct drm_device *dev ;
struct drm_i915_gem_object *obj_priv ;
int ret ;
long tmp ;
int tmp___0 ;
{
dev = obj->dev;
obj_priv = obj->driver_private;
ret = 0;
if ((unsigned long )obj_priv->gtt_space == (unsigned long )((void *)0)) {
return (0);
} else {
}
if (obj_priv->pin_count != 0) {
printk("<3>[drm:%s] *ERROR* Attempting to unbind pinned buffer\n", "i915_gem_object_unbind");
return (-22);
} else {
}
ret = i915_gem_object_wait_rendering(obj);
if (ret) {
printk("<3>[drm:%s] *ERROR* wait_rendering failed: %d\n", "i915_gem_object_unbind",
ret);
return (ret);
} else {
}
ret = i915_gem_object_set_domain(obj, 1, 1);
if (ret) {
printk("<3>[drm:%s] *ERROR* set_domain failed: %d\n", "i915_gem_object_unbind",
ret);
return (ret);
} else {
}
if ((unsigned long )obj_priv->agp_mem != (unsigned long )((void *)0)) {
drm_unbind_agp(obj_priv->agp_mem);
drm_free_agp(obj_priv->agp_mem, obj->size / (1UL << 12));
obj_priv->agp_mem = (void *)0;
} else {
}
while (1) {
tmp = ldv__builtin_expect(! (! obj_priv->active), 0);
if (tmp) {
while (1) {
__asm__ volatile ("1:\tud2\n"
".pushsection __bug_table,\"a\"\n"
"2:\t.quad 1b, %c0\n"
"\t.word %c1, 0\n"
"\t.org 2b+%c2\n"
".popsection": : "i" ("/work/ldvuser/novikov/work/current--X--drivers/gpu/drm/i915/i915.ko--X--defaultlinux--X--32_1--X--cpachecker/linux/csd_deg_dscv/21/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/i915/i915_gem.c"),
"i" (947), "i" (sizeof(struct bug_entry )));
while (1) {
}
break;
}
} else {
}
break;
}
i915_gem_object_free_page_list(obj);
if (obj_priv->gtt_space) {
atomic_dec(& dev->gtt_count);
atomic_sub(obj->size, & dev->gtt_memory);
drm_mm_put_block(obj_priv->gtt_space);
obj_priv->gtt_space = (void *)0;
} else {
}
tmp___0 = list_empty(& obj_priv->list);
if (tmp___0) {
} else {
list_del_init(& obj_priv->list);
}
return (0);
}
}
static int i915_gem_evict_something(struct drm_device *dev )
{
drm_i915_private_t *dev_priv ;
struct drm_gem_object *obj ;
struct drm_i915_gem_object *obj_priv ;
int ret ;
struct list_head const *__mptr ;
long tmp ;
long tmp___0 ;
int tmp___1 ;
struct drm_i915_gem_request *request ;
struct list_head const *__mptr___0 ;
int tmp___2 ;
int tmp___3 ;
struct list_head const *__mptr___1 ;
int tmp___4 ;
int tmp___5 ;
int tmp___6 ;
int tmp___7 ;
{
dev_priv = dev->dev_private;
ret = 0;
while (1) {
tmp___1 = list_empty(& dev_priv->mm.inactive_list);
if (tmp___1) {
} else {
__mptr = dev_priv->mm.inactive_list.next;
obj_priv = (struct drm_i915_gem_object *)((char *)__mptr - (unsigned int )(& ((struct drm_i915_gem_object *)0)->list));
obj = obj_priv->obj;
while (1) {
tmp = ldv__builtin_expect(! (! (obj_priv->pin_count != 0)), 0);
if (tmp) {
while (1) {
__asm__ volatile ("1:\tud2\n"
".pushsection __bug_table,\"a\"\n"
"2:\t.quad 1b, %c0\n"
"\t.word %c1, 0\n"
"\t.org 2b+%c2\n"
".popsection": : "i" ("/work/ldvuser/novikov/work/current--X--drivers/gpu/drm/i915/i915.ko--X--defaultlinux--X--32_1--X--cpachecker/linux/csd_deg_dscv/21/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/i915/i915_gem.c"),
"i" (983), "i" (sizeof(struct bug_entry )));
while (1) {
}
break;
}
} else {
}
break;
}
while (1) {
tmp___0 = ldv__builtin_expect(! (! obj_priv->active), 0);
if (tmp___0) {
while (1) {
__asm__ volatile ("1:\tud2\n"
".pushsection __bug_table,\"a\"\n"
"2:\t.quad 1b, %c0\n"
"\t.word %c1, 0\n"
"\t.org 2b+%c2\n"
".popsection": : "i" ("/work/ldvuser/novikov/work/current--X--drivers/gpu/drm/i915/i915.ko--X--defaultlinux--X--32_1--X--cpachecker/linux/csd_deg_dscv/21/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/i915/i915_gem.c"),
"i" (987), "i" (sizeof(struct bug_entry )));
while (1) {
}
break;
}
} else {
}
break;
}
ret = i915_gem_object_unbind(obj);
break;
}
tmp___3 = list_empty(& dev_priv->mm.request_list);
if (tmp___3) {
} else {
__mptr___0 = dev_priv->mm.request_list.next;
request = (struct drm_i915_gem_request *)((char *)__mptr___0 - (unsigned int )(& ((struct drm_i915_gem_request *)0)->list));
ret = i915_wait_request(dev, request->seqno);
if (ret) {
break;
} else {
}
tmp___2 = list_empty(& dev_priv->mm.inactive_list);
if (tmp___2) {
} else {
goto __Cont;
}
break;
}
tmp___4 = list_empty(& dev_priv->mm.flushing_list);
if (tmp___4) {
} else {
__mptr___1 = dev_priv->mm.flushing_list.next;
obj_priv = (struct drm_i915_gem_object *)((char *)__mptr___1 - (unsigned int )(& ((struct drm_i915_gem_object *)0)->list));
obj = obj_priv->obj;
i915_gem_flush(dev, obj->write_domain, obj->write_domain);
i915_add_request(dev, obj->write_domain);
obj = (void *)0;
goto __Cont;
}
tmp___5 = list_empty(& dev_priv->mm.flushing_list);
tmp___6 = list_empty(& dev_priv->mm.request_list);
tmp___7 = list_empty(& dev_priv->mm.inactive_list);
printk("<3>[drm:%s] *ERROR* inactive empty %d request empty %d flushing empty %d\n",
"i915_gem_evict_something", tmp___7, tmp___6, tmp___5);
return (-12);
__Cont: /* CIL Label */ ;
}
return (ret);
}
}
static int i915_gem_object_get_page_list(struct drm_gem_object *obj )
{
struct drm_i915_gem_object *obj_priv ;
int page_count___0 ;
int i ;
struct address_space *mapping ;
struct inode *inode ;
struct page *page ;
int ret ;
long tmp ;
void *tmp___0 ;
long tmp___1 ;
long tmp___2 ;
{
obj_priv = obj->driver_private;
if (obj_priv->page_list) {
return (0);
} else {
}
page_count___0 = obj->size / (1UL << 12);
while (1) {
tmp = ldv__builtin_expect(! (! ((unsigned long )obj_priv->page_list != (unsigned long )((void *)0))),
0);
if (tmp) {
while (1) {
__asm__ volatile ("1:\tud2\n"
".pushsection __bug_table,\"a\"\n"
"2:\t.quad 1b, %c0\n"
"\t.word %c1, 0\n"
"\t.org 2b+%c2\n"
".popsection": : "i" ("/work/ldvuser/novikov/work/current--X--drivers/gpu/drm/i915/i915.ko--X--defaultlinux--X--32_1--X--cpachecker/linux/csd_deg_dscv/21/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/i915/i915_gem.c"),
"i" (1069), "i" (sizeof(struct bug_entry )));
while (1) {
}
break;
}
} else {
}
break;
}
tmp___0 = drm_calloc(page_count___0, sizeof(struct page *), 2);
obj_priv->page_list = tmp___0;
if ((unsigned long )obj_priv->page_list == (unsigned long )((void *)0)) {
printk("<3>[drm:%s] *ERROR* Faled to allocate page list\n", "i915_gem_object_get_page_list");
return (-12);
} else {
}
inode = ((obj->filp)->f_path.dentry)->d_inode;
mapping = inode->i_mapping;
i = 0;
while (1) {
if (i < page_count___0) {
} else {
break;
}
page = read_mapping_page(mapping, i, (void *)0);
tmp___2 = IS_ERR(page);
if (tmp___2) {
tmp___1 = PTR_ERR(page);
ret = tmp___1;
printk("<3>[drm:%s] *ERROR* read_mapping_page failed: %d\n", "i915_gem_object_get_page_list",
ret);
i915_gem_object_free_page_list(obj);
return (ret);
} else {
}
*(obj_priv->page_list + i) = page;
i = i + 1;
}
return (0);
}
}
static int i915_gem_object_bind_to_gtt(struct drm_gem_object *obj , unsigned int alignment )
{
struct drm_device *dev ;
drm_i915_private_t *dev_priv ;
struct drm_i915_gem_object *obj_priv ;
struct drm_mm_node *free_space ;
int page_count___0 ;
int ret ;
int tmp ;
int tmp___0 ;
int tmp___1 ;
long tmp___2 ;
long tmp___3 ;
{
dev = obj->dev;
dev_priv = dev->dev_private;
obj_priv = obj->driver_private;
if (alignment == 0U) {
alignment = 1UL << 12;
} else {
}
if ((unsigned long )alignment & ((1UL << 12) - 1UL)) {
printk("<3>[drm:%s] *ERROR* Invalid object alignment requested %u\n", "i915_gem_object_bind_to_gtt",
alignment);
return (-22);
} else {
}
search_free:
free_space = drm_mm_search_free(& dev_priv->mm.gtt_space, obj->size, alignment,
0);
if ((unsigned long )free_space != (unsigned long )((void *)0)) {
obj_priv->gtt_space = drm_mm_get_block(free_space, obj->size, alignment);
if ((unsigned long )obj_priv->gtt_space != (unsigned long )((void *)0)) {
(obj_priv->gtt_space)->private = obj;
obj_priv->gtt_offset = (obj_priv->gtt_space)->start;
} else {
}
} else {
}
if ((unsigned long )obj_priv->gtt_space == (unsigned long )((void *)0)) {
tmp = list_empty(& dev_priv->mm.inactive_list);
if (tmp) {
tmp___0 = list_empty(& dev_priv->mm.flushing_list);
if (tmp___0) {
tmp___1 = list_empty(& dev_priv->mm.active_list);
if (tmp___1) {
printk("<3>[drm:%s] *ERROR* GTT full, but LRU list empty\n", "i915_gem_object_bind_to_gtt");
return (-12);
} else {
}
} else {
}
} else {
}
ret = i915_gem_evict_something(dev);
if (ret != 0) {
printk("<3>[drm:%s] *ERROR* Failed to evict a buffer %d\n", "i915_gem_object_bind_to_gtt",
ret);
return (ret);
} else {
}
goto search_free;
} else {
}
ret = i915_gem_object_get_page_list(obj);
if (ret) {
drm_mm_put_block(obj_priv->gtt_space);
obj_priv->gtt_space = (void *)0;
return (ret);
} else {
}
page_count___0 = obj->size / (1UL << 12);
obj_priv->agp_mem = drm_agp_bind_pages(dev, obj_priv->page_list, page_count___0,
obj_priv->gtt_offset);
if ((unsigned long )obj_priv->agp_mem == (unsigned long )((void *)0)) {
i915_gem_object_free_page_list(obj);
drm_mm_put_block(obj_priv->gtt_space);
obj_priv->gtt_space = (void *)0;
return (-12);
} else {
}
atomic_inc(& dev->gtt_count);
atomic_add(obj->size, & dev->gtt_memory);
while (1) {
tmp___2 = ldv__builtin_expect(! (! (obj->read_domains & (unsigned int )(~ (1 | 64)))),
0);
if (tmp___2) {
while (1) {
__asm__ volatile ("1:\tud2\n"
".pushsection __bug_table,\"a\"\n"
"2:\t.quad 1b, %c0\n"
"\t.word %c1, 0\n"
"\t.org 2b+%c2\n"
".popsection": : "i" ("/work/ldvuser/novikov/work/current--X--drivers/gpu/drm/i915/i915.ko--X--defaultlinux--X--32_1--X--cpachecker/linux/csd_deg_dscv/21/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/i915/i915_gem.c"),
"i" (1176), "i" (sizeof(struct bug_entry )));
while (1) {
}
break;
}
} else {
}
break;
}
while (1) {
tmp___3 = ldv__builtin_expect(! (! (obj->write_domain & (unsigned int )(~ (1 | 64)))),
0);
if (tmp___3) {
while (1) {
__asm__ volatile ("1:\tud2\n"
".pushsection __bug_table,\"a\"\n"
"2:\t.quad 1b, %c0\n"
"\t.word %c1, 0\n"
"\t.org 2b+%c2\n"
".popsection": : "i" ("/work/ldvuser/novikov/work/current--X--drivers/gpu/drm/i915/i915.ko--X--defaultlinux--X--32_1--X--cpachecker/linux/csd_deg_dscv/21/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/i915/i915_gem.c"),
"i" (1177), "i" (sizeof(struct bug_entry )));
while (1) {
}
break;
}
} else {
}
break;
}
return (0);
}
}
void i915_gem_clflush_object(struct drm_gem_object *obj )
{
struct drm_i915_gem_object *obj_priv ;
{
obj_priv = obj->driver_private;
if ((unsigned long )obj_priv->page_list == (unsigned long )((void *)0)) {
return;
} else {
}
drm_clflush_pages(obj_priv->page_list, obj->size / (1UL << 12));
return;
}
}
static int i915_gem_object_set_domain(struct drm_gem_object *obj , uint32_t read_domains ,
uint32_t write_domain )
{
struct drm_device *dev ;
struct drm_i915_gem_object *obj_priv ;
uint32_t invalidate_domains ;
uint32_t flush_domains ;
int ret ;
{
dev = obj->dev;
obj_priv = obj->driver_private;
invalidate_domains = 0;
flush_domains = 0;
if (write_domain == (uint32_t )0) {
read_domains = read_domains | obj->read_domains;
} else {
obj_priv->dirty = 1;
}
if (obj->write_domain && obj->write_domain != read_domains) {
flush_domains = flush_domains | obj->write_domain;
invalidate_domains = invalidate_domains | (read_domains & ~ obj->write_domain);
} else {
}
invalidate_domains = invalidate_domains | (read_domains & ~ obj->read_domains);
if ((flush_domains | invalidate_domains) & 1U) {
if (invalidate_domains & 1U && flush_domains & (unsigned int )(~ (1 | 64))) {
ret = i915_gem_object_wait_rendering(obj);
if (ret) {
return (ret);
} else {
}
} else {
}
i915_gem_clflush_object(obj);
} else {
}
if ((write_domain | flush_domains) != 0U) {
obj->write_domain = write_domain;
} else {
}
if ((unsigned long )obj_priv->page_cpu_valid != (unsigned long )((void *)0) && (write_domain != (uint32_t )0 || read_domains & 1U)) {
drm_free(obj_priv->page_cpu_valid, obj->size / (1UL << 12), 2);
obj_priv->page_cpu_valid = (void *)0;
} else {
}
obj->read_domains = read_domains;
dev->invalidate_domains = dev->invalidate_domains | invalidate_domains;
dev->flush_domains = dev->flush_domains | flush_domains;
return (0);
}
}
static int i915_gem_object_set_domain_range(struct drm_gem_object *obj , uint64_t offset ,
uint64_t size , uint32_t read_domains ,
uint32_t write_domain )
{
struct drm_i915_gem_object *obj_priv ;
int ret ;
int i ;
int tmp ;
void *tmp___0 ;
{
obj_priv = obj->driver_private;
if (obj->read_domains & 1U) {
return (0);
} else {
}
if (read_domains != (uint32_t )1 || write_domain != (uint32_t )0) {
tmp = i915_gem_object_set_domain(obj, read_domains, write_domain);
return (tmp);
} else {
}
if (obj->write_domain & (unsigned int )(~ (1 | 64))) {
ret = i915_gem_object_wait_rendering(obj);
if (ret) {
return (ret);
} else {
}
} else {
}
if ((unsigned long )obj_priv->page_cpu_valid == (unsigned long )((void *)0)) {
tmp___0 = drm_calloc(1, obj->size / (1UL << 12), 2);
obj_priv->page_cpu_valid = tmp___0;
} else {
}
i = offset / (uint64_t )(1UL << 12);
while (1) {
if ((uint64_t )i <= ((offset + size) - (uint64_t )1) / (uint64_t )(1UL << 12)) {
} else {
break;
}
if (*(obj_priv->page_cpu_valid + i)) {
goto __Cont;
} else {
}
drm_clflush_pages(obj_priv->page_list + i, 1);
*(obj_priv->page_cpu_valid + i) = 1;
__Cont: /* CIL Label */
i = i + 1;
}
return (0);
}
}
static uint32_t i915_gem_dev_set_domain(struct drm_device *dev )
{
uint32_t flush_domains ;
{
flush_domains = dev->flush_domains;
if (dev->invalidate_domains | dev->flush_domains) {
i915_gem_flush(dev, dev->invalidate_domains, dev->flush_domains);
dev->invalidate_domains = 0;
dev->flush_domains = 0;
} else {
}
return (flush_domains);
}
}
static int i915_gem_object_pin_and_relocate(struct drm_gem_object *obj , struct drm_file *file_priv ,
struct drm_i915_gem_exec_object *entry )
{
struct drm_device *dev ;
struct drm_i915_gem_relocation_entry reloc ;
struct drm_i915_gem_relocation_entry *relocs ;
struct drm_i915_gem_object *obj_priv ;
int i ;
int ret ;
uint32_t last_reloc_offset ;
void *reloc_page ;
struct drm_gem_object *target_obj ;
struct drm_i915_gem_object *target_obj_priv ;
uint32_t reloc_val ;
uint32_t reloc_offset ;
uint32_t *reloc_entry ;
unsigned long tmp ;
unsigned long tmp___0 ;
{
dev = obj->dev;
obj_priv = obj->driver_private;
last_reloc_offset = -1;
reloc_page = (void *)0;
ret = i915_gem_object_pin(obj, (uint32_t )entry->alignment);
if (ret) {
return (ret);
} else {
}
entry->offset = obj_priv->gtt_offset;
relocs = (struct drm_i915_gem_relocation_entry *)((uintptr_t )entry->relocs_ptr);
i = 0;
while (1) {
if ((uint32_t )i < entry->relocation_count) {
} else {
break;
}
tmp = copy_from_user(& reloc, relocs + i, sizeof(reloc));
ret = tmp;
if (ret != 0) {
i915_gem_object_unpin(obj);
return (ret);
} else {
}
target_obj = drm_gem_object_lookup(obj->dev, file_priv, reloc.target_handle);
if ((unsigned long )target_obj == (unsigned long )((void *)0)) {
i915_gem_object_unpin(obj);
return (-9);
} else {
}
target_obj_priv = target_obj->driver_private;
if ((unsigned long )target_obj_priv->gtt_space == (unsigned long )((void *)0)) {
printk("<3>[drm:%s] *ERROR* No GTT space found for object %d\n", "i915_gem_object_pin_and_relocate",
reloc.target_handle);
drm_gem_object_unreference(target_obj);
i915_gem_object_unpin(obj);
return (-22);
} else {
}
if (reloc.offset > (uint64_t )(obj->size - (size_t )4)) {
printk("<3>[drm:%s] *ERROR* Relocation beyond object bounds: obj %p target %d offset %d size %d.\n",
"i915_gem_object_pin_and_relocate", obj, reloc.target_handle, (int )reloc.offset,
(int )obj->size);
drm_gem_object_unreference(target_obj);
i915_gem_object_unpin(obj);
return (-22);
} else {
}
if (reloc.offset & 3ULL) {
printk("<3>[drm:%s] *ERROR* Relocation not 4-byte aligned: obj %p target %d offset %d.\n",
"i915_gem_object_pin_and_relocate", obj, reloc.target_handle, (int )reloc.offset);
drm_gem_object_unreference(target_obj);
i915_gem_object_unpin(obj);
return (-22);
} else {
}
if ((reloc.write_domain && target_obj->pending_write_domain) && reloc.write_domain != target_obj->pending_write_domain) {
printk("<3>[drm:%s] *ERROR* Write domain conflict: obj %p target %d offset %d new %08x old %08x\n",
"i915_gem_object_pin_and_relocate", obj, reloc.target_handle, (int )reloc.offset,
reloc.write_domain, target_obj->pending_write_domain);
drm_gem_object_unreference(target_obj);
i915_gem_object_unpin(obj);
return (-22);
} else {
}
target_obj->pending_read_domains = target_obj->pending_read_domains | reloc.read_domains;
target_obj->pending_write_domain = target_obj->pending_write_domain | reloc.write_domain;
if ((uint64_t )target_obj_priv->gtt_offset == reloc.presumed_offset) {
drm_gem_object_unreference(target_obj);
goto __Cont;
} else {
}
i915_gem_object_wait_rendering(obj);
if (obj->write_domain & 1U) {
i915_gem_clflush_object(obj);
drm_agp_chipset_flush(dev);
obj->write_domain = 0;
} else {
}
reloc_offset = (uint64_t )obj_priv->gtt_offset + reloc.offset;
if ((unsigned long )reloc_page == (unsigned long )((void *)0) || ((unsigned long )last_reloc_offset & ~ ((1UL << 12) - 1UL)) != ((unsigned long )reloc_offset & ~ ((1UL << 12) - 1UL))) {
if ((unsigned long )reloc_page != (unsigned long )((void *)0)) {
iounmap(reloc_page);
} else {
}
reloc_page = ioremap_wc((dev->agp)->base + ((unsigned long )reloc_offset & ~ ((1UL << 12) - 1UL)),
1UL << 12);
last_reloc_offset = reloc_offset;
if ((unsigned long )reloc_page == (unsigned long )((void *)0)) {
drm_gem_object_unreference(target_obj);
i915_gem_object_unpin(obj);
return (-12);
} else {
}
} else {
}
reloc_entry = (uint32_t *)(reloc_page + ((unsigned long )reloc_offset & ((1UL << 12) - 1UL)));
reloc_val = target_obj_priv->gtt_offset + reloc.delta;
writel(reloc_val, reloc_entry);
reloc.presumed_offset = target_obj_priv->gtt_offset;
tmp___0 = copy_to_user(relocs + i, & reloc, sizeof(reloc));
ret = tmp___0;
if (ret != 0) {
drm_gem_object_unreference(target_obj);
i915_gem_object_unpin(obj);
return (ret);
} else {
}
drm_gem_object_unreference(target_obj);
__Cont: /* CIL Label */
i = i + 1;
}
if ((unsigned long )reloc_page != (unsigned long )((void *)0)) {
iounmap(reloc_page);
} else {
}
return (0);
}
}
static int i915_dispatch_gem_execbuffer(struct drm_device *dev , struct drm_i915_gem_execbuffer *exec ,
uint64_t exec_offset )
{
drm_i915_private_t *dev_priv ;
struct drm_clip_rect *boxes ;
int nbox ;
int i ;
int count ;
uint32_t exec_start ;
uint32_t exec_len ;
unsigned int outring ;
unsigned int ringmask ;
unsigned int outcount ;
char volatile *virt ;
int ret ;
int tmp ;
{
dev_priv = dev->dev_private;
boxes = (struct drm_clip_rect *)((uintptr_t )exec->cliprects_ptr);
nbox = exec->num_cliprects;
i = 0;
exec_start = (uint32_t )exec_offset + exec->batch_start_offset;
exec_len = exec->batch_len;
if ((exec_start | exec_len) & 7U) {
printk("<3>[drm:%s] *ERROR* alignment\n", "i915_dispatch_gem_execbuffer");
return (-22);
} else {
}
if (! exec_start) {
return (-22);
} else {
}
count = nbox ? nbox : 1;
i = 0;
while (1) {
if (i < count) {
} else {
break;
}
if (i < nbox) {
tmp = i915_emit_box(dev, boxes, i, exec->DR1, exec->DR4);
ret = tmp;
if (ret) {
return (ret);
} else {
}
} else {
}
if (dev->pci_device == 13687 || dev->pci_device == 9570) {
while (1) {
if (dev_priv->ring.space < 4 * 4) {
i915_wait_ring(dev, 4 * 4, "i915_dispatch_gem_execbuffer");
} else {
}
outcount = 0;
outring = dev_priv->ring.tail;
ringmask = dev_priv->ring.tail_mask;
virt = dev_priv->ring.virtual_start;
break;
}
while (1) {
*((unsigned int volatile *)(virt + outring)) = (48 << 23) | 1;
outcount = outcount + 1U;
outring = outring + 4U;
outring = outring & ringmask;
break;
}
while (1) {
*((unsigned int volatile *)(virt + outring)) = exec_start | 1U;
outcount = outcount + 1U;
outring = outring + 4U;
outring = outring & ringmask;
break;
}
while (1) {
*((unsigned int volatile *)(virt + outring)) = (exec_start + exec_len) - (uint32_t )4;
outcount = outcount + 1U;
outring = outring + 4U;
outring = outring & ringmask;
break;
}
while (1) {
*((unsigned int volatile *)(virt + outring)) = 0;
outcount = outcount + 1U;
outring = outring + 4U;
outring = outring & ringmask;
break;
}
while (1) {
dev_priv->ring.tail = outring;
dev_priv->ring.space = (unsigned int )dev_priv->ring.space - outcount * 4U;
writel(outring, dev_priv->regs + 8240);
break;
}
} else {
while (1) {
if (dev_priv->ring.space < 2 * 4) {
i915_wait_ring(dev, 2 * 4, "i915_dispatch_gem_execbuffer");
} else {
}
outcount = 0;
outring = dev_priv->ring.tail;
ringmask = dev_priv->ring.tail_mask;
virt = dev_priv->ring.virtual_start;
break;
}
if (((((((((dev->pci_device == 10610 || dev->pci_device == 10626) || dev->pci_device == 10642) || dev->pci_device == 10658) || dev->pci_device == 10754) || dev->pci_device == 10770) || dev->pci_device == 10818) || dev->pci_device == 11778) || dev->pci_device == 11794) || dev->pci_device == 11810) {
while (1) {
*((unsigned int volatile *)(virt + outring)) = (((49 << 23) | 0) | (2 << 6)) | (1 << 8);
outcount = outcount + 1U;
outring = outring + 4U;
outring = outring & ringmask;
break;
}
while (1) {
*((unsigned int volatile *)(virt + outring)) = exec_start;
outcount = outcount + 1U;
outring = outring + 4U;
outring = outring & ringmask;
break;
}
} else {
while (1) {
*((unsigned int volatile *)(virt + outring)) = ((49 << 23) | 0) | (2 << 6);
outcount = outcount + 1U;
outring = outring + 4U;
outring = outring & ringmask;
break;
}
while (1) {
*((unsigned int volatile *)(virt + outring)) = exec_start | 1U;
outcount = outcount + 1U;
outring = outring + 4U;
outring = outring & ringmask;
break;
}
}
while (1) {
dev_priv->ring.tail = outring;
dev_priv->ring.space = (unsigned int )dev_priv->ring.space - outcount * 4U;
writel(outring, dev_priv->regs + 8240);
break;
}
}
i = i + 1;
}
return (0);
}
}
static int i915_gem_ring_throttle(struct drm_device *dev , struct drm_file *file_priv )
{
struct drm_i915_file_private *i915_file_priv ;
int ret ;
uint32_t seqno ;
{
i915_file_priv = file_priv->driver_priv;
ret = 0;
mutex_lock(& dev->struct_mutex);
seqno = i915_file_priv->mm.last_gem_throttle_seqno;
i915_file_priv->mm.last_gem_throttle_seqno = i915_file_priv->mm.last_gem_seqno;
if (seqno) {
ret = i915_wait_request(dev, seqno);
} else {
}
mutex_unlock(& dev->struct_mutex);
return (ret);
}
}
int i915_gem_execbuffer(struct drm_device *dev , void *data , struct drm_file *file_priv )
{
drm_i915_private_t *dev_priv ;
struct drm_i915_file_private *i915_file_priv ;
struct drm_i915_gem_execbuffer *args ;
struct drm_i915_gem_exec_object *exec_list ;
struct drm_gem_object **object_list ;
struct drm_gem_object *batch_obj ;
int ret ;
int i ;
int pinned ;
uint64_t exec_offset ;
uint32_t seqno ;
uint32_t flush_domains ;
void *tmp ;
void *tmp___0 ;
unsigned long tmp___1 ;
struct drm_gem_object *obj ;
struct drm_i915_gem_object *obj_priv ;
long tmp___2 ;
struct drm_gem_object *obj___0 ;
struct drm_i915_gem_object *obj_priv___0 ;
unsigned long tmp___3 ;
{
dev_priv = dev->dev_private;
i915_file_priv = file_priv->driver_priv;
args = data;
exec_list = (void *)0;
object_list = (void *)0;
pinned = 0;
if (args->buffer_count < (uint32_t )1) {
printk("<3>[drm:%s] *ERROR* execbuf with %d buffers\n", "i915_gem_execbuffer",
args->buffer_count);
return (-22);
} else {
}
tmp = drm_calloc(sizeof(*exec_list), args->buffer_count, 2);
exec_list = tmp;
tmp___0 = drm_calloc(sizeof(*object_list), args->buffer_count, 2);
object_list = tmp___0;
if ((unsigned long )exec_list == (unsigned long )((void *)0) || (unsigned long )object_list == (unsigned long )((void *)0)) {
printk("<3>[drm:%s] *ERROR* Failed to allocate exec or object list for %d buffers\n",
"i915_gem_execbuffer", args->buffer_count);
ret = -12;
goto pre_mutex_err;
} else {
}
tmp___1 = copy_from_user(exec_list, (struct drm_i915_relocation_entry *)((uintptr_t )args->buffers_ptr),
sizeof(*exec_list) * (unsigned long )args->buffer_count);
ret = tmp___1;
if (ret != 0) {
printk("<3>[drm:%s] *ERROR* copy %d exec entries failed %d\n", "i915_gem_execbuffer",
args->buffer_count, ret);
goto pre_mutex_err;
} else {
}
mutex_lock(& dev->struct_mutex);
if (dev_priv->mm.wedged) {
printk("<3>[drm:%s] *ERROR* Execbuf while wedged\n", "i915_gem_execbuffer");
mutex_unlock(& dev->struct_mutex);
return (-5);
} else {
}
if (dev_priv->mm.suspended) {
printk("<3>[drm:%s] *ERROR* Execbuf while VT-switched.\n", "i915_gem_execbuffer");
mutex_unlock(& dev->struct_mutex);
return (-16);
} else {
}
dev->invalidate_domains = 0;
dev->flush_domains = 0;
i = 0;
while (1) {
if ((uint32_t )i < args->buffer_count) {
} else {
break;
}
*(object_list + i) = drm_gem_object_lookup(dev, file_priv, (exec_list + i)->handle);
if ((unsigned long )*(object_list + i) == (unsigned long )((void *)0)) {
printk("<3>[drm:%s] *ERROR* Invalid object handle %d at index %d\n", "i915_gem_execbuffer",
(exec_list + i)->handle, i);
ret = -9;
goto err;
} else {
}
(*(object_list + i))->pending_read_domains = 0;
(*(object_list + i))->pending_write_domain = 0;
ret = i915_gem_object_pin_and_relocate(*(object_list + i), file_priv, exec_list + i);
if (ret) {
printk("<3>[drm:%s] *ERROR* object bind and relocate failed %d\n", "i915_gem_execbuffer",
ret);
goto err;
} else {
}
pinned = i + 1;
i = i + 1;
}
batch_obj = *(object_list + (args->buffer_count - (uint32_t )1));
batch_obj->pending_read_domains = 8;
batch_obj->pending_write_domain = 0;
i = 0;
while (1) {
if ((uint32_t )i < args->buffer_count) {
} else {
break;
}
obj = *(object_list + i);
obj_priv = obj->driver_private;
if ((unsigned long )obj_priv->gtt_space == (unsigned long )((void *)0)) {
ret = -12;
goto err;
} else {
}
ret = i915_gem_object_set_domain(obj, obj->pending_read_domains, obj->pending_write_domain);
if (ret) {
goto err;
} else {
}
i = i + 1;
}
flush_domains = i915_gem_dev_set_domain(dev);
exec_offset = (exec_list + (args->buffer_count - (uint32_t )1))->offset;
i915_add_request(dev, flush_domains);
ret = i915_dispatch_gem_execbuffer(dev, args, exec_offset);
if (ret) {
printk("<3>[drm:%s] *ERROR* dispatch failed %d\n", "i915_gem_execbuffer", ret);
goto err;
} else {
}
flush_domains = i915_retire_commands(dev);
seqno = i915_add_request(dev, flush_domains);
while (1) {
tmp___2 = ldv__builtin_expect(! (! (seqno == (uint32_t )0)), 0);
if (tmp___2) {
while (1) {
__asm__ volatile ("1:\tud2\n"
".pushsection __bug_table,\"a\"\n"
"2:\t.quad 1b, %c0\n"
"\t.word %c1, 0\n"
"\t.org 2b+%c2\n"
".popsection": : "i" ("/work/ldvuser/novikov/work/current--X--drivers/gpu/drm/i915/i915.ko--X--defaultlinux--X--32_1--X--cpachecker/linux/csd_deg_dscv/21/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/i915/i915_gem.c"),
"i" (1922), "i" (sizeof(struct bug_entry )));
while (1) {
}
break;
}
} else {
}
break;
}
i915_file_priv->mm.last_gem_seqno = seqno;
i = 0;
while (1) {
if ((uint32_t )i < args->buffer_count) {
} else {
break;
}
obj___0 = *(object_list + i);
obj_priv___0 = obj___0->driver_private;
i915_gem_object_move_to_active(obj___0);
obj_priv___0->last_rendering_seqno = seqno;
i = i + 1;
}
tmp___3 = copy_to_user((struct drm_i915_relocation_entry *)((uintptr_t )args->buffers_ptr),
exec_list, sizeof(*exec_list) * (unsigned long )args->buffer_count);
ret = tmp___3;
if (ret) {
printk("<3>[drm:%s] *ERROR* failed to copy %d exec entries back to user (%d)\n",
"i915_gem_execbuffer", args->buffer_count, ret);
} else {
}
err:
if ((unsigned long )object_list != (unsigned long )((void *)0)) {
i = 0;
while (1) {
if (i < pinned) {
} else {
break;
}
i915_gem_object_unpin(*(object_list + i));
i = i + 1;
}
i = 0;
while (1) {
if ((uint32_t )i < args->buffer_count) {
} else {
break;
}
drm_gem_object_unreference(*(object_list + i));
i = i + 1;
}
} else {
}
mutex_unlock(& dev->struct_mutex);
pre_mutex_err:
drm_free(object_list, sizeof(*object_list) * (unsigned long )args->buffer_count,
2);
drm_free(exec_list, sizeof(*exec_list) * (unsigned long )args->buffer_count, 2);
return (ret);
}
}
int i915_gem_object_pin(struct drm_gem_object *obj , uint32_t alignment )
{
struct drm_device *dev ;
struct drm_i915_gem_object *obj_priv ;
int ret ;
int tmp ;
{
dev = obj->dev;
obj_priv = obj->driver_private;
if ((unsigned long )obj_priv->gtt_space == (unsigned long )((void *)0)) {
ret = i915_gem_object_bind_to_gtt(obj, alignment);
if (ret != 0) {
printk("<3>[drm:%s] *ERROR* Failure to bind: %d", "i915_gem_object_pin", ret);
return (ret);
} else {
}
} else {
}
obj_priv->pin_count = obj_priv->pin_count + 1;
if (obj_priv->pin_count == 1) {
atomic_inc(& dev->pin_count);
atomic_add(obj->size, & dev->pin_memory);
if (! obj_priv->active && (obj->write_domain & (unsigned int )(~ (1 | 64))) == 0U) {
tmp = list_empty(& obj_priv->list);
if (tmp) {
} else {
list_del_init(& obj_priv->list);
}
} else {
}
} else {
}
return (0);
}
}
void i915_gem_object_unpin(struct drm_gem_object *obj )
{
struct drm_device *dev ;
drm_i915_private_t *dev_priv ;
struct drm_i915_gem_object *obj_priv ;
long tmp ;
long tmp___0 ;
{
dev = obj->dev;
dev_priv = dev->dev_private;
obj_priv = obj->driver_private;
obj_priv->pin_count = obj_priv->pin_count - 1;
while (1) {
tmp = ldv__builtin_expect(! (! (obj_priv->pin_count < 0)), 0);
if (tmp) {
while (1) {
__asm__ volatile ("1:\tud2\n"
".pushsection __bug_table,\"a\"\n"
"2:\t.quad 1b, %c0\n"
"\t.word %c1, 0\n"
"\t.org 2b+%c2\n"
".popsection": : "i" ("/work/ldvuser/novikov/work/current--X--drivers/gpu/drm/i915/i915.ko--X--defaultlinux--X--32_1--X--cpachecker/linux/csd_deg_dscv/21/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/i915/i915_gem.c"),
"i" (2011), "i" (sizeof(struct bug_entry )));
while (1) {
}
break;
}
} else {
}
break;
}
while (1) {
tmp___0 = ldv__builtin_expect(! (! ((unsigned long )obj_priv->gtt_space == (unsigned long )((void *)0))),
0);
if (tmp___0) {
while (1) {
__asm__ volatile ("1:\tud2\n"
".pushsection __bug_table,\"a\"\n"
"2:\t.quad 1b, %c0\n"
"\t.word %c1, 0\n"
"\t.org 2b+%c2\n"
".popsection": : "i" ("/work/ldvuser/novikov/work/current--X--drivers/gpu/drm/i915/i915.ko--X--defaultlinux--X--32_1--X--cpachecker/linux/csd_deg_dscv/21/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/i915/i915_gem.c"),
"i" (2012), "i" (sizeof(struct bug_entry )));
while (1) {
}
break;
}
} else {
}
break;
}
if (obj_priv->pin_count == 0) {
if (! obj_priv->active && (obj->write_domain & (unsigned int )(~ (1 | 64))) == 0U) {
list_move_tail(& obj_priv->list, & dev_priv->mm.inactive_list);
} else {
}
atomic_dec(& dev->pin_count);
atomic_sub(obj->size, & dev->pin_memory);
} else {
}
return;
}
}
int i915_gem_pin_ioctl(struct drm_device *dev , void *data , struct drm_file *file_priv )
{
struct drm_i915_gem_pin *args ;
struct drm_gem_object *obj ;
struct drm_i915_gem_object *obj_priv ;
int ret ;
{
args = data;
mutex_lock(& dev->struct_mutex);
obj = drm_gem_object_lookup(dev, file_priv, args->handle);
if ((unsigned long )obj == (unsigned long )((void *)0)) {
printk("<3>[drm:%s] *ERROR* Bad handle in i915_gem_pin_ioctl(): %d\n", "i915_gem_pin_ioctl",
args->handle);
mutex_unlock(& dev->struct_mutex);
return (-9);
} else {
}
obj_priv = obj->driver_private;
ret = i915_gem_object_pin(obj, args->alignment);
if (ret != 0) {
drm_gem_object_unreference(obj);
mutex_unlock(& dev->struct_mutex);
return (ret);
} else {
}
if (obj->write_domain & 1U) {
i915_gem_clflush_object(obj);
drm_agp_chipset_flush(dev);
obj->write_domain = 0;
} else {
}
args->offset = obj_priv->gtt_offset;
drm_gem_object_unreference(obj);
mutex_unlock(& dev->struct_mutex);
return (0);
}
}
int i915_gem_unpin_ioctl(struct drm_device *dev , void *data , struct drm_file *file_priv )
{
struct drm_i915_gem_pin *args ;
struct drm_gem_object *obj ;
{
args = data;
mutex_lock(& dev->struct_mutex);
obj = drm_gem_object_lookup(dev, file_priv, args->handle);
if ((unsigned long )obj == (unsigned long )((void *)0)) {
printk("<3>[drm:%s] *ERROR* Bad handle in i915_gem_unpin_ioctl(): %d\n", "i915_gem_unpin_ioctl",
args->handle);
mutex_unlock(& dev->struct_mutex);
return (-9);
} else {
}
i915_gem_object_unpin(obj);
drm_gem_object_unreference(obj);
mutex_unlock(& dev->struct_mutex);
return (0);
}
}
int i915_gem_busy_ioctl(struct drm_device *dev , void *data , struct drm_file *file_priv )
{
struct drm_i915_gem_busy *args ;
struct drm_gem_object *obj ;
struct drm_i915_gem_object *obj_priv ;
{
args = data;
mutex_lock(& dev->struct_mutex);
obj = drm_gem_object_lookup(dev, file_priv, args->handle);
if ((unsigned long )obj == (unsigned long )((void *)0)) {
printk("<3>[drm:%s] *ERROR* Bad handle in i915_gem_busy_ioctl(): %d\n", "i915_gem_busy_ioctl",
args->handle);
mutex_unlock(& dev->struct_mutex);
return (-9);
} else {
}
obj_priv = obj->driver_private;
args->busy = obj_priv->active;
drm_gem_object_unreference(obj);
mutex_unlock(& dev->struct_mutex);
return (0);
}
}
int i915_gem_throttle_ioctl(struct drm_device *dev , void *data , struct drm_file *file_priv )
{
int tmp ;
{
tmp = i915_gem_ring_throttle(dev, file_priv);
return (tmp);
}
}
int i915_gem_init_object(struct drm_gem_object *obj )
{
struct drm_i915_gem_object *obj_priv ;
void *tmp ;
{
tmp = drm_calloc(1, sizeof(*obj_priv), 2);
obj_priv = tmp;
if ((unsigned long )obj_priv == (unsigned long )((void *)0)) {
return (-12);
} else {
}
obj->write_domain = 1;
obj->read_domains = 1;
obj->driver_private = obj_priv;
obj_priv->obj = obj;
INIT_LIST_HEAD(& obj_priv->list);
return (0);
}
}
void i915_gem_free_object(struct drm_gem_object *obj )
{
struct drm_i915_gem_object *obj_priv ;
{
obj_priv = obj->driver_private;
while (1) {
if (obj_priv->pin_count > 0) {
} else {
break;
}
i915_gem_object_unpin(obj);
}
i915_gem_object_unbind(obj);
drm_free(obj_priv->page_cpu_valid, 1, 2);
drm_free(obj->driver_private, 1, 2);
return;
}
}
static int i915_gem_set_domain(struct drm_gem_object *obj , struct drm_file *file_priv ,
uint32_t read_domains , uint32_t write_domain )
{
struct drm_device *dev ;
int ret ;
uint32_t flush_domains ;
int tmp ;
int tmp___0 ;
long tmp___1 ;
{
dev = obj->dev;
while (1) {
tmp = mutex_is_locked(& dev->struct_mutex);
if (tmp) {
tmp___0 = 0;
} else {
tmp___0 = 1;
}
tmp___1 = ldv__builtin_expect(tmp___0, 0);
if (tmp___1) {
while (1) {
__asm__ volatile ("1:\tud2\n"
".pushsection __bug_table,\"a\"\n"
"2:\t.quad 1b, %c0\n"
"\t.word %c1, 0\n"
"\t.org 2b+%c2\n"
".popsection": : "i" ("/work/ldvuser/novikov/work/current--X--drivers/gpu/drm/i915/i915.ko--X--defaultlinux--X--32_1--X--cpachecker/linux/csd_deg_dscv/21/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/i915/i915_gem.c"),
"i" (2174), "i" (sizeof(struct bug_entry )));
while (1) {
}
break;
}
} else {
}
break;
}
ret = i915_gem_object_set_domain(obj, read_domains, write_domain);
if (ret) {
return (ret);
} else {
}
flush_domains = i915_gem_dev_set_domain(obj->dev);
if (flush_domains & (unsigned int )(~ (1 | 64))) {
i915_add_request(dev, flush_domains);
} else {
}
return (0);
}
}
static int i915_gem_evict_from_list(struct drm_device *dev , struct list_head *head )
{
struct drm_gem_object *obj ;
struct drm_i915_gem_object *obj_priv ;
int ret ;
struct list_head const *__mptr ;
int tmp ;
{
while (1) {
tmp = list_empty(head);
if (tmp) {
break;
} else {
}
__mptr = head->next;
obj_priv = (struct drm_i915_gem_object *)((char *)__mptr - (unsigned int )(& ((struct drm_i915_gem_object *)0)->list));
obj = obj_priv->obj;
if (obj_priv->pin_count != 0) {
printk("<3>[drm:%s] *ERROR* Pinned object in unbind list\n", "i915_gem_evict_from_list");
mutex_unlock(& dev->struct_mutex);
return (-22);
} else {
}
ret = i915_gem_object_unbind(obj);
if (ret != 0) {
printk("<3>[drm:%s] *ERROR* Error unbinding object in LeaveVT: %d\n", "i915_gem_evict_from_list",
ret);
mutex_unlock(& dev->struct_mutex);
return (ret);
} else {
}
}
return (0);
}
}
static int i915_gem_idle(struct drm_device *dev )
{
drm_i915_private_t *dev_priv ;
uint32_t seqno ;
uint32_t cur_seqno ;
uint32_t last_seqno ;
int stuck ;
int ret ;
int tmp ;
int tmp___0 ;
int tmp___1 ;
int tmp___2 ;
long tmp___3 ;
int tmp___4 ;
int tmp___5 ;
long tmp___6 ;
int tmp___7 ;
int tmp___8 ;
long tmp___9 ;
int tmp___10 ;
int tmp___11 ;
long tmp___12 ;
int tmp___13 ;
int tmp___14 ;
long tmp___15 ;
int tmp___16 ;
int tmp___17 ;
long tmp___18 ;
int tmp___19 ;
int tmp___20 ;
long tmp___21 ;
{
dev_priv = dev->dev_private;
if (dev_priv->mm.suspended) {
return (0);
} else {
}
dev_priv->mm.suspended = 1;
i915_kernel_lost_context(dev);
i915_gem_flush(dev, ~ (1 | 64), ~ (1 | 64));
seqno = i915_add_request(dev, ~ (1 | 64));
if (seqno == (uint32_t )0) {
mutex_unlock(& dev->struct_mutex);
return (-12);
} else {
}
dev_priv->mm.waiting_gem_seqno = seqno;
last_seqno = 0;
stuck = 0;
while (1) {
cur_seqno = i915_get_gem_seqno(dev);
tmp = i915_seqno_passed(cur_seqno, seqno);
if (tmp) {
break;
} else {
}
if (last_seqno == cur_seqno) {
tmp___0 = stuck;
stuck = stuck + 1;
if (tmp___0 > 100) {
printk("<3>[drm:%s] *ERROR* hardware wedged\n", "i915_gem_idle");
dev_priv->mm.wedged = 1;
__wake_up(& dev_priv->irq_queue, 1, 1, (void *)0);
break;
} else {
}
} else {
}
msleep(10);
last_seqno = cur_seqno;
}
dev_priv->mm.waiting_gem_seqno = 0;
i915_gem_retire_requests(dev);
while (1) {
tmp___1 = list_empty(& dev_priv->mm.active_list);
if (tmp___1) {
tmp___2 = 0;
} else {
tmp___2 = 1;
}
tmp___3 = ldv__builtin_expect(tmp___2, 0);
if (tmp___3) {
while (1) {
__asm__ volatile ("1:\tud2\n"
".pushsection __bug_table,\"a\"\n"
"2:\t.quad 1b, %c0\n"
"\t.word %c1, 0\n"
"\t.org 2b+%c2\n"
".popsection": : "i" ("/work/ldvuser/novikov/work/current--X--drivers/gpu/drm/i915/i915.ko--X--defaultlinux--X--32_1--X--cpachecker/linux/csd_deg_dscv/21/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/i915/i915_gem.c"),
"i" (2274), "i" (sizeof(struct bug_entry )));
while (1) {
}
break;
}
} else {
}
break;
}
while (1) {
tmp___4 = list_empty(& dev_priv->mm.flushing_list);
if (tmp___4) {
tmp___5 = 0;
} else {
tmp___5 = 1;
}
tmp___6 = ldv__builtin_expect(tmp___5, 0);
if (tmp___6) {
while (1) {
__asm__ volatile ("1:\tud2\n"
".pushsection __bug_table,\"a\"\n"
"2:\t.quad 1b, %c0\n"
"\t.word %c1, 0\n"
"\t.org 2b+%c2\n"
".popsection": : "i" ("/work/ldvuser/novikov/work/current--X--drivers/gpu/drm/i915/i915.ko--X--defaultlinux--X--32_1--X--cpachecker/linux/csd_deg_dscv/21/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/i915/i915_gem.c"),
"i" (2275), "i" (sizeof(struct bug_entry )));
while (1) {
}
break;
}
} else {
}
break;
}
while (1) {
tmp___7 = list_empty(& dev_priv->mm.request_list);
if (tmp___7) {
tmp___8 = 0;
} else {
tmp___8 = 1;
}
tmp___9 = ldv__builtin_expect(tmp___8, 0);
if (tmp___9) {
while (1) {
__asm__ volatile ("1:\tud2\n"
".pushsection __bug_table,\"a\"\n"
"2:\t.quad 1b, %c0\n"
"\t.word %c1, 0\n"
"\t.org 2b+%c2\n"
".popsection": : "i" ("/work/ldvuser/novikov/work/current--X--drivers/gpu/drm/i915/i915.ko--X--defaultlinux--X--32_1--X--cpachecker/linux/csd_deg_dscv/21/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/i915/i915_gem.c"),
"i" (2280), "i" (sizeof(struct bug_entry )));
while (1) {
}
break;
}
} else {
}
break;
}
ret = i915_gem_evict_from_list(dev, & dev_priv->mm.inactive_list);
if (ret) {
return (ret);
} else {
}
while (1) {
tmp___10 = list_empty(& dev_priv->mm.active_list);
if (tmp___10) {
tmp___11 = 0;
} else {
tmp___11 = 1;
}
tmp___12 = ldv__builtin_expect(tmp___11, 0);
if (tmp___12) {
while (1) {
__asm__ volatile ("1:\tud2\n"
".pushsection __bug_table,\"a\"\n"
"2:\t.quad 1b, %c0\n"
"\t.word %c1, 0\n"
"\t.org 2b+%c2\n"
".popsection": : "i" ("/work/ldvuser/novikov/work/current--X--drivers/gpu/drm/i915/i915.ko--X--defaultlinux--X--32_1--X--cpachecker/linux/csd_deg_dscv/21/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/i915/i915_gem.c"),
"i" (2287), "i" (sizeof(struct bug_entry )));
while (1) {
}
break;
}
} else {
}
break;
}
while (1) {
tmp___13 = list_empty(& dev_priv->mm.flushing_list);
if (tmp___13) {
tmp___14 = 0;
} else {
tmp___14 = 1;
}
tmp___15 = ldv__builtin_expect(tmp___14, 0);
if (tmp___15) {
while (1) {
__asm__ volatile ("1:\tud2\n"
".pushsection __bug_table,\"a\"\n"
"2:\t.quad 1b, %c0\n"
"\t.word %c1, 0\n"
"\t.org 2b+%c2\n"
".popsection": : "i" ("/work/ldvuser/novikov/work/current--X--drivers/gpu/drm/i915/i915.ko--X--defaultlinux--X--32_1--X--cpachecker/linux/csd_deg_dscv/21/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/i915/i915_gem.c"),
"i" (2288), "i" (sizeof(struct bug_entry )));
while (1) {
}
break;
}
} else {
}
break;
}
while (1) {
tmp___16 = list_empty(& dev_priv->mm.inactive_list);
if (tmp___16) {
tmp___17 = 0;
} else {
tmp___17 = 1;
}
tmp___18 = ldv__builtin_expect(tmp___17, 0);
if (tmp___18) {
while (1) {
__asm__ volatile ("1:\tud2\n"
".pushsection __bug_table,\"a\"\n"
"2:\t.quad 1b, %c0\n"
"\t.word %c1, 0\n"
"\t.org 2b+%c2\n"
".popsection": : "i" ("/work/ldvuser/novikov/work/current--X--drivers/gpu/drm/i915/i915.ko--X--defaultlinux--X--32_1--X--cpachecker/linux/csd_deg_dscv/21/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/i915/i915_gem.c"),
"i" (2289), "i" (sizeof(struct bug_entry )));
while (1) {
}
break;
}
} else {
}
break;
}
while (1) {
tmp___19 = list_empty(& dev_priv->mm.request_list);
if (tmp___19) {
tmp___20 = 0;
} else {
tmp___20 = 1;
}
tmp___21 = ldv__builtin_expect(tmp___20, 0);
if (tmp___21) {
while (1) {
__asm__ volatile ("1:\tud2\n"
".pushsection __bug_table,\"a\"\n"
"2:\t.quad 1b, %c0\n"
"\t.word %c1, 0\n"
"\t.org 2b+%c2\n"
".popsection": : "i" ("/work/ldvuser/novikov/work/current--X--drivers/gpu/drm/i915/i915.ko--X--defaultlinux--X--32_1--X--cpachecker/linux/csd_deg_dscv/21/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/i915/i915_gem.c"),
"i" (2290), "i" (sizeof(struct bug_entry )));
while (1) {
}
break;
}
} else {
}
break;
}
return (0);
}
}
static int i915_gem_init_hws(struct drm_device *dev )
{
drm_i915_private_t *dev_priv ;
struct drm_gem_object *obj ;
struct drm_i915_gem_object *obj_priv ;
int ret ;
{
dev_priv = dev->dev_private;
if (! ((((dev->pci_device == 10690 || dev->pci_device == 10674) || dev->pci_device == 10706) || dev->pci_device == 10818) || ((dev->pci_device == 11778 || dev->pci_device == 11794) || dev->pci_device == 11810))) {
return (0);
} else {
}
obj = drm_gem_object_alloc(dev, 4096);
if ((unsigned long )obj == (unsigned long )((void *)0)) {
printk("<3>[drm:%s] *ERROR* Failed to allocate status page\n", "i915_gem_init_hws");
return (-12);
} else {
}
obj_priv = obj->driver_private;
ret = i915_gem_object_pin(obj, 4096);
if (ret != 0) {
drm_gem_object_unreference(obj);
return (ret);
} else {
}
dev_priv->status_gfx_addr = obj_priv->gtt_offset;
dev_priv->hws_map.offset = (dev->agp)->base + (unsigned long )obj_priv->gtt_offset;
dev_priv->hws_map.size = 4096;
dev_priv->hws_map.type = 0;
dev_priv->hws_map.flags = 0;
dev_priv->hws_map.mtrr = 0;
drm_core_ioremap_wc(& dev_priv->hws_map, dev);
if ((unsigned long )dev_priv->hws_map.handle == (unsigned long )((void *)0)) {
printk("<3>[drm:%s] *ERROR* Failed to map status page.\n", "i915_gem_init_hws");
memset(& dev_priv->hws_map, 0, sizeof(dev_priv->hws_map));
drm_gem_object_unreference(obj);
return (-22);
} else {
}
dev_priv->hws_obj = obj;
dev_priv->hw_status_page = dev_priv->hws_map.handle;
memset(dev_priv->hw_status_page, 0, 1UL << 12);
writel(dev_priv->status_gfx_addr, dev_priv->regs + 8320);
while (1) {
if (drm_debug) {
printk("<7>[drm:%s] hws offset: 0x%08x\n", "i915_gem_init_hws", dev_priv->status_gfx_addr);
} else {
}
break;
}
return (0);
}
}
static int i915_gem_init_ringbuffer(struct drm_device *dev )
{
drm_i915_private_t *dev_priv ;
struct drm_gem_object *obj ;
struct drm_i915_gem_object *obj_priv ;
int ret ;
u32 head ;
unsigned int tmp ;
unsigned int tmp___0 ;
unsigned int tmp___1 ;
unsigned int tmp___2 ;
unsigned int tmp___3 ;
unsigned int tmp___4 ;
unsigned int tmp___5 ;
unsigned int tmp___6 ;
unsigned int tmp___7 ;
unsigned int tmp___8 ;
unsigned int tmp___9 ;
unsigned int tmp___10 ;
unsigned int tmp___11 ;
unsigned int tmp___12 ;
{
dev_priv = dev->dev_private;
ret = i915_gem_init_hws(dev);
if (ret != 0) {
return (ret);
} else {
}
obj = drm_gem_object_alloc(dev, 128 * 1024);
if ((unsigned long )obj == (unsigned long )((void *)0)) {
printk("<3>[drm:%s] *ERROR* Failed to allocate ringbuffer\n", "i915_gem_init_ringbuffer");
return (-12);
} else {
}
obj_priv = obj->driver_private;
ret = i915_gem_object_pin(obj, 4096);
if (ret != 0) {
drm_gem_object_unreference(obj);
return (ret);
} else {
}
dev_priv->ring.Size = obj->size;
dev_priv->ring.tail_mask = obj->size - (size_t )1;
dev_priv->ring.map.offset = (dev->agp)->base + (unsigned long )obj_priv->gtt_offset;
dev_priv->ring.map.size = obj->size;
dev_priv->ring.map.type = 0;
dev_priv->ring.map.flags = 0;
dev_priv->ring.map.mtrr = 0;
drm_core_ioremap_wc(& dev_priv->ring.map, dev);
if ((unsigned long )dev_priv->ring.map.handle == (unsigned long )((void *)0)) {
printk("<3>[drm:%s] *ERROR* Failed to map ringbuffer.\n", "i915_gem_init_ringbuffer");
memset(& dev_priv->ring, 0, sizeof(dev_priv->ring));
drm_gem_object_unreference(obj);
return (-22);
} else {
}
dev_priv->ring.ring_obj = obj;
dev_priv->ring.virtual_start = dev_priv->ring.map.handle;
writel(0, dev_priv->regs + 8252);
writel(0, dev_priv->regs + 8240);
writel(0, dev_priv->regs + 8244);
writel(obj_priv->gtt_offset, dev_priv->regs + 8248);
tmp = readl(dev_priv->regs + 8244);
head = tmp & 2097148U;
if (head != (u32 )0) {
tmp___0 = readl(dev_priv->regs + 8248);
tmp___1 = readl(dev_priv->regs + 8240);
tmp___2 = readl(dev_priv->regs + 8244);
tmp___3 = readl(dev_priv->regs + 8252);
printk("<3>[drm:%s] *ERROR* Ring head not reset to zero ctl %08x head %08x tail %08x start %08x\n",
"i915_gem_init_ringbuffer", tmp___3, tmp___2, tmp___1, tmp___0);
writel(0, dev_priv->regs + 8244);
tmp___4 = readl(dev_priv->regs + 8248);
tmp___5 = readl(dev_priv->regs + 8240);
tmp___6 = readl(dev_priv->regs + 8244);
tmp___7 = readl(dev_priv->regs + 8252);
printk("<3>[drm:%s] *ERROR* Ring head forced to zero ctl %08x head %08x tail %08x start %08x\n",
"i915_gem_init_ringbuffer", tmp___7, tmp___6, tmp___5, tmp___4);
} else {
}
writel((((obj->size - (size_t )4096) & 2093056UL) | 0UL) | 1UL, dev_priv->regs + 8252);
tmp___8 = readl(dev_priv->regs + 8244);
head = tmp___8 & 2097148U;
if (head != (u32 )0) {
tmp___9 = readl(dev_priv->regs + 8248);
tmp___10 = readl(dev_priv->regs + 8240);
tmp___11 = readl(dev_priv->regs + 8244);
tmp___12 = readl(dev_priv->regs + 8252);
printk("<3>[drm:%s] *ERROR* Ring initialization failed ctl %08x head %08x tail %08x start %08x\n",
"i915_gem_init_ringbuffer", tmp___12, tmp___11, tmp___10, tmp___9);
return (-5);
} else {
}
i915_kernel_lost_context(dev);
return (0);
}
}
static void i915_gem_cleanup_ringbuffer(struct drm_device *dev )
{
drm_i915_private_t *dev_priv ;
{
dev_priv = dev->dev_private;
if ((unsigned long )dev_priv->ring.ring_obj == (unsigned long )((void *)0)) {
return;
} else {
}
drm_core_ioremapfree(& dev_priv->ring.map, dev);
i915_gem_object_unpin(dev_priv->ring.ring_obj);
drm_gem_object_unreference(dev_priv->ring.ring_obj);
dev_priv->ring.ring_obj = (void *)0;
memset(& dev_priv->ring, 0, sizeof(dev_priv->ring));
if ((unsigned long )dev_priv->hws_obj != (unsigned long )((void *)0)) {
i915_gem_object_unpin(dev_priv->hws_obj);
drm_gem_object_unreference(dev_priv->hws_obj);
dev_priv->hws_obj = (void *)0;
memset(& dev_priv->hws_map, 0, sizeof(dev_priv->hws_map));
writel(536866816, dev_priv->regs + 8320);
} else {
}
return;
}
}
int i915_gem_entervt_ioctl(struct drm_device *dev , void *data , struct drm_file *file_priv )
{
drm_i915_private_t *dev_priv ;
int ret ;
int tmp ;
int tmp___0 ;
long tmp___1 ;
int tmp___2 ;
int tmp___3 ;
long tmp___4 ;
int tmp___5 ;
int tmp___6 ;
long tmp___7 ;
int tmp___8 ;
int tmp___9 ;
long tmp___10 ;
{
dev_priv = dev->dev_private;
if (dev_priv->mm.wedged) {
printk("<3>[drm:%s] *ERROR* Reenabling wedged hardware, good luck\n", "i915_gem_entervt_ioctl");
dev_priv->mm.wedged = 0;
} else {
}
ret = i915_gem_init_ringbuffer(dev);
if (ret != 0) {
return (ret);
} else {
}
mutex_lock(& dev->struct_mutex);
while (1) {
tmp = list_empty(& dev_priv->mm.active_list);
if (tmp) {
tmp___0 = 0;
} else {
tmp___0 = 1;
}
tmp___1 = ldv__builtin_expect(tmp___0, 0);
if (tmp___1) {
while (1) {
__asm__ volatile ("1:\tud2\n"
".pushsection __bug_table,\"a\"\n"
"2:\t.quad 1b, %c0\n"
"\t.word %c1, 0\n"
"\t.org 2b+%c2\n"
".popsection": : "i" ("/work/ldvuser/novikov/work/current--X--drivers/gpu/drm/i915/i915.ko--X--defaultlinux--X--32_1--X--cpachecker/linux/csd_deg_dscv/21/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/i915/i915_gem.c"),
"i" (2486), "i" (sizeof(struct bug_entry )));
while (1) {
}
break;
}
} else {
}
break;
}
while (1) {
tmp___2 = list_empty(& dev_priv->mm.flushing_list);
if (tmp___2) {
tmp___3 = 0;
} else {
tmp___3 = 1;
}
tmp___4 = ldv__builtin_expect(tmp___3, 0);
if (tmp___4) {
while (1) {
__asm__ volatile ("1:\tud2\n"
".pushsection __bug_table,\"a\"\n"
"2:\t.quad 1b, %c0\n"
"\t.word %c1, 0\n"
"\t.org 2b+%c2\n"
".popsection": : "i" ("/work/ldvuser/novikov/work/current--X--drivers/gpu/drm/i915/i915.ko--X--defaultlinux--X--32_1--X--cpachecker/linux/csd_deg_dscv/21/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/i915/i915_gem.c"),
"i" (2487), "i" (sizeof(struct bug_entry )));
while (1) {
}
break;
}
} else {
}
break;
}
while (1) {
tmp___5 = list_empty(& dev_priv->mm.inactive_list);
if (tmp___5) {
tmp___6 = 0;
} else {
tmp___6 = 1;
}
tmp___7 = ldv__builtin_expect(tmp___6, 0);
if (tmp___7) {
while (1) {
__asm__ volatile ("1:\tud2\n"
".pushsection __bug_table,\"a\"\n"
"2:\t.quad 1b, %c0\n"
"\t.word %c1, 0\n"
"\t.org 2b+%c2\n"
".popsection": : "i" ("/work/ldvuser/novikov/work/current--X--drivers/gpu/drm/i915/i915.ko--X--defaultlinux--X--32_1--X--cpachecker/linux/csd_deg_dscv/21/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/i915/i915_gem.c"),
"i" (2488), "i" (sizeof(struct bug_entry )));
while (1) {
}
break;
}
} else {
}
break;
}
while (1) {
tmp___8 = list_empty(& dev_priv->mm.request_list);
if (tmp___8) {
tmp___9 = 0;
} else {
tmp___9 = 1;
}
tmp___10 = ldv__builtin_expect(tmp___9, 0);
if (tmp___10) {
while (1) {
__asm__ volatile ("1:\tud2\n"
".pushsection __bug_table,\"a\"\n"
"2:\t.quad 1b, %c0\n"
"\t.word %c1, 0\n"
"\t.org 2b+%c2\n"
".popsection": : "i" ("/work/ldvuser/novikov/work/current--X--drivers/gpu/drm/i915/i915.ko--X--defaultlinux--X--32_1--X--cpachecker/linux/csd_deg_dscv/21/dscv_tempdir/dscv/ri/32_1/drivers/gpu/drm/i915/i915_gem.c"),
"i" (2489), "i" (sizeof(struct bug_entry )));
while (1) {
}
break;
}
} else {
}
break;
}
dev_priv->mm.suspended = 0;
mutex_unlock(& dev->struct_mutex);
drm_irq_install(dev);
return (0);
}
}
int i915_gem_leavevt_ioctl(struct drm_device *dev , void *data , struct drm_file *file_priv )
{
int ret ;
{
mutex_lock(& dev->struct_mutex);
ret = i915_gem_idle(dev);
if (ret == 0) {
i915_gem_cleanup_ringbuffer(dev);
} else {
}
mutex_unlock(& dev->struct_mutex);
drm_irq_uninstall(dev);
return (0);
}
}
void i915_gem_lastclose(struct drm_device *dev )
{
int ret ;
drm_i915_private_t *dev_priv ;
{
dev_priv = dev->dev_private;
mutex_lock(& dev->struct_mutex);
if ((unsigned long )dev_priv->ring.ring_obj != (unsigned long )((void *)0)) {
ret = i915_gem_idle(dev);
if (ret) {
printk("<3>[drm:%s] *ERROR* failed to idle hardware: %d\n", "i915_gem_lastclose",
ret);
} else {
}
i915_gem_cleanup_ringbuffer(dev);
} else {
}
mutex_unlock(& dev->struct_mutex);
return;
}
}
void i915_gem_load(struct drm_device *dev )
{
drm_i915_private_t *dev_priv ;
atomic_long_t __constr_expr_0 ;
atomic_long_t __constr_expr_1 ;
{
dev_priv = dev->dev_private;
INIT_LIST_HEAD(& dev_priv->mm.active_list);
INIT_LIST_HEAD(& dev_priv->mm.flushing_list);
INIT_LIST_HEAD(& dev_priv->mm.inactive_list);
INIT_LIST_HEAD(& dev_priv->mm.request_list);
while (1) {
while (1) {
__constr_expr_0.counter = 0;
dev_priv->mm.retire_work.work.data = __constr_expr_0;
INIT_LIST_HEAD(& dev_priv->mm.retire_work.work.entry);
while (1) {
dev_priv->mm.retire_work.work.func = & i915_gem_retire_work_handler;
break;
}
break;
}
init_timer(& dev_priv->mm.retire_work.timer);
break;
}
while (1) {
__constr_expr_1.counter = 0;
dev_priv->mm.vblank_work.data = __constr_expr_1;
INIT_LIST_HEAD(& dev_priv->mm.vblank_work.entry);
while (1) {
dev_priv->mm.vblank_work.func = & i915_gem_vblank_work_handler;
break;
}
break;
}
dev_priv->mm.next_gem_seqno = 1;
i915_gem_detect_bit_6_swizzle(dev);
return;
}
}
extern int ( /* format attribute */ sprintf)(char *buf , char const *fmt , ...) ;
extern struct proc_dir_entry *create_proc_entry(char const *name , mode_t mode ,
struct proc_dir_entry *parent ) ;
extern void remove_proc_entry(char const *name , struct proc_dir_entry *parent ) ;
static int i915_gem_active_info(char *buf , char **start , off_t offset , int request ,
int *eof , void *data )
{
struct drm_minor *minor ;
struct drm_device *dev ;
drm_i915_private_t *dev_priv ;
struct drm_i915_gem_object *obj_priv ;
int len ;
int tmp ;
struct list_head const *__mptr ;
struct list_head const *__mptr___0 ;
struct drm_gem_object *obj ;
int tmp___0 ;
int tmp___1 ;
{
minor = (struct drm_minor *)data;
dev = minor->dev;
dev_priv = dev->dev_private;
len = 0;
if ((unsigned long )offset > (1UL << 12) - 80UL) {
*eof = 1;
return (0);
} else {
}
*start = buf + offset;
*eof = 0;
tmp = sprintf(buf + len, "Active:\n");
len = len + tmp;
if ((unsigned long )len > (1UL << 12) - 80UL) {
*eof = 1;
return ((off_t )len - offset);
} else {
}
__mptr = dev_priv->mm.active_list.next;
obj_priv = (struct drm_i915_gem_object *)((char *)__mptr - (unsigned int )(& ((struct drm_i915_gem_object *)0)->list));
while (1) {
__builtin_prefetch(obj_priv->list.next);
if ((unsigned long )(& obj_priv->list) != (unsigned long )(& dev_priv->mm.active_list)) {
} else {
break;
}
obj = obj_priv->obj;
if (obj->name) {
tmp___0 = sprintf(buf + len, " %p(%d): %08x %08x %d\n", obj, obj->name, obj->read_domains,
obj->write_domain, obj_priv->last_rendering_seqno);
len = len + tmp___0;
if ((unsigned long )len > (1UL << 12) - 80UL) {
*eof = 1;
return ((off_t )len - offset);
} else {
}
} else {
tmp___1 = sprintf(buf + len, " %p: %08x %08x %d\n", obj, obj->read_domains,
obj->write_domain, obj_priv->last_rendering_seqno);
len = len + tmp___1;
if ((unsigned long )len > (1UL << 12) - 80UL) {
*eof = 1;
return ((off_t )len - offset);
} else {
}
}
__mptr___0 = obj_priv->list.next;
obj_priv = (struct drm_i915_gem_object *)((char *)__mptr___0 - (unsigned int )(& ((struct drm_i915_gem_object *)0)->list));
}
if ((off_t )len > (off_t )request + offset) {
return (request);
} else {
}
*eof = 1;
return ((off_t )len - offset);
}
}
static int i915_gem_flushing_info(char *buf , char **start , off_t offset , int request ,
int *eof , void *data )
{
struct drm_minor *minor ;
struct drm_device *dev ;
drm_i915_private_t *dev_priv ;
struct drm_i915_gem_object *obj_priv ;
int len ;
int tmp ;
struct list_head const *__mptr ;
struct list_head const *__mptr___0 ;
struct drm_gem_object *obj ;
int tmp___0 ;
int tmp___1 ;
{
minor = (struct drm_minor *)data;
dev = minor->dev;
dev_priv = dev->dev_private;
len = 0;
if ((unsigned long )offset > (1UL << 12) - 80UL) {
*eof = 1;
return (0);
} else {
}
*start = buf + offset;
*eof = 0;
tmp = sprintf(buf + len, "Flushing:\n");
len = len + tmp;
if ((unsigned long )len > (1UL << 12) - 80UL) {
*eof = 1;
return ((off_t )len - offset);
} else {
}
__mptr = dev_priv->mm.flushing_list.next;
obj_priv = (struct drm_i915_gem_object *)((char *)__mptr - (unsigned int )(& ((struct drm_i915_gem_object *)0)->list));
while (1) {
__builtin_prefetch(obj_priv->list.next);
if ((unsigned long )(& obj_priv->list) != (unsigned long )(& dev_priv->mm.flushing_list)) {
} else {
break;
}
obj = obj_priv->obj;
if (obj->name) {
tmp___0 = sprintf(buf + len, " %p(%d): %08x %08x %d\n", obj, obj->name, obj->read_domains,
obj->write_domain, obj_priv->last_rendering_seqno);
len = len + tmp___0;
if ((unsigned long )len > (1UL << 12) - 80UL) {
*eof = 1;
return ((off_t )len - offset);
} else {
}
} else {
tmp___1 = sprintf(buf + len, " %p: %08x %08x %d\n", obj, obj->read_domains,
obj->write_domain, obj_priv->last_rendering_seqno);
len = len + tmp___1;
if ((unsigned long )len > (1UL << 12) - 80UL) {
*eof = 1;
return ((off_t )len - offset);
} else {
}
}
__mptr___0 = obj_priv->list.next;
obj_priv = (struct drm_i915_gem_object *)((char *)__mptr___0 - (unsigned int )(& ((struct drm_i915_gem_object *)0)->list));
}
if ((off_t )len > (off_t )request + offset) {
return (request);
} else {
}
*eof = 1;
return ((off_t )len - offset);
}
}
static int i915_gem_inactive_info(char *buf , char **start , off_t offset , int request ,
int *eof , void *data )
{
struct drm_minor *minor ;
struct drm_device *dev ;
drm_i915_private_t *dev_priv ;
struct drm_i915_gem_object *obj_priv ;
int len ;
int tmp ;
struct list_head const *__mptr ;
struct list_head const *__mptr___0 ;
struct drm_gem_object *obj ;
int tmp___0 ;
int tmp___1 ;
{
minor = (struct drm_minor *)data;
dev = minor->dev;
dev_priv = dev->dev_private;
len = 0;
if ((unsigned long )offset > (1UL << 12) - 80UL) {
*eof = 1;
return (0);
} else {
}
*start = buf + offset;
*eof = 0;
tmp = sprintf(buf + len, "Inactive:\n");
len = len + tmp;
if ((unsigned long )len > (1UL << 12) - 80UL) {
*eof = 1;
return ((off_t )len - offset);
} else {
}
__mptr = dev_priv->mm.inactive_list.next;
obj_priv = (struct drm_i915_gem_object *)((char *)__mptr - (unsigned int )(& ((struct drm_i915_gem_object *)0)->list));
while (1) {
__builtin_prefetch(obj_priv->list.next);
if ((unsigned long )(& obj_priv->list) != (unsigned long )(& dev_priv->mm.inactive_list)) {
} else {
break;
}
obj = obj_priv->obj;
if (obj->name) {
tmp___0 = sprintf(buf + len, " %p(%d): %08x %08x %d\n", obj, obj->name, obj->read_domains,
obj->write_domain, obj_priv->last_rendering_seqno);
len = len + tmp___0;
if ((unsigned long )len > (1UL << 12) - 80UL) {
*eof = 1;
return ((off_t )len - offset);
} else {
}
} else {
tmp___1 = sprintf(buf + len, " %p: %08x %08x %d\n", obj, obj->read_domains,
obj->write_domain, obj_priv->last_rendering_seqno);
len = len + tmp___1;
if ((unsigned long )len > (1UL << 12) - 80UL) {
*eof = 1;
return ((off_t )len - offset);
} else {
}
}
__mptr___0 = obj_priv->list.next;
obj_priv = (struct drm_i915_gem_object *)((char *)__mptr___0 - (unsigned int )(& ((struct drm_i915_gem_object *)0)->list));
}
if ((off_t )len > (off_t )request + offset) {
return (request);
} else {
}
*eof = 1;
return ((off_t )len - offset);
}
}
static int i915_gem_request_info(char *buf , char **start , off_t offset , int request ,
int *eof , void *data )
{
struct drm_minor *minor ;
struct drm_device *dev ;
drm_i915_private_t *dev_priv ;
struct drm_i915_gem_request *gem_request ;
int len ;
int tmp ;
struct list_head const *__mptr ;
struct list_head const *__mptr___0 ;
int tmp___0 ;
{
minor = (struct drm_minor *)data;
dev = minor->dev;
dev_priv = dev->dev_private;
len = 0;
if ((unsigned long )offset > (1UL << 12) - 80UL) {
*eof = 1;
return (0);
} else {
}
*start = buf + offset;
*eof = 0;
tmp = sprintf(buf + len, "Request:\n");
len = len + tmp;
if ((unsigned long )len > (1UL << 12) - 80UL) {
*eof = 1;
return ((off_t )len - offset);
} else {
}
__mptr = dev_priv->mm.request_list.next;
gem_request = (struct drm_i915_gem_request *)((char *)__mptr - (unsigned int )(& ((struct drm_i915_gem_request *)0)->list));
while (1) {
__builtin_prefetch(gem_request->list.next);
if ((unsigned long )(& gem_request->list) != (unsigned long )(& dev_priv->mm.request_list)) {
} else {
break;
}
tmp___0 = sprintf(buf + len, " %d @ %d %08x\n", gem_request->seqno, (int )(jiffies - (unsigned long volatile )gem_request->emitted_jiffies),
gem_request->flush_domains);
len = len + tmp___0;
if ((unsigned long )len > (1UL << 12) - 80UL) {
*eof = 1;
return ((off_t )len - offset);
} else {
}
__mptr___0 = gem_request->list.next;
gem_request = (struct drm_i915_gem_request *)((char *)__mptr___0 - (unsigned int )(& ((struct drm_i915_gem_request *)0)->list));
}
if ((off_t )len > (off_t )request + offset) {
return (request);
} else {
}
*eof = 1;
return ((off_t )len - offset);
}
}
static int i915_gem_seqno_info(char *buf , char **start , off_t offset , int request ,
int *eof , void *data )
{
struct drm_minor *minor ;
struct drm_device *dev ;
drm_i915_private_t *dev_priv ;
int len ;
uint32_t tmp ;
int tmp___0 ;
int tmp___1 ;
int tmp___2 ;
{
minor = (struct drm_minor *)data;
dev = minor->dev;
dev_priv = dev->dev_private;
len = 0;
if ((unsigned long )offset > (1UL << 12) - 80UL) {
*eof = 1;
return (0);
} else {
}
*start = buf + offset;
*eof = 0;
tmp = i915_get_gem_seqno(dev);
tmp___0 = sprintf(buf + len, "Current sequence: %d\n", tmp);
len = len + tmp___0;
if ((unsigned long )len > (1UL << 12) - 80UL) {
*eof = 1;
return ((off_t )len - offset);
} else {
}
tmp___1 = sprintf(buf + len, "Waiter sequence: %d\n", dev_priv->mm.waiting_gem_seqno);
len = len + tmp___1;
if ((unsigned long )len > (1UL << 12) - 80UL) {
*eof = 1;
return ((off_t )len - offset);
} else {
}
tmp___2 = sprintf(buf + len, "IRQ sequence: %d\n", dev_priv->mm.irq_gem_seqno);
len = len + tmp___2;
if ((unsigned long )len > (1UL << 12) - 80UL) {
*eof = 1;
return ((off_t )len - offset);
} else {
}
if ((off_t )len > (off_t )request + offset) {
return (request);
} else {
}
*eof = 1;
return ((off_t )len - offset);
}
}
static int i915_interrupt_info(char *buf , char **start , off_t offset , int request ,
int *eof , void *data )
{
struct drm_minor *minor ;
struct drm_device *dev ;
drm_i915_private_t *dev_priv ;
int len ;
unsigned int tmp ;
int tmp___0 ;
unsigned int tmp___1 ;
int tmp___2 ;
unsigned int tmp___3 ;
int tmp___4 ;
unsigned int tmp___5 ;
int tmp___6 ;
unsigned int tmp___7 ;
int tmp___8 ;
int tmp___9 ;
uint32_t tmp___10 ;
int tmp___11 ;
int tmp___12 ;
int tmp___13 ;
{
minor = (struct drm_minor *)data;
dev = minor->dev;
dev_priv = dev->dev_private;
len = 0;
if ((unsigned long )offset > (1UL << 12) - 80UL) {
*eof = 1;
return (0);
} else {
}
*start = buf + offset;
*eof = 0;
tmp = readl(dev_priv->regs + 8352);
tmp___0 = sprintf(buf + len, "Interrupt enable: %08x\n", tmp);
len = len + tmp___0;
if ((unsigned long )len > (1UL << 12) - 80UL) {
*eof = 1;
return ((off_t )len - offset);
} else {
}
tmp___1 = readl(dev_priv->regs + 8356);
tmp___2 = sprintf(buf + len, "Interrupt identity: %08x\n", tmp___1);
len = len + tmp___2;
if ((unsigned long )len > (1UL << 12) - 80UL) {
*eof = 1;
return ((off_t )len - offset);
} else {
}
tmp___3 = readl(dev_priv->regs + 8360);
tmp___4 = sprintf(buf + len, "Interrupt mask: %08x\n", tmp___3);
len = len + tmp___4;
if ((unsigned long )len > (1UL << 12) - 80UL) {
*eof = 1;
return ((off_t )len - offset);
} else {
}
tmp___5 = readl(dev_priv->regs + 458788);
tmp___6 = sprintf(buf + len, "Pipe A stat: %08x\n", tmp___5);
len = len + tmp___6;
if ((unsigned long )len > (1UL << 12) - 80UL) {
*eof = 1;
return ((off_t )len - offset);
} else {
}
tmp___7 = readl(dev_priv->regs + 462884);
tmp___8 = sprintf(buf + len, "Pipe B stat: %08x\n", tmp___7);
len = len + tmp___8;
if ((unsigned long )len > (1UL << 12) - 80UL) {
*eof = 1;
return ((off_t )len - offset);
} else {
}
tmp___9 = sprintf(buf + len, "Interrupts received: %d\n", dev_priv->irq_received.counter);
len = len + tmp___9;
if ((unsigned long )len > (1UL << 12) - 80UL) {
*eof = 1;
return ((off_t )len - offset);
} else {
}
tmp___10 = i915_get_gem_seqno(dev);
tmp___11 = sprintf(buf + len, "Current sequence: %d\n", tmp___10);
len = len + tmp___11;
if ((unsigned long )len > (1UL << 12) - 80UL) {
*eof = 1;
return ((off_t )len - offset);
} else {
}
tmp___12 = sprintf(buf + len, "Waiter sequence: %d\n", dev_priv->mm.waiting_gem_seqno);
len = len + tmp___12;
if ((unsigned long )len > (1UL << 12) - 80UL) {
*eof = 1;
return ((off_t )len - offset);
} else {
}
tmp___13 = sprintf(buf + len, "IRQ sequence: %d\n", dev_priv->mm.irq_gem_seqno);
len = len + tmp___13;
if ((unsigned long )len > (1UL << 12) - 80UL) {
*eof = 1;
return ((off_t )len - offset);
} else {
}
if ((off_t )len > (off_t )request + offset) {
return (request);
} else {
}
*eof = 1;
return ((off_t )len - offset);
}
}
static struct drm_proc_list i915_gem_proc_list[6] = { {"i915_gem_active", & i915_gem_active_info},
{"i915_gem_flushing", & i915_gem_flushing_info},
{"i915_gem_inactive", & i915_gem_inactive_info},
{"i915_gem_request", & i915_gem_request_info},
{"i915_gem_seqno", & i915_gem_seqno_info},
{"i915_gem_interrupt", & i915_interrupt_info}};
int i915_gem_proc_init(struct drm_minor *minor )
{
struct proc_dir_entry *ent ;
int i ;
int j ;
{
i = 0;
while (1) {
if ((unsigned long )i < sizeof(i915_gem_proc_list) / sizeof(i915_gem_proc_list[0]) + (sizeof(char [1 - 2 * 0]) - 1UL)) {
} else {
break;
}
ent = create_proc_entry(i915_gem_proc_list[i].name, 32768 | ((256 | 32) | 4),
minor->dev_root);
if (! ent) {
printk("<3>[drm:%s] *ERROR* Cannot create /proc/dri/.../%s\n", "i915_gem_proc_init",
i915_gem_proc_list[i].name);
j = 0;
while (1) {
if (j < i) {
} else {
break;
}
remove_proc_entry(i915_gem_proc_list[i].name, minor->dev_root);
j = j + 1;
}
return (-1);
} else {
}
ent->read_proc = i915_gem_proc_list[i].f;
ent->data = minor;
i = i + 1;
}
return (0);
}
}
void i915_gem_proc_cleanup(struct drm_minor *minor )
{
int i ;
{
if (! minor->dev_root) {
return;
} else {
}
i = 0;
while (1) {
if ((unsigned long )i < sizeof(i915_gem_proc_list) / sizeof(i915_gem_proc_list[0]) + (sizeof(char [1 - 2 * 0]) - 1UL)) {
} else {
break;
}
remove_proc_entry(i915_gem_proc_list[i].name, minor->dev_root);
i = i + 1;
}
return;
}
}
__inline static unsigned short readw(void const volatile *addr )
{
unsigned short ret ;
{
__asm__ volatile ("mov"
"w"
" %1,%0": "=r" (ret): "m" (*((unsigned short volatile *)addr)): "memory");
return (ret);
}
}
void i915_gem_detect_bit_6_swizzle(struct drm_device *dev )
{
drm_i915_private_t *dev_priv ;
uint32_t swizzle_x ;
uint32_t swizzle_y ;
uint32_t dcc ;
unsigned short tmp ;
unsigned short tmp___0 ;
{
dev_priv = dev->dev_private;
swizzle_x = 5;
swizzle_y = 5;
if (! ((((((dev->pci_device == 9602 || dev->pci_device == 9610) || dev->pci_device == 9618) || dev->pci_device == 10098) || (dev->pci_device == 10146 || dev->pci_device == 10158)) || (((((((((dev->pci_device == 10610 || dev->pci_device == 10626) || dev->pci_device == 10642) || dev->pci_device == 10658) || dev->pci_device == 10754) || dev->pci_device == 10770) || dev->pci_device == 10818) || dev->pci_device == 11778) || dev->pci_device == 11794) || dev->pci_device == 11810)) || ((dev->pci_device == 10690 || dev->pci_device == 10674) || dev->pci_device == 10706))) {
swizzle_x = 0;
swizzle_y = 0;
} else
if ((! (((((((((dev->pci_device == 10610 || dev->pci_device == 10626) || dev->pci_device == 10642) || dev->pci_device == 10658) || dev->pci_device == 10754) || dev->pci_device == 10770) || dev->pci_device == 10818) || dev->pci_device == 11778) || dev->pci_device == 11794) || dev->pci_device == 11810) && ! ((dev->pci_device == 10690 || dev->pci_device == 10674) || dev->pci_device == 10706)) || dev->pci_device == 10754) {
dcc = readl(dev_priv->regs + 66048);
switch (dcc & (unsigned int )(3 << 0)) {
case (unsigned int )(1 << 0):
case (unsigned int )(0 << 0):
swizzle_x = 0;
swizzle_y = 0;
break;
case (unsigned int )(2 << 0):
if (((dev->pci_device == 9602 || dev->pci_device == 9610) || dev->pci_device == 9618) || dcc & (unsigned int )(1 << 10)) {
swizzle_x = 2;
swizzle_y = 1;
} else
if (dev->pci_device == 10754) {
swizzle_x = 4;
swizzle_y = 3;
} else {
swizzle_x = 5;
swizzle_y = 5;
}
break;
}
if (dcc == 4294967295U) {
printk("<3>[drm:%s] *ERROR* Couldn\'t read from MCHBAR. Disabling tiling.\n",
"i915_gem_detect_bit_6_swizzle");
swizzle_x = 5;
swizzle_y = 5;
} else {
}
} else {
tmp = readw(dev_priv->regs + 66054);
tmp___0 = readw(dev_priv->regs + 67078);
if ((int )tmp != (int )tmp___0) {
swizzle_x = 0;
swizzle_y = 0;
} else {
swizzle_x = 2;
swizzle_y = 1;
}
}
dev_priv->mm.bit_6_swizzle_x = swizzle_x;
dev_priv->mm.bit_6_swizzle_y = swizzle_y;
return;
}
}
int i915_gem_set_tiling(struct drm_device *dev , void *data , struct drm_file *file_priv )
{
struct drm_i915_gem_set_tiling *args ;
drm_i915_private_t *dev_priv ;
struct drm_gem_object *obj ;
struct drm_i915_gem_object *obj_priv ;
{
args = data;
dev_priv = dev->dev_private;
obj = drm_gem_object_lookup(dev, file_priv, args->handle);
if ((unsigned long )obj == (unsigned long )((void *)0)) {
return (-22);
} else {
}
obj_priv = obj->driver_private;
mutex_lock(& dev->struct_mutex);
if (args->tiling_mode == (uint32_t )0) {
obj_priv->tiling_mode = 0;
args->swizzle_mode = 0;
} else {
if (args->tiling_mode == (uint32_t )1) {
args->swizzle_mode = dev_priv->mm.bit_6_swizzle_x;
} else {
args->swizzle_mode = dev_priv->mm.bit_6_swizzle_y;
}
if (args->swizzle_mode == (uint32_t )5) {
args->tiling_mode = 0;
args->swizzle_mode = 0;
} else {
}
}
obj_priv->tiling_mode = args->tiling_mode;
mutex_unlock(& dev->struct_mutex);
drm_gem_object_unreference(obj);
return (0);
}
}
int i915_gem_get_tiling(struct drm_device *dev , void *data , struct drm_file *file_priv )
{
struct drm_i915_gem_get_tiling *args ;
drm_i915_private_t *dev_priv ;
struct drm_gem_object *obj ;
struct drm_i915_gem_object *obj_priv ;
{
args = data;
dev_priv = dev->dev_private;
obj = drm_gem_object_lookup(dev, file_priv, args->handle);
if ((unsigned long )obj == (unsigned long )((void *)0)) {
return (-22);
} else {
}
obj_priv = obj->driver_private;
mutex_lock(& dev->struct_mutex);
args->tiling_mode = obj_priv->tiling_mode;
switch (obj_priv->tiling_mode) {
case (uint32_t )1:
args->swizzle_mode = dev_priv->mm.bit_6_swizzle_x;
break;
case (uint32_t )2:
args->swizzle_mode = dev_priv->mm.bit_6_swizzle_y;
break;
case (uint32_t )0:
args->swizzle_mode = 0;
break;
default:
printk("<3>[drm:%s] *ERROR* unknown tiling mode\n", "i915_gem_get_tiling");
}
mutex_unlock(& dev->struct_mutex);
drm_gem_object_unreference(obj);
return (0);
}
}
__inline static void *compat_alloc_user_space(long len )
{
struct pt_regs *regs ;
struct task_struct *tmp ;
{
tmp = get_current();
regs = (struct pt_regs *)tmp->thread.sp0 - 1;
return ((void *)regs->sp - len);
}
}
extern unsigned int __invalid_size_argument_for_IOC ;
extern void lock_kernel(void) __attribute__((__section__(".spinlock.text"))) ;
extern void unlock_kernel(void) __attribute__((__section__(".spinlock.text"))) ;
extern void __put_user_bad(void) ;
extern long drm_compat_ioctl(struct file *filp , unsigned int cmd , unsigned long arg ) ;
static int compat_i915_batchbuffer(struct file *file , unsigned int cmd , unsigned long arg )
{
drm_i915_batchbuffer32_t batchbuffer32 ;
drm_i915_batchbuffer_t *batchbuffer ;
unsigned long tmp ;
void *tmp___0 ;
unsigned long flag ;
unsigned long roksum ;
struct thread_info *tmp___1 ;
int tmp___2 ;
long tmp___3 ;
long __pu_err ;
long __pu_err___0 ;
long __pu_err___1 ;
long __pu_err___2 ;
long __pu_err___3 ;
long __pu_err___4 ;
int tmp___4 ;
{
tmp = copy_from_user(& batchbuffer32, (void *)arg, sizeof(batchbuffer32));
if (tmp) {
return (-14);
} else {
}
tmp___0 = compat_alloc_user_space(sizeof(*batchbuffer));
batchbuffer = tmp___0;
tmp___1 = current_thread_info();
__asm__ ("add %3,%1 ; sbb %0,%0 ; cmp %1,%4 ; sbb $0,%0": "=&r" (flag), "=r" (roksum): "1" (batchbuffer),
"g" ((long )sizeof(*batchbuffer)), "rm" (tmp___1->addr_limit.seg));
if (flag == 0UL) {
tmp___2 = 1;
} else {
tmp___2 = 0;
}
tmp___3 = ldv__builtin_expect(tmp___2, 1);
if (tmp___3) {
while (1) {
__pu_err = 0;
switch (sizeof(batchbuffer->start)) {
case 1UL:
__asm__ volatile ("1:\tmov"
"b"
" %"
"b"
"1,%2\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3:\tmov %3,%0\n"
"\tjmp 2b\n"
".previous\n"
" .section __ex_table,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"1b"
","
"3b"
"\n"
" .previous\n": "=r" (__pu_err): "iq" (batchbuffer32.start),
"m" (*((struct __large_struct *)(& batchbuffer->start))),
"i" (-14), "0" (__pu_err));
break;
case 2UL:
__asm__ volatile ("1:\tmov"
"w"
" %"
"w"
"1,%2\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3:\tmov %3,%0\n"
"\tjmp 2b\n"
".previous\n"
" .section __ex_table,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"1b"
","
"3b"
"\n"
" .previous\n": "=r" (__pu_err): "ir" (batchbuffer32.start),
"m" (*((struct __large_struct *)(& batchbuffer->start))),
"i" (-14), "0" (__pu_err));
break;
case 4UL:
__asm__ volatile ("1:\tmov"
"l"
" %"
"k"
"1,%2\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3:\tmov %3,%0\n"
"\tjmp 2b\n"
".previous\n"
" .section __ex_table,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"1b"
","
"3b"
"\n"
" .previous\n": "=r" (__pu_err): "ir" (batchbuffer32.start),
"m" (*((struct __large_struct *)(& batchbuffer->start))),
"i" (-14), "0" (__pu_err));
break;
case 8UL:
__asm__ volatile ("1:\tmov"
"q"
" %"
""
"1,%2\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3:\tmov %3,%0\n"
"\tjmp 2b\n"
".previous\n"
" .section __ex_table,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"1b"
","
"3b"
"\n"
" .previous\n": "=r" (__pu_err): "Zr" (batchbuffer32.start),
"m" (*((struct __large_struct *)(& batchbuffer->start))),
"i" (-14), "0" (__pu_err));
break;
default:
__put_user_bad();
}
break;
}
if (__pu_err) {
return (-14);
} else {
while (1) {
__pu_err___0 = 0;
switch (sizeof(batchbuffer->used)) {
case 1UL:
__asm__ volatile ("1:\tmov"
"b"
" %"
"b"
"1,%2\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3:\tmov %3,%0\n"
"\tjmp 2b\n"
".previous\n"
" .section __ex_table,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"1b"
","
"3b"
"\n"
" .previous\n": "=r" (__pu_err___0): "iq" (batchbuffer32.used),
"m" (*((struct __large_struct *)(& batchbuffer->used))),
"i" (-14), "0" (__pu_err___0));
break;
case 2UL:
__asm__ volatile ("1:\tmov"
"w"
" %"
"w"
"1,%2\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3:\tmov %3,%0\n"
"\tjmp 2b\n"
".previous\n"
" .section __ex_table,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"1b"
","
"3b"
"\n"
" .previous\n": "=r" (__pu_err___0): "ir" (batchbuffer32.used),
"m" (*((struct __large_struct *)(& batchbuffer->used))),
"i" (-14), "0" (__pu_err___0));
break;
case 4UL:
__asm__ volatile ("1:\tmov"
"l"
" %"
"k"
"1,%2\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3:\tmov %3,%0\n"
"\tjmp 2b\n"
".previous\n"
" .section __ex_table,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"1b"
","
"3b"
"\n"
" .previous\n": "=r" (__pu_err___0): "ir" (batchbuffer32.used),
"m" (*((struct __large_struct *)(& batchbuffer->used))),
"i" (-14), "0" (__pu_err___0));
break;
case 8UL:
__asm__ volatile ("1:\tmov"
"q"
" %"
""
"1,%2\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3:\tmov %3,%0\n"
"\tjmp 2b\n"
".previous\n"
" .section __ex_table,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"1b"
","
"3b"
"\n"
" .previous\n": "=r" (__pu_err___0): "Zr" (batchbuffer32.used),
"m" (*((struct __large_struct *)(& batchbuffer->used))),
"i" (-14), "0" (__pu_err___0));
break;
default:
__put_user_bad();
}
break;
}
if (__pu_err___0) {
return (-14);
} else {
while (1) {
__pu_err___1 = 0;
switch (sizeof(batchbuffer->DR1)) {
case 1UL:
__asm__ volatile ("1:\tmov"
"b"
" %"
"b"
"1,%2\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3:\tmov %3,%0\n"
"\tjmp 2b\n"
".previous\n"
" .section __ex_table,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"1b"
","
"3b"
"\n"
" .previous\n": "=r" (__pu_err___1): "iq" (batchbuffer32.DR1),
"m" (*((struct __large_struct *)(& batchbuffer->DR1))),
"i" (-14), "0" (__pu_err___1));
break;
case 2UL:
__asm__ volatile ("1:\tmov"
"w"
" %"
"w"
"1,%2\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3:\tmov %3,%0\n"
"\tjmp 2b\n"
".previous\n"
" .section __ex_table,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"1b"
","
"3b"
"\n"
" .previous\n": "=r" (__pu_err___1): "ir" (batchbuffer32.DR1),
"m" (*((struct __large_struct *)(& batchbuffer->DR1))),
"i" (-14), "0" (__pu_err___1));
break;
case 4UL:
__asm__ volatile ("1:\tmov"
"l"
" %"
"k"
"1,%2\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3:\tmov %3,%0\n"
"\tjmp 2b\n"
".previous\n"
" .section __ex_table,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"1b"
","
"3b"
"\n"
" .previous\n": "=r" (__pu_err___1): "ir" (batchbuffer32.DR1),
"m" (*((struct __large_struct *)(& batchbuffer->DR1))),
"i" (-14), "0" (__pu_err___1));
break;
case 8UL:
__asm__ volatile ("1:\tmov"
"q"
" %"
""
"1,%2\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3:\tmov %3,%0\n"
"\tjmp 2b\n"
".previous\n"
" .section __ex_table,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"1b"
","
"3b"
"\n"
" .previous\n": "=r" (__pu_err___1): "Zr" (batchbuffer32.DR1),
"m" (*((struct __large_struct *)(& batchbuffer->DR1))),
"i" (-14), "0" (__pu_err___1));
break;
default:
__put_user_bad();
}
break;
}
if (__pu_err___1) {
return (-14);
} else {
while (1) {
__pu_err___2 = 0;
switch (sizeof(batchbuffer->DR4)) {
case 1UL:
__asm__ volatile ("1:\tmov"
"b"
" %"
"b"
"1,%2\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3:\tmov %3,%0\n"
"\tjmp 2b\n"
".previous\n"
" .section __ex_table,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"1b"
","
"3b"
"\n"
" .previous\n": "=r" (__pu_err___2): "iq" (batchbuffer32.DR4),
"m" (*((struct __large_struct *)(& batchbuffer->DR4))),
"i" (-14), "0" (__pu_err___2));
break;
case 2UL:
__asm__ volatile ("1:\tmov"
"w"
" %"
"w"
"1,%2\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3:\tmov %3,%0\n"
"\tjmp 2b\n"
".previous\n"
" .section __ex_table,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"1b"
","
"3b"
"\n"
" .previous\n": "=r" (__pu_err___2): "ir" (batchbuffer32.DR4),
"m" (*((struct __large_struct *)(& batchbuffer->DR4))),
"i" (-14), "0" (__pu_err___2));
break;
case 4UL:
__asm__ volatile ("1:\tmov"
"l"
" %"
"k"
"1,%2\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3:\tmov %3,%0\n"
"\tjmp 2b\n"
".previous\n"
" .section __ex_table,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"1b"
","
"3b"
"\n"
" .previous\n": "=r" (__pu_err___2): "ir" (batchbuffer32.DR4),
"m" (*((struct __large_struct *)(& batchbuffer->DR4))),
"i" (-14), "0" (__pu_err___2));
break;
case 8UL:
__asm__ volatile ("1:\tmov"
"q"
" %"
""
"1,%2\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3:\tmov %3,%0\n"
"\tjmp 2b\n"
".previous\n"
" .section __ex_table,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"1b"
","
"3b"
"\n"
" .previous\n": "=r" (__pu_err___2): "Zr" (batchbuffer32.DR4),
"m" (*((struct __large_struct *)(& batchbuffer->DR4))),
"i" (-14), "0" (__pu_err___2));
break;
default:
__put_user_bad();
}
break;
}
if (__pu_err___2) {
return (-14);
} else {
while (1) {
__pu_err___3 = 0;
switch (sizeof(batchbuffer->num_cliprects)) {
case 1UL:
__asm__ volatile ("1:\tmov"
"b"
" %"
"b"
"1,%2\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3:\tmov %3,%0\n"
"\tjmp 2b\n"
".previous\n"
" .section __ex_table,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"1b"
","
"3b"
"\n"
" .previous\n": "=r" (__pu_err___3): "iq" (batchbuffer32.num_cliprects),
"m" (*((struct __large_struct *)(& batchbuffer->num_cliprects))),
"i" (-14), "0" (__pu_err___3));
break;
case 2UL:
__asm__ volatile ("1:\tmov"
"w"
" %"
"w"
"1,%2\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3:\tmov %3,%0\n"
"\tjmp 2b\n"
".previous\n"
" .section __ex_table,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"1b"
","
"3b"
"\n"
" .previous\n": "=r" (__pu_err___3): "ir" (batchbuffer32.num_cliprects),
"m" (*((struct __large_struct *)(& batchbuffer->num_cliprects))),
"i" (-14), "0" (__pu_err___3));
break;
case 4UL:
__asm__ volatile ("1:\tmov"
"l"
" %"
"k"
"1,%2\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3:\tmov %3,%0\n"
"\tjmp 2b\n"
".previous\n"
" .section __ex_table,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"1b"
","
"3b"
"\n"
" .previous\n": "=r" (__pu_err___3): "ir" (batchbuffer32.num_cliprects),
"m" (*((struct __large_struct *)(& batchbuffer->num_cliprects))),
"i" (-14), "0" (__pu_err___3));
break;
case 8UL:
__asm__ volatile ("1:\tmov"
"q"
" %"
""
"1,%2\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3:\tmov %3,%0\n"
"\tjmp 2b\n"
".previous\n"
" .section __ex_table,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"1b"
","
"3b"
"\n"
" .previous\n": "=r" (__pu_err___3): "Zr" (batchbuffer32.num_cliprects),
"m" (*((struct __large_struct *)(& batchbuffer->num_cliprects))),
"i" (-14), "0" (__pu_err___3));
break;
default:
__put_user_bad();
}
break;
}
if (__pu_err___3) {
return (-14);
} else {
while (1) {
__pu_err___4 = 0;
switch (sizeof(batchbuffer->cliprects)) {
case 1UL:
__asm__ volatile ("1:\tmov"
"b"
" %"
"b"
"1,%2\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3:\tmov %3,%0\n"
"\tjmp 2b\n"
".previous\n"
" .section __ex_table,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"1b"
","
"3b"
"\n"
" .previous\n": "=r" (__pu_err___4): "iq" ((struct drm_clip_rect *)((int *)((unsigned long )batchbuffer32.cliprects))),
"m" (*((struct __large_struct *)(& batchbuffer->cliprects))),
"i" (-14), "0" (__pu_err___4));
break;
case 2UL:
__asm__ volatile ("1:\tmov"
"w"
" %"
"w"
"1,%2\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3:\tmov %3,%0\n"
"\tjmp 2b\n"
".previous\n"
" .section __ex_table,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"1b"
","
"3b"
"\n"
" .previous\n": "=r" (__pu_err___4): "ir" ((struct drm_clip_rect *)((int *)((unsigned long )batchbuffer32.cliprects))),
"m" (*((struct __large_struct *)(& batchbuffer->cliprects))),
"i" (-14), "0" (__pu_err___4));
break;
case 4UL:
__asm__ volatile ("1:\tmov"
"l"
" %"
"k"
"1,%2\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3:\tmov %3,%0\n"
"\tjmp 2b\n"
".previous\n"
" .section __ex_table,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"1b"
","
"3b"
"\n"
" .previous\n": "=r" (__pu_err___4): "ir" ((struct drm_clip_rect *)((int *)((unsigned long )batchbuffer32.cliprects))),
"m" (*((struct __large_struct *)(& batchbuffer->cliprects))),
"i" (-14), "0" (__pu_err___4));
break;
case 8UL:
__asm__ volatile ("1:\tmov"
"q"
" %"
""
"1,%2\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3:\tmov %3,%0\n"
"\tjmp 2b\n"
".previous\n"
" .section __ex_table,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"1b"
","
"3b"
"\n"
" .previous\n": "=r" (__pu_err___4): "Zr" ((struct drm_clip_rect *)((int *)((unsigned long )batchbuffer32.cliprects))),
"m" (*((struct __large_struct *)(& batchbuffer->cliprects))),
"i" (-14), "0" (__pu_err___4));
break;
default:
__put_user_bad();
}
break;
}
if (__pu_err___4) {
return (-14);
} else {
}
}
}
}
}
}
} else {
return (-14);
}
tmp___4 = drm_ioctl((file->f_path.dentry)->d_inode, file, (unsigned long )(((1U << (((0 + 8) + 8) + 14)) | (unsigned int )('d' << (0 + 8))) | (unsigned int )((64 + 3) << 0)) | ((sizeof(drm_i915_batchbuffer_t ) == sizeof(drm_i915_batchbuffer_t [1]) && sizeof(drm_i915_batchbuffer_t ) < (unsigned long )(1 << 14) ? sizeof(drm_i915_batchbuffer_t ) : __invalid_size_argument_for_IOC) << ((0 + 8) + 8)),
(unsigned long )batchbuffer);
return (tmp___4);
}
}
static int compat_i915_cmdbuffer(struct file *file , unsigned int cmd , unsigned long arg )
{
drm_i915_cmdbuffer32_t cmdbuffer32 ;
drm_i915_cmdbuffer_t *cmdbuffer ;
unsigned long tmp ;
void *tmp___0 ;
unsigned long flag ;
unsigned long roksum ;
struct thread_info *tmp___1 ;
int tmp___2 ;
long tmp___3 ;
long __pu_err ;
long __pu_err___0 ;
long __pu_err___1 ;
long __pu_err___2 ;
long __pu_err___3 ;
long __pu_err___4 ;
int tmp___4 ;
{
tmp = copy_from_user(& cmdbuffer32, (void *)arg, sizeof(cmdbuffer32));
if (tmp) {
return (-14);
} else {
}
tmp___0 = compat_alloc_user_space(sizeof(*cmdbuffer));
cmdbuffer = tmp___0;
tmp___1 = current_thread_info();
__asm__ ("add %3,%1 ; sbb %0,%0 ; cmp %1,%4 ; sbb $0,%0": "=&r" (flag), "=r" (roksum): "1" (cmdbuffer),
"g" ((long )sizeof(*cmdbuffer)), "rm" (tmp___1->addr_limit.seg));
if (flag == 0UL) {
tmp___2 = 1;
} else {
tmp___2 = 0;
}
tmp___3 = ldv__builtin_expect(tmp___2, 1);
if (tmp___3) {
while (1) {
__pu_err = 0;
switch (sizeof(cmdbuffer->buf)) {
case 1UL:
__asm__ volatile ("1:\tmov"
"b"
" %"
"b"
"1,%2\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3:\tmov %3,%0\n"
"\tjmp 2b\n"
".previous\n"
" .section __ex_table,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"1b"
","
"3b"
"\n"
" .previous\n": "=r" (__pu_err): "iq" ((char *)((int *)((unsigned long )cmdbuffer32.buf))),
"m" (*((struct __large_struct *)(& cmdbuffer->buf))), "i" (-14),
"0" (__pu_err));
break;
case 2UL:
__asm__ volatile ("1:\tmov"
"w"
" %"
"w"
"1,%2\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3:\tmov %3,%0\n"
"\tjmp 2b\n"
".previous\n"
" .section __ex_table,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"1b"
","
"3b"
"\n"
" .previous\n": "=r" (__pu_err): "ir" ((char *)((int *)((unsigned long )cmdbuffer32.buf))),
"m" (*((struct __large_struct *)(& cmdbuffer->buf))), "i" (-14),
"0" (__pu_err));
break;
case 4UL:
__asm__ volatile ("1:\tmov"
"l"
" %"
"k"
"1,%2\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3:\tmov %3,%0\n"
"\tjmp 2b\n"
".previous\n"
" .section __ex_table,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"1b"
","
"3b"
"\n"
" .previous\n": "=r" (__pu_err): "ir" ((char *)((int *)((unsigned long )cmdbuffer32.buf))),
"m" (*((struct __large_struct *)(& cmdbuffer->buf))), "i" (-14),
"0" (__pu_err));
break;
case 8UL:
__asm__ volatile ("1:\tmov"
"q"
" %"
""
"1,%2\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3:\tmov %3,%0\n"
"\tjmp 2b\n"
".previous\n"
" .section __ex_table,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"1b"
","
"3b"
"\n"
" .previous\n": "=r" (__pu_err): "Zr" ((char *)((int *)((unsigned long )cmdbuffer32.buf))),
"m" (*((struct __large_struct *)(& cmdbuffer->buf))), "i" (-14),
"0" (__pu_err));
break;
default:
__put_user_bad();
}
break;
}
if (__pu_err) {
return (-14);
} else {
while (1) {
__pu_err___0 = 0;
switch (sizeof(cmdbuffer->sz)) {
case 1UL:
__asm__ volatile ("1:\tmov"
"b"
" %"
"b"
"1,%2\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3:\tmov %3,%0\n"
"\tjmp 2b\n"
".previous\n"
" .section __ex_table,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"1b"
","
"3b"
"\n"
" .previous\n": "=r" (__pu_err___0): "iq" (cmdbuffer32.sz),
"m" (*((struct __large_struct *)(& cmdbuffer->sz))),
"i" (-14), "0" (__pu_err___0));
break;
case 2UL:
__asm__ volatile ("1:\tmov"
"w"
" %"
"w"
"1,%2\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3:\tmov %3,%0\n"
"\tjmp 2b\n"
".previous\n"
" .section __ex_table,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"1b"
","
"3b"
"\n"
" .previous\n": "=r" (__pu_err___0): "ir" (cmdbuffer32.sz),
"m" (*((struct __large_struct *)(& cmdbuffer->sz))),
"i" (-14), "0" (__pu_err___0));
break;
case 4UL:
__asm__ volatile ("1:\tmov"
"l"
" %"
"k"
"1,%2\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3:\tmov %3,%0\n"
"\tjmp 2b\n"
".previous\n"
" .section __ex_table,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"1b"
","
"3b"
"\n"
" .previous\n": "=r" (__pu_err___0): "ir" (cmdbuffer32.sz),
"m" (*((struct __large_struct *)(& cmdbuffer->sz))),
"i" (-14), "0" (__pu_err___0));
break;
case 8UL:
__asm__ volatile ("1:\tmov"
"q"
" %"
""
"1,%2\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3:\tmov %3,%0\n"
"\tjmp 2b\n"
".previous\n"
" .section __ex_table,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"1b"
","
"3b"
"\n"
" .previous\n": "=r" (__pu_err___0): "Zr" (cmdbuffer32.sz),
"m" (*((struct __large_struct *)(& cmdbuffer->sz))),
"i" (-14), "0" (__pu_err___0));
break;
default:
__put_user_bad();
}
break;
}
if (__pu_err___0) {
return (-14);
} else {
while (1) {
__pu_err___1 = 0;
switch (sizeof(cmdbuffer->DR1)) {
case 1UL:
__asm__ volatile ("1:\tmov"
"b"
" %"
"b"
"1,%2\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3:\tmov %3,%0\n"
"\tjmp 2b\n"
".previous\n"
" .section __ex_table,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"1b"
","
"3b"
"\n"
" .previous\n": "=r" (__pu_err___1): "iq" (cmdbuffer32.DR1),
"m" (*((struct __large_struct *)(& cmdbuffer->DR1))),
"i" (-14), "0" (__pu_err___1));
break;
case 2UL:
__asm__ volatile ("1:\tmov"
"w"
" %"
"w"
"1,%2\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3:\tmov %3,%0\n"
"\tjmp 2b\n"
".previous\n"
" .section __ex_table,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"1b"
","
"3b"
"\n"
" .previous\n": "=r" (__pu_err___1): "ir" (cmdbuffer32.DR1),
"m" (*((struct __large_struct *)(& cmdbuffer->DR1))),
"i" (-14), "0" (__pu_err___1));
break;
case 4UL:
__asm__ volatile ("1:\tmov"
"l"
" %"
"k"
"1,%2\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3:\tmov %3,%0\n"
"\tjmp 2b\n"
".previous\n"
" .section __ex_table,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"1b"
","
"3b"
"\n"
" .previous\n": "=r" (__pu_err___1): "ir" (cmdbuffer32.DR1),
"m" (*((struct __large_struct *)(& cmdbuffer->DR1))),
"i" (-14), "0" (__pu_err___1));
break;
case 8UL:
__asm__ volatile ("1:\tmov"
"q"
" %"
""
"1,%2\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3:\tmov %3,%0\n"
"\tjmp 2b\n"
".previous\n"
" .section __ex_table,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"1b"
","
"3b"
"\n"
" .previous\n": "=r" (__pu_err___1): "Zr" (cmdbuffer32.DR1),
"m" (*((struct __large_struct *)(& cmdbuffer->DR1))),
"i" (-14), "0" (__pu_err___1));
break;
default:
__put_user_bad();
}
break;
}
if (__pu_err___1) {
return (-14);
} else {
while (1) {
__pu_err___2 = 0;
switch (sizeof(cmdbuffer->DR4)) {
case 1UL:
__asm__ volatile ("1:\tmov"
"b"
" %"
"b"
"1,%2\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3:\tmov %3,%0\n"
"\tjmp 2b\n"
".previous\n"
" .section __ex_table,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"1b"
","
"3b"
"\n"
" .previous\n": "=r" (__pu_err___2): "iq" (cmdbuffer32.DR4),
"m" (*((struct __large_struct *)(& cmdbuffer->DR4))),
"i" (-14), "0" (__pu_err___2));
break;
case 2UL:
__asm__ volatile ("1:\tmov"
"w"
" %"
"w"
"1,%2\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3:\tmov %3,%0\n"
"\tjmp 2b\n"
".previous\n"
" .section __ex_table,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"1b"
","
"3b"
"\n"
" .previous\n": "=r" (__pu_err___2): "ir" (cmdbuffer32.DR4),
"m" (*((struct __large_struct *)(& cmdbuffer->DR4))),
"i" (-14), "0" (__pu_err___2));
break;
case 4UL:
__asm__ volatile ("1:\tmov"
"l"
" %"
"k"
"1,%2\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3:\tmov %3,%0\n"
"\tjmp 2b\n"
".previous\n"
" .section __ex_table,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"1b"
","
"3b"
"\n"
" .previous\n": "=r" (__pu_err___2): "ir" (cmdbuffer32.DR4),
"m" (*((struct __large_struct *)(& cmdbuffer->DR4))),
"i" (-14), "0" (__pu_err___2));
break;
case 8UL:
__asm__ volatile ("1:\tmov"
"q"
" %"
""
"1,%2\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3:\tmov %3,%0\n"
"\tjmp 2b\n"
".previous\n"
" .section __ex_table,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"1b"
","
"3b"
"\n"
" .previous\n": "=r" (__pu_err___2): "Zr" (cmdbuffer32.DR4),
"m" (*((struct __large_struct *)(& cmdbuffer->DR4))),
"i" (-14), "0" (__pu_err___2));
break;
default:
__put_user_bad();
}
break;
}
if (__pu_err___2) {
return (-14);
} else {
while (1) {
__pu_err___3 = 0;
switch (sizeof(cmdbuffer->num_cliprects)) {
case 1UL:
__asm__ volatile ("1:\tmov"
"b"
" %"
"b"
"1,%2\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3:\tmov %3,%0\n"
"\tjmp 2b\n"
".previous\n"
" .section __ex_table,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"1b"
","
"3b"
"\n"
" .previous\n": "=r" (__pu_err___3): "iq" (cmdbuffer32.num_cliprects),
"m" (*((struct __large_struct *)(& cmdbuffer->num_cliprects))),
"i" (-14), "0" (__pu_err___3));
break;
case 2UL:
__asm__ volatile ("1:\tmov"
"w"
" %"
"w"
"1,%2\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3:\tmov %3,%0\n"
"\tjmp 2b\n"
".previous\n"
" .section __ex_table,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"1b"
","
"3b"
"\n"
" .previous\n": "=r" (__pu_err___3): "ir" (cmdbuffer32.num_cliprects),
"m" (*((struct __large_struct *)(& cmdbuffer->num_cliprects))),
"i" (-14), "0" (__pu_err___3));
break;
case 4UL:
__asm__ volatile ("1:\tmov"
"l"
" %"
"k"
"1,%2\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3:\tmov %3,%0\n"
"\tjmp 2b\n"
".previous\n"
" .section __ex_table,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"1b"
","
"3b"
"\n"
" .previous\n": "=r" (__pu_err___3): "ir" (cmdbuffer32.num_cliprects),
"m" (*((struct __large_struct *)(& cmdbuffer->num_cliprects))),
"i" (-14), "0" (__pu_err___3));
break;
case 8UL:
__asm__ volatile ("1:\tmov"
"q"
" %"
""
"1,%2\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3:\tmov %3,%0\n"
"\tjmp 2b\n"
".previous\n"
" .section __ex_table,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"1b"
","
"3b"
"\n"
" .previous\n": "=r" (__pu_err___3): "Zr" (cmdbuffer32.num_cliprects),
"m" (*((struct __large_struct *)(& cmdbuffer->num_cliprects))),
"i" (-14), "0" (__pu_err___3));
break;
default:
__put_user_bad();
}
break;
}
if (__pu_err___3) {
return (-14);
} else {
while (1) {
__pu_err___4 = 0;
switch (sizeof(cmdbuffer->cliprects)) {
case 1UL:
__asm__ volatile ("1:\tmov"
"b"
" %"
"b"
"1,%2\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3:\tmov %3,%0\n"
"\tjmp 2b\n"
".previous\n"
" .section __ex_table,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"1b"
","
"3b"
"\n"
" .previous\n": "=r" (__pu_err___4): "iq" ((struct drm_clip_rect *)((int *)((unsigned long )cmdbuffer32.cliprects))),
"m" (*((struct __large_struct *)(& cmdbuffer->cliprects))),
"i" (-14), "0" (__pu_err___4));
break;
case 2UL:
__asm__ volatile ("1:\tmov"
"w"
" %"
"w"
"1,%2\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3:\tmov %3,%0\n"
"\tjmp 2b\n"
".previous\n"
" .section __ex_table,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"1b"
","
"3b"
"\n"
" .previous\n": "=r" (__pu_err___4): "ir" ((struct drm_clip_rect *)((int *)((unsigned long )cmdbuffer32.cliprects))),
"m" (*((struct __large_struct *)(& cmdbuffer->cliprects))),
"i" (-14), "0" (__pu_err___4));
break;
case 4UL:
__asm__ volatile ("1:\tmov"
"l"
" %"
"k"
"1,%2\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3:\tmov %3,%0\n"
"\tjmp 2b\n"
".previous\n"
" .section __ex_table,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"1b"
","
"3b"
"\n"
" .previous\n": "=r" (__pu_err___4): "ir" ((struct drm_clip_rect *)((int *)((unsigned long )cmdbuffer32.cliprects))),
"m" (*((struct __large_struct *)(& cmdbuffer->cliprects))),
"i" (-14), "0" (__pu_err___4));
break;
case 8UL:
__asm__ volatile ("1:\tmov"
"q"
" %"
""
"1,%2\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3:\tmov %3,%0\n"
"\tjmp 2b\n"
".previous\n"
" .section __ex_table,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"1b"
","
"3b"
"\n"
" .previous\n": "=r" (__pu_err___4): "Zr" ((struct drm_clip_rect *)((int *)((unsigned long )cmdbuffer32.cliprects))),
"m" (*((struct __large_struct *)(& cmdbuffer->cliprects))),
"i" (-14), "0" (__pu_err___4));
break;
default:
__put_user_bad();
}
break;
}
if (__pu_err___4) {
return (-14);
} else {
}
}
}
}
}
}
} else {
return (-14);
}
tmp___4 = drm_ioctl((file->f_path.dentry)->d_inode, file, (unsigned long )(((1U << (((0 + 8) + 8) + 14)) | (unsigned int )('d' << (0 + 8))) | (unsigned int )((64 + 11) << 0)) | ((sizeof(drm_i915_cmdbuffer_t ) == sizeof(drm_i915_cmdbuffer_t [1]) && sizeof(drm_i915_cmdbuffer_t ) < (unsigned long )(1 << 14) ? sizeof(drm_i915_cmdbuffer_t ) : __invalid_size_argument_for_IOC) << ((0 + 8) + 8)),
(unsigned long )cmdbuffer);
return (tmp___4);
}
}
static int compat_i915_irq_emit(struct file *file , unsigned int cmd , unsigned long arg )
{
drm_i915_irq_emit32_t req32 ;
drm_i915_irq_emit_t *request ;
unsigned long tmp ;
void *tmp___0 ;
unsigned long flag ;
unsigned long roksum ;
struct thread_info *tmp___1 ;
int tmp___2 ;
long tmp___3 ;
long __pu_err ;
int tmp___4 ;
{
tmp = copy_from_user(& req32, (void *)arg, sizeof(req32));
if (tmp) {
return (-14);
} else {
}
tmp___0 = compat_alloc_user_space(sizeof(*request));
request = tmp___0;
tmp___1 = current_thread_info();
__asm__ ("add %3,%1 ; sbb %0,%0 ; cmp %1,%4 ; sbb $0,%0": "=&r" (flag), "=r" (roksum): "1" (request),
"g" ((long )sizeof(*request)), "rm" (tmp___1->addr_limit.seg));
if (flag == 0UL) {
tmp___2 = 1;
} else {
tmp___2 = 0;
}
tmp___3 = ldv__builtin_expect(tmp___2, 1);
if (tmp___3) {
while (1) {
__pu_err = 0;
switch (sizeof(request->irq_seq)) {
case 1UL:
__asm__ volatile ("1:\tmov"
"b"
" %"
"b"
"1,%2\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3:\tmov %3,%0\n"
"\tjmp 2b\n"
".previous\n"
" .section __ex_table,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"1b"
","
"3b"
"\n"
" .previous\n": "=r" (__pu_err): "iq" ((int *)((unsigned long )req32.irq_seq)),
"m" (*((struct __large_struct *)(& request->irq_seq))),
"i" (-14), "0" (__pu_err));
break;
case 2UL:
__asm__ volatile ("1:\tmov"
"w"
" %"
"w"
"1,%2\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3:\tmov %3,%0\n"
"\tjmp 2b\n"
".previous\n"
" .section __ex_table,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"1b"
","
"3b"
"\n"
" .previous\n": "=r" (__pu_err): "ir" ((int *)((unsigned long )req32.irq_seq)),
"m" (*((struct __large_struct *)(& request->irq_seq))),
"i" (-14), "0" (__pu_err));
break;
case 4UL:
__asm__ volatile ("1:\tmov"
"l"
" %"
"k"
"1,%2\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3:\tmov %3,%0\n"
"\tjmp 2b\n"
".previous\n"
" .section __ex_table,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"1b"
","
"3b"
"\n"
" .previous\n": "=r" (__pu_err): "ir" ((int *)((unsigned long )req32.irq_seq)),
"m" (*((struct __large_struct *)(& request->irq_seq))),
"i" (-14), "0" (__pu_err));
break;
case 8UL:
__asm__ volatile ("1:\tmov"
"q"
" %"
""
"1,%2\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3:\tmov %3,%0\n"
"\tjmp 2b\n"
".previous\n"
" .section __ex_table,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"1b"
","
"3b"
"\n"
" .previous\n": "=r" (__pu_err): "Zr" ((int *)((unsigned long )req32.irq_seq)),
"m" (*((struct __large_struct *)(& request->irq_seq))),
"i" (-14), "0" (__pu_err));
break;
default:
__put_user_bad();
}
break;
}
if (__pu_err) {
return (-14);
} else {
}
} else {
return (-14);
}
tmp___4 = drm_ioctl((file->f_path.dentry)->d_inode, file, (unsigned long )((((2U | 1U) << (((0 + 8) + 8) + 14)) | (unsigned int )('d' << (0 + 8))) | (unsigned int )((64 + 4) << 0)) | ((sizeof(drm_i915_irq_emit_t ) == sizeof(drm_i915_irq_emit_t [1]) && sizeof(drm_i915_irq_emit_t ) < (unsigned long )(1 << 14) ? sizeof(drm_i915_irq_emit_t ) : __invalid_size_argument_for_IOC) << ((0 + 8) + 8)),
(unsigned long )request);
return (tmp___4);
}
}
static int compat_i915_getparam(struct file *file , unsigned int cmd , unsigned long arg )
{
drm_i915_getparam32_t req32 ;
drm_i915_getparam_t *request ;
unsigned long tmp ;
void *tmp___0 ;
unsigned long flag ;
unsigned long roksum ;
struct thread_info *tmp___1 ;
int tmp___2 ;
long tmp___3 ;
long __pu_err ;
long __pu_err___0 ;
int tmp___4 ;
{
tmp = copy_from_user(& req32, (void *)arg, sizeof(req32));
if (tmp) {
return (-14);
} else {
}
tmp___0 = compat_alloc_user_space(sizeof(*request));
request = tmp___0;
tmp___1 = current_thread_info();
__asm__ ("add %3,%1 ; sbb %0,%0 ; cmp %1,%4 ; sbb $0,%0": "=&r" (flag), "=r" (roksum): "1" (request),
"g" ((long )sizeof(*request)), "rm" (tmp___1->addr_limit.seg));
if (flag == 0UL) {
tmp___2 = 1;
} else {
tmp___2 = 0;
}
tmp___3 = ldv__builtin_expect(tmp___2, 1);
if (tmp___3) {
while (1) {
__pu_err = 0;
switch (sizeof(request->param)) {
case 1UL:
__asm__ volatile ("1:\tmov"
"b"
" %"
"b"
"1,%2\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3:\tmov %3,%0\n"
"\tjmp 2b\n"
".previous\n"
" .section __ex_table,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"1b"
","
"3b"
"\n"
" .previous\n": "=r" (__pu_err): "iq" (req32.param), "m" (*((struct __large_struct *)(& request->param))),
"i" (-14), "0" (__pu_err));
break;
case 2UL:
__asm__ volatile ("1:\tmov"
"w"
" %"
"w"
"1,%2\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3:\tmov %3,%0\n"
"\tjmp 2b\n"
".previous\n"
" .section __ex_table,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"1b"
","
"3b"
"\n"
" .previous\n": "=r" (__pu_err): "ir" (req32.param), "m" (*((struct __large_struct *)(& request->param))),
"i" (-14), "0" (__pu_err));
break;
case 4UL:
__asm__ volatile ("1:\tmov"
"l"
" %"
"k"
"1,%2\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3:\tmov %3,%0\n"
"\tjmp 2b\n"
".previous\n"
" .section __ex_table,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"1b"
","
"3b"
"\n"
" .previous\n": "=r" (__pu_err): "ir" (req32.param), "m" (*((struct __large_struct *)(& request->param))),
"i" (-14), "0" (__pu_err));
break;
case 8UL:
__asm__ volatile ("1:\tmov"
"q"
" %"
""
"1,%2\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3:\tmov %3,%0\n"
"\tjmp 2b\n"
".previous\n"
" .section __ex_table,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"1b"
","
"3b"
"\n"
" .previous\n": "=r" (__pu_err): "Zr" (req32.param), "m" (*((struct __large_struct *)(& request->param))),
"i" (-14), "0" (__pu_err));
break;
default:
__put_user_bad();
}
break;
}
if (__pu_err) {
return (-14);
} else {
while (1) {
__pu_err___0 = 0;
switch (sizeof(request->value)) {
case 1UL:
__asm__ volatile ("1:\tmov"
"b"
" %"
"b"
"1,%2\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3:\tmov %3,%0\n"
"\tjmp 2b\n"
".previous\n"
" .section __ex_table,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"1b"
","
"3b"
"\n"
" .previous\n": "=r" (__pu_err___0): "iq" ((int *)((void *)((unsigned long )req32.value))),
"m" (*((struct __large_struct *)(& request->value))),
"i" (-14), "0" (__pu_err___0));
break;
case 2UL:
__asm__ volatile ("1:\tmov"
"w"
" %"
"w"
"1,%2\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3:\tmov %3,%0\n"
"\tjmp 2b\n"
".previous\n"
" .section __ex_table,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"1b"
","
"3b"
"\n"
" .previous\n": "=r" (__pu_err___0): "ir" ((int *)((void *)((unsigned long )req32.value))),
"m" (*((struct __large_struct *)(& request->value))),
"i" (-14), "0" (__pu_err___0));
break;
case 4UL:
__asm__ volatile ("1:\tmov"
"l"
" %"
"k"
"1,%2\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3:\tmov %3,%0\n"
"\tjmp 2b\n"
".previous\n"
" .section __ex_table,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"1b"
","
"3b"
"\n"
" .previous\n": "=r" (__pu_err___0): "ir" ((int *)((void *)((unsigned long )req32.value))),
"m" (*((struct __large_struct *)(& request->value))),
"i" (-14), "0" (__pu_err___0));
break;
case 8UL:
__asm__ volatile ("1:\tmov"
"q"
" %"
""
"1,%2\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3:\tmov %3,%0\n"
"\tjmp 2b\n"
".previous\n"
" .section __ex_table,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"1b"
","
"3b"
"\n"
" .previous\n": "=r" (__pu_err___0): "Zr" ((int *)((void *)((unsigned long )req32.value))),
"m" (*((struct __large_struct *)(& request->value))),
"i" (-14), "0" (__pu_err___0));
break;
default:
__put_user_bad();
}
break;
}
if (__pu_err___0) {
return (-14);
} else {
}
}
} else {
return (-14);
}
tmp___4 = drm_ioctl((file->f_path.dentry)->d_inode, file, (unsigned long )((((2U | 1U) << (((0 + 8) + 8) + 14)) | (unsigned int )('d' << (0 + 8))) | (unsigned int )((64 + 6) << 0)) | ((sizeof(drm_i915_getparam_t ) == sizeof(drm_i915_getparam_t [1]) && sizeof(drm_i915_getparam_t ) < (unsigned long )(1 << 14) ? sizeof(drm_i915_getparam_t ) : __invalid_size_argument_for_IOC) << ((0 + 8) + 8)),
(unsigned long )request);
return (tmp___4);
}
}
static int compat_i915_alloc(struct file *file , unsigned int cmd , unsigned long arg )
{
drm_i915_mem_alloc32_t req32 ;
drm_i915_mem_alloc_t *request ;
unsigned long tmp ;
void *tmp___0 ;
unsigned long flag ;
unsigned long roksum ;
struct thread_info *tmp___1 ;
int tmp___2 ;
long tmp___3 ;
long __pu_err ;
long __pu_err___0 ;
long __pu_err___1 ;
long __pu_err___2 ;
int tmp___4 ;
{
tmp = copy_from_user(& req32, (void *)arg, sizeof(req32));
if (tmp) {
return (-14);
} else {
}
tmp___0 = compat_alloc_user_space(sizeof(*request));
request = tmp___0;
tmp___1 = current_thread_info();
__asm__ ("add %3,%1 ; sbb %0,%0 ; cmp %1,%4 ; sbb $0,%0": "=&r" (flag), "=r" (roksum): "1" (request),
"g" ((long )sizeof(*request)), "rm" (tmp___1->addr_limit.seg));
if (flag == 0UL) {
tmp___2 = 1;
} else {
tmp___2 = 0;
}
tmp___3 = ldv__builtin_expect(tmp___2, 1);
if (tmp___3) {
while (1) {
__pu_err = 0;
switch (sizeof(request->region)) {
case 1UL:
__asm__ volatile ("1:\tmov"
"b"
" %"
"b"
"1,%2\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3:\tmov %3,%0\n"
"\tjmp 2b\n"
".previous\n"
" .section __ex_table,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"1b"
","
"3b"
"\n"
" .previous\n": "=r" (__pu_err): "iq" (req32.region), "m" (*((struct __large_struct *)(& request->region))),
"i" (-14), "0" (__pu_err));
break;
case 2UL:
__asm__ volatile ("1:\tmov"
"w"
" %"
"w"
"1,%2\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3:\tmov %3,%0\n"
"\tjmp 2b\n"
".previous\n"
" .section __ex_table,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"1b"
","
"3b"
"\n"
" .previous\n": "=r" (__pu_err): "ir" (req32.region), "m" (*((struct __large_struct *)(& request->region))),
"i" (-14), "0" (__pu_err));
break;
case 4UL:
__asm__ volatile ("1:\tmov"
"l"
" %"
"k"
"1,%2\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3:\tmov %3,%0\n"
"\tjmp 2b\n"
".previous\n"
" .section __ex_table,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"1b"
","
"3b"
"\n"
" .previous\n": "=r" (__pu_err): "ir" (req32.region), "m" (*((struct __large_struct *)(& request->region))),
"i" (-14), "0" (__pu_err));
break;
case 8UL:
__asm__ volatile ("1:\tmov"
"q"
" %"
""
"1,%2\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3:\tmov %3,%0\n"
"\tjmp 2b\n"
".previous\n"
" .section __ex_table,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"1b"
","
"3b"
"\n"
" .previous\n": "=r" (__pu_err): "Zr" (req32.region), "m" (*((struct __large_struct *)(& request->region))),
"i" (-14), "0" (__pu_err));
break;
default:
__put_user_bad();
}
break;
}
if (__pu_err) {
return (-14);
} else {
while (1) {
__pu_err___0 = 0;
switch (sizeof(request->alignment)) {
case 1UL:
__asm__ volatile ("1:\tmov"
"b"
" %"
"b"
"1,%2\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3:\tmov %3,%0\n"
"\tjmp 2b\n"
".previous\n"
" .section __ex_table,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"1b"
","
"3b"
"\n"
" .previous\n": "=r" (__pu_err___0): "iq" (req32.alignment),
"m" (*((struct __large_struct *)(& request->alignment))),
"i" (-14), "0" (__pu_err___0));
break;
case 2UL:
__asm__ volatile ("1:\tmov"
"w"
" %"
"w"
"1,%2\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3:\tmov %3,%0\n"
"\tjmp 2b\n"
".previous\n"
" .section __ex_table,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"1b"
","
"3b"
"\n"
" .previous\n": "=r" (__pu_err___0): "ir" (req32.alignment),
"m" (*((struct __large_struct *)(& request->alignment))),
"i" (-14), "0" (__pu_err___0));
break;
case 4UL:
__asm__ volatile ("1:\tmov"
"l"
" %"
"k"
"1,%2\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3:\tmov %3,%0\n"
"\tjmp 2b\n"
".previous\n"
" .section __ex_table,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"1b"
","
"3b"
"\n"
" .previous\n": "=r" (__pu_err___0): "ir" (req32.alignment),
"m" (*((struct __large_struct *)(& request->alignment))),
"i" (-14), "0" (__pu_err___0));
break;
case 8UL:
__asm__ volatile ("1:\tmov"
"q"
" %"
""
"1,%2\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3:\tmov %3,%0\n"
"\tjmp 2b\n"
".previous\n"
" .section __ex_table,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"1b"
","
"3b"
"\n"
" .previous\n": "=r" (__pu_err___0): "Zr" (req32.alignment),
"m" (*((struct __large_struct *)(& request->alignment))),
"i" (-14), "0" (__pu_err___0));
break;
default:
__put_user_bad();
}
break;
}
if (__pu_err___0) {
return (-14);
} else {
while (1) {
__pu_err___1 = 0;
switch (sizeof(request->size)) {
case 1UL:
__asm__ volatile ("1:\tmov"
"b"
" %"
"b"
"1,%2\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3:\tmov %3,%0\n"
"\tjmp 2b\n"
".previous\n"
" .section __ex_table,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"1b"
","
"3b"
"\n"
" .previous\n": "=r" (__pu_err___1): "iq" (req32.size),
"m" (*((struct __large_struct *)(& request->size))),
"i" (-14), "0" (__pu_err___1));
break;
case 2UL:
__asm__ volatile ("1:\tmov"
"w"
" %"
"w"
"1,%2\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3:\tmov %3,%0\n"
"\tjmp 2b\n"
".previous\n"
" .section __ex_table,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"1b"
","
"3b"
"\n"
" .previous\n": "=r" (__pu_err___1): "ir" (req32.size),
"m" (*((struct __large_struct *)(& request->size))),
"i" (-14), "0" (__pu_err___1));
break;
case 4UL:
__asm__ volatile ("1:\tmov"
"l"
" %"
"k"
"1,%2\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3:\tmov %3,%0\n"
"\tjmp 2b\n"
".previous\n"
" .section __ex_table,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"1b"
","
"3b"
"\n"
" .previous\n": "=r" (__pu_err___1): "ir" (req32.size),
"m" (*((struct __large_struct *)(& request->size))),
"i" (-14), "0" (__pu_err___1));
break;
case 8UL:
__asm__ volatile ("1:\tmov"
"q"
" %"
""
"1,%2\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3:\tmov %3,%0\n"
"\tjmp 2b\n"
".previous\n"
" .section __ex_table,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"1b"
","
"3b"
"\n"
" .previous\n": "=r" (__pu_err___1): "Zr" (req32.size),
"m" (*((struct __large_struct *)(& request->size))),
"i" (-14), "0" (__pu_err___1));
break;
default:
__put_user_bad();
}
break;
}
if (__pu_err___1) {
return (-14);
} else {
while (1) {
__pu_err___2 = 0;
switch (sizeof(request->region_offset)) {
case 1UL:
__asm__ volatile ("1:\tmov"
"b"
" %"
"b"
"1,%2\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3:\tmov %3,%0\n"
"\tjmp 2b\n"
".previous\n"
" .section __ex_table,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"1b"
","
"3b"
"\n"
" .previous\n": "=r" (__pu_err___2): "iq" ((int *)((void *)((unsigned long )req32.region_offset))),
"m" (*((struct __large_struct *)(& request->region_offset))),
"i" (-14), "0" (__pu_err___2));
break;
case 2UL:
__asm__ volatile ("1:\tmov"
"w"
" %"
"w"
"1,%2\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3:\tmov %3,%0\n"
"\tjmp 2b\n"
".previous\n"
" .section __ex_table,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"1b"
","
"3b"
"\n"
" .previous\n": "=r" (__pu_err___2): "ir" ((int *)((void *)((unsigned long )req32.region_offset))),
"m" (*((struct __large_struct *)(& request->region_offset))),
"i" (-14), "0" (__pu_err___2));
break;
case 4UL:
__asm__ volatile ("1:\tmov"
"l"
" %"
"k"
"1,%2\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3:\tmov %3,%0\n"
"\tjmp 2b\n"
".previous\n"
" .section __ex_table,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"1b"
","
"3b"
"\n"
" .previous\n": "=r" (__pu_err___2): "ir" ((int *)((void *)((unsigned long )req32.region_offset))),
"m" (*((struct __large_struct *)(& request->region_offset))),
"i" (-14), "0" (__pu_err___2));
break;
case 8UL:
__asm__ volatile ("1:\tmov"
"q"
" %"
""
"1,%2\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3:\tmov %3,%0\n"
"\tjmp 2b\n"
".previous\n"
" .section __ex_table,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"1b"
","
"3b"
"\n"
" .previous\n": "=r" (__pu_err___2): "Zr" ((int *)((void *)((unsigned long )req32.region_offset))),
"m" (*((struct __large_struct *)(& request->region_offset))),
"i" (-14), "0" (__pu_err___2));
break;
default:
__put_user_bad();
}
break;
}
if (__pu_err___2) {
return (-14);
} else {
}
}
}
}
} else {
return (-14);
}
tmp___4 = drm_ioctl((file->f_path.dentry)->d_inode, file, (unsigned long )((((2U | 1U) << (((0 + 8) + 8) + 14)) | (unsigned int )('d' << (0 + 8))) | (unsigned int )((64 + 8) << 0)) | ((sizeof(drm_i915_mem_alloc_t ) == sizeof(drm_i915_mem_alloc_t [1]) && sizeof(drm_i915_mem_alloc_t ) < (unsigned long )(1 << 14) ? sizeof(drm_i915_mem_alloc_t ) : __invalid_size_argument_for_IOC) << ((0 + 8) + 8)),
(unsigned long )request);
return (tmp___4);
}
}
drm_ioctl_compat_t *i915_compat_ioctls[12] =
{ 0, 0, 0, & compat_i915_batchbuffer,
& compat_i915_irq_emit, 0, & compat_i915_getparam, 0,
& compat_i915_alloc, 0, 0, & compat_i915_cmdbuffer};
long i915_compat_ioctl(struct file *filp , unsigned int cmd , unsigned long arg )
{
unsigned int nr ;
drm_ioctl_compat_t *fn ;
int ret ;
long tmp ;
{
nr = (cmd >> 0) & (unsigned int )((1 << 8) - 1);
fn = (void *)0;
if (nr < 64U) {
tmp = drm_compat_ioctl(filp, cmd, arg);
return (tmp);
} else {
}
if ((unsigned long )nr < 64UL + (sizeof(i915_compat_ioctls) / sizeof(i915_compat_ioctls[0]) + (sizeof(char [1 - 2 * 0]) - 1UL))) {
fn = i915_compat_ioctls[nr - 64U];
} else {
}
lock_kernel();
if ((unsigned long )fn != (unsigned long )((void *)0)) {
ret = (*fn)(filp, cmd, arg);
} else {
ret = drm_ioctl((filp->f_path.dentry)->d_inode, filp, cmd, arg);
}
unlock_kernel();
return (ret);
}
}
int ( __attribute__((__warn_unused_result__)) mutex_lock_interruptible)(struct mutex *lock ) ;
int ( __attribute__((__warn_unused_result__)) mutex_lock_killable)(struct mutex *lock ) ;
int mutex_trylock(struct mutex *lock ) ;
__inline static void ldv_error(void)
{
{
LDV_ERROR: {reach_error();abort();}
}
}
extern int ldv_undef_int(void) ;
long ldv__builtin_expect(long exp , long c )
{
{
return (exp);
}
}
int ldv_mutex = 1;
int ( __attribute__((__warn_unused_result__)) mutex_lock_interruptible)(struct mutex *lock )
{
int nondetermined ;
{
if (ldv_mutex == 1) {
} else {
ldv_error();
}
nondetermined = ldv_undef_int();
if (nondetermined) {
ldv_mutex = 2;
return (0);
} else {
return (-4);
}
}
}
int ( __attribute__((__warn_unused_result__)) mutex_lock_killable)(struct mutex *lock )
{
int nondetermined ;
{
if (ldv_mutex == 1) {
} else {
ldv_error();
}
nondetermined = ldv_undef_int();
if (nondetermined) {
ldv_mutex = 2;
return (0);
} else {
return (-4);
}
}
}
int atomic_dec_and_mutex_lock(atomic_t *cnt , struct mutex *lock )
{
int atomic_value_after_dec ;
{
if (ldv_mutex == 1) {
} else {
ldv_error();
}
atomic_value_after_dec = ldv_undef_int();
if (atomic_value_after_dec == 0) {
ldv_mutex = 2;
return (1);
} else {
}
return (0);
}
}
void mutex_lock(struct mutex *lock )
{
{
if (ldv_mutex == 1) {
} else {
ldv_error();
}
ldv_mutex = 2;
return;
}
}
int mutex_trylock(struct mutex *lock )
{
int nondetermined ;
{
if (ldv_mutex == 1) {
} else {
ldv_error();
}
nondetermined = ldv_undef_int();
if (nondetermined) {
ldv_mutex = 2;
return (1);
} else {
return (0);
}
}
}
void mutex_unlock(struct mutex *lock )
{
{
if (ldv_mutex == 2) {
} else {
ldv_error();
}
ldv_mutex = 1;
return;
}
}
void ldv_check_final_state(void)
{
{
if (ldv_mutex == 1) {
} else {
ldv_error();
}
return;
}
}