extern void abort(void);
extern void __assert_fail(const char *, const char *, unsigned int, const char *) __attribute__ ((__nothrow__ , __leaf__)) __attribute__ ((__noreturn__));
void reach_error() { __assert_fail("0", "drivers--gpu--drm--i915--i915.ko_085.aa59662.68_1.cil_true-unreach-call.i", 3, "reach_error"); }
/* Generated by CIL v. 1.5.1 */
/* print_CIL_Input is false */
typedef unsigned int __kernel_mode_t;
typedef unsigned long __kernel_nlink_t;
typedef long __kernel_off_t;
typedef int __kernel_pid_t;
typedef unsigned int __kernel_uid_t;
typedef unsigned int __kernel_gid_t;
typedef unsigned long __kernel_size_t;
typedef long __kernel_ssize_t;
typedef long __kernel_time_t;
typedef long __kernel_clock_t;
typedef int __kernel_timer_t;
typedef int __kernel_clockid_t;
typedef long long __kernel_loff_t;
typedef __kernel_uid_t __kernel_uid32_t;
typedef __kernel_gid_t __kernel_gid32_t;
typedef signed char __s8;
typedef short __s16;
typedef unsigned short __u16;
typedef int __s32;
typedef unsigned int __u32;
typedef long long __s64;
typedef unsigned long long __u64;
typedef signed char s8;
typedef unsigned char u8;
typedef unsigned short u16;
typedef int s32;
typedef unsigned int u32;
typedef long long s64;
typedef unsigned long long u64;
typedef unsigned short umode_t;
typedef u64 dma_addr_t;
typedef __u32 __kernel_dev_t;
typedef __kernel_dev_t dev_t;
typedef __kernel_mode_t mode_t;
typedef __kernel_nlink_t nlink_t;
typedef __kernel_off_t off_t;
typedef __kernel_pid_t pid_t;
typedef __kernel_timer_t timer_t;
typedef __kernel_clockid_t clockid_t;
typedef _Bool bool;
typedef __kernel_uid32_t uid_t;
typedef __kernel_gid32_t gid_t;
typedef __kernel_loff_t loff_t;
typedef __kernel_size_t size_t;
typedef __kernel_ssize_t ssize_t;
typedef __kernel_time_t time_t;
typedef __kernel_clock_t clock_t;
typedef __u32 uint32_t;
typedef __u64 uint64_t;
typedef unsigned long sector_t;
typedef unsigned long blkcnt_t;
typedef unsigned int gfp_t;
typedef unsigned int fmode_t;
typedef u64 phys_addr_t;
typedef phys_addr_t resource_size_t;
struct task_struct;
struct mm_struct;
struct pt_regs {
unsigned long r15 ;
unsigned long r14 ;
unsigned long r13 ;
unsigned long r12 ;
unsigned long bp ;
unsigned long bx ;
unsigned long r11 ;
unsigned long r10 ;
unsigned long r9 ;
unsigned long r8 ;
unsigned long ax ;
unsigned long cx ;
unsigned long dx ;
unsigned long si ;
unsigned long di ;
unsigned long orig_ax ;
unsigned long ip ;
unsigned long cs ;
unsigned long flags ;
unsigned long sp ;
unsigned long ss ;
};
struct info {
long ___orig_eip ;
long ___ebx ;
long ___ecx ;
long ___edx ;
long ___esi ;
long ___edi ;
long ___ebp ;
long ___eax ;
long ___ds ;
long ___es ;
long ___fs ;
long ___orig_eax ;
long ___eip ;
long ___cs ;
long ___eflags ;
long ___esp ;
long ___ss ;
long ___vm86_es ;
long ___vm86_ds ;
long ___vm86_fs ;
long ___vm86_gs ;
};
typedef __builtin_va_list __gnuc_va_list;
typedef __gnuc_va_list va_list;
struct module;
struct bug_entry {
unsigned long bug_addr ;
char const *file ;
unsigned short line ;
unsigned short flags ;
};
struct completion;
struct pid;
typedef unsigned long pgdval_t;
typedef unsigned long pgprotval_t;
struct page;
struct __anonstruct_pgd_t_7 {
pgdval_t pgd ;
};
typedef struct __anonstruct_pgd_t_7 pgd_t;
struct __anonstruct_pgprot_t_8 {
pgprotval_t pgprot ;
};
typedef struct __anonstruct_pgprot_t_8 pgprot_t;
struct __anonstruct____missing_field_name_12 {
unsigned int a ;
unsigned int b ;
};
struct __anonstruct____missing_field_name_13 {
u16 limit0 ;
u16 base0 ;
unsigned int base1 : 8 ;
unsigned int type : 4 ;
unsigned int s : 1 ;
unsigned int dpl : 2 ;
unsigned int p : 1 ;
unsigned int limit : 4 ;
unsigned int avl : 1 ;
unsigned int l : 1 ;
unsigned int d : 1 ;
unsigned int g : 1 ;
unsigned int base2 : 8 ;
};
union __anonunion____missing_field_name_11 {
struct __anonstruct____missing_field_name_12 __annonCompField2 ;
struct __anonstruct____missing_field_name_13 __annonCompField3 ;
};
struct desc_struct {
union __anonunion____missing_field_name_11 __annonCompField4 ;
} __attribute__((__packed__)) ;
struct cpumask {
unsigned long bits[((8UL + 8UL * sizeof(long )) - 1UL) / (8UL * sizeof(long ))] ;
};
typedef struct cpumask cpumask_t;
struct thread_struct;
struct raw_spinlock;
struct exec_domain;
struct map_segment;
struct exec_domain {
char const *name ;
void (*handler)(int , struct pt_regs * ) ;
unsigned char pers_low ;
unsigned char pers_high ;
unsigned long *signal_map ;
unsigned long *signal_invmap ;
struct map_segment *err_map ;
struct map_segment *socktype_map ;
struct map_segment *sockopt_map ;
struct map_segment *af_map ;
struct module *module ;
struct exec_domain *next ;
};
struct i387_fsave_struct {
u32 cwd ;
u32 swd ;
u32 twd ;
u32 fip ;
u32 fcs ;
u32 foo ;
u32 fos ;
u32 st_space[20] ;
u32 status ;
};
struct __anonstruct____missing_field_name_19 {
u64 rip ;
u64 rdp ;
};
struct __anonstruct____missing_field_name_20 {
u32 fip ;
u32 fcs ;
u32 foo ;
u32 fos ;
};
union __anonunion____missing_field_name_18 {
struct __anonstruct____missing_field_name_19 __annonCompField5 ;
struct __anonstruct____missing_field_name_20 __annonCompField6 ;
};
union __anonunion____missing_field_name_21 {
u32 padding1[12] ;
u32 sw_reserved[12] ;
};
struct i387_fxsave_struct {
u16 cwd ;
u16 swd ;
u16 twd ;
u16 fop ;
union __anonunion____missing_field_name_18 __annonCompField7 ;
u32 mxcsr ;
u32 mxcsr_mask ;
u32 st_space[32] ;
u32 xmm_space[64] ;
u32 padding[12] ;
union __anonunion____missing_field_name_21 __annonCompField8 ;
} __attribute__((__aligned__(16))) ;
struct i387_soft_struct {
u32 cwd ;
u32 swd ;
u32 twd ;
u32 fip ;
u32 fcs ;
u32 foo ;
u32 fos ;
u32 st_space[20] ;
u8 ftop ;
u8 changed ;
u8 lookahead ;
u8 no_update ;
u8 rm ;
u8 alimit ;
struct info *info ;
u32 entry_eip ;
};
struct xsave_hdr_struct {
u64 xstate_bv ;
u64 reserved1[2] ;
u64 reserved2[5] ;
} __attribute__((__packed__)) ;
struct xsave_struct {
struct i387_fxsave_struct i387 ;
struct xsave_hdr_struct xsave_hdr ;
} __attribute__((__packed__, __aligned__(64))) ;
union thread_xstate {
struct i387_fsave_struct fsave ;
struct i387_fxsave_struct fxsave ;
struct i387_soft_struct soft ;
struct xsave_struct xsave ;
};
struct kmem_cache;
struct thread_struct {
struct desc_struct tls_array[3] ;
unsigned long sp0 ;
unsigned long sp ;
unsigned long usersp ;
unsigned short es ;
unsigned short ds ;
unsigned short fsindex ;
unsigned short gsindex ;
unsigned long ip ;
unsigned long fs ;
unsigned long gs ;
unsigned long debugreg0 ;
unsigned long debugreg1 ;
unsigned long debugreg2 ;
unsigned long debugreg3 ;
unsigned long debugreg6 ;
unsigned long debugreg7 ;
unsigned long cr2 ;
unsigned long trap_no ;
unsigned long error_code ;
union thread_xstate *xstate ;
unsigned long *io_bitmap_ptr ;
unsigned long iopl ;
unsigned int io_bitmap_max ;
unsigned long debugctlmsr ;
};
struct __anonstruct_mm_segment_t_22 {
unsigned long seg ;
};
typedef struct __anonstruct_mm_segment_t_22 mm_segment_t;
struct list_head {
struct list_head *next ;
struct list_head *prev ;
};
struct hlist_node;
struct hlist_head {
struct hlist_node *first ;
};
struct hlist_node {
struct hlist_node *next ;
struct hlist_node **pprev ;
};
struct timespec;
struct compat_timespec;
struct __anonstruct____missing_field_name_24 {
unsigned long arg0 ;
unsigned long arg1 ;
unsigned long arg2 ;
unsigned long arg3 ;
};
struct __anonstruct_futex_25 {
u32 *uaddr ;
u32 val ;
u32 flags ;
u32 bitset ;
u64 time ;
};
struct __anonstruct_nanosleep_26 {
clockid_t index ;
struct timespec *rmtp ;
struct compat_timespec *compat_rmtp ;
u64 expires ;
};
struct pollfd;
struct __anonstruct_poll_27 {
struct pollfd *ufds ;
int nfds ;
int has_timeout ;
unsigned long tv_sec ;
unsigned long tv_nsec ;
};
union __anonunion____missing_field_name_23 {
struct __anonstruct____missing_field_name_24 __annonCompField9 ;
struct __anonstruct_futex_25 futex ;
struct __anonstruct_nanosleep_26 nanosleep ;
struct __anonstruct_poll_27 poll ;
};
struct restart_block {
long (*fn)(struct restart_block * ) ;
union __anonunion____missing_field_name_23 __annonCompField10 ;
};
struct thread_info {
struct task_struct *task ;
struct exec_domain *exec_domain ;
unsigned long flags ;
__u32 status ;
__u32 cpu ;
int preempt_count ;
mm_segment_t addr_limit ;
struct restart_block restart_block ;
void *sysenter_return ;
};
struct raw_spinlock {
unsigned int slock ;
};
typedef struct raw_spinlock raw_spinlock_t;
struct __anonstruct_raw_rwlock_t_28 {
unsigned int lock ;
};
typedef struct __anonstruct_raw_rwlock_t_28 raw_rwlock_t;
struct lockdep_map;
struct stack_trace {
unsigned int nr_entries ;
unsigned int max_entries ;
unsigned long *entries ;
int skip ;
};
enum lock_usage_bit {
LOCK_USED = 0,
LOCK_USED_IN_HARDIRQ = 1,
LOCK_USED_IN_SOFTIRQ = 2,
LOCK_ENABLED_SOFTIRQS = 3,
LOCK_ENABLED_HARDIRQS = 4,
LOCK_USED_IN_HARDIRQ_READ = 5,
LOCK_USED_IN_SOFTIRQ_READ = 6,
LOCK_ENABLED_SOFTIRQS_READ = 7,
LOCK_ENABLED_HARDIRQS_READ = 8,
LOCK_USAGE_STATES = 9
} ;
struct lockdep_subclass_key {
char __one_byte ;
} __attribute__((__packed__)) ;
struct lock_class_key {
struct lockdep_subclass_key subkeys[8UL] ;
};
struct lock_class {
struct list_head hash_entry ;
struct list_head lock_entry ;
struct lockdep_subclass_key *key ;
unsigned int subclass ;
unsigned int dep_gen_id ;
unsigned long usage_mask ;
struct stack_trace usage_traces[LOCK_USAGE_STATES] ;
struct list_head locks_after ;
struct list_head locks_before ;
unsigned int version ;
unsigned long ops ;
char const *name ;
int name_version ;
unsigned long contention_point[4] ;
};
struct lockdep_map {
struct lock_class_key *key ;
struct lock_class *class_cache ;
char const *name ;
int cpu ;
};
struct held_lock {
u64 prev_chain_key ;
unsigned long acquire_ip ;
struct lockdep_map *instance ;
struct lockdep_map *nest_lock ;
u64 waittime_stamp ;
u64 holdtime_stamp ;
unsigned int class_idx : 13 ;
unsigned int irq_context : 2 ;
unsigned int trylock : 1 ;
unsigned int read : 2 ;
unsigned int check : 2 ;
unsigned int hardirqs_off : 1 ;
};
struct __anonstruct_spinlock_t_29 {
raw_spinlock_t raw_lock ;
unsigned int magic ;
unsigned int owner_cpu ;
void *owner ;
struct lockdep_map dep_map ;
};
typedef struct __anonstruct_spinlock_t_29 spinlock_t;
struct __anonstruct_rwlock_t_30 {
raw_rwlock_t raw_lock ;
unsigned int magic ;
unsigned int owner_cpu ;
void *owner ;
struct lockdep_map dep_map ;
};
typedef struct __anonstruct_rwlock_t_30 rwlock_t;
struct __anonstruct_atomic_t_31 {
int counter ;
};
typedef struct __anonstruct_atomic_t_31 atomic_t;
struct __anonstruct_atomic64_t_32 {
long counter ;
};
typedef struct __anonstruct_atomic64_t_32 atomic64_t;
typedef atomic64_t atomic_long_t;
struct timespec {
time_t tv_sec ;
long tv_nsec ;
};
struct kstat {
u64 ino ;
dev_t dev ;
umode_t mode ;
unsigned int nlink ;
uid_t uid ;
gid_t gid ;
dev_t rdev ;
loff_t size ;
struct timespec atime ;
struct timespec mtime ;
struct timespec ctime ;
unsigned long blksize ;
unsigned long long blocks ;
};
struct __wait_queue;
typedef struct __wait_queue wait_queue_t;
struct __wait_queue {
unsigned int flags ;
void *private ;
int (*func)(wait_queue_t *wait , unsigned int mode , int sync , void *key ) ;
struct list_head task_list ;
};
struct __wait_queue_head {
spinlock_t lock ;
struct list_head task_list ;
};
typedef struct __wait_queue_head wait_queue_head_t;
struct __anonstruct_nodemask_t_34 {
unsigned long bits[(((unsigned long )(1 << 6) + 8UL * sizeof(long )) - 1UL) / (8UL * sizeof(long ))] ;
};
typedef struct __anonstruct_nodemask_t_34 nodemask_t;
struct mutex {
atomic_t count ;
spinlock_t wait_lock ;
struct list_head wait_list ;
struct thread_info *owner ;
char const *name ;
void *magic ;
struct lockdep_map dep_map ;
};
struct mutex_waiter {
struct list_head list ;
struct task_struct *task ;
struct mutex *lock ;
void *magic ;
};
struct rw_semaphore;
struct rw_semaphore {
__s32 activity ;
spinlock_t wait_lock ;
struct list_head wait_list ;
struct lockdep_map dep_map ;
};
struct file;
struct device;
struct pm_message {
int event ;
};
typedef struct pm_message pm_message_t;
struct pm_ops {
int (*prepare)(struct device *dev ) ;
void (*complete)(struct device *dev ) ;
int (*suspend)(struct device *dev ) ;
int (*resume)(struct device *dev ) ;
int (*freeze)(struct device *dev ) ;
int (*thaw)(struct device *dev ) ;
int (*poweroff)(struct device *dev ) ;
int (*restore)(struct device *dev ) ;
};
struct pm_ext_ops {
struct pm_ops base ;
int (*suspend_noirq)(struct device *dev ) ;
int (*resume_noirq)(struct device *dev ) ;
int (*freeze_noirq)(struct device *dev ) ;
int (*thaw_noirq)(struct device *dev ) ;
int (*poweroff_noirq)(struct device *dev ) ;
int (*restore_noirq)(struct device *dev ) ;
};
enum dpm_state {
DPM_INVALID = 0,
DPM_ON = 1,
DPM_PREPARING = 2,
DPM_RESUMING = 3,
DPM_SUSPENDING = 4,
DPM_OFF = 5,
DPM_OFF_IRQ = 6
} ;
struct dev_pm_info {
pm_message_t power_state ;
unsigned int can_wakeup : 1 ;
unsigned int should_wakeup : 1 ;
enum dpm_state status ;
struct list_head entry ;
};
struct __anonstruct_mm_context_t_83 {
void *ldt ;
int size ;
struct mutex lock ;
void *vdso ;
};
typedef struct __anonstruct_mm_context_t_83 mm_context_t;
struct pci_bus;
struct vm_area_struct;
struct key;
typedef __u64 Elf64_Addr;
typedef __u16 Elf64_Half;
typedef __u32 Elf64_Word;
typedef __u64 Elf64_Xword;
struct elf64_sym {
Elf64_Word st_name ;
unsigned char st_info ;
unsigned char st_other ;
Elf64_Half st_shndx ;
Elf64_Addr st_value ;
Elf64_Xword st_size ;
};
typedef struct elf64_sym Elf64_Sym;
struct kobject;
struct attribute {
char const *name ;
struct module *owner ;
mode_t mode ;
};
struct attribute_group {
char const *name ;
mode_t (*is_visible)(struct kobject * , struct attribute * , int ) ;
struct attribute **attrs ;
};
struct bin_attribute {
struct attribute attr ;
size_t size ;
void *private ;
ssize_t (*read)(struct kobject * , struct bin_attribute * , char * , loff_t ,
size_t ) ;
ssize_t (*write)(struct kobject * , struct bin_attribute * , char * , loff_t ,
size_t ) ;
int (*mmap)(struct kobject * , struct bin_attribute *attr , struct vm_area_struct *vma ) ;
};
struct sysfs_ops {
ssize_t (*show)(struct kobject * , struct attribute * , char * ) ;
ssize_t (*store)(struct kobject * , struct attribute * , char const * , size_t ) ;
};
struct sysfs_dirent;
struct kref {
atomic_t refcount ;
};
struct kset;
struct kobj_type;
struct kobject {
char const *name ;
struct list_head entry ;
struct kobject *parent ;
struct kset *kset ;
struct kobj_type *ktype ;
struct sysfs_dirent *sd ;
struct kref kref ;
unsigned int state_initialized : 1 ;
unsigned int state_in_sysfs : 1 ;
unsigned int state_add_uevent_sent : 1 ;
unsigned int state_remove_uevent_sent : 1 ;
};
struct kobj_type {
void (*release)(struct kobject *kobj ) ;
struct sysfs_ops *sysfs_ops ;
struct attribute **default_attrs ;
};
struct kobj_uevent_env {
char *envp[32] ;
int envp_idx ;
char buf[2048] ;
int buflen ;
};
struct kset_uevent_ops {
int (*filter)(struct kset *kset , struct kobject *kobj ) ;
char const *(*name)(struct kset *kset , struct kobject *kobj ) ;
int (*uevent)(struct kset *kset , struct kobject *kobj , struct kobj_uevent_env *env ) ;
};
struct kset {
struct list_head list ;
spinlock_t list_lock ;
struct kobject kobj ;
struct kset_uevent_ops *uevent_ops ;
};
struct kernel_param;
struct kparam_string;
struct kparam_array;
union __anonunion____missing_field_name_93 {
void *arg ;
struct kparam_string const *str ;
struct kparam_array const *arr ;
};
struct kernel_param {
char const *name ;
unsigned int perm ;
int (*set)(char const *val , struct kernel_param *kp ) ;
int (*get)(char *buffer , struct kernel_param *kp ) ;
union __anonunion____missing_field_name_93 __annonCompField11 ;
};
struct kparam_string {
unsigned int maxlen ;
char *string ;
};
struct kparam_array {
unsigned int max ;
unsigned int *num ;
int (*set)(char const *val , struct kernel_param *kp ) ;
int (*get)(char *buffer , struct kernel_param *kp ) ;
unsigned int elemsize ;
void *elem ;
};
struct marker;
typedef void marker_probe_func(void *probe_private , void *call_private , char const *fmt ,
va_list *args );
struct marker_probe_closure {
marker_probe_func *func ;
void *probe_private ;
};
struct marker {
char const *name ;
char const *format ;
char state ;
char ptype ;
void (*call)(struct marker const *mdata , void *call_private , ...) ;
struct marker_probe_closure single ;
struct marker_probe_closure *multi ;
} __attribute__((__aligned__(8))) ;
typedef unsigned long long cycles_t;
union ktime {
s64 tv64 ;
};
typedef union ktime ktime_t;
struct tvec_base;
struct timer_list {
struct list_head entry ;
unsigned long expires ;
void (*function)(unsigned long ) ;
unsigned long data ;
struct tvec_base *base ;
void *start_site ;
char start_comm[16] ;
int start_pid ;
};
struct hrtimer;
enum hrtimer_restart;
struct work_struct;
struct work_struct {
atomic_long_t data ;
struct list_head entry ;
void (*func)(struct work_struct *work ) ;
struct lockdep_map lockdep_map ;
};
struct delayed_work {
struct work_struct work ;
struct timer_list timer ;
};
enum stat_item {
ALLOC_FASTPATH = 0,
ALLOC_SLOWPATH = 1,
FREE_FASTPATH = 2,
FREE_SLOWPATH = 3,
FREE_FROZEN = 4,
FREE_ADD_PARTIAL = 5,
FREE_REMOVE_PARTIAL = 6,
ALLOC_FROM_PARTIAL = 7,
ALLOC_SLAB = 8,
ALLOC_REFILL = 9,
FREE_SLAB = 10,
CPUSLAB_FLUSH = 11,
DEACTIVATE_FULL = 12,
DEACTIVATE_EMPTY = 13,
DEACTIVATE_TO_HEAD = 14,
DEACTIVATE_TO_TAIL = 15,
DEACTIVATE_REMOTE_FREES = 16,
ORDER_FALLBACK = 17,
NR_SLUB_STAT_ITEMS = 18
} ;
struct kmem_cache_cpu {
void **freelist ;
struct page *page ;
int node ;
unsigned int offset ;
unsigned int objsize ;
unsigned int stat[NR_SLUB_STAT_ITEMS] ;
};
struct kmem_cache_node {
spinlock_t list_lock ;
unsigned long nr_partial ;
unsigned long min_partial ;
struct list_head partial ;
atomic_long_t nr_slabs ;
atomic_long_t total_objects ;
struct list_head full ;
};
struct kmem_cache_order_objects {
unsigned long x ;
};
struct kmem_cache {
unsigned long flags ;
int size ;
int objsize ;
int offset ;
struct kmem_cache_order_objects oo ;
struct kmem_cache_node local_node ;
struct kmem_cache_order_objects max ;
struct kmem_cache_order_objects min ;
gfp_t allocflags ;
int refcount ;
void (*ctor)(void * ) ;
int inuse ;
int align ;
char const *name ;
struct list_head list ;
struct kobject kobj ;
int remote_node_defrag_ratio ;
struct kmem_cache_node *node[1 << 6] ;
struct kmem_cache_cpu *cpu_slab[8] ;
};
struct completion {
unsigned int done ;
wait_queue_head_t wait ;
};
struct rcu_head {
struct rcu_head *next ;
void (*func)(struct rcu_head *head ) ;
};
struct tracepoint;
struct tracepoint {
char const *name ;
int state ;
void **funcs ;
} __attribute__((__aligned__(8))) ;
struct __anonstruct_local_t_94 {
atomic_long_t a ;
};
typedef struct __anonstruct_local_t_94 local_t;
struct mod_arch_specific {
};
struct kernel_symbol {
unsigned long value ;
char const *name ;
};
struct module_attribute {
struct attribute attr ;
ssize_t (*show)(struct module_attribute * , struct module * , char * ) ;
ssize_t (*store)(struct module_attribute * , struct module * , char const * ,
size_t count ) ;
void (*setup)(struct module * , char const * ) ;
int (*test)(struct module * ) ;
void (*free)(struct module * ) ;
};
struct module_param_attrs;
struct module_kobject {
struct kobject kobj ;
struct module *mod ;
struct kobject *drivers_dir ;
struct module_param_attrs *mp ;
};
struct exception_table_entry;
struct module_ref {
local_t count ;
} __attribute__((__aligned__((1) << (7) ))) ;
enum module_state {
MODULE_STATE_LIVE = 0,
MODULE_STATE_COMING = 1,
MODULE_STATE_GOING = 2
} ;
struct module_sect_attrs;
struct module_notes_attrs;
struct module {
enum module_state state ;
struct list_head list ;
char name[64UL - sizeof(unsigned long )] ;
struct module_kobject mkobj ;
struct module_attribute *modinfo_attrs ;
char const *version ;
char const *srcversion ;
struct kobject *holders_dir ;
struct kernel_symbol const *syms ;
unsigned long const *crcs ;
unsigned int num_syms ;
unsigned int num_gpl_syms ;
struct kernel_symbol const *gpl_syms ;
unsigned long const *gpl_crcs ;
struct kernel_symbol const *unused_syms ;
unsigned long const *unused_crcs ;
unsigned int num_unused_syms ;
unsigned int num_unused_gpl_syms ;
struct kernel_symbol const *unused_gpl_syms ;
unsigned long const *unused_gpl_crcs ;
struct kernel_symbol const *gpl_future_syms ;
unsigned long const *gpl_future_crcs ;
unsigned int num_gpl_future_syms ;
unsigned int num_exentries ;
struct exception_table_entry *extable ;
int (*init)(void) ;
void *module_init ;
void *module_core ;
unsigned int init_size ;
unsigned int core_size ;
unsigned int init_text_size ;
unsigned int core_text_size ;
void *unwind_info ;
struct mod_arch_specific arch ;
unsigned int taints ;
unsigned int num_bugs ;
struct list_head bug_list ;
struct bug_entry *bug_table ;
Elf64_Sym *symtab ;
unsigned int num_symtab ;
char *strtab ;
struct module_sect_attrs *sect_attrs ;
struct module_notes_attrs *notes_attrs ;
void *percpu ;
char *args ;
struct marker *markers ;
unsigned int num_markers ;
struct tracepoint *tracepoints ;
unsigned int num_tracepoints ;
struct list_head modules_which_use_me ;
struct task_struct *waiter ;
void (*exit)(void) ;
struct module_ref ref[8] ;
};
struct device_driver;
struct file_operations;
struct nameidata;
struct path;
struct vfsmount;
struct qstr {
unsigned int hash ;
unsigned int len ;
unsigned char const *name ;
};
struct dcookie_struct;
struct inode;
union __anonunion_d_u_95 {
struct list_head d_child ;
struct rcu_head d_rcu ;
};
struct dentry_operations;
struct super_block;
struct dentry {
atomic_t d_count ;
unsigned int d_flags ;
spinlock_t d_lock ;
struct inode *d_inode ;
struct hlist_node d_hash ;
struct dentry *d_parent ;
struct qstr d_name ;
struct list_head d_lru ;
union __anonunion_d_u_95 d_u ;
struct list_head d_subdirs ;
struct list_head d_alias ;
unsigned long d_time ;
struct dentry_operations *d_op ;
struct super_block *d_sb ;
void *d_fsdata ;
struct dcookie_struct *d_cookie ;
int d_mounted ;
unsigned char d_iname[36] ;
};
struct dentry_operations {
int (*d_revalidate)(struct dentry * , struct nameidata * ) ;
int (*d_hash)(struct dentry * , struct qstr * ) ;
int (*d_compare)(struct dentry * , struct qstr * , struct qstr * ) ;
int (*d_delete)(struct dentry * ) ;
void (*d_release)(struct dentry * ) ;
void (*d_iput)(struct dentry * , struct inode * ) ;
char *(*d_dname)(struct dentry * , char * , int ) ;
};
struct path {
struct vfsmount *mnt ;
struct dentry *dentry ;
};
struct radix_tree_node;
struct radix_tree_root {
unsigned int height ;
gfp_t gfp_mask ;
struct radix_tree_node *rnode ;
};
struct prio_tree_node;
struct raw_prio_tree_node {
struct prio_tree_node *left ;
struct prio_tree_node *right ;
struct prio_tree_node *parent ;
};
struct prio_tree_node {
struct prio_tree_node *left ;
struct prio_tree_node *right ;
struct prio_tree_node *parent ;
unsigned long start ;
unsigned long last ;
};
struct prio_tree_root {
struct prio_tree_node *prio_tree_node ;
unsigned short index_bits ;
unsigned short raw ;
};
enum pid_type {
PIDTYPE_PID = 0,
PIDTYPE_PGID = 1,
PIDTYPE_SID = 2,
PIDTYPE_MAX = 3
} ;
struct pid_namespace;
struct upid {
int nr ;
struct pid_namespace *ns ;
struct hlist_node pid_chain ;
};
struct pid {
atomic_t count ;
unsigned int level ;
struct hlist_head tasks[PIDTYPE_MAX] ;
struct rcu_head rcu ;
struct upid numbers[1] ;
};
struct pid_link {
struct hlist_node node ;
struct pid *pid ;
};
struct kernel_cap_struct {
__u32 cap[2] ;
};
typedef struct kernel_cap_struct kernel_cap_t;
struct semaphore {
spinlock_t lock ;
unsigned int count ;
struct list_head wait_list ;
};
struct fiemap_extent {
__u64 fe_logical ;
__u64 fe_physical ;
__u64 fe_length ;
__u64 fe_reserved64[2] ;
__u32 fe_flags ;
__u32 fe_reserved[3] ;
};
struct export_operations;
struct iovec;
struct kiocb;
struct pipe_inode_info;
struct poll_table_struct;
struct kstatfs;
struct iattr {
unsigned int ia_valid ;
umode_t ia_mode ;
uid_t ia_uid ;
gid_t ia_gid ;
loff_t ia_size ;
struct timespec ia_atime ;
struct timespec ia_mtime ;
struct timespec ia_ctime ;
struct file *ia_file ;
};
struct if_dqblk {
__u64 dqb_bhardlimit ;
__u64 dqb_bsoftlimit ;
__u64 dqb_curspace ;
__u64 dqb_ihardlimit ;
__u64 dqb_isoftlimit ;
__u64 dqb_curinodes ;
__u64 dqb_btime ;
__u64 dqb_itime ;
__u32 dqb_valid ;
};
struct if_dqinfo {
__u64 dqi_bgrace ;
__u64 dqi_igrace ;
__u32 dqi_flags ;
__u32 dqi_valid ;
};
struct fs_disk_quota {
__s8 d_version ;
__s8 d_flags ;
__u16 d_fieldmask ;
__u32 d_id ;
__u64 d_blk_hardlimit ;
__u64 d_blk_softlimit ;
__u64 d_ino_hardlimit ;
__u64 d_ino_softlimit ;
__u64 d_bcount ;
__u64 d_icount ;
__s32 d_itimer ;
__s32 d_btimer ;
__u16 d_iwarns ;
__u16 d_bwarns ;
__s32 d_padding2 ;
__u64 d_rtb_hardlimit ;
__u64 d_rtb_softlimit ;
__u64 d_rtbcount ;
__s32 d_rtbtimer ;
__u16 d_rtbwarns ;
__s16 d_padding3 ;
char d_padding4[8] ;
};
struct fs_qfilestat {
__u64 qfs_ino ;
__u64 qfs_nblks ;
__u32 qfs_nextents ;
};
typedef struct fs_qfilestat fs_qfilestat_t;
struct fs_quota_stat {
__s8 qs_version ;
__u16 qs_flags ;
__s8 qs_pad ;
fs_qfilestat_t qs_uquota ;
fs_qfilestat_t qs_gquota ;
__u32 qs_incoredqs ;
__s32 qs_btimelimit ;
__s32 qs_itimelimit ;
__s32 qs_rtbtimelimit ;
__u16 qs_bwarnlimit ;
__u16 qs_iwarnlimit ;
};
struct v1_mem_dqinfo {
};
struct v2_mem_dqinfo {
unsigned int dqi_blocks ;
unsigned int dqi_free_blk ;
unsigned int dqi_free_entry ;
};
typedef __kernel_uid32_t qid_t;
typedef __u64 qsize_t;
struct mem_dqblk {
__u32 dqb_bhardlimit ;
__u32 dqb_bsoftlimit ;
qsize_t dqb_curspace ;
__u32 dqb_ihardlimit ;
__u32 dqb_isoftlimit ;
__u32 dqb_curinodes ;
time_t dqb_btime ;
time_t dqb_itime ;
};
struct quota_format_type;
union __anonunion_u_99 {
struct v1_mem_dqinfo v1_i ;
struct v2_mem_dqinfo v2_i ;
};
struct mem_dqinfo {
struct quota_format_type *dqi_format ;
int dqi_fmt_id ;
struct list_head dqi_dirty_list ;
unsigned long dqi_flags ;
unsigned int dqi_bgrace ;
unsigned int dqi_igrace ;
qsize_t dqi_maxblimit ;
qsize_t dqi_maxilimit ;
union __anonunion_u_99 u ;
};
struct dquot {
struct hlist_node dq_hash ;
struct list_head dq_inuse ;
struct list_head dq_free ;
struct list_head dq_dirty ;
struct mutex dq_lock ;
atomic_t dq_count ;
wait_queue_head_t dq_wait_unused ;
struct super_block *dq_sb ;
unsigned int dq_id ;
loff_t dq_off ;
unsigned long dq_flags ;
short dq_type ;
struct mem_dqblk dq_dqb ;
};
struct quota_format_ops {
int (*check_quota_file)(struct super_block *sb , int type ) ;
int (*read_file_info)(struct super_block *sb , int type ) ;
int (*write_file_info)(struct super_block *sb , int type ) ;
int (*free_file_info)(struct super_block *sb , int type ) ;
int (*read_dqblk)(struct dquot *dquot ) ;
int (*commit_dqblk)(struct dquot *dquot ) ;
int (*release_dqblk)(struct dquot *dquot ) ;
};
struct dquot_operations {
int (*initialize)(struct inode * , int ) ;
int (*drop)(struct inode * ) ;
int (*alloc_space)(struct inode * , qsize_t , int ) ;
int (*alloc_inode)(struct inode const * , unsigned long ) ;
int (*free_space)(struct inode * , qsize_t ) ;
int (*free_inode)(struct inode const * , unsigned long ) ;
int (*transfer)(struct inode * , struct iattr * ) ;
int (*write_dquot)(struct dquot * ) ;
int (*acquire_dquot)(struct dquot * ) ;
int (*release_dquot)(struct dquot * ) ;
int (*mark_dirty)(struct dquot * ) ;
int (*write_info)(struct super_block * , int ) ;
};
struct quotactl_ops {
int (*quota_on)(struct super_block * , int , int , char * , int ) ;
int (*quota_off)(struct super_block * , int , int ) ;
int (*quota_sync)(struct super_block * , int ) ;
int (*get_info)(struct super_block * , int , struct if_dqinfo * ) ;
int (*set_info)(struct super_block * , int , struct if_dqinfo * ) ;
int (*get_dqblk)(struct super_block * , int , qid_t , struct if_dqblk * ) ;
int (*set_dqblk)(struct super_block * , int , qid_t , struct if_dqblk * ) ;
int (*get_xstate)(struct super_block * , struct fs_quota_stat * ) ;
int (*set_xstate)(struct super_block * , unsigned int , int ) ;
int (*get_xquota)(struct super_block * , int , qid_t , struct fs_disk_quota * ) ;
int (*set_xquota)(struct super_block * , int , qid_t , struct fs_disk_quota * ) ;
};
struct quota_format_type {
int qf_fmt_id ;
struct quota_format_ops *qf_ops ;
struct module *qf_owner ;
struct quota_format_type *qf_next ;
};
struct quota_info {
unsigned int flags ;
struct mutex dqio_mutex ;
struct mutex dqonoff_mutex ;
struct rw_semaphore dqptr_sem ;
struct inode *files[2] ;
struct mem_dqinfo info[2] ;
struct quota_format_ops *ops[2] ;
};
struct address_space;
struct writeback_control;
union __anonunion_arg_101 {
char *buf ;
void *data ;
};
struct __anonstruct_read_descriptor_t_100 {
size_t written ;
size_t count ;
union __anonunion_arg_101 arg ;
int error ;
};
typedef struct __anonstruct_read_descriptor_t_100 read_descriptor_t;
struct address_space_operations {
int (*writepage)(struct page *page , struct writeback_control *wbc ) ;
int (*readpage)(struct file * , struct page * ) ;
void (*sync_page)(struct page * ) ;
int (*writepages)(struct address_space * , struct writeback_control * ) ;
int (*set_page_dirty)(struct page *page ) ;
int (*readpages)(struct file *filp , struct address_space *mapping , struct list_head *pages ,
unsigned int nr_pages ) ;
int (*write_begin)(struct file * , struct address_space *mapping , loff_t pos ,
unsigned int len , unsigned int flags , struct page **pagep ,
void **fsdata ) ;
int (*write_end)(struct file * , struct address_space *mapping , loff_t pos , unsigned int len ,
unsigned int copied , struct page *page , void *fsdata ) ;
sector_t (*bmap)(struct address_space * , sector_t ) ;
void (*invalidatepage)(struct page * , unsigned long ) ;
int (*releasepage)(struct page * , gfp_t ) ;
ssize_t (*direct_IO)(int , struct kiocb * , struct iovec const *iov , loff_t offset ,
unsigned long nr_segs ) ;
int (*get_xip_mem)(struct address_space * , unsigned long , int , void ** , unsigned long * ) ;
int (*migratepage)(struct address_space * , struct page * , struct page * ) ;
int (*launder_page)(struct page * ) ;
int (*is_partially_uptodate)(struct page * , read_descriptor_t * , unsigned long ) ;
};
struct backing_dev_info;
struct address_space {
struct inode *host ;
struct radix_tree_root page_tree ;
spinlock_t tree_lock ;
unsigned int i_mmap_writable ;
struct prio_tree_root i_mmap ;
struct list_head i_mmap_nonlinear ;
spinlock_t i_mmap_lock ;
unsigned int truncate_count ;
unsigned long nrpages ;
unsigned long writeback_index ;
struct address_space_operations const *a_ops ;
unsigned long flags ;
struct backing_dev_info *backing_dev_info ;
spinlock_t private_lock ;
struct list_head private_list ;
struct address_space *assoc_mapping ;
} __attribute__((__aligned__(sizeof(long )))) ;
struct hd_struct;
struct gendisk;
struct block_device {
dev_t bd_dev ;
struct inode *bd_inode ;
int bd_openers ;
struct mutex bd_mutex ;
struct semaphore bd_mount_sem ;
struct list_head bd_inodes ;
void *bd_holder ;
int bd_holders ;
struct list_head bd_holder_list ;
struct block_device *bd_contains ;
unsigned int bd_block_size ;
struct hd_struct *bd_part ;
unsigned int bd_part_count ;
int bd_invalidated ;
struct gendisk *bd_disk ;
struct list_head bd_list ;
struct backing_dev_info *bd_inode_backing_dev_info ;
unsigned long bd_private ;
};
struct inode_operations;
struct file_lock;
struct cdev;
union __anonunion____missing_field_name_102 {
struct pipe_inode_info *i_pipe ;
struct block_device *i_bdev ;
struct cdev *i_cdev ;
};
struct dnotify_struct;
struct inode {
struct hlist_node i_hash ;
struct list_head i_list ;
struct list_head i_sb_list ;
struct list_head i_dentry ;
unsigned long i_ino ;
atomic_t i_count ;
unsigned int i_nlink ;
uid_t i_uid ;
gid_t i_gid ;
dev_t i_rdev ;
u64 i_version ;
loff_t i_size ;
struct timespec i_atime ;
struct timespec i_mtime ;
struct timespec i_ctime ;
unsigned int i_blkbits ;
blkcnt_t i_blocks ;
unsigned short i_bytes ;
umode_t i_mode ;
spinlock_t i_lock ;
struct mutex i_mutex ;
struct rw_semaphore i_alloc_sem ;
struct inode_operations const *i_op ;
struct file_operations const *i_fop ;
struct super_block *i_sb ;
struct file_lock *i_flock ;
struct address_space *i_mapping ;
struct address_space i_data ;
struct dquot *i_dquot[2] ;
struct list_head i_devices ;
union __anonunion____missing_field_name_102 __annonCompField12 ;
int i_cindex ;
__u32 i_generation ;
unsigned long i_dnotify_mask ;
struct dnotify_struct *i_dnotify ;
struct list_head inotify_watches ;
struct mutex inotify_mutex ;
unsigned long i_state ;
unsigned long dirtied_when ;
unsigned int i_flags ;
atomic_t i_writecount ;
void *i_security ;
void *i_private ;
};
struct fown_struct {
rwlock_t lock ;
struct pid *pid ;
enum pid_type pid_type ;
uid_t uid ;
uid_t euid ;
int signum ;
};
struct file_ra_state {
unsigned long start ;
unsigned int size ;
unsigned int async_size ;
unsigned int ra_pages ;
int mmap_miss ;
loff_t prev_pos ;
};
union __anonunion_f_u_103 {
struct list_head fu_list ;
struct rcu_head fu_rcuhead ;
};
struct file {
union __anonunion_f_u_103 f_u ;
struct path f_path ;
struct file_operations const *f_op ;
atomic_long_t f_count ;
unsigned int f_flags ;
fmode_t f_mode ;
loff_t f_pos ;
struct fown_struct f_owner ;
unsigned int f_uid ;
unsigned int f_gid ;
struct file_ra_state f_ra ;
u64 f_version ;
void *f_security ;
void *private_data ;
struct list_head f_ep_links ;
spinlock_t f_ep_lock ;
struct address_space *f_mapping ;
unsigned long f_mnt_write_state ;
};
struct files_struct;
typedef struct files_struct *fl_owner_t;
struct file_lock_operations {
void (*fl_copy_lock)(struct file_lock * , struct file_lock * ) ;
void (*fl_release_private)(struct file_lock * ) ;
};
struct lock_manager_operations {
int (*fl_compare_owner)(struct file_lock * , struct file_lock * ) ;
void (*fl_notify)(struct file_lock * ) ;
int (*fl_grant)(struct file_lock * , struct file_lock * , int ) ;
void (*fl_copy_lock)(struct file_lock * , struct file_lock * ) ;
void (*fl_release_private)(struct file_lock * ) ;
void (*fl_break)(struct file_lock * ) ;
int (*fl_mylease)(struct file_lock * , struct file_lock * ) ;
int (*fl_change)(struct file_lock ** , int ) ;
};
struct nlm_lockowner;
struct nfs_lock_info {
u32 state ;
struct nlm_lockowner *owner ;
struct list_head list ;
};
struct nfs4_lock_state;
struct nfs4_lock_info {
struct nfs4_lock_state *owner ;
};
struct fasync_struct;
struct __anonstruct_afs_105 {
struct list_head link ;
int state ;
};
union __anonunion_fl_u_104 {
struct nfs_lock_info nfs_fl ;
struct nfs4_lock_info nfs4_fl ;
struct __anonstruct_afs_105 afs ;
};
struct file_lock {
struct file_lock *fl_next ;
struct list_head fl_link ;
struct list_head fl_block ;
fl_owner_t fl_owner ;
unsigned char fl_flags ;
unsigned char fl_type ;
unsigned int fl_pid ;
struct pid *fl_nspid ;
wait_queue_head_t fl_wait ;
struct file *fl_file ;
loff_t fl_start ;
loff_t fl_end ;
struct fasync_struct *fl_fasync ;
unsigned long fl_break_time ;
struct file_lock_operations *fl_ops ;
struct lock_manager_operations *fl_lmops ;
union __anonunion_fl_u_104 fl_u ;
};
struct fasync_struct {
int magic ;
int fa_fd ;
struct fasync_struct *fa_next ;
struct file *fa_file ;
};
struct file_system_type;
struct super_operations;
struct xattr_handler;
struct mtd_info;
struct super_block {
struct list_head s_list ;
dev_t s_dev ;
unsigned long s_blocksize ;
unsigned char s_blocksize_bits ;
unsigned char s_dirt ;
unsigned long long s_maxbytes ;
struct file_system_type *s_type ;
struct super_operations const *s_op ;
struct dquot_operations *dq_op ;
struct quotactl_ops *s_qcop ;
struct export_operations const *s_export_op ;
unsigned long s_flags ;
unsigned long s_magic ;
struct dentry *s_root ;
struct rw_semaphore s_umount ;
struct mutex s_lock ;
int s_count ;
int s_syncing ;
int s_need_sync_fs ;
atomic_t s_active ;
void *s_security ;
struct xattr_handler **s_xattr ;
struct list_head s_inodes ;
struct list_head s_dirty ;
struct list_head s_io ;
struct list_head s_more_io ;
struct hlist_head s_anon ;
struct list_head s_files ;
struct list_head s_dentry_lru ;
int s_nr_dentry_unused ;
struct block_device *s_bdev ;
struct mtd_info *s_mtd ;
struct list_head s_instances ;
struct quota_info s_dquot ;
int s_frozen ;
wait_queue_head_t s_wait_unfrozen ;
char s_id[32] ;
void *s_fs_info ;
fmode_t s_mode ;
struct mutex s_vfs_rename_mutex ;
u32 s_time_gran ;
char *s_subtype ;
char *s_options ;
};
struct fiemap_extent_info {
unsigned int fi_flags ;
unsigned int fi_extents_mapped ;
unsigned int fi_extents_max ;
struct fiemap_extent *fi_extents_start ;
};
struct file_operations {
struct module *owner ;
loff_t (*llseek)(struct file * , loff_t , int ) ;
ssize_t (*read)(struct file * , char * , size_t , loff_t * ) ;
ssize_t (*write)(struct file * , char const * , size_t , loff_t * ) ;
ssize_t (*aio_read)(struct kiocb * , struct iovec const * , unsigned long ,
loff_t ) ;
ssize_t (*aio_write)(struct kiocb * , struct iovec const * , unsigned long ,
loff_t ) ;
int (*readdir)(struct file * , void * , int (*)(void * , char const * , int ,
loff_t , u64 , unsigned int ) ) ;
unsigned int (*poll)(struct file * , struct poll_table_struct * ) ;
int (*ioctl)(struct inode * , struct file * , unsigned int , unsigned long ) ;
long (*unlocked_ioctl)(struct file * , unsigned int , unsigned long ) ;
long (*compat_ioctl)(struct file * , unsigned int , unsigned long ) ;
int (*mmap)(struct file * , struct vm_area_struct * ) ;
int (*open)(struct inode * , struct file * ) ;
int (*flush)(struct file * , fl_owner_t id ) ;
int (*release)(struct inode * , struct file * ) ;
int (*fsync)(struct file * , struct dentry * , int datasync ) ;
int (*aio_fsync)(struct kiocb * , int datasync ) ;
int (*fasync)(int , struct file * , int ) ;
int (*lock)(struct file * , int , struct file_lock * ) ;
ssize_t (*sendpage)(struct file * , struct page * , int , size_t , loff_t * ,
int ) ;
unsigned long (*get_unmapped_area)(struct file * , unsigned long , unsigned long ,
unsigned long , unsigned long ) ;
int (*check_flags)(int ) ;
int (*dir_notify)(struct file *filp , unsigned long arg ) ;
int (*flock)(struct file * , int , struct file_lock * ) ;
ssize_t (*splice_write)(struct pipe_inode_info * , struct file * , loff_t * , size_t ,
unsigned int ) ;
ssize_t (*splice_read)(struct file * , loff_t * , struct pipe_inode_info * , size_t ,
unsigned int ) ;
int (*setlease)(struct file * , long , struct file_lock ** ) ;
};
struct inode_operations {
int (*create)(struct inode * , struct dentry * , int , struct nameidata * ) ;
struct dentry *(*lookup)(struct inode * , struct dentry * , struct nameidata * ) ;
int (*link)(struct dentry * , struct inode * , struct dentry * ) ;
int (*unlink)(struct inode * , struct dentry * ) ;
int (*symlink)(struct inode * , struct dentry * , char const * ) ;
int (*mkdir)(struct inode * , struct dentry * , int ) ;
int (*rmdir)(struct inode * , struct dentry * ) ;
int (*mknod)(struct inode * , struct dentry * , int , dev_t ) ;
int (*rename)(struct inode * , struct dentry * , struct inode * , struct dentry * ) ;
int (*readlink)(struct dentry * , char * , int ) ;
void *(*follow_link)(struct dentry * , struct nameidata * ) ;
void (*put_link)(struct dentry * , struct nameidata * , void * ) ;
void (*truncate)(struct inode * ) ;
int (*permission)(struct inode * , int ) ;
int (*setattr)(struct dentry * , struct iattr * ) ;
int (*getattr)(struct vfsmount *mnt , struct dentry * , struct kstat * ) ;
int (*setxattr)(struct dentry * , char const * , void const * , size_t , int ) ;
ssize_t (*getxattr)(struct dentry * , char const * , void * , size_t ) ;
ssize_t (*listxattr)(struct dentry * , char * , size_t ) ;
int (*removexattr)(struct dentry * , char const * ) ;
void (*truncate_range)(struct inode * , loff_t , loff_t ) ;
long (*fallocate)(struct inode *inode , int mode , loff_t offset , loff_t len ) ;
int (*fiemap)(struct inode * , struct fiemap_extent_info * , u64 start , u64 len ) ;
};
struct seq_file;
struct super_operations {
struct inode *(*alloc_inode)(struct super_block *sb ) ;
void (*destroy_inode)(struct inode * ) ;
void (*dirty_inode)(struct inode * ) ;
int (*write_inode)(struct inode * , int ) ;
void (*drop_inode)(struct inode * ) ;
void (*delete_inode)(struct inode * ) ;
void (*put_super)(struct super_block * ) ;
void (*write_super)(struct super_block * ) ;
int (*sync_fs)(struct super_block *sb , int wait ) ;
void (*write_super_lockfs)(struct super_block * ) ;
void (*unlockfs)(struct super_block * ) ;
int (*statfs)(struct dentry * , struct kstatfs * ) ;
int (*remount_fs)(struct super_block * , int * , char * ) ;
void (*clear_inode)(struct inode * ) ;
void (*umount_begin)(struct super_block * ) ;
int (*show_options)(struct seq_file * , struct vfsmount * ) ;
int (*show_stats)(struct seq_file * , struct vfsmount * ) ;
ssize_t (*quota_read)(struct super_block * , int , char * , size_t , loff_t ) ;
ssize_t (*quota_write)(struct super_block * , int , char const * , size_t ,
loff_t ) ;
};
struct file_system_type {
char const *name ;
int fs_flags ;
int (*get_sb)(struct file_system_type * , int , char const * , void * , struct vfsmount * ) ;
void (*kill_sb)(struct super_block * ) ;
struct module *owner ;
struct file_system_type *next ;
struct list_head fs_supers ;
struct lock_class_key s_lock_key ;
struct lock_class_key s_umount_key ;
struct lock_class_key i_lock_key ;
struct lock_class_key i_mutex_key ;
struct lock_class_key i_mutex_dir_key ;
struct lock_class_key i_alloc_sem_key ;
};
struct bio;
typedef int read_proc_t(char *page , char **start , off_t off , int count , int *eof ,
void *data );
typedef int write_proc_t(struct file *file , char const *buffer , unsigned long count ,
void *data );
struct proc_dir_entry {
unsigned int low_ino ;
unsigned short namelen ;
char const *name ;
mode_t mode ;
nlink_t nlink ;
uid_t uid ;
gid_t gid ;
loff_t size ;
struct inode_operations const *proc_iops ;
struct file_operations const *proc_fops ;
struct module *owner ;
struct proc_dir_entry *next ;
struct proc_dir_entry *parent ;
struct proc_dir_entry *subdir ;
void *data ;
read_proc_t *read_proc ;
write_proc_t *write_proc ;
atomic_t count ;
int pde_users ;
spinlock_t pde_unload_lock ;
struct completion *pde_unload_completion ;
struct list_head pde_openers ;
};
typedef unsigned long kernel_ulong_t;
struct pci_device_id {
__u32 vendor ;
__u32 device ;
__u32 subvendor ;
__u32 subdevice ;
__u32 class ;
__u32 class_mask ;
kernel_ulong_t driver_data ;
};
struct resource {
resource_size_t start ;
resource_size_t end ;
char const *name ;
unsigned long flags ;
struct resource *parent ;
struct resource *sibling ;
struct resource *child ;
};
struct pci_dev;
struct klist_node;
struct klist {
spinlock_t k_lock ;
struct list_head k_list ;
void (*get)(struct klist_node * ) ;
void (*put)(struct klist_node * ) ;
};
struct klist_node {
void *n_klist ;
struct list_head n_node ;
struct kref n_ref ;
struct completion n_removed ;
};
struct dma_mapping_ops;
struct dev_archdata {
void *acpi_handle ;
struct dma_mapping_ops *dma_ops ;
void *iommu ;
};
struct driver_private;
struct class;
struct class_private;
struct bus_type;
struct bus_type_private;
struct bus_attribute {
struct attribute attr ;
ssize_t (*show)(struct bus_type *bus , char *buf ) ;
ssize_t (*store)(struct bus_type *bus , char const *buf , size_t count ) ;
};
struct device_attribute;
struct driver_attribute;
struct bus_type {
char const *name ;
struct bus_attribute *bus_attrs ;
struct device_attribute *dev_attrs ;
struct driver_attribute *drv_attrs ;
int (*match)(struct device *dev , struct device_driver *drv ) ;
int (*uevent)(struct device *dev , struct kobj_uevent_env *env ) ;
int (*probe)(struct device *dev ) ;
int (*remove)(struct device *dev ) ;
void (*shutdown)(struct device *dev ) ;
int (*suspend)(struct device *dev , pm_message_t state ) ;
int (*suspend_late)(struct device *dev , pm_message_t state ) ;
int (*resume_early)(struct device *dev ) ;
int (*resume)(struct device *dev ) ;
struct pm_ext_ops *pm ;
struct bus_type_private *p ;
};
struct device_driver {
char const *name ;
struct bus_type *bus ;
struct module *owner ;
char const *mod_name ;
int (*probe)(struct device *dev ) ;
int (*remove)(struct device *dev ) ;
void (*shutdown)(struct device *dev ) ;
int (*suspend)(struct device *dev , pm_message_t state ) ;
int (*resume)(struct device *dev ) ;
struct attribute_group **groups ;
struct pm_ops *pm ;
struct driver_private *p ;
};
struct driver_attribute {
struct attribute attr ;
ssize_t (*show)(struct device_driver *driver , char *buf ) ;
ssize_t (*store)(struct device_driver *driver , char const *buf , size_t count ) ;
};
struct class_attribute;
struct class {
char const *name ;
struct module *owner ;
struct class_attribute *class_attrs ;
struct device_attribute *dev_attrs ;
struct kobject *dev_kobj ;
int (*dev_uevent)(struct device *dev , struct kobj_uevent_env *env ) ;
void (*class_release)(struct class *class ) ;
void (*dev_release)(struct device *dev ) ;
int (*suspend)(struct device *dev , pm_message_t state ) ;
int (*resume)(struct device *dev ) ;
struct pm_ops *pm ;
struct class_private *p ;
};
struct device_type;
struct class_attribute {
struct attribute attr ;
ssize_t (*show)(struct class *class , char *buf ) ;
ssize_t (*store)(struct class *class , char const *buf , size_t count ) ;
};
struct device_type {
char const *name ;
struct attribute_group **groups ;
int (*uevent)(struct device *dev , struct kobj_uevent_env *env ) ;
void (*release)(struct device *dev ) ;
int (*suspend)(struct device *dev , pm_message_t state ) ;
int (*resume)(struct device *dev ) ;
struct pm_ops *pm ;
};
struct device_attribute {
struct attribute attr ;
ssize_t (*show)(struct device *dev , struct device_attribute *attr , char *buf ) ;
ssize_t (*store)(struct device *dev , struct device_attribute *attr , char const *buf ,
size_t count ) ;
};
struct device_dma_parameters {
unsigned int max_segment_size ;
unsigned long segment_boundary_mask ;
};
struct dma_coherent_mem;
struct device {
struct klist klist_children ;
struct klist_node knode_parent ;
struct klist_node knode_driver ;
struct klist_node knode_bus ;
struct device *parent ;
struct kobject kobj ;
char bus_id[20] ;
char const *init_name ;
struct device_type *type ;
unsigned int uevent_suppress : 1 ;
struct semaphore sem ;
struct bus_type *bus ;
struct device_driver *driver ;
void *driver_data ;
void *platform_data ;
struct dev_pm_info power ;
int numa_node ;
u64 *dma_mask ;
u64 coherent_dma_mask ;
struct device_dma_parameters *dma_parms ;
struct list_head dma_pools ;
struct dma_coherent_mem *dma_mem ;
struct dev_archdata archdata ;
spinlock_t devres_lock ;
struct list_head devres_head ;
struct klist_node knode_class ;
struct class *class ;
dev_t devt ;
struct attribute_group **groups ;
void (*release)(struct device *dev ) ;
};
struct hotplug_slot;
struct pci_slot {
struct pci_bus *bus ;
struct list_head list ;
struct hotplug_slot *hotplug ;
unsigned char number ;
struct kobject kobj ;
};
typedef int pci_power_t;
typedef unsigned int pci_channel_state_t;
enum pci_channel_state {
pci_channel_io_normal = (pci_channel_state_t )1,
pci_channel_io_frozen = (pci_channel_state_t )2,
pci_channel_io_perm_failure = (pci_channel_state_t )3
} ;
typedef unsigned short pci_dev_flags_t;
typedef unsigned short pci_bus_flags_t;
struct pcie_link_state;
struct pci_vpd;
struct pci_driver;
struct pci_dev {
struct list_head bus_list ;
struct pci_bus *bus ;
struct pci_bus *subordinate ;
void *sysdata ;
struct proc_dir_entry *procent ;
struct pci_slot *slot ;
unsigned int devfn ;
unsigned short vendor ;
unsigned short device ;
unsigned short subsystem_vendor ;
unsigned short subsystem_device ;
unsigned int class ;
u8 revision ;
u8 hdr_type ;
u8 pcie_type ;
u8 rom_base_reg ;
u8 pin ;
struct pci_driver *driver ;
u64 dma_mask ;
struct device_dma_parameters dma_parms ;
pci_power_t current_state ;
int pm_cap ;
unsigned int pme_support : 5 ;
unsigned int d1_support : 1 ;
unsigned int d2_support : 1 ;
unsigned int no_d1d2 : 1 ;
struct pcie_link_state *link_state ;
pci_channel_state_t error_state ;
struct device dev ;
int cfg_size ;
unsigned int irq ;
struct resource resource[12] ;
unsigned int transparent : 1 ;
unsigned int multifunction : 1 ;
unsigned int is_added : 1 ;
unsigned int is_busmaster : 1 ;
unsigned int no_msi : 1 ;
unsigned int block_ucfg_access : 1 ;
unsigned int broken_parity_status : 1 ;
unsigned int msi_enabled : 1 ;
unsigned int msix_enabled : 1 ;
unsigned int ari_enabled : 1 ;
unsigned int is_managed : 1 ;
unsigned int is_pcie : 1 ;
pci_dev_flags_t dev_flags ;
atomic_t enable_cnt ;
u32 saved_config_space[16] ;
struct hlist_head saved_cap_space ;
struct bin_attribute *rom_attr ;
int rom_attr_enabled ;
struct bin_attribute *res_attr[12] ;
struct bin_attribute *res_attr_wc[12] ;
struct list_head msi_list ;
struct pci_vpd *vpd ;
};
struct pci_ops;
struct pci_bus {
struct list_head node ;
struct pci_bus *parent ;
struct list_head children ;
struct list_head devices ;
struct pci_dev *self ;
struct list_head slots ;
struct resource *resource[16] ;
struct pci_ops *ops ;
void *sysdata ;
struct proc_dir_entry *procdir ;
unsigned char number ;
unsigned char primary ;
unsigned char secondary ;
unsigned char subordinate ;
char name[48] ;
unsigned short bridge_ctl ;
pci_bus_flags_t bus_flags ;
struct device *bridge ;
struct device dev ;
struct bin_attribute *legacy_io ;
struct bin_attribute *legacy_mem ;
unsigned int is_added : 1 ;
};
struct pci_ops {
int (*read)(struct pci_bus *bus , unsigned int devfn , int where , int size , u32 *val ) ;
int (*write)(struct pci_bus *bus , unsigned int devfn , int where , int size ,
u32 val ) ;
};
struct pci_dynids {
spinlock_t lock ;
struct list_head list ;
};
typedef unsigned int pci_ers_result_t;
struct pci_error_handlers {
pci_ers_result_t (*error_detected)(struct pci_dev *dev , enum pci_channel_state error ) ;
pci_ers_result_t (*mmio_enabled)(struct pci_dev *dev ) ;
pci_ers_result_t (*link_reset)(struct pci_dev *dev ) ;
pci_ers_result_t (*slot_reset)(struct pci_dev *dev ) ;
void (*resume)(struct pci_dev *dev ) ;
};
struct pci_driver {
struct list_head node ;
char *name ;
struct pci_device_id const *id_table ;
int (*probe)(struct pci_dev *dev , struct pci_device_id const *id ) ;
void (*remove)(struct pci_dev *dev ) ;
int (*suspend)(struct pci_dev *dev , pm_message_t state ) ;
int (*suspend_late)(struct pci_dev *dev , pm_message_t state ) ;
int (*resume_early)(struct pci_dev *dev ) ;
int (*resume)(struct pci_dev *dev ) ;
void (*shutdown)(struct pci_dev *dev ) ;
struct pm_ext_ops *pm ;
struct pci_error_handlers *err_handler ;
struct device_driver driver ;
struct pci_dynids dynids ;
};
struct scatterlist {
unsigned long sg_magic ;
unsigned long page_link ;
unsigned int offset ;
unsigned int length ;
dma_addr_t dma_address ;
unsigned int dma_length ;
};
struct rb_node {
unsigned long rb_parent_color ;
struct rb_node *rb_right ;
struct rb_node *rb_left ;
} __attribute__((__aligned__(sizeof(long )))) ;
struct rb_root {
struct rb_node *rb_node ;
};
typedef atomic_long_t mm_counter_t;
struct __anonstruct____missing_field_name_111 {
u16 inuse ;
u16 objects ;
};
union __anonunion____missing_field_name_110 {
atomic_t _mapcount ;
struct __anonstruct____missing_field_name_111 __annonCompField13 ;
};
struct __anonstruct____missing_field_name_113 {
unsigned long private ;
struct address_space *mapping ;
};
union __anonunion____missing_field_name_112 {
struct __anonstruct____missing_field_name_113 __annonCompField15 ;
spinlock_t ptl ;
struct kmem_cache *slab ;
struct page *first_page ;
};
union __anonunion____missing_field_name_114 {
unsigned long index ;
void *freelist ;
};
struct page {
unsigned long flags ;
atomic_t _count ;
union __anonunion____missing_field_name_110 __annonCompField14 ;
union __anonunion____missing_field_name_112 __annonCompField16 ;
union __anonunion____missing_field_name_114 __annonCompField17 ;
struct list_head lru ;
};
struct __anonstruct_vm_set_116 {
struct list_head list ;
void *parent ;
struct vm_area_struct *head ;
};
union __anonunion_shared_115 {
struct __anonstruct_vm_set_116 vm_set ;
struct raw_prio_tree_node prio_tree_node ;
};
struct anon_vma;
struct vm_operations_struct;
struct mempolicy;
struct vm_area_struct {
struct mm_struct *vm_mm ;
unsigned long vm_start ;
unsigned long vm_end ;
struct vm_area_struct *vm_next ;
pgprot_t vm_page_prot ;
unsigned long vm_flags ;
struct rb_node vm_rb ;
union __anonunion_shared_115 shared ;
struct list_head anon_vma_node ;
struct anon_vma *anon_vma ;
struct vm_operations_struct *vm_ops ;
unsigned long vm_pgoff ;
struct file *vm_file ;
void *vm_private_data ;
unsigned long vm_truncate_count ;
struct mempolicy *vm_policy ;
};
struct core_thread {
struct task_struct *task ;
struct core_thread *next ;
};
struct core_state {
atomic_t nr_threads ;
struct core_thread dumper ;
struct completion startup ;
};
struct kioctx;
struct mmu_notifier_mm;
struct mm_struct {
struct vm_area_struct *mmap ;
struct rb_root mm_rb ;
struct vm_area_struct *mmap_cache ;
unsigned long (*get_unmapped_area)(struct file *filp , unsigned long addr , unsigned long len ,
unsigned long pgoff , unsigned long flags ) ;
void (*unmap_area)(struct mm_struct *mm , unsigned long addr ) ;
unsigned long mmap_base ;
unsigned long task_size ;
unsigned long cached_hole_size ;
unsigned long free_area_cache ;
pgd_t *pgd ;
atomic_t mm_users ;
atomic_t mm_count ;
int map_count ;
struct rw_semaphore mmap_sem ;
spinlock_t page_table_lock ;
struct list_head mmlist ;
mm_counter_t _file_rss ;
mm_counter_t _anon_rss ;
unsigned long hiwater_rss ;
unsigned long hiwater_vm ;
unsigned long total_vm ;
unsigned long locked_vm ;
unsigned long shared_vm ;
unsigned long exec_vm ;
unsigned long stack_vm ;
unsigned long reserved_vm ;
unsigned long def_flags ;
unsigned long nr_ptes ;
unsigned long start_code ;
unsigned long end_code ;
unsigned long start_data ;
unsigned long end_data ;
unsigned long start_brk ;
unsigned long brk ;
unsigned long start_stack ;
unsigned long arg_start ;
unsigned long arg_end ;
unsigned long env_start ;
unsigned long env_end ;
unsigned long saved_auxv[2 * ((2 + 18) + 1)] ;
cpumask_t cpu_vm_mask ;
mm_context_t context ;
unsigned int faultstamp ;
unsigned int token_priority ;
unsigned int last_interval ;
unsigned long flags ;
struct core_state *core_state ;
rwlock_t ioctx_list_lock ;
struct kioctx *ioctx_list ;
struct task_struct *owner ;
struct file *exe_file ;
unsigned long num_exe_file_vmas ;
struct mmu_notifier_mm *mmu_notifier_mm ;
};
struct user_struct;
struct vm_fault {
unsigned int flags ;
unsigned long pgoff ;
void *virtual_address ;
struct page *page ;
};
struct vm_operations_struct {
void (*open)(struct vm_area_struct *area ) ;
void (*close)(struct vm_area_struct *area ) ;
int (*fault)(struct vm_area_struct *vma , struct vm_fault *vmf ) ;
int (*page_mkwrite)(struct vm_area_struct *vma , struct page *page ) ;
int (*access)(struct vm_area_struct *vma , unsigned long addr , void *buf , int len ,
int write ) ;
int (*set_policy)(struct vm_area_struct *vma , struct mempolicy *new ) ;
struct mempolicy *(*get_policy)(struct vm_area_struct *vma , unsigned long addr ) ;
int (*migrate)(struct vm_area_struct *vma , nodemask_t const *from , nodemask_t const *to ,
unsigned long flags ) ;
};
struct dma_mapping_ops {
int (*mapping_error)(struct device *dev , dma_addr_t dma_addr ) ;
void *(*alloc_coherent)(struct device *dev , size_t size , dma_addr_t *dma_handle ,
gfp_t gfp ) ;
void (*free_coherent)(struct device *dev , size_t size , void *vaddr , dma_addr_t dma_handle ) ;
dma_addr_t (*map_single)(struct device *hwdev , phys_addr_t ptr , size_t size ,
int direction ) ;
void (*unmap_single)(struct device *dev , dma_addr_t addr , size_t size , int direction ) ;
void (*sync_single_for_cpu)(struct device *hwdev , dma_addr_t dma_handle , size_t size ,
int direction ) ;
void (*sync_single_for_device)(struct device *hwdev , dma_addr_t dma_handle , size_t size ,
int direction ) ;
void (*sync_single_range_for_cpu)(struct device *hwdev , dma_addr_t dma_handle ,
unsigned long offset , size_t size , int direction ) ;
void (*sync_single_range_for_device)(struct device *hwdev , dma_addr_t dma_handle ,
unsigned long offset , size_t size , int direction ) ;
void (*sync_sg_for_cpu)(struct device *hwdev , struct scatterlist *sg , int nelems ,
int direction ) ;
void (*sync_sg_for_device)(struct device *hwdev , struct scatterlist *sg , int nelems ,
int direction ) ;
int (*map_sg)(struct device *hwdev , struct scatterlist *sg , int nents , int direction ) ;
void (*unmap_sg)(struct device *hwdev , struct scatterlist *sg , int nents , int direction ) ;
int (*dma_supported)(struct device *hwdev , u64 mask ) ;
int is_phys ;
};
typedef unsigned long cputime_t;
struct sem_undo_list;
struct sem_undo_list {
atomic_t refcnt ;
spinlock_t lock ;
struct list_head list_proc ;
};
struct sysv_sem {
struct sem_undo_list *undo_list ;
};
struct siginfo;
struct __anonstruct_sigset_t_118 {
unsigned long sig[64 / 64] ;
};
typedef struct __anonstruct_sigset_t_118 sigset_t;
typedef void __signalfn_t(int );
typedef __signalfn_t *__sighandler_t;
typedef void __restorefn_t(void);
typedef __restorefn_t *__sigrestore_t;
struct sigaction {
__sighandler_t sa_handler ;
unsigned long sa_flags ;
__sigrestore_t sa_restorer ;
sigset_t sa_mask ;
};
struct k_sigaction {
struct sigaction sa ;
};
union sigval {
int sival_int ;
void *sival_ptr ;
};
typedef union sigval sigval_t;
struct __anonstruct__kill_120 {
pid_t _pid ;
uid_t _uid ;
};
struct __anonstruct__timer_121 {
timer_t _tid ;
int _overrun ;
char _pad[sizeof(uid_t ) - sizeof(int )] ;
sigval_t _sigval ;
int _sys_private ;
};
struct __anonstruct__rt_122 {
pid_t _pid ;
uid_t _uid ;
sigval_t _sigval ;
};
struct __anonstruct__sigchld_123 {
pid_t _pid ;
uid_t _uid ;
int _status ;
clock_t _utime ;
clock_t _stime ;
};
struct __anonstruct__sigfault_124 {
void *_addr ;
};
struct __anonstruct__sigpoll_125 {
long _band ;
int _fd ;
};
union __anonunion__sifields_119 {
int _pad[(128UL - 4UL * sizeof(int )) / sizeof(int )] ;
struct __anonstruct__kill_120 _kill ;
struct __anonstruct__timer_121 _timer ;
struct __anonstruct__rt_122 _rt ;
struct __anonstruct__sigchld_123 _sigchld ;
struct __anonstruct__sigfault_124 _sigfault ;
struct __anonstruct__sigpoll_125 _sigpoll ;
};
struct siginfo {
int si_signo ;
int si_errno ;
int si_code ;
union __anonunion__sifields_119 _sifields ;
};
typedef struct siginfo siginfo_t;
struct sigpending {
struct list_head list ;
sigset_t signal ;
};
struct fs_struct {
atomic_t count ;
rwlock_t lock ;
int umask ;
struct path root ;
struct path pwd ;
};
struct prop_local_single {
unsigned long events ;
unsigned long period ;
int shift ;
spinlock_t lock ;
};
struct __anonstruct_seccomp_t_128 {
int mode ;
};
typedef struct __anonstruct_seccomp_t_128 seccomp_t;
struct plist_head {
struct list_head prio_list ;
struct list_head node_list ;
spinlock_t *lock ;
};
struct rt_mutex_waiter;
struct rlimit {
unsigned long rlim_cur ;
unsigned long rlim_max ;
};
struct hrtimer_clock_base;
struct hrtimer_cpu_base;
enum hrtimer_restart {
HRTIMER_NORESTART = 0,
HRTIMER_RESTART = 1
} ;
enum hrtimer_cb_mode {
HRTIMER_CB_SOFTIRQ = 0,
HRTIMER_CB_IRQSAFE_PERCPU = 1,
HRTIMER_CB_IRQSAFE_UNLOCKED = 2
} ;
struct hrtimer {
struct rb_node node ;
ktime_t _expires ;
ktime_t _softexpires ;
enum hrtimer_restart (*function)(struct hrtimer * ) ;
struct hrtimer_clock_base *base ;
unsigned long state ;
struct list_head cb_entry ;
enum hrtimer_cb_mode cb_mode ;
int start_pid ;
void *start_site ;
char start_comm[16] ;
};
struct hrtimer_clock_base {
struct hrtimer_cpu_base *cpu_base ;
clockid_t index ;
struct rb_root active ;
struct rb_node *first ;
ktime_t resolution ;
ktime_t (*get_time)(void) ;
ktime_t softirq_time ;
ktime_t offset ;
};
struct hrtimer_cpu_base {
spinlock_t lock ;
struct hrtimer_clock_base clock_base[2] ;
struct list_head cb_pending ;
ktime_t expires_next ;
int hres_active ;
unsigned long nr_events ;
};
struct task_io_accounting {
u64 rchar ;
u64 wchar ;
u64 syscr ;
u64 syscw ;
u64 read_bytes ;
u64 write_bytes ;
u64 cancelled_write_bytes ;
};
struct latency_record {
unsigned long backtrace[12] ;
unsigned int count ;
unsigned long time ;
unsigned long max ;
};
struct futex_pi_state;
struct robust_list_head;
struct cfs_rq;
struct task_group;
struct nsproxy;
struct io_event {
__u64 data ;
__u64 obj ;
__s64 res ;
__s64 res2 ;
};
struct iovec {
void *iov_base ;
__kernel_size_t iov_len ;
};
union __anonunion_ki_obj_130 {
void *user ;
struct task_struct *tsk ;
};
struct kiocb {
struct list_head ki_run_list ;
unsigned long ki_flags ;
int ki_users ;
unsigned int ki_key ;
struct file *ki_filp ;
struct kioctx *ki_ctx ;
int (*ki_cancel)(struct kiocb * , struct io_event * ) ;
ssize_t (*ki_retry)(struct kiocb * ) ;
void (*ki_dtor)(struct kiocb * ) ;
union __anonunion_ki_obj_130 ki_obj ;
__u64 ki_user_data ;
wait_queue_t ki_wait ;
loff_t ki_pos ;
void *private ;
unsigned short ki_opcode ;
size_t ki_nbytes ;
char *ki_buf ;
size_t ki_left ;
struct iovec ki_inline_vec ;
struct iovec *ki_iovec ;
unsigned long ki_nr_segs ;
unsigned long ki_cur_seg ;
struct list_head ki_list ;
struct file *ki_eventfd ;
};
struct aio_ring_info {
unsigned long mmap_base ;
unsigned long mmap_size ;
struct page **ring_pages ;
spinlock_t ring_lock ;
long nr_pages ;
unsigned int nr ;
unsigned int tail ;
struct page *internal_pages[8] ;
};
struct kioctx {
atomic_t users ;
int dead ;
struct mm_struct *mm ;
unsigned long user_id ;
struct kioctx *next ;
wait_queue_head_t wait ;
spinlock_t ctx_lock ;
int reqs_active ;
struct list_head active_reqs ;
struct list_head run_list ;
unsigned int max_reqs ;
struct aio_ring_info ring_info ;
struct delayed_work wq ;
};
struct sighand_struct {
atomic_t count ;
struct k_sigaction action[64] ;
spinlock_t siglock ;
wait_queue_head_t signalfd_wqh ;
};
struct pacct_struct {
int ac_flag ;
long ac_exitcode ;
unsigned long ac_mem ;
cputime_t ac_utime ;
cputime_t ac_stime ;
unsigned long ac_minflt ;
unsigned long ac_majflt ;
};
struct task_cputime {
cputime_t utime ;
cputime_t stime ;
unsigned long long sum_exec_runtime ;
};
struct thread_group_cputime {
struct task_cputime *totals ;
};
union __anonunion____missing_field_name_131 {
pid_t pgrp __attribute__((__deprecated__)) ;
pid_t __pgrp ;
};
union __anonunion____missing_field_name_132 {
pid_t session __attribute__((__deprecated__)) ;
pid_t __session ;
};
struct tty_struct;
struct taskstats;
struct tty_audit_buf;
struct signal_struct {
atomic_t count ;
atomic_t live ;
wait_queue_head_t wait_chldexit ;
struct task_struct *curr_target ;
struct sigpending shared_pending ;
int group_exit_code ;
int notify_count ;
struct task_struct *group_exit_task ;
int group_stop_count ;
unsigned int flags ;
struct list_head posix_timers ;
struct hrtimer real_timer ;
struct pid *leader_pid ;
ktime_t it_real_incr ;
cputime_t it_prof_expires ;
cputime_t it_virt_expires ;
cputime_t it_prof_incr ;
cputime_t it_virt_incr ;
struct thread_group_cputime cputime ;
struct task_cputime cputime_expires ;
struct list_head cpu_timers[3] ;
union __anonunion____missing_field_name_131 __annonCompField18 ;
struct pid *tty_old_pgrp ;
union __anonunion____missing_field_name_132 __annonCompField19 ;
int leader ;
struct tty_struct *tty ;
cputime_t cutime ;
cputime_t cstime ;
cputime_t gtime ;
cputime_t cgtime ;
unsigned long nvcsw ;
unsigned long nivcsw ;
unsigned long cnvcsw ;
unsigned long cnivcsw ;
unsigned long min_flt ;
unsigned long maj_flt ;
unsigned long cmin_flt ;
unsigned long cmaj_flt ;
unsigned long inblock ;
unsigned long oublock ;
unsigned long cinblock ;
unsigned long coublock ;
struct task_io_accounting ioac ;
struct rlimit rlim[16] ;
struct key *session_keyring ;
struct key *process_keyring ;
struct pacct_struct pacct ;
struct taskstats *stats ;
unsigned int audit_tty ;
struct tty_audit_buf *tty_audit_buf ;
};
struct user_struct {
atomic_t __count ;
atomic_t processes ;
atomic_t files ;
atomic_t sigpending ;
atomic_t inotify_watches ;
atomic_t inotify_devs ;
atomic_t epoll_devs ;
atomic_t epoll_watches ;
unsigned long mq_bytes ;
unsigned long locked_shm ;
struct key *uid_keyring ;
struct key *session_keyring ;
struct hlist_node uidhash_node ;
uid_t uid ;
struct task_group *tg ;
struct kobject kobj ;
struct work_struct work ;
};
struct reclaim_state;
struct sched_info {
unsigned long pcount ;
unsigned long long cpu_time ;
unsigned long long run_delay ;
unsigned long long last_arrival ;
unsigned long long last_queued ;
unsigned int bkl_count ;
};
struct task_delay_info {
spinlock_t lock ;
unsigned int flags ;
struct timespec blkio_start ;
struct timespec blkio_end ;
u64 blkio_delay ;
u64 swapin_delay ;
u32 blkio_count ;
u32 swapin_count ;
struct timespec freepages_start ;
struct timespec freepages_end ;
u64 freepages_delay ;
u32 freepages_count ;
};
enum cpu_idle_type {
CPU_IDLE = 0,
CPU_NOT_IDLE = 1,
CPU_NEWLY_IDLE = 2,
CPU_MAX_IDLE_TYPES = 3
} ;
struct sched_group {
struct sched_group *next ;
cpumask_t cpumask ;
unsigned int __cpu_power ;
u32 reciprocal_cpu_power ;
};
enum sched_domain_level {
SD_LV_NONE = 0,
SD_LV_SIBLING = 1,
SD_LV_MC = 2,
SD_LV_CPU = 3,
SD_LV_NODE = 4,
SD_LV_ALLNODES = 5,
SD_LV_MAX = 6
} ;
struct sched_domain {
struct sched_domain *parent ;
struct sched_domain *child ;
struct sched_group *groups ;
cpumask_t span ;
unsigned long min_interval ;
unsigned long max_interval ;
unsigned int busy_factor ;
unsigned int imbalance_pct ;
unsigned int cache_nice_tries ;
unsigned int busy_idx ;
unsigned int idle_idx ;
unsigned int newidle_idx ;
unsigned int wake_idx ;
unsigned int forkexec_idx ;
int flags ;
enum sched_domain_level level ;
unsigned long last_balance ;
unsigned int balance_interval ;
unsigned int nr_balance_failed ;
u64 last_update ;
unsigned int lb_count[CPU_MAX_IDLE_TYPES] ;
unsigned int lb_failed[CPU_MAX_IDLE_TYPES] ;
unsigned int lb_balanced[CPU_MAX_IDLE_TYPES] ;
unsigned int lb_imbalance[CPU_MAX_IDLE_TYPES] ;
unsigned int lb_gained[CPU_MAX_IDLE_TYPES] ;
unsigned int lb_hot_gained[CPU_MAX_IDLE_TYPES] ;
unsigned int lb_nobusyg[CPU_MAX_IDLE_TYPES] ;
unsigned int lb_nobusyq[CPU_MAX_IDLE_TYPES] ;
unsigned int alb_count ;
unsigned int alb_failed ;
unsigned int alb_pushed ;
unsigned int sbe_count ;
unsigned int sbe_balanced ;
unsigned int sbe_pushed ;
unsigned int sbf_count ;
unsigned int sbf_balanced ;
unsigned int sbf_pushed ;
unsigned int ttwu_wake_remote ;
unsigned int ttwu_move_affine ;
unsigned int ttwu_move_balance ;
char *name ;
};
struct io_context;
struct group_info {
int ngroups ;
atomic_t usage ;
gid_t small_block[32] ;
int nblocks ;
gid_t *blocks[0] ;
};
struct audit_context;
struct rq;
struct sched_class {
struct sched_class const *next ;
void (*enqueue_task)(struct rq *rq , struct task_struct *p , int wakeup ) ;
void (*dequeue_task)(struct rq *rq , struct task_struct *p , int sleep ) ;
void (*yield_task)(struct rq *rq ) ;
void (*check_preempt_curr)(struct rq *rq , struct task_struct *p , int sync ) ;
struct task_struct *(*pick_next_task)(struct rq *rq ) ;
void (*put_prev_task)(struct rq *rq , struct task_struct *p ) ;
int (*select_task_rq)(struct task_struct *p , int sync ) ;
unsigned long (*load_balance)(struct rq *this_rq , int this_cpu , struct rq *busiest ,
unsigned long max_load_move , struct sched_domain *sd ,
enum cpu_idle_type idle , int *all_pinned , int *this_best_prio ) ;
int (*move_one_task)(struct rq *this_rq , int this_cpu , struct rq *busiest , struct sched_domain *sd ,
enum cpu_idle_type idle ) ;
void (*pre_schedule)(struct rq *this_rq , struct task_struct *task ) ;
void (*post_schedule)(struct rq *this_rq ) ;
void (*task_wake_up)(struct rq *this_rq , struct task_struct *task ) ;
void (*set_cpus_allowed)(struct task_struct *p , cpumask_t const *newmask ) ;
void (*rq_online)(struct rq *rq ) ;
void (*rq_offline)(struct rq *rq ) ;
void (*set_curr_task)(struct rq *rq ) ;
void (*task_tick)(struct rq *rq , struct task_struct *p , int queued ) ;
void (*task_new)(struct rq *rq , struct task_struct *p ) ;
void (*switched_from)(struct rq *this_rq , struct task_struct *task , int running ) ;
void (*switched_to)(struct rq *this_rq , struct task_struct *task , int running ) ;
void (*prio_changed)(struct rq *this_rq , struct task_struct *task , int oldprio ,
int running ) ;
void (*moved_group)(struct task_struct *p ) ;
};
struct load_weight {
unsigned long weight ;
unsigned long inv_weight ;
};
struct sched_entity {
struct load_weight load ;
struct rb_node run_node ;
struct list_head group_node ;
unsigned int on_rq ;
u64 exec_start ;
u64 sum_exec_runtime ;
u64 vruntime ;
u64 prev_sum_exec_runtime ;
u64 last_wakeup ;
u64 avg_overlap ;
u64 wait_start ;
u64 wait_max ;
u64 wait_count ;
u64 wait_sum ;
u64 sleep_start ;
u64 sleep_max ;
s64 sum_sleep_runtime ;
u64 block_start ;
u64 block_max ;
u64 exec_max ;
u64 slice_max ;
u64 nr_migrations ;
u64 nr_migrations_cold ;
u64 nr_failed_migrations_affine ;
u64 nr_failed_migrations_running ;
u64 nr_failed_migrations_hot ;
u64 nr_forced_migrations ;
u64 nr_forced2_migrations ;
u64 nr_wakeups ;
u64 nr_wakeups_sync ;
u64 nr_wakeups_migrate ;
u64 nr_wakeups_local ;
u64 nr_wakeups_remote ;
u64 nr_wakeups_affine ;
u64 nr_wakeups_affine_attempts ;
u64 nr_wakeups_passive ;
u64 nr_wakeups_idle ;
struct sched_entity *parent ;
struct cfs_rq *cfs_rq ;
struct cfs_rq *my_q ;
};
struct rt_rq;
struct sched_rt_entity {
struct list_head run_list ;
unsigned long timeout ;
unsigned int time_slice ;
int nr_cpus_allowed ;
struct sched_rt_entity *back ;
struct sched_rt_entity *parent ;
struct rt_rq *rt_rq ;
struct rt_rq *my_q ;
};
struct linux_binfmt;
struct css_set;
struct compat_robust_list_head;
struct task_struct {
long volatile state ;
void *stack ;
atomic_t usage ;
unsigned int flags ;
unsigned int ptrace ;
int lock_depth ;
int prio ;
int static_prio ;
int normal_prio ;
unsigned int rt_priority ;
struct sched_class const *sched_class ;
struct sched_entity se ;
struct sched_rt_entity rt ;
struct hlist_head preempt_notifiers ;
unsigned char fpu_counter ;
s8 oomkilladj ;
unsigned int btrace_seq ;
unsigned int policy ;
cpumask_t cpus_allowed ;
struct sched_info sched_info ;
struct list_head tasks ;
struct mm_struct *mm ;
struct mm_struct *active_mm ;
struct linux_binfmt *binfmt ;
int exit_state ;
int exit_code ;
int exit_signal ;
int pdeath_signal ;
unsigned int personality ;
unsigned int did_exec : 1 ;
pid_t pid ;
pid_t tgid ;
struct task_struct *real_parent ;
struct task_struct *parent ;
struct list_head children ;
struct list_head sibling ;
struct task_struct *group_leader ;
struct list_head ptraced ;
struct list_head ptrace_entry ;
struct pid_link pids[PIDTYPE_MAX] ;
struct list_head thread_group ;
struct completion *vfork_done ;
int *set_child_tid ;
int *clear_child_tid ;
cputime_t utime ;
cputime_t stime ;
cputime_t utimescaled ;
cputime_t stimescaled ;
cputime_t gtime ;
cputime_t prev_utime ;
cputime_t prev_stime ;
unsigned long nvcsw ;
unsigned long nivcsw ;
struct timespec start_time ;
struct timespec real_start_time ;
unsigned long min_flt ;
unsigned long maj_flt ;
struct task_cputime cputime_expires ;
struct list_head cpu_timers[3] ;
uid_t uid ;
uid_t euid ;
uid_t suid ;
uid_t fsuid ;
gid_t gid ;
gid_t egid ;
gid_t sgid ;
gid_t fsgid ;
struct group_info *group_info ;
kernel_cap_t cap_effective ;
kernel_cap_t cap_inheritable ;
kernel_cap_t cap_permitted ;
kernel_cap_t cap_bset ;
struct user_struct *user ;
unsigned int securebits ;
unsigned char jit_keyring ;
struct key *request_key_auth ;
struct key *thread_keyring ;
char comm[16] ;
int link_count ;
int total_link_count ;
struct sysv_sem sysvsem ;
unsigned long last_switch_timestamp ;
unsigned long last_switch_count ;
struct thread_struct thread ;
struct fs_struct *fs ;
struct files_struct *files ;
struct nsproxy *nsproxy ;
struct signal_struct *signal ;
struct sighand_struct *sighand ;
sigset_t blocked ;
sigset_t real_blocked ;
sigset_t saved_sigmask ;
struct sigpending pending ;
unsigned long sas_ss_sp ;
size_t sas_ss_size ;
int (*notifier)(void *priv ) ;
void *notifier_data ;
sigset_t *notifier_mask ;
void *security ;
struct audit_context *audit_context ;
uid_t loginuid ;
unsigned int sessionid ;
seccomp_t seccomp ;
u32 parent_exec_id ;
u32 self_exec_id ;
spinlock_t alloc_lock ;
spinlock_t pi_lock ;
struct plist_head pi_waiters ;
struct rt_mutex_waiter *pi_blocked_on ;
struct mutex_waiter *blocked_on ;
unsigned int irq_events ;
int hardirqs_enabled ;
unsigned long hardirq_enable_ip ;
unsigned int hardirq_enable_event ;
unsigned long hardirq_disable_ip ;
unsigned int hardirq_disable_event ;
int softirqs_enabled ;
unsigned long softirq_disable_ip ;
unsigned int softirq_disable_event ;
unsigned long softirq_enable_ip ;
unsigned int softirq_enable_event ;
int hardirq_context ;
int softirq_context ;
u64 curr_chain_key ;
int lockdep_depth ;
unsigned int lockdep_recursion ;
struct held_lock held_locks[48UL] ;
void *journal_info ;
struct bio *bio_list ;
struct bio **bio_tail ;
struct reclaim_state *reclaim_state ;
struct backing_dev_info *backing_dev_info ;
struct io_context *io_context ;
unsigned long ptrace_message ;
siginfo_t *last_siginfo ;
struct task_io_accounting ioac ;
u64 acct_rss_mem1 ;
u64 acct_vm_mem1 ;
cputime_t acct_timexpd ;
nodemask_t mems_allowed ;
int cpuset_mems_generation ;
int cpuset_mem_spread_rotor ;
struct css_set *cgroups ;
struct list_head cg_list ;
struct robust_list_head *robust_list ;
struct compat_robust_list_head *compat_robust_list ;
struct list_head pi_state_list ;
struct futex_pi_state *pi_state_cache ;
struct mempolicy *mempolicy ;
short il_next ;
atomic_t fs_excl ;
struct rcu_head rcu ;
struct pipe_inode_info *splice_pipe ;
struct task_delay_info *delays ;
int make_it_fail ;
struct prop_local_single dirties ;
int latency_record_count ;
struct latency_record latency_record[32] ;
unsigned long timer_slack_ns ;
unsigned long default_timer_slack_ns ;
struct list_head *scm_work_list ;
};
struct cdev {
struct kobject kobj ;
struct module *owner ;
struct file_operations const *ops ;
struct list_head list ;
dev_t dev ;
unsigned int count ;
};
struct exception_table_entry {
unsigned long insn ;
unsigned long fixup ;
};
typedef s32 compat_time_t;
typedef s32 compat_long_t;
struct compat_timespec {
compat_time_t tv_sec ;
s32 tv_nsec ;
};
typedef u32 compat_uptr_t;
struct compat_robust_list {
compat_uptr_t next ;
};
struct compat_robust_list_head {
struct compat_robust_list list ;
compat_long_t futex_offset ;
compat_uptr_t list_op_pending ;
};
enum chipset_type {
NOT_SUPPORTED = 0,
SUPPORTED = 1
} ;
struct agp_version {
u16 major ;
u16 minor ;
};
struct agp_kern_info {
struct agp_version version ;
struct pci_dev *device ;
enum chipset_type chipset ;
unsigned long mode ;
unsigned long aper_base ;
size_t aper_size ;
int max_memory ;
int current_memory ;
bool cant_use_aperture ;
unsigned long page_mask ;
struct vm_operations_struct *vm_ops ;
};
struct agp_bridge_data;
struct pollfd {
int fd ;
short events ;
short revents ;
};
struct poll_table_struct {
void (*qproc)(struct file * , wait_queue_head_t * , struct poll_table_struct * ) ;
};
typedef int irqreturn_t;
typedef unsigned int drm_magic_t;
struct drm_hw_lock {
unsigned int volatile lock ;
char padding[60] ;
};
enum drm_map_type {
_DRM_FRAME_BUFFER = 0,
_DRM_REGISTERS = 1,
_DRM_SHM = 2,
_DRM_AGP = 3,
_DRM_SCATTER_GATHER = 4,
_DRM_CONSISTENT = 5,
_DRM_GEM = 6
} ;
enum drm_map_flags {
_DRM_RESTRICTED = 1,
_DRM_READ_ONLY = 2,
_DRM_LOCKED = 4,
_DRM_KERNEL = 8,
_DRM_WRITE_COMBINING = 16,
_DRM_CONTAINS_LOCK = 32,
_DRM_REMOVABLE = 64,
_DRM_DRIVER = 128
} ;
struct drm_map {
unsigned long offset ;
unsigned long size ;
enum drm_map_type type ;
enum drm_map_flags flags ;
void *handle ;
int mtrr ;
};
enum drm_stat_type {
_DRM_STAT_LOCK = 0,
_DRM_STAT_OPENS = 1,
_DRM_STAT_CLOSES = 2,
_DRM_STAT_IOCTLS = 3,
_DRM_STAT_LOCKS = 4,
_DRM_STAT_UNLOCKS = 5,
_DRM_STAT_VALUE = 6,
_DRM_STAT_BYTE = 7,
_DRM_STAT_COUNT = 8,
_DRM_STAT_IRQ = 9,
_DRM_STAT_PRIMARY = 10,
_DRM_STAT_SECONDARY = 11,
_DRM_STAT_DMA = 12,
_DRM_STAT_SPECIAL = 13,
_DRM_STAT_MISSED = 14
} ;
enum drm_ctx_flags {
_DRM_CONTEXT_PRESERVED = 1,
_DRM_CONTEXT_2DONLY = 2
} ;
struct drm_set_version {
int drm_di_major ;
int drm_di_minor ;
int drm_dd_major ;
int drm_dd_minor ;
};
struct drm_mode_fb_cmd {
uint32_t fb_id ;
uint32_t width ;
uint32_t height ;
uint32_t pitch ;
uint32_t bpp ;
uint32_t depth ;
uint32_t handle ;
};
struct idr_layer {
unsigned long bitmap ;
struct idr_layer *ary[1 << 6] ;
int count ;
int layer ;
struct rcu_head rcu_head ;
};
struct idr {
struct idr_layer *top ;
struct idr_layer *id_free ;
int layers ;
int id_free_cnt ;
spinlock_t lock ;
};
struct drm_file;
struct drm_device;
struct drm_hash_item {
struct hlist_node head ;
unsigned long key ;
};
struct drm_open_hash {
unsigned int size ;
unsigned int order ;
unsigned int fill ;
struct hlist_head *table ;
int use_vmalloc ;
};
typedef int drm_ioctl_t(struct drm_device *dev , void *data , struct drm_file *file_priv );
struct drm_ioctl_desc {
unsigned int cmd ;
drm_ioctl_t *func ;
int flags ;
};
enum __anonenum_list_143 {
DRM_LIST_NONE = 0,
DRM_LIST_FREE = 1,
DRM_LIST_WAIT = 2,
DRM_LIST_PEND = 3,
DRM_LIST_PRIO = 4,
DRM_LIST_RECLAIM = 5
} ;
struct drm_buf {
int idx ;
int total ;
int order ;
int used ;
unsigned long offset ;
void *address ;
unsigned long bus_address ;
struct drm_buf *next ;
int volatile waiting ;
int volatile pending ;
wait_queue_head_t dma_wait ;
struct drm_file *file_priv ;
int context ;
int while_locked ;
enum __anonenum_list_143 list ;
int dev_priv_size ;
void *dev_private ;
};
struct drm_waitlist {
int count ;
struct drm_buf **bufs ;
struct drm_buf **rp ;
struct drm_buf **wp ;
struct drm_buf **end ;
spinlock_t read_lock ;
spinlock_t write_lock ;
};
struct drm_freelist {
int initialized ;
atomic_t count ;
struct drm_buf *next ;
wait_queue_head_t waiting ;
int low_mark ;
int high_mark ;
atomic_t wfh ;
spinlock_t lock ;
};
struct drm_dma_handle {
dma_addr_t busaddr ;
void *vaddr ;
size_t size ;
};
typedef struct drm_dma_handle drm_dma_handle_t;
struct drm_buf_entry {
int buf_size ;
int buf_count ;
struct drm_buf *buflist ;
int seg_count ;
int page_order ;
struct drm_dma_handle **seglist ;
struct drm_freelist freelist ;
};
struct drm_minor;
struct drm_master;
struct drm_file {
int authenticated ;
pid_t pid ;
uid_t uid ;
drm_magic_t magic ;
unsigned long ioctl_count ;
struct list_head lhead ;
struct drm_minor *minor ;
unsigned long lock_count ;
struct idr object_idr ;
spinlock_t table_lock ;
struct file *filp ;
void *driver_priv ;
int is_master ;
struct drm_master *master ;
struct list_head fbs ;
};
struct drm_queue {
atomic_t use_count ;
atomic_t finalization ;
atomic_t block_count ;
atomic_t block_read ;
wait_queue_head_t read_queue ;
atomic_t block_write ;
wait_queue_head_t write_queue ;
atomic_t total_queued ;
atomic_t total_flushed ;
atomic_t total_locks ;
enum drm_ctx_flags flags ;
struct drm_waitlist waitlist ;
wait_queue_head_t flush_queue ;
};
struct drm_lock_data {
struct drm_hw_lock *hw_lock ;
struct drm_file *file_priv ;
wait_queue_head_t lock_queue ;
unsigned long lock_time ;
spinlock_t spinlock ;
uint32_t kernel_waiters ;
uint32_t user_waiters ;
int idle_has_lock ;
};
enum __anonenum_flags_144 {
_DRM_DMA_USE_AGP = 1,
_DRM_DMA_USE_SG = 2,
_DRM_DMA_USE_FB = 4,
_DRM_DMA_USE_PCI_RO = 8
} ;
struct drm_device_dma {
struct drm_buf_entry bufs[22 + 1] ;
int buf_count ;
struct drm_buf **buflist ;
int seg_count ;
int page_count ;
unsigned long *pagelist ;
unsigned long byte_count ;
enum __anonenum_flags_144 flags ;
};
struct drm_agp_head {
struct agp_kern_info agp_info ;
struct list_head memory ;
unsigned long mode ;
struct agp_bridge_data *bridge ;
int enabled ;
int acquired ;
unsigned long base ;
int agp_mtrr ;
int cant_use_aperture ;
unsigned long page_mask ;
};
struct drm_sg_mem {
unsigned long handle ;
void *virtual ;
int pages ;
struct page **pagelist ;
dma_addr_t *busaddr ;
};
struct drm_sigdata {
int context ;
struct drm_hw_lock *lock ;
};
struct drm_mm;
struct drm_mm_node {
struct list_head fl_entry ;
struct list_head ml_entry ;
int free ;
unsigned long start ;
unsigned long size ;
struct drm_mm *mm ;
void *private ;
};
struct drm_mm {
struct list_head fl_entry ;
struct list_head ml_entry ;
};
struct drm_map_list {
struct list_head head ;
struct drm_hash_item hash ;
struct drm_map *map ;
uint64_t user_token ;
struct drm_master *master ;
struct drm_mm_node *file_offset_node ;
};
typedef struct drm_map drm_local_map_t;
struct drm_gem_object {
struct kref refcount ;
struct kref handlecount ;
struct drm_device *dev ;
struct file *filp ;
struct drm_map_list map_list ;
size_t size ;
int name ;
uint32_t read_domains ;
uint32_t write_domain ;
uint32_t pending_read_domains ;
uint32_t pending_write_domain ;
void *driver_private ;
};
struct drm_framebuffer;
struct drm_mode_object {
uint32_t id ;
uint32_t type ;
};
enum drm_mode_status {
MODE_OK = 0,
MODE_HSYNC = 1,
MODE_VSYNC = 2,
MODE_H_ILLEGAL = 3,
MODE_V_ILLEGAL = 4,
MODE_BAD_WIDTH = 5,
MODE_NOMODE = 6,
MODE_NO_INTERLACE = 7,
MODE_NO_DBLESCAN = 8,
MODE_NO_VSCAN = 9,
MODE_MEM = 10,
MODE_VIRTUAL_X = 11,
MODE_VIRTUAL_Y = 12,
MODE_MEM_VIRT = 13,
MODE_NOCLOCK = 14,
MODE_CLOCK_HIGH = 15,
MODE_CLOCK_LOW = 16,
MODE_CLOCK_RANGE = 17,
MODE_BAD_HVALUE = 18,
MODE_BAD_VVALUE = 19,
MODE_BAD_VSCAN = 20,
MODE_HSYNC_NARROW = 21,
MODE_HSYNC_WIDE = 22,
MODE_HBLANK_NARROW = 23,
MODE_HBLANK_WIDE = 24,
MODE_VSYNC_NARROW = 25,
MODE_VSYNC_WIDE = 26,
MODE_VBLANK_NARROW = 27,
MODE_VBLANK_WIDE = 28,
MODE_PANEL = 29,
MODE_INTERLACE_WIDTH = 30,
MODE_ONE_WIDTH = 31,
MODE_ONE_HEIGHT = 32,
MODE_ONE_SIZE = 33,
MODE_NO_REDUCED = 34,
MODE_UNVERIFIED = -3,
MODE_BAD = -2,
MODE_ERROR = -1
} ;
struct drm_display_mode {
struct list_head head ;
struct drm_mode_object base ;
char name[32] ;
int connector_count ;
enum drm_mode_status status ;
int type ;
int clock ;
int hdisplay ;
int hsync_start ;
int hsync_end ;
int htotal ;
int hskew ;
int vdisplay ;
int vsync_start ;
int vsync_end ;
int vtotal ;
int vscan ;
unsigned int flags ;
int width_mm ;
int height_mm ;
int clock_index ;
int synth_clock ;
int crtc_hdisplay ;
int crtc_hblank_start ;
int crtc_hblank_end ;
int crtc_hsync_start ;
int crtc_hsync_end ;
int crtc_htotal ;
int crtc_hskew ;
int crtc_vdisplay ;
int crtc_vblank_start ;
int crtc_vblank_end ;
int crtc_vsync_start ;
int crtc_vsync_end ;
int crtc_vtotal ;
int crtc_hadjusted ;
int crtc_vadjusted ;
int private_size ;
int *private ;
int private_flags ;
int vrefresh ;
float hsync ;
};
struct drm_framebuffer_funcs {
void (*destroy)(struct drm_framebuffer *framebuffer ) ;
int (*create_handle)(struct drm_framebuffer *fb , struct drm_file *file_priv ,
unsigned int *handle ) ;
};
struct drm_framebuffer {
struct drm_device *dev ;
struct list_head head ;
struct drm_mode_object base ;
struct drm_framebuffer_funcs const *funcs ;
unsigned int pitch ;
unsigned int width ;
unsigned int height ;
unsigned int depth ;
int bits_per_pixel ;
int flags ;
void *fbdev ;
u32 pseudo_palette[17] ;
struct list_head filp_head ;
};
struct drm_property {
struct list_head head ;
struct drm_mode_object base ;
uint32_t flags ;
char name[32] ;
uint32_t num_values ;
uint64_t *values ;
struct list_head enum_blob_list ;
};
struct drm_mode_config_funcs {
struct drm_framebuffer *(*fb_create)(struct drm_device *dev , struct drm_file *file_priv ,
struct drm_mode_fb_cmd *mode_cmd ) ;
int (*fb_changed)(struct drm_device *dev ) ;
};
struct drm_mode_group {
uint32_t num_crtcs ;
uint32_t num_encoders ;
uint32_t num_connectors ;
uint32_t *id_list ;
};
struct drm_mode_config {
struct mutex mutex ;
struct idr crtc_idr ;
int num_fb ;
struct list_head fb_list ;
int num_connector ;
struct list_head connector_list ;
int num_encoder ;
struct list_head encoder_list ;
int num_crtc ;
struct list_head crtc_list ;
struct list_head property_list ;
struct list_head fb_kernel_list ;
int min_width ;
int min_height ;
int max_width ;
int max_height ;
struct drm_mode_config_funcs *funcs ;
unsigned long fb_base ;
struct list_head property_blob_list ;
struct drm_property *edid_property ;
struct drm_property *dpms_property ;
struct drm_property *dvi_i_subconnector_property ;
struct drm_property *dvi_i_select_subconnector_property ;
struct drm_property *tv_subconnector_property ;
struct drm_property *tv_select_subconnector_property ;
struct drm_property *tv_mode_property ;
struct drm_property *tv_left_margin_property ;
struct drm_property *tv_right_margin_property ;
struct drm_property *tv_top_margin_property ;
struct drm_property *tv_bottom_margin_property ;
struct drm_property *scaling_mode_property ;
struct drm_property *dithering_mode_property ;
};
struct drm_master {
struct kref refcount ;
struct list_head head ;
struct drm_minor *minor ;
char *unique ;
int unique_len ;
int unique_size ;
int blocked ;
struct drm_open_hash magiclist ;
struct list_head magicfree ;
struct drm_lock_data lock ;
void *driver_priv ;
};
struct drm_driver {
int (*load)(struct drm_device * , unsigned long flags ) ;
int (*firstopen)(struct drm_device * ) ;
int (*open)(struct drm_device * , struct drm_file * ) ;
void (*preclose)(struct drm_device * , struct drm_file *file_priv ) ;
void (*postclose)(struct drm_device * , struct drm_file * ) ;
void (*lastclose)(struct drm_device * ) ;
int (*unload)(struct drm_device * ) ;
int (*suspend)(struct drm_device * , pm_message_t state ) ;
int (*resume)(struct drm_device * ) ;
int (*dma_ioctl)(struct drm_device *dev , void *data , struct drm_file *file_priv ) ;
void (*dma_ready)(struct drm_device * ) ;
int (*dma_quiescent)(struct drm_device * ) ;
int (*context_ctor)(struct drm_device *dev , int context ) ;
int (*context_dtor)(struct drm_device *dev , int context ) ;
int (*kernel_context_switch)(struct drm_device *dev , int old , int new ) ;
void (*kernel_context_switch_unlock)(struct drm_device *dev ) ;
int (*dri_library_name)(struct drm_device *dev , char *buf ) ;
u32 (*get_vblank_counter)(struct drm_device *dev , int crtc ) ;
int (*enable_vblank)(struct drm_device *dev , int crtc ) ;
void (*disable_vblank)(struct drm_device *dev , int crtc ) ;
int (*device_is_agp)(struct drm_device *dev ) ;
irqreturn_t (*irq_handler)(int irq , void *arg ) ;
void (*irq_preinstall)(struct drm_device *dev ) ;
int (*irq_postinstall)(struct drm_device *dev ) ;
void (*irq_uninstall)(struct drm_device *dev ) ;
void (*reclaim_buffers)(struct drm_device *dev , struct drm_file *file_priv ) ;
void (*reclaim_buffers_locked)(struct drm_device *dev , struct drm_file *file_priv ) ;
void (*reclaim_buffers_idlelocked)(struct drm_device *dev , struct drm_file *file_priv ) ;
unsigned long (*get_map_ofs)(struct drm_map *map ) ;
unsigned long (*get_reg_ofs)(struct drm_device *dev ) ;
void (*set_version)(struct drm_device *dev , struct drm_set_version *sv ) ;
int (*master_create)(struct drm_device *dev , struct drm_master *master ) ;
void (*master_destroy)(struct drm_device *dev , struct drm_master *master ) ;
int (*proc_init)(struct drm_minor *minor ) ;
void (*proc_cleanup)(struct drm_minor *minor ) ;
int (*gem_init_object)(struct drm_gem_object *obj ) ;
void (*gem_free_object)(struct drm_gem_object *obj ) ;
struct vm_operations_struct *gem_vm_ops ;
int major ;
int minor ;
int patchlevel ;
char *name ;
char *desc ;
char *date ;
u32 driver_features ;
int dev_priv_size ;
struct drm_ioctl_desc *ioctls ;
int num_ioctls ;
struct file_operations fops ;
struct pci_driver pci_driver ;
struct list_head device_list ;
};
struct drm_minor {
int index ;
int type ;
dev_t device ;
struct device kdev ;
struct drm_device *dev ;
struct proc_dir_entry *dev_root ;
struct drm_master *master ;
struct list_head master_list ;
struct drm_mode_group mode_group ;
};
struct drm_device {
struct list_head driver_item ;
char *devname ;
int if_version ;
spinlock_t count_lock ;
struct mutex struct_mutex ;
int open_count ;
atomic_t ioctl_count ;
atomic_t vma_count ;
int buf_use ;
atomic_t buf_alloc ;
unsigned long counters ;
enum drm_stat_type types[15] ;
atomic_t counts[15] ;
struct list_head filelist ;
struct list_head maplist ;
int map_count ;
struct drm_open_hash map_hash ;
struct list_head ctxlist ;
int ctx_count ;
struct mutex ctxlist_mutex ;
struct idr ctx_idr ;
struct list_head vmalist ;
int queue_count ;
int queue_reserved ;
int queue_slots ;
struct drm_queue **queuelist ;
struct drm_device_dma *dma ;
int irq_enabled ;
long volatile context_flag ;
long volatile interrupt_flag ;
long volatile dma_flag ;
struct timer_list timer ;
wait_queue_head_t context_wait ;
int last_checked ;
int last_context ;
unsigned long last_switch ;
struct work_struct work ;
int vblank_disable_allowed ;
wait_queue_head_t *vbl_queue ;
atomic_t *_vblank_count ;
spinlock_t vbl_lock ;
struct list_head *vbl_sigs ;
atomic_t vbl_signal_pending ;
atomic_t *vblank_refcount ;
u32 *last_vblank ;
int *vblank_enabled ;
int *vblank_inmodeset ;
u32 *last_vblank_wait ;
struct timer_list vblank_disable_timer ;
u32 max_vblank_count ;
cycles_t ctx_start ;
cycles_t lck_start ;
struct fasync_struct *buf_async ;
wait_queue_head_t buf_readers ;
wait_queue_head_t buf_writers ;
struct drm_agp_head *agp ;
struct pci_dev *pdev ;
int pci_vendor ;
int pci_device ;
struct drm_sg_mem *sg ;
int num_crtcs ;
void *dev_private ;
void *mm_private ;
struct address_space *dev_mapping ;
struct drm_sigdata sigdata ;
sigset_t sigmask ;
struct drm_driver *driver ;
drm_local_map_t *agp_buffer_map ;
unsigned int agp_buffer_token ;
struct drm_minor *control ;
struct drm_minor *primary ;
spinlock_t drw_lock ;
struct idr drw_idr ;
struct drm_mode_config mode_config ;
spinlock_t object_name_lock ;
struct idr object_name_idr ;
atomic_t object_count ;
atomic_t object_memory ;
atomic_t pin_count ;
atomic_t pin_memory ;
atomic_t gtt_count ;
atomic_t gtt_memory ;
uint32_t gtt_total ;
uint32_t invalidate_domains ;
uint32_t flush_domains ;
};
struct io_mapping;
struct _drm_i915_ring_buffer {
int tail_mask ;
unsigned long Size ;
u8 *virtual_start ;
int head ;
int tail ;
int space ;
drm_local_map_t map ;
struct drm_gem_object *ring_obj ;
};
typedef struct _drm_i915_ring_buffer drm_i915_ring_buffer_t;
struct mem_block {
struct mem_block *next ;
struct mem_block *prev ;
int start ;
int size ;
struct drm_file *file_priv ;
};
struct opregion_header;
struct opregion_acpi;
struct opregion_swsci;
struct opregion_asle;
struct intel_opregion {
struct opregion_header *header ;
struct opregion_acpi *acpi ;
struct opregion_swsci *swsci ;
struct opregion_asle *asle ;
int enabled ;
};
struct drm_i915_fence_reg {
struct drm_gem_object *obj ;
};
struct __anonstruct_mm_148 {
struct drm_mm gtt_space ;
struct io_mapping *gtt_mapping ;
struct list_head active_list ;
struct list_head flushing_list ;
struct list_head inactive_list ;
struct list_head request_list ;
struct delayed_work retire_work ;
uint32_t next_gem_seqno ;
uint32_t waiting_gem_seqno ;
uint32_t irq_gem_seqno ;
int suspended ;
int wedged ;
uint32_t bit_6_swizzle_x ;
uint32_t bit_6_swizzle_y ;
};
struct drm_i915_private {
struct drm_device *dev ;
int has_gem ;
void *regs ;
drm_i915_ring_buffer_t ring ;
drm_dma_handle_t *status_page_dmah ;
void *hw_status_page ;
dma_addr_t dma_status_page ;
uint32_t counter ;
unsigned int status_gfx_addr ;
drm_local_map_t hws_map ;
struct drm_gem_object *hws_obj ;
unsigned int cpp ;
int back_offset ;
int front_offset ;
int current_page ;
int page_flipping ;
wait_queue_head_t irq_queue ;
atomic_t irq_received ;
spinlock_t user_irq_lock ;
int user_irq_refcount ;
u32 irq_mask_reg ;
u32 pipestat[2] ;
int tex_lru_log_granularity ;
int allow_batchbuffer ;
struct mem_block *agp_heap ;
unsigned int sr01 ;
unsigned int adpa ;
unsigned int ppcr ;
unsigned int dvob ;
unsigned int dvoc ;
unsigned int lvds ;
int vblank_pipe ;
bool cursor_needs_physical ;
struct drm_mm vram ;
int irq_enabled ;
struct intel_opregion opregion ;
int backlight_duty_cycle ;
bool panel_wants_dither ;
struct drm_display_mode *panel_fixed_mode ;
struct drm_display_mode *vbt_mode ;
unsigned int int_tv_support : 1 ;
unsigned int lvds_dither : 1 ;
unsigned int lvds_vbt : 1 ;
unsigned int int_crt_support : 1 ;
struct drm_i915_fence_reg fence_regs[16] ;
int fence_reg_start ;
int num_fence_regs ;
u8 saveLBB ;
u32 saveDSPACNTR ;
u32 saveDSPBCNTR ;
u32 saveDSPARB ;
u32 saveRENDERSTANDBY ;
u32 saveHWS ;
u32 savePIPEACONF ;
u32 savePIPEBCONF ;
u32 savePIPEASRC ;
u32 savePIPEBSRC ;
u32 saveFPA0 ;
u32 saveFPA1 ;
u32 saveDPLL_A ;
u32 saveDPLL_A_MD ;
u32 saveHTOTAL_A ;
u32 saveHBLANK_A ;
u32 saveHSYNC_A ;
u32 saveVTOTAL_A ;
u32 saveVBLANK_A ;
u32 saveVSYNC_A ;
u32 saveBCLRPAT_A ;
u32 savePIPEASTAT ;
u32 saveDSPASTRIDE ;
u32 saveDSPASIZE ;
u32 saveDSPAPOS ;
u32 saveDSPAADDR ;
u32 saveDSPASURF ;
u32 saveDSPATILEOFF ;
u32 savePFIT_PGM_RATIOS ;
u32 saveBLC_PWM_CTL ;
u32 saveBLC_PWM_CTL2 ;
u32 saveFPB0 ;
u32 saveFPB1 ;
u32 saveDPLL_B ;
u32 saveDPLL_B_MD ;
u32 saveHTOTAL_B ;
u32 saveHBLANK_B ;
u32 saveHSYNC_B ;
u32 saveVTOTAL_B ;
u32 saveVBLANK_B ;
u32 saveVSYNC_B ;
u32 saveBCLRPAT_B ;
u32 savePIPEBSTAT ;
u32 saveDSPBSTRIDE ;
u32 saveDSPBSIZE ;
u32 saveDSPBPOS ;
u32 saveDSPBADDR ;
u32 saveDSPBSURF ;
u32 saveDSPBTILEOFF ;
u32 saveVGA0 ;
u32 saveVGA1 ;
u32 saveVGA_PD ;
u32 saveVGACNTRL ;
u32 saveADPA ;
u32 saveLVDS ;
u32 savePP_ON_DELAYS ;
u32 savePP_OFF_DELAYS ;
u32 saveDVOA ;
u32 saveDVOB ;
u32 saveDVOC ;
u32 savePP_ON ;
u32 savePP_OFF ;
u32 savePP_CONTROL ;
u32 savePP_DIVISOR ;
u32 savePFIT_CONTROL ;
u32 save_palette_a[256] ;
u32 save_palette_b[256] ;
u32 saveFBC_CFB_BASE ;
u32 saveFBC_LL_BASE ;
u32 saveFBC_CONTROL ;
u32 saveFBC_CONTROL2 ;
u32 saveIER ;
u32 saveIIR ;
u32 saveIMR ;
u32 saveCACHE_MODE_0 ;
u32 saveD_STATE ;
u32 saveCG_2D_DIS ;
u32 saveMI_ARB_STATE ;
u32 saveSWF0[16] ;
u32 saveSWF1[16] ;
u32 saveSWF2[3] ;
u8 saveMSR ;
u8 saveSR[8] ;
u8 saveGR[25] ;
u8 saveAR_INDEX ;
u8 saveAR[21] ;
u8 saveDACMASK ;
u8 saveDACDATA[256 * 3] ;
u8 saveCR[37] ;
struct __anonstruct_mm_148 mm ;
};
enum __anonenum_1 {
false = 0,
true = 1
} ;
struct x8664_pda {
struct task_struct *pcurrent ;
unsigned long data_offset ;
unsigned long kernelstack ;
unsigned long oldrsp ;
int irqcount ;
unsigned int cpunumber ;
char *irqstackptr ;
short nodenumber ;
short in_bootmem ;
unsigned int __softirq_pending ;
unsigned int __nmi_count ;
short mmu_state ;
short isidle ;
struct mm_struct *active_mm ;
unsigned int apic_timer_irqs ;
unsigned int irq0_irqs ;
unsigned int irq_resched_count ;
unsigned int irq_call_count ;
unsigned int irq_tlb_count ;
unsigned int irq_thermal_count ;
unsigned int irq_threshold_count ;
unsigned int irq_spurious_count ;
} __attribute__((__aligned__((1) << (7) ))) ;
enum hrtimer_restart;
struct __large_struct {
unsigned long buf[100] ;
};
typedef unsigned int drm_handle_t;
struct drm_clip_rect {
unsigned short x1 ;
unsigned short y1 ;
unsigned short x2 ;
unsigned short y2 ;
};
struct drm_tex_region {
unsigned char next ;
unsigned char prev ;
unsigned char in_use ;
unsigned char padding ;
unsigned int age ;
};
enum __anonenum_func_147 {
I915_INIT_DMA = 1,
I915_CLEANUP_DMA = 2,
I915_RESUME_DMA = 3
} ;
struct _drm_i915_init {
enum __anonenum_func_147 func ;
unsigned int mmio_offset ;
int sarea_priv_offset ;
unsigned int ring_start ;
unsigned int ring_end ;
unsigned int ring_size ;
unsigned int front_offset ;
unsigned int back_offset ;
unsigned int depth_offset ;
unsigned int w ;
unsigned int h ;
unsigned int pitch ;
unsigned int pitch_bits ;
unsigned int back_pitch ;
unsigned int depth_pitch ;
unsigned int cpp ;
unsigned int chipset ;
};
typedef struct _drm_i915_init drm_i915_init_t;
struct _drm_i915_sarea {
struct drm_tex_region texList[255 + 1] ;
int last_upload ;
int last_enqueue ;
int last_dispatch ;
int ctxOwner ;
int texAge ;
int pf_enabled ;
int pf_active ;
int pf_current_page ;
int perf_boxes ;
int width ;
int height ;
drm_handle_t front_handle ;
int front_offset ;
int front_size ;
drm_handle_t back_handle ;
int back_offset ;
int back_size ;
drm_handle_t depth_handle ;
int depth_offset ;
int depth_size ;
drm_handle_t tex_handle ;
int tex_offset ;
int tex_size ;
int log_tex_granularity ;
int pitch ;
int rotation ;
int rotated_offset ;
int rotated_size ;
int rotated_pitch ;
int virtualX ;
int virtualY ;
unsigned int front_tiled ;
unsigned int back_tiled ;
unsigned int depth_tiled ;
unsigned int rotated_tiled ;
unsigned int rotated2_tiled ;
int pipeA_x ;
int pipeA_y ;
int pipeA_w ;
int pipeA_h ;
int pipeB_x ;
int pipeB_y ;
int pipeB_w ;
int pipeB_h ;
drm_handle_t unused_handle ;
uint32_t unused1 ;
uint32_t unused2 ;
uint32_t unused3 ;
uint32_t front_bo_handle ;
uint32_t back_bo_handle ;
uint32_t unused_bo_handle ;
uint32_t depth_bo_handle ;
};
typedef struct _drm_i915_sarea drm_i915_sarea_t;
struct drm_i915_batchbuffer {
int start ;
int used ;
int DR1 ;
int DR4 ;
int num_cliprects ;
struct drm_clip_rect *cliprects ;
};
typedef struct drm_i915_batchbuffer drm_i915_batchbuffer_t;
struct _drm_i915_cmdbuffer {
char *buf ;
int sz ;
int DR1 ;
int DR4 ;
int num_cliprects ;
struct drm_clip_rect *cliprects ;
};
typedef struct _drm_i915_cmdbuffer drm_i915_cmdbuffer_t;
struct drm_i915_getparam {
int param ;
int *value ;
};
typedef struct drm_i915_getparam drm_i915_getparam_t;
struct drm_i915_setparam {
int param ;
int value ;
};
typedef struct drm_i915_setparam drm_i915_setparam_t;
struct drm_i915_hws_addr {
uint64_t addr ;
};
typedef struct drm_i915_hws_addr drm_i915_hws_addr_t;
struct drm_i915_master_private {
drm_local_map_t *sarea ;
struct _drm_i915_sarea *sarea_priv ;
};
typedef struct drm_i915_private drm_i915_private_t;
struct __anonstruct_mm_149 {
uint32_t last_gem_seqno ;
uint32_t last_gem_throttle_seqno ;
};
struct drm_i915_file_private {
struct __anonstruct_mm_149 mm ;
};
enum hrtimer_restart;
struct drm_i915_irq_emit {
int *irq_seq ;
};
typedef struct drm_i915_irq_emit drm_i915_irq_emit_t;
struct drm_i915_irq_wait {
int irq_seq ;
};
typedef struct drm_i915_irq_wait drm_i915_irq_wait_t;
struct drm_i915_vblank_pipe {
int pipe ;
};
typedef struct drm_i915_vblank_pipe drm_i915_vblank_pipe_t;
enum hrtimer_restart;
struct drm_i915_mem_alloc {
int region ;
int alignment ;
int size ;
int *region_offset ;
};
typedef struct drm_i915_mem_alloc drm_i915_mem_alloc_t;
struct drm_i915_mem_free {
int region ;
int region_offset ;
};
typedef struct drm_i915_mem_free drm_i915_mem_free_t;
struct drm_i915_mem_init_heap {
int region ;
int size ;
int start ;
};
typedef struct drm_i915_mem_init_heap drm_i915_mem_init_heap_t;
struct drm_i915_mem_destroy_heap {
int region ;
};
typedef struct drm_i915_mem_destroy_heap drm_i915_mem_destroy_heap_t;
enum hrtimer_restart;
enum pipe {
PIPE_A = 0,
PIPE_B = 1
} ;
typedef unsigned char __u8;
typedef unsigned long uintptr_t;
typedef __s32 int32_t;
typedef __u8 uint8_t;
enum hrtimer_restart;
struct agp_memory {
struct agp_memory *next ;
struct agp_memory *prev ;
struct agp_bridge_data *bridge ;
unsigned long *memory ;
size_t page_count ;
int key ;
int num_scratch_pages ;
off_t pg_start ;
u32 type ;
u32 physical ;
bool is_bound ;
bool is_flushed ;
bool vmalloc_flag ;
struct list_head mapped_list ;
};
typedef int filler_t(void * , struct page * );
struct drm_gem_mm {
struct drm_mm offset_manager ;
struct drm_open_hash offset_hash ;
};
struct drm_i915_gem_init {
uint64_t gtt_start ;
uint64_t gtt_end ;
};
struct drm_i915_gem_create {
uint64_t size ;
uint32_t handle ;
uint32_t pad ;
};
struct drm_i915_gem_pread {
uint32_t handle ;
uint32_t pad ;
uint64_t offset ;
uint64_t size ;
uint64_t data_ptr ;
};
struct drm_i915_gem_pwrite {
uint32_t handle ;
uint32_t pad ;
uint64_t offset ;
uint64_t size ;
uint64_t data_ptr ;
};
struct drm_i915_gem_mmap {
uint32_t handle ;
uint32_t pad ;
uint64_t offset ;
uint64_t size ;
uint64_t addr_ptr ;
};
struct drm_i915_gem_mmap_gtt {
uint32_t handle ;
uint32_t pad ;
uint64_t offset ;
};
struct drm_i915_gem_set_domain {
uint32_t handle ;
uint32_t read_domains ;
uint32_t write_domain ;
};
struct drm_i915_gem_sw_finish {
uint32_t handle ;
};
struct drm_i915_gem_relocation_entry {
uint32_t target_handle ;
uint32_t delta ;
uint64_t offset ;
uint64_t presumed_offset ;
uint32_t read_domains ;
uint32_t write_domain ;
};
struct drm_i915_gem_exec_object {
uint32_t handle ;
uint32_t relocation_count ;
uint64_t relocs_ptr ;
uint64_t alignment ;
uint64_t offset ;
};
struct drm_i915_gem_execbuffer {
uint64_t buffers_ptr ;
uint32_t buffer_count ;
uint32_t batch_start_offset ;
uint32_t batch_len ;
uint32_t DR1 ;
uint32_t DR4 ;
uint32_t num_cliprects ;
uint64_t cliprects_ptr ;
};
struct drm_i915_gem_pin {
uint32_t handle ;
uint32_t pad ;
uint64_t alignment ;
uint64_t offset ;
};
struct drm_i915_gem_busy {
uint32_t handle ;
uint32_t busy ;
};
struct drm_i915_gem_get_aperture {
uint64_t aper_size ;
uint64_t aper_available_size ;
};
struct drm_i915_gem_object {
struct drm_gem_object *obj ;
struct drm_mm_node *gtt_space ;
struct list_head list ;
int active ;
int dirty ;
struct agp_memory *agp_mem ;
struct page **page_list ;
uint32_t gtt_offset ;
uint32_t gtt_alignment ;
uint64_t mmap_offset ;
int fence_reg ;
int gtt_bound ;
int pin_count ;
uint32_t last_rendering_seqno ;
uint32_t tiling_mode ;
uint32_t stride ;
uint32_t agp_type ;
uint8_t *page_cpu_valid ;
uint32_t user_pin_count ;
struct drm_file *pin_filp ;
};
struct drm_i915_gem_request {
uint32_t seqno ;
unsigned long emitted_jiffies ;
struct list_head list ;
};
struct reclaim_state {
unsigned long reclaimed_slab ;
};
struct drm_i915_relocation_entry;
enum hrtimer_restart;
struct drm_proc_list {
char const *name ;
int (*f)(char * , char ** , off_t , int , int * , void * ) ;
};
enum hrtimer_restart;
struct drm_i915_gem_set_tiling {
uint32_t handle ;
uint32_t tiling_mode ;
uint32_t stride ;
uint32_t swizzle_mode ;
};
struct drm_i915_gem_get_tiling {
uint32_t handle ;
uint32_t tiling_mode ;
uint32_t swizzle_mode ;
};
enum __anonenum_1___0 {
false___0 = 0,
true___0 = 1
} ;
typedef __u16 uint16_t;
enum hrtimer_restart;
struct i2c_device_id {
char name[20] ;
kernel_ulong_t driver_data __attribute__((__aligned__(sizeof(kernel_ulong_t )))) ;
};
struct i2c_msg;
struct i2c_algorithm;
struct i2c_adapter;
struct i2c_client;
struct i2c_driver;
union i2c_smbus_data;
struct i2c_board_info;
struct i2c_client_address_data;
struct i2c_driver {
int id ;
unsigned int class ;
int (*attach_adapter)(struct i2c_adapter * ) ;
int (*detach_adapter)(struct i2c_adapter * ) ;
int (*detach_client)(struct i2c_client * ) ;
int (*probe)(struct i2c_client * , struct i2c_device_id const * ) ;
int (*remove)(struct i2c_client * ) ;
void (*shutdown)(struct i2c_client * ) ;
int (*suspend)(struct i2c_client * , pm_message_t mesg ) ;
int (*resume)(struct i2c_client * ) ;
int (*command)(struct i2c_client *client , unsigned int cmd , void *arg ) ;
struct device_driver driver ;
struct i2c_device_id const *id_table ;
int (*detect)(struct i2c_client * , int kind , struct i2c_board_info * ) ;
struct i2c_client_address_data const *address_data ;
struct list_head clients ;
};
struct i2c_client {
unsigned short flags ;
unsigned short addr ;
char name[20] ;
struct i2c_adapter *adapter ;
struct i2c_driver *driver ;
struct device dev ;
int irq ;
struct list_head list ;
struct list_head detected ;
struct completion released ;
};
struct i2c_board_info {
char type[20] ;
unsigned short flags ;
unsigned short addr ;
void *platform_data ;
struct dev_archdata *archdata ;
int irq ;
};
struct i2c_algorithm {
int (*master_xfer)(struct i2c_adapter *adap , struct i2c_msg *msgs , int num ) ;
int (*smbus_xfer)(struct i2c_adapter *adap , u16 addr , unsigned short flags ,
char read_write , u8 command , int size , union i2c_smbus_data *data ) ;
u32 (*functionality)(struct i2c_adapter * ) ;
};
struct i2c_adapter {
struct module *owner ;
unsigned int id ;
unsigned int class ;
struct i2c_algorithm const *algo ;
void *algo_data ;
int (*client_register)(struct i2c_client * ) ;
int (*client_unregister)(struct i2c_client * ) ;
u8 level ;
struct mutex bus_lock ;
struct mutex clist_lock ;
int timeout ;
int retries ;
struct device dev ;
int nr ;
struct list_head clients ;
char name[48] ;
struct completion dev_released ;
};
struct i2c_client_address_data {
unsigned short const *normal_i2c ;
unsigned short const *probe ;
unsigned short const *ignore ;
unsigned short const * const *forces ;
};
struct i2c_msg {
__u16 addr ;
__u16 flags ;
__u16 len ;
__u8 *buf ;
};
union i2c_smbus_data {
__u8 byte ;
__u16 word ;
__u8 block[32 + 2] ;
};
struct drm_mode_set;
enum drm_connector_status {
connector_status_connected = 1,
connector_status_disconnected = 2,
connector_status_unknown = 3
} ;
enum subpixel_order {
SubPixelUnknown = 0,
SubPixelHorizontalRGB = 1,
SubPixelHorizontalBGR = 2,
SubPixelVerticalRGB = 3,
SubPixelVerticalBGR = 4,
SubPixelNone = 5
} ;
enum __anonenum_display_type_146 {
monochrome = 0,
rgb = 1,
other = 2,
unknown = 3
} ;
struct drm_display_info {
char name[32] ;
bool serration_vsync ;
bool sync_on_green ;
bool composite_sync ;
bool separate_syncs ;
bool blank_to_black ;
unsigned char video_level ;
bool digital ;
unsigned int width_mm ;
unsigned int height_mm ;
unsigned char gamma ;
bool gtf_supported ;
bool standard_color ;
enum __anonenum_display_type_146 display_type ;
bool active_off_supported ;
bool suspend_supported ;
bool standby_supported ;
unsigned short redx ;
unsigned short redy ;
unsigned short greenx ;
unsigned short greeny ;
unsigned short bluex ;
unsigned short bluey ;
unsigned short whitex ;
unsigned short whitey ;
unsigned int min_vfreq ;
unsigned int max_vfreq ;
unsigned int min_hfreq ;
unsigned int max_hfreq ;
unsigned int pixel_clock ;
unsigned int wpx1 ;
unsigned int wpy1 ;
unsigned int wpgamma1 ;
unsigned int wpx2 ;
unsigned int wpy2 ;
unsigned int wpgamma2 ;
enum subpixel_order subpixel_order ;
char *raw_edid ;
};
struct drm_property_blob {
struct drm_mode_object base ;
struct list_head head ;
unsigned int length ;
void *data ;
};
struct drm_crtc;
struct drm_connector;
struct drm_encoder;
struct drm_crtc_funcs {
void (*save)(struct drm_crtc *crtc ) ;
void (*restore)(struct drm_crtc *crtc ) ;
int (*cursor_set)(struct drm_crtc *crtc , struct drm_file *file_priv , uint32_t handle ,
uint32_t width , uint32_t height ) ;
int (*cursor_move)(struct drm_crtc *crtc , int x , int y ) ;
void (*gamma_set)(struct drm_crtc *crtc , u16 *r , u16 *g , u16 *b , uint32_t size ) ;
void (*destroy)(struct drm_crtc *crtc ) ;
int (*set_config)(struct drm_mode_set *set ) ;
};
struct drm_crtc {
struct drm_device *dev ;
struct list_head head ;
struct drm_mode_object base ;
struct drm_framebuffer *fb ;
bool enabled ;
struct drm_display_mode mode ;
int x ;
int y ;
struct drm_display_mode *desired_mode ;
int desired_x ;
int desired_y ;
struct drm_crtc_funcs const *funcs ;
uint32_t gamma_size ;
uint16_t *gamma_store ;
void *helper_private ;
};
struct drm_connector_funcs {
void (*dpms)(struct drm_connector *connector , int mode ) ;
void (*save)(struct drm_connector *connector ) ;
void (*restore)(struct drm_connector *connector ) ;
enum drm_connector_status (*detect)(struct drm_connector *connector ) ;
void (*fill_modes)(struct drm_connector *connector , uint32_t max_width , uint32_t max_height ) ;
int (*set_property)(struct drm_connector *connector , struct drm_property *property ,
uint64_t val ) ;
void (*destroy)(struct drm_connector *connector ) ;
};
struct drm_encoder_funcs {
void (*destroy)(struct drm_encoder *encoder ) ;
};
struct drm_encoder {
struct drm_device *dev ;
struct list_head head ;
struct drm_mode_object base ;
int encoder_type ;
uint32_t possible_crtcs ;
uint32_t possible_clones ;
struct drm_crtc *crtc ;
struct drm_encoder_funcs const *funcs ;
void *helper_private ;
};
struct drm_connector {
struct drm_device *dev ;
struct device kdev ;
struct device_attribute *attr ;
struct list_head head ;
struct drm_mode_object base ;
int connector_type ;
int connector_type_id ;
bool interlace_allowed ;
bool doublescan_allowed ;
struct list_head modes ;
int initial_x ;
int initial_y ;
enum drm_connector_status status ;
struct list_head probed_modes ;
struct drm_display_info display_info ;
struct drm_connector_funcs const *funcs ;
struct list_head user_modes ;
struct drm_property_blob *edid_blob_ptr ;
u32 property_ids[16] ;
uint64_t property_values[16] ;
void *helper_private ;
uint32_t encoder_ids[2] ;
uint32_t force_encoder_id ;
struct drm_encoder *encoder ;
};
struct drm_mode_set {
struct list_head head ;
struct drm_framebuffer *fb ;
struct drm_crtc *crtc ;
struct drm_display_mode *mode ;
uint32_t x ;
uint32_t y ;
struct drm_connector **connectors ;
size_t num_connectors ;
};
struct i2c_algo_bit_data {
void *data ;
void (*setsda)(void *data , int state ) ;
void (*setscl)(void *data , int state ) ;
int (*getsda)(void *data ) ;
int (*getscl)(void *data ) ;
int udelay ;
int timeout ;
};
struct drm_crtc_helper_funcs {
void (*dpms)(struct drm_crtc *crtc , int mode ) ;
void (*prepare)(struct drm_crtc *crtc ) ;
void (*commit)(struct drm_crtc *crtc ) ;
bool (*mode_fixup)(struct drm_crtc *crtc , struct drm_display_mode *mode , struct drm_display_mode *adjusted_mode ) ;
void (*mode_set)(struct drm_crtc *crtc , struct drm_display_mode *mode , struct drm_display_mode *adjusted_mode ,
int x , int y , struct drm_framebuffer *old_fb ) ;
void (*mode_set_base)(struct drm_crtc *crtc , int x , int y , struct drm_framebuffer *old_fb ) ;
};
struct drm_encoder_helper_funcs {
void (*dpms)(struct drm_encoder *encoder , int mode ) ;
void (*save)(struct drm_encoder *encoder ) ;
void (*restore)(struct drm_encoder *encoder ) ;
bool (*mode_fixup)(struct drm_encoder *encoder , struct drm_display_mode *mode ,
struct drm_display_mode *adjusted_mode ) ;
void (*prepare)(struct drm_encoder *encoder ) ;
void (*commit)(struct drm_encoder *encoder ) ;
void (*mode_set)(struct drm_encoder *encoder , struct drm_display_mode *mode ,
struct drm_display_mode *adjusted_mode ) ;
enum drm_connector_status (*detect)(struct drm_encoder *encoder , struct drm_connector *connector ) ;
};
struct intel_i2c_chan {
struct drm_device *drm_dev ;
u32 reg ;
struct i2c_adapter adapter ;
struct i2c_algo_bit_data algo ;
u8 slave_addr ;
};
struct intel_framebuffer {
struct drm_framebuffer base ;
struct drm_gem_object *obj ;
};
struct intel_output {
struct drm_connector base ;
struct drm_encoder enc ;
int type ;
struct intel_i2c_chan *i2c_bus ;
struct intel_i2c_chan *ddc_bus ;
bool load_detect_temp ;
void *dev_priv ;
};
struct intel_crtc {
struct drm_crtc base ;
int pipe ;
int plane ;
uint32_t cursor_addr ;
u8 lut_r[256] ;
u8 lut_g[256] ;
u8 lut_b[256] ;
int dpms_mode ;
struct intel_framebuffer *fbdev_fb ;
struct drm_mode_set mode_set ;
};
struct __anonstruct_intel_clock_t_150 {
int n ;
int m1 ;
int m2 ;
int p1 ;
int p2 ;
int dot ;
int vco ;
int m ;
int p ;
};
typedef struct __anonstruct_intel_clock_t_150 intel_clock_t;
struct __anonstruct_intel_range_t_151 {
int min ;
int max ;
};
typedef struct __anonstruct_intel_range_t_151 intel_range_t;
struct __anonstruct_intel_p2_t_152 {
int dot_limit ;
int p2_slow ;
int p2_fast ;
};
typedef struct __anonstruct_intel_p2_t_152 intel_p2_t;
struct __anonstruct_intel_limit_t_153 {
intel_range_t dot ;
intel_range_t vco ;
intel_range_t n ;
intel_range_t m ;
intel_range_t m1 ;
intel_range_t m2 ;
intel_range_t p ;
intel_range_t p1 ;
intel_p2_t p2 ;
};
typedef struct __anonstruct_intel_limit_t_153 intel_limit_t;
enum __anonenum_1___1 {
false___1 = 0,
true___1 = 1
} ;
enum hrtimer_restart;
struct drm_connector_helper_funcs {
int (*get_modes)(struct drm_connector *connector ) ;
int (*mode_valid)(struct drm_connector *connector , struct drm_display_mode *mode ) ;
struct drm_encoder *(*best_encoder)(struct drm_connector *connector ) ;
};
enum __anonenum_1___2 {
false___2 = 0,
true___2 = 1
} ;
enum hrtimer_restart;
enum hrtimer_restart;
struct vbt_header {
u8 signature[20] ;
u16 version ;
u16 header_size ;
u16 vbt_size ;
u8 vbt_checksum ;
u8 reserved0 ;
u32 bdb_offset ;
u32 aim_offset[4] ;
} __attribute__((__packed__)) ;
struct bdb_header {
u8 signature[16] ;
u16 version ;
u16 header_size ;
u16 bdb_size ;
};
struct bdb_general_features {
u8 panel_fitting : 2 ;
u8 flexaim : 1 ;
u8 msg_enable : 1 ;
u8 clear_screen : 3 ;
u8 color_flip : 1 ;
u8 download_ext_vbt : 1 ;
u8 enable_ssc : 1 ;
u8 ssc_freq : 1 ;
u8 enable_lfp_on_override : 1 ;
u8 disable_ssc_ddt : 1 ;
u8 rsvd8 : 3 ;
u8 disable_smooth_vision : 1 ;
u8 single_dvi : 1 ;
u8 rsvd9 : 6 ;
u8 legacy_monitor_detect ;
u8 int_crt_support : 1 ;
u8 int_tv_support : 1 ;
u8 rsvd11 : 6 ;
} __attribute__((__packed__)) ;
struct bdb_lvds_options {
u8 panel_type ;
u8 rsvd1 ;
u8 rsvd2 : 1 ;
u8 lvds_edid : 1 ;
u8 pixel_dither : 1 ;
u8 pfit_ratio_auto : 1 ;
u8 pfit_gfx_mode_enhanced : 1 ;
u8 pfit_text_mode_enhanced : 1 ;
u8 pfit_mode : 2 ;
u8 rsvd4 ;
} __attribute__((__packed__)) ;
struct lvds_fp_timing {
u16 x_res ;
u16 y_res ;
u32 lvds_reg ;
u32 lvds_reg_val ;
u32 pp_on_reg ;
u32 pp_on_reg_val ;
u32 pp_off_reg ;
u32 pp_off_reg_val ;
u32 pp_cycle_reg ;
u32 pp_cycle_reg_val ;
u32 pfit_reg ;
u32 pfit_reg_val ;
u16 terminator ;
} __attribute__((__packed__)) ;
struct lvds_dvo_timing {
u16 clock ;
u8 hactive_lo ;
u8 hblank_lo ;
u8 hblank_hi : 4 ;
u8 hactive_hi : 4 ;
u8 vactive_lo ;
u8 vblank_lo ;
u8 vblank_hi : 4 ;
u8 vactive_hi : 4 ;
u8 hsync_off_lo ;
u8 hsync_pulse_width ;
u8 vsync_pulse_width : 4 ;
u8 vsync_off : 4 ;
u8 rsvd0 : 6 ;
u8 hsync_off_hi : 2 ;
u8 h_image ;
u8 v_image ;
u8 max_hv ;
u8 h_border ;
u8 v_border ;
u8 rsvd1 : 3 ;
u8 digital : 2 ;
u8 vsync_positive : 1 ;
u8 hsync_positive : 1 ;
u8 rsvd2 : 1 ;
} __attribute__((__packed__)) ;
struct lvds_pnp_id {
u16 mfg_name ;
u16 product_code ;
u32 serial ;
u8 mfg_week ;
u8 mfg_year ;
} __attribute__((__packed__)) ;
struct bdb_lvds_lfp_data_entry {
struct lvds_fp_timing fp_timing ;
struct lvds_dvo_timing dvo_timing ;
struct lvds_pnp_id pnp_id ;
} __attribute__((__packed__)) ;
struct bdb_lvds_lfp_data {
struct bdb_lvds_lfp_data_entry data[16] ;
} __attribute__((__packed__)) ;
enum __anonenum_1___3 {
false___3 = 0,
true___3 = 1
} ;
enum hrtimer_restart;
struct intel_sdvo_caps {
u8 vendor_id ;
u8 device_id ;
u8 device_rev_id ;
u8 sdvo_version_major ;
u8 sdvo_version_minor ;
unsigned int sdvo_inputs_mask : 2 ;
unsigned int smooth_scaling : 1 ;
unsigned int sharp_scaling : 1 ;
unsigned int up_scaling : 1 ;
unsigned int down_scaling : 1 ;
unsigned int stall_support : 1 ;
unsigned int pad : 1 ;
u16 output_flags ;
} __attribute__((__packed__)) ;
struct __anonstruct_part1_150 {
u16 clock ;
u8 h_active ;
u8 h_blank ;
u8 h_high ;
u8 v_active ;
u8 v_blank ;
u8 v_high ;
};
struct __anonstruct_part2_151 {
u8 h_sync_off ;
u8 h_sync_width ;
u8 v_sync_off_width ;
u8 sync_off_width_high ;
u8 dtd_flags ;
u8 sdvo_flags ;
u8 v_sync_off_high ;
u8 reserved ;
};
struct intel_sdvo_dtd {
struct __anonstruct_part1_150 part1 ;
struct __anonstruct_part2_151 part2 ;
} __attribute__((__packed__)) ;
struct intel_sdvo_pixel_clock_range {
u16 min ;
u16 max ;
} __attribute__((__packed__)) ;
struct intel_sdvo_get_trained_inputs_response {
unsigned int input0_trained : 1 ;
unsigned int input1_trained : 1 ;
unsigned int pad : 6 ;
} __attribute__((__packed__)) ;
struct intel_sdvo_set_target_input_args {
unsigned int target_1 : 1 ;
unsigned int pad : 7 ;
} __attribute__((__packed__)) ;
struct intel_sdvo_priv {
struct intel_i2c_chan *i2c_bus ;
int slaveaddr ;
int output_device ;
u16 active_outputs ;
struct intel_sdvo_caps caps ;
int pixel_clock_min ;
int pixel_clock_max ;
int save_sdvo_mult ;
u16 save_active_outputs ;
struct intel_sdvo_dtd save_input_dtd_1 ;
struct intel_sdvo_dtd save_input_dtd_2 ;
struct intel_sdvo_dtd save_output_dtd[16] ;
u32 save_SDVOX ;
};
enum __anonenum_1___4 {
false___4 = 0,
true___4 = 1
} ;
enum hrtimer_restart;
struct edid;
enum hrtimer_restart;
struct atomic_notifier_head;
struct notifier_block {
int (*notifier_call)(struct notifier_block * , unsigned long , void * ) ;
struct notifier_block *next ;
int priority ;
};
struct atomic_notifier_head {
spinlock_t lock ;
struct notifier_block *head ;
};
enum hrtimer_restart;
typedef unsigned char cc_t;
typedef unsigned int speed_t;
typedef unsigned int tcflag_t;
struct ktermios {
tcflag_t c_iflag ;
tcflag_t c_oflag ;
tcflag_t c_cflag ;
tcflag_t c_lflag ;
cc_t c_line ;
cc_t c_cc[19] ;
speed_t c_ispeed ;
speed_t c_ospeed ;
};
struct winsize {
unsigned short ws_row ;
unsigned short ws_col ;
unsigned short ws_xpixel ;
unsigned short ws_ypixel ;
};
struct termiox {
__u16 x_hflag ;
__u16 x_cflag ;
__u16 x_rflag[5] ;
__u16 x_sflag ;
};
struct tty_driver;
struct tty_operations {
struct tty_struct *(*lookup)(struct tty_driver *driver , struct inode *inode ,
int idx ) ;
int (*install)(struct tty_driver *driver , struct tty_struct *tty ) ;
void (*remove)(struct tty_driver *driver , struct tty_struct *tty ) ;
int (*open)(struct tty_struct *tty , struct file *filp ) ;
void (*close)(struct tty_struct *tty , struct file *filp ) ;
void (*shutdown)(struct tty_struct *tty ) ;
int (*write)(struct tty_struct *tty , unsigned char const *buf , int count ) ;
int (*put_char)(struct tty_struct *tty , unsigned char ch ) ;
void (*flush_chars)(struct tty_struct *tty ) ;
int (*write_room)(struct tty_struct *tty ) ;
int (*chars_in_buffer)(struct tty_struct *tty ) ;
int (*ioctl)(struct tty_struct *tty , struct file *file , unsigned int cmd , unsigned long arg ) ;
long (*compat_ioctl)(struct tty_struct *tty , struct file *file , unsigned int cmd ,
unsigned long arg ) ;
void (*set_termios)(struct tty_struct *tty , struct ktermios *old ) ;
void (*throttle)(struct tty_struct *tty ) ;
void (*unthrottle)(struct tty_struct *tty ) ;
void (*stop)(struct tty_struct *tty ) ;
void (*start)(struct tty_struct *tty ) ;
void (*hangup)(struct tty_struct *tty ) ;
int (*break_ctl)(struct tty_struct *tty , int state ) ;
void (*flush_buffer)(struct tty_struct *tty ) ;
void (*set_ldisc)(struct tty_struct *tty ) ;
void (*wait_until_sent)(struct tty_struct *tty , int timeout ) ;
void (*send_xchar)(struct tty_struct *tty , char ch ) ;
int (*read_proc)(char *page , char **start , off_t off , int count , int *eof ,
void *data ) ;
int (*tiocmget)(struct tty_struct *tty , struct file *file ) ;
int (*tiocmset)(struct tty_struct *tty , struct file *file , unsigned int set ,
unsigned int clear ) ;
int (*resize)(struct tty_struct *tty , struct tty_struct *real_tty , struct winsize *ws ) ;
int (*set_termiox)(struct tty_struct *tty , struct termiox *tnew ) ;
int (*poll_init)(struct tty_driver *driver , int line , char *options ) ;
int (*poll_get_char)(struct tty_driver *driver , int line ) ;
void (*poll_put_char)(struct tty_driver *driver , int line , char ch ) ;
};
struct tty_driver {
int magic ;
struct kref kref ;
struct cdev cdev ;
struct module *owner ;
char const *driver_name ;
char const *name ;
int name_base ;
int major ;
int minor_start ;
int minor_num ;
int num ;
short type ;
short subtype ;
struct ktermios init_termios ;
int flags ;
struct proc_dir_entry *proc_entry ;
struct tty_driver *other ;
struct tty_struct **ttys ;
struct ktermios **termios ;
struct ktermios **termios_locked ;
void *driver_state ;
struct tty_operations const *ops ;
struct list_head tty_drivers ;
};
struct tty_ldisc_ops {
int magic ;
char *name ;
int num ;
int flags ;
int (*open)(struct tty_struct * ) ;
void (*close)(struct tty_struct * ) ;
void (*flush_buffer)(struct tty_struct *tty ) ;
ssize_t (*chars_in_buffer)(struct tty_struct *tty ) ;
ssize_t (*read)(struct tty_struct *tty , struct file *file , unsigned char *buf ,
size_t nr ) ;
ssize_t (*write)(struct tty_struct *tty , struct file *file , unsigned char const *buf ,
size_t nr ) ;
int (*ioctl)(struct tty_struct *tty , struct file *file , unsigned int cmd , unsigned long arg ) ;
long (*compat_ioctl)(struct tty_struct *tty , struct file *file , unsigned int cmd ,
unsigned long arg ) ;
void (*set_termios)(struct tty_struct *tty , struct ktermios *old ) ;
unsigned int (*poll)(struct tty_struct * , struct file * , struct poll_table_struct * ) ;
int (*hangup)(struct tty_struct *tty ) ;
void (*receive_buf)(struct tty_struct * , unsigned char const *cp , char *fp ,
int count ) ;
void (*write_wakeup)(struct tty_struct * ) ;
struct module *owner ;
int refcount ;
};
struct tty_ldisc {
struct tty_ldisc_ops *ops ;
int refcount ;
};
struct tty_buffer {
struct tty_buffer *next ;
char *char_buf_ptr ;
unsigned char *flag_buf_ptr ;
int used ;
int size ;
int commit ;
int read ;
unsigned long data[0] ;
};
struct tty_bufhead {
struct delayed_work work ;
spinlock_t lock ;
struct tty_buffer *head ;
struct tty_buffer *tail ;
struct tty_buffer *free ;
int memory_used ;
};
struct tty_port {
struct tty_struct *tty ;
spinlock_t lock ;
int blocked_open ;
int count ;
wait_queue_head_t open_wait ;
wait_queue_head_t close_wait ;
unsigned long flags ;
struct mutex mutex ;
unsigned char *xmit_buf ;
int close_delay ;
int closing_wait ;
};
struct tty_struct {
int magic ;
struct kref kref ;
struct tty_driver *driver ;
struct tty_operations const *ops ;
int index ;
struct tty_ldisc ldisc ;
struct mutex termios_mutex ;
spinlock_t ctrl_lock ;
struct ktermios *termios ;
struct ktermios *termios_locked ;
struct termiox *termiox ;
char name[64] ;
struct pid *pgrp ;
struct pid *session ;
unsigned long flags ;
int count ;
struct winsize winsize ;
unsigned char stopped : 1 ;
unsigned char hw_stopped : 1 ;
unsigned char flow_stopped : 1 ;
unsigned char packet : 1 ;
unsigned char low_latency : 1 ;
unsigned char warned : 1 ;
unsigned char ctrl_status ;
unsigned int receive_room ;
struct tty_struct *link ;
struct fasync_struct *fasync ;
struct tty_bufhead buf ;
int alt_speed ;
wait_queue_head_t write_wait ;
wait_queue_head_t read_wait ;
struct work_struct hangup_work ;
void *disc_data ;
void *driver_data ;
struct list_head tty_files ;
unsigned int column ;
unsigned char lnext : 1 ;
unsigned char erasing : 1 ;
unsigned char raw : 1 ;
unsigned char real_raw : 1 ;
unsigned char icanon : 1 ;
unsigned char closing : 1 ;
unsigned short minimum_to_wake ;
unsigned long overrun_time ;
int num_overrun ;
unsigned long process_char_map[256UL / (8UL * sizeof(unsigned long ))] ;
char *read_buf ;
int read_head ;
int read_tail ;
int read_cnt ;
unsigned long read_flags[4096UL / (8UL * sizeof(unsigned long ))] ;
int canon_data ;
unsigned long canon_head ;
unsigned int canon_column ;
struct mutex atomic_read_lock ;
struct mutex atomic_write_lock ;
unsigned char *write_buf ;
int write_cnt ;
spinlock_t read_lock ;
struct work_struct SAK_work ;
struct tty_port *port ;
};
struct sysrq_key_op {
void (*handler)(int , struct tty_struct * ) ;
char *help_msg ;
char *action_msg ;
int enable_mask ;
};
struct fb_fix_screeninfo {
char id[16] ;
unsigned long smem_start ;
__u32 smem_len ;
__u32 type ;
__u32 type_aux ;
__u32 visual ;
__u16 xpanstep ;
__u16 ypanstep ;
__u16 ywrapstep ;
__u32 line_length ;
unsigned long mmio_start ;
__u32 mmio_len ;
__u32 accel ;
__u16 reserved[3] ;
};
struct fb_bitfield {
__u32 offset ;
__u32 length ;
__u32 msb_right ;
};
struct fb_var_screeninfo {
__u32 xres ;
__u32 yres ;
__u32 xres_virtual ;
__u32 yres_virtual ;
__u32 xoffset ;
__u32 yoffset ;
__u32 bits_per_pixel ;
__u32 grayscale ;
struct fb_bitfield red ;
struct fb_bitfield green ;
struct fb_bitfield blue ;
struct fb_bitfield transp ;
__u32 nonstd ;
__u32 activate ;
__u32 height ;
__u32 width ;
__u32 accel_flags ;
__u32 pixclock ;
__u32 left_margin ;
__u32 right_margin ;
__u32 upper_margin ;
__u32 lower_margin ;
__u32 hsync_len ;
__u32 vsync_len ;
__u32 sync ;
__u32 vmode ;
__u32 rotate ;
__u32 reserved[5] ;
};
struct fb_cmap {
__u32 start ;
__u32 len ;
__u16 *red ;
__u16 *green ;
__u16 *blue ;
__u16 *transp ;
};
enum __anonenum_132 {
FB_BLANK_UNBLANK = 0,
FB_BLANK_NORMAL = 0 + 1,
FB_BLANK_VSYNC_SUSPEND = 1 + 1,
FB_BLANK_HSYNC_SUSPEND = 2 + 1,
FB_BLANK_POWERDOWN = 3 + 1
} ;
struct fb_copyarea {
__u32 dx ;
__u32 dy ;
__u32 width ;
__u32 height ;
__u32 sx ;
__u32 sy ;
};
struct fb_fillrect {
__u32 dx ;
__u32 dy ;
__u32 width ;
__u32 height ;
__u32 color ;
__u32 rop ;
};
struct fb_image {
__u32 dx ;
__u32 dy ;
__u32 width ;
__u32 height ;
__u32 fg_color ;
__u32 bg_color ;
__u8 depth ;
char const *data ;
struct fb_cmap cmap ;
};
struct fbcurpos {
__u16 x ;
__u16 y ;
};
struct fb_cursor {
__u16 set ;
__u16 enable ;
__u16 rop ;
char const *mask ;
struct fbcurpos hot ;
struct fb_image image ;
};
struct backlight_device;
struct fb_info;
struct backlight_ops {
int (*update_status)(struct backlight_device * ) ;
int (*get_brightness)(struct backlight_device * ) ;
int (*check_fb)(struct fb_info * ) ;
};
struct backlight_properties {
int brightness ;
int max_brightness ;
int power ;
int fb_blank ;
};
struct backlight_device {
struct backlight_properties props ;
struct mutex update_lock ;
struct mutex ops_lock ;
struct backlight_ops *ops ;
struct notifier_block fb_notif ;
struct device dev ;
};
struct fb_chroma {
__u32 redx ;
__u32 greenx ;
__u32 bluex ;
__u32 whitex ;
__u32 redy ;
__u32 greeny ;
__u32 bluey ;
__u32 whitey ;
};
struct fb_videomode;
struct fb_monspecs {
struct fb_chroma chroma ;
struct fb_videomode *modedb ;
__u8 manufacturer[4] ;
__u8 monitor[14] ;
__u8 serial_no[14] ;
__u8 ascii[14] ;
__u32 modedb_len ;
__u32 model ;
__u32 serial ;
__u32 year ;
__u32 week ;
__u32 hfmin ;
__u32 hfmax ;
__u32 dclkmin ;
__u32 dclkmax ;
__u16 input ;
__u16 dpms ;
__u16 signal ;
__u16 vfmin ;
__u16 vfmax ;
__u16 gamma ;
__u16 gtf : 1 ;
__u16 misc ;
__u8 version ;
__u8 revision ;
__u8 max_x ;
__u8 max_y ;
};
struct fb_blit_caps {
u32 x ;
u32 y ;
u32 len ;
u32 flags ;
};
struct fb_pixmap {
u8 *addr ;
u32 size ;
u32 offset ;
u32 buf_align ;
u32 scan_align ;
u32 access_align ;
u32 flags ;
u32 blit_x ;
u32 blit_y ;
void (*writeio)(struct fb_info *info , void *dst , void *src , unsigned int size ) ;
void (*readio)(struct fb_info *info , void *dst , void *src , unsigned int size ) ;
};
struct fb_deferred_io {
unsigned long delay ;
struct mutex lock ;
struct list_head pagelist ;
void (*deferred_io)(struct fb_info *info , struct list_head *pagelist ) ;
};
struct fb_ops {
struct module *owner ;
int (*fb_open)(struct fb_info *info , int user ) ;
int (*fb_release)(struct fb_info *info , int user ) ;
ssize_t (*fb_read)(struct fb_info *info , char *buf , size_t count , loff_t *ppos ) ;
ssize_t (*fb_write)(struct fb_info *info , char const *buf , size_t count , loff_t *ppos ) ;
int (*fb_check_var)(struct fb_var_screeninfo *var , struct fb_info *info ) ;
int (*fb_set_par)(struct fb_info *info ) ;
int (*fb_setcolreg)(unsigned int regno , unsigned int red , unsigned int green ,
unsigned int blue , unsigned int transp , struct fb_info *info ) ;
int (*fb_setcmap)(struct fb_cmap *cmap , struct fb_info *info ) ;
int (*fb_blank)(int blank , struct fb_info *info ) ;
int (*fb_pan_display)(struct fb_var_screeninfo *var , struct fb_info *info ) ;
void (*fb_fillrect)(struct fb_info *info , struct fb_fillrect const *rect ) ;
void (*fb_copyarea)(struct fb_info *info , struct fb_copyarea const *region ) ;
void (*fb_imageblit)(struct fb_info *info , struct fb_image const *image ) ;
int (*fb_cursor)(struct fb_info *info , struct fb_cursor *cursor ) ;
void (*fb_rotate)(struct fb_info *info , int angle ) ;
int (*fb_sync)(struct fb_info *info ) ;
int (*fb_ioctl)(struct fb_info *info , unsigned int cmd , unsigned long arg ) ;
int (*fb_compat_ioctl)(struct fb_info *info , unsigned int cmd , unsigned long arg ) ;
int (*fb_mmap)(struct fb_info *info , struct vm_area_struct *vma ) ;
void (*fb_save_state)(struct fb_info *info ) ;
void (*fb_restore_state)(struct fb_info *info ) ;
void (*fb_get_caps)(struct fb_info *info , struct fb_blit_caps *caps , struct fb_var_screeninfo *var ) ;
};
struct fb_tilemap {
__u32 width ;
__u32 height ;
__u32 depth ;
__u32 length ;
__u8 const *data ;
};
struct fb_tilerect {
__u32 sx ;
__u32 sy ;
__u32 width ;
__u32 height ;
__u32 index ;
__u32 fg ;
__u32 bg ;
__u32 rop ;
};
struct fb_tilearea {
__u32 sx ;
__u32 sy ;
__u32 dx ;
__u32 dy ;
__u32 width ;
__u32 height ;
};
struct fb_tileblit {
__u32 sx ;
__u32 sy ;
__u32 width ;
__u32 height ;
__u32 fg ;
__u32 bg ;
__u32 length ;
__u32 *indices ;
};
struct fb_tilecursor {
__u32 sx ;
__u32 sy ;
__u32 mode ;
__u32 shape ;
__u32 fg ;
__u32 bg ;
};
struct fb_tile_ops {
void (*fb_settile)(struct fb_info *info , struct fb_tilemap *map ) ;
void (*fb_tilecopy)(struct fb_info *info , struct fb_tilearea *area ) ;
void (*fb_tilefill)(struct fb_info *info , struct fb_tilerect *rect ) ;
void (*fb_tileblit)(struct fb_info *info , struct fb_tileblit *blit ) ;
void (*fb_tilecursor)(struct fb_info *info , struct fb_tilecursor *cursor ) ;
int (*fb_get_tilemax)(struct fb_info *info ) ;
};
struct fb_info {
int node ;
int flags ;
struct mutex lock ;
struct fb_var_screeninfo var ;
struct fb_fix_screeninfo fix ;
struct fb_monspecs monspecs ;
struct work_struct queue ;
struct fb_pixmap pixmap ;
struct fb_pixmap sprite ;
struct fb_cmap cmap ;
struct list_head modelist ;
struct fb_videomode *mode ;
struct backlight_device *bl_dev ;
struct mutex bl_curve_mutex ;
u8 bl_curve[128] ;
struct delayed_work deferred_work ;
struct fb_deferred_io *fbdefio ;
struct fb_ops *fbops ;
struct device *device ;
struct device *dev ;
int class_flag ;
struct fb_tile_ops *tileops ;
char *screen_base ;
unsigned long screen_size ;
void *pseudo_palette ;
u32 state ;
void *fbcon_par ;
void *par ;
};
struct fb_videomode {
char const *name ;
u32 refresh ;
u32 xres ;
u32 yres ;
u32 pixclock ;
u32 left_margin ;
u32 right_margin ;
u32 upper_margin ;
u32 lower_margin ;
u32 hsync_len ;
u32 vsync_len ;
u32 sync ;
u32 vmode ;
u32 flag ;
};
struct intelfb_par {
struct drm_device *dev ;
struct drm_display_mode *our_mode ;
struct intel_framebuffer *intel_fb ;
int crtc_count ;
uint32_t crtc_ids[2] ;
};
enum __anonenum_1___5 {
false___5 = 0,
true___5 = 1
} ;
enum hrtimer_restart;
enum tv_margin {
TV_MARGIN_LEFT = 0,
TV_MARGIN_TOP = 1,
TV_MARGIN_RIGHT = 2,
TV_MARGIN_BOTTOM = 3
} ;
struct intel_tv_priv {
int type ;
char *tv_format ;
int margin[4] ;
u32 save_TV_H_CTL_1 ;
u32 save_TV_H_CTL_2 ;
u32 save_TV_H_CTL_3 ;
u32 save_TV_V_CTL_1 ;
u32 save_TV_V_CTL_2 ;
u32 save_TV_V_CTL_3 ;
u32 save_TV_V_CTL_4 ;
u32 save_TV_V_CTL_5 ;
u32 save_TV_V_CTL_6 ;
u32 save_TV_V_CTL_7 ;
u32 save_TV_SC_CTL_1 ;
u32 save_TV_SC_CTL_2 ;
u32 save_TV_SC_CTL_3 ;
u32 save_TV_CSC_Y ;
u32 save_TV_CSC_Y2 ;
u32 save_TV_CSC_U ;
u32 save_TV_CSC_U2 ;
u32 save_TV_CSC_V ;
u32 save_TV_CSC_V2 ;
u32 save_TV_CLR_KNOBS ;
u32 save_TV_CLR_LEVEL ;
u32 save_TV_WIN_POS ;
u32 save_TV_WIN_SIZE ;
u32 save_TV_FILTER_CTL_1 ;
u32 save_TV_FILTER_CTL_2 ;
u32 save_TV_FILTER_CTL_3 ;
u32 save_TV_H_LUMA[60] ;
u32 save_TV_H_CHROMA[60] ;
u32 save_TV_V_LUMA[43] ;
u32 save_TV_V_CHROMA[43] ;
u32 save_TV_DAC ;
u32 save_TV_CTL ;
};
struct video_levels {
int blank ;
int black ;
int burst ;
};
struct color_conversion {
u16 ry ;
u16 gy ;
u16 by ;
u16 ay ;
u16 ru ;
u16 gu ;
u16 bu ;
u16 au ;
u16 rv ;
u16 gv ;
u16 bv ;
u16 av ;
};
struct tv_mode {
char *name ;
int clock ;
int refresh ;
u32 oversample ;
int hsync_end ;
int hblank_start ;
int hblank_end ;
int htotal ;
bool progressive ;
bool trilevel_sync ;
bool component_only ;
int vsync_start_f1 ;
int vsync_start_f2 ;
int vsync_len ;
bool veq_ena ;
int veq_start_f1 ;
int veq_start_f2 ;
int veq_len ;
int vi_end_f1 ;
int vi_end_f2 ;
int nbr_end ;
bool burst_ena ;
int hburst_start ;
int hburst_len ;
int vburst_start_f1 ;
int vburst_end_f1 ;
int vburst_start_f2 ;
int vburst_end_f2 ;
int vburst_start_f3 ;
int vburst_end_f3 ;
int vburst_start_f4 ;
int vburst_end_f4 ;
int dda2_size ;
int dda3_size ;
int dda1_inc ;
int dda2_inc ;
int dda3_inc ;
u32 sc_reset ;
bool pal_burst ;
struct video_levels const *composite_levels ;
struct video_levels const *svideo_levels ;
struct color_conversion const *composite_color ;
struct color_conversion const *svideo_color ;
u32 const *filter_table ;
int max_srcw ;
};
struct input_res {
char *name ;
int w ;
int h ;
};
enum __anonenum_1___6 {
false___6 = 0,
true___6 = 1
} ;
enum hrtimer_restart;
struct intel_dvo_dev_ops;
struct intel_dvo_device {
char *name ;
int type ;
u32 dvo_reg ;
u32 gpio ;
int slave_addr ;
struct intel_i2c_chan *i2c_bus ;
struct intel_dvo_dev_ops const *dev_ops ;
void *dev_priv ;
struct drm_display_mode *panel_fixed_mode ;
bool panel_wants_dither ;
};
struct intel_dvo_dev_ops {
bool (*init)(struct intel_dvo_device *dvo , struct intel_i2c_chan *i2cbus ) ;
void (*create_resources)(struct intel_dvo_device *dvo ) ;
void (*dpms)(struct intel_dvo_device *dvo , int mode ) ;
void (*save)(struct intel_dvo_device *dvo ) ;
void (*restore)(struct intel_dvo_device *dvo ) ;
int (*mode_valid)(struct intel_dvo_device *dvo , struct drm_display_mode *mode ) ;
bool (*mode_fixup)(struct intel_dvo_device *dvo , struct drm_display_mode *mode ,
struct drm_display_mode *adjusted_mode ) ;
void (*prepare)(struct intel_dvo_device *dvo ) ;
void (*commit)(struct intel_dvo_device *dvo ) ;
void (*mode_set)(struct intel_dvo_device *dvo , struct drm_display_mode *mode ,
struct drm_display_mode *adjusted_mode ) ;
enum drm_connector_status (*detect)(struct intel_dvo_device *dvo ) ;
struct drm_display_mode *(*get_modes)(struct intel_dvo_device *dvo ) ;
void (*destroy)(struct intel_dvo_device *dvo ) ;
void (*dump_regs)(struct intel_dvo_device *dvo ) ;
};
enum __anonenum_1___7 {
false___7 = 0,
true___7 = 1
} ;
enum hrtimer_restart;
struct ch7xxx_id_struct {
uint8_t vid ;
char *name ;
};
struct ch7xxx_reg_state {
uint8_t regs[76] ;
};
struct ch7xxx_priv {
bool quiet ;
struct ch7xxx_reg_state save_reg ;
struct ch7xxx_reg_state mode_reg ;
uint8_t save_TCTL ;
uint8_t save_TPCP ;
uint8_t save_TPD ;
uint8_t save_TPVT ;
uint8_t save_TLPF ;
uint8_t save_TCT ;
uint8_t save_PM ;
uint8_t save_IDF ;
};
enum __anonenum_1___8 {
false___8 = 0,
true___8 = 1
} ;
enum hrtimer_restart;
struct ch7017_priv {
uint8_t save_hapi ;
uint8_t save_vali ;
uint8_t save_valo ;
uint8_t save_ailo ;
uint8_t save_lvds_pll_vco ;
uint8_t save_feedback_div ;
uint8_t save_lvds_control_2 ;
uint8_t save_outputs_enable ;
uint8_t save_lvds_power_down ;
uint8_t save_power_management ;
};
enum __anonenum_1___9 {
false___9 = 0,
true___9 = 1
} ;
enum hrtimer_restart;
struct ivch_priv {
bool quiet ;
uint16_t width ;
uint16_t height ;
uint16_t save_VR01 ;
uint16_t save_VR40 ;
};
enum __anonenum_1___10 {
false___10 = 0,
true___10 = 1
} ;
enum hrtimer_restart;
struct tfp410_save_rec {
uint8_t ctl1 ;
uint8_t ctl2 ;
};
struct tfp410_priv {
bool quiet ;
struct tfp410_save_rec saved_reg ;
struct tfp410_save_rec mode_reg ;
};
enum __anonenum_1___11 {
false___11 = 0,
true___11 = 1
} ;
enum hrtimer_restart;
struct sil164_save_rec {
uint8_t reg8 ;
uint8_t reg9 ;
uint8_t regc ;
};
struct sil164_priv {
bool quiet ;
struct sil164_save_rec save_regs ;
struct sil164_save_rec mode_regs ;
};
enum hrtimer_restart;
#pragma pack(1)
#pragma pack()
#pragma pack(1)
#pragma pack()
#pragma pack(1)
#pragma pack()
#pragma pack(8)
#pragma pack()
struct opregion_header {
u8 signature[16] ;
u32 size ;
u32 opregion_ver ;
u8 bios_ver[32] ;
u8 vbios_ver[16] ;
u8 driver_ver[16] ;
u32 mboxes ;
u8 reserved[164] ;
} __attribute__((__packed__)) ;
struct opregion_acpi {
u32 drdy ;
u32 csts ;
u32 cevt ;
u8 rsvd1[20] ;
u32 didl[8] ;
u32 cpdl[8] ;
u32 cadl[8] ;
u32 nadl[8] ;
u32 aslp ;
u32 tidx ;
u32 chpd ;
u32 clid ;
u32 cdck ;
u32 sxsw ;
u32 evts ;
u32 cnot ;
u32 nrdy ;
u8 rsvd2[60] ;
} __attribute__((__packed__)) ;
struct opregion_swsci {
u32 scic ;
u32 parm ;
u32 dslp ;
u8 rsvd[244] ;
} __attribute__((__packed__)) ;
struct opregion_asle {
u32 ardy ;
u32 aslc ;
u32 tche ;
u32 alsi ;
u32 bclp ;
u32 pfit ;
u32 cblv ;
u16 bclm[20] ;
u32 cpfm ;
u32 epfm ;
u8 plut[74] ;
u32 pfmb ;
u8 rsvd[102] ;
} __attribute__((__packed__)) ;
enum hrtimer_restart;
typedef int drm_ioctl_compat_t(struct file *filp , unsigned int cmd , unsigned long arg );
struct _drm_i915_batchbuffer32 {
int start ;
int used ;
int DR1 ;
int DR4 ;
int num_cliprects ;
u32 cliprects ;
};
typedef struct _drm_i915_batchbuffer32 drm_i915_batchbuffer32_t;
struct _drm_i915_cmdbuffer32 {
u32 buf ;
int sz ;
int DR1 ;
int DR4 ;
int num_cliprects ;
u32 cliprects ;
};
typedef struct _drm_i915_cmdbuffer32 drm_i915_cmdbuffer32_t;
struct drm_i915_irq_emit32 {
u32 irq_seq ;
};
typedef struct drm_i915_irq_emit32 drm_i915_irq_emit32_t;
struct drm_i915_getparam32 {
int param ;
u32 value ;
};
typedef struct drm_i915_getparam32 drm_i915_getparam32_t;
struct drm_i915_mem_alloc32 {
int region ;
int alignment ;
int size ;
u32 region_offset ;
};
typedef struct drm_i915_mem_alloc32 drm_i915_mem_alloc32_t;
typedef __u16 __le16;
enum hrtimer_restart;
struct usb_device_descriptor {
__u8 bLength ;
__u8 bDescriptorType ;
__le16 bcdUSB ;
__u8 bDeviceClass ;
__u8 bDeviceSubClass ;
__u8 bDeviceProtocol ;
__u8 bMaxPacketSize0 ;
__le16 idVendor ;
__le16 idProduct ;
__le16 bcdDevice ;
__u8 iManufacturer ;
__u8 iProduct ;
__u8 iSerialNumber ;
__u8 bNumConfigurations ;
} __attribute__((__packed__)) ;
struct usb_config_descriptor {
__u8 bLength ;
__u8 bDescriptorType ;
__le16 wTotalLength ;
__u8 bNumInterfaces ;
__u8 bConfigurationValue ;
__u8 iConfiguration ;
__u8 bmAttributes ;
__u8 bMaxPower ;
} __attribute__((__packed__)) ;
struct usb_interface_descriptor {
__u8 bLength ;
__u8 bDescriptorType ;
__u8 bInterfaceNumber ;
__u8 bAlternateSetting ;
__u8 bNumEndpoints ;
__u8 bInterfaceClass ;
__u8 bInterfaceSubClass ;
__u8 bInterfaceProtocol ;
__u8 iInterface ;
} __attribute__((__packed__)) ;
struct usb_endpoint_descriptor {
__u8 bLength ;
__u8 bDescriptorType ;
__u8 bEndpointAddress ;
__u8 bmAttributes ;
__le16 wMaxPacketSize ;
__u8 bInterval ;
__u8 bRefresh ;
__u8 bSynchAddress ;
} __attribute__((__packed__)) ;
struct usb_interface_assoc_descriptor {
__u8 bLength ;
__u8 bDescriptorType ;
__u8 bFirstInterface ;
__u8 bInterfaceCount ;
__u8 bFunctionClass ;
__u8 bFunctionSubClass ;
__u8 bFunctionProtocol ;
__u8 iFunction ;
} __attribute__((__packed__)) ;
enum usb_device_speed {
USB_SPEED_UNKNOWN = 0,
USB_SPEED_LOW = 1,
USB_SPEED_FULL = 2,
USB_SPEED_HIGH = 3,
USB_SPEED_VARIABLE = 4
} ;
enum usb_device_state {
USB_STATE_NOTATTACHED = 0,
USB_STATE_ATTACHED = 1,
USB_STATE_POWERED = 2,
USB_STATE_UNAUTHENTICATED = 3,
USB_STATE_RECONNECTING = 4,
USB_STATE_DEFAULT = 5,
USB_STATE_ADDRESS = 6,
USB_STATE_CONFIGURED = 7,
USB_STATE_SUSPENDED = 8
} ;
struct usb_device;
struct wusb_dev;
struct ep_device;
struct usb_host_endpoint {
struct usb_endpoint_descriptor desc ;
struct list_head urb_list ;
void *hcpriv ;
struct ep_device *ep_dev ;
unsigned char *extra ;
int extralen ;
int enabled ;
};
struct usb_host_interface {
struct usb_interface_descriptor desc ;
struct usb_host_endpoint *endpoint ;
char *string ;
unsigned char *extra ;
int extralen ;
};
enum usb_interface_condition {
USB_INTERFACE_UNBOUND = 0,
USB_INTERFACE_BINDING = 1,
USB_INTERFACE_BOUND = 2,
USB_INTERFACE_UNBINDING = 3
} ;
struct usb_interface {
struct usb_host_interface *altsetting ;
struct usb_host_interface *cur_altsetting ;
unsigned int num_altsetting ;
struct usb_interface_assoc_descriptor *intf_assoc ;
int minor ;
enum usb_interface_condition condition ;
unsigned int is_active : 1 ;
unsigned int sysfs_files_created : 1 ;
unsigned int unregistering : 1 ;
unsigned int needs_remote_wakeup : 1 ;
unsigned int needs_altsetting0 : 1 ;
unsigned int needs_binding : 1 ;
struct device dev ;
struct device *usb_dev ;
int pm_usage_cnt ;
};
struct usb_interface_cache {
unsigned int num_altsetting ;
struct kref ref ;
struct usb_host_interface altsetting[0] ;
};
struct usb_host_config {
struct usb_config_descriptor desc ;
char *string ;
struct usb_interface_assoc_descriptor *intf_assoc[32 / 2] ;
struct usb_interface *interface[32] ;
struct usb_interface_cache *intf_cache[32] ;
unsigned char *extra ;
int extralen ;
};
struct usb_devmap {
unsigned long devicemap[128UL / (8UL * sizeof(unsigned long ))] ;
};
struct mon_bus;
struct usb_bus {
struct device *controller ;
int busnum ;
char const *bus_name ;
u8 uses_dma ;
u8 otg_port ;
unsigned int is_b_host : 1 ;
unsigned int b_hnp_enable : 1 ;
int devnum_next ;
struct usb_devmap devmap ;
struct usb_device *root_hub ;
struct list_head bus_list ;
int bandwidth_allocated ;
int bandwidth_int_reqs ;
int bandwidth_isoc_reqs ;
struct dentry *usbfs_dentry ;
struct device *dev ;
struct mon_bus *mon_bus ;
int monitored ;
};
struct usb_tt;
struct usb_device {
int devnum ;
char devpath[16] ;
enum usb_device_state state ;
enum usb_device_speed speed ;
struct usb_tt *tt ;
int ttport ;
unsigned int toggle[2] ;
struct usb_device *parent ;
struct usb_bus *bus ;
struct usb_host_endpoint ep0 ;
struct device dev ;
struct usb_device_descriptor descriptor ;
struct usb_host_config *config ;
struct usb_host_config *actconfig ;
struct usb_host_endpoint *ep_in[16] ;
struct usb_host_endpoint *ep_out[16] ;
char **rawdescriptors ;
unsigned short bus_mA ;
u8 portnum ;
u8 level ;
unsigned int can_submit : 1 ;
unsigned int discon_suspended : 1 ;
unsigned int persist_enabled : 1 ;
unsigned int have_langid : 1 ;
unsigned int authorized : 1 ;
unsigned int authenticated : 1 ;
unsigned int wusb : 1 ;
int string_langid ;
char *product ;
char *manufacturer ;
char *serial ;
struct list_head filelist ;
struct device *usb_classdev ;
struct dentry *usbfs_dentry ;
int maxchild ;
struct usb_device *children[31] ;
int pm_usage_cnt ;
u32 quirks ;
atomic_t urbnum ;
unsigned long active_duration ;
struct delayed_work autosuspend ;
struct mutex pm_mutex ;
unsigned long last_busy ;
int autosuspend_delay ;
unsigned long connect_time ;
unsigned int auto_pm : 1 ;
unsigned int do_remote_wakeup : 1 ;
unsigned int reset_resume : 1 ;
unsigned int autosuspend_disabled : 1 ;
unsigned int autoresume_disabled : 1 ;
unsigned int skip_sys_resume : 1 ;
struct wusb_dev *wusb_dev ;
};
struct usb_iso_packet_descriptor {
unsigned int offset ;
unsigned int length ;
unsigned int actual_length ;
int status ;
};
struct urb;
struct usb_anchor {
struct list_head urb_list ;
wait_queue_head_t wait ;
spinlock_t lock ;
unsigned int poisoned : 1 ;
};
struct urb {
struct kref kref ;
void *hcpriv ;
atomic_t use_count ;
u8 reject ;
int unlinked ;
struct list_head urb_list ;
struct list_head anchor_list ;
struct usb_anchor *anchor ;
struct usb_device *dev ;
struct usb_host_endpoint *ep ;
unsigned int pipe ;
int status ;
unsigned int transfer_flags ;
void *transfer_buffer ;
dma_addr_t transfer_dma ;
int transfer_buffer_length ;
int actual_length ;
unsigned char *setup_packet ;
dma_addr_t setup_dma ;
int start_frame ;
int number_of_packets ;
int interval ;
int error_count ;
void *context ;
void (*complete)(struct urb * ) ;
struct usb_iso_packet_descriptor iso_frame_desc[0] ;
};
extern int ( /* format attribute */ printk)(char const *fmt , ...) ;
extern int param_set_int(char const *val , struct kernel_param *kp ) ;
extern int param_get_int(char *buffer , struct kernel_param *kp ) ;
int init_module(void) ;
void cleanup_module(void) ;
extern struct module __this_module ;
extern int ( __attribute__((__warn_unused_result__)) pci_enable_device)(struct pci_dev *dev ) ;
extern void pci_disable_device(struct pci_dev *dev ) ;
extern void pci_set_master(struct pci_dev *dev ) ;
extern int pci_save_state(struct pci_dev *dev ) ;
extern int pci_restore_state(struct pci_dev *dev ) ;
extern int pci_set_power_state(struct pci_dev *dev , pci_power_t state ) ;
extern int drm_init(struct drm_driver *driver ) ;
extern void drm_exit(struct drm_driver *driver ) ;
extern int drm_ioctl(struct inode *inode , struct file *filp , unsigned int cmd ,
unsigned long arg ) ;
extern int drm_open(struct inode *inode , struct file *filp ) ;
extern int drm_fasync(int fd , struct file *filp , int on ) ;
extern int drm_release(struct inode *inode , struct file *filp ) ;
extern unsigned long drm_core_get_map_ofs(struct drm_map *map ) ;
extern unsigned long drm_core_get_reg_ofs(struct drm_device *dev ) ;
extern unsigned int drm_poll(struct file *filp , struct poll_table_struct *wait ) ;
extern void drm_core_reclaim_buffers(struct drm_device *dev , struct drm_file *filp ) ;
extern int drm_gem_mmap(struct file *filp , struct vm_area_struct *vma ) ;
struct drm_ioctl_desc i915_ioctls[37] ;
int i915_max_ioctl ;
unsigned int i915_fbpercrtc ;
int i915_master_create(struct drm_device *dev , struct drm_master *master ) ;
void i915_master_destroy(struct drm_device *dev , struct drm_master *master ) ;
int i915_driver_load(struct drm_device *dev , unsigned long flags ) ;
int i915_driver_unload(struct drm_device *dev ) ;
int i915_driver_open(struct drm_device *dev , struct drm_file *file_priv ) ;
void i915_driver_lastclose(struct drm_device *dev ) ;
void i915_driver_preclose(struct drm_device *dev , struct drm_file *file_priv ) ;
void i915_driver_postclose(struct drm_device *dev , struct drm_file *file_priv ) ;
int i915_driver_device_is_agp(struct drm_device *dev ) ;
long i915_compat_ioctl(struct file *filp , unsigned int cmd , unsigned long arg ) ;
irqreturn_t i915_driver_irq_handler(int irq , void *arg ) ;
void i915_driver_irq_preinstall(struct drm_device *dev ) ;
int i915_driver_irq_postinstall(struct drm_device *dev ) ;
void i915_driver_irq_uninstall(struct drm_device *dev ) ;
int i915_enable_vblank(struct drm_device *dev , int pipe ) ;
void i915_disable_vblank(struct drm_device *dev , int pipe ) ;
u32 i915_get_vblank_counter(struct drm_device *dev , int pipe ) ;
int i915_gem_proc_init(struct drm_minor *minor ) ;
void i915_gem_proc_cleanup(struct drm_minor *minor ) ;
int i915_gem_init_object(struct drm_gem_object *obj ) ;
void i915_gem_free_object(struct drm_gem_object *obj ) ;
int i915_gem_fault(struct vm_area_struct *vma , struct vm_fault *vmf ) ;
int i915_save_state(struct drm_device *dev ) ;
int i915_restore_state(struct drm_device *dev ) ;
int intel_opregion_init(struct drm_device *dev ) ;
void intel_opregion_free(struct drm_device *dev ) ;
extern bool vgacon_text_force(void) ;
static unsigned int i915_modeset = -1;
static char const __param_str_modeset[8] =
{ 'm', 'o', 'd', 'e',
's', 'e', 't', '\000'};
static struct kernel_param const __param_modeset __attribute__((__used__, __unused__,
__section__("__param"), __aligned__(sizeof(void *)))) = {__param_str_modeset, 256, & param_set_int, & param_get_int, {& i915_modeset}};
static char const __mod_modesettype40[21] __attribute__((__used__, __unused__,
__section__(".modinfo"))) =
{ 'p', 'a', 'r', 'm',
't', 'y', 'p', 'e',
'=', 'm', 'o', 'd',
'e', 's', 'e', 't',
':', 'i', 'n', 't',
'\000'};
unsigned int i915_fbpercrtc = 0;
static char const __param_str_fbpercrtc[10] =
{ 'f', 'b', 'p', 'e',
'r', 'c', 'r', 't',
'c', '\000'};
static struct kernel_param const __param_fbpercrtc __attribute__((__used__, __unused__,
__section__("__param"), __aligned__(sizeof(void *)))) = {__param_str_fbpercrtc, 256, & param_set_int, & param_get_int, {& i915_fbpercrtc}};
static char const __mod_fbpercrtctype43[23] __attribute__((__used__, __unused__,
__section__(".modinfo"))) =
{ 'p', 'a', 'r', 'm',
't', 'y', 'p', 'e',
'=', 'f', 'b', 'p',
'e', 'r', 'c', 'r',
't', 'c', ':', 'i',
'n', 't', '\000'};
static struct pci_device_id pciidlist[24] =
{ {32902, 13687, ~ 0, ~ 0, 768 << 8, 16776960, 0},
{32902, 9570, ~ 0, ~ 0, 768 << 8, 16776960, 0},
{32902, 13698, ~ 0, ~ 0, 768 << 8, 16776960, 0},
{32902, 9586, ~ 0, ~ 0, 768 << 8, 16776960, 0},
{32902, 9602, ~ 0, ~ 0, 768 << 8, 16776960, 0},
{32902, 9610, ~ 0, ~ 0, 768 << 8, 16776960, 0},
{32902, 9618, ~ 0, ~ 0, 768 << 8, 16776960, 0},
{32902, 10098, ~ 0, ~ 0, 768 << 8, 16776960, 0},
{32902, 10146, ~ 0, ~ 0, 768 << 8, 16776960, 0},
{32902, 10158, ~ 0, ~ 0, 768 << 8, 16776960, 0},
{32902, 10610, ~ 0, ~ 0, 768 << 8, 16776960, 0},
{32902, 10626, ~ 0, ~ 0, 768 << 8, 16776960, 0},
{32902, 10642, ~ 0, ~ 0, 768 << 8, 16776960, 0},
{32902, 10658, ~ 0, ~ 0, 768 << 8, 16776960, 0},
{32902, 10674, ~ 0, ~ 0, 768 << 8, 16776960, 0},
{32902, 10690, ~ 0, ~ 0, 768 << 8, 16776960, 0},
{32902, 10706, ~ 0, ~ 0, 768 << 8, 16776960, 0},
{32902, 10754, ~ 0, ~ 0, 768 << 8, 16776960, 0},
{32902, 10770, ~ 0, ~ 0, 768 << 8, 16776960, 0},
{32902, 10818, ~ 0, ~ 0, 768 << 8, 16776960, 0},
{32902, 11778, ~ 0, ~ 0, 768 << 8, 16776960, 0},
{32902, 11794, ~ 0, ~ 0, 768 << 8, 16776960, 0},
{32902, 11810, ~ 0, ~ 0, 768 << 8, 16776960, 0},
{0, 0, 0, 0U, 0U, 0U, 0UL}};
extern struct pci_device_id const __mod_pci_device_table __attribute__((__unused__,
__alias__("pciidlist"))) ;
static int i915_suspend(struct drm_device *dev , pm_message_t state )
{
struct drm_i915_private *dev_priv ;
{
dev_priv = dev->dev_private;
if (! dev || ! dev_priv) {
printk("<3>dev: %p, dev_priv: %p\n", dev, dev_priv);
printk("<3>DRM not initialized, aborting suspend.\n");
return (-19);
} else {
}
if (state.event == 8) {
return (0);
} else {
}
pci_save_state(dev->pdev);
i915_save_state(dev);
intel_opregion_free(dev);
if (state.event == 2) {
pci_disable_device(dev->pdev);
pci_set_power_state(dev->pdev, 3);
} else {
}
return (0);
}
}
static int i915_resume(struct drm_device *dev )
{
int tmp ;
{
pci_set_power_state(dev->pdev, 0);
pci_restore_state(dev->pdev);
tmp = pci_enable_device(dev->pdev);
if (tmp) {
return (-1);
} else {
}
pci_set_master(dev->pdev);
i915_restore_state(dev);
intel_opregion_init(dev);
return (0);
}
}
static struct vm_operations_struct i915_gem_vm_ops =
{0, 0, & i915_gem_fault, 0, 0, 0, 0, 0};
static struct drm_driver driver =
{& i915_driver_load, 0, & i915_driver_open, & i915_driver_preclose, & i915_driver_postclose,
& i915_driver_lastclose, & i915_driver_unload, & i915_suspend, & i915_resume,
0, 0, 0, 0, 0, 0, 0, 0, & i915_get_vblank_counter, & i915_enable_vblank, & i915_disable_vblank,
& i915_driver_device_is_agp, & i915_driver_irq_handler, & i915_driver_irq_preinstall,
& i915_driver_irq_postinstall, & i915_driver_irq_uninstall, & drm_core_reclaim_buffers,
0, 0, & drm_core_get_map_ofs, & drm_core_get_reg_ofs, 0, & i915_master_create,
& i915_master_destroy, & i915_gem_proc_init, & i915_gem_proc_cleanup, & i915_gem_init_object,
& i915_gem_free_object, & i915_gem_vm_ops, 1, 6, 0, "i915", "Intel Graphics",
"20080730", (((1 | 2) | 64) | 128) | 4096, 0, i915_ioctls, 0, {& __this_module,
0, 0, 0, 0, 0,
0, & drm_poll,
& drm_ioctl, 0,
& i915_compat_ioctl,
& drm_gem_mmap,
& drm_open, 0,
& drm_release,
0, 0, & drm_fasync,
0, 0, 0, 0, 0,
0, 0, 0, 0}, {{0,
0},
"i915",
pciidlist,
0,
0,
0,
0,
0,
0,
0,
0,
0,
{0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0},
{{{0U},
0U,
0U,
0,
{0,
0,
0,
0}},
{0,
0}}},
{0, 0}};
static int i915_init(void) __attribute__((__section__(".init.text"), __no_instrument_function__)) ;
static int i915_init(void)
{
bool tmp ;
int tmp___0 ;
{
driver.num_ioctls = i915_max_ioctl;
if (i915_modeset != 0U) {
driver.driver_features = driver.driver_features | 8192U;
} else {
}
if (i915_modeset == 1U) {
driver.driver_features = driver.driver_features | 8192U;
} else {
}
tmp = vgacon_text_force();
if (tmp && i915_modeset == 4294967295U) {
driver.driver_features = driver.driver_features & (unsigned int )(~ 8192);
} else {
}
tmp___0 = drm_init(& driver);
return (tmp___0);
}
}
static void i915_exit(void) __attribute__((__section__(".exit.text"))) ;
static void i915_exit(void)
{
{
drm_exit(& driver);
return;
}
}
int init_module(void)
{
int tmp ;
{
tmp = i915_init();
return (tmp);
}
}
void cleanup_module(void)
{
{
i915_exit();
return;
}
}
static char const __mod_author196[31] __attribute__((__used__, __unused__, __section__(".modinfo"))) =
{ 'a', 'u', 't', 'h',
'o', 'r', '=', 'T',
'u', 'n', 'g', 's',
't', 'e', 'n', ' ',
'G', 'r', 'a', 'p',
'h', 'i', 'c', 's',
',', ' ', 'I', 'n',
'c', '.', '\000'};
static char const __mod_description197[27] __attribute__((__used__, __unused__,
__section__(".modinfo"))) =
{ 'd', 'e', 's', 'c',
'r', 'i', 'p', 't',
'i', 'o', 'n', '=',
'I', 'n', 't', 'e',
'l', ' ', 'G', 'r',
'a', 'p', 'h', 'i',
'c', 's', '\000'};
static char const __mod_license198[34] __attribute__((__used__, __unused__, __section__(".modinfo"))) =
{ 'l', 'i', 'c', 'e',
'n', 's', 'e', '=',
'G', 'P', 'L', ' ',
'a', 'n', 'd', ' ',
'a', 'd', 'd', 'i',
't', 'i', 'o', 'n',
'a', 'l', ' ', 'r',
'i', 'g', 'h', 't',
's', '\000'};
void ldv_check_final_state(void) ;
extern void ldv_initialize(void) ;
extern void ldv_handler_precall(void) ;
extern int nondet_int(void) ;
int LDV_IN_INTERRUPT ;
int main(void)
{
struct drm_device *var_group1 ;
pm_message_t var_i915_suspend_0_p1 ;
int tmp ;
int tmp___0 ;
int tmp___1 ;
{
LDV_IN_INTERRUPT = 1;
ldv_initialize();
ldv_handler_precall();
tmp = i915_init();
if (tmp) {
goto ldv_final;
} else {
}
while (1) {
tmp___1 = nondet_int();
if (tmp___1) {
} else {
break;
}
tmp___0 = nondet_int();
switch (tmp___0) {
case 0:
ldv_handler_precall();
i915_suspend(var_group1, var_i915_suspend_0_p1);
break;
case 1:
ldv_handler_precall();
i915_resume(var_group1);
break;
default:
break;
}
}
ldv_handler_precall();
i915_exit();
ldv_final:
ldv_check_final_state();
return 0;
}
}
long ldv__builtin_expect(long exp , long c ) ;
extern void ( /* format attribute */ warn_slowpath)(char const *file , int const line ,
char const *fmt , ...) ;
extern void *memset(void *s , int c , size_t n ) ;
extern char *kstrdup(char const *s , gfp_t gfp ) ;
extern __attribute__((__noreturn__)) void __bad_pda_field(void) ;
extern struct x8664_pda _proxy_pda ;
__inline static struct thread_info *current_thread_info(void)
{
struct thread_info *ti ;
unsigned long ret__ ;
{
switch (sizeof(_proxy_pda.kernelstack)) {
case 2UL:
__asm__ ("mov"
"w %%gs:%c1,%0": "=r" (ret__): "i" ((unsigned int )(& ((struct x8664_pda *)0)->kernelstack)),
"m" (_proxy_pda.kernelstack));
break;
case 4UL:
__asm__ ("mov"
"l %%gs:%c1,%0": "=r" (ret__): "i" ((unsigned int )(& ((struct x8664_pda *)0)->kernelstack)),
"m" (_proxy_pda.kernelstack));
break;
case 8UL:
__asm__ ("mov"
"q %%gs:%c1,%0": "=r" (ret__): "i" ((unsigned int )(& ((struct x8664_pda *)0)->kernelstack)),
"m" (_proxy_pda.kernelstack));
break;
default:
__bad_pda_field();
}
ti = (void *)((ret__ + (unsigned long )(5 * 8)) - ((1UL << 12) << 1));
return (ti);
}
}
extern void __spin_lock_init(spinlock_t *lock , char const *name , struct lock_class_key *key ) ;
extern void mutex_lock_nested(struct mutex *lock , unsigned int subclass ) ;
extern void mutex_unlock(struct mutex *lock ) ;
extern unsigned long msleep_interruptible(unsigned int msecs ) ;
extern void kfree(void const * ) ;
extern void *__kmalloc(size_t size , gfp_t flags ) ;
__inline static void *( __attribute__((__always_inline__)) kmalloc)(size_t size ,
gfp_t flags )
{
void *tmp___2 ;
{
tmp___2 = __kmalloc(size, flags);
return (tmp___2);
}
}
__inline static void *kcalloc(size_t n , size_t size , gfp_t flags )
{
void *tmp ;
{
if (size != (size_t )0 && n > ~ 0UL / size) {
return ((void *)0);
} else {
}
tmp = __kmalloc(n * size, flags | 32768U);
return (tmp);
}
}
__inline static unsigned int readl(void const volatile *addr )
{
unsigned int ret ;
{
__asm__ volatile ("mov"
"l"
" %1,%0": "=r" (ret): "m" (*((unsigned int volatile *)addr)): "memory");
return (ret);
}
}
__inline static void writel(unsigned int val , void volatile *addr )
{
{
__asm__ volatile ("mov"
"l"
" %0,%1": : "r" (val), "m" (*((unsigned int volatile *)addr)): "memory");
return;
}
}
extern void *ioremap_nocache(resource_size_t offset , unsigned long size ) ;
__inline static void *ioremap(resource_size_t offset , unsigned long size )
{
void *tmp ;
{
tmp = ioremap_nocache(offset, size);
return (tmp);
}
}
extern void iounmap(void volatile *addr ) ;
extern void *ioremap_wc(unsigned long offset , unsigned long size ) ;
extern void pci_dev_put(struct pci_dev *dev ) ;
extern struct pci_dev *pci_get_bus_and_slot(unsigned int bus , unsigned int devfn ) ;
extern int pci_bus_read_config_word(struct pci_bus *bus , unsigned int devfn , int where ,
u16 *val ) ;
__inline static int pci_read_config_word(struct pci_dev *dev , int where , u16 *val )
{
int tmp ;
{
tmp = pci_bus_read_config_word(dev->bus, dev->devfn, where, val);
return (tmp);
}
}
extern int pci_enable_msi(struct pci_dev *dev ) ;
extern void pci_disable_msi(struct pci_dev *dev ) ;
extern unsigned long ( __attribute__((__warn_unused_result__)) copy_user_generic)(void *to ,
void const *from ,
unsigned int len ) ;
extern unsigned long ( __attribute__((__warn_unused_result__)) copy_to_user)(void *to ,
void const *from ,
unsigned int len ) ;
__inline static int ( __attribute__((__warn_unused_result__, __always_inline__)) __copy_from_user)(void *dst ,
void const *src ,
unsigned int size )
{
int ret ;
unsigned long tmp ;
long tmp___0 ;
long tmp___1 ;
unsigned long tmp___2 ;
{
ret = 0;
tmp = copy_user_generic(dst, (void *)src, size);
return (tmp);
switch (size) {
case 1U:
__asm__ volatile ("1:\tmov"
"b"
" %2,%"
"b"
"1\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3:\tmov %3,%0\n"
"\txor"
"b"
" %"
"b"
"1,%"
"b"
"1\n"
"\tjmp 2b\n"
".previous\n"
" .section __ex_table,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"1b"
","
"3b"
"\n"
" .previous\n": "=r" (ret), "=q" (*((u8 *)dst)): "m" (*((struct __large_struct *)((u8 *)src))),
"i" (1), "0" (ret));
return (ret);
case 2U:
__asm__ volatile ("1:\tmov"
"w"
" %2,%"
"w"
"1\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3:\tmov %3,%0\n"
"\txor"
"w"
" %"
"w"
"1,%"
"w"
"1\n"
"\tjmp 2b\n"
".previous\n"
" .section __ex_table,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"1b"
","
"3b"
"\n"
" .previous\n": "=r" (ret), "=r" (*((u16 *)dst)): "m" (*((struct __large_struct *)((u16 *)src))),
"i" (2), "0" (ret));
return (ret);
case 4U:
__asm__ volatile ("1:\tmov"
"l"
" %2,%"
"k"
"1\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3:\tmov %3,%0\n"
"\txor"
"l"
" %"
"k"
"1,%"
"k"
"1\n"
"\tjmp 2b\n"
".previous\n"
" .section __ex_table,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"1b"
","
"3b"
"\n"
" .previous\n": "=r" (ret), "=r" (*((u32 *)dst)): "m" (*((struct __large_struct *)((u32 *)src))),
"i" (4), "0" (ret));
return (ret);
case 8U:
__asm__ volatile ("1:\tmov"
"q"
" %2,%"
""
"1\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3:\tmov %3,%0\n"
"\txor"
"q"
" %"
""
"1,%"
""
"1\n"
"\tjmp 2b\n"
".previous\n"
" .section __ex_table,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"1b"
","
"3b"
"\n"
" .previous\n": "=r" (ret), "=r" (*((u64 *)dst)): "m" (*((struct __large_struct *)((u64 *)src))),
"i" (8), "0" (ret));
return (ret);
case 10U:
__asm__ volatile ("1:\tmov"
"q"
" %2,%"
""
"1\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3:\tmov %3,%0\n"
"\txor"
"q"
" %"
""
"1,%"
""
"1\n"
"\tjmp 2b\n"
".previous\n"
" .section __ex_table,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"1b"
","
"3b"
"\n"
" .previous\n": "=r" (ret), "=r" (*((u64 *)dst)): "m" (*((struct __large_struct *)((u64 *)src))),
"i" (10), "0" (ret));
tmp___0 = ldv__builtin_expect(! (! ret), 0);
if (tmp___0) {
return (ret);
} else {
}
__asm__ volatile ("1:\tmov"
"w"
" %2,%"
"w"
"1\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3:\tmov %3,%0\n"
"\txor"
"w"
" %"
"w"
"1,%"
"w"
"1\n"
"\tjmp 2b\n"
".previous\n"
" .section __ex_table,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"1b"
","
"3b"
"\n"
" .previous\n": "=r" (ret), "=r" (*((u16 *)((char *)dst + 8))): "m" (*((struct __large_struct *)((u16 *)((char *)src + 8)))),
"i" (2), "0" (ret));
return (ret);
case 16U:
__asm__ volatile ("1:\tmov"
"q"
" %2,%"
""
"1\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3:\tmov %3,%0\n"
"\txor"
"q"
" %"
""
"1,%"
""
"1\n"
"\tjmp 2b\n"
".previous\n"
" .section __ex_table,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"1b"
","
"3b"
"\n"
" .previous\n": "=r" (ret), "=r" (*((u64 *)dst)): "m" (*((struct __large_struct *)((u64 *)src))),
"i" (16), "0" (ret));
tmp___1 = ldv__builtin_expect(! (! ret), 0);
if (tmp___1) {
return (ret);
} else {
}
__asm__ volatile ("1:\tmov"
"q"
" %2,%"
""
"1\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3:\tmov %3,%0\n"
"\txor"
"q"
" %"
""
"1,%"
""
"1\n"
"\tjmp 2b\n"
".previous\n"
" .section __ex_table,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"1b"
","
"3b"
"\n"
" .previous\n": "=r" (ret), "=r" (*((u64 *)((char *)dst + 8))): "m" (*((struct __large_struct *)((u64 *)((char *)src + 8)))),
"i" (8), "0" (ret));
return (ret);
default:
tmp___2 = copy_user_generic(dst, (void *)src, size);
return (tmp___2);
}
}
}
__inline static int drm_core_check_feature(struct drm_device *dev , int feature )
{
{
return ((dev->driver)->driver_features & (unsigned int )feature ? 1 : 0);
}
}
extern unsigned long drm_get_resource_start(struct drm_device *dev , unsigned int resource ) ;
extern unsigned long drm_get_resource_len(struct drm_device *dev , unsigned int resource ) ;
extern int drm_irq_install(struct drm_device *dev ) ;
extern int drm_irq_uninstall(struct drm_device *dev ) ;
extern int drm_vblank_init(struct drm_device *dev , int num_crtcs ) ;
extern unsigned int drm_debug ;
extern drm_dma_handle_t *drm_pci_alloc(struct drm_device *dev , size_t size , size_t align ,
dma_addr_t maxaddr ) ;
extern void drm_pci_free(struct drm_device *dev , drm_dma_handle_t *dmah ) ;
extern int drm_mm_init(struct drm_mm *mm , unsigned long start , unsigned long size ) ;
extern void drm_mm_takedown(struct drm_mm *mm ) ;
extern void drm_core_ioremap(struct drm_map *map , struct drm_device *dev ) ;
extern void drm_core_ioremapfree(struct drm_map *map , struct drm_device *dev ) ;
__inline static void *drm_alloc(size_t size , int area )
{
void *tmp ;
{
tmp = kmalloc(size, (16U | 64U) | 128U);
return (tmp);
}
}
__inline static void drm_free(void *pt , size_t size , int area )
{
{
kfree(pt);
return;
}
}
__inline static void *drm_calloc(size_t nmemb , size_t size , int area )
{
void *tmp ;
{
tmp = kcalloc(nmemb, size, (16U | 64U) | 128U);
return (tmp);
}
}
extern bool drm_helper_initial_config(struct drm_device *dev , bool can_grow ) ;
void intelfb_restore(void) ;
bool intel_init_bios(struct drm_device *dev ) ;
__inline static struct io_mapping *io_mapping_create_wc(unsigned long base , unsigned long size )
{
void *tmp ;
{
tmp = ioremap_wc(base, size);
return ((struct io_mapping *)tmp);
}
}
__inline static void io_mapping_free(struct io_mapping *mapping )
{
{
iounmap(mapping);
return;
}
}
void i915_kernel_lost_context(struct drm_device *dev ) ;
int i915_emit_box(struct drm_device *dev , struct drm_clip_rect *boxes , int i , int DR1 ,
int DR4 ) ;
int i915_irq_emit(struct drm_device *dev , void *data , struct drm_file *file_priv ) ;
int i915_irq_wait(struct drm_device *dev , void *data , struct drm_file *file_priv ) ;
int i915_vblank_pipe_set(struct drm_device *dev , void *data , struct drm_file *file_priv ) ;
int i915_vblank_pipe_get(struct drm_device *dev , void *data , struct drm_file *file_priv ) ;
int i915_vblank_swap(struct drm_device *dev , void *data , struct drm_file *file_priv ) ;
int i915_mem_alloc(struct drm_device *dev , void *data , struct drm_file *file_priv ) ;
int i915_mem_free(struct drm_device *dev , void *data , struct drm_file *file_priv ) ;
int i915_mem_init_heap(struct drm_device *dev , void *data , struct drm_file *file_priv ) ;
int i915_mem_destroy_heap(struct drm_device *dev , void *data , struct drm_file *file_priv ) ;
void i915_mem_takedown(struct mem_block **heap ) ;
void i915_mem_release(struct drm_device *dev , struct drm_file *file_priv , struct mem_block *heap ) ;
int i915_gem_init_ioctl(struct drm_device *dev , void *data , struct drm_file *file_priv ) ;
int i915_gem_create_ioctl(struct drm_device *dev , void *data , struct drm_file *file_priv ) ;
int i915_gem_pread_ioctl(struct drm_device *dev , void *data , struct drm_file *file_priv ) ;
int i915_gem_pwrite_ioctl(struct drm_device *dev , void *data , struct drm_file *file_priv ) ;
int i915_gem_mmap_ioctl(struct drm_device *dev , void *data , struct drm_file *file_priv ) ;
int i915_gem_mmap_gtt_ioctl(struct drm_device *dev , void *data , struct drm_file *file_priv ) ;
int i915_gem_set_domain_ioctl(struct drm_device *dev , void *data , struct drm_file *file_priv ) ;
int i915_gem_sw_finish_ioctl(struct drm_device *dev , void *data , struct drm_file *file_priv ) ;
int i915_gem_execbuffer(struct drm_device *dev , void *data , struct drm_file *file_priv ) ;
int i915_gem_pin_ioctl(struct drm_device *dev , void *data , struct drm_file *file_priv ) ;
int i915_gem_unpin_ioctl(struct drm_device *dev , void *data , struct drm_file *file_priv ) ;
int i915_gem_busy_ioctl(struct drm_device *dev , void *data , struct drm_file *file_priv ) ;
int i915_gem_throttle_ioctl(struct drm_device *dev , void *data , struct drm_file *file_priv ) ;
int i915_gem_entervt_ioctl(struct drm_device *dev , void *data , struct drm_file *file_priv ) ;
int i915_gem_leavevt_ioctl(struct drm_device *dev , void *data , struct drm_file *file_priv ) ;
int i915_gem_set_tiling(struct drm_device *dev , void *data , struct drm_file *file_priv ) ;
int i915_gem_get_tiling(struct drm_device *dev , void *data , struct drm_file *file_priv ) ;
int i915_gem_get_aperture_ioctl(struct drm_device *dev , void *data , struct drm_file *file_priv ) ;
void i915_gem_load(struct drm_device *dev ) ;
void i915_gem_lastclose(struct drm_device *dev ) ;
int i915_gem_init_ringbuffer(struct drm_device *dev ) ;
void i915_gem_cleanup_ringbuffer(struct drm_device *dev ) ;
int i915_gem_do_init(struct drm_device *dev , unsigned long start , unsigned long end ) ;
void intel_modeset_init(struct drm_device *dev ) ;
void intel_modeset_cleanup(struct drm_device *dev ) ;
int i915_wait_ring(struct drm_device *dev , int n , char const *caller ) ;
int i915_wait_ring(struct drm_device *dev , int n , char const *caller )
{
drm_i915_private_t *dev_priv ;
struct drm_i915_master_private *master_priv ;
drm_i915_ring_buffer_t *ring ;
u32 acthd_reg ;
u32 last_acthd ;
unsigned int tmp ;
u32 acthd ;
u32 last_head ;
unsigned int tmp___0 ;
int i ;
unsigned int tmp___1 ;
{
dev_priv = dev->dev_private;
master_priv = ((dev->primary)->master)->driver_priv;
ring = & dev_priv->ring;
acthd_reg = ((((((((dev->pci_device == 10610 || dev->pci_device == 10626) || dev->pci_device == 10642) || dev->pci_device == 10658) || dev->pci_device == 10754) || dev->pci_device == 10770) || dev->pci_device == 10818) || dev->pci_device == 11778) || dev->pci_device == 11794) || dev->pci_device == 11810 ? 8308 : 8392;
tmp = readl(dev_priv->regs + acthd_reg);
last_acthd = tmp;
tmp___0 = readl(dev_priv->regs + 8244);
last_head = tmp___0 & 2097148U;
i = 0;
while (1) {
if (i < 100000) {
} else {
break;
}
tmp___1 = readl(dev_priv->regs + 8244);
ring->head = tmp___1 & 2097148U;
acthd = readl(dev_priv->regs + acthd_reg);
ring->space = ring->head - (ring->tail + 8);
if (ring->space < 0) {
ring->space = (unsigned long )ring->space + ring->Size;
} else {
}
if (ring->space >= n) {
return (0);
} else {
}
if (master_priv->sarea_priv) {
(master_priv->sarea_priv)->perf_boxes = (master_priv->sarea_priv)->perf_boxes | 4;
} else {
}
if ((u32 )ring->head != last_head) {
i = 0;
} else {
}
if (acthd != last_acthd) {
i = 0;
} else {
}
last_head = ring->head;
last_acthd = acthd;
msleep_interruptible(10);
i = i + 1;
}
return (-16);
}
}
static int i915_init_phys_hws(struct drm_device *dev )
{
drm_i915_private_t *dev_priv ;
{
dev_priv = dev->dev_private;
dev_priv->status_page_dmah = drm_pci_alloc(dev, 1UL << 12, 1UL << 12, 4294967295U);
if (! dev_priv->status_page_dmah) {
printk("<3>[drm:%s] *ERROR* Can not allocate hardware status page\n", "i915_init_phys_hws");
return (-12);
} else {
}
dev_priv->hw_status_page = (dev_priv->status_page_dmah)->vaddr;
dev_priv->dma_status_page = (dev_priv->status_page_dmah)->busaddr;
memset(dev_priv->hw_status_page, 0, 1UL << 12);
writel(dev_priv->dma_status_page, dev_priv->regs + 8320);
while (1) {
if (drm_debug) {
printk("<7>[drm:%s] Enabled hardware status page\n", "i915_init_phys_hws");
} else {
}
break;
}
return (0);
}
}
static void i915_free_hws(struct drm_device *dev )
{
drm_i915_private_t *dev_priv ;
{
dev_priv = dev->dev_private;
if (dev_priv->status_page_dmah) {
drm_pci_free(dev, dev_priv->status_page_dmah);
dev_priv->status_page_dmah = (void *)0;
} else {
}
if (dev_priv->status_gfx_addr) {
dev_priv->status_gfx_addr = 0;
drm_core_ioremapfree(& dev_priv->hws_map, dev);
} else {
}
writel(536866816, dev_priv->regs + 8320);
return;
}
}
void i915_kernel_lost_context(struct drm_device *dev )
{
drm_i915_private_t *dev_priv ;
struct drm_i915_master_private *master_priv ;
drm_i915_ring_buffer_t *ring ;
int tmp ;
unsigned int tmp___0 ;
unsigned int tmp___1 ;
{
dev_priv = dev->dev_private;
ring = & dev_priv->ring;
tmp = drm_core_check_feature(dev, 8192);
if (tmp) {
return;
} else {
}
tmp___0 = readl(dev_priv->regs + 8244);
ring->head = tmp___0 & 2097148U;
tmp___1 = readl(dev_priv->regs + 8240);
ring->tail = tmp___1 & 2097144U;
ring->space = ring->head - (ring->tail + 8);
if (ring->space < 0) {
ring->space = (unsigned long )ring->space + ring->Size;
} else {
}
if (! (dev->primary)->master) {
return;
} else {
}
master_priv = ((dev->primary)->master)->driver_priv;
if (ring->head == ring->tail && master_priv->sarea_priv) {
(master_priv->sarea_priv)->perf_boxes = (master_priv->sarea_priv)->perf_boxes | 1;
} else {
}
return;
}
}
static int i915_dma_cleanup(struct drm_device *dev )
{
drm_i915_private_t *dev_priv ;
{
dev_priv = dev->dev_private;
if (dev->irq_enabled) {
drm_irq_uninstall(dev);
} else {
}
if (dev_priv->ring.virtual_start) {
drm_core_ioremapfree(& dev_priv->ring.map, dev);
dev_priv->ring.virtual_start = (void *)0;
dev_priv->ring.map.handle = (void *)0;
dev_priv->ring.map.size = 0;
} else {
}
if ((((dev->pci_device == 10690 || dev->pci_device == 10674) || dev->pci_device == 10706) || dev->pci_device == 10818) || (((dev->pci_device == 11778 || dev->pci_device == 11794) || dev->pci_device == 11810) || dev->pci_device == 10818)) {
i915_free_hws(dev);
} else {
}
return (0);
}
}
static int i915_initialize(struct drm_device *dev , drm_i915_init_t *init )
{
drm_i915_private_t *dev_priv ;
struct drm_i915_master_private *master_priv ;
{
dev_priv = dev->dev_private;
master_priv = ((dev->primary)->master)->driver_priv;
if (init->ring_size != 0U) {
if ((unsigned long )dev_priv->ring.ring_obj != (unsigned long )((void *)0)) {
i915_dma_cleanup(dev);
printk("<3>[drm:%s] *ERROR* Client tried to initialize ringbuffer in GEM mode\n",
"i915_initialize");
return (-22);
} else {
}
dev_priv->ring.Size = init->ring_size;
dev_priv->ring.tail_mask = dev_priv->ring.Size - 1UL;
dev_priv->ring.map.offset = init->ring_start;
dev_priv->ring.map.size = init->ring_size;
dev_priv->ring.map.type = 0;
dev_priv->ring.map.flags = 0;
dev_priv->ring.map.mtrr = 0;
drm_core_ioremap(& dev_priv->ring.map, dev);
if ((unsigned long )dev_priv->ring.map.handle == (unsigned long )((void *)0)) {
i915_dma_cleanup(dev);
printk("<3>[drm:%s] *ERROR* can not ioremap virtual address for ring buffer\n",
"i915_initialize");
return (-12);
} else {
}
} else {
}
dev_priv->ring.virtual_start = dev_priv->ring.map.handle;
dev_priv->cpp = init->cpp;
dev_priv->back_offset = init->back_offset;
dev_priv->front_offset = init->front_offset;
dev_priv->current_page = 0;
if (master_priv->sarea_priv) {
(master_priv->sarea_priv)->pf_current_page = 0;
} else {
}
dev_priv->allow_batchbuffer = 1;
return (0);
}
}
static int i915_dma_resume(struct drm_device *dev )
{
drm_i915_private_t *dev_priv ;
{
dev_priv = (drm_i915_private_t *)dev->dev_private;
while (1) {
if (drm_debug) {
printk("<7>[drm:%s] %s\n", "i915_dma_resume", "i915_dma_resume");
} else {
}
break;
}
if ((unsigned long )dev_priv->ring.map.handle == (unsigned long )((void *)0)) {
printk("<3>[drm:%s] *ERROR* can not ioremap virtual address for ring buffer\n",
"i915_dma_resume");
return (-12);
} else {
}
if (! dev_priv->hw_status_page) {
printk("<3>[drm:%s] *ERROR* Can not find hardware status page\n", "i915_dma_resume");
return (-22);
} else {
}
while (1) {
if (drm_debug) {
printk("<7>[drm:%s] hw status page @ %p\n", "i915_dma_resume", dev_priv->hw_status_page);
} else {
}
break;
}
if (dev_priv->status_gfx_addr != 0U) {
writel(dev_priv->status_gfx_addr, dev_priv->regs + 8320);
} else {
writel(dev_priv->dma_status_page, dev_priv->regs + 8320);
}
while (1) {
if (drm_debug) {
printk("<7>[drm:%s] Enabled hardware status page\n", "i915_dma_resume");
} else {
}
break;
}
return (0);
}
}
static int i915_dma_init(struct drm_device *dev , void *data , struct drm_file *file_priv )
{
drm_i915_init_t *init ;
int retcode ;
{
init = data;
retcode = 0;
switch ((unsigned int )init->func) {
case (unsigned int )I915_INIT_DMA:
retcode = i915_initialize(dev, init);
break;
case (unsigned int )I915_CLEANUP_DMA:
retcode = i915_dma_cleanup(dev);
break;
case (unsigned int )I915_RESUME_DMA:
retcode = i915_dma_resume(dev);
break;
default:
retcode = -22;
break;
}
return (retcode);
}
}
static int do_validate_cmd(int cmd )
{
{
switch ((cmd >> 29) & 7) {
case 0:
switch ((cmd >> 23) & 63) {
case 0:
return (1);
case 4:
return (1);
default:
return (0);
}
break;
case 1:
return (0);
case 2:
return ((cmd & 255) + 2);
case 3:
if (((cmd >> 24) & 31) <= 24) {
return (1);
} else {
}
switch ((cmd >> 24) & 31) {
case 28:
return (1);
case 29:
switch ((cmd >> 16) & 255) {
case 3:
return ((cmd & 31) + 2);
case 4:
return ((cmd & 15) + 2);
default:
return ((cmd & 65535) + 2);
}
case 30:
if (cmd & (1 << 23)) {
return ((cmd & 65535) + 1);
} else {
return (1);
}
case 31:
if ((cmd & (1 << 23)) == 0) {
return ((cmd & 131071) + 2);
} else
if (cmd & (1 << 17)) {
if ((cmd & 65535) == 0) {
return (0);
} else {
return (((cmd & 65535) + 1) / 2 + 1);
}
} else {
return (2);
}
default:
return (0);
}
default:
return (0);
}
return (0);
}
}
static int validate_cmd(int cmd )
{
int ret ;
int tmp ;
{
tmp = do_validate_cmd(cmd);
ret = tmp;
return (ret);
}
}
static int i915_emit_cmds(struct drm_device *dev , int *buffer , int dwords )
{
drm_i915_private_t *dev_priv ;
int i ;
unsigned int outring ;
unsigned int ringmask ;
unsigned int outcount ;
char volatile *virt ;
int cmd ;
int sz ;
int tmp ;
int tmp___0 ;
{
dev_priv = dev->dev_private;
if ((unsigned long )(dwords + 1) * sizeof(int ) >= dev_priv->ring.Size - 8UL) {
return (-22);
} else {
}
while (1) {
if (dev_priv->ring.space < ((dwords + 1) & ~ 1) * 4) {
i915_wait_ring(dev, ((dwords + 1) & ~ 1) * 4, "i915_emit_cmds");
} else {
}
outcount = 0;
outring = dev_priv->ring.tail;
ringmask = dev_priv->ring.tail_mask;
virt = dev_priv->ring.virtual_start;
break;
}
i = 0;
while (1) {
if (i < dwords) {
} else {
break;
}
tmp = __copy_from_user(& cmd, buffer + i, sizeof(cmd));
if (tmp) {
return (-22);
} else {
}
sz = validate_cmd(cmd);
if (sz == 0 || i + sz > dwords) {
return (-22);
} else {
}
while (1) {
*((unsigned int volatile *)(virt + outring)) = cmd;
outcount = outcount + 1U;
outring = outring + 4U;
outring = outring & ringmask;
break;
}
while (1) {
i = i + 1;
sz = sz - 1;
if (sz) {
} else {
break;
}
tmp___0 = __copy_from_user(& cmd, buffer + i, sizeof(cmd));
if (tmp___0) {
return (-22);
} else {
}
while (1) {
*((unsigned int volatile *)(virt + outring)) = cmd;
outcount = outcount + 1U;
outring = outring + 4U;
outring = outring & ringmask;
break;
}
}
}
if (dwords & 1) {
while (1) {
*((unsigned int volatile *)(virt + outring)) = 0;
outcount = outcount + 1U;
outring = outring + 4U;
outring = outring & ringmask;
break;
}
} else {
}
while (1) {
dev_priv->ring.tail = outring;
dev_priv->ring.space = (unsigned int )dev_priv->ring.space - outcount * 4U;
writel(outring, dev_priv->regs + 8240);
break;
}
return (0);
}
}
int i915_emit_box(struct drm_device *dev , struct drm_clip_rect *boxes , int i , int DR1 ,
int DR4 )
{
drm_i915_private_t *dev_priv ;
struct drm_clip_rect box ;
unsigned int outring ;
unsigned int ringmask ;
unsigned int outcount ;
char volatile *virt ;
int tmp ;
{
dev_priv = dev->dev_private;
tmp = __copy_from_user(& box, boxes + i, sizeof(box));
if (tmp) {
return (-14);
} else {
}
if ((((int )box.y2 <= (int )box.y1 || (int )box.x2 <= (int )box.x1) || (int )box.y2 <= 0) || (int )box.x2 <= 0) {
printk("<3>[drm:%s] *ERROR* Bad box %d,%d..%d,%d\n", "i915_emit_box", box.x1,
box.y1, box.x2, box.y2);
return (-22);
} else {
}
if (((((((((dev->pci_device == 10610 || dev->pci_device == 10626) || dev->pci_device == 10642) || dev->pci_device == 10658) || dev->pci_device == 10754) || dev->pci_device == 10770) || dev->pci_device == 10818) || dev->pci_device == 11778) || dev->pci_device == 11794) || dev->pci_device == 11810) {
while (1) {
if (dev_priv->ring.space < 4 * 4) {
i915_wait_ring(dev, 4 * 4, "i915_emit_box");
} else {
}
outcount = 0;
outring = dev_priv->ring.tail;
ringmask = dev_priv->ring.tail_mask;
virt = dev_priv->ring.virtual_start;
break;
}
while (1) {
*((unsigned int volatile *)(virt + outring)) = (30976 << 16) | 2;
outcount = outcount + 1U;
outring = outring + 4U;
outring = outring & ringmask;
break;
}
while (1) {
*((unsigned int volatile *)(virt + outring)) = ((int )box.x1 & 65535) | ((int )box.y1 << 16);
outcount = outcount + 1U;
outring = outring + 4U;
outring = outring & ringmask;
break;
}
while (1) {
*((unsigned int volatile *)(virt + outring)) = (((int )box.x2 - 1) & 65535) | (((int )box.y2 - 1) << 16);
outcount = outcount + 1U;
outring = outring + 4U;
outring = outring & ringmask;
break;
}
while (1) {
*((unsigned int volatile *)(virt + outring)) = DR4;
outcount = outcount + 1U;
outring = outring + 4U;
outring = outring & ringmask;
break;
}
while (1) {
dev_priv->ring.tail = outring;
dev_priv->ring.space = (unsigned int )dev_priv->ring.space - outcount * 4U;
writel(outring, dev_priv->regs + 8240);
break;
}
} else {
while (1) {
if (dev_priv->ring.space < 6 * 4) {
i915_wait_ring(dev, 6 * 4, "i915_emit_box");
} else {
}
outcount = 0;
outring = dev_priv->ring.tail;
ringmask = dev_priv->ring.tail_mask;
virt = dev_priv->ring.virtual_start;
break;
}
while (1) {
*((unsigned int volatile *)(virt + outring)) = (((3 << 29) | (29 << 24)) | (128 << 16)) | 3;
outcount = outcount + 1U;
outring = outring + 4U;
outring = outring & ringmask;
break;
}
while (1) {
*((unsigned int volatile *)(virt + outring)) = DR1;
outcount = outcount + 1U;
outring = outring + 4U;
outring = outring & ringmask;
break;
}
while (1) {
*((unsigned int volatile *)(virt + outring)) = ((int )box.x1 & 65535) | ((int )box.y1 << 16);
outcount = outcount + 1U;
outring = outring + 4U;
outring = outring & ringmask;
break;
}
while (1) {
*((unsigned int volatile *)(virt + outring)) = (((int )box.x2 - 1) & 65535) | (((int )box.y2 - 1) << 16);
outcount = outcount + 1U;
outring = outring + 4U;
outring = outring & ringmask;
break;
}
while (1) {
*((unsigned int volatile *)(virt + outring)) = DR4;
outcount = outcount + 1U;
outring = outring + 4U;
outring = outring & ringmask;
break;
}
while (1) {
*((unsigned int volatile *)(virt + outring)) = 0;
outcount = outcount + 1U;
outring = outring + 4U;
outring = outring & ringmask;
break;
}
while (1) {
dev_priv->ring.tail = outring;
dev_priv->ring.space = (unsigned int )dev_priv->ring.space - outcount * 4U;
writel(outring, dev_priv->regs + 8240);
break;
}
}
return (0);
}
}
static void i915_emit_breadcrumb(struct drm_device *dev )
{
drm_i915_private_t *dev_priv ;
struct drm_i915_master_private *master_priv ;
unsigned int outring ;
unsigned int ringmask ;
unsigned int outcount ;
char volatile *virt ;
{
dev_priv = dev->dev_private;
master_priv = ((dev->primary)->master)->driver_priv;
dev_priv->counter = dev_priv->counter + (uint32_t )1;
if ((unsigned long )dev_priv->counter > 2147483647UL) {
dev_priv->counter = 0;
} else {
}
if (master_priv->sarea_priv) {
(master_priv->sarea_priv)->last_enqueue = dev_priv->counter;
} else {
}
while (1) {
if (dev_priv->ring.space < 4 * 4) {
i915_wait_ring(dev, 4 * 4, "i915_emit_breadcrumb");
} else {
}
outcount = 0;
outring = dev_priv->ring.tail;
ringmask = dev_priv->ring.tail_mask;
virt = dev_priv->ring.virtual_start;
break;
}
while (1) {
*((unsigned int volatile *)(virt + outring)) = (33 << 23) | 1;
outcount = outcount + 1U;
outring = outring + 4U;
outring = outring & ringmask;
break;
}
while (1) {
*((unsigned int volatile *)(virt + outring)) = 33 << 2;
outcount = outcount + 1U;
outring = outring + 4U;
outring = outring & ringmask;
break;
}
while (1) {
*((unsigned int volatile *)(virt + outring)) = dev_priv->counter;
outcount = outcount + 1U;
outring = outring + 4U;
outring = outring & ringmask;
break;
}
while (1) {
*((unsigned int volatile *)(virt + outring)) = 0;
outcount = outcount + 1U;
outring = outring + 4U;
outring = outring & ringmask;
break;
}
while (1) {
dev_priv->ring.tail = outring;
dev_priv->ring.space = (unsigned int )dev_priv->ring.space - outcount * 4U;
writel(outring, dev_priv->regs + 8240);
break;
}
return;
}
}
static int i915_dispatch_cmdbuffer(struct drm_device *dev , drm_i915_cmdbuffer_t *cmd )
{
int nbox ;
int i ;
int count ;
int ret ;
{
nbox = cmd->num_cliprects;
i = 0;
if (cmd->sz & 3) {
printk("<3>[drm:%s] *ERROR* alignment", "i915_dispatch_cmdbuffer");
return (-22);
} else {
}
i915_kernel_lost_context(dev);
count = nbox ? nbox : 1;
i = 0;
while (1) {
if (i < count) {
} else {
break;
}
if (i < nbox) {
ret = i915_emit_box(dev, cmd->cliprects, i, cmd->DR1, cmd->DR4);
if (ret) {
return (ret);
} else {
}
} else {
}
ret = i915_emit_cmds(dev, (int *)cmd->buf, cmd->sz / 4);
if (ret) {
return (ret);
} else {
}
i = i + 1;
}
i915_emit_breadcrumb(dev);
return (0);
}
}
static int i915_dispatch_batchbuffer(struct drm_device *dev , drm_i915_batchbuffer_t *batch )
{
drm_i915_private_t *dev_priv ;
struct drm_clip_rect *boxes ;
int nbox ;
int i ;
int count ;
unsigned int outring ;
unsigned int ringmask ;
unsigned int outcount ;
char volatile *virt ;
int ret ;
int tmp ;
{
dev_priv = dev->dev_private;
boxes = batch->cliprects;
nbox = batch->num_cliprects;
i = 0;
if ((batch->start | batch->used) & 7) {
printk("<3>[drm:%s] *ERROR* alignment", "i915_dispatch_batchbuffer");
return (-22);
} else {
}
i915_kernel_lost_context(dev);
count = nbox ? nbox : 1;
i = 0;
while (1) {
if (i < count) {
} else {
break;
}
if (i < nbox) {
tmp = i915_emit_box(dev, boxes, i, batch->DR1, batch->DR4);
ret = tmp;
if (ret) {
return (ret);
} else {
}
} else {
}
if (! (dev->pci_device == 13687) && ! (dev->pci_device == 9570)) {
while (1) {
if (dev_priv->ring.space < 2 * 4) {
i915_wait_ring(dev, 2 * 4, "i915_dispatch_batchbuffer");
} else {
}
outcount = 0;
outring = dev_priv->ring.tail;
ringmask = dev_priv->ring.tail_mask;
virt = dev_priv->ring.virtual_start;
break;
}
if (((((((((dev->pci_device == 10610 || dev->pci_device == 10626) || dev->pci_device == 10642) || dev->pci_device == 10658) || dev->pci_device == 10754) || dev->pci_device == 10770) || dev->pci_device == 10818) || dev->pci_device == 11778) || dev->pci_device == 11794) || dev->pci_device == 11810) {
while (1) {
*((unsigned int volatile *)(virt + outring)) = (((49 << 23) | 0) | (2 << 6)) | (1 << 8);
outcount = outcount + 1U;
outring = outring + 4U;
outring = outring & ringmask;
break;
}
while (1) {
*((unsigned int volatile *)(virt + outring)) = batch->start;
outcount = outcount + 1U;
outring = outring + 4U;
outring = outring & ringmask;
break;
}
} else {
while (1) {
*((unsigned int volatile *)(virt + outring)) = ((49 << 23) | 0) | (2 << 6);
outcount = outcount + 1U;
outring = outring + 4U;
outring = outring & ringmask;
break;
}
while (1) {
*((unsigned int volatile *)(virt + outring)) = batch->start | 1;
outcount = outcount + 1U;
outring = outring + 4U;
outring = outring & ringmask;
break;
}
}
while (1) {
dev_priv->ring.tail = outring;
dev_priv->ring.space = (unsigned int )dev_priv->ring.space - outcount * 4U;
writel(outring, dev_priv->regs + 8240);
break;
}
} else {
while (1) {
if (dev_priv->ring.space < 4 * 4) {
i915_wait_ring(dev, 4 * 4, "i915_dispatch_batchbuffer");
} else {
}
outcount = 0;
outring = dev_priv->ring.tail;
ringmask = dev_priv->ring.tail_mask;
virt = dev_priv->ring.virtual_start;
break;
}
while (1) {
*((unsigned int volatile *)(virt + outring)) = (48 << 23) | 1;
outcount = outcount + 1U;
outring = outring + 4U;
outring = outring & ringmask;
break;
}
while (1) {
*((unsigned int volatile *)(virt + outring)) = batch->start | 1;
outcount = outcount + 1U;
outring = outring + 4U;
outring = outring & ringmask;
break;
}
while (1) {
*((unsigned int volatile *)(virt + outring)) = (batch->start + batch->used) - 4;
outcount = outcount + 1U;
outring = outring + 4U;
outring = outring & ringmask;
break;
}
while (1) {
*((unsigned int volatile *)(virt + outring)) = 0;
outcount = outcount + 1U;
outring = outring + 4U;
outring = outring & ringmask;
break;
}
while (1) {
dev_priv->ring.tail = outring;
dev_priv->ring.space = (unsigned int )dev_priv->ring.space - outcount * 4U;
writel(outring, dev_priv->regs + 8240);
break;
}
}
i = i + 1;
}
i915_emit_breadcrumb(dev);
return (0);
}
}
static int i915_dispatch_flip(struct drm_device *dev )
{
drm_i915_private_t *dev_priv ;
struct drm_i915_master_private *master_priv ;
unsigned int outring ;
unsigned int ringmask ;
unsigned int outcount ;
char volatile *virt ;
uint32_t tmp ;
{
dev_priv = dev->dev_private;
master_priv = ((dev->primary)->master)->driver_priv;
if (! master_priv->sarea_priv) {
return (-22);
} else {
}
while (1) {
if (drm_debug) {
printk("<7>[drm:%s] %s: page=%d pfCurrentPage=%d\n", "i915_dispatch_flip", "i915_dispatch_flip",
dev_priv->current_page, (master_priv->sarea_priv)->pf_current_page);
} else {
}
break;
}
i915_kernel_lost_context(dev);
while (1) {
if (dev_priv->ring.space < 2 * 4) {
i915_wait_ring(dev, 2 * 4, "i915_dispatch_flip");
} else {
}
outcount = 0;
outring = dev_priv->ring.tail;
ringmask = dev_priv->ring.tail_mask;
virt = dev_priv->ring.virtual_start;
break;
}
while (1) {
*((unsigned int volatile *)(virt + outring)) = ((4 << 23) | 0) | (1 << 0);
outcount = outcount + 1U;
outring = outring + 4U;
outring = outring & ringmask;
break;
}
while (1) {
*((unsigned int volatile *)(virt + outring)) = 0;
outcount = outcount + 1U;
outring = outring + 4U;
outring = outring & ringmask;
break;
}
while (1) {
dev_priv->ring.tail = outring;
dev_priv->ring.space = (unsigned int )dev_priv->ring.space - outcount * 4U;
writel(outring, dev_priv->regs + 8240);
break;
}
while (1) {
if (dev_priv->ring.space < 6 * 4) {
i915_wait_ring(dev, 6 * 4, "i915_dispatch_flip");
} else {
}
outcount = 0;
outring = dev_priv->ring.tail;
ringmask = dev_priv->ring.tail_mask;
virt = dev_priv->ring.virtual_start;
break;
}
while (1) {
*((unsigned int volatile *)(virt + outring)) = (((0 << 29) | (20 << 23)) | 2) | (1 << 22);
outcount = outcount + 1U;
outring = outring + 4U;
outring = outring & ringmask;
break;
}
while (1) {
*((unsigned int volatile *)(virt + outring)) = 0;
outcount = outcount + 1U;
outring = outring + 4U;
outring = outring & ringmask;
break;
}
if (dev_priv->current_page == 0) {
while (1) {
*((unsigned int volatile *)(virt + outring)) = dev_priv->back_offset;
outcount = outcount + 1U;
outring = outring + 4U;
outring = outring & ringmask;
break;
}
dev_priv->current_page = 1;
} else {
while (1) {
*((unsigned int volatile *)(virt + outring)) = dev_priv->front_offset;
outcount = outcount + 1U;
outring = outring + 4U;
outring = outring & ringmask;
break;
}
dev_priv->current_page = 0;
}
while (1) {
*((unsigned int volatile *)(virt + outring)) = 0;
outcount = outcount + 1U;
outring = outring + 4U;
outring = outring & ringmask;
break;
}
while (1) {
dev_priv->ring.tail = outring;
dev_priv->ring.space = (unsigned int )dev_priv->ring.space - outcount * 4U;
writel(outring, dev_priv->regs + 8240);
break;
}
while (1) {
if (dev_priv->ring.space < 2 * 4) {
i915_wait_ring(dev, 2 * 4, "i915_dispatch_flip");
} else {
}
outcount = 0;
outring = dev_priv->ring.tail;
ringmask = dev_priv->ring.tail_mask;
virt = dev_priv->ring.virtual_start;
break;
}
while (1) {
*((unsigned int volatile *)(virt + outring)) = ((3 << 23) | 0) | (1 << 2);
outcount = outcount + 1U;
outring = outring + 4U;
outring = outring & ringmask;
break;
}
while (1) {
*((unsigned int volatile *)(virt + outring)) = 0;
outcount = outcount + 1U;
outring = outring + 4U;
outring = outring & ringmask;
break;
}
while (1) {
dev_priv->ring.tail = outring;
dev_priv->ring.space = (unsigned int )dev_priv->ring.space - outcount * 4U;
writel(outring, dev_priv->regs + 8240);
break;
}
tmp = dev_priv->counter;
dev_priv->counter = dev_priv->counter + (uint32_t )1;
(master_priv->sarea_priv)->last_enqueue = tmp;
while (1) {
if (dev_priv->ring.space < 4 * 4) {
i915_wait_ring(dev, 4 * 4, "i915_dispatch_flip");
} else {
}
outcount = 0;
outring = dev_priv->ring.tail;
ringmask = dev_priv->ring.tail_mask;
virt = dev_priv->ring.virtual_start;
break;
}
while (1) {
*((unsigned int volatile *)(virt + outring)) = (33 << 23) | 1;
outcount = outcount + 1U;
outring = outring + 4U;
outring = outring & ringmask;
break;
}
while (1) {
*((unsigned int volatile *)(virt + outring)) = 33 << 2;
outcount = outcount + 1U;
outring = outring + 4U;
outring = outring & ringmask;
break;
}
while (1) {
*((unsigned int volatile *)(virt + outring)) = dev_priv->counter;
outcount = outcount + 1U;
outring = outring + 4U;
outring = outring & ringmask;
break;
}
while (1) {
*((unsigned int volatile *)(virt + outring)) = 0;
outcount = outcount + 1U;
outring = outring + 4U;
outring = outring & ringmask;
break;
}
while (1) {
dev_priv->ring.tail = outring;
dev_priv->ring.space = (unsigned int )dev_priv->ring.space - outcount * 4U;
writel(outring, dev_priv->regs + 8240);
break;
}
(master_priv->sarea_priv)->pf_current_page = dev_priv->current_page;
return (0);
}
}
static int i915_quiescent(struct drm_device *dev )
{
drm_i915_private_t *dev_priv ;
int tmp ;
{
dev_priv = dev->dev_private;
i915_kernel_lost_context(dev);
tmp = i915_wait_ring(dev, dev_priv->ring.Size - 8UL, "i915_quiescent");
return (tmp);
}
}
static int i915_flush_ioctl(struct drm_device *dev , void *data , struct drm_file *file_priv )
{
int ret ;
{
while (1) {
if ((unsigned long )((drm_i915_private_t *)dev->dev_private)->ring.ring_obj == (unsigned long )((void *)0)) {
while (1) {
if (! (((file_priv->master)->lock.hw_lock)->lock & (unsigned int volatile )2147483648U) || (unsigned long )(file_priv->master)->lock.file_priv != (unsigned long )file_priv) {
printk("<3>[drm:%s] *ERROR* %s called without lock held, held %d owner %p %p\n",
"i915_flush_ioctl", "i915_flush_ioctl", ((file_priv->master)->lock.hw_lock)->lock & (unsigned int volatile )2147483648U,
(file_priv->master)->lock.file_priv, file_priv);
return (-22);
} else {
}
break;
}
} else {
}
break;
}
mutex_lock_nested(& dev->struct_mutex, 0);
ret = i915_quiescent(dev);
mutex_unlock(& dev->struct_mutex);
return (ret);
}
}
static int i915_batchbuffer(struct drm_device *dev , void *data , struct drm_file *file_priv )
{
drm_i915_private_t *dev_priv ;
struct drm_i915_master_private *master_priv ;
drm_i915_sarea_t *sarea_priv ;
drm_i915_batchbuffer_t *batch ;
int ret ;
unsigned long flag ;
unsigned long roksum ;
struct thread_info *tmp ;
int tmp___0 ;
long tmp___1 ;
{
dev_priv = (drm_i915_private_t *)dev->dev_private;
master_priv = ((dev->primary)->master)->driver_priv;
sarea_priv = master_priv->sarea_priv;
batch = data;
if (! dev_priv->allow_batchbuffer) {
printk("<3>[drm:%s] *ERROR* Batchbuffer ioctl disabled\n", "i915_batchbuffer");
return (-22);
} else {
}
while (1) {
if (drm_debug) {
printk("<7>[drm:%s] i915 batchbuffer, start %x used %d cliprects %d\n", "i915_batchbuffer",
batch->start, batch->used, batch->num_cliprects);
} else {
}
break;
}
while (1) {
if ((unsigned long )((drm_i915_private_t *)dev->dev_private)->ring.ring_obj == (unsigned long )((void *)0)) {
while (1) {
if (! (((file_priv->master)->lock.hw_lock)->lock & (unsigned int volatile )2147483648U) || (unsigned long )(file_priv->master)->lock.file_priv != (unsigned long )file_priv) {
printk("<3>[drm:%s] *ERROR* %s called without lock held, held %d owner %p %p\n",
"i915_batchbuffer", "i915_batchbuffer", ((file_priv->master)->lock.hw_lock)->lock & (unsigned int volatile )2147483648U,
(file_priv->master)->lock.file_priv, file_priv);
return (-22);
} else {
}
break;
}
} else {
}
break;
}
if (batch->num_cliprects) {
tmp = current_thread_info();
__asm__ ("add %3,%1 ; sbb %0,%0 ; cmp %1,%4 ; sbb $0,%0": "=&r" (flag), "=r" (roksum): "1" (batch->cliprects),
"g" ((long )((unsigned long )batch->num_cliprects * sizeof(struct drm_clip_rect ))),
"rm" (tmp->addr_limit.seg));
if (flag == 0UL) {
tmp___0 = 1;
} else {
tmp___0 = 0;
}
tmp___1 = ldv__builtin_expect(tmp___0, 1);
if (tmp___1 ? 0 : -14) {
return (-14);
} else {
}
} else {
}
mutex_lock_nested(& dev->struct_mutex, 0);
ret = i915_dispatch_batchbuffer(dev, batch);
mutex_unlock(& dev->struct_mutex);
if (sarea_priv) {
sarea_priv->last_dispatch = *((u32 volatile *)dev_priv->hw_status_page + 33);
} else {
}
return (ret);
}
}
static int i915_cmdbuffer(struct drm_device *dev , void *data , struct drm_file *file_priv )
{
drm_i915_private_t *dev_priv ;
struct drm_i915_master_private *master_priv ;
drm_i915_sarea_t *sarea_priv ;
drm_i915_cmdbuffer_t *cmdbuf ;
int ret ;
unsigned long flag ;
unsigned long roksum ;
struct thread_info *tmp ;
int tmp___0 ;
long tmp___1 ;
{
dev_priv = (drm_i915_private_t *)dev->dev_private;
master_priv = ((dev->primary)->master)->driver_priv;
sarea_priv = master_priv->sarea_priv;
cmdbuf = data;
while (1) {
if (drm_debug) {
printk("<7>[drm:%s] i915 cmdbuffer, buf %p sz %d cliprects %d\n", "i915_cmdbuffer",
cmdbuf->buf, cmdbuf->sz, cmdbuf->num_cliprects);
} else {
}
break;
}
while (1) {
if ((unsigned long )((drm_i915_private_t *)dev->dev_private)->ring.ring_obj == (unsigned long )((void *)0)) {
while (1) {
if (! (((file_priv->master)->lock.hw_lock)->lock & (unsigned int volatile )2147483648U) || (unsigned long )(file_priv->master)->lock.file_priv != (unsigned long )file_priv) {
printk("<3>[drm:%s] *ERROR* %s called without lock held, held %d owner %p %p\n",
"i915_cmdbuffer", "i915_cmdbuffer", ((file_priv->master)->lock.hw_lock)->lock & (unsigned int volatile )2147483648U,
(file_priv->master)->lock.file_priv, file_priv);
return (-22);
} else {
}
break;
}
} else {
}
break;
}
if (cmdbuf->num_cliprects) {
tmp = current_thread_info();
__asm__ ("add %3,%1 ; sbb %0,%0 ; cmp %1,%4 ; sbb $0,%0": "=&r" (flag), "=r" (roksum): "1" (cmdbuf->cliprects),
"g" ((long )((unsigned long )cmdbuf->num_cliprects * sizeof(struct drm_clip_rect ))),
"rm" (tmp->addr_limit.seg));
if (flag == 0UL) {
tmp___0 = 1;
} else {
tmp___0 = 0;
}
tmp___1 = ldv__builtin_expect(tmp___0, 1);
if (tmp___1 ? 0 : -14) {
printk("<3>[drm:%s] *ERROR* Fault accessing cliprects\n", "i915_cmdbuffer");
return (-14);
} else {
}
} else {
}
mutex_lock_nested(& dev->struct_mutex, 0);
ret = i915_dispatch_cmdbuffer(dev, cmdbuf);
mutex_unlock(& dev->struct_mutex);
if (ret) {
printk("<3>[drm:%s] *ERROR* i915_dispatch_cmdbuffer failed\n", "i915_cmdbuffer");
return (ret);
} else {
}
if (sarea_priv) {
sarea_priv->last_dispatch = *((u32 volatile *)dev_priv->hw_status_page + 33);
} else {
}
return (0);
}
}
static int i915_flip_bufs(struct drm_device *dev , void *data , struct drm_file *file_priv )
{
int ret ;
{
while (1) {
if (drm_debug) {
printk("<7>[drm:%s] %s\n", "i915_flip_bufs", "i915_flip_bufs");
} else {
}
break;
}
while (1) {
if ((unsigned long )((drm_i915_private_t *)dev->dev_private)->ring.ring_obj == (unsigned long )((void *)0)) {
while (1) {
if (! (((file_priv->master)->lock.hw_lock)->lock & (unsigned int volatile )2147483648U) || (unsigned long )(file_priv->master)->lock.file_priv != (unsigned long )file_priv) {
printk("<3>[drm:%s] *ERROR* %s called without lock held, held %d owner %p %p\n",
"i915_flip_bufs", "i915_flip_bufs", ((file_priv->master)->lock.hw_lock)->lock & (unsigned int volatile )2147483648U,
(file_priv->master)->lock.file_priv, file_priv);
return (-22);
} else {
}
break;
}
} else {
}
break;
}
mutex_lock_nested(& dev->struct_mutex, 0);
ret = i915_dispatch_flip(dev);
mutex_unlock(& dev->struct_mutex);
return (ret);
}
}
static int i915_getparam(struct drm_device *dev , void *data , struct drm_file *file_priv )
{
drm_i915_private_t *dev_priv ;
drm_i915_getparam_t *param ;
int value ;
unsigned long tmp ;
{
dev_priv = dev->dev_private;
param = data;
if (! dev_priv) {
printk("<3>[drm:%s] *ERROR* called with no initialization\n", "i915_getparam");
return (-22);
} else {
}
switch (param->param) {
case 1:
value = (dev->pdev)->irq ? 1 : 0;
break;
case 2:
value = dev_priv->allow_batchbuffer ? 1 : 0;
break;
case 3:
value = *((u32 volatile *)dev_priv->hw_status_page + 33);
break;
case 4:
value = dev->pci_device;
break;
case 5:
value = dev_priv->has_gem;
break;
default:
printk("<3>[drm:%s] *ERROR* Unknown parameter %d\n", "i915_getparam", param->param);
return (-22);
}
tmp = copy_to_user(param->value, & value, sizeof(int ));
if (tmp) {
printk("<3>[drm:%s] *ERROR* DRM_COPY_TO_USER failed\n", "i915_getparam");
return (-14);
} else {
}
return (0);
}
}
static int i915_setparam(struct drm_device *dev , void *data , struct drm_file *file_priv )
{
drm_i915_private_t *dev_priv ;
drm_i915_setparam_t *param ;
{
dev_priv = dev->dev_private;
param = data;
if (! dev_priv) {
printk("<3>[drm:%s] *ERROR* called with no initialization\n", "i915_setparam");
return (-22);
} else {
}
switch (param->param) {
case 1:
break;
case 2:
dev_priv->tex_lru_log_granularity = param->value;
break;
case 3:
dev_priv->allow_batchbuffer = param->value;
break;
default:
printk("<3>[drm:%s] *ERROR* unknown parameter %d\n", "i915_setparam", param->param);
return (-22);
}
return (0);
}
}
static int i915_set_status_page(struct drm_device *dev , void *data , struct drm_file *file_priv )
{
drm_i915_private_t *dev_priv ;
drm_i915_hws_addr_t *hws ;
int __ret_warn_on ;
long tmp ;
int tmp___0 ;
{
dev_priv = dev->dev_private;
hws = data;
if (! ((((dev->pci_device == 10690 || dev->pci_device == 10674) || dev->pci_device == 10706) || dev->pci_device == 10818) || (((dev->pci_device == 11778 || dev->pci_device == 11794) || dev->pci_device == 11810) || dev->pci_device == 10818))) {
return (-22);
} else {
}
if (! dev_priv) {
printk("<3>[drm:%s] *ERROR* called with no initialization\n", "i915_set_status_page");
return (-22);
} else {
}
tmp___0 = drm_core_check_feature(dev, 8192);
if (tmp___0) {
__ret_warn_on = 1;
tmp = ldv__builtin_expect(! (! __ret_warn_on), 0);
if (tmp) {
warn_slowpath("/work/ldvuser/novikov/work/current--X--drivers/gpu/drm/i915/i915.ko--X--defaultlinux--X--68_1--X--cpachecker/linux/csd_deg_dscv/36/dscv_tempdir/dscv/ri/68_1/drivers/gpu/drm/i915/i915_dma.c",
782, "tried to set status page when mode setting active\n");
} else {
}
ldv__builtin_expect(! (! __ret_warn_on), 0);
return (0);
} else {
}
printk("<7>set status page addr 0x%08x\n", (u32 )hws->addr);
dev_priv->status_gfx_addr = hws->addr & (unsigned long long )(131071 << 12);
dev_priv->hws_map.offset = (uint64_t )(dev->agp)->base + hws->addr;
dev_priv->hws_map.size = 4 * 1024;
dev_priv->hws_map.type = 0;
dev_priv->hws_map.flags = 0;
dev_priv->hws_map.mtrr = 0;
drm_core_ioremap(& dev_priv->hws_map, dev);
if ((unsigned long )dev_priv->hws_map.handle == (unsigned long )((void *)0)) {
i915_dma_cleanup(dev);
dev_priv->status_gfx_addr = 0;
printk("<3>[drm:%s] *ERROR* can not ioremap virtual address for G33 hw status page\n",
"i915_set_status_page");
return (-12);
} else {
}
dev_priv->hw_status_page = dev_priv->hws_map.handle;
memset(dev_priv->hw_status_page, 0, 1UL << 12);
writel(dev_priv->status_gfx_addr, dev_priv->regs + 8320);
while (1) {
if (drm_debug) {
printk("<7>[drm:%s] load hws HWS_PGA with gfx mem 0x%x\n", "i915_set_status_page",
dev_priv->status_gfx_addr);
} else {
}
break;
}
while (1) {
if (drm_debug) {
printk("<7>[drm:%s] load hws at %p\n", "i915_set_status_page", dev_priv->hw_status_page);
} else {
}
break;
}
return (0);
}
}
static int i915_probe_agp(struct drm_device *dev , unsigned long *aperture_size ,
unsigned long *preallocated_size )
{
struct pci_dev *bridge_dev ;
u16 tmp ;
unsigned long overhead ;
{
tmp = 0;
bridge_dev = pci_get_bus_and_slot(0, ((0 & 31) << 3) | (0 & 7));
if (! bridge_dev) {
printk("<3>[drm:%s] *ERROR* bridge device not found\n", "i915_probe_agp");
return (-1);
} else {
}
pci_read_config_word(bridge_dev, 82, & tmp);
pci_dev_put(bridge_dev);
*aperture_size = 1024 * 1024;
*preallocated_size = 1024 * 1024;
switch ((int )(dev->pdev)->device) {
case 9586:
case 13698:
case 9570:
case 13687:
if (((int )tmp & 1) == 1) {
*aperture_size = *aperture_size * 64UL;
} else {
*aperture_size = *aperture_size * 128UL;
}
break;
default:
*aperture_size = (dev->pdev)->resource[2].start == (resource_size_t )0 && (dev->pdev)->resource[2].end == (dev->pdev)->resource[2].start ? 0 : ((dev->pdev)->resource[2].end - (dev->pdev)->resource[2].start) + (resource_size_t )1;
break;
}
if (((dev->pci_device == 11778 || dev->pci_device == 11794) || dev->pci_device == 11810) || dev->pci_device == 10818) {
overhead = 4096;
} else {
overhead = *aperture_size / 1024UL + 4096UL;
}
switch ((int )tmp & (7 << 4)) {
case 1 << 4:
break;
case 2 << 4:
*preallocated_size = *preallocated_size * 4UL;
break;
case 3 << 4:
*preallocated_size = *preallocated_size * 8UL;
break;
case 4 << 4:
*preallocated_size = *preallocated_size * 16UL;
break;
case 5 << 4:
*preallocated_size = *preallocated_size * 32UL;
break;
case 6 << 4:
*preallocated_size = *preallocated_size * 48UL;
break;
case 7 << 4:
*preallocated_size = *preallocated_size * 64UL;
break;
case 0 << 4:
printk("<3>[drm:%s] *ERROR* video memory is disabled\n", "i915_probe_agp");
return (-1);
default:
printk("<3>[drm:%s] *ERROR* unexpected GMCH_GMS value: 0x%02x\n", "i915_probe_agp",
(int )tmp & (7 << 4));
return (-1);
}
*preallocated_size = *preallocated_size - overhead;
return (0);
}
}
static int i915_load_modeset_init(struct drm_device *dev )
{
struct drm_i915_private *dev_priv ;
unsigned long agp_size ;
unsigned long prealloc_size ;
int fb_bar ;
int ret ;
unsigned long tmp ;
bool tmp___0 ;
{
dev_priv = dev->dev_private;
fb_bar = (((((dev->pci_device == 9602 || dev->pci_device == 9610) || dev->pci_device == 9618) || dev->pci_device == 10098) || (dev->pci_device == 10146 || dev->pci_device == 10158)) || (((((((((dev->pci_device == 10610 || dev->pci_device == 10626) || dev->pci_device == 10642) || dev->pci_device == 10658) || dev->pci_device == 10754) || dev->pci_device == 10770) || dev->pci_device == 10818) || dev->pci_device == 11778) || dev->pci_device == 11794) || dev->pci_device == 11810)) || ((dev->pci_device == 10690 || dev->pci_device == 10674) || dev->pci_device == 10706) ? 2 : 0;
ret = 0;
dev->devname = kstrdup("i915", (16U | 64U) | 128U);
if (! dev->devname) {
ret = -12;
goto out;
} else {
}
tmp = drm_get_resource_start(dev, fb_bar);
dev->mode_config.fb_base = tmp & 4278190080UL;
while (1) {
if (drm_debug) {
printk("<7>[drm:%s] *** fb base 0x%08lx\n", "i915_load_modeset_init", dev->mode_config.fb_base);
} else {
}
break;
}
if ((((((dev->pci_device == 13687 || dev->pci_device == 13698) || dev->pci_device == 9618) || (dev->pci_device == 10146 || dev->pci_device == 10158)) || dev->pci_device == 10754) || dev->pci_device == 10818) || ((((((((dev->pci_device == 9602 || dev->pci_device == 9610) || dev->pci_device == 9618) || dev->pci_device == 10098) || (dev->pci_device == 10146 || dev->pci_device == 10158)) || (((((((((dev->pci_device == 10610 || dev->pci_device == 10626) || dev->pci_device == 10642) || dev->pci_device == 10658) || dev->pci_device == 10754) || dev->pci_device == 10770) || dev->pci_device == 10818) || dev->pci_device == 11778) || dev->pci_device == 11794) || dev->pci_device == 11810)) || ((dev->pci_device == 10690 || dev->pci_device == 10674) || dev->pci_device == 10706)) && ! (((((((((dev->pci_device == 10610 || dev->pci_device == 10626) || dev->pci_device == 10642) || dev->pci_device == 10658) || dev->pci_device == 10754) || dev->pci_device == 10770) || dev->pci_device == 10818) || dev->pci_device == 11778) || dev->pci_device == 11794) || dev->pci_device == 11810)) && ! ((dev->pci_device == 10690 || dev->pci_device == 10674) || dev->pci_device == 10706))) {
dev_priv->cursor_needs_physical = true;
} else {
dev_priv->cursor_needs_physical = false;
}
ret = i915_probe_agp(dev, & agp_size, & prealloc_size);
if (ret) {
goto kfree_devname;
} else {
}
drm_mm_init(& dev_priv->vram, 0, prealloc_size);
i915_gem_do_init(dev, prealloc_size, agp_size);
ret = i915_gem_init_ringbuffer(dev);
if (ret) {
goto kfree_devname;
} else {
}
dev_priv->mm.gtt_mapping = io_mapping_create_wc((dev->agp)->base, ((dev->agp)->agp_info.aper_size * (size_t )1024) * (size_t )1024);
dev_priv->allow_batchbuffer = 1;
tmp___0 = intel_init_bios(dev);
ret = tmp___0;
if (ret) {
printk("<6>[drm] failed to find VBIOS tables\n");
} else {
}
ret = drm_irq_install(dev);
if (ret) {
goto destroy_ringbuffer;
} else {
}
dev->vblank_disable_allowed = 1;
writel((1 << 5) | (1 << 21), dev_priv->regs + 8384);
intel_modeset_init(dev);
drm_helper_initial_config(dev, false);
return (0);
destroy_ringbuffer:
i915_gem_cleanup_ringbuffer(dev);
kfree_devname:
kfree(dev->devname);
out:
return (ret);
}
}
int i915_master_create(struct drm_device *dev , struct drm_master *master )
{
struct drm_i915_master_private *master_priv ;
void *tmp ;
{
tmp = drm_calloc(1, sizeof(*master_priv), 2);
master_priv = tmp;
if (! master_priv) {
return (-12);
} else {
}
master->driver_priv = master_priv;
return (0);
}
}
void i915_master_destroy(struct drm_device *dev , struct drm_master *master )
{
struct drm_i915_master_private *master_priv ;
{
master_priv = master->driver_priv;
if (! master_priv) {
return;
} else {
}
drm_free(master_priv, sizeof(*master_priv), 2);
master->driver_priv = (void *)0;
return;
}
}
static struct lock_class_key __key___1 ;
int i915_driver_load(struct drm_device *dev , unsigned long flags )
{
struct drm_i915_private *dev_priv ;
unsigned long base ;
unsigned long size ;
int ret ;
int mmio_bar ;
void *tmp ;
int tmp___0 ;
{
dev_priv = dev->dev_private;
ret = 0;
mmio_bar = (((((dev->pci_device == 9602 || dev->pci_device == 9610) || dev->pci_device == 9618) || dev->pci_device == 10098) || (dev->pci_device == 10146 || dev->pci_device == 10158)) || (((((((((dev->pci_device == 10610 || dev->pci_device == 10626) || dev->pci_device == 10642) || dev->pci_device == 10658) || dev->pci_device == 10754) || dev->pci_device == 10770) || dev->pci_device == 10818) || dev->pci_device == 11778) || dev->pci_device == 11794) || dev->pci_device == 11810)) || ((dev->pci_device == 10690 || dev->pci_device == 10674) || dev->pci_device == 10706) ? 0 : 1;
dev->counters = dev->counters + 4UL;
dev->types[6] = _DRM_STAT_IRQ;
dev->types[7] = _DRM_STAT_PRIMARY;
dev->types[8] = _DRM_STAT_SECONDARY;
dev->types[9] = _DRM_STAT_DMA;
tmp = drm_alloc(sizeof(drm_i915_private_t ), 2);
dev_priv = tmp;
if ((unsigned long )dev_priv == (unsigned long )((void *)0)) {
return (-12);
} else {
}
memset(dev_priv, 0, sizeof(drm_i915_private_t ));
dev->dev_private = (void *)dev_priv;
dev_priv->dev = dev;
base = drm_get_resource_start(dev, mmio_bar);
size = drm_get_resource_len(dev, mmio_bar);
dev_priv->regs = ioremap(base, size);
if (! dev_priv->regs) {
printk("<3>[drm:%s] *ERROR* failed to map registers\n", "i915_driver_load");
ret = -5;
goto free_priv;
} else {
}
dev_priv->has_gem = 1;
i915_gem_load(dev);
if (! ((((dev->pci_device == 10690 || dev->pci_device == 10674) || dev->pci_device == 10706) || dev->pci_device == 10818) || (((dev->pci_device == 11778 || dev->pci_device == 11794) || dev->pci_device == 11810) || dev->pci_device == 10818))) {
ret = i915_init_phys_hws(dev);
if (ret != 0) {
goto out_rmmap;
} else {
}
} else {
}
if (! (dev->pci_device == 10098) && ! (dev->pci_device == 10146 || dev->pci_device == 10158)) {
pci_enable_msi(dev->pdev);
} else {
}
intel_opregion_init(dev);
while (1) {
__spin_lock_init(& dev_priv->user_irq_lock, "&dev_priv->user_irq_lock", & __key___1);
break;
}
dev_priv->user_irq_refcount = 0;
ret = drm_vblank_init(dev, 2);
if (ret) {
i915_driver_unload(dev);
return (ret);
} else {
}
tmp___0 = drm_core_check_feature(dev, 8192);
if (tmp___0) {
ret = i915_load_modeset_init(dev);
if (ret < 0) {
printk("<3>[drm:%s] *ERROR* failed to init modeset\n", "i915_driver_load");
goto out_rmmap;
} else {
}
} else {
}
return (0);
out_rmmap:
iounmap(dev_priv->regs);
free_priv:
drm_free(dev_priv, sizeof(struct drm_i915_private ), 2);
return (ret);
}
}
int i915_driver_unload(struct drm_device *dev )
{
struct drm_i915_private *dev_priv ;
int tmp ;
int tmp___0 ;
{
dev_priv = dev->dev_private;
tmp = drm_core_check_feature(dev, 8192);
if (tmp) {
io_mapping_free(dev_priv->mm.gtt_mapping);
drm_irq_uninstall(dev);
} else {
}
if ((dev->pdev)->msi_enabled) {
pci_disable_msi(dev->pdev);
} else {
}
if ((unsigned long )dev_priv->regs != (unsigned long )((void *)0)) {
iounmap(dev_priv->regs);
} else {
}
intel_opregion_free(dev);
tmp___0 = drm_core_check_feature(dev, 8192);
if (tmp___0) {
intel_modeset_cleanup(dev);
mutex_lock_nested(& dev->struct_mutex, 0);
i915_gem_cleanup_ringbuffer(dev);
mutex_unlock(& dev->struct_mutex);
drm_mm_takedown(& dev_priv->vram);
i915_gem_lastclose(dev);
} else {
}
drm_free(dev->dev_private, sizeof(drm_i915_private_t ), 2);
return (0);
}
}
int i915_driver_open(struct drm_device *dev , struct drm_file *file_priv )
{
struct drm_i915_file_private *i915_file_priv ;
void *tmp ;
{
while (1) {
if (drm_debug) {
printk("<7>[drm:%s] \n", "i915_driver_open");
} else {
}
break;
}
tmp = drm_alloc(sizeof(*i915_file_priv), 10);
i915_file_priv = (struct drm_i915_file_private *)tmp;
if (! i915_file_priv) {
return (-12);
} else {
}
file_priv->driver_priv = i915_file_priv;
i915_file_priv->mm.last_gem_seqno = 0;
i915_file_priv->mm.last_gem_throttle_seqno = 0;
return (0);
}
}
void i915_driver_lastclose(struct drm_device *dev )
{
drm_i915_private_t *dev_priv ;
int tmp ;
{
dev_priv = dev->dev_private;
if (! dev_priv) {
intelfb_restore();
return;
} else {
tmp = drm_core_check_feature(dev, 8192);
if (tmp) {
intelfb_restore();
return;
} else {
}
}
i915_gem_lastclose(dev);
if (dev_priv->agp_heap) {
i915_mem_takedown(& dev_priv->agp_heap);
} else {
}
i915_dma_cleanup(dev);
return;
}
}
void i915_driver_preclose(struct drm_device *dev , struct drm_file *file_priv )
{
drm_i915_private_t *dev_priv ;
int tmp ;
{
dev_priv = dev->dev_private;
tmp = drm_core_check_feature(dev, 8192);
if (tmp) {
} else {
i915_mem_release(dev, file_priv, dev_priv->agp_heap);
}
return;
}
}
void i915_driver_postclose(struct drm_device *dev , struct drm_file *file_priv )
{
struct drm_i915_file_private *i915_file_priv ;
{
i915_file_priv = file_priv->driver_priv;
drm_free(i915_file_priv, sizeof(*i915_file_priv), 10);
return;
}
}
struct drm_ioctl_desc i915_ioctls[37] =
{ {0, & i915_dma_init, (1 | 2) | 4},
{1, & i915_flush_ioctl, 1},
{2, & i915_flip_bufs, 1},
{3, & i915_batchbuffer, 1},
{4, & i915_irq_emit, 1},
{5, & i915_irq_wait, 1},
{6, & i915_getparam, 1},
{7, & i915_setparam, (1 | 2) | 4},
{8, & i915_mem_alloc, 1},
{9, & i915_mem_free, 1},
{10, & i915_mem_init_heap, (1 | 2) | 4},
{11, & i915_cmdbuffer, 1},
{12, & i915_mem_destroy_heap, (1 | 2) | 4},
{13, & i915_vblank_pipe_set, (1 | 2) | 4},
{14, & i915_vblank_pipe_get, 1},
{15, & i915_vblank_swap, 1},
{0U, 0, 0},
{17, & i915_set_status_page, (1 | 2) | 4},
{0U, 0, 0},
{19, & i915_gem_init_ioctl, (1 | 2) | 4},
{20, & i915_gem_execbuffer, 1},
{21, & i915_gem_pin_ioctl, 1 | 4},
{22, & i915_gem_unpin_ioctl, 1 | 4},
{23, & i915_gem_busy_ioctl, 1},
{24, & i915_gem_throttle_ioctl, 1},
{25, & i915_gem_entervt_ioctl, (1 | 2) | 4},
{26, & i915_gem_leavevt_ioctl, (1 | 2) | 4},
{27, & i915_gem_create_ioctl, 0},
{28, & i915_gem_pread_ioctl, 0},
{29, & i915_gem_pwrite_ioctl, 0},
{30, & i915_gem_mmap_ioctl, 0},
{31, & i915_gem_set_domain_ioctl, 0},
{32, & i915_gem_sw_finish_ioctl, 0},
{33, & i915_gem_set_tiling, 0},
{34, & i915_gem_get_tiling, 0},
{35, & i915_gem_get_aperture_ioctl, 0},
{36, & i915_gem_mmap_gtt_ioctl, 0}};
int i915_max_ioctl = sizeof(i915_ioctls) / sizeof(i915_ioctls[0]) + (sizeof(char [1 - 2 * 0]) - 1UL);
int i915_driver_device_is_agp(struct drm_device *dev )
{
{
return (1);
}
}
__inline static int variable_test_bit(int nr , unsigned long const volatile *addr )
{
int oldbit ;
{
__asm__ volatile ("bt %2,%1\n\t"
"sbb %0,%0": "=r" (oldbit): "m" (*((unsigned long *)addr)),
"Ir" (nr));
return (oldbit);
}
}
__inline static struct task_struct *( __attribute__((__always_inline__)) get_current)(void)
{
struct task_struct *ret__ ;
{
switch (sizeof(_proxy_pda.pcurrent)) {
case 2UL:
__asm__ ("mov"
"w %%gs:%c1,%0": "=r" (ret__): "i" ((unsigned int )(& ((struct x8664_pda *)0)->pcurrent)),
"m" (_proxy_pda.pcurrent));
break;
case 4UL:
__asm__ ("mov"
"l %%gs:%c1,%0": "=r" (ret__): "i" ((unsigned int )(& ((struct x8664_pda *)0)->pcurrent)),
"m" (_proxy_pda.pcurrent));
break;
case 8UL:
__asm__ ("mov"
"q %%gs:%c1,%0": "=r" (ret__): "i" ((unsigned int )(& ((struct x8664_pda *)0)->pcurrent)),
"m" (_proxy_pda.pcurrent));
break;
default:
__bad_pda_field();
}
return (ret__);
}
}
__inline static int test_ti_thread_flag(struct thread_info *ti , int flag )
{
int tmp___0 ;
{
tmp___0 = variable_test_bit(flag, & ti->flags);
return (tmp___0);
}
}
__inline static void atomic_inc(atomic_t *v )
{
{
__asm__ volatile (".section .smp_locks,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"661f\n"
".previous\n"
"661:\n\tlock; "
"incl %0": "=m" (v->counter): "m" (v->counter));
return;
}
}
extern unsigned long _spin_lock_irqsave(spinlock_t *lock ) __attribute__((__section__(".spinlock.text"))) ;
extern void _spin_unlock_irqrestore(spinlock_t *lock , unsigned long flags ) __attribute__((__section__(".spinlock.text"))) ;
extern int default_wake_function(wait_queue_t *wait , unsigned int mode , int sync ,
void *key ) ;
extern void init_waitqueue_head(wait_queue_head_t *q ) ;
extern void add_wait_queue(wait_queue_head_t *q , wait_queue_t *wait ) ;
extern void remove_wait_queue(wait_queue_head_t *q , wait_queue_t *wait ) ;
extern void __wake_up(wait_queue_head_t *q , unsigned int mode , int nr , void *key ) ;
extern unsigned long volatile jiffies __attribute__((__section__(".data"))) ;
extern long schedule_timeout(long timeout ) ;
__inline static int test_tsk_thread_flag(struct task_struct *tsk , int flag )
{
int tmp ;
{
tmp = test_ti_thread_flag((struct thread_info *)tsk->stack, flag);
return (tmp);
}
}
__inline static int signal_pending(struct task_struct *p )
{
int tmp ;
int tmp___0 ;
long tmp___1 ;
{
tmp = test_tsk_thread_flag(p, 2);
if (tmp) {
tmp___0 = 1;
} else {
tmp___0 = 0;
}
tmp___1 = ldv__builtin_expect(tmp___0, 0);
return (tmp___1);
}
}
extern void drm_handle_vblank(struct drm_device *dev , int crtc ) ;
void i915_user_irq_get(struct drm_device *dev ) ;
void i915_user_irq_put(struct drm_device *dev ) ;
void i915_enable_interrupt(struct drm_device *dev ) ;
void i915_enable_irq(drm_i915_private_t *dev_priv , u32 mask ) ;
void i915_enable_pipestat(drm_i915_private_t *dev_priv , int pipe , u32 mask ) ;
void i915_disable_pipestat(drm_i915_private_t *dev_priv , int pipe , u32 mask ) ;
uint32_t i915_get_gem_seqno(struct drm_device *dev ) ;
void opregion_asle_intr(struct drm_device *dev ) ;
void opregion_enable_asle(struct drm_device *dev ) ;
void i915_enable_irq(drm_i915_private_t *dev_priv , u32 mask )
{
{
if ((dev_priv->irq_mask_reg & mask) != 0U) {
dev_priv->irq_mask_reg = dev_priv->irq_mask_reg & ~ mask;
writel(dev_priv->irq_mask_reg, dev_priv->regs + 8360);
readl(dev_priv->regs + 8360);
} else {
}
return;
}
}
__inline static void i915_disable_irq(drm_i915_private_t *dev_priv , u32 mask )
{
{
if ((dev_priv->irq_mask_reg & mask) != mask) {
dev_priv->irq_mask_reg = dev_priv->irq_mask_reg | mask;
writel(dev_priv->irq_mask_reg, dev_priv->regs + 8360);
readl(dev_priv->regs + 8360);
} else {
}
return;
}
}
__inline static u32 i915_pipestat(int pipe )
{
{
if (pipe == 0) {
return (458788);
} else {
}
if (pipe == 1) {
return (462884);
} else {
}
while (1) {
__asm__ volatile ("1:\tud2\n"
".pushsection __bug_table,\"a\"\n"
"2:\t.quad 1b, %c0\n"
"\t.word %c1, 0\n"
"\t.org 2b+%c2\n"
".popsection": : "i" ("/work/ldvuser/novikov/work/current--X--drivers/gpu/drm/i915/i915.ko--X--defaultlinux--X--68_1--X--cpachecker/linux/csd_deg_dscv/36/dscv_tempdir/dscv/ri/68_1/drivers/gpu/drm/i915/i915_irq.c"),
"i" (91), "i" (sizeof(struct bug_entry )));
while (1) {
}
break;
}
return (0U);
}
}
void i915_enable_pipestat(drm_i915_private_t *dev_priv , int pipe , u32 mask )
{
u32 reg ;
u32 tmp ;
{
if ((dev_priv->pipestat[pipe] & mask) != mask) {
tmp = i915_pipestat(pipe);
reg = tmp;
dev_priv->pipestat[pipe] = dev_priv->pipestat[pipe] | mask;
writel(dev_priv->pipestat[pipe] | (mask >> 16), dev_priv->regs + reg);
readl(dev_priv->regs + reg);
} else {
}
return;
}
}
void i915_disable_pipestat(drm_i915_private_t *dev_priv , int pipe , u32 mask )
{
u32 reg ;
u32 tmp ;
{
if ((dev_priv->pipestat[pipe] & mask) != 0U) {
tmp = i915_pipestat(pipe);
reg = tmp;
dev_priv->pipestat[pipe] = dev_priv->pipestat[pipe] & ~ mask;
writel(dev_priv->pipestat[pipe], dev_priv->regs + reg);
readl(dev_priv->regs + reg);
} else {
}
return;
}
}
static int i915_pipe_enabled(struct drm_device *dev , int pipe )
{
drm_i915_private_t *dev_priv ;
unsigned long pipeconf ;
unsigned int tmp ;
{
dev_priv = (drm_i915_private_t *)dev->dev_private;
pipeconf = pipe ? 462856 : 458760;
tmp = readl(dev_priv->regs + pipeconf);
if (tmp & (unsigned int )(1 << 31)) {
return (1);
} else {
}
return (0);
}
}
u32 i915_get_vblank_counter(struct drm_device *dev , int pipe )
{
drm_i915_private_t *dev_priv ;
unsigned long high_frame ;
unsigned long low_frame ;
u32 high1 ;
u32 high2 ;
u32 low ;
u32 count ;
int tmp ;
unsigned int tmp___0 ;
unsigned int tmp___1 ;
unsigned int tmp___2 ;
{
dev_priv = (drm_i915_private_t *)dev->dev_private;
high_frame = pipe ? 462912 : 458816;
low_frame = pipe ? 462916 : 458820;
tmp = i915_pipe_enabled(dev, pipe);
if (tmp) {
} else {
printk("<3>[drm:%s] *ERROR* trying to get vblank count for disabled pipe %d\n",
"i915_get_vblank_counter", pipe);
return (0);
}
while (1) {
tmp___0 = readl(dev_priv->regs + high_frame);
high1 = (tmp___0 & 65535U) >> 0;
tmp___1 = readl(dev_priv->regs + low_frame);
low = (tmp___1 & 4278190080U) >> 24;
tmp___2 = readl(dev_priv->regs + high_frame);
high2 = (tmp___2 & 65535U) >> 0;
if (high1 != high2) {
} else {
break;
}
}
count = (high1 << 8) | low;
return (count);
}
}
irqreturn_t i915_driver_irq_handler(int irq , void *arg )
{
struct drm_device *dev ;
drm_i915_private_t *dev_priv ;
struct drm_i915_master_private *master_priv ;
u32 iir ;
u32 new_iir ;
u32 pipea_stats ;
u32 pipeb_stats ;
u32 vblank_status ;
u32 vblank_enable ;
int vblank ;
unsigned long irqflags ;
int irq_received ;
int ret ;
{
dev = (struct drm_device *)arg;
dev_priv = (drm_i915_private_t *)dev->dev_private;
vblank = 0;
ret = 0;
atomic_inc(& dev_priv->irq_received);
iir = readl(dev_priv->regs + 8356);
if (((((((((dev->pci_device == 10610 || dev->pci_device == 10626) || dev->pci_device == 10642) || dev->pci_device == 10658) || dev->pci_device == 10754) || dev->pci_device == 10770) || dev->pci_device == 10818) || dev->pci_device == 11778) || dev->pci_device == 11794) || dev->pci_device == 11810) {
vblank_status = 1UL << 2;
vblank_enable = 1UL << 18;
} else {
vblank_status = 1UL << 1;
vblank_enable = 1UL << 17;
}
while (1) {
irq_received = iir != (u32 )0;
while (1) {
irqflags = _spin_lock_irqsave(& dev_priv->user_irq_lock);
break;
}
pipea_stats = readl(dev_priv->regs + 458788);
pipeb_stats = readl(dev_priv->regs + 462884);
if (pipea_stats & 2147549183U) {
writel(pipea_stats, dev_priv->regs + 458788);
irq_received = 1;
} else {
}
if (pipeb_stats & 2147549183U) {
writel(pipeb_stats, dev_priv->regs + 462884);
irq_received = 1;
} else {
}
while (1) {
_spin_unlock_irqrestore(& dev_priv->user_irq_lock, irqflags);
break;
}
if (! irq_received) {
break;
} else {
}
ret = 1;
writel(iir, dev_priv->regs + 8356);
new_iir = readl(dev_priv->regs + 8356);
if ((dev->primary)->master) {
master_priv = ((dev->primary)->master)->driver_priv;
if (master_priv->sarea_priv) {
(master_priv->sarea_priv)->last_dispatch = *((u32 volatile *)dev_priv->hw_status_page + 33);
} else {
}
} else {
}
if (iir & (unsigned int )(1 << 1)) {
dev_priv->mm.irq_gem_seqno = i915_get_gem_seqno(dev);
__wake_up(& dev_priv->irq_queue, 1, 1, (void *)0);
} else {
}
if (pipea_stats & vblank_status) {
vblank = vblank + 1;
drm_handle_vblank(dev, 0);
} else {
}
if (pipeb_stats & vblank_status) {
vblank = vblank + 1;
drm_handle_vblank(dev, 1);
} else {
}
if ((unsigned long )pipeb_stats & (1UL << 6) || iir & (unsigned int )(1 << 0)) {
opregion_asle_intr(dev);
} else {
}
iir = new_iir;
}
return (ret);
}
}
static int i915_emit_irq(struct drm_device *dev )
{
drm_i915_private_t *dev_priv ;
struct drm_i915_master_private *master_priv ;
unsigned int outring ;
unsigned int ringmask ;
unsigned int outcount ;
char volatile *virt ;
{
dev_priv = dev->dev_private;
master_priv = ((dev->primary)->master)->driver_priv;
i915_kernel_lost_context(dev);
while (1) {
if (drm_debug) {
printk("<7>[drm:%s] \n", "i915_emit_irq");
} else {
}
break;
}
dev_priv->counter = dev_priv->counter + (uint32_t )1;
if ((unsigned long )dev_priv->counter > 2147483647UL) {
dev_priv->counter = 1;
} else {
}
if (master_priv->sarea_priv) {
(master_priv->sarea_priv)->last_enqueue = dev_priv->counter;
} else {
}
while (1) {
if (dev_priv->ring.space < 4 * 4) {
i915_wait_ring(dev, 4 * 4, "i915_emit_irq");
} else {
}
outcount = 0;
outring = dev_priv->ring.tail;
ringmask = dev_priv->ring.tail_mask;
virt = dev_priv->ring.virtual_start;
break;
}
while (1) {
*((unsigned int volatile *)(virt + outring)) = (33 << 23) | 1;
outcount = outcount + 1U;
outring = outring + 4U;
outring = outring & ringmask;
break;
}
while (1) {
*((unsigned int volatile *)(virt + outring)) = 33 << 2;
outcount = outcount + 1U;
outring = outring + 4U;
outring = outring & ringmask;
break;
}
while (1) {
*((unsigned int volatile *)(virt + outring)) = dev_priv->counter;
outcount = outcount + 1U;
outring = outring + 4U;
outring = outring & ringmask;
break;
}
while (1) {
*((unsigned int volatile *)(virt + outring)) = (2 << 23) | 0;
outcount = outcount + 1U;
outring = outring + 4U;
outring = outring & ringmask;
break;
}
while (1) {
dev_priv->ring.tail = outring;
dev_priv->ring.space = (unsigned int )dev_priv->ring.space - outcount * 4U;
writel(outring, dev_priv->regs + 8240);
break;
}
return (dev_priv->counter);
}
}
void i915_user_irq_get(struct drm_device *dev )
{
drm_i915_private_t *dev_priv ;
unsigned long irqflags ;
{
dev_priv = (drm_i915_private_t *)dev->dev_private;
while (1) {
irqflags = _spin_lock_irqsave(& dev_priv->user_irq_lock);
break;
}
if (dev->irq_enabled) {
dev_priv->user_irq_refcount = dev_priv->user_irq_refcount + 1;
if (dev_priv->user_irq_refcount == 1) {
i915_enable_irq(dev_priv, 1 << 1);
} else {
}
} else {
}
while (1) {
_spin_unlock_irqrestore(& dev_priv->user_irq_lock, irqflags);
break;
}
return;
}
}
void i915_user_irq_put(struct drm_device *dev )
{
drm_i915_private_t *dev_priv ;
unsigned long irqflags ;
long tmp ;
{
dev_priv = (drm_i915_private_t *)dev->dev_private;
while (1) {
irqflags = _spin_lock_irqsave(& dev_priv->user_irq_lock);
break;
}
while (1) {
tmp = ldv__builtin_expect(! (! (dev->irq_enabled && dev_priv->user_irq_refcount <= 0)),
0);
if (tmp) {
while (1) {
__asm__ volatile ("1:\tud2\n"
".pushsection __bug_table,\"a\"\n"
"2:\t.quad 1b, %c0\n"
"\t.word %c1, 0\n"
"\t.org 2b+%c2\n"
".popsection": : "i" ("/work/ldvuser/novikov/work/current--X--drivers/gpu/drm/i915/i915.ko--X--defaultlinux--X--68_1--X--cpachecker/linux/csd_deg_dscv/36/dscv_tempdir/dscv/ri/68_1/drivers/gpu/drm/i915/i915_irq.c"),
"i" (327), "i" (sizeof(struct bug_entry )));
while (1) {
}
break;
}
} else {
}
break;
}
if (dev->irq_enabled) {
dev_priv->user_irq_refcount = dev_priv->user_irq_refcount - 1;
if (dev_priv->user_irq_refcount == 0) {
i915_disable_irq(dev_priv, 1 << 1);
} else {
}
} else {
}
while (1) {
_spin_unlock_irqrestore(& dev_priv->user_irq_lock, irqflags);
break;
}
return;
}
}
static int i915_wait_irq(struct drm_device *dev , int irq_nr )
{
drm_i915_private_t *dev_priv ;
struct drm_i915_master_private *master_priv ;
int ret ;
wait_queue_t entry ;
struct task_struct *tmp ;
unsigned long end ;
struct task_struct *tmp___0 ;
struct task_struct *tmp___1 ;
int tmp___2 ;
struct task_struct *tmp___3 ;
{
dev_priv = (drm_i915_private_t *)dev->dev_private;
master_priv = ((dev->primary)->master)->driver_priv;
ret = 0;
while (1) {
if (drm_debug) {
printk("<7>[drm:%s] irq_nr=%d breadcrumb=%d\n", "i915_wait_irq", irq_nr, *((u32 volatile *)dev_priv->hw_status_page + 33));
} else {
}
break;
}
if (*((u32 volatile *)dev_priv->hw_status_page + 33) >= (u32 volatile )irq_nr) {
if (master_priv->sarea_priv) {
(master_priv->sarea_priv)->last_dispatch = *((u32 volatile *)dev_priv->hw_status_page + 33);
} else {
}
return (0);
} else {
}
if (master_priv->sarea_priv) {
(master_priv->sarea_priv)->perf_boxes = (master_priv->sarea_priv)->perf_boxes | 4;
} else {
}
i915_user_irq_get(dev);
while (1) {
tmp = get_current();
entry.flags = 0U;
entry.private = tmp;
entry.func = & default_wake_function;
entry.task_list.next = (void *)0;
entry.task_list.prev = (void *)0;
end = jiffies + (unsigned long volatile )(3 * 250);
add_wait_queue(& dev_priv->irq_queue, & entry);
while (1) {
while (1) {
tmp___0 = get_current();
tmp___0->state = 1;
break;
}
if (*((u32 volatile *)dev_priv->hw_status_page + 33) >= (u32 volatile )irq_nr) {
break;
} else {
}
if ((long )jiffies - (long )end >= 0L) {
ret = -16;
break;
} else {
}
schedule_timeout(250 / 100 > 1 ? 250 / 100 : 1);
tmp___1 = get_current();
tmp___2 = signal_pending(tmp___1);
if (tmp___2) {
ret = -4;
break;
} else {
}
}
while (1) {
tmp___3 = get_current();
tmp___3->state = 0;
break;
}
remove_wait_queue(& dev_priv->irq_queue, & entry);
break;
}
i915_user_irq_put(dev);
if (ret == -16) {
printk("<3>[drm:%s] *ERROR* EBUSY -- rec: %d emitted: %d\n", "i915_wait_irq",
*((u32 volatile *)dev_priv->hw_status_page + 33), (int )dev_priv->counter);
} else {
}
return (ret);
}
}
int i915_irq_emit(struct drm_device *dev , void *data , struct drm_file *file_priv )
{
drm_i915_private_t *dev_priv ;
drm_i915_irq_emit_t *emit ;
int result ;
unsigned long tmp ;
{
dev_priv = dev->dev_private;
emit = data;
while (1) {
if ((unsigned long )((drm_i915_private_t *)dev->dev_private)->ring.ring_obj == (unsigned long )((void *)0)) {
while (1) {
if (! (((file_priv->master)->lock.hw_lock)->lock & (unsigned int volatile )2147483648U) || (unsigned long )(file_priv->master)->lock.file_priv != (unsigned long )file_priv) {
printk("<3>[drm:%s] *ERROR* %s called without lock held, held %d owner %p %p\n",
"i915_irq_emit", "i915_irq_emit", ((file_priv->master)->lock.hw_lock)->lock & (unsigned int volatile )2147483648U,
(file_priv->master)->lock.file_priv, file_priv);
return (-22);
} else {
}
break;
}
} else {
}
break;
}
if (! dev_priv) {
printk("<3>[drm:%s] *ERROR* called with no initialization\n", "i915_irq_emit");
return (-22);
} else {
}
mutex_lock_nested(& dev->struct_mutex, 0);
result = i915_emit_irq(dev);
mutex_unlock(& dev->struct_mutex);
tmp = copy_to_user(emit->irq_seq, & result, sizeof(int ));
if (tmp) {
printk("<3>[drm:%s] *ERROR* copy_to_user\n", "i915_irq_emit");
return (-14);
} else {
}
return (0);
}
}
int i915_irq_wait(struct drm_device *dev , void *data , struct drm_file *file_priv )
{
drm_i915_private_t *dev_priv ;
drm_i915_irq_wait_t *irqwait ;
int tmp ;
{
dev_priv = dev->dev_private;
irqwait = data;
if (! dev_priv) {
printk("<3>[drm:%s] *ERROR* called with no initialization\n", "i915_irq_wait");
return (-22);
} else {
}
tmp = i915_wait_irq(dev, irqwait->irq_seq);
return (tmp);
}
}
int i915_enable_vblank(struct drm_device *dev , int pipe )
{
drm_i915_private_t *dev_priv ;
unsigned long irqflags ;
{
dev_priv = (drm_i915_private_t *)dev->dev_private;
while (1) {
irqflags = _spin_lock_irqsave(& dev_priv->user_irq_lock);
break;
}
if (((((((((dev->pci_device == 10610 || dev->pci_device == 10626) || dev->pci_device == 10642) || dev->pci_device == 10658) || dev->pci_device == 10754) || dev->pci_device == 10770) || dev->pci_device == 10818) || dev->pci_device == 11778) || dev->pci_device == 11794) || dev->pci_device == 11810) {
i915_enable_pipestat(dev_priv, pipe, 1UL << 18);
} else {
i915_enable_pipestat(dev_priv, pipe, 1UL << 17);
}
while (1) {
_spin_unlock_irqrestore(& dev_priv->user_irq_lock, irqflags);
break;
}
return (0);
}
}
void i915_disable_vblank(struct drm_device *dev , int pipe )
{
drm_i915_private_t *dev_priv ;
unsigned long irqflags ;
{
dev_priv = (drm_i915_private_t *)dev->dev_private;
while (1) {
irqflags = _spin_lock_irqsave(& dev_priv->user_irq_lock);
break;
}
i915_disable_pipestat(dev_priv, pipe, (1UL << 17) | (1UL << 18));
while (1) {
_spin_unlock_irqrestore(& dev_priv->user_irq_lock, irqflags);
break;
}
return;
}
}
void i915_enable_interrupt(struct drm_device *dev )
{
struct drm_i915_private *dev_priv ;
{
dev_priv = dev->dev_private;
opregion_enable_asle(dev);
dev_priv->irq_enabled = 1;
return;
}
}
int i915_vblank_pipe_set(struct drm_device *dev , void *data , struct drm_file *file_priv )
{
drm_i915_private_t *dev_priv ;
{
dev_priv = dev->dev_private;
if (! dev_priv) {
printk("<3>[drm:%s] *ERROR* called with no initialization\n", "i915_vblank_pipe_set");
return (-22);
} else {
}
return (0);
}
}
int i915_vblank_pipe_get(struct drm_device *dev , void *data , struct drm_file *file_priv )
{
drm_i915_private_t *dev_priv ;
drm_i915_vblank_pipe_t *pipe ;
{
dev_priv = dev->dev_private;
pipe = data;
if (! dev_priv) {
printk("<3>[drm:%s] *ERROR* called with no initialization\n", "i915_vblank_pipe_get");
return (-22);
} else {
}
pipe->pipe = 1 | 2;
return (0);
}
}
int i915_vblank_swap(struct drm_device *dev , void *data , struct drm_file *file_priv )
{
{
return (-22);
}
}
void i915_driver_irq_preinstall(struct drm_device *dev )
{
drm_i915_private_t *dev_priv ;
{
dev_priv = (drm_i915_private_t *)dev->dev_private;
dev_priv->irq_received.counter = 0;
writel(61438, dev_priv->regs + 8344);
writel(0, dev_priv->regs + 458788);
writel(0, dev_priv->regs + 462884);
writel(4294967295U, dev_priv->regs + 8360);
writel(0, dev_priv->regs + 8352);
readl(dev_priv->regs + 8352);
return;
}
}
int i915_driver_irq_postinstall(struct drm_device *dev )
{
drm_i915_private_t *dev_priv ;
unsigned int tmp ;
unsigned int tmp___0 ;
unsigned int tmp___1 ;
{
dev_priv = (drm_i915_private_t *)dev->dev_private;
dev_priv->vblank_pipe = 1 | 2;
dev->max_vblank_count = 16777215;
dev_priv->irq_mask_reg = ~ (((1 << 0) | (1 << 6)) | (1 << 4));
dev_priv->pipestat[0] = 0;
dev_priv->pipestat[1] = 0;
tmp = readl(dev_priv->regs + 458788);
writel(tmp & 2147549183U, dev_priv->regs + 458788);
tmp___0 = readl(dev_priv->regs + 462884);
writel(tmp___0 & 2147549183U, dev_priv->regs + 462884);
tmp___1 = readl(dev_priv->regs + 8356);
writel(tmp___1, dev_priv->regs + 8356);
writel((((1 << 0) | (1 << 6)) | (1 << 4)) | (1 << 1), dev_priv->regs + 8352);
writel(dev_priv->irq_mask_reg, dev_priv->regs + 8360);
readl(dev_priv->regs + 8352);
opregion_enable_asle(dev);
init_waitqueue_head(& dev_priv->irq_queue);
return (0);
}
}
void i915_driver_irq_uninstall(struct drm_device *dev )
{
drm_i915_private_t *dev_priv ;
unsigned int tmp ;
unsigned int tmp___0 ;
unsigned int tmp___1 ;
{
dev_priv = (drm_i915_private_t *)dev->dev_private;
if (! dev_priv) {
return;
} else {
}
dev_priv->vblank_pipe = 0;
writel(4294967295U, dev_priv->regs + 8344);
writel(0, dev_priv->regs + 458788);
writel(0, dev_priv->regs + 462884);
writel(4294967295U, dev_priv->regs + 8360);
writel(0, dev_priv->regs + 8352);
tmp = readl(dev_priv->regs + 458788);
writel(tmp & 2147549183U, dev_priv->regs + 458788);
tmp___0 = readl(dev_priv->regs + 462884);
writel(tmp___0 & 2147549183U, dev_priv->regs + 462884);
tmp___1 = readl(dev_priv->regs + 8356);
writel(tmp___1, dev_priv->regs + 8356);
return;
}
}
static void mark_block(struct drm_device *dev , struct mem_block *p , int in_use )
{
drm_i915_private_t *dev_priv ;
struct drm_i915_master_private *master_priv ;
drm_i915_sarea_t *sarea_priv ;
struct drm_tex_region *list ;
unsigned int shift ;
unsigned int nr ;
unsigned int start ;
unsigned int end ;
unsigned int i ;
int age ;
{
dev_priv = dev->dev_private;
master_priv = ((dev->primary)->master)->driver_priv;
sarea_priv = master_priv->sarea_priv;
shift = dev_priv->tex_lru_log_granularity;
nr = 255;
start = p->start >> shift;
end = ((p->start + p->size) - 1) >> shift;
sarea_priv->texAge = sarea_priv->texAge + 1;
age = sarea_priv->texAge;
list = sarea_priv->texList;
i = start;
while (1) {
if (i <= end) {
} else {
break;
}
(list + i)->in_use = in_use;
(list + i)->age = age;
(list + (unsigned int )(list + i)->next)->prev = (list + i)->prev;
(list + (unsigned int )(list + i)->prev)->next = (list + i)->next;
(list + i)->prev = nr;
(list + i)->next = (list + nr)->next;
(list + (unsigned int )(list + nr)->next)->prev = i;
(list + nr)->next = i;
i = i + 1U;
}
return;
}
}
static struct mem_block *split_block(struct mem_block *p , int start , int size ,
struct drm_file *file_priv )
{
struct mem_block *newblock ;
void *tmp ;
struct mem_block *newblock___0 ;
void *tmp___0 ;
{
if (start > p->start) {
tmp = drm_alloc(sizeof(*newblock), 14);
newblock = tmp;
if (! newblock) {
goto out;
} else {
}
newblock->start = start;
newblock->size = p->size - (start - p->start);
newblock->file_priv = (void *)0;
newblock->next = p->next;
newblock->prev = p;
(p->next)->prev = newblock;
p->next = newblock;
p->size = p->size - newblock->size;
p = newblock;
} else {
}
if (size < p->size) {
tmp___0 = drm_alloc(sizeof(*newblock___0), 14);
newblock___0 = tmp___0;
if (! newblock___0) {
goto out;
} else {
}
newblock___0->start = start + size;
newblock___0->size = p->size - size;
newblock___0->file_priv = (void *)0;
newblock___0->next = p->next;
newblock___0->prev = p;
(p->next)->prev = newblock___0;
p->next = newblock___0;
p->size = size;
} else {
}
out:
p->file_priv = file_priv;
return (p);
}
}
static struct mem_block *alloc_block(struct mem_block *heap , int size , int align2 ,
struct drm_file *file_priv )
{
struct mem_block *p ;
int mask ;
int start ;
struct mem_block *tmp ;
{
mask = (1 << align2) - 1;
p = heap->next;
while (1) {
if ((unsigned long )p != (unsigned long )heap) {
} else {
break;
}
start = (p->start + mask) & ~ mask;
if ((unsigned long )p->file_priv == (unsigned long )((void *)0) && start + size <= p->start + p->size) {
tmp = split_block(p, start, size, file_priv);
return (tmp);
} else {
}
p = p->next;
}
return ((void *)0);
}
}
static struct mem_block *find_block(struct mem_block *heap , int start )
{
struct mem_block *p ;
{
p = heap->next;
while (1) {
if ((unsigned long )p != (unsigned long )heap) {
} else {
break;
}
if (p->start == start) {
return (p);
} else {
}
p = p->next;
}
return ((void *)0);
}
}
static void free_block(struct mem_block *p )
{
struct mem_block *q ;
struct mem_block *q___0 ;
{
p->file_priv = (void *)0;
if ((unsigned long )(p->next)->file_priv == (unsigned long )((void *)0)) {
q = p->next;
p->size = p->size + q->size;
p->next = q->next;
(p->next)->prev = p;
drm_free(q, sizeof(*q), 14);
} else {
}
if ((unsigned long )(p->prev)->file_priv == (unsigned long )((void *)0)) {
q___0 = p->prev;
q___0->size = q___0->size + p->size;
q___0->next = p->next;
(q___0->next)->prev = q___0;
drm_free(p, sizeof(*q___0), 14);
} else {
}
return;
}
}
static int init_heap(struct mem_block **heap , int start , int size )
{
struct mem_block *blocks ;
void *tmp ;
void *tmp___0 ;
struct mem_block *tmp___1 ;
struct mem_block *tmp___2 ;
{
tmp = drm_alloc(sizeof(*blocks), 14);
blocks = tmp;
if (! blocks) {
return (-12);
} else {
}
tmp___0 = drm_alloc(sizeof(*(*heap)), 14);
*heap = tmp___0;
if (! *heap) {
drm_free(blocks, sizeof(*blocks), 14);
return (-12);
} else {
}
blocks->start = start;
blocks->size = size;
blocks->file_priv = (void *)0;
tmp___1 = *heap;
blocks->prev = tmp___1;
blocks->next = tmp___1;
memset(*heap, 0, sizeof(*(*heap)));
(*heap)->file_priv = (struct drm_file *)-1;
tmp___2 = blocks;
(*heap)->prev = tmp___2;
(*heap)->next = tmp___2;
return (0);
}
}
void i915_mem_release(struct drm_device *dev , struct drm_file *file_priv , struct mem_block *heap )
{
struct mem_block *p ;
struct mem_block *q ;
{
if (! heap || ! heap->next) {
return;
} else {
}
p = heap->next;
while (1) {
if ((unsigned long )p != (unsigned long )heap) {
} else {
break;
}
if ((unsigned long )p->file_priv == (unsigned long )file_priv) {
p->file_priv = (void *)0;
mark_block(dev, p, 0);
} else {
}
p = p->next;
}
p = heap->next;
while (1) {
if ((unsigned long )p != (unsigned long )heap) {
} else {
break;
}
while (1) {
if ((unsigned long )p->file_priv == (unsigned long )((void *)0) && (unsigned long )(p->next)->file_priv == (unsigned long )((void *)0)) {
} else {
break;
}
q = p->next;
p->size = p->size + q->size;
p->next = q->next;
(p->next)->prev = p;
drm_free(q, sizeof(*q), 14);
}
p = p->next;
}
return;
}
}
void i915_mem_takedown(struct mem_block **heap )
{
struct mem_block *p ;
struct mem_block *q ;
{
if (! *heap) {
return;
} else {
}
p = (*heap)->next;
while (1) {
if ((unsigned long )p != (unsigned long )*heap) {
} else {
break;
}
q = p;
p = p->next;
drm_free(q, sizeof(*q), 14);
}
drm_free(*heap, sizeof(*(*heap)), 14);
*heap = (void *)0;
return;
}
}
static struct mem_block **get_heap(drm_i915_private_t *dev_priv , int region )
{
{
switch (region) {
case 1:
return (& dev_priv->agp_heap);
default:
return ((void *)0);
}
}
}
int i915_mem_alloc(struct drm_device *dev , void *data , struct drm_file *file_priv )
{
drm_i915_private_t *dev_priv ;
drm_i915_mem_alloc_t *alloc ;
struct mem_block *block ;
struct mem_block **heap ;
unsigned long tmp ;
{
dev_priv = dev->dev_private;
alloc = data;
if (! dev_priv) {
printk("<3>[drm:%s] *ERROR* called with no initialization\n", "i915_mem_alloc");
return (-22);
} else {
}
heap = get_heap(dev_priv, alloc->region);
if (! heap || ! *heap) {
return (-14);
} else {
}
if (alloc->alignment < 12) {
alloc->alignment = 12;
} else {
}
block = alloc_block(*heap, alloc->size, alloc->alignment, file_priv);
if (! block) {
return (-12);
} else {
}
mark_block(dev, block, 1);
tmp = copy_to_user(alloc->region_offset, & block->start, sizeof(int ));
if (tmp) {
printk("<3>[drm:%s] *ERROR* copy_to_user\n", "i915_mem_alloc");
return (-14);
} else {
}
return (0);
}
}
int i915_mem_free(struct drm_device *dev , void *data , struct drm_file *file_priv )
{
drm_i915_private_t *dev_priv ;
drm_i915_mem_free_t *memfree ;
struct mem_block *block ;
struct mem_block **heap ;
{
dev_priv = dev->dev_private;
memfree = data;
if (! dev_priv) {
printk("<3>[drm:%s] *ERROR* called with no initialization\n", "i915_mem_free");
return (-22);
} else {
}
heap = get_heap(dev_priv, memfree->region);
if (! heap || ! *heap) {
return (-14);
} else {
}
block = find_block(*heap, memfree->region_offset);
if (! block) {
return (-14);
} else {
}
if ((unsigned long )block->file_priv != (unsigned long )file_priv) {
return (-1);
} else {
}
mark_block(dev, block, 0);
free_block(block);
return (0);
}
}
int i915_mem_init_heap(struct drm_device *dev , void *data , struct drm_file *file_priv )
{
drm_i915_private_t *dev_priv ;
drm_i915_mem_init_heap_t *initheap ;
struct mem_block **heap ;
int tmp ;
{
dev_priv = dev->dev_private;
initheap = data;
if (! dev_priv) {
printk("<3>[drm:%s] *ERROR* called with no initialization\n", "i915_mem_init_heap");
return (-22);
} else {
}
heap = get_heap(dev_priv, initheap->region);
if (! heap) {
return (-14);
} else {
}
if (*heap) {
printk("<3>[drm:%s] *ERROR* heap already initialized?", "i915_mem_init_heap");
return (-14);
} else {
}
tmp = init_heap(heap, initheap->start, initheap->size);
return (tmp);
}
}
int i915_mem_destroy_heap(struct drm_device *dev , void *data , struct drm_file *file_priv )
{
drm_i915_private_t *dev_priv ;
drm_i915_mem_destroy_heap_t *destroyheap ;
struct mem_block **heap ;
{
dev_priv = dev->dev_private;
destroyheap = data;
if (! dev_priv) {
printk("<3>[drm:%s] *ERROR* called with no initialization\n", "i915_mem_destroy_heap");
return (-22);
} else {
}
heap = get_heap(dev_priv, destroyheap->region);
if (! heap) {
printk("<3>[drm:%s] *ERROR* get_heap failed", "i915_mem_destroy_heap");
return (-14);
} else {
}
if (! *heap) {
printk("<3>[drm:%s] *ERROR* heap not initialized?", "i915_mem_destroy_heap");
return (-14);
} else {
}
i915_mem_takedown(heap);
return (0);
}
}
extern void __bad_udelay(void) ;
extern void __const_udelay(unsigned long xloops ) ;
__inline static unsigned char readb(void const volatile *addr )
{
unsigned char ret ;
{
__asm__ volatile ("mov"
"b"
" %1,%0": "=q" (ret): "m" (*((unsigned char volatile *)addr)): "memory");
return (ret);
}
}
__inline static void writeb(unsigned char val , void volatile *addr )
{
{
__asm__ volatile ("mov"
"b"
" %0,%1": : "q" (val), "m" (*((unsigned char volatile *)addr)): "memory");
return;
}
}
extern int pci_bus_read_config_byte(struct pci_bus *bus , unsigned int devfn , int where ,
u8 *val ) ;
extern int pci_bus_write_config_byte(struct pci_bus *bus , unsigned int devfn , int where ,
u8 val ) ;
__inline static int pci_read_config_byte(struct pci_dev *dev , int where , u8 *val )
{
int tmp ;
{
tmp = pci_bus_read_config_byte(dev->bus, dev->devfn, where, val);
return (tmp);
}
}
__inline static int pci_write_config_byte(struct pci_dev *dev , int where , u8 val )
{
int tmp ;
{
tmp = pci_bus_write_config_byte(dev->bus, dev->devfn, where, val);
return (tmp);
}
}
static bool i915_pipe_enabled___0(struct drm_device *dev , enum pipe pipe )
{
struct drm_i915_private *dev_priv ;
unsigned int tmp ;
unsigned int tmp___0 ;
{
dev_priv = dev->dev_private;
if ((unsigned int )pipe == (unsigned int )PIPE_A) {
tmp = readl(dev_priv->regs + 24596);
return (tmp & (unsigned int )(1 << 31));
} else {
tmp___0 = readl(dev_priv->regs + 24600);
return (tmp___0 & (unsigned int )(1 << 31));
}
}
}
static void i915_save_palette(struct drm_device *dev , enum pipe pipe )
{
struct drm_i915_private *dev_priv ;
unsigned long reg ;
u32 *array ;
int i ;
bool tmp ;
{
dev_priv = dev->dev_private;
reg = (unsigned int )pipe == (unsigned int )PIPE_A ? 40960 : 43008;
tmp = i915_pipe_enabled___0(dev, pipe);
if (tmp) {
} else {
return;
}
if ((unsigned int )pipe == (unsigned int )PIPE_A) {
array = dev_priv->save_palette_a;
} else {
array = dev_priv->save_palette_b;
}
i = 0;
while (1) {
if (i < 256) {
} else {
break;
}
*(array + i) = readl(dev_priv->regs + (reg + (unsigned long )(i << 2)));
i = i + 1;
}
return;
}
}
static void i915_restore_palette(struct drm_device *dev , enum pipe pipe )
{
struct drm_i915_private *dev_priv ;
unsigned long reg ;
u32 *array ;
int i ;
bool tmp ;
{
dev_priv = dev->dev_private;
reg = (unsigned int )pipe == (unsigned int )PIPE_A ? 40960 : 43008;
tmp = i915_pipe_enabled___0(dev, pipe);
if (tmp) {
} else {
return;
}
if ((unsigned int )pipe == (unsigned int )PIPE_A) {
array = dev_priv->save_palette_a;
} else {
array = dev_priv->save_palette_b;
}
i = 0;
while (1) {
if (i < 256) {
} else {
break;
}
writel(*(array + i), dev_priv->regs + (reg + (unsigned long )(i << 2)));
i = i + 1;
}
return;
}
}
static u8 i915_read_indexed(struct drm_device *dev , u16 index_port , u16 data_port ,
u8 reg )
{
struct drm_i915_private *dev_priv ;
unsigned char tmp ;
{
dev_priv = dev->dev_private;
writeb(reg, dev_priv->regs + (int )index_port);
tmp = readb(dev_priv->regs + (int )data_port);
return (tmp);
}
}
static u8 i915_read_ar(struct drm_device *dev , u16 st01 , u8 reg , u16 palette_enable )
{
struct drm_i915_private *dev_priv ;
unsigned char tmp ;
{
dev_priv = dev->dev_private;
readb(dev_priv->regs + (int )st01);
writeb((int )palette_enable | (int )reg, dev_priv->regs + 960);
tmp = readb(dev_priv->regs + 961);
return (tmp);
}
}
static void i915_write_ar(struct drm_device *dev , u16 st01 , u8 reg , u8 val , u16 palette_enable )
{
struct drm_i915_private *dev_priv ;
{
dev_priv = dev->dev_private;
readb(dev_priv->regs + (int )st01);
writeb((int )palette_enable | (int )reg, dev_priv->regs + 960);
writeb(val, dev_priv->regs + 960);
return;
}
}
static void i915_write_indexed(struct drm_device *dev , u16 index_port , u16 data_port ,
u8 reg , u8 val )
{
struct drm_i915_private *dev_priv ;
{
dev_priv = dev->dev_private;
writeb(reg, dev_priv->regs + (int )index_port);
writeb(val, dev_priv->regs + (int )data_port);
return;
}
}
static void i915_save_vga(struct drm_device *dev )
{
struct drm_i915_private *dev_priv ;
int i ;
u16 cr_index ;
u16 cr_data ;
u16 st01 ;
u8 tmp ;
{
dev_priv = dev->dev_private;
dev_priv->saveDACMASK = readb(dev_priv->regs + 966);
writeb(0, dev_priv->regs + 967);
i = 0;
while (1) {
if (i < 256 * 3) {
} else {
break;
}
dev_priv->saveDACDATA[i] = readb(dev_priv->regs + 969);
i = i + 1;
}
dev_priv->saveMSR = readb(dev_priv->regs + 972);
if ((int )dev_priv->saveMSR & (1 << 0)) {
cr_index = 980;
cr_data = 981;
st01 = 986;
} else {
cr_index = 948;
cr_data = 949;
st01 = 954;
}
tmp = i915_read_indexed(dev, cr_index, cr_data, 17);
i915_write_indexed(dev, cr_index, cr_data, 17, (int )tmp & ~ 128);
i = 0;
while (1) {
if (i <= 36) {
} else {
break;
}
dev_priv->saveCR[i] = i915_read_indexed(dev, cr_index, cr_data, i);
i = i + 1;
}
dev_priv->saveCR[17] = (int )dev_priv->saveCR[17] & ~ 128;
readb(dev_priv->regs + (int )st01);
dev_priv->saveAR_INDEX = readb(dev_priv->regs + 960);
i = 0;
while (1) {
if (i <= 20) {
} else {
break;
}
dev_priv->saveAR[i] = i915_read_ar(dev, st01, i, 0);
i = i + 1;
}
readb(dev_priv->regs + (int )st01);
writeb(dev_priv->saveAR_INDEX, dev_priv->regs + 960);
readb(dev_priv->regs + (int )st01);
i = 0;
while (1) {
if (i < 9) {
} else {
break;
}
dev_priv->saveGR[i] = i915_read_indexed(dev, 974, 975, i);
i = i + 1;
}
dev_priv->saveGR[16] = i915_read_indexed(dev, 974, 975, 16);
dev_priv->saveGR[17] = i915_read_indexed(dev, 974, 975, 17);
dev_priv->saveGR[24] = i915_read_indexed(dev, 974, 975, 24);
i = 0;
while (1) {
if (i < 8) {
} else {
break;
}
dev_priv->saveSR[i] = i915_read_indexed(dev, 964, 965, i);
i = i + 1;
}
return;
}
}
static void i915_restore_vga(struct drm_device *dev )
{
struct drm_i915_private *dev_priv ;
int i ;
u16 cr_index ;
u16 cr_data ;
u16 st01 ;
{
dev_priv = dev->dev_private;
writeb(dev_priv->saveMSR, dev_priv->regs + 962);
if ((int )dev_priv->saveMSR & (1 << 0)) {
cr_index = 980;
cr_data = 981;
st01 = 986;
} else {
cr_index = 948;
cr_data = 949;
st01 = 954;
}
i = 0;
while (1) {
if (i < 7) {
} else {
break;
}
i915_write_indexed(dev, 964, 965, i, dev_priv->saveSR[i]);
i = i + 1;
}
i915_write_indexed(dev, cr_index, cr_data, 17, dev_priv->saveCR[17]);
i = 0;
while (1) {
if (i <= 36) {
} else {
break;
}
i915_write_indexed(dev, cr_index, cr_data, i, dev_priv->saveCR[i]);
i = i + 1;
}
i = 0;
while (1) {
if (i < 9) {
} else {
break;
}
i915_write_indexed(dev, 974, 975, i, dev_priv->saveGR[i]);
i = i + 1;
}
i915_write_indexed(dev, 974, 975, 16, dev_priv->saveGR[16]);
i915_write_indexed(dev, 974, 975, 17, dev_priv->saveGR[17]);
i915_write_indexed(dev, 974, 975, 24, dev_priv->saveGR[24]);
readb(dev_priv->regs + (int )st01);
i = 0;
while (1) {
if (i <= 20) {
} else {
break;
}
i915_write_ar(dev, st01, i, dev_priv->saveAR[i], 0);
i = i + 1;
}
readb(dev_priv->regs + (int )st01);
writeb((int )dev_priv->saveAR_INDEX | 32, dev_priv->regs + 960);
readb(dev_priv->regs + (int )st01);
writeb(dev_priv->saveDACMASK, dev_priv->regs + 966);
writeb(0, dev_priv->regs + 968);
i = 0;
while (1) {
if (i < 256 * 3) {
} else {
break;
}
writeb(dev_priv->saveDACDATA[i], dev_priv->regs + 969);
i = i + 1;
}
return;
}
}
int i915_save_state(struct drm_device *dev )
{
struct drm_i915_private *dev_priv ;
int i ;
{
dev_priv = dev->dev_private;
pci_read_config_byte(dev->pdev, 244, & dev_priv->saveLBB);
if ((((((((((dev->pci_device == 10610 || dev->pci_device == 10626) || dev->pci_device == 10642) || dev->pci_device == 10658) || dev->pci_device == 10754) || dev->pci_device == 10770) || dev->pci_device == 10818) || dev->pci_device == 11778) || dev->pci_device == 11794) || dev->pci_device == 11810) && (((((dev->pci_device == 13687 || dev->pci_device == 13698) || dev->pci_device == 9618) || (dev->pci_device == 10146 || dev->pci_device == 10158)) || dev->pci_device == 10754) || dev->pci_device == 10818)) {
dev_priv->saveRENDERSTANDBY = readl(dev_priv->regs + 70072);
} else {
}
dev_priv->saveHWS = readl(dev_priv->regs + 8320);
dev_priv->saveDSPARB = readl(dev_priv->regs + 458800);
dev_priv->savePIPEACONF = readl(dev_priv->regs + 458760);
dev_priv->savePIPEASRC = readl(dev_priv->regs + 393244);
dev_priv->saveFPA0 = readl(dev_priv->regs + 24640);
dev_priv->saveFPA1 = readl(dev_priv->regs + 24644);
dev_priv->saveDPLL_A = readl(dev_priv->regs + 24596);
if (((((((((dev->pci_device == 10610 || dev->pci_device == 10626) || dev->pci_device == 10642) || dev->pci_device == 10658) || dev->pci_device == 10754) || dev->pci_device == 10770) || dev->pci_device == 10818) || dev->pci_device == 11778) || dev->pci_device == 11794) || dev->pci_device == 11810) {
dev_priv->saveDPLL_A_MD = readl(dev_priv->regs + 24604);
} else {
}
dev_priv->saveHTOTAL_A = readl(dev_priv->regs + 393216);
dev_priv->saveHBLANK_A = readl(dev_priv->regs + 393220);
dev_priv->saveHSYNC_A = readl(dev_priv->regs + 393224);
dev_priv->saveVTOTAL_A = readl(dev_priv->regs + 393228);
dev_priv->saveVBLANK_A = readl(dev_priv->regs + 393232);
dev_priv->saveVSYNC_A = readl(dev_priv->regs + 393236);
dev_priv->saveBCLRPAT_A = readl(dev_priv->regs + 393248);
dev_priv->saveDSPACNTR = readl(dev_priv->regs + 459136);
dev_priv->saveDSPASTRIDE = readl(dev_priv->regs + 459144);
dev_priv->saveDSPASIZE = readl(dev_priv->regs + 459152);
dev_priv->saveDSPAPOS = readl(dev_priv->regs + 459148);
dev_priv->saveDSPAADDR = readl(dev_priv->regs + 459140);
if (((((((((dev->pci_device == 10610 || dev->pci_device == 10626) || dev->pci_device == 10642) || dev->pci_device == 10658) || dev->pci_device == 10754) || dev->pci_device == 10770) || dev->pci_device == 10818) || dev->pci_device == 11778) || dev->pci_device == 11794) || dev->pci_device == 11810) {
dev_priv->saveDSPASURF = readl(dev_priv->regs + 459164);
dev_priv->saveDSPATILEOFF = readl(dev_priv->regs + 459172);
} else {
}
i915_save_palette(dev, PIPE_A);
dev_priv->savePIPEASTAT = readl(dev_priv->regs + 458788);
dev_priv->savePIPEBCONF = readl(dev_priv->regs + 462856);
dev_priv->savePIPEBSRC = readl(dev_priv->regs + 397340);
dev_priv->saveFPB0 = readl(dev_priv->regs + 24648);
dev_priv->saveFPB1 = readl(dev_priv->regs + 24652);
dev_priv->saveDPLL_B = readl(dev_priv->regs + 24600);
if (((((((((dev->pci_device == 10610 || dev->pci_device == 10626) || dev->pci_device == 10642) || dev->pci_device == 10658) || dev->pci_device == 10754) || dev->pci_device == 10770) || dev->pci_device == 10818) || dev->pci_device == 11778) || dev->pci_device == 11794) || dev->pci_device == 11810) {
dev_priv->saveDPLL_B_MD = readl(dev_priv->regs + 24608);
} else {
}
dev_priv->saveHTOTAL_B = readl(dev_priv->regs + 397312);
dev_priv->saveHBLANK_B = readl(dev_priv->regs + 397316);
dev_priv->saveHSYNC_B = readl(dev_priv->regs + 397320);
dev_priv->saveVTOTAL_B = readl(dev_priv->regs + 397324);
dev_priv->saveVBLANK_B = readl(dev_priv->regs + 397328);
dev_priv->saveVSYNC_B = readl(dev_priv->regs + 397332);
dev_priv->saveBCLRPAT_A = readl(dev_priv->regs + 393248);
dev_priv->saveDSPBCNTR = readl(dev_priv->regs + 463232);
dev_priv->saveDSPBSTRIDE = readl(dev_priv->regs + 463240);
dev_priv->saveDSPBSIZE = readl(dev_priv->regs + 463248);
dev_priv->saveDSPBPOS = readl(dev_priv->regs + 463244);
dev_priv->saveDSPBADDR = readl(dev_priv->regs + 463236);
if (dev->pci_device == 10754 || dev->pci_device == 10818) {
dev_priv->saveDSPBSURF = readl(dev_priv->regs + 463260);
dev_priv->saveDSPBTILEOFF = readl(dev_priv->regs + 463268);
} else {
}
i915_save_palette(dev, PIPE_B);
dev_priv->savePIPEBSTAT = readl(dev_priv->regs + 462884);
dev_priv->saveADPA = readl(dev_priv->regs + 397568);
dev_priv->savePP_CONTROL = readl(dev_priv->regs + 397828);
dev_priv->savePFIT_PGM_RATIOS = readl(dev_priv->regs + 397876);
dev_priv->saveBLC_PWM_CTL = readl(dev_priv->regs + 397908);
if (((((((((dev->pci_device == 10610 || dev->pci_device == 10626) || dev->pci_device == 10642) || dev->pci_device == 10658) || dev->pci_device == 10754) || dev->pci_device == 10770) || dev->pci_device == 10818) || dev->pci_device == 11778) || dev->pci_device == 11794) || dev->pci_device == 11810) {
dev_priv->saveBLC_PWM_CTL2 = readl(dev_priv->regs + 397904);
} else {
}
if ((((((dev->pci_device == 13687 || dev->pci_device == 13698) || dev->pci_device == 9618) || (dev->pci_device == 10146 || dev->pci_device == 10158)) || dev->pci_device == 10754) || dev->pci_device == 10818) && ! (dev->pci_device == 13687)) {
dev_priv->saveLVDS = readl(dev_priv->regs + 397696);
} else {
}
if (! (dev->pci_device == 13687) && ! (dev->pci_device == 9570)) {
dev_priv->savePFIT_CONTROL = readl(dev_priv->regs + 397872);
} else {
}
dev_priv->savePP_ON_DELAYS = readl(dev_priv->regs + 397832);
dev_priv->savePP_OFF_DELAYS = readl(dev_priv->regs + 397836);
dev_priv->savePP_DIVISOR = readl(dev_priv->regs + 397840);
dev_priv->saveFBC_CFB_BASE = readl(dev_priv->regs + 12800);
dev_priv->saveFBC_LL_BASE = readl(dev_priv->regs + 12804);
dev_priv->saveFBC_CONTROL2 = readl(dev_priv->regs + 12820);
dev_priv->saveFBC_CONTROL = readl(dev_priv->regs + 12808);
dev_priv->saveIIR = readl(dev_priv->regs + 8356);
dev_priv->saveIER = readl(dev_priv->regs + 8352);
dev_priv->saveIMR = readl(dev_priv->regs + 8360);
dev_priv->saveVGA0 = readl(dev_priv->regs + 24576);
dev_priv->saveVGA1 = readl(dev_priv->regs + 24580);
dev_priv->saveVGA_PD = readl(dev_priv->regs + 24592);
dev_priv->saveVGACNTRL = readl(dev_priv->regs + 463872);
dev_priv->saveD_STATE = readl(dev_priv->regs + 24836);
dev_priv->saveCG_2D_DIS = readl(dev_priv->regs + 25088);
dev_priv->saveCACHE_MODE_0 = readl(dev_priv->regs + 8480);
dev_priv->saveMI_ARB_STATE = readl(dev_priv->regs + 8420);
i = 0;
while (1) {
if (i < 16) {
} else {
break;
}
dev_priv->saveSWF0[i] = readl(dev_priv->regs + (463888 + (i << 2)));
dev_priv->saveSWF1[i] = readl(dev_priv->regs + (459792 + (i << 2)));
i = i + 1;
}
i = 0;
while (1) {
if (i < 3) {
} else {
break;
}
dev_priv->saveSWF2[i] = readl(dev_priv->regs + (467988 + (i << 2)));
i = i + 1;
}
i915_save_vga(dev);
return (0);
}
}
int i915_restore_state(struct drm_device *dev )
{
struct drm_i915_private *dev_priv ;
int i ;
unsigned int tmp ;
unsigned int tmp___0 ;
{
dev_priv = dev->dev_private;
pci_write_config_byte(dev->pdev, 244, dev_priv->saveLBB);
if ((((((((((dev->pci_device == 10610 || dev->pci_device == 10626) || dev->pci_device == 10642) || dev->pci_device == 10658) || dev->pci_device == 10754) || dev->pci_device == 10770) || dev->pci_device == 10818) || dev->pci_device == 11778) || dev->pci_device == 11794) || dev->pci_device == 11810) && (((((dev->pci_device == 13687 || dev->pci_device == 13698) || dev->pci_device == 9618) || (dev->pci_device == 10146 || dev->pci_device == 10158)) || dev->pci_device == 10754) || dev->pci_device == 10818)) {
writel(dev_priv->saveRENDERSTANDBY, dev_priv->regs + 70072);
} else {
}
writel(dev_priv->saveHWS, dev_priv->regs + 8320);
writel(dev_priv->saveDSPARB, dev_priv->regs + 458800);
if (dev_priv->saveDPLL_A & (unsigned int )(1 << 31)) {
writel(dev_priv->saveDPLL_A & (unsigned int )(~ (1 << 31)), dev_priv->regs + 24596);
if (150 > 20000) {
__bad_udelay();
} else {
__const_udelay(150UL * 4295UL);
}
} else {
}
writel(dev_priv->saveFPA0, dev_priv->regs + 24640);
writel(dev_priv->saveFPA1, dev_priv->regs + 24644);
writel(dev_priv->saveDPLL_A, dev_priv->regs + 24596);
if (150 > 20000) {
__bad_udelay();
} else {
__const_udelay(150UL * 4295UL);
}
if (((((((((dev->pci_device == 10610 || dev->pci_device == 10626) || dev->pci_device == 10642) || dev->pci_device == 10658) || dev->pci_device == 10754) || dev->pci_device == 10770) || dev->pci_device == 10818) || dev->pci_device == 11778) || dev->pci_device == 11794) || dev->pci_device == 11810) {
writel(dev_priv->saveDPLL_A_MD, dev_priv->regs + 24604);
} else {
}
if (150 > 20000) {
__bad_udelay();
} else {
__const_udelay(150UL * 4295UL);
}
writel(dev_priv->saveHTOTAL_A, dev_priv->regs + 393216);
writel(dev_priv->saveHBLANK_A, dev_priv->regs + 393220);
writel(dev_priv->saveHSYNC_A, dev_priv->regs + 393224);
writel(dev_priv->saveVTOTAL_A, dev_priv->regs + 393228);
writel(dev_priv->saveVBLANK_A, dev_priv->regs + 393232);
writel(dev_priv->saveVSYNC_A, dev_priv->regs + 393236);
writel(dev_priv->saveBCLRPAT_A, dev_priv->regs + 393248);
writel(dev_priv->saveDSPASIZE, dev_priv->regs + 459152);
writel(dev_priv->saveDSPAPOS, dev_priv->regs + 459148);
writel(dev_priv->savePIPEASRC, dev_priv->regs + 393244);
writel(dev_priv->saveDSPAADDR, dev_priv->regs + 459140);
writel(dev_priv->saveDSPASTRIDE, dev_priv->regs + 459144);
if (((((((((dev->pci_device == 10610 || dev->pci_device == 10626) || dev->pci_device == 10642) || dev->pci_device == 10658) || dev->pci_device == 10754) || dev->pci_device == 10770) || dev->pci_device == 10818) || dev->pci_device == 11778) || dev->pci_device == 11794) || dev->pci_device == 11810) {
writel(dev_priv->saveDSPASURF, dev_priv->regs + 459164);
writel(dev_priv->saveDSPATILEOFF, dev_priv->regs + 459172);
} else {
}
writel(dev_priv->savePIPEACONF, dev_priv->regs + 458760);
i915_restore_palette(dev, PIPE_A);
writel(dev_priv->saveDSPACNTR, dev_priv->regs + 459136);
tmp = readl(dev_priv->regs + 459140);
writel(tmp, dev_priv->regs + 459140);
if (dev_priv->saveDPLL_B & (unsigned int )(1 << 31)) {
writel(dev_priv->saveDPLL_B & (unsigned int )(~ (1 << 31)), dev_priv->regs + 24600);
if (150 > 20000) {
__bad_udelay();
} else {
__const_udelay(150UL * 4295UL);
}
} else {
}
writel(dev_priv->saveFPB0, dev_priv->regs + 24648);
writel(dev_priv->saveFPB1, dev_priv->regs + 24652);
writel(dev_priv->saveDPLL_B, dev_priv->regs + 24600);
if (150 > 20000) {
__bad_udelay();
} else {
__const_udelay(150UL * 4295UL);
}
if (((((((((dev->pci_device == 10610 || dev->pci_device == 10626) || dev->pci_device == 10642) || dev->pci_device == 10658) || dev->pci_device == 10754) || dev->pci_device == 10770) || dev->pci_device == 10818) || dev->pci_device == 11778) || dev->pci_device == 11794) || dev->pci_device == 11810) {
writel(dev_priv->saveDPLL_B_MD, dev_priv->regs + 24608);
} else {
}
if (150 > 20000) {
__bad_udelay();
} else {
__const_udelay(150UL * 4295UL);
}
writel(dev_priv->saveHTOTAL_B, dev_priv->regs + 397312);
writel(dev_priv->saveHBLANK_B, dev_priv->regs + 397316);
writel(dev_priv->saveHSYNC_B, dev_priv->regs + 397320);
writel(dev_priv->saveVTOTAL_B, dev_priv->regs + 397324);
writel(dev_priv->saveVBLANK_B, dev_priv->regs + 397328);
writel(dev_priv->saveVSYNC_B, dev_priv->regs + 397332);
writel(dev_priv->saveBCLRPAT_B, dev_priv->regs + 397344);
writel(dev_priv->saveDSPBSIZE, dev_priv->regs + 463248);
writel(dev_priv->saveDSPBPOS, dev_priv->regs + 463244);
writel(dev_priv->savePIPEBSRC, dev_priv->regs + 397340);
writel(dev_priv->saveDSPBADDR, dev_priv->regs + 463236);
writel(dev_priv->saveDSPBSTRIDE, dev_priv->regs + 463240);
if (((((((((dev->pci_device == 10610 || dev->pci_device == 10626) || dev->pci_device == 10642) || dev->pci_device == 10658) || dev->pci_device == 10754) || dev->pci_device == 10770) || dev->pci_device == 10818) || dev->pci_device == 11778) || dev->pci_device == 11794) || dev->pci_device == 11810) {
writel(dev_priv->saveDSPBSURF, dev_priv->regs + 463260);
writel(dev_priv->saveDSPBTILEOFF, dev_priv->regs + 463268);
} else {
}
writel(dev_priv->savePIPEBCONF, dev_priv->regs + 462856);
i915_restore_palette(dev, PIPE_B);
writel(dev_priv->saveDSPBCNTR, dev_priv->regs + 463232);
tmp___0 = readl(dev_priv->regs + 463236);
writel(tmp___0, dev_priv->regs + 463236);
writel(dev_priv->saveADPA, dev_priv->regs + 397568);
if (((((((((dev->pci_device == 10610 || dev->pci_device == 10626) || dev->pci_device == 10642) || dev->pci_device == 10658) || dev->pci_device == 10754) || dev->pci_device == 10770) || dev->pci_device == 10818) || dev->pci_device == 11778) || dev->pci_device == 11794) || dev->pci_device == 11810) {
writel(dev_priv->saveBLC_PWM_CTL2, dev_priv->regs + 397904);
} else {
}
if ((((((dev->pci_device == 13687 || dev->pci_device == 13698) || dev->pci_device == 9618) || (dev->pci_device == 10146 || dev->pci_device == 10158)) || dev->pci_device == 10754) || dev->pci_device == 10818) && ! (dev->pci_device == 13687)) {
writel(dev_priv->saveLVDS, dev_priv->regs + 397696);
} else {
}
if (! (dev->pci_device == 13687) && ! (dev->pci_device == 9570)) {
writel(dev_priv->savePFIT_CONTROL, dev_priv->regs + 397872);
} else {
}
writel(dev_priv->savePFIT_PGM_RATIOS, dev_priv->regs + 397876);
writel(dev_priv->saveBLC_PWM_CTL, dev_priv->regs + 397908);
writel(dev_priv->savePP_ON_DELAYS, dev_priv->regs + 397832);
writel(dev_priv->savePP_OFF_DELAYS, dev_priv->regs + 397836);
writel(dev_priv->savePP_DIVISOR, dev_priv->regs + 397840);
writel(dev_priv->savePP_CONTROL, dev_priv->regs + 397828);
writel(dev_priv->saveFBC_CFB_BASE, dev_priv->regs + 12800);
writel(dev_priv->saveFBC_LL_BASE, dev_priv->regs + 12804);
writel(dev_priv->saveFBC_CONTROL2, dev_priv->regs + 12820);
writel(dev_priv->saveFBC_CONTROL, dev_priv->regs + 12808);
writel(dev_priv->saveVGACNTRL, dev_priv->regs + 463872);
writel(dev_priv->saveVGA0, dev_priv->regs + 24576);
writel(dev_priv->saveVGA1, dev_priv->regs + 24580);
writel(dev_priv->saveVGA_PD, dev_priv->regs + 24592);
if (150 > 20000) {
__bad_udelay();
} else {
__const_udelay(150UL * 4295UL);
}
writel(dev_priv->saveD_STATE, dev_priv->regs + 24836);
writel(dev_priv->saveCG_2D_DIS, dev_priv->regs + 25088);
writel(dev_priv->saveCACHE_MODE_0 | 4294901760U, dev_priv->regs + 8480);
writel(dev_priv->saveMI_ARB_STATE | 4294901760U, dev_priv->regs + 8420);
i = 0;
while (1) {
if (i < 16) {
} else {
break;
}
writel(dev_priv->saveSWF0[i], dev_priv->regs + (463888 + (i << 2)));
writel(dev_priv->saveSWF1[i + 7], dev_priv->regs + (459792 + (i << 2)));
i = i + 1;
}
i = 0;
while (1) {
if (i < 3) {
} else {
break;
}
writel(dev_priv->saveSWF2[i], dev_priv->regs + (467988 + (i << 2)));
i = i + 1;
}
i915_restore_vga(dev);
return (0);
}
}
extern void warn_on_slowpath(char const *file , int const line ) ;
extern void __might_sleep(char *file , int line ) ;
__inline static int get_order(unsigned long size ) __attribute__((__const__)) ;
__inline static int get_order(unsigned long size )
{
int order ;
{
size = (size - 1UL) >> (12 - 1);
order = -1;
while (1) {
size = size >> 1;
order = order + 1;
if (size) {
} else {
break;
}
}
return (order);
}
}
__inline static void INIT_LIST_HEAD(struct list_head *list )
{
{
list->next = list;
list->prev = list;
return;
}
}
extern void __list_add(struct list_head *new , struct list_head *prev , struct list_head *next ) ;
__inline static void list_add(struct list_head *new , struct list_head *head )
{
{
__list_add(new, head, head->next);
return;
}
}
__inline static void list_add_tail(struct list_head *new , struct list_head *head )
{
{
__list_add(new, head->prev, head);
return;
}
}
__inline static void __list_del(struct list_head *prev , struct list_head *next )
{
{
next->prev = prev;
prev->next = next;
return;
}
}
extern void list_del(struct list_head *entry ) ;
__inline static void list_del_init(struct list_head *entry )
{
{
__list_del(entry->prev, entry->next);
INIT_LIST_HEAD(entry);
return;
}
}
__inline static void list_move_tail(struct list_head *list , struct list_head *head )
{
{
__list_del(list->prev, list->next);
list_add_tail(list, head);
return;
}
}
__inline static int list_empty(struct list_head const *head )
{
{
return ((unsigned long )head->next == (unsigned long )head);
}
}
extern void lockdep_init_map(struct lockdep_map *lock , char const *name , struct lock_class_key *key ,
int subclass ) ;
__inline static void atomic_add(int i , atomic_t *v )
{
{
__asm__ volatile (".section .smp_locks,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"661f\n"
".previous\n"
"661:\n\tlock; "
"addl %1,%0": "=m" (v->counter): "ir" (i), "m" (v->counter));
return;
}
}
__inline static void atomic_sub(int i , atomic_t *v )
{
{
__asm__ volatile (".section .smp_locks,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"661f\n"
".previous\n"
"661:\n\tlock; "
"subl %1,%0": "=m" (v->counter): "ir" (i), "m" (v->counter));
return;
}
}
__inline static void atomic_dec(atomic_t *v )
{
{
__asm__ volatile (".section .smp_locks,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"661f\n"
".previous\n"
"661:\n\tlock; "
"decl %0": "=m" (v->counter): "m" (v->counter));
return;
}
}
extern void prepare_to_wait(wait_queue_head_t *q , wait_queue_t *wait , int state ) ;
extern void finish_wait(wait_queue_head_t *q , wait_queue_t *wait ) ;
extern int autoremove_wake_function(wait_queue_t *wait , unsigned int mode , int sync ,
void *key ) ;
extern void down_write(struct rw_semaphore *sem ) ;
extern void up_write(struct rw_semaphore *sem ) ;
extern void msleep(unsigned int msecs ) ;
extern void kref_get(struct kref *kref ) ;
extern int kref_put(struct kref *kref , void (*release)(struct kref *kref ) ) ;
extern void init_timer(struct timer_list *timer ) ;
extern int schedule_delayed_work(struct delayed_work *work , unsigned long delay ) ;
extern int cancel_delayed_work_sync(struct delayed_work *work ) ;
extern ssize_t vfs_read(struct file * , char * , size_t , loff_t * ) ;
extern ssize_t vfs_write(struct file * , char const * , size_t , loff_t * ) ;
__inline static long PTR_ERR(void const *ptr )
{
{
return ((long )ptr);
}
}
__inline static long IS_ERR(void const *ptr )
{
long tmp ;
{
tmp = ldv__builtin_expect(! (! ((unsigned long )ptr >= 0xfffffffffffff001UL)), 0);
return (tmp);
}
}
__inline static void writeq(unsigned long val , void volatile *addr )
{
{
__asm__ volatile ("mov"
"q"
" %0,%1": : "r" (val), "m" (*((unsigned long volatile *)addr)): "memory");
return;
}
}
extern void put_page(struct page *page ) ;
__inline static void *( __attribute__((__always_inline__)) lowmem_page_address)(struct page *page )
{
{
return ((void *)((unsigned long )((page - (struct page *)0xffffe20000000000UL) << 12) + 0xffff880000000000UL));
}
}
extern void unmap_mapping_range(struct address_space *mapping , loff_t const holebegin ,
loff_t const holelen , int even_cows ) ;
extern int set_page_dirty(struct page *page ) ;
extern unsigned long do_mmap_pgoff(struct file *file , unsigned long addr , unsigned long len ,
unsigned long prot , unsigned long flag , unsigned long pgoff ) ;
__inline static unsigned long do_mmap(struct file *file , unsigned long addr , unsigned long len ,
unsigned long prot , unsigned long flag , unsigned long offset )
{
unsigned long ret ;
{
ret = -22;
if (offset + ((len + ((1UL << 12) - 1UL)) & ~ ((1UL << 12) - 1UL)) < offset) {
goto out;
} else {
}
if (! (offset & ~ (~ ((1UL << 12) - 1UL)))) {
ret = do_mmap_pgoff(file, addr, len, prot, flag, offset >> 12);
} else {
}
out:
return (ret);
}
}
extern int vm_insert_pfn(struct vm_area_struct *vma , unsigned long addr , unsigned long pfn ) ;
extern void schedule(void) ;
extern unsigned long ( __attribute__((__warn_unused_result__)) copy_from_user)(void *to ,
void const *from ,
unsigned int len ) ;
extern long __copy_user_nocache(void *dst , void const *src , unsigned int size ,
int zerorest ) ;
__inline static int __copy_from_user_inatomic_nocache(void *dst , void const *src ,
unsigned int size )
{
long tmp ;
{
tmp = __copy_user_nocache(dst, src, size, 0);
return (tmp);
}
}
__inline static void *kmap(struct page *page )
{
void *tmp ;
{
while (1) {
__might_sleep("include/linux/highmem.h", 41);
while (1) {
break;
}
break;
}
tmp = lowmem_page_address(page);
return (tmp);
}
}
extern struct page *read_cache_page(struct address_space *mapping , unsigned long index ,
filler_t *filler , void *data ) ;
__inline static struct page *read_mapping_page(struct address_space *mapping , unsigned long index ,
void *data )
{
filler_t *filler ;
struct page *tmp ;
{
filler = (filler_t *)(mapping->a_ops)->readpage;
tmp = read_cache_page(mapping, index, filler, data);
return (tmp);
}
}
extern int drm_ht_insert_item(struct drm_open_hash *ht , struct drm_hash_item *item ) ;
extern int drm_ht_remove_item(struct drm_open_hash *ht , struct drm_hash_item *item ) ;
extern int drm_free_agp(struct agp_memory *handle , int pages ) ;
extern struct agp_memory *drm_agp_bind_pages(struct drm_device *dev , struct page **pages ,
unsigned long num_pages , uint32_t gtt_offset ,
uint32_t type ) ;
extern int drm_unbind_agp(struct agp_memory *handle ) ;
extern void drm_clflush_pages(struct page **pages , unsigned long num_pages ) ;
extern void drm_agp_chipset_flush(struct drm_device *dev ) ;
extern struct drm_mm_node *drm_mm_get_block(struct drm_mm_node *parent , unsigned long size ,
unsigned int alignment ) ;
extern void drm_mm_put_block(struct drm_mm_node *cur ) ;
extern struct drm_mm_node *drm_mm_search_free(struct drm_mm const *mm , unsigned long size ,
unsigned int alignment , int best_match ) ;
extern void drm_gem_object_free(struct kref *kref ) ;
extern struct drm_gem_object *drm_gem_object_alloc(struct drm_device *dev , size_t size ) ;
extern void drm_gem_object_handle_free(struct kref *kref ) ;
__inline static void drm_gem_object_reference(struct drm_gem_object *obj )
{
{
kref_get(& obj->refcount);
return;
}
}
__inline static void drm_gem_object_unreference(struct drm_gem_object *obj )
{
{
if ((unsigned long )obj == (unsigned long )((void *)0)) {
return;
} else {
}
kref_put(& obj->refcount, & drm_gem_object_free);
return;
}
}
extern int drm_gem_handle_create(struct drm_file *file_priv , struct drm_gem_object *obj ,
int *handlep ) ;
__inline static void drm_gem_object_handle_unreference(struct drm_gem_object *obj )
{
{
if ((unsigned long )obj == (unsigned long )((void *)0)) {
return;
} else {
}
kref_put(& obj->handlecount, & drm_gem_object_handle_free);
drm_gem_object_unreference(obj);
return;
}
}
extern struct drm_gem_object *drm_gem_object_lookup(struct drm_device *dev , struct drm_file *filp ,
int handle ) ;
extern void drm_core_ioremap_wc(struct drm_map *map , struct drm_device *dev ) ;
__inline static void *io_mapping_map_atomic_wc(struct io_mapping *mapping , unsigned long offset )
{
{
return ((char *)mapping + offset);
}
}
__inline static void io_mapping_unmap_atomic(void *vaddr )
{
{
return;
}
}
int i915_gem_object_pin(struct drm_gem_object *obj , uint32_t alignment ) ;
void i915_gem_object_unpin(struct drm_gem_object *obj ) ;
void i915_gem_retire_requests(struct drm_device *dev ) ;
void i915_gem_retire_work_handler(struct work_struct *work ) ;
void i915_gem_clflush_object(struct drm_gem_object *obj ) ;
int i915_gem_object_set_to_gtt_domain(struct drm_gem_object *obj , int write ) ;
void i915_gem_detect_bit_6_swizzle(struct drm_device *dev ) ;
extern void mark_page_accessed(struct page * ) ;
static void i915_gem_object_set_to_gpu_domain(struct drm_gem_object *obj , uint32_t read_domains ,
uint32_t write_domain ) ;
static void i915_gem_object_flush_gpu_write_domain(struct drm_gem_object *obj ) ;
static void i915_gem_object_flush_gtt_write_domain(struct drm_gem_object *obj ) ;
static void i915_gem_object_flush_cpu_write_domain(struct drm_gem_object *obj ) ;
static int i915_gem_object_set_to_cpu_domain(struct drm_gem_object *obj , int write ) ;
static int i915_gem_object_set_cpu_read_domain_range(struct drm_gem_object *obj ,
uint64_t offset , uint64_t size ) ;
static void i915_gem_object_set_to_full_cpu_read_domain(struct drm_gem_object *obj ) ;
static int i915_gem_object_get_page_list(struct drm_gem_object *obj ) ;
static void i915_gem_object_free_page_list(struct drm_gem_object *obj ) ;
static int i915_gem_object_wait_rendering(struct drm_gem_object *obj ) ;
static int i915_gem_object_bind_to_gtt(struct drm_gem_object *obj , unsigned int alignment ) ;
static void i915_gem_object_get_fence_reg(struct drm_gem_object *obj ) ;
static void i915_gem_clear_fence_reg(struct drm_gem_object *obj ) ;
static int i915_gem_evict_something(struct drm_device *dev ) ;
int i915_gem_do_init(struct drm_device *dev , unsigned long start , unsigned long end )
{
drm_i915_private_t *dev_priv ;
{
dev_priv = dev->dev_private;
if ((start >= end || (start & ((1UL << 12) - 1UL)) != 0UL) || (end & ((1UL << 12) - 1UL)) != 0UL) {
return (-22);
} else {
}
drm_mm_init(& dev_priv->mm.gtt_space, start, end - start);
dev->gtt_total = (uint32_t )(end - start);
return (0);
}
}
int i915_gem_init_ioctl(struct drm_device *dev , void *data , struct drm_file *file_priv )
{
struct drm_i915_gem_init *args ;
int ret ;
{
args = data;
mutex_lock_nested(& dev->struct_mutex, 0);
ret = i915_gem_do_init(dev, args->gtt_start, args->gtt_end);
mutex_unlock(& dev->struct_mutex);
return (ret);
}
}
int i915_gem_get_aperture_ioctl(struct drm_device *dev , void *data , struct drm_file *file_priv )
{
struct drm_i915_gem_get_aperture *args ;
{
args = data;
if (! ((dev->driver)->driver_features & 4096U)) {
return (-19);
} else {
}
args->aper_size = dev->gtt_total;
args->aper_available_size = args->aper_size - (uint64_t )dev->pin_memory.counter;
return (0);
}
}
int i915_gem_create_ioctl(struct drm_device *dev , void *data , struct drm_file *file_priv )
{
struct drm_i915_gem_create *args ;
struct drm_gem_object *obj ;
int handle ;
int ret ;
{
args = data;
args->size = ((args->size + (uint64_t )((1UL << 12) - 1UL)) / (uint64_t )(1UL << 12)) * (uint64_t )(1UL << 12);
obj = drm_gem_object_alloc(dev, args->size);
if ((unsigned long )obj == (unsigned long )((void *)0)) {
return (-12);
} else {
}
ret = drm_gem_handle_create(file_priv, obj, & handle);
mutex_lock_nested(& dev->struct_mutex, 0);
drm_gem_object_handle_unreference(obj);
mutex_unlock(& dev->struct_mutex);
if (ret) {
return (ret);
} else {
}
args->handle = handle;
return (0);
}
}
int i915_gem_pread_ioctl(struct drm_device *dev , void *data , struct drm_file *file_priv )
{
struct drm_i915_gem_pread *args ;
struct drm_gem_object *obj ;
struct drm_i915_gem_object *obj_priv ;
ssize_t read ;
loff_t offset ;
int ret ;
{
args = data;
obj = drm_gem_object_lookup(dev, file_priv, args->handle);
if ((unsigned long )obj == (unsigned long )((void *)0)) {
return (-9);
} else {
}
obj_priv = obj->driver_private;
if ((args->offset > (uint64_t )obj->size || args->size > (uint64_t )obj->size) || args->offset + args->size > (uint64_t )obj->size) {
drm_gem_object_unreference(obj);
return (-22);
} else {
}
mutex_lock_nested(& dev->struct_mutex, 0);
ret = i915_gem_object_set_cpu_read_domain_range(obj, args->offset, args->size);
if (ret != 0) {
drm_gem_object_unreference(obj);
mutex_unlock(& dev->struct_mutex);
return (ret);
} else {
}
offset = args->offset;
read = vfs_read(obj->filp, (char *)((uintptr_t )args->data_ptr), args->size, & offset);
if ((uint64_t )read != args->size) {
drm_gem_object_unreference(obj);
mutex_unlock(& dev->struct_mutex);
if (read < (ssize_t )0) {
return (read);
} else {
return (-22);
}
} else {
}
drm_gem_object_unreference(obj);
mutex_unlock(& dev->struct_mutex);
return (0);
}
}
__inline static int fast_user_write(struct io_mapping *mapping , loff_t page_base ,
int page_offset___0 , char *user_data , int length )
{
char *vaddr_atomic ;
unsigned long unwritten ;
void *tmp ;
int tmp___0 ;
{
tmp = io_mapping_map_atomic_wc(mapping, page_base);
vaddr_atomic = tmp;
tmp___0 = __copy_from_user_inatomic_nocache(vaddr_atomic + page_offset___0, user_data,
length);
unwritten = tmp___0;
io_mapping_unmap_atomic(vaddr_atomic);
if (unwritten) {
return (-14);
} else {
}
return (0);
}
}
__inline static int slow_user_write(struct io_mapping *mapping , loff_t page_base ,
int page_offset___0 , char *user_data , int length )
{
char *vaddr ;
unsigned long unwritten ;
void *tmp ;
int tmp___0 ;
{
tmp = io_mapping_map_atomic_wc(mapping, page_base);
vaddr = tmp;
if ((unsigned long )vaddr == (unsigned long )((void *)0)) {
return (-14);
} else {
}
tmp___0 = __copy_from_user(vaddr + page_offset___0, user_data, length);
unwritten = tmp___0;
io_mapping_unmap_atomic(vaddr);
if (unwritten) {
return (-14);
} else {
}
return (0);
}
}
static int i915_gem_gtt_pwrite(struct drm_device *dev , struct drm_gem_object *obj ,
struct drm_i915_gem_pwrite *args , struct drm_file *file_priv )
{
struct drm_i915_gem_object *obj_priv ;
drm_i915_private_t *dev_priv ;
ssize_t remain ;
loff_t offset ;
loff_t page_base ;
char *user_data ;
int page_offset___0 ;
int page_length ;
int ret ;
unsigned long flag ;
unsigned long roksum ;
struct thread_info *tmp ;
int tmp___0 ;
long tmp___1 ;
{
obj_priv = obj->driver_private;
dev_priv = dev->dev_private;
user_data = (char *)((uintptr_t )args->data_ptr);
remain = args->size;
tmp = current_thread_info();
__asm__ ("add %3,%1 ; sbb %0,%0 ; cmp %1,%4 ; sbb $0,%0": "=&r" (flag), "=r" (roksum): "1" (user_data),
"g" (remain), "rm" (tmp->addr_limit.seg));
if (flag == 0UL) {
tmp___0 = 1;
} else {
tmp___0 = 0;
}
tmp___1 = ldv__builtin_expect(tmp___0, 1);
if (tmp___1) {
} else {
return (-14);
}
mutex_lock_nested(& dev->struct_mutex, 0);
ret = i915_gem_object_pin(obj, 0);
if (ret) {
mutex_unlock(& dev->struct_mutex);
return (ret);
} else {
}
ret = i915_gem_object_set_to_gtt_domain(obj, 1);
if (ret) {
goto fail;
} else {
}
obj_priv = obj->driver_private;
offset = (uint64_t )obj_priv->gtt_offset + args->offset;
obj_priv->dirty = 1;
while (1) {
if (remain > (ssize_t )0) {
} else {
break;
}
page_base = offset & (long long )(~ ((1UL << 12) - 1UL));
page_offset___0 = offset & (long long )((1UL << 12) - 1UL);
page_length = remain;
if ((unsigned long )((ssize_t )page_offset___0 + remain) > 1UL << 12) {
page_length = (1UL << 12) - (unsigned long )page_offset___0;
} else {
}
ret = fast_user_write(dev_priv->mm.gtt_mapping, page_base, page_offset___0, user_data,
page_length);
if (ret) {
ret = slow_user_write(dev_priv->mm.gtt_mapping, page_base, page_offset___0,
user_data, page_length);
if (ret) {
goto fail;
} else {
}
} else {
}
remain = remain - (ssize_t )page_length;
user_data = user_data + page_length;
offset = offset + (loff_t )page_length;
}
fail:
i915_gem_object_unpin(obj);
mutex_unlock(& dev->struct_mutex);
return (ret);
}
}
static int i915_gem_shmem_pwrite(struct drm_device *dev , struct drm_gem_object *obj ,
struct drm_i915_gem_pwrite *args , struct drm_file *file_priv )
{
int ret ;
loff_t offset ;
ssize_t written ;
{
mutex_lock_nested(& dev->struct_mutex, 0);
ret = i915_gem_object_set_to_cpu_domain(obj, 1);
if (ret) {
mutex_unlock(& dev->struct_mutex);
return (ret);
} else {
}
offset = args->offset;
written = vfs_write(obj->filp, (char *)((uintptr_t )args->data_ptr), args->size,
& offset);
if ((uint64_t )written != args->size) {
mutex_unlock(& dev->struct_mutex);
if (written < (ssize_t )0) {
return (written);
} else {
return (-22);
}
} else {
}
mutex_unlock(& dev->struct_mutex);
return (0);
}
}
int i915_gem_pwrite_ioctl(struct drm_device *dev , void *data , struct drm_file *file_priv )
{
struct drm_i915_gem_pwrite *args ;
struct drm_gem_object *obj ;
struct drm_i915_gem_object *obj_priv ;
int ret ;
{
args = data;
ret = 0;
obj = drm_gem_object_lookup(dev, file_priv, args->handle);
if ((unsigned long )obj == (unsigned long )((void *)0)) {
return (-9);
} else {
}
obj_priv = obj->driver_private;
if ((args->offset > (uint64_t )obj->size || args->size > (uint64_t )obj->size) || args->offset + args->size > (uint64_t )obj->size) {
drm_gem_object_unreference(obj);
return (-22);
} else {
}
if (obj_priv->tiling_mode == (uint32_t )0 && dev->gtt_total != (uint32_t )0) {
ret = i915_gem_gtt_pwrite(dev, obj, args, file_priv);
} else {
ret = i915_gem_shmem_pwrite(dev, obj, args, file_priv);
}
drm_gem_object_unreference(obj);
return (ret);
}
}
int i915_gem_set_domain_ioctl(struct drm_device *dev , void *data , struct drm_file *file_priv )
{
struct drm_i915_gem_set_domain *args ;
struct drm_gem_object *obj ;
uint32_t read_domains ;
uint32_t write_domain ;
int ret ;
{
args = data;
read_domains = args->read_domains;
write_domain = args->write_domain;
if (! ((dev->driver)->driver_features & 4096U)) {
return (-19);
} else {
}
if (write_domain & (unsigned int )(~ (1 | 64))) {
return (-22);
} else {
}
if (read_domains & (unsigned int )(~ (1 | 64))) {
return (-22);
} else {
}
if (write_domain != (uint32_t )0 && read_domains != write_domain) {
return (-22);
} else {
}
obj = drm_gem_object_lookup(dev, file_priv, args->handle);
if ((unsigned long )obj == (unsigned long )((void *)0)) {
return (-9);
} else {
}
mutex_lock_nested(& dev->struct_mutex, 0);
if (read_domains & 64U) {
ret = i915_gem_object_set_to_gtt_domain(obj, write_domain != (uint32_t )0);
if (ret == -22) {
ret = 0;
} else {
}
} else {
ret = i915_gem_object_set_to_cpu_domain(obj, write_domain != (uint32_t )0);
}
drm_gem_object_unreference(obj);
mutex_unlock(& dev->struct_mutex);
return (ret);
}
}
int i915_gem_sw_finish_ioctl(struct drm_device *dev , void *data , struct drm_file *file_priv )
{
struct drm_i915_gem_sw_finish *args ;
struct drm_gem_object *obj ;
struct drm_i915_gem_object *obj_priv ;
int ret ;
{
args = data;
ret = 0;
if (! ((dev->driver)->driver_features & 4096U)) {
return (-19);
} else {
}
mutex_lock_nested(& dev->struct_mutex, 0);
obj = drm_gem_object_lookup(dev, file_priv, args->handle);
if ((unsigned long )obj == (unsigned long )((void *)0)) {
mutex_unlock(& dev->struct_mutex);
return (-9);
} else {
}
obj_priv = obj->driver_private;
if (obj_priv->pin_count) {
i915_gem_object_flush_cpu_write_domain(obj);
} else {
}
drm_gem_object_unreference(obj);
mutex_unlock(& dev->struct_mutex);
return (ret);
}
}
int i915_gem_mmap_ioctl(struct drm_device *dev , void *data , struct drm_file *file_priv )
{
struct drm_i915_gem_mmap *args ;
struct drm_gem_object *obj ;
loff_t offset ;
unsigned long addr ;
struct task_struct *tmp ;
struct task_struct *tmp___0 ;
long tmp___1 ;
{
args = data;
if (! ((dev->driver)->driver_features & 4096U)) {
return (-19);
} else {
}
obj = drm_gem_object_lookup(dev, file_priv, args->handle);
if ((unsigned long )obj == (unsigned long )((void *)0)) {
return (-9);
} else {
}
offset = args->offset;
tmp = get_current();
down_write(& (tmp->mm)->mmap_sem);
addr = do_mmap(obj->filp, 0, args->size, 1 | 2, 1, args->offset);
tmp___0 = get_current();
up_write(& (tmp___0->mm)->mmap_sem);
mutex_lock_nested(& dev->struct_mutex, 0);
drm_gem_object_unreference(obj);
mutex_unlock(& dev->struct_mutex);
tmp___1 = IS_ERR((void *)addr);
if (tmp___1) {
return (addr);
} else {
}
args->addr_ptr = (uint64_t )addr;
return (0);
}
}
int i915_gem_fault(struct vm_area_struct *vma , struct vm_fault *vmf )
{
struct drm_gem_object *obj ;
struct drm_device *dev ;
struct drm_i915_private *dev_priv ;
struct drm_i915_gem_object *obj_priv ;
unsigned long page_offset___0 ;
unsigned long pfn ;
int ret ;
{
obj = vma->vm_private_data;
dev = obj->dev;
dev_priv = dev->dev_private;
obj_priv = obj->driver_private;
ret = 0;
page_offset___0 = ((unsigned long )vmf->virtual_address - vma->vm_start) >> 12;
mutex_lock_nested(& dev->struct_mutex, 0);
if (! obj_priv->gtt_space) {
ret = i915_gem_object_bind_to_gtt(obj, obj_priv->gtt_alignment);
if (ret) {
mutex_unlock(& dev->struct_mutex);
return (2);
} else {
}
list_add(& obj_priv->list, & dev_priv->mm.inactive_list);
} else {
}
if (obj_priv->fence_reg == -1 && obj_priv->tiling_mode != (uint32_t )0) {
i915_gem_object_get_fence_reg(obj);
} else {
}
pfn = (((dev->agp)->base + (unsigned long )obj_priv->gtt_offset) >> 12) + page_offset___0;
ret = vm_insert_pfn(vma, (unsigned long )vmf->virtual_address, pfn);
mutex_unlock(& dev->struct_mutex);
switch (ret) {
case -11:
case -12:
return (1);
case -16:
case -14:
printk("<3>[drm:%s] *ERROR* can\'t insert pfn?? fault or busy...\n", "i915_gem_fault");
return (2);
default:
return (256);
}
}
}
static int i915_gem_create_mmap_offset(struct drm_gem_object *obj )
{
struct drm_device *dev ;
struct drm_gem_mm *mm ;
struct drm_i915_gem_object *obj_priv ;
struct drm_map_list *list ;
struct drm_map *map ;
int ret ;
void *tmp ;
int tmp___0 ;
{
dev = obj->dev;
mm = dev->mm_private;
obj_priv = obj->driver_private;
ret = 0;
list = & obj->map_list;
tmp = drm_calloc(1, sizeof(struct drm_map_list ), 2);
list->map = tmp;
if (! list->map) {
return (-12);
} else {
}
map = list->map;
map->type = _DRM_GEM;
map->size = obj->size;
map->handle = obj;
list->file_offset_node = drm_mm_search_free(& mm->offset_manager, obj->size / (1UL << 12),
0, 0);
if (! list->file_offset_node) {
printk("<3>[drm:%s] *ERROR* failed to allocate offset for bo %d\n", "i915_gem_create_mmap_offset",
obj->name);
ret = -12;
goto out_free_list;
} else {
}
list->file_offset_node = drm_mm_get_block(list->file_offset_node, obj->size / (1UL << 12),
0);
if (! list->file_offset_node) {
ret = -12;
goto out_free_list;
} else {
}
list->hash.key = (list->file_offset_node)->start;
tmp___0 = drm_ht_insert_item(& mm->offset_hash, & list->hash);
if (tmp___0) {
printk("<3>[drm:%s] *ERROR* failed to add to map hash\n", "i915_gem_create_mmap_offset");
goto out_free_mm;
} else {
}
obj_priv->mmap_offset = (uint64_t )list->hash.key << 12;
return (0);
out_free_mm:
drm_mm_put_block(list->file_offset_node);
out_free_list:
drm_free(list->map, sizeof(struct drm_map_list ), 2);
return (ret);
}
}
static uint32_t i915_gem_get_gtt_alignment(struct drm_gem_object *obj )
{
struct drm_device *dev ;
struct drm_i915_gem_object *obj_priv ;
int start ;
int i ;
{
dev = obj->dev;
obj_priv = obj->driver_private;
if ((((((((((dev->pci_device == 10610 || dev->pci_device == 10626) || dev->pci_device == 10642) || dev->pci_device == 10658) || dev->pci_device == 10754) || dev->pci_device == 10770) || dev->pci_device == 10818) || dev->pci_device == 11778) || dev->pci_device == 11794) || dev->pci_device == 11810) || obj_priv->tiling_mode == (uint32_t )0) {
return (4096);
} else {
}
if ((((((dev->pci_device == 9602 || dev->pci_device == 9610) || dev->pci_device == 9618) || dev->pci_device == 10098) || (dev->pci_device == 10146 || dev->pci_device == 10158)) || (((((((((dev->pci_device == 10610 || dev->pci_device == 10626) || dev->pci_device == 10642) || dev->pci_device == 10658) || dev->pci_device == 10754) || dev->pci_device == 10770) || dev->pci_device == 10818) || dev->pci_device == 11778) || dev->pci_device == 11794) || dev->pci_device == 11810)) || ((dev->pci_device == 10690 || dev->pci_device == 10674) || dev->pci_device == 10706)) {
start = 1024 * 1024;
} else {
start = 512 * 1024;
}
i = start;
while (1) {
if ((size_t )i < obj->size) {
} else {
break;
}
i = i << 1;
}
return (i);
}
}
int i915_gem_mmap_gtt_ioctl(struct drm_device *dev , void *data , struct drm_file *file_priv )
{
struct drm_i915_gem_mmap_gtt *args ;
struct drm_i915_private *dev_priv ;
struct drm_gem_object *obj ;
struct drm_i915_gem_object *obj_priv ;
int ret ;
{
args = data;
dev_priv = dev->dev_private;
if (! ((dev->driver)->driver_features & 4096U)) {
return (-19);
} else {
}
obj = drm_gem_object_lookup(dev, file_priv, args->handle);
if ((unsigned long )obj == (unsigned long )((void *)0)) {
return (-9);
} else {
}
mutex_lock_nested(& dev->struct_mutex, 0);
obj_priv = obj->driver_private;
if (! obj_priv->mmap_offset) {
ret = i915_gem_create_mmap_offset(obj);
if (ret) {
return (ret);
} else {
}
} else {
}
args->offset = obj_priv->mmap_offset;
obj_priv->gtt_alignment = i915_gem_get_gtt_alignment(obj);
if (obj_priv->agp_mem && obj_priv->gtt_offset & (obj_priv->gtt_alignment - (uint32_t )1)) {
drm_gem_object_unreference(obj);
mutex_unlock(& dev->struct_mutex);
return (-22);
} else {
}
if (! obj_priv->agp_mem) {
ret = i915_gem_object_bind_to_gtt(obj, obj_priv->gtt_alignment);
if (ret) {
drm_gem_object_unreference(obj);
mutex_unlock(& dev->struct_mutex);
return (ret);
} else {
}
list_add(& obj_priv->list, & dev_priv->mm.inactive_list);
} else {
}
drm_gem_object_unreference(obj);
mutex_unlock(& dev->struct_mutex);
return (0);
}
}
static void i915_gem_object_free_page_list(struct drm_gem_object *obj )
{
struct drm_i915_gem_object *obj_priv ;
int page_count___0 ;
int i ;
{
obj_priv = obj->driver_private;
page_count___0 = obj->size / (1UL << 12);
if ((unsigned long )obj_priv->page_list == (unsigned long )((void *)0)) {
return;
} else {
}
i = 0;
while (1) {
if (i < page_count___0) {
} else {
break;
}
if ((unsigned long )*(obj_priv->page_list + i) != (unsigned long )((void *)0)) {
if (obj_priv->dirty) {
set_page_dirty(*(obj_priv->page_list + i));
} else {
}
mark_page_accessed(*(obj_priv->page_list + i));
put_page(*(obj_priv->page_list + i));
} else {
}
i = i + 1;
}
obj_priv->dirty = 0;
drm_free(obj_priv->page_list, (unsigned long )page_count___0 * sizeof(struct page *),
2);
obj_priv->page_list = (void *)0;
return;
}
}
static void i915_gem_object_move_to_active(struct drm_gem_object *obj , uint32_t seqno )
{
struct drm_device *dev ;
drm_i915_private_t *dev_priv ;
struct drm_i915_gem_object *obj_priv ;
{
dev = obj->dev;
dev_priv = dev->dev_private;
obj_priv = obj->driver_private;
if (! obj_priv->active) {
drm_gem_object_reference(obj);
obj_priv->active = 1;
} else {
}
list_move_tail(& obj_priv->list, & dev_priv->mm.active_list);
obj_priv->last_rendering_seqno = seqno;
return;
}
}
static void i915_gem_object_move_to_flushing(struct drm_gem_object *obj )
{
struct drm_device *dev ;
drm_i915_private_t *dev_priv ;
struct drm_i915_gem_object *obj_priv ;
long tmp ;
{
dev = obj->dev;
dev_priv = dev->dev_private;
obj_priv = obj->driver_private;
while (1) {
tmp = ldv__builtin_expect(! (! (! obj_priv->active)), 0);
if (tmp) {
while (1) {
__asm__ volatile ("1:\tud2\n"
".pushsection __bug_table,\"a\"\n"
"2:\t.quad 1b, %c0\n"
"\t.word %c1, 0\n"
"\t.org 2b+%c2\n"
".popsection": : "i" ("/work/ldvuser/novikov/work/current--X--drivers/gpu/drm/i915/i915.ko--X--defaultlinux--X--68_1--X--cpachecker/linux/csd_deg_dscv/36/dscv_tempdir/dscv/ri/68_1/drivers/gpu/drm/i915/i915_gem.c"),
"i" (837), "i" (sizeof(struct bug_entry )));
while (1) {
}
break;
}
} else {
}
break;
}
list_move_tail(& obj_priv->list, & dev_priv->mm.flushing_list);
obj_priv->last_rendering_seqno = 0;
return;
}
}
static void i915_gem_object_move_to_inactive(struct drm_gem_object *obj )
{
struct drm_device *dev ;
drm_i915_private_t *dev_priv ;
struct drm_i915_gem_object *obj_priv ;
{
dev = obj->dev;
dev_priv = dev->dev_private;
obj_priv = obj->driver_private;
if (obj_priv->pin_count != 0) {
list_del_init(& obj_priv->list);
} else {
list_move_tail(& obj_priv->list, & dev_priv->mm.inactive_list);
}
obj_priv->last_rendering_seqno = 0;
if (obj_priv->active) {
obj_priv->active = 0;
drm_gem_object_unreference(obj);
} else {
}
return;
}
}
static uint32_t i915_add_request(struct drm_device *dev , uint32_t flush_domains )
{
drm_i915_private_t *dev_priv ;
struct drm_i915_gem_request *request ;
uint32_t seqno ;
int was_empty ;
unsigned int outring ;
unsigned int ringmask ;
unsigned int outcount ;
char volatile *virt ;
void *tmp ;
struct drm_i915_gem_object *obj_priv ;
struct drm_i915_gem_object *next ;
struct list_head const *__mptr ;
struct list_head const *__mptr___0 ;
struct list_head const *__mptr___1 ;
struct drm_gem_object *obj ;
{
dev_priv = dev->dev_private;
tmp = drm_calloc(1, sizeof(*request), 2);
request = tmp;
if ((unsigned long )request == (unsigned long )((void *)0)) {
return (0);
} else {
}
seqno = dev_priv->mm.next_gem_seqno;
dev_priv->mm.next_gem_seqno = dev_priv->mm.next_gem_seqno + (uint32_t )1;
if (dev_priv->mm.next_gem_seqno == (uint32_t )0) {
dev_priv->mm.next_gem_seqno = dev_priv->mm.next_gem_seqno + (uint32_t )1;
} else {
}
while (1) {
if (dev_priv->ring.space < 4 * 4) {
i915_wait_ring(dev, 4 * 4, "i915_add_request");
} else {
}
outcount = 0;
outring = dev_priv->ring.tail;
ringmask = dev_priv->ring.tail_mask;
virt = dev_priv->ring.virtual_start;
break;
}
while (1) {
*((unsigned int volatile *)(virt + outring)) = (33 << 23) | 1;
outcount = outcount + 1U;
outring = outring + 4U;
outring = outring & ringmask;
break;
}
while (1) {
*((unsigned int volatile *)(virt + outring)) = 32 << 2;
outcount = outcount + 1U;
outring = outring + 4U;
outring = outring & ringmask;
break;
}
while (1) {
*((unsigned int volatile *)(virt + outring)) = seqno;
outcount = outcount + 1U;
outring = outring + 4U;
outring = outring & ringmask;
break;
}
while (1) {
*((unsigned int volatile *)(virt + outring)) = (2 << 23) | 0;
outcount = outcount + 1U;
outring = outring + 4U;
outring = outring & ringmask;
break;
}
while (1) {
dev_priv->ring.tail = outring;
dev_priv->ring.space = (unsigned int )dev_priv->ring.space - outcount * 4U;
writel(outring, dev_priv->regs + 8240);
break;
}
while (1) {
if (drm_debug) {
printk("<7>[drm:%s] %d\n", "i915_add_request", seqno);
} else {
}
break;
}
request->seqno = seqno;
request->emitted_jiffies = jiffies;
was_empty = list_empty(& dev_priv->mm.request_list);
list_add_tail(& request->list, & dev_priv->mm.request_list);
if (flush_domains != (uint32_t )0) {
__mptr = dev_priv->mm.flushing_list.next;
obj_priv = (struct drm_i915_gem_object *)((char *)__mptr - (unsigned int )(& ((struct drm_i915_gem_object *)0)->list));
__mptr___0 = obj_priv->list.next;
next = (struct drm_i915_gem_object *)((char *)__mptr___0 - (unsigned int )(& ((struct drm_i915_gem_object *)0)->list));
while (1) {
if ((unsigned long )(& obj_priv->list) != (unsigned long )(& dev_priv->mm.flushing_list)) {
} else {
break;
}
obj = obj_priv->obj;
if ((obj->write_domain & flush_domains) == obj->write_domain) {
obj->write_domain = 0;
i915_gem_object_move_to_active(obj, seqno);
} else {
}
obj_priv = next;
__mptr___1 = next->list.next;
next = (struct drm_i915_gem_object *)((char *)__mptr___1 - (unsigned int )(& ((struct drm_i915_gem_object *)0)->list));
}
} else {
}
if (was_empty && ! dev_priv->mm.suspended) {
schedule_delayed_work(& dev_priv->mm.retire_work, 250);
} else {
}
return (seqno);
}
}
static uint32_t i915_retire_commands(struct drm_device *dev )
{
drm_i915_private_t *dev_priv ;
uint32_t cmd ;
uint32_t flush_domains ;
unsigned int outring ;
unsigned int ringmask ;
unsigned int outcount ;
char volatile *virt ;
{
dev_priv = dev->dev_private;
cmd = ((4 << 23) | 0) | (1 << 2);
flush_domains = 0;
if (((((((((dev->pci_device == 10610 || dev->pci_device == 10626) || dev->pci_device == 10642) || dev->pci_device == 10658) || dev->pci_device == 10754) || dev->pci_device == 10770) || dev->pci_device == 10818) || dev->pci_device == 11778) || dev->pci_device == 11794) || dev->pci_device == 11810) {
flush_domains = flush_domains | 4U;
} else {
}
while (1) {
if (dev_priv->ring.space < 2 * 4) {
i915_wait_ring(dev, 2 * 4, "i915_retire_commands");
} else {
}
outcount = 0;
outring = dev_priv->ring.tail;
ringmask = dev_priv->ring.tail_mask;
virt = dev_priv->ring.virtual_start;
break;
}
while (1) {
*((unsigned int volatile *)(virt + outring)) = cmd;
outcount = outcount + 1U;
outring = outring + 4U;
outring = outring & ringmask;
break;
}
while (1) {
*((unsigned int volatile *)(virt + outring)) = 0;
outcount = outcount + 1U;
outring = outring + 4U;
outring = outring & ringmask;
break;
}
while (1) {
dev_priv->ring.tail = outring;
dev_priv->ring.space = (unsigned int )dev_priv->ring.space - outcount * 4U;
writel(outring, dev_priv->regs + 8240);
break;
}
return (flush_domains);
}
}
static void i915_gem_retire_request(struct drm_device *dev , struct drm_i915_gem_request *request )
{
drm_i915_private_t *dev_priv ;
struct drm_gem_object *obj ;
struct drm_i915_gem_object *obj_priv ;
struct list_head const *__mptr ;
int tmp ;
{
dev_priv = dev->dev_private;
while (1) {
tmp = list_empty(& dev_priv->mm.active_list);
if (tmp) {
break;
} else {
}
__mptr = dev_priv->mm.active_list.next;
obj_priv = (struct drm_i915_gem_object *)((char *)__mptr - (unsigned int )(& ((struct drm_i915_gem_object *)0)->list));
obj = obj_priv->obj;
if (obj_priv->last_rendering_seqno != request->seqno) {
return;
} else {
}
if (obj->write_domain != (uint32_t )0) {
i915_gem_object_move_to_flushing(obj);
} else {
i915_gem_object_move_to_inactive(obj);
}
}
return;
}
}
static int i915_seqno_passed(uint32_t seq1 , uint32_t seq2 )
{
{
return ((int32_t )(seq1 - seq2) >= 0);
}
}
uint32_t i915_get_gem_seqno(struct drm_device *dev )
{
drm_i915_private_t *dev_priv ;
{
dev_priv = dev->dev_private;
return (*((u32 volatile *)dev_priv->hw_status_page + 32));
}
}
void i915_gem_retire_requests(struct drm_device *dev )
{
drm_i915_private_t *dev_priv ;
uint32_t seqno ;
struct drm_i915_gem_request *request ;
uint32_t retiring_seqno ;
struct list_head const *__mptr ;
int tmp ;
int tmp___0 ;
{
dev_priv = dev->dev_private;
seqno = i915_get_gem_seqno(dev);
while (1) {
tmp___0 = list_empty(& dev_priv->mm.request_list);
if (tmp___0) {
break;
} else {
}
__mptr = dev_priv->mm.request_list.next;
request = (struct drm_i915_gem_request *)((char *)__mptr - (unsigned int )(& ((struct drm_i915_gem_request *)0)->list));
retiring_seqno = request->seqno;
tmp = i915_seqno_passed(seqno, retiring_seqno);
if (tmp || dev_priv->mm.wedged) {
i915_gem_retire_request(dev, request);
list_del(& request->list);
drm_free(request, sizeof(*request), 2);
} else {
break;
}
}
return;
}
}
void i915_gem_retire_work_handler(struct work_struct *work )
{
drm_i915_private_t *dev_priv ;
struct drm_device *dev ;
struct work_struct const *__mptr ;
int tmp ;
{
__mptr = work;
dev_priv = (drm_i915_private_t *)((char *)__mptr - (unsigned int )(& ((drm_i915_private_t *)0)->mm.retire_work.work));
dev = dev_priv->dev;
mutex_lock_nested(& dev->struct_mutex, 0);
i915_gem_retire_requests(dev);
if (! dev_priv->mm.suspended) {
tmp = list_empty(& dev_priv->mm.request_list);
if (tmp) {
} else {
schedule_delayed_work(& dev_priv->mm.retire_work, 250);
}
} else {
}
mutex_unlock(& dev->struct_mutex);
return;
}
}
static int i915_wait_request(struct drm_device *dev , uint32_t seqno )
{
drm_i915_private_t *dev_priv ;
int ret ;
long tmp ;
int __ret ;
wait_queue_t __wait ;
struct task_struct *tmp___0 ;
uint32_t tmp___1 ;
int tmp___2 ;
struct task_struct *tmp___3 ;
int tmp___4 ;
uint32_t tmp___5 ;
int tmp___6 ;
uint32_t tmp___7 ;
int tmp___8 ;
uint32_t tmp___9 ;
{
dev_priv = dev->dev_private;
ret = 0;
while (1) {
tmp = ldv__builtin_expect(! (! (seqno == (uint32_t )0)), 0);
if (tmp) {
while (1) {
__asm__ volatile ("1:\tud2\n"
".pushsection __bug_table,\"a\"\n"
"2:\t.quad 1b, %c0\n"
"\t.word %c1, 0\n"
"\t.org 2b+%c2\n"
".popsection": : "i" ("/work/ldvuser/novikov/work/current--X--drivers/gpu/drm/i915/i915.ko--X--defaultlinux--X--68_1--X--cpachecker/linux/csd_deg_dscv/36/dscv_tempdir/dscv/ri/68_1/drivers/gpu/drm/i915/i915_gem.c"),
"i" (1072), "i" (sizeof(struct bug_entry )));
while (1) {
}
break;
}
} else {
}
break;
}
tmp___7 = i915_get_gem_seqno(dev);
tmp___8 = i915_seqno_passed(tmp___7, seqno);
if (tmp___8) {
} else {
dev_priv->mm.waiting_gem_seqno = seqno;
i915_user_irq_get(dev);
__ret = 0;
tmp___5 = i915_get_gem_seqno(dev);
tmp___6 = i915_seqno_passed(tmp___5, seqno);
if (tmp___6 || dev_priv->mm.wedged) {
} else {
while (1) {
tmp___0 = get_current();
__wait.flags = 0U;
__wait.private = tmp___0;
__wait.func = & autoremove_wake_function;
__wait.task_list.next = & __wait.task_list;
__wait.task_list.prev = & __wait.task_list;
while (1) {
prepare_to_wait(& dev_priv->irq_queue, & __wait, 1);
tmp___1 = i915_get_gem_seqno(dev);
tmp___2 = i915_seqno_passed(tmp___1, seqno);
if (tmp___2 || dev_priv->mm.wedged) {
break;
} else {
}
tmp___3 = get_current();
tmp___4 = signal_pending(tmp___3);
if (tmp___4) {
} else {
schedule();
goto __Cont;
}
__ret = -512;
break;
__Cont: /* CIL Label */ ;
}
finish_wait(& dev_priv->irq_queue, & __wait);
break;
}
}
ret = __ret;
i915_user_irq_put(dev);
dev_priv->mm.waiting_gem_seqno = 0;
}
if (dev_priv->mm.wedged) {
ret = -5;
} else {
}
if (ret && ret != -512) {
tmp___9 = i915_get_gem_seqno(dev);
printk("<3>[drm:%s] *ERROR* %s returns %d (awaiting %d at %d)\n", "i915_wait_request",
"i915_wait_request", ret, seqno, tmp___9);
} else {
}
if (ret == 0) {
i915_gem_retire_requests(dev);
} else {
}
return (ret);
}
}
static void i915_gem_flush(struct drm_device *dev , uint32_t invalidate_domains ,
uint32_t flush_domains )
{
drm_i915_private_t *dev_priv ;
uint32_t cmd ;
unsigned int outring ;
unsigned int ringmask ;
unsigned int outcount ;
char volatile *virt ;
{
dev_priv = dev->dev_private;
if (flush_domains & 1U) {
drm_agp_chipset_flush(dev);
} else {
}
if ((invalidate_domains | flush_domains) & (unsigned int )(~ (1 | 64))) {
cmd = ((4 << 23) | 0) | (1 << 2);
if ((invalidate_domains | flush_domains) & 2U) {
cmd = cmd & (unsigned int )(~ (1 << 2));
} else {
}
if (! (((((((((dev->pci_device == 10610 || dev->pci_device == 10626) || dev->pci_device == 10642) || dev->pci_device == 10658) || dev->pci_device == 10754) || dev->pci_device == 10770) || dev->pci_device == 10818) || dev->pci_device == 11778) || dev->pci_device == 11794) || dev->pci_device == 11810)) {
if (invalidate_domains & 4U) {
cmd = cmd | (unsigned int )(1 << 0);
} else {
}
} else {
}
if (invalidate_domains & 16U) {
cmd = cmd | (unsigned int )(1 << 1);
} else {
}
while (1) {
if (dev_priv->ring.space < 2 * 4) {
i915_wait_ring(dev, 2 * 4, "i915_gem_flush");
} else {
}
outcount = 0;
outring = dev_priv->ring.tail;
ringmask = dev_priv->ring.tail_mask;
virt = dev_priv->ring.virtual_start;
break;
}
while (1) {
*((unsigned int volatile *)(virt + outring)) = cmd;
outcount = outcount + 1U;
outring = outring + 4U;
outring = outring & ringmask;
break;
}
while (1) {
*((unsigned int volatile *)(virt + outring)) = 0;
outcount = outcount + 1U;
outring = outring + 4U;
outring = outring & ringmask;
break;
}
while (1) {
dev_priv->ring.tail = outring;
dev_priv->ring.space = (unsigned int )dev_priv->ring.space - outcount * 4U;
writel(outring, dev_priv->regs + 8240);
break;
}
} else {
}
return;
}
}
static int i915_gem_object_wait_rendering(struct drm_gem_object *obj )
{
struct drm_device *dev ;
struct drm_i915_gem_object *obj_priv ;
int ret ;
long tmp ;
{
dev = obj->dev;
obj_priv = obj->driver_private;
while (1) {
tmp = ldv__builtin_expect(! (! ((obj->write_domain & (unsigned int )(~ (1 | 64))) != 0U)),
0);
if (tmp) {
while (1) {
__asm__ volatile ("1:\tud2\n"
".pushsection __bug_table,\"a\"\n"
"2:\t.quad 1b, %c0\n"
"\t.word %c1, 0\n"
"\t.org 2b+%c2\n"
".popsection": : "i" ("/work/ldvuser/novikov/work/current--X--drivers/gpu/drm/i915/i915.ko--X--defaultlinux--X--68_1--X--cpachecker/linux/csd_deg_dscv/36/dscv_tempdir/dscv/ri/68_1/drivers/gpu/drm/i915/i915_gem.c"),
"i" (1188), "i" (sizeof(struct bug_entry )));
while (1) {
}
break;
}
} else {
}
break;
}
if (obj_priv->active) {
ret = i915_wait_request(dev, obj_priv->last_rendering_seqno);
if (ret != 0) {
return (ret);
} else {
}
} else {
}
return (0);
}
}
static int i915_gem_object_unbind(struct drm_gem_object *obj )
{
struct drm_device *dev ;
struct drm_i915_gem_object *obj_priv ;
loff_t offset ;
int ret ;
long tmp ;
int tmp___0 ;
{
dev = obj->dev;
obj_priv = obj->driver_private;
ret = 0;
if ((unsigned long )obj_priv->gtt_space == (unsigned long )((void *)0)) {
return (0);
} else {
}
if (obj_priv->pin_count != 0) {
printk("<3>[drm:%s] *ERROR* Attempting to unbind pinned buffer\n", "i915_gem_object_unbind");
return (-22);
} else {
}
ret = i915_gem_object_set_to_cpu_domain(obj, 1);
if (ret) {
if (ret != -512) {
printk("<3>[drm:%s] *ERROR* set_domain failed: %d\n", "i915_gem_object_unbind",
ret);
} else {
}
return (ret);
} else {
}
if ((unsigned long )obj_priv->agp_mem != (unsigned long )((void *)0)) {
drm_unbind_agp(obj_priv->agp_mem);
drm_free_agp(obj_priv->agp_mem, obj->size / (1UL << 12));
obj_priv->agp_mem = (void *)0;
} else {
}
while (1) {
tmp = ldv__builtin_expect(! (! obj_priv->active), 0);
if (tmp) {
while (1) {
__asm__ volatile ("1:\tud2\n"
".pushsection __bug_table,\"a\"\n"
"2:\t.quad 1b, %c0\n"
"\t.word %c1, 0\n"
"\t.org 2b+%c2\n"
".popsection": : "i" ("/work/ldvuser/novikov/work/current--X--drivers/gpu/drm/i915/i915.ko--X--defaultlinux--X--68_1--X--cpachecker/linux/csd_deg_dscv/36/dscv_tempdir/dscv/ri/68_1/drivers/gpu/drm/i915/i915_gem.c"),
"i" (1248), "i" (sizeof(struct bug_entry )));
while (1) {
}
break;
}
} else {
}
break;
}
offset = (loff_t )obj->map_list.hash.key << 12;
if (dev->dev_mapping) {
unmap_mapping_range(dev->dev_mapping, offset, obj->size, 1);
} else {
}
if (obj_priv->fence_reg != -1) {
i915_gem_clear_fence_reg(obj);
} else {
}
i915_gem_object_free_page_list(obj);
if (obj_priv->gtt_space) {
atomic_dec(& dev->gtt_count);
atomic_sub(obj->size, & dev->gtt_memory);
drm_mm_put_block(obj_priv->gtt_space);
obj_priv->gtt_space = (void *)0;
} else {
}
tmp___0 = list_empty(& obj_priv->list);
if (tmp___0) {
} else {
list_del_init(& obj_priv->list);
}
return (0);
}
}
static int i915_gem_evict_something(struct drm_device *dev )
{
drm_i915_private_t *dev_priv ;
struct drm_gem_object *obj ;
struct drm_i915_gem_object *obj_priv ;
int ret ;
struct list_head const *__mptr ;
long tmp ;
long tmp___0 ;
int tmp___1 ;
struct drm_i915_gem_request *request ;
struct list_head const *__mptr___0 ;
int tmp___2 ;
int tmp___3 ;
struct list_head const *__mptr___1 ;
int tmp___4 ;
int tmp___5 ;
int tmp___6 ;
int tmp___7 ;
{
dev_priv = dev->dev_private;
ret = 0;
while (1) {
tmp___1 = list_empty(& dev_priv->mm.inactive_list);
if (tmp___1) {
} else {
__mptr = dev_priv->mm.inactive_list.next;
obj_priv = (struct drm_i915_gem_object *)((char *)__mptr - (unsigned int )(& ((struct drm_i915_gem_object *)0)->list));
obj = obj_priv->obj;
while (1) {
tmp = ldv__builtin_expect(! (! (obj_priv->pin_count != 0)), 0);
if (tmp) {
while (1) {
__asm__ volatile ("1:\tud2\n"
".pushsection __bug_table,\"a\"\n"
"2:\t.quad 1b, %c0\n"
"\t.word %c1, 0\n"
"\t.org 2b+%c2\n"
".popsection": : "i" ("/work/ldvuser/novikov/work/current--X--drivers/gpu/drm/i915/i915.ko--X--defaultlinux--X--68_1--X--cpachecker/linux/csd_deg_dscv/36/dscv_tempdir/dscv/ri/68_1/drivers/gpu/drm/i915/i915_gem.c"),
"i" (1292), "i" (sizeof(struct bug_entry )));
while (1) {
}
break;
}
} else {
}
break;
}
while (1) {
tmp___0 = ldv__builtin_expect(! (! obj_priv->active), 0);
if (tmp___0) {
while (1) {
__asm__ volatile ("1:\tud2\n"
".pushsection __bug_table,\"a\"\n"
"2:\t.quad 1b, %c0\n"
"\t.word %c1, 0\n"
"\t.org 2b+%c2\n"
".popsection": : "i" ("/work/ldvuser/novikov/work/current--X--drivers/gpu/drm/i915/i915.ko--X--defaultlinux--X--68_1--X--cpachecker/linux/csd_deg_dscv/36/dscv_tempdir/dscv/ri/68_1/drivers/gpu/drm/i915/i915_gem.c"),
"i" (1296), "i" (sizeof(struct bug_entry )));
while (1) {
}
break;
}
} else {
}
break;
}
ret = i915_gem_object_unbind(obj);
break;
}
tmp___3 = list_empty(& dev_priv->mm.request_list);
if (tmp___3) {
} else {
__mptr___0 = dev_priv->mm.request_list.next;
request = (struct drm_i915_gem_request *)((char *)__mptr___0 - (unsigned int )(& ((struct drm_i915_gem_request *)0)->list));
ret = i915_wait_request(dev, request->seqno);
if (ret) {
break;
} else {
}
tmp___2 = list_empty(& dev_priv->mm.inactive_list);
if (tmp___2) {
} else {
goto __Cont;
}
break;
}
tmp___4 = list_empty(& dev_priv->mm.flushing_list);
if (tmp___4) {
} else {
__mptr___1 = dev_priv->mm.flushing_list.next;
obj_priv = (struct drm_i915_gem_object *)((char *)__mptr___1 - (unsigned int )(& ((struct drm_i915_gem_object *)0)->list));
obj = obj_priv->obj;
i915_gem_flush(dev, obj->write_domain, obj->write_domain);
i915_add_request(dev, obj->write_domain);
obj = (void *)0;
goto __Cont;
}
tmp___5 = list_empty(& dev_priv->mm.flushing_list);
tmp___6 = list_empty(& dev_priv->mm.request_list);
tmp___7 = list_empty(& dev_priv->mm.inactive_list);
printk("<3>[drm:%s] *ERROR* inactive empty %d request empty %d flushing empty %d\n",
"i915_gem_evict_something", tmp___7, tmp___6, tmp___5);
return (-12);
__Cont: /* CIL Label */ ;
}
return (ret);
}
}
static int i915_gem_evict_everything(struct drm_device *dev )
{
int ret ;
{
while (1) {
ret = i915_gem_evict_something(dev);
if (ret != 0) {
break;
} else {
}
}
if (ret == -12) {
return (0);
} else {
}
return (ret);
}
}
static int i915_gem_object_get_page_list(struct drm_gem_object *obj )
{
struct drm_i915_gem_object *obj_priv ;
int page_count___0 ;
int i ;
struct address_space *mapping ;
struct inode *inode ;
struct page *page ;
int ret ;
long tmp ;
void *tmp___0 ;
long tmp___1 ;
long tmp___2 ;
{
obj_priv = obj->driver_private;
if (obj_priv->page_list) {
return (0);
} else {
}
page_count___0 = obj->size / (1UL << 12);
while (1) {
tmp = ldv__builtin_expect(! (! ((unsigned long )obj_priv->page_list != (unsigned long )((void *)0))),
0);
if (tmp) {
while (1) {
__asm__ volatile ("1:\tud2\n"
".pushsection __bug_table,\"a\"\n"
"2:\t.quad 1b, %c0\n"
"\t.word %c1, 0\n"
"\t.org 2b+%c2\n"
".popsection": : "i" ("/work/ldvuser/novikov/work/current--X--drivers/gpu/drm/i915/i915.ko--X--defaultlinux--X--68_1--X--cpachecker/linux/csd_deg_dscv/36/dscv_tempdir/dscv/ri/68_1/drivers/gpu/drm/i915/i915_gem.c"),
"i" (1393), "i" (sizeof(struct bug_entry )));
while (1) {
}
break;
}
} else {
}
break;
}
tmp___0 = drm_calloc(page_count___0, sizeof(struct page *), 2);
obj_priv->page_list = tmp___0;
if ((unsigned long )obj_priv->page_list == (unsigned long )((void *)0)) {
printk("<3>[drm:%s] *ERROR* Faled to allocate page list\n", "i915_gem_object_get_page_list");
return (-12);
} else {
}
inode = ((obj->filp)->f_path.dentry)->d_inode;
mapping = inode->i_mapping;
i = 0;
while (1) {
if (i < page_count___0) {
} else {
break;
}
page = read_mapping_page(mapping, i, (void *)0);
tmp___2 = IS_ERR(page);
if (tmp___2) {
tmp___1 = PTR_ERR(page);
ret = tmp___1;
printk("<3>[drm:%s] *ERROR* read_mapping_page failed: %d\n", "i915_gem_object_get_page_list",
ret);
i915_gem_object_free_page_list(obj);
return (ret);
} else {
}
*(obj_priv->page_list + i) = page;
i = i + 1;
}
return (0);
}
}
static void i965_write_fence_reg(struct drm_i915_fence_reg *reg )
{
struct drm_gem_object *obj ;
struct drm_device *dev ;
drm_i915_private_t *dev_priv ;
struct drm_i915_gem_object *obj_priv ;
int regnum ;
uint64_t val ;
{
obj = reg->obj;
dev = obj->dev;
dev_priv = dev->dev_private;
obj_priv = obj->driver_private;
regnum = obj_priv->fence_reg;
val = (uint64_t )((((size_t )obj_priv->gtt_offset + obj->size) - (size_t )4096) & 4294963200UL) << 32;
val = val | (unsigned long long )(obj_priv->gtt_offset & 4294963200U);
val = val | (unsigned long long )((obj_priv->stride / (uint32_t )128 - (uint32_t )1) << 2);
if (obj_priv->tiling_mode == (uint32_t )2) {
val = val | (unsigned long long )(1 << 1);
} else {
}
val = val | (unsigned long long )(1 << 0);
writeq(val, dev_priv->regs + (12288 + regnum * 8));
return;
}
}
static void i915_write_fence_reg(struct drm_i915_fence_reg *reg )
{
struct drm_gem_object *obj ;
struct drm_device *dev ;
drm_i915_private_t *dev_priv ;
struct drm_i915_gem_object *obj_priv ;
int regnum ;
uint32_t val ;
uint32_t pitch_val ;
int __ret_warn_on ;
long tmp ;
int tmp___0 ;
{
obj = reg->obj;
dev = obj->dev;
dev_priv = dev->dev_private;
obj_priv = obj->driver_private;
regnum = obj_priv->fence_reg;
if (obj_priv->gtt_offset & (unsigned int )(~ 267386880) || (unsigned long )obj_priv->gtt_offset & (obj->size - (size_t )1)) {
__ret_warn_on = 1;
tmp = ldv__builtin_expect(! (! __ret_warn_on), 0);
if (tmp) {
warn_slowpath("/work/ldvuser/novikov/work/current--X--drivers/gpu/drm/i915/i915.ko--X--defaultlinux--X--68_1--X--cpachecker/linux/csd_deg_dscv/36/dscv_tempdir/dscv/ri/68_1/drivers/gpu/drm/i915/i915_gem.c",
1448, "%s: object not 1M or size aligned\n", "i915_write_fence_reg");
} else {
}
ldv__builtin_expect(! (! __ret_warn_on), 0);
return;
} else {
}
if (obj_priv->tiling_mode == (uint32_t )2 && ((dev->pci_device == 10098 || (dev->pci_device == 10146 || dev->pci_device == 10158)) || ((dev->pci_device == 10690 || dev->pci_device == 10674) || dev->pci_device == 10706))) {
pitch_val = obj_priv->stride / (uint32_t )128 - (uint32_t )1;
} else {
pitch_val = obj_priv->stride / (uint32_t )512 - (uint32_t )1;
}
val = obj_priv->gtt_offset;
if (obj_priv->tiling_mode == (uint32_t )2) {
val = val | (unsigned int )(1 << 12);
} else {
}
tmp___0 = get_order(obj->size >> 20);
val = val | (unsigned int )((tmp___0 - 1) << 8);
val = val | (pitch_val << 4);
val = val | (unsigned int )(1 << 0);
writel(val, dev_priv->regs + (8192 + regnum * 4));
return;
}
}
static void i830_write_fence_reg(struct drm_i915_fence_reg *reg )
{
struct drm_gem_object *obj ;
struct drm_device *dev ;
drm_i915_private_t *dev_priv ;
struct drm_i915_gem_object *obj_priv ;
int regnum ;
uint32_t val ;
uint32_t pitch_val ;
int __ret_warn_on ;
long tmp ;
int tmp___0 ;
{
obj = reg->obj;
dev = obj->dev;
dev_priv = dev->dev_private;
obj_priv = obj->driver_private;
regnum = obj_priv->fence_reg;
if (obj_priv->gtt_offset & (unsigned int )(~ 267386880) || (unsigned long )obj_priv->gtt_offset & (obj->size - (size_t )1)) {
__ret_warn_on = 1;
tmp = ldv__builtin_expect(! (! __ret_warn_on), 0);
if (tmp) {
warn_slowpath("/work/ldvuser/novikov/work/current--X--drivers/gpu/drm/i915/i915.ko--X--defaultlinux--X--68_1--X--cpachecker/linux/csd_deg_dscv/36/dscv_tempdir/dscv/ri/68_1/drivers/gpu/drm/i915/i915_gem.c",
1481, "%s: object not 1M or size aligned\n", "i830_write_fence_reg");
} else {
}
ldv__builtin_expect(! (! __ret_warn_on), 0);
return;
} else {
}
pitch_val = obj_priv->stride / (uint32_t )128 - (uint32_t )1;
val = obj_priv->gtt_offset;
if (obj_priv->tiling_mode == (uint32_t )2) {
val = val | (unsigned int )(1 << 12);
} else {
}
tmp___0 = get_order(obj->size >> 19);
val = val | (unsigned int )((tmp___0 - 1) << 8);
val = val | (pitch_val << 4);
val = val | (unsigned int )(1 << 0);
writel(val, dev_priv->regs + (8192 + regnum * 4));
return;
}
}
static void i915_gem_object_get_fence_reg(struct drm_gem_object *obj )
{
struct drm_device *dev ;
struct drm_i915_private *dev_priv ;
struct drm_i915_gem_object *obj_priv ;
struct drm_i915_fence_reg *reg ;
int i ;
int ret ;
int __ret_warn_on ;
long tmp ;
int __ret_warn_on___0 ;
long tmp___0 ;
int __ret_warn_on___1 ;
long tmp___1 ;
struct drm_i915_gem_object *old_obj_priv ;
loff_t offset ;
int __ret_warn_on___2 ;
long tmp___2 ;
{
dev = obj->dev;
dev_priv = dev->dev_private;
obj_priv = obj->driver_private;
reg = (void *)0;
switch (obj_priv->tiling_mode) {
case (uint32_t )0:
__ret_warn_on = 1;
tmp = ldv__builtin_expect(! (! __ret_warn_on), 0);
if (tmp) {
warn_slowpath("/work/ldvuser/novikov/work/current--X--drivers/gpu/drm/i915/i915.ko--X--defaultlinux--X--68_1--X--cpachecker/linux/csd_deg_dscv/36/dscv_tempdir/dscv/ri/68_1/drivers/gpu/drm/i915/i915_gem.c",
1522, "allocating a fence for non-tiled object?\n");
} else {
}
ldv__builtin_expect(! (! __ret_warn_on), 0);
break;
case (uint32_t )1:
__ret_warn_on___0 = ! (! (obj_priv->stride & (unsigned int )(512 - 1)));
tmp___0 = ldv__builtin_expect(! (! __ret_warn_on___0), 0);
if (tmp___0) {
warn_slowpath("/work/ldvuser/novikov/work/current--X--drivers/gpu/drm/i915/i915.ko--X--defaultlinux--X--68_1--X--cpachecker/linux/csd_deg_dscv/36/dscv_tempdir/dscv/ri/68_1/drivers/gpu/drm/i915/i915_gem.c",
1526, "object is X tiled but has non-512B pitch\n");
} else {
}
ldv__builtin_expect(! (! __ret_warn_on___0), 0);
break;
case (uint32_t )2:
__ret_warn_on___1 = ! (! (obj_priv->stride & (unsigned int )(128 - 1)));
tmp___1 = ldv__builtin_expect(! (! __ret_warn_on___1), 0);
if (tmp___1) {
warn_slowpath("/work/ldvuser/novikov/work/current--X--drivers/gpu/drm/i915/i915.ko--X--defaultlinux--X--68_1--X--cpachecker/linux/csd_deg_dscv/36/dscv_tempdir/dscv/ri/68_1/drivers/gpu/drm/i915/i915_gem.c",
1530, "object is Y tiled but has non-128B pitch\n");
} else {
}
ldv__builtin_expect(! (! __ret_warn_on___1), 0);
break;
}
i = dev_priv->fence_reg_start;
while (1) {
if (i < dev_priv->num_fence_regs) {
} else {
break;
}
reg = & dev_priv->fence_regs[i];
if (! reg->obj) {
break;
} else {
}
i = i + 1;
}
if (i == dev_priv->num_fence_regs) {
old_obj_priv = (void *)0;
try_again:
i = dev_priv->fence_reg_start;
while (1) {
if (i < dev_priv->num_fence_regs) {
} else {
break;
}
reg = & dev_priv->fence_regs[i];
old_obj_priv = (reg->obj)->driver_private;
if (! old_obj_priv->pin_count) {
break;
} else {
}
i = i + 1;
}
if (i == dev_priv->num_fence_regs) {
ret = i915_gem_object_wait_rendering(reg->obj);
if (ret) {
__ret_warn_on___2 = ! (! ret);
tmp___2 = ldv__builtin_expect(! (! __ret_warn_on___2), 0);
if (tmp___2) {
warn_slowpath("/work/ldvuser/novikov/work/current--X--drivers/gpu/drm/i915/i915.ko--X--defaultlinux--X--68_1--X--cpachecker/linux/csd_deg_dscv/36/dscv_tempdir/dscv/ri/68_1/drivers/gpu/drm/i915/i915_gem.c",
1563, "wait_rendering failed: %d\n", ret);
} else {
}
ldv__builtin_expect(! (! __ret_warn_on___2), 0);
return;
} else {
}
goto try_again;
} else {
}
offset = (loff_t )(reg->obj)->map_list.hash.key << 12;
if (dev->dev_mapping) {
unmap_mapping_range(dev->dev_mapping, offset, (reg->obj)->size, 1);
} else {
}
old_obj_priv->fence_reg = -1;
} else {
}
obj_priv->fence_reg = i;
reg->obj = obj;
if (((((((((dev->pci_device == 10610 || dev->pci_device == 10626) || dev->pci_device == 10642) || dev->pci_device == 10658) || dev->pci_device == 10754) || dev->pci_device == 10770) || dev->pci_device == 10818) || dev->pci_device == 11778) || dev->pci_device == 11794) || dev->pci_device == 11810) {
i965_write_fence_reg(reg);
} else
if ((((((dev->pci_device == 9602 || dev->pci_device == 9610) || dev->pci_device == 9618) || dev->pci_device == 10098) || (dev->pci_device == 10146 || dev->pci_device == 10158)) || (((((((((dev->pci_device == 10610 || dev->pci_device == 10626) || dev->pci_device == 10642) || dev->pci_device == 10658) || dev->pci_device == 10754) || dev->pci_device == 10770) || dev->pci_device == 10818) || dev->pci_device == 11778) || dev->pci_device == 11794) || dev->pci_device == 11810)) || ((dev->pci_device == 10690 || dev->pci_device == 10674) || dev->pci_device == 10706)) {
i915_write_fence_reg(reg);
} else {
i830_write_fence_reg(reg);
}
return;
}
}
static void i915_gem_clear_fence_reg(struct drm_gem_object *obj )
{
struct drm_device *dev ;
drm_i915_private_t *dev_priv ;
struct drm_i915_gem_object *obj_priv ;
{
dev = obj->dev;
dev_priv = dev->dev_private;
obj_priv = obj->driver_private;
if (((((((((dev->pci_device == 10610 || dev->pci_device == 10626) || dev->pci_device == 10642) || dev->pci_device == 10658) || dev->pci_device == 10754) || dev->pci_device == 10770) || dev->pci_device == 10818) || dev->pci_device == 11778) || dev->pci_device == 11794) || dev->pci_device == 11810) {
writeq(0, dev_priv->regs + (12288 + obj_priv->fence_reg * 8));
} else {
writel(0, dev_priv->regs + (8192 + obj_priv->fence_reg * 4));
}
dev_priv->fence_regs[obj_priv->fence_reg].obj = (void *)0;
obj_priv->fence_reg = -1;
return;
}
}
static int i915_gem_object_bind_to_gtt(struct drm_gem_object *obj , unsigned int alignment )
{
struct drm_device *dev ;
drm_i915_private_t *dev_priv ;
struct drm_i915_gem_object *obj_priv ;
struct drm_mm_node *free_space ;
int page_count___0 ;
int ret ;
int tmp ;
int tmp___0 ;
int tmp___1 ;
long tmp___2 ;
long tmp___3 ;
{
dev = obj->dev;
dev_priv = dev->dev_private;
obj_priv = obj->driver_private;
if (alignment == 0U) {
alignment = 1UL << 12;
} else {
}
if ((unsigned long )alignment & ((1UL << 12) - 1UL)) {
printk("<3>[drm:%s] *ERROR* Invalid object alignment requested %u\n", "i915_gem_object_bind_to_gtt",
alignment);
return (-22);
} else {
}
search_free:
free_space = drm_mm_search_free(& dev_priv->mm.gtt_space, obj->size, alignment,
0);
if ((unsigned long )free_space != (unsigned long )((void *)0)) {
obj_priv->gtt_space = drm_mm_get_block(free_space, obj->size, alignment);
if ((unsigned long )obj_priv->gtt_space != (unsigned long )((void *)0)) {
(obj_priv->gtt_space)->private = obj;
obj_priv->gtt_offset = (obj_priv->gtt_space)->start;
} else {
}
} else {
}
if ((unsigned long )obj_priv->gtt_space == (unsigned long )((void *)0)) {
tmp = list_empty(& dev_priv->mm.inactive_list);
if (tmp) {
tmp___0 = list_empty(& dev_priv->mm.flushing_list);
if (tmp___0) {
tmp___1 = list_empty(& dev_priv->mm.active_list);
if (tmp___1) {
printk("<3>[drm:%s] *ERROR* GTT full, but LRU list empty\n", "i915_gem_object_bind_to_gtt");
return (-12);
} else {
}
} else {
}
} else {
}
ret = i915_gem_evict_something(dev);
if (ret != 0) {
if (ret != -512) {
printk("<3>[drm:%s] *ERROR* Failed to evict a buffer %d\n", "i915_gem_object_bind_to_gtt",
ret);
} else {
}
return (ret);
} else {
}
goto search_free;
} else {
}
ret = i915_gem_object_get_page_list(obj);
if (ret) {
drm_mm_put_block(obj_priv->gtt_space);
obj_priv->gtt_space = (void *)0;
return (ret);
} else {
}
page_count___0 = obj->size / (1UL << 12);
obj_priv->agp_mem = drm_agp_bind_pages(dev, obj_priv->page_list, page_count___0,
obj_priv->gtt_offset, obj_priv->agp_type);
if ((unsigned long )obj_priv->agp_mem == (unsigned long )((void *)0)) {
i915_gem_object_free_page_list(obj);
drm_mm_put_block(obj_priv->gtt_space);
obj_priv->gtt_space = (void *)0;
return (-12);
} else {
}
atomic_inc(& dev->gtt_count);
atomic_add(obj->size, & dev->gtt_memory);
while (1) {
tmp___2 = ldv__builtin_expect(! (! (obj->read_domains & (unsigned int )(~ (1 | 64)))),
0);
if (tmp___2) {
while (1) {
__asm__ volatile ("1:\tud2\n"
".pushsection __bug_table,\"a\"\n"
"2:\t.quad 1b, %c0\n"
"\t.word %c1, 0\n"
"\t.org 2b+%c2\n"
".popsection": : "i" ("/work/ldvuser/novikov/work/current--X--drivers/gpu/drm/i915/i915.ko--X--defaultlinux--X--68_1--X--cpachecker/linux/csd_deg_dscv/36/dscv_tempdir/dscv/ri/68_1/drivers/gpu/drm/i915/i915_gem.c"),
"i" (1700), "i" (sizeof(struct bug_entry )));
while (1) {
}
break;
}
} else {
}
break;
}
while (1) {
tmp___3 = ldv__builtin_expect(! (! (obj->write_domain & (unsigned int )(~ (1 | 64)))),
0);
if (tmp___3) {
while (1) {
__asm__ volatile ("1:\tud2\n"
".pushsection __bug_table,\"a\"\n"
"2:\t.quad 1b, %c0\n"
"\t.word %c1, 0\n"
"\t.org 2b+%c2\n"
".popsection": : "i" ("/work/ldvuser/novikov/work/current--X--drivers/gpu/drm/i915/i915.ko--X--defaultlinux--X--68_1--X--cpachecker/linux/csd_deg_dscv/36/dscv_tempdir/dscv/ri/68_1/drivers/gpu/drm/i915/i915_gem.c"),
"i" (1701), "i" (sizeof(struct bug_entry )));
while (1) {
}
break;
}
} else {
}
break;
}
return (0);
}
}
void i915_gem_clflush_object(struct drm_gem_object *obj )
{
struct drm_i915_gem_object *obj_priv ;
{
obj_priv = obj->driver_private;
if ((unsigned long )obj_priv->page_list == (unsigned long )((void *)0)) {
return;
} else {
}
drm_clflush_pages(obj_priv->page_list, obj->size / (1UL << 12));
return;
}
}
static void i915_gem_object_flush_gpu_write_domain(struct drm_gem_object *obj )
{
struct drm_device *dev ;
uint32_t seqno ;
{
dev = obj->dev;
if ((obj->write_domain & (unsigned int )(~ (1 | 64))) == 0U) {
return;
} else {
}
i915_gem_flush(dev, 0, obj->write_domain);
seqno = i915_add_request(dev, obj->write_domain);
obj->write_domain = 0;
i915_gem_object_move_to_active(obj, seqno);
return;
}
}
static void i915_gem_object_flush_gtt_write_domain(struct drm_gem_object *obj )
{
{
if (obj->write_domain != (uint32_t )64) {
return;
} else {
}
obj->write_domain = 0;
return;
}
}
static void i915_gem_object_flush_cpu_write_domain(struct drm_gem_object *obj )
{
struct drm_device *dev ;
{
dev = obj->dev;
if (obj->write_domain != (uint32_t )1) {
return;
} else {
}
i915_gem_clflush_object(obj);
drm_agp_chipset_flush(dev);
obj->write_domain = 0;
return;
}
}
int i915_gem_object_set_to_gtt_domain(struct drm_gem_object *obj , int write )
{
struct drm_i915_gem_object *obj_priv ;
int ret ;
long tmp ;
{
obj_priv = obj->driver_private;
if ((unsigned long )obj_priv->gtt_space == (unsigned long )((void *)0)) {
return (-22);
} else {
}
i915_gem_object_flush_gpu_write_domain(obj);
ret = i915_gem_object_wait_rendering(obj);
if (ret != 0) {
return (ret);
} else {
}
if (write) {
obj->read_domains = obj->read_domains & 64U;
} else {
}
i915_gem_object_flush_cpu_write_domain(obj);
while (1) {
tmp = ldv__builtin_expect(! (! ((obj->write_domain & (unsigned int )(~ 64)) != 0U)),
0);
if (tmp) {
while (1) {
__asm__ volatile ("1:\tud2\n"
".pushsection __bug_table,\"a\"\n"
"2:\t.quad 1b, %c0\n"
"\t.word %c1, 0\n"
"\t.org 2b+%c2\n"
".popsection": : "i" ("/work/ldvuser/novikov/work/current--X--drivers/gpu/drm/i915/i915.ko--X--defaultlinux--X--68_1--X--cpachecker/linux/csd_deg_dscv/36/dscv_tempdir/dscv/ri/68_1/drivers/gpu/drm/i915/i915_gem.c"),
"i" (1799), "i" (sizeof(struct bug_entry )));
while (1) {
}
break;
}
} else {
}
break;
}
obj->read_domains = obj->read_domains | 64U;
if (write) {
obj->write_domain = 64;
obj_priv->dirty = 1;
} else {
}
return (0);
}
}
static int i915_gem_object_set_to_cpu_domain(struct drm_gem_object *obj , int write )
{
struct drm_device *dev ;
int ret ;
long tmp ;
{
dev = obj->dev;
i915_gem_object_flush_gpu_write_domain(obj);
ret = i915_gem_object_wait_rendering(obj);
if (ret != 0) {
return (ret);
} else {
}
i915_gem_object_flush_gtt_write_domain(obj);
i915_gem_object_set_to_full_cpu_read_domain(obj);
if ((obj->read_domains & 1U) == 0U) {
i915_gem_clflush_object(obj);
drm_agp_chipset_flush(dev);
obj->read_domains = obj->read_domains | 1U;
} else {
}
while (1) {
tmp = ldv__builtin_expect(! (! ((obj->write_domain & (unsigned int )(~ 1)) != 0U)),
0);
if (tmp) {
while (1) {
__asm__ volatile ("1:\tud2\n"
".pushsection __bug_table,\"a\"\n"
"2:\t.quad 1b, %c0\n"
"\t.word %c1, 0\n"
"\t.org 2b+%c2\n"
".popsection": : "i" ("/work/ldvuser/novikov/work/current--X--drivers/gpu/drm/i915/i915.ko--X--defaultlinux--X--68_1--X--cpachecker/linux/csd_deg_dscv/36/dscv_tempdir/dscv/ri/68_1/drivers/gpu/drm/i915/i915_gem.c"),
"i" (1845), "i" (sizeof(struct bug_entry )));
while (1) {
}
break;
}
} else {
}
break;
}
if (write) {
obj->read_domains = obj->read_domains & 1U;
obj->write_domain = 1;
} else {
}
return (0);
}
}
static void i915_gem_object_set_to_gpu_domain(struct drm_gem_object *obj , uint32_t read_domains ,
uint32_t write_domain )
{
struct drm_device *dev ;
struct drm_i915_gem_object *obj_priv ;
uint32_t invalidate_domains ;
uint32_t flush_domains ;
long tmp ;
long tmp___0 ;
{
dev = obj->dev;
obj_priv = obj->driver_private;
invalidate_domains = 0;
flush_domains = 0;
while (1) {
tmp = ldv__builtin_expect(! (! (read_domains & 1U)), 0);
if (tmp) {
while (1) {
__asm__ volatile ("1:\tud2\n"
".pushsection __bug_table,\"a\"\n"
"2:\t.quad 1b, %c0\n"
"\t.word %c1, 0\n"
"\t.org 2b+%c2\n"
".popsection": : "i" ("/work/ldvuser/novikov/work/current--X--drivers/gpu/drm/i915/i915.ko--X--defaultlinux--X--68_1--X--cpachecker/linux/csd_deg_dscv/36/dscv_tempdir/dscv/ri/68_1/drivers/gpu/drm/i915/i915_gem.c"),
"i" (1979), "i" (sizeof(struct bug_entry )));
while (1) {
}
break;
}
} else {
}
break;
}
while (1) {
tmp___0 = ldv__builtin_expect(! (! (write_domain == (uint32_t )1)), 0);
if (tmp___0) {
while (1) {
__asm__ volatile ("1:\tud2\n"
".pushsection __bug_table,\"a\"\n"
"2:\t.quad 1b, %c0\n"
"\t.word %c1, 0\n"
"\t.org 2b+%c2\n"
".popsection": : "i" ("/work/ldvuser/novikov/work/current--X--drivers/gpu/drm/i915/i915.ko--X--defaultlinux--X--68_1--X--cpachecker/linux/csd_deg_dscv/36/dscv_tempdir/dscv/ri/68_1/drivers/gpu/drm/i915/i915_gem.c"),
"i" (1980), "i" (sizeof(struct bug_entry )));
while (1) {
}
break;
}
} else {
}
break;
}
if (write_domain == (uint32_t )0) {
read_domains = read_domains | obj->read_domains;
} else {
obj_priv->dirty = 1;
}
if (obj->write_domain && obj->write_domain != read_domains) {
flush_domains = flush_domains | obj->write_domain;
invalidate_domains = invalidate_domains | (read_domains & ~ obj->write_domain);
} else {
}
invalidate_domains = invalidate_domains | (read_domains & ~ obj->read_domains);
if ((flush_domains | invalidate_domains) & 1U) {
i915_gem_clflush_object(obj);
} else {
}
if ((write_domain | flush_domains) != 0U) {
obj->write_domain = write_domain;
} else {
}
obj->read_domains = read_domains;
dev->invalidate_domains = dev->invalidate_domains | invalidate_domains;
dev->flush_domains = dev->flush_domains | flush_domains;
return;
}
}
static void i915_gem_object_set_to_full_cpu_read_domain(struct drm_gem_object *obj )
{
struct drm_device *dev ;
struct drm_i915_gem_object *obj_priv ;
int i ;
{
dev = obj->dev;
obj_priv = obj->driver_private;
if (! obj_priv->page_cpu_valid) {
return;
} else {
}
if (obj->read_domains & 1U) {
i = 0;
while (1) {
if ((size_t )i <= (obj->size - (size_t )1) / (1UL << 12)) {
} else {
break;
}
if (*(obj_priv->page_cpu_valid + i)) {
goto __Cont;
} else {
}
drm_clflush_pages(obj_priv->page_list + i, 1);
__Cont: /* CIL Label */
i = i + 1;
}
drm_agp_chipset_flush(dev);
} else {
}
drm_free(obj_priv->page_cpu_valid, obj->size / (1UL << 12), 2);
obj_priv->page_cpu_valid = (void *)0;
return;
}
}
static int i915_gem_object_set_cpu_read_domain_range(struct drm_gem_object *obj ,
uint64_t offset , uint64_t size )
{
struct drm_i915_gem_object *obj_priv ;
int i ;
int ret ;
int tmp ;
void *tmp___0 ;
long tmp___1 ;
{
obj_priv = obj->driver_private;
if (offset == (uint64_t )0 && size == (uint64_t )obj->size) {
tmp = i915_gem_object_set_to_cpu_domain(obj, 0);
return (tmp);
} else {
}
i915_gem_object_flush_gpu_write_domain(obj);
ret = i915_gem_object_wait_rendering(obj);
if (ret != 0) {
return (ret);
} else {
}
i915_gem_object_flush_gtt_write_domain(obj);
if ((unsigned long )obj_priv->page_cpu_valid == (unsigned long )((void *)0) && (obj->read_domains & 1U) != 0U) {
return (0);
} else {
}
if ((unsigned long )obj_priv->page_cpu_valid == (unsigned long )((void *)0)) {
tmp___0 = drm_calloc(1, obj->size / (1UL << 12), 2);
obj_priv->page_cpu_valid = tmp___0;
if ((unsigned long )obj_priv->page_cpu_valid == (unsigned long )((void *)0)) {
return (-12);
} else {
}
} else
if ((obj->read_domains & 1U) == 0U) {
memset(obj_priv->page_cpu_valid, 0, obj->size / (1UL << 12));
} else {
}
i = offset / (uint64_t )(1UL << 12);
while (1) {
if ((uint64_t )i <= ((offset + size) - (uint64_t )1) / (uint64_t )(1UL << 12)) {
} else {
break;
}
if (*(obj_priv->page_cpu_valid + i)) {
goto __Cont;
} else {
}
drm_clflush_pages(obj_priv->page_list + i, 1);
*(obj_priv->page_cpu_valid + i) = 1;
__Cont: /* CIL Label */
i = i + 1;
}
while (1) {
tmp___1 = ldv__builtin_expect(! (! ((obj->write_domain & (unsigned int )(~ 1)) != 0U)),
0);
if (tmp___1) {
while (1) {
__asm__ volatile ("1:\tud2\n"
".pushsection __bug_table,\"a\"\n"
"2:\t.quad 1b, %c0\n"
"\t.word %c1, 0\n"
"\t.org 2b+%c2\n"
".popsection": : "i" ("/work/ldvuser/novikov/work/current--X--drivers/gpu/drm/i915/i915.ko--X--defaultlinux--X--68_1--X--cpachecker/linux/csd_deg_dscv/36/dscv_tempdir/dscv/ri/68_1/drivers/gpu/drm/i915/i915_gem.c"),
"i" (2131), "i" (sizeof(struct bug_entry )));
while (1) {
}
break;
}
} else {
}
break;
}
obj->read_domains = obj->read_domains | 1U;
return (0);
}
}
static int i915_gem_object_pin_and_relocate(struct drm_gem_object *obj , struct drm_file *file_priv ,
struct drm_i915_gem_exec_object *entry )
{
struct drm_device *dev ;
drm_i915_private_t *dev_priv ;
struct drm_i915_gem_relocation_entry reloc ;
struct drm_i915_gem_relocation_entry *relocs ;
struct drm_i915_gem_object *obj_priv ;
int i ;
int ret ;
void *reloc_page ;
struct drm_gem_object *target_obj ;
struct drm_i915_gem_object *target_obj_priv ;
uint32_t reloc_val ;
uint32_t reloc_offset ;
uint32_t *reloc_entry ;
unsigned long tmp ;
unsigned long tmp___0 ;
{
dev = obj->dev;
dev_priv = dev->dev_private;
obj_priv = obj->driver_private;
ret = i915_gem_object_pin(obj, (uint32_t )entry->alignment);
if (ret) {
return (ret);
} else {
}
entry->offset = obj_priv->gtt_offset;
relocs = (struct drm_i915_gem_relocation_entry *)((uintptr_t )entry->relocs_ptr);
i = 0;
while (1) {
if ((uint32_t )i < entry->relocation_count) {
} else {
break;
}
tmp = copy_from_user(& reloc, relocs + i, sizeof(reloc));
ret = tmp;
if (ret != 0) {
i915_gem_object_unpin(obj);
return (ret);
} else {
}
target_obj = drm_gem_object_lookup(obj->dev, file_priv, reloc.target_handle);
if ((unsigned long )target_obj == (unsigned long )((void *)0)) {
i915_gem_object_unpin(obj);
return (-9);
} else {
}
target_obj_priv = target_obj->driver_private;
if ((unsigned long )target_obj_priv->gtt_space == (unsigned long )((void *)0)) {
printk("<3>[drm:%s] *ERROR* No GTT space found for object %d\n", "i915_gem_object_pin_and_relocate",
reloc.target_handle);
drm_gem_object_unreference(target_obj);
i915_gem_object_unpin(obj);
return (-22);
} else {
}
if (reloc.offset > (uint64_t )(obj->size - (size_t )4)) {
printk("<3>[drm:%s] *ERROR* Relocation beyond object bounds: obj %p target %d offset %d size %d.\n",
"i915_gem_object_pin_and_relocate", obj, reloc.target_handle, (int )reloc.offset,
(int )obj->size);
drm_gem_object_unreference(target_obj);
i915_gem_object_unpin(obj);
return (-22);
} else {
}
if (reloc.offset & 3ULL) {
printk("<3>[drm:%s] *ERROR* Relocation not 4-byte aligned: obj %p target %d offset %d.\n",
"i915_gem_object_pin_and_relocate", obj, reloc.target_handle, (int )reloc.offset);
drm_gem_object_unreference(target_obj);
i915_gem_object_unpin(obj);
return (-22);
} else {
}
if (reloc.write_domain & 1U || reloc.read_domains & 1U) {
printk("<3>[drm:%s] *ERROR* reloc with read/write CPU domains: obj %p target %d offset %d read %08x write %08x",
"i915_gem_object_pin_and_relocate", obj, reloc.target_handle, (int )reloc.offset,
reloc.read_domains, reloc.write_domain);
return (-22);
} else {
}
if ((reloc.write_domain && target_obj->pending_write_domain) && reloc.write_domain != target_obj->pending_write_domain) {
printk("<3>[drm:%s] *ERROR* Write domain conflict: obj %p target %d offset %d new %08x old %08x\n",
"i915_gem_object_pin_and_relocate", obj, reloc.target_handle, (int )reloc.offset,
reloc.write_domain, target_obj->pending_write_domain);
drm_gem_object_unreference(target_obj);
i915_gem_object_unpin(obj);
return (-22);
} else {
}
target_obj->pending_read_domains = target_obj->pending_read_domains | reloc.read_domains;
target_obj->pending_write_domain = target_obj->pending_write_domain | reloc.write_domain;
if ((uint64_t )target_obj_priv->gtt_offset == reloc.presumed_offset) {
drm_gem_object_unreference(target_obj);
goto __Cont;
} else {
}
ret = i915_gem_object_set_to_gtt_domain(obj, 1);
if (ret != 0) {
drm_gem_object_unreference(target_obj);
i915_gem_object_unpin(obj);
return (-22);
} else {
}
reloc_offset = (uint64_t )obj_priv->gtt_offset + reloc.offset;
reloc_page = io_mapping_map_atomic_wc(dev_priv->mm.gtt_mapping, (unsigned long )reloc_offset & ~ ((1UL << 12) - 1UL));
reloc_entry = (uint32_t *)(reloc_page + ((unsigned long )reloc_offset & ((1UL << 12) - 1UL)));
reloc_val = target_obj_priv->gtt_offset + reloc.delta;
writel(reloc_val, reloc_entry);
io_mapping_unmap_atomic(reloc_page);
reloc.presumed_offset = target_obj_priv->gtt_offset;
tmp___0 = copy_to_user(relocs + i, & reloc, sizeof(reloc));
ret = tmp___0;
if (ret != 0) {
drm_gem_object_unreference(target_obj);
i915_gem_object_unpin(obj);
return (ret);
} else {
}
drm_gem_object_unreference(target_obj);
__Cont: /* CIL Label */
i = i + 1;
}
return (0);
}
}
static int i915_dispatch_gem_execbuffer(struct drm_device *dev , struct drm_i915_gem_execbuffer *exec ,
uint64_t exec_offset )
{
drm_i915_private_t *dev_priv ;
struct drm_clip_rect *boxes ;
int nbox ;
int i ;
int count ;
uint32_t exec_start ;
uint32_t exec_len ;
unsigned int outring ;
unsigned int ringmask ;
unsigned int outcount ;
char volatile *virt ;
int ret ;
int tmp ;
{
dev_priv = dev->dev_private;
boxes = (struct drm_clip_rect *)((uintptr_t )exec->cliprects_ptr);
nbox = exec->num_cliprects;
i = 0;
exec_start = (uint32_t )exec_offset + exec->batch_start_offset;
exec_len = exec->batch_len;
if ((exec_start | exec_len) & 7U) {
printk("<3>[drm:%s] *ERROR* alignment\n", "i915_dispatch_gem_execbuffer");
return (-22);
} else {
}
if (! exec_start) {
return (-22);
} else {
}
count = nbox ? nbox : 1;
i = 0;
while (1) {
if (i < count) {
} else {
break;
}
if (i < nbox) {
tmp = i915_emit_box(dev, boxes, i, exec->DR1, exec->DR4);
ret = tmp;
if (ret) {
return (ret);
} else {
}
} else {
}
if (dev->pci_device == 13687 || dev->pci_device == 9570) {
while (1) {
if (dev_priv->ring.space < 4 * 4) {
i915_wait_ring(dev, 4 * 4, "i915_dispatch_gem_execbuffer");
} else {
}
outcount = 0;
outring = dev_priv->ring.tail;
ringmask = dev_priv->ring.tail_mask;
virt = dev_priv->ring.virtual_start;
break;
}
while (1) {
*((unsigned int volatile *)(virt + outring)) = (48 << 23) | 1;
outcount = outcount + 1U;
outring = outring + 4U;
outring = outring & ringmask;
break;
}
while (1) {
*((unsigned int volatile *)(virt + outring)) = exec_start | 1U;
outcount = outcount + 1U;
outring = outring + 4U;
outring = outring & ringmask;
break;
}
while (1) {
*((unsigned int volatile *)(virt + outring)) = (exec_start + exec_len) - (uint32_t )4;
outcount = outcount + 1U;
outring = outring + 4U;
outring = outring & ringmask;
break;
}
while (1) {
*((unsigned int volatile *)(virt + outring)) = 0;
outcount = outcount + 1U;
outring = outring + 4U;
outring = outring & ringmask;
break;
}
while (1) {
dev_priv->ring.tail = outring;
dev_priv->ring.space = (unsigned int )dev_priv->ring.space - outcount * 4U;
writel(outring, dev_priv->regs + 8240);
break;
}
} else {
while (1) {
if (dev_priv->ring.space < 2 * 4) {
i915_wait_ring(dev, 2 * 4, "i915_dispatch_gem_execbuffer");
} else {
}
outcount = 0;
outring = dev_priv->ring.tail;
ringmask = dev_priv->ring.tail_mask;
virt = dev_priv->ring.virtual_start;
break;
}
if (((((((((dev->pci_device == 10610 || dev->pci_device == 10626) || dev->pci_device == 10642) || dev->pci_device == 10658) || dev->pci_device == 10754) || dev->pci_device == 10770) || dev->pci_device == 10818) || dev->pci_device == 11778) || dev->pci_device == 11794) || dev->pci_device == 11810) {
while (1) {
*((unsigned int volatile *)(virt + outring)) = (((49 << 23) | 0) | (2 << 6)) | (1 << 8);
outcount = outcount + 1U;
outring = outring + 4U;
outring = outring & ringmask;
break;
}
while (1) {
*((unsigned int volatile *)(virt + outring)) = exec_start;
outcount = outcount + 1U;
outring = outring + 4U;
outring = outring & ringmask;
break;
}
} else {
while (1) {
*((unsigned int volatile *)(virt + outring)) = ((49 << 23) | 0) | (2 << 6);
outcount = outcount + 1U;
outring = outring + 4U;
outring = outring & ringmask;
break;
}
while (1) {
*((unsigned int volatile *)(virt + outring)) = exec_start | 1U;
outcount = outcount + 1U;
outring = outring + 4U;
outring = outring & ringmask;
break;
}
}
while (1) {
dev_priv->ring.tail = outring;
dev_priv->ring.space = (unsigned int )dev_priv->ring.space - outcount * 4U;
writel(outring, dev_priv->regs + 8240);
break;
}
}
i = i + 1;
}
return (0);
}
}
static int i915_gem_ring_throttle(struct drm_device *dev , struct drm_file *file_priv )
{
struct drm_i915_file_private *i915_file_priv ;
int ret ;
uint32_t seqno ;
{
i915_file_priv = file_priv->driver_priv;
ret = 0;
mutex_lock_nested(& dev->struct_mutex, 0);
seqno = i915_file_priv->mm.last_gem_throttle_seqno;
i915_file_priv->mm.last_gem_throttle_seqno = i915_file_priv->mm.last_gem_seqno;
if (seqno) {
ret = i915_wait_request(dev, seqno);
} else {
}
mutex_unlock(& dev->struct_mutex);
return (ret);
}
}
int i915_gem_execbuffer(struct drm_device *dev , void *data , struct drm_file *file_priv )
{
drm_i915_private_t *dev_priv ;
struct drm_i915_file_private *i915_file_priv ;
struct drm_i915_gem_execbuffer *args ;
struct drm_i915_gem_exec_object *exec_list ;
struct drm_gem_object **object_list ;
struct drm_gem_object *batch_obj ;
int ret ;
int i ;
int pinned ;
uint64_t exec_offset ;
uint32_t seqno ;
uint32_t flush_domains ;
int pin_tries ;
void *tmp ;
void *tmp___0 ;
unsigned long tmp___1 ;
struct drm_gem_object *obj ;
long tmp___2 ;
struct drm_gem_object *obj___0 ;
unsigned long tmp___3 ;
{
dev_priv = dev->dev_private;
i915_file_priv = file_priv->driver_priv;
args = data;
exec_list = (void *)0;
object_list = (void *)0;
pinned = 0;
if (args->buffer_count < (uint32_t )1) {
printk("<3>[drm:%s] *ERROR* execbuf with %d buffers\n", "i915_gem_execbuffer",
args->buffer_count);
return (-22);
} else {
}
tmp = drm_calloc(sizeof(*exec_list), args->buffer_count, 2);
exec_list = tmp;
tmp___0 = drm_calloc(sizeof(*object_list), args->buffer_count, 2);
object_list = tmp___0;
if ((unsigned long )exec_list == (unsigned long )((void *)0) || (unsigned long )object_list == (unsigned long )((void *)0)) {
printk("<3>[drm:%s] *ERROR* Failed to allocate exec or object list for %d buffers\n",
"i915_gem_execbuffer", args->buffer_count);
ret = -12;
goto pre_mutex_err;
} else {
}
tmp___1 = copy_from_user(exec_list, (struct drm_i915_relocation_entry *)((uintptr_t )args->buffers_ptr),
sizeof(*exec_list) * (unsigned long )args->buffer_count);
ret = tmp___1;
if (ret != 0) {
printk("<3>[drm:%s] *ERROR* copy %d exec entries failed %d\n", "i915_gem_execbuffer",
args->buffer_count, ret);
goto pre_mutex_err;
} else {
}
mutex_lock_nested(& dev->struct_mutex, 0);
if (dev_priv->mm.wedged) {
printk("<3>[drm:%s] *ERROR* Execbuf while wedged\n", "i915_gem_execbuffer");
mutex_unlock(& dev->struct_mutex);
return (-5);
} else {
}
if (dev_priv->mm.suspended) {
printk("<3>[drm:%s] *ERROR* Execbuf while VT-switched.\n", "i915_gem_execbuffer");
mutex_unlock(& dev->struct_mutex);
return (-16);
} else {
}
i = 0;
while (1) {
if ((uint32_t )i < args->buffer_count) {
} else {
break;
}
*(object_list + i) = drm_gem_object_lookup(dev, file_priv, (exec_list + i)->handle);
if ((unsigned long )*(object_list + i) == (unsigned long )((void *)0)) {
printk("<3>[drm:%s] *ERROR* Invalid object handle %d at index %d\n", "i915_gem_execbuffer",
(exec_list + i)->handle, i);
ret = -9;
goto err;
} else {
}
i = i + 1;
}
pin_tries = 0;
while (1) {
ret = 0;
i = 0;
while (1) {
if ((uint32_t )i < args->buffer_count) {
} else {
break;
}
(*(object_list + i))->pending_read_domains = 0;
(*(object_list + i))->pending_write_domain = 0;
ret = i915_gem_object_pin_and_relocate(*(object_list + i), file_priv, exec_list + i);
if (ret) {
break;
} else {
}
pinned = i + 1;
i = i + 1;
}
if (ret == 0) {
break;
} else {
}
if (ret != -12 || pin_tries >= 1) {
if (ret != -512) {
printk("<3>[drm:%s] *ERROR* Failed to pin buffers %d\n", "i915_gem_execbuffer",
ret);
} else {
}
goto err;
} else {
}
i = 0;
while (1) {
if (i < pinned) {
} else {
break;
}
i915_gem_object_unpin(*(object_list + i));
i = i + 1;
}
pinned = 0;
ret = i915_gem_evict_everything(dev);
if (ret) {
goto err;
} else {
}
pin_tries = pin_tries + 1;
}
batch_obj = *(object_list + (args->buffer_count - (uint32_t )1));
batch_obj->pending_read_domains = 8;
batch_obj->pending_write_domain = 0;
dev->invalidate_domains = 0;
dev->flush_domains = 0;
i = 0;
while (1) {
if ((uint32_t )i < args->buffer_count) {
} else {
break;
}
obj = *(object_list + i);
i915_gem_object_set_to_gpu_domain(obj, obj->pending_read_domains, obj->pending_write_domain);
i = i + 1;
}
if (dev->invalidate_domains | dev->flush_domains) {
i915_gem_flush(dev, dev->invalidate_domains, dev->flush_domains);
if (dev->flush_domains) {
i915_add_request(dev, dev->flush_domains);
} else {
}
} else {
}
exec_offset = (exec_list + (args->buffer_count - (uint32_t )1))->offset;
ret = i915_dispatch_gem_execbuffer(dev, args, exec_offset);
if (ret) {
printk("<3>[drm:%s] *ERROR* dispatch failed %d\n", "i915_gem_execbuffer", ret);
goto err;
} else {
}
flush_domains = i915_retire_commands(dev);
seqno = i915_add_request(dev, flush_domains);
while (1) {
tmp___2 = ldv__builtin_expect(! (! (seqno == (uint32_t )0)), 0);
if (tmp___2) {
while (1) {
__asm__ volatile ("1:\tud2\n"
".pushsection __bug_table,\"a\"\n"
"2:\t.quad 1b, %c0\n"
"\t.word %c1, 0\n"
"\t.org 2b+%c2\n"
".popsection": : "i" ("/work/ldvuser/novikov/work/current--X--drivers/gpu/drm/i915/i915.ko--X--defaultlinux--X--68_1--X--cpachecker/linux/csd_deg_dscv/36/dscv_tempdir/dscv/ri/68_1/drivers/gpu/drm/i915/i915_gem.c"),
"i" (2590), "i" (sizeof(struct bug_entry )));
while (1) {
}
break;
}
} else {
}
break;
}
i915_file_priv->mm.last_gem_seqno = seqno;
i = 0;
while (1) {
if ((uint32_t )i < args->buffer_count) {
} else {
break;
}
obj___0 = *(object_list + i);
i915_gem_object_move_to_active(obj___0, seqno);
i = i + 1;
}
tmp___3 = copy_to_user((struct drm_i915_relocation_entry *)((uintptr_t )args->buffers_ptr),
exec_list, sizeof(*exec_list) * (unsigned long )args->buffer_count);
ret = tmp___3;
if (ret) {
printk("<3>[drm:%s] *ERROR* failed to copy %d exec entries back to user (%d)\n",
"i915_gem_execbuffer", args->buffer_count, ret);
} else {
}
err:
i = 0;
while (1) {
if (i < pinned) {
} else {
break;
}
i915_gem_object_unpin(*(object_list + i));
i = i + 1;
}
i = 0;
while (1) {
if ((uint32_t )i < args->buffer_count) {
} else {
break;
}
drm_gem_object_unreference(*(object_list + i));
i = i + 1;
}
mutex_unlock(& dev->struct_mutex);
pre_mutex_err:
drm_free(object_list, sizeof(*object_list) * (unsigned long )args->buffer_count,
2);
drm_free(exec_list, sizeof(*exec_list) * (unsigned long )args->buffer_count, 2);
return (ret);
}
}
int i915_gem_object_pin(struct drm_gem_object *obj , uint32_t alignment )
{
struct drm_device *dev ;
struct drm_i915_gem_object *obj_priv ;
int ret ;
int tmp ;
{
dev = obj->dev;
obj_priv = obj->driver_private;
if ((unsigned long )obj_priv->gtt_space == (unsigned long )((void *)0)) {
ret = i915_gem_object_bind_to_gtt(obj, alignment);
if (ret != 0) {
if (ret != -512) {
printk("<3>[drm:%s] *ERROR* Failure to bind: %d", "i915_gem_object_pin", ret);
} else {
}
return (ret);
} else {
}
} else {
}
obj_priv->pin_count = obj_priv->pin_count + 1;
if (obj_priv->pin_count == 1) {
atomic_inc(& dev->pin_count);
atomic_add(obj->size, & dev->pin_memory);
if (! obj_priv->active && (obj->write_domain & (unsigned int )(~ (1 | 64))) == 0U) {
tmp = list_empty(& obj_priv->list);
if (tmp) {
} else {
list_del_init(& obj_priv->list);
}
} else {
}
} else {
}
return (0);
}
}
void i915_gem_object_unpin(struct drm_gem_object *obj )
{
struct drm_device *dev ;
drm_i915_private_t *dev_priv ;
struct drm_i915_gem_object *obj_priv ;
long tmp ;
long tmp___0 ;
{
dev = obj->dev;
dev_priv = dev->dev_private;
obj_priv = obj->driver_private;
obj_priv->pin_count = obj_priv->pin_count - 1;
while (1) {
tmp = ldv__builtin_expect(! (! (obj_priv->pin_count < 0)), 0);
if (tmp) {
while (1) {
__asm__ volatile ("1:\tud2\n"
".pushsection __bug_table,\"a\"\n"
"2:\t.quad 1b, %c0\n"
"\t.word %c1, 0\n"
"\t.org 2b+%c2\n"
".popsection": : "i" ("/work/ldvuser/novikov/work/current--X--drivers/gpu/drm/i915/i915.ko--X--defaultlinux--X--68_1--X--cpachecker/linux/csd_deg_dscv/36/dscv_tempdir/dscv/ri/68_1/drivers/gpu/drm/i915/i915_gem.c"),
"i" (2677), "i" (sizeof(struct bug_entry )));
while (1) {
}
break;
}
} else {
}
break;
}
while (1) {
tmp___0 = ldv__builtin_expect(! (! ((unsigned long )obj_priv->gtt_space == (unsigned long )((void *)0))),
0);
if (tmp___0) {
while (1) {
__asm__ volatile ("1:\tud2\n"
".pushsection __bug_table,\"a\"\n"
"2:\t.quad 1b, %c0\n"
"\t.word %c1, 0\n"
"\t.org 2b+%c2\n"
".popsection": : "i" ("/work/ldvuser/novikov/work/current--X--drivers/gpu/drm/i915/i915.ko--X--defaultlinux--X--68_1--X--cpachecker/linux/csd_deg_dscv/36/dscv_tempdir/dscv/ri/68_1/drivers/gpu/drm/i915/i915_gem.c"),
"i" (2678), "i" (sizeof(struct bug_entry )));
while (1) {
}
break;
}
} else {
}
break;
}
if (obj_priv->pin_count == 0) {
if (! obj_priv->active && (obj->write_domain & (unsigned int )(~ (1 | 64))) == 0U) {
list_move_tail(& obj_priv->list, & dev_priv->mm.inactive_list);
} else {
}
atomic_dec(& dev->pin_count);
atomic_sub(obj->size, & dev->pin_memory);
} else {
}
return;
}
}
int i915_gem_pin_ioctl(struct drm_device *dev , void *data , struct drm_file *file_priv )
{
struct drm_i915_gem_pin *args ;
struct drm_gem_object *obj ;
struct drm_i915_gem_object *obj_priv ;
int ret ;
{
args = data;
mutex_lock_nested(& dev->struct_mutex, 0);
obj = drm_gem_object_lookup(dev, file_priv, args->handle);
if ((unsigned long )obj == (unsigned long )((void *)0)) {
printk("<3>[drm:%s] *ERROR* Bad handle in i915_gem_pin_ioctl(): %d\n", "i915_gem_pin_ioctl",
args->handle);
mutex_unlock(& dev->struct_mutex);
return (-9);
} else {
}
obj_priv = obj->driver_private;
if ((unsigned long )obj_priv->pin_filp != (unsigned long )((void *)0) && (unsigned long )obj_priv->pin_filp != (unsigned long )file_priv) {
printk("<3>[drm:%s] *ERROR* Already pinned in i915_gem_pin_ioctl(): %d\n", "i915_gem_pin_ioctl",
args->handle);
mutex_unlock(& dev->struct_mutex);
return (-22);
} else {
}
obj_priv->user_pin_count = obj_priv->user_pin_count + (uint32_t )1;
obj_priv->pin_filp = file_priv;
if (obj_priv->user_pin_count == (uint32_t )1) {
ret = i915_gem_object_pin(obj, args->alignment);
if (ret != 0) {
drm_gem_object_unreference(obj);
mutex_unlock(& dev->struct_mutex);
return (ret);
} else {
}
} else {
}
i915_gem_object_flush_cpu_write_domain(obj);
args->offset = obj_priv->gtt_offset;
drm_gem_object_unreference(obj);
mutex_unlock(& dev->struct_mutex);
return (0);
}
}
int i915_gem_unpin_ioctl(struct drm_device *dev , void *data , struct drm_file *file_priv )
{
struct drm_i915_gem_pin *args ;
struct drm_gem_object *obj ;
struct drm_i915_gem_object *obj_priv ;
{
args = data;
mutex_lock_nested(& dev->struct_mutex, 0);
obj = drm_gem_object_lookup(dev, file_priv, args->handle);
if ((unsigned long )obj == (unsigned long )((void *)0)) {
printk("<3>[drm:%s] *ERROR* Bad handle in i915_gem_unpin_ioctl(): %d\n", "i915_gem_unpin_ioctl",
args->handle);
mutex_unlock(& dev->struct_mutex);
return (-9);
} else {
}
obj_priv = obj->driver_private;
if ((unsigned long )obj_priv->pin_filp != (unsigned long )file_priv) {
printk("<3>[drm:%s] *ERROR* Not pinned by caller in i915_gem_pin_ioctl(): %d\n",
"i915_gem_unpin_ioctl", args->handle);
drm_gem_object_unreference(obj);
mutex_unlock(& dev->struct_mutex);
return (-22);
} else {
}
obj_priv->user_pin_count = obj_priv->user_pin_count - (uint32_t )1;
if (obj_priv->user_pin_count == (uint32_t )0) {
obj_priv->pin_filp = (void *)0;
i915_gem_object_unpin(obj);
} else {
}
drm_gem_object_unreference(obj);
mutex_unlock(& dev->struct_mutex);
return (0);
}
}
int i915_gem_busy_ioctl(struct drm_device *dev , void *data , struct drm_file *file_priv )
{
struct drm_i915_gem_busy *args ;
struct drm_gem_object *obj ;
struct drm_i915_gem_object *obj_priv ;
{
args = data;
mutex_lock_nested(& dev->struct_mutex, 0);
obj = drm_gem_object_lookup(dev, file_priv, args->handle);
if ((unsigned long )obj == (unsigned long )((void *)0)) {
printk("<3>[drm:%s] *ERROR* Bad handle in i915_gem_busy_ioctl(): %d\n", "i915_gem_busy_ioctl",
args->handle);
mutex_unlock(& dev->struct_mutex);
return (-9);
} else {
}
obj_priv = obj->driver_private;
args->busy = obj_priv->active && obj_priv->last_rendering_seqno != (uint32_t )0;
drm_gem_object_unreference(obj);
mutex_unlock(& dev->struct_mutex);
return (0);
}
}
int i915_gem_throttle_ioctl(struct drm_device *dev , void *data , struct drm_file *file_priv )
{
int tmp ;
{
tmp = i915_gem_ring_throttle(dev, file_priv);
return (tmp);
}
}
int i915_gem_init_object(struct drm_gem_object *obj )
{
struct drm_i915_gem_object *obj_priv ;
void *tmp ;
{
tmp = drm_calloc(1, sizeof(*obj_priv), 2);
obj_priv = tmp;
if ((unsigned long )obj_priv == (unsigned long )((void *)0)) {
return (-12);
} else {
}
obj->write_domain = 1;
obj->read_domains = 1;
obj_priv->agp_type = 1 << 16;
obj->driver_private = obj_priv;
obj_priv->obj = obj;
obj_priv->fence_reg = -1;
INIT_LIST_HEAD(& obj_priv->list);
return (0);
}
}
void i915_gem_free_object(struct drm_gem_object *obj )
{
struct drm_device *dev ;
struct drm_gem_mm *mm ;
struct drm_map_list *list ;
struct drm_map *map ;
struct drm_i915_gem_object *obj_priv ;
{
dev = obj->dev;
mm = dev->mm_private;
obj_priv = obj->driver_private;
while (1) {
if (obj_priv->pin_count > 0) {
} else {
break;
}
i915_gem_object_unpin(obj);
}
i915_gem_object_unbind(obj);
list = & obj->map_list;
drm_ht_remove_item(& mm->offset_hash, & list->hash);
if (list->file_offset_node) {
drm_mm_put_block(list->file_offset_node);
list->file_offset_node = (void *)0;
} else {
}
map = list->map;
if (map) {
drm_free(map, sizeof(*map), 2);
list->map = (void *)0;
} else {
}
drm_free(obj_priv->page_cpu_valid, 1, 2);
drm_free(obj->driver_private, 1, 2);
return;
}
}
static int i915_gem_evict_from_list(struct drm_device *dev , struct list_head *head )
{
struct drm_gem_object *obj ;
struct drm_i915_gem_object *obj_priv ;
int ret ;
struct list_head const *__mptr ;
int tmp ;
{
while (1) {
tmp = list_empty(head);
if (tmp) {
break;
} else {
}
__mptr = head->next;
obj_priv = (struct drm_i915_gem_object *)((char *)__mptr - (unsigned int )(& ((struct drm_i915_gem_object *)0)->list));
obj = obj_priv->obj;
if (obj_priv->pin_count != 0) {
printk("<3>[drm:%s] *ERROR* Pinned object in unbind list\n", "i915_gem_evict_from_list");
mutex_unlock(& dev->struct_mutex);
return (-22);
} else {
}
ret = i915_gem_object_unbind(obj);
if (ret != 0) {
printk("<3>[drm:%s] *ERROR* Error unbinding object in LeaveVT: %d\n", "i915_gem_evict_from_list",
ret);
mutex_unlock(& dev->struct_mutex);
return (ret);
} else {
}
}
return (0);
}
}
static int i915_gem_idle(struct drm_device *dev )
{
drm_i915_private_t *dev_priv ;
uint32_t seqno ;
uint32_t cur_seqno ;
uint32_t last_seqno ;
int stuck ;
int ret ;
int tmp ;
int tmp___0 ;
int __ret_warn_on ;
int tmp___1 ;
int tmp___2 ;
long tmp___3 ;
int __ret_warn_on___0 ;
int tmp___4 ;
int tmp___5 ;
long tmp___6 ;
int __ret_warn_on___1 ;
int tmp___7 ;
int tmp___8 ;
long tmp___9 ;
struct drm_i915_gem_object *obj_priv ;
struct list_head const *__mptr ;
int tmp___10 ;
struct drm_i915_gem_object *obj_priv___0 ;
struct list_head const *__mptr___0 ;
int tmp___11 ;
int __ret_warn_on___2 ;
int tmp___12 ;
int tmp___13 ;
long tmp___14 ;
{
dev_priv = dev->dev_private;
mutex_lock_nested(& dev->struct_mutex, 0);
if (dev_priv->mm.suspended || (unsigned long )dev_priv->ring.ring_obj == (unsigned long )((void *)0)) {
mutex_unlock(& dev->struct_mutex);
return (0);
} else {
}
dev_priv->mm.suspended = 1;
mutex_unlock(& dev->struct_mutex);
cancel_delayed_work_sync(& dev_priv->mm.retire_work);
mutex_lock_nested(& dev->struct_mutex, 0);
i915_kernel_lost_context(dev);
i915_gem_flush(dev, ~ (1 | 64), ~ (1 | 64));
seqno = i915_add_request(dev, ~ 1);
if (seqno == (uint32_t )0) {
mutex_unlock(& dev->struct_mutex);
return (-12);
} else {
}
dev_priv->mm.waiting_gem_seqno = seqno;
last_seqno = 0;
stuck = 0;
while (1) {
cur_seqno = i915_get_gem_seqno(dev);
tmp = i915_seqno_passed(cur_seqno, seqno);
if (tmp) {
break;
} else {
}
if (last_seqno == cur_seqno) {
tmp___0 = stuck;
stuck = stuck + 1;
if (tmp___0 > 100) {
printk("<3>[drm:%s] *ERROR* hardware wedged\n", "i915_gem_idle");
dev_priv->mm.wedged = 1;
__wake_up(& dev_priv->irq_queue, 1, 1, (void *)0);
break;
} else {
}
} else {
}
msleep(10);
last_seqno = cur_seqno;
}
dev_priv->mm.waiting_gem_seqno = 0;
i915_gem_retire_requests(dev);
if (! dev_priv->mm.wedged) {
tmp___1 = list_empty(& dev_priv->mm.active_list);
if (tmp___1) {
tmp___2 = 0;
} else {
tmp___2 = 1;
}
__ret_warn_on = tmp___2;
tmp___3 = ldv__builtin_expect(! (! __ret_warn_on), 0);
if (tmp___3) {
warn_on_slowpath("/work/ldvuser/novikov/work/current--X--drivers/gpu/drm/i915/i915.ko--X--defaultlinux--X--68_1--X--cpachecker/linux/csd_deg_dscv/36/dscv_tempdir/dscv/ri/68_1/drivers/gpu/drm/i915/i915_gem.c",
2976);
} else {
}
ldv__builtin_expect(! (! __ret_warn_on), 0);
tmp___4 = list_empty(& dev_priv->mm.flushing_list);
if (tmp___4) {
tmp___5 = 0;
} else {
tmp___5 = 1;
}
__ret_warn_on___0 = tmp___5;
tmp___6 = ldv__builtin_expect(! (! __ret_warn_on___0), 0);
if (tmp___6) {
warn_on_slowpath("/work/ldvuser/novikov/work/current--X--drivers/gpu/drm/i915/i915.ko--X--defaultlinux--X--68_1--X--cpachecker/linux/csd_deg_dscv/36/dscv_tempdir/dscv/ri/68_1/drivers/gpu/drm/i915/i915_gem.c",
2977);
} else {
}
ldv__builtin_expect(! (! __ret_warn_on___0), 0);
tmp___7 = list_empty(& dev_priv->mm.request_list);
if (tmp___7) {
tmp___8 = 0;
} else {
tmp___8 = 1;
}
__ret_warn_on___1 = tmp___8;
tmp___9 = ldv__builtin_expect(! (! __ret_warn_on___1), 0);
if (tmp___9) {
warn_on_slowpath("/work/ldvuser/novikov/work/current--X--drivers/gpu/drm/i915/i915.ko--X--defaultlinux--X--68_1--X--cpachecker/linux/csd_deg_dscv/36/dscv_tempdir/dscv/ri/68_1/drivers/gpu/drm/i915/i915_gem.c",
2981);
} else {
}
ldv__builtin_expect(! (! __ret_warn_on___1), 0);
} else {
}
while (1) {
tmp___10 = list_empty(& dev_priv->mm.active_list);
if (tmp___10) {
break;
} else {
}
__mptr = dev_priv->mm.active_list.next;
obj_priv = (struct drm_i915_gem_object *)((char *)__mptr - (unsigned int )(& ((struct drm_i915_gem_object *)0)->list));
(obj_priv->obj)->write_domain = (obj_priv->obj)->write_domain & (unsigned int )(~ (~ (1 | 64)));
i915_gem_object_move_to_inactive(obj_priv->obj);
}
while (1) {
tmp___11 = list_empty(& dev_priv->mm.flushing_list);
if (tmp___11) {
break;
} else {
}
__mptr___0 = dev_priv->mm.flushing_list.next;
obj_priv___0 = (struct drm_i915_gem_object *)((char *)__mptr___0 - (unsigned int )(& ((struct drm_i915_gem_object *)0)->list));
(obj_priv___0->obj)->write_domain = (obj_priv___0->obj)->write_domain & (unsigned int )(~ (~ (1 | 64)));
i915_gem_object_move_to_inactive(obj_priv___0->obj);
}
ret = i915_gem_evict_from_list(dev, & dev_priv->mm.inactive_list);
tmp___12 = list_empty(& dev_priv->mm.inactive_list);
if (tmp___12) {
tmp___13 = 0;
} else {
tmp___13 = 1;
}
__ret_warn_on___2 = tmp___13;
tmp___14 = ldv__builtin_expect(! (! __ret_warn_on___2), 0);
if (tmp___14) {
warn_on_slowpath("/work/ldvuser/novikov/work/current--X--drivers/gpu/drm/i915/i915.ko--X--defaultlinux--X--68_1--X--cpachecker/linux/csd_deg_dscv/36/dscv_tempdir/dscv/ri/68_1/drivers/gpu/drm/i915/i915_gem.c",
3012);
} else {
}
ldv__builtin_expect(! (! __ret_warn_on___2), 0);
if (ret) {
mutex_unlock(& dev->struct_mutex);
return (ret);
} else {
}
i915_gem_cleanup_ringbuffer(dev);
mutex_unlock(& dev->struct_mutex);
return (0);
}
}
static int i915_gem_init_hws(struct drm_device *dev )
{
drm_i915_private_t *dev_priv ;
struct drm_gem_object *obj ;
struct drm_i915_gem_object *obj_priv ;
int ret ;
{
dev_priv = dev->dev_private;
if (! ((((dev->pci_device == 10690 || dev->pci_device == 10674) || dev->pci_device == 10706) || dev->pci_device == 10818) || (((dev->pci_device == 11778 || dev->pci_device == 11794) || dev->pci_device == 11810) || dev->pci_device == 10818))) {
return (0);
} else {
}
obj = drm_gem_object_alloc(dev, 4096);
if ((unsigned long )obj == (unsigned long )((void *)0)) {
printk("<3>[drm:%s] *ERROR* Failed to allocate status page\n", "i915_gem_init_hws");
return (-12);
} else {
}
obj_priv = obj->driver_private;
obj_priv->agp_type = (1 << 16) + 1;
ret = i915_gem_object_pin(obj, 4096);
if (ret != 0) {
drm_gem_object_unreference(obj);
return (ret);
} else {
}
dev_priv->status_gfx_addr = obj_priv->gtt_offset;
dev_priv->hw_status_page = kmap(*(obj_priv->page_list + 0));
if ((unsigned long )dev_priv->hw_status_page == (unsigned long )((void *)0)) {
printk("<3>[drm:%s] *ERROR* Failed to map status page.\n", "i915_gem_init_hws");
memset(& dev_priv->hws_map, 0, sizeof(dev_priv->hws_map));
drm_gem_object_unreference(obj);
return (-22);
} else {
}
dev_priv->hws_obj = obj;
memset(dev_priv->hw_status_page, 0, 1UL << 12);
writel(dev_priv->status_gfx_addr, dev_priv->regs + 8320);
readl(dev_priv->regs + 8320);
while (1) {
if (drm_debug) {
printk("<7>[drm:%s] hws offset: 0x%08x\n", "i915_gem_init_hws", dev_priv->status_gfx_addr);
} else {
}
break;
}
return (0);
}
}
int i915_gem_init_ringbuffer(struct drm_device *dev )
{
drm_i915_private_t *dev_priv ;
struct drm_gem_object *obj ;
struct drm_i915_gem_object *obj_priv ;
drm_i915_ring_buffer_t *ring ;
int ret ;
u32 head ;
unsigned int tmp ;
unsigned int tmp___0 ;
unsigned int tmp___1 ;
unsigned int tmp___2 ;
unsigned int tmp___3 ;
unsigned int tmp___4 ;
unsigned int tmp___5 ;
unsigned int tmp___6 ;
unsigned int tmp___7 ;
unsigned int tmp___8 ;
unsigned int tmp___9 ;
unsigned int tmp___10 ;
unsigned int tmp___11 ;
unsigned int tmp___12 ;
unsigned int tmp___13 ;
unsigned int tmp___14 ;
int tmp___15 ;
{
dev_priv = dev->dev_private;
ring = & dev_priv->ring;
ret = i915_gem_init_hws(dev);
if (ret != 0) {
return (ret);
} else {
}
obj = drm_gem_object_alloc(dev, 128 * 1024);
if ((unsigned long )obj == (unsigned long )((void *)0)) {
printk("<3>[drm:%s] *ERROR* Failed to allocate ringbuffer\n", "i915_gem_init_ringbuffer");
return (-12);
} else {
}
obj_priv = obj->driver_private;
ret = i915_gem_object_pin(obj, 4096);
if (ret != 0) {
drm_gem_object_unreference(obj);
return (ret);
} else {
}
ring->Size = obj->size;
ring->tail_mask = obj->size - (size_t )1;
ring->map.offset = (dev->agp)->base + (unsigned long )obj_priv->gtt_offset;
ring->map.size = obj->size;
ring->map.type = 0;
ring->map.flags = 0;
ring->map.mtrr = 0;
drm_core_ioremap_wc(& ring->map, dev);
if ((unsigned long )ring->map.handle == (unsigned long )((void *)0)) {
printk("<3>[drm:%s] *ERROR* Failed to map ringbuffer.\n", "i915_gem_init_ringbuffer");
memset(& dev_priv->ring, 0, sizeof(dev_priv->ring));
drm_gem_object_unreference(obj);
return (-22);
} else {
}
ring->ring_obj = obj;
ring->virtual_start = ring->map.handle;
writel(0, dev_priv->regs + 8252);
writel(0, dev_priv->regs + 8240);
writel(0, dev_priv->regs + 8244);
writel(obj_priv->gtt_offset, dev_priv->regs + 8248);
tmp = readl(dev_priv->regs + 8244);
head = tmp & 2097148U;
if (head != (u32 )0) {
tmp___0 = readl(dev_priv->regs + 8248);
tmp___1 = readl(dev_priv->regs + 8240);
tmp___2 = readl(dev_priv->regs + 8244);
tmp___3 = readl(dev_priv->regs + 8252);
printk("<3>[drm:%s] *ERROR* Ring head not reset to zero ctl %08x head %08x tail %08x start %08x\n",
"i915_gem_init_ringbuffer", tmp___3, tmp___2, tmp___1, tmp___0);
writel(0, dev_priv->regs + 8244);
tmp___4 = readl(dev_priv->regs + 8248);
tmp___5 = readl(dev_priv->regs + 8240);
tmp___6 = readl(dev_priv->regs + 8244);
tmp___7 = readl(dev_priv->regs + 8252);
printk("<3>[drm:%s] *ERROR* Ring head forced to zero ctl %08x head %08x tail %08x start %08x\n",
"i915_gem_init_ringbuffer", tmp___7, tmp___6, tmp___5, tmp___4);
} else {
}
writel((((obj->size - (size_t )4096) & 2093056UL) | 0UL) | 1UL, dev_priv->regs + 8252);
tmp___8 = readl(dev_priv->regs + 8244);
head = tmp___8 & 2097148U;
if (head != (u32 )0) {
tmp___9 = readl(dev_priv->regs + 8248);
tmp___10 = readl(dev_priv->regs + 8240);
tmp___11 = readl(dev_priv->regs + 8244);
tmp___12 = readl(dev_priv->regs + 8252);
printk("<3>[drm:%s] *ERROR* Ring initialization failed ctl %08x head %08x tail %08x start %08x\n",
"i915_gem_init_ringbuffer", tmp___12, tmp___11, tmp___10, tmp___9);
return (-5);
} else {
}
tmp___15 = drm_core_check_feature(dev, 8192);
if (tmp___15) {
tmp___13 = readl(dev_priv->regs + 8244);
ring->head = tmp___13 & 2097148U;
tmp___14 = readl(dev_priv->regs + 8240);
ring->tail = tmp___14 & 2097144U;
ring->space = ring->head - (ring->tail + 8);
if (ring->space < 0) {
ring->space = (unsigned long )ring->space + ring->Size;
} else {
}
} else {
i915_kernel_lost_context(dev);
}
return (0);
}
}
void i915_gem_cleanup_ringbuffer(struct drm_device *dev )
{
drm_i915_private_t *dev_priv ;
struct drm_gem_object *obj ;
struct drm_i915_gem_object *obj_priv ;
{
dev_priv = dev->dev_private;
if ((unsigned long )dev_priv->ring.ring_obj == (unsigned long )((void *)0)) {
return;
} else {
}
drm_core_ioremapfree(& dev_priv->ring.map, dev);
i915_gem_object_unpin(dev_priv->ring.ring_obj);
drm_gem_object_unreference(dev_priv->ring.ring_obj);
dev_priv->ring.ring_obj = (void *)0;
memset(& dev_priv->ring, 0, sizeof(dev_priv->ring));
if ((unsigned long )dev_priv->hws_obj != (unsigned long )((void *)0)) {
obj = dev_priv->hws_obj;
obj_priv = obj->driver_private;
while (1) {
break;
}
i915_gem_object_unpin(obj);
drm_gem_object_unreference(obj);
dev_priv->hws_obj = (void *)0;
memset(& dev_priv->hws_map, 0, sizeof(dev_priv->hws_map));
dev_priv->hw_status_page = (void *)0;
writel(536866816, dev_priv->regs + 8320);
} else {
}
return;
}
}
int i915_gem_entervt_ioctl(struct drm_device *dev , void *data , struct drm_file *file_priv )
{
drm_i915_private_t *dev_priv ;
int ret ;
int tmp ;
int tmp___0 ;
int tmp___1 ;
long tmp___2 ;
int tmp___3 ;
int tmp___4 ;
long tmp___5 ;
int tmp___6 ;
int tmp___7 ;
long tmp___8 ;
int tmp___9 ;
int tmp___10 ;
long tmp___11 ;
{
dev_priv = dev->dev_private;
tmp = drm_core_check_feature(dev, 8192);
if (tmp) {
return (0);
} else {
}
if (dev_priv->mm.wedged) {
printk("<3>[drm:%s] *ERROR* Reenabling wedged hardware, good luck\n", "i915_gem_entervt_ioctl");
dev_priv->mm.wedged = 0;
} else {
}
ret = i915_gem_init_ringbuffer(dev);
if (ret != 0) {
return (ret);
} else {
}
dev_priv->mm.gtt_mapping = io_mapping_create_wc((dev->agp)->base, ((dev->agp)->agp_info.aper_size * (size_t )1024) * (size_t )1024);
mutex_lock_nested(& dev->struct_mutex, 0);
while (1) {
tmp___0 = list_empty(& dev_priv->mm.active_list);
if (tmp___0) {
tmp___1 = 0;
} else {
tmp___1 = 1;
}
tmp___2 = ldv__builtin_expect(tmp___1, 0);
if (tmp___2) {
while (1) {
__asm__ volatile ("1:\tud2\n"
".pushsection __bug_table,\"a\"\n"
"2:\t.quad 1b, %c0\n"
"\t.word %c1, 0\n"
"\t.org 2b+%c2\n"
".popsection": : "i" ("/work/ldvuser/novikov/work/current--X--drivers/gpu/drm/i915/i915.ko--X--defaultlinux--X--68_1--X--cpachecker/linux/csd_deg_dscv/36/dscv_tempdir/dscv/ri/68_1/drivers/gpu/drm/i915/i915_gem.c"),
"i" (3231), "i" (sizeof(struct bug_entry )));
while (1) {
}
break;
}
} else {
}
break;
}
while (1) {
tmp___3 = list_empty(& dev_priv->mm.flushing_list);
if (tmp___3) {
tmp___4 = 0;
} else {
tmp___4 = 1;
}
tmp___5 = ldv__builtin_expect(tmp___4, 0);
if (tmp___5) {
while (1) {
__asm__ volatile ("1:\tud2\n"
".pushsection __bug_table,\"a\"\n"
"2:\t.quad 1b, %c0\n"
"\t.word %c1, 0\n"
"\t.org 2b+%c2\n"
".popsection": : "i" ("/work/ldvuser/novikov/work/current--X--drivers/gpu/drm/i915/i915.ko--X--defaultlinux--X--68_1--X--cpachecker/linux/csd_deg_dscv/36/dscv_tempdir/dscv/ri/68_1/drivers/gpu/drm/i915/i915_gem.c"),
"i" (3232), "i" (sizeof(struct bug_entry )));
while (1) {
}
break;
}
} else {
}
break;
}
while (1) {
tmp___6 = list_empty(& dev_priv->mm.inactive_list);
if (tmp___6) {
tmp___7 = 0;
} else {
tmp___7 = 1;
}
tmp___8 = ldv__builtin_expect(tmp___7, 0);
if (tmp___8) {
while (1) {
__asm__ volatile ("1:\tud2\n"
".pushsection __bug_table,\"a\"\n"
"2:\t.quad 1b, %c0\n"
"\t.word %c1, 0\n"
"\t.org 2b+%c2\n"
".popsection": : "i" ("/work/ldvuser/novikov/work/current--X--drivers/gpu/drm/i915/i915.ko--X--defaultlinux--X--68_1--X--cpachecker/linux/csd_deg_dscv/36/dscv_tempdir/dscv/ri/68_1/drivers/gpu/drm/i915/i915_gem.c"),
"i" (3233), "i" (sizeof(struct bug_entry )));
while (1) {
}
break;
}
} else {
}
break;
}
while (1) {
tmp___9 = list_empty(& dev_priv->mm.request_list);
if (tmp___9) {
tmp___10 = 0;
} else {
tmp___10 = 1;
}
tmp___11 = ldv__builtin_expect(tmp___10, 0);
if (tmp___11) {
while (1) {
__asm__ volatile ("1:\tud2\n"
".pushsection __bug_table,\"a\"\n"
"2:\t.quad 1b, %c0\n"
"\t.word %c1, 0\n"
"\t.org 2b+%c2\n"
".popsection": : "i" ("/work/ldvuser/novikov/work/current--X--drivers/gpu/drm/i915/i915.ko--X--defaultlinux--X--68_1--X--cpachecker/linux/csd_deg_dscv/36/dscv_tempdir/dscv/ri/68_1/drivers/gpu/drm/i915/i915_gem.c"),
"i" (3234), "i" (sizeof(struct bug_entry )));
while (1) {
}
break;
}
} else {
}
break;
}
dev_priv->mm.suspended = 0;
mutex_unlock(& dev->struct_mutex);
drm_irq_install(dev);
return (0);
}
}
int i915_gem_leavevt_ioctl(struct drm_device *dev , void *data , struct drm_file *file_priv )
{
drm_i915_private_t *dev_priv ;
int ret ;
int tmp ;
{
dev_priv = dev->dev_private;
tmp = drm_core_check_feature(dev, 8192);
if (tmp) {
return (0);
} else {
}
ret = i915_gem_idle(dev);
drm_irq_uninstall(dev);
io_mapping_free(dev_priv->mm.gtt_mapping);
return (ret);
}
}
void i915_gem_lastclose(struct drm_device *dev )
{
int ret ;
{
ret = i915_gem_idle(dev);
if (ret) {
printk("<3>[drm:%s] *ERROR* failed to idle hardware: %d\n", "i915_gem_lastclose",
ret);
} else {
}
return;
}
}
static struct lock_class_key __key___2 ;
void i915_gem_load(struct drm_device *dev )
{
drm_i915_private_t *dev_priv ;
atomic_long_t __constr_expr_0 ;
{
dev_priv = dev->dev_private;
INIT_LIST_HEAD(& dev_priv->mm.active_list);
INIT_LIST_HEAD(& dev_priv->mm.flushing_list);
INIT_LIST_HEAD(& dev_priv->mm.inactive_list);
INIT_LIST_HEAD(& dev_priv->mm.request_list);
while (1) {
while (1) {
__constr_expr_0.counter = 0;
dev_priv->mm.retire_work.work.data = __constr_expr_0;
lockdep_init_map(& dev_priv->mm.retire_work.work.lockdep_map, "&(&dev_priv->mm.retire_work)->work",
& __key___2, 0);
INIT_LIST_HEAD(& dev_priv->mm.retire_work.work.entry);
while (1) {
dev_priv->mm.retire_work.work.func = & i915_gem_retire_work_handler;
break;
}
break;
}
init_timer(& dev_priv->mm.retire_work.timer);
break;
}
dev_priv->mm.next_gem_seqno = 1;
dev_priv->fence_reg_start = 3;
if (((((((((dev->pci_device == 10610 || dev->pci_device == 10626) || dev->pci_device == 10642) || dev->pci_device == 10658) || dev->pci_device == 10754) || dev->pci_device == 10770) || dev->pci_device == 10818) || dev->pci_device == 11778) || dev->pci_device == 11794) || dev->pci_device == 11810) {
dev_priv->num_fence_regs = 16;
} else {
dev_priv->num_fence_regs = 8;
}
i915_gem_detect_bit_6_swizzle(dev);
return;
}
}
void __builtin_prefetch(void const * , ...) ;
extern int ( /* format attribute */ sprintf)(char *buf , char const *fmt , ...) ;
extern struct proc_dir_entry *create_proc_entry(char const *name , mode_t mode ,
struct proc_dir_entry *parent ) ;
extern void remove_proc_entry(char const *name , struct proc_dir_entry *parent ) ;
static int i915_gem_active_info(char *buf , char **start , off_t offset , int request ,
int *eof , void *data )
{
struct drm_minor *minor ;
struct drm_device *dev ;
drm_i915_private_t *dev_priv ;
struct drm_i915_gem_object *obj_priv ;
int len ;
int tmp ;
struct list_head const *__mptr ;
struct list_head const *__mptr___0 ;
struct drm_gem_object *obj ;
int tmp___0 ;
int tmp___1 ;
{
minor = (struct drm_minor *)data;
dev = minor->dev;
dev_priv = dev->dev_private;
len = 0;
if ((unsigned long )offset > (1UL << 12) - 80UL) {
*eof = 1;
return (0);
} else {
}
*start = buf + offset;
*eof = 0;
tmp = sprintf(buf + len, "Active:\n");
len = len + tmp;
if ((unsigned long )len > (1UL << 12) - 80UL) {
*eof = 1;
return ((off_t )len - offset);
} else {
}
__mptr = dev_priv->mm.active_list.next;
obj_priv = (struct drm_i915_gem_object *)((char *)__mptr - (unsigned int )(& ((struct drm_i915_gem_object *)0)->list));
while (1) {
__builtin_prefetch(obj_priv->list.next);
if ((unsigned long )(& obj_priv->list) != (unsigned long )(& dev_priv->mm.active_list)) {
} else {
break;
}
obj = obj_priv->obj;
if (obj->name) {
tmp___0 = sprintf(buf + len, " %p(%d): %08x %08x %d\n", obj, obj->name, obj->read_domains,
obj->write_domain, obj_priv->last_rendering_seqno);
len = len + tmp___0;
if ((unsigned long )len > (1UL << 12) - 80UL) {
*eof = 1;
return ((off_t )len - offset);
} else {
}
} else {
tmp___1 = sprintf(buf + len, " %p: %08x %08x %d\n", obj, obj->read_domains,
obj->write_domain, obj_priv->last_rendering_seqno);
len = len + tmp___1;
if ((unsigned long )len > (1UL << 12) - 80UL) {
*eof = 1;
return ((off_t )len - offset);
} else {
}
}
__mptr___0 = obj_priv->list.next;
obj_priv = (struct drm_i915_gem_object *)((char *)__mptr___0 - (unsigned int )(& ((struct drm_i915_gem_object *)0)->list));
}
if ((off_t )len > (off_t )request + offset) {
return (request);
} else {
}
*eof = 1;
return ((off_t )len - offset);
}
}
static int i915_gem_flushing_info(char *buf , char **start , off_t offset , int request ,
int *eof , void *data )
{
struct drm_minor *minor ;
struct drm_device *dev ;
drm_i915_private_t *dev_priv ;
struct drm_i915_gem_object *obj_priv ;
int len ;
int tmp ;
struct list_head const *__mptr ;
struct list_head const *__mptr___0 ;
struct drm_gem_object *obj ;
int tmp___0 ;
int tmp___1 ;
{
minor = (struct drm_minor *)data;
dev = minor->dev;
dev_priv = dev->dev_private;
len = 0;
if ((unsigned long )offset > (1UL << 12) - 80UL) {
*eof = 1;
return (0);
} else {
}
*start = buf + offset;
*eof = 0;
tmp = sprintf(buf + len, "Flushing:\n");
len = len + tmp;
if ((unsigned long )len > (1UL << 12) - 80UL) {
*eof = 1;
return ((off_t )len - offset);
} else {
}
__mptr = dev_priv->mm.flushing_list.next;
obj_priv = (struct drm_i915_gem_object *)((char *)__mptr - (unsigned int )(& ((struct drm_i915_gem_object *)0)->list));
while (1) {
__builtin_prefetch(obj_priv->list.next);
if ((unsigned long )(& obj_priv->list) != (unsigned long )(& dev_priv->mm.flushing_list)) {
} else {
break;
}
obj = obj_priv->obj;
if (obj->name) {
tmp___0 = sprintf(buf + len, " %p(%d): %08x %08x %d\n", obj, obj->name, obj->read_domains,
obj->write_domain, obj_priv->last_rendering_seqno);
len = len + tmp___0;
if ((unsigned long )len > (1UL << 12) - 80UL) {
*eof = 1;
return ((off_t )len - offset);
} else {
}
} else {
tmp___1 = sprintf(buf + len, " %p: %08x %08x %d\n", obj, obj->read_domains,
obj->write_domain, obj_priv->last_rendering_seqno);
len = len + tmp___1;
if ((unsigned long )len > (1UL << 12) - 80UL) {
*eof = 1;
return ((off_t )len - offset);
} else {
}
}
__mptr___0 = obj_priv->list.next;
obj_priv = (struct drm_i915_gem_object *)((char *)__mptr___0 - (unsigned int )(& ((struct drm_i915_gem_object *)0)->list));
}
if ((off_t )len > (off_t )request + offset) {
return (request);
} else {
}
*eof = 1;
return ((off_t )len - offset);
}
}
static int i915_gem_inactive_info(char *buf , char **start , off_t offset , int request ,
int *eof , void *data )
{
struct drm_minor *minor ;
struct drm_device *dev ;
drm_i915_private_t *dev_priv ;
struct drm_i915_gem_object *obj_priv ;
int len ;
int tmp ;
struct list_head const *__mptr ;
struct list_head const *__mptr___0 ;
struct drm_gem_object *obj ;
int tmp___0 ;
int tmp___1 ;
{
minor = (struct drm_minor *)data;
dev = minor->dev;
dev_priv = dev->dev_private;
len = 0;
if ((unsigned long )offset > (1UL << 12) - 80UL) {
*eof = 1;
return (0);
} else {
}
*start = buf + offset;
*eof = 0;
tmp = sprintf(buf + len, "Inactive:\n");
len = len + tmp;
if ((unsigned long )len > (1UL << 12) - 80UL) {
*eof = 1;
return ((off_t )len - offset);
} else {
}
__mptr = dev_priv->mm.inactive_list.next;
obj_priv = (struct drm_i915_gem_object *)((char *)__mptr - (unsigned int )(& ((struct drm_i915_gem_object *)0)->list));
while (1) {
__builtin_prefetch(obj_priv->list.next);
if ((unsigned long )(& obj_priv->list) != (unsigned long )(& dev_priv->mm.inactive_list)) {
} else {
break;
}
obj = obj_priv->obj;
if (obj->name) {
tmp___0 = sprintf(buf + len, " %p(%d): %08x %08x %d\n", obj, obj->name, obj->read_domains,
obj->write_domain, obj_priv->last_rendering_seqno);
len = len + tmp___0;
if ((unsigned long )len > (1UL << 12) - 80UL) {
*eof = 1;
return ((off_t )len - offset);
} else {
}
} else {
tmp___1 = sprintf(buf + len, " %p: %08x %08x %d\n", obj, obj->read_domains,
obj->write_domain, obj_priv->last_rendering_seqno);
len = len + tmp___1;
if ((unsigned long )len > (1UL << 12) - 80UL) {
*eof = 1;
return ((off_t )len - offset);
} else {
}
}
__mptr___0 = obj_priv->list.next;
obj_priv = (struct drm_i915_gem_object *)((char *)__mptr___0 - (unsigned int )(& ((struct drm_i915_gem_object *)0)->list));
}
if ((off_t )len > (off_t )request + offset) {
return (request);
} else {
}
*eof = 1;
return ((off_t )len - offset);
}
}
static int i915_gem_request_info(char *buf , char **start , off_t offset , int request ,
int *eof , void *data )
{
struct drm_minor *minor ;
struct drm_device *dev ;
drm_i915_private_t *dev_priv ;
struct drm_i915_gem_request *gem_request ;
int len ;
int tmp ;
struct list_head const *__mptr ;
struct list_head const *__mptr___0 ;
int tmp___0 ;
{
minor = (struct drm_minor *)data;
dev = minor->dev;
dev_priv = dev->dev_private;
len = 0;
if ((unsigned long )offset > (1UL << 12) - 80UL) {
*eof = 1;
return (0);
} else {
}
*start = buf + offset;
*eof = 0;
tmp = sprintf(buf + len, "Request:\n");
len = len + tmp;
if ((unsigned long )len > (1UL << 12) - 80UL) {
*eof = 1;
return ((off_t )len - offset);
} else {
}
__mptr = dev_priv->mm.request_list.next;
gem_request = (struct drm_i915_gem_request *)((char *)__mptr - (unsigned int )(& ((struct drm_i915_gem_request *)0)->list));
while (1) {
__builtin_prefetch(gem_request->list.next);
if ((unsigned long )(& gem_request->list) != (unsigned long )(& dev_priv->mm.request_list)) {
} else {
break;
}
tmp___0 = sprintf(buf + len, " %d @ %d\n", gem_request->seqno, (int )(jiffies - (unsigned long volatile )gem_request->emitted_jiffies));
len = len + tmp___0;
if ((unsigned long )len > (1UL << 12) - 80UL) {
*eof = 1;
return ((off_t )len - offset);
} else {
}
__mptr___0 = gem_request->list.next;
gem_request = (struct drm_i915_gem_request *)((char *)__mptr___0 - (unsigned int )(& ((struct drm_i915_gem_request *)0)->list));
}
if ((off_t )len > (off_t )request + offset) {
return (request);
} else {
}
*eof = 1;
return ((off_t )len - offset);
}
}
static int i915_gem_seqno_info(char *buf , char **start , off_t offset , int request ,
int *eof , void *data )
{
struct drm_minor *minor ;
struct drm_device *dev ;
drm_i915_private_t *dev_priv ;
int len ;
uint32_t tmp ;
int tmp___0 ;
int tmp___1 ;
int tmp___2 ;
int tmp___3 ;
{
minor = (struct drm_minor *)data;
dev = minor->dev;
dev_priv = dev->dev_private;
len = 0;
if ((unsigned long )offset > (1UL << 12) - 80UL) {
*eof = 1;
return (0);
} else {
}
*start = buf + offset;
*eof = 0;
if ((unsigned long )dev_priv->hw_status_page != (unsigned long )((void *)0)) {
tmp = i915_get_gem_seqno(dev);
tmp___0 = sprintf(buf + len, "Current sequence: %d\n", tmp);
len = len + tmp___0;
if ((unsigned long )len > (1UL << 12) - 80UL) {
*eof = 1;
return ((off_t )len - offset);
} else {
}
} else {
tmp___1 = sprintf(buf + len, "Current sequence: hws uninitialized\n");
len = len + tmp___1;
if ((unsigned long )len > (1UL << 12) - 80UL) {
*eof = 1;
return ((off_t )len - offset);
} else {
}
}
tmp___2 = sprintf(buf + len, "Waiter sequence: %d\n", dev_priv->mm.waiting_gem_seqno);
len = len + tmp___2;
if ((unsigned long )len > (1UL << 12) - 80UL) {
*eof = 1;
return ((off_t )len - offset);
} else {
}
tmp___3 = sprintf(buf + len, "IRQ sequence: %d\n", dev_priv->mm.irq_gem_seqno);
len = len + tmp___3;
if ((unsigned long )len > (1UL << 12) - 80UL) {
*eof = 1;
return ((off_t )len - offset);
} else {
}
if ((off_t )len > (off_t )request + offset) {
return (request);
} else {
}
*eof = 1;
return ((off_t )len - offset);
}
}
static int i915_interrupt_info(char *buf , char **start , off_t offset , int request ,
int *eof , void *data )
{
struct drm_minor *minor ;
struct drm_device *dev ;
drm_i915_private_t *dev_priv ;
int len ;
unsigned int tmp ;
int tmp___0 ;
unsigned int tmp___1 ;
int tmp___2 ;
unsigned int tmp___3 ;
int tmp___4 ;
unsigned int tmp___5 ;
int tmp___6 ;
unsigned int tmp___7 ;
int tmp___8 ;
int tmp___9 ;
uint32_t tmp___10 ;
int tmp___11 ;
int tmp___12 ;
int tmp___13 ;
int tmp___14 ;
{
minor = (struct drm_minor *)data;
dev = minor->dev;
dev_priv = dev->dev_private;
len = 0;
if ((unsigned long )offset > (1UL << 12) - 80UL) {
*eof = 1;
return (0);
} else {
}
*start = buf + offset;
*eof = 0;
tmp = readl(dev_priv->regs + 8352);
tmp___0 = sprintf(buf + len, "Interrupt enable: %08x\n", tmp);
len = len + tmp___0;
if ((unsigned long )len > (1UL << 12) - 80UL) {
*eof = 1;
return ((off_t )len - offset);
} else {
}
tmp___1 = readl(dev_priv->regs + 8356);
tmp___2 = sprintf(buf + len, "Interrupt identity: %08x\n", tmp___1);
len = len + tmp___2;
if ((unsigned long )len > (1UL << 12) - 80UL) {
*eof = 1;
return ((off_t )len - offset);
} else {
}
tmp___3 = readl(dev_priv->regs + 8360);
tmp___4 = sprintf(buf + len, "Interrupt mask: %08x\n", tmp___3);
len = len + tmp___4;
if ((unsigned long )len > (1UL << 12) - 80UL) {
*eof = 1;
return ((off_t )len - offset);
} else {
}
tmp___5 = readl(dev_priv->regs + 458788);
tmp___6 = sprintf(buf + len, "Pipe A stat: %08x\n", tmp___5);
len = len + tmp___6;
if ((unsigned long )len > (1UL << 12) - 80UL) {
*eof = 1;
return ((off_t )len - offset);
} else {
}
tmp___7 = readl(dev_priv->regs + 462884);
tmp___8 = sprintf(buf + len, "Pipe B stat: %08x\n", tmp___7);
len = len + tmp___8;
if ((unsigned long )len > (1UL << 12) - 80UL) {
*eof = 1;
return ((off_t )len - offset);
} else {
}
tmp___9 = sprintf(buf + len, "Interrupts received: %d\n", dev_priv->irq_received.counter);
len = len + tmp___9;
if ((unsigned long )len > (1UL << 12) - 80UL) {
*eof = 1;
return ((off_t )len - offset);
} else {
}
if ((unsigned long )dev_priv->hw_status_page != (unsigned long )((void *)0)) {
tmp___10 = i915_get_gem_seqno(dev);
tmp___11 = sprintf(buf + len, "Current sequence: %d\n", tmp___10);
len = len + tmp___11;
if ((unsigned long )len > (1UL << 12) - 80UL) {
*eof = 1;
return ((off_t )len - offset);
} else {
}
} else {
tmp___12 = sprintf(buf + len, "Current sequence: hws uninitialized\n");
len = len + tmp___12;
if ((unsigned long )len > (1UL << 12) - 80UL) {
*eof = 1;
return ((off_t )len - offset);
} else {
}
}
tmp___13 = sprintf(buf + len, "Waiter sequence: %d\n", dev_priv->mm.waiting_gem_seqno);
len = len + tmp___13;
if ((unsigned long )len > (1UL << 12) - 80UL) {
*eof = 1;
return ((off_t )len - offset);
} else {
}
tmp___14 = sprintf(buf + len, "IRQ sequence: %d\n", dev_priv->mm.irq_gem_seqno);
len = len + tmp___14;
if ((unsigned long )len > (1UL << 12) - 80UL) {
*eof = 1;
return ((off_t )len - offset);
} else {
}
if ((off_t )len > (off_t )request + offset) {
return (request);
} else {
}
*eof = 1;
return ((off_t )len - offset);
}
}
static int i915_hws_info(char *buf , char **start , off_t offset , int request , int *eof ,
void *data )
{
struct drm_minor *minor ;
struct drm_device *dev ;
drm_i915_private_t *dev_priv ;
int len ;
int i ;
u32 volatile *hws ;
int tmp ;
{
minor = (struct drm_minor *)data;
dev = minor->dev;
dev_priv = dev->dev_private;
len = 0;
if ((unsigned long )offset > (1UL << 12) - 80UL) {
*eof = 1;
return (0);
} else {
}
hws = (u32 volatile *)dev_priv->hw_status_page;
if ((unsigned long )hws == (unsigned long )((void *)0)) {
*eof = 1;
return (0);
} else {
}
*start = buf + offset;
*eof = 0;
i = 0;
while (1) {
if ((unsigned long )i < (4096UL / sizeof(u32 )) / 4UL) {
} else {
break;
}
tmp = sprintf(buf + len, "0x%08x: 0x%08x 0x%08x 0x%08x 0x%08x\n", i * 4, *(hws + i),
*(hws + (i + 1)), *(hws + (i + 2)), *(hws + (i + 3)));
len = len + tmp;
if ((unsigned long )len > (1UL << 12) - 80UL) {
*eof = 1;
return ((off_t )len - offset);
} else {
}
i = i + 4;
}
if ((off_t )len > (off_t )request + offset) {
return (request);
} else {
}
*eof = 1;
return ((off_t )len - offset);
}
}
static struct drm_proc_list i915_gem_proc_list[7] = { {"i915_gem_active", & i915_gem_active_info},
{"i915_gem_flushing", & i915_gem_flushing_info},
{"i915_gem_inactive", & i915_gem_inactive_info},
{"i915_gem_request", & i915_gem_request_info},
{"i915_gem_seqno", & i915_gem_seqno_info},
{"i915_gem_interrupt", & i915_interrupt_info},
{"i915_gem_hws", & i915_hws_info}};
int i915_gem_proc_init(struct drm_minor *minor )
{
struct proc_dir_entry *ent ;
int i ;
int j ;
{
i = 0;
while (1) {
if ((unsigned long )i < sizeof(i915_gem_proc_list) / sizeof(i915_gem_proc_list[0]) + (sizeof(char [1 - 2 * 0]) - 1UL)) {
} else {
break;
}
ent = create_proc_entry(i915_gem_proc_list[i].name, 32768 | ((256 | 32) | 4),
minor->dev_root);
if (! ent) {
printk("<3>[drm:%s] *ERROR* Cannot create /proc/dri/.../%s\n", "i915_gem_proc_init",
i915_gem_proc_list[i].name);
j = 0;
while (1) {
if (j < i) {
} else {
break;
}
remove_proc_entry(i915_gem_proc_list[i].name, minor->dev_root);
j = j + 1;
}
return (-1);
} else {
}
ent->read_proc = i915_gem_proc_list[i].f;
ent->data = minor;
i = i + 1;
}
return (0);
}
}
void i915_gem_proc_cleanup(struct drm_minor *minor )
{
int i ;
{
if (! minor->dev_root) {
return;
} else {
}
i = 0;
while (1) {
if ((unsigned long )i < sizeof(i915_gem_proc_list) / sizeof(i915_gem_proc_list[0]) + (sizeof(char [1 - 2 * 0]) - 1UL)) {
} else {
break;
}
remove_proc_entry(i915_gem_proc_list[i].name, minor->dev_root);
i = i + 1;
}
return;
}
}
__inline static unsigned short readw(void const volatile *addr )
{
unsigned short ret ;
{
__asm__ volatile ("mov"
"w"
" %1,%0": "=r" (ret): "m" (*((unsigned short volatile *)addr)): "memory");
return (ret);
}
}
void i915_gem_detect_bit_6_swizzle(struct drm_device *dev )
{
drm_i915_private_t *dev_priv ;
uint32_t swizzle_x ;
uint32_t swizzle_y ;
uint32_t dcc ;
unsigned short tmp ;
unsigned short tmp___0 ;
{
dev_priv = dev->dev_private;
swizzle_x = 5;
swizzle_y = 5;
if (! ((((((dev->pci_device == 9602 || dev->pci_device == 9610) || dev->pci_device == 9618) || dev->pci_device == 10098) || (dev->pci_device == 10146 || dev->pci_device == 10158)) || (((((((((dev->pci_device == 10610 || dev->pci_device == 10626) || dev->pci_device == 10642) || dev->pci_device == 10658) || dev->pci_device == 10754) || dev->pci_device == 10770) || dev->pci_device == 10818) || dev->pci_device == 11778) || dev->pci_device == 11794) || dev->pci_device == 11810)) || ((dev->pci_device == 10690 || dev->pci_device == 10674) || dev->pci_device == 10706))) {
swizzle_x = 0;
swizzle_y = 0;
} else
if (((! (((((((((dev->pci_device == 10610 || dev->pci_device == 10626) || dev->pci_device == 10642) || dev->pci_device == 10658) || dev->pci_device == 10754) || dev->pci_device == 10770) || dev->pci_device == 10818) || dev->pci_device == 11778) || dev->pci_device == 11794) || dev->pci_device == 11810) && ! ((dev->pci_device == 10690 || dev->pci_device == 10674) || dev->pci_device == 10706)) || dev->pci_device == 10754) || dev->pci_device == 10818) {
dcc = readl(dev_priv->regs + 66048);
switch (dcc & (unsigned int )(3 << 0)) {
case (unsigned int )(1 << 0):
case (unsigned int )(0 << 0):
swizzle_x = 0;
swizzle_y = 0;
break;
case (unsigned int )(2 << 0):
if (((dev->pci_device == 9602 || dev->pci_device == 9610) || dev->pci_device == 9618) || dcc & (unsigned int )(1 << 10)) {
swizzle_x = 2;
swizzle_y = 1;
} else
if ((dev->pci_device == 10754 || dev->pci_device == 10818) && (dcc & (unsigned int )(1 << 9)) == 0U) {
swizzle_x = 4;
swizzle_y = 3;
} else {
swizzle_x = 5;
swizzle_y = 5;
}
break;
}
if (dcc == 4294967295U) {
printk("<3>[drm:%s] *ERROR* Couldn\'t read from MCHBAR. Disabling tiling.\n",
"i915_gem_detect_bit_6_swizzle");
swizzle_x = 5;
swizzle_y = 5;
} else {
}
} else {
tmp = readw(dev_priv->regs + 66054);
tmp___0 = readw(dev_priv->regs + 67078);
if ((int )tmp != (int )tmp___0) {
swizzle_x = 0;
swizzle_y = 0;
} else {
swizzle_x = 2;
swizzle_y = 1;
}
}
dev_priv->mm.bit_6_swizzle_x = swizzle_x;
dev_priv->mm.bit_6_swizzle_y = swizzle_y;
return;
}
}
int i915_gem_set_tiling(struct drm_device *dev , void *data , struct drm_file *file_priv )
{
struct drm_i915_gem_set_tiling *args ;
drm_i915_private_t *dev_priv ;
struct drm_gem_object *obj ;
struct drm_i915_gem_object *obj_priv ;
{
args = data;
dev_priv = dev->dev_private;
obj = drm_gem_object_lookup(dev, file_priv, args->handle);
if ((unsigned long )obj == (unsigned long )((void *)0)) {
return (-22);
} else {
}
obj_priv = obj->driver_private;
mutex_lock_nested(& dev->struct_mutex, 0);
if (args->tiling_mode == (uint32_t )0) {
obj_priv->tiling_mode = 0;
args->swizzle_mode = 0;
} else {
if (args->tiling_mode == (uint32_t )1) {
args->swizzle_mode = dev_priv->mm.bit_6_swizzle_x;
} else {
args->swizzle_mode = dev_priv->mm.bit_6_swizzle_y;
}
if (args->swizzle_mode == (uint32_t )5) {
args->tiling_mode = 0;
args->swizzle_mode = 0;
} else {
}
}
obj_priv->tiling_mode = args->tiling_mode;
obj_priv->stride = args->stride;
mutex_unlock(& dev->struct_mutex);
drm_gem_object_unreference(obj);
return (0);
}
}
int i915_gem_get_tiling(struct drm_device *dev , void *data , struct drm_file *file_priv )
{
struct drm_i915_gem_get_tiling *args ;
drm_i915_private_t *dev_priv ;
struct drm_gem_object *obj ;
struct drm_i915_gem_object *obj_priv ;
{
args = data;
dev_priv = dev->dev_private;
obj = drm_gem_object_lookup(dev, file_priv, args->handle);
if ((unsigned long )obj == (unsigned long )((void *)0)) {
return (-22);
} else {
}
obj_priv = obj->driver_private;
mutex_lock_nested(& dev->struct_mutex, 0);
args->tiling_mode = obj_priv->tiling_mode;
switch (obj_priv->tiling_mode) {
case (uint32_t )1:
args->swizzle_mode = dev_priv->mm.bit_6_swizzle_x;
break;
case (uint32_t )2:
args->swizzle_mode = dev_priv->mm.bit_6_swizzle_y;
break;
case (uint32_t )0:
args->swizzle_mode = 0;
break;
default:
printk("<3>[drm:%s] *ERROR* unknown tiling mode\n", "i915_gem_get_tiling");
}
mutex_unlock(& dev->struct_mutex);
drm_gem_object_unreference(obj);
return (0);
}
}
__inline static int ffs(int x )
{
int r ;
{
__asm__ ("bsfl %1,%0\n\t"
"cmovzl %2,%0": "=r" (r): "rm" (x), "r" (-1));
return (r + 1);
}
}
__inline static void *kzalloc(size_t size , gfp_t flags )
{
void *tmp ;
{
tmp = kmalloc(size, flags | 32768U);
return (tmp);
}
}
extern void drm_crtc_init(struct drm_device *dev , struct drm_crtc *crtc , struct drm_crtc_funcs const *funcs ) ;
extern void drm_crtc_cleanup(struct drm_crtc *crtc ) ;
extern void drm_mode_debug_printmodeline(struct drm_display_mode *mode ) ;
extern void drm_mode_config_init(struct drm_device *dev ) ;
extern void drm_mode_config_cleanup(struct drm_device *dev ) ;
extern void drm_mode_set_name(struct drm_display_mode *mode ) ;
extern void drm_mode_set_crtcinfo(struct drm_display_mode *p , int adjust_flags ) ;
extern int drm_framebuffer_init(struct drm_device *dev , struct drm_framebuffer *fb ,
struct drm_framebuffer_funcs const *funcs ) ;
extern void drm_framebuffer_cleanup(struct drm_framebuffer *fb ) ;
extern bool drm_mode_crtc_set_gamma_size(struct drm_crtc *crtc , int gamma_size ) ;
extern void drm_vblank_pre_modeset(struct drm_device *dev , int crtc ) ;
extern void drm_vblank_post_modeset(struct drm_device *dev , int crtc ) ;
extern void drm_helper_disable_unused_functions(struct drm_device *dev ) ;
extern int drm_crtc_helper_set_config(struct drm_mode_set *set ) ;
extern bool drm_crtc_helper_set_mode(struct drm_crtc *crtc , struct drm_display_mode *mode ,
int x , int y , struct drm_framebuffer *old_fb ) ;
extern bool drm_helper_crtc_in_use(struct drm_crtc *crtc ) ;
extern int drm_helper_mode_fill_fb_struct(struct drm_framebuffer *fb , struct drm_mode_fb_cmd *mode_cmd ) ;
__inline static void drm_crtc_helper_add(struct drm_crtc *crtc , struct drm_crtc_helper_funcs const *funcs )
{
{
crtc->helper_private = (void *)funcs;
return;
}
}
void intel_crt_init(struct drm_device *dev ) ;
void intel_sdvo_init(struct drm_device *dev , int output_device ) ;
void intel_dvo_init(struct drm_device *dev ) ;
void intel_tv_init(struct drm_device *dev ) ;
void intel_lvds_init(struct drm_device *dev ) ;
void intel_crtc_load_lut(struct drm_crtc *crtc ) ;
void intel_encoder_prepare(struct drm_encoder *encoder ) ;
void intel_encoder_commit(struct drm_encoder *encoder ) ;
struct drm_encoder *intel_best_encoder(struct drm_connector *connector ) ;
struct drm_display_mode *intel_crtc_mode_get(struct drm_device *dev , struct drm_crtc *crtc ) ;
void intel_wait_for_vblank(struct drm_device *dev ) ;
struct drm_crtc *intel_get_crtc_from_pipe(struct drm_device *dev , int pipe ) ;
struct drm_crtc *intel_get_load_detect_pipe(struct intel_output *intel_output , struct drm_display_mode *mode ,
int *dpms_mode ) ;
void intel_release_load_detect_pipe(struct intel_output *intel_output , int dpms_mode ) ;
int intelfb_probe(struct drm_device *dev ) ;
int intelfb_remove(struct drm_device *dev , struct drm_framebuffer *fb ) ;
void intel_crtc_fb_gamma_set(struct drm_crtc *crtc , u16 red , u16 green , u16 blue ,
int regno ) ;
int intel_framebuffer_create(struct drm_device *dev , struct drm_mode_fb_cmd *mode_cmd ,
struct drm_framebuffer **fb , struct drm_gem_object *obj ) ;
bool intel_pipe_has_type(struct drm_crtc *crtc , int type ) ;
static intel_limit_t const intel_limits[4] = { {{25000, 350000}, {930000, 1400000}, {3, 16}, {96, 140}, {18, 26}, {6, 16}, {4,
128},
{2, 33}, {165000, 4, 2}},
{{25000, 350000}, {930000, 1400000}, {3, 16}, {96, 140}, {18, 26}, {6, 16}, {4,
128},
{1, 6}, {165000, 14, 14}},
{{20000, 400000}, {1400000, 2800000}, {3, 8}, {70, 120}, {10, 20}, {5, 9}, {5,
80},
{1, 8}, {200000, 10, 5}},
{{20000, 400000}, {1400000, 2800000}, {3, 8}, {70, 120}, {10, 20}, {5, 9}, {7,
98},
{1, 8}, {112000, 14, 7}}};
static intel_limit_t const *intel_limit(struct drm_crtc *crtc )
{
struct drm_device *dev ;
intel_limit_t const *limit ;
bool tmp ;
bool tmp___0 ;
{
dev = crtc->dev;
if ((((((dev->pci_device == 9602 || dev->pci_device == 9610) || dev->pci_device == 9618) || dev->pci_device == 10098) || (dev->pci_device == 10146 || dev->pci_device == 10158)) || (((((((((dev->pci_device == 10610 || dev->pci_device == 10626) || dev->pci_device == 10642) || dev->pci_device == 10658) || dev->pci_device == 10754) || dev->pci_device == 10770) || dev->pci_device == 10818) || dev->pci_device == 11778) || dev->pci_device == 11794) || dev->pci_device == 11810)) || ((dev->pci_device == 10690 || dev->pci_device == 10674) || dev->pci_device == 10706)) {
tmp = intel_pipe_has_type(crtc, 4);
if (tmp) {
limit = & intel_limits[3];
} else {
limit = & intel_limits[2];
}
} else {
tmp___0 = intel_pipe_has_type(crtc, 4);
if (tmp___0) {
limit = & intel_limits[1];
} else {
limit = & intel_limits[0];
}
}
return (limit);
}
}
static void i8xx_clock(int refclk , intel_clock_t *clock )
{
{
clock->m = 5 * (clock->m1 + 2) + (clock->m2 + 2);
clock->p = clock->p1 * clock->p2;
clock->vco = (refclk * clock->m) / (clock->n + 2);
clock->dot = clock->vco / clock->p;
return;
}
}
static void i9xx_clock(int refclk , intel_clock_t *clock )
{
{
clock->m = 5 * (clock->m1 + 2) + (clock->m2 + 2);
clock->p = clock->p1 * clock->p2;
clock->vco = (refclk * clock->m) / (clock->n + 2);
clock->dot = clock->vco / clock->p;
return;
}
}
static void intel_clock(struct drm_device *dev , int refclk , intel_clock_t *clock )
{
{
if ((((((dev->pci_device == 9602 || dev->pci_device == 9610) || dev->pci_device == 9618) || dev->pci_device == 10098) || (dev->pci_device == 10146 || dev->pci_device == 10158)) || (((((((((dev->pci_device == 10610 || dev->pci_device == 10626) || dev->pci_device == 10642) || dev->pci_device == 10658) || dev->pci_device == 10754) || dev->pci_device == 10770) || dev->pci_device == 10818) || dev->pci_device == 11778) || dev->pci_device == 11794) || dev->pci_device == 11810)) || ((dev->pci_device == 10690 || dev->pci_device == 10674) || dev->pci_device == 10706)) {
i9xx_clock(refclk, clock);
} else {
i8xx_clock(refclk, clock);
}
return;
}
}
bool intel_pipe_has_type(struct drm_crtc *crtc , int type )
{
struct drm_device *dev ;
struct drm_mode_config *mode_config ;
struct drm_connector *l_entry ;
struct list_head const *__mptr ;
struct list_head const *__mptr___0 ;
struct intel_output *intel_output ;
struct drm_connector const *__mptr___1 ;
{
dev = crtc->dev;
mode_config = & dev->mode_config;
__mptr = mode_config->connector_list.next;
l_entry = (struct drm_connector *)((char *)__mptr - (unsigned int )(& ((struct drm_connector *)0)->head));
while (1) {
__builtin_prefetch(l_entry->head.next);
if ((unsigned long )(& l_entry->head) != (unsigned long )(& mode_config->connector_list)) {
} else {
break;
}
if (l_entry->encoder && (unsigned long )(l_entry->encoder)->crtc == (unsigned long )crtc) {
__mptr___1 = l_entry;
intel_output = (struct intel_output *)((char *)__mptr___1 - (unsigned int )(& ((struct intel_output *)0)->base));
if (intel_output->type == type) {
return (true);
} else {
}
} else {
}
__mptr___0 = l_entry->head.next;
l_entry = (struct drm_connector *)((char *)__mptr___0 - (unsigned int )(& ((struct drm_connector *)0)->head));
}
return (false);
}
}
static bool intel_PLL_is_valid(struct drm_crtc *crtc , intel_clock_t *clock )
{
intel_limit_t const *limit ;
intel_limit_t const *tmp ;
{
tmp = intel_limit(crtc);
limit = tmp;
if (clock->p1 < (int )limit->p1.min || limit->p1.max < (int const )clock->p1) {
return (false);
} else {
}
if (clock->p < (int )limit->p.min || limit->p.max < (int const )clock->p) {
return (false);
} else {
}
if (clock->m2 < (int )limit->m2.min || limit->m2.max < (int const )clock->m2) {
return (false);
} else {
}
if (clock->m1 < (int )limit->m1.min || limit->m1.max < (int const )clock->m1) {
return (false);
} else {
}
if (clock->m1 <= clock->m2) {
return (false);
} else {
}
if (clock->m < (int )limit->m.min || limit->m.max < (int const )clock->m) {
return (false);
} else {
}
if (clock->n < (int )limit->n.min || limit->n.max < (int const )clock->n) {
return (false);
} else {
}
if (clock->vco < (int )limit->vco.min || limit->vco.max < (int const )clock->vco) {
return (false);
} else {
}
if (clock->dot < (int )limit->dot.min || limit->dot.max < (int const )clock->dot) {
return (false);
} else {
}
return (true);
}
}
static bool intel_find_best_PLL(struct drm_crtc *crtc , int target , int refclk ,
intel_clock_t *best_clock )
{
struct drm_device *dev ;
struct drm_i915_private *dev_priv ;
intel_clock_t clock ;
intel_limit_t const *limit ;
intel_limit_t const *tmp ;
int err ;
unsigned int tmp___0 ;
bool tmp___1 ;
unsigned int tmp___2 ;
int this_err ;
bool tmp___3 ;
int __x ;
{
dev = crtc->dev;
dev_priv = dev->dev_private;
tmp = intel_limit(crtc);
limit = tmp;
err = target;
if ((((((dev->pci_device == 9602 || dev->pci_device == 9610) || dev->pci_device == 9618) || dev->pci_device == 10098) || (dev->pci_device == 10146 || dev->pci_device == 10158)) || (((((((((dev->pci_device == 10610 || dev->pci_device == 10626) || dev->pci_device == 10642) || dev->pci_device == 10658) || dev->pci_device == 10754) || dev->pci_device == 10770) || dev->pci_device == 10818) || dev->pci_device == 11778) || dev->pci_device == 11794) || dev->pci_device == 11810)) || ((dev->pci_device == 10690 || dev->pci_device == 10674) || dev->pci_device == 10706)) {
tmp___1 = intel_pipe_has_type(crtc, 4);
if (tmp___1) {
tmp___2 = readl(dev_priv->regs + 397696);
if ((tmp___2 & (unsigned int )(1 << 31)) != 0U) {
tmp___0 = readl(dev_priv->regs + 397696);
if ((tmp___0 & (unsigned int )(3 << 4)) == (unsigned int )(3 << 4)) {
clock.p2 = limit->p2.p2_fast;
} else {
clock.p2 = limit->p2.p2_slow;
}
} else {
goto _L___0;
}
} else {
goto _L___0;
}
} else
_L___0: /* CIL Label */
if (target < (int )limit->p2.dot_limit) {
clock.p2 = limit->p2.p2_slow;
} else {
clock.p2 = limit->p2.p2_fast;
}
memset(best_clock, 0, sizeof(*best_clock));
clock.m1 = limit->m1.min;
while (1) {
if (clock.m1 <= (int )limit->m1.max) {
} else {
break;
}
clock.m2 = limit->m2.min;
while (1) {
if (clock.m2 < clock.m1 && clock.m2 <= (int )limit->m2.max) {
} else {
break;
}
clock.n = limit->n.min;
while (1) {
if (clock.n <= (int )limit->n.max) {
} else {
break;
}
clock.p1 = limit->p1.min;
while (1) {
if (clock.p1 <= (int )limit->p1.max) {
} else {
break;
}
intel_clock(dev, refclk, & clock);
tmp___3 = intel_PLL_is_valid(crtc, & clock);
if (tmp___3) {
} else {
goto __Cont;
}
__x = clock.dot - target;
this_err = __x < 0 ? - __x : __x;
if (this_err < err) {
*best_clock = clock;
err = this_err;
} else {
}
__Cont: /* CIL Label */
clock.p1 = clock.p1 + 1;
}
clock.n = clock.n + 1;
}
clock.m2 = clock.m2 + 1;
}
clock.m1 = clock.m1 + 1;
}
return (err != target);
}
}
void intel_wait_for_vblank(struct drm_device *dev )
{
{
if (20000 > 20000) {
__bad_udelay();
} else {
__const_udelay(20000UL * 4295UL);
}
return;
}
}
static void intel_pipe_set_base(struct drm_crtc *crtc , int x , int y , struct drm_framebuffer *old_fb )
{
struct drm_device *dev ;
struct drm_i915_private *dev_priv ;
struct drm_i915_master_private *master_priv ;
struct intel_crtc *intel_crtc ;
struct drm_crtc const *__mptr ;
struct intel_framebuffer *intel_fb ;
struct drm_i915_gem_object *obj_priv ;
struct drm_gem_object *obj ;
int pipe ;
unsigned long Start ;
unsigned long Offset ;
int dspbase ;
int dspsurf ;
int dspstride ;
int dspcntr_reg ;
u32 dspcntr ;
u32 alignment ;
struct drm_framebuffer const *__mptr___0 ;
int tmp ;
struct drm_framebuffer const *__mptr___1 ;
{
dev = crtc->dev;
dev_priv = dev->dev_private;
__mptr = crtc;
intel_crtc = (struct intel_crtc *)((char *)__mptr - (unsigned int )(& ((struct intel_crtc *)0)->base));
pipe = intel_crtc->pipe;
dspbase = pipe == 0 ? 459140 : 463236;
dspsurf = pipe == 0 ? 459164 : 463260;
dspstride = pipe == 0 ? 459144 : 463240;
dspcntr_reg = pipe == 0 ? 459136 : 463232;
if (! crtc->fb) {
while (1) {
if (drm_debug) {
printk("<7>[drm:%s] No FB bound\n", "intel_pipe_set_base");
} else {
}
break;
}
return;
} else {
}
__mptr___0 = crtc->fb;
intel_fb = (struct intel_framebuffer *)((char *)__mptr___0 - (unsigned int )(& ((struct intel_framebuffer *)0)->base));
obj = intel_fb->obj;
obj_priv = obj->driver_private;
switch (obj_priv->tiling_mode) {
case (uint32_t )0:
alignment = 64 * 1024;
break;
case (uint32_t )1:
if ((((((dev->pci_device == 9602 || dev->pci_device == 9610) || dev->pci_device == 9618) || dev->pci_device == 10098) || (dev->pci_device == 10146 || dev->pci_device == 10158)) || (((((((((dev->pci_device == 10610 || dev->pci_device == 10626) || dev->pci_device == 10642) || dev->pci_device == 10658) || dev->pci_device == 10754) || dev->pci_device == 10770) || dev->pci_device == 10818) || dev->pci_device == 11778) || dev->pci_device == 11794) || dev->pci_device == 11810)) || ((dev->pci_device == 10690 || dev->pci_device == 10674) || dev->pci_device == 10706)) {
alignment = 1024 * 1024;
} else {
alignment = 512 * 1024;
}
break;
case (uint32_t )2:
printk("<3>[drm:%s] *ERROR* Y tiled not allowed for scan out buffers\n", "intel_pipe_set_base");
return;
default:
while (1) {
__asm__ volatile ("1:\tud2\n"
".pushsection __bug_table,\"a\"\n"
"2:\t.quad 1b, %c0\n"
"\t.word %c1, 0\n"
"\t.org 2b+%c2\n"
".popsection": : "i" ("/work/ldvuser/novikov/work/current--X--drivers/gpu/drm/i915/i915.ko--X--defaultlinux--X--68_1--X--cpachecker/linux/csd_deg_dscv/36/dscv_tempdir/dscv/ri/68_1/drivers/gpu/drm/i915/intel_display.c"),
"i" (391), "i" (sizeof(struct bug_entry )));
while (1) {
}
break;
}
}
tmp = i915_gem_object_pin(intel_fb->obj, alignment);
if (tmp) {
return;
} else {
}
i915_gem_object_set_to_gtt_domain(intel_fb->obj, 1);
Start = obj_priv->gtt_offset;
Offset = (unsigned int )y * (crtc->fb)->pitch + (unsigned int )(x * ((crtc->fb)->bits_per_pixel / 8));
writel((crtc->fb)->pitch, dev_priv->regs + dspstride);
dspcntr = readl(dev_priv->regs + dspcntr_reg);
switch ((crtc->fb)->bits_per_pixel) {
case 8:
dspcntr = dspcntr | (unsigned int )(2 << 26);
break;
case 16:
if ((crtc->fb)->depth == 15U) {
dspcntr = dspcntr | (unsigned int )(4 << 26);
} else {
dspcntr = dspcntr | (unsigned int )(5 << 26);
}
break;
case 32:
case 24:
dspcntr = dspcntr | (unsigned int )(6 << 26);
break;
default:
printk("<3>[drm:%s] *ERROR* Unknown color depth\n", "intel_pipe_set_base");
return;
}
writel(dspcntr, dev_priv->regs + dspcntr_reg);
while (1) {
if (drm_debug) {
printk("<7>[drm:%s] Writing base %08lX %08lX %d %d\n", "intel_pipe_set_base",
Start, Offset, x, y);
} else {
}
break;
}
if (((((((((dev->pci_device == 10610 || dev->pci_device == 10626) || dev->pci_device == 10642) || dev->pci_device == 10658) || dev->pci_device == 10754) || dev->pci_device == 10770) || dev->pci_device == 10818) || dev->pci_device == 11778) || dev->pci_device == 11794) || dev->pci_device == 11810) {
writel(Offset, dev_priv->regs + dspbase);
readl(dev_priv->regs + dspbase);
writel(Start, dev_priv->regs + dspsurf);
readl(dev_priv->regs + dspsurf);
} else {
writel(Start + Offset, dev_priv->regs + dspbase);
readl(dev_priv->regs + dspbase);
}
intel_wait_for_vblank(dev);
if (old_fb) {
__mptr___1 = old_fb;
intel_fb = (struct intel_framebuffer *)((char *)__mptr___1 - (unsigned int )(& ((struct intel_framebuffer *)0)->base));
i915_gem_object_unpin(intel_fb->obj);
} else {
}
if (! (dev->primary)->master) {
return;
} else {
}
master_priv = ((dev->primary)->master)->driver_priv;
if (! master_priv->sarea_priv) {
return;
} else {
}
switch (pipe) {
case 0:
(master_priv->sarea_priv)->pipeA_x = x;
(master_priv->sarea_priv)->pipeA_y = y;
break;
case 1:
(master_priv->sarea_priv)->pipeB_x = x;
(master_priv->sarea_priv)->pipeB_y = y;
break;
default:
printk("<3>[drm:%s] *ERROR* Can\'t update pipe %d in SAREA\n", "intel_pipe_set_base",
pipe);
break;
}
return;
}
}
static void intel_crtc_dpms(struct drm_crtc *crtc , int mode )
{
struct drm_device *dev ;
struct drm_i915_master_private *master_priv ;
struct drm_i915_private *dev_priv ;
struct intel_crtc *intel_crtc ;
struct drm_crtc const *__mptr ;
int pipe ;
int dpll_reg ;
int dspcntr_reg ;
int dspbase_reg ;
int pipeconf_reg ;
u32 temp ;
bool enabled ;
unsigned int tmp ;
unsigned int tmp___0 ;
{
dev = crtc->dev;
dev_priv = dev->dev_private;
__mptr = crtc;
intel_crtc = (struct intel_crtc *)((char *)__mptr - (unsigned int )(& ((struct intel_crtc *)0)->base));
pipe = intel_crtc->pipe;
dpll_reg = pipe == 0 ? 24596 : 24600;
dspcntr_reg = pipe == 0 ? 459136 : 463232;
dspbase_reg = pipe == 0 ? 459140 : 463236;
pipeconf_reg = pipe == 0 ? 458760 : 462856;
switch (mode) {
case 2:
case 1:
case 0:
temp = readl(dev_priv->regs + dpll_reg);
if ((temp & (unsigned int )(1 << 31)) == 0U) {
writel(temp, dev_priv->regs + dpll_reg);
readl(dev_priv->regs + dpll_reg);
if (150 > 20000) {
__bad_udelay();
} else {
__const_udelay(150UL * 4295UL);
}
writel(temp | (unsigned int )(1 << 31), dev_priv->regs + dpll_reg);
readl(dev_priv->regs + dpll_reg);
if (150 > 20000) {
__bad_udelay();
} else {
__const_udelay(150UL * 4295UL);
}
writel(temp | (unsigned int )(1 << 31), dev_priv->regs + dpll_reg);
readl(dev_priv->regs + dpll_reg);
if (150 > 20000) {
__bad_udelay();
} else {
__const_udelay(150UL * 4295UL);
}
} else {
}
temp = readl(dev_priv->regs + pipeconf_reg);
if ((temp & (unsigned int )(1 << 31)) == 0U) {
writel(temp | (unsigned int )(1 << 31), dev_priv->regs + pipeconf_reg);
} else {
}
temp = readl(dev_priv->regs + dspcntr_reg);
if ((temp & (unsigned int )(1 << 31)) == 0U) {
writel(temp | (unsigned int )(1 << 31), dev_priv->regs + dspcntr_reg);
tmp = readl(dev_priv->regs + dspbase_reg);
writel(tmp, dev_priv->regs + dspbase_reg);
} else {
}
intel_crtc_load_lut(crtc);
break;
case 3:
writel(1 << 31, dev_priv->regs + 463872);
temp = readl(dev_priv->regs + dspcntr_reg);
if ((temp & (unsigned int )(1 << 31)) != 0U) {
writel(temp & (unsigned int )(~ (1 << 31)), dev_priv->regs + dspcntr_reg);
tmp___0 = readl(dev_priv->regs + dspbase_reg);
writel(tmp___0, dev_priv->regs + dspbase_reg);
readl(dev_priv->regs + dspbase_reg);
} else {
}
if (! ((((((dev->pci_device == 9602 || dev->pci_device == 9610) || dev->pci_device == 9618) || dev->pci_device == 10098) || (dev->pci_device == 10146 || dev->pci_device == 10158)) || (((((((((dev->pci_device == 10610 || dev->pci_device == 10626) || dev->pci_device == 10642) || dev->pci_device == 10658) || dev->pci_device == 10754) || dev->pci_device == 10770) || dev->pci_device == 10818) || dev->pci_device == 11778) || dev->pci_device == 11794) || dev->pci_device == 11810)) || ((dev->pci_device == 10690 || dev->pci_device == 10674) || dev->pci_device == 10706))) {
intel_wait_for_vblank(dev);
} else {
}
temp = readl(dev_priv->regs + pipeconf_reg);
if ((temp & (unsigned int )(1 << 31)) != 0U) {
writel(temp & (unsigned int )(~ (1 << 31)), dev_priv->regs + pipeconf_reg);
readl(dev_priv->regs + pipeconf_reg);
} else {
}
intel_wait_for_vblank(dev);
temp = readl(dev_priv->regs + dpll_reg);
if ((temp & (unsigned int )(1 << 31)) != 0U) {
writel(temp & (unsigned int )(~ (1 << 31)), dev_priv->regs + dpll_reg);
readl(dev_priv->regs + dpll_reg);
} else {
}
if (150 > 20000) {
__bad_udelay();
} else {
__const_udelay(150UL * 4295UL);
}
break;
}
if (! (dev->primary)->master) {
return;
} else {
}
master_priv = ((dev->primary)->master)->driver_priv;
if (! master_priv->sarea_priv) {
return;
} else {
}
enabled = crtc->enabled && mode != 3;
switch (pipe) {
case 0:
(master_priv->sarea_priv)->pipeA_w = enabled ? crtc->mode.hdisplay : 0;
(master_priv->sarea_priv)->pipeA_h = enabled ? crtc->mode.vdisplay : 0;
break;
case 1:
(master_priv->sarea_priv)->pipeB_w = enabled ? crtc->mode.hdisplay : 0;
(master_priv->sarea_priv)->pipeB_h = enabled ? crtc->mode.vdisplay : 0;
break;
default:
printk("<3>[drm:%s] *ERROR* Can\'t update pipe %d in SAREA\n", "intel_crtc_dpms",
pipe);
break;
}
intel_crtc->dpms_mode = mode;
return;
}
}
static void intel_crtc_prepare(struct drm_crtc *crtc )
{
struct drm_crtc_helper_funcs *crtc_funcs ;
{
crtc_funcs = crtc->helper_private;
(*(crtc_funcs->dpms))(crtc, 3);
return;
}
}
static void intel_crtc_commit(struct drm_crtc *crtc )
{
struct drm_crtc_helper_funcs *crtc_funcs ;
{
crtc_funcs = crtc->helper_private;
(*(crtc_funcs->dpms))(crtc, 0);
return;
}
}
void intel_encoder_prepare(struct drm_encoder *encoder )
{
struct drm_encoder_helper_funcs *encoder_funcs ;
{
encoder_funcs = encoder->helper_private;
(*(encoder_funcs->dpms))(encoder, 3);
return;
}
}
void intel_encoder_commit(struct drm_encoder *encoder )
{
struct drm_encoder_helper_funcs *encoder_funcs ;
{
encoder_funcs = encoder->helper_private;
(*(encoder_funcs->dpms))(encoder, 0);
return;
}
}
static bool intel_crtc_mode_fixup(struct drm_crtc *crtc , struct drm_display_mode *mode ,
struct drm_display_mode *adjusted_mode )
{
{
return (true);
}
}
static int intel_get_core_clock_speed(struct drm_device *dev )
{
u16 gcfgc ;
u16 hpllcc ;
{
if (dev->pci_device == 10098) {
return (400000);
} else
if (dev->pci_device == 9602 || dev->pci_device == 9610) {
return (333000);
} else
if ((dev->pci_device == 10146 || dev->pci_device == 10158) || dev->pci_device == 9570) {
return (200000);
} else
if (dev->pci_device == 9618) {
gcfgc = 0;
pci_read_config_word(dev->pdev, 240, & gcfgc);
if ((int )gcfgc & (1 << 7)) {
return (133000);
} else {
switch ((int )gcfgc & (7 << 4)) {
case 4 << 4:
return (333000);
default:
return (190000);
}
}
} else
if (dev->pci_device == 9586) {
return (266000);
} else
if (dev->pci_device == 13698) {
hpllcc = 0;
switch ((int )hpllcc & (3 << 0)) {
case 1 << 0:
case 0 << 0:
return (200000);
case 3 << 0:
return (250000);
case 2 << 0:
return (133000);
}
} else {
return (133000);
}
return (0);
}
}
static int intel_panel_fitter_pipe(struct drm_device *dev )
{
struct drm_i915_private *dev_priv ;
u32 pfit_control ;
{
dev_priv = dev->dev_private;
if (dev->pci_device == 13687) {
return (-1);
} else {
}
pfit_control = readl(dev_priv->regs + 397872);
if ((pfit_control & (unsigned int )(1 << 31)) == 0U) {
return (-1);
} else {
}
if (((((((((dev->pci_device == 10610 || dev->pci_device == 10626) || dev->pci_device == 10642) || dev->pci_device == 10658) || dev->pci_device == 10754) || dev->pci_device == 10770) || dev->pci_device == 10818) || dev->pci_device == 11778) || dev->pci_device == 11794) || dev->pci_device == 11810) {
return ((pfit_control >> 29) & 3U);
} else {
}
return (1);
}
}
static void intel_crtc_mode_set(struct drm_crtc *crtc , struct drm_display_mode *mode ,
struct drm_display_mode *adjusted_mode , int x , int y ,
struct drm_framebuffer *old_fb )
{
struct drm_device *dev ;
struct drm_i915_private *dev_priv ;
struct intel_crtc *intel_crtc ;
struct drm_crtc const *__mptr ;
int pipe ;
int fp_reg ;
int dpll_reg ;
int dpll_md_reg ;
int dspcntr_reg ;
int pipeconf_reg ;
int htot_reg ;
int hblank_reg ;
int hsync_reg ;
int vtot_reg ;
int vblank_reg ;
int vsync_reg ;
int dspsize_reg ;
int dsppos_reg ;
int pipesrc_reg ;
int refclk ;
intel_clock_t clock ;
u32 dpll ;
u32 fp ;
u32 dspcntr ;
u32 pipeconf ;
bool ok ;
bool is_sdvo ;
bool is_dvo ;
bool is_crt ;
bool is_lvds ;
bool is_tv ;
struct drm_mode_config *mode_config ;
struct drm_connector *connector ;
struct list_head const *__mptr___0 ;
struct list_head const *__mptr___1 ;
struct intel_output *intel_output ;
struct drm_connector const *__mptr___2 ;
int sdvo_pixel_multiply ;
int tmp ;
int tmp___0 ;
u32 lvds ;
unsigned int tmp___1 ;
int sdvo_pixel_multiply___0 ;
{
dev = crtc->dev;
dev_priv = dev->dev_private;
__mptr = crtc;
intel_crtc = (struct intel_crtc *)((char *)__mptr - (unsigned int )(& ((struct intel_crtc *)0)->base));
pipe = intel_crtc->pipe;
fp_reg = pipe == 0 ? 24640 : 24648;
dpll_reg = pipe == 0 ? 24596 : 24600;
dpll_md_reg = intel_crtc->pipe == 0 ? 24604 : 24608;
dspcntr_reg = pipe == 0 ? 459136 : 463232;
pipeconf_reg = pipe == 0 ? 458760 : 462856;
htot_reg = pipe == 0 ? 393216 : 397312;
hblank_reg = pipe == 0 ? 393220 : 397316;
hsync_reg = pipe == 0 ? 393224 : 397320;
vtot_reg = pipe == 0 ? 393228 : 397324;
vblank_reg = pipe == 0 ? 393232 : 397328;
vsync_reg = pipe == 0 ? 393236 : 397332;
dspsize_reg = pipe == 0 ? 459152 : 463248;
dsppos_reg = pipe == 0 ? 459148 : 463244;
pipesrc_reg = pipe == 0 ? 393244 : 397340;
dpll = 0;
fp = 0;
is_sdvo = false;
is_dvo = false;
is_crt = false;
is_lvds = false;
is_tv = false;
mode_config = & dev->mode_config;
drm_vblank_pre_modeset(dev, pipe);
__mptr___0 = mode_config->connector_list.next;
connector = (struct drm_connector *)((char *)__mptr___0 - (unsigned int )(& ((struct drm_connector *)0)->head));
while (1) {
__builtin_prefetch(connector->head.next);
if ((unsigned long )(& connector->head) != (unsigned long )(& mode_config->connector_list)) {
} else {
break;
}
__mptr___2 = connector;
intel_output = (struct intel_output *)((char *)__mptr___2 - (unsigned int )(& ((struct intel_output *)0)->base));
if (! connector->encoder || (unsigned long )(connector->encoder)->crtc != (unsigned long )crtc) {
goto __Cont;
} else {
}
switch (intel_output->type) {
case 4:
is_lvds = true;
break;
case 3:
is_sdvo = true;
break;
case 2:
is_dvo = true;
break;
case 5:
is_tv = true;
break;
case 1:
is_crt = true;
break;
}
__Cont: /* CIL Label */
__mptr___1 = connector->head.next;
connector = (struct drm_connector *)((char *)__mptr___1 - (unsigned int )(& ((struct drm_connector *)0)->head));
}
if ((((((dev->pci_device == 9602 || dev->pci_device == 9610) || dev->pci_device == 9618) || dev->pci_device == 10098) || (dev->pci_device == 10146 || dev->pci_device == 10158)) || (((((((((dev->pci_device == 10610 || dev->pci_device == 10626) || dev->pci_device == 10642) || dev->pci_device == 10658) || dev->pci_device == 10754) || dev->pci_device == 10770) || dev->pci_device == 10818) || dev->pci_device == 11778) || dev->pci_device == 11794) || dev->pci_device == 11810)) || ((dev->pci_device == 10690 || dev->pci_device == 10674) || dev->pci_device == 10706)) {
refclk = 96000;
} else {
refclk = 48000;
}
ok = intel_find_best_PLL(crtc, adjusted_mode->clock, refclk, & clock);
if (! ok) {
printk("<3>[drm:%s] *ERROR* Couldn\'t find PLL settings for mode!\n", "intel_crtc_mode_set");
return;
} else {
}
fp = ((clock.n << 16) | (clock.m1 << 8)) | clock.m2;
dpll = 1 << 28;
if ((((((dev->pci_device == 9602 || dev->pci_device == 9610) || dev->pci_device == 9618) || dev->pci_device == 10098) || (dev->pci_device == 10146 || dev->pci_device == 10158)) || (((((((((dev->pci_device == 10610 || dev->pci_device == 10626) || dev->pci_device == 10642) || dev->pci_device == 10658) || dev->pci_device == 10754) || dev->pci_device == 10770) || dev->pci_device == 10818) || dev->pci_device == 11778) || dev->pci_device == 11794) || dev->pci_device == 11810)) || ((dev->pci_device == 10690 || dev->pci_device == 10674) || dev->pci_device == 10706)) {
if (is_lvds) {
dpll = dpll | (unsigned int )(2 << 26);
} else {
dpll = dpll | (unsigned int )(1 << 26);
}
if (is_sdvo) {
dpll = dpll | (unsigned int )(1 << 30);
if (dev->pci_device == 10098 || (dev->pci_device == 10146 || dev->pci_device == 10158)) {
sdvo_pixel_multiply = adjusted_mode->clock / mode->clock;
dpll = dpll | (unsigned int )((sdvo_pixel_multiply - 1) << 4);
} else {
}
} else {
}
dpll = dpll | (unsigned int )((1 << (clock.p1 - 1)) << 16);
switch (clock.p2) {
case 5:
dpll = dpll | (unsigned int )(1 << 24);
break;
case 7:
dpll = dpll | (unsigned int )(1 << 24);
break;
case 10:
dpll = dpll | (unsigned int )(0 << 24);
break;
case 14:
dpll = dpll | (unsigned int )(0 << 24);
break;
}
if (((((((((dev->pci_device == 10610 || dev->pci_device == 10626) || dev->pci_device == 10642) || dev->pci_device == 10658) || dev->pci_device == 10754) || dev->pci_device == 10770) || dev->pci_device == 10818) || dev->pci_device == 11778) || dev->pci_device == 11794) || dev->pci_device == 11810) {
dpll = dpll | (unsigned int )(6 << 9);
} else {
}
} else
if (is_lvds) {
dpll = dpll | (unsigned int )((1 << (clock.p1 - 1)) << 16);
} else {
if (clock.p1 == 2) {
dpll = dpll | (unsigned int )(1 << 21);
} else {
dpll = dpll | (unsigned int )((clock.p1 - 2) << 16);
}
if (clock.p2 == 4) {
dpll = dpll | (unsigned int )(1 << 23);
} else {
}
}
if (is_tv) {
dpll = dpll | 3U;
} else {
dpll = dpll | (unsigned int )(0 << 13);
}
pipeconf = readl(dev_priv->regs + pipeconf_reg);
dspcntr = 1 << 30;
if (pipe == 0) {
dspcntr = dspcntr | 0U;
} else {
dspcntr = dspcntr | (unsigned int )(1 << 24);
}
if (pipe == 0 && ! (((((((((dev->pci_device == 10610 || dev->pci_device == 10626) || dev->pci_device == 10642) || dev->pci_device == 10658) || dev->pci_device == 10754) || dev->pci_device == 10770) || dev->pci_device == 10818) || dev->pci_device == 11778) || dev->pci_device == 11794) || dev->pci_device == 11810)) {
tmp = intel_get_core_clock_speed(dev);
if (mode->clock > (tmp * 9) / 10) {
pipeconf = pipeconf | (unsigned int )(1 << 30);
} else {
pipeconf = pipeconf & (unsigned int )(~ (1 << 30));
}
} else {
}
dspcntr = dspcntr | (unsigned int )(1 << 31);
pipeconf = pipeconf | (unsigned int )(1 << 31);
dpll = dpll | (unsigned int )(1 << 31);
tmp___0 = intel_panel_fitter_pipe(dev);
if (tmp___0 == pipe) {
writel(0, dev_priv->regs + 397872);
} else {
}
while (1) {
if (drm_debug) {
printk("<7>[drm:%s] Mode for pipe %c:\n", "intel_crtc_mode_set", pipe == 0 ? 'A' : 'B');
} else {
}
break;
}
drm_mode_debug_printmodeline(mode);
if (dpll & (unsigned int )(1 << 31)) {
writel(fp, dev_priv->regs + fp_reg);
writel(dpll & (unsigned int )(~ (1 << 31)), dev_priv->regs + dpll_reg);
readl(dev_priv->regs + dpll_reg);
if (150 > 20000) {
__bad_udelay();
} else {
__const_udelay(150UL * 4295UL);
}
} else {
}
if (is_lvds) {
tmp___1 = readl(dev_priv->regs + 397696);
lvds = tmp___1;
lvds = lvds | (unsigned int )(((1 << 31) | (3 << 8)) | (1 << 30));
if (clock.p2 == 7) {
lvds = lvds | (unsigned int )((3 << 2) | (3 << 4));
} else {
lvds = lvds & (unsigned int )(~ ((3 << 2) | (3 << 4)));
}
writel(lvds, dev_priv->regs + 397696);
readl(dev_priv->regs + 397696);
} else {
}
writel(fp, dev_priv->regs + fp_reg);
writel(dpll, dev_priv->regs + dpll_reg);
readl(dev_priv->regs + dpll_reg);
if (150 > 20000) {
__bad_udelay();
} else {
__const_udelay(150UL * 4295UL);
}
if (((((((((dev->pci_device == 10610 || dev->pci_device == 10626) || dev->pci_device == 10642) || dev->pci_device == 10658) || dev->pci_device == 10754) || dev->pci_device == 10770) || dev->pci_device == 10818) || dev->pci_device == 11778) || dev->pci_device == 11794) || dev->pci_device == 11810) {
sdvo_pixel_multiply___0 = adjusted_mode->clock / mode->clock;
writel((0 << 24) | ((sdvo_pixel_multiply___0 - 1) << 8), dev_priv->regs + dpll_md_reg);
} else {
writel(dpll, dev_priv->regs + dpll_reg);
}
readl(dev_priv->regs + dpll_reg);
if (150 > 20000) {
__bad_udelay();
} else {
__const_udelay(150UL * 4295UL);
}
writel((adjusted_mode->crtc_hdisplay - 1) | ((adjusted_mode->crtc_htotal - 1) << 16),
dev_priv->regs + htot_reg);
writel((adjusted_mode->crtc_hblank_start - 1) | ((adjusted_mode->crtc_hblank_end - 1) << 16),
dev_priv->regs + hblank_reg);
writel((adjusted_mode->crtc_hsync_start - 1) | ((adjusted_mode->crtc_hsync_end - 1) << 16),
dev_priv->regs + hsync_reg);
writel((adjusted_mode->crtc_vdisplay - 1) | ((adjusted_mode->crtc_vtotal - 1) << 16),
dev_priv->regs + vtot_reg);
writel((adjusted_mode->crtc_vblank_start - 1) | ((adjusted_mode->crtc_vblank_end - 1) << 16),
dev_priv->regs + vblank_reg);
writel((adjusted_mode->crtc_vsync_start - 1) | ((adjusted_mode->crtc_vsync_end - 1) << 16),
dev_priv->regs + vsync_reg);
writel(((mode->vdisplay - 1) << 16) | (mode->hdisplay - 1), dev_priv->regs + dspsize_reg);
writel(0, dev_priv->regs + dsppos_reg);
writel(((mode->hdisplay - 1) << 16) | (mode->vdisplay - 1), dev_priv->regs + pipesrc_reg);
writel(pipeconf, dev_priv->regs + pipeconf_reg);
readl(dev_priv->regs + pipeconf_reg);
intel_wait_for_vblank(dev);
writel(dspcntr, dev_priv->regs + dspcntr_reg);
intel_pipe_set_base(crtc, x, y, old_fb);
drm_vblank_post_modeset(dev, pipe);
return;
}
}
void intel_crtc_load_lut(struct drm_crtc *crtc )
{
struct drm_device *dev ;
struct drm_i915_private *dev_priv ;
struct intel_crtc *intel_crtc ;
struct drm_crtc const *__mptr ;
int palreg ;
int i ;
{
dev = crtc->dev;
dev_priv = dev->dev_private;
__mptr = crtc;
intel_crtc = (struct intel_crtc *)((char *)__mptr - (unsigned int )(& ((struct intel_crtc *)0)->base));
palreg = intel_crtc->pipe == 0 ? 40960 : 43008;
if (! crtc->enabled) {
return;
} else {
}
i = 0;
while (1) {
if (i < 256) {
} else {
break;
}
writel((((int )intel_crtc->lut_r[i] << 16) | ((int )intel_crtc->lut_g[i] << 8)) | (int )intel_crtc->lut_b[i],
dev_priv->regs + (palreg + 4 * i));
i = i + 1;
}
return;
}
}
static int intel_crtc_cursor_set(struct drm_crtc *crtc , struct drm_file *file_priv ,
uint32_t handle , uint32_t width , uint32_t height )
{
struct drm_device *dev ;
struct drm_i915_private *dev_priv ;
struct intel_crtc *intel_crtc ;
struct drm_crtc const *__mptr ;
struct drm_gem_object *bo ;
struct drm_i915_gem_object *obj_priv ;
int pipe ;
uint32_t control ;
uint32_t base ;
uint32_t temp ;
size_t addr ;
{
dev = crtc->dev;
dev_priv = dev->dev_private;
__mptr = crtc;
intel_crtc = (struct intel_crtc *)((char *)__mptr - (unsigned int )(& ((struct intel_crtc *)0)->base));
pipe = intel_crtc->pipe;
control = pipe == 0 ? 458880 : 458944;
base = pipe == 0 ? 458884 : 458948;
while (1) {
if (drm_debug) {
printk("<7>[drm:%s] \n", "intel_crtc_cursor_set");
} else {
}
break;
}
if (! handle) {
while (1) {
if (drm_debug) {
printk("<7>[drm:%s] cursor off\n", "intel_crtc_cursor_set");
} else {
}
break;
}
temp = 0;
temp = temp | 0U;
writel(temp, dev_priv->regs + control);
writel(0, dev_priv->regs + base);
return (0);
} else {
}
if (width != (uint32_t )64 || height != (uint32_t )64) {
printk("<3>[drm:%s] *ERROR* we currently only support 64x64 cursors\n", "intel_crtc_cursor_set");
return (-22);
} else {
}
bo = drm_gem_object_lookup(dev, file_priv, handle);
if (! bo) {
return (-2);
} else {
}
obj_priv = bo->driver_private;
if (bo->size < (size_t )((width * height) * (uint32_t )4)) {
printk("<3>[drm:%s] *ERROR* buffer is to small\n", "intel_crtc_cursor_set");
drm_gem_object_unreference(bo);
return (-12);
} else {
}
if (dev_priv->cursor_needs_physical) {
addr = (dev->agp)->base + (unsigned long )obj_priv->gtt_offset;
} else {
addr = obj_priv->gtt_offset;
}
intel_crtc->cursor_addr = addr;
temp = 0;
temp = temp | (unsigned int )(pipe << 28);
temp = temp | (unsigned int )(((1 << 5) | 7) | (1 << 26));
writel(temp, dev_priv->regs + control);
writel(addr, dev_priv->regs + base);
return (0);
}
}
static int intel_crtc_cursor_move(struct drm_crtc *crtc , int x , int y )
{
struct drm_device *dev ;
struct drm_i915_private *dev_priv ;
struct intel_crtc *intel_crtc ;
struct drm_crtc const *__mptr ;
int pipe ;
uint32_t temp ;
uint32_t adder ;
{
dev = crtc->dev;
dev_priv = dev->dev_private;
__mptr = crtc;
intel_crtc = (struct intel_crtc *)((char *)__mptr - (unsigned int )(& ((struct intel_crtc *)0)->base));
pipe = intel_crtc->pipe;
temp = 0;
if (x < 0) {
temp = temp | (unsigned int )(32768 << 0);
x = - x;
} else {
}
if (y < 0) {
temp = temp | (unsigned int )(32768 << 16);
y = - y;
} else {
}
temp = temp | (unsigned int )((x & 2047) << 0);
temp = temp | (unsigned int )((y & 2047) << 16);
adder = intel_crtc->cursor_addr;
writel(temp, dev_priv->regs + (pipe == 0 ? 458888 : 458952));
writel(adder, dev_priv->regs + (pipe == 0 ? 458884 : 458948));
return (0);
}
}
void intel_crtc_fb_gamma_set(struct drm_crtc *crtc , u16 red , u16 green , u16 blue ,
int regno )
{
struct intel_crtc *intel_crtc ;
struct drm_crtc const *__mptr ;
{
__mptr = crtc;
intel_crtc = (struct intel_crtc *)((char *)__mptr - (unsigned int )(& ((struct intel_crtc *)0)->base));
intel_crtc->lut_r[regno] = (int )red >> 8;
intel_crtc->lut_g[regno] = (int )green >> 8;
intel_crtc->lut_b[regno] = (int )blue >> 8;
return;
}
}
static void intel_crtc_gamma_set(struct drm_crtc *crtc , u16 *red , u16 *green , u16 *blue ,
uint32_t size )
{
struct intel_crtc *intel_crtc ;
struct drm_crtc const *__mptr ;
int i ;
{
__mptr = crtc;
intel_crtc = (struct intel_crtc *)((char *)__mptr - (unsigned int )(& ((struct intel_crtc *)0)->base));
if (size != (uint32_t )256) {
return;
} else {
}
i = 0;
while (1) {
if (i < 256) {
} else {
break;
}
intel_crtc->lut_r[i] = (int )*(red + i) >> 8;
intel_crtc->lut_g[i] = (int )*(green + i) >> 8;
intel_crtc->lut_b[i] = (int )*(blue + i) >> 8;
i = i + 1;
}
intel_crtc_load_lut(crtc);
return;
}
}
static struct drm_display_mode load_detect_mode =
{{0, 0}, {0U, 0U}, {'6', '4', '0', 'x', '4', '8', '0', '\000'}, 0, 0, 1 << 4, 31500,
640, 664, 704, 832, 0, 480, 489, 491, 520, 0, (1 << 1) | (1 << 3), 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0.f};
struct drm_crtc *intel_get_load_detect_pipe(struct intel_output *intel_output , struct drm_display_mode *mode ,
int *dpms_mode )
{
struct intel_crtc *intel_crtc ;
struct drm_crtc *possible_crtc ;
struct drm_crtc *supported_crtc ;
struct drm_encoder *encoder ;
struct drm_crtc *crtc ;
struct drm_device *dev ;
struct drm_encoder_helper_funcs *encoder_funcs ;
struct drm_crtc_helper_funcs *crtc_funcs ;
int i ;
struct drm_crtc const *__mptr ;
struct list_head const *__mptr___0 ;
struct list_head const *__mptr___1 ;
struct drm_crtc const *__mptr___2 ;
{
supported_crtc = (void *)0;
encoder = & intel_output->enc;
crtc = (void *)0;
dev = encoder->dev;
encoder_funcs = encoder->helper_private;
i = -1;
if (encoder->crtc) {
crtc = encoder->crtc;
__mptr = crtc;
intel_crtc = (struct intel_crtc *)((char *)__mptr - (unsigned int )(& ((struct intel_crtc *)0)->base));
*dpms_mode = intel_crtc->dpms_mode;
if (intel_crtc->dpms_mode != 0) {
crtc_funcs = crtc->helper_private;
(*(crtc_funcs->dpms))(crtc, 0);
(*(encoder_funcs->dpms))(encoder, 0);
} else {
}
return (crtc);
} else {
}
__mptr___0 = dev->mode_config.crtc_list.next;
possible_crtc = (struct drm_crtc *)((char *)__mptr___0 - (unsigned int )(& ((struct drm_crtc *)0)->head));
while (1) {
__builtin_prefetch(possible_crtc->head.next);
if ((unsigned long )(& possible_crtc->head) != (unsigned long )(& dev->mode_config.crtc_list)) {
} else {
break;
}
i = i + 1;
if (! (encoder->possible_crtcs & (unsigned int )(1 << i))) {
goto __Cont;
} else {
}
if (! possible_crtc->enabled) {
crtc = possible_crtc;
break;
} else {
}
if (! supported_crtc) {
supported_crtc = possible_crtc;
} else {
}
__Cont: /* CIL Label */
__mptr___1 = possible_crtc->head.next;
possible_crtc = (struct drm_crtc *)((char *)__mptr___1 - (unsigned int )(& ((struct drm_crtc *)0)->head));
}
if (! crtc) {
return ((void *)0);
} else {
}
encoder->crtc = crtc;
intel_output->load_detect_temp = true;
__mptr___2 = crtc;
intel_crtc = (struct intel_crtc *)((char *)__mptr___2 - (unsigned int )(& ((struct intel_crtc *)0)->base));
*dpms_mode = intel_crtc->dpms_mode;
if (! crtc->enabled) {
if (! mode) {
mode = & load_detect_mode;
} else {
}
drm_crtc_helper_set_mode(crtc, mode, 0, 0, crtc->fb);
} else {
if (intel_crtc->dpms_mode != 0) {
crtc_funcs = crtc->helper_private;
(*(crtc_funcs->dpms))(crtc, 0);
} else {
}
(*(encoder_funcs->mode_set))(encoder, & crtc->mode, & crtc->mode);
(*(encoder_funcs->commit))(encoder);
}
intel_wait_for_vblank(dev);
return (crtc);
}
}
void intel_release_load_detect_pipe(struct intel_output *intel_output , int dpms_mode )
{
struct drm_encoder *encoder ;
struct drm_device *dev ;
struct drm_crtc *crtc ;
struct drm_encoder_helper_funcs *encoder_funcs ;
struct drm_crtc_helper_funcs *crtc_funcs ;
{
encoder = & intel_output->enc;
dev = encoder->dev;
crtc = encoder->crtc;
encoder_funcs = encoder->helper_private;
crtc_funcs = crtc->helper_private;
if (intel_output->load_detect_temp) {
encoder->crtc = (void *)0;
intel_output->load_detect_temp = false;
crtc->enabled = drm_helper_crtc_in_use(crtc);
drm_helper_disable_unused_functions(dev);
} else {
}
if (crtc->enabled && dpms_mode != 0) {
if ((unsigned long )encoder->crtc == (unsigned long )crtc) {
(*(encoder_funcs->dpms))(encoder, dpms_mode);
} else {
}
(*(crtc_funcs->dpms))(crtc, dpms_mode);
} else {
}
return;
}
}
static int intel_crtc_clock_get(struct drm_device *dev , struct drm_crtc *crtc )
{
struct drm_i915_private *dev_priv ;
struct intel_crtc *intel_crtc ;
struct drm_crtc const *__mptr ;
int pipe ;
u32 dpll ;
unsigned int tmp ;
u32 fp ;
intel_clock_t clock ;
bool is_lvds ;
unsigned int tmp___0 ;
int tmp___1 ;
{
dev_priv = dev->dev_private;
__mptr = crtc;
intel_crtc = (struct intel_crtc *)((char *)__mptr - (unsigned int )(& ((struct intel_crtc *)0)->base));
pipe = intel_crtc->pipe;
tmp = readl(dev_priv->regs + (pipe == 0 ? 24596 : 24600));
dpll = tmp;
if ((dpll & (unsigned int )(1 << 8)) == 0U) {
fp = readl(dev_priv->regs + (pipe == 0 ? 24640 : 24648));
} else {
fp = readl(dev_priv->regs + (pipe == 0 ? 24644 : 24652));
}
clock.m1 = (fp & 16128U) >> 8;
clock.m2 = (fp & 63U) >> 0;
clock.n = (fp & 4128768U) >> 16;
if ((((((dev->pci_device == 9602 || dev->pci_device == 9610) || dev->pci_device == 9618) || dev->pci_device == 10098) || (dev->pci_device == 10146 || dev->pci_device == 10158)) || (((((((((dev->pci_device == 10610 || dev->pci_device == 10626) || dev->pci_device == 10642) || dev->pci_device == 10658) || dev->pci_device == 10754) || dev->pci_device == 10770) || dev->pci_device == 10818) || dev->pci_device == 11778) || dev->pci_device == 11794) || dev->pci_device == 11810)) || ((dev->pci_device == 10690 || dev->pci_device == 10674) || dev->pci_device == 10706)) {
clock.p1 = ffs((dpll & 16711680U) >> 16);
switch (dpll & (unsigned int )(3 << 26)) {
case (unsigned int )(1 << 26):
clock.p2 = dpll & (unsigned int )(1 << 24) ? 5 : 10;
break;
case (unsigned int )(2 << 26):
clock.p2 = dpll & (unsigned int )(1 << 24) ? 7 : 14;
break;
default:
while (1) {
if (drm_debug) {
printk("<7>[drm:%s] Unknown DPLL mode %08x in programmed mode\n", "intel_crtc_clock_get",
(int )(dpll & (unsigned int )(3 << 26)));
} else {
}
break;
}
return (0);
}
i9xx_clock(96000, & clock);
} else {
if (pipe == 1) {
tmp___0 = readl(dev_priv->regs + 397696);
if (tmp___0 & (unsigned int )(1 << 31)) {
tmp___1 = 1;
} else {
tmp___1 = 0;
}
} else {
tmp___1 = 0;
}
is_lvds = tmp___1;
if (is_lvds) {
clock.p1 = ffs((dpll & 4128768U) >> 16);
clock.p2 = 14;
if ((dpll & (unsigned int )(3 << 13)) == (unsigned int )(3 << 13)) {
i8xx_clock(66000, & clock);
} else {
i8xx_clock(48000, & clock);
}
} else {
if (dpll & (unsigned int )(1 << 21)) {
clock.p1 = 2;
} else {
clock.p1 = ((dpll & 2031616U) >> 16) + 2U;
}
if (dpll & (unsigned int )(1 << 23)) {
clock.p2 = 4;
} else {
clock.p2 = 2;
}
i8xx_clock(48000, & clock);
}
}
return (clock.dot);
}
}
struct drm_display_mode *intel_crtc_mode_get(struct drm_device *dev , struct drm_crtc *crtc )
{
struct drm_i915_private *dev_priv ;
struct intel_crtc *intel_crtc ;
struct drm_crtc const *__mptr ;
int pipe ;
struct drm_display_mode *mode ;
int htot ;
unsigned int tmp ;
int hsync ;
unsigned int tmp___0 ;
int vtot ;
unsigned int tmp___1 ;
int vsync ;
unsigned int tmp___2 ;
void *tmp___3 ;
{
dev_priv = dev->dev_private;
__mptr = crtc;
intel_crtc = (struct intel_crtc *)((char *)__mptr - (unsigned int )(& ((struct intel_crtc *)0)->base));
pipe = intel_crtc->pipe;
tmp = readl(dev_priv->regs + (pipe == 0 ? 393216 : 397312));
htot = tmp;
tmp___0 = readl(dev_priv->regs + (pipe == 0 ? 393224 : 397320));
hsync = tmp___0;
tmp___1 = readl(dev_priv->regs + (pipe == 0 ? 393228 : 397324));
vtot = tmp___1;
tmp___2 = readl(dev_priv->regs + (pipe == 0 ? 393236 : 397332));
vsync = tmp___2;
tmp___3 = kzalloc(sizeof(*mode), (16U | 64U) | 128U);
mode = tmp___3;
if (! mode) {
return ((void *)0);
} else {
}
mode->clock = intel_crtc_clock_get(dev, crtc);
mode->hdisplay = (htot & 65535) + 1;
mode->htotal = (((unsigned int )htot & 4294901760U) >> 16) + 1U;
mode->hsync_start = (hsync & 65535) + 1;
mode->hsync_end = (((unsigned int )hsync & 4294901760U) >> 16) + 1U;
mode->vdisplay = (vtot & 65535) + 1;
mode->vtotal = (((unsigned int )vtot & 4294901760U) >> 16) + 1U;
mode->vsync_start = (vsync & 65535) + 1;
mode->vsync_end = (((unsigned int )vsync & 4294901760U) >> 16) + 1U;
drm_mode_set_name(mode);
drm_mode_set_crtcinfo(mode, 0);
return (mode);
}
}
static void intel_crtc_destroy(struct drm_crtc *crtc )
{
struct intel_crtc *intel_crtc ;
struct drm_crtc const *__mptr ;
{
__mptr = crtc;
intel_crtc = (struct intel_crtc *)((char *)__mptr - (unsigned int )(& ((struct intel_crtc *)0)->base));
drm_crtc_cleanup(crtc);
kfree(intel_crtc);
return;
}
}
static struct drm_crtc_helper_funcs const intel_helper_funcs = {& intel_crtc_dpms, & intel_crtc_prepare, & intel_crtc_commit, & intel_crtc_mode_fixup,
& intel_crtc_mode_set, & intel_pipe_set_base};
static struct drm_crtc_funcs const intel_crtc_funcs = {0, 0, & intel_crtc_cursor_set, & intel_crtc_cursor_move, & intel_crtc_gamma_set,
& intel_crtc_destroy, & drm_crtc_helper_set_config};
static void intel_crtc_init(struct drm_device *dev , int pipe )
{
struct intel_crtc *intel_crtc ;
int i ;
void *tmp ;
{
tmp = kzalloc(sizeof(struct intel_crtc ) + 4UL * sizeof(struct drm_connector *),
(16U | 64U) | 128U);
intel_crtc = tmp;
if ((unsigned long )intel_crtc == (unsigned long )((void *)0)) {
return;
} else {
}
drm_crtc_init(dev, & intel_crtc->base, & intel_crtc_funcs);
drm_mode_crtc_set_gamma_size(& intel_crtc->base, 256);
intel_crtc->pipe = pipe;
i = 0;
while (1) {
if (i < 256) {
} else {
break;
}
intel_crtc->lut_r[i] = i;
intel_crtc->lut_g[i] = i;
intel_crtc->lut_b[i] = i;
i = i + 1;
}
intel_crtc->cursor_addr = 0;
intel_crtc->dpms_mode = 3;
drm_crtc_helper_add(& intel_crtc->base, & intel_helper_funcs);
intel_crtc->mode_set.crtc = & intel_crtc->base;
intel_crtc->mode_set.connectors = (struct drm_connector **)(intel_crtc + 1);
intel_crtc->mode_set.num_connectors = 0;
return;
}
}
struct drm_crtc *intel_get_crtc_from_pipe(struct drm_device *dev , int pipe )
{
struct drm_crtc *crtc ;
struct list_head const *__mptr ;
struct list_head const *__mptr___0 ;
struct intel_crtc *intel_crtc ;
struct drm_crtc const *__mptr___1 ;
{
crtc = (void *)0;
__mptr = dev->mode_config.crtc_list.next;
crtc = (struct drm_crtc *)((char *)__mptr - (unsigned int )(& ((struct drm_crtc *)0)->head));
while (1) {
__builtin_prefetch(crtc->head.next);
if ((unsigned long )(& crtc->head) != (unsigned long )(& dev->mode_config.crtc_list)) {
} else {
break;
}
__mptr___1 = crtc;
intel_crtc = (struct intel_crtc *)((char *)__mptr___1 - (unsigned int )(& ((struct intel_crtc *)0)->base));
if (intel_crtc->pipe == pipe) {
break;
} else {
}
__mptr___0 = crtc->head.next;
crtc = (struct drm_crtc *)((char *)__mptr___0 - (unsigned int )(& ((struct drm_crtc *)0)->head));
}
return (crtc);
}
}
static int intel_connector_clones(struct drm_device *dev , int type_mask )
{
int index_mask ;
struct drm_connector *connector ;
int entry ;
struct list_head const *__mptr ;
struct list_head const *__mptr___0 ;
struct intel_output *intel_output ;
struct drm_connector const *__mptr___1 ;
{
index_mask = 0;
entry = 0;
__mptr = dev->mode_config.connector_list.next;
connector = (struct drm_connector *)((char *)__mptr - (unsigned int )(& ((struct drm_connector *)0)->head));
while (1) {
__builtin_prefetch(connector->head.next);
if ((unsigned long )(& connector->head) != (unsigned long )(& dev->mode_config.connector_list)) {
} else {
break;
}
__mptr___1 = connector;
intel_output = (struct intel_output *)((char *)__mptr___1 - (unsigned int )(& ((struct intel_output *)0)->base));
if (type_mask & (1 << intel_output->type)) {
index_mask = index_mask | (1 << entry);
} else {
}
entry = entry + 1;
__mptr___0 = connector->head.next;
connector = (struct drm_connector *)((char *)__mptr___0 - (unsigned int )(& ((struct drm_connector *)0)->head));
}
return (index_mask);
}
}
static void intel_setup_outputs(struct drm_device *dev )
{
struct drm_connector *connector ;
struct list_head const *__mptr ;
struct list_head const *__mptr___0 ;
struct intel_output *intel_output ;
struct drm_connector const *__mptr___1 ;
struct drm_encoder *encoder ;
int crtc_mask ;
int clone_mask ;
int tmp ;
{
intel_crt_init(dev);
if ((((((dev->pci_device == 13687 || dev->pci_device == 13698) || dev->pci_device == 9618) || (dev->pci_device == 10146 || dev->pci_device == 10158)) || dev->pci_device == 10754) || dev->pci_device == 10818) && ! (dev->pci_device == 13687)) {
intel_lvds_init(dev);
} else {
}
if ((((((dev->pci_device == 9602 || dev->pci_device == 9610) || dev->pci_device == 9618) || dev->pci_device == 10098) || (dev->pci_device == 10146 || dev->pci_device == 10158)) || (((((((((dev->pci_device == 10610 || dev->pci_device == 10626) || dev->pci_device == 10642) || dev->pci_device == 10658) || dev->pci_device == 10754) || dev->pci_device == 10770) || dev->pci_device == 10818) || dev->pci_device == 11778) || dev->pci_device == 11794) || dev->pci_device == 11810)) || ((dev->pci_device == 10690 || dev->pci_device == 10674) || dev->pci_device == 10706)) {
intel_sdvo_init(dev, 397632);
intel_sdvo_init(dev, 397664);
} else {
intel_dvo_init(dev);
}
if (((((((dev->pci_device == 9602 || dev->pci_device == 9610) || dev->pci_device == 9618) || dev->pci_device == 10098) || (dev->pci_device == 10146 || dev->pci_device == 10158)) || (((((((((dev->pci_device == 10610 || dev->pci_device == 10626) || dev->pci_device == 10642) || dev->pci_device == 10658) || dev->pci_device == 10754) || dev->pci_device == 10770) || dev->pci_device == 10818) || dev->pci_device == 11778) || dev->pci_device == 11794) || dev->pci_device == 11810)) || ((dev->pci_device == 10690 || dev->pci_device == 10674) || dev->pci_device == 10706)) && ! (dev->pci_device == 9602 || dev->pci_device == 9610)) {
intel_tv_init(dev);
} else {
}
__mptr = dev->mode_config.connector_list.next;
connector = (struct drm_connector *)((char *)__mptr - (unsigned int )(& ((struct drm_connector *)0)->head));
while (1) {
__builtin_prefetch(connector->head.next);
if ((unsigned long )(& connector->head) != (unsigned long )(& dev->mode_config.connector_list)) {
} else {
break;
}
__mptr___1 = connector;
intel_output = (struct intel_output *)((char *)__mptr___1 - (unsigned int )(& ((struct intel_output *)0)->base));
encoder = & intel_output->enc;
crtc_mask = 0;
clone_mask = 0;
switch (intel_output->type) {
case 3:
case 2:
crtc_mask = (1 << 0) | (1 << 1);
clone_mask = ((1 << 1) | (1 << 2)) | (1 << 3);
break;
case 1:
crtc_mask = (1 << 0) | (1 << 1);
clone_mask = ((1 << 1) | (1 << 2)) | (1 << 3);
break;
case 4:
crtc_mask = 1 << 1;
clone_mask = 1 << 4;
break;
case 5:
crtc_mask = (1 << 0) | (1 << 1);
clone_mask = 1 << 5;
break;
}
encoder->possible_crtcs = crtc_mask;
tmp = intel_connector_clones(dev, clone_mask);
encoder->possible_clones = tmp;
__mptr___0 = connector->head.next;
connector = (struct drm_connector *)((char *)__mptr___0 - (unsigned int )(& ((struct drm_connector *)0)->head));
}
return;
}
}
static void intel_user_framebuffer_destroy(struct drm_framebuffer *fb )
{
struct intel_framebuffer *intel_fb ;
struct drm_framebuffer const *__mptr ;
struct drm_device *dev ;
{
__mptr = fb;
intel_fb = (struct intel_framebuffer *)((char *)__mptr - (unsigned int )(& ((struct intel_framebuffer *)0)->base));
dev = fb->dev;
if (fb->fbdev) {
intelfb_remove(dev, fb);
} else {
}
drm_framebuffer_cleanup(fb);
mutex_lock_nested(& dev->struct_mutex, 0);
drm_gem_object_unreference(intel_fb->obj);
mutex_unlock(& dev->struct_mutex);
kfree(intel_fb);
return;
}
}
static int intel_user_framebuffer_create_handle(struct drm_framebuffer *fb , struct drm_file *file_priv ,
unsigned int *handle )
{
struct intel_framebuffer *intel_fb ;
struct drm_framebuffer const *__mptr ;
struct drm_gem_object *object ;
int tmp ;
{
__mptr = fb;
intel_fb = (struct intel_framebuffer *)((char *)__mptr - (unsigned int )(& ((struct intel_framebuffer *)0)->base));
object = intel_fb->obj;
tmp = drm_gem_handle_create(file_priv, object, handle);
return (tmp);
}
}
static struct drm_framebuffer_funcs const intel_fb_funcs = {& intel_user_framebuffer_destroy, & intel_user_framebuffer_create_handle};
int intel_framebuffer_create(struct drm_device *dev , struct drm_mode_fb_cmd *mode_cmd ,
struct drm_framebuffer **fb , struct drm_gem_object *obj )
{
struct intel_framebuffer *intel_fb ;
int ret ;
void *tmp ;
{
tmp = kzalloc(sizeof(*intel_fb), (16U | 64U) | 128U);
intel_fb = tmp;
if (! intel_fb) {
return (-12);
} else {
}
ret = drm_framebuffer_init(dev, & intel_fb->base, & intel_fb_funcs);
if (ret) {
printk("<3>[drm:%s] *ERROR* framebuffer init failed %d\n", "intel_framebuffer_create",
ret);
return (ret);
} else {
}
drm_helper_mode_fill_fb_struct(& intel_fb->base, mode_cmd);
intel_fb->obj = obj;
*fb = & intel_fb->base;
return (0);
}
}
static struct drm_framebuffer *intel_user_framebuffer_create(struct drm_device *dev ,
struct drm_file *filp ,
struct drm_mode_fb_cmd *mode_cmd )
{
struct drm_gem_object *obj ;
struct drm_framebuffer *fb ;
int ret ;
{
obj = drm_gem_object_lookup(dev, filp, mode_cmd->handle);
if (! obj) {
return ((void *)0);
} else {
}
ret = intel_framebuffer_create(dev, mode_cmd, & fb, obj);
if (ret) {
drm_gem_object_unreference(obj);
return ((void *)0);
} else {
}
return (fb);
}
}
static struct drm_mode_config_funcs const intel_mode_funcs = {& intel_user_framebuffer_create, & intelfb_probe};
void intel_modeset_init(struct drm_device *dev )
{
int num_pipe ;
int i ;
{
drm_mode_config_init(dev);
dev->mode_config.min_width = 0;
dev->mode_config.min_height = 0;
dev->mode_config.funcs = (void *)(& intel_mode_funcs);
if (((((((((dev->pci_device == 10610 || dev->pci_device == 10626) || dev->pci_device == 10642) || dev->pci_device == 10658) || dev->pci_device == 10754) || dev->pci_device == 10770) || dev->pci_device == 10818) || dev->pci_device == 11778) || dev->pci_device == 11794) || dev->pci_device == 11810) {
dev->mode_config.max_width = 8192;
dev->mode_config.max_height = 8192;
} else {
dev->mode_config.max_width = 2048;
dev->mode_config.max_height = 2048;
}
if ((((((dev->pci_device == 9602 || dev->pci_device == 9610) || dev->pci_device == 9618) || dev->pci_device == 10098) || (dev->pci_device == 10146 || dev->pci_device == 10158)) || (((((((((dev->pci_device == 10610 || dev->pci_device == 10626) || dev->pci_device == 10642) || dev->pci_device == 10658) || dev->pci_device == 10754) || dev->pci_device == 10770) || dev->pci_device == 10818) || dev->pci_device == 11778) || dev->pci_device == 11794) || dev->pci_device == 11810)) || ((dev->pci_device == 10690 || dev->pci_device == 10674) || dev->pci_device == 10706)) {
dev->mode_config.fb_base = (dev->pdev)->resource[2].start;
} else {
dev->mode_config.fb_base = (dev->pdev)->resource[0].start;
}
if ((((((dev->pci_device == 13687 || dev->pci_device == 13698) || dev->pci_device == 9618) || (dev->pci_device == 10146 || dev->pci_device == 10158)) || dev->pci_device == 10754) || dev->pci_device == 10818) || ((((((dev->pci_device == 9602 || dev->pci_device == 9610) || dev->pci_device == 9618) || dev->pci_device == 10098) || (dev->pci_device == 10146 || dev->pci_device == 10158)) || (((((((((dev->pci_device == 10610 || dev->pci_device == 10626) || dev->pci_device == 10642) || dev->pci_device == 10658) || dev->pci_device == 10754) || dev->pci_device == 10770) || dev->pci_device == 10818) || dev->pci_device == 11778) || dev->pci_device == 11794) || dev->pci_device == 11810)) || ((dev->pci_device == 10690 || dev->pci_device == 10674) || dev->pci_device == 10706))) {
num_pipe = 2;
} else {
num_pipe = 1;
}
while (1) {
if (drm_debug) {
printk("<7>[drm:%s] %d display pipe%s available.\n", "intel_modeset_init", num_pipe,
num_pipe > 1 ? "s" : "");
} else {
}
break;
}
i = 0;
while (1) {
if (i < num_pipe) {
} else {
break;
}
intel_crtc_init(dev, i);
i = i + 1;
}
intel_setup_outputs(dev);
return;
}
}
void intel_modeset_cleanup(struct drm_device *dev )
{
{
drm_mode_config_cleanup(dev);
return;
}
}
struct drm_encoder *intel_best_encoder(struct drm_connector *connector )
{
struct intel_output *intel_output ;
struct drm_connector const *__mptr ;
{
__mptr = connector;
intel_output = (struct intel_output *)((char *)__mptr - (unsigned int )(& ((struct intel_output *)0)->base));
return (& intel_output->enc);
}
}
void ldv_main9_sequence_infinite_withcheck_stateful(void)
{
struct drm_crtc *var_group1 ;
int var_intel_crtc_dpms_9_p1 ;
struct drm_display_mode *var_group2 ;
struct drm_display_mode *var_intel_crtc_mode_fixup_14_p2 ;
struct drm_display_mode *var_intel_crtc_mode_set_17_p2 ;
int var_intel_crtc_mode_set_17_p3 ;
int var_intel_crtc_mode_set_17_p4 ;
struct drm_framebuffer *var_intel_crtc_mode_set_17_p5 ;
int var_intel_pipe_set_base_8_p1 ;
int var_intel_pipe_set_base_8_p2 ;
struct drm_framebuffer *var_intel_pipe_set_base_8_p3 ;
struct drm_file *var_group3 ;
uint32_t var_intel_crtc_cursor_set_19_p2 ;
uint32_t var_intel_crtc_cursor_set_19_p3 ;
uint32_t var_intel_crtc_cursor_set_19_p4 ;
int var_intel_crtc_cursor_move_20_p1 ;
int var_intel_crtc_cursor_move_20_p2 ;
u16 *var_intel_crtc_gamma_set_22_p1 ;
u16 *var_intel_crtc_gamma_set_22_p2 ;
u16 *var_intel_crtc_gamma_set_22_p3 ;
uint32_t var_intel_crtc_gamma_set_22_p4 ;
struct drm_framebuffer *var_group4 ;
unsigned int *var_intel_user_framebuffer_create_handle_33_p2 ;
struct drm_device *var_group5 ;
struct drm_mode_fb_cmd *var_intel_user_framebuffer_create_35_p2 ;
int tmp ;
int tmp___0 ;
{
LDV_IN_INTERRUPT = 1;
ldv_initialize();
while (1) {
tmp___0 = nondet_int();
if (tmp___0) {
} else {
break;
}
tmp = nondet_int();
switch (tmp) {
case 0:
ldv_handler_precall();
intel_crtc_dpms(var_group1, var_intel_crtc_dpms_9_p1);
break;
case 1:
ldv_handler_precall();
intel_crtc_mode_fixup(var_group1, var_group2, var_intel_crtc_mode_fixup_14_p2);
break;
case 2:
ldv_handler_precall();
intel_crtc_mode_set(var_group1, var_group2, var_intel_crtc_mode_set_17_p2, var_intel_crtc_mode_set_17_p3,
var_intel_crtc_mode_set_17_p4, var_intel_crtc_mode_set_17_p5);
break;
case 3:
ldv_handler_precall();
intel_pipe_set_base(var_group1, var_intel_pipe_set_base_8_p1, var_intel_pipe_set_base_8_p2,
var_intel_pipe_set_base_8_p3);
break;
case 4:
ldv_handler_precall();
intel_crtc_prepare(var_group1);
break;
case 5:
ldv_handler_precall();
intel_crtc_commit(var_group1);
break;
case 6:
ldv_handler_precall();
intel_crtc_cursor_set(var_group1, var_group3, var_intel_crtc_cursor_set_19_p2,
var_intel_crtc_cursor_set_19_p3, var_intel_crtc_cursor_set_19_p4);
break;
case 7:
ldv_handler_precall();
intel_crtc_cursor_move(var_group1, var_intel_crtc_cursor_move_20_p1, var_intel_crtc_cursor_move_20_p2);
break;
case 8:
ldv_handler_precall();
intel_crtc_gamma_set(var_group1, var_intel_crtc_gamma_set_22_p1, var_intel_crtc_gamma_set_22_p2,
var_intel_crtc_gamma_set_22_p3, var_intel_crtc_gamma_set_22_p4);
break;
case 9:
ldv_handler_precall();
intel_crtc_destroy(var_group1);
break;
case 10:
ldv_handler_precall();
intel_user_framebuffer_destroy(var_group4);
break;
case 11:
ldv_handler_precall();
intel_user_framebuffer_create_handle(var_group4, var_group3, var_intel_user_framebuffer_create_handle_33_p2);
break;
case 12:
ldv_handler_precall();
intel_user_framebuffer_create(var_group5, var_group3, var_intel_user_framebuffer_create_35_p2);
break;
default:
break;
}
}
ldv_check_final_state();
return;
}
}
extern unsigned long msecs_to_jiffies(unsigned int const m ) ;
__inline static char const *dev_name(struct device const *dev )
{
{
return (dev->bus_id);
}
}
extern char const *dev_driver_string(struct device const *dev ) ;
extern void drm_connector_init(struct drm_device *dev , struct drm_connector *connector ,
struct drm_connector_funcs const *funcs , int connector_type ) ;
extern void drm_connector_cleanup(struct drm_connector *connector ) ;
extern void drm_encoder_init(struct drm_device *dev , struct drm_encoder *encoder ,
struct drm_encoder_funcs const *funcs , int encoder_type ) ;
extern void drm_encoder_cleanup(struct drm_encoder *encoder ) ;
extern int drm_mode_connector_attach_encoder(struct drm_connector *connector , struct drm_encoder *encoder ) ;
extern int drm_sysfs_connector_add(struct drm_connector *connector ) ;
extern void drm_sysfs_connector_remove(struct drm_connector *connector ) ;
extern void drm_helper_probe_single_connector_modes(struct drm_connector *connector ,
uint32_t maxX , uint32_t maxY ) ;
__inline static void drm_encoder_helper_add(struct drm_encoder *encoder , struct drm_encoder_helper_funcs const *funcs )
{
{
encoder->helper_private = (void *)funcs;
return;
}
}
__inline static void drm_connector_helper_add(struct drm_connector *connector , struct drm_connector_helper_funcs const *funcs )
{
{
connector->helper_private = (void *)funcs;
return;
}
}
struct intel_i2c_chan *intel_i2c_create(struct drm_device *dev , u32 const reg ,
char const *name ) ;
void intel_i2c_destroy(struct intel_i2c_chan *chan ) ;
int intel_ddc_get_modes(struct intel_output *intel_output ) ;
bool intel_ddc_probe(struct intel_output *intel_output ) ;
static void intel_crt_dpms(struct drm_encoder *encoder , int mode )
{
struct drm_device *dev ;
struct drm_i915_private *dev_priv ;
u32 temp ;
{
dev = encoder->dev;
dev_priv = dev->dev_private;
temp = readl(dev_priv->regs + 397568);
temp = temp & (unsigned int )(~ ((1 << 10) | (1 << 11)));
temp = temp & (unsigned int )(~ (1 << 31));
switch (mode) {
case 0:
temp = temp | (unsigned int )(1 << 31);
break;
case 1:
temp = temp | (unsigned int )((1 << 31) | (1 << 10));
break;
case 2:
temp = temp | (unsigned int )((1 << 31) | (1 << 11));
break;
case 3:
temp = temp | (unsigned int )((1 << 10) | (1 << 11));
break;
}
writel(temp, dev_priv->regs + 397568);
return;
}
}
static int intel_crt_mode_valid(struct drm_connector *connector , struct drm_display_mode *mode )
{
{
if (mode->flags & (unsigned int )(1 << 5)) {
return (MODE_NO_DBLESCAN);
} else {
}
if (mode->clock > 400000 || mode->clock < 25000) {
return (MODE_CLOCK_RANGE);
} else {
}
return (MODE_OK);
}
}
static bool intel_crt_mode_fixup(struct drm_encoder *encoder , struct drm_display_mode *mode ,
struct drm_display_mode *adjusted_mode )
{
{
return (true);
}
}
static void intel_crt_mode_set(struct drm_encoder *encoder , struct drm_display_mode *mode ,
struct drm_display_mode *adjusted_mode )
{
struct drm_device *dev ;
struct drm_crtc *crtc ;
struct intel_crtc *intel_crtc ;
struct drm_crtc const *__mptr ;
struct drm_i915_private *dev_priv ;
int dpll_md_reg ;
u32 adpa ;
u32 dpll_md ;
{
dev = encoder->dev;
crtc = encoder->crtc;
__mptr = crtc;
intel_crtc = (struct intel_crtc *)((char *)__mptr - (unsigned int )(& ((struct intel_crtc *)0)->base));
dev_priv = dev->dev_private;
if (intel_crtc->pipe == 0) {
dpll_md_reg = 24604;
} else {
dpll_md_reg = 24608;
}
if (((((((((dev->pci_device == 10610 || dev->pci_device == 10626) || dev->pci_device == 10642) || dev->pci_device == 10658) || dev->pci_device == 10754) || dev->pci_device == 10770) || dev->pci_device == 10818) || dev->pci_device == 11778) || dev->pci_device == 11794) || dev->pci_device == 11810) {
dpll_md = readl(dev_priv->regs + dpll_md_reg);
writel(dpll_md & (unsigned int )(~ 16128), dev_priv->regs + dpll_md_reg);
} else {
}
adpa = 0;
if (adjusted_mode->flags & (unsigned int )(1 << 0)) {
adpa = adpa | (unsigned int )(1 << 3);
} else {
}
if (adjusted_mode->flags & (unsigned int )(1 << 2)) {
adpa = adpa | (unsigned int )(1 << 4);
} else {
}
if (intel_crtc->pipe == 0) {
adpa = adpa | 0U;
} else {
adpa = adpa | (unsigned int )(1 << 30);
}
writel(adpa, dev_priv->regs + 397568);
return;
}
}
static bool intel_crt_detect_hotplug(struct drm_connector *connector )
{
struct drm_device *dev ;
struct drm_i915_private *dev_priv ;
u32 temp ;
unsigned long timeout ;
unsigned long tmp ;
unsigned int tmp___0 ;
unsigned int tmp___1 ;
{
dev = connector->dev;
dev_priv = dev->dev_private;
tmp = msecs_to_jiffies(1000);
timeout = jiffies + (unsigned long volatile )tmp;
temp = readl(dev_priv->regs + 397584);
writel((temp | (unsigned int )(1 << 3)) | (unsigned int )(1 << 5), dev_priv->regs + 397584);
while (1) {
tmp___0 = readl(dev_priv->regs + 397584);
if (tmp___0 & (unsigned int )(1 << 3)) {
} else {
break;
}
msleep(1);
if ((long )jiffies - (long )timeout < 0L) {
} else {
break;
}
}
tmp___1 = readl(dev_priv->regs + 397588);
if ((tmp___1 & (unsigned int )(3 << 8)) == (unsigned int )(3 << 8)) {
return (true);
} else {
}
return (false);
}
}
static bool intel_crt_detect_ddc(struct drm_connector *connector )
{
struct intel_output *intel_output ;
struct drm_connector const *__mptr ;
bool tmp ;
{
__mptr = connector;
intel_output = (struct intel_output *)((char *)__mptr - (unsigned int )(& ((struct intel_output *)0)->base));
if (intel_output->type != 1) {
return (false);
} else {
}
tmp = intel_ddc_probe(intel_output);
return (tmp);
}
}
static enum drm_connector_status intel_crt_detect(struct drm_connector *connector )
{
struct drm_device *dev ;
bool tmp ;
bool tmp___0 ;
{
dev = connector->dev;
if ((((((((dev->pci_device == 9602 || dev->pci_device == 9610) || dev->pci_device == 9618) || dev->pci_device == 10098) || (dev->pci_device == 10146 || dev->pci_device == 10158)) || (((((((((dev->pci_device == 10610 || dev->pci_device == 10626) || dev->pci_device == 10642) || dev->pci_device == 10658) || dev->pci_device == 10754) || dev->pci_device == 10770) || dev->pci_device == 10818) || dev->pci_device == 11778) || dev->pci_device == 11794) || dev->pci_device == 11810)) || ((dev->pci_device == 10690 || dev->pci_device == 10674) || dev->pci_device == 10706)) && ! (dev->pci_device == 9602 || dev->pci_device == 9610)) && ! (dev->pci_device == 9618)) {
tmp = intel_crt_detect_hotplug(connector);
if (tmp) {
return (connector_status_connected);
} else {
return (connector_status_disconnected);
}
} else {
}
tmp___0 = intel_crt_detect_ddc(connector);
if (tmp___0) {
return (connector_status_connected);
} else {
}
return (connector_status_unknown);
}
}
static void intel_crt_destroy(struct drm_connector *connector )
{
struct intel_output *intel_output ;
struct drm_connector const *__mptr ;
{
__mptr = connector;
intel_output = (struct intel_output *)((char *)__mptr - (unsigned int )(& ((struct intel_output *)0)->base));
intel_i2c_destroy(intel_output->ddc_bus);
drm_sysfs_connector_remove(connector);
drm_connector_cleanup(connector);
kfree(connector);
return;
}
}
static int intel_crt_get_modes(struct drm_connector *connector )
{
struct intel_output *intel_output ;
struct drm_connector const *__mptr ;
int tmp ;
{
__mptr = connector;
intel_output = (struct intel_output *)((char *)__mptr - (unsigned int )(& ((struct intel_output *)0)->base));
tmp = intel_ddc_get_modes(intel_output);
return (tmp);
}
}
static int intel_crt_set_property(struct drm_connector *connector , struct drm_property *property ,
uint64_t value )
{
struct drm_device *dev ;
{
dev = connector->dev;
if ((unsigned long )property == (unsigned long )dev->mode_config.dpms_property && connector->encoder) {
intel_crt_dpms(connector->encoder, (uint32_t )(value & 15ULL));
} else {
}
return (0);
}
}
static struct drm_encoder_helper_funcs const intel_crt_helper_funcs =
{& intel_crt_dpms, 0, 0, & intel_crt_mode_fixup, & intel_encoder_prepare, & intel_encoder_commit,
& intel_crt_mode_set, 0};
static struct drm_connector_funcs const intel_crt_connector_funcs = {0, 0, 0, & intel_crt_detect, & drm_helper_probe_single_connector_modes, & intel_crt_set_property,
& intel_crt_destroy};
static struct drm_connector_helper_funcs const intel_crt_connector_helper_funcs = {& intel_crt_get_modes,
& intel_crt_mode_valid, & intel_best_encoder};
static void intel_crt_enc_destroy(struct drm_encoder *encoder )
{
{
drm_encoder_cleanup(encoder);
return;
}
}
static struct drm_encoder_funcs const intel_crt_enc_funcs = {& intel_crt_enc_destroy};
void intel_crt_init(struct drm_device *dev )
{
struct drm_connector *connector ;
struct intel_output *intel_output ;
void *tmp ;
char const *tmp___0 ;
char const *tmp___1 ;
{
tmp = kzalloc(sizeof(struct intel_output ), (16U | 64U) | 128U);
intel_output = tmp;
if (! intel_output) {
return;
} else {
}
connector = & intel_output->base;
drm_connector_init(dev, & intel_output->base, & intel_crt_connector_funcs, 1);
drm_encoder_init(dev, & intel_output->enc, & intel_crt_enc_funcs, 1);
drm_mode_connector_attach_encoder(& intel_output->base, & intel_output->enc);
intel_output->ddc_bus = intel_i2c_create(dev, 20496, "CRTDDC_A");
if (! intel_output->ddc_bus) {
tmp___0 = dev_name(& (dev->pdev)->dev);
tmp___1 = dev_driver_string(& (dev->pdev)->dev);
printk("<3>%s %s: DDC bus registration failed.\n", tmp___1, tmp___0);
return;
} else {
}
intel_output->type = 1;
connector->interlace_allowed = 0;
connector->doublescan_allowed = 0;
drm_encoder_helper_add(& intel_output->enc, & intel_crt_helper_funcs);
drm_connector_helper_add(connector, & intel_crt_connector_helper_funcs);
drm_sysfs_connector_add(connector);
return;
}
}
void ldv_main10_sequence_infinite_withcheck_stateful(void)
{
struct drm_encoder *var_group1 ;
int var_intel_crt_dpms_0_p1 ;
struct drm_display_mode *var_group2 ;
struct drm_display_mode *var_intel_crt_mode_fixup_2_p2 ;
struct drm_display_mode *var_intel_crt_mode_set_3_p2 ;
struct drm_connector *var_group3 ;
struct drm_property *var_group4 ;
uint64_t var_intel_crt_set_property_9_p2 ;
int tmp ;
int tmp___0 ;
{
LDV_IN_INTERRUPT = 1;
ldv_initialize();
while (1) {
tmp___0 = nondet_int();
if (tmp___0) {
} else {
break;
}
tmp = nondet_int();
switch (tmp) {
case 0:
ldv_handler_precall();
intel_crt_dpms(var_group1, var_intel_crt_dpms_0_p1);
break;
case 1:
ldv_handler_precall();
intel_crt_mode_fixup(var_group1, var_group2, var_intel_crt_mode_fixup_2_p2);
break;
case 2:
ldv_handler_precall();
intel_crt_mode_set(var_group1, var_group2, var_intel_crt_mode_set_3_p2);
break;
case 3:
ldv_handler_precall();
intel_crt_detect(var_group3);
break;
case 4:
ldv_handler_precall();
intel_crt_destroy(var_group3);
break;
case 5:
ldv_handler_precall();
intel_crt_set_property(var_group3, var_group4, var_intel_crt_set_property_9_p2);
break;
case 6:
ldv_handler_precall();
intel_crt_mode_valid(var_group3, var_group2);
break;
case 7:
ldv_handler_precall();
intel_crt_get_modes(var_group3);
break;
case 8:
ldv_handler_precall();
intel_crt_enc_destroy(var_group1);
break;
default:
break;
}
}
ldv_check_final_state();
return;
}
}
extern void drm_mode_probed_add(struct drm_connector *connector , struct drm_display_mode *mode ) ;
extern struct drm_display_mode *drm_mode_duplicate(struct drm_device *dev , struct drm_display_mode *mode ) ;
static void intel_lvds_set_backlight(struct drm_device *dev , int level )
{
struct drm_i915_private *dev_priv ;
u32 blc_pwm_ctl ;
unsigned int tmp ;
{
dev_priv = dev->dev_private;
tmp = readl(dev_priv->regs + 397908);
blc_pwm_ctl = tmp & (unsigned int )(~ 65535);
writel(blc_pwm_ctl | (unsigned int )(level << 0), dev_priv->regs + 397908);
return;
}
}
static u32 intel_lvds_get_max_backlight(struct drm_device *dev )
{
struct drm_i915_private *dev_priv ;
unsigned int tmp ;
{
dev_priv = dev->dev_private;
tmp = readl(dev_priv->regs + 397908);
return (((tmp & (unsigned int )(32767 << 17)) >> 17) * 2U);
}
}
static void intel_lvds_set_power(struct drm_device *dev , bool on )
{
struct drm_i915_private *dev_priv ;
u32 pp_status ;
unsigned int tmp ;
unsigned int tmp___0 ;
{
dev_priv = dev->dev_private;
if (on) {
tmp = readl(dev_priv->regs + 397828);
writel(tmp | (unsigned int )(1 << 0), dev_priv->regs + 397828);
while (1) {
pp_status = readl(dev_priv->regs + 397824);
if ((pp_status & (unsigned int )(1 << 31)) == 0U) {
} else {
break;
}
}
intel_lvds_set_backlight(dev, dev_priv->backlight_duty_cycle);
} else {
intel_lvds_set_backlight(dev, 0);
tmp___0 = readl(dev_priv->regs + 397828);
writel(tmp___0 & (unsigned int )(~ (1 << 0)), dev_priv->regs + 397828);
while (1) {
pp_status = readl(dev_priv->regs + 397824);
if (pp_status & (unsigned int )(1 << 31)) {
} else {
break;
}
}
}
return;
}
}
static void intel_lvds_dpms(struct drm_encoder *encoder , int mode )
{
struct drm_device *dev ;
{
dev = encoder->dev;
if (mode == 0) {
intel_lvds_set_power(dev, true);
} else {
intel_lvds_set_power(dev, false);
}
return;
}
}
static void intel_lvds_save(struct drm_connector *connector )
{
struct drm_device *dev ;
struct drm_i915_private *dev_priv ;
u32 tmp ;
{
dev = connector->dev;
dev_priv = dev->dev_private;
dev_priv->savePP_ON = readl(dev_priv->regs + 397832);
dev_priv->savePP_OFF = readl(dev_priv->regs + 397836);
dev_priv->savePP_CONTROL = readl(dev_priv->regs + 397828);
dev_priv->savePP_DIVISOR = readl(dev_priv->regs + 397840);
dev_priv->saveBLC_PWM_CTL = readl(dev_priv->regs + 397908);
dev_priv->backlight_duty_cycle = dev_priv->saveBLC_PWM_CTL & 65535U;
if (dev_priv->backlight_duty_cycle == 0) {
tmp = intel_lvds_get_max_backlight(dev);
dev_priv->backlight_duty_cycle = tmp;
} else {
}
return;
}
}
static void intel_lvds_restore(struct drm_connector *connector )
{
struct drm_device *dev ;
struct drm_i915_private *dev_priv ;
{
dev = connector->dev;
dev_priv = dev->dev_private;
writel(dev_priv->saveBLC_PWM_CTL, dev_priv->regs + 397908);
writel(dev_priv->savePP_ON, dev_priv->regs + 397832);
writel(dev_priv->savePP_OFF, dev_priv->regs + 397836);
writel(dev_priv->savePP_DIVISOR, dev_priv->regs + 397840);
writel(dev_priv->savePP_CONTROL, dev_priv->regs + 397828);
if (dev_priv->savePP_CONTROL & (unsigned int )(1 << 0)) {
intel_lvds_set_power(dev, true);
} else {
intel_lvds_set_power(dev, false);
}
return;
}
}
static int intel_lvds_mode_valid(struct drm_connector *connector , struct drm_display_mode *mode )
{
struct drm_device *dev ;
struct drm_i915_private *dev_priv ;
struct drm_display_mode *fixed_mode ;
{
dev = connector->dev;
dev_priv = dev->dev_private;
fixed_mode = dev_priv->panel_fixed_mode;
if (fixed_mode) {
if (mode->hdisplay > fixed_mode->hdisplay) {
return (MODE_PANEL);
} else {
}
if (mode->vdisplay > fixed_mode->vdisplay) {
return (MODE_PANEL);
} else {
}
} else {
}
return (MODE_OK);
}
}
static bool intel_lvds_mode_fixup(struct drm_encoder *encoder , struct drm_display_mode *mode ,
struct drm_display_mode *adjusted_mode )
{
struct drm_device *dev ;
struct drm_i915_private *dev_priv ;
struct intel_crtc *intel_crtc ;
struct drm_crtc const *__mptr ;
struct drm_encoder *tmp_encoder ;
struct list_head const *__mptr___0 ;
struct list_head const *__mptr___1 ;
{
dev = encoder->dev;
dev_priv = dev->dev_private;
__mptr = encoder->crtc;
intel_crtc = (struct intel_crtc *)((char *)__mptr - (unsigned int )(& ((struct intel_crtc *)0)->base));
if (! (((((((((dev->pci_device == 10610 || dev->pci_device == 10626) || dev->pci_device == 10642) || dev->pci_device == 10658) || dev->pci_device == 10754) || dev->pci_device == 10770) || dev->pci_device == 10818) || dev->pci_device == 11778) || dev->pci_device == 11794) || dev->pci_device == 11810) && intel_crtc->pipe == 0) {
printk("<3>Can\'t support LVDS on pipe A\n");
return (false);
} else {
}
__mptr___0 = dev->mode_config.encoder_list.next;
tmp_encoder = (struct drm_encoder *)((char *)__mptr___0 - (unsigned int )(& ((struct drm_encoder *)0)->head));
while (1) {
__builtin_prefetch(tmp_encoder->head.next);
if ((unsigned long )(& tmp_encoder->head) != (unsigned long )(& dev->mode_config.encoder_list)) {
} else {
break;
}
if ((unsigned long )tmp_encoder != (unsigned long )encoder && (unsigned long )tmp_encoder->crtc == (unsigned long )encoder->crtc) {
printk("<3>Can\'t enable LVDS and another encoder on the same pipe\n");
return (false);
} else {
}
__mptr___1 = tmp_encoder->head.next;
tmp_encoder = (struct drm_encoder *)((char *)__mptr___1 - (unsigned int )(& ((struct drm_encoder *)0)->head));
}
if ((unsigned long )dev_priv->panel_fixed_mode != (unsigned long )((void *)0)) {
adjusted_mode->hdisplay = (dev_priv->panel_fixed_mode)->hdisplay;
adjusted_mode->hsync_start = (dev_priv->panel_fixed_mode)->hsync_start;
adjusted_mode->hsync_end = (dev_priv->panel_fixed_mode)->hsync_end;
adjusted_mode->htotal = (dev_priv->panel_fixed_mode)->htotal;
adjusted_mode->vdisplay = (dev_priv->panel_fixed_mode)->vdisplay;
adjusted_mode->vsync_start = (dev_priv->panel_fixed_mode)->vsync_start;
adjusted_mode->vsync_end = (dev_priv->panel_fixed_mode)->vsync_end;
adjusted_mode->vtotal = (dev_priv->panel_fixed_mode)->vtotal;
adjusted_mode->clock = (dev_priv->panel_fixed_mode)->clock;
drm_mode_set_crtcinfo(adjusted_mode, 1);
} else {
}
return (true);
}
}
static void intel_lvds_prepare(struct drm_encoder *encoder )
{
struct drm_device *dev ;
struct drm_i915_private *dev_priv ;
{
dev = encoder->dev;
dev_priv = dev->dev_private;
dev_priv->saveBLC_PWM_CTL = readl(dev_priv->regs + 397908);
dev_priv->backlight_duty_cycle = dev_priv->saveBLC_PWM_CTL & 65535U;
intel_lvds_set_power(dev, false);
return;
}
}
static void intel_lvds_commit(struct drm_encoder *encoder )
{
struct drm_device *dev ;
struct drm_i915_private *dev_priv ;
u32 tmp ;
{
dev = encoder->dev;
dev_priv = dev->dev_private;
if (dev_priv->backlight_duty_cycle == 0) {
tmp = intel_lvds_get_max_backlight(dev);
dev_priv->backlight_duty_cycle = tmp;
} else {
}
intel_lvds_set_power(dev, true);
return;
}
}
static void intel_lvds_mode_set(struct drm_encoder *encoder , struct drm_display_mode *mode ,
struct drm_display_mode *adjusted_mode )
{
struct drm_device *dev ;
struct drm_i915_private *dev_priv ;
struct intel_crtc *intel_crtc ;
struct drm_crtc const *__mptr ;
u32 pfit_control ;
{
dev = encoder->dev;
dev_priv = dev->dev_private;
__mptr = encoder->crtc;
intel_crtc = (struct intel_crtc *)((char *)__mptr - (unsigned int )(& ((struct intel_crtc *)0)->base));
if (mode->hdisplay != adjusted_mode->hdisplay || mode->vdisplay != adjusted_mode->vdisplay) {
pfit_control = ((((1 << 31) | (1 << 9)) | (1 << 5)) | (1 << 10)) | (1 << 6);
} else {
pfit_control = 0;
}
if (! (((((((((dev->pci_device == 10610 || dev->pci_device == 10626) || dev->pci_device == 10642) || dev->pci_device == 10658) || dev->pci_device == 10754) || dev->pci_device == 10770) || dev->pci_device == 10818) || dev->pci_device == 11778) || dev->pci_device == 11794) || dev->pci_device == 11810)) {
if (dev_priv->panel_wants_dither) {
pfit_control = pfit_control | (unsigned int )(1 << 3);
} else {
}
} else {
pfit_control = pfit_control | (unsigned int )(intel_crtc->pipe << 29);
}
writel(pfit_control, dev_priv->regs + 397872);
return;
}
}
static enum drm_connector_status intel_lvds_detect(struct drm_connector *connector )
{
{
return (connector_status_connected);
}
}
static int intel_lvds_get_modes(struct drm_connector *connector )
{
struct drm_device *dev ;
struct intel_output *intel_output ;
struct drm_connector const *__mptr ;
struct drm_i915_private *dev_priv ;
int ret ;
struct drm_display_mode *mode ;
{
dev = connector->dev;
__mptr = connector;
intel_output = (struct intel_output *)((char *)__mptr - (unsigned int )(& ((struct intel_output *)0)->base));
dev_priv = dev->dev_private;
ret = 0;
ret = intel_ddc_get_modes(intel_output);
if (ret) {
return (ret);
} else {
}
connector->display_info.min_vfreq = 0;
connector->display_info.max_vfreq = 200;
connector->display_info.min_hfreq = 0;
connector->display_info.max_hfreq = 200;
if ((unsigned long )dev_priv->panel_fixed_mode != (unsigned long )((void *)0)) {
mutex_unlock(& dev->mode_config.mutex);
mode = drm_mode_duplicate(dev, dev_priv->panel_fixed_mode);
drm_mode_probed_add(connector, mode);
mutex_unlock(& dev->mode_config.mutex);
return (1);
} else {
}
return (0);
}
}
static void intel_lvds_destroy(struct drm_connector *connector )
{
struct intel_output *intel_output ;
struct drm_connector const *__mptr ;
{
__mptr = connector;
intel_output = (struct intel_output *)((char *)__mptr - (unsigned int )(& ((struct intel_output *)0)->base));
if (intel_output->ddc_bus) {
intel_i2c_destroy(intel_output->ddc_bus);
} else {
}
drm_sysfs_connector_remove(connector);
drm_connector_cleanup(connector);
kfree(connector);
return;
}
}
static struct drm_encoder_helper_funcs const intel_lvds_helper_funcs =
{& intel_lvds_dpms, 0, 0, & intel_lvds_mode_fixup, & intel_lvds_prepare, & intel_lvds_commit,
& intel_lvds_mode_set, 0};
static struct drm_connector_helper_funcs const intel_lvds_connector_helper_funcs = {& intel_lvds_get_modes,
& intel_lvds_mode_valid, & intel_best_encoder};
static struct drm_connector_funcs const intel_lvds_connector_funcs = {0, & intel_lvds_save, & intel_lvds_restore, & intel_lvds_detect, & drm_helper_probe_single_connector_modes,
0, & intel_lvds_destroy};
static void intel_lvds_enc_destroy(struct drm_encoder *encoder )
{
{
drm_encoder_cleanup(encoder);
return;
}
}
static struct drm_encoder_funcs const intel_lvds_enc_funcs = {& intel_lvds_enc_destroy};
void intel_lvds_init(struct drm_device *dev )
{
struct drm_i915_private *dev_priv ;
struct intel_output *intel_output ;
struct drm_connector *connector ;
struct drm_encoder *encoder ;
struct drm_display_mode *scan ;
struct drm_crtc *crtc ;
u32 lvds ;
int pipe ;
void *tmp ;
char const *tmp___0 ;
char const *tmp___1 ;
struct list_head const *__mptr ;
struct list_head const *__mptr___0 ;
{
dev_priv = dev->dev_private;
tmp = kzalloc(sizeof(struct intel_output ), (16U | 64U) | 128U);
intel_output = tmp;
if (! intel_output) {
return;
} else {
}
connector = & intel_output->base;
encoder = & intel_output->enc;
drm_connector_init(dev, & intel_output->base, & intel_lvds_connector_funcs, 7);
drm_encoder_init(dev, & intel_output->enc, & intel_lvds_enc_funcs, 3);
drm_mode_connector_attach_encoder(& intel_output->base, & intel_output->enc);
intel_output->type = 4;
drm_encoder_helper_add(encoder, & intel_lvds_helper_funcs);
drm_connector_helper_add(connector, & intel_lvds_connector_helper_funcs);
connector->display_info.subpixel_order = SubPixelHorizontalRGB;
connector->interlace_allowed = false;
connector->doublescan_allowed = false;
intel_output->ddc_bus = intel_i2c_create(dev, 20504, "LVDSDDC_C");
if (! intel_output->ddc_bus) {
tmp___0 = dev_name(& (dev->pdev)->dev);
tmp___1 = dev_driver_string(& (dev->pdev)->dev);
printk("<3>%s %s: DDC bus registration failed.\n", tmp___1, tmp___0);
goto failed;
} else {
}
intel_ddc_get_modes(intel_output);
__mptr = connector->probed_modes.next;
scan = (struct drm_display_mode *)((char *)__mptr - (unsigned int )(& ((struct drm_display_mode *)0)->head));
while (1) {
__builtin_prefetch(scan->head.next);
if ((unsigned long )(& scan->head) != (unsigned long )(& connector->probed_modes)) {
} else {
break;
}
mutex_lock_nested(& dev->mode_config.mutex, 0);
if (scan->type & (1 << 3)) {
dev_priv->panel_fixed_mode = drm_mode_duplicate(dev, scan);
mutex_unlock(& dev->mode_config.mutex);
goto out;
} else {
}
mutex_unlock(& dev->mode_config.mutex);
__mptr___0 = scan->head.next;
scan = (struct drm_display_mode *)((char *)__mptr___0 - (unsigned int )(& ((struct drm_display_mode *)0)->head));
}
if (dev_priv->vbt_mode) {
mutex_lock_nested(& dev->mode_config.mutex, 0);
dev_priv->panel_fixed_mode = drm_mode_duplicate(dev, dev_priv->vbt_mode);
mutex_unlock(& dev->mode_config.mutex);
} else {
}
lvds = readl(dev_priv->regs + 397696);
pipe = lvds & (unsigned int )(1 << 30) ? 1 : 0;
crtc = intel_get_crtc_from_pipe(dev, pipe);
if (crtc && lvds & (unsigned int )(1 << 31)) {
dev_priv->panel_fixed_mode = intel_crtc_mode_get(dev, crtc);
if (dev_priv->panel_fixed_mode) {
(dev_priv->panel_fixed_mode)->type = (dev_priv->panel_fixed_mode)->type | (1 << 3);
goto out;
} else {
}
} else {
}
if (! dev_priv->panel_fixed_mode) {
goto failed;
} else {
}
if (dev->pci_device == 10146 || dev->pci_device == 10158) {
if ((int )(dev->pdev)->subsystem_vendor == 41120) {
goto failed;
} else {
}
if ((int )(dev->pdev)->subsystem_vendor == 32902 && (int )(dev->pdev)->subsystem_device == 29296) {
if (((unsigned long )dev_priv->panel_fixed_mode != (unsigned long )((void *)0) && (dev_priv->panel_fixed_mode)->hdisplay == 800) && (dev_priv->panel_fixed_mode)->vdisplay == 600) {
while (1) {
if (drm_debug) {
printk("<7>[drm:%s] Suspected Mac Mini, ignoring the LVDS\n", "intel_lvds_init");
} else {
}
break;
}
goto failed;
} else {
}
} else {
}
} else {
}
out:
drm_sysfs_connector_add(connector);
return;
failed:
while (1) {
if (drm_debug) {
printk("<7>[drm:%s] No LVDS modes found, disabling.\n", "intel_lvds_init");
} else {
}
break;
}
if (intel_output->ddc_bus) {
intel_i2c_destroy(intel_output->ddc_bus);
} else {
}
drm_connector_cleanup(connector);
kfree(connector);
return;
}
}
void ldv_main11_sequence_infinite_withcheck_stateful(void)
{
struct drm_encoder *var_group1 ;
int var_intel_lvds_dpms_3_p1 ;
struct drm_display_mode *var_group2 ;
struct drm_display_mode *var_intel_lvds_mode_fixup_7_p2 ;
struct drm_display_mode *var_intel_lvds_mode_set_10_p2 ;
struct drm_connector *var_group3 ;
int tmp ;
int tmp___0 ;
{
LDV_IN_INTERRUPT = 1;
ldv_initialize();
while (1) {
tmp___0 = nondet_int();
if (tmp___0) {
} else {
break;
}
tmp = nondet_int();
switch (tmp) {
case 0:
ldv_handler_precall();
intel_lvds_dpms(var_group1, var_intel_lvds_dpms_3_p1);
break;
case 1:
ldv_handler_precall();
intel_lvds_mode_fixup(var_group1, var_group2, var_intel_lvds_mode_fixup_7_p2);
break;
case 2:
ldv_handler_precall();
intel_lvds_prepare(var_group1);
break;
case 3:
ldv_handler_precall();
intel_lvds_mode_set(var_group1, var_group2, var_intel_lvds_mode_set_10_p2);
break;
case 4:
ldv_handler_precall();
intel_lvds_commit(var_group1);
break;
case 5:
ldv_handler_precall();
intel_lvds_get_modes(var_group3);
break;
case 6:
ldv_handler_precall();
intel_lvds_mode_valid(var_group3, var_group2);
break;
case 7:
ldv_handler_precall();
intel_lvds_save(var_group3);
break;
case 8:
ldv_handler_precall();
intel_lvds_restore(var_group3);
break;
case 9:
ldv_handler_precall();
intel_lvds_detect(var_group3);
break;
case 10:
ldv_handler_precall();
intel_lvds_destroy(var_group3);
break;
case 11:
ldv_handler_precall();
intel_lvds_enc_destroy(var_group1);
break;
default:
break;
}
}
ldv_check_final_state();
return;
}
}
extern int memcmp(void const *cs , void const *ct , unsigned long count ) ;
extern void *( __attribute__((__warn_unused_result__)) pci_map_rom)(struct pci_dev *pdev ,
size_t *size ) ;
extern void pci_unmap_rom(struct pci_dev *pdev , void *rom ) ;
static void *find_section(struct bdb_header *bdb , int section_id )
{
u8 *base ;
int index ;
u16 total ;
u16 current_size ;
u8 current_id ;
{
base = (u8 *)bdb;
index = 0;
index = index + (int )bdb->header_size;
total = bdb->bdb_size;
while (1) {
if (index < (int )total) {
} else {
break;
}
current_id = *(base + index);
index = index + 1;
current_size = *((u16 *)(base + index));
index = index + 2;
if ((int )current_id == section_id) {
return (base + index);
} else {
}
index = index + (int )current_size;
}
return ((void *)0);
}
}
static void parse_panel_data(struct drm_i915_private *dev_priv , struct bdb_header *bdb )
{
struct bdb_lvds_options *lvds_options ;
struct bdb_lvds_lfp_data *lvds_lfp_data ;
struct bdb_lvds_lfp_data_entry *entry ;
struct lvds_dvo_timing *dvo_timing ;
struct drm_display_mode *panel_fixed_mode ;
void *tmp ;
void *tmp___0 ;
void *tmp___1 ;
{
dev_priv->lvds_dither = 0;
dev_priv->lvds_vbt = 0;
tmp = find_section(bdb, 40);
lvds_options = tmp;
if (! lvds_options) {
return;
} else {
}
dev_priv->lvds_dither = lvds_options->pixel_dither;
if ((int )lvds_options->panel_type == 255) {
return;
} else {
}
tmp___0 = find_section(bdb, 42);
lvds_lfp_data = tmp___0;
if (! lvds_lfp_data) {
return;
} else {
}
dev_priv->lvds_vbt = 1;
entry = & lvds_lfp_data->data[lvds_options->panel_type];
dvo_timing = & entry->dvo_timing;
tmp___1 = drm_calloc(1, sizeof(*panel_fixed_mode), 2);
panel_fixed_mode = tmp___1;
panel_fixed_mode->hdisplay = ((int )dvo_timing->hactive_hi << 8) | (int )dvo_timing->hactive_lo;
panel_fixed_mode->hsync_start = panel_fixed_mode->hdisplay + (((int )dvo_timing->hsync_off_hi << 8) | (int )dvo_timing->hsync_off_lo);
panel_fixed_mode->hsync_end = panel_fixed_mode->hsync_start + (int )dvo_timing->hsync_pulse_width;
panel_fixed_mode->htotal = panel_fixed_mode->hdisplay + (((int )dvo_timing->hblank_hi << 8) | (int )dvo_timing->hblank_lo);
panel_fixed_mode->vdisplay = ((int )dvo_timing->vactive_hi << 8) | (int )dvo_timing->vactive_lo;
panel_fixed_mode->vsync_start = panel_fixed_mode->vdisplay + (int )dvo_timing->vsync_off;
panel_fixed_mode->vsync_end = panel_fixed_mode->vsync_start + (int )dvo_timing->vsync_pulse_width;
panel_fixed_mode->vtotal = panel_fixed_mode->vdisplay + (((int )dvo_timing->vblank_hi << 8) | (int )dvo_timing->vblank_lo);
panel_fixed_mode->clock = (int )dvo_timing->clock * 10;
panel_fixed_mode->type = 1 << 3;
drm_mode_set_name(panel_fixed_mode);
dev_priv->vbt_mode = panel_fixed_mode;
while (1) {
if (drm_debug) {
printk("<7>[drm:%s] Found panel mode in BIOS VBT tables:\n", "parse_panel_data");
} else {
}
break;
}
drm_mode_debug_printmodeline(panel_fixed_mode);
return;
}
}
static void parse_general_features(struct drm_i915_private *dev_priv , struct bdb_header *bdb )
{
struct bdb_general_features *general ;
void *tmp ;
{
dev_priv->int_tv_support = 1;
dev_priv->int_crt_support = 1;
tmp = find_section(bdb, 1);
general = tmp;
if (general) {
dev_priv->int_tv_support = general->int_tv_support;
dev_priv->int_crt_support = general->int_crt_support;
} else {
}
return;
}
}
bool intel_init_bios(struct drm_device *dev )
{
struct drm_i915_private *dev_priv ;
struct pci_dev *pdev ;
struct vbt_header *vbt ;
struct bdb_header *bdb ;
u8 *bios ;
size_t size ;
int i ;
void *tmp ;
int tmp___0 ;
{
dev_priv = dev->dev_private;
pdev = dev->pdev;
vbt = (void *)0;
tmp = pci_map_rom(pdev, & size);
bios = tmp;
if (! bios) {
return (-1);
} else {
}
i = 0;
while (1) {
if ((size_t )(i + 4) < size) {
} else {
break;
}
tmp___0 = memcmp(bios + i, "$VBT", 4);
if (tmp___0) {
} else {
vbt = (struct vbt_header *)(bios + i);
break;
}
i = i + 1;
}
if (! vbt) {
printk("<3>[drm:%s] *ERROR* VBT signature missing\n", "intel_init_bios");
pci_unmap_rom(pdev, bios);
return (-1);
} else {
}
bdb = (struct bdb_header *)((bios + i) + vbt->bdb_offset);
parse_general_features(dev_priv, bdb);
parse_panel_data(dev_priv, bdb);
pci_unmap_rom(pdev, bios);
return (0);
}
}
void *memcpy(void * , void const * , unsigned long ) ;
extern void *memcpy(void *to , void const *from , size_t len ) ;
extern int i2c_transfer(struct i2c_adapter *adap , struct i2c_msg *msgs , int num ) ;
struct drm_connector *intel_sdvo_find(struct drm_device *dev , int sdvoB ) ;
int intel_sdvo_supports_hotplug(struct drm_connector *connector ) ;
void intel_sdvo_set_hotplug(struct drm_connector *connector , int on ) ;
static void intel_sdvo_write_sdvox(struct intel_output *intel_output , u32 val )
{
struct drm_device *dev ;
struct drm_i915_private *dev_priv ;
struct intel_sdvo_priv *sdvo_priv ;
u32 bval ;
u32 cval ;
int i ;
{
dev = intel_output->base.dev;
dev_priv = dev->dev_private;
sdvo_priv = intel_output->dev_priv;
bval = val;
cval = val;
if (sdvo_priv->output_device == 397632) {
cval = readl(dev_priv->regs + 397664);
} else {
bval = readl(dev_priv->regs + 397632);
}
i = 0;
while (1) {
if (i < 2) {
} else {
break;
}
writel(bval, dev_priv->regs + 397632);
readl(dev_priv->regs + 397632);
writel(cval, dev_priv->regs + 397664);
readl(dev_priv->regs + 397664);
i = i + 1;
}
return;
}
}
static bool intel_sdvo_read_byte(struct intel_output *intel_output , u8 addr , u8 *ch )
{
struct intel_sdvo_priv *sdvo_priv ;
u8 out_buf[2] ;
u8 buf[2] ;
int ret ;
struct i2c_msg msgs[2] ;
{
sdvo_priv = intel_output->dev_priv;
msgs[0].addr = (sdvo_priv->i2c_bus)->slave_addr;
msgs[0].flags = 0;
msgs[0].len = 1;
msgs[0].buf = out_buf;
msgs[1].addr = (sdvo_priv->i2c_bus)->slave_addr;
msgs[1].flags = 1;
msgs[1].len = 1;
msgs[1].buf = buf;
out_buf[0] = addr;
out_buf[1] = 0;
ret = i2c_transfer(& (sdvo_priv->i2c_bus)->adapter, msgs, 2);
if (ret == 2) {
*ch = buf[0];
return (true);
} else {
}
while (1) {
if (drm_debug) {
printk("<7>[drm:%s] i2c transfer returned %d\n", "intel_sdvo_read_byte", ret);
} else {
}
break;
}
return (false);
}
}
static bool intel_sdvo_write_byte(struct intel_output *intel_output , int addr , u8 ch )
{
u8 out_buf[2] ;
struct i2c_msg msgs[1] ;
int tmp ;
{
msgs[0].addr = (intel_output->i2c_bus)->slave_addr;
msgs[0].flags = 0;
msgs[0].len = 2;
msgs[0].buf = out_buf;
out_buf[0] = addr;
out_buf[1] = ch;
tmp = i2c_transfer(& (intel_output->i2c_bus)->adapter, msgs, 1);
if (tmp == 1) {
return (true);
} else {
}
return (false);
}
}
static void intel_sdvo_write_cmd(struct intel_output *intel_output , u8 cmd , void *args ,
int args_len )
{
int i ;
{
i = 0;
while (1) {
if (i < args_len) {
} else {
break;
}
intel_sdvo_write_byte(intel_output, 7 - i, *((u8 *)args + i));
i = i + 1;
}
intel_sdvo_write_byte(intel_output, 8, cmd);
return;
}
}
static u8 intel_sdvo_read_response(struct intel_output *intel_output , void *response ,
int response_len )
{
int i ;
u8 status ;
u8 retry ;
unsigned long __ms ;
unsigned long tmp ;
u8 tmp___0 ;
{
retry = 50;
while (1) {
tmp___0 = retry;
retry = (u8 )((int )retry - 1);
if (tmp___0) {
} else {
break;
}
i = 0;
while (1) {
if (i < response_len) {
} else {
break;
}
intel_sdvo_read_byte(intel_output, 10 + i, (u8 *)response + i);
i = i + 1;
}
intel_sdvo_read_byte(intel_output, 9, & status);
if ((int )status != 4) {
return (status);
} else {
}
if (50 <= 5) {
if (50 * 1000 > 20000) {
__bad_udelay();
} else {
__const_udelay((unsigned long )(50 * 1000) * 4295UL);
}
} else {
__ms = 50;
while (1) {
tmp = __ms;
__ms = __ms - 1UL;
if (tmp) {
} else {
break;
}
if (1000 > 20000) {
__bad_udelay();
} else {
__const_udelay(1000UL * 4295UL);
}
}
}
}
return (status);
}
}
static int intel_sdvo_get_pixel_multiplier(struct drm_display_mode *mode )
{
{
if (mode->clock >= 100000) {
return (1);
} else
if (mode->clock >= 50000) {
return (2);
} else {
return (4);
}
}
}
static void intel_sdvo_set_control_bus_switch(struct intel_output *intel_output ,
u8 target )
{
{
intel_sdvo_write_cmd(intel_output, 122, & target, 1);
return;
}
}
static bool intel_sdvo_set_target_input(struct intel_output *intel_output , bool target_0 ,
bool target_1 )
{
struct intel_sdvo_set_target_input_args targets ;
u8 status ;
{
targets.target_1 = 0;
targets.pad = 0U;
if (target_0 && target_1) {
return (2);
} else {
}
if (target_1) {
targets.target_1 = 1;
} else {
}
intel_sdvo_write_cmd(intel_output, 16, & targets, sizeof(targets));
status = intel_sdvo_read_response(intel_output, (void *)0, 0);
return ((int )status == 1);
}
}
static bool intel_sdvo_get_trained_inputs(struct intel_output *intel_output , bool *input_1 ,
bool *input_2 )
{
struct intel_sdvo_get_trained_inputs_response response ;
u8 status ;
{
intel_sdvo_write_cmd(intel_output, 3, (void *)0, 0);
status = intel_sdvo_read_response(intel_output, & response, sizeof(response));
if ((int )status != 1) {
return (false);
} else {
}
*input_1 = response.input0_trained;
*input_2 = response.input1_trained;
return (true);
}
}
static bool intel_sdvo_get_active_outputs(struct intel_output *intel_output , u16 *outputs )
{
u8 status ;
{
intel_sdvo_write_cmd(intel_output, 4, (void *)0, 0);
status = intel_sdvo_read_response(intel_output, outputs, sizeof(*outputs));
return ((int )status == 1);
}
}
static bool intel_sdvo_set_active_outputs(struct intel_output *intel_output , u16 outputs )
{
u8 status ;
{
intel_sdvo_write_cmd(intel_output, 5, & outputs, sizeof(outputs));
status = intel_sdvo_read_response(intel_output, (void *)0, 0);
return ((int )status == 1);
}
}
static bool intel_sdvo_get_input_pixel_clock_range(struct intel_output *intel_output ,
int *clock_min , int *clock_max )
{
struct intel_sdvo_pixel_clock_range clocks ;
u8 status ;
{
intel_sdvo_write_cmd(intel_output, 29, (void *)0, 0);
status = intel_sdvo_read_response(intel_output, & clocks, sizeof(clocks));
if ((int )status != 1) {
return (false);
} else {
}
*clock_min = (int )clocks.min * 10;
*clock_max = (int )clocks.max * 10;
return (true);
}
}
static bool intel_sdvo_set_target_output(struct intel_output *intel_output , u16 outputs )
{
u8 status ;
{
intel_sdvo_write_cmd(intel_output, 17, & outputs, sizeof(outputs));
status = intel_sdvo_read_response(intel_output, (void *)0, 0);
return ((int )status == 1);
}
}
static bool intel_sdvo_get_timing(struct intel_output *intel_output , u8 cmd , struct intel_sdvo_dtd *dtd )
{
u8 status ;
{
intel_sdvo_write_cmd(intel_output, cmd, (void *)0, 0);
status = intel_sdvo_read_response(intel_output, & dtd->part1, sizeof(dtd->part1));
if ((int )status != 1) {
return (false);
} else {
}
intel_sdvo_write_cmd(intel_output, (int )cmd + 1, (void *)0, 0);
status = intel_sdvo_read_response(intel_output, & dtd->part2, sizeof(dtd->part2));
if ((int )status != 1) {
return (false);
} else {
}
return (true);
}
}
static bool intel_sdvo_get_input_timing(struct intel_output *intel_output , struct intel_sdvo_dtd *dtd )
{
bool tmp ;
{
tmp = intel_sdvo_get_timing(intel_output, 18, dtd);
return (tmp);
}
}
static bool intel_sdvo_get_output_timing(struct intel_output *intel_output , struct intel_sdvo_dtd *dtd )
{
bool tmp ;
{
tmp = intel_sdvo_get_timing(intel_output, 24, dtd);
return (tmp);
}
}
static bool intel_sdvo_set_timing(struct intel_output *intel_output , u8 cmd , struct intel_sdvo_dtd *dtd )
{
u8 status ;
{
intel_sdvo_write_cmd(intel_output, cmd, & dtd->part1, sizeof(dtd->part1));
status = intel_sdvo_read_response(intel_output, (void *)0, 0);
if ((int )status != 1) {
return (false);
} else {
}
intel_sdvo_write_cmd(intel_output, (int )cmd + 1, & dtd->part2, sizeof(dtd->part2));
status = intel_sdvo_read_response(intel_output, (void *)0, 0);
if ((int )status != 1) {
return (false);
} else {
}
return (true);
}
}
static bool intel_sdvo_set_input_timing(struct intel_output *intel_output , struct intel_sdvo_dtd *dtd )
{
bool tmp ;
{
tmp = intel_sdvo_set_timing(intel_output, 20, dtd);
return (tmp);
}
}
static bool intel_sdvo_set_output_timing(struct intel_output *intel_output , struct intel_sdvo_dtd *dtd )
{
bool tmp ;
{
tmp = intel_sdvo_set_timing(intel_output, 22, dtd);
return (tmp);
}
}
static int intel_sdvo_get_clock_rate_mult(struct intel_output *intel_output )
{
u8 response ;
u8 status ;
{
intel_sdvo_write_cmd(intel_output, 32, (void *)0, 0);
status = intel_sdvo_read_response(intel_output, & response, 1);
if ((int )status != 1) {
while (1) {
if (drm_debug) {
printk("<7>[drm:%s] Couldn\'t get SDVO clock rate multiplier\n", "intel_sdvo_get_clock_rate_mult");
} else {
}
break;
}
return (1 << 0);
} else {
while (1) {
if (drm_debug) {
printk("<7>[drm:%s] Current clock rate multiplier: %d\n", "intel_sdvo_get_clock_rate_mult",
response);
} else {
}
break;
}
}
return (response);
}
}
static bool intel_sdvo_set_clock_rate_mult(struct intel_output *intel_output , u8 val )
{
u8 status ;
{
intel_sdvo_write_cmd(intel_output, 33, & val, 1);
status = intel_sdvo_read_response(intel_output, (void *)0, 0);
if ((int )status != 1) {
return (false);
} else {
}
return (true);
}
}
static bool intel_sdvo_mode_fixup(struct drm_encoder *encoder , struct drm_display_mode *mode ,
struct drm_display_mode *adjusted_mode )
{
int tmp ;
{
tmp = intel_sdvo_get_pixel_multiplier(mode);
adjusted_mode->clock = adjusted_mode->clock * tmp;
return (true);
}
}
static void intel_sdvo_mode_set(struct drm_encoder *encoder , struct drm_display_mode *mode ,
struct drm_display_mode *adjusted_mode )
{
struct drm_device *dev ;
struct drm_i915_private *dev_priv ;
struct drm_crtc *crtc ;
struct intel_crtc *intel_crtc ;
struct drm_crtc const *__mptr ;
struct intel_output *intel_output ;
struct drm_encoder const *__mptr___0 ;
struct intel_sdvo_priv *sdvo_priv ;
u16 width ;
u16 height ;
u16 h_blank_len ;
u16 h_sync_len ;
u16 v_blank_len ;
u16 v_sync_len ;
u16 h_sync_offset ;
u16 v_sync_offset ;
u32 sdvox ;
struct intel_sdvo_dtd output_dtd ;
int sdvo_pixel_multiply ;
int tmp ;
{
dev = encoder->dev;
dev_priv = dev->dev_private;
crtc = encoder->crtc;
__mptr = crtc;
intel_crtc = (struct intel_crtc *)((char *)__mptr - (unsigned int )(& ((struct intel_crtc *)0)->base));
__mptr___0 = encoder;
intel_output = (struct intel_output *)((char *)__mptr___0 - (unsigned int )(& ((struct intel_output *)0)->enc));
sdvo_priv = intel_output->dev_priv;
if (! mode) {
return;
} else {
}
width = mode->crtc_hdisplay;
height = mode->crtc_vdisplay;
h_blank_len = mode->crtc_hblank_end - mode->crtc_hblank_start;
h_sync_len = mode->crtc_hsync_end - mode->crtc_hsync_start;
v_blank_len = mode->crtc_vblank_end - mode->crtc_vblank_start;
v_sync_len = mode->crtc_vsync_end - mode->crtc_vsync_start;
h_sync_offset = mode->crtc_hsync_start - mode->crtc_hblank_start;
v_sync_offset = mode->crtc_vsync_start - mode->crtc_vblank_start;
output_dtd.part1.clock = mode->clock / 10;
output_dtd.part1.h_active = (int )width & 255;
output_dtd.part1.h_blank = (int )h_blank_len & 255;
output_dtd.part1.h_high = ((((int )width >> 8) & 15) << 4) | (((int )h_blank_len >> 8) & 15);
output_dtd.part1.v_active = (int )height & 255;
output_dtd.part1.v_blank = (int )v_blank_len & 255;
output_dtd.part1.v_high = ((((int )height >> 8) & 15) << 4) | (((int )v_blank_len >> 8) & 15);
output_dtd.part2.h_sync_off = h_sync_offset;
output_dtd.part2.h_sync_width = (int )h_sync_len & 255;
output_dtd.part2.v_sync_off_width = (((int )v_sync_offset & 15) << 4) | ((int )v_sync_len & 15);
output_dtd.part2.sync_off_width_high = (((((int )h_sync_offset & 768) >> 2) | (((int )h_sync_len & 768) >> 4)) | (((int )v_sync_offset & 48) >> 2)) | (((int )v_sync_len & 48) >> 4);
output_dtd.part2.dtd_flags = 24;
if (mode->flags & (unsigned int )(1 << 0)) {
output_dtd.part2.dtd_flags = (int )output_dtd.part2.dtd_flags | 2;
} else {
}
if (mode->flags & (unsigned int )(1 << 2)) {
output_dtd.part2.dtd_flags = (int )output_dtd.part2.dtd_flags | 4;
} else {
}
output_dtd.part2.sdvo_flags = 0;
output_dtd.part2.v_sync_off_high = (int )v_sync_offset & 192;
output_dtd.part2.reserved = 0;
intel_sdvo_set_target_output(intel_output, sdvo_priv->active_outputs);
intel_sdvo_set_output_timing(intel_output, & output_dtd);
intel_sdvo_set_target_input(intel_output, true, false);
intel_sdvo_set_input_timing(intel_output, & output_dtd);
tmp = intel_sdvo_get_pixel_multiplier(mode);
switch (tmp) {
case 1:
intel_sdvo_set_clock_rate_mult(intel_output, 1 << 0);
break;
case 2:
intel_sdvo_set_clock_rate_mult(intel_output, 1 << 1);
break;
case 4:
intel_sdvo_set_clock_rate_mult(intel_output, 1 << 3);
break;
}
sdvox = readl(dev_priv->regs + sdvo_priv->output_device);
switch (sdvo_priv->output_device) {
case 397632:
sdvox = sdvox & (unsigned int )((((1 << 17) | (1 << 16)) | (1 << 14)) | (1 << 26));
break;
case 397664:
sdvox = sdvox & (unsigned int )((1 << 17) | (1 << 26));
break;
}
sdvox = sdvox | (unsigned int )((9 << 19) | (1 << 7));
if (intel_crtc->pipe == 1) {
sdvox = sdvox | (unsigned int )(1 << 30);
} else {
}
sdvo_pixel_multiply = intel_sdvo_get_pixel_multiplier(mode);
if (((((((((dev->pci_device == 10610 || dev->pci_device == 10626) || dev->pci_device == 10642) || dev->pci_device == 10658) || dev->pci_device == 10754) || dev->pci_device == 10770) || dev->pci_device == 10818) || dev->pci_device == 11778) || dev->pci_device == 11794) || dev->pci_device == 11810) {
} else
if (dev->pci_device == 10098 || (dev->pci_device == 10146 || dev->pci_device == 10158)) {
} else {
sdvox = sdvox | (unsigned int )((sdvo_pixel_multiply - 1) << 23);
}
intel_sdvo_write_sdvox(intel_output, sdvox);
return;
}
}
static void intel_sdvo_dpms(struct drm_encoder *encoder , int mode )
{
struct drm_device *dev ;
struct drm_i915_private *dev_priv ;
struct intel_output *intel_output ;
struct drm_encoder const *__mptr ;
struct intel_sdvo_priv *sdvo_priv ;
u32 temp ;
bool input1 ;
bool input2 ;
int i ;
u8 status ;
bool tmp ;
{
dev = encoder->dev;
dev_priv = dev->dev_private;
__mptr = encoder;
intel_output = (struct intel_output *)((char *)__mptr - (unsigned int )(& ((struct intel_output *)0)->enc));
sdvo_priv = intel_output->dev_priv;
if (mode != 0) {
intel_sdvo_set_active_outputs(intel_output, 0);
if (mode == 3) {
temp = readl(dev_priv->regs + sdvo_priv->output_device);
if ((temp & (unsigned int )(1 << 31)) != 0U) {
intel_sdvo_write_sdvox(intel_output, temp & (unsigned int )(~ (1 << 31)));
} else {
}
} else {
}
} else {
temp = readl(dev_priv->regs + sdvo_priv->output_device);
if ((temp & (unsigned int )(1 << 31)) == 0U) {
intel_sdvo_write_sdvox(intel_output, temp | (unsigned int )(1 << 31));
} else {
}
i = 0;
while (1) {
if (i < 2) {
} else {
break;
}
intel_wait_for_vblank(dev);
i = i + 1;
}
tmp = intel_sdvo_get_trained_inputs(intel_output, & input1, & input2);
status = tmp;
if ((int )status == 1 && ! input1) {
while (1) {
if (drm_debug) {
printk("<7>[drm:%s] First %s output reported failure to sync\n", "intel_sdvo_dpms",
sdvo_priv->output_device == 397632 ? "SDVOB" : "SDVOC");
} else {
}
break;
}
} else {
}
intel_sdvo_set_active_outputs(intel_output, sdvo_priv->active_outputs);
}
return;
}
}
static void intel_sdvo_save(struct drm_connector *connector )
{
struct drm_device *dev ;
struct drm_i915_private *dev_priv ;
struct intel_output *intel_output ;
struct drm_connector const *__mptr ;
struct intel_sdvo_priv *sdvo_priv ;
int o ;
u16 this_output ;
{
dev = connector->dev;
dev_priv = dev->dev_private;
__mptr = connector;
intel_output = (struct intel_output *)((char *)__mptr - (unsigned int )(& ((struct intel_output *)0)->base));
sdvo_priv = intel_output->dev_priv;
sdvo_priv->save_sdvo_mult = intel_sdvo_get_clock_rate_mult(intel_output);
intel_sdvo_get_active_outputs(intel_output, & sdvo_priv->save_active_outputs);
if (sdvo_priv->caps.sdvo_inputs_mask & 1U) {
intel_sdvo_set_target_input(intel_output, true, false);
intel_sdvo_get_input_timing(intel_output, & sdvo_priv->save_input_dtd_1);
} else {
}
if (sdvo_priv->caps.sdvo_inputs_mask & 2U) {
intel_sdvo_set_target_input(intel_output, false, true);
intel_sdvo_get_input_timing(intel_output, & sdvo_priv->save_input_dtd_2);
} else {
}
o = 0;
while (1) {
if (o <= 14) {
} else {
break;
}
this_output = 1 << o;
if ((int )sdvo_priv->caps.output_flags & (int )this_output) {
intel_sdvo_set_target_output(intel_output, this_output);
intel_sdvo_get_output_timing(intel_output, & sdvo_priv->save_output_dtd[o]);
} else {
}
o = o + 1;
}
sdvo_priv->save_SDVOX = readl(dev_priv->regs + sdvo_priv->output_device);
return;
}
}
static void intel_sdvo_restore(struct drm_connector *connector )
{
struct drm_device *dev ;
struct drm_i915_private *dev_priv ;
struct intel_output *intel_output ;
struct drm_connector const *__mptr ;
struct intel_sdvo_priv *sdvo_priv ;
int o ;
int i ;
bool input1 ;
bool input2 ;
u8 status ;
u16 this_output ;
bool tmp ;
{
dev = connector->dev;
dev_priv = dev->dev_private;
__mptr = connector;
intel_output = (struct intel_output *)((char *)__mptr - (unsigned int )(& ((struct intel_output *)0)->base));
sdvo_priv = intel_output->dev_priv;
intel_sdvo_set_active_outputs(intel_output, 0);
o = 0;
while (1) {
if (o <= 14) {
} else {
break;
}
this_output = 1 << o;
if ((int )sdvo_priv->caps.output_flags & (int )this_output) {
intel_sdvo_set_target_output(intel_output, this_output);
intel_sdvo_set_output_timing(intel_output, & sdvo_priv->save_output_dtd[o]);
} else {
}
o = o + 1;
}
if (sdvo_priv->caps.sdvo_inputs_mask & 1U) {
intel_sdvo_set_target_input(intel_output, true, false);
intel_sdvo_set_input_timing(intel_output, & sdvo_priv->save_input_dtd_1);
} else {
}
if (sdvo_priv->caps.sdvo_inputs_mask & 2U) {
intel_sdvo_set_target_input(intel_output, false, true);
intel_sdvo_set_input_timing(intel_output, & sdvo_priv->save_input_dtd_2);
} else {
}
intel_sdvo_set_clock_rate_mult(intel_output, sdvo_priv->save_sdvo_mult);
writel(sdvo_priv->save_SDVOX, dev_priv->regs + sdvo_priv->output_device);
if (sdvo_priv->save_SDVOX & (unsigned int )(1 << 31)) {
i = 0;
while (1) {
if (i < 2) {
} else {
break;
}
intel_wait_for_vblank(dev);
i = i + 1;
}
tmp = intel_sdvo_get_trained_inputs(intel_output, & input1, & input2);
status = tmp;
if ((int )status == 1 && ! input1) {
while (1) {
if (drm_debug) {
printk("<7>[drm:%s] First %s output reported failure to sync\n", "intel_sdvo_restore",
sdvo_priv->output_device == 397632 ? "SDVOB" : "SDVOC");
} else {
}
break;
}
} else {
}
} else {
}
intel_sdvo_set_active_outputs(intel_output, sdvo_priv->save_active_outputs);
return;
}
}
static int intel_sdvo_mode_valid(struct drm_connector *connector , struct drm_display_mode *mode )
{
struct intel_output *intel_output ;
struct drm_connector const *__mptr ;
struct intel_sdvo_priv *sdvo_priv ;
{
__mptr = connector;
intel_output = (struct intel_output *)((char *)__mptr - (unsigned int )(& ((struct intel_output *)0)->base));
sdvo_priv = intel_output->dev_priv;
if (mode->flags & (unsigned int )(1 << 5)) {
return (MODE_NO_DBLESCAN);
} else {
}
if (sdvo_priv->pixel_clock_min > mode->clock) {
return (MODE_CLOCK_LOW);
} else {
}
if (sdvo_priv->pixel_clock_max < mode->clock) {
return (MODE_CLOCK_HIGH);
} else {
}
return (MODE_OK);
}
}
static bool intel_sdvo_get_capabilities(struct intel_output *intel_output , struct intel_sdvo_caps *caps )
{
u8 status ;
{
intel_sdvo_write_cmd(intel_output, 2, (void *)0, 0);
status = intel_sdvo_read_response(intel_output, caps, sizeof(*caps));
if ((int )status != 1) {
return (false);
} else {
}
return (true);
}
}
struct drm_connector *intel_sdvo_find(struct drm_device *dev , int sdvoB )
{
struct drm_connector *connector ;
struct intel_output *iout ;
struct intel_sdvo_priv *sdvo ;
struct list_head const *__mptr ;
struct list_head const *__mptr___0 ;
struct drm_connector const *__mptr___1 ;
{
connector = (void *)0;
iout = (void *)0;
__mptr = dev->mode_config.connector_list.next;
connector = (struct drm_connector *)((char *)__mptr - (unsigned int )(& ((struct drm_connector *)0)->head));
while (1) {
__builtin_prefetch(connector->head.next);
if ((unsigned long )(& connector->head) != (unsigned long )(& dev->mode_config.connector_list)) {
} else {
break;
}
__mptr___1 = connector;
iout = (struct intel_output *)((char *)__mptr___1 - (unsigned int )(& ((struct intel_output *)0)->base));
if (iout->type != 3) {
goto __Cont;
} else {
}
sdvo = iout->dev_priv;
if (sdvo->output_device == 397632 && sdvoB) {
return (connector);
} else {
}
if (sdvo->output_device == 397664 && ! sdvoB) {
return (connector);
} else {
}
__Cont: /* CIL Label */
__mptr___0 = connector->head.next;
connector = (struct drm_connector *)((char *)__mptr___0 - (unsigned int )(& ((struct drm_connector *)0)->head));
}
return ((void *)0);
}
}
int intel_sdvo_supports_hotplug(struct drm_connector *connector )
{
u8 response[2] ;
u8 status ;
struct intel_output *intel_output ;
struct drm_connector const *__mptr ;
{
while (1) {
if (drm_debug) {
printk("<7>[drm:%s] \n", "intel_sdvo_supports_hotplug");
} else {
}
break;
}
if (! connector) {
return (0);
} else {
}
__mptr = connector;
intel_output = (struct intel_output *)((char *)__mptr - (unsigned int )(& ((struct intel_output *)0)->base));
intel_sdvo_write_cmd(intel_output, 12, (void *)0, 0);
status = intel_sdvo_read_response(intel_output, & response, 2);
if ((int )response[0] != 0) {
return (1);
} else {
}
return (0);
}
}
void intel_sdvo_set_hotplug(struct drm_connector *connector , int on )
{
u8 response[2] ;
u8 status ;
struct intel_output *intel_output ;
struct drm_connector const *__mptr ;
{
__mptr = connector;
intel_output = (struct intel_output *)((char *)__mptr - (unsigned int )(& ((struct intel_output *)0)->base));
intel_sdvo_write_cmd(intel_output, 14, (void *)0, 0);
intel_sdvo_read_response(intel_output, & response, 2);
if (on) {
intel_sdvo_write_cmd(intel_output, 12, (void *)0, 0);
status = intel_sdvo_read_response(intel_output, & response, 2);
intel_sdvo_write_cmd(intel_output, 13, & response, 2);
} else {
response[0] = 0;
response[1] = 0;
intel_sdvo_write_cmd(intel_output, 13, & response, 2);
}
intel_sdvo_write_cmd(intel_output, 14, (void *)0, 0);
intel_sdvo_read_response(intel_output, & response, 2);
return;
}
}
static enum drm_connector_status intel_sdvo_detect(struct drm_connector *connector )
{
u8 response[2] ;
u8 status ;
struct intel_output *intel_output ;
struct drm_connector const *__mptr ;
{
__mptr = connector;
intel_output = (struct intel_output *)((char *)__mptr - (unsigned int )(& ((struct intel_output *)0)->base));
intel_sdvo_write_cmd(intel_output, 11, (void *)0, 0);
status = intel_sdvo_read_response(intel_output, & response, 2);
while (1) {
if (drm_debug) {
printk("<7>[drm:%s] SDVO response %d %d\n", "intel_sdvo_detect", response[0],
response[1]);
} else {
}
break;
}
if ((int )response[0] != 0 || (int )response[1] != 0) {
return (connector_status_connected);
} else {
return (connector_status_disconnected);
}
}
}
static int intel_sdvo_get_modes(struct drm_connector *connector )
{
struct intel_output *intel_output ;
struct drm_connector const *__mptr ;
int tmp ;
{
__mptr = connector;
intel_output = (struct intel_output *)((char *)__mptr - (unsigned int )(& ((struct intel_output *)0)->base));
intel_sdvo_set_control_bus_switch(intel_output, 2);
intel_ddc_get_modes(intel_output);
tmp = list_empty(& connector->probed_modes);
if (tmp) {
return (0);
} else {
}
return (1);
}
}
static void intel_sdvo_destroy(struct drm_connector *connector )
{
struct intel_output *intel_output ;
struct drm_connector const *__mptr ;
{
__mptr = connector;
intel_output = (struct intel_output *)((char *)__mptr - (unsigned int )(& ((struct intel_output *)0)->base));
if (intel_output->i2c_bus) {
intel_i2c_destroy(intel_output->i2c_bus);
} else {
}
drm_sysfs_connector_remove(connector);
drm_connector_cleanup(connector);
kfree(intel_output);
return;
}
}
static struct drm_encoder_helper_funcs const intel_sdvo_helper_funcs =
{& intel_sdvo_dpms, 0, 0, & intel_sdvo_mode_fixup, & intel_encoder_prepare, & intel_encoder_commit,
& intel_sdvo_mode_set, 0};
static struct drm_connector_funcs const intel_sdvo_connector_funcs = {0, & intel_sdvo_save, & intel_sdvo_restore, & intel_sdvo_detect, & drm_helper_probe_single_connector_modes,
0, & intel_sdvo_destroy};
static struct drm_connector_helper_funcs const intel_sdvo_connector_helper_funcs = {& intel_sdvo_get_modes,
& intel_sdvo_mode_valid, & intel_best_encoder};
static void intel_sdvo_enc_destroy(struct drm_encoder *encoder )
{
{
drm_encoder_cleanup(encoder);
return;
}
}
static struct drm_encoder_funcs const intel_sdvo_enc_funcs = {& intel_sdvo_enc_destroy};
void intel_sdvo_init(struct drm_device *dev , int output_device )
{
struct drm_connector *connector ;
struct intel_output *intel_output ;
struct intel_sdvo_priv *sdvo_priv ;
struct intel_i2c_chan *i2cbus ;
int connector_type ;
u8 ch[64] ;
int i ;
int encoder_type ;
int output_id ;
void *tmp ;
bool tmp___0 ;
unsigned char bytes[2] ;
size_t __len ;
void *__ret ;
{
i2cbus = (void *)0;
tmp = kcalloc(sizeof(struct intel_output ) + sizeof(struct intel_sdvo_priv ), 1,
(16U | 64U) | 128U);
intel_output = tmp;
if (! intel_output) {
return;
} else {
}
connector = & intel_output->base;
drm_connector_init(dev, connector, & intel_sdvo_connector_funcs, 0);
drm_connector_helper_add(connector, & intel_sdvo_connector_helper_funcs);
sdvo_priv = (struct intel_sdvo_priv *)(intel_output + 1);
intel_output->type = 3;
connector->interlace_allowed = 0;
connector->doublescan_allowed = 0;
if (output_device == 397632) {
i2cbus = intel_i2c_create(dev, 20512, "SDVOCTRL_E for SDVOB");
} else {
i2cbus = intel_i2c_create(dev, 20512, "SDVOCTRL_E for SDVOC");
}
if (! i2cbus) {
goto err_connector;
} else {
}
sdvo_priv->i2c_bus = i2cbus;
if (output_device == 397632) {
output_id = 1;
(sdvo_priv->i2c_bus)->slave_addr = 56;
} else {
output_id = 2;
(sdvo_priv->i2c_bus)->slave_addr = 57;
}
sdvo_priv->output_device = output_device;
intel_output->i2c_bus = i2cbus;
intel_output->dev_priv = sdvo_priv;
i = 0;
while (1) {
if (i < 64) {
} else {
break;
}
tmp___0 = intel_sdvo_read_byte(intel_output, i, & ch[i]);
if (tmp___0) {
} else {
while (1) {
if (drm_debug) {
printk("<7>[drm:%s] No SDVO device found on SDVO%c\n", "intel_sdvo_init",
output_device == 397632 ? 'B' : 'C');
} else {
}
break;
}
goto err_i2c;
}
i = i + 1;
}
intel_sdvo_get_capabilities(intel_output, & sdvo_priv->caps);
memset(& sdvo_priv->active_outputs, 0, sizeof(sdvo_priv->active_outputs));
if ((int )sdvo_priv->caps.output_flags & (1 << 1)) {
sdvo_priv->active_outputs = 1 << 1;
connector->display_info.subpixel_order = SubPixelHorizontalRGB;
encoder_type = 1;
connector_type = 1;
} else
if ((int )sdvo_priv->caps.output_flags & (1 << 9)) {
sdvo_priv->active_outputs = 1 << 9;
connector->display_info.subpixel_order = SubPixelHorizontalRGB;
encoder_type = 1;
connector_type = 1;
} else
if ((int )sdvo_priv->caps.output_flags & (1 << 0)) {
sdvo_priv->active_outputs = 1 << 0;
connector->display_info.subpixel_order = SubPixelHorizontalRGB;
encoder_type = 2;
connector_type = 3;
} else
if ((int )sdvo_priv->caps.output_flags & (1 << 8)) {
sdvo_priv->active_outputs = 1 << 8;
connector->display_info.subpixel_order = SubPixelHorizontalRGB;
encoder_type = 2;
connector_type = 3;
} else {
__len = 2;
if (__len >= (size_t )64) {
__ret = memcpy(bytes, & sdvo_priv->caps.output_flags, __len);
} else {
__ret = memcpy(bytes, & sdvo_priv->caps.output_flags, __len);
}
while (1) {
if (drm_debug) {
printk("<7>[drm:%s] %s: No active RGB or TMDS outputs (0x%02x%02x)\n", "intel_sdvo_init",
sdvo_priv->output_device == 397632 ? "SDVOB" : "SDVOC", bytes[0], bytes[1]);
} else {
}
break;
}
goto err_i2c;
}
drm_encoder_init(dev, & intel_output->enc, & intel_sdvo_enc_funcs, encoder_type);
drm_encoder_helper_add(& intel_output->enc, & intel_sdvo_helper_funcs);
connector->connector_type = connector_type;
drm_mode_connector_attach_encoder(& intel_output->base, & intel_output->enc);
drm_sysfs_connector_add(connector);
intel_sdvo_set_target_input(intel_output, true, false);
intel_sdvo_get_input_pixel_clock_range(intel_output, & sdvo_priv->pixel_clock_min,
& sdvo_priv->pixel_clock_max);
while (1) {
if (drm_debug) {
printk("<7>[drm:%s] %s device VID/DID: %02X:%02X.%02X, clock range %dMHz - %dMHz, input 1: %c, input 2: %c, output 1: %c, output 2: %c\n",
"intel_sdvo_init", sdvo_priv->output_device == 397632 ? "SDVOB" : "SDVOC",
sdvo_priv->caps.vendor_id, sdvo_priv->caps.device_id, sdvo_priv->caps.device_rev_id,
sdvo_priv->pixel_clock_min / 1000, sdvo_priv->pixel_clock_max / 1000,
sdvo_priv->caps.sdvo_inputs_mask & 1U ? 'Y' : 'N', sdvo_priv->caps.sdvo_inputs_mask & 2U ? 'Y' : 'N',
(int )sdvo_priv->caps.output_flags & ((1 << 0) | (1 << 1)) ? 'Y' : 'N',
(int )sdvo_priv->caps.output_flags & ((1 << 8) | (1 << 9)) ? 'Y' : 'N');
} else {
}
break;
}
intel_output->ddc_bus = i2cbus;
return;
err_i2c:
intel_i2c_destroy(intel_output->i2c_bus);
err_connector:
drm_connector_cleanup(connector);
kfree(intel_output);
return;
}
}
void ldv_main13_sequence_infinite_withcheck_stateful(void)
{
struct drm_encoder *var_group1 ;
int var_intel_sdvo_dpms_26_p1 ;
struct drm_display_mode *var_group2 ;
struct drm_display_mode *var_intel_sdvo_mode_fixup_24_p2 ;
struct drm_display_mode *var_intel_sdvo_mode_set_25_p2 ;
struct drm_connector *var_group3 ;
int tmp ;
int tmp___0 ;
{
LDV_IN_INTERRUPT = 1;
ldv_initialize();
while (1) {
tmp___0 = nondet_int();
if (tmp___0) {
} else {
break;
}
tmp = nondet_int();
switch (tmp) {
case 0:
ldv_handler_precall();
intel_sdvo_dpms(var_group1, var_intel_sdvo_dpms_26_p1);
break;
case 1:
ldv_handler_precall();
intel_sdvo_mode_fixup(var_group1, var_group2, var_intel_sdvo_mode_fixup_24_p2);
break;
case 2:
ldv_handler_precall();
intel_sdvo_mode_set(var_group1, var_group2, var_intel_sdvo_mode_set_25_p2);
break;
case 3:
ldv_handler_precall();
intel_sdvo_save(var_group3);
break;
case 4:
ldv_handler_precall();
intel_sdvo_restore(var_group3);
break;
case 5:
ldv_handler_precall();
intel_sdvo_detect(var_group3);
break;
case 6:
ldv_handler_precall();
intel_sdvo_destroy(var_group3);
break;
case 7:
ldv_handler_precall();
intel_sdvo_get_modes(var_group3);
break;
case 8:
ldv_handler_precall();
intel_sdvo_mode_valid(var_group3, var_group2);
break;
case 9:
ldv_handler_precall();
intel_sdvo_enc_destroy(var_group1);
break;
default:
break;
}
}
ldv_check_final_state();
return;
}
}
extern struct edid *drm_get_edid(struct drm_connector *connector , struct i2c_adapter *adapter ) ;
extern int drm_add_edid_modes(struct drm_connector *connector , struct edid *edid ) ;
extern int drm_mode_connector_update_edid_property(struct drm_connector *connector ,
struct edid *edid ) ;
bool intel_ddc_probe(struct intel_output *intel_output )
{
u8 out_buf[2] ;
u8 buf[2] ;
int ret ;
struct i2c_msg msgs[2] ;
{
out_buf[0] = 0;
out_buf[1] = 0;
msgs[0].addr = 80;
msgs[0].flags = 0;
msgs[0].len = 1;
msgs[0].buf = out_buf;
msgs[1].addr = 80;
msgs[1].flags = 1;
msgs[1].len = 1;
msgs[1].buf = buf;
ret = i2c_transfer(& (intel_output->ddc_bus)->adapter, msgs, 2);
if (ret == 2) {
return (true);
} else {
}
return (false);
}
}
int intel_ddc_get_modes(struct intel_output *intel_output )
{
struct edid *edid ;
int ret ;
{
ret = 0;
edid = drm_get_edid(& intel_output->base, & (intel_output->ddc_bus)->adapter);
if (edid) {
drm_mode_connector_update_edid_property(& intel_output->base, edid);
ret = drm_add_edid_modes(& intel_output->base, edid);
kfree(edid);
} else {
}
return (ret);
}
}
extern int ( /* format attribute */ snprintf)(char *buf , size_t size , char const *fmt
, ...) ;
extern unsigned long usecs_to_jiffies(unsigned int const u ) ;
__inline static void dev_set_drvdata(struct device *dev , void *data )
{
{
dev->driver_data = data;
return;
}
}
__inline static void i2c_set_adapdata(struct i2c_adapter *dev , void *data )
{
{
dev_set_drvdata(& dev->dev, data);
return;
}
}
extern int i2c_del_adapter(struct i2c_adapter * ) ;
extern int i2c_bit_add_bus(struct i2c_adapter * ) ;
static int get_clock(void *data )
{
struct intel_i2c_chan *chan ;
struct drm_i915_private *dev_priv ;
u32 val ;
{
chan = data;
dev_priv = (chan->drm_dev)->dev_private;
val = readl(dev_priv->regs + chan->reg);
return ((val & (unsigned int )(1 << 4)) != 0U);
}
}
static int get_data(void *data )
{
struct intel_i2c_chan *chan ;
struct drm_i915_private *dev_priv ;
u32 val ;
{
chan = data;
dev_priv = (chan->drm_dev)->dev_private;
val = readl(dev_priv->regs + chan->reg);
return ((val & (unsigned int )(1 << 12)) != 0U);
}
}
static void set_clock(void *data , int state_high )
{
struct intel_i2c_chan *chan ;
struct drm_device *dev ;
struct drm_i915_private *dev_priv ;
u32 reserved ;
u32 clock_bits ;
unsigned int tmp ;
{
chan = data;
dev = chan->drm_dev;
dev_priv = (chan->drm_dev)->dev_private;
reserved = 0;
if (! (dev->pci_device == 13687) && ! (dev->pci_device == 9570)) {
tmp = readl(dev_priv->regs + chan->reg);
reserved = tmp & (unsigned int )((1 << 13) | (1 << 5));
} else {
}
if (state_high) {
clock_bits = (0 << 1) | (1 << 0);
} else {
clock_bits = ((1 << 1) | (1 << 0)) | (1 << 2);
}
writel(reserved | clock_bits, dev_priv->regs + chan->reg);
if (20 > 20000) {
__bad_udelay();
} else {
__const_udelay(20UL * 4295UL);
}
return;
}
}
static void set_data(void *data , int state_high )
{
struct intel_i2c_chan *chan ;
struct drm_device *dev ;
struct drm_i915_private *dev_priv ;
u32 reserved ;
u32 data_bits ;
unsigned int tmp ;
{
chan = data;
dev = chan->drm_dev;
dev_priv = (chan->drm_dev)->dev_private;
reserved = 0;
if (! (dev->pci_device == 13687) && ! (dev->pci_device == 9570)) {
tmp = readl(dev_priv->regs + chan->reg);
reserved = tmp & (unsigned int )((1 << 13) | (1 << 5));
} else {
}
if (state_high) {
data_bits = (0 << 9) | (1 << 8);
} else {
data_bits = ((1 << 9) | (1 << 8)) | (1 << 10);
}
writel(reserved | data_bits, dev_priv->regs + chan->reg);
if (20 > 20000) {
__bad_udelay();
} else {
__const_udelay(20UL * 4295UL);
}
return;
}
}
struct intel_i2c_chan *intel_i2c_create(struct drm_device *dev , u32 const reg ,
char const *name )
{
struct intel_i2c_chan *chan ;
void *tmp ;
unsigned long tmp___0 ;
int tmp___1 ;
{
tmp = kzalloc(sizeof(struct intel_i2c_chan ), (16U | 64U) | 128U);
chan = tmp;
if (! chan) {
goto out_free;
} else {
}
chan->drm_dev = dev;
chan->reg = reg;
snprintf(chan->adapter.name, 20, "intel drm %s", name);
chan->adapter.owner = & __this_module;
chan->adapter.id = 65569;
chan->adapter.algo_data = & chan->algo;
chan->adapter.dev.parent = & (dev->pdev)->dev;
chan->algo.setsda = & set_data;
chan->algo.setscl = & set_clock;
chan->algo.getsda = & get_data;
chan->algo.getscl = & get_clock;
chan->algo.udelay = 20;
tmp___0 = usecs_to_jiffies(2200);
chan->algo.timeout = tmp___0;
chan->algo.data = chan;
i2c_set_adapdata(& chan->adapter, chan);
tmp___1 = i2c_bit_add_bus(& chan->adapter);
if (tmp___1) {
goto out_free;
} else {
}
set_data(chan, 1);
set_clock(chan, 1);
if (20 > 20000) {
__bad_udelay();
} else {
__const_udelay(20UL * 4295UL);
}
return (chan);
out_free:
kfree(chan);
return ((void *)0);
}
}
void intel_i2c_destroy(struct intel_i2c_chan *chan )
{
{
if (! chan) {
return;
} else {
}
i2c_del_adapter(& chan->adapter);
kfree(chan);
return;
}
}
extern struct atomic_notifier_head panic_notifier_list ;
extern char *strcpy(char *dest , char const *src ) ;
extern int atomic_notifier_chain_register(struct atomic_notifier_head *nh , struct notifier_block *nb ) ;
extern int atomic_notifier_chain_unregister(struct atomic_notifier_head *nh , struct notifier_block *nb ) ;
__inline extern struct tty_driver *tty_driver_kref_get(struct tty_driver *d )
{
{
kref_get(& d->kref);
return (d);
}
}
__inline extern struct tty_struct *tty_kref_get(struct tty_struct *tty )
{
{
if (tty) {
kref_get(& tty->kref);
} else {
}
return (tty);
}
}
extern int register_sysrq_key(int key , struct sysrq_key_op *op ) ;
extern void cfb_fillrect(struct fb_info *info , struct fb_fillrect const *rect ) ;
extern void cfb_copyarea(struct fb_info *info , struct fb_copyarea const *area ) ;
extern void cfb_imageblit(struct fb_info *info , struct fb_image const *image ) ;
extern int register_framebuffer(struct fb_info *fb_info ) ;
extern int unregister_framebuffer(struct fb_info *fb_info ) ;
extern struct fb_info *framebuffer_alloc(size_t size , struct device *dev ) ;
extern void framebuffer_release(struct fb_info *info ) ;
int intelfb_resize(struct drm_device *dev , struct drm_crtc *crtc ) ;
static int intelfb_setcolreg(unsigned int regno , unsigned int red , unsigned int green ,
unsigned int blue , unsigned int transp , struct fb_info *info )
{
struct intelfb_par *par ;
struct drm_device *dev ;
struct drm_crtc *crtc ;
int i ;
struct list_head const *__mptr ;
struct list_head const *__mptr___0 ;
struct intel_crtc *intel_crtc ;
struct drm_crtc const *__mptr___1 ;
struct drm_mode_set *modeset ;
struct drm_framebuffer *fb ;
{
par = info->par;
dev = par->dev;
__mptr = dev->mode_config.crtc_list.next;
crtc = (struct drm_crtc *)((char *)__mptr - (unsigned int )(& ((struct drm_crtc *)0)->head));
while (1) {
__builtin_prefetch(crtc->head.next);
if ((unsigned long )(& crtc->head) != (unsigned long )(& dev->mode_config.crtc_list)) {
} else {
break;
}
__mptr___1 = crtc;
intel_crtc = (struct intel_crtc *)((char *)__mptr___1 - (unsigned int )(& ((struct intel_crtc *)0)->base));
modeset = & intel_crtc->mode_set;
fb = modeset->fb;
i = 0;
while (1) {
if (i < par->crtc_count) {
} else {
break;
}
if (crtc->base.id == par->crtc_ids[i]) {
break;
} else {
}
i = i + 1;
}
if (i == par->crtc_count) {
goto __Cont;
} else {
}
if (regno > 255U) {
return (1);
} else {
}
if (fb->depth == 8U) {
intel_crtc_fb_gamma_set(crtc, red, green, blue, regno);
return (0);
} else {
}
if (regno < 16U) {
switch (fb->depth) {
case 15U:
fb->pseudo_palette[regno] = (((red & 63488U) >> 1) | ((green & 63488U) >> 6)) | ((blue & 63488U) >> 11);
break;
case 16U:
fb->pseudo_palette[regno] = ((red & 63488U) | ((green & 64512U) >> 5)) | ((blue & 63488U) >> 11);
break;
case 32U:
case 24U:
fb->pseudo_palette[regno] = (((red & 65280U) << 8) | (green & 65280U)) | ((blue & 65280U) >> 8);
break;
}
} else {
}
__Cont: /* CIL Label */
__mptr___0 = crtc->head.next;
crtc = (struct drm_crtc *)((char *)__mptr___0 - (unsigned int )(& ((struct drm_crtc *)0)->head));
}
return (0);
}
}
static int intelfb_check_var(struct fb_var_screeninfo *var , struct fb_info *info )
{
struct intelfb_par *par ;
struct intel_framebuffer *intel_fb ;
struct drm_framebuffer *fb ;
int depth ;
{
par = info->par;
intel_fb = par->intel_fb;
fb = & intel_fb->base;
if (var->pixclock == (__u32 )-1 || ! var->pixclock) {
return (-22);
} else {
}
if (var->xres > fb->width || var->yres > fb->height) {
printk("<3>[drm:%s] *ERROR* Requested width/height is greater than current fb object %dx%d > %dx%d\n",
"intelfb_check_var", var->xres, var->yres, fb->width, fb->height);
printk("<3>[drm:%s] *ERROR* Need resizing code.\n", "intelfb_check_var");
return (-22);
} else {
}
switch (var->bits_per_pixel) {
case (__u32 )16:
depth = var->green.length == (__u32 )6 ? 16 : 15;
break;
case (__u32 )32:
depth = var->transp.length > (__u32 )0 ? 32 : 24;
break;
default:
depth = var->bits_per_pixel;
break;
}
switch (depth) {
case 8:
var->red.offset = 0;
var->green.offset = 0;
var->blue.offset = 0;
var->red.length = 8;
var->green.length = 8;
var->blue.length = 8;
var->transp.length = 0;
var->transp.offset = 0;
break;
case 15:
var->red.offset = 10;
var->green.offset = 5;
var->blue.offset = 0;
var->red.length = 5;
var->green.length = 5;
var->blue.length = 5;
var->transp.length = 1;
var->transp.offset = 15;
break;
case 16:
var->red.offset = 11;
var->green.offset = 5;
var->blue.offset = 0;
var->red.length = 5;
var->green.length = 6;
var->blue.length = 5;
var->transp.length = 0;
var->transp.offset = 0;
break;
case 24:
var->red.offset = 16;
var->green.offset = 8;
var->blue.offset = 0;
var->red.length = 8;
var->green.length = 8;
var->blue.length = 8;
var->transp.length = 0;
var->transp.offset = 0;
break;
case 32:
var->red.offset = 16;
var->green.offset = 8;
var->blue.offset = 0;
var->red.length = 8;
var->green.length = 8;
var->blue.length = 8;
var->transp.length = 8;
var->transp.offset = 24;
break;
default:
return (-22);
}
return (0);
}
}
static int intelfb_set_par(struct fb_info *info )
{
struct intelfb_par *par ;
struct drm_device *dev ;
struct fb_var_screeninfo *var ;
int i ;
struct drm_crtc *crtc ;
int ret ;
struct list_head const *__mptr ;
struct list_head const *__mptr___0 ;
struct intel_crtc *intel_crtc ;
struct drm_crtc const *__mptr___1 ;
{
par = info->par;
dev = par->dev;
var = & info->var;
while (1) {
if (drm_debug) {
printk("<7>[drm:%s] %d %d\n", "intelfb_set_par", var->xres, var->pixclock);
} else {
}
break;
}
if (var->pixclock != (__u32 )-1) {
printk("<3>[drm:%s] *ERROR* PIXEL CLCOK SET\n", "intelfb_set_par");
return (-22);
} else {
__mptr = dev->mode_config.crtc_list.next;
crtc = (struct drm_crtc *)((char *)__mptr - (unsigned int )(& ((struct drm_crtc *)0)->head));
while (1) {
__builtin_prefetch(crtc->head.next);
if ((unsigned long )(& crtc->head) != (unsigned long )(& dev->mode_config.crtc_list)) {
} else {
break;
}
__mptr___1 = crtc;
intel_crtc = (struct intel_crtc *)((char *)__mptr___1 - (unsigned int )(& ((struct intel_crtc *)0)->base));
i = 0;
while (1) {
if (i < par->crtc_count) {
} else {
break;
}
if (crtc->base.id == par->crtc_ids[i]) {
break;
} else {
}
i = i + 1;
}
if (i == par->crtc_count) {
goto __Cont;
} else {
}
if ((unsigned long )crtc->fb == (unsigned long )intel_crtc->mode_set.fb) {
mutex_lock_nested(& dev->mode_config.mutex, 0);
ret = (*((crtc->funcs)->set_config))(& intel_crtc->mode_set);
mutex_unlock(& dev->mode_config.mutex);
if (ret) {
return (ret);
} else {
}
} else {
}
__Cont: /* CIL Label */
__mptr___0 = crtc->head.next;
crtc = (struct drm_crtc *)((char *)__mptr___0 - (unsigned int )(& ((struct drm_crtc *)0)->head));
}
return (0);
}
}
}
static int intelfb_pan_display(struct fb_var_screeninfo *var , struct fb_info *info )
{
struct intelfb_par *par ;
struct drm_device *dev ;
struct drm_mode_set *modeset ;
struct drm_crtc *crtc ;
struct intel_crtc *intel_crtc ;
int ret ;
int i ;
struct list_head const *__mptr ;
struct list_head const *__mptr___0 ;
struct drm_crtc const *__mptr___1 ;
{
par = info->par;
dev = par->dev;
ret = 0;
__mptr = dev->mode_config.crtc_list.next;
crtc = (struct drm_crtc *)((char *)__mptr - (unsigned int )(& ((struct drm_crtc *)0)->head));
while (1) {
__builtin_prefetch(crtc->head.next);
if ((unsigned long )(& crtc->head) != (unsigned long )(& dev->mode_config.crtc_list)) {
} else {
break;
}
i = 0;
while (1) {
if (i < par->crtc_count) {
} else {
break;
}
if (crtc->base.id == par->crtc_ids[i]) {
break;
} else {
}
i = i + 1;
}
if (i == par->crtc_count) {
goto __Cont;
} else {
}
__mptr___1 = crtc;
intel_crtc = (struct intel_crtc *)((char *)__mptr___1 - (unsigned int )(& ((struct intel_crtc *)0)->base));
modeset = & intel_crtc->mode_set;
modeset->x = var->xoffset;
modeset->y = var->yoffset;
if (modeset->num_connectors) {
mutex_lock_nested(& dev->mode_config.mutex, 0);
ret = (*((crtc->funcs)->set_config))(modeset);
mutex_unlock(& dev->mode_config.mutex);
if (! ret) {
info->var.xoffset = var->xoffset;
info->var.yoffset = var->yoffset;
} else {
}
} else {
}
__Cont: /* CIL Label */
__mptr___0 = crtc->head.next;
crtc = (struct drm_crtc *)((char *)__mptr___0 - (unsigned int )(& ((struct drm_crtc *)0)->head));
}
return (ret);
}
}
static void intelfb_on(struct fb_info *info )
{
struct intelfb_par *par ;
struct drm_device *dev ;
struct drm_crtc *crtc ;
struct drm_encoder *encoder ;
int i ;
struct list_head const *__mptr ;
struct list_head const *__mptr___0 ;
struct drm_crtc_helper_funcs *crtc_funcs ;
struct list_head const *__mptr___1 ;
struct list_head const *__mptr___2 ;
struct drm_encoder_helper_funcs *encoder_funcs ;
{
par = info->par;
dev = par->dev;
__mptr = dev->mode_config.crtc_list.next;
crtc = (struct drm_crtc *)((char *)__mptr - (unsigned int )(& ((struct drm_crtc *)0)->head));
while (1) {
__builtin_prefetch(crtc->head.next);
if ((unsigned long )(& crtc->head) != (unsigned long )(& dev->mode_config.crtc_list)) {
} else {
break;
}
crtc_funcs = crtc->helper_private;
i = 0;
while (1) {
if (i < par->crtc_count) {
} else {
break;
}
if (crtc->base.id == par->crtc_ids[i]) {
break;
} else {
}
i = i + 1;
}
(*(crtc_funcs->dpms))(crtc, 0);
__mptr___1 = dev->mode_config.encoder_list.next;
encoder = (struct drm_encoder *)((char *)__mptr___1 - (unsigned int )(& ((struct drm_encoder *)0)->head));
while (1) {
__builtin_prefetch(encoder->head.next);
if ((unsigned long )(& encoder->head) != (unsigned long )(& dev->mode_config.encoder_list)) {
} else {
break;
}
if ((unsigned long )encoder->crtc == (unsigned long )crtc) {
encoder_funcs = encoder->helper_private;
(*(encoder_funcs->dpms))(encoder, 0);
} else {
}
__mptr___2 = encoder->head.next;
encoder = (struct drm_encoder *)((char *)__mptr___2 - (unsigned int )(& ((struct drm_encoder *)0)->head));
}
__mptr___0 = crtc->head.next;
crtc = (struct drm_crtc *)((char *)__mptr___0 - (unsigned int )(& ((struct drm_crtc *)0)->head));
}
return;
}
}
static void intelfb_off(struct fb_info *info , int dpms_mode )
{
struct intelfb_par *par ;
struct drm_device *dev ;
struct drm_crtc *crtc ;
struct drm_encoder *encoder ;
int i ;
struct list_head const *__mptr ;
struct list_head const *__mptr___0 ;
struct drm_crtc_helper_funcs *crtc_funcs ;
struct list_head const *__mptr___1 ;
struct list_head const *__mptr___2 ;
struct drm_encoder_helper_funcs *encoder_funcs ;
{
par = info->par;
dev = par->dev;
__mptr = dev->mode_config.crtc_list.next;
crtc = (struct drm_crtc *)((char *)__mptr - (unsigned int )(& ((struct drm_crtc *)0)->head));
while (1) {
__builtin_prefetch(crtc->head.next);
if ((unsigned long )(& crtc->head) != (unsigned long )(& dev->mode_config.crtc_list)) {
} else {
break;
}
crtc_funcs = crtc->helper_private;
i = 0;
while (1) {
if (i < par->crtc_count) {
} else {
break;
}
if (crtc->base.id == par->crtc_ids[i]) {
break;
} else {
}
i = i + 1;
}
__mptr___1 = dev->mode_config.encoder_list.next;
encoder = (struct drm_encoder *)((char *)__mptr___1 - (unsigned int )(& ((struct drm_encoder *)0)->head));
while (1) {
__builtin_prefetch(encoder->head.next);
if ((unsigned long )(& encoder->head) != (unsigned long )(& dev->mode_config.encoder_list)) {
} else {
break;
}
if ((unsigned long )encoder->crtc == (unsigned long )crtc) {
encoder_funcs = encoder->helper_private;
(*(encoder_funcs->dpms))(encoder, dpms_mode);
} else {
}
__mptr___2 = encoder->head.next;
encoder = (struct drm_encoder *)((char *)__mptr___2 - (unsigned int )(& ((struct drm_encoder *)0)->head));
}
if (dpms_mode == 3) {
(*(crtc_funcs->dpms))(crtc, dpms_mode);
} else {
}
__mptr___0 = crtc->head.next;
crtc = (struct drm_crtc *)((char *)__mptr___0 - (unsigned int )(& ((struct drm_crtc *)0)->head));
}
return;
}
}
static int intelfb_blank(int blank , struct fb_info *info )
{
{
switch (blank) {
case FB_BLANK_UNBLANK:
intelfb_on(info);
break;
case FB_BLANK_NORMAL:
intelfb_off(info, 1);
break;
case FB_BLANK_HSYNC_SUSPEND:
intelfb_off(info, 1);
break;
case FB_BLANK_VSYNC_SUSPEND:
intelfb_off(info, 2);
break;
case FB_BLANK_POWERDOWN:
intelfb_off(info, 3);
break;
}
return (0);
}
}
static struct fb_ops intelfb_ops =
{& __this_module, 0, 0, 0, 0, & intelfb_check_var, & intelfb_set_par, & intelfb_setcolreg,
0, & intelfb_blank, & intelfb_pan_display, & cfb_fillrect, & cfb_copyarea, & cfb_imageblit,
0, 0, 0, 0, 0, 0, 0, 0, 0};
int intelfb_resize(struct drm_device *dev , struct drm_crtc *crtc )
{
struct fb_info *info ;
struct drm_framebuffer *fb ;
struct drm_display_mode *mode ;
{
mode = crtc->desired_mode;
fb = crtc->fb;
if (! fb) {
return (1);
} else {
}
info = fb->fbdev;
if (! info) {
return (1);
} else {
}
if (! mode) {
return (1);
} else {
}
info->var.xres = mode->hdisplay;
info->var.right_margin = mode->hsync_start - mode->hdisplay;
info->var.hsync_len = mode->hsync_end - mode->hsync_start;
info->var.left_margin = mode->htotal - mode->hsync_end;
info->var.yres = mode->vdisplay;
info->var.lower_margin = mode->vsync_start - mode->vdisplay;
info->var.vsync_len = mode->vsync_end - mode->vsync_start;
info->var.upper_margin = mode->vtotal - mode->vsync_end;
info->var.pixclock = (((10000000 / mode->htotal) * 1000) / mode->vtotal) * 100;
info->var.pixclock = (info->var.pixclock * (__u32 )1000) / (__u32 )mode->vrefresh;
return (0);
}
}
extern void *__crc_intelfb_resize __attribute__((__weak__)) ;
static unsigned long const __kcrctab_intelfb_resize __attribute__((__used__, __unused__,
__section__("__kcrctab"))) = (unsigned long )(& __crc_intelfb_resize);
static char const __kstrtab_intelfb_resize[15] __attribute__((__section__("__ksymtab_strings"),
__aligned__(1))) =
{ 'i', 'n', 't', 'e',
'l', 'f', 'b', '_',
'r', 'e', 's', 'i',
'z', 'e', '\000'};
static struct kernel_symbol const __ksymtab_intelfb_resize __attribute__((__used__,
__unused__, __section__("__ksymtab"))) = {(unsigned long )(& intelfb_resize), __kstrtab_intelfb_resize};
static struct drm_mode_set kernelfb_mode ;
static int intelfb_panic(struct notifier_block *n , unsigned long ununsed , void *panic_str )
{
{
printk("<3>[drm:%s] *ERROR* panic occurred, switching back to text console\n", "intelfb_panic");
intelfb_restore();
return (0);
}
}
static struct notifier_block paniced = {& intelfb_panic, 0, 0};
static int intelfb_create(struct drm_device *dev , uint32_t fb_width , uint32_t fb_height ,
uint32_t surface_width , uint32_t surface_height , struct intel_framebuffer **intel_fb_p )
{
struct fb_info *info ;
struct intelfb_par *par ;
struct drm_framebuffer *fb ;
struct intel_framebuffer *intel_fb ;
struct drm_mode_fb_cmd mode_cmd ;
struct drm_gem_object *fbo ;
struct drm_i915_gem_object *obj_priv ;
struct device *device ;
int size ;
int ret ;
int mmio_bar ;
struct drm_framebuffer const *__mptr ;
void *tmp ;
{
fbo = (void *)0;
device = & (dev->pdev)->dev;
mmio_bar = (((((dev->pci_device == 9602 || dev->pci_device == 9610) || dev->pci_device == 9618) || dev->pci_device == 10098) || (dev->pci_device == 10146 || dev->pci_device == 10158)) || (((((((((dev->pci_device == 10610 || dev->pci_device == 10626) || dev->pci_device == 10642) || dev->pci_device == 10658) || dev->pci_device == 10754) || dev->pci_device == 10770) || dev->pci_device == 10818) || dev->pci_device == 11778) || dev->pci_device == 11794) || dev->pci_device == 11810)) || ((dev->pci_device == 10690 || dev->pci_device == 10674) || dev->pci_device == 10706) ? 0 : 1;
mode_cmd.width = surface_width;
mode_cmd.height = surface_height;
mode_cmd.bpp = 32;
mode_cmd.pitch = (mode_cmd.width * ((mode_cmd.bpp + (uint32_t )1) / (uint32_t )8) + ((uint32_t )64 - (uint32_t )1)) & ~ ((uint32_t )64 - (uint32_t )1);
mode_cmd.depth = 24;
size = mode_cmd.pitch * mode_cmd.height;
size = (size + ((int )(1UL << 12) - 1)) & ~ ((int )(1UL << 12) - 1);
fbo = drm_gem_object_alloc(dev, size);
if (! fbo) {
printk("<3>failed to allocate framebuffer\n");
ret = -12;
goto out;
} else {
}
obj_priv = fbo->driver_private;
mutex_lock_nested(& dev->struct_mutex, 0);
ret = i915_gem_object_pin(fbo, 1UL << 12);
if (ret) {
printk("<3>[drm:%s] *ERROR* failed to pin fb: %d\n", "intelfb_create", ret);
goto out_unref;
} else {
}
i915_gem_object_set_to_gtt_domain(fbo, 1);
ret = intel_framebuffer_create(dev, & mode_cmd, & fb, fbo);
if (ret) {
printk("<3>[drm:%s] *ERROR* failed to allocate fb.\n", "intelfb_create");
goto out_unref;
} else {
}
list_add(& fb->filp_head, & dev->mode_config.fb_kernel_list);
__mptr = fb;
intel_fb = (struct intel_framebuffer *)((char *)__mptr - (unsigned int )(& ((struct intel_framebuffer *)0)->base));
*intel_fb_p = intel_fb;
info = framebuffer_alloc(sizeof(struct intelfb_par ), device);
if (! info) {
ret = -12;
goto out_unref;
} else {
}
par = info->par;
strcpy(info->fix.id, "inteldrmfb");
info->fix.type = 0;
info->fix.visual = 2;
info->fix.type_aux = 0;
info->fix.xpanstep = 1;
info->fix.ypanstep = 1;
info->fix.ywrapstep = 0;
info->fix.accel = 42;
info->fix.type_aux = 0;
info->flags = 1;
info->fbops = & intelfb_ops;
info->fix.line_length = fb->pitch;
info->fix.smem_start = dev->mode_config.fb_base + (unsigned long )obj_priv->gtt_offset;
info->fix.smem_len = size;
info->flags = 1;
tmp = ioremap_wc((dev->agp)->base + (unsigned long )obj_priv->gtt_offset, size);
info->screen_base = tmp;
if (! info->screen_base) {
ret = -28;
goto out_unref;
} else {
}
info->screen_size = size;
info->pseudo_palette = fb->pseudo_palette;
info->var.xres_virtual = fb->width;
info->var.yres_virtual = fb->height;
info->var.bits_per_pixel = fb->bits_per_pixel;
info->var.xoffset = 0;
info->var.yoffset = 0;
info->var.activate = 0;
info->var.height = -1;
info->var.width = -1;
info->var.xres = fb_width;
info->var.yres = fb_height;
info->fix.mmio_start = (dev->pdev)->resource[mmio_bar].start;
info->fix.mmio_len = (dev->pdev)->resource[mmio_bar].start == (resource_size_t )0 && (dev->pdev)->resource[mmio_bar].end == (dev->pdev)->resource[mmio_bar].start ? 0 : ((dev->pdev)->resource[mmio_bar].end - (dev->pdev)->resource[mmio_bar].start) + (resource_size_t )1;
info->pixmap.size = 64 * 1024;
info->pixmap.buf_align = 8;
info->pixmap.access_align = 32;
info->pixmap.flags = 2;
info->pixmap.scan_align = 1;
switch (fb->depth) {
case 8U:
info->var.red.offset = 0;
info->var.green.offset = 0;
info->var.blue.offset = 0;
info->var.red.length = 8;
info->var.green.length = 8;
info->var.blue.length = 8;
info->var.transp.offset = 0;
info->var.transp.length = 0;
break;
case 15U:
info->var.red.offset = 10;
info->var.green.offset = 5;
info->var.blue.offset = 0;
info->var.red.length = 5;
info->var.green.length = 5;
info->var.blue.length = 5;
info->var.transp.offset = 15;
info->var.transp.length = 1;
break;
case 16U:
info->var.red.offset = 11;
info->var.green.offset = 5;
info->var.blue.offset = 0;
info->var.red.length = 5;
info->var.green.length = 6;
info->var.blue.length = 5;
info->var.transp.offset = 0;
break;
case 24U:
info->var.red.offset = 16;
info->var.green.offset = 8;
info->var.blue.offset = 0;
info->var.red.length = 8;
info->var.green.length = 8;
info->var.blue.length = 8;
info->var.transp.offset = 0;
info->var.transp.length = 0;
break;
case 32U:
info->var.red.offset = 16;
info->var.green.offset = 8;
info->var.blue.offset = 0;
info->var.red.length = 8;
info->var.green.length = 8;
info->var.blue.length = 8;
info->var.transp.offset = 24;
info->var.transp.length = 8;
break;
default:
break;
}
fb->fbdev = info;
par->intel_fb = intel_fb;
par->dev = dev;
printk("allocated %dx%d fb: 0x%08x, bo %p\n", intel_fb->base.width, intel_fb->base.height,
obj_priv->gtt_offset, fbo);
mutex_unlock(& dev->struct_mutex);
return (0);
out_unref:
drm_gem_object_unreference(fbo);
mutex_unlock(& dev->struct_mutex);
out:
return (ret);
}
}
static int intelfb_multi_fb_probe_crtc(struct drm_device *dev , struct drm_crtc *crtc )
{
struct intel_crtc *intel_crtc ;
struct drm_crtc const *__mptr ;
struct intel_framebuffer *intel_fb ;
struct drm_framebuffer *fb ;
struct drm_connector *connector ;
struct fb_info *info ;
struct intelfb_par *par ;
struct drm_mode_set *modeset ;
unsigned int width ;
unsigned int height ;
int new_fb ;
int ret ;
int i ;
int conn_count ;
bool tmp ;
struct drm_framebuffer const *__mptr___0 ;
struct list_head const *__mptr___1 ;
struct list_head const *__mptr___2 ;
int tmp___0 ;
{
__mptr = crtc;
intel_crtc = (struct intel_crtc *)((char *)__mptr - (unsigned int )(& ((struct intel_crtc *)0)->base));
new_fb = 0;
tmp = drm_helper_crtc_in_use(crtc);
if (tmp) {
} else {
return (0);
}
if (! crtc->desired_mode) {
return (0);
} else {
}
width = (crtc->desired_mode)->hdisplay;
height = (crtc->desired_mode)->vdisplay;
if (! intel_crtc->mode_set.fb) {
ret = intelfb_create(dev, width, height, width, height, & intel_fb);
if (ret) {
return (-22);
} else {
}
new_fb = 1;
} else {
fb = intel_crtc->mode_set.fb;
__mptr___0 = fb;
intel_fb = (struct intel_framebuffer *)((char *)__mptr___0 - (unsigned int )(& ((struct intel_framebuffer *)0)->base));
if (intel_fb->base.width < width || intel_fb->base.height < height) {
return (-22);
} else {
}
}
info = intel_fb->base.fbdev;
par = info->par;
modeset = & intel_crtc->mode_set;
modeset->fb = & intel_fb->base;
conn_count = 0;
__mptr___1 = dev->mode_config.connector_list.next;
connector = (struct drm_connector *)((char *)__mptr___1 - (unsigned int )(& ((struct drm_connector *)0)->head));
while (1) {
__builtin_prefetch(connector->head.next);
if ((unsigned long )(& connector->head) != (unsigned long )(& dev->mode_config.connector_list)) {
} else {
break;
}
if (connector->encoder) {
if ((unsigned long )(connector->encoder)->crtc == (unsigned long )modeset->crtc) {
*(modeset->connectors + conn_count) = connector;
conn_count = conn_count + 1;
if (conn_count > 4) {
while (1) {
__asm__ volatile ("1:\tud2\n"
".pushsection __bug_table,\"a\"\n"
"2:\t.quad 1b, %c0\n"
"\t.word %c1, 0\n"
"\t.org 2b+%c2\n"
".popsection": : "i" ("/work/ldvuser/novikov/work/current--X--drivers/gpu/drm/i915/i915.ko--X--defaultlinux--X--68_1--X--cpachecker/linux/csd_deg_dscv/36/dscv_tempdir/dscv/ri/68_1/drivers/gpu/drm/i915/intel_fb.c"),
"i" (666), "i" (sizeof(struct bug_entry )));
while (1) {
}
break;
}
} else {
}
} else {
}
} else {
}
__mptr___2 = connector->head.next;
connector = (struct drm_connector *)((char *)__mptr___2 - (unsigned int )(& ((struct drm_connector *)0)->head));
}
i = conn_count;
while (1) {
if (i < 4) {
} else {
break;
}
*(modeset->connectors + i) = (void *)0;
i = i + 1;
}
par->crtc_ids[0] = crtc->base.id;
modeset->num_connectors = conn_count;
if ((unsigned long )modeset->mode != (unsigned long )(modeset->crtc)->desired_mode) {
modeset->mode = (modeset->crtc)->desired_mode;
} else {
}
par->crtc_count = 1;
if (new_fb) {
info->var.pixclock = -1;
tmp___0 = register_framebuffer(info);
if (tmp___0 < 0) {
return (-22);
} else {
}
} else {
intelfb_set_par(info);
}
printk("<6>fb%d: %s frame buffer device\n", info->node, info->fix.id);
kernelfb_mode = *modeset;
atomic_notifier_chain_register(& panic_notifier_list, & paniced);
printk("<6>registered panic notifier\n");
return (0);
}
}
static int intelfb_multi_fb_probe(struct drm_device *dev )
{
struct drm_crtc *crtc ;
int ret ;
struct list_head const *__mptr ;
struct list_head const *__mptr___0 ;
{
ret = 0;
__mptr = dev->mode_config.crtc_list.next;
crtc = (struct drm_crtc *)((char *)__mptr - (unsigned int )(& ((struct drm_crtc *)0)->head));
while (1) {
__builtin_prefetch(crtc->head.next);
if ((unsigned long )(& crtc->head) != (unsigned long )(& dev->mode_config.crtc_list)) {
} else {
break;
}
ret = intelfb_multi_fb_probe_crtc(dev, crtc);
if (ret) {
return (ret);
} else {
}
__mptr___0 = crtc->head.next;
crtc = (struct drm_crtc *)((char *)__mptr___0 - (unsigned int )(& ((struct drm_crtc *)0)->head));
}
return (ret);
}
}
static int intelfb_single_fb_probe(struct drm_device *dev )
{
struct drm_crtc *crtc ;
struct drm_connector *connector ;
unsigned int fb_width ;
unsigned int fb_height ;
unsigned int surface_width ;
unsigned int surface_height ;
int new_fb ;
int crtc_count ;
int ret ;
int i ;
int conn_count ;
struct intel_framebuffer *intel_fb ;
struct fb_info *info ;
struct intelfb_par *par ;
struct drm_mode_set *modeset ;
struct list_head const *__mptr ;
struct list_head const *__mptr___0 ;
bool tmp ;
struct drm_framebuffer *fb ;
struct list_head const *__mptr___1 ;
struct drm_framebuffer const *__mptr___2 ;
int tmp___0 ;
struct list_head const *__mptr___3 ;
struct list_head const *__mptr___4 ;
struct intel_crtc *intel_crtc ;
struct drm_crtc const *__mptr___5 ;
struct list_head const *__mptr___6 ;
struct list_head const *__mptr___7 ;
int tmp___1 ;
int tmp___2 ;
int tmp___3 ;
{
fb_width = 4294967295U;
fb_height = 4294967295U;
surface_width = 0;
surface_height = 0;
new_fb = 0;
crtc_count = 0;
conn_count = 0;
modeset = (void *)0;
while (1) {
if (drm_debug) {
printk("<7>[drm:%s] \n", "intelfb_single_fb_probe");
} else {
}
break;
}
__mptr = dev->mode_config.crtc_list.next;
crtc = (struct drm_crtc *)((char *)__mptr - (unsigned int )(& ((struct drm_crtc *)0)->head));
while (1) {
__builtin_prefetch(crtc->head.next);
if ((unsigned long )(& crtc->head) != (unsigned long )(& dev->mode_config.crtc_list)) {
} else {
break;
}
tmp = drm_helper_crtc_in_use(crtc);
if (tmp) {
} else {
goto __Cont;
}
crtc_count = crtc_count + 1;
if (! crtc->desired_mode) {
goto __Cont;
} else {
}
if ((unsigned int )(crtc->desired_mode)->hdisplay < fb_width) {
fb_width = (crtc->desired_mode)->hdisplay;
} else {
}
if ((unsigned int )(crtc->desired_mode)->vdisplay < fb_height) {
fb_height = (crtc->desired_mode)->vdisplay;
} else {
}
if ((unsigned int )(crtc->desired_mode)->hdisplay > surface_width) {
surface_width = (crtc->desired_mode)->hdisplay;
} else {
}
if ((unsigned int )(crtc->desired_mode)->vdisplay > surface_height) {
surface_height = (crtc->desired_mode)->vdisplay;
} else {
}
__Cont: /* CIL Label */
__mptr___0 = crtc->head.next;
crtc = (struct drm_crtc *)((char *)__mptr___0 - (unsigned int )(& ((struct drm_crtc *)0)->head));
}
if ((crtc_count == 0 || fb_width == 4294967295U) || fb_height == 4294967295U) {
while (1) {
if (drm_debug) {
printk("<7>[drm:%s] no CRTCs available?\n", "intelfb_single_fb_probe");
} else {
}
break;
}
return (0);
} else {
}
tmp___0 = list_empty(& dev->mode_config.fb_kernel_list);
if (tmp___0) {
while (1) {
if (drm_debug) {
printk("<7>[drm:%s] creating new fb (console size %dx%d, buffer size %dx%d)\n",
"intelfb_single_fb_probe", fb_width, fb_height, surface_width, surface_height);
} else {
}
break;
}
ret = intelfb_create(dev, fb_width, fb_height, surface_width, surface_height,
& intel_fb);
if (ret) {
return (-22);
} else {
}
new_fb = 1;
} else {
__mptr___1 = dev->mode_config.fb_kernel_list.next;
fb = (struct drm_framebuffer *)((char *)__mptr___1 - (unsigned int )(& ((struct drm_framebuffer *)0)->filp_head));
__mptr___2 = fb;
intel_fb = (struct intel_framebuffer *)((char *)__mptr___2 - (unsigned int )(& ((struct intel_framebuffer *)0)->base));
if (fb->width < surface_width || fb->height < surface_height) {
printk("<3>[drm:%s] *ERROR* fb not large enough for console\n", "intelfb_single_fb_probe");
return (-22);
} else {
}
}
info = intel_fb->base.fbdev;
par = info->par;
crtc_count = 0;
__mptr___3 = dev->mode_config.crtc_list.next;
crtc = (struct drm_crtc *)((char *)__mptr___3 - (unsigned int )(& ((struct drm_crtc *)0)->head));
while (1) {
__builtin_prefetch(crtc->head.next);
if ((unsigned long )(& crtc->head) != (unsigned long )(& dev->mode_config.crtc_list)) {
} else {
break;
}
__mptr___5 = crtc;
intel_crtc = (struct intel_crtc *)((char *)__mptr___5 - (unsigned int )(& ((struct intel_crtc *)0)->base));
modeset = & intel_crtc->mode_set;
modeset->fb = & intel_fb->base;
conn_count = 0;
__mptr___6 = dev->mode_config.connector_list.next;
connector = (struct drm_connector *)((char *)__mptr___6 - (unsigned int )(& ((struct drm_connector *)0)->head));
while (1) {
__builtin_prefetch(connector->head.next);
if ((unsigned long )(& connector->head) != (unsigned long )(& dev->mode_config.connector_list)) {
} else {
break;
}
if (! connector->encoder) {
goto __Cont___0;
} else {
}
if ((unsigned long )(connector->encoder)->crtc == (unsigned long )modeset->crtc) {
tmp___1 = conn_count;
conn_count = conn_count + 1;
*(modeset->connectors + tmp___1) = connector;
if (conn_count > 4) {
while (1) {
__asm__ volatile ("1:\tud2\n"
".pushsection __bug_table,\"a\"\n"
"2:\t.quad 1b, %c0\n"
"\t.word %c1, 0\n"
"\t.org 2b+%c2\n"
".popsection": : "i" ("/work/ldvuser/novikov/work/current--X--drivers/gpu/drm/i915/i915.ko--X--defaultlinux--X--68_1--X--cpachecker/linux/csd_deg_dscv/36/dscv_tempdir/dscv/ri/68_1/drivers/gpu/drm/i915/intel_fb.c"),
"i" (815), "i" (sizeof(struct bug_entry )));
while (1) {
}
break;
}
} else {
}
} else {
}
__Cont___0: /* CIL Label */
__mptr___7 = connector->head.next;
connector = (struct drm_connector *)((char *)__mptr___7 - (unsigned int )(& ((struct drm_connector *)0)->head));
}
i = conn_count;
while (1) {
if (i < 4) {
} else {
break;
}
*(modeset->connectors + i) = (void *)0;
i = i + 1;
}
tmp___2 = crtc_count;
crtc_count = crtc_count + 1;
par->crtc_ids[tmp___2] = crtc->base.id;
modeset->num_connectors = conn_count;
if ((unsigned long )modeset->mode != (unsigned long )(modeset->crtc)->desired_mode) {
modeset->mode = (modeset->crtc)->desired_mode;
} else {
}
__mptr___4 = crtc->head.next;
crtc = (struct drm_crtc *)((char *)__mptr___4 - (unsigned int )(& ((struct drm_crtc *)0)->head));
}
par->crtc_count = crtc_count;
if (new_fb) {
info->var.pixclock = -1;
tmp___3 = register_framebuffer(info);
if (tmp___3 < 0) {
return (-22);
} else {
}
} else {
intelfb_set_par(info);
}
printk("<6>fb%d: %s frame buffer device\n", info->node, info->fix.id);
kernelfb_mode = *modeset;
atomic_notifier_chain_register(& panic_notifier_list, & paniced);
printk("<6>registered panic notifier\n");
return (0);
}
}
void intelfb_restore(void)
{
{
drm_crtc_helper_set_config(& kernelfb_mode);
return;
}
}
static void intelfb_sysrq(int dummy1 , struct tty_struct *dummy3 )
{
{
intelfb_restore();
return;
}
}
static struct sysrq_key_op sysrq_intelfb_restore_op = {& intelfb_sysrq, "force fb", "force restore of fb console", 0};
int intelfb_probe(struct drm_device *dev )
{
int ret ;
{
while (1) {
if (drm_debug) {
printk("<7>[drm:%s] \n", "intelfb_probe");
} else {
}
break;
}
if (i915_fbpercrtc == 1U) {
ret = intelfb_multi_fb_probe(dev);
} else {
ret = intelfb_single_fb_probe(dev);
}
register_sysrq_key('g', & sysrq_intelfb_restore_op);
return (ret);
}
}
extern void *__crc_intelfb_probe __attribute__((__weak__)) ;
static unsigned long const __kcrctab_intelfb_probe __attribute__((__used__, __unused__,
__section__("__kcrctab"))) = (unsigned long )(& __crc_intelfb_probe);
static char const __kstrtab_intelfb_probe[14] __attribute__((__section__("__ksymtab_strings"),
__aligned__(1))) =
{ 'i', 'n', 't', 'e',
'l', 'f', 'b', '_',
'p', 'r', 'o', 'b',
'e', '\000'};
static struct kernel_symbol const __ksymtab_intelfb_probe __attribute__((__used__,
__unused__, __section__("__ksymtab"))) = {(unsigned long )(& intelfb_probe), __kstrtab_intelfb_probe};
int intelfb_remove(struct drm_device *dev , struct drm_framebuffer *fb )
{
struct fb_info *info ;
{
if (! fb) {
return (-22);
} else {
}
info = fb->fbdev;
if (info) {
unregister_framebuffer(info);
iounmap(info->screen_base);
framebuffer_release(info);
} else {
}
atomic_notifier_chain_unregister(& panic_notifier_list, & paniced);
memset(& kernelfb_mode, 0, sizeof(struct drm_mode_set ));
return (0);
}
}
extern void *__crc_intelfb_remove __attribute__((__weak__)) ;
static unsigned long const __kcrctab_intelfb_remove __attribute__((__used__, __unused__,
__section__("__kcrctab"))) = (unsigned long )(& __crc_intelfb_remove);
static char const __kstrtab_intelfb_remove[15] __attribute__((__section__("__ksymtab_strings"),
__aligned__(1))) =
{ 'i', 'n', 't', 'e',
'l', 'f', 'b', '_',
'r', 'e', 'm', 'o',
'v', 'e', '\000'};
static struct kernel_symbol const __ksymtab_intelfb_remove __attribute__((__used__,
__unused__, __section__("__ksymtab"))) = {(unsigned long )(& intelfb_remove), __kstrtab_intelfb_remove};
static char const __mod_license926[34] __attribute__((__used__, __unused__, __section__(".modinfo"))) =
{ 'l', 'i', 'c', 'e',
'n', 's', 'e', '=',
'G', 'P', 'L', ' ',
'a', 'n', 'd', ' ',
'a', 'd', 'd', 'i',
't', 'i', 'o', 'n',
'a', 'l', ' ', 'r',
'i', 'g', 'h', 't',
's', '\000'};
void ldv_main16_sequence_infinite_withcheck_stateful(void)
{
struct fb_var_screeninfo *var_group1 ;
struct fb_info *var_group2 ;
unsigned int var_intelfb_setcolreg_0_p0 ;
unsigned int var_intelfb_setcolreg_0_p1 ;
unsigned int var_intelfb_setcolreg_0_p2 ;
unsigned int var_intelfb_setcolreg_0_p3 ;
unsigned int var_intelfb_setcolreg_0_p4 ;
struct fb_info *var_intelfb_setcolreg_0_p5 ;
int var_intelfb_blank_6_p0 ;
struct notifier_block *var_group3 ;
unsigned long var_intelfb_panic_8_p1 ;
void *var_intelfb_panic_8_p2 ;
int var_intelfb_sysrq_14_p0 ;
struct tty_struct *var_group4 ;
int tmp ;
int tmp___0 ;
{
LDV_IN_INTERRUPT = 1;
ldv_initialize();
while (1) {
tmp___0 = nondet_int();
if (tmp___0) {
} else {
break;
}
tmp = nondet_int();
switch (tmp) {
case 0:
ldv_handler_precall();
intelfb_check_var(var_group1, var_group2);
break;
case 1:
ldv_handler_precall();
intelfb_set_par(var_group2);
break;
case 2:
ldv_handler_precall();
intelfb_setcolreg(var_intelfb_setcolreg_0_p0, var_intelfb_setcolreg_0_p1, var_intelfb_setcolreg_0_p2,
var_intelfb_setcolreg_0_p3, var_intelfb_setcolreg_0_p4, var_intelfb_setcolreg_0_p5);
break;
case 3:
ldv_handler_precall();
intelfb_pan_display(var_group1, var_group2);
break;
case 4:
ldv_handler_precall();
intelfb_blank(var_intelfb_blank_6_p0, var_group2);
break;
case 5:
ldv_handler_precall();
intelfb_panic(var_group3, var_intelfb_panic_8_p1, var_intelfb_panic_8_p2);
break;
case 6:
ldv_handler_precall();
intelfb_sysrq(var_intelfb_sysrq_14_p0, var_group4);
break;
default:
break;
}
}
ldv_check_final_state();
return;
}
}
extern int strcmp(char const *cs , char const *ct ) ;
extern char *strncpy(char * , char const * , __kernel_size_t ) ;
extern int drm_mode_vrefresh(struct drm_display_mode *mode ) ;
extern int drm_connector_property_set_value(struct drm_connector *connector , struct drm_property *property ,
uint64_t value ) ;
extern int drm_connector_attach_property(struct drm_connector *connector , struct drm_property *property ,
uint64_t init_val ) ;
extern int drm_mode_create_tv_properties(struct drm_device *dev , int num_formats ,
char **formats ) ;
static u32 const filter_table[206] =
{ 2973773824U, 773862656, 889204256, 805351744,
899723616, 767569536, 2973774976U, 2975870976U,
782251584, 872426880, 805351712, 920695136,
757083888, 2971677568U, 2975870976U, 791689088,
855649472, 805351680, 941666656, 746598224,
2969580192U, 2975870976U, 797980864, 840969248,
805351648, 964735328, 734015424, 2967482816U,
2975870976U, 804272672, 828386144, 2954932416U,
987804000, 721426448, 2965385504U, 2973806624U,
405289888, 817900160, 2954932384U, 1012969792,
706746424, 2963288192U, 2971709472U, 406338848,
809511360, 2957029504U, 1038135552, 694163528,
2961190912U, 2969612352U, 407387840, 2956994816U,
2957029472U, 1065398464, 679483480, 2959126656U,
2963320928U, 408954912, 2963286048U, 45152,
2973773824U, 773862656, 889204256, 805351744,
899723616, 767569536, 2973774976U, 2975870976U,
782251584, 872426880, 805351712, 920695136,
757083888, 2971677568U, 2975870976U, 791689088,
855649472, 805351680, 941666656, 746598224,
2969580192U, 2975870976U, 797980864, 840969248,
805351648, 964735328, 734015424, 2967482816U,
2975870976U, 804272672, 828386144, 2954932416U,
987804000, 721426448, 2965385504U, 2973806624U,
405289888, 817900160, 2954932384U, 1012969792,
706746424, 2963288192U, 2971709472U, 406338848,
809511360, 2957029504U, 1038135552, 694163528,
2961190912U, 2969612352U, 407387840, 2956994816U,
2957029472U, 1065398464, 679483480, 2959126656U,
2963320928U, 408954912, 2963286048U, 45152,
910176256, 754986176, 805320256, 754988736,
901786816, 926953472, 746597696, 805320000,
763377600, 885009472, 943730688, 734014976,
805319744, 773863616, 872426368, 964702208,
725626432, 805319552, 778058240, 859843328,
981479488, 713043616, 809513728, 784350016,
847260224, 1006645312, 704655040, 813707840,
784350336, 838871488, 1027616896, 692072192,
813707712, 790642112, 830482688, 1048588480,
679489344, 817901888, 790642496, 826288192,
671101184, 671100672, 12544, 910176256,
754986176, 805320256, 754988736, 901786816,
926953472, 746597696, 805320000, 763377600,
885009472, 943730688, 734014976, 805319744,
773863616, 872426368, 964702208, 725626432,
805319552, 778058240, 859843328, 981479488,
713043616, 809513728, 784350016, 847260224,
1006645312, 704655040, 813707840, 784350336,
838871488, 1027616896, 692072192, 813707712,
790642112, 830482688, 1048588480, 679489344,
817901888, 790642496, 826288192, 671101184,
671100672, 12544};
static struct color_conversion const ntsc_m_csc_composite =
{818, 301, 2003, 260, 1843, 1325, 1479, 3840, 832, 780, 1744, 3840};
static struct video_levels const ntsc_m_levels_composite = {225, 267, 113};
static struct color_conversion const ntsc_m_csc_svideo =
{818, 301, 2003, 308, 1898, 1380, 781, 3840, 890, 829, 1782, 3840};
static struct video_levels const ntsc_m_levels_svideo = {266, 316, 133};
static struct color_conversion const ntsc_j_csc_composite =
{818, 301, 2003, 281, 1868, 1350, 1516, 3840, 858, 802, 1761, 3840};
static struct video_levels const ntsc_j_levels_composite = {225, 225, 113};
static struct color_conversion const ntsc_j_csc_svideo =
{818, 301, 2003, 332, 1928, 1409, 802, 3840, 921, 854, 1802, 3840};
static struct video_levels const ntsc_j_levels_svideo = {266, 266, 133};
static struct color_conversion const pal_csc_composite =
{818, 301, 2003, 275, 1861, 1343, 1505, 3840, 851, 796, 1756, 3840};
static struct video_levels const pal_levels_composite = {237, 237, 118};
static struct color_conversion const pal_csc_svideo =
{818, 301, 2003, 325, 1920, 1401, 796, 3840, 912, 847, 1797, 3840};
static struct video_levels const pal_levels_svideo = {280, 280, 139};
static struct color_conversion const pal_m_csc_composite =
{818, 301, 2003, 260, 1843, 1325, 1479, 3840, 832, 780, 1744, 3840};
static struct video_levels const pal_m_levels_composite = {225, 267, 113};
static struct color_conversion const pal_m_csc_svideo =
{818, 301, 2003, 308, 1898, 1380, 781, 3840, 890, 829, 1782, 3840};
static struct video_levels const pal_m_levels_svideo = {266, 316, 133};
static struct color_conversion const pal_n_csc_composite =
{818, 301, 2003, 260, 1843, 1325, 1479, 3840, 832, 780, 1744, 3840};
static struct video_levels const pal_n_levels_composite = {225, 267, 118};
static struct color_conversion const pal_n_csc_svideo =
{818, 301, 2003, 308, 1898, 1380, 781, 3840, 890, 829, 1782, 3840};
static struct video_levels const pal_n_levels_svideo = {266, 316, 139};
static struct color_conversion const sdtv_csc_yprpb =
{818, 301, 2003, 326, 1369, 851, 256, 3840, 256, 941, 1869, 3840};
static struct color_conversion const hdtv_csc_yprpb =
{1459, 366, 1832, 326, 2005, 907, 256, 3840, 256, 977, 1724, 3840};
static struct video_levels const component_levels = {279, 279, 0};
static struct tv_mode const tv_modes[15] =
{ {"NTSC-M", 107520, 29970, 3 << 18, 64, 836, 124, 857, false, false, 0, 6, 7,
6, true, 0, 1, 18, 20, 21, 240, true, 72, 34, 9, 240, 10, 240, 9, 240, 10, 240,
20013, 0, 136, 7624, 0, 1 << 24, false, & ntsc_m_levels_composite, & ntsc_m_levels_svideo,
& ntsc_m_csc_composite, & ntsc_m_csc_svideo, filter_table, 0},
{"NTSC-443", 107520, 29970, 3 << 18, 64, 836, 124, 857, false, false, 0, 6, 7,
6, true, 0, 1, 18, 20, 21, 240, 8, 72, 34, 9, 240, 10, 240, 9, 240, 10, 240,
20625, 0, 168, 18557, 0, 2 << 24, true, & ntsc_m_levels_composite, & ntsc_m_levels_svideo,
& ntsc_m_csc_composite, & ntsc_m_csc_svideo, filter_table, 0},
{"NTSC-J", 107520, 29970, 3 << 18, 64, 836, 124, 857, false, false, 0, 6, 7,
6, true, 0, 1, 18, 20, 21, 240, true, 72, 34, 9, 240, 10, 240, 9, 240, 10, 240,
20013, 0, 136, 7624, 0, 1 << 24, false, & ntsc_j_levels_composite, & ntsc_j_levels_svideo,
& ntsc_j_csc_composite, & ntsc_j_csc_svideo, filter_table, 0},
{"PAL-M", 107520, 29970, 3 << 18, 64, 836, 124, 857, false, false, 0, 6, 7, 6,
true, 0, 1, 18, 20, 21, 240, true, 72, 34, 9, 240, 10, 240, 9, 240, 10, 240,
20013, 0, 136, 7624, 0, 1 << 24, false, & pal_m_levels_composite, & pal_m_levels_svideo,
& pal_m_csc_composite, & pal_m_csc_svideo, filter_table, 0},
{"PAL-N", 107520, 25000, 3 << 18, 64, 844, 128, 863, false, false, 0, 6, 7, 6,
true, 0, 1, 18, 24, 25, 286, true, 73, 34, 8, 285, 8, 286, 9, 286, 9, 285, 20625,
0, 168, 18557, 0, 2 << 24, true, & pal_n_levels_composite, & pal_n_levels_svideo,
& pal_n_csc_composite, & pal_n_csc_svideo, filter_table, 0},
{"PAL", 107520, 25000, 3 << 18, 64, 844, 128, 863, false, false, 0, 5, 6, 5,
true, 0, 1, 15, 24, 25, 286, true, 73, 32, 8, 285, 8, 286, 9, 286, 9, 285, 20625,
0, 168, 18557, 0, 2 << 24, true, & pal_levels_composite, & pal_levels_svideo,
& pal_csc_composite, & pal_csc_svideo, filter_table, 0},
{"480p@59.94Hz", 107520, 59940, 0 << 18, 64, 842, 122, 857, true, false, 1, 12,
12, 12, false, 0, 0, 0, 44, 44, 496, false, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0U, (_Bool)0, 0, 0, 0, 0, filter_table, 0},
{"480p@60Hz", 107520, 60000, 0 << 18, 64, 842, 122, 856, true, false, 1, 12,
12, 12, false, 0, 0, 0, 44, 44, 496, false, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0U, (_Bool)0, 0, 0, 0, 0, filter_table, 0},
{"576p", 107520, 50000, 0 << 18, 64, 859, 139, 863, true, false, 1, 10, 10, 10,
false, 0, 0, 0, 48, 48, 575, false, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0U, (_Bool)0, 0, 0, 0, 0, filter_table, 0},
{"720p@60Hz", 148800, 60000, 1 << 18, 80, 1580, 300, 1649, true, true, 1, 10,
10, 10, false, 0, 0, 0, 29, 29, 719, false, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0U, (_Bool)0, 0, 0, 0, 0, filter_table, 0},
{"720p@59.94Hz", 148800, 59940, 1 << 18, 80, 1580, 300, 1651, true, true, 1,
10, 10, 10, false, 0, 0, 0, 29, 29, 719, false, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0U, (_Bool)0, 0, 0, 0, 0, filter_table, 0},
{"720p@50Hz", 148800, 50000, 1 << 18, 80, 1580, 300, 1979, true, true, 1, 10,
10, 10, false, 0, 0, 0, 29, 29, 719, false, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0U, (_Bool)0, 0, 0, 0, 0, filter_table, 800},
{"1080i@50Hz", 148800, 25000, 1 << 18, 88, 2155, 235, 2639, false, true, 1, 4,
5, 10, true, 4, 4, 10, 21, 22, 539, false, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0U, (_Bool)0, 0, 0, 0, 0, filter_table, 0},
{"1080i@60Hz", 148800, 30000, 1 << 18, 88, 2155, 235, 2199, false, true, 1, 4,
5, 10, true, 4, 4, 10, 21, 22, 539, false, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0U, (_Bool)0, 0, 0, 0, 0, filter_table, 0},
{"1080i@59.94Hz", 148800, 29970, 1 << 18, 88, 2155, 235, 2200, false, true, 1,
4, 5, 10, true, 4, 4, 10, 21, 22, 539, false, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0U, (_Bool)0, 0, 0, 0, 0, filter_table, 0}};
static void intel_tv_dpms(struct drm_encoder *encoder , int mode )
{
struct drm_device *dev ;
struct drm_i915_private *dev_priv ;
unsigned int tmp ;
unsigned int tmp___0 ;
{
dev = encoder->dev;
dev_priv = dev->dev_private;
switch (mode) {
case 0:
tmp = readl(dev_priv->regs + 425984);
writel(tmp | (unsigned int )(1 << 31), dev_priv->regs + 425984);
break;
case 3:
case 2:
case 1:
tmp___0 = readl(dev_priv->regs + 425984);
writel(tmp___0 & (unsigned int )(~ (1 << 31)), dev_priv->regs + 425984);
break;
}
return;
}
}
static void intel_tv_save(struct drm_connector *connector )
{
struct drm_device *dev ;
struct drm_i915_private *dev_priv ;
struct intel_output *intel_output ;
struct drm_connector const *__mptr ;
struct intel_tv_priv *tv_priv ;
int i ;
{
dev = connector->dev;
dev_priv = dev->dev_private;
__mptr = connector;
intel_output = (struct intel_output *)((char *)__mptr - (unsigned int )(& ((struct intel_output *)0)->base));
tv_priv = intel_output->dev_priv;
tv_priv->save_TV_H_CTL_1 = readl(dev_priv->regs + 426032);
tv_priv->save_TV_H_CTL_2 = readl(dev_priv->regs + 426036);
tv_priv->save_TV_H_CTL_3 = readl(dev_priv->regs + 426040);
tv_priv->save_TV_V_CTL_1 = readl(dev_priv->regs + 426044);
tv_priv->save_TV_V_CTL_2 = readl(dev_priv->regs + 426048);
tv_priv->save_TV_V_CTL_3 = readl(dev_priv->regs + 426052);
tv_priv->save_TV_V_CTL_4 = readl(dev_priv->regs + 426056);
tv_priv->save_TV_V_CTL_5 = readl(dev_priv->regs + 426060);
tv_priv->save_TV_V_CTL_6 = readl(dev_priv->regs + 426064);
tv_priv->save_TV_V_CTL_7 = readl(dev_priv->regs + 426068);
tv_priv->save_TV_SC_CTL_1 = readl(dev_priv->regs + 426080);
tv_priv->save_TV_SC_CTL_2 = readl(dev_priv->regs + 426084);
tv_priv->save_TV_SC_CTL_3 = readl(dev_priv->regs + 426088);
tv_priv->save_TV_CSC_Y = readl(dev_priv->regs + 426000);
tv_priv->save_TV_CSC_Y2 = readl(dev_priv->regs + 426004);
tv_priv->save_TV_CSC_U = readl(dev_priv->regs + 426008);
tv_priv->save_TV_CSC_U2 = readl(dev_priv->regs + 426012);
tv_priv->save_TV_CSC_V = readl(dev_priv->regs + 426016);
tv_priv->save_TV_CSC_V2 = readl(dev_priv->regs + 426020);
tv_priv->save_TV_CLR_KNOBS = readl(dev_priv->regs + 426024);
tv_priv->save_TV_CLR_LEVEL = readl(dev_priv->regs + 426028);
tv_priv->save_TV_WIN_POS = readl(dev_priv->regs + 426096);
tv_priv->save_TV_WIN_SIZE = readl(dev_priv->regs + 426100);
tv_priv->save_TV_FILTER_CTL_1 = readl(dev_priv->regs + 426112);
tv_priv->save_TV_FILTER_CTL_2 = readl(dev_priv->regs + 426116);
tv_priv->save_TV_FILTER_CTL_3 = readl(dev_priv->regs + 426120);
i = 0;
while (1) {
if (i < 60) {
} else {
break;
}
tv_priv->save_TV_H_LUMA[i] = readl(dev_priv->regs + (426240 + (i << 2)));
i = i + 1;
}
i = 0;
while (1) {
if (i < 60) {
} else {
break;
}
tv_priv->save_TV_H_CHROMA[i] = readl(dev_priv->regs + (426496 + (i << 2)));
i = i + 1;
}
i = 0;
while (1) {
if (i < 43) {
} else {
break;
}
tv_priv->save_TV_V_LUMA[i] = readl(dev_priv->regs + (426752 + (i << 2)));
i = i + 1;
}
i = 0;
while (1) {
if (i < 43) {
} else {
break;
}
tv_priv->save_TV_V_CHROMA[i] = readl(dev_priv->regs + (427008 + (i << 2)));
i = i + 1;
}
tv_priv->save_TV_DAC = readl(dev_priv->regs + 425988);
tv_priv->save_TV_CTL = readl(dev_priv->regs + 425984);
return;
}
}
static void intel_tv_restore(struct drm_connector *connector )
{
struct drm_device *dev ;
struct drm_i915_private *dev_priv ;
struct intel_output *intel_output ;
struct drm_connector const *__mptr ;
struct intel_tv_priv *tv_priv ;
struct drm_crtc *crtc ;
struct intel_crtc *intel_crtc ;
int i ;
struct drm_crtc const *__mptr___0 ;
int pipeconf_reg ;
int dspcntr_reg ;
int pipeconf ;
unsigned int tmp ;
int dspcntr ;
unsigned int tmp___0 ;
int dspbase_reg ;
unsigned int tmp___1 ;
unsigned int tmp___2 ;
{
dev = connector->dev;
dev_priv = dev->dev_private;
__mptr = connector;
intel_output = (struct intel_output *)((char *)__mptr - (unsigned int )(& ((struct intel_output *)0)->base));
tv_priv = intel_output->dev_priv;
crtc = (connector->encoder)->crtc;
if (! crtc) {
return;
} else {
}
__mptr___0 = crtc;
intel_crtc = (struct intel_crtc *)((char *)__mptr___0 - (unsigned int )(& ((struct intel_crtc *)0)->base));
writel(tv_priv->save_TV_H_CTL_1, dev_priv->regs + 426032);
writel(tv_priv->save_TV_H_CTL_2, dev_priv->regs + 426036);
writel(tv_priv->save_TV_H_CTL_3, dev_priv->regs + 426040);
writel(tv_priv->save_TV_V_CTL_1, dev_priv->regs + 426044);
writel(tv_priv->save_TV_V_CTL_2, dev_priv->regs + 426048);
writel(tv_priv->save_TV_V_CTL_3, dev_priv->regs + 426052);
writel(tv_priv->save_TV_V_CTL_4, dev_priv->regs + 426056);
writel(tv_priv->save_TV_V_CTL_5, dev_priv->regs + 426060);
writel(tv_priv->save_TV_V_CTL_6, dev_priv->regs + 426064);
writel(tv_priv->save_TV_V_CTL_7, dev_priv->regs + 426068);
writel(tv_priv->save_TV_SC_CTL_1, dev_priv->regs + 426080);
writel(tv_priv->save_TV_SC_CTL_2, dev_priv->regs + 426084);
writel(tv_priv->save_TV_SC_CTL_3, dev_priv->regs + 426088);
writel(tv_priv->save_TV_CSC_Y, dev_priv->regs + 426000);
writel(tv_priv->save_TV_CSC_Y2, dev_priv->regs + 426004);
writel(tv_priv->save_TV_CSC_U, dev_priv->regs + 426008);
writel(tv_priv->save_TV_CSC_U2, dev_priv->regs + 426012);
writel(tv_priv->save_TV_CSC_V, dev_priv->regs + 426016);
writel(tv_priv->save_TV_CSC_V2, dev_priv->regs + 426020);
writel(tv_priv->save_TV_CLR_KNOBS, dev_priv->regs + 426024);
writel(tv_priv->save_TV_CLR_LEVEL, dev_priv->regs + 426028);
pipeconf_reg = intel_crtc->pipe == 0 ? 458760 : 462856;
dspcntr_reg = intel_crtc->plane == 0 ? 459136 : 463232;
tmp = readl(dev_priv->regs + pipeconf_reg);
pipeconf = tmp;
tmp___0 = readl(dev_priv->regs + dspcntr_reg);
dspcntr = tmp___0;
dspbase_reg = intel_crtc->plane == 0 ? 459140 : 463236;
writel(dspcntr & ~ (1 << 31), dev_priv->regs + dspcntr_reg);
tmp___1 = readl(dev_priv->regs + dspbase_reg);
writel(tmp___1, dev_priv->regs + dspbase_reg);
if (! ((((((dev->pci_device == 9602 || dev->pci_device == 9610) || dev->pci_device == 9618) || dev->pci_device == 10098) || (dev->pci_device == 10146 || dev->pci_device == 10158)) || (((((((((dev->pci_device == 10610 || dev->pci_device == 10626) || dev->pci_device == 10642) || dev->pci_device == 10658) || dev->pci_device == 10754) || dev->pci_device == 10770) || dev->pci_device == 10818) || dev->pci_device == 11778) || dev->pci_device == 11794) || dev->pci_device == 11810)) || ((dev->pci_device == 10690 || dev->pci_device == 10674) || dev->pci_device == 10706))) {
intel_wait_for_vblank(dev);
} else {
}
writel(pipeconf & ~ (1 << 31), dev_priv->regs + pipeconf_reg);
intel_wait_for_vblank(dev);
writel(tv_priv->save_TV_FILTER_CTL_1, dev_priv->regs + 426112);
writel(tv_priv->save_TV_FILTER_CTL_2, dev_priv->regs + 426116);
writel(tv_priv->save_TV_FILTER_CTL_3, dev_priv->regs + 426120);
writel(tv_priv->save_TV_WIN_POS, dev_priv->regs + 426096);
writel(tv_priv->save_TV_WIN_SIZE, dev_priv->regs + 426100);
writel(pipeconf, dev_priv->regs + pipeconf_reg);
writel(dspcntr, dev_priv->regs + dspcntr_reg);
tmp___2 = readl(dev_priv->regs + dspbase_reg);
writel(tmp___2, dev_priv->regs + dspbase_reg);
i = 0;
while (1) {
if (i < 60) {
} else {
break;
}
writel(tv_priv->save_TV_H_LUMA[i], dev_priv->regs + (426240 + (i << 2)));
i = i + 1;
}
i = 0;
while (1) {
if (i < 60) {
} else {
break;
}
writel(tv_priv->save_TV_H_CHROMA[i], dev_priv->regs + (426496 + (i << 2)));
i = i + 1;
}
i = 0;
while (1) {
if (i < 43) {
} else {
break;
}
writel(tv_priv->save_TV_V_LUMA[i], dev_priv->regs + (426752 + (i << 2)));
i = i + 1;
}
i = 0;
while (1) {
if (i < 43) {
} else {
break;
}
writel(tv_priv->save_TV_V_CHROMA[i], dev_priv->regs + (427008 + (i << 2)));
i = i + 1;
}
writel(tv_priv->save_TV_DAC, dev_priv->regs + 425988);
writel(tv_priv->save_TV_CTL, dev_priv->regs + 425984);
return;
}
}
static struct tv_mode const *intel_tv_mode_lookup(char *tv_format )
{
int i ;
struct tv_mode const *tv_mode ;
int tmp ;
{
i = 0;
while (1) {
if ((unsigned long )i < sizeof(tv_modes) / sizeof(tv_modes[0])) {
} else {
break;
}
tv_mode = & tv_modes[i];
tmp = strcmp(tv_format, tv_mode->name);
if (tmp) {
} else {
return (tv_mode);
}
i = i + 1;
}
return ((void *)0);
}
}
static struct tv_mode const *intel_tv_mode_find(struct intel_output *intel_output )
{
struct intel_tv_priv *tv_priv ;
struct tv_mode const *tmp ;
{
tv_priv = intel_output->dev_priv;
tmp = intel_tv_mode_lookup(tv_priv->tv_format);
return (tmp);
}
}
static enum drm_mode_status intel_tv_mode_valid(struct drm_connector *connector ,
struct drm_display_mode *mode )
{
struct intel_output *intel_output ;
struct drm_connector const *__mptr ;
struct tv_mode const *tv_mode ;
struct tv_mode const *tmp ;
int __x ;
int tmp___0 ;
{
__mptr = connector;
intel_output = (struct intel_output *)((char *)__mptr - (unsigned int )(& ((struct intel_output *)0)->base));
tmp = intel_tv_mode_find(intel_output);
tv_mode = tmp;
if (tv_mode) {
tmp___0 = drm_mode_vrefresh(mode);
__x = tv_mode->refresh - (int const )tmp___0;
if ((__x < 0 ? - __x : __x) < 1) {
return (MODE_OK);
} else {
}
} else {
}
return (MODE_CLOCK_RANGE);
}
}
static bool intel_tv_mode_fixup(struct drm_encoder *encoder , struct drm_display_mode *mode ,
struct drm_display_mode *adjusted_mode )
{
struct drm_device *dev ;
struct drm_mode_config *drm_config ;
struct intel_output *intel_output ;
struct drm_encoder const *__mptr ;
struct tv_mode const *tv_mode ;
struct tv_mode const *tmp ;
struct drm_encoder *other_encoder ;
struct list_head const *__mptr___0 ;
struct list_head const *__mptr___1 ;
{
dev = encoder->dev;
drm_config = & dev->mode_config;
__mptr = encoder;
intel_output = (struct intel_output *)((char *)__mptr - (unsigned int )(& ((struct intel_output *)0)->enc));
tmp = intel_tv_mode_find(intel_output);
tv_mode = tmp;
if (! tv_mode) {
return (false);
} else {
}
__mptr___0 = drm_config->encoder_list.next;
other_encoder = (struct drm_encoder *)((char *)__mptr___0 - (unsigned int )(& ((struct drm_encoder *)0)->head));
while (1) {
__builtin_prefetch(other_encoder->head.next);
if ((unsigned long )(& other_encoder->head) != (unsigned long )(& drm_config->encoder_list)) {
} else {
break;
}
if ((unsigned long )other_encoder != (unsigned long )encoder && (unsigned long )other_encoder->crtc == (unsigned long )encoder->crtc) {
return (false);
} else {
}
__mptr___1 = other_encoder->head.next;
other_encoder = (struct drm_encoder *)((char *)__mptr___1 - (unsigned int )(& ((struct drm_encoder *)0)->head));
}
adjusted_mode->clock = tv_mode->clock;
return (true);
}
}
static void intel_tv_mode_set(struct drm_encoder *encoder , struct drm_display_mode *mode ,
struct drm_display_mode *adjusted_mode )
{
struct drm_device *dev ;
struct drm_i915_private *dev_priv ;
struct drm_crtc *crtc ;
struct intel_crtc *intel_crtc ;
struct drm_crtc const *__mptr ;
struct intel_output *intel_output ;
struct drm_encoder const *__mptr___0 ;
struct intel_tv_priv *tv_priv ;
struct tv_mode const *tv_mode ;
struct tv_mode const *tmp ;
u32 tv_ctl ;
u32 hctl1 ;
u32 hctl2 ;
u32 hctl3 ;
u32 vctl1 ;
u32 vctl2 ;
u32 vctl3 ;
u32 vctl4 ;
u32 vctl5 ;
u32 vctl6 ;
u32 vctl7 ;
u32 scctl1 ;
u32 scctl2 ;
u32 scctl3 ;
int i ;
int j ;
struct video_levels const *video_levels ;
struct color_conversion const *color_conversion ;
bool burst_ena ;
int pipeconf_reg ;
int dspcntr_reg ;
int pipeconf ;
unsigned int tmp___0 ;
int dspcntr ;
unsigned int tmp___1 ;
int dspbase_reg ;
int xpos ;
int ypos ;
unsigned int xsize ;
unsigned int ysize ;
unsigned int tmp___2 ;
unsigned int tmp___3 ;
int tmp___4 ;
int tmp___5 ;
int tmp___6 ;
int tmp___7 ;
{
dev = encoder->dev;
dev_priv = dev->dev_private;
crtc = encoder->crtc;
__mptr = crtc;
intel_crtc = (struct intel_crtc *)((char *)__mptr - (unsigned int )(& ((struct intel_crtc *)0)->base));
__mptr___0 = encoder;
intel_output = (struct intel_output *)((char *)__mptr___0 - (unsigned int )(& ((struct intel_output *)0)->enc));
tv_priv = intel_output->dev_priv;
tmp = intel_tv_mode_find(intel_output);
tv_mode = tmp;
if (! tv_mode) {
return;
} else {
}
tv_ctl = 0;
switch (tv_priv->type) {
default:
tv_ctl = tv_ctl | (unsigned int )(0 << 28);
video_levels = tv_mode->composite_levels;
color_conversion = tv_mode->composite_color;
burst_ena = tv_mode->burst_ena;
break;
case 8:
tv_ctl = tv_ctl | (unsigned int )(2 << 28);
video_levels = & component_levels;
if (tv_mode->burst_ena) {
color_conversion = & sdtv_csc_yprpb;
} else {
color_conversion = & hdtv_csc_yprpb;
}
burst_ena = false;
break;
case 6:
tv_ctl = tv_ctl | (unsigned int )(1 << 28);
video_levels = tv_mode->svideo_levels;
color_conversion = tv_mode->svideo_color;
burst_ena = tv_mode->burst_ena;
break;
}
hctl1 = (tv_mode->hsync_end << 16) | (tv_mode->htotal << 0);
hctl2 = (tv_mode->hburst_start << 16) | (tv_mode->hburst_len << 0);
if (burst_ena) {
hctl2 = hctl2 | (unsigned int )(1 << 31);
} else {
}
hctl3 = (tv_mode->hblank_start << 0) | (tv_mode->hblank_end << 16);
vctl1 = ((tv_mode->nbr_end << 16) | (tv_mode->vi_end_f1 << 8)) | (tv_mode->vi_end_f2 << 0);
vctl2 = ((tv_mode->vsync_len << 16) | (tv_mode->vsync_start_f1 << 8)) | (tv_mode->vsync_start_f2 << 0);
vctl3 = ((tv_mode->veq_len << 16) | (tv_mode->veq_start_f1 << 8)) | (tv_mode->veq_start_f2 << 0);
if (tv_mode->veq_ena) {
vctl3 = vctl3 | (unsigned int )(1 << 31);
} else {
}
vctl4 = (tv_mode->vburst_start_f1 << 16) | (tv_mode->vburst_end_f1 << 0);
vctl5 = (tv_mode->vburst_start_f2 << 16) | (tv_mode->vburst_end_f2 << 0);
vctl6 = (tv_mode->vburst_start_f3 << 16) | (tv_mode->vburst_end_f3 << 0);
vctl7 = (tv_mode->vburst_start_f4 << 16) | (tv_mode->vburst_end_f4 << 0);
if (intel_crtc->pipe == 1) {
tv_ctl = tv_ctl | (unsigned int )(1 << 30);
} else {
}
tv_ctl = tv_ctl | (unsigned int )tv_mode->oversample;
if (tv_mode->progressive) {
tv_ctl = tv_ctl | (unsigned int )(1 << 17);
} else {
}
if (tv_mode->trilevel_sync) {
tv_ctl = tv_ctl | (unsigned int )(1 << 21);
} else {
}
if (tv_mode->pal_burst) {
tv_ctl = tv_ctl | (unsigned int )(1 << 16);
} else {
}
scctl1 = 0;
if (tv_mode->dda1_inc) {
scctl1 = scctl1 | (unsigned int )(1 << 31);
scctl1 = scctl1 | (unsigned int )(video_levels->burst << 16);
} else {
}
if (tv_mode->dda2_inc) {
scctl1 = scctl1 | (unsigned int )(1 << 30);
} else {
}
if (tv_mode->dda3_inc) {
scctl1 = scctl1 | (unsigned int )(1 << 29);
} else {
}
scctl1 = scctl1 | (unsigned int )tv_mode->sc_reset;
scctl1 = scctl1 | (unsigned int )(tv_mode->dda1_inc << 0);
scctl2 = (tv_mode->dda2_size << 16) | (tv_mode->dda2_inc << 0);
scctl3 = (tv_mode->dda3_size << 16) | (tv_mode->dda3_inc << 0);
if (dev->pci_device < 10098) {
tv_ctl = tv_ctl | (unsigned int )((1 << 10) | (1 << 11));
} else {
}
writel(hctl1, dev_priv->regs + 426032);
writel(hctl2, dev_priv->regs + 426036);
writel(hctl3, dev_priv->regs + 426040);
writel(vctl1, dev_priv->regs + 426044);
writel(vctl2, dev_priv->regs + 426048);
writel(vctl3, dev_priv->regs + 426052);
writel(vctl4, dev_priv->regs + 426056);
writel(vctl5, dev_priv->regs + 426060);
writel(vctl6, dev_priv->regs + 426064);
writel(vctl7, dev_priv->regs + 426068);
writel(scctl1, dev_priv->regs + 426080);
writel(scctl2, dev_priv->regs + 426084);
writel(scctl3, dev_priv->regs + 426088);
if (color_conversion) {
writel(((int const )color_conversion->ry << 16) | (int const )color_conversion->gy,
dev_priv->regs + 426000);
writel(((int const )color_conversion->by << 16) | (int const )color_conversion->ay,
dev_priv->regs + 426004);
writel(((int const )color_conversion->ru << 16) | (int const )color_conversion->gu,
dev_priv->regs + 426008);
writel(((int const )color_conversion->bu << 16) | (int const )color_conversion->au,
dev_priv->regs + 426012);
writel(((int const )color_conversion->rv << 16) | (int const )color_conversion->gv,
dev_priv->regs + 426016);
writel(((int const )color_conversion->bv << 16) | (int const )color_conversion->av,
dev_priv->regs + 426020);
} else {
}
writel(6316032, dev_priv->regs + 426024);
if (video_levels) {
writel((video_levels->black << 16) | (video_levels->blank << 0), dev_priv->regs + 426028);
} else {
}
pipeconf_reg = intel_crtc->pipe == 0 ? 458760 : 462856;
dspcntr_reg = intel_crtc->plane == 0 ? 459136 : 463232;
tmp___0 = readl(dev_priv->regs + pipeconf_reg);
pipeconf = tmp___0;
tmp___1 = readl(dev_priv->regs + dspcntr_reg);
dspcntr = tmp___1;
dspbase_reg = intel_crtc->plane == 0 ? 459140 : 463236;
xpos = 0;
ypos = 0;
writel(dspcntr & ~ (1 << 31), dev_priv->regs + dspcntr_reg);
tmp___2 = readl(dev_priv->regs + dspbase_reg);
writel(tmp___2, dev_priv->regs + dspbase_reg);
if (! ((((((dev->pci_device == 9602 || dev->pci_device == 9610) || dev->pci_device == 9618) || dev->pci_device == 10098) || (dev->pci_device == 10146 || dev->pci_device == 10158)) || (((((((((dev->pci_device == 10610 || dev->pci_device == 10626) || dev->pci_device == 10642) || dev->pci_device == 10658) || dev->pci_device == 10754) || dev->pci_device == 10770) || dev->pci_device == 10818) || dev->pci_device == 11778) || dev->pci_device == 11794) || dev->pci_device == 11810)) || ((dev->pci_device == 10690 || dev->pci_device == 10674) || dev->pci_device == 10706))) {
intel_wait_for_vblank(dev);
} else {
}
writel(pipeconf & ~ (1 << 31), dev_priv->regs + pipeconf_reg);
intel_wait_for_vblank(dev);
writel(1 << 31, dev_priv->regs + 426112);
xsize = tv_mode->hblank_start - tv_mode->hblank_end;
if (tv_mode->progressive) {
ysize = tv_mode->nbr_end + (int const )1;
} else {
ysize = 2 * (int )tv_mode->nbr_end + 1;
}
xpos = xpos + tv_priv->margin[TV_MARGIN_LEFT];
ypos = ypos + tv_priv->margin[TV_MARGIN_TOP];
xsize = xsize - (unsigned int )(tv_priv->margin[TV_MARGIN_LEFT] + tv_priv->margin[TV_MARGIN_RIGHT]);
ysize = ysize - (unsigned int )(tv_priv->margin[TV_MARGIN_TOP] + tv_priv->margin[TV_MARGIN_BOTTOM]);
writel((xpos << 16) | ypos, dev_priv->regs + 426096);
writel((xsize << 16) | ysize, dev_priv->regs + 426100);
writel(pipeconf, dev_priv->regs + pipeconf_reg);
writel(dspcntr, dev_priv->regs + dspcntr_reg);
tmp___3 = readl(dev_priv->regs + dspbase_reg);
writel(tmp___3, dev_priv->regs + dspbase_reg);
j = 0;
i = 0;
while (1) {
if (i < 60) {
} else {
break;
}
tmp___4 = j;
j = j + 1;
writel(*(tv_mode->filter_table + tmp___4), dev_priv->regs + (426240 + (i << 2)));
i = i + 1;
}
i = 0;
while (1) {
if (i < 60) {
} else {
break;
}
tmp___5 = j;
j = j + 1;
writel(*(tv_mode->filter_table + tmp___5), dev_priv->regs + (426496 + (i << 2)));
i = i + 1;
}
i = 0;
while (1) {
if (i < 43) {
} else {
break;
}
tmp___6 = j;
j = j + 1;
writel(*(tv_mode->filter_table + tmp___6), dev_priv->regs + (426752 + (i << 2)));
i = i + 1;
}
i = 0;
while (1) {
if (i < 43) {
} else {
break;
}
tmp___7 = j;
j = j + 1;
writel(*(tv_mode->filter_table + tmp___7), dev_priv->regs + (427008 + (i << 2)));
i = i + 1;
}
writel(0, dev_priv->regs + 425988);
writel(tv_ctl, dev_priv->regs + 425984);
return;
}
}
static struct drm_display_mode const reported_modes[1] = { {{0, 0}, {0U, 0U}, {'N', 'T', 'S', 'C', ' ', '4', '8', '0', 'i', '\000'}, 0,
0, 1 << 6, 107520, 1280, 1368, 1496, 1712, 0, 1024, 1027, 1034, 1104, 0, 0U,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0.f}};
static int intel_tv_detect_type(struct drm_crtc *crtc , struct intel_output *intel_output )
{
struct drm_encoder *encoder ;
struct drm_device *dev ;
struct drm_i915_private *dev_priv ;
unsigned long irqflags ;
u32 tv_ctl ;
u32 save_tv_ctl ;
u32 tv_dac ;
u32 save_tv_dac ;
int type ;
{
encoder = & intel_output->enc;
dev = encoder->dev;
dev_priv = dev->dev_private;
type = 0;
tv_dac = readl(dev_priv->regs + 425988);
while (1) {
irqflags = _spin_lock_irqsave(& dev_priv->user_irq_lock);
break;
}
i915_disable_pipestat(dev_priv, 0, (1UL << 26) | (1UL << 18));
while (1) {
_spin_unlock_irqrestore(& dev_priv->user_irq_lock, irqflags);
break;
}
if (intel_output->load_detect_temp) {
save_tv_dac = tv_dac;
tv_ctl = readl(dev_priv->regs + 425984);
save_tv_ctl = tv_ctl;
tv_ctl = tv_ctl & (unsigned int )(~ (1 << 31));
tv_ctl = tv_ctl & (unsigned int )(~ (7 << 0));
tv_ctl = tv_ctl | (unsigned int )(7 << 0);
tv_dac = tv_dac & (unsigned int )(~ (7 << 28));
tv_dac = tv_dac | (unsigned int )((((((((1 << 27) | (1 << 26)) | (1 << 25)) | (1 << 24)) | (1 << 7)) | (2 << 4)) | (2 << 2)) | (2 << 0));
writel(tv_ctl, dev_priv->regs + 425984);
writel(tv_dac, dev_priv->regs + 425988);
intel_wait_for_vblank(dev);
tv_dac = readl(dev_priv->regs + 425988);
writel(save_tv_dac, dev_priv->regs + 425988);
writel(save_tv_ctl, dev_priv->regs + 425984);
} else {
}
if ((tv_dac & (unsigned int )(7 << 28)) == (unsigned int )((1 << 29) | (1 << 28))) {
while (1) {
if (drm_debug) {
printk("<7>[drm:%s] Detected Composite TV connection\n", "intel_tv_detect_type");
} else {
}
break;
}
type = 5;
} else
if ((tv_dac & (unsigned int )((1 << 30) | (1 << 29))) == (unsigned int )(1 << 30)) {
while (1) {
if (drm_debug) {
printk("<7>[drm:%s] Detected S-Video TV connection\n", "intel_tv_detect_type");
} else {
}
break;
}
type = 6;
} else
if ((tv_dac & (unsigned int )(7 << 28)) == 0U) {
while (1) {
if (drm_debug) {
printk("<7>[drm:%s] Detected Component TV connection\n", "intel_tv_detect_type");
} else {
}
break;
}
type = 8;
} else {
while (1) {
if (drm_debug) {
printk("<7>[drm:%s] No TV connection detected\n", "intel_tv_detect_type");
} else {
}
break;
}
type = -1;
}
while (1) {
irqflags = _spin_lock_irqsave(& dev_priv->user_irq_lock);
break;
}
i915_enable_pipestat(dev_priv, 0, (1UL << 26) | (1UL << 18));
while (1) {
_spin_unlock_irqrestore(& dev_priv->user_irq_lock, irqflags);
break;
}
return (type);
}
}
static enum drm_connector_status intel_tv_detect(struct drm_connector *connector )
{
struct drm_crtc *crtc ;
struct drm_display_mode mode ;
struct intel_output *intel_output ;
struct drm_connector const *__mptr ;
struct intel_tv_priv *tv_priv ;
struct drm_encoder *encoder ;
int dpms_mode ;
int type ;
{
__mptr = connector;
intel_output = (struct intel_output *)((char *)__mptr - (unsigned int )(& ((struct intel_output *)0)->base));
tv_priv = intel_output->dev_priv;
encoder = & intel_output->enc;
type = tv_priv->type;
mode = reported_modes[0];
drm_mode_set_crtcinfo(& mode, 1);
if (encoder->crtc) {
type = intel_tv_detect_type(encoder->crtc, intel_output);
} else {
crtc = intel_get_load_detect_pipe(intel_output, & mode, & dpms_mode);
if (crtc) {
type = intel_tv_detect_type(crtc, intel_output);
intel_release_load_detect_pipe(intel_output, dpms_mode);
} else {
type = -1;
}
}
if (type < 0) {
return (connector_status_disconnected);
} else {
}
return (connector_status_connected);
}
}
static struct input_res input_res_table[7] = { {"640x480", 640, 480},
{"800x600", 800, 600},
{"1024x768", 1024, 768},
{"1280x1024", 1280, 1024},
{"848x480", 848, 480},
{"1280x720", 1280, 720},
{"1920x1080", 1920, 1080}};
static int intel_tv_get_modes(struct drm_connector *connector )
{
struct drm_display_mode *mode_ptr ;
struct intel_output *intel_output ;
struct drm_connector const *__mptr ;
struct tv_mode const *tv_mode ;
struct tv_mode const *tmp ;
int j ;
struct input_res *input ;
unsigned int hactive_s ;
unsigned int vactive_s ;
void *tmp___0 ;
{
__mptr = connector;
intel_output = (struct intel_output *)((char *)__mptr - (unsigned int )(& ((struct intel_output *)0)->base));
tmp = intel_tv_mode_find(intel_output);
tv_mode = tmp;
j = 0;
while (1) {
if ((unsigned long )j < sizeof(input_res_table) / sizeof(input_res_table[0])) {
} else {
break;
}
input = & input_res_table[j];
hactive_s = input->w;
vactive_s = input->h;
if (tv_mode->max_srcw && input->w > (int )tv_mode->max_srcw) {
goto __Cont;
} else {
}
if (input->w > 1024 && (! tv_mode->progressive && ! tv_mode->component_only)) {
goto __Cont;
} else {
}
tmp___0 = drm_calloc(1, sizeof(struct drm_display_mode ), 2);
mode_ptr = tmp___0;
strncpy(mode_ptr->name, input->name, 32);
mode_ptr->hdisplay = hactive_s;
mode_ptr->hsync_start = hactive_s + 1U;
mode_ptr->hsync_end = hactive_s + 64U;
if (mode_ptr->hsync_end <= mode_ptr->hsync_start) {
mode_ptr->hsync_end = mode_ptr->hsync_start + 1;
} else {
}
mode_ptr->htotal = hactive_s + 96U;
mode_ptr->vdisplay = vactive_s;
mode_ptr->vsync_start = vactive_s + 1U;
mode_ptr->vsync_end = vactive_s + 32U;
if (mode_ptr->vsync_end <= mode_ptr->vsync_start) {
mode_ptr->vsync_end = mode_ptr->vsync_start + 1;
} else {
}
mode_ptr->vtotal = vactive_s + 33U;
mode_ptr->clock = (int )(((tv_mode->refresh * (int const )mode_ptr->vtotal) * (int const )mode_ptr->htotal) / (int const )1000) / 1000;
mode_ptr->type = 1 << 6;
drm_mode_probed_add(connector, mode_ptr);
__Cont: /* CIL Label */
j = j + 1;
}
return (0);
}
}
static void intel_tv_destroy(struct drm_connector *connector )
{
struct intel_output *intel_output ;
struct drm_connector const *__mptr ;
{
__mptr = connector;
intel_output = (struct intel_output *)((char *)__mptr - (unsigned int )(& ((struct intel_output *)0)->base));
drm_sysfs_connector_remove(connector);
drm_connector_cleanup(connector);
drm_free(intel_output, sizeof(struct intel_output ) + sizeof(struct intel_tv_priv ),
2);
return;
}
}
static int intel_tv_set_property(struct drm_connector *connector , struct drm_property *property ,
uint64_t val )
{
struct drm_device *dev ;
struct intel_output *intel_output ;
struct drm_connector const *__mptr ;
struct intel_tv_priv *tv_priv ;
int ret ;
{
dev = connector->dev;
__mptr = connector;
intel_output = (struct intel_output *)((char *)__mptr - (unsigned int )(& ((struct intel_output *)0)->base));
tv_priv = intel_output->dev_priv;
ret = 0;
ret = drm_connector_property_set_value(connector, property, val);
if (ret < 0) {
goto out;
} else {
}
if ((unsigned long )property == (unsigned long )dev->mode_config.tv_left_margin_property) {
tv_priv->margin[TV_MARGIN_LEFT] = val;
} else
if ((unsigned long )property == (unsigned long )dev->mode_config.tv_right_margin_property) {
tv_priv->margin[TV_MARGIN_RIGHT] = val;
} else
if ((unsigned long )property == (unsigned long )dev->mode_config.tv_top_margin_property) {
tv_priv->margin[TV_MARGIN_TOP] = val;
} else
if ((unsigned long )property == (unsigned long )dev->mode_config.tv_bottom_margin_property) {
tv_priv->margin[TV_MARGIN_BOTTOM] = val;
} else
if ((unsigned long )property == (unsigned long )dev->mode_config.tv_mode_property) {
if (val >= (uint64_t )(sizeof(tv_modes) / sizeof(tv_modes[0]))) {
ret = -22;
goto out;
} else {
}
tv_priv->tv_format = tv_modes[val].name;
intel_tv_mode_set(& intel_output->enc, (void *)0, (void *)0);
} else {
ret = -22;
goto out;
}
intel_tv_mode_set(& intel_output->enc, (void *)0, (void *)0);
out:
return (ret);
}
}
static struct drm_encoder_helper_funcs const intel_tv_helper_funcs =
{& intel_tv_dpms, 0, 0, & intel_tv_mode_fixup, & intel_encoder_prepare, & intel_encoder_commit,
& intel_tv_mode_set, 0};
static struct drm_connector_funcs const intel_tv_connector_funcs = {0, & intel_tv_save, & intel_tv_restore, & intel_tv_detect, & drm_helper_probe_single_connector_modes,
& intel_tv_set_property, & intel_tv_destroy};
static struct drm_connector_helper_funcs const intel_tv_connector_helper_funcs = {& intel_tv_get_modes,
& intel_tv_mode_valid, & intel_best_encoder};
static void intel_tv_enc_destroy(struct drm_encoder *encoder )
{
{
drm_encoder_cleanup(encoder);
return;
}
}
static struct drm_encoder_funcs const intel_tv_enc_funcs = {& intel_tv_enc_destroy};
void intel_tv_init(struct drm_device *dev )
{
struct drm_i915_private *dev_priv ;
struct drm_connector *connector ;
struct intel_output *intel_output ;
struct intel_tv_priv *tv_priv ;
u32 tv_dac_on ;
u32 tv_dac_off ;
u32 save_tv_dac ;
char **tv_format_names ;
int i ;
int initial_mode ;
unsigned int tmp ;
void *tmp___0 ;
void *tmp___1 ;
{
dev_priv = dev->dev_private;
initial_mode = 0;
tmp = readl(dev_priv->regs + 425984);
if ((tmp & (unsigned int )(3 << 4)) == (unsigned int )(2 << 4)) {
return;
} else {
}
if (! dev_priv->int_tv_support) {
return;
} else {
}
save_tv_dac = readl(dev_priv->regs + 425988);
writel(save_tv_dac | (unsigned int )(1 << 27), dev_priv->regs + 425988);
tv_dac_on = readl(dev_priv->regs + 425988);
writel(save_tv_dac & (unsigned int )(~ (1 << 27)), dev_priv->regs + 425988);
tv_dac_off = readl(dev_priv->regs + 425988);
writel(save_tv_dac, dev_priv->regs + 425988);
if ((tv_dac_on & (unsigned int )(1 << 27)) == 0U || (tv_dac_off & (unsigned int )(1 << 27)) != 0U) {
return;
} else {
}
tmp___0 = drm_calloc(1, sizeof(struct intel_output ) + sizeof(struct intel_tv_priv ),
2);
intel_output = tmp___0;
if (! intel_output) {
return;
} else {
}
connector = & intel_output->base;
drm_connector_init(dev, connector, & intel_tv_connector_funcs, 6);
drm_encoder_init(dev, & intel_output->enc, & intel_tv_enc_funcs, 4);
drm_mode_connector_attach_encoder(& intel_output->base, & intel_output->enc);
tv_priv = (struct intel_tv_priv *)(intel_output + 1);
intel_output->type = 5;
intel_output->enc.possible_crtcs = (1 << 0) | (1 << 1);
intel_output->enc.possible_clones = 1 << 5;
intel_output->dev_priv = tv_priv;
tv_priv->type = 0;
tv_priv->margin[TV_MARGIN_LEFT] = 54;
tv_priv->margin[TV_MARGIN_TOP] = 36;
tv_priv->margin[TV_MARGIN_RIGHT] = 46;
tv_priv->margin[TV_MARGIN_BOTTOM] = 37;
tv_priv->tv_format = kstrdup(tv_modes[initial_mode].name, (16U | 64U) | 128U);
drm_encoder_helper_add(& intel_output->enc, & intel_tv_helper_funcs);
drm_connector_helper_add(connector, & intel_tv_connector_helper_funcs);
connector->interlace_allowed = false;
connector->doublescan_allowed = false;
tmp___1 = drm_alloc((sizeof(char *) * sizeof(tv_modes)) / sizeof(tv_modes[0]), 2);
tv_format_names = tmp___1;
if (! tv_format_names) {
goto out;
} else {
}
i = 0;
while (1) {
if ((unsigned long )i < sizeof(tv_modes) / sizeof(tv_modes[0])) {
} else {
break;
}
*(tv_format_names + i) = tv_modes[i].name;
i = i + 1;
}
drm_mode_create_tv_properties(dev, sizeof(tv_modes) / sizeof(tv_modes[0]), tv_format_names);
drm_connector_attach_property(connector, dev->mode_config.tv_mode_property, initial_mode);
drm_connector_attach_property(connector, dev->mode_config.tv_left_margin_property,
tv_priv->margin[TV_MARGIN_LEFT]);
drm_connector_attach_property(connector, dev->mode_config.tv_top_margin_property,
tv_priv->margin[TV_MARGIN_TOP]);
drm_connector_attach_property(connector, dev->mode_config.tv_right_margin_property,
tv_priv->margin[TV_MARGIN_RIGHT]);
drm_connector_attach_property(connector, dev->mode_config.tv_bottom_margin_property,
tv_priv->margin[TV_MARGIN_BOTTOM]);
out:
drm_sysfs_connector_add(connector);
return;
}
}
void ldv_main17_sequence_infinite_withcheck_stateful(void)
{
struct drm_encoder *var_group1 ;
int var_intel_tv_dpms_0_p1 ;
struct drm_display_mode *var_group2 ;
struct drm_display_mode *var_intel_tv_mode_fixup_6_p2 ;
struct drm_display_mode *var_intel_tv_mode_set_7_p2 ;
struct drm_connector *var_group3 ;
struct drm_property *var_group4 ;
uint64_t var_intel_tv_set_property_12_p2 ;
int tmp ;
int tmp___0 ;
{
LDV_IN_INTERRUPT = 1;
ldv_initialize();
while (1) {
tmp___0 = nondet_int();
if (tmp___0) {
} else {
break;
}
tmp = nondet_int();
switch (tmp) {
case 0:
ldv_handler_precall();
intel_tv_dpms(var_group1, var_intel_tv_dpms_0_p1);
break;
case 1:
ldv_handler_precall();
intel_tv_mode_fixup(var_group1, var_group2, var_intel_tv_mode_fixup_6_p2);
break;
case 2:
ldv_handler_precall();
intel_tv_mode_set(var_group1, var_group2, var_intel_tv_mode_set_7_p2);
break;
case 3:
ldv_handler_precall();
intel_tv_save(var_group3);
break;
case 4:
ldv_handler_precall();
intel_tv_restore(var_group3);
break;
case 5:
ldv_handler_precall();
intel_tv_detect(var_group3);
break;
case 6:
ldv_handler_precall();
intel_tv_destroy(var_group3);
break;
case 7:
ldv_handler_precall();
intel_tv_set_property(var_group3, var_group4, var_intel_tv_set_property_12_p2);
break;
case 8:
ldv_handler_precall();
intel_tv_mode_valid(var_group3, var_group2);
break;
case 9:
ldv_handler_precall();
intel_tv_get_modes(var_group3);
break;
case 10:
ldv_handler_precall();
intel_tv_enc_destroy(var_group1);
break;
default:
break;
}
}
ldv_check_final_state();
return;
}
}
struct intel_dvo_dev_ops sil164_ops ;
struct intel_dvo_dev_ops ch7xxx_ops ;
struct intel_dvo_dev_ops ivch_ops ;
struct intel_dvo_dev_ops tfp410_ops ;
struct intel_dvo_dev_ops ch7017_ops ;
static struct intel_dvo_device intel_dvo_devices[5] = { {"sil164", 2, 397664, 0U, 56, 0, & sil164_ops, 0, 0, (_Bool)0},
{"ch7xxx", 2, 397664, 0U, 118, 0, & ch7xxx_ops, 0, 0, (_Bool)0},
{"ivch", 1, 397600, 0U, 2, 0, & ivch_ops, 0, 0, (_Bool)0},
{"tfp410", 2, 397664, 0U, 56, 0, & tfp410_ops, 0, 0, (_Bool)0},
{"ch7017", 1, 397664, 20512, 117, 0, & ch7017_ops, 0, 0, (_Bool)0}};
static void intel_dvo_dpms(struct drm_encoder *encoder , int mode )
{
struct drm_i915_private *dev_priv ;
struct intel_output *intel_output ;
struct drm_encoder const *__mptr ;
struct intel_dvo_device *dvo ;
u32 dvo_reg ;
u32 temp ;
unsigned int tmp ;
{
dev_priv = (encoder->dev)->dev_private;
__mptr = encoder;
intel_output = (struct intel_output *)((char *)__mptr - (unsigned int )(& ((struct intel_output *)0)->enc));
dvo = intel_output->dev_priv;
dvo_reg = dvo->dvo_reg;
tmp = readl(dev_priv->regs + dvo_reg);
temp = tmp;
if (mode == 0) {
writel(temp | (unsigned int )(1 << 31), dev_priv->regs + dvo_reg);
readl(dev_priv->regs + dvo_reg);
(*((dvo->dev_ops)->dpms))(dvo, mode);
} else {
(*((dvo->dev_ops)->dpms))(dvo, mode);
writel(temp & (unsigned int )(~ (1 << 31)), dev_priv->regs + dvo_reg);
readl(dev_priv->regs + dvo_reg);
}
return;
}
}
static void intel_dvo_save(struct drm_connector *connector )
{
struct drm_i915_private *dev_priv ;
struct intel_output *intel_output ;
struct drm_connector const *__mptr ;
struct intel_dvo_device *dvo ;
{
dev_priv = (connector->dev)->dev_private;
__mptr = connector;
intel_output = (struct intel_output *)((char *)__mptr - (unsigned int )(& ((struct intel_output *)0)->base));
dvo = intel_output->dev_priv;
dev_priv->saveDVOA = readl(dev_priv->regs + 397600);
dev_priv->saveDVOB = readl(dev_priv->regs + 397632);
dev_priv->saveDVOC = readl(dev_priv->regs + 397664);
(*((dvo->dev_ops)->save))(dvo);
return;
}
}
static void intel_dvo_restore(struct drm_connector *connector )
{
struct drm_i915_private *dev_priv ;
struct intel_output *intel_output ;
struct drm_connector const *__mptr ;
struct intel_dvo_device *dvo ;
{
dev_priv = (connector->dev)->dev_private;
__mptr = connector;
intel_output = (struct intel_output *)((char *)__mptr - (unsigned int )(& ((struct intel_output *)0)->base));
dvo = intel_output->dev_priv;
(*((dvo->dev_ops)->restore))(dvo);
writel(dev_priv->saveDVOA, dev_priv->regs + 397600);
writel(dev_priv->saveDVOB, dev_priv->regs + 397632);
writel(dev_priv->saveDVOC, dev_priv->regs + 397664);
return;
}
}
static int intel_dvo_mode_valid(struct drm_connector *connector , struct drm_display_mode *mode )
{
struct intel_output *intel_output ;
struct drm_connector const *__mptr ;
struct intel_dvo_device *dvo ;
int tmp ;
{
__mptr = connector;
intel_output = (struct intel_output *)((char *)__mptr - (unsigned int )(& ((struct intel_output *)0)->base));
dvo = intel_output->dev_priv;
if (mode->flags & (unsigned int )(1 << 5)) {
return (MODE_NO_DBLESCAN);
} else {
}
if (dvo->panel_fixed_mode) {
if (mode->hdisplay > (dvo->panel_fixed_mode)->hdisplay) {
return (MODE_PANEL);
} else {
}
if (mode->vdisplay > (dvo->panel_fixed_mode)->vdisplay) {
return (MODE_PANEL);
} else {
}
} else {
}
tmp = (*((dvo->dev_ops)->mode_valid))(dvo, mode);
return (tmp);
}
}
static bool intel_dvo_mode_fixup(struct drm_encoder *encoder , struct drm_display_mode *mode ,
struct drm_display_mode *adjusted_mode )
{
struct intel_output *intel_output ;
struct drm_encoder const *__mptr ;
struct intel_dvo_device *dvo ;
bool tmp ;
{
__mptr = encoder;
intel_output = (struct intel_output *)((char *)__mptr - (unsigned int )(& ((struct intel_output *)0)->enc));
dvo = intel_output->dev_priv;
if ((unsigned long )dvo->panel_fixed_mode != (unsigned long )((void *)0)) {
adjusted_mode->hdisplay = (dvo->panel_fixed_mode)->hdisplay;
adjusted_mode->hsync_start = (dvo->panel_fixed_mode)->hsync_start;
adjusted_mode->hsync_end = (dvo->panel_fixed_mode)->hsync_end;
adjusted_mode->htotal = (dvo->panel_fixed_mode)->htotal;
adjusted_mode->vdisplay = (dvo->panel_fixed_mode)->vdisplay;
adjusted_mode->vsync_start = (dvo->panel_fixed_mode)->vsync_start;
adjusted_mode->vsync_end = (dvo->panel_fixed_mode)->vsync_end;
adjusted_mode->vtotal = (dvo->panel_fixed_mode)->vtotal;
adjusted_mode->clock = (dvo->panel_fixed_mode)->clock;
drm_mode_set_crtcinfo(adjusted_mode, 1);
} else {
}
if ((dvo->dev_ops)->mode_fixup) {
tmp = (*((dvo->dev_ops)->mode_fixup))(dvo, mode, adjusted_mode);
return (tmp);
} else {
}
return (true);
}
}
static void intel_dvo_mode_set(struct drm_encoder *encoder , struct drm_display_mode *mode ,
struct drm_display_mode *adjusted_mode )
{
struct drm_device *dev ;
struct drm_i915_private *dev_priv ;
struct intel_crtc *intel_crtc ;
struct drm_crtc const *__mptr ;
struct intel_output *intel_output ;
struct drm_encoder const *__mptr___0 ;
struct intel_dvo_device *dvo ;
int pipe ;
u32 dvo_val ;
u32 dvo_reg ;
u32 dvo_srcdim_reg ;
int dpll_reg ;
unsigned int tmp ;
unsigned int tmp___0 ;
{
dev = encoder->dev;
dev_priv = dev->dev_private;
__mptr = encoder->crtc;
intel_crtc = (struct intel_crtc *)((char *)__mptr - (unsigned int )(& ((struct intel_crtc *)0)->base));
__mptr___0 = encoder;
intel_output = (struct intel_output *)((char *)__mptr___0 - (unsigned int )(& ((struct intel_output *)0)->enc));
dvo = intel_output->dev_priv;
pipe = intel_crtc->pipe;
dvo_reg = dvo->dvo_reg;
dpll_reg = pipe == 0 ? 24596 : 24600;
switch (dvo_reg) {
default:
dvo_srcdim_reg = 397604;
break;
case (u32 )397632:
dvo_srcdim_reg = 397636;
break;
case (u32 )397664:
dvo_srcdim_reg = 397668;
break;
}
(*((dvo->dev_ops)->mode_set))(dvo, mode, adjusted_mode);
tmp = readl(dev_priv->regs + dvo_reg);
dvo_val = tmp & (unsigned int )((7 << 24) | (1 << 6));
dvo_val = dvo_val | (unsigned int )(((1 << 14) | (1 << 7)) | (1 << 2));
if (pipe == 1) {
dvo_val = dvo_val | (unsigned int )(1 << 30);
} else {
}
dvo_val = dvo_val | (unsigned int )(1 << 28);
if (adjusted_mode->flags & (unsigned int )(1 << 0)) {
dvo_val = dvo_val | (unsigned int )(1 << 3);
} else {
}
if (adjusted_mode->flags & (unsigned int )(1 << 2)) {
dvo_val = dvo_val | (unsigned int )(1 << 4);
} else {
}
tmp___0 = readl(dev_priv->regs + dpll_reg);
writel(tmp___0 | (unsigned int )(1 << 30), dev_priv->regs + dpll_reg);
writel((adjusted_mode->hdisplay << 12) | (adjusted_mode->vdisplay << 0), dev_priv->regs + dvo_srcdim_reg);
writel(dvo_val, dev_priv->regs + dvo_reg);
return;
}
}
static enum drm_connector_status intel_dvo_detect(struct drm_connector *connector )
{
struct intel_output *intel_output ;
struct drm_connector const *__mptr ;
struct intel_dvo_device *dvo ;
enum drm_connector_status tmp ;
{
__mptr = connector;
intel_output = (struct intel_output *)((char *)__mptr - (unsigned int )(& ((struct intel_output *)0)->base));
dvo = intel_output->dev_priv;
tmp = (*((dvo->dev_ops)->detect))(dvo);
return (tmp);
}
}
static int intel_dvo_get_modes(struct drm_connector *connector )
{
struct intel_output *intel_output ;
struct drm_connector const *__mptr ;
struct intel_dvo_device *dvo ;
int tmp ;
struct drm_display_mode *mode ;
{
__mptr = connector;
intel_output = (struct intel_output *)((char *)__mptr - (unsigned int )(& ((struct intel_output *)0)->base));
dvo = intel_output->dev_priv;
intel_ddc_get_modes(intel_output);
tmp = list_empty(& connector->probed_modes);
if (tmp) {
} else {
return (1);
}
if ((unsigned long )dvo->panel_fixed_mode != (unsigned long )((void *)0)) {
mode = drm_mode_duplicate(connector->dev, dvo->panel_fixed_mode);
if (mode) {
drm_mode_probed_add(connector, mode);
return (1);
} else {
}
} else {
}
return (0);
}
}
static void intel_dvo_destroy(struct drm_connector *connector )
{
struct intel_output *intel_output ;
struct drm_connector const *__mptr ;
struct intel_dvo_device *dvo ;
{
__mptr = connector;
intel_output = (struct intel_output *)((char *)__mptr - (unsigned int )(& ((struct intel_output *)0)->base));
dvo = intel_output->dev_priv;
if (dvo) {
if ((dvo->dev_ops)->destroy) {
(*((dvo->dev_ops)->destroy))(dvo);
} else {
}
if (dvo->panel_fixed_mode) {
kfree(dvo->panel_fixed_mode);
} else {
}
} else {
}
if (intel_output->i2c_bus) {
intel_i2c_destroy(intel_output->i2c_bus);
} else {
}
if (intel_output->ddc_bus) {
intel_i2c_destroy(intel_output->ddc_bus);
} else {
}
drm_sysfs_connector_remove(connector);
drm_connector_cleanup(connector);
kfree(intel_output);
return;
}
}
static struct drm_encoder_helper_funcs const intel_dvo_helper_funcs =
{& intel_dvo_dpms, 0, 0, & intel_dvo_mode_fixup, & intel_encoder_prepare, & intel_encoder_commit,
& intel_dvo_mode_set, 0};
static struct drm_connector_funcs const intel_dvo_connector_funcs = {0, & intel_dvo_save, & intel_dvo_restore, & intel_dvo_detect, & drm_helper_probe_single_connector_modes,
0, & intel_dvo_destroy};
static struct drm_connector_helper_funcs const intel_dvo_connector_helper_funcs = {& intel_dvo_get_modes,
& intel_dvo_mode_valid, & intel_best_encoder};
static void intel_dvo_enc_destroy(struct drm_encoder *encoder )
{
{
drm_encoder_cleanup(encoder);
return;
}
}
static struct drm_encoder_funcs const intel_dvo_enc_funcs = {& intel_dvo_enc_destroy};
static struct drm_display_mode *intel_dvo_get_current_mode(struct drm_connector *connector )
{
struct drm_device *dev ;
struct drm_i915_private *dev_priv ;
struct intel_output *intel_output ;
struct drm_connector const *__mptr ;
struct intel_dvo_device *dvo ;
uint32_t dvo_reg ;
uint32_t dvo_val ;
unsigned int tmp ;
struct drm_display_mode *mode ;
struct drm_crtc *crtc ;
int pipe ;
{
dev = connector->dev;
dev_priv = dev->dev_private;
__mptr = connector;
intel_output = (struct intel_output *)((char *)__mptr - (unsigned int )(& ((struct intel_output *)0)->base));
dvo = intel_output->dev_priv;
dvo_reg = dvo->dvo_reg;
tmp = readl(dev_priv->regs + dvo_reg);
dvo_val = tmp;
mode = (void *)0;
if (dvo_val & (unsigned int )(1 << 31)) {
pipe = dvo_val & (unsigned int )(1 << 30) ? 1 : 0;
crtc = intel_get_crtc_from_pipe(dev, pipe);
if (crtc) {
mode = intel_crtc_mode_get(dev, crtc);
if (mode) {
mode->type = mode->type | (1 << 3);
if (dvo_val & (unsigned int )(1 << 3)) {
mode->flags = mode->flags | (unsigned int )(1 << 0);
} else {
}
if (dvo_val & (unsigned int )(1 << 4)) {
mode->flags = mode->flags | (unsigned int )(1 << 2);
} else {
}
} else {
}
} else {
}
} else {
}
return (mode);
}
}
void intel_dvo_init(struct drm_device *dev )
{
struct intel_output *intel_output ;
struct intel_dvo_device *dvo ;
struct intel_i2c_chan *i2cbus ;
int ret ;
int i ;
int gpio_inited ;
int encoder_type ;
void *tmp ;
struct drm_connector *connector ;
int gpio ;
bool tmp___0 ;
{
i2cbus = (void *)0;
ret = 0;
gpio_inited = 0;
encoder_type = 0;
tmp = kzalloc(sizeof(struct intel_output ), (16U | 64U) | 128U);
intel_output = tmp;
if (! intel_output) {
return;
} else {
}
intel_output->ddc_bus = intel_i2c_create(dev, 20508, "DVODDC_D");
if (! intel_output->ddc_bus) {
goto free_intel;
} else {
}
i = 0;
while (1) {
if ((unsigned long )i < sizeof(intel_dvo_devices) / sizeof(intel_dvo_devices[0]) + (sizeof(char [1 - 2 * 0]) - 1UL)) {
} else {
break;
}
connector = & intel_output->base;
dvo = & intel_dvo_devices[i];
if (dvo->gpio != (u32 )0) {
gpio = dvo->gpio;
} else
if (dvo->type == 1) {
gpio = 20500;
} else {
gpio = 20512;
}
if (gpio_inited != gpio) {
if ((unsigned long )i2cbus != (unsigned long )((void *)0)) {
intel_i2c_destroy(i2cbus);
} else {
}
i2cbus = intel_i2c_create(dev, gpio, gpio == 20500 ? "DVOI2C_B" : "DVOI2C_E");
if (i2cbus) {
} else {
goto __Cont;
}
gpio_inited = gpio;
} else {
}
if ((unsigned long )dvo->dev_ops != (unsigned long )((void *)0)) {
tmp___0 = (*((dvo->dev_ops)->init))(dvo, i2cbus);
ret = tmp___0;
} else {
ret = false;
}
if (! ret) {
goto __Cont;
} else {
}
intel_output->type = 2;
switch (dvo->type) {
case 2:
drm_connector_init(dev, connector, & intel_dvo_connector_funcs, 2);
encoder_type = 2;
break;
case 1:
drm_connector_init(dev, connector, & intel_dvo_connector_funcs, 7);
encoder_type = 3;
break;
}
drm_connector_helper_add(connector, & intel_dvo_connector_helper_funcs);
connector->display_info.subpixel_order = SubPixelHorizontalRGB;
connector->interlace_allowed = false;
connector->doublescan_allowed = false;
intel_output->dev_priv = dvo;
intel_output->i2c_bus = i2cbus;
drm_encoder_init(dev, & intel_output->enc, & intel_dvo_enc_funcs, encoder_type);
drm_encoder_helper_add(& intel_output->enc, & intel_dvo_helper_funcs);
drm_mode_connector_attach_encoder(& intel_output->base, & intel_output->enc);
if (dvo->type == 1) {
dvo->panel_fixed_mode = intel_dvo_get_current_mode(connector);
dvo->panel_wants_dither = true;
} else {
}
drm_sysfs_connector_add(connector);
return;
__Cont: /* CIL Label */
i = i + 1;
}
intel_i2c_destroy(intel_output->ddc_bus);
if ((unsigned long )i2cbus != (unsigned long )((void *)0)) {
intel_i2c_destroy(i2cbus);
} else {
}
free_intel:
kfree(intel_output);
return;
}
}
void ldv_main18_sequence_infinite_withcheck_stateful(void)
{
struct drm_encoder *var_group1 ;
int var_intel_dvo_dpms_0_p1 ;
struct drm_display_mode *var_group2 ;
struct drm_display_mode *var_intel_dvo_mode_fixup_4_p2 ;
struct drm_display_mode *var_intel_dvo_mode_set_5_p2 ;
struct drm_connector *var_group3 ;
int tmp ;
int tmp___0 ;
{
LDV_IN_INTERRUPT = 1;
ldv_initialize();
while (1) {
tmp___0 = nondet_int();
if (tmp___0) {
} else {
break;
}
tmp = nondet_int();
switch (tmp) {
case 0:
ldv_handler_precall();
intel_dvo_dpms(var_group1, var_intel_dvo_dpms_0_p1);
break;
case 1:
ldv_handler_precall();
intel_dvo_mode_fixup(var_group1, var_group2, var_intel_dvo_mode_fixup_4_p2);
break;
case 2:
ldv_handler_precall();
intel_dvo_mode_set(var_group1, var_group2, var_intel_dvo_mode_set_5_p2);
break;
case 3:
ldv_handler_precall();
intel_dvo_save(var_group3);
break;
case 4:
ldv_handler_precall();
intel_dvo_restore(var_group3);
break;
case 5:
ldv_handler_precall();
intel_dvo_detect(var_group3);
break;
case 6:
ldv_handler_precall();
intel_dvo_destroy(var_group3);
break;
case 7:
ldv_handler_precall();
intel_dvo_mode_valid(var_group3, var_group2);
break;
case 8:
ldv_handler_precall();
intel_dvo_get_modes(var_group3);
break;
case 9:
ldv_handler_precall();
intel_dvo_enc_destroy(var_group1);
break;
default:
break;
}
}
ldv_check_final_state();
return;
}
}
static struct ch7xxx_id_struct ch7xxx_ids[4] = { {131, "CH7011"},
{132, "CH7009A"},
{133, "CH7009B"},
{149, "CH7301"}};
static void ch7xxx_save(struct intel_dvo_device *dvo ) ;
static char *ch7xxx_get_id(uint8_t vid )
{
int i ;
{
i = 0;
while (1) {
if ((unsigned long )i < sizeof(ch7xxx_ids) / sizeof(ch7xxx_ids[0]) + (sizeof(char [1 - 2 * 0]) - 1UL)) {
} else {
break;
}
if ((int )ch7xxx_ids[i].vid == (int )vid) {
return (ch7xxx_ids[i].name);
} else {
}
i = i + 1;
}
return ((void *)0);
}
}
static bool ch7xxx_readb(struct intel_dvo_device *dvo , int addr , uint8_t *ch )
{
struct ch7xxx_priv *ch7xxx ;
struct intel_i2c_chan *i2cbus ;
u8 out_buf[2] ;
u8 in_buf[2] ;
struct i2c_msg msgs[2] ;
int tmp ;
{
ch7xxx = dvo->dev_priv;
i2cbus = dvo->i2c_bus;
msgs[0].addr = i2cbus->slave_addr;
msgs[0].flags = 0;
msgs[0].len = 1;
msgs[0].buf = out_buf;
msgs[1].addr = i2cbus->slave_addr;
msgs[1].flags = 1;
msgs[1].len = 1;
msgs[1].buf = in_buf;
out_buf[0] = addr;
out_buf[1] = 0;
tmp = i2c_transfer(& i2cbus->adapter, msgs, 2);
if (tmp == 2) {
*ch = in_buf[0];
return (true);
} else {
}
if (! ch7xxx->quiet) {
while (1) {
if (drm_debug) {
printk("<7>[drm:%s] Unable to read register 0x%02x from %s:%02x.\n", "ch7xxx_readb",
addr, i2cbus->adapter.name, i2cbus->slave_addr);
} else {
}
break;
}
} else {
}
return (false);
}
}
static bool ch7xxx_writeb(struct intel_dvo_device *dvo , int addr , uint8_t ch )
{
struct ch7xxx_priv *ch7xxx ;
struct intel_i2c_chan *i2cbus ;
uint8_t out_buf[2] ;
struct i2c_msg msg ;
int tmp ;
{
ch7xxx = dvo->dev_priv;
i2cbus = dvo->i2c_bus;
msg.addr = i2cbus->slave_addr;
msg.flags = 0;
msg.len = 2;
msg.buf = out_buf;
out_buf[0] = addr;
out_buf[1] = ch;
tmp = i2c_transfer(& i2cbus->adapter, & msg, 1);
if (tmp == 1) {
return (true);
} else {
}
if (! ch7xxx->quiet) {
while (1) {
if (drm_debug) {
printk("<7>[drm:%s] Unable to write register 0x%02x to %s:%d.\n", "ch7xxx_writeb",
addr, i2cbus->adapter.name, i2cbus->slave_addr);
} else {
}
break;
}
} else {
}
return (false);
}
}
static bool ch7xxx_init(struct intel_dvo_device *dvo , struct intel_i2c_chan *i2cbus )
{
struct ch7xxx_priv *ch7xxx ;
uint8_t vendor ;
uint8_t device ;
char *name ;
void *tmp ;
bool tmp___0 ;
bool tmp___1 ;
{
tmp = kzalloc(sizeof(struct ch7xxx_priv ), (16U | 64U) | 128U);
ch7xxx = tmp;
if ((unsigned long )ch7xxx == (unsigned long )((void *)0)) {
return (false);
} else {
}
dvo->i2c_bus = i2cbus;
(dvo->i2c_bus)->slave_addr = dvo->slave_addr;
dvo->dev_priv = ch7xxx;
ch7xxx->quiet = true;
tmp___0 = ch7xxx_readb(dvo, 74, & vendor);
if (tmp___0) {
} else {
goto out;
}
name = ch7xxx_get_id(vendor);
if (! name) {
while (1) {
if (drm_debug) {
printk("<7>[drm:%s] ch7xxx not detected; got 0x%02x from %s slave %d.\n",
"ch7xxx_init", vendor, i2cbus->adapter.name, i2cbus->slave_addr);
} else {
}
break;
}
goto out;
} else {
}
tmp___1 = ch7xxx_readb(dvo, 75, & device);
if (tmp___1) {
} else {
goto out;
}
if ((int )device != 23) {
while (1) {
if (drm_debug) {
printk("<7>[drm:%s] ch7xxx not detected; got 0x%02x from %s slave %d.\n",
"ch7xxx_init", vendor, i2cbus->adapter.name, i2cbus->slave_addr);
} else {
}
break;
}
goto out;
} else {
}
ch7xxx->quiet = false;
while (1) {
if (drm_debug) {
printk("<7>[drm:%s] Detected %s chipset, vendor/device ID 0x%02x/0x%02x\n",
"ch7xxx_init", name, vendor, device);
} else {
}
break;
}
return (true);
out:
kfree(ch7xxx);
return (false);
}
}
static enum drm_connector_status ch7xxx_detect(struct intel_dvo_device *dvo )
{
uint8_t cdet ;
uint8_t orig_pm ;
uint8_t pm ;
{
ch7xxx_readb(dvo, 73, & orig_pm);
pm = orig_pm;
pm = (int )pm & ~ (1 << 0);
pm = (int )pm | ((1 << 6) | (1 << 7));
ch7xxx_writeb(dvo, 73, pm);
ch7xxx_readb(dvo, 32, & cdet);
ch7xxx_writeb(dvo, 73, orig_pm);
if ((int )cdet & (1 << 5)) {
return (connector_status_connected);
} else {
}
return (connector_status_disconnected);
}
}
static enum drm_mode_status ch7xxx_mode_valid(struct intel_dvo_device *dvo , struct drm_display_mode *mode )
{
{
if (mode->clock > 165000) {
return (MODE_CLOCK_HIGH);
} else {
}
return (MODE_OK);
}
}
static void ch7xxx_mode_set(struct intel_dvo_device *dvo , struct drm_display_mode *mode ,
struct drm_display_mode *adjusted_mode )
{
uint8_t tvco ;
uint8_t tpcp ;
uint8_t tpd ;
uint8_t tlpf ;
uint8_t idf ;
{
if (mode->clock <= 65000) {
tvco = 35;
tpcp = 8;
tpd = 22;
tlpf = 96;
} else {
tvco = 45;
tpcp = 6;
tpd = 38;
tlpf = 160;
}
ch7xxx_writeb(dvo, 49, 0);
ch7xxx_writeb(dvo, 50, tvco);
ch7xxx_writeb(dvo, 51, tpcp);
ch7xxx_writeb(dvo, 52, tpd);
ch7xxx_writeb(dvo, 53, 48);
ch7xxx_writeb(dvo, 54, tlpf);
ch7xxx_writeb(dvo, 55, 0);
ch7xxx_readb(dvo, 31, & idf);
idf = (int )idf & ~ ((1 << 3) | (1 << 4));
if (mode->flags & (unsigned int )(1 << 0)) {
idf = (int )idf | (1 << 3);
} else {
}
if (mode->flags & (unsigned int )(1 << 2)) {
idf = (int )idf | (1 << 3);
} else {
}
ch7xxx_writeb(dvo, 31, idf);
return;
}
}
static void ch7xxx_dpms(struct intel_dvo_device *dvo , int mode )
{
{
if (mode == 0) {
ch7xxx_writeb(dvo, 73, (1 << 6) | (1 << 7));
} else {
ch7xxx_writeb(dvo, 73, 1 << 0);
}
return;
}
}
static void ch7xxx_dump_regs(struct intel_dvo_device *dvo )
{
struct ch7xxx_priv *ch7xxx ;
int i ;
{
ch7xxx = dvo->dev_priv;
i = 0;
while (1) {
if (i < 76) {
} else {
break;
}
if (i % 8 == 0) {
while (1) {
if (drm_debug) {
printk("<7>[drm:%s] \n %02X: ", "ch7xxx_dump_regs", i);
} else {
}
break;
}
} else {
}
while (1) {
if (drm_debug) {
printk("<7>[drm:%s] %02X ", "ch7xxx_dump_regs", ch7xxx->mode_reg.regs[i]);
} else {
}
break;
}
i = i + 1;
}
return;
}
}
static void ch7xxx_save(struct intel_dvo_device *dvo )
{
struct ch7xxx_priv *ch7xxx ;
{
ch7xxx = dvo->dev_priv;
ch7xxx_readb(dvo, 49, & ch7xxx->save_TCTL);
ch7xxx_readb(dvo, 51, & ch7xxx->save_TPCP);
ch7xxx_readb(dvo, 52, & ch7xxx->save_TPD);
ch7xxx_readb(dvo, 53, & ch7xxx->save_TPVT);
ch7xxx_readb(dvo, 54, & ch7xxx->save_TLPF);
ch7xxx_readb(dvo, 73, & ch7xxx->save_PM);
ch7xxx_readb(dvo, 31, & ch7xxx->save_IDF);
return;
}
}
static void ch7xxx_restore(struct intel_dvo_device *dvo )
{
struct ch7xxx_priv *ch7xxx ;
{
ch7xxx = dvo->dev_priv;
ch7xxx_writeb(dvo, 49, ch7xxx->save_TCTL);
ch7xxx_writeb(dvo, 51, ch7xxx->save_TPCP);
ch7xxx_writeb(dvo, 52, ch7xxx->save_TPD);
ch7xxx_writeb(dvo, 53, ch7xxx->save_TPVT);
ch7xxx_writeb(dvo, 54, ch7xxx->save_TLPF);
ch7xxx_writeb(dvo, 31, ch7xxx->save_IDF);
ch7xxx_writeb(dvo, 73, ch7xxx->save_PM);
return;
}
}
static void ch7xxx_destroy(struct intel_dvo_device *dvo )
{
struct ch7xxx_priv *ch7xxx ;
{
ch7xxx = dvo->dev_priv;
if (ch7xxx) {
kfree(ch7xxx);
dvo->dev_priv = (void *)0;
} else {
}
return;
}
}
struct intel_dvo_dev_ops ch7xxx_ops =
{& ch7xxx_init, 0, & ch7xxx_dpms, & ch7xxx_save, & ch7xxx_restore, & ch7xxx_mode_valid,
0, 0, 0, & ch7xxx_mode_set, & ch7xxx_detect, 0, & ch7xxx_destroy, & ch7xxx_dump_regs};
void ldv_main19_sequence_infinite_withcheck_stateful(void)
{
struct intel_dvo_device *var_group1 ;
struct intel_i2c_chan *var_group2 ;
struct drm_display_mode *var_group3 ;
struct drm_display_mode *var_ch7xxx_mode_set_6_p2 ;
int var_ch7xxx_dpms_7_p1 ;
int tmp ;
int tmp___0 ;
{
LDV_IN_INTERRUPT = 1;
ldv_initialize();
while (1) {
tmp___0 = nondet_int();
if (tmp___0) {
} else {
break;
}
tmp = nondet_int();
switch (tmp) {
case 0:
ldv_handler_precall();
ch7xxx_init(var_group1, var_group2);
break;
case 1:
ldv_handler_precall();
ch7xxx_detect(var_group1);
break;
case 2:
ldv_handler_precall();
ch7xxx_mode_valid(var_group1, var_group3);
break;
case 3:
ldv_handler_precall();
ch7xxx_mode_set(var_group1, var_group3, var_ch7xxx_mode_set_6_p2);
break;
case 4:
ldv_handler_precall();
ch7xxx_dpms(var_group1, var_ch7xxx_dpms_7_p1);
break;
case 5:
ldv_handler_precall();
ch7xxx_dump_regs(var_group1);
break;
case 6:
ldv_handler_precall();
ch7xxx_save(var_group1);
break;
case 7:
ldv_handler_precall();
ch7xxx_restore(var_group1);
break;
case 8:
ldv_handler_precall();
ch7xxx_destroy(var_group1);
break;
default:
break;
}
}
ldv_check_final_state();
return;
}
}
static void ch7017_dump_regs(struct intel_dvo_device *dvo ) ;
static void ch7017_dpms(struct intel_dvo_device *dvo , int mode ) ;
static bool ch7017_read(struct intel_dvo_device *dvo , int addr , uint8_t *val )
{
struct intel_i2c_chan *i2cbus ;
u8 out_buf[2] ;
u8 in_buf[2] ;
struct i2c_msg msgs[2] ;
int tmp ;
{
i2cbus = dvo->i2c_bus;
msgs[0].addr = i2cbus->slave_addr;
msgs[0].flags = 0;
msgs[0].len = 1;
msgs[0].buf = out_buf;
msgs[1].addr = i2cbus->slave_addr;
msgs[1].flags = 1;
msgs[1].len = 1;
msgs[1].buf = in_buf;
out_buf[0] = addr;
out_buf[1] = 0;
tmp = i2c_transfer(& i2cbus->adapter, msgs, 2);
if (tmp == 2) {
*val = in_buf[0];
return (true);
} else {
}
return (false);
}
}
static bool ch7017_write(struct intel_dvo_device *dvo , int addr , uint8_t val )
{
struct intel_i2c_chan *i2cbus ;
uint8_t out_buf[2] ;
struct i2c_msg msg ;
int tmp ;
{
i2cbus = dvo->i2c_bus;
msg.addr = i2cbus->slave_addr;
msg.flags = 0;
msg.len = 2;
msg.buf = out_buf;
out_buf[0] = addr;
out_buf[1] = val;
tmp = i2c_transfer(& i2cbus->adapter, & msg, 1);
if (tmp == 1) {
return (true);
} else {
}
return (false);
}
}
static bool ch7017_init(struct intel_dvo_device *dvo , struct intel_i2c_chan *i2cbus )
{
struct ch7017_priv *priv ;
uint8_t val ;
void *tmp ;
bool tmp___0 ;
{
tmp = kzalloc(sizeof(struct ch7017_priv ), (16U | 64U) | 128U);
priv = tmp;
if ((unsigned long )priv == (unsigned long )((void *)0)) {
return (false);
} else {
}
dvo->i2c_bus = i2cbus;
(dvo->i2c_bus)->slave_addr = dvo->slave_addr;
dvo->dev_priv = priv;
tmp___0 = ch7017_read(dvo, 75, & val);
if (tmp___0) {
} else {
goto fail;
}
if (((int )val != 27 && (int )val != 26) && (int )val != 25) {
while (1) {
if (drm_debug) {
printk("<7>[drm:%s] ch701x not detected, got %d: from %s Slave %d.\n", "ch7017_init",
val, i2cbus->adapter.name, i2cbus->slave_addr);
} else {
}
break;
}
goto fail;
} else {
}
return (true);
fail:
kfree(priv);
return (false);
}
}
static enum drm_connector_status ch7017_detect(struct intel_dvo_device *dvo )
{
{
return (connector_status_unknown);
}
}
static enum drm_mode_status ch7017_mode_valid(struct intel_dvo_device *dvo , struct drm_display_mode *mode )
{
{
if (mode->clock > 160000) {
return (MODE_CLOCK_HIGH);
} else {
}
return (MODE_OK);
}
}
static void ch7017_mode_set(struct intel_dvo_device *dvo , struct drm_display_mode *mode ,
struct drm_display_mode *adjusted_mode )
{
uint8_t lvds_pll_feedback_div ;
uint8_t lvds_pll_vco_control ;
uint8_t outputs_enable ;
uint8_t lvds_control_2 ;
uint8_t lvds_power_down ;
uint8_t horizontal_active_pixel_input ;
uint8_t horizontal_active_pixel_output ;
uint8_t vertical_active_line_output ;
uint8_t active_input_line_output ;
{
while (1) {
if (drm_debug) {
printk("<7>[drm:%s] Registers before mode setting\n", "ch7017_mode_set");
} else {
}
break;
}
ch7017_dump_regs(dvo);
if (mode->clock < 100000) {
outputs_enable = (1 << 3) | 0;
lvds_pll_feedback_div = (128 | (2 << 4)) | (13 << 0);
lvds_pll_vco_control = (128 | (2 << 4)) | (3 << 0);
lvds_control_2 = (1 << 5) | (0 << 0);
} else {
outputs_enable = (1 << 3) | 3;
lvds_pll_feedback_div = (128 | (2 << 4)) | (3 << 0);
lvds_pll_feedback_div = 35;
lvds_control_2 = (3 << 5) | (0 << 0);
outputs_enable = (int )outputs_enable | (1 << 4);
lvds_pll_vco_control = (128 | (2 << 4)) | (13 << 0);
}
horizontal_active_pixel_input = mode->hdisplay & 255;
vertical_active_line_output = mode->vdisplay & 255;
horizontal_active_pixel_output = mode->hdisplay & 255;
active_input_line_output = ((mode->hdisplay & 1792) >> 8) | (((mode->vdisplay & 1792) >> 8) << 3);
lvds_power_down = 8 | ((mode->hdisplay & 1792) >> 8);
ch7017_dpms(dvo, 3);
ch7017_write(dvo, 95, horizontal_active_pixel_input);
ch7017_write(dvo, 98, horizontal_active_pixel_output);
ch7017_write(dvo, 97, vertical_active_line_output);
ch7017_write(dvo, 96, active_input_line_output);
ch7017_write(dvo, 114, lvds_pll_vco_control);
ch7017_write(dvo, 113, lvds_pll_feedback_div);
ch7017_write(dvo, 120, lvds_control_2);
ch7017_write(dvo, 115, outputs_enable);
ch7017_write(dvo, 99, lvds_power_down);
while (1) {
if (drm_debug) {
printk("<7>[drm:%s] Registers after mode setting\n", "ch7017_mode_set");
} else {
}
break;
}
ch7017_dump_regs(dvo);
return;
}
}
static void ch7017_dpms(struct intel_dvo_device *dvo , int mode )
{
uint8_t val ;
{
ch7017_read(dvo, 99, & val);
ch7017_write(dvo, 73, ((((1 << 1) | (1 << 2)) | (1 << 3)) | (1 << 4)) | (1 << 5));
if (mode == 0) {
ch7017_write(dvo, 99, (int )val & ~ (1 << 6));
} else {
ch7017_write(dvo, 99, (int )val | (1 << 6));
}
if (20000 > 20000) {
__bad_udelay();
} else {
__const_udelay(20000UL * 4295UL);
}
return;
}
}
static void ch7017_dump_regs(struct intel_dvo_device *dvo )
{
uint8_t val ;
{
while (1) {
ch7017_read(dvo, 95, & val);
while (1) {
if (drm_debug) {
printk("<7>[drm:%s] CH7017_HORIZONTAL_ACTIVE_PIXEL_INPUT: %02x\n", "ch7017_dump_regs",
val);
} else {
}
break;
}
break;
}
while (1) {
ch7017_read(dvo, 98, & val);
while (1) {
if (drm_debug) {
printk("<7>[drm:%s] CH7017_HORIZONTAL_ACTIVE_PIXEL_OUTPUT: %02x\n", "ch7017_dump_regs",
val);
} else {
}
break;
}
break;
}
while (1) {
ch7017_read(dvo, 97, & val);
while (1) {
if (drm_debug) {
printk("<7>[drm:%s] CH7017_VERTICAL_ACTIVE_LINE_OUTPUT: %02x\n", "ch7017_dump_regs",
val);
} else {
}
break;
}
break;
}
while (1) {
ch7017_read(dvo, 96, & val);
while (1) {
if (drm_debug) {
printk("<7>[drm:%s] CH7017_ACTIVE_INPUT_LINE_OUTPUT: %02x\n", "ch7017_dump_regs",
val);
} else {
}
break;
}
break;
}
while (1) {
ch7017_read(dvo, 114, & val);
while (1) {
if (drm_debug) {
printk("<7>[drm:%s] CH7017_LVDS_PLL_VCO_CONTROL: %02x\n", "ch7017_dump_regs",
val);
} else {
}
break;
}
break;
}
while (1) {
ch7017_read(dvo, 113, & val);
while (1) {
if (drm_debug) {
printk("<7>[drm:%s] CH7017_LVDS_PLL_FEEDBACK_DIV: %02x\n", "ch7017_dump_regs",
val);
} else {
}
break;
}
break;
}
while (1) {
ch7017_read(dvo, 120, & val);
while (1) {
if (drm_debug) {
printk("<7>[drm:%s] CH7017_LVDS_CONTROL_2: %02x\n", "ch7017_dump_regs", val);
} else {
}
break;
}
break;
}
while (1) {
ch7017_read(dvo, 115, & val);
while (1) {
if (drm_debug) {
printk("<7>[drm:%s] CH7017_OUTPUTS_ENABLE: %02x\n", "ch7017_dump_regs", val);
} else {
}
break;
}
break;
}
while (1) {
ch7017_read(dvo, 99, & val);
while (1) {
if (drm_debug) {
printk("<7>[drm:%s] CH7017_LVDS_POWER_DOWN: %02x\n", "ch7017_dump_regs", val);
} else {
}
break;
}
break;
}
return;
}
}
static void ch7017_save(struct intel_dvo_device *dvo )
{
struct ch7017_priv *priv ;
{
priv = dvo->dev_priv;
ch7017_read(dvo, 95, & priv->save_hapi);
ch7017_read(dvo, 97, & priv->save_valo);
ch7017_read(dvo, 96, & priv->save_ailo);
ch7017_read(dvo, 114, & priv->save_lvds_pll_vco);
ch7017_read(dvo, 113, & priv->save_feedback_div);
ch7017_read(dvo, 120, & priv->save_lvds_control_2);
ch7017_read(dvo, 115, & priv->save_outputs_enable);
ch7017_read(dvo, 99, & priv->save_lvds_power_down);
ch7017_read(dvo, 73, & priv->save_power_management);
return;
}
}
static void ch7017_restore(struct intel_dvo_device *dvo )
{
struct ch7017_priv *priv ;
{
priv = dvo->dev_priv;
ch7017_dpms(dvo, 3);
ch7017_write(dvo, 95, priv->save_hapi);
ch7017_write(dvo, 97, priv->save_valo);
ch7017_write(dvo, 96, priv->save_ailo);
ch7017_write(dvo, 114, priv->save_lvds_pll_vco);
ch7017_write(dvo, 113, priv->save_feedback_div);
ch7017_write(dvo, 120, priv->save_lvds_control_2);
ch7017_write(dvo, 115, priv->save_outputs_enable);
ch7017_write(dvo, 99, priv->save_lvds_power_down);
ch7017_write(dvo, 73, priv->save_power_management);
return;
}
}
static void ch7017_destroy(struct intel_dvo_device *dvo )
{
struct ch7017_priv *priv ;
{
priv = dvo->dev_priv;
if (priv) {
kfree(priv);
dvo->dev_priv = (void *)0;
} else {
}
return;
}
}
struct intel_dvo_dev_ops ch7017_ops =
{& ch7017_init, 0, & ch7017_dpms, & ch7017_save, & ch7017_restore, & ch7017_mode_valid,
0, 0, 0, & ch7017_mode_set, & ch7017_detect, 0, & ch7017_destroy, & ch7017_dump_regs};
void ldv_main20_sequence_infinite_withcheck_stateful(void)
{
struct intel_dvo_device *var_group1 ;
struct intel_i2c_chan *var_group2 ;
struct drm_display_mode *var_group3 ;
struct drm_display_mode *var_ch7017_mode_set_5_p2 ;
int var_ch7017_dpms_6_p1 ;
int tmp ;
int tmp___0 ;
{
LDV_IN_INTERRUPT = 1;
ldv_initialize();
while (1) {
tmp___0 = nondet_int();
if (tmp___0) {
} else {
break;
}
tmp = nondet_int();
switch (tmp) {
case 0:
ldv_handler_precall();
ch7017_init(var_group1, var_group2);
break;
case 1:
ldv_handler_precall();
ch7017_detect(var_group1);
break;
case 2:
ldv_handler_precall();
ch7017_mode_valid(var_group1, var_group3);
break;
case 3:
ldv_handler_precall();
ch7017_mode_set(var_group1, var_group3, var_ch7017_mode_set_5_p2);
break;
case 4:
ldv_handler_precall();
ch7017_dpms(var_group1, var_ch7017_dpms_6_p1);
break;
case 5:
ldv_handler_precall();
ch7017_dump_regs(var_group1);
break;
case 6:
ldv_handler_precall();
ch7017_save(var_group1);
break;
case 7:
ldv_handler_precall();
ch7017_restore(var_group1);
break;
case 8:
ldv_handler_precall();
ch7017_destroy(var_group1);
break;
default:
break;
}
}
ldv_check_final_state();
return;
}
}
static void ivch_dump_regs(struct intel_dvo_device *dvo ) ;
static bool ivch_read(struct intel_dvo_device *dvo , int addr , uint16_t *data )
{
struct ivch_priv *priv ;
struct intel_i2c_chan *i2cbus ;
u8 out_buf[1] ;
u8 in_buf[2] ;
struct i2c_msg msgs[3] ;
int tmp ;
{
priv = dvo->dev_priv;
i2cbus = dvo->i2c_bus;
msgs[0].addr = i2cbus->slave_addr;
msgs[0].flags = 1;
msgs[0].len = 0;
msgs[0].buf = 0;
msgs[1].addr = 0;
msgs[1].flags = 16384;
msgs[1].len = 1;
msgs[1].buf = out_buf;
msgs[2].addr = i2cbus->slave_addr;
msgs[2].flags = 1 | 16384;
msgs[2].len = 2;
msgs[2].buf = in_buf;
out_buf[0] = addr;
tmp = i2c_transfer(& i2cbus->adapter, msgs, 3);
if (tmp == 3) {
*data = ((int )in_buf[1] << 8) | (int )in_buf[0];
return (true);
} else {
}
if (! priv->quiet) {
while (1) {
if (drm_debug) {
printk("<7>[drm:%s] Unable to read register 0x%02x from %s:%02x.\n", "ivch_read",
addr, i2cbus->adapter.name, i2cbus->slave_addr);
} else {
}
break;
}
} else {
}
return (false);
}
}
static bool ivch_write(struct intel_dvo_device *dvo , int addr , uint16_t data )
{
struct ivch_priv *priv ;
struct intel_i2c_chan *i2cbus ;
u8 out_buf[3] ;
struct i2c_msg msg ;
int tmp ;
{
priv = dvo->dev_priv;
i2cbus = dvo->i2c_bus;
msg.addr = i2cbus->slave_addr;
msg.flags = 0;
msg.len = 3;
msg.buf = out_buf;
out_buf[0] = addr;
out_buf[1] = (int )data & 255;
out_buf[2] = (int )data >> 8;
tmp = i2c_transfer(& i2cbus->adapter, & msg, 1);
if (tmp == 1) {
return (true);
} else {
}
if (! priv->quiet) {
while (1) {
if (drm_debug) {
printk("<7>[drm:%s] Unable to write register 0x%02x to %s:%d.\n", "ivch_write",
addr, i2cbus->adapter.name, i2cbus->slave_addr);
} else {
}
break;
}
} else {
}
return (false);
}
}
static bool ivch_init(struct intel_dvo_device *dvo , struct intel_i2c_chan *i2cbus )
{
struct ivch_priv *priv ;
uint16_t temp ;
void *tmp ;
bool tmp___0 ;
{
tmp = kzalloc(sizeof(struct ivch_priv ), (16U | 64U) | 128U);
priv = tmp;
if ((unsigned long )priv == (unsigned long )((void *)0)) {
return (false);
} else {
}
dvo->i2c_bus = i2cbus;
(dvo->i2c_bus)->slave_addr = dvo->slave_addr;
dvo->dev_priv = priv;
priv->quiet = true;
tmp___0 = ivch_read(dvo, 0, & temp);
if (tmp___0) {
} else {
goto out;
}
priv->quiet = false;
if (((int )temp & 127) != dvo->slave_addr) {
while (1) {
if (drm_debug) {
printk("<7>[drm:%s] ivch detect failed due to address mismatch (%d vs %d)\n",
"ivch_init", (int )temp & 127, dvo->slave_addr);
} else {
}
break;
}
goto out;
} else {
}
ivch_read(dvo, 32, & priv->width);
ivch_read(dvo, 32, & priv->height);
return (true);
out:
kfree(priv);
return (false);
}
}
static enum drm_connector_status ivch_detect(struct intel_dvo_device *dvo )
{
{
return (connector_status_connected);
}
}
static enum drm_mode_status ivch_mode_valid(struct intel_dvo_device *dvo , struct drm_display_mode *mode )
{
{
if (mode->clock > 112000) {
return (MODE_CLOCK_HIGH);
} else {
}
return (MODE_OK);
}
}
static void ivch_dpms(struct intel_dvo_device *dvo , int mode )
{
int i ;
uint16_t vr01 ;
uint16_t vr30 ;
uint16_t backlight ;
bool tmp ;
bool tmp___0 ;
{
tmp = ivch_read(dvo, 1, & vr01);
if (tmp) {
} else {
return;
}
if (mode == 0) {
backlight = 1;
} else {
backlight = 0;
}
ivch_write(dvo, 128, backlight);
if (mode == 0) {
vr01 = (int )vr01 | ((1 << 2) | (1 << 0));
} else {
vr01 = (int )vr01 & ~ ((1 << 2) | (1 << 0));
}
ivch_write(dvo, 1, vr01);
i = 0;
while (1) {
if (i < 100) {
} else {
break;
}
tmp___0 = ivch_read(dvo, 48, & vr30);
if (tmp___0) {
} else {
break;
}
if ((((int )vr30 & (1 << 15)) != 0) == (mode == 0)) {
break;
} else {
}
if (1000 > 20000) {
__bad_udelay();
} else {
__const_udelay(1000UL * 4295UL);
}
i = i + 1;
}
if (16 * 1000 > 20000) {
__bad_udelay();
} else {
__const_udelay((unsigned long )(16 * 1000) * 4295UL);
}
return;
}
}
static void ivch_mode_set(struct intel_dvo_device *dvo , struct drm_display_mode *mode ,
struct drm_display_mode *adjusted_mode )
{
uint16_t vr40 ;
uint16_t vr01 ;
uint16_t x_ratio ;
uint16_t y_ratio ;
{
vr40 = 0;
vr01 = 0;
vr40 = ((1 << 13) | (1 << 12)) | (1 << 10);
if (mode->hdisplay != adjusted_mode->hdisplay || mode->vdisplay != adjusted_mode->vdisplay) {
vr01 = (int )vr01 | (1 << 3);
vr40 = (int )vr40 | (1 << 8);
x_ratio = ((mode->hdisplay - 1) << 16) / (adjusted_mode->hdisplay - 1) >> 2;
y_ratio = ((mode->vdisplay - 1) << 16) / (adjusted_mode->vdisplay - 1) >> 2;
ivch_write(dvo, 66, x_ratio);
ivch_write(dvo, 65, y_ratio);
} else {
vr01 = (int )vr01 & ~ (1 << 3);
vr40 = (int )vr40 & ~ (1 << 8);
}
vr40 = (int )vr40 & ~ (1 << 9);
ivch_write(dvo, 1, vr01);
ivch_write(dvo, 64, vr40);
ivch_dump_regs(dvo);
return;
}
}
static void ivch_dump_regs(struct intel_dvo_device *dvo )
{
uint16_t val ;
{
ivch_read(dvo, 0, & val);
while (1) {
if (drm_debug) {
printk("<7>[drm:%s] VR00: 0x%04x\n", "ivch_dump_regs", val);
} else {
}
break;
}
ivch_read(dvo, 1, & val);
while (1) {
if (drm_debug) {
printk("<7>[drm:%s] VR01: 0x%04x\n", "ivch_dump_regs", val);
} else {
}
break;
}
ivch_read(dvo, 48, & val);
while (1) {
if (drm_debug) {
printk("<7>[drm:%s] VR30: 0x%04x\n", "ivch_dump_regs", val);
} else {
}
break;
}
ivch_read(dvo, 64, & val);
while (1) {
if (drm_debug) {
printk("<7>[drm:%s] VR40: 0x%04x\n", "ivch_dump_regs", val);
} else {
}
break;
}
ivch_read(dvo, 128, & val);
while (1) {
if (drm_debug) {
printk("<7>[drm:%s] VR80: 0x%04x\n", "ivch_dump_regs", val);
} else {
}
break;
}
ivch_read(dvo, 129, & val);
while (1) {
if (drm_debug) {
printk("<7>[drm:%s] VR81: 0x%04x\n", "ivch_dump_regs", val);
} else {
}
break;
}
ivch_read(dvo, 130, & val);
while (1) {
if (drm_debug) {
printk("<7>[drm:%s] VR82: 0x%04x\n", "ivch_dump_regs", val);
} else {
}
break;
}
ivch_read(dvo, 131, & val);
while (1) {
if (drm_debug) {
printk("<7>[drm:%s] VR83: 0x%04x\n", "ivch_dump_regs", val);
} else {
}
break;
}
ivch_read(dvo, 132, & val);
while (1) {
if (drm_debug) {
printk("<7>[drm:%s] VR84: 0x%04x\n", "ivch_dump_regs", val);
} else {
}
break;
}
ivch_read(dvo, 133, & val);
while (1) {
if (drm_debug) {
printk("<7>[drm:%s] VR85: 0x%04x\n", "ivch_dump_regs", val);
} else {
}
break;
}
ivch_read(dvo, 134, & val);
while (1) {
if (drm_debug) {
printk("<7>[drm:%s] VR86: 0x%04x\n", "ivch_dump_regs", val);
} else {
}
break;
}
ivch_read(dvo, 135, & val);
while (1) {
if (drm_debug) {
printk("<7>[drm:%s] VR87: 0x%04x\n", "ivch_dump_regs", val);
} else {
}
break;
}
ivch_read(dvo, 136, & val);
while (1) {
if (drm_debug) {
printk("<7>[drm:%s] VR88: 0x%04x\n", "ivch_dump_regs", val);
} else {
}
break;
}
ivch_read(dvo, 142, & val);
while (1) {
if (drm_debug) {
printk("<7>[drm:%s] VR8E: 0x%04x\n", "ivch_dump_regs", val);
} else {
}
break;
}
ivch_read(dvo, 143, & val);
while (1) {
if (drm_debug) {
printk("<7>[drm:%s] VR8F: 0x%04x\n", "ivch_dump_regs", val);
} else {
}
break;
}
return;
}
}
static void ivch_save(struct intel_dvo_device *dvo )
{
struct ivch_priv *priv ;
{
priv = dvo->dev_priv;
ivch_read(dvo, 1, & priv->save_VR01);
ivch_read(dvo, 64, & priv->save_VR40);
return;
}
}
static void ivch_restore(struct intel_dvo_device *dvo )
{
struct ivch_priv *priv ;
{
priv = dvo->dev_priv;
ivch_write(dvo, 1, priv->save_VR01);
ivch_write(dvo, 64, priv->save_VR40);
return;
}
}
static void ivch_destroy(struct intel_dvo_device *dvo )
{
struct ivch_priv *priv ;
{
priv = dvo->dev_priv;
if (priv) {
kfree(priv);
dvo->dev_priv = (void *)0;
} else {
}
return;
}
}
struct intel_dvo_dev_ops ivch_ops =
{& ivch_init, 0, & ivch_dpms, & ivch_save, & ivch_restore, & ivch_mode_valid, 0,
0, 0, & ivch_mode_set, & ivch_detect, 0, & ivch_destroy, & ivch_dump_regs};
void ldv_main21_sequence_infinite_withcheck_stateful(void)
{
int tmp ;
int tmp___0 ;
{
LDV_IN_INTERRUPT = 1;
ldv_initialize();
while (1) {
tmp___0 = nondet_int();
if (tmp___0) {
} else {
break;
}
tmp = nondet_int();
switch (tmp) {
default:
break;
}
}
ldv_check_final_state();
return;
}
}
static bool tfp410_readb(struct intel_dvo_device *dvo , int addr , uint8_t *ch )
{
struct tfp410_priv *tfp ;
struct intel_i2c_chan *i2cbus ;
u8 out_buf[2] ;
u8 in_buf[2] ;
struct i2c_msg msgs[2] ;
int tmp ;
{
tfp = dvo->dev_priv;
i2cbus = dvo->i2c_bus;
msgs[0].addr = i2cbus->slave_addr;
msgs[0].flags = 0;
msgs[0].len = 1;
msgs[0].buf = out_buf;
msgs[1].addr = i2cbus->slave_addr;
msgs[1].flags = 1;
msgs[1].len = 1;
msgs[1].buf = in_buf;
out_buf[0] = addr;
out_buf[1] = 0;
tmp = i2c_transfer(& i2cbus->adapter, msgs, 2);
if (tmp == 2) {
*ch = in_buf[0];
return (true);
} else {
}
if (! tfp->quiet) {
while (1) {
if (drm_debug) {
printk("<7>[drm:%s] Unable to read register 0x%02x from %s:%02x.\n", "tfp410_readb",
addr, i2cbus->adapter.name, i2cbus->slave_addr);
} else {
}
break;
}
} else {
}
return (false);
}
}
static bool tfp410_writeb(struct intel_dvo_device *dvo , int addr , uint8_t ch )
{
struct tfp410_priv *tfp ;
struct intel_i2c_chan *i2cbus ;
uint8_t out_buf[2] ;
struct i2c_msg msg ;
int tmp ;
{
tfp = dvo->dev_priv;
i2cbus = dvo->i2c_bus;
msg.addr = i2cbus->slave_addr;
msg.flags = 0;
msg.len = 2;
msg.buf = out_buf;
out_buf[0] = addr;
out_buf[1] = ch;
tmp = i2c_transfer(& i2cbus->adapter, & msg, 1);
if (tmp == 1) {
return (true);
} else {
}
if (! tfp->quiet) {
while (1) {
if (drm_debug) {
printk("<7>[drm:%s] Unable to write register 0x%02x to %s:%d.\n", "tfp410_writeb",
addr, i2cbus->adapter.name, i2cbus->slave_addr);
} else {
}
break;
}
} else {
}
return (false);
}
}
static int tfp410_getid(struct intel_dvo_device *dvo , int addr )
{
uint8_t ch1 ;
uint8_t ch2 ;
bool tmp ;
bool tmp___0 ;
{
tmp = tfp410_readb(dvo, addr + 0, & ch1);
if (tmp) {
tmp___0 = tfp410_readb(dvo, addr + 1, & ch2);
if (tmp___0) {
return ((((int )ch2 << 8) & 65280) | ((int )ch1 & 255));
} else {
}
} else {
}
return (-1);
}
}
static bool tfp410_init(struct intel_dvo_device *dvo , struct intel_i2c_chan *i2cbus )
{
struct tfp410_priv *tfp ;
int id ;
void *tmp ;
{
tmp = kzalloc(sizeof(struct tfp410_priv ), (16U | 64U) | 128U);
tfp = tmp;
if ((unsigned long )tfp == (unsigned long )((void *)0)) {
return (false);
} else {
}
dvo->i2c_bus = i2cbus;
(dvo->i2c_bus)->slave_addr = dvo->slave_addr;
dvo->dev_priv = tfp;
tfp->quiet = true;
id = tfp410_getid(dvo, 0);
if (id != 332) {
while (1) {
if (drm_debug) {
printk("<7>[drm:%s] tfp410 not detected got VID %X: from %s Slave %d.\n",
"tfp410_init", id, i2cbus->adapter.name, i2cbus->slave_addr);
} else {
}
break;
}
goto out;
} else {
}
id = tfp410_getid(dvo, 2);
if (id != 1040) {
while (1) {
if (drm_debug) {
printk("<7>[drm:%s] tfp410 not detected got DID %X: from %s Slave %d.\n",
"tfp410_init", id, i2cbus->adapter.name, i2cbus->slave_addr);
} else {
}
break;
}
goto out;
} else {
}
tfp->quiet = false;
return (true);
out:
kfree(tfp);
return (false);
}
}
static enum drm_connector_status tfp410_detect(struct intel_dvo_device *dvo )
{
enum drm_connector_status ret ;
uint8_t ctl2 ;
bool tmp ;
{
ret = connector_status_disconnected;
tmp = tfp410_readb(dvo, 9, & ctl2);
if (tmp) {
if ((int )ctl2 & (1 << 1)) {
ret = connector_status_connected;
} else {
ret = connector_status_disconnected;
}
} else {
}
return (ret);
}
}
static enum drm_mode_status tfp410_mode_valid(struct intel_dvo_device *dvo , struct drm_display_mode *mode )
{
{
return (MODE_OK);
}
}
static void tfp410_mode_set(struct intel_dvo_device *dvo , struct drm_display_mode *mode ,
struct drm_display_mode *adjusted_mode )
{
{
return;
}
}
static void tfp410_dpms(struct intel_dvo_device *dvo , int mode )
{
uint8_t ctl1 ;
bool tmp ;
{
tmp = tfp410_readb(dvo, 8, & ctl1);
if (tmp) {
} else {
return;
}
if (mode == 0) {
ctl1 = (int )ctl1 | (1 << 0);
} else {
ctl1 = (int )ctl1 & ~ (1 << 0);
}
tfp410_writeb(dvo, 8, ctl1);
return;
}
}
static void tfp410_dump_regs(struct intel_dvo_device *dvo )
{
uint8_t val ;
uint8_t val2 ;
{
tfp410_readb(dvo, 4, & val);
while (1) {
if (drm_debug) {
printk("<7>[drm:%s] TFP410_REV: 0x%02X\n", "tfp410_dump_regs", val);
} else {
}
break;
}
tfp410_readb(dvo, 8, & val);
while (1) {
if (drm_debug) {
printk("<7>[drm:%s] TFP410_CTL1: 0x%02X\n", "tfp410_dump_regs", val);
} else {
}
break;
}
tfp410_readb(dvo, 9, & val);
while (1) {
if (drm_debug) {
printk("<7>[drm:%s] TFP410_CTL2: 0x%02X\n", "tfp410_dump_regs", val);
} else {
}
break;
}
tfp410_readb(dvo, 10, & val);
while (1) {
if (drm_debug) {
printk("<7>[drm:%s] TFP410_CTL3: 0x%02X\n", "tfp410_dump_regs", val);
} else {
}
break;
}
tfp410_readb(dvo, 11, & val);
while (1) {
if (drm_debug) {
printk("<7>[drm:%s] TFP410_USERCFG: 0x%02X\n", "tfp410_dump_regs", val);
} else {
}
break;
}
tfp410_readb(dvo, 50, & val);
while (1) {
if (drm_debug) {
printk("<7>[drm:%s] TFP410_DE_DLY: 0x%02X\n", "tfp410_dump_regs", val);
} else {
}
break;
}
tfp410_readb(dvo, 51, & val);
while (1) {
if (drm_debug) {
printk("<7>[drm:%s] TFP410_DE_CTL: 0x%02X\n", "tfp410_dump_regs", val);
} else {
}
break;
}
tfp410_readb(dvo, 52, & val);
while (1) {
if (drm_debug) {
printk("<7>[drm:%s] TFP410_DE_TOP: 0x%02X\n", "tfp410_dump_regs", val);
} else {
}
break;
}
tfp410_readb(dvo, 54, & val);
tfp410_readb(dvo, 55, & val2);
while (1) {
if (drm_debug) {
printk("<7>[drm:%s] TFP410_DE_CNT: 0x%02X%02X\n", "tfp410_dump_regs", val2,
val);
} else {
}
break;
}
tfp410_readb(dvo, 56, & val);
tfp410_readb(dvo, 57, & val2);
while (1) {
if (drm_debug) {
printk("<7>[drm:%s] TFP410_DE_LIN: 0x%02X%02X\n", "tfp410_dump_regs", val2,
val);
} else {
}
break;
}
tfp410_readb(dvo, 58, & val);
tfp410_readb(dvo, 59, & val2);
while (1) {
if (drm_debug) {
printk("<7>[drm:%s] TFP410_H_RES: 0x%02X%02X\n", "tfp410_dump_regs", val2, val);
} else {
}
break;
}
tfp410_readb(dvo, 60, & val);
tfp410_readb(dvo, 61, & val2);
while (1) {
if (drm_debug) {
printk("<7>[drm:%s] TFP410_V_RES: 0x%02X%02X\n", "tfp410_dump_regs", val2, val);
} else {
}
break;
}
return;
}
}
static void tfp410_save(struct intel_dvo_device *dvo )
{
struct tfp410_priv *tfp ;
bool tmp ;
bool tmp___0 ;
{
tfp = dvo->dev_priv;
tmp = tfp410_readb(dvo, 8, & tfp->saved_reg.ctl1);
if (tmp) {
} else {
return;
}
tmp___0 = tfp410_readb(dvo, 9, & tfp->saved_reg.ctl2);
if (tmp___0) {
} else {
return;
}
return;
}
}
static void tfp410_restore(struct intel_dvo_device *dvo )
{
struct tfp410_priv *tfp ;
{
tfp = dvo->dev_priv;
tfp410_writeb(dvo, 8, (int )tfp->saved_reg.ctl1 & ~ 1);
tfp410_writeb(dvo, 9, tfp->saved_reg.ctl2);
tfp410_writeb(dvo, 8, tfp->saved_reg.ctl1);
return;
}
}
static void tfp410_destroy(struct intel_dvo_device *dvo )
{
struct tfp410_priv *tfp ;
{
tfp = dvo->dev_priv;
if (tfp) {
kfree(tfp);
dvo->dev_priv = (void *)0;
} else {
}
return;
}
}
struct intel_dvo_dev_ops tfp410_ops =
{& tfp410_init, 0, & tfp410_dpms, & tfp410_save, & tfp410_restore, & tfp410_mode_valid,
0, 0, 0, & tfp410_mode_set, & tfp410_detect, 0, & tfp410_destroy, & tfp410_dump_regs};
void ldv_main22_sequence_infinite_withcheck_stateful(void)
{
struct intel_dvo_device *var_group1 ;
struct intel_i2c_chan *var_group2 ;
struct drm_display_mode *var_group3 ;
struct drm_display_mode *var_tfp410_mode_set_6_p2 ;
int var_tfp410_dpms_7_p1 ;
int tmp ;
int tmp___0 ;
{
LDV_IN_INTERRUPT = 1;
ldv_initialize();
while (1) {
tmp___0 = nondet_int();
if (tmp___0) {
} else {
break;
}
tmp = nondet_int();
switch (tmp) {
case 0:
ldv_handler_precall();
tfp410_init(var_group1, var_group2);
break;
case 1:
ldv_handler_precall();
tfp410_detect(var_group1);
break;
case 2:
ldv_handler_precall();
tfp410_mode_valid(var_group1, var_group3);
break;
case 3:
ldv_handler_precall();
tfp410_mode_set(var_group1, var_group3, var_tfp410_mode_set_6_p2);
break;
case 4:
ldv_handler_precall();
tfp410_dpms(var_group1, var_tfp410_dpms_7_p1);
break;
case 5:
ldv_handler_precall();
tfp410_dump_regs(var_group1);
break;
case 6:
ldv_handler_precall();
tfp410_save(var_group1);
break;
case 7:
ldv_handler_precall();
tfp410_restore(var_group1);
break;
case 8:
ldv_handler_precall();
tfp410_destroy(var_group1);
break;
default:
break;
}
}
ldv_check_final_state();
return;
}
}
static bool sil164_readb(struct intel_dvo_device *dvo , int addr , uint8_t *ch )
{
struct sil164_priv *sil ;
struct intel_i2c_chan *i2cbus ;
u8 out_buf[2] ;
u8 in_buf[2] ;
struct i2c_msg msgs[2] ;
int tmp ;
{
sil = dvo->dev_priv;
i2cbus = dvo->i2c_bus;
msgs[0].addr = i2cbus->slave_addr;
msgs[0].flags = 0;
msgs[0].len = 1;
msgs[0].buf = out_buf;
msgs[1].addr = i2cbus->slave_addr;
msgs[1].flags = 1;
msgs[1].len = 1;
msgs[1].buf = in_buf;
out_buf[0] = addr;
out_buf[1] = 0;
tmp = i2c_transfer(& i2cbus->adapter, msgs, 2);
if (tmp == 2) {
*ch = in_buf[0];
return (true);
} else {
}
if (! sil->quiet) {
while (1) {
if (drm_debug) {
printk("<7>[drm:%s] Unable to read register 0x%02x from %s:%02x.\n", "sil164_readb",
addr, i2cbus->adapter.name, i2cbus->slave_addr);
} else {
}
break;
}
} else {
}
return (false);
}
}
static bool sil164_writeb(struct intel_dvo_device *dvo , int addr , uint8_t ch )
{
struct sil164_priv *sil ;
struct intel_i2c_chan *i2cbus ;
uint8_t out_buf[2] ;
struct i2c_msg msg ;
int tmp ;
{
sil = dvo->dev_priv;
i2cbus = dvo->i2c_bus;
msg.addr = i2cbus->slave_addr;
msg.flags = 0;
msg.len = 2;
msg.buf = out_buf;
out_buf[0] = addr;
out_buf[1] = ch;
tmp = i2c_transfer(& i2cbus->adapter, & msg, 1);
if (tmp == 1) {
return (true);
} else {
}
if (! sil->quiet) {
while (1) {
if (drm_debug) {
printk("<7>[drm:%s] Unable to write register 0x%02x to %s:%d.\n", "sil164_writeb",
addr, i2cbus->adapter.name, i2cbus->slave_addr);
} else {
}
break;
}
} else {
}
return (false);
}
}
static bool sil164_init(struct intel_dvo_device *dvo , struct intel_i2c_chan *i2cbus )
{
struct sil164_priv *sil ;
unsigned char ch ;
void *tmp ;
bool tmp___0 ;
bool tmp___1 ;
{
tmp = kzalloc(sizeof(struct sil164_priv ), (16U | 64U) | 128U);
sil = tmp;
if ((unsigned long )sil == (unsigned long )((void *)0)) {
return (false);
} else {
}
dvo->i2c_bus = i2cbus;
(dvo->i2c_bus)->slave_addr = dvo->slave_addr;
dvo->dev_priv = sil;
sil->quiet = true;
tmp___0 = sil164_readb(dvo, 0, & ch);
if (tmp___0) {
} else {
goto out;
}
if ((int )ch != (1 & 255)) {
while (1) {
if (drm_debug) {
printk("<7>[drm:%s] sil164 not detected got %d: from %s Slave %d.\n", "sil164_init",
ch, i2cbus->adapter.name, i2cbus->slave_addr);
} else {
}
break;
}
goto out;
} else {
}
tmp___1 = sil164_readb(dvo, 2, & ch);
if (tmp___1) {
} else {
goto out;
}
if ((int )ch != (6 & 255)) {
while (1) {
if (drm_debug) {
printk("<7>[drm:%s] sil164 not detected got %d: from %s Slave %d.\n", "sil164_init",
ch, i2cbus->adapter.name, i2cbus->slave_addr);
} else {
}
break;
}
goto out;
} else {
}
sil->quiet = false;
while (1) {
if (drm_debug) {
printk("<7>[drm:%s] init sil164 dvo controller successfully!\n", "sil164_init");
} else {
}
break;
}
return (true);
out:
kfree(sil);
return (false);
}
}
static enum drm_connector_status sil164_detect(struct intel_dvo_device *dvo )
{
uint8_t reg9 ;
{
sil164_readb(dvo, 9, & reg9);
if ((int )reg9 & (1 << 1)) {
return (connector_status_connected);
} else {
return (connector_status_disconnected);
}
}
}
static enum drm_mode_status sil164_mode_valid(struct intel_dvo_device *dvo , struct drm_display_mode *mode )
{
{
return (MODE_OK);
}
}
static void sil164_mode_set(struct intel_dvo_device *dvo , struct drm_display_mode *mode ,
struct drm_display_mode *adjusted_mode )
{
{
return;
}
}
static void sil164_dpms(struct intel_dvo_device *dvo , int mode )
{
int ret ;
unsigned char ch ;
bool tmp ;
{
tmp = sil164_readb(dvo, 8, & ch);
ret = tmp;
if (ret == false) {
return;
} else {
}
if (mode == 0) {
ch = (int )ch | (1 << 0);
} else {
ch = (int )ch & ~ (1 << 0);
}
sil164_writeb(dvo, 8, ch);
return;
}
}
static void sil164_dump_regs(struct intel_dvo_device *dvo )
{
uint8_t val ;
{
sil164_readb(dvo, 6, & val);
while (1) {
if (drm_debug) {
printk("<7>[drm:%s] SIL164_FREQ_LO: 0x%02x\n", "sil164_dump_regs", val);
} else {
}
break;
}
sil164_readb(dvo, 7, & val);
while (1) {
if (drm_debug) {
printk("<7>[drm:%s] SIL164_FREQ_HI: 0x%02x\n", "sil164_dump_regs", val);
} else {
}
break;
}
sil164_readb(dvo, 8, & val);
while (1) {
if (drm_debug) {
printk("<7>[drm:%s] SIL164_REG8: 0x%02x\n", "sil164_dump_regs", val);
} else {
}
break;
}
sil164_readb(dvo, 9, & val);
while (1) {
if (drm_debug) {
printk("<7>[drm:%s] SIL164_REG9: 0x%02x\n", "sil164_dump_regs", val);
} else {
}
break;
}
sil164_readb(dvo, 12, & val);
while (1) {
if (drm_debug) {
printk("<7>[drm:%s] SIL164_REGC: 0x%02x\n", "sil164_dump_regs", val);
} else {
}
break;
}
return;
}
}
static void sil164_save(struct intel_dvo_device *dvo )
{
struct sil164_priv *sil ;
bool tmp ;
bool tmp___0 ;
bool tmp___1 ;
{
sil = dvo->dev_priv;
tmp = sil164_readb(dvo, 8, & sil->save_regs.reg8);
if (tmp) {
} else {
return;
}
tmp___0 = sil164_readb(dvo, 9, & sil->save_regs.reg9);
if (tmp___0) {
} else {
return;
}
tmp___1 = sil164_readb(dvo, 12, & sil->save_regs.regc);
if (tmp___1) {
} else {
return;
}
return;
}
}
static void sil164_restore(struct intel_dvo_device *dvo )
{
struct sil164_priv *sil ;
{
sil = dvo->dev_priv;
sil164_writeb(dvo, 8, (int )sil->save_regs.reg8 & ~ 1);
sil164_writeb(dvo, 9, sil->save_regs.reg9);
sil164_writeb(dvo, 12, sil->save_regs.regc);
sil164_writeb(dvo, 8, sil->save_regs.reg8);
return;
}
}
static void sil164_destroy(struct intel_dvo_device *dvo )
{
struct sil164_priv *sil ;
{
sil = dvo->dev_priv;
if (sil) {
kfree(sil);
dvo->dev_priv = (void *)0;
} else {
}
return;
}
}
struct intel_dvo_dev_ops sil164_ops =
{& sil164_init, 0, & sil164_dpms, & sil164_save, & sil164_restore, & sil164_mode_valid,
0, 0, 0, & sil164_mode_set, & sil164_detect, 0, & sil164_destroy, & sil164_dump_regs};
void ldv_main23_sequence_infinite_withcheck_stateful(void)
{
struct intel_dvo_device *var_group1 ;
struct intel_i2c_chan *var_group2 ;
struct drm_display_mode *var_group3 ;
struct drm_display_mode *var_sil164_mode_set_5_p2 ;
int var_sil164_dpms_6_p1 ;
int tmp ;
int tmp___0 ;
{
LDV_IN_INTERRUPT = 1;
ldv_initialize();
while (1) {
tmp___0 = nondet_int();
if (tmp___0) {
} else {
break;
}
tmp = nondet_int();
switch (tmp) {
case 0:
ldv_handler_precall();
sil164_init(var_group1, var_group2);
break;
case 1:
ldv_handler_precall();
sil164_detect(var_group1);
break;
case 2:
ldv_handler_precall();
sil164_mode_valid(var_group1, var_group3);
break;
case 3:
ldv_handler_precall();
sil164_mode_set(var_group1, var_group3, var_sil164_mode_set_5_p2);
break;
case 4:
ldv_handler_precall();
sil164_dpms(var_group1, var_sil164_dpms_6_p1);
break;
case 5:
ldv_handler_precall();
sil164_dump_regs(var_group1);
break;
case 6:
ldv_handler_precall();
sil164_save(var_group1);
break;
case 7:
ldv_handler_precall();
sil164_restore(var_group1);
break;
case 8:
ldv_handler_precall();
sil164_destroy(var_group1);
break;
default:
break;
}
}
ldv_check_final_state();
return;
}
}
extern int register_acpi_notifier(struct notifier_block * ) ;
extern int unregister_acpi_notifier(struct notifier_block * ) ;
extern int pci_bus_read_config_dword(struct pci_bus *bus , unsigned int devfn , int where ,
u32 *val ) ;
extern int pci_bus_write_config_dword(struct pci_bus *bus , unsigned int devfn , int where ,
u32 val ) ;
__inline static int pci_read_config_dword(struct pci_dev *dev , int where , u32 *val )
{
int tmp ;
{
tmp = pci_bus_read_config_dword(dev->bus, dev->devfn, where, val);
return (tmp);
}
}
__inline static int pci_write_config_dword(struct pci_dev *dev , int where , u32 val )
{
int tmp ;
{
tmp = pci_bus_write_config_dword(dev->bus, dev->devfn, where, val);
return (tmp);
}
}
static u32 asle_set_backlight(struct drm_device *dev , u32 bclp )
{
struct drm_i915_private *dev_priv ;
struct opregion_asle *asle ;
u32 blc_pwm_ctl ;
u32 blc_pwm_ctl2 ;
{
dev_priv = dev->dev_private;
asle = dev_priv->opregion.asle;
if (! (bclp & (unsigned int )(1 << 31))) {
return (2 << 12);
} else {
}
bclp = bclp & (unsigned int )(~ (1 << 31));
if (bclp < (u32 )0 || bclp > (u32 )255) {
return (2 << 12);
} else {
}
blc_pwm_ctl = readl(dev_priv->regs + 397908);
blc_pwm_ctl = blc_pwm_ctl & (unsigned int )(~ 65535);
blc_pwm_ctl2 = readl(dev_priv->regs + 397904);
if (blc_pwm_ctl2 & (unsigned int )(1 << 30)) {
pci_write_config_dword(dev->pdev, 244, bclp);
} else {
writel(blc_pwm_ctl | (bclp * (u32 )257 - (u32 )1), dev_priv->regs + 397908);
}
asle->cblv = (bclp * (u32 )100) / (u32 )255 | (unsigned int )(1 << 31);
return (0);
}
}
static u32 asle_set_als_illum(struct drm_device *dev , u32 alsi )
{
{
return (0);
}
}
static u32 asle_set_pwm_freq(struct drm_device *dev , u32 pfmb )
{
struct drm_i915_private *dev_priv ;
u32 blc_pwm_ctl ;
unsigned int tmp ;
u32 pwm ;
{
dev_priv = dev->dev_private;
if (pfmb & (unsigned int )(1 << 31)) {
tmp = readl(dev_priv->regs + 397908);
blc_pwm_ctl = tmp;
pwm = pfmb & 2147483136U;
blc_pwm_ctl = blc_pwm_ctl & 65535U;
pwm = pwm >> 9;
} else {
}
return (0);
}
}
static u32 asle_set_pfit(struct drm_device *dev , u32 pfit )
{
{
if (! (pfit & (unsigned int )(1 << 31))) {
return (2 << 14);
} else {
}
return (0);
}
}
void opregion_asle_intr(struct drm_device *dev )
{
struct drm_i915_private *dev_priv ;
struct opregion_asle *asle ;
u32 asle_stat ;
u32 asle_req ;
u32 tmp ;
u32 tmp___0 ;
u32 tmp___1 ;
u32 tmp___2 ;
{
dev_priv = dev->dev_private;
asle = dev_priv->opregion.asle;
asle_stat = 0;
if (! asle) {
return;
} else {
}
asle_req = asle->aslc & 15U;
if (! asle_req) {
while (1) {
if (drm_debug) {
printk("<7>[drm:%s] non asle set request??\n", "opregion_asle_intr");
} else {
}
break;
}
return;
} else {
}
if (asle_req & (unsigned int )(1 << 0)) {
tmp = asle_set_als_illum(dev, asle->alsi);
asle_stat = asle_stat | tmp;
} else {
}
if (asle_req & (unsigned int )(1 << 1)) {
tmp___0 = asle_set_backlight(dev, asle->bclp);
asle_stat = asle_stat | tmp___0;
} else {
}
if (asle_req & (unsigned int )(1 << 2)) {
tmp___1 = asle_set_pfit(dev, asle->pfit);
asle_stat = asle_stat | tmp___1;
} else {
}
if (asle_req & (unsigned int )(1 << 3)) {
tmp___2 = asle_set_pwm_freq(dev, asle->pfmb);
asle_stat = asle_stat | tmp___2;
} else {
}
asle->aslc = asle_stat;
return;
}
}
void opregion_enable_asle(struct drm_device *dev )
{
struct drm_i915_private *dev_priv ;
struct opregion_asle *asle ;
unsigned long irqflags ;
{
dev_priv = dev->dev_private;
asle = dev_priv->opregion.asle;
if (asle) {
if (((((dev->pci_device == 13687 || dev->pci_device == 13698) || dev->pci_device == 9618) || (dev->pci_device == 10146 || dev->pci_device == 10158)) || dev->pci_device == 10754) || dev->pci_device == 10818) {
while (1) {
irqflags = _spin_lock_irqsave(& dev_priv->user_irq_lock);
break;
}
i915_enable_pipestat(dev_priv, 1, 1UL << 22);
while (1) {
_spin_unlock_irqrestore(& dev_priv->user_irq_lock, irqflags);
break;
}
} else {
}
asle->tche = (((1 << 0) | (1 << 1)) | (1 << 2)) | (1 << 3);
asle->ardy = 1;
} else {
}
return;
}
}
static struct intel_opregion *system_opregion ;
static int intel_opregion_video_event(struct notifier_block *nb , unsigned long val ,
void *data )
{
struct opregion_acpi *acpi ;
{
if (! system_opregion) {
return (0);
} else {
}
acpi = system_opregion->acpi;
acpi->csts = 0;
return (1);
}
}
static struct notifier_block intel_opregion_notifier = {& intel_opregion_video_event, 0, 0};
int intel_opregion_init(struct drm_device *dev )
{
struct drm_i915_private *dev_priv ;
struct intel_opregion *opregion ;
void *base ;
u32 asls ;
u32 mboxes ;
int err ;
int tmp ;
{
dev_priv = dev->dev_private;
opregion = & dev_priv->opregion;
err = 0;
pci_read_config_dword(dev->pdev, 252, & asls);
while (1) {
if (drm_debug) {
printk("<7>[drm:%s] graphic opregion physical addr: 0x%x\n", "intel_opregion_init",
asls);
} else {
}
break;
}
if (asls == (u32 )0) {
while (1) {
if (drm_debug) {
printk("<7>[drm:%s] ACPI OpRegion not supported!\n", "intel_opregion_init");
} else {
}
break;
}
return (-524);
} else {
}
base = ioremap(asls, 8 * 1024);
if (! base) {
return (-12);
} else {
}
opregion->header = base;
tmp = memcmp((opregion->header)->signature, "IntelGraphicsMem", 16);
if (tmp) {
while (1) {
if (drm_debug) {
printk("<7>[drm:%s] opregion signature mismatch\n", "intel_opregion_init");
} else {
}
break;
}
err = -22;
goto err_out;
} else {
}
mboxes = (opregion->header)->mboxes;
if (mboxes & (unsigned int )(1 << 0)) {
while (1) {
if (drm_debug) {
printk("<7>[drm:%s] Public ACPI methods supported\n", "intel_opregion_init");
} else {
}
break;
}
opregion->acpi = base + 256;
} else {
while (1) {
if (drm_debug) {
printk("<7>[drm:%s] Public ACPI methods not supported\n", "intel_opregion_init");
} else {
}
break;
}
err = -524;
goto err_out;
}
opregion->enabled = 1;
if (mboxes & (unsigned int )(1 << 1)) {
while (1) {
if (drm_debug) {
printk("<7>[drm:%s] SWSCI supported\n", "intel_opregion_init");
} else {
}
break;
}
opregion->swsci = base + 512;
} else {
}
if (mboxes & (unsigned int )(1 << 2)) {
while (1) {
if (drm_debug) {
printk("<7>[drm:%s] ASLE supported\n", "intel_opregion_init");
} else {
}
break;
}
opregion->asle = base + 768;
} else {
}
(opregion->acpi)->csts = 0;
(opregion->acpi)->drdy = 1;
system_opregion = opregion;
register_acpi_notifier(& intel_opregion_notifier);
return (0);
err_out:
iounmap(opregion->header);
opregion->header = (void *)0;
return (err);
}
}
void intel_opregion_free(struct drm_device *dev )
{
struct drm_i915_private *dev_priv ;
struct intel_opregion *opregion ;
{
dev_priv = dev->dev_private;
opregion = & dev_priv->opregion;
if (! opregion->enabled) {
return;
} else {
}
(opregion->acpi)->drdy = 0;
system_opregion = (void *)0;
unregister_acpi_notifier(& intel_opregion_notifier);
iounmap(opregion->header);
opregion->header = (void *)0;
opregion->acpi = (void *)0;
opregion->swsci = (void *)0;
opregion->asle = (void *)0;
opregion->enabled = 0;
return;
}
}
void ldv_main24_sequence_infinite_withcheck_stateful(void)
{
struct notifier_block *var_group1 ;
unsigned long var_intel_opregion_video_event_6_p1 ;
void *var_intel_opregion_video_event_6_p2 ;
int tmp ;
int tmp___0 ;
{
LDV_IN_INTERRUPT = 1;
ldv_initialize();
while (1) {
tmp___0 = nondet_int();
if (tmp___0) {
} else {
break;
}
tmp = nondet_int();
switch (tmp) {
case 0:
ldv_handler_precall();
intel_opregion_video_event(var_group1, var_intel_opregion_video_event_6_p1, var_intel_opregion_video_event_6_p2);
break;
default:
break;
}
}
ldv_check_final_state();
return;
}
}
__inline static void *compat_alloc_user_space(long len )
{
struct pt_regs *regs ;
struct task_struct *tmp ;
{
tmp = get_current();
regs = (struct pt_regs *)tmp->thread.sp0 - 1;
return ((void *)regs->sp - len);
}
}
extern unsigned int __invalid_size_argument_for_IOC ;
extern void lock_kernel(void) __attribute__((__section__(".spinlock.text"))) ;
extern void unlock_kernel(void) __attribute__((__section__(".spinlock.text"))) ;
extern void __put_user_bad(void) ;
extern long drm_compat_ioctl(struct file *filp , unsigned int cmd , unsigned long arg ) ;
static int compat_i915_batchbuffer(struct file *file , unsigned int cmd , unsigned long arg )
{
drm_i915_batchbuffer32_t batchbuffer32 ;
drm_i915_batchbuffer_t *batchbuffer ;
unsigned long tmp ;
void *tmp___0 ;
unsigned long flag ;
unsigned long roksum ;
struct thread_info *tmp___1 ;
int tmp___2 ;
long tmp___3 ;
long __pu_err ;
long __pu_err___0 ;
long __pu_err___1 ;
long __pu_err___2 ;
long __pu_err___3 ;
long __pu_err___4 ;
int tmp___4 ;
{
tmp = copy_from_user(& batchbuffer32, (void *)arg, sizeof(batchbuffer32));
if (tmp) {
return (-14);
} else {
}
tmp___0 = compat_alloc_user_space(sizeof(*batchbuffer));
batchbuffer = tmp___0;
tmp___1 = current_thread_info();
__asm__ ("add %3,%1 ; sbb %0,%0 ; cmp %1,%4 ; sbb $0,%0": "=&r" (flag), "=r" (roksum): "1" (batchbuffer),
"g" ((long )sizeof(*batchbuffer)), "rm" (tmp___1->addr_limit.seg));
if (flag == 0UL) {
tmp___2 = 1;
} else {
tmp___2 = 0;
}
tmp___3 = ldv__builtin_expect(tmp___2, 1);
if (tmp___3) {
while (1) {
__pu_err = 0;
switch (sizeof(batchbuffer->start)) {
case 1UL:
__asm__ volatile ("1:\tmov"
"b"
" %"
"b"
"1,%2\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3:\tmov %3,%0\n"
"\tjmp 2b\n"
".previous\n"
" .section __ex_table,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"1b"
","
"3b"
"\n"
" .previous\n": "=r" (__pu_err): "iq" (batchbuffer32.start),
"m" (*((struct __large_struct *)(& batchbuffer->start))),
"i" (-14), "0" (__pu_err));
break;
case 2UL:
__asm__ volatile ("1:\tmov"
"w"
" %"
"w"
"1,%2\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3:\tmov %3,%0\n"
"\tjmp 2b\n"
".previous\n"
" .section __ex_table,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"1b"
","
"3b"
"\n"
" .previous\n": "=r" (__pu_err): "ir" (batchbuffer32.start),
"m" (*((struct __large_struct *)(& batchbuffer->start))),
"i" (-14), "0" (__pu_err));
break;
case 4UL:
__asm__ volatile ("1:\tmov"
"l"
" %"
"k"
"1,%2\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3:\tmov %3,%0\n"
"\tjmp 2b\n"
".previous\n"
" .section __ex_table,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"1b"
","
"3b"
"\n"
" .previous\n": "=r" (__pu_err): "ir" (batchbuffer32.start),
"m" (*((struct __large_struct *)(& batchbuffer->start))),
"i" (-14), "0" (__pu_err));
break;
case 8UL:
__asm__ volatile ("1:\tmov"
"q"
" %"
""
"1,%2\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3:\tmov %3,%0\n"
"\tjmp 2b\n"
".previous\n"
" .section __ex_table,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"1b"
","
"3b"
"\n"
" .previous\n": "=r" (__pu_err): "Zr" (batchbuffer32.start),
"m" (*((struct __large_struct *)(& batchbuffer->start))),
"i" (-14), "0" (__pu_err));
break;
default:
__put_user_bad();
}
break;
}
if (__pu_err) {
return (-14);
} else {
while (1) {
__pu_err___0 = 0;
switch (sizeof(batchbuffer->used)) {
case 1UL:
__asm__ volatile ("1:\tmov"
"b"
" %"
"b"
"1,%2\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3:\tmov %3,%0\n"
"\tjmp 2b\n"
".previous\n"
" .section __ex_table,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"1b"
","
"3b"
"\n"
" .previous\n": "=r" (__pu_err___0): "iq" (batchbuffer32.used),
"m" (*((struct __large_struct *)(& batchbuffer->used))),
"i" (-14), "0" (__pu_err___0));
break;
case 2UL:
__asm__ volatile ("1:\tmov"
"w"
" %"
"w"
"1,%2\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3:\tmov %3,%0\n"
"\tjmp 2b\n"
".previous\n"
" .section __ex_table,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"1b"
","
"3b"
"\n"
" .previous\n": "=r" (__pu_err___0): "ir" (batchbuffer32.used),
"m" (*((struct __large_struct *)(& batchbuffer->used))),
"i" (-14), "0" (__pu_err___0));
break;
case 4UL:
__asm__ volatile ("1:\tmov"
"l"
" %"
"k"
"1,%2\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3:\tmov %3,%0\n"
"\tjmp 2b\n"
".previous\n"
" .section __ex_table,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"1b"
","
"3b"
"\n"
" .previous\n": "=r" (__pu_err___0): "ir" (batchbuffer32.used),
"m" (*((struct __large_struct *)(& batchbuffer->used))),
"i" (-14), "0" (__pu_err___0));
break;
case 8UL:
__asm__ volatile ("1:\tmov"
"q"
" %"
""
"1,%2\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3:\tmov %3,%0\n"
"\tjmp 2b\n"
".previous\n"
" .section __ex_table,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"1b"
","
"3b"
"\n"
" .previous\n": "=r" (__pu_err___0): "Zr" (batchbuffer32.used),
"m" (*((struct __large_struct *)(& batchbuffer->used))),
"i" (-14), "0" (__pu_err___0));
break;
default:
__put_user_bad();
}
break;
}
if (__pu_err___0) {
return (-14);
} else {
while (1) {
__pu_err___1 = 0;
switch (sizeof(batchbuffer->DR1)) {
case 1UL:
__asm__ volatile ("1:\tmov"
"b"
" %"
"b"
"1,%2\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3:\tmov %3,%0\n"
"\tjmp 2b\n"
".previous\n"
" .section __ex_table,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"1b"
","
"3b"
"\n"
" .previous\n": "=r" (__pu_err___1): "iq" (batchbuffer32.DR1),
"m" (*((struct __large_struct *)(& batchbuffer->DR1))),
"i" (-14), "0" (__pu_err___1));
break;
case 2UL:
__asm__ volatile ("1:\tmov"
"w"
" %"
"w"
"1,%2\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3:\tmov %3,%0\n"
"\tjmp 2b\n"
".previous\n"
" .section __ex_table,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"1b"
","
"3b"
"\n"
" .previous\n": "=r" (__pu_err___1): "ir" (batchbuffer32.DR1),
"m" (*((struct __large_struct *)(& batchbuffer->DR1))),
"i" (-14), "0" (__pu_err___1));
break;
case 4UL:
__asm__ volatile ("1:\tmov"
"l"
" %"
"k"
"1,%2\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3:\tmov %3,%0\n"
"\tjmp 2b\n"
".previous\n"
" .section __ex_table,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"1b"
","
"3b"
"\n"
" .previous\n": "=r" (__pu_err___1): "ir" (batchbuffer32.DR1),
"m" (*((struct __large_struct *)(& batchbuffer->DR1))),
"i" (-14), "0" (__pu_err___1));
break;
case 8UL:
__asm__ volatile ("1:\tmov"
"q"
" %"
""
"1,%2\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3:\tmov %3,%0\n"
"\tjmp 2b\n"
".previous\n"
" .section __ex_table,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"1b"
","
"3b"
"\n"
" .previous\n": "=r" (__pu_err___1): "Zr" (batchbuffer32.DR1),
"m" (*((struct __large_struct *)(& batchbuffer->DR1))),
"i" (-14), "0" (__pu_err___1));
break;
default:
__put_user_bad();
}
break;
}
if (__pu_err___1) {
return (-14);
} else {
while (1) {
__pu_err___2 = 0;
switch (sizeof(batchbuffer->DR4)) {
case 1UL:
__asm__ volatile ("1:\tmov"
"b"
" %"
"b"
"1,%2\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3:\tmov %3,%0\n"
"\tjmp 2b\n"
".previous\n"
" .section __ex_table,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"1b"
","
"3b"
"\n"
" .previous\n": "=r" (__pu_err___2): "iq" (batchbuffer32.DR4),
"m" (*((struct __large_struct *)(& batchbuffer->DR4))),
"i" (-14), "0" (__pu_err___2));
break;
case 2UL:
__asm__ volatile ("1:\tmov"
"w"
" %"
"w"
"1,%2\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3:\tmov %3,%0\n"
"\tjmp 2b\n"
".previous\n"
" .section __ex_table,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"1b"
","
"3b"
"\n"
" .previous\n": "=r" (__pu_err___2): "ir" (batchbuffer32.DR4),
"m" (*((struct __large_struct *)(& batchbuffer->DR4))),
"i" (-14), "0" (__pu_err___2));
break;
case 4UL:
__asm__ volatile ("1:\tmov"
"l"
" %"
"k"
"1,%2\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3:\tmov %3,%0\n"
"\tjmp 2b\n"
".previous\n"
" .section __ex_table,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"1b"
","
"3b"
"\n"
" .previous\n": "=r" (__pu_err___2): "ir" (batchbuffer32.DR4),
"m" (*((struct __large_struct *)(& batchbuffer->DR4))),
"i" (-14), "0" (__pu_err___2));
break;
case 8UL:
__asm__ volatile ("1:\tmov"
"q"
" %"
""
"1,%2\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3:\tmov %3,%0\n"
"\tjmp 2b\n"
".previous\n"
" .section __ex_table,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"1b"
","
"3b"
"\n"
" .previous\n": "=r" (__pu_err___2): "Zr" (batchbuffer32.DR4),
"m" (*((struct __large_struct *)(& batchbuffer->DR4))),
"i" (-14), "0" (__pu_err___2));
break;
default:
__put_user_bad();
}
break;
}
if (__pu_err___2) {
return (-14);
} else {
while (1) {
__pu_err___3 = 0;
switch (sizeof(batchbuffer->num_cliprects)) {
case 1UL:
__asm__ volatile ("1:\tmov"
"b"
" %"
"b"
"1,%2\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3:\tmov %3,%0\n"
"\tjmp 2b\n"
".previous\n"
" .section __ex_table,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"1b"
","
"3b"
"\n"
" .previous\n": "=r" (__pu_err___3): "iq" (batchbuffer32.num_cliprects),
"m" (*((struct __large_struct *)(& batchbuffer->num_cliprects))),
"i" (-14), "0" (__pu_err___3));
break;
case 2UL:
__asm__ volatile ("1:\tmov"
"w"
" %"
"w"
"1,%2\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3:\tmov %3,%0\n"
"\tjmp 2b\n"
".previous\n"
" .section __ex_table,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"1b"
","
"3b"
"\n"
" .previous\n": "=r" (__pu_err___3): "ir" (batchbuffer32.num_cliprects),
"m" (*((struct __large_struct *)(& batchbuffer->num_cliprects))),
"i" (-14), "0" (__pu_err___3));
break;
case 4UL:
__asm__ volatile ("1:\tmov"
"l"
" %"
"k"
"1,%2\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3:\tmov %3,%0\n"
"\tjmp 2b\n"
".previous\n"
" .section __ex_table,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"1b"
","
"3b"
"\n"
" .previous\n": "=r" (__pu_err___3): "ir" (batchbuffer32.num_cliprects),
"m" (*((struct __large_struct *)(& batchbuffer->num_cliprects))),
"i" (-14), "0" (__pu_err___3));
break;
case 8UL:
__asm__ volatile ("1:\tmov"
"q"
" %"
""
"1,%2\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3:\tmov %3,%0\n"
"\tjmp 2b\n"
".previous\n"
" .section __ex_table,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"1b"
","
"3b"
"\n"
" .previous\n": "=r" (__pu_err___3): "Zr" (batchbuffer32.num_cliprects),
"m" (*((struct __large_struct *)(& batchbuffer->num_cliprects))),
"i" (-14), "0" (__pu_err___3));
break;
default:
__put_user_bad();
}
break;
}
if (__pu_err___3) {
return (-14);
} else {
while (1) {
__pu_err___4 = 0;
switch (sizeof(batchbuffer->cliprects)) {
case 1UL:
__asm__ volatile ("1:\tmov"
"b"
" %"
"b"
"1,%2\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3:\tmov %3,%0\n"
"\tjmp 2b\n"
".previous\n"
" .section __ex_table,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"1b"
","
"3b"
"\n"
" .previous\n": "=r" (__pu_err___4): "iq" ((struct drm_clip_rect *)((int *)((unsigned long )batchbuffer32.cliprects))),
"m" (*((struct __large_struct *)(& batchbuffer->cliprects))),
"i" (-14), "0" (__pu_err___4));
break;
case 2UL:
__asm__ volatile ("1:\tmov"
"w"
" %"
"w"
"1,%2\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3:\tmov %3,%0\n"
"\tjmp 2b\n"
".previous\n"
" .section __ex_table,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"1b"
","
"3b"
"\n"
" .previous\n": "=r" (__pu_err___4): "ir" ((struct drm_clip_rect *)((int *)((unsigned long )batchbuffer32.cliprects))),
"m" (*((struct __large_struct *)(& batchbuffer->cliprects))),
"i" (-14), "0" (__pu_err___4));
break;
case 4UL:
__asm__ volatile ("1:\tmov"
"l"
" %"
"k"
"1,%2\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3:\tmov %3,%0\n"
"\tjmp 2b\n"
".previous\n"
" .section __ex_table,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"1b"
","
"3b"
"\n"
" .previous\n": "=r" (__pu_err___4): "ir" ((struct drm_clip_rect *)((int *)((unsigned long )batchbuffer32.cliprects))),
"m" (*((struct __large_struct *)(& batchbuffer->cliprects))),
"i" (-14), "0" (__pu_err___4));
break;
case 8UL:
__asm__ volatile ("1:\tmov"
"q"
" %"
""
"1,%2\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3:\tmov %3,%0\n"
"\tjmp 2b\n"
".previous\n"
" .section __ex_table,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"1b"
","
"3b"
"\n"
" .previous\n": "=r" (__pu_err___4): "Zr" ((struct drm_clip_rect *)((int *)((unsigned long )batchbuffer32.cliprects))),
"m" (*((struct __large_struct *)(& batchbuffer->cliprects))),
"i" (-14), "0" (__pu_err___4));
break;
default:
__put_user_bad();
}
break;
}
if (__pu_err___4) {
return (-14);
} else {
}
}
}
}
}
}
} else {
return (-14);
}
tmp___4 = drm_ioctl((file->f_path.dentry)->d_inode, file, (unsigned long )(((1U << (((0 + 8) + 8) + 14)) | (unsigned int )('d' << (0 + 8))) | (unsigned int )((64 + 3) << 0)) | ((sizeof(drm_i915_batchbuffer_t ) == sizeof(drm_i915_batchbuffer_t [1]) && sizeof(drm_i915_batchbuffer_t ) < (unsigned long )(1 << 14) ? sizeof(drm_i915_batchbuffer_t ) : __invalid_size_argument_for_IOC) << ((0 + 8) + 8)),
(unsigned long )batchbuffer);
return (tmp___4);
}
}
static int compat_i915_cmdbuffer(struct file *file , unsigned int cmd , unsigned long arg )
{
drm_i915_cmdbuffer32_t cmdbuffer32 ;
drm_i915_cmdbuffer_t *cmdbuffer ;
unsigned long tmp ;
void *tmp___0 ;
unsigned long flag ;
unsigned long roksum ;
struct thread_info *tmp___1 ;
int tmp___2 ;
long tmp___3 ;
long __pu_err ;
long __pu_err___0 ;
long __pu_err___1 ;
long __pu_err___2 ;
long __pu_err___3 ;
long __pu_err___4 ;
int tmp___4 ;
{
tmp = copy_from_user(& cmdbuffer32, (void *)arg, sizeof(cmdbuffer32));
if (tmp) {
return (-14);
} else {
}
tmp___0 = compat_alloc_user_space(sizeof(*cmdbuffer));
cmdbuffer = tmp___0;
tmp___1 = current_thread_info();
__asm__ ("add %3,%1 ; sbb %0,%0 ; cmp %1,%4 ; sbb $0,%0": "=&r" (flag), "=r" (roksum): "1" (cmdbuffer),
"g" ((long )sizeof(*cmdbuffer)), "rm" (tmp___1->addr_limit.seg));
if (flag == 0UL) {
tmp___2 = 1;
} else {
tmp___2 = 0;
}
tmp___3 = ldv__builtin_expect(tmp___2, 1);
if (tmp___3) {
while (1) {
__pu_err = 0;
switch (sizeof(cmdbuffer->buf)) {
case 1UL:
__asm__ volatile ("1:\tmov"
"b"
" %"
"b"
"1,%2\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3:\tmov %3,%0\n"
"\tjmp 2b\n"
".previous\n"
" .section __ex_table,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"1b"
","
"3b"
"\n"
" .previous\n": "=r" (__pu_err): "iq" ((char *)((int *)((unsigned long )cmdbuffer32.buf))),
"m" (*((struct __large_struct *)(& cmdbuffer->buf))), "i" (-14),
"0" (__pu_err));
break;
case 2UL:
__asm__ volatile ("1:\tmov"
"w"
" %"
"w"
"1,%2\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3:\tmov %3,%0\n"
"\tjmp 2b\n"
".previous\n"
" .section __ex_table,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"1b"
","
"3b"
"\n"
" .previous\n": "=r" (__pu_err): "ir" ((char *)((int *)((unsigned long )cmdbuffer32.buf))),
"m" (*((struct __large_struct *)(& cmdbuffer->buf))), "i" (-14),
"0" (__pu_err));
break;
case 4UL:
__asm__ volatile ("1:\tmov"
"l"
" %"
"k"
"1,%2\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3:\tmov %3,%0\n"
"\tjmp 2b\n"
".previous\n"
" .section __ex_table,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"1b"
","
"3b"
"\n"
" .previous\n": "=r" (__pu_err): "ir" ((char *)((int *)((unsigned long )cmdbuffer32.buf))),
"m" (*((struct __large_struct *)(& cmdbuffer->buf))), "i" (-14),
"0" (__pu_err));
break;
case 8UL:
__asm__ volatile ("1:\tmov"
"q"
" %"
""
"1,%2\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3:\tmov %3,%0\n"
"\tjmp 2b\n"
".previous\n"
" .section __ex_table,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"1b"
","
"3b"
"\n"
" .previous\n": "=r" (__pu_err): "Zr" ((char *)((int *)((unsigned long )cmdbuffer32.buf))),
"m" (*((struct __large_struct *)(& cmdbuffer->buf))), "i" (-14),
"0" (__pu_err));
break;
default:
__put_user_bad();
}
break;
}
if (__pu_err) {
return (-14);
} else {
while (1) {
__pu_err___0 = 0;
switch (sizeof(cmdbuffer->sz)) {
case 1UL:
__asm__ volatile ("1:\tmov"
"b"
" %"
"b"
"1,%2\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3:\tmov %3,%0\n"
"\tjmp 2b\n"
".previous\n"
" .section __ex_table,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"1b"
","
"3b"
"\n"
" .previous\n": "=r" (__pu_err___0): "iq" (cmdbuffer32.sz),
"m" (*((struct __large_struct *)(& cmdbuffer->sz))),
"i" (-14), "0" (__pu_err___0));
break;
case 2UL:
__asm__ volatile ("1:\tmov"
"w"
" %"
"w"
"1,%2\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3:\tmov %3,%0\n"
"\tjmp 2b\n"
".previous\n"
" .section __ex_table,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"1b"
","
"3b"
"\n"
" .previous\n": "=r" (__pu_err___0): "ir" (cmdbuffer32.sz),
"m" (*((struct __large_struct *)(& cmdbuffer->sz))),
"i" (-14), "0" (__pu_err___0));
break;
case 4UL:
__asm__ volatile ("1:\tmov"
"l"
" %"
"k"
"1,%2\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3:\tmov %3,%0\n"
"\tjmp 2b\n"
".previous\n"
" .section __ex_table,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"1b"
","
"3b"
"\n"
" .previous\n": "=r" (__pu_err___0): "ir" (cmdbuffer32.sz),
"m" (*((struct __large_struct *)(& cmdbuffer->sz))),
"i" (-14), "0" (__pu_err___0));
break;
case 8UL:
__asm__ volatile ("1:\tmov"
"q"
" %"
""
"1,%2\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3:\tmov %3,%0\n"
"\tjmp 2b\n"
".previous\n"
" .section __ex_table,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"1b"
","
"3b"
"\n"
" .previous\n": "=r" (__pu_err___0): "Zr" (cmdbuffer32.sz),
"m" (*((struct __large_struct *)(& cmdbuffer->sz))),
"i" (-14), "0" (__pu_err___0));
break;
default:
__put_user_bad();
}
break;
}
if (__pu_err___0) {
return (-14);
} else {
while (1) {
__pu_err___1 = 0;
switch (sizeof(cmdbuffer->DR1)) {
case 1UL:
__asm__ volatile ("1:\tmov"
"b"
" %"
"b"
"1,%2\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3:\tmov %3,%0\n"
"\tjmp 2b\n"
".previous\n"
" .section __ex_table,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"1b"
","
"3b"
"\n"
" .previous\n": "=r" (__pu_err___1): "iq" (cmdbuffer32.DR1),
"m" (*((struct __large_struct *)(& cmdbuffer->DR1))),
"i" (-14), "0" (__pu_err___1));
break;
case 2UL:
__asm__ volatile ("1:\tmov"
"w"
" %"
"w"
"1,%2\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3:\tmov %3,%0\n"
"\tjmp 2b\n"
".previous\n"
" .section __ex_table,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"1b"
","
"3b"
"\n"
" .previous\n": "=r" (__pu_err___1): "ir" (cmdbuffer32.DR1),
"m" (*((struct __large_struct *)(& cmdbuffer->DR1))),
"i" (-14), "0" (__pu_err___1));
break;
case 4UL:
__asm__ volatile ("1:\tmov"
"l"
" %"
"k"
"1,%2\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3:\tmov %3,%0\n"
"\tjmp 2b\n"
".previous\n"
" .section __ex_table,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"1b"
","
"3b"
"\n"
" .previous\n": "=r" (__pu_err___1): "ir" (cmdbuffer32.DR1),
"m" (*((struct __large_struct *)(& cmdbuffer->DR1))),
"i" (-14), "0" (__pu_err___1));
break;
case 8UL:
__asm__ volatile ("1:\tmov"
"q"
" %"
""
"1,%2\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3:\tmov %3,%0\n"
"\tjmp 2b\n"
".previous\n"
" .section __ex_table,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"1b"
","
"3b"
"\n"
" .previous\n": "=r" (__pu_err___1): "Zr" (cmdbuffer32.DR1),
"m" (*((struct __large_struct *)(& cmdbuffer->DR1))),
"i" (-14), "0" (__pu_err___1));
break;
default:
__put_user_bad();
}
break;
}
if (__pu_err___1) {
return (-14);
} else {
while (1) {
__pu_err___2 = 0;
switch (sizeof(cmdbuffer->DR4)) {
case 1UL:
__asm__ volatile ("1:\tmov"
"b"
" %"
"b"
"1,%2\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3:\tmov %3,%0\n"
"\tjmp 2b\n"
".previous\n"
" .section __ex_table,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"1b"
","
"3b"
"\n"
" .previous\n": "=r" (__pu_err___2): "iq" (cmdbuffer32.DR4),
"m" (*((struct __large_struct *)(& cmdbuffer->DR4))),
"i" (-14), "0" (__pu_err___2));
break;
case 2UL:
__asm__ volatile ("1:\tmov"
"w"
" %"
"w"
"1,%2\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3:\tmov %3,%0\n"
"\tjmp 2b\n"
".previous\n"
" .section __ex_table,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"1b"
","
"3b"
"\n"
" .previous\n": "=r" (__pu_err___2): "ir" (cmdbuffer32.DR4),
"m" (*((struct __large_struct *)(& cmdbuffer->DR4))),
"i" (-14), "0" (__pu_err___2));
break;
case 4UL:
__asm__ volatile ("1:\tmov"
"l"
" %"
"k"
"1,%2\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3:\tmov %3,%0\n"
"\tjmp 2b\n"
".previous\n"
" .section __ex_table,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"1b"
","
"3b"
"\n"
" .previous\n": "=r" (__pu_err___2): "ir" (cmdbuffer32.DR4),
"m" (*((struct __large_struct *)(& cmdbuffer->DR4))),
"i" (-14), "0" (__pu_err___2));
break;
case 8UL:
__asm__ volatile ("1:\tmov"
"q"
" %"
""
"1,%2\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3:\tmov %3,%0\n"
"\tjmp 2b\n"
".previous\n"
" .section __ex_table,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"1b"
","
"3b"
"\n"
" .previous\n": "=r" (__pu_err___2): "Zr" (cmdbuffer32.DR4),
"m" (*((struct __large_struct *)(& cmdbuffer->DR4))),
"i" (-14), "0" (__pu_err___2));
break;
default:
__put_user_bad();
}
break;
}
if (__pu_err___2) {
return (-14);
} else {
while (1) {
__pu_err___3 = 0;
switch (sizeof(cmdbuffer->num_cliprects)) {
case 1UL:
__asm__ volatile ("1:\tmov"
"b"
" %"
"b"
"1,%2\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3:\tmov %3,%0\n"
"\tjmp 2b\n"
".previous\n"
" .section __ex_table,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"1b"
","
"3b"
"\n"
" .previous\n": "=r" (__pu_err___3): "iq" (cmdbuffer32.num_cliprects),
"m" (*((struct __large_struct *)(& cmdbuffer->num_cliprects))),
"i" (-14), "0" (__pu_err___3));
break;
case 2UL:
__asm__ volatile ("1:\tmov"
"w"
" %"
"w"
"1,%2\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3:\tmov %3,%0\n"
"\tjmp 2b\n"
".previous\n"
" .section __ex_table,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"1b"
","
"3b"
"\n"
" .previous\n": "=r" (__pu_err___3): "ir" (cmdbuffer32.num_cliprects),
"m" (*((struct __large_struct *)(& cmdbuffer->num_cliprects))),
"i" (-14), "0" (__pu_err___3));
break;
case 4UL:
__asm__ volatile ("1:\tmov"
"l"
" %"
"k"
"1,%2\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3:\tmov %3,%0\n"
"\tjmp 2b\n"
".previous\n"
" .section __ex_table,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"1b"
","
"3b"
"\n"
" .previous\n": "=r" (__pu_err___3): "ir" (cmdbuffer32.num_cliprects),
"m" (*((struct __large_struct *)(& cmdbuffer->num_cliprects))),
"i" (-14), "0" (__pu_err___3));
break;
case 8UL:
__asm__ volatile ("1:\tmov"
"q"
" %"
""
"1,%2\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3:\tmov %3,%0\n"
"\tjmp 2b\n"
".previous\n"
" .section __ex_table,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"1b"
","
"3b"
"\n"
" .previous\n": "=r" (__pu_err___3): "Zr" (cmdbuffer32.num_cliprects),
"m" (*((struct __large_struct *)(& cmdbuffer->num_cliprects))),
"i" (-14), "0" (__pu_err___3));
break;
default:
__put_user_bad();
}
break;
}
if (__pu_err___3) {
return (-14);
} else {
while (1) {
__pu_err___4 = 0;
switch (sizeof(cmdbuffer->cliprects)) {
case 1UL:
__asm__ volatile ("1:\tmov"
"b"
" %"
"b"
"1,%2\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3:\tmov %3,%0\n"
"\tjmp 2b\n"
".previous\n"
" .section __ex_table,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"1b"
","
"3b"
"\n"
" .previous\n": "=r" (__pu_err___4): "iq" ((struct drm_clip_rect *)((int *)((unsigned long )cmdbuffer32.cliprects))),
"m" (*((struct __large_struct *)(& cmdbuffer->cliprects))),
"i" (-14), "0" (__pu_err___4));
break;
case 2UL:
__asm__ volatile ("1:\tmov"
"w"
" %"
"w"
"1,%2\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3:\tmov %3,%0\n"
"\tjmp 2b\n"
".previous\n"
" .section __ex_table,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"1b"
","
"3b"
"\n"
" .previous\n": "=r" (__pu_err___4): "ir" ((struct drm_clip_rect *)((int *)((unsigned long )cmdbuffer32.cliprects))),
"m" (*((struct __large_struct *)(& cmdbuffer->cliprects))),
"i" (-14), "0" (__pu_err___4));
break;
case 4UL:
__asm__ volatile ("1:\tmov"
"l"
" %"
"k"
"1,%2\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3:\tmov %3,%0\n"
"\tjmp 2b\n"
".previous\n"
" .section __ex_table,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"1b"
","
"3b"
"\n"
" .previous\n": "=r" (__pu_err___4): "ir" ((struct drm_clip_rect *)((int *)((unsigned long )cmdbuffer32.cliprects))),
"m" (*((struct __large_struct *)(& cmdbuffer->cliprects))),
"i" (-14), "0" (__pu_err___4));
break;
case 8UL:
__asm__ volatile ("1:\tmov"
"q"
" %"
""
"1,%2\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3:\tmov %3,%0\n"
"\tjmp 2b\n"
".previous\n"
" .section __ex_table,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"1b"
","
"3b"
"\n"
" .previous\n": "=r" (__pu_err___4): "Zr" ((struct drm_clip_rect *)((int *)((unsigned long )cmdbuffer32.cliprects))),
"m" (*((struct __large_struct *)(& cmdbuffer->cliprects))),
"i" (-14), "0" (__pu_err___4));
break;
default:
__put_user_bad();
}
break;
}
if (__pu_err___4) {
return (-14);
} else {
}
}
}
}
}
}
} else {
return (-14);
}
tmp___4 = drm_ioctl((file->f_path.dentry)->d_inode, file, (unsigned long )(((1U << (((0 + 8) + 8) + 14)) | (unsigned int )('d' << (0 + 8))) | (unsigned int )((64 + 11) << 0)) | ((sizeof(drm_i915_cmdbuffer_t ) == sizeof(drm_i915_cmdbuffer_t [1]) && sizeof(drm_i915_cmdbuffer_t ) < (unsigned long )(1 << 14) ? sizeof(drm_i915_cmdbuffer_t ) : __invalid_size_argument_for_IOC) << ((0 + 8) + 8)),
(unsigned long )cmdbuffer);
return (tmp___4);
}
}
static int compat_i915_irq_emit(struct file *file , unsigned int cmd , unsigned long arg )
{
drm_i915_irq_emit32_t req32 ;
drm_i915_irq_emit_t *request ;
unsigned long tmp ;
void *tmp___0 ;
unsigned long flag ;
unsigned long roksum ;
struct thread_info *tmp___1 ;
int tmp___2 ;
long tmp___3 ;
long __pu_err ;
int tmp___4 ;
{
tmp = copy_from_user(& req32, (void *)arg, sizeof(req32));
if (tmp) {
return (-14);
} else {
}
tmp___0 = compat_alloc_user_space(sizeof(*request));
request = tmp___0;
tmp___1 = current_thread_info();
__asm__ ("add %3,%1 ; sbb %0,%0 ; cmp %1,%4 ; sbb $0,%0": "=&r" (flag), "=r" (roksum): "1" (request),
"g" ((long )sizeof(*request)), "rm" (tmp___1->addr_limit.seg));
if (flag == 0UL) {
tmp___2 = 1;
} else {
tmp___2 = 0;
}
tmp___3 = ldv__builtin_expect(tmp___2, 1);
if (tmp___3) {
while (1) {
__pu_err = 0;
switch (sizeof(request->irq_seq)) {
case 1UL:
__asm__ volatile ("1:\tmov"
"b"
" %"
"b"
"1,%2\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3:\tmov %3,%0\n"
"\tjmp 2b\n"
".previous\n"
" .section __ex_table,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"1b"
","
"3b"
"\n"
" .previous\n": "=r" (__pu_err): "iq" ((int *)((unsigned long )req32.irq_seq)),
"m" (*((struct __large_struct *)(& request->irq_seq))),
"i" (-14), "0" (__pu_err));
break;
case 2UL:
__asm__ volatile ("1:\tmov"
"w"
" %"
"w"
"1,%2\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3:\tmov %3,%0\n"
"\tjmp 2b\n"
".previous\n"
" .section __ex_table,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"1b"
","
"3b"
"\n"
" .previous\n": "=r" (__pu_err): "ir" ((int *)((unsigned long )req32.irq_seq)),
"m" (*((struct __large_struct *)(& request->irq_seq))),
"i" (-14), "0" (__pu_err));
break;
case 4UL:
__asm__ volatile ("1:\tmov"
"l"
" %"
"k"
"1,%2\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3:\tmov %3,%0\n"
"\tjmp 2b\n"
".previous\n"
" .section __ex_table,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"1b"
","
"3b"
"\n"
" .previous\n": "=r" (__pu_err): "ir" ((int *)((unsigned long )req32.irq_seq)),
"m" (*((struct __large_struct *)(& request->irq_seq))),
"i" (-14), "0" (__pu_err));
break;
case 8UL:
__asm__ volatile ("1:\tmov"
"q"
" %"
""
"1,%2\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3:\tmov %3,%0\n"
"\tjmp 2b\n"
".previous\n"
" .section __ex_table,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"1b"
","
"3b"
"\n"
" .previous\n": "=r" (__pu_err): "Zr" ((int *)((unsigned long )req32.irq_seq)),
"m" (*((struct __large_struct *)(& request->irq_seq))),
"i" (-14), "0" (__pu_err));
break;
default:
__put_user_bad();
}
break;
}
if (__pu_err) {
return (-14);
} else {
}
} else {
return (-14);
}
tmp___4 = drm_ioctl((file->f_path.dentry)->d_inode, file, (unsigned long )((((2U | 1U) << (((0 + 8) + 8) + 14)) | (unsigned int )('d' << (0 + 8))) | (unsigned int )((64 + 4) << 0)) | ((sizeof(drm_i915_irq_emit_t ) == sizeof(drm_i915_irq_emit_t [1]) && sizeof(drm_i915_irq_emit_t ) < (unsigned long )(1 << 14) ? sizeof(drm_i915_irq_emit_t ) : __invalid_size_argument_for_IOC) << ((0 + 8) + 8)),
(unsigned long )request);
return (tmp___4);
}
}
static int compat_i915_getparam(struct file *file , unsigned int cmd , unsigned long arg )
{
drm_i915_getparam32_t req32 ;
drm_i915_getparam_t *request ;
unsigned long tmp ;
void *tmp___0 ;
unsigned long flag ;
unsigned long roksum ;
struct thread_info *tmp___1 ;
int tmp___2 ;
long tmp___3 ;
long __pu_err ;
long __pu_err___0 ;
int tmp___4 ;
{
tmp = copy_from_user(& req32, (void *)arg, sizeof(req32));
if (tmp) {
return (-14);
} else {
}
tmp___0 = compat_alloc_user_space(sizeof(*request));
request = tmp___0;
tmp___1 = current_thread_info();
__asm__ ("add %3,%1 ; sbb %0,%0 ; cmp %1,%4 ; sbb $0,%0": "=&r" (flag), "=r" (roksum): "1" (request),
"g" ((long )sizeof(*request)), "rm" (tmp___1->addr_limit.seg));
if (flag == 0UL) {
tmp___2 = 1;
} else {
tmp___2 = 0;
}
tmp___3 = ldv__builtin_expect(tmp___2, 1);
if (tmp___3) {
while (1) {
__pu_err = 0;
switch (sizeof(request->param)) {
case 1UL:
__asm__ volatile ("1:\tmov"
"b"
" %"
"b"
"1,%2\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3:\tmov %3,%0\n"
"\tjmp 2b\n"
".previous\n"
" .section __ex_table,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"1b"
","
"3b"
"\n"
" .previous\n": "=r" (__pu_err): "iq" (req32.param), "m" (*((struct __large_struct *)(& request->param))),
"i" (-14), "0" (__pu_err));
break;
case 2UL:
__asm__ volatile ("1:\tmov"
"w"
" %"
"w"
"1,%2\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3:\tmov %3,%0\n"
"\tjmp 2b\n"
".previous\n"
" .section __ex_table,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"1b"
","
"3b"
"\n"
" .previous\n": "=r" (__pu_err): "ir" (req32.param), "m" (*((struct __large_struct *)(& request->param))),
"i" (-14), "0" (__pu_err));
break;
case 4UL:
__asm__ volatile ("1:\tmov"
"l"
" %"
"k"
"1,%2\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3:\tmov %3,%0\n"
"\tjmp 2b\n"
".previous\n"
" .section __ex_table,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"1b"
","
"3b"
"\n"
" .previous\n": "=r" (__pu_err): "ir" (req32.param), "m" (*((struct __large_struct *)(& request->param))),
"i" (-14), "0" (__pu_err));
break;
case 8UL:
__asm__ volatile ("1:\tmov"
"q"
" %"
""
"1,%2\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3:\tmov %3,%0\n"
"\tjmp 2b\n"
".previous\n"
" .section __ex_table,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"1b"
","
"3b"
"\n"
" .previous\n": "=r" (__pu_err): "Zr" (req32.param), "m" (*((struct __large_struct *)(& request->param))),
"i" (-14), "0" (__pu_err));
break;
default:
__put_user_bad();
}
break;
}
if (__pu_err) {
return (-14);
} else {
while (1) {
__pu_err___0 = 0;
switch (sizeof(request->value)) {
case 1UL:
__asm__ volatile ("1:\tmov"
"b"
" %"
"b"
"1,%2\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3:\tmov %3,%0\n"
"\tjmp 2b\n"
".previous\n"
" .section __ex_table,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"1b"
","
"3b"
"\n"
" .previous\n": "=r" (__pu_err___0): "iq" ((int *)((void *)((unsigned long )req32.value))),
"m" (*((struct __large_struct *)(& request->value))),
"i" (-14), "0" (__pu_err___0));
break;
case 2UL:
__asm__ volatile ("1:\tmov"
"w"
" %"
"w"
"1,%2\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3:\tmov %3,%0\n"
"\tjmp 2b\n"
".previous\n"
" .section __ex_table,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"1b"
","
"3b"
"\n"
" .previous\n": "=r" (__pu_err___0): "ir" ((int *)((void *)((unsigned long )req32.value))),
"m" (*((struct __large_struct *)(& request->value))),
"i" (-14), "0" (__pu_err___0));
break;
case 4UL:
__asm__ volatile ("1:\tmov"
"l"
" %"
"k"
"1,%2\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3:\tmov %3,%0\n"
"\tjmp 2b\n"
".previous\n"
" .section __ex_table,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"1b"
","
"3b"
"\n"
" .previous\n": "=r" (__pu_err___0): "ir" ((int *)((void *)((unsigned long )req32.value))),
"m" (*((struct __large_struct *)(& request->value))),
"i" (-14), "0" (__pu_err___0));
break;
case 8UL:
__asm__ volatile ("1:\tmov"
"q"
" %"
""
"1,%2\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3:\tmov %3,%0\n"
"\tjmp 2b\n"
".previous\n"
" .section __ex_table,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"1b"
","
"3b"
"\n"
" .previous\n": "=r" (__pu_err___0): "Zr" ((int *)((void *)((unsigned long )req32.value))),
"m" (*((struct __large_struct *)(& request->value))),
"i" (-14), "0" (__pu_err___0));
break;
default:
__put_user_bad();
}
break;
}
if (__pu_err___0) {
return (-14);
} else {
}
}
} else {
return (-14);
}
tmp___4 = drm_ioctl((file->f_path.dentry)->d_inode, file, (unsigned long )((((2U | 1U) << (((0 + 8) + 8) + 14)) | (unsigned int )('d' << (0 + 8))) | (unsigned int )((64 + 6) << 0)) | ((sizeof(drm_i915_getparam_t ) == sizeof(drm_i915_getparam_t [1]) && sizeof(drm_i915_getparam_t ) < (unsigned long )(1 << 14) ? sizeof(drm_i915_getparam_t ) : __invalid_size_argument_for_IOC) << ((0 + 8) + 8)),
(unsigned long )request);
return (tmp___4);
}
}
static int compat_i915_alloc(struct file *file , unsigned int cmd , unsigned long arg )
{
drm_i915_mem_alloc32_t req32 ;
drm_i915_mem_alloc_t *request ;
unsigned long tmp ;
void *tmp___0 ;
unsigned long flag ;
unsigned long roksum ;
struct thread_info *tmp___1 ;
int tmp___2 ;
long tmp___3 ;
long __pu_err ;
long __pu_err___0 ;
long __pu_err___1 ;
long __pu_err___2 ;
int tmp___4 ;
{
tmp = copy_from_user(& req32, (void *)arg, sizeof(req32));
if (tmp) {
return (-14);
} else {
}
tmp___0 = compat_alloc_user_space(sizeof(*request));
request = tmp___0;
tmp___1 = current_thread_info();
__asm__ ("add %3,%1 ; sbb %0,%0 ; cmp %1,%4 ; sbb $0,%0": "=&r" (flag), "=r" (roksum): "1" (request),
"g" ((long )sizeof(*request)), "rm" (tmp___1->addr_limit.seg));
if (flag == 0UL) {
tmp___2 = 1;
} else {
tmp___2 = 0;
}
tmp___3 = ldv__builtin_expect(tmp___2, 1);
if (tmp___3) {
while (1) {
__pu_err = 0;
switch (sizeof(request->region)) {
case 1UL:
__asm__ volatile ("1:\tmov"
"b"
" %"
"b"
"1,%2\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3:\tmov %3,%0\n"
"\tjmp 2b\n"
".previous\n"
" .section __ex_table,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"1b"
","
"3b"
"\n"
" .previous\n": "=r" (__pu_err): "iq" (req32.region), "m" (*((struct __large_struct *)(& request->region))),
"i" (-14), "0" (__pu_err));
break;
case 2UL:
__asm__ volatile ("1:\tmov"
"w"
" %"
"w"
"1,%2\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3:\tmov %3,%0\n"
"\tjmp 2b\n"
".previous\n"
" .section __ex_table,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"1b"
","
"3b"
"\n"
" .previous\n": "=r" (__pu_err): "ir" (req32.region), "m" (*((struct __large_struct *)(& request->region))),
"i" (-14), "0" (__pu_err));
break;
case 4UL:
__asm__ volatile ("1:\tmov"
"l"
" %"
"k"
"1,%2\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3:\tmov %3,%0\n"
"\tjmp 2b\n"
".previous\n"
" .section __ex_table,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"1b"
","
"3b"
"\n"
" .previous\n": "=r" (__pu_err): "ir" (req32.region), "m" (*((struct __large_struct *)(& request->region))),
"i" (-14), "0" (__pu_err));
break;
case 8UL:
__asm__ volatile ("1:\tmov"
"q"
" %"
""
"1,%2\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3:\tmov %3,%0\n"
"\tjmp 2b\n"
".previous\n"
" .section __ex_table,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"1b"
","
"3b"
"\n"
" .previous\n": "=r" (__pu_err): "Zr" (req32.region), "m" (*((struct __large_struct *)(& request->region))),
"i" (-14), "0" (__pu_err));
break;
default:
__put_user_bad();
}
break;
}
if (__pu_err) {
return (-14);
} else {
while (1) {
__pu_err___0 = 0;
switch (sizeof(request->alignment)) {
case 1UL:
__asm__ volatile ("1:\tmov"
"b"
" %"
"b"
"1,%2\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3:\tmov %3,%0\n"
"\tjmp 2b\n"
".previous\n"
" .section __ex_table,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"1b"
","
"3b"
"\n"
" .previous\n": "=r" (__pu_err___0): "iq" (req32.alignment),
"m" (*((struct __large_struct *)(& request->alignment))),
"i" (-14), "0" (__pu_err___0));
break;
case 2UL:
__asm__ volatile ("1:\tmov"
"w"
" %"
"w"
"1,%2\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3:\tmov %3,%0\n"
"\tjmp 2b\n"
".previous\n"
" .section __ex_table,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"1b"
","
"3b"
"\n"
" .previous\n": "=r" (__pu_err___0): "ir" (req32.alignment),
"m" (*((struct __large_struct *)(& request->alignment))),
"i" (-14), "0" (__pu_err___0));
break;
case 4UL:
__asm__ volatile ("1:\tmov"
"l"
" %"
"k"
"1,%2\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3:\tmov %3,%0\n"
"\tjmp 2b\n"
".previous\n"
" .section __ex_table,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"1b"
","
"3b"
"\n"
" .previous\n": "=r" (__pu_err___0): "ir" (req32.alignment),
"m" (*((struct __large_struct *)(& request->alignment))),
"i" (-14), "0" (__pu_err___0));
break;
case 8UL:
__asm__ volatile ("1:\tmov"
"q"
" %"
""
"1,%2\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3:\tmov %3,%0\n"
"\tjmp 2b\n"
".previous\n"
" .section __ex_table,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"1b"
","
"3b"
"\n"
" .previous\n": "=r" (__pu_err___0): "Zr" (req32.alignment),
"m" (*((struct __large_struct *)(& request->alignment))),
"i" (-14), "0" (__pu_err___0));
break;
default:
__put_user_bad();
}
break;
}
if (__pu_err___0) {
return (-14);
} else {
while (1) {
__pu_err___1 = 0;
switch (sizeof(request->size)) {
case 1UL:
__asm__ volatile ("1:\tmov"
"b"
" %"
"b"
"1,%2\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3:\tmov %3,%0\n"
"\tjmp 2b\n"
".previous\n"
" .section __ex_table,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"1b"
","
"3b"
"\n"
" .previous\n": "=r" (__pu_err___1): "iq" (req32.size),
"m" (*((struct __large_struct *)(& request->size))),
"i" (-14), "0" (__pu_err___1));
break;
case 2UL:
__asm__ volatile ("1:\tmov"
"w"
" %"
"w"
"1,%2\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3:\tmov %3,%0\n"
"\tjmp 2b\n"
".previous\n"
" .section __ex_table,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"1b"
","
"3b"
"\n"
" .previous\n": "=r" (__pu_err___1): "ir" (req32.size),
"m" (*((struct __large_struct *)(& request->size))),
"i" (-14), "0" (__pu_err___1));
break;
case 4UL:
__asm__ volatile ("1:\tmov"
"l"
" %"
"k"
"1,%2\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3:\tmov %3,%0\n"
"\tjmp 2b\n"
".previous\n"
" .section __ex_table,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"1b"
","
"3b"
"\n"
" .previous\n": "=r" (__pu_err___1): "ir" (req32.size),
"m" (*((struct __large_struct *)(& request->size))),
"i" (-14), "0" (__pu_err___1));
break;
case 8UL:
__asm__ volatile ("1:\tmov"
"q"
" %"
""
"1,%2\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3:\tmov %3,%0\n"
"\tjmp 2b\n"
".previous\n"
" .section __ex_table,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"1b"
","
"3b"
"\n"
" .previous\n": "=r" (__pu_err___1): "Zr" (req32.size),
"m" (*((struct __large_struct *)(& request->size))),
"i" (-14), "0" (__pu_err___1));
break;
default:
__put_user_bad();
}
break;
}
if (__pu_err___1) {
return (-14);
} else {
while (1) {
__pu_err___2 = 0;
switch (sizeof(request->region_offset)) {
case 1UL:
__asm__ volatile ("1:\tmov"
"b"
" %"
"b"
"1,%2\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3:\tmov %3,%0\n"
"\tjmp 2b\n"
".previous\n"
" .section __ex_table,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"1b"
","
"3b"
"\n"
" .previous\n": "=r" (__pu_err___2): "iq" ((int *)((void *)((unsigned long )req32.region_offset))),
"m" (*((struct __large_struct *)(& request->region_offset))),
"i" (-14), "0" (__pu_err___2));
break;
case 2UL:
__asm__ volatile ("1:\tmov"
"w"
" %"
"w"
"1,%2\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3:\tmov %3,%0\n"
"\tjmp 2b\n"
".previous\n"
" .section __ex_table,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"1b"
","
"3b"
"\n"
" .previous\n": "=r" (__pu_err___2): "ir" ((int *)((void *)((unsigned long )req32.region_offset))),
"m" (*((struct __large_struct *)(& request->region_offset))),
"i" (-14), "0" (__pu_err___2));
break;
case 4UL:
__asm__ volatile ("1:\tmov"
"l"
" %"
"k"
"1,%2\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3:\tmov %3,%0\n"
"\tjmp 2b\n"
".previous\n"
" .section __ex_table,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"1b"
","
"3b"
"\n"
" .previous\n": "=r" (__pu_err___2): "ir" ((int *)((void *)((unsigned long )req32.region_offset))),
"m" (*((struct __large_struct *)(& request->region_offset))),
"i" (-14), "0" (__pu_err___2));
break;
case 8UL:
__asm__ volatile ("1:\tmov"
"q"
" %"
""
"1,%2\n"
"2:\n"
".section .fixup,\"ax\"\n"
"3:\tmov %3,%0\n"
"\tjmp 2b\n"
".previous\n"
" .section __ex_table,\"a\"\n"
" "
".balign 8"
" "
"\n"
" "
".quad"
" "
"1b"
","
"3b"
"\n"
" .previous\n": "=r" (__pu_err___2): "Zr" ((int *)((void *)((unsigned long )req32.region_offset))),
"m" (*((struct __large_struct *)(& request->region_offset))),
"i" (-14), "0" (__pu_err___2));
break;
default:
__put_user_bad();
}
break;
}
if (__pu_err___2) {
return (-14);
} else {
}
}
}
}
} else {
return (-14);
}
tmp___4 = drm_ioctl((file->f_path.dentry)->d_inode, file, (unsigned long )((((2U | 1U) << (((0 + 8) + 8) + 14)) | (unsigned int )('d' << (0 + 8))) | (unsigned int )((64 + 8) << 0)) | ((sizeof(drm_i915_mem_alloc_t ) == sizeof(drm_i915_mem_alloc_t [1]) && sizeof(drm_i915_mem_alloc_t ) < (unsigned long )(1 << 14) ? sizeof(drm_i915_mem_alloc_t ) : __invalid_size_argument_for_IOC) << ((0 + 8) + 8)),
(unsigned long )request);
return (tmp___4);
}
}
drm_ioctl_compat_t *i915_compat_ioctls[12] =
{ 0, 0, 0, & compat_i915_batchbuffer,
& compat_i915_irq_emit, 0, & compat_i915_getparam, 0,
& compat_i915_alloc, 0, 0, & compat_i915_cmdbuffer};
long i915_compat_ioctl(struct file *filp , unsigned int cmd , unsigned long arg )
{
unsigned int nr ;
drm_ioctl_compat_t *fn ;
int ret ;
long tmp ;
{
nr = (cmd >> 0) & (unsigned int )((1 << 8) - 1);
fn = (void *)0;
if (nr < 64U) {
tmp = drm_compat_ioctl(filp, cmd, arg);
return (tmp);
} else {
}
if ((unsigned long )nr < 64UL + (sizeof(i915_compat_ioctls) / sizeof(i915_compat_ioctls[0]) + (sizeof(char [1 - 2 * 0]) - 1UL))) {
fn = i915_compat_ioctls[nr - 64U];
} else {
}
lock_kernel();
if ((unsigned long )fn != (unsigned long )((void *)0)) {
ret = (*fn)(filp, cmd, arg);
} else {
ret = drm_ioctl((filp->f_path.dentry)->d_inode, filp, cmd, arg);
}
unlock_kernel();
return (ret);
}
}
struct urb *usb_alloc_urb(int iso_packets , gfp_t mem_flags ) ;
void usb_free_urb(struct urb *urb ) ;
__inline static void ldv_error(void)
{
{
LDV_ERROR: {reach_error();abort();}
}
}
__inline static void ldv_stop(void)
{
{
LDV_STOP:
goto LDV_STOP;
}
}
extern void *ldv_undef_ptr(void) ;
long ldv__builtin_expect(long exp , long c )
{
{
return (exp);
}
}
int ldv_urb_state = 0;
int ldv_coherent_state = 0;
void *usb_alloc_coherent(struct usb_device *dev , size_t size , gfp_t mem_flags ,
dma_addr_t *dma )
{
void *arbitrary_memory ;
void *tmp ;
{
while (1) {
tmp = ldv_undef_ptr();
arbitrary_memory = tmp;
if (! arbitrary_memory) {
return ((void *)0);
} else {
}
ldv_coherent_state = ldv_coherent_state + 1;
return (arbitrary_memory);
break;
}
return ((void *)0);
}
}
void usb_free_coherent(struct usb_device *dev , size_t size , void *addr , dma_addr_t dma )
{
{
while (1) {
if ((unsigned long )addr != (unsigned long )((void *)0)) {
} else {
ldv_stop();
}
if (addr) {
if (ldv_coherent_state >= 1) {
} else {
ldv_error();
}
ldv_coherent_state = ldv_coherent_state - 1;
} else {
}
break;
}
return;
}
}
struct urb *usb_alloc_urb(int iso_packets , gfp_t mem_flags )
{
void *arbitrary_memory ;
void *tmp ;
{
while (1) {
tmp = ldv_undef_ptr();
arbitrary_memory = tmp;
if (! arbitrary_memory) {
return ((void *)0);
} else {
}
ldv_urb_state = ldv_urb_state + 1;
return (arbitrary_memory);
break;
}
return ((struct urb *)0);
}
}
void usb_free_urb(struct urb *urb )
{
{
while (1) {
if ((unsigned long )urb != (unsigned long )((struct urb *)0)) {
} else {
ldv_stop();
}
if (urb) {
if (ldv_urb_state >= 1) {
} else {
ldv_error();
}
ldv_urb_state = ldv_urb_state - 1;
} else {
}
break;
}
return;
}
}
void ldv_check_final_state(void)
{
{
if (ldv_urb_state == 0) {
} else {
ldv_error();
}
if (ldv_coherent_state == 0) {
} else {
ldv_error();
}
return;
}
}