./Ultimate.py --spec ../../sv-benchmarks/c/ReachSafety.prp --file ../../sv-benchmarks/c/psyco/psyco_abp_1_false-unreach-call_false-termination_true-no-overflow.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version 1dbac8bc Calling Ultimate with: java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/working_dir_b82e135f-7e7c-47f8-a9b2-5ad19e9c9134/bin-2019/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/working_dir_b82e135f-7e7c-47f8-a9b2-5ad19e9c9134/bin-2019/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/working_dir_b82e135f-7e7c-47f8-a9b2-5ad19e9c9134/bin-2019/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/working_dir_b82e135f-7e7c-47f8-a9b2-5ad19e9c9134/bin-2019/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/psyco/psyco_abp_1_false-unreach-call_false-termination_true-no-overflow.c -s /tmp/vcloud-vcloud-master/worker/working_dir_b82e135f-7e7c-47f8-a9b2-5ad19e9c9134/bin-2019/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/working_dir_b82e135f-7e7c-47f8-a9b2-5ad19e9c9134/bin-2019/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 747981090a474d9d2269aea1ffd03eef2ddc8848 ...................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.23-1dbac8b [2018-11-10 10:25:51,177 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-11-10 10:25:51,179 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-11-10 10:25:51,187 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-11-10 10:25:51,187 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-11-10 10:25:51,188 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-11-10 10:25:51,188 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-11-10 10:25:51,189 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-11-10 10:25:51,191 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-11-10 10:25:51,191 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-11-10 10:25:51,192 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-11-10 10:25:51,192 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-11-10 10:25:51,193 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-11-10 10:25:51,193 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-11-10 10:25:51,194 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-11-10 10:25:51,195 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-11-10 10:25:51,195 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-11-10 10:25:51,197 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-11-10 10:25:51,198 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-11-10 10:25:51,199 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-11-10 10:25:51,200 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-11-10 10:25:51,201 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-11-10 10:25:51,202 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-11-10 10:25:51,202 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-11-10 10:25:51,202 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-11-10 10:25:51,203 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-11-10 10:25:51,204 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-11-10 10:25:51,204 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-11-10 10:25:51,205 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-11-10 10:25:51,206 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-11-10 10:25:51,206 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-11-10 10:25:51,206 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-11-10 10:25:51,206 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-11-10 10:25:51,207 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-11-10 10:25:51,207 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-11-10 10:25:51,208 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-11-10 10:25:51,208 INFO L98 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/working_dir_b82e135f-7e7c-47f8-a9b2-5ad19e9c9134/bin-2019/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2018-11-10 10:25:51,217 INFO L110 SettingsManager]: Loading preferences was successful [2018-11-10 10:25:51,218 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-11-10 10:25:51,218 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-11-10 10:25:51,218 INFO L133 SettingsManager]: * to procedures, called more than once=true [2018-11-10 10:25:51,219 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-11-10 10:25:51,219 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-11-10 10:25:51,219 INFO L133 SettingsManager]: * Use SBE=true [2018-11-10 10:25:51,219 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-11-10 10:25:51,220 INFO L133 SettingsManager]: * sizeof long=4 [2018-11-10 10:25:51,220 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-11-10 10:25:51,220 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-11-10 10:25:51,220 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-11-10 10:25:51,220 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-11-10 10:25:51,220 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-11-10 10:25:51,220 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-11-10 10:25:51,221 INFO L133 SettingsManager]: * sizeof long double=12 [2018-11-10 10:25:51,221 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-11-10 10:25:51,221 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-11-10 10:25:51,221 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-11-10 10:25:51,221 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-11-10 10:25:51,221 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-11-10 10:25:51,221 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-11-10 10:25:51,222 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-10 10:25:51,222 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-11-10 10:25:51,222 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-11-10 10:25:51,222 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-11-10 10:25:51,222 INFO L133 SettingsManager]: * Trace refinement strategy=CAMEL [2018-11-10 10:25:51,222 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-11-10 10:25:51,222 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-11-10 10:25:51,223 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/working_dir_b82e135f-7e7c-47f8-a9b2-5ad19e9c9134/bin-2019/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 747981090a474d9d2269aea1ffd03eef2ddc8848 [2018-11-10 10:25:51,245 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-11-10 10:25:51,253 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-11-10 10:25:51,255 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-11-10 10:25:51,256 INFO L271 PluginConnector]: Initializing CDTParser... [2018-11-10 10:25:51,256 INFO L276 PluginConnector]: CDTParser initialized [2018-11-10 10:25:51,257 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/working_dir_b82e135f-7e7c-47f8-a9b2-5ad19e9c9134/bin-2019/uautomizer/../../sv-benchmarks/c/psyco/psyco_abp_1_false-unreach-call_false-termination_true-no-overflow.c [2018-11-10 10:25:51,292 INFO L218 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_b82e135f-7e7c-47f8-a9b2-5ad19e9c9134/bin-2019/uautomizer/data/1c0ddf8a4/566ad0e4cdbd4958b8b5a8c400ffe94c/FLAGab1df211d [2018-11-10 10:25:51,717 INFO L298 CDTParser]: Found 1 translation units. [2018-11-10 10:25:51,718 INFO L158 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/working_dir_b82e135f-7e7c-47f8-a9b2-5ad19e9c9134/sv-benchmarks/c/psyco/psyco_abp_1_false-unreach-call_false-termination_true-no-overflow.c [2018-11-10 10:25:51,726 INFO L346 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_b82e135f-7e7c-47f8-a9b2-5ad19e9c9134/bin-2019/uautomizer/data/1c0ddf8a4/566ad0e4cdbd4958b8b5a8c400ffe94c/FLAGab1df211d [2018-11-10 10:25:51,737 INFO L354 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/working_dir_b82e135f-7e7c-47f8-a9b2-5ad19e9c9134/bin-2019/uautomizer/data/1c0ddf8a4/566ad0e4cdbd4958b8b5a8c400ffe94c [2018-11-10 10:25:51,739 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-11-10 10:25:51,740 INFO L131 ToolchainWalker]: Walking toolchain with 5 elements. [2018-11-10 10:25:51,740 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-11-10 10:25:51,741 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-11-10 10:25:51,743 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-11-10 10:25:51,743 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 10.11 10:25:51" (1/1) ... [2018-11-10 10:25:51,745 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@6b52ffc2 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 10:25:51, skipping insertion in model container [2018-11-10 10:25:51,745 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 10.11 10:25:51" (1/1) ... [2018-11-10 10:25:51,751 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-11-10 10:25:51,778 INFO L174 MainTranslator]: Built tables and reachable declarations [2018-11-10 10:25:51,942 INFO L202 PostProcessor]: Analyzing one entry point: main [2018-11-10 10:25:51,945 INFO L189 MainTranslator]: Completed pre-run [2018-11-10 10:25:51,989 INFO L202 PostProcessor]: Analyzing one entry point: main [2018-11-10 10:25:52,001 INFO L193 MainTranslator]: Completed translation [2018-11-10 10:25:52,001 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 10:25:52 WrapperNode [2018-11-10 10:25:52,001 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-11-10 10:25:52,002 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-11-10 10:25:52,002 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-11-10 10:25:52,002 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-11-10 10:25:52,013 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 10:25:52" (1/1) ... [2018-11-10 10:25:52,014 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 10:25:52" (1/1) ... [2018-11-10 10:25:52,021 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 10:25:52" (1/1) ... [2018-11-10 10:25:52,021 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 10:25:52" (1/1) ... [2018-11-10 10:25:52,033 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 10:25:52" (1/1) ... [2018-11-10 10:25:52,089 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 10:25:52" (1/1) ... [2018-11-10 10:25:52,091 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 10:25:52" (1/1) ... [2018-11-10 10:25:52,095 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-11-10 10:25:52,095 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-11-10 10:25:52,095 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-11-10 10:25:52,095 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-11-10 10:25:52,096 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 10:25:52" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_b82e135f-7e7c-47f8-a9b2-5ad19e9c9134/bin-2019/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-10 10:25:52,140 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-11-10 10:25:52,140 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-11-10 10:25:52,140 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2018-11-10 10:25:52,140 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_int [2018-11-10 10:25:52,140 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_error [2018-11-10 10:25:52,141 INFO L130 BoogieDeclarations]: Found specification of procedure main [2018-11-10 10:25:52,141 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-11-10 10:25:52,141 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-11-10 10:25:52,697 INFO L341 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-11-10 10:25:52,697 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 10.11 10:25:52 BoogieIcfgContainer [2018-11-10 10:25:52,697 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-11-10 10:25:52,698 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-11-10 10:25:52,698 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-11-10 10:25:52,701 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-11-10 10:25:52,701 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 10.11 10:25:51" (1/3) ... [2018-11-10 10:25:52,702 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@2d3d8548 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 10.11 10:25:52, skipping insertion in model container [2018-11-10 10:25:52,702 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 10:25:52" (2/3) ... [2018-11-10 10:25:52,702 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@2d3d8548 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 10.11 10:25:52, skipping insertion in model container [2018-11-10 10:25:52,702 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 10.11 10:25:52" (3/3) ... [2018-11-10 10:25:52,704 INFO L112 eAbstractionObserver]: Analyzing ICFG psyco_abp_1_false-unreach-call_false-termination_true-no-overflow.c [2018-11-10 10:25:52,712 INFO L136 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-11-10 10:25:52,719 INFO L148 ceAbstractionStarter]: Appying trace abstraction to program that has 1 error locations. [2018-11-10 10:25:52,732 INFO L257 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2018-11-10 10:25:52,758 INFO L135 ementStrategyFactory]: Using default assertion order modulation [2018-11-10 10:25:52,759 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-11-10 10:25:52,759 INFO L383 AbstractCegarLoop]: Hoare is true [2018-11-10 10:25:52,759 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-11-10 10:25:52,759 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-11-10 10:25:52,759 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-11-10 10:25:52,759 INFO L387 AbstractCegarLoop]: Difference is false [2018-11-10 10:25:52,760 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-11-10 10:25:52,760 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-11-10 10:25:52,776 INFO L276 IsEmpty]: Start isEmpty. Operand 115 states. [2018-11-10 10:25:52,781 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2018-11-10 10:25:52,781 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 10:25:52,782 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 10:25:52,784 INFO L424 AbstractCegarLoop]: === Iteration 1 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-10 10:25:52,789 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 10:25:52,789 INFO L82 PathProgramCache]: Analyzing trace with hash -662778961, now seen corresponding path program 1 times [2018-11-10 10:25:52,790 INFO L225 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-10 10:25:52,791 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-10 10:25:52,832 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 10:25:52,832 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 10:25:52,832 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 10:25:52,870 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 10:25:52,935 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 10:25:52,936 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-10 10:25:52,937 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-10 10:25:52,940 INFO L460 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-10 10:25:52,947 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-10 10:25:52,948 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-10 10:25:52,949 INFO L87 Difference]: Start difference. First operand 115 states. Second operand 3 states. [2018-11-10 10:25:53,189 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 10:25:53,189 INFO L93 Difference]: Finished difference Result 331 states and 635 transitions. [2018-11-10 10:25:53,189 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-10 10:25:53,190 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 14 [2018-11-10 10:25:53,190 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 10:25:53,200 INFO L225 Difference]: With dead ends: 331 [2018-11-10 10:25:53,201 INFO L226 Difference]: Without dead ends: 206 [2018-11-10 10:25:53,204 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-10 10:25:53,217 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 206 states. [2018-11-10 10:25:53,238 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 206 to 182. [2018-11-10 10:25:53,239 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 182 states. [2018-11-10 10:25:53,241 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 182 states to 182 states and 314 transitions. [2018-11-10 10:25:53,242 INFO L78 Accepts]: Start accepts. Automaton has 182 states and 314 transitions. Word has length 14 [2018-11-10 10:25:53,242 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 10:25:53,242 INFO L481 AbstractCegarLoop]: Abstraction has 182 states and 314 transitions. [2018-11-10 10:25:53,242 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-10 10:25:53,242 INFO L276 IsEmpty]: Start isEmpty. Operand 182 states and 314 transitions. [2018-11-10 10:25:53,243 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2018-11-10 10:25:53,243 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 10:25:53,243 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 10:25:53,243 INFO L424 AbstractCegarLoop]: === Iteration 2 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-10 10:25:53,243 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 10:25:53,243 INFO L82 PathProgramCache]: Analyzing trace with hash -1058783719, now seen corresponding path program 1 times [2018-11-10 10:25:53,244 INFO L225 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-10 10:25:53,244 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-10 10:25:53,244 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 10:25:53,245 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 10:25:53,245 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 10:25:53,254 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 10:25:53,272 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 10:25:53,273 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-10 10:25:53,273 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-10 10:25:53,274 INFO L460 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-10 10:25:53,274 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-10 10:25:53,274 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-10 10:25:53,274 INFO L87 Difference]: Start difference. First operand 182 states and 314 transitions. Second operand 3 states. [2018-11-10 10:25:53,306 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 10:25:53,306 INFO L93 Difference]: Finished difference Result 365 states and 632 transitions. [2018-11-10 10:25:53,306 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-10 10:25:53,306 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 15 [2018-11-10 10:25:53,307 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 10:25:53,308 INFO L225 Difference]: With dead ends: 365 [2018-11-10 10:25:53,308 INFO L226 Difference]: Without dead ends: 189 [2018-11-10 10:25:53,309 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-10 10:25:53,309 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 189 states. [2018-11-10 10:25:53,317 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 189 to 189. [2018-11-10 10:25:53,318 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 189 states. [2018-11-10 10:25:53,319 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 189 states to 189 states and 322 transitions. [2018-11-10 10:25:53,319 INFO L78 Accepts]: Start accepts. Automaton has 189 states and 322 transitions. Word has length 15 [2018-11-10 10:25:53,319 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 10:25:53,319 INFO L481 AbstractCegarLoop]: Abstraction has 189 states and 322 transitions. [2018-11-10 10:25:53,319 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-10 10:25:53,320 INFO L276 IsEmpty]: Start isEmpty. Operand 189 states and 322 transitions. [2018-11-10 10:25:53,320 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2018-11-10 10:25:53,320 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 10:25:53,320 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 10:25:53,321 INFO L424 AbstractCegarLoop]: === Iteration 3 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-10 10:25:53,321 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 10:25:53,321 INFO L82 PathProgramCache]: Analyzing trace with hash -426524154, now seen corresponding path program 1 times [2018-11-10 10:25:53,321 INFO L225 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-10 10:25:53,321 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-10 10:25:53,322 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 10:25:53,322 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 10:25:53,322 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 10:25:53,346 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 10:25:53,388 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 10:25:53,388 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-10 10:25:53,388 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-10 10:25:53,389 INFO L460 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-10 10:25:53,389 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-10 10:25:53,389 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-10 10:25:53,389 INFO L87 Difference]: Start difference. First operand 189 states and 322 transitions. Second operand 3 states. [2018-11-10 10:25:53,512 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 10:25:53,512 INFO L93 Difference]: Finished difference Result 290 states and 484 transitions. [2018-11-10 10:25:53,513 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-10 10:25:53,513 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 21 [2018-11-10 10:25:53,513 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 10:25:53,514 INFO L225 Difference]: With dead ends: 290 [2018-11-10 10:25:53,514 INFO L226 Difference]: Without dead ends: 274 [2018-11-10 10:25:53,515 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-10 10:25:53,515 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 274 states. [2018-11-10 10:25:53,524 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 274 to 259. [2018-11-10 10:25:53,524 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 259 states. [2018-11-10 10:25:53,526 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 259 states to 259 states and 436 transitions. [2018-11-10 10:25:53,526 INFO L78 Accepts]: Start accepts. Automaton has 259 states and 436 transitions. Word has length 21 [2018-11-10 10:25:53,526 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 10:25:53,526 INFO L481 AbstractCegarLoop]: Abstraction has 259 states and 436 transitions. [2018-11-10 10:25:53,526 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-10 10:25:53,526 INFO L276 IsEmpty]: Start isEmpty. Operand 259 states and 436 transitions. [2018-11-10 10:25:53,527 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2018-11-10 10:25:53,527 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 10:25:53,527 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 10:25:53,527 INFO L424 AbstractCegarLoop]: === Iteration 4 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-10 10:25:53,527 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 10:25:53,528 INFO L82 PathProgramCache]: Analyzing trace with hash -1881066880, now seen corresponding path program 1 times [2018-11-10 10:25:53,528 INFO L225 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-10 10:25:53,528 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-10 10:25:53,528 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 10:25:53,529 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 10:25:53,529 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 10:25:53,540 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 10:25:53,563 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 10:25:53,564 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-10 10:25:53,564 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-10 10:25:53,564 INFO L460 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-10 10:25:53,564 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-10 10:25:53,565 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-10 10:25:53,565 INFO L87 Difference]: Start difference. First operand 259 states and 436 transitions. Second operand 3 states. [2018-11-10 10:25:53,600 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 10:25:53,600 INFO L93 Difference]: Finished difference Result 468 states and 791 transitions. [2018-11-10 10:25:53,601 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-10 10:25:53,601 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 22 [2018-11-10 10:25:53,601 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 10:25:53,602 INFO L225 Difference]: With dead ends: 468 [2018-11-10 10:25:53,602 INFO L226 Difference]: Without dead ends: 216 [2018-11-10 10:25:53,603 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-10 10:25:53,604 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 216 states. [2018-11-10 10:25:53,610 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 216 to 214. [2018-11-10 10:25:53,610 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 214 states. [2018-11-10 10:25:53,611 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 214 states to 214 states and 355 transitions. [2018-11-10 10:25:53,611 INFO L78 Accepts]: Start accepts. Automaton has 214 states and 355 transitions. Word has length 22 [2018-11-10 10:25:53,611 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 10:25:53,612 INFO L481 AbstractCegarLoop]: Abstraction has 214 states and 355 transitions. [2018-11-10 10:25:53,612 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-10 10:25:53,612 INFO L276 IsEmpty]: Start isEmpty. Operand 214 states and 355 transitions. [2018-11-10 10:25:53,613 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2018-11-10 10:25:53,613 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 10:25:53,613 INFO L375 BasicCegarLoop]: trace histogram [3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 10:25:53,613 INFO L424 AbstractCegarLoop]: === Iteration 5 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-10 10:25:53,613 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 10:25:53,614 INFO L82 PathProgramCache]: Analyzing trace with hash 30525515, now seen corresponding path program 1 times [2018-11-10 10:25:53,614 INFO L225 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-10 10:25:53,614 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-10 10:25:53,615 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 10:25:53,615 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 10:25:53,615 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 10:25:53,631 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 10:25:53,673 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 11 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 10:25:53,673 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-10 10:25:53,674 INFO L225 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_b82e135f-7e7c-47f8-a9b2-5ad19e9c9134/bin-2019/uautomizer/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-10 10:25:53,681 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 10:25:53,713 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 10:25:53,718 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 10:25:53,740 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 10 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-11-10 10:25:53,758 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-11-10 10:25:53,758 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [4] total 5 [2018-11-10 10:25:53,759 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-10 10:25:53,759 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-10 10:25:53,759 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2018-11-10 10:25:53,759 INFO L87 Difference]: Start difference. First operand 214 states and 355 transitions. Second operand 5 states. [2018-11-10 10:25:53,975 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 10:25:53,975 INFO L93 Difference]: Finished difference Result 498 states and 813 transitions. [2018-11-10 10:25:53,975 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-10 10:25:53,975 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 28 [2018-11-10 10:25:53,975 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 10:25:53,976 INFO L225 Difference]: With dead ends: 498 [2018-11-10 10:25:53,976 INFO L226 Difference]: Without dead ends: 288 [2018-11-10 10:25:53,977 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 35 GetRequests, 30 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2018-11-10 10:25:53,978 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 288 states. [2018-11-10 10:25:53,985 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 288 to 245. [2018-11-10 10:25:53,985 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 245 states. [2018-11-10 10:25:53,986 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 245 states to 245 states and 408 transitions. [2018-11-10 10:25:53,987 INFO L78 Accepts]: Start accepts. Automaton has 245 states and 408 transitions. Word has length 28 [2018-11-10 10:25:53,987 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 10:25:53,987 INFO L481 AbstractCegarLoop]: Abstraction has 245 states and 408 transitions. [2018-11-10 10:25:53,987 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-10 10:25:53,987 INFO L276 IsEmpty]: Start isEmpty. Operand 245 states and 408 transitions. [2018-11-10 10:25:53,988 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2018-11-10 10:25:53,988 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 10:25:53,988 INFO L375 BasicCegarLoop]: trace histogram [3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 10:25:53,988 INFO L424 AbstractCegarLoop]: === Iteration 6 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-10 10:25:53,988 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 10:25:53,989 INFO L82 PathProgramCache]: Analyzing trace with hash 2061294478, now seen corresponding path program 1 times [2018-11-10 10:25:53,989 INFO L225 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-10 10:25:53,989 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-10 10:25:53,989 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 10:25:53,990 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 10:25:53,990 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 10:25:54,004 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 10:25:54,050 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 6 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 10:25:54,050 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-10 10:25:54,050 INFO L225 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_b82e135f-7e7c-47f8-a9b2-5ad19e9c9134/bin-2019/uautomizer/z3 Starting monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-10 10:25:54,058 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 10:25:54,082 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 10:25:54,088 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 10:25:54,101 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 6 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 10:25:54,118 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-10 10:25:54,118 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4] total 5 [2018-11-10 10:25:54,118 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-10 10:25:54,118 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-10 10:25:54,119 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2018-11-10 10:25:54,119 INFO L87 Difference]: Start difference. First operand 245 states and 408 transitions. Second operand 5 states. [2018-11-10 10:25:54,223 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 10:25:54,223 INFO L93 Difference]: Finished difference Result 464 states and 780 transitions. [2018-11-10 10:25:54,223 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-10 10:25:54,223 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 30 [2018-11-10 10:25:54,223 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 10:25:54,225 INFO L225 Difference]: With dead ends: 464 [2018-11-10 10:25:54,225 INFO L226 Difference]: Without dead ends: 452 [2018-11-10 10:25:54,225 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 33 GetRequests, 30 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2018-11-10 10:25:54,226 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 452 states. [2018-11-10 10:25:54,232 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 452 to 438. [2018-11-10 10:25:54,233 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 438 states. [2018-11-10 10:25:54,234 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 438 states to 438 states and 730 transitions. [2018-11-10 10:25:54,234 INFO L78 Accepts]: Start accepts. Automaton has 438 states and 730 transitions. Word has length 30 [2018-11-10 10:25:54,234 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 10:25:54,234 INFO L481 AbstractCegarLoop]: Abstraction has 438 states and 730 transitions. [2018-11-10 10:25:54,234 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-10 10:25:54,234 INFO L276 IsEmpty]: Start isEmpty. Operand 438 states and 730 transitions. [2018-11-10 10:25:54,235 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2018-11-10 10:25:54,235 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 10:25:54,235 INFO L375 BasicCegarLoop]: trace histogram [3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 10:25:54,235 INFO L424 AbstractCegarLoop]: === Iteration 7 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-10 10:25:54,235 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 10:25:54,236 INFO L82 PathProgramCache]: Analyzing trace with hash -512937066, now seen corresponding path program 1 times [2018-11-10 10:25:54,236 INFO L225 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-10 10:25:54,236 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-10 10:25:54,236 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 10:25:54,236 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 10:25:54,236 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 10:25:54,249 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 10:25:54,299 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 6 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 10:25:54,300 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-10 10:25:54,300 INFO L225 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_b82e135f-7e7c-47f8-a9b2-5ad19e9c9134/bin-2019/uautomizer/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-10 10:25:54,311 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 10:25:54,333 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 10:25:54,335 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 10:25:54,366 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 6 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 10:25:54,382 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-10 10:25:54,383 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4] total 5 [2018-11-10 10:25:54,383 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-10 10:25:54,383 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-10 10:25:54,383 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2018-11-10 10:25:54,383 INFO L87 Difference]: Start difference. First operand 438 states and 730 transitions. Second operand 5 states. [2018-11-10 10:25:54,463 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 10:25:54,463 INFO L93 Difference]: Finished difference Result 495 states and 817 transitions. [2018-11-10 10:25:54,464 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-10 10:25:54,464 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 31 [2018-11-10 10:25:54,464 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 10:25:54,465 INFO L225 Difference]: With dead ends: 495 [2018-11-10 10:25:54,465 INFO L226 Difference]: Without dead ends: 490 [2018-11-10 10:25:54,466 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 34 GetRequests, 30 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2018-11-10 10:25:54,466 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 490 states. [2018-11-10 10:25:54,473 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 490 to 484. [2018-11-10 10:25:54,473 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 484 states. [2018-11-10 10:25:54,475 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 484 states to 484 states and 802 transitions. [2018-11-10 10:25:54,475 INFO L78 Accepts]: Start accepts. Automaton has 484 states and 802 transitions. Word has length 31 [2018-11-10 10:25:54,475 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 10:25:54,475 INFO L481 AbstractCegarLoop]: Abstraction has 484 states and 802 transitions. [2018-11-10 10:25:54,475 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-10 10:25:54,475 INFO L276 IsEmpty]: Start isEmpty. Operand 484 states and 802 transitions. [2018-11-10 10:25:54,476 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-11-10 10:25:54,476 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 10:25:54,476 INFO L375 BasicCegarLoop]: trace histogram [3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 10:25:54,476 INFO L424 AbstractCegarLoop]: === Iteration 8 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-10 10:25:54,477 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 10:25:54,477 INFO L82 PathProgramCache]: Analyzing trace with hash 325020427, now seen corresponding path program 1 times [2018-11-10 10:25:54,477 INFO L225 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-10 10:25:54,477 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-10 10:25:54,478 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 10:25:54,478 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 10:25:54,478 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 10:25:54,485 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 10:25:54,503 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 7 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-11-10 10:25:54,504 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-10 10:25:54,504 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-10 10:25:54,504 INFO L460 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-10 10:25:54,504 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-10 10:25:54,504 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-10 10:25:54,505 INFO L87 Difference]: Start difference. First operand 484 states and 802 transitions. Second operand 3 states. [2018-11-10 10:25:54,528 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 10:25:54,529 INFO L93 Difference]: Finished difference Result 949 states and 1566 transitions. [2018-11-10 10:25:54,529 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-10 10:25:54,529 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 32 [2018-11-10 10:25:54,530 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 10:25:54,531 INFO L225 Difference]: With dead ends: 949 [2018-11-10 10:25:54,531 INFO L226 Difference]: Without dead ends: 495 [2018-11-10 10:25:54,532 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-10 10:25:54,533 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 495 states. [2018-11-10 10:25:54,543 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 495 to 493. [2018-11-10 10:25:54,543 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 493 states. [2018-11-10 10:25:54,545 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 493 states to 493 states and 794 transitions. [2018-11-10 10:25:54,546 INFO L78 Accepts]: Start accepts. Automaton has 493 states and 794 transitions. Word has length 32 [2018-11-10 10:25:54,546 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 10:25:54,546 INFO L481 AbstractCegarLoop]: Abstraction has 493 states and 794 transitions. [2018-11-10 10:25:54,546 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-10 10:25:54,546 INFO L276 IsEmpty]: Start isEmpty. Operand 493 states and 794 transitions. [2018-11-10 10:25:54,547 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2018-11-10 10:25:54,547 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 10:25:54,547 INFO L375 BasicCegarLoop]: trace histogram [4, 4, 3, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 10:25:54,547 INFO L424 AbstractCegarLoop]: === Iteration 9 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-10 10:25:54,548 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 10:25:54,548 INFO L82 PathProgramCache]: Analyzing trace with hash 2019699710, now seen corresponding path program 1 times [2018-11-10 10:25:54,548 INFO L225 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-10 10:25:54,548 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-10 10:25:54,548 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 10:25:54,549 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 10:25:54,549 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 10:25:54,559 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 10:25:54,597 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 14 proven. 0 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-11-10 10:25:54,597 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-10 10:25:54,597 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-10 10:25:54,598 INFO L460 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-10 10:25:54,598 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-10 10:25:54,598 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-10 10:25:54,598 INFO L87 Difference]: Start difference. First operand 493 states and 794 transitions. Second operand 3 states. [2018-11-10 10:25:54,632 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 10:25:54,632 INFO L93 Difference]: Finished difference Result 939 states and 1525 transitions. [2018-11-10 10:25:54,633 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-10 10:25:54,633 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 40 [2018-11-10 10:25:54,633 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 10:25:54,635 INFO L225 Difference]: With dead ends: 939 [2018-11-10 10:25:54,635 INFO L226 Difference]: Without dead ends: 495 [2018-11-10 10:25:54,636 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-10 10:25:54,636 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 495 states. [2018-11-10 10:25:54,644 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 495 to 493. [2018-11-10 10:25:54,645 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 493 states. [2018-11-10 10:25:54,646 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 493 states to 493 states and 788 transitions. [2018-11-10 10:25:54,646 INFO L78 Accepts]: Start accepts. Automaton has 493 states and 788 transitions. Word has length 40 [2018-11-10 10:25:54,647 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 10:25:54,647 INFO L481 AbstractCegarLoop]: Abstraction has 493 states and 788 transitions. [2018-11-10 10:25:54,647 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-10 10:25:54,647 INFO L276 IsEmpty]: Start isEmpty. Operand 493 states and 788 transitions. [2018-11-10 10:25:54,648 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2018-11-10 10:25:54,648 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 10:25:54,648 INFO L375 BasicCegarLoop]: trace histogram [4, 4, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 10:25:54,648 INFO L424 AbstractCegarLoop]: === Iteration 10 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-10 10:25:54,648 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 10:25:54,648 INFO L82 PathProgramCache]: Analyzing trace with hash 937434793, now seen corresponding path program 1 times [2018-11-10 10:25:54,648 INFO L225 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-10 10:25:54,648 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-10 10:25:54,649 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 10:25:54,649 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 10:25:54,649 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 10:25:54,658 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 10:25:54,758 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 14 proven. 8 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2018-11-10 10:25:54,758 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-10 10:25:54,758 INFO L225 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_b82e135f-7e7c-47f8-a9b2-5ad19e9c9134/bin-2019/uautomizer/z3 Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-10 10:25:54,767 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 10:25:54,797 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 10:25:54,800 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 10:25:54,832 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 9 proven. 8 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-11-10 10:25:54,858 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-10 10:25:54,859 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 5] total 7 [2018-11-10 10:25:54,859 INFO L460 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-11-10 10:25:54,859 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-11-10 10:25:54,859 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=26, Unknown=0, NotChecked=0, Total=42 [2018-11-10 10:25:54,859 INFO L87 Difference]: Start difference. First operand 493 states and 788 transitions. Second operand 7 states. [2018-11-10 10:25:55,134 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 10:25:55,134 INFO L93 Difference]: Finished difference Result 1026 states and 1635 transitions. [2018-11-10 10:25:55,135 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-10 10:25:55,135 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 41 [2018-11-10 10:25:55,136 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 10:25:55,137 INFO L225 Difference]: With dead ends: 1026 [2018-11-10 10:25:55,137 INFO L226 Difference]: Without dead ends: 575 [2018-11-10 10:25:55,140 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 49 GetRequests, 42 SyntacticMatches, 1 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=20, Invalid=36, Unknown=0, NotChecked=0, Total=56 [2018-11-10 10:25:55,140 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 575 states. [2018-11-10 10:25:55,151 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 575 to 544. [2018-11-10 10:25:55,151 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 544 states. [2018-11-10 10:25:55,152 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 544 states to 544 states and 867 transitions. [2018-11-10 10:25:55,153 INFO L78 Accepts]: Start accepts. Automaton has 544 states and 867 transitions. Word has length 41 [2018-11-10 10:25:55,153 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 10:25:55,153 INFO L481 AbstractCegarLoop]: Abstraction has 544 states and 867 transitions. [2018-11-10 10:25:55,153 INFO L482 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-11-10 10:25:55,153 INFO L276 IsEmpty]: Start isEmpty. Operand 544 states and 867 transitions. [2018-11-10 10:25:55,153 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-11-10 10:25:55,153 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 10:25:55,154 INFO L375 BasicCegarLoop]: trace histogram [4, 4, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 10:25:55,154 INFO L424 AbstractCegarLoop]: === Iteration 11 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-10 10:25:55,154 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 10:25:55,154 INFO L82 PathProgramCache]: Analyzing trace with hash -992845957, now seen corresponding path program 1 times [2018-11-10 10:25:55,154 INFO L225 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-10 10:25:55,154 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-10 10:25:55,155 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 10:25:55,155 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 10:25:55,155 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 10:25:55,164 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 10:25:55,201 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 9 proven. 10 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-11-10 10:25:55,202 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-10 10:25:55,202 INFO L225 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_b82e135f-7e7c-47f8-a9b2-5ad19e9c9134/bin-2019/uautomizer/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-10 10:25:55,212 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 10:25:55,245 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 10:25:55,248 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 10:25:55,267 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 9 proven. 10 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-11-10 10:25:55,283 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-10 10:25:55,283 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4] total 4 [2018-11-10 10:25:55,283 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-10 10:25:55,283 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-10 10:25:55,284 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-10 10:25:55,284 INFO L87 Difference]: Start difference. First operand 544 states and 867 transitions. Second operand 4 states. [2018-11-10 10:25:55,354 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 10:25:55,354 INFO L93 Difference]: Finished difference Result 558 states and 879 transitions. [2018-11-10 10:25:55,355 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-10 10:25:55,355 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 42 [2018-11-10 10:25:55,355 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 10:25:55,356 INFO L225 Difference]: With dead ends: 558 [2018-11-10 10:25:55,357 INFO L226 Difference]: Without dead ends: 546 [2018-11-10 10:25:55,357 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 46 GetRequests, 41 SyntacticMatches, 3 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-10 10:25:55,357 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 546 states. [2018-11-10 10:25:55,364 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 546 to 544. [2018-11-10 10:25:55,364 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 544 states. [2018-11-10 10:25:55,366 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 544 states to 544 states and 841 transitions. [2018-11-10 10:25:55,366 INFO L78 Accepts]: Start accepts. Automaton has 544 states and 841 transitions. Word has length 42 [2018-11-10 10:25:55,366 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 10:25:55,366 INFO L481 AbstractCegarLoop]: Abstraction has 544 states and 841 transitions. [2018-11-10 10:25:55,366 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-10 10:25:55,366 INFO L276 IsEmpty]: Start isEmpty. Operand 544 states and 841 transitions. [2018-11-10 10:25:55,366 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2018-11-10 10:25:55,367 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 10:25:55,367 INFO L375 BasicCegarLoop]: trace histogram [4, 4, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 10:25:55,367 INFO L424 AbstractCegarLoop]: === Iteration 12 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-10 10:25:55,367 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 10:25:55,367 INFO L82 PathProgramCache]: Analyzing trace with hash -275920596, now seen corresponding path program 1 times [2018-11-10 10:25:55,367 INFO L225 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-10 10:25:55,367 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-10 10:25:55,368 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 10:25:55,368 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 10:25:55,368 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 10:25:55,391 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 10:25:55,464 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 9 proven. 14 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 10:25:55,465 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-10 10:25:55,465 INFO L225 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_b82e135f-7e7c-47f8-a9b2-5ad19e9c9134/bin-2019/uautomizer/z3 Starting monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-10 10:25:55,479 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 10:25:55,506 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 10:25:55,509 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 10:25:55,583 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 9 proven. 14 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 10:25:55,610 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-10 10:25:55,610 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 5 [2018-11-10 10:25:55,610 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-10 10:25:55,611 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-10 10:25:55,611 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-10 10:25:55,611 INFO L87 Difference]: Start difference. First operand 544 states and 841 transitions. Second operand 5 states. [2018-11-10 10:25:55,714 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 10:25:55,714 INFO L93 Difference]: Finished difference Result 553 states and 848 transitions. [2018-11-10 10:25:55,715 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-10 10:25:55,715 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 44 [2018-11-10 10:25:55,715 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 10:25:55,716 INFO L225 Difference]: With dead ends: 553 [2018-11-10 10:25:55,717 INFO L226 Difference]: Without dead ends: 551 [2018-11-10 10:25:55,717 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 49 GetRequests, 43 SyntacticMatches, 3 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-10 10:25:55,718 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 551 states. [2018-11-10 10:25:55,729 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 551 to 545. [2018-11-10 10:25:55,729 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 545 states. [2018-11-10 10:25:55,730 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 545 states to 545 states and 842 transitions. [2018-11-10 10:25:55,730 INFO L78 Accepts]: Start accepts. Automaton has 545 states and 842 transitions. Word has length 44 [2018-11-10 10:25:55,731 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 10:25:55,731 INFO L481 AbstractCegarLoop]: Abstraction has 545 states and 842 transitions. [2018-11-10 10:25:55,731 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-10 10:25:55,731 INFO L276 IsEmpty]: Start isEmpty. Operand 545 states and 842 transitions. [2018-11-10 10:25:55,731 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 46 [2018-11-10 10:25:55,731 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 10:25:55,731 INFO L375 BasicCegarLoop]: trace histogram [4, 4, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 10:25:55,732 INFO L424 AbstractCegarLoop]: === Iteration 13 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-10 10:25:55,732 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 10:25:55,732 INFO L82 PathProgramCache]: Analyzing trace with hash 161633879, now seen corresponding path program 1 times [2018-11-10 10:25:55,732 INFO L225 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-10 10:25:55,732 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-10 10:25:55,733 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 10:25:55,733 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 10:25:55,733 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 10:25:55,742 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 10:25:55,776 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 13 proven. 0 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-11-10 10:25:55,776 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-10 10:25:55,776 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-10 10:25:55,776 INFO L460 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-10 10:25:55,777 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-10 10:25:55,777 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-10 10:25:55,777 INFO L87 Difference]: Start difference. First operand 545 states and 842 transitions. Second operand 3 states. [2018-11-10 10:25:55,806 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 10:25:55,806 INFO L93 Difference]: Finished difference Result 1053 states and 1621 transitions. [2018-11-10 10:25:55,807 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-10 10:25:55,807 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 45 [2018-11-10 10:25:55,807 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 10:25:55,809 INFO L225 Difference]: With dead ends: 1053 [2018-11-10 10:25:55,809 INFO L226 Difference]: Without dead ends: 557 [2018-11-10 10:25:55,810 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-10 10:25:55,810 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 557 states. [2018-11-10 10:25:55,823 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 557 to 555. [2018-11-10 10:25:55,823 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 555 states. [2018-11-10 10:25:55,824 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 555 states to 555 states and 835 transitions. [2018-11-10 10:25:55,824 INFO L78 Accepts]: Start accepts. Automaton has 555 states and 835 transitions. Word has length 45 [2018-11-10 10:25:55,824 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 10:25:55,825 INFO L481 AbstractCegarLoop]: Abstraction has 555 states and 835 transitions. [2018-11-10 10:25:55,825 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-10 10:25:55,825 INFO L276 IsEmpty]: Start isEmpty. Operand 555 states and 835 transitions. [2018-11-10 10:25:55,825 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2018-11-10 10:25:55,825 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 10:25:55,825 INFO L375 BasicCegarLoop]: trace histogram [5, 4, 4, 3, 3, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 10:25:55,826 INFO L424 AbstractCegarLoop]: === Iteration 14 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-10 10:25:55,826 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 10:25:55,826 INFO L82 PathProgramCache]: Analyzing trace with hash 1614817955, now seen corresponding path program 1 times [2018-11-10 10:25:55,826 INFO L225 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-10 10:25:55,826 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-10 10:25:55,827 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 10:25:55,827 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 10:25:55,827 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 10:25:55,837 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 10:25:55,857 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 22 proven. 0 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2018-11-10 10:25:55,857 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-10 10:25:55,857 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-10 10:25:55,858 INFO L460 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-10 10:25:55,858 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-10 10:25:55,858 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-10 10:25:55,858 INFO L87 Difference]: Start difference. First operand 555 states and 835 transitions. Second operand 3 states. [2018-11-10 10:25:55,882 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 10:25:55,882 INFO L93 Difference]: Finished difference Result 799 states and 1202 transitions. [2018-11-10 10:25:55,882 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-10 10:25:55,882 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 55 [2018-11-10 10:25:55,883 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 10:25:55,884 INFO L225 Difference]: With dead ends: 799 [2018-11-10 10:25:55,884 INFO L226 Difference]: Without dead ends: 313 [2018-11-10 10:25:55,885 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-10 10:25:55,885 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 313 states. [2018-11-10 10:25:55,892 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 313 to 311. [2018-11-10 10:25:55,892 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 311 states. [2018-11-10 10:25:55,893 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 311 states to 311 states and 454 transitions. [2018-11-10 10:25:55,893 INFO L78 Accepts]: Start accepts. Automaton has 311 states and 454 transitions. Word has length 55 [2018-11-10 10:25:55,893 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 10:25:55,893 INFO L481 AbstractCegarLoop]: Abstraction has 311 states and 454 transitions. [2018-11-10 10:25:55,893 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-10 10:25:55,893 INFO L276 IsEmpty]: Start isEmpty. Operand 311 states and 454 transitions. [2018-11-10 10:25:55,894 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2018-11-10 10:25:55,894 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 10:25:55,894 INFO L375 BasicCegarLoop]: trace histogram [5, 4, 4, 3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 10:25:55,894 INFO L424 AbstractCegarLoop]: === Iteration 15 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-10 10:25:55,894 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 10:25:55,894 INFO L82 PathProgramCache]: Analyzing trace with hash 1860919614, now seen corresponding path program 1 times [2018-11-10 10:25:55,894 INFO L225 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-10 10:25:55,894 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-10 10:25:55,895 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 10:25:55,895 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 10:25:55,895 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 10:25:55,904 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 10:25:55,932 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 23 proven. 14 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-11-10 10:25:55,932 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-10 10:25:55,932 INFO L225 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_b82e135f-7e7c-47f8-a9b2-5ad19e9c9134/bin-2019/uautomizer/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-10 10:25:55,940 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 10:25:55,977 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 10:25:55,979 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 10:25:55,985 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 23 proven. 14 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-11-10 10:25:56,011 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-10 10:25:56,011 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 5 [2018-11-10 10:25:56,011 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-10 10:25:56,012 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-10 10:25:56,012 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2018-11-10 10:25:56,012 INFO L87 Difference]: Start difference. First operand 311 states and 454 transitions. Second operand 5 states. [2018-11-10 10:25:56,133 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 10:25:56,133 INFO L93 Difference]: Finished difference Result 660 states and 968 transitions. [2018-11-10 10:25:56,134 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-10 10:25:56,134 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 56 [2018-11-10 10:25:56,134 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 10:25:56,135 INFO L225 Difference]: With dead ends: 660 [2018-11-10 10:25:56,135 INFO L226 Difference]: Without dead ends: 418 [2018-11-10 10:25:56,137 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 61 GetRequests, 58 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2018-11-10 10:25:56,137 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 418 states. [2018-11-10 10:25:56,146 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 418 to 389. [2018-11-10 10:25:56,146 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 389 states. [2018-11-10 10:25:56,147 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 389 states to 389 states and 573 transitions. [2018-11-10 10:25:56,147 INFO L78 Accepts]: Start accepts. Automaton has 389 states and 573 transitions. Word has length 56 [2018-11-10 10:25:56,148 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 10:25:56,148 INFO L481 AbstractCegarLoop]: Abstraction has 389 states and 573 transitions. [2018-11-10 10:25:56,148 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-10 10:25:56,148 INFO L276 IsEmpty]: Start isEmpty. Operand 389 states and 573 transitions. [2018-11-10 10:25:56,148 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2018-11-10 10:25:56,148 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 10:25:56,148 INFO L375 BasicCegarLoop]: trace histogram [5, 5, 4, 3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 10:25:56,149 INFO L424 AbstractCegarLoop]: === Iteration 16 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-10 10:25:56,149 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 10:25:56,149 INFO L82 PathProgramCache]: Analyzing trace with hash 2119085052, now seen corresponding path program 1 times [2018-11-10 10:25:56,149 INFO L225 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-10 10:25:56,149 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-10 10:25:56,150 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 10:25:56,150 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 10:25:56,150 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 10:25:56,160 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 10:25:56,216 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 12 proven. 25 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-11-10 10:25:56,216 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-10 10:25:56,216 INFO L225 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_b82e135f-7e7c-47f8-a9b2-5ad19e9c9134/bin-2019/uautomizer/z3 Starting monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-10 10:25:56,224 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 10:25:56,268 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 10:25:56,271 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 10:25:56,297 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 12 proven. 25 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-11-10 10:25:56,313 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-10 10:25:56,313 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 5 [2018-11-10 10:25:56,313 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-10 10:25:56,314 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-10 10:25:56,314 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-10 10:25:56,314 INFO L87 Difference]: Start difference. First operand 389 states and 573 transitions. Second operand 5 states. [2018-11-10 10:25:56,372 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 10:25:56,372 INFO L93 Difference]: Finished difference Result 436 states and 639 transitions. [2018-11-10 10:25:56,372 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-10 10:25:56,372 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 56 [2018-11-10 10:25:56,372 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 10:25:56,373 INFO L225 Difference]: With dead ends: 436 [2018-11-10 10:25:56,373 INFO L226 Difference]: Without dead ends: 430 [2018-11-10 10:25:56,374 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 61 GetRequests, 57 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-10 10:25:56,374 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 430 states. [2018-11-10 10:25:56,381 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 430 to 427. [2018-11-10 10:25:56,381 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 427 states. [2018-11-10 10:25:56,382 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 427 states to 427 states and 627 transitions. [2018-11-10 10:25:56,382 INFO L78 Accepts]: Start accepts. Automaton has 427 states and 627 transitions. Word has length 56 [2018-11-10 10:25:56,382 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 10:25:56,382 INFO L481 AbstractCegarLoop]: Abstraction has 427 states and 627 transitions. [2018-11-10 10:25:56,382 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-10 10:25:56,383 INFO L276 IsEmpty]: Start isEmpty. Operand 427 states and 627 transitions. [2018-11-10 10:25:56,383 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2018-11-10 10:25:56,383 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 10:25:56,383 INFO L375 BasicCegarLoop]: trace histogram [5, 5, 4, 3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 10:25:56,383 INFO L424 AbstractCegarLoop]: === Iteration 17 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-10 10:25:56,384 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 10:25:56,384 INFO L82 PathProgramCache]: Analyzing trace with hash 807144158, now seen corresponding path program 1 times [2018-11-10 10:25:56,384 INFO L225 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-10 10:25:56,384 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-10 10:25:56,385 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 10:25:56,385 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 10:25:56,385 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 10:25:56,403 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 10:25:56,501 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 12 proven. 31 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 10:25:56,501 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-10 10:25:56,501 INFO L225 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_b82e135f-7e7c-47f8-a9b2-5ad19e9c9134/bin-2019/uautomizer/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-10 10:25:56,512 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 10:25:56,550 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 10:25:56,553 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 10:25:56,601 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 12 proven. 31 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 10:25:56,617 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-10 10:25:56,617 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 6] total 10 [2018-11-10 10:25:56,618 INFO L460 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-11-10 10:25:56,618 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-11-10 10:25:56,618 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=68, Unknown=0, NotChecked=0, Total=90 [2018-11-10 10:25:56,618 INFO L87 Difference]: Start difference. First operand 427 states and 627 transitions. Second operand 10 states. [2018-11-10 10:25:56,737 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 10:25:56,737 INFO L93 Difference]: Finished difference Result 430 states and 629 transitions. [2018-11-10 10:25:56,737 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-10 10:25:56,737 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 60 [2018-11-10 10:25:56,738 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 10:25:56,739 INFO L225 Difference]: With dead ends: 430 [2018-11-10 10:25:56,739 INFO L226 Difference]: Without dead ends: 428 [2018-11-10 10:25:56,739 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 68 GetRequests, 57 SyntacticMatches, 2 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=27, Invalid=83, Unknown=0, NotChecked=0, Total=110 [2018-11-10 10:25:56,739 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 428 states. [2018-11-10 10:25:56,745 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 428 to 427. [2018-11-10 10:25:56,745 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 427 states. [2018-11-10 10:25:56,746 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 427 states to 427 states and 626 transitions. [2018-11-10 10:25:56,746 INFO L78 Accepts]: Start accepts. Automaton has 427 states and 626 transitions. Word has length 60 [2018-11-10 10:25:56,746 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 10:25:56,746 INFO L481 AbstractCegarLoop]: Abstraction has 427 states and 626 transitions. [2018-11-10 10:25:56,746 INFO L482 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-11-10 10:25:56,746 INFO L276 IsEmpty]: Start isEmpty. Operand 427 states and 626 transitions. [2018-11-10 10:25:56,747 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2018-11-10 10:25:56,747 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 10:25:56,747 INFO L375 BasicCegarLoop]: trace histogram [6, 6, 5, 3, 3, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 10:25:56,747 INFO L424 AbstractCegarLoop]: === Iteration 18 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-10 10:25:56,747 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 10:25:56,748 INFO L82 PathProgramCache]: Analyzing trace with hash -743255307, now seen corresponding path program 1 times [2018-11-10 10:25:56,748 INFO L225 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-10 10:25:56,748 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-10 10:25:56,748 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 10:25:56,748 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 10:25:56,748 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 10:25:56,778 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 10:25:56,902 INFO L134 CoverageAnalysis]: Checked inductivity of 65 backedges. 15 proven. 50 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 10:25:56,902 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-10 10:25:56,902 INFO L225 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_b82e135f-7e7c-47f8-a9b2-5ad19e9c9134/bin-2019/uautomizer/z3 Starting monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-10 10:25:56,908 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 10:25:56,936 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 10:25:56,938 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 10:25:56,983 INFO L134 CoverageAnalysis]: Checked inductivity of 65 backedges. 15 proven. 50 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 10:25:56,999 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-10 10:25:56,999 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8] total 9 [2018-11-10 10:25:56,999 INFO L460 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-11-10 10:25:56,999 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-11-10 10:25:56,999 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=55, Unknown=0, NotChecked=0, Total=72 [2018-11-10 10:25:56,999 INFO L87 Difference]: Start difference. First operand 427 states and 626 transitions. Second operand 9 states. [2018-11-10 10:25:57,135 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 10:25:57,135 INFO L93 Difference]: Finished difference Result 431 states and 630 transitions. [2018-11-10 10:25:57,136 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-11-10 10:25:57,136 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 67 [2018-11-10 10:25:57,136 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 10:25:57,137 INFO L225 Difference]: With dead ends: 431 [2018-11-10 10:25:57,137 INFO L226 Difference]: Without dead ends: 429 [2018-11-10 10:25:57,138 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 76 GetRequests, 63 SyntacticMatches, 5 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=21, Invalid=69, Unknown=0, NotChecked=0, Total=90 [2018-11-10 10:25:57,138 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 429 states. [2018-11-10 10:25:57,146 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 429 to 428. [2018-11-10 10:25:57,147 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 428 states. [2018-11-10 10:25:57,148 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 428 states to 428 states and 627 transitions. [2018-11-10 10:25:57,148 INFO L78 Accepts]: Start accepts. Automaton has 428 states and 627 transitions. Word has length 67 [2018-11-10 10:25:57,148 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 10:25:57,148 INFO L481 AbstractCegarLoop]: Abstraction has 428 states and 627 transitions. [2018-11-10 10:25:57,148 INFO L482 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-11-10 10:25:57,148 INFO L276 IsEmpty]: Start isEmpty. Operand 428 states and 627 transitions. [2018-11-10 10:25:57,149 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 78 [2018-11-10 10:25:57,149 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 10:25:57,149 INFO L375 BasicCegarLoop]: trace histogram [7, 6, 6, 4, 4, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 10:25:57,149 INFO L424 AbstractCegarLoop]: === Iteration 19 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-10 10:25:57,149 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 10:25:57,149 INFO L82 PathProgramCache]: Analyzing trace with hash -1746386041, now seen corresponding path program 1 times [2018-11-10 10:25:57,150 INFO L225 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-10 10:25:57,150 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-10 10:25:57,150 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 10:25:57,150 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 10:25:57,150 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 10:25:57,161 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 10:25:57,210 INFO L134 CoverageAnalysis]: Checked inductivity of 98 backedges. 38 proven. 50 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-11-10 10:25:57,210 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-10 10:25:57,211 INFO L225 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_b82e135f-7e7c-47f8-a9b2-5ad19e9c9134/bin-2019/uautomizer/z3 Starting monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-10 10:25:57,218 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 10:25:57,264 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 10:25:57,267 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 10:25:57,274 INFO L134 CoverageAnalysis]: Checked inductivity of 98 backedges. 38 proven. 50 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-11-10 10:25:57,300 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-10 10:25:57,301 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6] total 6 [2018-11-10 10:25:57,301 INFO L460 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-10 10:25:57,301 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-10 10:25:57,301 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=15, Unknown=0, NotChecked=0, Total=30 [2018-11-10 10:25:57,301 INFO L87 Difference]: Start difference. First operand 428 states and 627 transitions. Second operand 6 states. [2018-11-10 10:25:57,451 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 10:25:57,451 INFO L93 Difference]: Finished difference Result 865 states and 1269 transitions. [2018-11-10 10:25:57,451 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-11-10 10:25:57,452 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 77 [2018-11-10 10:25:57,452 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 10:25:57,453 INFO L225 Difference]: With dead ends: 865 [2018-11-10 10:25:57,453 INFO L226 Difference]: Without dead ends: 545 [2018-11-10 10:25:57,454 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 84 GetRequests, 80 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=15, Unknown=0, NotChecked=0, Total=30 [2018-11-10 10:25:57,454 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 545 states. [2018-11-10 10:25:57,465 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 545 to 506. [2018-11-10 10:25:57,465 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 506 states. [2018-11-10 10:25:57,466 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 506 states to 506 states and 746 transitions. [2018-11-10 10:25:57,466 INFO L78 Accepts]: Start accepts. Automaton has 506 states and 746 transitions. Word has length 77 [2018-11-10 10:25:57,466 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 10:25:57,466 INFO L481 AbstractCegarLoop]: Abstraction has 506 states and 746 transitions. [2018-11-10 10:25:57,466 INFO L482 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-10 10:25:57,466 INFO L276 IsEmpty]: Start isEmpty. Operand 506 states and 746 transitions. [2018-11-10 10:25:57,467 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 78 [2018-11-10 10:25:57,467 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 10:25:57,467 INFO L375 BasicCegarLoop]: trace histogram [7, 7, 6, 4, 4, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 10:25:57,467 INFO L424 AbstractCegarLoop]: === Iteration 20 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-10 10:25:57,467 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 10:25:57,468 INFO L82 PathProgramCache]: Analyzing trace with hash -2139413051, now seen corresponding path program 1 times [2018-11-10 10:25:57,468 INFO L225 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-10 10:25:57,468 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-10 10:25:57,468 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 10:25:57,468 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 10:25:57,468 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 10:25:57,481 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 10:25:57,566 INFO L134 CoverageAnalysis]: Checked inductivity of 98 backedges. 18 proven. 80 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 10:25:57,566 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-10 10:25:57,566 INFO L225 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_b82e135f-7e7c-47f8-a9b2-5ad19e9c9134/bin-2019/uautomizer/z3 Starting monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-10 10:25:57,575 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 10:25:57,617 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 10:25:57,619 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 10:25:57,687 INFO L134 CoverageAnalysis]: Checked inductivity of 98 backedges. 18 proven. 70 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-11-10 10:25:57,703 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-10 10:25:57,703 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 7] total 12 [2018-11-10 10:25:57,704 INFO L460 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-11-10 10:25:57,704 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-11-10 10:25:57,704 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=27, Invalid=105, Unknown=0, NotChecked=0, Total=132 [2018-11-10 10:25:57,704 INFO L87 Difference]: Start difference. First operand 506 states and 746 transitions. Second operand 12 states. [2018-11-10 10:25:57,813 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 10:25:57,813 INFO L93 Difference]: Finished difference Result 529 states and 778 transitions. [2018-11-10 10:25:57,813 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-11-10 10:25:57,814 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 77 [2018-11-10 10:25:57,814 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 10:25:57,815 INFO L225 Difference]: With dead ends: 529 [2018-11-10 10:25:57,815 INFO L226 Difference]: Without dead ends: 525 [2018-11-10 10:25:57,816 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 85 GetRequests, 73 SyntacticMatches, 1 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=32, Invalid=124, Unknown=0, NotChecked=0, Total=156 [2018-11-10 10:25:57,816 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 525 states. [2018-11-10 10:25:57,826 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 525 to 525. [2018-11-10 10:25:57,826 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 525 states. [2018-11-10 10:25:57,827 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 525 states to 525 states and 772 transitions. [2018-11-10 10:25:57,827 INFO L78 Accepts]: Start accepts. Automaton has 525 states and 772 transitions. Word has length 77 [2018-11-10 10:25:57,828 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 10:25:57,828 INFO L481 AbstractCegarLoop]: Abstraction has 525 states and 772 transitions. [2018-11-10 10:25:57,828 INFO L482 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-11-10 10:25:57,828 INFO L276 IsEmpty]: Start isEmpty. Operand 525 states and 772 transitions. [2018-11-10 10:25:57,828 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 88 [2018-11-10 10:25:57,828 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 10:25:57,829 INFO L375 BasicCegarLoop]: trace histogram [8, 8, 7, 5, 5, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 10:25:57,829 INFO L424 AbstractCegarLoop]: === Iteration 21 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-10 10:25:57,829 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 10:25:57,829 INFO L82 PathProgramCache]: Analyzing trace with hash -1314627048, now seen corresponding path program 1 times [2018-11-10 10:25:57,829 INFO L225 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-10 10:25:57,829 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-10 10:25:57,830 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 10:25:57,830 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 10:25:57,830 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 10:25:57,844 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 10:25:57,974 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 26 proven. 99 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2018-11-10 10:25:57,975 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-10 10:25:57,975 INFO L225 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_b82e135f-7e7c-47f8-a9b2-5ad19e9c9134/bin-2019/uautomizer/z3 Starting monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-10 10:25:57,983 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 10:25:58,044 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 10:25:58,047 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 10:25:58,126 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 21 proven. 99 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2018-11-10 10:25:58,142 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-10 10:25:58,142 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 7] total 9 [2018-11-10 10:25:58,143 INFO L460 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-11-10 10:25:58,143 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-11-10 10:25:58,143 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=53, Unknown=0, NotChecked=0, Total=72 [2018-11-10 10:25:58,143 INFO L87 Difference]: Start difference. First operand 525 states and 772 transitions. Second operand 9 states. [2018-11-10 10:25:58,270 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 10:25:58,270 INFO L93 Difference]: Finished difference Result 555 states and 810 transitions. [2018-11-10 10:25:58,271 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-11-10 10:25:58,271 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 87 [2018-11-10 10:25:58,271 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 10:25:58,272 INFO L225 Difference]: With dead ends: 555 [2018-11-10 10:25:58,272 INFO L226 Difference]: Without dead ends: 551 [2018-11-10 10:25:58,273 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 99 GetRequests, 90 SyntacticMatches, 1 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=23, Invalid=67, Unknown=0, NotChecked=0, Total=90 [2018-11-10 10:25:58,273 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 551 states. [2018-11-10 10:25:58,279 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 551 to 544. [2018-11-10 10:25:58,279 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 544 states. [2018-11-10 10:25:58,280 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 544 states to 544 states and 798 transitions. [2018-11-10 10:25:58,280 INFO L78 Accepts]: Start accepts. Automaton has 544 states and 798 transitions. Word has length 87 [2018-11-10 10:25:58,281 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 10:25:58,281 INFO L481 AbstractCegarLoop]: Abstraction has 544 states and 798 transitions. [2018-11-10 10:25:58,281 INFO L482 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-11-10 10:25:58,281 INFO L276 IsEmpty]: Start isEmpty. Operand 544 states and 798 transitions. [2018-11-10 10:25:58,281 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 91 [2018-11-10 10:25:58,281 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 10:25:58,282 INFO L375 BasicCegarLoop]: trace histogram [8, 8, 7, 5, 5, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 10:25:58,282 INFO L424 AbstractCegarLoop]: === Iteration 22 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-10 10:25:58,282 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 10:25:58,282 INFO L82 PathProgramCache]: Analyzing trace with hash 233904989, now seen corresponding path program 1 times [2018-11-10 10:25:58,282 INFO L225 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-10 10:25:58,282 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-10 10:25:58,283 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 10:25:58,283 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 10:25:58,283 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 10:25:58,309 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 10:25:58,459 INFO L134 CoverageAnalysis]: Checked inductivity of 141 backedges. 21 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 10:25:58,459 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-10 10:25:58,460 INFO L225 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_b82e135f-7e7c-47f8-a9b2-5ad19e9c9134/bin-2019/uautomizer/z3 Starting monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-10 10:25:58,466 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 10:25:58,508 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 10:25:58,510 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 10:25:58,571 INFO L134 CoverageAnalysis]: Checked inductivity of 141 backedges. 21 proven. 110 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-11-10 10:25:58,588 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-10 10:25:58,588 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 8] total 14 [2018-11-10 10:25:58,588 INFO L460 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-11-10 10:25:58,589 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-11-10 10:25:58,589 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=32, Invalid=150, Unknown=0, NotChecked=0, Total=182 [2018-11-10 10:25:58,589 INFO L87 Difference]: Start difference. First operand 544 states and 798 transitions. Second operand 14 states. [2018-11-10 10:25:58,834 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 10:25:58,834 INFO L93 Difference]: Finished difference Result 549 states and 803 transitions. [2018-11-10 10:25:58,834 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-11-10 10:25:58,835 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 90 [2018-11-10 10:25:58,835 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 10:25:58,836 INFO L225 Difference]: With dead ends: 549 [2018-11-10 10:25:58,836 INFO L226 Difference]: Without dead ends: 547 [2018-11-10 10:25:58,837 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 104 GetRequests, 86 SyntacticMatches, 3 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 22 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=46, Invalid=226, Unknown=0, NotChecked=0, Total=272 [2018-11-10 10:25:58,837 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 547 states. [2018-11-10 10:25:58,843 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 547 to 545. [2018-11-10 10:25:58,843 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 545 states. [2018-11-10 10:25:58,844 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 545 states to 545 states and 799 transitions. [2018-11-10 10:25:58,844 INFO L78 Accepts]: Start accepts. Automaton has 545 states and 799 transitions. Word has length 90 [2018-11-10 10:25:58,844 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 10:25:58,844 INFO L481 AbstractCegarLoop]: Abstraction has 545 states and 799 transitions. [2018-11-10 10:25:58,844 INFO L482 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-11-10 10:25:58,844 INFO L276 IsEmpty]: Start isEmpty. Operand 545 states and 799 transitions. [2018-11-10 10:25:58,845 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 103 [2018-11-10 10:25:58,845 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 10:25:58,845 INFO L375 BasicCegarLoop]: trace histogram [9, 8, 8, 6, 6, 4, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 10:25:58,846 INFO L424 AbstractCegarLoop]: === Iteration 23 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-10 10:25:58,846 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 10:25:58,846 INFO L82 PathProgramCache]: Analyzing trace with hash -1342705169, now seen corresponding path program 1 times [2018-11-10 10:25:58,846 INFO L225 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-10 10:25:58,846 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-10 10:25:58,847 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 10:25:58,847 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 10:25:58,847 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 10:25:58,856 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 10:25:58,893 INFO L134 CoverageAnalysis]: Checked inductivity of 188 backedges. 54 proven. 118 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2018-11-10 10:25:58,893 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-10 10:25:58,893 INFO L225 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_b82e135f-7e7c-47f8-a9b2-5ad19e9c9134/bin-2019/uautomizer/z3 Starting monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-10 10:25:58,915 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 10:25:58,960 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 10:25:58,962 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 10:25:58,970 INFO L134 CoverageAnalysis]: Checked inductivity of 188 backedges. 54 proven. 118 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2018-11-10 10:25:58,986 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-10 10:25:58,987 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 7 [2018-11-10 10:25:58,987 INFO L460 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-11-10 10:25:58,987 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-11-10 10:25:58,987 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=21, Unknown=0, NotChecked=0, Total=42 [2018-11-10 10:25:58,987 INFO L87 Difference]: Start difference. First operand 545 states and 799 transitions. Second operand 7 states. [2018-11-10 10:25:59,099 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 10:25:59,100 INFO L93 Difference]: Finished difference Result 1070 states and 1569 transitions. [2018-11-10 10:25:59,100 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-10 10:25:59,100 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 102 [2018-11-10 10:25:59,101 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 10:25:59,102 INFO L225 Difference]: With dead ends: 1070 [2018-11-10 10:25:59,102 INFO L226 Difference]: Without dead ends: 672 [2018-11-10 10:25:59,103 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 111 GetRequests, 106 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=21, Unknown=0, NotChecked=0, Total=42 [2018-11-10 10:25:59,103 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 672 states. [2018-11-10 10:25:59,110 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 672 to 623. [2018-11-10 10:25:59,110 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 623 states. [2018-11-10 10:25:59,111 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 623 states to 623 states and 918 transitions. [2018-11-10 10:25:59,112 INFO L78 Accepts]: Start accepts. Automaton has 623 states and 918 transitions. Word has length 102 [2018-11-10 10:25:59,112 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 10:25:59,112 INFO L481 AbstractCegarLoop]: Abstraction has 623 states and 918 transitions. [2018-11-10 10:25:59,112 INFO L482 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-11-10 10:25:59,112 INFO L276 IsEmpty]: Start isEmpty. Operand 623 states and 918 transitions. [2018-11-10 10:25:59,113 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 103 [2018-11-10 10:25:59,113 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 10:25:59,113 INFO L375 BasicCegarLoop]: trace histogram [9, 9, 8, 6, 6, 4, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 10:25:59,113 INFO L424 AbstractCegarLoop]: === Iteration 24 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-10 10:25:59,113 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 10:25:59,113 INFO L82 PathProgramCache]: Analyzing trace with hash -1084539731, now seen corresponding path program 1 times [2018-11-10 10:25:59,113 INFO L225 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-10 10:25:59,114 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-10 10:25:59,114 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 10:25:59,114 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 10:25:59,114 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 10:25:59,123 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 10:25:59,172 INFO L134 CoverageAnalysis]: Checked inductivity of 188 backedges. 24 proven. 148 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2018-11-10 10:25:59,172 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-10 10:25:59,172 INFO L225 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_b82e135f-7e7c-47f8-a9b2-5ad19e9c9134/bin-2019/uautomizer/z3 Starting monitored process 17 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 17 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-10 10:25:59,178 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 10:25:59,223 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 10:25:59,226 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 10:25:59,258 INFO L134 CoverageAnalysis]: Checked inductivity of 188 backedges. 24 proven. 148 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2018-11-10 10:25:59,285 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-10 10:25:59,286 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 7 [2018-11-10 10:25:59,286 INFO L460 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-11-10 10:25:59,286 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-11-10 10:25:59,286 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-11-10 10:25:59,287 INFO L87 Difference]: Start difference. First operand 623 states and 918 transitions. Second operand 7 states. [2018-11-10 10:25:59,398 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 10:25:59,398 INFO L93 Difference]: Finished difference Result 670 states and 984 transitions. [2018-11-10 10:25:59,399 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-10 10:25:59,399 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 102 [2018-11-10 10:25:59,399 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 10:25:59,401 INFO L225 Difference]: With dead ends: 670 [2018-11-10 10:25:59,401 INFO L226 Difference]: Without dead ends: 664 [2018-11-10 10:25:59,402 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 111 GetRequests, 105 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-11-10 10:25:59,402 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 664 states. [2018-11-10 10:25:59,416 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 664 to 661. [2018-11-10 10:25:59,416 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 661 states. [2018-11-10 10:25:59,417 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 661 states to 661 states and 972 transitions. [2018-11-10 10:25:59,417 INFO L78 Accepts]: Start accepts. Automaton has 661 states and 972 transitions. Word has length 102 [2018-11-10 10:25:59,418 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 10:25:59,418 INFO L481 AbstractCegarLoop]: Abstraction has 661 states and 972 transitions. [2018-11-10 10:25:59,418 INFO L482 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-11-10 10:25:59,418 INFO L276 IsEmpty]: Start isEmpty. Operand 661 states and 972 transitions. [2018-11-10 10:25:59,419 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 107 [2018-11-10 10:25:59,419 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 10:25:59,419 INFO L375 BasicCegarLoop]: trace histogram [9, 9, 8, 6, 6, 4, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 10:25:59,419 INFO L424 AbstractCegarLoop]: === Iteration 25 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-10 10:25:59,419 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 10:25:59,419 INFO L82 PathProgramCache]: Analyzing trace with hash 35576591, now seen corresponding path program 1 times [2018-11-10 10:25:59,419 INFO L225 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-10 10:25:59,419 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-10 10:25:59,420 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 10:25:59,420 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 10:25:59,420 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 10:25:59,452 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 10:25:59,613 INFO L134 CoverageAnalysis]: Checked inductivity of 194 backedges. 24 proven. 170 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 10:25:59,613 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-10 10:25:59,613 INFO L225 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_b82e135f-7e7c-47f8-a9b2-5ad19e9c9134/bin-2019/uautomizer/z3 Starting monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-10 10:25:59,621 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 10:25:59,670 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 10:25:59,673 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 10:25:59,746 INFO L134 CoverageAnalysis]: Checked inductivity of 194 backedges. 24 proven. 160 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-11-10 10:25:59,763 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-10 10:25:59,764 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 9] total 15 [2018-11-10 10:25:59,764 INFO L460 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-11-10 10:25:59,764 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-11-10 10:25:59,764 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=34, Invalid=176, Unknown=0, NotChecked=0, Total=210 [2018-11-10 10:25:59,764 INFO L87 Difference]: Start difference. First operand 661 states and 972 transitions. Second operand 15 states. [2018-11-10 10:25:59,994 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 10:25:59,994 INFO L93 Difference]: Finished difference Result 664 states and 974 transitions. [2018-11-10 10:25:59,995 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-11-10 10:25:59,995 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 106 [2018-11-10 10:25:59,995 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 10:25:59,997 INFO L225 Difference]: With dead ends: 664 [2018-11-10 10:25:59,997 INFO L226 Difference]: Without dead ends: 662 [2018-11-10 10:25:59,997 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 119 GetRequests, 102 SyntacticMatches, 2 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 20 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=44, Invalid=228, Unknown=0, NotChecked=0, Total=272 [2018-11-10 10:25:59,998 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 662 states. [2018-11-10 10:26:00,009 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 662 to 661. [2018-11-10 10:26:00,010 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 661 states. [2018-11-10 10:26:00,011 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 661 states to 661 states and 971 transitions. [2018-11-10 10:26:00,011 INFO L78 Accepts]: Start accepts. Automaton has 661 states and 971 transitions. Word has length 106 [2018-11-10 10:26:00,011 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 10:26:00,011 INFO L481 AbstractCegarLoop]: Abstraction has 661 states and 971 transitions. [2018-11-10 10:26:00,011 INFO L482 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-11-10 10:26:00,012 INFO L276 IsEmpty]: Start isEmpty. Operand 661 states and 971 transitions. [2018-11-10 10:26:00,012 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 114 [2018-11-10 10:26:00,012 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 10:26:00,013 INFO L375 BasicCegarLoop]: trace histogram [10, 10, 9, 6, 6, 4, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 10:26:00,013 INFO L424 AbstractCegarLoop]: === Iteration 26 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-10 10:26:00,013 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 10:26:00,013 INFO L82 PathProgramCache]: Analyzing trace with hash -234907228, now seen corresponding path program 2 times [2018-11-10 10:26:00,013 INFO L225 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-10 10:26:00,013 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-10 10:26:00,014 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 10:26:00,014 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 10:26:00,014 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 10:26:00,075 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 10:26:00,290 INFO L134 CoverageAnalysis]: Checked inductivity of 235 backedges. 27 proven. 208 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 10:26:00,291 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-10 10:26:00,291 INFO L225 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_b82e135f-7e7c-47f8-a9b2-5ad19e9c9134/bin-2019/uautomizer/z3 Starting monitored process 19 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 19 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-10 10:26:00,300 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-11-10 10:26:00,373 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-11-10 10:26:00,373 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-10 10:26:00,377 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 10:26:00,550 INFO L134 CoverageAnalysis]: Checked inductivity of 235 backedges. 27 proven. 198 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-11-10 10:26:00,576 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-10 10:26:00,576 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 11] total 17 [2018-11-10 10:26:00,577 INFO L460 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-11-10 10:26:00,577 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-11-10 10:26:00,577 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=39, Invalid=233, Unknown=0, NotChecked=0, Total=272 [2018-11-10 10:26:00,577 INFO L87 Difference]: Start difference. First operand 661 states and 971 transitions. Second operand 17 states. [2018-11-10 10:26:01,030 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 10:26:01,031 INFO L93 Difference]: Finished difference Result 698 states and 1007 transitions. [2018-11-10 10:26:01,031 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2018-11-10 10:26:01,031 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 113 [2018-11-10 10:26:01,032 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 10:26:01,033 INFO L225 Difference]: With dead ends: 698 [2018-11-10 10:26:01,033 INFO L226 Difference]: Without dead ends: 696 [2018-11-10 10:26:01,033 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 134 GetRequests, 105 SyntacticMatches, 5 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 88 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=80, Invalid=570, Unknown=0, NotChecked=0, Total=650 [2018-11-10 10:26:01,034 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 696 states. [2018-11-10 10:26:01,043 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 696 to 662. [2018-11-10 10:26:01,043 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 662 states. [2018-11-10 10:26:01,044 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 662 states to 662 states and 972 transitions. [2018-11-10 10:26:01,044 INFO L78 Accepts]: Start accepts. Automaton has 662 states and 972 transitions. Word has length 113 [2018-11-10 10:26:01,044 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 10:26:01,045 INFO L481 AbstractCegarLoop]: Abstraction has 662 states and 972 transitions. [2018-11-10 10:26:01,045 INFO L482 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-11-10 10:26:01,045 INFO L276 IsEmpty]: Start isEmpty. Operand 662 states and 972 transitions. [2018-11-10 10:26:01,046 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 124 [2018-11-10 10:26:01,046 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 10:26:01,046 INFO L375 BasicCegarLoop]: trace histogram [11, 10, 10, 7, 7, 4, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 10:26:01,046 INFO L424 AbstractCegarLoop]: === Iteration 27 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-10 10:26:01,046 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 10:26:01,046 INFO L82 PathProgramCache]: Analyzing trace with hash -238306442, now seen corresponding path program 2 times [2018-11-10 10:26:01,046 INFO L225 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-10 10:26:01,046 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-10 10:26:01,047 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 10:26:01,047 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-10 10:26:01,047 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 10:26:01,058 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 10:26:01,105 INFO L134 CoverageAnalysis]: Checked inductivity of 294 backedges. 68 proven. 206 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2018-11-10 10:26:01,105 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-10 10:26:01,105 INFO L225 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_b82e135f-7e7c-47f8-a9b2-5ad19e9c9134/bin-2019/uautomizer/z3 Starting monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-10 10:26:01,127 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-11-10 10:26:01,203 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-11-10 10:26:01,203 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-10 10:26:01,207 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 10:26:01,245 INFO L134 CoverageAnalysis]: Checked inductivity of 294 backedges. 68 proven. 206 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2018-11-10 10:26:01,272 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-10 10:26:01,272 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8] total 8 [2018-11-10 10:26:01,272 INFO L460 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-11-10 10:26:01,272 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-11-10 10:26:01,272 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=28, Invalid=28, Unknown=0, NotChecked=0, Total=56 [2018-11-10 10:26:01,273 INFO L87 Difference]: Start difference. First operand 662 states and 972 transitions. Second operand 8 states. [2018-11-10 10:26:01,410 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 10:26:01,411 INFO L93 Difference]: Finished difference Result 1275 states and 1870 transitions. [2018-11-10 10:26:01,411 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-11-10 10:26:01,411 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 123 [2018-11-10 10:26:01,411 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 10:26:01,413 INFO L225 Difference]: With dead ends: 1275 [2018-11-10 10:26:01,413 INFO L226 Difference]: Without dead ends: 799 [2018-11-10 10:26:01,414 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 134 GetRequests, 128 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=28, Invalid=28, Unknown=0, NotChecked=0, Total=56 [2018-11-10 10:26:01,414 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 799 states. [2018-11-10 10:26:01,423 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 799 to 740. [2018-11-10 10:26:01,423 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 740 states. [2018-11-10 10:26:01,424 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 740 states to 740 states and 1091 transitions. [2018-11-10 10:26:01,424 INFO L78 Accepts]: Start accepts. Automaton has 740 states and 1091 transitions. Word has length 123 [2018-11-10 10:26:01,425 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 10:26:01,425 INFO L481 AbstractCegarLoop]: Abstraction has 740 states and 1091 transitions. [2018-11-10 10:26:01,425 INFO L482 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-11-10 10:26:01,425 INFO L276 IsEmpty]: Start isEmpty. Operand 740 states and 1091 transitions. [2018-11-10 10:26:01,426 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 124 [2018-11-10 10:26:01,426 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 10:26:01,426 INFO L375 BasicCegarLoop]: trace histogram [11, 11, 10, 7, 7, 4, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 10:26:01,426 INFO L424 AbstractCegarLoop]: === Iteration 28 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-10 10:26:01,430 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 10:26:01,430 INFO L82 PathProgramCache]: Analyzing trace with hash -631333452, now seen corresponding path program 2 times [2018-11-10 10:26:01,430 INFO L225 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-10 10:26:01,430 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-10 10:26:01,430 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 10:26:01,430 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-10 10:26:01,431 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 10:26:01,443 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 10:26:01,566 INFO L134 CoverageAnalysis]: Checked inductivity of 294 backedges. 35 proven. 254 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2018-11-10 10:26:01,566 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-10 10:26:01,566 INFO L225 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_b82e135f-7e7c-47f8-a9b2-5ad19e9c9134/bin-2019/uautomizer/z3 Starting monitored process 21 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 21 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-10 10:26:01,573 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-11-10 10:26:01,646 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-11-10 10:26:01,646 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-10 10:26:01,650 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 10:26:01,724 INFO L134 CoverageAnalysis]: Checked inductivity of 294 backedges. 30 proven. 244 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2018-11-10 10:26:01,741 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-10 10:26:01,741 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 9] total 16 [2018-11-10 10:26:01,741 INFO L460 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-11-10 10:26:01,742 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-11-10 10:26:01,742 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=37, Invalid=203, Unknown=0, NotChecked=0, Total=240 [2018-11-10 10:26:01,742 INFO L87 Difference]: Start difference. First operand 740 states and 1091 transitions. Second operand 16 states. [2018-11-10 10:26:02,066 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 10:26:02,066 INFO L93 Difference]: Finished difference Result 801 states and 1160 transitions. [2018-11-10 10:26:02,066 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-11-10 10:26:02,067 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 123 [2018-11-10 10:26:02,067 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 10:26:02,068 INFO L225 Difference]: With dead ends: 801 [2018-11-10 10:26:02,068 INFO L226 Difference]: Without dead ends: 797 [2018-11-10 10:26:02,068 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 145 GetRequests, 122 SyntacticMatches, 1 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 73 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=75, Invalid=477, Unknown=0, NotChecked=0, Total=552 [2018-11-10 10:26:02,069 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 797 states. [2018-11-10 10:26:02,084 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 797 to 759. [2018-11-10 10:26:02,085 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 759 states. [2018-11-10 10:26:02,086 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 759 states to 759 states and 1117 transitions. [2018-11-10 10:26:02,086 INFO L78 Accepts]: Start accepts. Automaton has 759 states and 1117 transitions. Word has length 123 [2018-11-10 10:26:02,086 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 10:26:02,086 INFO L481 AbstractCegarLoop]: Abstraction has 759 states and 1117 transitions. [2018-11-10 10:26:02,086 INFO L482 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-11-10 10:26:02,087 INFO L276 IsEmpty]: Start isEmpty. Operand 759 states and 1117 transitions. [2018-11-10 10:26:02,087 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 134 [2018-11-10 10:26:02,087 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 10:26:02,087 INFO L375 BasicCegarLoop]: trace histogram [12, 12, 11, 8, 8, 5, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 10:26:02,088 INFO L424 AbstractCegarLoop]: === Iteration 29 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-10 10:26:02,088 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 10:26:02,088 INFO L82 PathProgramCache]: Analyzing trace with hash -1671300281, now seen corresponding path program 2 times [2018-11-10 10:26:02,088 INFO L225 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-10 10:26:02,088 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-10 10:26:02,089 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 10:26:02,089 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-10 10:26:02,089 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 10:26:02,104 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 10:26:02,274 INFO L134 CoverageAnalysis]: Checked inductivity of 357 backedges. 33 proven. 298 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2018-11-10 10:26:02,275 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-10 10:26:02,275 INFO L225 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_b82e135f-7e7c-47f8-a9b2-5ad19e9c9134/bin-2019/uautomizer/z3 Starting monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-10 10:26:02,283 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-11-10 10:26:02,365 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-11-10 10:26:02,365 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-10 10:26:02,369 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 10:26:02,479 INFO L134 CoverageAnalysis]: Checked inductivity of 357 backedges. 33 proven. 298 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2018-11-10 10:26:02,506 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-10 10:26:02,506 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9] total 10 [2018-11-10 10:26:02,507 INFO L460 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-11-10 10:26:02,507 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-11-10 10:26:02,507 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=70, Unknown=0, NotChecked=0, Total=90 [2018-11-10 10:26:02,507 INFO L87 Difference]: Start difference. First operand 759 states and 1117 transitions. Second operand 10 states. [2018-11-10 10:26:02,686 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 10:26:02,686 INFO L93 Difference]: Finished difference Result 788 states and 1154 transitions. [2018-11-10 10:26:02,686 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-11-10 10:26:02,686 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 133 [2018-11-10 10:26:02,686 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 10:26:02,688 INFO L225 Difference]: With dead ends: 788 [2018-11-10 10:26:02,688 INFO L226 Difference]: Without dead ends: 784 [2018-11-10 10:26:02,688 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 148 GetRequests, 138 SyntacticMatches, 2 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=20, Invalid=70, Unknown=0, NotChecked=0, Total=90 [2018-11-10 10:26:02,688 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 784 states. [2018-11-10 10:26:02,703 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 784 to 778. [2018-11-10 10:26:02,703 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 778 states. [2018-11-10 10:26:02,704 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 778 states to 778 states and 1143 transitions. [2018-11-10 10:26:02,704 INFO L78 Accepts]: Start accepts. Automaton has 778 states and 1143 transitions. Word has length 133 [2018-11-10 10:26:02,705 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 10:26:02,705 INFO L481 AbstractCegarLoop]: Abstraction has 778 states and 1143 transitions. [2018-11-10 10:26:02,705 INFO L482 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-11-10 10:26:02,705 INFO L276 IsEmpty]: Start isEmpty. Operand 778 states and 1143 transitions. [2018-11-10 10:26:02,705 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 137 [2018-11-10 10:26:02,706 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 10:26:02,706 INFO L375 BasicCegarLoop]: trace histogram [12, 12, 11, 8, 8, 5, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 10:26:02,706 INFO L424 AbstractCegarLoop]: === Iteration 30 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-10 10:26:02,706 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 10:26:02,706 INFO L82 PathProgramCache]: Analyzing trace with hash 330710990, now seen corresponding path program 2 times [2018-11-10 10:26:02,706 INFO L225 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-10 10:26:02,706 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-10 10:26:02,707 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 10:26:02,707 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-10 10:26:02,707 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 10:26:02,762 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 10:26:03,168 INFO L134 CoverageAnalysis]: Checked inductivity of 367 backedges. 33 proven. 334 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 10:26:03,169 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-10 10:26:03,169 INFO L225 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_b82e135f-7e7c-47f8-a9b2-5ad19e9c9134/bin-2019/uautomizer/z3 Starting monitored process 23 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 23 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-10 10:26:03,177 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-11-10 10:26:03,240 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-11-10 10:26:03,240 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-10 10:26:03,243 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 10:26:03,378 INFO L134 CoverageAnalysis]: Checked inductivity of 367 backedges. 33 proven. 314 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2018-11-10 10:26:03,396 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-10 10:26:03,396 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 10] total 20 [2018-11-10 10:26:03,397 INFO L460 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-11-10 10:26:03,397 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-11-10 10:26:03,397 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=49, Invalid=331, Unknown=0, NotChecked=0, Total=380 [2018-11-10 10:26:03,397 INFO L87 Difference]: Start difference. First operand 778 states and 1143 transitions. Second operand 20 states. [2018-11-10 10:26:03,953 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 10:26:03,953 INFO L93 Difference]: Finished difference Result 821 states and 1185 transitions. [2018-11-10 10:26:03,954 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2018-11-10 10:26:03,954 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 136 [2018-11-10 10:26:03,954 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 10:26:03,956 INFO L225 Difference]: With dead ends: 821 [2018-11-10 10:26:03,956 INFO L226 Difference]: Without dead ends: 819 [2018-11-10 10:26:03,957 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 162 GetRequests, 130 SyntacticMatches, 3 SemanticMatches, 29 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 98 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=104, Invalid=826, Unknown=0, NotChecked=0, Total=930 [2018-11-10 10:26:03,957 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 819 states. [2018-11-10 10:26:03,977 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 819 to 779. [2018-11-10 10:26:03,977 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 779 states. [2018-11-10 10:26:03,978 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 779 states to 779 states and 1144 transitions. [2018-11-10 10:26:03,978 INFO L78 Accepts]: Start accepts. Automaton has 779 states and 1144 transitions. Word has length 136 [2018-11-10 10:26:03,978 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 10:26:03,978 INFO L481 AbstractCegarLoop]: Abstraction has 779 states and 1144 transitions. [2018-11-10 10:26:03,979 INFO L482 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-11-10 10:26:03,979 INFO L276 IsEmpty]: Start isEmpty. Operand 779 states and 1144 transitions. [2018-11-10 10:26:03,979 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 149 [2018-11-10 10:26:03,979 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 10:26:03,979 INFO L375 BasicCegarLoop]: trace histogram [13, 12, 12, 9, 9, 6, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 10:26:03,980 INFO L424 AbstractCegarLoop]: === Iteration 31 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-10 10:26:03,980 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 10:26:03,980 INFO L82 PathProgramCache]: Analyzing trace with hash -352520992, now seen corresponding path program 2 times [2018-11-10 10:26:03,980 INFO L225 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-10 10:26:03,980 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-10 10:26:03,981 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 10:26:03,981 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-10 10:26:03,981 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 10:26:03,995 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 10:26:04,060 INFO L134 CoverageAnalysis]: Checked inductivity of 441 backedges. 85 proven. 330 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2018-11-10 10:26:04,060 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-10 10:26:04,060 INFO L225 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_b82e135f-7e7c-47f8-a9b2-5ad19e9c9134/bin-2019/uautomizer/z3 Starting monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-10 10:26:04,068 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-11-10 10:26:04,094 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2018-11-10 10:26:04,095 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-10 10:26:04,098 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 10:26:04,113 INFO L134 CoverageAnalysis]: Checked inductivity of 441 backedges. 50 proven. 0 refuted. 0 times theorem prover too weak. 391 trivial. 0 not checked. [2018-11-10 10:26:04,139 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-11-10 10:26:04,139 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [9] total 10 [2018-11-10 10:26:04,139 INFO L460 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-11-10 10:26:04,139 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-11-10 10:26:04,139 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=45, Invalid=45, Unknown=0, NotChecked=0, Total=90 [2018-11-10 10:26:04,140 INFO L87 Difference]: Start difference. First operand 779 states and 1144 transitions. Second operand 10 states. [2018-11-10 10:26:04,393 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 10:26:04,394 INFO L93 Difference]: Finished difference Result 1568 states and 2302 transitions. [2018-11-10 10:26:04,395 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-11-10 10:26:04,395 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 148 [2018-11-10 10:26:04,395 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 10:26:04,398 INFO L225 Difference]: With dead ends: 1568 [2018-11-10 10:26:04,398 INFO L226 Difference]: Without dead ends: 1009 [2018-11-10 10:26:04,399 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 161 GetRequests, 153 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 12 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=45, Invalid=45, Unknown=0, NotChecked=0, Total=90 [2018-11-10 10:26:04,399 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1009 states. [2018-11-10 10:26:04,423 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1009 to 935. [2018-11-10 10:26:04,423 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 935 states. [2018-11-10 10:26:04,425 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 935 states to 935 states and 1377 transitions. [2018-11-10 10:26:04,425 INFO L78 Accepts]: Start accepts. Automaton has 935 states and 1377 transitions. Word has length 148 [2018-11-10 10:26:04,425 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 10:26:04,425 INFO L481 AbstractCegarLoop]: Abstraction has 935 states and 1377 transitions. [2018-11-10 10:26:04,425 INFO L482 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-11-10 10:26:04,425 INFO L276 IsEmpty]: Start isEmpty. Operand 935 states and 1377 transitions. [2018-11-10 10:26:04,426 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 149 [2018-11-10 10:26:04,426 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 10:26:04,426 INFO L375 BasicCegarLoop]: trace histogram [13, 13, 12, 9, 9, 6, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 10:26:04,426 INFO L424 AbstractCegarLoop]: === Iteration 32 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-10 10:26:04,427 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 10:26:04,427 INFO L82 PathProgramCache]: Analyzing trace with hash -94355554, now seen corresponding path program 2 times [2018-11-10 10:26:04,427 INFO L225 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-10 10:26:04,427 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-10 10:26:04,427 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 10:26:04,427 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-10 10:26:04,427 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 10:26:04,442 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 10:26:04,540 INFO L134 CoverageAnalysis]: Checked inductivity of 441 backedges. 36 proven. 379 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2018-11-10 10:26:04,540 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-10 10:26:04,540 INFO L225 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_b82e135f-7e7c-47f8-a9b2-5ad19e9c9134/bin-2019/uautomizer/z3 Starting monitored process 25 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 25 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-10 10:26:04,549 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-11-10 10:26:04,645 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-11-10 10:26:04,645 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-10 10:26:04,649 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 10:26:04,687 INFO L134 CoverageAnalysis]: Checked inductivity of 441 backedges. 36 proven. 379 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2018-11-10 10:26:04,703 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-10 10:26:04,704 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9] total 9 [2018-11-10 10:26:04,704 INFO L460 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-11-10 10:26:04,704 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-11-10 10:26:04,704 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=57, Unknown=0, NotChecked=0, Total=72 [2018-11-10 10:26:04,704 INFO L87 Difference]: Start difference. First operand 935 states and 1377 transitions. Second operand 9 states. [2018-11-10 10:26:04,862 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 10:26:04,862 INFO L93 Difference]: Finished difference Result 982 states and 1443 transitions. [2018-11-10 10:26:04,863 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-11-10 10:26:04,863 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 148 [2018-11-10 10:26:04,864 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 10:26:04,866 INFO L225 Difference]: With dead ends: 982 [2018-11-10 10:26:04,866 INFO L226 Difference]: Without dead ends: 976 [2018-11-10 10:26:04,866 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 161 GetRequests, 153 SyntacticMatches, 1 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=57, Unknown=0, NotChecked=0, Total=72 [2018-11-10 10:26:04,867 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 976 states. [2018-11-10 10:26:04,886 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 976 to 973. [2018-11-10 10:26:04,886 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 973 states. [2018-11-10 10:26:04,887 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 973 states to 973 states and 1431 transitions. [2018-11-10 10:26:04,888 INFO L78 Accepts]: Start accepts. Automaton has 973 states and 1431 transitions. Word has length 148 [2018-11-10 10:26:04,888 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 10:26:04,888 INFO L481 AbstractCegarLoop]: Abstraction has 973 states and 1431 transitions. [2018-11-10 10:26:04,888 INFO L482 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-11-10 10:26:04,888 INFO L276 IsEmpty]: Start isEmpty. Operand 973 states and 1431 transitions. [2018-11-10 10:26:04,889 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 153 [2018-11-10 10:26:04,889 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 10:26:04,889 INFO L375 BasicCegarLoop]: trace histogram [13, 13, 12, 9, 9, 6, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 10:26:04,890 INFO L424 AbstractCegarLoop]: === Iteration 33 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-10 10:26:04,890 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 10:26:04,890 INFO L82 PathProgramCache]: Analyzing trace with hash 1545010560, now seen corresponding path program 2 times [2018-11-10 10:26:04,890 INFO L225 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-10 10:26:04,890 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-10 10:26:04,891 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 10:26:04,891 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-10 10:26:04,891 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 10:26:04,926 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 10:26:05,169 INFO L134 CoverageAnalysis]: Checked inductivity of 453 backedges. 36 proven. 417 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 10:26:05,169 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-10 10:26:05,169 INFO L225 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_b82e135f-7e7c-47f8-a9b2-5ad19e9c9134/bin-2019/uautomizer/z3 Starting monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-10 10:26:05,176 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-11-10 10:26:05,245 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-11-10 10:26:05,245 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-10 10:26:05,248 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 10:26:05,375 INFO L134 CoverageAnalysis]: Checked inductivity of 453 backedges. 36 proven. 397 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2018-11-10 10:26:05,391 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-10 10:26:05,391 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 11] total 24 [2018-11-10 10:26:05,391 INFO L460 AbstractCegarLoop]: Interpolant automaton has 24 states [2018-11-10 10:26:05,391 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2018-11-10 10:26:05,392 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=60, Invalid=492, Unknown=0, NotChecked=0, Total=552 [2018-11-10 10:26:05,392 INFO L87 Difference]: Start difference. First operand 973 states and 1431 transitions. Second operand 24 states. [2018-11-10 10:26:05,871 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 10:26:05,871 INFO L93 Difference]: Finished difference Result 1025 states and 1481 transitions. [2018-11-10 10:26:05,871 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2018-11-10 10:26:05,871 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 152 [2018-11-10 10:26:05,872 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 10:26:05,873 INFO L225 Difference]: With dead ends: 1025 [2018-11-10 10:26:05,873 INFO L226 Difference]: Without dead ends: 1023 [2018-11-10 10:26:05,874 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 180 GetRequests, 144 SyntacticMatches, 2 SemanticMatches, 34 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 161 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=122, Invalid=1138, Unknown=0, NotChecked=0, Total=1260 [2018-11-10 10:26:05,874 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1023 states. [2018-11-10 10:26:05,901 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1023 to 973. [2018-11-10 10:26:05,901 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 973 states. [2018-11-10 10:26:05,903 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 973 states to 973 states and 1430 transitions. [2018-11-10 10:26:05,903 INFO L78 Accepts]: Start accepts. Automaton has 973 states and 1430 transitions. Word has length 152 [2018-11-10 10:26:05,903 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 10:26:05,903 INFO L481 AbstractCegarLoop]: Abstraction has 973 states and 1430 transitions. [2018-11-10 10:26:05,903 INFO L482 AbstractCegarLoop]: Interpolant automaton has 24 states. [2018-11-10 10:26:05,903 INFO L276 IsEmpty]: Start isEmpty. Operand 973 states and 1430 transitions. [2018-11-10 10:26:05,904 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 160 [2018-11-10 10:26:05,904 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 10:26:05,904 INFO L375 BasicCegarLoop]: trace histogram [14, 14, 13, 9, 9, 6, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 10:26:05,905 INFO L424 AbstractCegarLoop]: === Iteration 34 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-10 10:26:05,905 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 10:26:05,905 INFO L82 PathProgramCache]: Analyzing trace with hash -1285421549, now seen corresponding path program 3 times [2018-11-10 10:26:05,905 INFO L225 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-10 10:26:05,905 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-10 10:26:05,905 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 10:26:05,906 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-10 10:26:05,906 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 10:26:05,986 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 10:26:06,317 INFO L134 CoverageAnalysis]: Checked inductivity of 513 backedges. 39 proven. 474 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 10:26:06,318 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-10 10:26:06,318 INFO L225 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_b82e135f-7e7c-47f8-a9b2-5ad19e9c9134/bin-2019/uautomizer/z3 Starting monitored process 27 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 27 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-10 10:26:06,326 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-11-10 10:26:06,386 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 6 check-sat command(s) [2018-11-10 10:26:06,387 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-10 10:26:06,390 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 10:26:06,669 INFO L134 CoverageAnalysis]: Checked inductivity of 513 backedges. 249 proven. 31 refuted. 0 times theorem prover too weak. 233 trivial. 0 not checked. [2018-11-10 10:26:06,685 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-10 10:26:06,685 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 8] total 22 [2018-11-10 10:26:06,686 INFO L460 AbstractCegarLoop]: Interpolant automaton has 22 states [2018-11-10 10:26:06,686 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2018-11-10 10:26:06,686 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=57, Invalid=405, Unknown=0, NotChecked=0, Total=462 [2018-11-10 10:26:06,686 INFO L87 Difference]: Start difference. First operand 973 states and 1430 transitions. Second operand 22 states. [2018-11-10 10:26:07,647 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 10:26:07,647 INFO L93 Difference]: Finished difference Result 1504 states and 2196 transitions. [2018-11-10 10:26:07,648 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 40 states. [2018-11-10 10:26:07,648 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 159 [2018-11-10 10:26:07,648 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 10:26:07,649 INFO L225 Difference]: With dead ends: 1504 [2018-11-10 10:26:07,649 INFO L226 Difference]: Without dead ends: 787 [2018-11-10 10:26:07,651 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 203 GetRequests, 162 SyntacticMatches, 1 SemanticMatches, 40 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 234 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=170, Invalid=1552, Unknown=0, NotChecked=0, Total=1722 [2018-11-10 10:26:07,651 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 787 states. [2018-11-10 10:26:07,677 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 787 to 738. [2018-11-10 10:26:07,677 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 738 states. [2018-11-10 10:26:07,678 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 738 states to 738 states and 1036 transitions. [2018-11-10 10:26:07,678 INFO L78 Accepts]: Start accepts. Automaton has 738 states and 1036 transitions. Word has length 159 [2018-11-10 10:26:07,678 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 10:26:07,678 INFO L481 AbstractCegarLoop]: Abstraction has 738 states and 1036 transitions. [2018-11-10 10:26:07,678 INFO L482 AbstractCegarLoop]: Interpolant automaton has 22 states. [2018-11-10 10:26:07,679 INFO L276 IsEmpty]: Start isEmpty. Operand 738 states and 1036 transitions. [2018-11-10 10:26:07,679 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 170 [2018-11-10 10:26:07,679 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 10:26:07,680 INFO L375 BasicCegarLoop]: trace histogram [15, 14, 14, 10, 10, 6, 4, 4, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 10:26:07,680 INFO L424 AbstractCegarLoop]: === Iteration 35 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-10 10:26:07,680 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 10:26:07,680 INFO L82 PathProgramCache]: Analyzing trace with hash -348083931, now seen corresponding path program 3 times [2018-11-10 10:26:07,680 INFO L225 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-10 10:26:07,680 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-10 10:26:07,681 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 10:26:07,681 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-10 10:26:07,681 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 10:26:07,698 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 10:26:07,796 INFO L134 CoverageAnalysis]: Checked inductivity of 598 backedges. 98 proven. 470 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2018-11-10 10:26:07,796 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-10 10:26:07,797 INFO L225 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_b82e135f-7e7c-47f8-a9b2-5ad19e9c9134/bin-2019/uautomizer/z3 Starting monitored process 28 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 28 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-10 10:26:07,806 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-11-10 10:26:07,900 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 12 check-sat command(s) [2018-11-10 10:26:07,901 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-10 10:26:07,904 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 10:26:07,921 INFO L134 CoverageAnalysis]: Checked inductivity of 598 backedges. 98 proven. 470 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2018-11-10 10:26:07,938 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-10 10:26:07,938 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10] total 10 [2018-11-10 10:26:07,938 INFO L460 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-11-10 10:26:07,938 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-11-10 10:26:07,938 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=45, Invalid=45, Unknown=0, NotChecked=0, Total=90 [2018-11-10 10:26:07,938 INFO L87 Difference]: Start difference. First operand 738 states and 1036 transitions. Second operand 10 states. [2018-11-10 10:26:08,036 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 10:26:08,036 INFO L93 Difference]: Finished difference Result 886 states and 1229 transitions. [2018-11-10 10:26:08,037 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-11-10 10:26:08,037 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 169 [2018-11-10 10:26:08,037 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 10:26:08,038 INFO L225 Difference]: With dead ends: 886 [2018-11-10 10:26:08,038 INFO L226 Difference]: Without dead ends: 802 [2018-11-10 10:26:08,039 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 184 GetRequests, 176 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=45, Invalid=45, Unknown=0, NotChecked=0, Total=90 [2018-11-10 10:26:08,039 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 802 states. [2018-11-10 10:26:08,053 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 802 to 722. [2018-11-10 10:26:08,053 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 722 states. [2018-11-10 10:26:08,054 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 722 states to 722 states and 1013 transitions. [2018-11-10 10:26:08,054 INFO L78 Accepts]: Start accepts. Automaton has 722 states and 1013 transitions. Word has length 169 [2018-11-10 10:26:08,054 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 10:26:08,055 INFO L481 AbstractCegarLoop]: Abstraction has 722 states and 1013 transitions. [2018-11-10 10:26:08,055 INFO L482 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-11-10 10:26:08,055 INFO L276 IsEmpty]: Start isEmpty. Operand 722 states and 1013 transitions. [2018-11-10 10:26:08,056 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 182 [2018-11-10 10:26:08,056 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 10:26:08,056 INFO L375 BasicCegarLoop]: trace histogram [16, 16, 15, 11, 11, 7, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 10:26:08,056 INFO L424 AbstractCegarLoop]: === Iteration 36 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-10 10:26:08,056 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 10:26:08,056 INFO L82 PathProgramCache]: Analyzing trace with hash -441432313, now seen corresponding path program 1 times [2018-11-10 10:26:08,056 INFO L225 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-10 10:26:08,056 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-10 10:26:08,057 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 10:26:08,057 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-10 10:26:08,057 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 10:26:08,122 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 10:26:08,316 INFO L134 CoverageAnalysis]: Checked inductivity of 692 backedges. 45 proven. 611 refuted. 0 times theorem prover too weak. 36 trivial. 0 not checked. [2018-11-10 10:26:08,316 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-10 10:26:08,316 INFO L225 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_b82e135f-7e7c-47f8-a9b2-5ad19e9c9134/bin-2019/uautomizer/z3 Starting monitored process 29 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 29 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-10 10:26:08,322 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 10:26:08,384 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 10:26:08,387 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 10:26:08,457 INFO L134 CoverageAnalysis]: Checked inductivity of 692 backedges. 656 proven. 0 refuted. 0 times theorem prover too weak. 36 trivial. 0 not checked. [2018-11-10 10:26:08,473 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-11-10 10:26:08,473 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [10] total 18 [2018-11-10 10:26:08,473 INFO L460 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-11-10 10:26:08,474 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-11-10 10:26:08,474 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=97, Invalid=209, Unknown=0, NotChecked=0, Total=306 [2018-11-10 10:26:08,474 INFO L87 Difference]: Start difference. First operand 722 states and 1013 transitions. Second operand 18 states. [2018-11-10 10:26:08,626 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 10:26:08,627 INFO L93 Difference]: Finished difference Result 865 states and 1213 transitions. [2018-11-10 10:26:08,627 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-11-10 10:26:08,627 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 181 [2018-11-10 10:26:08,627 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 10:26:08,629 INFO L225 Difference]: With dead ends: 865 [2018-11-10 10:26:08,630 INFO L226 Difference]: Without dead ends: 860 [2018-11-10 10:26:08,630 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 200 GetRequests, 180 SyntacticMatches, 4 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 28 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=97, Invalid=209, Unknown=0, NotChecked=0, Total=306 [2018-11-10 10:26:08,631 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 860 states. [2018-11-10 10:26:08,661 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 860 to 855. [2018-11-10 10:26:08,661 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 855 states. [2018-11-10 10:26:08,662 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 855 states to 855 states and 1202 transitions. [2018-11-10 10:26:08,663 INFO L78 Accepts]: Start accepts. Automaton has 855 states and 1202 transitions. Word has length 181 [2018-11-10 10:26:08,663 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 10:26:08,663 INFO L481 AbstractCegarLoop]: Abstraction has 855 states and 1202 transitions. [2018-11-10 10:26:08,663 INFO L482 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-11-10 10:26:08,663 INFO L276 IsEmpty]: Start isEmpty. Operand 855 states and 1202 transitions. [2018-11-10 10:26:08,664 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 183 [2018-11-10 10:26:08,664 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 10:26:08,665 INFO L375 BasicCegarLoop]: trace histogram [16, 16, 15, 11, 11, 7, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 10:26:08,665 INFO L424 AbstractCegarLoop]: === Iteration 37 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-10 10:26:08,665 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 10:26:08,665 INFO L82 PathProgramCache]: Analyzing trace with hash -788052353, now seen corresponding path program 3 times [2018-11-10 10:26:08,665 INFO L225 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-10 10:26:08,665 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-10 10:26:08,666 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 10:26:08,666 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 10:26:08,666 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 10:26:08,744 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 10:26:09,107 INFO L134 CoverageAnalysis]: Checked inductivity of 701 backedges. 45 proven. 656 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 10:26:09,108 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-10 10:26:09,108 INFO L225 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_b82e135f-7e7c-47f8-a9b2-5ad19e9c9134/bin-2019/uautomizer/z3 Starting monitored process 30 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 30 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-10 10:26:09,113 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-11-10 10:26:09,225 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 13 check-sat command(s) [2018-11-10 10:26:09,225 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-10 10:26:09,228 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 10:26:09,425 INFO L134 CoverageAnalysis]: Checked inductivity of 701 backedges. 665 proven. 6 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2018-11-10 10:26:09,441 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-10 10:26:09,441 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 12] total 28 [2018-11-10 10:26:09,441 INFO L460 AbstractCegarLoop]: Interpolant automaton has 28 states [2018-11-10 10:26:09,441 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 28 interpolants. [2018-11-10 10:26:09,441 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=167, Invalid=589, Unknown=0, NotChecked=0, Total=756 [2018-11-10 10:26:09,441 INFO L87 Difference]: Start difference. First operand 855 states and 1202 transitions. Second operand 28 states. [2018-11-10 10:26:09,951 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 10:26:09,951 INFO L93 Difference]: Finished difference Result 871 states and 1217 transitions. [2018-11-10 10:26:09,951 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2018-11-10 10:26:09,951 INFO L78 Accepts]: Start accepts. Automaton has 28 states. Word has length 182 [2018-11-10 10:26:09,952 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 10:26:09,953 INFO L225 Difference]: With dead ends: 871 [2018-11-10 10:26:09,953 INFO L226 Difference]: Without dead ends: 869 [2018-11-10 10:26:09,953 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 213 GetRequests, 173 SyntacticMatches, 2 SemanticMatches, 38 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 147 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=299, Invalid=1261, Unknown=0, NotChecked=0, Total=1560 [2018-11-10 10:26:09,954 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 869 states. [2018-11-10 10:26:09,970 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 869 to 855. [2018-11-10 10:26:09,970 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 855 states. [2018-11-10 10:26:09,971 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 855 states to 855 states and 1201 transitions. [2018-11-10 10:26:09,971 INFO L78 Accepts]: Start accepts. Automaton has 855 states and 1201 transitions. Word has length 182 [2018-11-10 10:26:09,971 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 10:26:09,971 INFO L481 AbstractCegarLoop]: Abstraction has 855 states and 1201 transitions. [2018-11-10 10:26:09,971 INFO L482 AbstractCegarLoop]: Interpolant automaton has 28 states. [2018-11-10 10:26:09,971 INFO L276 IsEmpty]: Start isEmpty. Operand 855 states and 1201 transitions. [2018-11-10 10:26:09,972 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 198 [2018-11-10 10:26:09,972 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 10:26:09,973 INFO L375 BasicCegarLoop]: trace histogram [17, 16, 16, 12, 12, 8, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 10:26:09,973 INFO L424 AbstractCegarLoop]: === Iteration 38 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-10 10:26:09,973 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 10:26:09,973 INFO L82 PathProgramCache]: Analyzing trace with hash -1339885547, now seen corresponding path program 1 times [2018-11-10 10:26:09,973 INFO L225 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-10 10:26:09,973 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-10 10:26:09,974 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 10:26:09,974 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-10 10:26:09,974 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 10:26:09,986 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 10:26:10,109 INFO L134 CoverageAnalysis]: Checked inductivity of 811 backedges. 125 proven. 650 refuted. 0 times theorem prover too weak. 36 trivial. 0 not checked. [2018-11-10 10:26:10,110 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-10 10:26:10,110 INFO L225 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_b82e135f-7e7c-47f8-a9b2-5ad19e9c9134/bin-2019/uautomizer/z3 Starting monitored process 31 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 31 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-10 10:26:10,120 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 10:26:10,219 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 10:26:10,224 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 10:26:10,254 INFO L134 CoverageAnalysis]: Checked inductivity of 811 backedges. 125 proven. 650 refuted. 0 times theorem prover too weak. 36 trivial. 0 not checked. [2018-11-10 10:26:10,280 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-10 10:26:10,280 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11] total 11 [2018-11-10 10:26:10,280 INFO L460 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-11-10 10:26:10,281 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-11-10 10:26:10,281 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=55, Invalid=55, Unknown=0, NotChecked=0, Total=110 [2018-11-10 10:26:10,281 INFO L87 Difference]: Start difference. First operand 855 states and 1201 transitions. Second operand 11 states. [2018-11-10 10:26:10,485 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 10:26:10,485 INFO L93 Difference]: Finished difference Result 1437 states and 2015 transitions. [2018-11-10 10:26:10,485 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-11-10 10:26:10,485 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 197 [2018-11-10 10:26:10,486 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 10:26:10,488 INFO L225 Difference]: With dead ends: 1437 [2018-11-10 10:26:10,488 INFO L226 Difference]: Without dead ends: 962 [2018-11-10 10:26:10,489 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 214 GetRequests, 205 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=55, Invalid=55, Unknown=0, NotChecked=0, Total=110 [2018-11-10 10:26:10,489 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 962 states. [2018-11-10 10:26:10,512 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 962 to 933. [2018-11-10 10:26:10,512 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 933 states. [2018-11-10 10:26:10,513 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 933 states to 933 states and 1313 transitions. [2018-11-10 10:26:10,513 INFO L78 Accepts]: Start accepts. Automaton has 933 states and 1313 transitions. Word has length 197 [2018-11-10 10:26:10,514 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 10:26:10,514 INFO L481 AbstractCegarLoop]: Abstraction has 933 states and 1313 transitions. [2018-11-10 10:26:10,514 INFO L482 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-11-10 10:26:10,514 INFO L276 IsEmpty]: Start isEmpty. Operand 933 states and 1313 transitions. [2018-11-10 10:26:10,515 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 199 [2018-11-10 10:26:10,515 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 10:26:10,515 INFO L375 BasicCegarLoop]: trace histogram [17, 17, 16, 12, 12, 8, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 10:26:10,515 INFO L424 AbstractCegarLoop]: === Iteration 39 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-10 10:26:10,515 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 10:26:10,515 INFO L82 PathProgramCache]: Analyzing trace with hash 403604017, now seen corresponding path program 3 times [2018-11-10 10:26:10,515 INFO L225 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-10 10:26:10,516 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-10 10:26:10,516 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 10:26:10,516 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 10:26:10,516 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 10:26:10,591 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 10:26:10,806 INFO L134 CoverageAnalysis]: Checked inductivity of 820 backedges. 53 proven. 742 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2018-11-10 10:26:10,806 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-10 10:26:10,806 INFO L225 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_b82e135f-7e7c-47f8-a9b2-5ad19e9c9134/bin-2019/uautomizer/z3 Starting monitored process 32 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 32 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-10 10:26:10,814 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-11-10 10:26:10,965 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 13 check-sat command(s) [2018-11-10 10:26:10,965 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-10 10:26:10,970 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 10:26:11,189 INFO L134 CoverageAnalysis]: Checked inductivity of 820 backedges. 771 proven. 19 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2018-11-10 10:26:11,206 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-10 10:26:11,206 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 13] total 25 [2018-11-10 10:26:11,206 INFO L460 AbstractCegarLoop]: Interpolant automaton has 25 states [2018-11-10 10:26:11,206 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2018-11-10 10:26:11,207 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=155, Invalid=445, Unknown=0, NotChecked=0, Total=600 [2018-11-10 10:26:11,207 INFO L87 Difference]: Start difference. First operand 933 states and 1313 transitions. Second operand 25 states. [2018-11-10 10:26:11,797 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 10:26:11,797 INFO L93 Difference]: Finished difference Result 986 states and 1364 transitions. [2018-11-10 10:26:11,798 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 36 states. [2018-11-10 10:26:11,798 INFO L78 Accepts]: Start accepts. Automaton has 25 states. Word has length 198 [2018-11-10 10:26:11,798 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 10:26:11,799 INFO L225 Difference]: With dead ends: 986 [2018-11-10 10:26:11,799 INFO L226 Difference]: Without dead ends: 984 [2018-11-10 10:26:11,800 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 242 GetRequests, 199 SyntacticMatches, 0 SemanticMatches, 43 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 326 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=380, Invalid=1600, Unknown=0, NotChecked=0, Total=1980 [2018-11-10 10:26:11,800 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 984 states. [2018-11-10 10:26:11,819 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 984 to 933. [2018-11-10 10:26:11,819 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 933 states. [2018-11-10 10:26:11,820 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 933 states to 933 states and 1311 transitions. [2018-11-10 10:26:11,820 INFO L78 Accepts]: Start accepts. Automaton has 933 states and 1311 transitions. Word has length 198 [2018-11-10 10:26:11,820 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 10:26:11,821 INFO L481 AbstractCegarLoop]: Abstraction has 933 states and 1311 transitions. [2018-11-10 10:26:11,821 INFO L482 AbstractCegarLoop]: Interpolant automaton has 25 states. [2018-11-10 10:26:11,821 INFO L276 IsEmpty]: Start isEmpty. Operand 933 states and 1311 transitions. [2018-11-10 10:26:11,821 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 216 [2018-11-10 10:26:11,822 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 10:26:11,822 INFO L375 BasicCegarLoop]: trace histogram [19, 18, 18, 13, 13, 8, 5, 5, 5, 5, 5, 5, 5, 5, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 10:26:11,822 INFO L424 AbstractCegarLoop]: === Iteration 40 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-10 10:26:11,822 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 10:26:11,822 INFO L82 PathProgramCache]: Analyzing trace with hash -576783212, now seen corresponding path program 4 times [2018-11-10 10:26:11,822 INFO L225 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-10 10:26:11,822 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-10 10:26:11,823 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 10:26:11,823 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-10 10:26:11,823 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 10:26:11,844 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 10:26:11,958 INFO L134 CoverageAnalysis]: Checked inductivity of 1010 backedges. 128 proven. 842 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2018-11-10 10:26:11,958 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-10 10:26:11,958 INFO L225 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_b82e135f-7e7c-47f8-a9b2-5ad19e9c9134/bin-2019/uautomizer/z3 Starting monitored process 33 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 33 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-10 10:26:11,964 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-11-10 10:26:12,049 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-11-10 10:26:12,049 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-10 10:26:12,053 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 10:26:12,091 INFO L134 CoverageAnalysis]: Checked inductivity of 1010 backedges. 128 proven. 842 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2018-11-10 10:26:12,118 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-10 10:26:12,118 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12] total 12 [2018-11-10 10:26:12,119 INFO L460 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-11-10 10:26:12,119 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-11-10 10:26:12,119 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=66, Invalid=66, Unknown=0, NotChecked=0, Total=132 [2018-11-10 10:26:12,119 INFO L87 Difference]: Start difference. First operand 933 states and 1311 transitions. Second operand 12 states. [2018-11-10 10:26:12,242 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 10:26:12,243 INFO L93 Difference]: Finished difference Result 1127 states and 1564 transitions. [2018-11-10 10:26:12,243 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-11-10 10:26:12,243 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 215 [2018-11-10 10:26:12,243 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 10:26:12,245 INFO L225 Difference]: With dead ends: 1127 [2018-11-10 10:26:12,246 INFO L226 Difference]: Without dead ends: 1043 [2018-11-10 10:26:12,246 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 234 GetRequests, 224 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=66, Invalid=66, Unknown=0, NotChecked=0, Total=132 [2018-11-10 10:26:12,247 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1043 states. [2018-11-10 10:26:12,272 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1043 to 1011. [2018-11-10 10:26:12,272 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1011 states. [2018-11-10 10:26:12,274 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1011 states to 1011 states and 1418 transitions. [2018-11-10 10:26:12,274 INFO L78 Accepts]: Start accepts. Automaton has 1011 states and 1418 transitions. Word has length 215 [2018-11-10 10:26:12,274 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 10:26:12,274 INFO L481 AbstractCegarLoop]: Abstraction has 1011 states and 1418 transitions. [2018-11-10 10:26:12,274 INFO L482 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-11-10 10:26:12,274 INFO L276 IsEmpty]: Start isEmpty. Operand 1011 states and 1418 transitions. [2018-11-10 10:26:12,276 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 244 [2018-11-10 10:26:12,276 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 10:26:12,276 INFO L375 BasicCegarLoop]: trace histogram [21, 20, 20, 15, 15, 10, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 4, 4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 10:26:12,276 INFO L424 AbstractCegarLoop]: === Iteration 41 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-10 10:26:12,276 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 10:26:12,277 INFO L82 PathProgramCache]: Analyzing trace with hash 1513807620, now seen corresponding path program 2 times [2018-11-10 10:26:12,277 INFO L225 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-10 10:26:12,277 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-10 10:26:12,277 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 10:26:12,277 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-10 10:26:12,278 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 10:26:12,297 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 10:26:12,435 INFO L134 CoverageAnalysis]: Checked inductivity of 1283 backedges. 159 proven. 1078 refuted. 0 times theorem prover too weak. 46 trivial. 0 not checked. [2018-11-10 10:26:12,436 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-10 10:26:12,436 INFO L225 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_b82e135f-7e7c-47f8-a9b2-5ad19e9c9134/bin-2019/uautomizer/z3 Starting monitored process 34 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 34 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-10 10:26:12,441 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-11-10 10:26:12,527 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-11-10 10:26:12,527 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-10 10:26:12,531 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 10:26:12,559 INFO L134 CoverageAnalysis]: Checked inductivity of 1283 backedges. 159 proven. 1078 refuted. 0 times theorem prover too weak. 46 trivial. 0 not checked. [2018-11-10 10:26:12,575 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-10 10:26:12,575 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13] total 13 [2018-11-10 10:26:12,575 INFO L460 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-11-10 10:26:12,575 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-11-10 10:26:12,575 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=78, Invalid=78, Unknown=0, NotChecked=0, Total=156 [2018-11-10 10:26:12,576 INFO L87 Difference]: Start difference. First operand 1011 states and 1418 transitions. Second operand 13 states. [2018-11-10 10:26:12,704 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 10:26:12,704 INFO L93 Difference]: Finished difference Result 1677 states and 2346 transitions. [2018-11-10 10:26:12,704 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-11-10 10:26:12,704 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 243 [2018-11-10 10:26:12,705 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 10:26:12,707 INFO L225 Difference]: With dead ends: 1677 [2018-11-10 10:26:12,708 INFO L226 Difference]: Without dead ends: 1124 [2018-11-10 10:26:12,709 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 264 GetRequests, 253 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=78, Invalid=78, Unknown=0, NotChecked=0, Total=156 [2018-11-10 10:26:12,710 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1124 states. [2018-11-10 10:26:12,739 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1124 to 1089. [2018-11-10 10:26:12,739 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1089 states. [2018-11-10 10:26:12,740 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1089 states to 1089 states and 1529 transitions. [2018-11-10 10:26:12,740 INFO L78 Accepts]: Start accepts. Automaton has 1089 states and 1529 transitions. Word has length 243 [2018-11-10 10:26:12,740 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 10:26:12,740 INFO L481 AbstractCegarLoop]: Abstraction has 1089 states and 1529 transitions. [2018-11-10 10:26:12,740 INFO L482 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-11-10 10:26:12,740 INFO L276 IsEmpty]: Start isEmpty. Operand 1089 states and 1529 transitions. [2018-11-10 10:26:12,741 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 262 [2018-11-10 10:26:12,741 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 10:26:12,741 INFO L375 BasicCegarLoop]: trace histogram [23, 22, 22, 16, 16, 10, 6, 6, 6, 6, 6, 6, 6, 6, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 10:26:12,741 INFO L424 AbstractCegarLoop]: === Iteration 42 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-10 10:26:12,741 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 10:26:12,741 INFO L82 PathProgramCache]: Analyzing trace with hash -438655549, now seen corresponding path program 5 times [2018-11-10 10:26:12,741 INFO L225 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-10 10:26:12,741 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-10 10:26:12,742 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 10:26:12,742 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-10 10:26:12,742 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 10:26:12,757 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 10:26:12,880 INFO L134 CoverageAnalysis]: Checked inductivity of 1530 backedges. 158 proven. 1322 refuted. 0 times theorem prover too weak. 50 trivial. 0 not checked. [2018-11-10 10:26:12,881 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-10 10:26:12,881 INFO L225 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_b82e135f-7e7c-47f8-a9b2-5ad19e9c9134/bin-2019/uautomizer/z3 Starting monitored process 35 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 35 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-10 10:26:12,890 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-11-10 10:26:13,098 INFO L249 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 14 check-sat command(s) [2018-11-10 10:26:13,098 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-10 10:26:13,102 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 10:26:13,133 INFO L134 CoverageAnalysis]: Checked inductivity of 1530 backedges. 158 proven. 1322 refuted. 0 times theorem prover too weak. 50 trivial. 0 not checked. [2018-11-10 10:26:13,150 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-10 10:26:13,150 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 14] total 14 [2018-11-10 10:26:13,150 INFO L460 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-11-10 10:26:13,150 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-11-10 10:26:13,150 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=91, Invalid=91, Unknown=0, NotChecked=0, Total=182 [2018-11-10 10:26:13,150 INFO L87 Difference]: Start difference. First operand 1089 states and 1529 transitions. Second operand 14 states. [2018-11-10 10:26:13,270 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 10:26:13,270 INFO L93 Difference]: Finished difference Result 1289 states and 1786 transitions. [2018-11-10 10:26:13,270 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-11-10 10:26:13,270 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 261 [2018-11-10 10:26:13,270 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 10:26:13,272 INFO L225 Difference]: With dead ends: 1289 [2018-11-10 10:26:13,273 INFO L226 Difference]: Without dead ends: 1205 [2018-11-10 10:26:13,273 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 284 GetRequests, 272 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=91, Invalid=91, Unknown=0, NotChecked=0, Total=182 [2018-11-10 10:26:13,274 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1205 states. [2018-11-10 10:26:13,298 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1205 to 1167. [2018-11-10 10:26:13,298 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1167 states. [2018-11-10 10:26:13,299 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1167 states to 1167 states and 1636 transitions. [2018-11-10 10:26:13,299 INFO L78 Accepts]: Start accepts. Automaton has 1167 states and 1636 transitions. Word has length 261 [2018-11-10 10:26:13,300 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 10:26:13,300 INFO L481 AbstractCegarLoop]: Abstraction has 1167 states and 1636 transitions. [2018-11-10 10:26:13,300 INFO L482 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-11-10 10:26:13,300 INFO L276 IsEmpty]: Start isEmpty. Operand 1167 states and 1636 transitions. [2018-11-10 10:26:13,301 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 290 [2018-11-10 10:26:13,301 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 10:26:13,301 INFO L375 BasicCegarLoop]: trace histogram [25, 24, 24, 18, 18, 12, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 5, 5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 10:26:13,301 INFO L424 AbstractCegarLoop]: === Iteration 43 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-10 10:26:13,301 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 10:26:13,302 INFO L82 PathProgramCache]: Analyzing trace with hash 1601829811, now seen corresponding path program 3 times [2018-11-10 10:26:13,302 INFO L225 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-10 10:26:13,302 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-10 10:26:13,302 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 10:26:13,302 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-10 10:26:13,302 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 10:26:13,322 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 10:26:13,471 INFO L134 CoverageAnalysis]: Checked inductivity of 1863 backedges. 193 proven. 1614 refuted. 0 times theorem prover too weak. 56 trivial. 0 not checked. [2018-11-10 10:26:13,472 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-10 10:26:13,472 INFO L225 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_b82e135f-7e7c-47f8-a9b2-5ad19e9c9134/bin-2019/uautomizer/z3 Starting monitored process 36 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 36 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-10 10:26:13,477 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-11-10 10:26:13,522 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 5 check-sat command(s) [2018-11-10 10:26:13,522 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-10 10:26:13,525 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 10:26:15,932 INFO L134 CoverageAnalysis]: Checked inductivity of 1863 backedges. 469 proven. 4 refuted. 0 times theorem prover too weak. 1390 trivial. 0 not checked. [2018-11-10 10:26:15,948 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-10 10:26:15,948 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 6] total 19 [2018-11-10 10:26:15,948 INFO L460 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-11-10 10:26:15,948 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-11-10 10:26:15,948 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=128, Invalid=213, Unknown=1, NotChecked=0, Total=342 [2018-11-10 10:26:15,949 INFO L87 Difference]: Start difference. First operand 1167 states and 1636 transitions. Second operand 19 states. [2018-11-10 10:26:16,511 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 10:26:16,511 INFO L93 Difference]: Finished difference Result 1318 states and 1835 transitions. [2018-11-10 10:26:16,511 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 37 states. [2018-11-10 10:26:16,511 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 289 [2018-11-10 10:26:16,511 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 10:26:16,512 INFO L225 Difference]: With dead ends: 1318 [2018-11-10 10:26:16,512 INFO L226 Difference]: Without dead ends: 687 [2018-11-10 10:26:16,513 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 347 GetRequests, 306 SyntacticMatches, 0 SemanticMatches, 41 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 320 ImplicationChecksByTransitivity, 2.7s TimeCoverageRelationStatistics Valid=538, Invalid=1267, Unknown=1, NotChecked=0, Total=1806 [2018-11-10 10:26:16,513 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 687 states. [2018-11-10 10:26:16,528 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 687 to 662. [2018-11-10 10:26:16,528 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 662 states. [2018-11-10 10:26:16,529 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 662 states to 662 states and 909 transitions. [2018-11-10 10:26:16,529 INFO L78 Accepts]: Start accepts. Automaton has 662 states and 909 transitions. Word has length 289 [2018-11-10 10:26:16,529 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 10:26:16,529 INFO L481 AbstractCegarLoop]: Abstraction has 662 states and 909 transitions. [2018-11-10 10:26:16,529 INFO L482 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-11-10 10:26:16,529 INFO L276 IsEmpty]: Start isEmpty. Operand 662 states and 909 transitions. [2018-11-10 10:26:16,530 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 354 [2018-11-10 10:26:16,530 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 10:26:16,530 INFO L375 BasicCegarLoop]: trace histogram [31, 30, 30, 22, 22, 14, 8, 8, 8, 8, 8, 8, 8, 8, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 10:26:16,530 INFO L424 AbstractCegarLoop]: === Iteration 44 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-10 10:26:16,531 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 10:26:16,531 INFO L82 PathProgramCache]: Analyzing trace with hash -1748649631, now seen corresponding path program 6 times [2018-11-10 10:26:16,531 INFO L225 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-10 10:26:16,531 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-10 10:26:16,531 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 10:26:16,531 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-10 10:26:16,531 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 10:26:16,551 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 10:26:16,719 INFO L134 CoverageAnalysis]: Checked inductivity of 2894 backedges. 218 proven. 2606 refuted. 0 times theorem prover too weak. 70 trivial. 0 not checked. [2018-11-10 10:26:16,719 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-10 10:26:16,719 INFO L225 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_b82e135f-7e7c-47f8-a9b2-5ad19e9c9134/bin-2019/uautomizer/z3 Starting monitored process 37 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 37 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-10 10:26:16,724 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-11-10 10:26:16,942 INFO L249 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 21 check-sat command(s) [2018-11-10 10:26:16,942 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-10 10:26:16,947 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 10:26:17,003 INFO L134 CoverageAnalysis]: Checked inductivity of 2894 backedges. 218 proven. 2606 refuted. 0 times theorem prover too weak. 70 trivial. 0 not checked. [2018-11-10 10:26:17,030 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-10 10:26:17,031 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 18] total 18 [2018-11-10 10:26:17,031 INFO L460 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-11-10 10:26:17,031 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-11-10 10:26:17,031 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=153, Invalid=153, Unknown=0, NotChecked=0, Total=306 [2018-11-10 10:26:17,031 INFO L87 Difference]: Start difference. First operand 662 states and 909 transitions. Second operand 18 states. [2018-11-10 10:26:17,162 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 10:26:17,162 INFO L93 Difference]: Finished difference Result 867 states and 1192 transitions. [2018-11-10 10:26:17,162 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-11-10 10:26:17,162 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 353 [2018-11-10 10:26:17,162 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 10:26:17,163 INFO L225 Difference]: With dead ends: 867 [2018-11-10 10:26:17,163 INFO L226 Difference]: Without dead ends: 783 [2018-11-10 10:26:17,164 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 384 GetRequests, 368 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=153, Invalid=153, Unknown=0, NotChecked=0, Total=306 [2018-11-10 10:26:17,164 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 783 states. [2018-11-10 10:26:17,185 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 783 to 740. [2018-11-10 10:26:17,185 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 740 states. [2018-11-10 10:26:17,186 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 740 states to 740 states and 1016 transitions. [2018-11-10 10:26:17,186 INFO L78 Accepts]: Start accepts. Automaton has 740 states and 1016 transitions. Word has length 353 [2018-11-10 10:26:17,186 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 10:26:17,186 INFO L481 AbstractCegarLoop]: Abstraction has 740 states and 1016 transitions. [2018-11-10 10:26:17,186 INFO L482 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-11-10 10:26:17,186 INFO L276 IsEmpty]: Start isEmpty. Operand 740 states and 1016 transitions. [2018-11-10 10:26:17,188 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 400 [2018-11-10 10:26:17,188 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 10:26:17,188 INFO L375 BasicCegarLoop]: trace histogram [35, 34, 34, 25, 25, 16, 9, 9, 9, 9, 9, 9, 9, 9, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 10:26:17,188 INFO L424 AbstractCegarLoop]: === Iteration 45 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-10 10:26:17,188 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 10:26:17,188 INFO L82 PathProgramCache]: Analyzing trace with hash -1805057072, now seen corresponding path program 7 times [2018-11-10 10:26:17,189 INFO L225 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-10 10:26:17,189 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-10 10:26:17,189 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 10:26:17,189 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-10 10:26:17,189 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 10:26:17,592 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-10 10:26:17,921 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-10 10:26:17,999 INFO L442 BasicCegarLoop]: Counterexample might be feasible [2018-11-10 10:26:18,091 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 10.11 10:26:18 BoogieIcfgContainer [2018-11-10 10:26:18,091 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-11-10 10:26:18,092 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2018-11-10 10:26:18,092 INFO L271 PluginConnector]: Initializing Witness Printer... [2018-11-10 10:26:18,092 INFO L276 PluginConnector]: Witness Printer initialized [2018-11-10 10:26:18,094 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 10.11 10:25:52" (3/4) ... [2018-11-10 10:26:18,095 INFO L138 WitnessPrinter]: Generating witness for reachability counterexample [2018-11-10 10:26:18,210 INFO L145 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/working_dir_b82e135f-7e7c-47f8-a9b2-5ad19e9c9134/bin-2019/uautomizer/witness.graphml [2018-11-10 10:26:18,210 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2018-11-10 10:26:18,212 INFO L168 Benchmark]: Toolchain (without parser) took 26472.09 ms. Allocated memory was 1.0 GB in the beginning and 1.8 GB in the end (delta: 758.6 MB). Free memory was 954.9 MB in the beginning and 1.4 GB in the end (delta: -462.1 MB). Peak memory consumption was 296.6 MB. Max. memory is 11.5 GB. [2018-11-10 10:26:18,212 INFO L168 Benchmark]: CDTParser took 0.10 ms. Allocated memory is still 1.0 GB. Free memory is still 980.1 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-11-10 10:26:18,213 INFO L168 Benchmark]: CACSL2BoogieTranslator took 261.14 ms. Allocated memory is still 1.0 GB. Free memory was 954.9 MB in the beginning and 932.3 MB in the end (delta: 22.6 MB). Peak memory consumption was 22.6 MB. Max. memory is 11.5 GB. [2018-11-10 10:26:18,213 INFO L168 Benchmark]: Boogie Preprocessor took 92.95 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 131.1 MB). Free memory was 932.3 MB in the beginning and 1.1 GB in the end (delta: -195.4 MB). Peak memory consumption was 19.7 MB. Max. memory is 11.5 GB. [2018-11-10 10:26:18,213 INFO L168 Benchmark]: RCFGBuilder took 602.38 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 60.9 MB). Peak memory consumption was 60.9 MB. Max. memory is 11.5 GB. [2018-11-10 10:26:18,213 INFO L168 Benchmark]: TraceAbstraction took 25393.38 ms. Allocated memory was 1.2 GB in the beginning and 1.8 GB in the end (delta: 627.6 MB). Free memory was 1.1 GB in the beginning and 1.5 GB in the end (delta: -387.1 MB). Peak memory consumption was 240.5 MB. Max. memory is 11.5 GB. [2018-11-10 10:26:18,213 INFO L168 Benchmark]: Witness Printer took 118.29 ms. Allocated memory is still 1.8 GB. Free memory was 1.5 GB in the beginning and 1.4 GB in the end (delta: 37.0 MB). Peak memory consumption was 37.0 MB. Max. memory is 11.5 GB. [2018-11-10 10:26:18,215 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.10 ms. Allocated memory is still 1.0 GB. Free memory is still 980.1 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 261.14 ms. Allocated memory is still 1.0 GB. Free memory was 954.9 MB in the beginning and 932.3 MB in the end (delta: 22.6 MB). Peak memory consumption was 22.6 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 92.95 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 131.1 MB). Free memory was 932.3 MB in the beginning and 1.1 GB in the end (delta: -195.4 MB). Peak memory consumption was 19.7 MB. Max. memory is 11.5 GB. * RCFGBuilder took 602.38 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 60.9 MB). Peak memory consumption was 60.9 MB. Max. memory is 11.5 GB. * TraceAbstraction took 25393.38 ms. Allocated memory was 1.2 GB in the beginning and 1.8 GB in the end (delta: 627.6 MB). Free memory was 1.1 GB in the beginning and 1.5 GB in the end (delta: -387.1 MB). Peak memory consumption was 240.5 MB. Max. memory is 11.5 GB. * Witness Printer took 118.29 ms. Allocated memory is still 1.8 GB. Free memory was 1.5 GB in the beginning and 1.4 GB in the end (delta: 37.0 MB). Peak memory consumption was 37.0 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 569]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L5] int m_Protocol = 1; [L6] int m_msg_2 = 2; [L7] int m_recv_ack_2 = 3; [L8] int m_msg_1_1 = 4; [L9] int m_msg_1_2 = 5; [L10] int m_recv_ack_1_1 = 6; [L11] int m_recv_ack_1_2 = 7; VAL [\old(m_msg_1_1)=23, \old(m_msg_1_2)=20, \old(m_msg_2)=21, \old(m_Protocol)=25, \old(m_recv_ack_1_1)=22, \old(m_recv_ack_1_2)=24, \old(m_recv_ack_2)=26, m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L16] int q = 0; [L17] int method_id; [L20] int this_expect = 0; [L21] int this_buffer_empty = 0; VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, q=0, this_buffer_empty=0, this_expect=0] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, P1=3, P2=3, P3=0, P4=3, P5=0, P6=0, P7=0, P8=1, P9=3, q=0, this_buffer_empty=0, this_expect=0] [L43] COND TRUE q == 0 [L44] COND TRUE __VERIFIER_nondet_int() [L46] COND TRUE 1 [L48] method_id = 1 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=1, P1=3, P2=3, P3=0, P4=3, P5=0, P6=0, P7=0, P8=1, P9=3, q=0, this_buffer_empty=0, this_expect=0] [L50] COND FALSE !(0) [L54] q = 1 [L56] this_expect=0 [L56] this_buffer_empty=1 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=1, P1=3, P2=3, P3=0, P4=3, P5=0, P6=0, P7=0, P8=1, P9=3, q=1, this_buffer_empty=1, this_expect=0] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=1, P1=18, P2=3, P3=0, P4=3, P5=0, P6=0, P7=0, P8=3, P9=3, q=1, this_buffer_empty=1, this_expect=0] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=1, P1=18, P2=3, P3=0, P4=3, P5=0, P6=0, P7=0, P8=3, P9=3, q=1, this_buffer_empty=1, this_expect=0] [L63] COND TRUE q == 1 [L64] COND TRUE __VERIFIER_nondet_int() [L66] COND TRUE !((P1 % 2) != (0 % 2)) [L68] method_id = 2 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=18, P2=3, P3=0, P4=3, P5=0, P6=0, P7=0, P8=3, P9=3, q=1, this_buffer_empty=1, this_expect=0] [L70] COND FALSE !((((((P1 % 2) != (this_expect % 2)) && (this_buffer_empty == 1)) && !((P1 % 2) != (0 % 2))) || ((this_buffer_empty != 1) && !((P1 % 2) != (0 % 2))))) [L74] q = 3 [L76] this_expect=(this_expect + 1) [L76] this_buffer_empty=(1 - this_buffer_empty) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=18, P2=3, P3=0, P4=3, P5=0, P6=0, P7=0, P8=3, P9=3, q=3, this_buffer_empty=0, this_expect=1] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=0, P2=3, P3=0, P4=3, P5=0, P6=0, P7=0, P8=3, P9=0, q=3, this_buffer_empty=0, this_expect=1] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=0, P2=3, P3=0, P4=3, P5=0, P6=0, P7=0, P8=3, P9=0, q=3, this_buffer_empty=0, this_expect=1] [L63] COND FALSE !(q == 1) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=0, P2=3, P3=0, P4=3, P5=0, P6=0, P7=0, P8=3, P9=0, q=3, this_buffer_empty=0, this_expect=1] [L163] COND FALSE !(q == 2) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=0, P2=3, P3=0, P4=3, P5=0, P6=0, P7=0, P8=3, P9=0, q=3, this_buffer_empty=0, this_expect=1] [L263] COND TRUE q == 3 [L264] COND FALSE !(__VERIFIER_nondet_int()) [L280] COND TRUE __VERIFIER_nondet_int() [L282] COND TRUE !(P1 != (((0 + 1) - 1) % 2)) [L284] method_id = 3 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=0, P2=3, P3=0, P4=3, P5=0, P6=0, P7=0, P8=3, P9=0, q=3, this_buffer_empty=0, this_expect=1] [L286] COND FALSE !((((this_buffer_empty == 1) && !(P3 != (((0 + 1) - 1) % 2))) || (((P3 != ((this_expect - 1) % 2)) && (this_buffer_empty != 1)) && !(P3 != (((0 + 1) - 1) % 2))))) [L290] q = 4 [L292] this_expect=this_expect [L292] this_buffer_empty=(1 - this_buffer_empty) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=0, P2=3, P3=0, P4=3, P5=0, P6=0, P7=0, P8=3, P9=0, q=4, this_buffer_empty=1, this_expect=1] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=7, P2=-1, P3=0, P4=-1, P5=0, P6=-2, P7=0, P8=-1, P9=-1, q=4, this_buffer_empty=1, this_expect=1] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=7, P2=-1, P3=0, P4=-1, P5=0, P6=-2, P7=0, P8=-1, P9=-1, q=4, this_buffer_empty=1, this_expect=1] [L63] COND FALSE !(q == 1) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=7, P2=-1, P3=0, P4=-1, P5=0, P6=-2, P7=0, P8=-1, P9=-1, q=4, this_buffer_empty=1, this_expect=1] [L163] COND FALSE !(q == 2) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=7, P2=-1, P3=0, P4=-1, P5=0, P6=-2, P7=0, P8=-1, P9=-1, q=4, this_buffer_empty=1, this_expect=1] [L263] COND FALSE !(q == 3) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=7, P2=-1, P3=0, P4=-1, P5=0, P6=-2, P7=0, P8=-1, P9=-1, q=4, this_buffer_empty=1, this_expect=1] [L363] COND TRUE q == 4 [L364] COND FALSE !(__VERIFIER_nondet_int()) [L380] COND FALSE !(__VERIFIER_nondet_int()) [L396] COND FALSE !(__VERIFIER_nondet_int()) [L412] COND TRUE __VERIFIER_nondet_int() [L414] COND TRUE (((P1 % 2) != (0 % 2)) && !(((P1 % 2) != ((0 + 1) % 2)) && ((P1 % 2) != (0 % 2)))) [L416] method_id = 5 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=7, P2=-1, P3=0, P4=-1, P5=0, P6=-2, P7=0, P8=-1, P9=-1, q=4, this_buffer_empty=1, this_expect=1] [L418] COND FALSE !(((((((P6 % 2) != (this_expect % 2)) && (this_buffer_empty == 1)) && ((P6 % 2) != (0 % 2))) && (((P6 % 2) != (0 % 2)) && !(((P6 % 2) != ((0 + 1) % 2)) && ((P6 % 2) != (0 % 2))))) || (((this_buffer_empty != 1) && ((P6 % 2) != (0 % 2))) && (((P6 % 2) != (0 % 2)) && !(((P6 % 2) != ((0 + 1) % 2)) && ((P6 % 2) != (0 % 2))))))) [L422] q = 5 [L424] this_expect=(this_expect + 1) [L424] this_buffer_empty=(1 - this_buffer_empty) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=7, P2=-1, P3=0, P4=-1, P5=0, P6=-2, P7=0, P8=-1, P9=-1, q=5, this_buffer_empty=0, this_expect=2] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-3, q=5, this_buffer_empty=0, this_expect=2] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-3, q=5, this_buffer_empty=0, this_expect=2] [L63] COND FALSE !(q == 1) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-3, q=5, this_buffer_empty=0, this_expect=2] [L163] COND FALSE !(q == 2) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-3, q=5, this_buffer_empty=0, this_expect=2] [L263] COND FALSE !(q == 3) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-3, q=5, this_buffer_empty=0, this_expect=2] [L363] COND FALSE !(q == 4) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-3, q=5, this_buffer_empty=0, this_expect=2] [L463] COND TRUE q == 5 [L464] COND FALSE !(__VERIFIER_nondet_int()) [L480] COND FALSE !(__VERIFIER_nondet_int()) [L496] COND FALSE !(__VERIFIER_nondet_int()) [L512] COND FALSE !(__VERIFIER_nondet_int()) [L528] COND FALSE !(__VERIFIER_nondet_int()) [L544] COND TRUE __VERIFIER_nondet_int() [L546] COND TRUE ((P1 != (((0 + 1) - 1) % 2)) && !((P1 != ((((0 + 1) + 1) - 1) % 2)) && (P1 != (((0 + 1) - 1) % 2)))) [L548] method_id = 7 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=7, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-3, q=5, this_buffer_empty=0, this_expect=2] [L550] COND FALSE !(((((this_buffer_empty == 1) && (P9 != (((0 + 1) - 1) % 2))) && ((P9 != (((0 + 1) - 1) % 2)) && !((P9 != ((((0 + 1) + 1) - 1) % 2)) && (P9 != (((0 + 1) - 1) % 2))))) || ((((P9 != ((this_expect - 1) % 2)) && (this_buffer_empty != 1)) && (P9 != (((0 + 1) - 1) % 2))) && ((P9 != (((0 + 1) - 1) % 2)) && !((P9 != ((((0 + 1) + 1) - 1) % 2)) && (P9 != (((0 + 1) - 1) % 2))))))) [L554] q = 1 [L556] this_expect=this_expect [L556] this_buffer_empty=(1 - this_buffer_empty) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=7, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-3, q=1, this_buffer_empty=1, this_expect=2] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=7, P1=14, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=1, this_buffer_empty=1, this_expect=2] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=7, P1=14, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=1, this_buffer_empty=1, this_expect=2] [L63] COND TRUE q == 1 [L64] COND TRUE __VERIFIER_nondet_int() [L66] COND TRUE !((P1 % 2) != (0 % 2)) [L68] method_id = 2 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=14, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=1, this_buffer_empty=1, this_expect=2] [L70] COND FALSE !((((((P1 % 2) != (this_expect % 2)) && (this_buffer_empty == 1)) && !((P1 % 2) != (0 % 2))) || ((this_buffer_empty != 1) && !((P1 % 2) != (0 % 2))))) [L74] q = 3 [L76] this_expect=(this_expect + 1) [L76] this_buffer_empty=(1 - this_buffer_empty) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=14, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=3, this_buffer_empty=0, this_expect=3] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=0, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=3, this_buffer_empty=0, this_expect=3] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=0, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=3, this_buffer_empty=0, this_expect=3] [L63] COND FALSE !(q == 1) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=0, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=3, this_buffer_empty=0, this_expect=3] [L163] COND FALSE !(q == 2) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=0, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=3, this_buffer_empty=0, this_expect=3] [L263] COND TRUE q == 3 [L264] COND FALSE !(__VERIFIER_nondet_int()) [L280] COND TRUE __VERIFIER_nondet_int() [L282] COND TRUE !(P1 != (((0 + 1) - 1) % 2)) [L284] method_id = 3 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=0, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=3, this_buffer_empty=0, this_expect=3] [L286] COND FALSE !((((this_buffer_empty == 1) && !(P3 != (((0 + 1) - 1) % 2))) || (((P3 != ((this_expect - 1) % 2)) && (this_buffer_empty != 1)) && !(P3 != (((0 + 1) - 1) % 2))))) [L290] q = 4 [L292] this_expect=this_expect [L292] this_buffer_empty=(1 - this_buffer_empty) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=0, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=4, this_buffer_empty=1, this_expect=3] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=19, P2=-1, P3=0, P4=-1, P5=0, P6=-2, P7=0, P8=-1, P9=-1, q=4, this_buffer_empty=1, this_expect=3] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=19, P2=-1, P3=0, P4=-1, P5=0, P6=-2, P7=0, P8=-1, P9=-1, q=4, this_buffer_empty=1, this_expect=3] [L63] COND FALSE !(q == 1) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=19, P2=-1, P3=0, P4=-1, P5=0, P6=-2, P7=0, P8=-1, P9=-1, q=4, this_buffer_empty=1, this_expect=3] [L163] COND FALSE !(q == 2) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=19, P2=-1, P3=0, P4=-1, P5=0, P6=-2, P7=0, P8=-1, P9=-1, q=4, this_buffer_empty=1, this_expect=3] [L263] COND FALSE !(q == 3) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=19, P2=-1, P3=0, P4=-1, P5=0, P6=-2, P7=0, P8=-1, P9=-1, q=4, this_buffer_empty=1, this_expect=3] [L363] COND TRUE q == 4 [L364] COND FALSE !(__VERIFIER_nondet_int()) [L380] COND FALSE !(__VERIFIER_nondet_int()) [L396] COND FALSE !(__VERIFIER_nondet_int()) [L412] COND TRUE __VERIFIER_nondet_int() [L414] COND TRUE (((P1 % 2) != (0 % 2)) && !(((P1 % 2) != ((0 + 1) % 2)) && ((P1 % 2) != (0 % 2)))) [L416] method_id = 5 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=19, P2=-1, P3=0, P4=-1, P5=0, P6=-2, P7=0, P8=-1, P9=-1, q=4, this_buffer_empty=1, this_expect=3] [L418] COND FALSE !(((((((P6 % 2) != (this_expect % 2)) && (this_buffer_empty == 1)) && ((P6 % 2) != (0 % 2))) && (((P6 % 2) != (0 % 2)) && !(((P6 % 2) != ((0 + 1) % 2)) && ((P6 % 2) != (0 % 2))))) || (((this_buffer_empty != 1) && ((P6 % 2) != (0 % 2))) && (((P6 % 2) != (0 % 2)) && !(((P6 % 2) != ((0 + 1) % 2)) && ((P6 % 2) != (0 % 2))))))) [L422] q = 5 [L424] this_expect=(this_expect + 1) [L424] this_buffer_empty=(1 - this_buffer_empty) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=19, P2=-1, P3=0, P4=-1, P5=0, P6=-2, P7=0, P8=-1, P9=-1, q=5, this_buffer_empty=0, this_expect=4] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=0, q=5, this_buffer_empty=0, this_expect=4] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=0, q=5, this_buffer_empty=0, this_expect=4] [L63] COND FALSE !(q == 1) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=0, q=5, this_buffer_empty=0, this_expect=4] [L163] COND FALSE !(q == 2) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=0, q=5, this_buffer_empty=0, this_expect=4] [L263] COND FALSE !(q == 3) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=0, q=5, this_buffer_empty=0, this_expect=4] [L363] COND FALSE !(q == 4) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=0, q=5, this_buffer_empty=0, this_expect=4] [L463] COND TRUE q == 5 [L464] COND FALSE !(__VERIFIER_nondet_int()) [L480] COND FALSE !(__VERIFIER_nondet_int()) [L496] COND FALSE !(__VERIFIER_nondet_int()) [L512] COND FALSE !(__VERIFIER_nondet_int()) [L528] COND FALSE !(__VERIFIER_nondet_int()) [L544] COND TRUE __VERIFIER_nondet_int() [L546] COND TRUE ((P1 != (((0 + 1) - 1) % 2)) && !((P1 != ((((0 + 1) + 1) - 1) % 2)) && (P1 != (((0 + 1) - 1) % 2)))) [L548] method_id = 7 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=7, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=0, q=5, this_buffer_empty=0, this_expect=4] [L550] COND FALSE !(((((this_buffer_empty == 1) && (P9 != (((0 + 1) - 1) % 2))) && ((P9 != (((0 + 1) - 1) % 2)) && !((P9 != ((((0 + 1) + 1) - 1) % 2)) && (P9 != (((0 + 1) - 1) % 2))))) || ((((P9 != ((this_expect - 1) % 2)) && (this_buffer_empty != 1)) && (P9 != (((0 + 1) - 1) % 2))) && ((P9 != (((0 + 1) - 1) % 2)) && !((P9 != ((((0 + 1) + 1) - 1) % 2)) && (P9 != (((0 + 1) - 1) % 2))))))) [L554] q = 1 [L556] this_expect=this_expect [L556] this_buffer_empty=(1 - this_buffer_empty) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=7, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=0, q=1, this_buffer_empty=1, this_expect=4] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=7, P1=-10, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=1, this_buffer_empty=1, this_expect=4] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=7, P1=-10, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=1, this_buffer_empty=1, this_expect=4] [L63] COND TRUE q == 1 [L64] COND TRUE __VERIFIER_nondet_int() [L66] COND TRUE !((P1 % 2) != (0 % 2)) [L68] method_id = 2 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=-10, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=1, this_buffer_empty=1, this_expect=4] [L70] COND FALSE !((((((P1 % 2) != (this_expect % 2)) && (this_buffer_empty == 1)) && !((P1 % 2) != (0 % 2))) || ((this_buffer_empty != 1) && !((P1 % 2) != (0 % 2))))) [L74] q = 3 [L76] this_expect=(this_expect + 1) [L76] this_buffer_empty=(1 - this_buffer_empty) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=-10, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=3, this_buffer_empty=0, this_expect=5] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=0, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=3, this_buffer_empty=0, this_expect=5] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=0, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=3, this_buffer_empty=0, this_expect=5] [L63] COND FALSE !(q == 1) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=0, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=3, this_buffer_empty=0, this_expect=5] [L163] COND FALSE !(q == 2) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=0, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=3, this_buffer_empty=0, this_expect=5] [L263] COND TRUE q == 3 [L264] COND FALSE !(__VERIFIER_nondet_int()) [L280] COND TRUE __VERIFIER_nondet_int() [L282] COND TRUE !(P1 != (((0 + 1) - 1) % 2)) [L284] method_id = 3 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=0, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=3, this_buffer_empty=0, this_expect=5] [L286] COND FALSE !((((this_buffer_empty == 1) && !(P3 != (((0 + 1) - 1) % 2))) || (((P3 != ((this_expect - 1) % 2)) && (this_buffer_empty != 1)) && !(P3 != (((0 + 1) - 1) % 2))))) [L290] q = 4 [L292] this_expect=this_expect [L292] this_buffer_empty=(1 - this_buffer_empty) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=0, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=4, this_buffer_empty=1, this_expect=5] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=5, P2=-1, P3=0, P4=-1, P5=0, P6=-1, P7=0, P8=-1, P9=-1, q=4, this_buffer_empty=1, this_expect=5] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=5, P2=-1, P3=0, P4=-1, P5=0, P6=-1, P7=0, P8=-1, P9=-1, q=4, this_buffer_empty=1, this_expect=5] [L63] COND FALSE !(q == 1) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=5, P2=-1, P3=0, P4=-1, P5=0, P6=-1, P7=0, P8=-1, P9=-1, q=4, this_buffer_empty=1, this_expect=5] [L163] COND FALSE !(q == 2) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=5, P2=-1, P3=0, P4=-1, P5=0, P6=-1, P7=0, P8=-1, P9=-1, q=4, this_buffer_empty=1, this_expect=5] [L263] COND FALSE !(q == 3) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=5, P2=-1, P3=0, P4=-1, P5=0, P6=-1, P7=0, P8=-1, P9=-1, q=4, this_buffer_empty=1, this_expect=5] [L363] COND TRUE q == 4 [L364] COND FALSE !(__VERIFIER_nondet_int()) [L380] COND FALSE !(__VERIFIER_nondet_int()) [L396] COND FALSE !(__VERIFIER_nondet_int()) [L412] COND TRUE __VERIFIER_nondet_int() [L414] COND TRUE (((P1 % 2) != (0 % 2)) && !(((P1 % 2) != ((0 + 1) % 2)) && ((P1 % 2) != (0 % 2)))) [L416] method_id = 5 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=5, P2=-1, P3=0, P4=-1, P5=0, P6=-1, P7=0, P8=-1, P9=-1, q=4, this_buffer_empty=1, this_expect=5] [L418] COND FALSE !(((((((P6 % 2) != (this_expect % 2)) && (this_buffer_empty == 1)) && ((P6 % 2) != (0 % 2))) && (((P6 % 2) != (0 % 2)) && !(((P6 % 2) != ((0 + 1) % 2)) && ((P6 % 2) != (0 % 2))))) || (((this_buffer_empty != 1) && ((P6 % 2) != (0 % 2))) && (((P6 % 2) != (0 % 2)) && !(((P6 % 2) != ((0 + 1) % 2)) && ((P6 % 2) != (0 % 2))))))) [L422] q = 5 [L424] this_expect=(this_expect + 1) [L424] this_buffer_empty=(1 - this_buffer_empty) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=5, P2=-1, P3=0, P4=-1, P5=0, P6=-1, P7=0, P8=-1, P9=-1, q=5, this_buffer_empty=0, this_expect=6] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=1, q=5, this_buffer_empty=0, this_expect=6] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=1, q=5, this_buffer_empty=0, this_expect=6] [L63] COND FALSE !(q == 1) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=1, q=5, this_buffer_empty=0, this_expect=6] [L163] COND FALSE !(q == 2) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=1, q=5, this_buffer_empty=0, this_expect=6] [L263] COND FALSE !(q == 3) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=1, q=5, this_buffer_empty=0, this_expect=6] [L363] COND FALSE !(q == 4) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=1, q=5, this_buffer_empty=0, this_expect=6] [L463] COND TRUE q == 5 [L464] COND FALSE !(__VERIFIER_nondet_int()) [L480] COND FALSE !(__VERIFIER_nondet_int()) [L496] COND FALSE !(__VERIFIER_nondet_int()) [L512] COND FALSE !(__VERIFIER_nondet_int()) [L528] COND FALSE !(__VERIFIER_nondet_int()) [L544] COND TRUE __VERIFIER_nondet_int() [L546] COND TRUE ((P1 != (((0 + 1) - 1) % 2)) && !((P1 != ((((0 + 1) + 1) - 1) % 2)) && (P1 != (((0 + 1) - 1) % 2)))) [L548] method_id = 7 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=7, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=1, q=5, this_buffer_empty=0, this_expect=6] [L550] COND FALSE !(((((this_buffer_empty == 1) && (P9 != (((0 + 1) - 1) % 2))) && ((P9 != (((0 + 1) - 1) % 2)) && !((P9 != ((((0 + 1) + 1) - 1) % 2)) && (P9 != (((0 + 1) - 1) % 2))))) || ((((P9 != ((this_expect - 1) % 2)) && (this_buffer_empty != 1)) && (P9 != (((0 + 1) - 1) % 2))) && ((P9 != (((0 + 1) - 1) % 2)) && !((P9 != ((((0 + 1) + 1) - 1) % 2)) && (P9 != (((0 + 1) - 1) % 2))))))) [L554] q = 1 [L556] this_expect=this_expect [L556] this_buffer_empty=(1 - this_buffer_empty) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=7, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=1, q=1, this_buffer_empty=1, this_expect=6] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=7, P1=-4, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=1, this_buffer_empty=1, this_expect=6] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=7, P1=-4, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=1, this_buffer_empty=1, this_expect=6] [L63] COND TRUE q == 1 [L64] COND TRUE __VERIFIER_nondet_int() [L66] COND TRUE !((P1 % 2) != (0 % 2)) [L68] method_id = 2 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=-4, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=1, this_buffer_empty=1, this_expect=6] [L70] COND FALSE !((((((P1 % 2) != (this_expect % 2)) && (this_buffer_empty == 1)) && !((P1 % 2) != (0 % 2))) || ((this_buffer_empty != 1) && !((P1 % 2) != (0 % 2))))) [L74] q = 3 [L76] this_expect=(this_expect + 1) [L76] this_buffer_empty=(1 - this_buffer_empty) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=-4, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=3, this_buffer_empty=0, this_expect=7] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=0, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=3, this_buffer_empty=0, this_expect=7] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=0, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=3, this_buffer_empty=0, this_expect=7] [L63] COND FALSE !(q == 1) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=0, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=3, this_buffer_empty=0, this_expect=7] [L163] COND FALSE !(q == 2) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=0, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=3, this_buffer_empty=0, this_expect=7] [L263] COND TRUE q == 3 [L264] COND FALSE !(__VERIFIER_nondet_int()) [L280] COND TRUE __VERIFIER_nondet_int() [L282] COND TRUE !(P1 != (((0 + 1) - 1) % 2)) [L284] method_id = 3 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=0, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=3, this_buffer_empty=0, this_expect=7] [L286] COND FALSE !((((this_buffer_empty == 1) && !(P3 != (((0 + 1) - 1) % 2))) || (((P3 != ((this_expect - 1) % 2)) && (this_buffer_empty != 1)) && !(P3 != (((0 + 1) - 1) % 2))))) [L290] q = 4 [L292] this_expect=this_expect [L292] this_buffer_empty=(1 - this_buffer_empty) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=0, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=4, this_buffer_empty=1, this_expect=7] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=9, P2=-1, P3=0, P4=-1, P5=0, P6=1, P7=0, P8=-1, P9=-1, q=4, this_buffer_empty=1, this_expect=7] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=9, P2=-1, P3=0, P4=-1, P5=0, P6=1, P7=0, P8=-1, P9=-1, q=4, this_buffer_empty=1, this_expect=7] [L63] COND FALSE !(q == 1) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=9, P2=-1, P3=0, P4=-1, P5=0, P6=1, P7=0, P8=-1, P9=-1, q=4, this_buffer_empty=1, this_expect=7] [L163] COND FALSE !(q == 2) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=9, P2=-1, P3=0, P4=-1, P5=0, P6=1, P7=0, P8=-1, P9=-1, q=4, this_buffer_empty=1, this_expect=7] [L263] COND FALSE !(q == 3) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=9, P2=-1, P3=0, P4=-1, P5=0, P6=1, P7=0, P8=-1, P9=-1, q=4, this_buffer_empty=1, this_expect=7] [L363] COND TRUE q == 4 [L364] COND FALSE !(__VERIFIER_nondet_int()) [L380] COND FALSE !(__VERIFIER_nondet_int()) [L396] COND FALSE !(__VERIFIER_nondet_int()) [L412] COND TRUE __VERIFIER_nondet_int() [L414] COND TRUE (((P1 % 2) != (0 % 2)) && !(((P1 % 2) != ((0 + 1) % 2)) && ((P1 % 2) != (0 % 2)))) [L416] method_id = 5 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=9, P2=-1, P3=0, P4=-1, P5=0, P6=1, P7=0, P8=-1, P9=-1, q=4, this_buffer_empty=1, this_expect=7] [L418] COND FALSE !(((((((P6 % 2) != (this_expect % 2)) && (this_buffer_empty == 1)) && ((P6 % 2) != (0 % 2))) && (((P6 % 2) != (0 % 2)) && !(((P6 % 2) != ((0 + 1) % 2)) && ((P6 % 2) != (0 % 2))))) || (((this_buffer_empty != 1) && ((P6 % 2) != (0 % 2))) && (((P6 % 2) != (0 % 2)) && !(((P6 % 2) != ((0 + 1) % 2)) && ((P6 % 2) != (0 % 2))))))) [L422] q = 5 [L424] this_expect=(this_expect + 1) [L424] this_buffer_empty=(1 - this_buffer_empty) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=9, P2=-1, P3=0, P4=-1, P5=0, P6=1, P7=0, P8=-1, P9=-1, q=5, this_buffer_empty=0, this_expect=8] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=1, q=5, this_buffer_empty=0, this_expect=8] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=1, q=5, this_buffer_empty=0, this_expect=8] [L63] COND FALSE !(q == 1) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=1, q=5, this_buffer_empty=0, this_expect=8] [L163] COND FALSE !(q == 2) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=1, q=5, this_buffer_empty=0, this_expect=8] [L263] COND FALSE !(q == 3) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=1, q=5, this_buffer_empty=0, this_expect=8] [L363] COND FALSE !(q == 4) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=1, q=5, this_buffer_empty=0, this_expect=8] [L463] COND TRUE q == 5 [L464] COND FALSE !(__VERIFIER_nondet_int()) [L480] COND FALSE !(__VERIFIER_nondet_int()) [L496] COND FALSE !(__VERIFIER_nondet_int()) [L512] COND FALSE !(__VERIFIER_nondet_int()) [L528] COND FALSE !(__VERIFIER_nondet_int()) [L544] COND TRUE __VERIFIER_nondet_int() [L546] COND TRUE ((P1 != (((0 + 1) - 1) % 2)) && !((P1 != ((((0 + 1) + 1) - 1) % 2)) && (P1 != (((0 + 1) - 1) % 2)))) [L548] method_id = 7 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=7, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=1, q=5, this_buffer_empty=0, this_expect=8] [L550] COND FALSE !(((((this_buffer_empty == 1) && (P9 != (((0 + 1) - 1) % 2))) && ((P9 != (((0 + 1) - 1) % 2)) && !((P9 != ((((0 + 1) + 1) - 1) % 2)) && (P9 != (((0 + 1) - 1) % 2))))) || ((((P9 != ((this_expect - 1) % 2)) && (this_buffer_empty != 1)) && (P9 != (((0 + 1) - 1) % 2))) && ((P9 != (((0 + 1) - 1) % 2)) && !((P9 != ((((0 + 1) + 1) - 1) % 2)) && (P9 != (((0 + 1) - 1) % 2))))))) [L554] q = 1 [L556] this_expect=this_expect [L556] this_buffer_empty=(1 - this_buffer_empty) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=7, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=1, q=1, this_buffer_empty=1, this_expect=8] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=7, P1=2, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=1, this_buffer_empty=1, this_expect=8] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=7, P1=2, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=1, this_buffer_empty=1, this_expect=8] [L63] COND TRUE q == 1 [L64] COND TRUE __VERIFIER_nondet_int() [L66] COND TRUE !((P1 % 2) != (0 % 2)) [L68] method_id = 2 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=2, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=1, this_buffer_empty=1, this_expect=8] [L70] COND FALSE !((((((P1 % 2) != (this_expect % 2)) && (this_buffer_empty == 1)) && !((P1 % 2) != (0 % 2))) || ((this_buffer_empty != 1) && !((P1 % 2) != (0 % 2))))) [L74] q = 3 [L76] this_expect=(this_expect + 1) [L76] this_buffer_empty=(1 - this_buffer_empty) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=2, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=3, this_buffer_empty=0, this_expect=9] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=0, P2=-1, P3=1, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=3, this_buffer_empty=0, this_expect=9] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=0, P2=-1, P3=1, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=3, this_buffer_empty=0, this_expect=9] [L63] COND FALSE !(q == 1) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=0, P2=-1, P3=1, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=3, this_buffer_empty=0, this_expect=9] [L163] COND FALSE !(q == 2) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=0, P2=-1, P3=1, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=3, this_buffer_empty=0, this_expect=9] [L263] COND TRUE q == 3 [L264] COND FALSE !(__VERIFIER_nondet_int()) [L280] COND TRUE __VERIFIER_nondet_int() [L282] COND TRUE !(P1 != (((0 + 1) - 1) % 2)) [L284] method_id = 3 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=0, P2=-1, P3=1, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=3, this_buffer_empty=0, this_expect=9] [L286] COND FALSE !((((this_buffer_empty == 1) && !(P3 != (((0 + 1) - 1) % 2))) || (((P3 != ((this_expect - 1) % 2)) && (this_buffer_empty != 1)) && !(P3 != (((0 + 1) - 1) % 2))))) [L290] q = 4 [L292] this_expect=this_expect [L292] this_buffer_empty=(1 - this_buffer_empty) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=0, P2=-1, P3=1, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=4, this_buffer_empty=1, this_expect=9] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=11, P2=-1, P3=0, P4=-1, P5=0, P6=-2, P7=0, P8=-1, P9=-1, q=4, this_buffer_empty=1, this_expect=9] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=11, P2=-1, P3=0, P4=-1, P5=0, P6=-2, P7=0, P8=-1, P9=-1, q=4, this_buffer_empty=1, this_expect=9] [L63] COND FALSE !(q == 1) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=11, P2=-1, P3=0, P4=-1, P5=0, P6=-2, P7=0, P8=-1, P9=-1, q=4, this_buffer_empty=1, this_expect=9] [L163] COND FALSE !(q == 2) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=11, P2=-1, P3=0, P4=-1, P5=0, P6=-2, P7=0, P8=-1, P9=-1, q=4, this_buffer_empty=1, this_expect=9] [L263] COND FALSE !(q == 3) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=11, P2=-1, P3=0, P4=-1, P5=0, P6=-2, P7=0, P8=-1, P9=-1, q=4, this_buffer_empty=1, this_expect=9] [L363] COND TRUE q == 4 [L364] COND FALSE !(__VERIFIER_nondet_int()) [L380] COND FALSE !(__VERIFIER_nondet_int()) [L396] COND FALSE !(__VERIFIER_nondet_int()) [L412] COND TRUE __VERIFIER_nondet_int() [L414] COND TRUE (((P1 % 2) != (0 % 2)) && !(((P1 % 2) != ((0 + 1) % 2)) && ((P1 % 2) != (0 % 2)))) [L416] method_id = 5 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=11, P2=-1, P3=0, P4=-1, P5=0, P6=-2, P7=0, P8=-1, P9=-1, q=4, this_buffer_empty=1, this_expect=9] [L418] COND FALSE !(((((((P6 % 2) != (this_expect % 2)) && (this_buffer_empty == 1)) && ((P6 % 2) != (0 % 2))) && (((P6 % 2) != (0 % 2)) && !(((P6 % 2) != ((0 + 1) % 2)) && ((P6 % 2) != (0 % 2))))) || (((this_buffer_empty != 1) && ((P6 % 2) != (0 % 2))) && (((P6 % 2) != (0 % 2)) && !(((P6 % 2) != ((0 + 1) % 2)) && ((P6 % 2) != (0 % 2))))))) [L422] q = 5 [L424] this_expect=(this_expect + 1) [L424] this_buffer_empty=(1 - this_buffer_empty) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=11, P2=-1, P3=0, P4=-1, P5=0, P6=-2, P7=0, P8=-1, P9=-1, q=5, this_buffer_empty=0, this_expect=10] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=4, q=5, this_buffer_empty=0, this_expect=10] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=4, q=5, this_buffer_empty=0, this_expect=10] [L63] COND FALSE !(q == 1) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=4, q=5, this_buffer_empty=0, this_expect=10] [L163] COND FALSE !(q == 2) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=4, q=5, this_buffer_empty=0, this_expect=10] [L263] COND FALSE !(q == 3) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=4, q=5, this_buffer_empty=0, this_expect=10] [L363] COND FALSE !(q == 4) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=4, q=5, this_buffer_empty=0, this_expect=10] [L463] COND TRUE q == 5 [L464] COND FALSE !(__VERIFIER_nondet_int()) [L480] COND FALSE !(__VERIFIER_nondet_int()) [L496] COND FALSE !(__VERIFIER_nondet_int()) [L512] COND FALSE !(__VERIFIER_nondet_int()) [L528] COND FALSE !(__VERIFIER_nondet_int()) [L544] COND TRUE __VERIFIER_nondet_int() [L546] COND TRUE ((P1 != (((0 + 1) - 1) % 2)) && !((P1 != ((((0 + 1) + 1) - 1) % 2)) && (P1 != (((0 + 1) - 1) % 2)))) [L548] method_id = 7 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=7, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=4, q=5, this_buffer_empty=0, this_expect=10] [L550] COND FALSE !(((((this_buffer_empty == 1) && (P9 != (((0 + 1) - 1) % 2))) && ((P9 != (((0 + 1) - 1) % 2)) && !((P9 != ((((0 + 1) + 1) - 1) % 2)) && (P9 != (((0 + 1) - 1) % 2))))) || ((((P9 != ((this_expect - 1) % 2)) && (this_buffer_empty != 1)) && (P9 != (((0 + 1) - 1) % 2))) && ((P9 != (((0 + 1) - 1) % 2)) && !((P9 != ((((0 + 1) + 1) - 1) % 2)) && (P9 != (((0 + 1) - 1) % 2))))))) [L554] q = 1 [L556] this_expect=this_expect [L556] this_buffer_empty=(1 - this_buffer_empty) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=7, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=4, q=1, this_buffer_empty=1, this_expect=10] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=7, P1=-12, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=1, this_buffer_empty=1, this_expect=10] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=7, P1=-12, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=1, this_buffer_empty=1, this_expect=10] [L63] COND TRUE q == 1 [L64] COND TRUE __VERIFIER_nondet_int() [L66] COND TRUE !((P1 % 2) != (0 % 2)) [L68] method_id = 2 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=-12, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=1, this_buffer_empty=1, this_expect=10] [L70] COND FALSE !((((((P1 % 2) != (this_expect % 2)) && (this_buffer_empty == 1)) && !((P1 % 2) != (0 % 2))) || ((this_buffer_empty != 1) && !((P1 % 2) != (0 % 2))))) [L74] q = 3 [L76] this_expect=(this_expect + 1) [L76] this_buffer_empty=(1 - this_buffer_empty) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=-12, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=3, this_buffer_empty=0, this_expect=11] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=0, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=3, this_buffer_empty=0, this_expect=11] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=0, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=3, this_buffer_empty=0, this_expect=11] [L63] COND FALSE !(q == 1) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=0, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=3, this_buffer_empty=0, this_expect=11] [L163] COND FALSE !(q == 2) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=0, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=3, this_buffer_empty=0, this_expect=11] [L263] COND TRUE q == 3 [L264] COND FALSE !(__VERIFIER_nondet_int()) [L280] COND TRUE __VERIFIER_nondet_int() [L282] COND TRUE !(P1 != (((0 + 1) - 1) % 2)) [L284] method_id = 3 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=0, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=3, this_buffer_empty=0, this_expect=11] [L286] COND FALSE !((((this_buffer_empty == 1) && !(P3 != (((0 + 1) - 1) % 2))) || (((P3 != ((this_expect - 1) % 2)) && (this_buffer_empty != 1)) && !(P3 != (((0 + 1) - 1) % 2))))) [L290] q = 4 [L292] this_expect=this_expect [L292] this_buffer_empty=(1 - this_buffer_empty) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=0, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=4, this_buffer_empty=1, this_expect=11] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=13, P2=-1, P3=0, P4=-1, P5=0, P6=1, P7=0, P8=-1, P9=-1, q=4, this_buffer_empty=1, this_expect=11] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=13, P2=-1, P3=0, P4=-1, P5=0, P6=1, P7=0, P8=-1, P9=-1, q=4, this_buffer_empty=1, this_expect=11] [L63] COND FALSE !(q == 1) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=13, P2=-1, P3=0, P4=-1, P5=0, P6=1, P7=0, P8=-1, P9=-1, q=4, this_buffer_empty=1, this_expect=11] [L163] COND FALSE !(q == 2) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=13, P2=-1, P3=0, P4=-1, P5=0, P6=1, P7=0, P8=-1, P9=-1, q=4, this_buffer_empty=1, this_expect=11] [L263] COND FALSE !(q == 3) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=13, P2=-1, P3=0, P4=-1, P5=0, P6=1, P7=0, P8=-1, P9=-1, q=4, this_buffer_empty=1, this_expect=11] [L363] COND TRUE q == 4 [L364] COND FALSE !(__VERIFIER_nondet_int()) [L380] COND FALSE !(__VERIFIER_nondet_int()) [L396] COND FALSE !(__VERIFIER_nondet_int()) [L412] COND TRUE __VERIFIER_nondet_int() [L414] COND TRUE (((P1 % 2) != (0 % 2)) && !(((P1 % 2) != ((0 + 1) % 2)) && ((P1 % 2) != (0 % 2)))) [L416] method_id = 5 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=13, P2=-1, P3=0, P4=-1, P5=0, P6=1, P7=0, P8=-1, P9=-1, q=4, this_buffer_empty=1, this_expect=11] [L418] COND FALSE !(((((((P6 % 2) != (this_expect % 2)) && (this_buffer_empty == 1)) && ((P6 % 2) != (0 % 2))) && (((P6 % 2) != (0 % 2)) && !(((P6 % 2) != ((0 + 1) % 2)) && ((P6 % 2) != (0 % 2))))) || (((this_buffer_empty != 1) && ((P6 % 2) != (0 % 2))) && (((P6 % 2) != (0 % 2)) && !(((P6 % 2) != ((0 + 1) % 2)) && ((P6 % 2) != (0 % 2))))))) [L422] q = 5 [L424] this_expect=(this_expect + 1) [L424] this_buffer_empty=(1 - this_buffer_empty) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=13, P2=-1, P3=0, P4=-1, P5=0, P6=1, P7=0, P8=-1, P9=-1, q=5, this_buffer_empty=0, this_expect=12] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=1, q=5, this_buffer_empty=0, this_expect=12] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=1, q=5, this_buffer_empty=0, this_expect=12] [L63] COND FALSE !(q == 1) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=1, q=5, this_buffer_empty=0, this_expect=12] [L163] COND FALSE !(q == 2) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=1, q=5, this_buffer_empty=0, this_expect=12] [L263] COND FALSE !(q == 3) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=1, q=5, this_buffer_empty=0, this_expect=12] [L363] COND FALSE !(q == 4) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=1, q=5, this_buffer_empty=0, this_expect=12] [L463] COND TRUE q == 5 [L464] COND FALSE !(__VERIFIER_nondet_int()) [L480] COND FALSE !(__VERIFIER_nondet_int()) [L496] COND FALSE !(__VERIFIER_nondet_int()) [L512] COND FALSE !(__VERIFIER_nondet_int()) [L528] COND FALSE !(__VERIFIER_nondet_int()) [L544] COND TRUE __VERIFIER_nondet_int() [L546] COND TRUE ((P1 != (((0 + 1) - 1) % 2)) && !((P1 != ((((0 + 1) + 1) - 1) % 2)) && (P1 != (((0 + 1) - 1) % 2)))) [L548] method_id = 7 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=7, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=1, q=5, this_buffer_empty=0, this_expect=12] [L550] COND FALSE !(((((this_buffer_empty == 1) && (P9 != (((0 + 1) - 1) % 2))) && ((P9 != (((0 + 1) - 1) % 2)) && !((P9 != ((((0 + 1) + 1) - 1) % 2)) && (P9 != (((0 + 1) - 1) % 2))))) || ((((P9 != ((this_expect - 1) % 2)) && (this_buffer_empty != 1)) && (P9 != (((0 + 1) - 1) % 2))) && ((P9 != (((0 + 1) - 1) % 2)) && !((P9 != ((((0 + 1) + 1) - 1) % 2)) && (P9 != (((0 + 1) - 1) % 2))))))) [L554] q = 1 [L556] this_expect=this_expect [L556] this_buffer_empty=(1 - this_buffer_empty) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=7, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=1, q=1, this_buffer_empty=1, this_expect=12] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=7, P1=-6, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=1, this_buffer_empty=1, this_expect=12] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=7, P1=-6, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=1, this_buffer_empty=1, this_expect=12] [L63] COND TRUE q == 1 [L64] COND TRUE __VERIFIER_nondet_int() [L66] COND TRUE !((P1 % 2) != (0 % 2)) [L68] method_id = 2 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=-6, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=1, this_buffer_empty=1, this_expect=12] [L70] COND FALSE !((((((P1 % 2) != (this_expect % 2)) && (this_buffer_empty == 1)) && !((P1 % 2) != (0 % 2))) || ((this_buffer_empty != 1) && !((P1 % 2) != (0 % 2))))) [L74] q = 3 [L76] this_expect=(this_expect + 1) [L76] this_buffer_empty=(1 - this_buffer_empty) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=-6, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=3, this_buffer_empty=0, this_expect=13] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=0, P2=-1, P3=1, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=3, this_buffer_empty=0, this_expect=13] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=0, P2=-1, P3=1, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=3, this_buffer_empty=0, this_expect=13] [L63] COND FALSE !(q == 1) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=0, P2=-1, P3=1, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=3, this_buffer_empty=0, this_expect=13] [L163] COND FALSE !(q == 2) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=0, P2=-1, P3=1, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=3, this_buffer_empty=0, this_expect=13] [L263] COND TRUE q == 3 [L264] COND FALSE !(__VERIFIER_nondet_int()) [L280] COND TRUE __VERIFIER_nondet_int() [L282] COND TRUE !(P1 != (((0 + 1) - 1) % 2)) [L284] method_id = 3 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=0, P2=-1, P3=1, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=3, this_buffer_empty=0, this_expect=13] [L286] COND FALSE !((((this_buffer_empty == 1) && !(P3 != (((0 + 1) - 1) % 2))) || (((P3 != ((this_expect - 1) % 2)) && (this_buffer_empty != 1)) && !(P3 != (((0 + 1) - 1) % 2))))) [L290] q = 4 [L292] this_expect=this_expect [L292] this_buffer_empty=(1 - this_buffer_empty) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=0, P2=-1, P3=1, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=4, this_buffer_empty=1, this_expect=13] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=15, P2=-1, P3=0, P4=-1, P5=0, P6=1, P7=0, P8=-1, P9=-1, q=4, this_buffer_empty=1, this_expect=13] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=15, P2=-1, P3=0, P4=-1, P5=0, P6=1, P7=0, P8=-1, P9=-1, q=4, this_buffer_empty=1, this_expect=13] [L63] COND FALSE !(q == 1) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=15, P2=-1, P3=0, P4=-1, P5=0, P6=1, P7=0, P8=-1, P9=-1, q=4, this_buffer_empty=1, this_expect=13] [L163] COND FALSE !(q == 2) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=15, P2=-1, P3=0, P4=-1, P5=0, P6=1, P7=0, P8=-1, P9=-1, q=4, this_buffer_empty=1, this_expect=13] [L263] COND FALSE !(q == 3) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=15, P2=-1, P3=0, P4=-1, P5=0, P6=1, P7=0, P8=-1, P9=-1, q=4, this_buffer_empty=1, this_expect=13] [L363] COND TRUE q == 4 [L364] COND FALSE !(__VERIFIER_nondet_int()) [L380] COND FALSE !(__VERIFIER_nondet_int()) [L396] COND FALSE !(__VERIFIER_nondet_int()) [L412] COND TRUE __VERIFIER_nondet_int() [L414] COND TRUE (((P1 % 2) != (0 % 2)) && !(((P1 % 2) != ((0 + 1) % 2)) && ((P1 % 2) != (0 % 2)))) [L416] method_id = 5 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=15, P2=-1, P3=0, P4=-1, P5=0, P6=1, P7=0, P8=-1, P9=-1, q=4, this_buffer_empty=1, this_expect=13] [L418] COND FALSE !(((((((P6 % 2) != (this_expect % 2)) && (this_buffer_empty == 1)) && ((P6 % 2) != (0 % 2))) && (((P6 % 2) != (0 % 2)) && !(((P6 % 2) != ((0 + 1) % 2)) && ((P6 % 2) != (0 % 2))))) || (((this_buffer_empty != 1) && ((P6 % 2) != (0 % 2))) && (((P6 % 2) != (0 % 2)) && !(((P6 % 2) != ((0 + 1) % 2)) && ((P6 % 2) != (0 % 2))))))) [L422] q = 5 [L424] this_expect=(this_expect + 1) [L424] this_buffer_empty=(1 - this_buffer_empty) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=15, P2=-1, P3=0, P4=-1, P5=0, P6=1, P7=0, P8=-1, P9=-1, q=5, this_buffer_empty=0, this_expect=14] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=1, q=5, this_buffer_empty=0, this_expect=14] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=1, q=5, this_buffer_empty=0, this_expect=14] [L63] COND FALSE !(q == 1) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=1, q=5, this_buffer_empty=0, this_expect=14] [L163] COND FALSE !(q == 2) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=1, q=5, this_buffer_empty=0, this_expect=14] [L263] COND FALSE !(q == 3) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=1, q=5, this_buffer_empty=0, this_expect=14] [L363] COND FALSE !(q == 4) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=1, q=5, this_buffer_empty=0, this_expect=14] [L463] COND TRUE q == 5 [L464] COND FALSE !(__VERIFIER_nondet_int()) [L480] COND FALSE !(__VERIFIER_nondet_int()) [L496] COND FALSE !(__VERIFIER_nondet_int()) [L512] COND FALSE !(__VERIFIER_nondet_int()) [L528] COND FALSE !(__VERIFIER_nondet_int()) [L544] COND TRUE __VERIFIER_nondet_int() [L546] COND TRUE ((P1 != (((0 + 1) - 1) % 2)) && !((P1 != ((((0 + 1) + 1) - 1) % 2)) && (P1 != (((0 + 1) - 1) % 2)))) [L548] method_id = 7 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=7, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=1, q=5, this_buffer_empty=0, this_expect=14] [L550] COND FALSE !(((((this_buffer_empty == 1) && (P9 != (((0 + 1) - 1) % 2))) && ((P9 != (((0 + 1) - 1) % 2)) && !((P9 != ((((0 + 1) + 1) - 1) % 2)) && (P9 != (((0 + 1) - 1) % 2))))) || ((((P9 != ((this_expect - 1) % 2)) && (this_buffer_empty != 1)) && (P9 != (((0 + 1) - 1) % 2))) && ((P9 != (((0 + 1) - 1) % 2)) && !((P9 != ((((0 + 1) + 1) - 1) % 2)) && (P9 != (((0 + 1) - 1) % 2))))))) [L554] q = 1 [L556] this_expect=this_expect [L556] this_buffer_empty=(1 - this_buffer_empty) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=7, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=1, q=1, this_buffer_empty=1, this_expect=14] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=7, P1=-8, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=1, this_buffer_empty=1, this_expect=14] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=7, P1=-8, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=1, this_buffer_empty=1, this_expect=14] [L63] COND TRUE q == 1 [L64] COND TRUE __VERIFIER_nondet_int() [L66] COND TRUE !((P1 % 2) != (0 % 2)) [L68] method_id = 2 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=-8, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=1, this_buffer_empty=1, this_expect=14] [L70] COND FALSE !((((((P1 % 2) != (this_expect % 2)) && (this_buffer_empty == 1)) && !((P1 % 2) != (0 % 2))) || ((this_buffer_empty != 1) && !((P1 % 2) != (0 % 2))))) [L74] q = 3 [L76] this_expect=(this_expect + 1) [L76] this_buffer_empty=(1 - this_buffer_empty) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=-8, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=3, this_buffer_empty=0, this_expect=15] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=0, P2=-1, P3=1, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=3, this_buffer_empty=0, this_expect=15] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=0, P2=-1, P3=1, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=3, this_buffer_empty=0, this_expect=15] [L63] COND FALSE !(q == 1) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=0, P2=-1, P3=1, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=3, this_buffer_empty=0, this_expect=15] [L163] COND FALSE !(q == 2) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=0, P2=-1, P3=1, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=3, this_buffer_empty=0, this_expect=15] [L263] COND TRUE q == 3 [L264] COND FALSE !(__VERIFIER_nondet_int()) [L280] COND TRUE __VERIFIER_nondet_int() [L282] COND TRUE !(P1 != (((0 + 1) - 1) % 2)) [L284] method_id = 3 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=0, P2=-1, P3=1, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=3, this_buffer_empty=0, this_expect=15] [L286] COND FALSE !((((this_buffer_empty == 1) && !(P3 != (((0 + 1) - 1) % 2))) || (((P3 != ((this_expect - 1) % 2)) && (this_buffer_empty != 1)) && !(P3 != (((0 + 1) - 1) % 2))))) [L290] q = 4 [L292] this_expect=this_expect [L292] this_buffer_empty=(1 - this_buffer_empty) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=0, P2=-1, P3=1, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=4, this_buffer_empty=1, this_expect=15] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=17, P2=-1, P3=0, P4=-1, P5=0, P6=-1, P7=0, P8=-1, P9=-1, q=4, this_buffer_empty=1, this_expect=15] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=17, P2=-1, P3=0, P4=-1, P5=0, P6=-1, P7=0, P8=-1, P9=-1, q=4, this_buffer_empty=1, this_expect=15] [L63] COND FALSE !(q == 1) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=17, P2=-1, P3=0, P4=-1, P5=0, P6=-1, P7=0, P8=-1, P9=-1, q=4, this_buffer_empty=1, this_expect=15] [L163] COND FALSE !(q == 2) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=17, P2=-1, P3=0, P4=-1, P5=0, P6=-1, P7=0, P8=-1, P9=-1, q=4, this_buffer_empty=1, this_expect=15] [L263] COND FALSE !(q == 3) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=17, P2=-1, P3=0, P4=-1, P5=0, P6=-1, P7=0, P8=-1, P9=-1, q=4, this_buffer_empty=1, this_expect=15] [L363] COND TRUE q == 4 [L364] COND FALSE !(__VERIFIER_nondet_int()) [L380] COND FALSE !(__VERIFIER_nondet_int()) [L396] COND FALSE !(__VERIFIER_nondet_int()) [L412] COND TRUE __VERIFIER_nondet_int() [L414] COND TRUE (((P1 % 2) != (0 % 2)) && !(((P1 % 2) != ((0 + 1) % 2)) && ((P1 % 2) != (0 % 2)))) [L416] method_id = 5 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=17, P2=-1, P3=0, P4=-1, P5=0, P6=-1, P7=0, P8=-1, P9=-1, q=4, this_buffer_empty=1, this_expect=15] [L418] COND FALSE !(((((((P6 % 2) != (this_expect % 2)) && (this_buffer_empty == 1)) && ((P6 % 2) != (0 % 2))) && (((P6 % 2) != (0 % 2)) && !(((P6 % 2) != ((0 + 1) % 2)) && ((P6 % 2) != (0 % 2))))) || (((this_buffer_empty != 1) && ((P6 % 2) != (0 % 2))) && (((P6 % 2) != (0 % 2)) && !(((P6 % 2) != ((0 + 1) % 2)) && ((P6 % 2) != (0 % 2))))))) [L422] q = 5 [L424] this_expect=(this_expect + 1) [L424] this_buffer_empty=(1 - this_buffer_empty) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=17, P2=-1, P3=0, P4=-1, P5=0, P6=-1, P7=0, P8=-1, P9=-1, q=5, this_buffer_empty=0, this_expect=16] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=1, q=5, this_buffer_empty=0, this_expect=16] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=1, q=5, this_buffer_empty=0, this_expect=16] [L63] COND FALSE !(q == 1) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=1, q=5, this_buffer_empty=0, this_expect=16] [L163] COND FALSE !(q == 2) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=1, q=5, this_buffer_empty=0, this_expect=16] [L263] COND FALSE !(q == 3) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=1, q=5, this_buffer_empty=0, this_expect=16] [L363] COND FALSE !(q == 4) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=1, q=5, this_buffer_empty=0, this_expect=16] [L463] COND TRUE q == 5 [L464] COND FALSE !(__VERIFIER_nondet_int()) [L480] COND FALSE !(__VERIFIER_nondet_int()) [L496] COND FALSE !(__VERIFIER_nondet_int()) [L512] COND FALSE !(__VERIFIER_nondet_int()) [L528] COND FALSE !(__VERIFIER_nondet_int()) [L544] COND TRUE __VERIFIER_nondet_int() [L546] COND TRUE ((P1 != (((0 + 1) - 1) % 2)) && !((P1 != ((((0 + 1) + 1) - 1) % 2)) && (P1 != (((0 + 1) - 1) % 2)))) [L548] method_id = 7 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=7, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=1, q=5, this_buffer_empty=0, this_expect=16] [L550] COND FALSE !(((((this_buffer_empty == 1) && (P9 != (((0 + 1) - 1) % 2))) && ((P9 != (((0 + 1) - 1) % 2)) && !((P9 != ((((0 + 1) + 1) - 1) % 2)) && (P9 != (((0 + 1) - 1) % 2))))) || ((((P9 != ((this_expect - 1) % 2)) && (this_buffer_empty != 1)) && (P9 != (((0 + 1) - 1) % 2))) && ((P9 != (((0 + 1) - 1) % 2)) && !((P9 != ((((0 + 1) + 1) - 1) % 2)) && (P9 != (((0 + 1) - 1) % 2))))))) [L554] q = 1 [L556] this_expect=this_expect [L556] this_buffer_empty=(1 - this_buffer_empty) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=7, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=1, q=1, this_buffer_empty=1, this_expect=16] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=7, P1=-14, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=1, this_buffer_empty=1, this_expect=16] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=7, P1=-14, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=1, this_buffer_empty=1, this_expect=16] [L63] COND TRUE q == 1 [L64] COND TRUE __VERIFIER_nondet_int() [L66] COND TRUE !((P1 % 2) != (0 % 2)) [L68] method_id = 2 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=-14, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=1, this_buffer_empty=1, this_expect=16] [L70] COND FALSE !((((((P1 % 2) != (this_expect % 2)) && (this_buffer_empty == 1)) && !((P1 % 2) != (0 % 2))) || ((this_buffer_empty != 1) && !((P1 % 2) != (0 % 2))))) [L74] q = 3 [L76] this_expect=(this_expect + 1) [L76] this_buffer_empty=(1 - this_buffer_empty) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=-14, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=3, this_buffer_empty=0, this_expect=17] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND TRUE this_expect > 16 [L39] this_expect = -16 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=0, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=3, this_buffer_empty=0, this_expect=-16] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=0, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=3, this_buffer_empty=0, this_expect=-16] [L63] COND FALSE !(q == 1) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=0, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=3, this_buffer_empty=0, this_expect=-16] [L163] COND FALSE !(q == 2) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=0, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=3, this_buffer_empty=0, this_expect=-16] [L263] COND TRUE q == 3 [L264] COND FALSE !(__VERIFIER_nondet_int()) [L280] COND TRUE __VERIFIER_nondet_int() [L282] COND TRUE !(P1 != (((0 + 1) - 1) % 2)) [L284] method_id = 3 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=0, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=3, this_buffer_empty=0, this_expect=-16] [L286] COND TRUE (((this_buffer_empty == 1) && !(P3 != (((0 + 1) - 1) % 2))) || (((P3 != ((this_expect - 1) % 2)) && (this_buffer_empty != 1)) && !(P3 != (((0 + 1) - 1) % 2)))) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=0, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=3, this_buffer_empty=0, this_expect=-16] [L569] __VERIFIER_error() VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=0, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=3, this_buffer_empty=0, this_expect=-16] - StatisticsResult: Ultimate Automizer benchmark data CFG has 3 procedures, 115 locations, 1 error locations. UNSAFE Result, 25.3s OverallTime, 45 OverallIterations, 35 TraceHistogramMax, 9.1s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 9593 SDtfs, 18267 SDslu, 54336 SDs, 0 SdLazy, 9568 SolverSat, 1268 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 5.1s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 5243 GetRequests, 4700 SyntacticMatches, 45 SemanticMatches, 498 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1569 ImplicationChecksByTransitivity, 8.5s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=1167occurred in iteration=42, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 0.6s AutomataMinimizationTime, 44 MinimizatonAttempts, 991 StatesRemovedByMinimization, 42 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.5s SsaConstructionTime, 3.2s SatisfiabilityAnalysisTime, 9.2s InterpolantComputationTime, 9881 NumberOfCodeBlocks, 9431 NumberOfCodeBlocksAsserted, 167 NumberOfCheckSat, 9402 ConstructedInterpolants, 94 QuantifiedInterpolants, 6942986 SizeOfPredicates, 75 NumberOfNonLiveVariables, 25255 ConjunctsInSsa, 651 ConjunctsInUnsatCore, 80 InterpolantComputations, 11 PerfectInterpolantSequences, 9563/33980 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...