./Ultimate.py --spec ../../sv-benchmarks/c/ReachSafety.prp --file ../../sv-benchmarks/c/systemc/transmitter.01_false-unreach-call_false-termination.cil.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version 1dbac8bc Calling Ultimate with: java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/working_dir_c575d1cc-dc9a-40ac-b5e9-0c8057ba7c09/bin-2019/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/working_dir_c575d1cc-dc9a-40ac-b5e9-0c8057ba7c09/bin-2019/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/working_dir_c575d1cc-dc9a-40ac-b5e9-0c8057ba7c09/bin-2019/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/working_dir_c575d1cc-dc9a-40ac-b5e9-0c8057ba7c09/bin-2019/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/systemc/transmitter.01_false-unreach-call_false-termination.cil.c -s /tmp/vcloud-vcloud-master/worker/working_dir_c575d1cc-dc9a-40ac-b5e9-0c8057ba7c09/bin-2019/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/working_dir_c575d1cc-dc9a-40ac-b5e9-0c8057ba7c09/bin-2019/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 18c351eab8f6ce363bd7076ce800527c30b2b6c5 .................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.23-1dbac8b [2018-11-10 05:47:08,366 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-11-10 05:47:08,367 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-11-10 05:47:08,373 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-11-10 05:47:08,374 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-11-10 05:47:08,374 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-11-10 05:47:08,375 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-11-10 05:47:08,376 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-11-10 05:47:08,377 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-11-10 05:47:08,378 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-11-10 05:47:08,378 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-11-10 05:47:08,378 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-11-10 05:47:08,379 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-11-10 05:47:08,380 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-11-10 05:47:08,380 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-11-10 05:47:08,381 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-11-10 05:47:08,382 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-11-10 05:47:08,383 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-11-10 05:47:08,384 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-11-10 05:47:08,385 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-11-10 05:47:08,386 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-11-10 05:47:08,386 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-11-10 05:47:08,388 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-11-10 05:47:08,388 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-11-10 05:47:08,388 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-11-10 05:47:08,389 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-11-10 05:47:08,389 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-11-10 05:47:08,390 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-11-10 05:47:08,390 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-11-10 05:47:08,391 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-11-10 05:47:08,391 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-11-10 05:47:08,392 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-11-10 05:47:08,392 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-11-10 05:47:08,392 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-11-10 05:47:08,393 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-11-10 05:47:08,393 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-11-10 05:47:08,393 INFO L98 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/working_dir_c575d1cc-dc9a-40ac-b5e9-0c8057ba7c09/bin-2019/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2018-11-10 05:47:08,402 INFO L110 SettingsManager]: Loading preferences was successful [2018-11-10 05:47:08,402 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-11-10 05:47:08,403 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-11-10 05:47:08,403 INFO L133 SettingsManager]: * to procedures, called more than once=true [2018-11-10 05:47:08,403 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-11-10 05:47:08,403 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-11-10 05:47:08,404 INFO L133 SettingsManager]: * Use SBE=true [2018-11-10 05:47:08,404 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-11-10 05:47:08,404 INFO L133 SettingsManager]: * sizeof long=4 [2018-11-10 05:47:08,404 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-11-10 05:47:08,404 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-11-10 05:47:08,404 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-11-10 05:47:08,404 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-11-10 05:47:08,405 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-11-10 05:47:08,405 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-11-10 05:47:08,405 INFO L133 SettingsManager]: * sizeof long double=12 [2018-11-10 05:47:08,405 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-11-10 05:47:08,405 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-11-10 05:47:08,405 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-11-10 05:47:08,405 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-11-10 05:47:08,405 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-11-10 05:47:08,406 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-11-10 05:47:08,406 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-10 05:47:08,406 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-11-10 05:47:08,406 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-11-10 05:47:08,406 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-11-10 05:47:08,406 INFO L133 SettingsManager]: * Trace refinement strategy=CAMEL [2018-11-10 05:47:08,406 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-11-10 05:47:08,406 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-11-10 05:47:08,407 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/working_dir_c575d1cc-dc9a-40ac-b5e9-0c8057ba7c09/bin-2019/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 18c351eab8f6ce363bd7076ce800527c30b2b6c5 [2018-11-10 05:47:08,429 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-11-10 05:47:08,439 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-11-10 05:47:08,441 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-11-10 05:47:08,442 INFO L271 PluginConnector]: Initializing CDTParser... [2018-11-10 05:47:08,442 INFO L276 PluginConnector]: CDTParser initialized [2018-11-10 05:47:08,443 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/working_dir_c575d1cc-dc9a-40ac-b5e9-0c8057ba7c09/bin-2019/uautomizer/../../sv-benchmarks/c/systemc/transmitter.01_false-unreach-call_false-termination.cil.c [2018-11-10 05:47:08,478 INFO L218 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_c575d1cc-dc9a-40ac-b5e9-0c8057ba7c09/bin-2019/uautomizer/data/a9301a312/c3b97b384778427383da0c323ff1971d/FLAG403a9e92b [2018-11-10 05:47:08,895 INFO L298 CDTParser]: Found 1 translation units. [2018-11-10 05:47:08,896 INFO L158 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/working_dir_c575d1cc-dc9a-40ac-b5e9-0c8057ba7c09/sv-benchmarks/c/systemc/transmitter.01_false-unreach-call_false-termination.cil.c [2018-11-10 05:47:08,903 INFO L346 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_c575d1cc-dc9a-40ac-b5e9-0c8057ba7c09/bin-2019/uautomizer/data/a9301a312/c3b97b384778427383da0c323ff1971d/FLAG403a9e92b [2018-11-10 05:47:08,913 INFO L354 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/working_dir_c575d1cc-dc9a-40ac-b5e9-0c8057ba7c09/bin-2019/uautomizer/data/a9301a312/c3b97b384778427383da0c323ff1971d [2018-11-10 05:47:08,915 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-11-10 05:47:08,916 INFO L131 ToolchainWalker]: Walking toolchain with 5 elements. [2018-11-10 05:47:08,917 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-11-10 05:47:08,917 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-11-10 05:47:08,919 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-11-10 05:47:08,920 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 10.11 05:47:08" (1/1) ... [2018-11-10 05:47:08,921 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@6b52ffc2 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 05:47:08, skipping insertion in model container [2018-11-10 05:47:08,921 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 10.11 05:47:08" (1/1) ... [2018-11-10 05:47:08,927 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-11-10 05:47:08,947 INFO L174 MainTranslator]: Built tables and reachable declarations [2018-11-10 05:47:09,071 INFO L202 PostProcessor]: Analyzing one entry point: main [2018-11-10 05:47:09,075 INFO L189 MainTranslator]: Completed pre-run [2018-11-10 05:47:09,096 INFO L202 PostProcessor]: Analyzing one entry point: main [2018-11-10 05:47:09,106 INFO L193 MainTranslator]: Completed translation [2018-11-10 05:47:09,106 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 05:47:09 WrapperNode [2018-11-10 05:47:09,106 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-11-10 05:47:09,107 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-11-10 05:47:09,107 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-11-10 05:47:09,107 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-11-10 05:47:09,114 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 05:47:09" (1/1) ... [2018-11-10 05:47:09,114 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 05:47:09" (1/1) ... [2018-11-10 05:47:09,118 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 05:47:09" (1/1) ... [2018-11-10 05:47:09,118 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 05:47:09" (1/1) ... [2018-11-10 05:47:09,122 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 05:47:09" (1/1) ... [2018-11-10 05:47:09,127 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 05:47:09" (1/1) ... [2018-11-10 05:47:09,128 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 05:47:09" (1/1) ... [2018-11-10 05:47:09,129 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-11-10 05:47:09,130 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-11-10 05:47:09,130 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-11-10 05:47:09,130 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-11-10 05:47:09,130 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 05:47:09" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_c575d1cc-dc9a-40ac-b5e9-0c8057ba7c09/bin-2019/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-10 05:47:09,200 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-11-10 05:47:09,200 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-11-10 05:47:09,200 INFO L138 BoogieDeclarations]: Found implementation of procedure error [2018-11-10 05:47:09,200 INFO L138 BoogieDeclarations]: Found implementation of procedure master [2018-11-10 05:47:09,200 INFO L138 BoogieDeclarations]: Found implementation of procedure transmit1 [2018-11-10 05:47:09,200 INFO L138 BoogieDeclarations]: Found implementation of procedure is_master_triggered [2018-11-10 05:47:09,200 INFO L138 BoogieDeclarations]: Found implementation of procedure is_transmit1_triggered [2018-11-10 05:47:09,200 INFO L138 BoogieDeclarations]: Found implementation of procedure update_channels [2018-11-10 05:47:09,201 INFO L138 BoogieDeclarations]: Found implementation of procedure init_threads [2018-11-10 05:47:09,201 INFO L138 BoogieDeclarations]: Found implementation of procedure exists_runnable_thread [2018-11-10 05:47:09,201 INFO L138 BoogieDeclarations]: Found implementation of procedure eval [2018-11-10 05:47:09,201 INFO L138 BoogieDeclarations]: Found implementation of procedure fire_delta_events [2018-11-10 05:47:09,201 INFO L138 BoogieDeclarations]: Found implementation of procedure reset_delta_events [2018-11-10 05:47:09,201 INFO L138 BoogieDeclarations]: Found implementation of procedure activate_threads [2018-11-10 05:47:09,201 INFO L138 BoogieDeclarations]: Found implementation of procedure immediate_notify [2018-11-10 05:47:09,201 INFO L138 BoogieDeclarations]: Found implementation of procedure fire_time_events [2018-11-10 05:47:09,201 INFO L138 BoogieDeclarations]: Found implementation of procedure reset_time_events [2018-11-10 05:47:09,201 INFO L138 BoogieDeclarations]: Found implementation of procedure init_model [2018-11-10 05:47:09,201 INFO L138 BoogieDeclarations]: Found implementation of procedure stop_simulation [2018-11-10 05:47:09,201 INFO L138 BoogieDeclarations]: Found implementation of procedure start_simulation [2018-11-10 05:47:09,201 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2018-11-10 05:47:09,201 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_error [2018-11-10 05:47:09,202 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_int [2018-11-10 05:47:09,202 INFO L130 BoogieDeclarations]: Found specification of procedure error [2018-11-10 05:47:09,202 INFO L130 BoogieDeclarations]: Found specification of procedure is_master_triggered [2018-11-10 05:47:09,202 INFO L130 BoogieDeclarations]: Found specification of procedure is_transmit1_triggered [2018-11-10 05:47:09,202 INFO L130 BoogieDeclarations]: Found specification of procedure immediate_notify [2018-11-10 05:47:09,202 INFO L130 BoogieDeclarations]: Found specification of procedure master [2018-11-10 05:47:09,202 INFO L130 BoogieDeclarations]: Found specification of procedure transmit1 [2018-11-10 05:47:09,202 INFO L130 BoogieDeclarations]: Found specification of procedure update_channels [2018-11-10 05:47:09,202 INFO L130 BoogieDeclarations]: Found specification of procedure init_threads [2018-11-10 05:47:09,202 INFO L130 BoogieDeclarations]: Found specification of procedure exists_runnable_thread [2018-11-10 05:47:09,202 INFO L130 BoogieDeclarations]: Found specification of procedure eval [2018-11-10 05:47:09,202 INFO L130 BoogieDeclarations]: Found specification of procedure fire_delta_events [2018-11-10 05:47:09,202 INFO L130 BoogieDeclarations]: Found specification of procedure reset_delta_events [2018-11-10 05:47:09,202 INFO L130 BoogieDeclarations]: Found specification of procedure activate_threads [2018-11-10 05:47:09,202 INFO L130 BoogieDeclarations]: Found specification of procedure fire_time_events [2018-11-10 05:47:09,202 INFO L130 BoogieDeclarations]: Found specification of procedure reset_time_events [2018-11-10 05:47:09,203 INFO L130 BoogieDeclarations]: Found specification of procedure init_model [2018-11-10 05:47:09,203 INFO L130 BoogieDeclarations]: Found specification of procedure stop_simulation [2018-11-10 05:47:09,203 INFO L130 BoogieDeclarations]: Found specification of procedure start_simulation [2018-11-10 05:47:09,203 INFO L130 BoogieDeclarations]: Found specification of procedure main [2018-11-10 05:47:09,203 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-11-10 05:47:09,203 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-11-10 05:47:09,500 INFO L341 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-11-10 05:47:09,501 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 10.11 05:47:09 BoogieIcfgContainer [2018-11-10 05:47:09,501 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-11-10 05:47:09,502 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-11-10 05:47:09,502 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-11-10 05:47:09,505 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-11-10 05:47:09,505 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 10.11 05:47:08" (1/3) ... [2018-11-10 05:47:09,505 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@432a65e5 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 10.11 05:47:09, skipping insertion in model container [2018-11-10 05:47:09,506 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 05:47:09" (2/3) ... [2018-11-10 05:47:09,506 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@432a65e5 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 10.11 05:47:09, skipping insertion in model container [2018-11-10 05:47:09,506 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 10.11 05:47:09" (3/3) ... [2018-11-10 05:47:09,507 INFO L112 eAbstractionObserver]: Analyzing ICFG transmitter.01_false-unreach-call_false-termination.cil.c [2018-11-10 05:47:09,515 INFO L136 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-11-10 05:47:09,520 INFO L148 ceAbstractionStarter]: Appying trace abstraction to program that has 1 error locations. [2018-11-10 05:47:09,529 INFO L257 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2018-11-10 05:47:09,548 INFO L135 ementStrategyFactory]: Using default assertion order modulation [2018-11-10 05:47:09,549 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-11-10 05:47:09,549 INFO L383 AbstractCegarLoop]: Hoare is true [2018-11-10 05:47:09,549 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-11-10 05:47:09,549 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-11-10 05:47:09,549 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-11-10 05:47:09,550 INFO L387 AbstractCegarLoop]: Difference is false [2018-11-10 05:47:09,550 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-11-10 05:47:09,550 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-11-10 05:47:09,563 INFO L276 IsEmpty]: Start isEmpty. Operand 144 states. [2018-11-10 05:47:09,568 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 78 [2018-11-10 05:47:09,569 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 05:47:09,569 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 05:47:09,571 INFO L424 AbstractCegarLoop]: === Iteration 1 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-10 05:47:09,575 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 05:47:09,575 INFO L82 PathProgramCache]: Analyzing trace with hash 1991777003, now seen corresponding path program 1 times [2018-11-10 05:47:09,576 INFO L225 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-10 05:47:09,577 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-10 05:47:09,607 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:47:09,607 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 05:47:09,607 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:47:09,657 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 05:47:09,775 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 05:47:09,777 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-10 05:47:09,777 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-10 05:47:09,782 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-10 05:47:09,792 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-10 05:47:09,793 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-10 05:47:09,794 INFO L87 Difference]: Start difference. First operand 144 states. Second operand 5 states. [2018-11-10 05:47:10,108 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 05:47:10,108 INFO L93 Difference]: Finished difference Result 297 states and 415 transitions. [2018-11-10 05:47:10,109 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-10 05:47:10,110 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 77 [2018-11-10 05:47:10,110 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 05:47:10,119 INFO L225 Difference]: With dead ends: 297 [2018-11-10 05:47:10,119 INFO L226 Difference]: Without dead ends: 160 [2018-11-10 05:47:10,122 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-11-10 05:47:10,133 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 160 states. [2018-11-10 05:47:10,162 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 160 to 135. [2018-11-10 05:47:10,163 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 135 states. [2018-11-10 05:47:10,165 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 135 states to 135 states and 171 transitions. [2018-11-10 05:47:10,166 INFO L78 Accepts]: Start accepts. Automaton has 135 states and 171 transitions. Word has length 77 [2018-11-10 05:47:10,167 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 05:47:10,167 INFO L481 AbstractCegarLoop]: Abstraction has 135 states and 171 transitions. [2018-11-10 05:47:10,167 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-10 05:47:10,167 INFO L276 IsEmpty]: Start isEmpty. Operand 135 states and 171 transitions. [2018-11-10 05:47:10,169 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 78 [2018-11-10 05:47:10,170 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 05:47:10,170 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 05:47:10,170 INFO L424 AbstractCegarLoop]: === Iteration 2 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-10 05:47:10,170 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 05:47:10,170 INFO L82 PathProgramCache]: Analyzing trace with hash 2032451753, now seen corresponding path program 1 times [2018-11-10 05:47:10,171 INFO L225 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-10 05:47:10,171 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-10 05:47:10,172 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:47:10,172 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 05:47:10,172 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:47:10,187 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 05:47:10,245 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 05:47:10,245 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-10 05:47:10,245 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-10 05:47:10,246 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-10 05:47:10,247 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-10 05:47:10,247 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-10 05:47:10,247 INFO L87 Difference]: Start difference. First operand 135 states and 171 transitions. Second operand 5 states. [2018-11-10 05:47:10,506 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 05:47:10,506 INFO L93 Difference]: Finished difference Result 276 states and 363 transitions. [2018-11-10 05:47:10,507 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-10 05:47:10,507 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 77 [2018-11-10 05:47:10,507 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 05:47:10,508 INFO L225 Difference]: With dead ends: 276 [2018-11-10 05:47:10,508 INFO L226 Difference]: Without dead ends: 160 [2018-11-10 05:47:10,509 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-11-10 05:47:10,510 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 160 states. [2018-11-10 05:47:10,524 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 160 to 135. [2018-11-10 05:47:10,524 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 135 states. [2018-11-10 05:47:10,525 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 135 states to 135 states and 170 transitions. [2018-11-10 05:47:10,526 INFO L78 Accepts]: Start accepts. Automaton has 135 states and 170 transitions. Word has length 77 [2018-11-10 05:47:10,526 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 05:47:10,526 INFO L481 AbstractCegarLoop]: Abstraction has 135 states and 170 transitions. [2018-11-10 05:47:10,526 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-10 05:47:10,526 INFO L276 IsEmpty]: Start isEmpty. Operand 135 states and 170 transitions. [2018-11-10 05:47:10,528 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 78 [2018-11-10 05:47:10,528 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 05:47:10,528 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 05:47:10,528 INFO L424 AbstractCegarLoop]: === Iteration 3 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-10 05:47:10,529 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 05:47:10,529 INFO L82 PathProgramCache]: Analyzing trace with hash -875730133, now seen corresponding path program 1 times [2018-11-10 05:47:10,529 INFO L225 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-10 05:47:10,529 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-10 05:47:10,530 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:47:10,530 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 05:47:10,530 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:47:10,542 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 05:47:10,600 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 05:47:10,600 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-10 05:47:10,600 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-10 05:47:10,600 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-10 05:47:10,600 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-10 05:47:10,600 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-10 05:47:10,601 INFO L87 Difference]: Start difference. First operand 135 states and 170 transitions. Second operand 5 states. [2018-11-10 05:47:10,774 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 05:47:10,774 INFO L93 Difference]: Finished difference Result 292 states and 385 transitions. [2018-11-10 05:47:10,774 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-10 05:47:10,775 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 77 [2018-11-10 05:47:10,775 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 05:47:10,776 INFO L225 Difference]: With dead ends: 292 [2018-11-10 05:47:10,777 INFO L226 Difference]: Without dead ends: 176 [2018-11-10 05:47:10,778 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-11-10 05:47:10,778 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 176 states. [2018-11-10 05:47:10,793 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 176 to 135. [2018-11-10 05:47:10,793 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 135 states. [2018-11-10 05:47:10,794 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 135 states to 135 states and 169 transitions. [2018-11-10 05:47:10,794 INFO L78 Accepts]: Start accepts. Automaton has 135 states and 169 transitions. Word has length 77 [2018-11-10 05:47:10,795 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 05:47:10,795 INFO L481 AbstractCegarLoop]: Abstraction has 135 states and 169 transitions. [2018-11-10 05:47:10,795 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-10 05:47:10,795 INFO L276 IsEmpty]: Start isEmpty. Operand 135 states and 169 transitions. [2018-11-10 05:47:10,796 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 78 [2018-11-10 05:47:10,796 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 05:47:10,796 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 05:47:10,796 INFO L424 AbstractCegarLoop]: === Iteration 4 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-10 05:47:10,797 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 05:47:10,797 INFO L82 PathProgramCache]: Analyzing trace with hash 288873, now seen corresponding path program 1 times [2018-11-10 05:47:10,797 INFO L225 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-10 05:47:10,797 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-10 05:47:10,797 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:47:10,798 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 05:47:10,798 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:47:10,805 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 05:47:10,845 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 05:47:10,845 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-10 05:47:10,845 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-10 05:47:10,845 INFO L460 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-10 05:47:10,846 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-10 05:47:10,846 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-11-10 05:47:10,846 INFO L87 Difference]: Start difference. First operand 135 states and 169 transitions. Second operand 6 states. [2018-11-10 05:47:10,885 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 05:47:10,885 INFO L93 Difference]: Finished difference Result 260 states and 336 transitions. [2018-11-10 05:47:10,885 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-11-10 05:47:10,885 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 77 [2018-11-10 05:47:10,886 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 05:47:10,887 INFO L225 Difference]: With dead ends: 260 [2018-11-10 05:47:10,887 INFO L226 Difference]: Without dead ends: 145 [2018-11-10 05:47:10,888 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-11-10 05:47:10,888 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 145 states. [2018-11-10 05:47:10,902 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 145 to 140. [2018-11-10 05:47:10,902 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 140 states. [2018-11-10 05:47:10,904 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 140 states to 140 states and 174 transitions. [2018-11-10 05:47:10,904 INFO L78 Accepts]: Start accepts. Automaton has 140 states and 174 transitions. Word has length 77 [2018-11-10 05:47:10,904 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 05:47:10,904 INFO L481 AbstractCegarLoop]: Abstraction has 140 states and 174 transitions. [2018-11-10 05:47:10,904 INFO L482 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-10 05:47:10,904 INFO L276 IsEmpty]: Start isEmpty. Operand 140 states and 174 transitions. [2018-11-10 05:47:10,905 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 78 [2018-11-10 05:47:10,906 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 05:47:10,906 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 05:47:10,907 INFO L424 AbstractCegarLoop]: === Iteration 5 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-10 05:47:10,907 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 05:47:10,907 INFO L82 PathProgramCache]: Analyzing trace with hash 423935595, now seen corresponding path program 1 times [2018-11-10 05:47:10,908 INFO L225 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-10 05:47:10,908 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-10 05:47:10,908 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:47:10,908 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 05:47:10,909 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:47:10,916 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 05:47:10,960 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 05:47:10,961 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-10 05:47:10,961 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-10 05:47:10,961 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-10 05:47:10,961 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-10 05:47:10,961 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-10 05:47:10,962 INFO L87 Difference]: Start difference. First operand 140 states and 174 transitions. Second operand 4 states. [2018-11-10 05:47:11,117 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 05:47:11,117 INFO L93 Difference]: Finished difference Result 370 states and 478 transitions. [2018-11-10 05:47:11,118 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-10 05:47:11,118 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 77 [2018-11-10 05:47:11,118 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 05:47:11,119 INFO L225 Difference]: With dead ends: 370 [2018-11-10 05:47:11,119 INFO L226 Difference]: Without dead ends: 250 [2018-11-10 05:47:11,120 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-10 05:47:11,120 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 250 states. [2018-11-10 05:47:11,138 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 250 to 250. [2018-11-10 05:47:11,138 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 250 states. [2018-11-10 05:47:11,139 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 250 states to 250 states and 308 transitions. [2018-11-10 05:47:11,139 INFO L78 Accepts]: Start accepts. Automaton has 250 states and 308 transitions. Word has length 77 [2018-11-10 05:47:11,139 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 05:47:11,139 INFO L481 AbstractCegarLoop]: Abstraction has 250 states and 308 transitions. [2018-11-10 05:47:11,140 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-10 05:47:11,140 INFO L276 IsEmpty]: Start isEmpty. Operand 250 states and 308 transitions. [2018-11-10 05:47:11,141 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 98 [2018-11-10 05:47:11,141 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 05:47:11,141 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 05:47:11,143 INFO L424 AbstractCegarLoop]: === Iteration 6 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-10 05:47:11,143 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 05:47:11,143 INFO L82 PathProgramCache]: Analyzing trace with hash 854066425, now seen corresponding path program 1 times [2018-11-10 05:47:11,143 INFO L225 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-10 05:47:11,143 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-10 05:47:11,144 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:47:11,144 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 05:47:11,144 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:47:11,154 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 05:47:11,187 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 1 proven. 0 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2018-11-10 05:47:11,187 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-10 05:47:11,187 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-10 05:47:11,187 INFO L460 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-10 05:47:11,188 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-10 05:47:11,188 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-11-10 05:47:11,188 INFO L87 Difference]: Start difference. First operand 250 states and 308 transitions. Second operand 6 states. [2018-11-10 05:47:11,225 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 05:47:11,226 INFO L93 Difference]: Finished difference Result 487 states and 615 transitions. [2018-11-10 05:47:11,226 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-11-10 05:47:11,226 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 97 [2018-11-10 05:47:11,227 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 05:47:11,228 INFO L225 Difference]: With dead ends: 487 [2018-11-10 05:47:11,229 INFO L226 Difference]: Without dead ends: 257 [2018-11-10 05:47:11,229 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-11-10 05:47:11,230 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 257 states. [2018-11-10 05:47:11,248 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 257 to 255. [2018-11-10 05:47:11,248 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 255 states. [2018-11-10 05:47:11,249 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 255 states to 255 states and 312 transitions. [2018-11-10 05:47:11,250 INFO L78 Accepts]: Start accepts. Automaton has 255 states and 312 transitions. Word has length 97 [2018-11-10 05:47:11,250 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 05:47:11,250 INFO L481 AbstractCegarLoop]: Abstraction has 255 states and 312 transitions. [2018-11-10 05:47:11,250 INFO L482 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-10 05:47:11,250 INFO L276 IsEmpty]: Start isEmpty. Operand 255 states and 312 transitions. [2018-11-10 05:47:11,251 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 98 [2018-11-10 05:47:11,251 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 05:47:11,251 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 05:47:11,252 INFO L424 AbstractCegarLoop]: === Iteration 7 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-10 05:47:11,252 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 05:47:11,252 INFO L82 PathProgramCache]: Analyzing trace with hash -1902560841, now seen corresponding path program 1 times [2018-11-10 05:47:11,252 INFO L225 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-10 05:47:11,252 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-10 05:47:11,253 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:47:11,253 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 05:47:11,253 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:47:11,261 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 05:47:11,312 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 1 proven. 0 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2018-11-10 05:47:11,313 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-10 05:47:11,313 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-10 05:47:11,313 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-10 05:47:11,313 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-10 05:47:11,313 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-10 05:47:11,314 INFO L87 Difference]: Start difference. First operand 255 states and 312 transitions. Second operand 5 states. [2018-11-10 05:47:11,573 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 05:47:11,573 INFO L93 Difference]: Finished difference Result 614 states and 786 transitions. [2018-11-10 05:47:11,573 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-10 05:47:11,574 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 97 [2018-11-10 05:47:11,574 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 05:47:11,576 INFO L225 Difference]: With dead ends: 614 [2018-11-10 05:47:11,576 INFO L226 Difference]: Without dead ends: 379 [2018-11-10 05:47:11,576 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 5 SyntacticMatches, 3 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2018-11-10 05:47:11,577 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 379 states. [2018-11-10 05:47:11,596 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 379 to 317. [2018-11-10 05:47:11,596 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 317 states. [2018-11-10 05:47:11,597 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 317 states to 317 states and 384 transitions. [2018-11-10 05:47:11,597 INFO L78 Accepts]: Start accepts. Automaton has 317 states and 384 transitions. Word has length 97 [2018-11-10 05:47:11,597 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 05:47:11,598 INFO L481 AbstractCegarLoop]: Abstraction has 317 states and 384 transitions. [2018-11-10 05:47:11,598 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-10 05:47:11,598 INFO L276 IsEmpty]: Start isEmpty. Operand 317 states and 384 transitions. [2018-11-10 05:47:11,598 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 98 [2018-11-10 05:47:11,599 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 05:47:11,599 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 05:47:11,599 INFO L424 AbstractCegarLoop]: === Iteration 8 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-10 05:47:11,599 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 05:47:11,599 INFO L82 PathProgramCache]: Analyzing trace with hash 36601205, now seen corresponding path program 1 times [2018-11-10 05:47:11,599 INFO L225 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-10 05:47:11,599 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-10 05:47:11,600 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:47:11,600 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 05:47:11,600 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:47:11,606 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 05:47:11,653 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 1 proven. 0 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2018-11-10 05:47:11,653 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-10 05:47:11,653 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-10 05:47:11,653 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-10 05:47:11,653 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-10 05:47:11,654 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-10 05:47:11,654 INFO L87 Difference]: Start difference. First operand 317 states and 384 transitions. Second operand 5 states. [2018-11-10 05:47:11,799 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 05:47:11,799 INFO L93 Difference]: Finished difference Result 613 states and 750 transitions. [2018-11-10 05:47:11,800 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-10 05:47:11,800 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 97 [2018-11-10 05:47:11,800 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 05:47:11,801 INFO L225 Difference]: With dead ends: 613 [2018-11-10 05:47:11,801 INFO L226 Difference]: Without dead ends: 317 [2018-11-10 05:47:11,803 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 4 SyntacticMatches, 3 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-11-10 05:47:11,803 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 317 states. [2018-11-10 05:47:11,819 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 317 to 317. [2018-11-10 05:47:11,819 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 317 states. [2018-11-10 05:47:11,820 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 317 states to 317 states and 378 transitions. [2018-11-10 05:47:11,821 INFO L78 Accepts]: Start accepts. Automaton has 317 states and 378 transitions. Word has length 97 [2018-11-10 05:47:11,821 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 05:47:11,821 INFO L481 AbstractCegarLoop]: Abstraction has 317 states and 378 transitions. [2018-11-10 05:47:11,821 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-10 05:47:11,821 INFO L276 IsEmpty]: Start isEmpty. Operand 317 states and 378 transitions. [2018-11-10 05:47:11,822 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 98 [2018-11-10 05:47:11,822 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 05:47:11,822 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 05:47:11,822 INFO L424 AbstractCegarLoop]: === Iteration 9 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-10 05:47:11,823 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 05:47:11,823 INFO L82 PathProgramCache]: Analyzing trace with hash -316487177, now seen corresponding path program 1 times [2018-11-10 05:47:11,823 INFO L225 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-10 05:47:11,823 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-10 05:47:11,825 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:47:11,825 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 05:47:11,825 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:47:11,832 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 05:47:11,882 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 1 proven. 0 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2018-11-10 05:47:11,882 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-10 05:47:11,882 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-10 05:47:11,882 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-10 05:47:11,882 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-10 05:47:11,882 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-10 05:47:11,883 INFO L87 Difference]: Start difference. First operand 317 states and 378 transitions. Second operand 5 states. [2018-11-10 05:47:12,102 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 05:47:12,102 INFO L93 Difference]: Finished difference Result 726 states and 919 transitions. [2018-11-10 05:47:12,103 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-11-10 05:47:12,103 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 97 [2018-11-10 05:47:12,103 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 05:47:12,104 INFO L225 Difference]: With dead ends: 726 [2018-11-10 05:47:12,105 INFO L226 Difference]: Without dead ends: 430 [2018-11-10 05:47:12,105 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 5 SyntacticMatches, 3 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2018-11-10 05:47:12,106 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 430 states. [2018-11-10 05:47:12,128 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 430 to 351. [2018-11-10 05:47:12,128 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 351 states. [2018-11-10 05:47:12,130 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 351 states to 351 states and 406 transitions. [2018-11-10 05:47:12,130 INFO L78 Accepts]: Start accepts. Automaton has 351 states and 406 transitions. Word has length 97 [2018-11-10 05:47:12,130 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 05:47:12,130 INFO L481 AbstractCegarLoop]: Abstraction has 351 states and 406 transitions. [2018-11-10 05:47:12,130 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-10 05:47:12,131 INFO L276 IsEmpty]: Start isEmpty. Operand 351 states and 406 transitions. [2018-11-10 05:47:12,132 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 98 [2018-11-10 05:47:12,133 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 05:47:12,133 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 05:47:12,133 INFO L424 AbstractCegarLoop]: === Iteration 10 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-10 05:47:12,133 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 05:47:12,133 INFO L82 PathProgramCache]: Analyzing trace with hash 1611785525, now seen corresponding path program 1 times [2018-11-10 05:47:12,133 INFO L225 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-10 05:47:12,134 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-10 05:47:12,134 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:47:12,134 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 05:47:12,134 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:47:12,141 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 05:47:12,165 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 7 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2018-11-10 05:47:12,165 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-10 05:47:12,165 INFO L225 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_c575d1cc-dc9a-40ac-b5e9-0c8057ba7c09/bin-2019/uautomizer/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-10 05:47:12,177 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 05:47:12,231 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 05:47:12,239 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 05:47:12,252 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 11 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-11-10 05:47:12,269 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-11-10 05:47:12,269 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [3] total 3 [2018-11-10 05:47:12,269 INFO L460 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-10 05:47:12,269 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-10 05:47:12,270 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-10 05:47:12,270 INFO L87 Difference]: Start difference. First operand 351 states and 406 transitions. Second operand 3 states. [2018-11-10 05:47:12,347 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 05:47:12,347 INFO L93 Difference]: Finished difference Result 937 states and 1110 transitions. [2018-11-10 05:47:12,348 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-10 05:47:12,348 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 97 [2018-11-10 05:47:12,348 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 05:47:12,351 INFO L225 Difference]: With dead ends: 937 [2018-11-10 05:47:12,351 INFO L226 Difference]: Without dead ends: 607 [2018-11-10 05:47:12,352 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 99 GetRequests, 98 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-10 05:47:12,353 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 607 states. [2018-11-10 05:47:12,391 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 607 to 601. [2018-11-10 05:47:12,391 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 601 states. [2018-11-10 05:47:12,394 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 601 states to 601 states and 708 transitions. [2018-11-10 05:47:12,394 INFO L78 Accepts]: Start accepts. Automaton has 601 states and 708 transitions. Word has length 97 [2018-11-10 05:47:12,394 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 05:47:12,394 INFO L481 AbstractCegarLoop]: Abstraction has 601 states and 708 transitions. [2018-11-10 05:47:12,394 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-10 05:47:12,394 INFO L276 IsEmpty]: Start isEmpty. Operand 601 states and 708 transitions. [2018-11-10 05:47:12,397 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 100 [2018-11-10 05:47:12,397 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 05:47:12,398 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 05:47:12,398 INFO L424 AbstractCegarLoop]: === Iteration 11 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-10 05:47:12,398 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 05:47:12,398 INFO L82 PathProgramCache]: Analyzing trace with hash -1561359337, now seen corresponding path program 1 times [2018-11-10 05:47:12,398 INFO L225 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-10 05:47:12,398 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-10 05:47:12,399 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:47:12,399 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 05:47:12,399 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:47:12,406 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 05:47:12,440 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 11 proven. 0 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2018-11-10 05:47:12,441 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-10 05:47:12,441 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-10 05:47:12,441 INFO L460 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-10 05:47:12,441 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-10 05:47:12,441 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-10 05:47:12,442 INFO L87 Difference]: Start difference. First operand 601 states and 708 transitions. Second operand 3 states. [2018-11-10 05:47:12,531 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 05:47:12,531 INFO L93 Difference]: Finished difference Result 1733 states and 2066 transitions. [2018-11-10 05:47:12,532 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-10 05:47:12,533 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 99 [2018-11-10 05:47:12,533 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 05:47:12,536 INFO L225 Difference]: With dead ends: 1733 [2018-11-10 05:47:12,536 INFO L226 Difference]: Without dead ends: 877 [2018-11-10 05:47:12,538 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-10 05:47:12,539 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 877 states. [2018-11-10 05:47:12,596 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 877 to 877. [2018-11-10 05:47:12,596 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 877 states. [2018-11-10 05:47:12,600 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 877 states to 877 states and 1036 transitions. [2018-11-10 05:47:12,600 INFO L78 Accepts]: Start accepts. Automaton has 877 states and 1036 transitions. Word has length 99 [2018-11-10 05:47:12,601 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 05:47:12,601 INFO L481 AbstractCegarLoop]: Abstraction has 877 states and 1036 transitions. [2018-11-10 05:47:12,601 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-10 05:47:12,601 INFO L276 IsEmpty]: Start isEmpty. Operand 877 states and 1036 transitions. [2018-11-10 05:47:12,603 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 136 [2018-11-10 05:47:12,603 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 05:47:12,603 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 05:47:12,603 INFO L424 AbstractCegarLoop]: === Iteration 12 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-10 05:47:12,604 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 05:47:12,604 INFO L82 PathProgramCache]: Analyzing trace with hash 1713747540, now seen corresponding path program 1 times [2018-11-10 05:47:12,604 INFO L225 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-10 05:47:12,604 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-10 05:47:12,604 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:47:12,604 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 05:47:12,605 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:47:12,615 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-10 05:47:12,627 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-10 05:47:12,655 INFO L442 BasicCegarLoop]: Counterexample might be feasible [2018-11-10 05:47:12,716 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 10.11 05:47:12 BoogieIcfgContainer [2018-11-10 05:47:12,716 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-11-10 05:47:12,716 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2018-11-10 05:47:12,716 INFO L271 PluginConnector]: Initializing Witness Printer... [2018-11-10 05:47:12,716 INFO L276 PluginConnector]: Witness Printer initialized [2018-11-10 05:47:12,717 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 10.11 05:47:09" (3/4) ... [2018-11-10 05:47:12,718 INFO L138 WitnessPrinter]: Generating witness for reachability counterexample [2018-11-10 05:47:12,787 INFO L145 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/working_dir_c575d1cc-dc9a-40ac-b5e9-0c8057ba7c09/bin-2019/uautomizer/witness.graphml [2018-11-10 05:47:12,787 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2018-11-10 05:47:12,788 INFO L168 Benchmark]: Toolchain (without parser) took 3872.57 ms. Allocated memory was 1.0 GB in the beginning and 1.4 GB in the end (delta: 345.0 MB). Free memory was 960.2 MB in the beginning and 1.2 GB in the end (delta: -213.0 MB). Peak memory consumption was 132.0 MB. Max. memory is 11.5 GB. [2018-11-10 05:47:12,789 INFO L168 Benchmark]: CDTParser took 0.10 ms. Allocated memory is still 1.0 GB. Free memory is still 985.4 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-11-10 05:47:12,789 INFO L168 Benchmark]: CACSL2BoogieTranslator took 189.64 ms. Allocated memory is still 1.0 GB. Free memory was 960.2 MB in the beginning and 946.8 MB in the end (delta: 13.4 MB). Peak memory consumption was 13.4 MB. Max. memory is 11.5 GB. [2018-11-10 05:47:12,789 INFO L168 Benchmark]: Boogie Preprocessor took 22.95 ms. Allocated memory is still 1.0 GB. Free memory was 946.8 MB in the beginning and 944.1 MB in the end (delta: 2.7 MB). Peak memory consumption was 2.7 MB. Max. memory is 11.5 GB. [2018-11-10 05:47:12,790 INFO L168 Benchmark]: RCFGBuilder took 371.62 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 163.1 MB). Free memory was 944.1 MB in the beginning and 1.1 GB in the end (delta: -179.4 MB). Peak memory consumption was 15.0 MB. Max. memory is 11.5 GB. [2018-11-10 05:47:12,790 INFO L168 Benchmark]: TraceAbstraction took 3213.97 ms. Allocated memory was 1.2 GB in the beginning and 1.4 GB in the end (delta: 181.9 MB). Free memory was 1.1 GB in the beginning and 1.2 GB in the end (delta: -64.4 MB). Peak memory consumption was 117.5 MB. Max. memory is 11.5 GB. [2018-11-10 05:47:12,790 INFO L168 Benchmark]: Witness Printer took 71.31 ms. Allocated memory is still 1.4 GB. Free memory was 1.2 GB in the beginning and 1.2 GB in the end (delta: 14.7 MB). Peak memory consumption was 14.7 MB. Max. memory is 11.5 GB. [2018-11-10 05:47:12,792 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.10 ms. Allocated memory is still 1.0 GB. Free memory is still 985.4 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 189.64 ms. Allocated memory is still 1.0 GB. Free memory was 960.2 MB in the beginning and 946.8 MB in the end (delta: 13.4 MB). Peak memory consumption was 13.4 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 22.95 ms. Allocated memory is still 1.0 GB. Free memory was 946.8 MB in the beginning and 944.1 MB in the end (delta: 2.7 MB). Peak memory consumption was 2.7 MB. Max. memory is 11.5 GB. * RCFGBuilder took 371.62 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 163.1 MB). Free memory was 944.1 MB in the beginning and 1.1 GB in the end (delta: -179.4 MB). Peak memory consumption was 15.0 MB. Max. memory is 11.5 GB. * TraceAbstraction took 3213.97 ms. Allocated memory was 1.2 GB in the beginning and 1.4 GB in the end (delta: 181.9 MB). Free memory was 1.1 GB in the beginning and 1.2 GB in the end (delta: -64.4 MB). Peak memory consumption was 117.5 MB. Max. memory is 11.5 GB. * Witness Printer took 71.31 ms. Allocated memory is still 1.4 GB. Free memory was 1.2 GB in the beginning and 1.2 GB in the end (delta: 14.7 MB). Peak memory consumption was 14.7 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 11]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L15] int m_pc = 0; [L16] int t1_pc = 0; [L17] int m_st ; [L18] int t1_st ; [L19] int m_i ; [L20] int t1_i ; [L21] int M_E = 2; [L22] int T1_E = 2; [L23] int E_1 = 2; VAL [\old(E_1)=6, \old(M_E)=11, \old(m_i)=5, \old(m_pc)=9, \old(m_st)=8, \old(T1_E)=3, \old(t1_i)=10, \old(t1_pc)=7, \old(t1_st)=4, E_1=2, M_E=2, m_i=0, m_pc=0, m_st=0, T1_E=2, t1_i=0, t1_pc=0, t1_st=0] [L439] int __retres1 ; VAL [\old(E_1)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, E_1=2, M_E=2, m_i=0, m_pc=0, m_st=0, T1_E=2, t1_i=0, t1_pc=0, t1_st=0] [L443] CALL init_model() VAL [\old(E_1)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, E_1=2, M_E=2, m_i=0, m_pc=0, m_st=0, T1_E=2, t1_i=0, t1_pc=0, t1_st=0] [L354] m_i = 1 [L355] RET t1_i = 1 VAL [\old(E_1)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, E_1=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0] [L443] init_model() VAL [\old(E_1)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, E_1=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0] [L444] CALL start_simulation() VAL [\old(E_1)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, E_1=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0] [L380] int kernel_st ; [L381] int tmp ; [L382] int tmp___0 ; [L386] kernel_st = 0 VAL [\old(E_1)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, E_1=2, kernel_st=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0] [L387] FCALL update_channels() VAL [\old(E_1)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, E_1=2, kernel_st=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0] [L388] CALL init_threads() VAL [\old(E_1)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, E_1=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0] [L151] COND TRUE m_i == 1 [L152] m_st = 0 VAL [\old(E_1)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, E_1=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0] [L156] COND TRUE t1_i == 1 [L157] RET t1_st = 0 VAL [\old(E_1)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, E_1=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0] [L388] init_threads() VAL [\old(E_1)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, E_1=2, kernel_st=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0] [L389] CALL fire_delta_events() VAL [\old(E_1)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, E_1=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0] [L240] COND FALSE !(M_E == 0) VAL [\old(E_1)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, E_1=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0] [L245] COND FALSE !(T1_E == 0) VAL [\old(E_1)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, E_1=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0] [L250] COND FALSE, RET !(E_1 == 0) VAL [\old(E_1)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, E_1=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0] [L389] fire_delta_events() VAL [\old(E_1)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, E_1=2, kernel_st=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0] [L390] CALL activate_threads() VAL [\old(E_1)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, E_1=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0] [L283] int tmp ; [L284] int tmp___0 ; VAL [\old(E_1)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, E_1=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0] [L288] CALL, EXPR is_master_triggered() VAL [\old(E_1)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, E_1=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0] [L102] int __retres1 ; VAL [\old(E_1)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, E_1=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0] [L105] COND FALSE !(m_pc == 1) VAL [\old(E_1)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, E_1=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0] [L115] __retres1 = 0 VAL [\old(E_1)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, __retres1=0, E_1=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0] [L117] RET return (__retres1); VAL [\old(E_1)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \result=0, __retres1=0, E_1=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0] [L288] EXPR is_master_triggered() VAL [\old(E_1)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, E_1=2, is_master_triggered()=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0] [L288] tmp = is_master_triggered() [L290] COND FALSE !(\read(tmp)) VAL [\old(E_1)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, E_1=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, tmp=0] [L296] CALL, EXPR is_transmit1_triggered() VAL [\old(E_1)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, E_1=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0] [L121] int __retres1 ; VAL [\old(E_1)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, E_1=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0] [L124] COND FALSE !(t1_pc == 1) VAL [\old(E_1)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, E_1=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0] [L134] __retres1 = 0 VAL [\old(E_1)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, __retres1=0, E_1=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0] [L136] RET return (__retres1); VAL [\old(E_1)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \result=0, __retres1=0, E_1=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0] [L296] EXPR is_transmit1_triggered() VAL [\old(E_1)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, E_1=2, is_transmit1_triggered()=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, tmp=0] [L296] tmp___0 = is_transmit1_triggered() [L298] COND FALSE, RET !(\read(tmp___0)) VAL [\old(E_1)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, E_1=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, tmp=0, tmp___0=0] [L390] activate_threads() VAL [\old(E_1)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, E_1=2, kernel_st=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0] [L391] CALL reset_delta_events() VAL [\old(E_1)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, E_1=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0] [L263] COND FALSE !(M_E == 1) VAL [\old(E_1)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, E_1=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0] [L268] COND FALSE !(T1_E == 1) VAL [\old(E_1)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, E_1=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0] [L273] COND FALSE, RET !(E_1 == 1) VAL [\old(E_1)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, E_1=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0] [L391] reset_delta_events() VAL [\old(E_1)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, E_1=2, kernel_st=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0] [L394] COND TRUE 1 VAL [\old(E_1)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, E_1=2, kernel_st=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0] [L397] kernel_st = 1 VAL [\old(E_1)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, E_1=2, kernel_st=1, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0] [L398] CALL eval() VAL [\old(E_1)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, E_1=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0] [L187] int tmp ; VAL [\old(E_1)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, E_1=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0] [L191] COND TRUE 1 VAL [\old(E_1)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, E_1=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0] [L194] CALL, EXPR exists_runnable_thread() VAL [\old(E_1)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, E_1=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0] [L166] int __retres1 ; VAL [\old(E_1)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, E_1=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0] [L169] COND TRUE m_st == 0 [L170] __retres1 = 1 VAL [\old(E_1)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, __retres1=1, E_1=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0] [L182] RET return (__retres1); VAL [\old(E_1)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \result=1, __retres1=1, E_1=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0] [L194] EXPR exists_runnable_thread() VAL [\old(E_1)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, E_1=2, exists_runnable_thread()=1, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0] [L194] tmp = exists_runnable_thread() [L196] COND TRUE \read(tmp) VAL [\old(E_1)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, E_1=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, tmp=1] [L201] COND TRUE m_st == 0 [L202] int tmp_ndt_1; [L203] tmp_ndt_1 = __VERIFIER_nondet_int() [L204] COND FALSE !(\read(tmp_ndt_1)) VAL [\old(E_1)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, E_1=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, tmp=1, tmp_ndt_1=0] [L215] COND TRUE t1_st == 0 [L216] int tmp_ndt_2; [L217] tmp_ndt_2 = __VERIFIER_nondet_int() [L218] COND TRUE \read(tmp_ndt_2) [L220] t1_st = 1 VAL [\old(E_1)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, E_1=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=1, tmp=1, tmp_ndt_1=0, tmp_ndt_2=1] [L221] CALL transmit1() VAL [\old(E_1)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=1, E_1=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=1] [L72] COND TRUE t1_pc == 0 VAL [\old(E_1)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=1, E_1=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=1] [L83] COND TRUE 1 VAL [\old(E_1)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=1, E_1=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=1] [L85] t1_pc = 1 [L86] RET t1_st = 2 VAL [\old(E_1)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=1, E_1=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2] [L221] transmit1() VAL [\old(E_1)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, E_1=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, tmp=1, tmp_ndt_1=0, tmp_ndt_2=1] [L191] COND TRUE 1 VAL [\old(E_1)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, E_1=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, tmp=1, tmp_ndt_1=0, tmp_ndt_2=1] [L194] CALL, EXPR exists_runnable_thread() VAL [\old(E_1)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, E_1=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2] [L166] int __retres1 ; VAL [\old(E_1)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, E_1=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2] [L169] COND TRUE m_st == 0 [L170] __retres1 = 1 VAL [\old(E_1)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, __retres1=1, E_1=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2] [L182] RET return (__retres1); VAL [\old(E_1)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \result=1, __retres1=1, E_1=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2] [L194] EXPR exists_runnable_thread() VAL [\old(E_1)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, E_1=2, exists_runnable_thread()=1, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, tmp=1, tmp_ndt_1=0, tmp_ndt_2=1] [L194] tmp = exists_runnable_thread() [L196] COND TRUE \read(tmp) VAL [\old(E_1)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, E_1=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, tmp=1, tmp_ndt_1=0, tmp_ndt_2=1] [L201] COND TRUE m_st == 0 [L202] int tmp_ndt_1; [L203] tmp_ndt_1 = __VERIFIER_nondet_int() [L204] COND TRUE \read(tmp_ndt_1) [L206] m_st = 1 VAL [\old(E_1)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, E_1=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, tmp=1, tmp_ndt_1=1, tmp_ndt_2=1] [L207] CALL master() VAL [\old(E_1)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, E_1=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2] [L31] COND TRUE m_pc == 0 VAL [\old(E_1)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, E_1=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2] [L42] COND TRUE 1 VAL [\old(E_1)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, E_1=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2] [L45] E_1 = 1 VAL [\old(E_1)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, E_1=1, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2] [L46] CALL immediate_notify() VAL [\old(E_1)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, E_1=1, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2] [L312] CALL activate_threads() VAL [\old(E_1)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, E_1=1, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2] [L283] int tmp ; [L284] int tmp___0 ; VAL [\old(E_1)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, E_1=1, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2] [L288] CALL, EXPR is_master_triggered() VAL [\old(E_1)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, E_1=1, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2] [L102] int __retres1 ; VAL [\old(E_1)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, E_1=1, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2] [L105] COND FALSE !(m_pc == 1) VAL [\old(E_1)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, E_1=1, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2] [L115] __retres1 = 0 VAL [\old(E_1)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, __retres1=0, E_1=1, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2] [L117] RET return (__retres1); VAL [\old(E_1)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \result=0, __retres1=0, E_1=1, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2] [L288] EXPR is_master_triggered() VAL [\old(E_1)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, E_1=1, is_master_triggered()=0, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2] [L288] tmp = is_master_triggered() [L290] COND FALSE !(\read(tmp)) VAL [\old(E_1)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, E_1=1, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, tmp=0] [L296] CALL, EXPR is_transmit1_triggered() VAL [\old(E_1)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, E_1=1, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2] [L121] int __retres1 ; VAL [\old(E_1)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, E_1=1, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2] [L124] COND TRUE t1_pc == 1 VAL [\old(E_1)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, E_1=1, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2] [L125] COND TRUE E_1 == 1 [L126] __retres1 = 1 VAL [\old(E_1)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, __retres1=1, E_1=1, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2] [L136] RET return (__retres1); VAL [\old(E_1)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \result=1, __retres1=1, E_1=1, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2] [L296] EXPR is_transmit1_triggered() VAL [\old(E_1)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, E_1=1, is_transmit1_triggered()=1, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, tmp=0] [L296] tmp___0 = is_transmit1_triggered() [L298] COND TRUE \read(tmp___0) [L299] RET t1_st = 0 VAL [\old(E_1)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, E_1=1, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, tmp=0, tmp___0=1] [L312] RET activate_threads() VAL [\old(E_1)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, E_1=1, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0] [L46] immediate_notify() VAL [\old(E_1)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, E_1=1, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0] [L47] E_1 = 2 VAL [\old(E_1)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, E_1=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0] [L50] COND TRUE 1 VAL [\old(E_1)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, E_1=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0] [L52] m_pc = 1 [L53] RET m_st = 2 VAL [\old(E_1)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, E_1=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=0] [L207] master() VAL [\old(E_1)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, E_1=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, tmp=1, tmp_ndt_1=1, tmp_ndt_2=1] [L215] COND TRUE t1_st == 0 [L216] int tmp_ndt_2; [L217] tmp_ndt_2 = __VERIFIER_nondet_int() [L218] COND TRUE \read(tmp_ndt_2) [L220] t1_st = 1 VAL [\old(E_1)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, E_1=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, tmp=1, tmp_ndt_1=1, tmp_ndt_2=1] [L221] CALL transmit1() VAL [\old(E_1)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, E_1=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1] [L72] COND FALSE !(t1_pc == 0) VAL [\old(E_1)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, E_1=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1] [L75] COND TRUE t1_pc == 1 VAL [\old(E_1)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, E_1=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1] [L91] CALL error() VAL [\old(E_1)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, E_1=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1] [L11] __VERIFIER_error() VAL [\old(E_1)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, E_1=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1] - StatisticsResult: Ultimate Automizer benchmark data CFG has 21 procedures, 144 locations, 1 error locations. UNSAFE Result, 3.1s OverallTime, 12 OverallIterations, 2 TraceHistogramMax, 1.8s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 2044 SDtfs, 2057 SDslu, 2284 SDs, 0 SdLazy, 1466 SolverSat, 623 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 1.1s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 187 GetRequests, 129 SyntacticMatches, 17 SemanticMatches, 41 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.3s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=877occurred in iteration=11, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 0.2s AutomataMinimizationTime, 11 MinimizatonAttempts, 245 StatesRemovedByMinimization, 8 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.0s SsaConstructionTime, 0.1s SatisfiabilityAnalysisTime, 0.5s InterpolantComputationTime, 1201 NumberOfCodeBlocks, 1201 NumberOfCodeBlocksAsserted, 13 NumberOfCheckSat, 1054 ConstructedInterpolants, 0 QuantifiedInterpolants, 128736 SizeOfPredicates, 0 NumberOfNonLiveVariables, 372 ConjunctsInSsa, 3 ConjunctsInUnsatCore, 12 InterpolantComputations, 11 PerfectInterpolantSequences, 103/106 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...