./Ultimate.py --spec ../../sv-benchmarks/c/Termination.prp --file ../../sv-benchmarks/c/termination-restricted-15/NarrowKonv_false-termination_true-no-overflow.c --full-output --architecture 64bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 1dbac8bc Calling Ultimate with: java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/working_dir_4b8fc6d8-f1f2-4752-b24c-26b6754cc212/bin-2019/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/working_dir_4b8fc6d8-f1f2-4752-b24c-26b6754cc212/bin-2019/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/working_dir_4b8fc6d8-f1f2-4752-b24c-26b6754cc212/bin-2019/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/working_dir_4b8fc6d8-f1f2-4752-b24c-26b6754cc212/bin-2019/uautomizer/config/AutomizerTermination.xml -i ../../sv-benchmarks/c/termination-restricted-15/NarrowKonv_false-termination_true-no-overflow.c -s /tmp/vcloud-vcloud-master/worker/working_dir_4b8fc6d8-f1f2-4752-b24c-26b6754cc212/bin-2019/uautomizer/config/svcomp-Termination-64bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/working_dir_4b8fc6d8-f1f2-4752-b24c-26b6754cc212/bin-2019/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash 446a3f39420f718ff3d1f0852398f1e5da972fdc .............................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................. Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE(TERM) --- Real Ultimate output --- This is Ultimate 0.1.23-1dbac8b [2018-11-10 05:33:16,851 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-11-10 05:33:16,852 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-11-10 05:33:16,859 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-11-10 05:33:16,859 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-11-10 05:33:16,860 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-11-10 05:33:16,861 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-11-10 05:33:16,862 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-11-10 05:33:16,863 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-11-10 05:33:16,863 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-11-10 05:33:16,864 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-11-10 05:33:16,864 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-11-10 05:33:16,865 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-11-10 05:33:16,866 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-11-10 05:33:16,866 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-11-10 05:33:16,867 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-11-10 05:33:16,867 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-11-10 05:33:16,869 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-11-10 05:33:16,870 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-11-10 05:33:16,871 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-11-10 05:33:16,872 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-11-10 05:33:16,872 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-11-10 05:33:16,874 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-11-10 05:33:16,874 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-11-10 05:33:16,874 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-11-10 05:33:16,875 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-11-10 05:33:16,876 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-11-10 05:33:16,876 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-11-10 05:33:16,877 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-11-10 05:33:16,877 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-11-10 05:33:16,878 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-11-10 05:33:16,878 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-11-10 05:33:16,878 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-11-10 05:33:16,878 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-11-10 05:33:16,879 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-11-10 05:33:16,879 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-11-10 05:33:16,880 INFO L98 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/working_dir_4b8fc6d8-f1f2-4752-b24c-26b6754cc212/bin-2019/uautomizer/config/svcomp-Termination-64bit-Automizer_Default.epf [2018-11-10 05:33:16,890 INFO L110 SettingsManager]: Loading preferences was successful [2018-11-10 05:33:16,891 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-11-10 05:33:16,891 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-11-10 05:33:16,892 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-11-10 05:33:16,892 INFO L133 SettingsManager]: * Use SBE=true [2018-11-10 05:33:16,892 INFO L131 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2018-11-10 05:33:16,892 INFO L133 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2018-11-10 05:33:16,892 INFO L133 SettingsManager]: * Use old map elimination=false [2018-11-10 05:33:16,892 INFO L133 SettingsManager]: * Use external solver (rank synthesis)=false [2018-11-10 05:33:16,892 INFO L133 SettingsManager]: * Use only trivial implications for array writes=true [2018-11-10 05:33:16,893 INFO L133 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2018-11-10 05:33:16,893 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-11-10 05:33:16,893 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-11-10 05:33:16,893 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-11-10 05:33:16,893 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-11-10 05:33:16,893 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2018-11-10 05:33:16,893 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2018-11-10 05:33:16,893 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2018-11-10 05:33:16,893 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-11-10 05:33:16,894 INFO L133 SettingsManager]: * Assume nondeterminstic values are in range=false [2018-11-10 05:33:16,894 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2018-11-10 05:33:16,894 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-11-10 05:33:16,894 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-11-10 05:33:16,894 INFO L133 SettingsManager]: * To the following directory=/home/matthias/ultimate/dump [2018-11-10 05:33:16,894 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-11-10 05:33:16,894 INFO L133 SettingsManager]: * Trace refinement strategy=CAMEL [2018-11-10 05:33:16,894 INFO L133 SettingsManager]: * Dump automata to the following directory=/home/matthias/ultimate/dump/auto [2018-11-10 05:33:16,895 INFO L131 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2018-11-10 05:33:16,895 INFO L133 SettingsManager]: * TransformationType=MODULO_NEIGHBOR Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/working_dir_4b8fc6d8-f1f2-4752-b24c-26b6754cc212/bin-2019/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 446a3f39420f718ff3d1f0852398f1e5da972fdc [2018-11-10 05:33:16,917 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-11-10 05:33:16,926 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-11-10 05:33:16,929 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-11-10 05:33:16,930 INFO L271 PluginConnector]: Initializing CDTParser... [2018-11-10 05:33:16,930 INFO L276 PluginConnector]: CDTParser initialized [2018-11-10 05:33:16,931 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/working_dir_4b8fc6d8-f1f2-4752-b24c-26b6754cc212/bin-2019/uautomizer/../../sv-benchmarks/c/termination-restricted-15/NarrowKonv_false-termination_true-no-overflow.c [2018-11-10 05:33:16,969 INFO L218 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_4b8fc6d8-f1f2-4752-b24c-26b6754cc212/bin-2019/uautomizer/data/eb27287ba/f59198cb6f414c15a9bf33b7f6b2db9f/FLAG2e9a86c29 [2018-11-10 05:33:17,360 INFO L298 CDTParser]: Found 1 translation units. [2018-11-10 05:33:17,361 INFO L158 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/working_dir_4b8fc6d8-f1f2-4752-b24c-26b6754cc212/sv-benchmarks/c/termination-restricted-15/NarrowKonv_false-termination_true-no-overflow.c [2018-11-10 05:33:17,364 INFO L346 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_4b8fc6d8-f1f2-4752-b24c-26b6754cc212/bin-2019/uautomizer/data/eb27287ba/f59198cb6f414c15a9bf33b7f6b2db9f/FLAG2e9a86c29 [2018-11-10 05:33:17,375 INFO L354 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/working_dir_4b8fc6d8-f1f2-4752-b24c-26b6754cc212/bin-2019/uautomizer/data/eb27287ba/f59198cb6f414c15a9bf33b7f6b2db9f [2018-11-10 05:33:17,377 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-11-10 05:33:17,378 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2018-11-10 05:33:17,379 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-11-10 05:33:17,379 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-11-10 05:33:17,382 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-11-10 05:33:17,382 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 10.11 05:33:17" (1/1) ... [2018-11-10 05:33:17,384 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@62ca410a and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 05:33:17, skipping insertion in model container [2018-11-10 05:33:17,384 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 10.11 05:33:17" (1/1) ... [2018-11-10 05:33:17,390 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-11-10 05:33:17,405 INFO L174 MainTranslator]: Built tables and reachable declarations [2018-11-10 05:33:17,521 INFO L202 PostProcessor]: Analyzing one entry point: main [2018-11-10 05:33:17,523 INFO L189 MainTranslator]: Completed pre-run [2018-11-10 05:33:17,531 INFO L202 PostProcessor]: Analyzing one entry point: main [2018-11-10 05:33:17,539 INFO L193 MainTranslator]: Completed translation [2018-11-10 05:33:17,540 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 05:33:17 WrapperNode [2018-11-10 05:33:17,540 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-11-10 05:33:17,540 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-11-10 05:33:17,540 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-11-10 05:33:17,541 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-11-10 05:33:17,548 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 05:33:17" (1/1) ... [2018-11-10 05:33:17,552 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 05:33:17" (1/1) ... [2018-11-10 05:33:17,566 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-11-10 05:33:17,566 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-11-10 05:33:17,566 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-11-10 05:33:17,566 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-11-10 05:33:17,574 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 05:33:17" (1/1) ... [2018-11-10 05:33:17,574 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 05:33:17" (1/1) ... [2018-11-10 05:33:17,574 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 05:33:17" (1/1) ... [2018-11-10 05:33:17,575 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 05:33:17" (1/1) ... [2018-11-10 05:33:17,576 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 05:33:17" (1/1) ... [2018-11-10 05:33:17,579 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 05:33:17" (1/1) ... [2018-11-10 05:33:17,580 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 05:33:17" (1/1) ... [2018-11-10 05:33:17,581 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-11-10 05:33:17,581 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-11-10 05:33:17,581 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-11-10 05:33:17,581 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-11-10 05:33:17,582 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 05:33:17" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_4b8fc6d8-f1f2-4752-b24c-26b6754cc212/bin-2019/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2018-11-10 05:33:17,654 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-11-10 05:33:17,655 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-11-10 05:33:17,737 INFO L341 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-11-10 05:33:17,738 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 10.11 05:33:17 BoogieIcfgContainer [2018-11-10 05:33:17,738 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-11-10 05:33:17,738 INFO L113 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2018-11-10 05:33:17,738 INFO L271 PluginConnector]: Initializing BuchiAutomizer... [2018-11-10 05:33:17,740 INFO L276 PluginConnector]: BuchiAutomizer initialized [2018-11-10 05:33:17,741 INFO L102 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2018-11-10 05:33:17,741 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 10.11 05:33:17" (1/3) ... [2018-11-10 05:33:17,742 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@3c479b0c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 10.11 05:33:17, skipping insertion in model container [2018-11-10 05:33:17,742 INFO L102 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2018-11-10 05:33:17,742 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 05:33:17" (2/3) ... [2018-11-10 05:33:17,742 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@3c479b0c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 10.11 05:33:17, skipping insertion in model container [2018-11-10 05:33:17,742 INFO L102 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2018-11-10 05:33:17,742 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 10.11 05:33:17" (3/3) ... [2018-11-10 05:33:17,743 INFO L375 chiAutomizerObserver]: Analyzing ICFG NarrowKonv_false-termination_true-no-overflow.c [2018-11-10 05:33:17,785 INFO L135 ementStrategyFactory]: Using default assertion order modulation [2018-11-10 05:33:17,786 INFO L374 BuchiCegarLoop]: Interprodecural is true [2018-11-10 05:33:17,786 INFO L375 BuchiCegarLoop]: Hoare is false [2018-11-10 05:33:17,786 INFO L376 BuchiCegarLoop]: Compute interpolants for ForwardPredicates [2018-11-10 05:33:17,786 INFO L377 BuchiCegarLoop]: Backedges is STRAIGHT_LINE [2018-11-10 05:33:17,787 INFO L378 BuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-11-10 05:33:17,787 INFO L379 BuchiCegarLoop]: Difference is false [2018-11-10 05:33:17,787 INFO L380 BuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-11-10 05:33:17,787 INFO L383 BuchiCegarLoop]: ======== Iteration 0==of CEGAR loop == BuchiCegarLoop======== [2018-11-10 05:33:17,798 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 10 states. [2018-11-10 05:33:17,814 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2018-11-10 05:33:17,814 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2018-11-10 05:33:17,814 INFO L119 BuchiIsEmpty]: Starting construction of run [2018-11-10 05:33:17,820 INFO L866 BuchiCegarLoop]: Counterexample stem histogram [1, 1] [2018-11-10 05:33:17,820 INFO L867 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1] [2018-11-10 05:33:17,820 INFO L442 BuchiCegarLoop]: ======== Iteration 1============ [2018-11-10 05:33:17,821 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 10 states. [2018-11-10 05:33:17,821 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2018-11-10 05:33:17,821 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2018-11-10 05:33:17,821 INFO L119 BuchiIsEmpty]: Starting construction of run [2018-11-10 05:33:17,822 INFO L866 BuchiCegarLoop]: Counterexample stem histogram [1, 1] [2018-11-10 05:33:17,822 INFO L867 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1] [2018-11-10 05:33:17,828 INFO L793 eck$LassoCheckResult]: Stem: 5#ULTIMATE.startENTRYtrue assume { :begin_inline_ULTIMATE.init } true; 3#L-1true assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res;havoc main_#t~nondet0, main_~i~0, main_~range~0;havoc main_~i~0;havoc main_~range~0;main_~i~0 := main_#t~nondet0;havoc main_#t~nondet0;main_~range~0 := 20; 6#L12-1true [2018-11-10 05:33:17,828 INFO L795 eck$LassoCheckResult]: Loop: 6#L12-1true assume true; 4#L11-1true assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 8#L12true assume !!(0 == main_~i~0 && main_~i~0 == main_~range~0); 6#L12-1true [2018-11-10 05:33:17,833 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 05:33:17,833 INFO L82 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 1 times [2018-11-10 05:33:17,834 INFO L225 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-10 05:33:17,835 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-10 05:33:17,873 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:33:17,873 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 05:33:17,873 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:33:17,883 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-10 05:33:17,885 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-10 05:33:17,895 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 05:33:17,895 INFO L82 PathProgramCache]: Analyzing trace with hash 35952, now seen corresponding path program 1 times [2018-11-10 05:33:17,895 INFO L225 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-10 05:33:17,895 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-10 05:33:17,897 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:33:17,897 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 05:33:17,897 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:33:17,900 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-10 05:33:17,902 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-10 05:33:17,903 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 05:33:17,903 INFO L82 PathProgramCache]: Analyzing trace with hash 28694894, now seen corresponding path program 1 times [2018-11-10 05:33:17,903 INFO L225 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-10 05:33:17,903 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-10 05:33:17,904 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:33:17,904 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 05:33:17,905 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:33:17,909 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 05:33:17,954 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 05:33:17,955 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-10 05:33:17,955 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-11-10 05:33:17,991 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-10 05:33:17,991 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-10 05:33:17,992 INFO L87 Difference]: Start difference. First operand 10 states. Second operand 3 states. [2018-11-10 05:33:18,022 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 05:33:18,022 INFO L93 Difference]: Finished difference Result 18 states and 21 transitions. [2018-11-10 05:33:18,023 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-10 05:33:18,024 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 18 states and 21 transitions. [2018-11-10 05:33:18,025 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 8 [2018-11-10 05:33:18,028 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 18 states to 10 states and 13 transitions. [2018-11-10 05:33:18,029 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 10 [2018-11-10 05:33:18,029 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 10 [2018-11-10 05:33:18,029 INFO L73 IsDeterministic]: Start isDeterministic. Operand 10 states and 13 transitions. [2018-11-10 05:33:18,030 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2018-11-10 05:33:18,030 INFO L705 BuchiCegarLoop]: Abstraction has 10 states and 13 transitions. [2018-11-10 05:33:18,044 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10 states and 13 transitions. [2018-11-10 05:33:18,052 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10 to 10. [2018-11-10 05:33:18,053 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10 states. [2018-11-10 05:33:18,053 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10 states to 10 states and 13 transitions. [2018-11-10 05:33:18,054 INFO L728 BuchiCegarLoop]: Abstraction has 10 states and 13 transitions. [2018-11-10 05:33:18,054 INFO L608 BuchiCegarLoop]: Abstraction has 10 states and 13 transitions. [2018-11-10 05:33:18,054 INFO L442 BuchiCegarLoop]: ======== Iteration 2============ [2018-11-10 05:33:18,054 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 10 states and 13 transitions. [2018-11-10 05:33:18,055 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 8 [2018-11-10 05:33:18,055 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2018-11-10 05:33:18,055 INFO L119 BuchiIsEmpty]: Starting construction of run [2018-11-10 05:33:18,055 INFO L866 BuchiCegarLoop]: Counterexample stem histogram [1, 1] [2018-11-10 05:33:18,055 INFO L867 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2018-11-10 05:33:18,056 INFO L793 eck$LassoCheckResult]: Stem: 43#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true; 39#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res;havoc main_#t~nondet0, main_~i~0, main_~range~0;havoc main_~i~0;havoc main_~range~0;main_~i~0 := main_#t~nondet0;havoc main_#t~nondet0;main_~range~0 := 20; 40#L12-1 [2018-11-10 05:33:18,056 INFO L795 eck$LassoCheckResult]: Loop: 40#L12-1 assume true; 48#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 45#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 46#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 40#L12-1 [2018-11-10 05:33:18,056 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 05:33:18,056 INFO L82 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 2 times [2018-11-10 05:33:18,056 INFO L225 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-10 05:33:18,056 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-10 05:33:18,058 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:33:18,058 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 05:33:18,058 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:33:18,059 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-10 05:33:18,060 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-10 05:33:18,061 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 05:33:18,061 INFO L82 PathProgramCache]: Analyzing trace with hash 1114284, now seen corresponding path program 1 times [2018-11-10 05:33:18,061 INFO L225 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-10 05:33:18,061 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-10 05:33:18,061 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:33:18,062 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-10 05:33:18,062 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:33:18,064 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-10 05:33:18,066 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-10 05:33:18,066 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 05:33:18,067 INFO L82 PathProgramCache]: Analyzing trace with hash 889541486, now seen corresponding path program 1 times [2018-11-10 05:33:18,067 INFO L225 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-10 05:33:18,067 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-10 05:33:18,067 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:33:18,068 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 05:33:18,068 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:33:18,070 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-10 05:33:18,072 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-10 05:33:18,102 INFO L214 LassoAnalysis]: Preferences: [2018-11-10 05:33:18,103 INFO L124 ssoRankerPreferences]: Compute integeral hull: false [2018-11-10 05:33:18,103 INFO L125 ssoRankerPreferences]: Enable LassoPartitioneer: true [2018-11-10 05:33:18,103 INFO L126 ssoRankerPreferences]: Term annotations enabled: false [2018-11-10 05:33:18,103 INFO L127 ssoRankerPreferences]: Use exernal solver: true [2018-11-10 05:33:18,103 INFO L128 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2018-11-10 05:33:18,103 INFO L129 ssoRankerPreferences]: Dump SMT script to file: false [2018-11-10 05:33:18,104 INFO L130 ssoRankerPreferences]: Path of dumped script: [2018-11-10 05:33:18,104 INFO L131 ssoRankerPreferences]: Filename of dumped script: NarrowKonv_false-termination_true-no-overflow.c_Iteration2_Loop [2018-11-10 05:33:18,104 INFO L132 ssoRankerPreferences]: MapElimAlgo: Frank [2018-11-10 05:33:18,104 INFO L280 LassoAnalysis]: Starting lasso preprocessing... [2018-11-10 05:33:18,116 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-10 05:33:18,121 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-10 05:33:18,130 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-10 05:33:18,202 INFO L298 LassoAnalysis]: Preprocessing complete. [2018-11-10 05:33:18,203 INFO L410 LassoAnalysis]: Checking for nontermination... No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_4b8fc6d8-f1f2-4752-b24c-26b6754cc212/bin-2019/uautomizer/z3 Starting monitored process 2 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2018-11-10 05:33:18,223 INFO L151 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2018-11-10 05:33:18,223 INFO L163 nArgumentSynthesizer]: Using integer mode. [2018-11-10 05:33:18,248 INFO L443 LassoAnalysis]: Proved nontermination for one component. [2018-11-10 05:33:18,248 INFO L446 LassoAnalysis]: Non-Termination argument consisting of: Initial state: {v_rep~unnamed0~0~true_1=1} Honda state: {v_rep~unnamed0~0~true_1=1} Generalized eigenvectors: [] Lambdas: [] Nus: [] No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_4b8fc6d8-f1f2-4752-b24c-26b6754cc212/bin-2019/uautomizer/z3 Starting monitored process 3 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2018-11-10 05:33:18,255 INFO L151 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2018-11-10 05:33:18,255 INFO L163 nArgumentSynthesizer]: Using integer mode. [2018-11-10 05:33:18,272 INFO L443 LassoAnalysis]: Proved nontermination for one component. [2018-11-10 05:33:18,272 INFO L446 LassoAnalysis]: Non-Termination argument consisting of: Initial state: {v_rep~unnamed0~0~false_1=0} Honda state: {v_rep~unnamed0~0~false_1=0} Generalized eigenvectors: [] Lambdas: [] Nus: [] No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_4b8fc6d8-f1f2-4752-b24c-26b6754cc212/bin-2019/uautomizer/z3 Starting monitored process 4 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2018-11-10 05:33:18,276 INFO L151 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2018-11-10 05:33:18,276 INFO L163 nArgumentSynthesizer]: Using integer mode. No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_4b8fc6d8-f1f2-4752-b24c-26b6754cc212/bin-2019/uautomizer/z3 Starting monitored process 5 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2018-11-10 05:33:18,312 INFO L151 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 3 Nilpotent components: true [2018-11-10 05:33:18,312 INFO L163 nArgumentSynthesizer]: Using integer mode. [2018-11-10 05:33:18,345 INFO L450 LassoAnalysis]: Proving nontermination failed: No geometric nontermination argument exists. [2018-11-10 05:33:18,347 INFO L214 LassoAnalysis]: Preferences: [2018-11-10 05:33:18,347 INFO L124 ssoRankerPreferences]: Compute integeral hull: false [2018-11-10 05:33:18,347 INFO L125 ssoRankerPreferences]: Enable LassoPartitioneer: true [2018-11-10 05:33:18,347 INFO L126 ssoRankerPreferences]: Term annotations enabled: false [2018-11-10 05:33:18,347 INFO L127 ssoRankerPreferences]: Use exernal solver: false [2018-11-10 05:33:18,347 INFO L128 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2018-11-10 05:33:18,347 INFO L129 ssoRankerPreferences]: Dump SMT script to file: false [2018-11-10 05:33:18,347 INFO L130 ssoRankerPreferences]: Path of dumped script: [2018-11-10 05:33:18,347 INFO L131 ssoRankerPreferences]: Filename of dumped script: NarrowKonv_false-termination_true-no-overflow.c_Iteration2_Loop [2018-11-10 05:33:18,347 INFO L132 ssoRankerPreferences]: MapElimAlgo: Frank [2018-11-10 05:33:18,347 INFO L280 LassoAnalysis]: Starting lasso preprocessing... [2018-11-10 05:33:18,349 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-10 05:33:18,355 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-10 05:33:18,358 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-10 05:33:18,408 INFO L298 LassoAnalysis]: Preprocessing complete. [2018-11-10 05:33:18,412 INFO L496 LassoAnalysis]: Using template 'affine'. [2018-11-10 05:33:18,413 INFO L122 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSES Number of strict supporting invariants: 0 Number of non-strict supporting invariants: 1 Consider only non-deceasing supporting invariants: true Simplify termination arguments: true Simplify supporting invariants: trueOverapproximate stem: false [2018-11-10 05:33:18,414 INFO L339 nArgumentSynthesizer]: Template has degree 0. [2018-11-10 05:33:18,414 INFO L205 nArgumentSynthesizer]: 1 stem disjuncts [2018-11-10 05:33:18,414 INFO L206 nArgumentSynthesizer]: 1 loop disjuncts [2018-11-10 05:33:18,415 INFO L207 nArgumentSynthesizer]: 2 template conjuncts. [2018-11-10 05:33:18,418 INFO L402 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2018-11-10 05:33:18,418 INFO L403 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2018-11-10 05:33:18,424 INFO L529 LassoAnalysis]: Proving termination failed for this template and these settings. [2018-11-10 05:33:18,424 INFO L122 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSES Number of strict supporting invariants: 0 Number of non-strict supporting invariants: 1 Consider only non-deceasing supporting invariants: true Simplify termination arguments: true Simplify supporting invariants: trueOverapproximate stem: false [2018-11-10 05:33:18,425 INFO L339 nArgumentSynthesizer]: Template has degree 0. [2018-11-10 05:33:18,425 INFO L205 nArgumentSynthesizer]: 1 stem disjuncts [2018-11-10 05:33:18,425 INFO L206 nArgumentSynthesizer]: 1 loop disjuncts [2018-11-10 05:33:18,425 INFO L207 nArgumentSynthesizer]: 2 template conjuncts. [2018-11-10 05:33:18,427 INFO L402 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2018-11-10 05:33:18,427 INFO L403 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2018-11-10 05:33:18,436 INFO L529 LassoAnalysis]: Proving termination failed for this template and these settings. [2018-11-10 05:33:18,436 INFO L122 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSES Number of strict supporting invariants: 0 Number of non-strict supporting invariants: 1 Consider only non-deceasing supporting invariants: true Simplify termination arguments: true Simplify supporting invariants: trueOverapproximate stem: false [2018-11-10 05:33:18,437 INFO L339 nArgumentSynthesizer]: Template has degree 0. [2018-11-10 05:33:18,437 INFO L352 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2018-11-10 05:33:18,437 INFO L205 nArgumentSynthesizer]: 1 stem disjuncts [2018-11-10 05:33:18,437 INFO L206 nArgumentSynthesizer]: 1 loop disjuncts [2018-11-10 05:33:18,437 INFO L207 nArgumentSynthesizer]: 2 template conjuncts. [2018-11-10 05:33:18,438 INFO L402 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2018-11-10 05:33:18,438 INFO L403 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2018-11-10 05:33:18,443 INFO L421 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2018-11-10 05:33:18,450 INFO L443 ModelExtractionUtils]: Simplification made 4 calls to the SMT solver. [2018-11-10 05:33:18,450 INFO L444 ModelExtractionUtils]: 0 out of 4 variables were initially zero. Simplification set additionally 1 variables to zero. [2018-11-10 05:33:18,451 INFO L437 nArgumentSynthesizer]: Simplifying supporting invariants... [2018-11-10 05:33:18,452 INFO L440 nArgumentSynthesizer]: Removed 0 redundant supporting invariants from a total of 0. [2018-11-10 05:33:18,452 INFO L517 LassoAnalysis]: Proved termination. [2018-11-10 05:33:18,452 INFO L519 LassoAnalysis]: Termination argument consisting of: Ranking function f(ULTIMATE.start_main_~i~0, ULTIMATE.start_main_~range~0) = -1*ULTIMATE.start_main_~i~0 + 1*ULTIMATE.start_main_~range~0 Supporting invariants [] [2018-11-10 05:33:18,453 INFO L297 tatePredicateManager]: 0 out of 0 supporting invariants were superfluous and have been removed [2018-11-10 05:33:18,470 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 05:33:18,475 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 05:33:18,477 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 05:33:18,490 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 05:33:18,491 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 05:33:18,502 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 05:33:18,504 INFO L152 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.1 stem predicates 2 loop predicates [2018-11-10 05:33:18,505 INFO L72 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand 10 states and 13 transitions. cyclomatic complexity: 5 Second operand 4 states. [2018-11-10 05:33:18,526 INFO L76 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand 10 states and 13 transitions. cyclomatic complexity: 5. Second operand 4 states. Result 14 states and 18 transitions. Complement of second has 7 states. [2018-11-10 05:33:18,526 INFO L142 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 4 states 1 stem states 2 non-accepting loop states 1 accepting loop states [2018-11-10 05:33:18,527 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4 states. [2018-11-10 05:33:18,527 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 6 transitions. [2018-11-10 05:33:18,528 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 4 states and 6 transitions. Stem has 2 letters. Loop has 4 letters. [2018-11-10 05:33:18,528 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2018-11-10 05:33:18,528 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 4 states and 6 transitions. Stem has 6 letters. Loop has 4 letters. [2018-11-10 05:33:18,529 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2018-11-10 05:33:18,529 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 4 states and 6 transitions. Stem has 2 letters. Loop has 8 letters. [2018-11-10 05:33:18,529 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2018-11-10 05:33:18,529 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 14 states and 18 transitions. [2018-11-10 05:33:18,529 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2018-11-10 05:33:18,530 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 14 states to 14 states and 18 transitions. [2018-11-10 05:33:18,530 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 9 [2018-11-10 05:33:18,530 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 10 [2018-11-10 05:33:18,530 INFO L73 IsDeterministic]: Start isDeterministic. Operand 14 states and 18 transitions. [2018-11-10 05:33:18,530 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2018-11-10 05:33:18,530 INFO L705 BuchiCegarLoop]: Abstraction has 14 states and 18 transitions. [2018-11-10 05:33:18,530 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14 states and 18 transitions. [2018-11-10 05:33:18,531 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14 to 14. [2018-11-10 05:33:18,531 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14 states. [2018-11-10 05:33:18,531 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14 states to 14 states and 18 transitions. [2018-11-10 05:33:18,531 INFO L728 BuchiCegarLoop]: Abstraction has 14 states and 18 transitions. [2018-11-10 05:33:18,531 INFO L608 BuchiCegarLoop]: Abstraction has 14 states and 18 transitions. [2018-11-10 05:33:18,531 INFO L442 BuchiCegarLoop]: ======== Iteration 3============ [2018-11-10 05:33:18,532 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 14 states and 18 transitions. [2018-11-10 05:33:18,532 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2018-11-10 05:33:18,532 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2018-11-10 05:33:18,532 INFO L119 BuchiIsEmpty]: Starting construction of run [2018-11-10 05:33:18,532 INFO L866 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1] [2018-11-10 05:33:18,532 INFO L867 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1] [2018-11-10 05:33:18,532 INFO L793 eck$LassoCheckResult]: Stem: 111#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true; 105#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res;havoc main_#t~nondet0, main_~i~0, main_~range~0;havoc main_~i~0;havoc main_~range~0;main_~i~0 := main_#t~nondet0;havoc main_#t~nondet0;main_~range~0 := 20; 106#L12-1 assume true; 107#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 108#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 115#L13 assume main_~i~0 == main_~range~0;main_~i~0 := 0;main_~range~0 := main_~range~0 - 1; 112#L12-1 [2018-11-10 05:33:18,533 INFO L795 eck$LassoCheckResult]: Loop: 112#L12-1 assume true; 113#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 118#L12 assume !!(0 == main_~i~0 && main_~i~0 == main_~range~0); 112#L12-1 [2018-11-10 05:33:18,533 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 05:33:18,533 INFO L82 PathProgramCache]: Analyzing trace with hash 889541484, now seen corresponding path program 1 times [2018-11-10 05:33:18,533 INFO L225 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-10 05:33:18,533 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-10 05:33:18,534 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:33:18,534 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 05:33:18,534 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:33:18,537 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-10 05:33:18,539 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-10 05:33:18,540 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 05:33:18,540 INFO L82 PathProgramCache]: Analyzing trace with hash 35952, now seen corresponding path program 2 times [2018-11-10 05:33:18,540 INFO L225 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-10 05:33:18,541 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-10 05:33:18,542 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:33:18,542 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 05:33:18,542 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:33:18,543 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-10 05:33:18,545 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-10 05:33:18,545 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 05:33:18,546 INFO L82 PathProgramCache]: Analyzing trace with hash 382139685, now seen corresponding path program 1 times [2018-11-10 05:33:18,546 INFO L225 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-10 05:33:18,546 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-10 05:33:18,547 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:33:18,547 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-10 05:33:18,547 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:33:18,550 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 05:33:18,568 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 05:33:18,568 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-10 05:33:18,568 INFO L225 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_4b8fc6d8-f1f2-4752-b24c-26b6754cc212/bin-2019/uautomizer/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-10 05:33:18,574 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 05:33:18,578 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 05:33:18,579 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 05:33:18,590 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 05:33:18,605 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-10 05:33:18,605 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [3, 3] total 4 [2018-11-10 05:33:18,613 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-10 05:33:18,613 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2018-11-10 05:33:18,613 INFO L87 Difference]: Start difference. First operand 14 states and 18 transitions. cyclomatic complexity: 6 Second operand 5 states. [2018-11-10 05:33:18,642 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 05:33:18,642 INFO L93 Difference]: Finished difference Result 18 states and 22 transitions. [2018-11-10 05:33:18,642 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-10 05:33:18,642 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 18 states and 22 transitions. [2018-11-10 05:33:18,643 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2018-11-10 05:33:18,643 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 18 states to 18 states and 22 transitions. [2018-11-10 05:33:18,643 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 14 [2018-11-10 05:33:18,643 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 14 [2018-11-10 05:33:18,644 INFO L73 IsDeterministic]: Start isDeterministic. Operand 18 states and 22 transitions. [2018-11-10 05:33:18,644 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2018-11-10 05:33:18,644 INFO L705 BuchiCegarLoop]: Abstraction has 18 states and 22 transitions. [2018-11-10 05:33:18,644 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18 states and 22 transitions. [2018-11-10 05:33:18,645 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18 to 18. [2018-11-10 05:33:18,645 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18 states. [2018-11-10 05:33:18,645 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18 states to 18 states and 22 transitions. [2018-11-10 05:33:18,645 INFO L728 BuchiCegarLoop]: Abstraction has 18 states and 22 transitions. [2018-11-10 05:33:18,645 INFO L608 BuchiCegarLoop]: Abstraction has 18 states and 22 transitions. [2018-11-10 05:33:18,645 INFO L442 BuchiCegarLoop]: ======== Iteration 4============ [2018-11-10 05:33:18,646 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 18 states and 22 transitions. [2018-11-10 05:33:18,646 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2018-11-10 05:33:18,646 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2018-11-10 05:33:18,646 INFO L119 BuchiIsEmpty]: Starting construction of run [2018-11-10 05:33:18,646 INFO L866 BuchiCegarLoop]: Counterexample stem histogram [2, 2, 2, 1, 1, 1, 1] [2018-11-10 05:33:18,646 INFO L867 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1] [2018-11-10 05:33:18,647 INFO L793 eck$LassoCheckResult]: Stem: 177#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true; 171#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res;havoc main_#t~nondet0, main_~i~0, main_~range~0;havoc main_~i~0;havoc main_~range~0;main_~i~0 := main_#t~nondet0;havoc main_#t~nondet0;main_~range~0 := 20; 172#L12-1 assume true; 180#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 181#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 182#L13 assume main_~i~0 == main_~range~0;main_~i~0 := 0;main_~range~0 := main_~range~0 - 1; 185#L12-1 assume true; 188#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 187#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 184#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 178#L12-1 [2018-11-10 05:33:18,647 INFO L795 eck$LassoCheckResult]: Loop: 178#L12-1 assume true; 173#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 174#L12 assume !!(0 == main_~i~0 && main_~i~0 == main_~range~0); 178#L12-1 [2018-11-10 05:33:18,647 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 05:33:18,647 INFO L82 PathProgramCache]: Analyzing trace with hash -1038571881, now seen corresponding path program 1 times [2018-11-10 05:33:18,647 INFO L225 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-10 05:33:18,647 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-10 05:33:18,648 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:33:18,648 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 05:33:18,648 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:33:18,651 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-10 05:33:18,654 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-10 05:33:18,655 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 05:33:18,655 INFO L82 PathProgramCache]: Analyzing trace with hash 35952, now seen corresponding path program 3 times [2018-11-10 05:33:18,655 INFO L225 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-10 05:33:18,655 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-10 05:33:18,656 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:33:18,656 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 05:33:18,657 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:33:18,658 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-10 05:33:18,659 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-10 05:33:18,660 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 05:33:18,660 INFO L82 PathProgramCache]: Analyzing trace with hash 849499674, now seen corresponding path program 1 times [2018-11-10 05:33:18,660 INFO L225 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-10 05:33:18,660 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-10 05:33:18,661 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:33:18,661 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-10 05:33:18,661 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:33:18,664 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 05:33:18,682 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 7 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 05:33:18,682 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-10 05:33:18,682 INFO L225 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_4b8fc6d8-f1f2-4752-b24c-26b6754cc212/bin-2019/uautomizer/z3 Starting monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-10 05:33:18,688 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 05:33:18,693 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 05:33:18,694 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 05:33:18,696 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 10 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 05:33:18,711 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-11-10 05:33:18,711 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [4] total 4 [2018-11-10 05:33:18,724 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-10 05:33:18,724 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-10 05:33:18,724 INFO L87 Difference]: Start difference. First operand 18 states and 22 transitions. cyclomatic complexity: 6 Second operand 5 states. [2018-11-10 05:33:18,741 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 05:33:18,742 INFO L93 Difference]: Finished difference Result 28 states and 33 transitions. [2018-11-10 05:33:18,742 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-10 05:33:18,742 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 28 states and 33 transitions. [2018-11-10 05:33:18,743 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 8 [2018-11-10 05:33:18,744 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 28 states to 28 states and 33 transitions. [2018-11-10 05:33:18,744 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 21 [2018-11-10 05:33:18,744 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 21 [2018-11-10 05:33:18,744 INFO L73 IsDeterministic]: Start isDeterministic. Operand 28 states and 33 transitions. [2018-11-10 05:33:18,744 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2018-11-10 05:33:18,745 INFO L705 BuchiCegarLoop]: Abstraction has 28 states and 33 transitions. [2018-11-10 05:33:18,745 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28 states and 33 transitions. [2018-11-10 05:33:18,746 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28 to 21. [2018-11-10 05:33:18,746 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21 states. [2018-11-10 05:33:18,746 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21 states to 21 states and 25 transitions. [2018-11-10 05:33:18,746 INFO L728 BuchiCegarLoop]: Abstraction has 21 states and 25 transitions. [2018-11-10 05:33:18,746 INFO L608 BuchiCegarLoop]: Abstraction has 21 states and 25 transitions. [2018-11-10 05:33:18,746 INFO L442 BuchiCegarLoop]: ======== Iteration 5============ [2018-11-10 05:33:18,747 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 21 states and 25 transitions. [2018-11-10 05:33:18,747 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 7 [2018-11-10 05:33:18,747 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2018-11-10 05:33:18,747 INFO L119 BuchiIsEmpty]: Starting construction of run [2018-11-10 05:33:18,748 INFO L866 BuchiCegarLoop]: Counterexample stem histogram [2, 2, 2, 1, 1, 1, 1] [2018-11-10 05:33:18,748 INFO L867 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2018-11-10 05:33:18,748 INFO L793 eck$LassoCheckResult]: Stem: 269#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true; 263#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res;havoc main_#t~nondet0, main_~i~0, main_~range~0;havoc main_~i~0;havoc main_~range~0;main_~i~0 := main_#t~nondet0;havoc main_#t~nondet0;main_~range~0 := 20; 264#L12-1 assume true; 265#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 266#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 277#L13 assume main_~i~0 == main_~range~0;main_~i~0 := 0;main_~range~0 := main_~range~0 - 1; 278#L12-1 assume true; 283#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 282#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 276#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 270#L12-1 [2018-11-10 05:33:18,748 INFO L795 eck$LassoCheckResult]: Loop: 270#L12-1 assume true; 271#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 273#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 274#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 270#L12-1 [2018-11-10 05:33:18,748 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 05:33:18,748 INFO L82 PathProgramCache]: Analyzing trace with hash -1038571881, now seen corresponding path program 2 times [2018-11-10 05:33:18,748 INFO L225 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-10 05:33:18,749 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-10 05:33:18,749 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:33:18,750 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 05:33:18,750 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:33:18,752 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-10 05:33:18,754 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-10 05:33:18,756 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 05:33:18,756 INFO L82 PathProgramCache]: Analyzing trace with hash 1114284, now seen corresponding path program 2 times [2018-11-10 05:33:18,756 INFO L225 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-10 05:33:18,756 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-10 05:33:18,757 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:33:18,757 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-10 05:33:18,757 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:33:18,759 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-10 05:33:18,760 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-10 05:33:18,761 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 05:33:18,762 INFO L82 PathProgramCache]: Analyzing trace with hash 564685890, now seen corresponding path program 3 times [2018-11-10 05:33:18,762 INFO L225 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-10 05:33:18,762 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-10 05:33:18,763 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:33:18,763 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-10 05:33:18,763 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:33:18,766 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-10 05:33:18,769 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-10 05:33:18,797 INFO L214 LassoAnalysis]: Preferences: [2018-11-10 05:33:18,797 INFO L124 ssoRankerPreferences]: Compute integeral hull: false [2018-11-10 05:33:18,798 INFO L125 ssoRankerPreferences]: Enable LassoPartitioneer: true [2018-11-10 05:33:18,798 INFO L126 ssoRankerPreferences]: Term annotations enabled: false [2018-11-10 05:33:18,798 INFO L127 ssoRankerPreferences]: Use exernal solver: true [2018-11-10 05:33:18,798 INFO L128 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2018-11-10 05:33:18,798 INFO L129 ssoRankerPreferences]: Dump SMT script to file: false [2018-11-10 05:33:18,798 INFO L130 ssoRankerPreferences]: Path of dumped script: [2018-11-10 05:33:18,798 INFO L131 ssoRankerPreferences]: Filename of dumped script: NarrowKonv_false-termination_true-no-overflow.c_Iteration5_Loop [2018-11-10 05:33:18,798 INFO L132 ssoRankerPreferences]: MapElimAlgo: Frank [2018-11-10 05:33:18,798 INFO L280 LassoAnalysis]: Starting lasso preprocessing... [2018-11-10 05:33:18,799 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-10 05:33:18,802 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-10 05:33:18,804 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-10 05:33:18,844 INFO L298 LassoAnalysis]: Preprocessing complete. [2018-11-10 05:33:18,844 INFO L410 LassoAnalysis]: Checking for nontermination... No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_4b8fc6d8-f1f2-4752-b24c-26b6754cc212/bin-2019/uautomizer/z3 Starting monitored process 8 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2018-11-10 05:33:18,846 INFO L151 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2018-11-10 05:33:18,846 INFO L163 nArgumentSynthesizer]: Using integer mode. [2018-11-10 05:33:18,863 INFO L443 LassoAnalysis]: Proved nontermination for one component. [2018-11-10 05:33:18,863 INFO L446 LassoAnalysis]: Non-Termination argument consisting of: Initial state: {v_rep~unnamed0~0~false_3=0} Honda state: {v_rep~unnamed0~0~false_3=0} Generalized eigenvectors: [] Lambdas: [] Nus: [] No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_4b8fc6d8-f1f2-4752-b24c-26b6754cc212/bin-2019/uautomizer/z3 Starting monitored process 9 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2018-11-10 05:33:18,867 INFO L151 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2018-11-10 05:33:18,867 INFO L163 nArgumentSynthesizer]: Using integer mode. [2018-11-10 05:33:18,892 INFO L443 LassoAnalysis]: Proved nontermination for one component. [2018-11-10 05:33:18,892 INFO L446 LassoAnalysis]: Non-Termination argument consisting of: Initial state: {v_rep~unnamed0~0~true_3=1} Honda state: {v_rep~unnamed0~0~true_3=1} Generalized eigenvectors: [] Lambdas: [] Nus: [] No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_4b8fc6d8-f1f2-4752-b24c-26b6754cc212/bin-2019/uautomizer/z3 Starting monitored process 10 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2018-11-10 05:33:18,895 INFO L151 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2018-11-10 05:33:18,895 INFO L163 nArgumentSynthesizer]: Using integer mode. No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_4b8fc6d8-f1f2-4752-b24c-26b6754cc212/bin-2019/uautomizer/z3 Starting monitored process 11 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2018-11-10 05:33:18,913 INFO L151 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 3 Nilpotent components: true [2018-11-10 05:33:18,913 INFO L163 nArgumentSynthesizer]: Using integer mode. [2018-11-10 05:33:18,946 INFO L450 LassoAnalysis]: Proving nontermination failed: No geometric nontermination argument exists. [2018-11-10 05:33:18,947 INFO L214 LassoAnalysis]: Preferences: [2018-11-10 05:33:18,947 INFO L124 ssoRankerPreferences]: Compute integeral hull: false [2018-11-10 05:33:18,947 INFO L125 ssoRankerPreferences]: Enable LassoPartitioneer: true [2018-11-10 05:33:18,947 INFO L126 ssoRankerPreferences]: Term annotations enabled: false [2018-11-10 05:33:18,947 INFO L127 ssoRankerPreferences]: Use exernal solver: false [2018-11-10 05:33:18,948 INFO L128 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2018-11-10 05:33:18,948 INFO L129 ssoRankerPreferences]: Dump SMT script to file: false [2018-11-10 05:33:18,948 INFO L130 ssoRankerPreferences]: Path of dumped script: [2018-11-10 05:33:18,948 INFO L131 ssoRankerPreferences]: Filename of dumped script: NarrowKonv_false-termination_true-no-overflow.c_Iteration5_Loop [2018-11-10 05:33:18,948 INFO L132 ssoRankerPreferences]: MapElimAlgo: Frank [2018-11-10 05:33:18,948 INFO L280 LassoAnalysis]: Starting lasso preprocessing... [2018-11-10 05:33:18,949 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-10 05:33:18,951 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-10 05:33:18,953 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-10 05:33:18,995 INFO L298 LassoAnalysis]: Preprocessing complete. [2018-11-10 05:33:18,995 INFO L496 LassoAnalysis]: Using template 'affine'. [2018-11-10 05:33:18,996 INFO L122 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSES Number of strict supporting invariants: 0 Number of non-strict supporting invariants: 1 Consider only non-deceasing supporting invariants: true Simplify termination arguments: true Simplify supporting invariants: trueOverapproximate stem: false [2018-11-10 05:33:18,996 INFO L339 nArgumentSynthesizer]: Template has degree 0. [2018-11-10 05:33:18,996 INFO L205 nArgumentSynthesizer]: 1 stem disjuncts [2018-11-10 05:33:18,997 INFO L206 nArgumentSynthesizer]: 1 loop disjuncts [2018-11-10 05:33:18,997 INFO L207 nArgumentSynthesizer]: 2 template conjuncts. [2018-11-10 05:33:18,998 INFO L402 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2018-11-10 05:33:18,998 INFO L403 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2018-11-10 05:33:18,999 INFO L529 LassoAnalysis]: Proving termination failed for this template and these settings. [2018-11-10 05:33:19,000 INFO L122 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSES Number of strict supporting invariants: 0 Number of non-strict supporting invariants: 1 Consider only non-deceasing supporting invariants: true Simplify termination arguments: true Simplify supporting invariants: trueOverapproximate stem: false [2018-11-10 05:33:19,000 INFO L339 nArgumentSynthesizer]: Template has degree 0. [2018-11-10 05:33:19,000 INFO L205 nArgumentSynthesizer]: 1 stem disjuncts [2018-11-10 05:33:19,000 INFO L206 nArgumentSynthesizer]: 1 loop disjuncts [2018-11-10 05:33:19,000 INFO L207 nArgumentSynthesizer]: 2 template conjuncts. [2018-11-10 05:33:19,002 INFO L402 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2018-11-10 05:33:19,002 INFO L403 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2018-11-10 05:33:19,006 INFO L529 LassoAnalysis]: Proving termination failed for this template and these settings. [2018-11-10 05:33:19,006 INFO L122 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSES Number of strict supporting invariants: 0 Number of non-strict supporting invariants: 1 Consider only non-deceasing supporting invariants: true Simplify termination arguments: true Simplify supporting invariants: trueOverapproximate stem: false [2018-11-10 05:33:19,007 INFO L339 nArgumentSynthesizer]: Template has degree 0. [2018-11-10 05:33:19,007 INFO L352 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2018-11-10 05:33:19,007 INFO L205 nArgumentSynthesizer]: 1 stem disjuncts [2018-11-10 05:33:19,007 INFO L206 nArgumentSynthesizer]: 1 loop disjuncts [2018-11-10 05:33:19,007 INFO L207 nArgumentSynthesizer]: 2 template conjuncts. [2018-11-10 05:33:19,008 INFO L402 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2018-11-10 05:33:19,008 INFO L403 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2018-11-10 05:33:19,011 INFO L421 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2018-11-10 05:33:19,013 INFO L443 ModelExtractionUtils]: Simplification made 3 calls to the SMT solver. [2018-11-10 05:33:19,013 INFO L444 ModelExtractionUtils]: 0 out of 4 variables were initially zero. Simplification set additionally 1 variables to zero. [2018-11-10 05:33:19,014 INFO L437 nArgumentSynthesizer]: Simplifying supporting invariants... [2018-11-10 05:33:19,014 INFO L440 nArgumentSynthesizer]: Removed 0 redundant supporting invariants from a total of 0. [2018-11-10 05:33:19,014 INFO L517 LassoAnalysis]: Proved termination. [2018-11-10 05:33:19,017 INFO L519 LassoAnalysis]: Termination argument consisting of: Ranking function f(ULTIMATE.start_main_~range~0, ULTIMATE.start_main_~i~0) = 1*ULTIMATE.start_main_~range~0 - 1*ULTIMATE.start_main_~i~0 Supporting invariants [] [2018-11-10 05:33:19,018 INFO L297 tatePredicateManager]: 0 out of 0 supporting invariants were superfluous and have been removed [2018-11-10 05:33:19,051 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 05:33:19,056 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 05:33:19,057 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 05:33:19,060 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 05:33:19,061 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 05:33:19,068 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 05:33:19,068 INFO L152 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.1 stem predicates 2 loop predicates [2018-11-10 05:33:19,069 INFO L72 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand 21 states and 25 transitions. cyclomatic complexity: 6 Second operand 4 states. [2018-11-10 05:33:19,084 INFO L76 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand 21 states and 25 transitions. cyclomatic complexity: 6. Second operand 4 states. Result 45 states and 51 transitions. Complement of second has 7 states. [2018-11-10 05:33:19,085 INFO L142 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 4 states 1 stem states 2 non-accepting loop states 1 accepting loop states [2018-11-10 05:33:19,085 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4 states. [2018-11-10 05:33:19,085 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 11 transitions. [2018-11-10 05:33:19,086 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 4 states and 11 transitions. Stem has 10 letters. Loop has 4 letters. [2018-11-10 05:33:19,086 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2018-11-10 05:33:19,086 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 4 states and 11 transitions. Stem has 14 letters. Loop has 4 letters. [2018-11-10 05:33:19,087 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2018-11-10 05:33:19,087 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 4 states and 11 transitions. Stem has 10 letters. Loop has 8 letters. [2018-11-10 05:33:19,087 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2018-11-10 05:33:19,087 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 45 states and 51 transitions. [2018-11-10 05:33:19,089 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 7 [2018-11-10 05:33:19,090 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 45 states to 39 states and 45 transitions. [2018-11-10 05:33:19,090 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 27 [2018-11-10 05:33:19,090 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 28 [2018-11-10 05:33:19,091 INFO L73 IsDeterministic]: Start isDeterministic. Operand 39 states and 45 transitions. [2018-11-10 05:33:19,091 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2018-11-10 05:33:19,091 INFO L705 BuchiCegarLoop]: Abstraction has 39 states and 45 transitions. [2018-11-10 05:33:19,091 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 39 states and 45 transitions. [2018-11-10 05:33:19,093 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 39 to 36. [2018-11-10 05:33:19,093 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 36 states. [2018-11-10 05:33:19,093 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 36 states to 36 states and 42 transitions. [2018-11-10 05:33:19,093 INFO L728 BuchiCegarLoop]: Abstraction has 36 states and 42 transitions. [2018-11-10 05:33:19,094 INFO L608 BuchiCegarLoop]: Abstraction has 36 states and 42 transitions. [2018-11-10 05:33:19,094 INFO L442 BuchiCegarLoop]: ======== Iteration 6============ [2018-11-10 05:33:19,094 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 36 states and 42 transitions. [2018-11-10 05:33:19,096 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 7 [2018-11-10 05:33:19,096 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2018-11-10 05:33:19,096 INFO L119 BuchiIsEmpty]: Starting construction of run [2018-11-10 05:33:19,097 INFO L866 BuchiCegarLoop]: Counterexample stem histogram [3, 3, 3, 2, 1, 1, 1] [2018-11-10 05:33:19,097 INFO L867 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1] [2018-11-10 05:33:19,097 INFO L793 eck$LassoCheckResult]: Stem: 401#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true; 395#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res;havoc main_#t~nondet0, main_~i~0, main_~range~0;havoc main_~i~0;havoc main_~range~0;main_~i~0 := main_#t~nondet0;havoc main_#t~nondet0;main_~range~0 := 20; 396#L12-1 assume true; 419#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 418#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 417#L13 assume main_~i~0 == main_~range~0;main_~i~0 := 0;main_~range~0 := main_~range~0 - 1; 416#L12-1 assume true; 415#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 414#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 413#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 412#L12-1 assume true; 405#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 406#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 407#L13 assume main_~i~0 == main_~range~0;main_~i~0 := 0;main_~range~0 := main_~range~0 - 1; 402#L12-1 [2018-11-10 05:33:19,097 INFO L795 eck$LassoCheckResult]: Loop: 402#L12-1 assume true; 397#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 398#L12 assume !!(0 == main_~i~0 && main_~i~0 == main_~range~0); 402#L12-1 [2018-11-10 05:33:19,097 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 05:33:19,097 INFO L82 PathProgramCache]: Analyzing trace with hash 564685888, now seen corresponding path program 4 times [2018-11-10 05:33:19,097 INFO L225 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-10 05:33:19,097 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-10 05:33:19,098 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:33:19,099 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-10 05:33:19,099 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:33:19,102 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 05:33:19,149 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 05:33:19,149 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-10 05:33:19,149 INFO L225 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_4b8fc6d8-f1f2-4752-b24c-26b6754cc212/bin-2019/uautomizer/z3 Starting monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-10 05:33:19,156 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-11-10 05:33:19,162 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-11-10 05:33:19,163 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-10 05:33:19,163 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 05:33:19,178 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 05:33:19,193 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-10 05:33:19,194 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 4] total 8 [2018-11-10 05:33:19,194 INFO L798 eck$LassoCheckResult]: stem already infeasible [2018-11-10 05:33:19,194 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 05:33:19,194 INFO L82 PathProgramCache]: Analyzing trace with hash 35952, now seen corresponding path program 4 times [2018-11-10 05:33:19,194 INFO L225 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-10 05:33:19,194 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-10 05:33:19,195 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:33:19,195 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-10 05:33:19,195 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:33:19,196 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-10 05:33:19,197 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-10 05:33:19,216 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-11-10 05:33:19,216 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=29, Invalid=43, Unknown=0, NotChecked=0, Total=72 [2018-11-10 05:33:19,217 INFO L87 Difference]: Start difference. First operand 36 states and 42 transitions. cyclomatic complexity: 9 Second operand 9 states. [2018-11-10 05:33:19,247 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 05:33:19,247 INFO L93 Difference]: Finished difference Result 57 states and 62 transitions. [2018-11-10 05:33:19,247 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-11-10 05:33:19,248 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 57 states and 62 transitions. [2018-11-10 05:33:19,249 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 7 [2018-11-10 05:33:19,249 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 57 states to 51 states and 56 transitions. [2018-11-10 05:33:19,249 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 36 [2018-11-10 05:33:19,249 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 36 [2018-11-10 05:33:19,250 INFO L73 IsDeterministic]: Start isDeterministic. Operand 51 states and 56 transitions. [2018-11-10 05:33:19,250 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2018-11-10 05:33:19,250 INFO L705 BuchiCegarLoop]: Abstraction has 51 states and 56 transitions. [2018-11-10 05:33:19,250 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 51 states and 56 transitions. [2018-11-10 05:33:19,251 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 51 to 48. [2018-11-10 05:33:19,252 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 48 states. [2018-11-10 05:33:19,252 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 48 states to 48 states and 53 transitions. [2018-11-10 05:33:19,252 INFO L728 BuchiCegarLoop]: Abstraction has 48 states and 53 transitions. [2018-11-10 05:33:19,252 INFO L608 BuchiCegarLoop]: Abstraction has 48 states and 53 transitions. [2018-11-10 05:33:19,252 INFO L442 BuchiCegarLoop]: ======== Iteration 7============ [2018-11-10 05:33:19,252 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 48 states and 53 transitions. [2018-11-10 05:33:19,253 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 7 [2018-11-10 05:33:19,253 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2018-11-10 05:33:19,253 INFO L119 BuchiIsEmpty]: Starting construction of run [2018-11-10 05:33:19,254 INFO L866 BuchiCegarLoop]: Counterexample stem histogram [5, 5, 5, 3, 2, 1, 1] [2018-11-10 05:33:19,254 INFO L867 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1] [2018-11-10 05:33:19,255 INFO L793 eck$LassoCheckResult]: Stem: 545#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true; 539#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res;havoc main_#t~nondet0, main_~i~0, main_~range~0;havoc main_~i~0;havoc main_~range~0;main_~i~0 := main_#t~nondet0;havoc main_#t~nondet0;main_~range~0 := 20; 540#L12-1 assume true; 560#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 559#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 558#L13 assume main_~i~0 == main_~range~0;main_~i~0 := 0;main_~range~0 := main_~range~0 - 1; 557#L12-1 assume true; 556#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 555#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 554#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 552#L12-1 assume true; 553#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 586#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 551#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 547#L12-1 assume true; 543#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 544#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 549#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 577#L12-1 assume true; 575#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 573#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 571#L13 assume main_~i~0 == main_~range~0;main_~i~0 := 0;main_~range~0 := main_~range~0 - 1; 565#L12-1 [2018-11-10 05:33:19,255 INFO L795 eck$LassoCheckResult]: Loop: 565#L12-1 assume true; 569#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 567#L12 assume !!(0 == main_~i~0 && main_~i~0 == main_~range~0); 565#L12-1 [2018-11-10 05:33:19,255 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 05:33:19,255 INFO L82 PathProgramCache]: Analyzing trace with hash 384323350, now seen corresponding path program 5 times [2018-11-10 05:33:19,255 INFO L225 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-10 05:33:19,255 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-10 05:33:19,256 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:33:19,256 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-10 05:33:19,256 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:33:19,261 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 05:33:19,320 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 40 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 05:33:19,320 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-10 05:33:19,320 INFO L225 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_4b8fc6d8-f1f2-4752-b24c-26b6754cc212/bin-2019/uautomizer/z3 Starting monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-10 05:33:19,328 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-11-10 05:33:19,348 INFO L249 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 5 check-sat command(s) [2018-11-10 05:33:19,348 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-10 05:33:19,350 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 05:33:19,406 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 40 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 05:33:19,422 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-10 05:33:19,423 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 6] total 12 [2018-11-10 05:33:19,423 INFO L798 eck$LassoCheckResult]: stem already infeasible [2018-11-10 05:33:19,423 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 05:33:19,423 INFO L82 PathProgramCache]: Analyzing trace with hash 35952, now seen corresponding path program 5 times [2018-11-10 05:33:19,423 INFO L225 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-10 05:33:19,423 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-10 05:33:19,424 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:33:19,424 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-10 05:33:19,424 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:33:19,425 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-10 05:33:19,426 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-10 05:33:19,434 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-11-10 05:33:19,434 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=62, Invalid=94, Unknown=0, NotChecked=0, Total=156 [2018-11-10 05:33:19,434 INFO L87 Difference]: Start difference. First operand 48 states and 53 transitions. cyclomatic complexity: 8 Second operand 13 states. [2018-11-10 05:33:19,466 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 05:33:19,466 INFO L93 Difference]: Finished difference Result 73 states and 78 transitions. [2018-11-10 05:33:19,466 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-11-10 05:33:19,466 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 73 states and 78 transitions. [2018-11-10 05:33:19,467 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 7 [2018-11-10 05:33:19,468 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 73 states to 67 states and 72 transitions. [2018-11-10 05:33:19,468 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 44 [2018-11-10 05:33:19,468 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 44 [2018-11-10 05:33:19,468 INFO L73 IsDeterministic]: Start isDeterministic. Operand 67 states and 72 transitions. [2018-11-10 05:33:19,468 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2018-11-10 05:33:19,468 INFO L705 BuchiCegarLoop]: Abstraction has 67 states and 72 transitions. [2018-11-10 05:33:19,468 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 67 states and 72 transitions. [2018-11-10 05:33:19,470 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 67 to 64. [2018-11-10 05:33:19,470 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 64 states. [2018-11-10 05:33:19,470 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 64 states to 64 states and 69 transitions. [2018-11-10 05:33:19,471 INFO L728 BuchiCegarLoop]: Abstraction has 64 states and 69 transitions. [2018-11-10 05:33:19,471 INFO L608 BuchiCegarLoop]: Abstraction has 64 states and 69 transitions. [2018-11-10 05:33:19,471 INFO L442 BuchiCegarLoop]: ======== Iteration 8============ [2018-11-10 05:33:19,471 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 64 states and 69 transitions. [2018-11-10 05:33:19,472 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 7 [2018-11-10 05:33:19,472 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2018-11-10 05:33:19,472 INFO L119 BuchiIsEmpty]: Starting construction of run [2018-11-10 05:33:19,472 INFO L866 BuchiCegarLoop]: Counterexample stem histogram [7, 7, 7, 5, 2, 1, 1] [2018-11-10 05:33:19,472 INFO L867 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1] [2018-11-10 05:33:19,473 INFO L793 eck$LassoCheckResult]: Stem: 745#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true; 739#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res;havoc main_#t~nondet0, main_~i~0, main_~range~0;havoc main_~i~0;havoc main_~range~0;main_~i~0 := main_#t~nondet0;havoc main_#t~nondet0;main_~range~0 := 20; 740#L12-1 assume true; 761#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 760#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 759#L13 assume main_~i~0 == main_~range~0;main_~i~0 := 0;main_~range~0 := main_~range~0 - 1; 758#L12-1 assume true; 757#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 756#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 755#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 754#L12-1 assume true; 743#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 744#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 751#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 747#L12-1 assume true; 748#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 802#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 801#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 800#L12-1 assume true; 799#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 798#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 797#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 796#L12-1 assume true; 790#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 795#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 792#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 789#L12-1 assume true; 787#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 785#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 771#L13 assume main_~i~0 == main_~range~0;main_~i~0 := 0;main_~range~0 := main_~range~0 - 1; 765#L12-1 [2018-11-10 05:33:19,473 INFO L795 eck$LassoCheckResult]: Loop: 765#L12-1 assume true; 769#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 767#L12 assume !!(0 == main_~i~0 && main_~i~0 == main_~range~0); 765#L12-1 [2018-11-10 05:33:19,473 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 05:33:19,473 INFO L82 PathProgramCache]: Analyzing trace with hash -1201996820, now seen corresponding path program 6 times [2018-11-10 05:33:19,473 INFO L225 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-10 05:33:19,473 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-10 05:33:19,474 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:33:19,474 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-10 05:33:19,474 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:33:19,479 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 05:33:19,537 INFO L134 CoverageAnalysis]: Checked inductivity of 84 backedges. 0 proven. 84 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 05:33:19,537 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-10 05:33:19,537 INFO L225 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_4b8fc6d8-f1f2-4752-b24c-26b6754cc212/bin-2019/uautomizer/z3 Starting monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-10 05:33:19,543 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-11-10 05:33:19,551 INFO L249 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 7 check-sat command(s) [2018-11-10 05:33:19,551 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-10 05:33:19,552 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 05:33:19,602 INFO L134 CoverageAnalysis]: Checked inductivity of 84 backedges. 0 proven. 84 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 05:33:19,618 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-10 05:33:19,618 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 8] total 16 [2018-11-10 05:33:19,618 INFO L798 eck$LassoCheckResult]: stem already infeasible [2018-11-10 05:33:19,619 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 05:33:19,619 INFO L82 PathProgramCache]: Analyzing trace with hash 35952, now seen corresponding path program 6 times [2018-11-10 05:33:19,619 INFO L225 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-10 05:33:19,619 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-10 05:33:19,619 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:33:19,620 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-10 05:33:19,620 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:33:19,620 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-10 05:33:19,621 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-10 05:33:19,635 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-11-10 05:33:19,636 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=107, Invalid=165, Unknown=0, NotChecked=0, Total=272 [2018-11-10 05:33:19,636 INFO L87 Difference]: Start difference. First operand 64 states and 69 transitions. cyclomatic complexity: 8 Second operand 17 states. [2018-11-10 05:33:19,685 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 05:33:19,685 INFO L93 Difference]: Finished difference Result 89 states and 94 transitions. [2018-11-10 05:33:19,685 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-11-10 05:33:19,686 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 89 states and 94 transitions. [2018-11-10 05:33:19,687 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 7 [2018-11-10 05:33:19,687 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 89 states to 83 states and 88 transitions. [2018-11-10 05:33:19,687 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 52 [2018-11-10 05:33:19,688 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 52 [2018-11-10 05:33:19,688 INFO L73 IsDeterministic]: Start isDeterministic. Operand 83 states and 88 transitions. [2018-11-10 05:33:19,688 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2018-11-10 05:33:19,688 INFO L705 BuchiCegarLoop]: Abstraction has 83 states and 88 transitions. [2018-11-10 05:33:19,688 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 83 states and 88 transitions. [2018-11-10 05:33:19,691 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 83 to 80. [2018-11-10 05:33:19,691 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 80 states. [2018-11-10 05:33:19,692 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 80 states to 80 states and 85 transitions. [2018-11-10 05:33:19,692 INFO L728 BuchiCegarLoop]: Abstraction has 80 states and 85 transitions. [2018-11-10 05:33:19,692 INFO L608 BuchiCegarLoop]: Abstraction has 80 states and 85 transitions. [2018-11-10 05:33:19,692 INFO L442 BuchiCegarLoop]: ======== Iteration 9============ [2018-11-10 05:33:19,692 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 80 states and 85 transitions. [2018-11-10 05:33:19,693 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 7 [2018-11-10 05:33:19,693 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2018-11-10 05:33:19,693 INFO L119 BuchiIsEmpty]: Starting construction of run [2018-11-10 05:33:19,694 INFO L866 BuchiCegarLoop]: Counterexample stem histogram [9, 9, 9, 7, 2, 1, 1] [2018-11-10 05:33:19,694 INFO L867 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1] [2018-11-10 05:33:19,694 INFO L793 eck$LassoCheckResult]: Stem: 1005#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true; 999#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res;havoc main_#t~nondet0, main_~i~0, main_~range~0;havoc main_~i~0;havoc main_~range~0;main_~i~0 := main_#t~nondet0;havoc main_#t~nondet0;main_~range~0 := 20; 1000#L12-1 assume true; 1021#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 1020#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 1019#L13 assume main_~i~0 == main_~range~0;main_~i~0 := 0;main_~range~0 := main_~range~0 - 1; 1018#L12-1 assume true; 1017#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 1016#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 1015#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 1014#L12-1 assume true; 1003#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 1004#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 1011#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 1007#L12-1 assume true; 1008#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 1078#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 1077#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 1076#L12-1 assume true; 1075#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 1074#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 1073#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 1072#L12-1 assume true; 1071#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 1070#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 1069#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 1068#L12-1 assume true; 1067#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 1066#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 1065#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 1064#L12-1 assume true; 1050#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 1063#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 1052#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 1049#L12-1 assume true; 1047#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 1045#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 1031#L13 assume main_~i~0 == main_~range~0;main_~i~0 := 0;main_~range~0 := main_~range~0 - 1; 1025#L12-1 [2018-11-10 05:33:19,694 INFO L795 eck$LassoCheckResult]: Loop: 1025#L12-1 assume true; 1029#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 1027#L12 assume !!(0 == main_~i~0 && main_~i~0 == main_~range~0); 1025#L12-1 [2018-11-10 05:33:19,694 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 05:33:19,695 INFO L82 PathProgramCache]: Analyzing trace with hash -1281985854, now seen corresponding path program 7 times [2018-11-10 05:33:19,695 INFO L225 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-10 05:33:19,695 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-10 05:33:19,696 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:33:19,696 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-10 05:33:19,696 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:33:19,701 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 05:33:19,806 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 0 proven. 144 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 05:33:19,806 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-10 05:33:19,806 INFO L225 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_4b8fc6d8-f1f2-4752-b24c-26b6754cc212/bin-2019/uautomizer/z3 Starting monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-10 05:33:19,811 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 05:33:19,818 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 05:33:19,820 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 05:33:19,882 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 0 proven. 144 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 05:33:19,898 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-10 05:33:19,898 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 10] total 20 [2018-11-10 05:33:19,899 INFO L798 eck$LassoCheckResult]: stem already infeasible [2018-11-10 05:33:19,899 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 05:33:19,899 INFO L82 PathProgramCache]: Analyzing trace with hash 35952, now seen corresponding path program 7 times [2018-11-10 05:33:19,899 INFO L225 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-10 05:33:19,899 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-10 05:33:19,900 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:33:19,900 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 05:33:19,900 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:33:19,901 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-10 05:33:19,902 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-10 05:33:19,911 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2018-11-10 05:33:19,911 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=164, Invalid=256, Unknown=0, NotChecked=0, Total=420 [2018-11-10 05:33:19,911 INFO L87 Difference]: Start difference. First operand 80 states and 85 transitions. cyclomatic complexity: 8 Second operand 21 states. [2018-11-10 05:33:19,964 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 05:33:19,965 INFO L93 Difference]: Finished difference Result 105 states and 110 transitions. [2018-11-10 05:33:19,965 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-11-10 05:33:19,965 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 105 states and 110 transitions. [2018-11-10 05:33:19,966 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 7 [2018-11-10 05:33:19,969 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 105 states to 99 states and 104 transitions. [2018-11-10 05:33:19,969 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 60 [2018-11-10 05:33:19,969 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 60 [2018-11-10 05:33:19,969 INFO L73 IsDeterministic]: Start isDeterministic. Operand 99 states and 104 transitions. [2018-11-10 05:33:19,970 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2018-11-10 05:33:19,970 INFO L705 BuchiCegarLoop]: Abstraction has 99 states and 104 transitions. [2018-11-10 05:33:19,970 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 99 states and 104 transitions. [2018-11-10 05:33:19,974 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 99 to 96. [2018-11-10 05:33:19,974 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 96 states. [2018-11-10 05:33:19,975 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 96 states to 96 states and 101 transitions. [2018-11-10 05:33:19,975 INFO L728 BuchiCegarLoop]: Abstraction has 96 states and 101 transitions. [2018-11-10 05:33:19,975 INFO L608 BuchiCegarLoop]: Abstraction has 96 states and 101 transitions. [2018-11-10 05:33:19,975 INFO L442 BuchiCegarLoop]: ======== Iteration 10============ [2018-11-10 05:33:19,975 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 96 states and 101 transitions. [2018-11-10 05:33:19,976 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 7 [2018-11-10 05:33:19,976 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2018-11-10 05:33:19,976 INFO L119 BuchiIsEmpty]: Starting construction of run [2018-11-10 05:33:19,977 INFO L866 BuchiCegarLoop]: Counterexample stem histogram [11, 11, 11, 9, 2, 1, 1] [2018-11-10 05:33:19,977 INFO L867 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1] [2018-11-10 05:33:19,977 INFO L793 eck$LassoCheckResult]: Stem: 1325#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true; 1319#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res;havoc main_#t~nondet0, main_~i~0, main_~range~0;havoc main_~i~0;havoc main_~range~0;main_~i~0 := main_#t~nondet0;havoc main_#t~nondet0;main_~range~0 := 20; 1320#L12-1 assume true; 1341#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 1340#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 1339#L13 assume main_~i~0 == main_~range~0;main_~i~0 := 0;main_~range~0 := main_~range~0 - 1; 1338#L12-1 assume true; 1337#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 1336#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 1335#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 1334#L12-1 assume true; 1323#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 1324#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 1331#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 1327#L12-1 assume true; 1328#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 1414#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 1413#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 1412#L12-1 assume true; 1411#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 1410#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 1409#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 1408#L12-1 assume true; 1407#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 1406#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 1405#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 1404#L12-1 assume true; 1403#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 1402#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 1401#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 1400#L12-1 assume true; 1399#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 1398#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 1397#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 1396#L12-1 assume true; 1395#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 1394#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 1393#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 1392#L12-1 assume true; 1370#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 1391#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 1372#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 1369#L12-1 assume true; 1367#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 1365#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 1351#L13 assume main_~i~0 == main_~range~0;main_~i~0 := 0;main_~range~0 := main_~range~0 - 1; 1345#L12-1 [2018-11-10 05:33:19,977 INFO L795 eck$LassoCheckResult]: Loop: 1345#L12-1 assume true; 1349#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 1347#L12 assume !!(0 == main_~i~0 && main_~i~0 == main_~range~0); 1345#L12-1 [2018-11-10 05:33:19,977 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 05:33:19,977 INFO L82 PathProgramCache]: Analyzing trace with hash -1070550120, now seen corresponding path program 8 times [2018-11-10 05:33:19,978 INFO L225 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-10 05:33:19,978 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-10 05:33:19,978 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:33:19,978 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 05:33:19,979 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:33:19,982 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 05:33:20,099 INFO L134 CoverageAnalysis]: Checked inductivity of 220 backedges. 0 proven. 220 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 05:33:20,099 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-10 05:33:20,099 INFO L225 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_4b8fc6d8-f1f2-4752-b24c-26b6754cc212/bin-2019/uautomizer/z3 Starting monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-10 05:33:20,107 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-11-10 05:33:20,114 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-11-10 05:33:20,114 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-10 05:33:20,116 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 05:33:20,196 INFO L134 CoverageAnalysis]: Checked inductivity of 220 backedges. 0 proven. 220 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 05:33:20,212 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-10 05:33:20,212 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 12] total 24 [2018-11-10 05:33:20,213 INFO L798 eck$LassoCheckResult]: stem already infeasible [2018-11-10 05:33:20,213 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 05:33:20,213 INFO L82 PathProgramCache]: Analyzing trace with hash 35952, now seen corresponding path program 8 times [2018-11-10 05:33:20,213 INFO L225 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-10 05:33:20,213 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-10 05:33:20,214 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:33:20,214 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-10 05:33:20,214 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:33:20,215 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-10 05:33:20,216 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-10 05:33:20,224 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2018-11-10 05:33:20,225 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=233, Invalid=367, Unknown=0, NotChecked=0, Total=600 [2018-11-10 05:33:20,225 INFO L87 Difference]: Start difference. First operand 96 states and 101 transitions. cyclomatic complexity: 8 Second operand 25 states. [2018-11-10 05:33:20,318 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 05:33:20,318 INFO L93 Difference]: Finished difference Result 121 states and 126 transitions. [2018-11-10 05:33:20,318 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-11-10 05:33:20,318 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 121 states and 126 transitions. [2018-11-10 05:33:20,319 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 7 [2018-11-10 05:33:20,320 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 121 states to 115 states and 120 transitions. [2018-11-10 05:33:20,320 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 68 [2018-11-10 05:33:20,320 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 68 [2018-11-10 05:33:20,320 INFO L73 IsDeterministic]: Start isDeterministic. Operand 115 states and 120 transitions. [2018-11-10 05:33:20,320 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2018-11-10 05:33:20,320 INFO L705 BuchiCegarLoop]: Abstraction has 115 states and 120 transitions. [2018-11-10 05:33:20,321 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 115 states and 120 transitions. [2018-11-10 05:33:20,324 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 115 to 112. [2018-11-10 05:33:20,324 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 112 states. [2018-11-10 05:33:20,324 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 112 states to 112 states and 117 transitions. [2018-11-10 05:33:20,325 INFO L728 BuchiCegarLoop]: Abstraction has 112 states and 117 transitions. [2018-11-10 05:33:20,325 INFO L608 BuchiCegarLoop]: Abstraction has 112 states and 117 transitions. [2018-11-10 05:33:20,325 INFO L442 BuchiCegarLoop]: ======== Iteration 11============ [2018-11-10 05:33:20,325 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 112 states and 117 transitions. [2018-11-10 05:33:20,326 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 7 [2018-11-10 05:33:20,326 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2018-11-10 05:33:20,326 INFO L119 BuchiIsEmpty]: Starting construction of run [2018-11-10 05:33:20,327 INFO L866 BuchiCegarLoop]: Counterexample stem histogram [13, 13, 13, 11, 2, 1, 1] [2018-11-10 05:33:20,327 INFO L867 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1] [2018-11-10 05:33:20,327 INFO L793 eck$LassoCheckResult]: Stem: 1705#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true; 1699#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res;havoc main_#t~nondet0, main_~i~0, main_~range~0;havoc main_~i~0;havoc main_~range~0;main_~i~0 := main_#t~nondet0;havoc main_#t~nondet0;main_~range~0 := 20; 1700#L12-1 assume true; 1721#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 1720#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 1719#L13 assume main_~i~0 == main_~range~0;main_~i~0 := 0;main_~range~0 := main_~range~0 - 1; 1718#L12-1 assume true; 1717#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 1716#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 1715#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 1714#L12-1 assume true; 1703#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 1704#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 1711#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 1707#L12-1 assume true; 1708#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 1810#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 1809#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 1808#L12-1 assume true; 1807#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 1806#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 1805#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 1804#L12-1 assume true; 1803#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 1802#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 1801#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 1800#L12-1 assume true; 1799#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 1798#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 1797#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 1796#L12-1 assume true; 1795#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 1794#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 1793#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 1792#L12-1 assume true; 1791#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 1790#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 1789#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 1788#L12-1 assume true; 1787#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 1786#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 1785#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 1784#L12-1 assume true; 1783#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 1782#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 1781#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 1780#L12-1 assume true; 1750#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 1779#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 1752#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 1749#L12-1 assume true; 1747#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 1745#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 1731#L13 assume main_~i~0 == main_~range~0;main_~i~0 := 0;main_~range~0 := main_~range~0 - 1; 1725#L12-1 [2018-11-10 05:33:20,327 INFO L795 eck$LassoCheckResult]: Loop: 1725#L12-1 assume true; 1729#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 1727#L12 assume !!(0 == main_~i~0 && main_~i~0 == main_~range~0); 1725#L12-1 [2018-11-10 05:33:20,327 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 05:33:20,327 INFO L82 PathProgramCache]: Analyzing trace with hash -1614823826, now seen corresponding path program 9 times [2018-11-10 05:33:20,328 INFO L225 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-10 05:33:20,328 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-10 05:33:20,330 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:33:20,331 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-10 05:33:20,331 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:33:20,337 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 05:33:20,474 INFO L134 CoverageAnalysis]: Checked inductivity of 312 backedges. 0 proven. 312 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 05:33:20,474 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-10 05:33:20,474 INFO L225 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_4b8fc6d8-f1f2-4752-b24c-26b6754cc212/bin-2019/uautomizer/z3 Starting monitored process 17 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 17 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-10 05:33:20,491 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-11-10 05:33:20,518 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 13 check-sat command(s) [2018-11-10 05:33:20,519 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-10 05:33:20,521 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 05:33:20,671 INFO L134 CoverageAnalysis]: Checked inductivity of 312 backedges. 0 proven. 312 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 05:33:20,697 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-10 05:33:20,697 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 14] total 28 [2018-11-10 05:33:20,697 INFO L798 eck$LassoCheckResult]: stem already infeasible [2018-11-10 05:33:20,698 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 05:33:20,698 INFO L82 PathProgramCache]: Analyzing trace with hash 35952, now seen corresponding path program 9 times [2018-11-10 05:33:20,698 INFO L225 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-10 05:33:20,698 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-10 05:33:20,698 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:33:20,699 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-10 05:33:20,699 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:33:20,699 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-10 05:33:20,700 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-10 05:33:20,722 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 29 interpolants. [2018-11-10 05:33:20,722 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=314, Invalid=498, Unknown=0, NotChecked=0, Total=812 [2018-11-10 05:33:20,722 INFO L87 Difference]: Start difference. First operand 112 states and 117 transitions. cyclomatic complexity: 8 Second operand 29 states. [2018-11-10 05:33:20,832 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 05:33:20,832 INFO L93 Difference]: Finished difference Result 137 states and 142 transitions. [2018-11-10 05:33:20,832 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-11-10 05:33:20,832 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 137 states and 142 transitions. [2018-11-10 05:33:20,833 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 7 [2018-11-10 05:33:20,833 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 137 states to 131 states and 136 transitions. [2018-11-10 05:33:20,833 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 76 [2018-11-10 05:33:20,834 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 76 [2018-11-10 05:33:20,834 INFO L73 IsDeterministic]: Start isDeterministic. Operand 131 states and 136 transitions. [2018-11-10 05:33:20,834 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2018-11-10 05:33:20,834 INFO L705 BuchiCegarLoop]: Abstraction has 131 states and 136 transitions. [2018-11-10 05:33:20,834 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 131 states and 136 transitions. [2018-11-10 05:33:20,837 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 131 to 128. [2018-11-10 05:33:20,837 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 128 states. [2018-11-10 05:33:20,839 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 128 states to 128 states and 133 transitions. [2018-11-10 05:33:20,840 INFO L728 BuchiCegarLoop]: Abstraction has 128 states and 133 transitions. [2018-11-10 05:33:20,840 INFO L608 BuchiCegarLoop]: Abstraction has 128 states and 133 transitions. [2018-11-10 05:33:20,840 INFO L442 BuchiCegarLoop]: ======== Iteration 12============ [2018-11-10 05:33:20,840 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 128 states and 133 transitions. [2018-11-10 05:33:20,841 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 7 [2018-11-10 05:33:20,841 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2018-11-10 05:33:20,841 INFO L119 BuchiIsEmpty]: Starting construction of run [2018-11-10 05:33:20,842 INFO L866 BuchiCegarLoop]: Counterexample stem histogram [15, 15, 15, 13, 2, 1, 1] [2018-11-10 05:33:20,842 INFO L867 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1] [2018-11-10 05:33:20,843 INFO L793 eck$LassoCheckResult]: Stem: 2145#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true; 2139#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res;havoc main_#t~nondet0, main_~i~0, main_~range~0;havoc main_~i~0;havoc main_~range~0;main_~i~0 := main_#t~nondet0;havoc main_#t~nondet0;main_~range~0 := 20; 2140#L12-1 assume true; 2161#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 2160#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 2159#L13 assume main_~i~0 == main_~range~0;main_~i~0 := 0;main_~range~0 := main_~range~0 - 1; 2158#L12-1 assume true; 2157#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 2156#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 2155#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 2154#L12-1 assume true; 2143#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 2144#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 2151#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 2147#L12-1 assume true; 2148#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 2266#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 2265#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 2264#L12-1 assume true; 2263#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 2262#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 2261#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 2260#L12-1 assume true; 2259#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 2258#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 2257#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 2256#L12-1 assume true; 2255#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 2254#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 2253#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 2252#L12-1 assume true; 2251#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 2250#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 2249#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 2248#L12-1 assume true; 2247#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 2246#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 2245#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 2244#L12-1 assume true; 2243#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 2242#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 2241#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 2240#L12-1 assume true; 2239#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 2238#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 2237#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 2236#L12-1 assume true; 2235#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 2234#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 2233#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 2232#L12-1 assume true; 2231#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 2230#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 2229#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 2228#L12-1 assume true; 2190#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 2227#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 2192#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 2189#L12-1 assume true; 2187#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 2185#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 2171#L13 assume main_~i~0 == main_~range~0;main_~i~0 := 0;main_~range~0 := main_~range~0 - 1; 2165#L12-1 [2018-11-10 05:33:20,843 INFO L795 eck$LassoCheckResult]: Loop: 2165#L12-1 assume true; 2169#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 2167#L12 assume !!(0 == main_~i~0 && main_~i~0 == main_~range~0); 2165#L12-1 [2018-11-10 05:33:20,843 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 05:33:20,843 INFO L82 PathProgramCache]: Analyzing trace with hash 500798276, now seen corresponding path program 10 times [2018-11-10 05:33:20,843 INFO L225 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-10 05:33:20,843 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-10 05:33:20,844 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:33:20,844 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-10 05:33:20,844 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:33:20,849 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 05:33:21,013 INFO L134 CoverageAnalysis]: Checked inductivity of 420 backedges. 0 proven. 420 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 05:33:21,014 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-10 05:33:21,014 INFO L225 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_4b8fc6d8-f1f2-4752-b24c-26b6754cc212/bin-2019/uautomizer/z3 Starting monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-10 05:33:21,022 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-11-10 05:33:21,035 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-11-10 05:33:21,035 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-10 05:33:21,037 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 05:33:21,240 INFO L134 CoverageAnalysis]: Checked inductivity of 420 backedges. 0 proven. 420 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 05:33:21,256 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-10 05:33:21,256 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 16] total 32 [2018-11-10 05:33:21,257 INFO L798 eck$LassoCheckResult]: stem already infeasible [2018-11-10 05:33:21,257 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 05:33:21,257 INFO L82 PathProgramCache]: Analyzing trace with hash 35952, now seen corresponding path program 10 times [2018-11-10 05:33:21,257 INFO L225 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-10 05:33:21,257 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-10 05:33:21,258 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:33:21,258 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-10 05:33:21,258 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:33:21,259 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-10 05:33:21,260 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-10 05:33:21,285 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 33 interpolants. [2018-11-10 05:33:21,286 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=407, Invalid=649, Unknown=0, NotChecked=0, Total=1056 [2018-11-10 05:33:21,286 INFO L87 Difference]: Start difference. First operand 128 states and 133 transitions. cyclomatic complexity: 8 Second operand 33 states. [2018-11-10 05:33:21,437 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 05:33:21,437 INFO L93 Difference]: Finished difference Result 153 states and 158 transitions. [2018-11-10 05:33:21,438 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-11-10 05:33:21,438 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 153 states and 158 transitions. [2018-11-10 05:33:21,439 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 7 [2018-11-10 05:33:21,440 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 153 states to 147 states and 152 transitions. [2018-11-10 05:33:21,440 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 84 [2018-11-10 05:33:21,440 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 84 [2018-11-10 05:33:21,441 INFO L73 IsDeterministic]: Start isDeterministic. Operand 147 states and 152 transitions. [2018-11-10 05:33:21,441 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2018-11-10 05:33:21,441 INFO L705 BuchiCegarLoop]: Abstraction has 147 states and 152 transitions. [2018-11-10 05:33:21,441 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 147 states and 152 transitions. [2018-11-10 05:33:21,445 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 147 to 144. [2018-11-10 05:33:21,445 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 144 states. [2018-11-10 05:33:21,446 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 144 states to 144 states and 149 transitions. [2018-11-10 05:33:21,446 INFO L728 BuchiCegarLoop]: Abstraction has 144 states and 149 transitions. [2018-11-10 05:33:21,453 INFO L608 BuchiCegarLoop]: Abstraction has 144 states and 149 transitions. [2018-11-10 05:33:21,453 INFO L442 BuchiCegarLoop]: ======== Iteration 13============ [2018-11-10 05:33:21,453 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 144 states and 149 transitions. [2018-11-10 05:33:21,454 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 7 [2018-11-10 05:33:21,454 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2018-11-10 05:33:21,454 INFO L119 BuchiIsEmpty]: Starting construction of run [2018-11-10 05:33:21,455 INFO L866 BuchiCegarLoop]: Counterexample stem histogram [17, 17, 17, 15, 2, 1, 1] [2018-11-10 05:33:21,455 INFO L867 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1] [2018-11-10 05:33:21,455 INFO L793 eck$LassoCheckResult]: Stem: 2645#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true; 2639#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res;havoc main_#t~nondet0, main_~i~0, main_~range~0;havoc main_~i~0;havoc main_~range~0;main_~i~0 := main_#t~nondet0;havoc main_#t~nondet0;main_~range~0 := 20; 2640#L12-1 assume true; 2661#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 2660#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 2659#L13 assume main_~i~0 == main_~range~0;main_~i~0 := 0;main_~range~0 := main_~range~0 - 1; 2658#L12-1 assume true; 2657#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 2656#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 2655#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 2654#L12-1 assume true; 2643#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 2644#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 2651#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 2647#L12-1 assume true; 2648#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 2782#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 2781#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 2780#L12-1 assume true; 2779#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 2778#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 2777#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 2776#L12-1 assume true; 2775#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 2774#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 2773#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 2772#L12-1 assume true; 2771#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 2770#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 2769#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 2768#L12-1 assume true; 2767#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 2766#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 2765#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 2764#L12-1 assume true; 2763#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 2762#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 2761#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 2760#L12-1 assume true; 2759#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 2758#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 2757#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 2756#L12-1 assume true; 2755#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 2754#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 2753#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 2752#L12-1 assume true; 2751#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 2750#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 2749#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 2748#L12-1 assume true; 2747#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 2746#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 2745#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 2744#L12-1 assume true; 2743#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 2742#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 2741#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 2740#L12-1 assume true; 2739#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 2738#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 2737#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 2736#L12-1 assume true; 2690#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 2735#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 2692#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 2689#L12-1 assume true; 2687#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 2685#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 2671#L13 assume main_~i~0 == main_~range~0;main_~i~0 := 0;main_~range~0 := main_~range~0 - 1; 2665#L12-1 [2018-11-10 05:33:21,455 INFO L795 eck$LassoCheckResult]: Loop: 2665#L12-1 assume true; 2669#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 2667#L12 assume !!(0 == main_~i~0 && main_~i~0 == main_~range~0); 2665#L12-1 [2018-11-10 05:33:21,455 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 05:33:21,455 INFO L82 PathProgramCache]: Analyzing trace with hash 269759002, now seen corresponding path program 11 times [2018-11-10 05:33:21,456 INFO L225 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-10 05:33:21,456 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-10 05:33:21,456 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:33:21,457 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-10 05:33:21,457 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:33:21,466 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 05:33:21,630 INFO L134 CoverageAnalysis]: Checked inductivity of 544 backedges. 0 proven. 544 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 05:33:21,630 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-10 05:33:21,630 INFO L225 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_4b8fc6d8-f1f2-4752-b24c-26b6754cc212/bin-2019/uautomizer/z3 Starting monitored process 19 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 19 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-10 05:33:21,636 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-11-10 05:33:21,651 INFO L249 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 17 check-sat command(s) [2018-11-10 05:33:21,651 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-10 05:33:21,654 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 05:33:21,824 INFO L134 CoverageAnalysis]: Checked inductivity of 544 backedges. 0 proven. 544 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 05:33:21,840 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-10 05:33:21,841 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [20, 18] total 36 [2018-11-10 05:33:21,841 INFO L798 eck$LassoCheckResult]: stem already infeasible [2018-11-10 05:33:21,841 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 05:33:21,841 INFO L82 PathProgramCache]: Analyzing trace with hash 35952, now seen corresponding path program 11 times [2018-11-10 05:33:21,841 INFO L225 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-10 05:33:21,841 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-10 05:33:21,842 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:33:21,842 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-10 05:33:21,842 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:33:21,842 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-10 05:33:21,843 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-10 05:33:21,852 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 37 interpolants. [2018-11-10 05:33:21,852 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=512, Invalid=820, Unknown=0, NotChecked=0, Total=1332 [2018-11-10 05:33:21,853 INFO L87 Difference]: Start difference. First operand 144 states and 149 transitions. cyclomatic complexity: 8 Second operand 37 states. [2018-11-10 05:33:21,957 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 05:33:21,957 INFO L93 Difference]: Finished difference Result 169 states and 174 transitions. [2018-11-10 05:33:21,958 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-11-10 05:33:21,958 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 169 states and 174 transitions. [2018-11-10 05:33:21,959 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 7 [2018-11-10 05:33:21,960 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 169 states to 163 states and 168 transitions. [2018-11-10 05:33:21,960 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 92 [2018-11-10 05:33:21,960 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 92 [2018-11-10 05:33:21,960 INFO L73 IsDeterministic]: Start isDeterministic. Operand 163 states and 168 transitions. [2018-11-10 05:33:21,961 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2018-11-10 05:33:21,961 INFO L705 BuchiCegarLoop]: Abstraction has 163 states and 168 transitions. [2018-11-10 05:33:21,961 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 163 states and 168 transitions. [2018-11-10 05:33:21,963 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 163 to 160. [2018-11-10 05:33:21,964 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 160 states. [2018-11-10 05:33:21,964 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 160 states to 160 states and 165 transitions. [2018-11-10 05:33:21,964 INFO L728 BuchiCegarLoop]: Abstraction has 160 states and 165 transitions. [2018-11-10 05:33:21,964 INFO L608 BuchiCegarLoop]: Abstraction has 160 states and 165 transitions. [2018-11-10 05:33:21,964 INFO L442 BuchiCegarLoop]: ======== Iteration 14============ [2018-11-10 05:33:21,964 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 160 states and 165 transitions. [2018-11-10 05:33:21,965 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 7 [2018-11-10 05:33:21,965 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2018-11-10 05:33:21,965 INFO L119 BuchiIsEmpty]: Starting construction of run [2018-11-10 05:33:21,966 INFO L866 BuchiCegarLoop]: Counterexample stem histogram [19, 19, 19, 17, 2, 1, 1] [2018-11-10 05:33:21,966 INFO L867 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1] [2018-11-10 05:33:21,967 INFO L793 eck$LassoCheckResult]: Stem: 3205#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true; 3199#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res;havoc main_#t~nondet0, main_~i~0, main_~range~0;havoc main_~i~0;havoc main_~range~0;main_~i~0 := main_#t~nondet0;havoc main_#t~nondet0;main_~range~0 := 20; 3200#L12-1 assume true; 3221#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 3220#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 3219#L13 assume main_~i~0 == main_~range~0;main_~i~0 := 0;main_~range~0 := main_~range~0 - 1; 3218#L12-1 assume true; 3217#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 3216#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 3215#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 3214#L12-1 assume true; 3203#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 3204#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 3211#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 3207#L12-1 assume true; 3208#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 3358#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 3357#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 3356#L12-1 assume true; 3355#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 3354#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 3353#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 3352#L12-1 assume true; 3351#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 3350#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 3349#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 3348#L12-1 assume true; 3347#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 3346#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 3345#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 3344#L12-1 assume true; 3343#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 3342#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 3341#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 3340#L12-1 assume true; 3339#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 3338#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 3337#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 3336#L12-1 assume true; 3335#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 3334#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 3333#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 3332#L12-1 assume true; 3331#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 3330#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 3329#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 3328#L12-1 assume true; 3327#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 3326#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 3325#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 3324#L12-1 assume true; 3323#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 3322#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 3321#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 3320#L12-1 assume true; 3319#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 3318#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 3317#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 3316#L12-1 assume true; 3315#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 3314#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 3313#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 3312#L12-1 assume true; 3311#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 3310#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 3309#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 3308#L12-1 assume true; 3307#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 3306#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 3305#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 3304#L12-1 assume true; 3250#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 3303#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 3252#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 3249#L12-1 assume true; 3247#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 3245#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 3231#L13 assume main_~i~0 == main_~range~0;main_~i~0 := 0;main_~range~0 := main_~range~0 - 1; 3225#L12-1 [2018-11-10 05:33:21,967 INFO L795 eck$LassoCheckResult]: Loop: 3225#L12-1 assume true; 3229#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 3227#L12 assume !!(0 == main_~i~0 && main_~i~0 == main_~range~0); 3225#L12-1 [2018-11-10 05:33:21,967 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 05:33:21,967 INFO L82 PathProgramCache]: Analyzing trace with hash 1443207920, now seen corresponding path program 12 times [2018-11-10 05:33:21,967 INFO L225 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-10 05:33:21,967 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-10 05:33:21,968 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:33:21,968 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-10 05:33:21,968 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:33:21,974 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 05:33:22,142 INFO L134 CoverageAnalysis]: Checked inductivity of 684 backedges. 0 proven. 684 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 05:33:22,142 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-10 05:33:22,142 INFO L225 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_4b8fc6d8-f1f2-4752-b24c-26b6754cc212/bin-2019/uautomizer/z3 Starting monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-10 05:33:22,150 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-11-10 05:33:22,167 INFO L249 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 19 check-sat command(s) [2018-11-10 05:33:22,167 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-10 05:33:22,169 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 05:33:22,366 INFO L134 CoverageAnalysis]: Checked inductivity of 684 backedges. 0 proven. 684 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 05:33:22,382 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-10 05:33:22,382 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [22, 20] total 40 [2018-11-10 05:33:22,382 INFO L798 eck$LassoCheckResult]: stem already infeasible [2018-11-10 05:33:22,382 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 05:33:22,382 INFO L82 PathProgramCache]: Analyzing trace with hash 35952, now seen corresponding path program 12 times [2018-11-10 05:33:22,382 INFO L225 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-10 05:33:22,383 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-10 05:33:22,383 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:33:22,383 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-10 05:33:22,383 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:33:22,384 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-10 05:33:22,385 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-10 05:33:22,392 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 41 interpolants. [2018-11-10 05:33:22,393 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=629, Invalid=1011, Unknown=0, NotChecked=0, Total=1640 [2018-11-10 05:33:22,393 INFO L87 Difference]: Start difference. First operand 160 states and 165 transitions. cyclomatic complexity: 8 Second operand 41 states. [2018-11-10 05:33:22,501 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 05:33:22,501 INFO L93 Difference]: Finished difference Result 185 states and 190 transitions. [2018-11-10 05:33:22,501 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2018-11-10 05:33:22,501 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 185 states and 190 transitions. [2018-11-10 05:33:22,502 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 7 [2018-11-10 05:33:22,503 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 185 states to 179 states and 184 transitions. [2018-11-10 05:33:22,503 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 100 [2018-11-10 05:33:22,503 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 100 [2018-11-10 05:33:22,503 INFO L73 IsDeterministic]: Start isDeterministic. Operand 179 states and 184 transitions. [2018-11-10 05:33:22,503 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2018-11-10 05:33:22,503 INFO L705 BuchiCegarLoop]: Abstraction has 179 states and 184 transitions. [2018-11-10 05:33:22,503 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 179 states and 184 transitions. [2018-11-10 05:33:22,505 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 179 to 176. [2018-11-10 05:33:22,505 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 176 states. [2018-11-10 05:33:22,506 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 176 states to 176 states and 181 transitions. [2018-11-10 05:33:22,506 INFO L728 BuchiCegarLoop]: Abstraction has 176 states and 181 transitions. [2018-11-10 05:33:22,506 INFO L608 BuchiCegarLoop]: Abstraction has 176 states and 181 transitions. [2018-11-10 05:33:22,506 INFO L442 BuchiCegarLoop]: ======== Iteration 15============ [2018-11-10 05:33:22,506 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 176 states and 181 transitions. [2018-11-10 05:33:22,507 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 7 [2018-11-10 05:33:22,507 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2018-11-10 05:33:22,507 INFO L119 BuchiIsEmpty]: Starting construction of run [2018-11-10 05:33:22,508 INFO L866 BuchiCegarLoop]: Counterexample stem histogram [21, 21, 21, 19, 2, 1, 1] [2018-11-10 05:33:22,508 INFO L867 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1] [2018-11-10 05:33:22,508 INFO L793 eck$LassoCheckResult]: Stem: 3825#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true; 3819#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res;havoc main_#t~nondet0, main_~i~0, main_~range~0;havoc main_~i~0;havoc main_~range~0;main_~i~0 := main_#t~nondet0;havoc main_#t~nondet0;main_~range~0 := 20; 3820#L12-1 assume true; 3841#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 3840#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 3839#L13 assume main_~i~0 == main_~range~0;main_~i~0 := 0;main_~range~0 := main_~range~0 - 1; 3838#L12-1 assume true; 3837#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 3836#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 3835#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 3834#L12-1 assume true; 3823#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 3824#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 3831#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 3827#L12-1 assume true; 3828#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 3994#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 3993#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 3992#L12-1 assume true; 3991#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 3990#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 3989#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 3988#L12-1 assume true; 3987#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 3986#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 3985#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 3984#L12-1 assume true; 3983#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 3982#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 3981#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 3980#L12-1 assume true; 3979#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 3978#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 3977#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 3976#L12-1 assume true; 3975#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 3974#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 3973#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 3972#L12-1 assume true; 3971#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 3970#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 3969#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 3968#L12-1 assume true; 3967#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 3966#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 3965#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 3964#L12-1 assume true; 3963#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 3962#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 3961#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 3960#L12-1 assume true; 3959#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 3958#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 3957#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 3956#L12-1 assume true; 3955#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 3954#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 3953#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 3952#L12-1 assume true; 3951#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 3950#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 3949#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 3948#L12-1 assume true; 3947#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 3946#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 3945#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 3944#L12-1 assume true; 3943#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 3942#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 3941#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 3940#L12-1 assume true; 3939#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 3938#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 3937#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 3936#L12-1 assume true; 3935#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 3934#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 3933#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 3932#L12-1 assume true; 3870#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 3931#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 3872#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 3869#L12-1 assume true; 3867#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 3865#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 3851#L13 assume main_~i~0 == main_~range~0;main_~i~0 := 0;main_~range~0 := main_~range~0 - 1; 3845#L12-1 [2018-11-10 05:33:22,508 INFO L795 eck$LassoCheckResult]: Loop: 3845#L12-1 assume true; 3849#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 3847#L12 assume !!(0 == main_~i~0 && main_~i~0 == main_~range~0); 3845#L12-1 [2018-11-10 05:33:22,508 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 05:33:22,508 INFO L82 PathProgramCache]: Analyzing trace with hash -649867834, now seen corresponding path program 13 times [2018-11-10 05:33:22,508 INFO L225 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-10 05:33:22,508 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-10 05:33:22,509 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:33:22,509 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-10 05:33:22,509 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:33:22,518 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-10 05:33:22,524 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-10 05:33:22,527 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 05:33:22,528 INFO L82 PathProgramCache]: Analyzing trace with hash 35952, now seen corresponding path program 13 times [2018-11-10 05:33:22,528 INFO L225 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-10 05:33:22,528 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-10 05:33:22,528 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:33:22,529 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 05:33:22,529 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:33:22,529 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-10 05:33:22,530 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-10 05:33:22,530 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 05:33:22,531 INFO L82 PathProgramCache]: Analyzing trace with hash 1499933835, now seen corresponding path program 2 times [2018-11-10 05:33:22,531 INFO L225 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-10 05:33:22,531 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-10 05:33:22,531 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:33:22,531 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 05:33:22,531 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:33:22,536 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 05:33:22,589 INFO L134 CoverageAnalysis]: Checked inductivity of 903 backedges. 0 proven. 143 refuted. 0 times theorem prover too weak. 760 trivial. 0 not checked. [2018-11-10 05:33:22,590 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-10 05:33:22,590 INFO L225 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_4b8fc6d8-f1f2-4752-b24c-26b6754cc212/bin-2019/uautomizer/z3 Starting monitored process 21 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 21 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-10 05:33:22,598 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-11-10 05:33:22,609 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-11-10 05:33:22,609 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-10 05:33:22,610 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 05:33:22,620 INFO L134 CoverageAnalysis]: Checked inductivity of 903 backedges. 0 proven. 143 refuted. 0 times theorem prover too weak. 760 trivial. 0 not checked. [2018-11-10 05:33:22,637 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-10 05:33:22,637 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4] total 5 [2018-11-10 05:33:22,645 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-10 05:33:22,645 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2018-11-10 05:33:22,645 INFO L87 Difference]: Start difference. First operand 176 states and 181 transitions. cyclomatic complexity: 8 Second operand 6 states. [2018-11-10 05:33:22,667 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 05:33:22,667 INFO L93 Difference]: Finished difference Result 188 states and 195 transitions. [2018-11-10 05:33:22,667 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-10 05:33:22,668 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 188 states and 195 transitions. [2018-11-10 05:33:22,669 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 15 [2018-11-10 05:33:22,669 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 188 states to 188 states and 195 transitions. [2018-11-10 05:33:22,670 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 112 [2018-11-10 05:33:22,670 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 112 [2018-11-10 05:33:22,670 INFO L73 IsDeterministic]: Start isDeterministic. Operand 188 states and 195 transitions. [2018-11-10 05:33:22,670 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2018-11-10 05:33:22,670 INFO L705 BuchiCegarLoop]: Abstraction has 188 states and 195 transitions. [2018-11-10 05:33:22,670 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 188 states and 195 transitions. [2018-11-10 05:33:22,672 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 188 to 184. [2018-11-10 05:33:22,672 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 184 states. [2018-11-10 05:33:22,673 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 184 states to 184 states and 190 transitions. [2018-11-10 05:33:22,673 INFO L728 BuchiCegarLoop]: Abstraction has 184 states and 190 transitions. [2018-11-10 05:33:22,673 INFO L608 BuchiCegarLoop]: Abstraction has 184 states and 190 transitions. [2018-11-10 05:33:22,673 INFO L442 BuchiCegarLoop]: ======== Iteration 16============ [2018-11-10 05:33:22,673 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 184 states and 190 transitions. [2018-11-10 05:33:22,674 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 11 [2018-11-10 05:33:22,674 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2018-11-10 05:33:22,674 INFO L119 BuchiIsEmpty]: Starting construction of run [2018-11-10 05:33:22,675 INFO L866 BuchiCegarLoop]: Counterexample stem histogram [21, 21, 21, 20, 1, 1, 1] [2018-11-10 05:33:22,675 INFO L867 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2018-11-10 05:33:22,675 INFO L793 eck$LassoCheckResult]: Stem: 4466#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true; 4460#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res;havoc main_#t~nondet0, main_~i~0, main_~range~0;havoc main_~i~0;havoc main_~range~0;main_~i~0 := main_#t~nondet0;havoc main_#t~nondet0;main_~range~0 := 20; 4461#L12-1 assume true; 4482#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 4581#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 4579#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 4577#L12-1 assume true; 4574#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 4572#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 4571#L13 assume main_~i~0 == main_~range~0;main_~i~0 := 0;main_~range~0 := main_~range~0 - 1; 4570#L12-1 assume true; 4568#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 4566#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 4565#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 4564#L12-1 assume true; 4563#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 4562#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 4561#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 4560#L12-1 assume true; 4559#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 4558#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 4557#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 4556#L12-1 assume true; 4555#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 4554#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 4553#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 4552#L12-1 assume true; 4551#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 4550#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 4549#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 4548#L12-1 assume true; 4547#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 4546#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 4545#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 4544#L12-1 assume true; 4543#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 4542#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 4541#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 4540#L12-1 assume true; 4539#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 4538#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 4537#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 4536#L12-1 assume true; 4535#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 4534#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 4533#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 4532#L12-1 assume true; 4531#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 4530#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 4529#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 4528#L12-1 assume true; 4527#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 4526#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 4525#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 4524#L12-1 assume true; 4523#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 4522#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 4521#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 4520#L12-1 assume true; 4519#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 4518#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 4517#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 4516#L12-1 assume true; 4515#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 4514#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 4513#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 4512#L12-1 assume true; 4511#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 4510#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 4509#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 4508#L12-1 assume true; 4507#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 4506#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 4505#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 4504#L12-1 assume true; 4503#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 4502#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 4501#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 4500#L12-1 assume true; 4499#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 4498#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 4497#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 4496#L12-1 assume true; 4495#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 4494#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 4493#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 4486#L12-1 [2018-11-10 05:33:22,675 INFO L795 eck$LassoCheckResult]: Loop: 4486#L12-1 assume true; 4492#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 4491#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 4485#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 4486#L12-1 [2018-11-10 05:33:22,675 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 05:33:22,675 INFO L82 PathProgramCache]: Analyzing trace with hash -1734771512, now seen corresponding path program 14 times [2018-11-10 05:33:22,675 INFO L225 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-10 05:33:22,675 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-10 05:33:22,676 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:33:22,676 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-10 05:33:22,676 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:33:22,681 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-10 05:33:22,687 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-10 05:33:22,689 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 05:33:22,690 INFO L82 PathProgramCache]: Analyzing trace with hash 1114284, now seen corresponding path program 3 times [2018-11-10 05:33:22,690 INFO L225 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-10 05:33:22,690 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-10 05:33:22,692 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:33:22,692 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-10 05:33:22,692 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:33:22,693 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-10 05:33:22,693 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-10 05:33:22,694 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 05:33:22,694 INFO L82 PathProgramCache]: Analyzing trace with hash -2105490957, now seen corresponding path program 15 times [2018-11-10 05:33:22,694 INFO L225 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-10 05:33:22,694 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-10 05:33:22,695 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:33:22,695 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-10 05:33:22,695 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:33:22,699 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 05:33:22,955 INFO L134 CoverageAnalysis]: Checked inductivity of 924 backedges. 709 proven. 211 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-11-10 05:33:22,956 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-10 05:33:22,956 INFO L225 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_4b8fc6d8-f1f2-4752-b24c-26b6754cc212/bin-2019/uautomizer/z3 Starting monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-10 05:33:22,963 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-11-10 05:33:23,018 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 22 check-sat command(s) [2018-11-10 05:33:23,018 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-10 05:33:23,020 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 05:33:23,448 INFO L134 CoverageAnalysis]: Checked inductivity of 924 backedges. 920 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-11-10 05:33:23,470 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-11-10 05:33:23,470 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [23] imperfect sequences [24] total 45 [2018-11-10 05:33:23,484 INFO L214 LassoAnalysis]: Preferences: [2018-11-10 05:33:23,484 INFO L124 ssoRankerPreferences]: Compute integeral hull: false [2018-11-10 05:33:23,484 INFO L125 ssoRankerPreferences]: Enable LassoPartitioneer: true [2018-11-10 05:33:23,484 INFO L126 ssoRankerPreferences]: Term annotations enabled: false [2018-11-10 05:33:23,484 INFO L127 ssoRankerPreferences]: Use exernal solver: true [2018-11-10 05:33:23,484 INFO L128 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2018-11-10 05:33:23,484 INFO L129 ssoRankerPreferences]: Dump SMT script to file: false [2018-11-10 05:33:23,484 INFO L130 ssoRankerPreferences]: Path of dumped script: [2018-11-10 05:33:23,484 INFO L131 ssoRankerPreferences]: Filename of dumped script: NarrowKonv_false-termination_true-no-overflow.c_Iteration16_Loop [2018-11-10 05:33:23,484 INFO L132 ssoRankerPreferences]: MapElimAlgo: Frank [2018-11-10 05:33:23,485 INFO L280 LassoAnalysis]: Starting lasso preprocessing... [2018-11-10 05:33:23,485 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-10 05:33:23,492 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-10 05:33:23,494 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-10 05:33:23,522 INFO L298 LassoAnalysis]: Preprocessing complete. [2018-11-10 05:33:23,522 INFO L410 LassoAnalysis]: Checking for nontermination... No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_4b8fc6d8-f1f2-4752-b24c-26b6754cc212/bin-2019/uautomizer/z3 Starting monitored process 23 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 23 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2018-11-10 05:33:23,525 INFO L151 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2018-11-10 05:33:23,525 INFO L163 nArgumentSynthesizer]: Using integer mode. No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_4b8fc6d8-f1f2-4752-b24c-26b6754cc212/bin-2019/uautomizer/z3 Starting monitored process 24 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 24 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2018-11-10 05:33:23,547 INFO L151 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 3 Nilpotent components: true [2018-11-10 05:33:23,547 INFO L163 nArgumentSynthesizer]: Using integer mode. [2018-11-10 05:33:23,577 INFO L450 LassoAnalysis]: Proving nontermination failed: No geometric nontermination argument exists. [2018-11-10 05:33:23,578 INFO L214 LassoAnalysis]: Preferences: [2018-11-10 05:33:23,578 INFO L124 ssoRankerPreferences]: Compute integeral hull: false [2018-11-10 05:33:23,578 INFO L125 ssoRankerPreferences]: Enable LassoPartitioneer: true [2018-11-10 05:33:23,578 INFO L126 ssoRankerPreferences]: Term annotations enabled: false [2018-11-10 05:33:23,579 INFO L127 ssoRankerPreferences]: Use exernal solver: false [2018-11-10 05:33:23,579 INFO L128 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2018-11-10 05:33:23,579 INFO L129 ssoRankerPreferences]: Dump SMT script to file: false [2018-11-10 05:33:23,579 INFO L130 ssoRankerPreferences]: Path of dumped script: [2018-11-10 05:33:23,579 INFO L131 ssoRankerPreferences]: Filename of dumped script: NarrowKonv_false-termination_true-no-overflow.c_Iteration16_Loop [2018-11-10 05:33:23,579 INFO L132 ssoRankerPreferences]: MapElimAlgo: Frank [2018-11-10 05:33:23,579 INFO L280 LassoAnalysis]: Starting lasso preprocessing... [2018-11-10 05:33:23,580 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-10 05:33:23,586 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-10 05:33:23,588 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-10 05:33:23,616 INFO L298 LassoAnalysis]: Preprocessing complete. [2018-11-10 05:33:23,616 INFO L496 LassoAnalysis]: Using template 'affine'. [2018-11-10 05:33:23,616 INFO L122 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSES Number of strict supporting invariants: 0 Number of non-strict supporting invariants: 1 Consider only non-deceasing supporting invariants: true Simplify termination arguments: true Simplify supporting invariants: trueOverapproximate stem: false [2018-11-10 05:33:23,616 INFO L339 nArgumentSynthesizer]: Template has degree 0. [2018-11-10 05:33:23,616 INFO L352 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2018-11-10 05:33:23,616 INFO L205 nArgumentSynthesizer]: 1 stem disjuncts [2018-11-10 05:33:23,617 INFO L206 nArgumentSynthesizer]: 1 loop disjuncts [2018-11-10 05:33:23,617 INFO L207 nArgumentSynthesizer]: 2 template conjuncts. [2018-11-10 05:33:23,617 INFO L402 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2018-11-10 05:33:23,617 INFO L403 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2018-11-10 05:33:23,618 INFO L421 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2018-11-10 05:33:23,619 INFO L443 ModelExtractionUtils]: Simplification made 4 calls to the SMT solver. [2018-11-10 05:33:23,619 INFO L444 ModelExtractionUtils]: 0 out of 4 variables were initially zero. Simplification set additionally 1 variables to zero. [2018-11-10 05:33:23,619 INFO L437 nArgumentSynthesizer]: Simplifying supporting invariants... [2018-11-10 05:33:23,619 INFO L440 nArgumentSynthesizer]: Removed 0 redundant supporting invariants from a total of 0. [2018-11-10 05:33:23,619 INFO L517 LassoAnalysis]: Proved termination. [2018-11-10 05:33:23,619 INFO L519 LassoAnalysis]: Termination argument consisting of: Ranking function f(ULTIMATE.start_main_~i~0, ULTIMATE.start_main_~range~0) = -1*ULTIMATE.start_main_~i~0 + 1*ULTIMATE.start_main_~range~0 Supporting invariants [] [2018-11-10 05:33:23,620 INFO L297 tatePredicateManager]: 0 out of 0 supporting invariants were superfluous and have been removed [2018-11-10 05:33:23,636 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 05:33:23,647 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 05:33:23,648 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 05:33:23,651 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 05:33:23,652 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 05:33:23,658 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 05:33:23,658 INFO L152 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.1 stem predicates 2 loop predicates [2018-11-10 05:33:23,658 INFO L72 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand 184 states and 190 transitions. cyclomatic complexity: 10 Second operand 4 states. [2018-11-10 05:33:23,671 INFO L76 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand 184 states and 190 transitions. cyclomatic complexity: 10. Second operand 4 states. Result 250 states and 257 transitions. Complement of second has 7 states. [2018-11-10 05:33:23,673 INFO L142 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 4 states 1 stem states 2 non-accepting loop states 1 accepting loop states [2018-11-10 05:33:23,673 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4 states. [2018-11-10 05:33:23,674 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 11 transitions. [2018-11-10 05:33:23,674 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 4 states and 11 transitions. Stem has 86 letters. Loop has 4 letters. [2018-11-10 05:33:23,674 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2018-11-10 05:33:23,674 INFO L642 RefineBuchi]: Bad chosen interpolant automaton: word not accepted [2018-11-10 05:33:23,681 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 05:33:23,696 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 05:33:23,698 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 05:33:23,700 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 05:33:23,701 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 05:33:23,707 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 05:33:23,707 INFO L152 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and with honda bouncer for loop.1 stem predicates 2 loop predicates [2018-11-10 05:33:23,707 INFO L72 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand 184 states and 190 transitions. cyclomatic complexity: 10 Second operand 4 states. [2018-11-10 05:33:23,716 INFO L76 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand 184 states and 190 transitions. cyclomatic complexity: 10. Second operand 4 states. Result 250 states and 257 transitions. Complement of second has 7 states. [2018-11-10 05:33:23,720 INFO L142 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 4 states 1 stem states 2 non-accepting loop states 1 accepting loop states [2018-11-10 05:33:23,720 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4 states. [2018-11-10 05:33:23,720 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 11 transitions. [2018-11-10 05:33:23,720 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 4 states and 11 transitions. Stem has 86 letters. Loop has 4 letters. [2018-11-10 05:33:23,720 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2018-11-10 05:33:23,720 INFO L642 RefineBuchi]: Bad chosen interpolant automaton: word not accepted [2018-11-10 05:33:23,729 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 05:33:23,741 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 05:33:23,742 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 05:33:23,745 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 05:33:23,746 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 05:33:23,752 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 05:33:23,752 INFO L152 lantAutomatonBouncer]: Defining Buchi interpolant automaton with scrooge nondeterminism in stemwith honda bouncer for stem and without honda bouncer for loop.1 stem predicates 2 loop predicates [2018-11-10 05:33:23,752 INFO L72 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand 184 states and 190 transitions. cyclomatic complexity: 10 Second operand 4 states. [2018-11-10 05:33:23,763 INFO L76 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand 184 states and 190 transitions. cyclomatic complexity: 10. Second operand 4 states. Result 312 states and 321 transitions. Complement of second has 6 states. [2018-11-10 05:33:23,764 INFO L142 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 4 states 1 stem states 2 non-accepting loop states 1 accepting loop states [2018-11-10 05:33:23,764 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4 states. [2018-11-10 05:33:23,764 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 13 transitions. [2018-11-10 05:33:23,764 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 4 states and 13 transitions. Stem has 86 letters. Loop has 4 letters. [2018-11-10 05:33:23,765 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2018-11-10 05:33:23,765 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 4 states and 13 transitions. Stem has 90 letters. Loop has 4 letters. [2018-11-10 05:33:23,766 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2018-11-10 05:33:23,767 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 4 states and 13 transitions. Stem has 86 letters. Loop has 8 letters. [2018-11-10 05:33:23,768 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2018-11-10 05:33:23,768 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 312 states and 321 transitions. [2018-11-10 05:33:23,769 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 12 [2018-11-10 05:33:23,770 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 312 states to 195 states and 203 transitions. [2018-11-10 05:33:23,770 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 34 [2018-11-10 05:33:23,770 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 37 [2018-11-10 05:33:23,772 INFO L73 IsDeterministic]: Start isDeterministic. Operand 195 states and 203 transitions. [2018-11-10 05:33:23,772 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2018-11-10 05:33:23,772 INFO L705 BuchiCegarLoop]: Abstraction has 195 states and 203 transitions. [2018-11-10 05:33:23,772 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 195 states and 203 transitions. [2018-11-10 05:33:23,773 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 195 to 106. [2018-11-10 05:33:23,773 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 106 states. [2018-11-10 05:33:23,774 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 106 states to 106 states and 113 transitions. [2018-11-10 05:33:23,774 INFO L728 BuchiCegarLoop]: Abstraction has 106 states and 113 transitions. [2018-11-10 05:33:23,774 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 46 interpolants. [2018-11-10 05:33:23,775 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=764, Invalid=1306, Unknown=0, NotChecked=0, Total=2070 [2018-11-10 05:33:23,775 INFO L87 Difference]: Start difference. First operand 106 states and 113 transitions. Second operand 46 states. [2018-11-10 05:33:24,156 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 05:33:24,156 INFO L93 Difference]: Finished difference Result 232 states and 253 transitions. [2018-11-10 05:33:24,156 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 46 states. [2018-11-10 05:33:24,156 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 232 states and 253 transitions. [2018-11-10 05:33:24,157 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 130 [2018-11-10 05:33:24,158 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 232 states to 226 states and 247 transitions. [2018-11-10 05:33:24,159 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 82 [2018-11-10 05:33:24,159 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 222 [2018-11-10 05:33:24,159 INFO L73 IsDeterministic]: Start isDeterministic. Operand 226 states and 247 transitions. [2018-11-10 05:33:24,159 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2018-11-10 05:33:24,159 INFO L705 BuchiCegarLoop]: Abstraction has 226 states and 247 transitions. [2018-11-10 05:33:24,159 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 226 states and 247 transitions. [2018-11-10 05:33:24,161 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 226 to 173. [2018-11-10 05:33:24,162 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 173 states. [2018-11-10 05:33:24,163 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 173 states to 173 states and 194 transitions. [2018-11-10 05:33:24,163 INFO L728 BuchiCegarLoop]: Abstraction has 173 states and 194 transitions. [2018-11-10 05:33:24,163 INFO L608 BuchiCegarLoop]: Abstraction has 173 states and 194 transitions. [2018-11-10 05:33:24,163 INFO L442 BuchiCegarLoop]: ======== Iteration 17============ [2018-11-10 05:33:24,163 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 173 states and 194 transitions. [2018-11-10 05:33:24,164 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 79 [2018-11-10 05:33:24,164 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2018-11-10 05:33:24,164 INFO L119 BuchiIsEmpty]: Starting construction of run [2018-11-10 05:33:24,165 INFO L866 BuchiCegarLoop]: Counterexample stem histogram [22, 22, 22, 20, 2, 1, 1] [2018-11-10 05:33:24,165 INFO L867 BuchiCegarLoop]: Counterexample loop histogram [2, 2, 2, 1, 1] [2018-11-10 05:33:24,165 INFO L793 eck$LassoCheckResult]: Stem: 7006#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true; 7000#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res;havoc main_#t~nondet0, main_~i~0, main_~range~0;havoc main_~i~0;havoc main_~range~0;main_~i~0 := main_#t~nondet0;havoc main_#t~nondet0;main_~range~0 := 20; 7001#L12-1 assume true; 7009#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 7023#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 7024#L13 assume main_~i~0 == main_~range~0;main_~i~0 := 0;main_~range~0 := main_~range~0 - 1; 7102#L12-1 assume true; 7101#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 7100#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 7099#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 7098#L12-1 assume true; 7097#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 7096#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 7095#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 7094#L12-1 assume true; 7093#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 7092#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 7091#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 7090#L12-1 assume true; 7089#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 7088#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 7087#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 7086#L12-1 assume true; 7085#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 7084#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 7083#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 7082#L12-1 assume true; 7081#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 7080#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 7079#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 7078#L12-1 assume true; 7077#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 7076#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 7075#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 7074#L12-1 assume true; 7073#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 7072#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 7071#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 7070#L12-1 assume true; 7069#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 7068#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 7067#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 7066#L12-1 assume true; 7065#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 7064#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 7063#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 7062#L12-1 assume true; 7061#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 7060#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 7059#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 7058#L12-1 assume true; 7057#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 7056#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 7055#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 7054#L12-1 assume true; 7053#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 7052#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 7051#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 7050#L12-1 assume true; 7049#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 7048#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 7047#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 7046#L12-1 assume true; 7045#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 7044#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 7043#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 7042#L12-1 assume true; 7041#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 7040#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 7039#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 7038#L12-1 assume true; 7037#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 7036#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 7035#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 7034#L12-1 assume true; 7033#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 7032#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 7031#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 7030#L12-1 assume true; 7029#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 7028#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 7027#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 7025#L12-1 assume true; 7026#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 7103#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 7014#L13 assume main_~i~0 == main_~range~0;main_~i~0 := 0;main_~range~0 := main_~range~0 - 1; 7015#L12-1 assume true; 7105#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 7104#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 7012#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 7013#L12-1 [2018-11-10 05:33:24,165 INFO L795 eck$LassoCheckResult]: Loop: 7013#L12-1 assume true; 7002#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 7003#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 7010#L13 assume main_~i~0 == main_~range~0;main_~i~0 := 0;main_~range~0 := main_~range~0 - 1; 7022#L12-1 assume true; 7021#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 7019#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 7016#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 7013#L12-1 [2018-11-10 05:33:24,165 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 05:33:24,165 INFO L82 PathProgramCache]: Analyzing trace with hash -746691599, now seen corresponding path program 16 times [2018-11-10 05:33:24,165 INFO L225 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-10 05:33:24,165 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-10 05:33:24,167 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:33:24,167 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-10 05:33:24,167 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:33:24,173 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-10 05:33:24,178 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-10 05:33:24,181 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 05:33:24,181 INFO L82 PathProgramCache]: Analyzing trace with hash -1729133355, now seen corresponding path program 1 times [2018-11-10 05:33:24,181 INFO L225 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-10 05:33:24,181 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-10 05:33:24,182 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:33:24,182 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-10 05:33:24,182 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:33:24,183 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-10 05:33:24,183 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-10 05:33:24,184 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 05:33:24,184 INFO L82 PathProgramCache]: Analyzing trace with hash -2055014203, now seen corresponding path program 17 times [2018-11-10 05:33:24,184 INFO L225 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-10 05:33:24,184 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-10 05:33:24,185 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:33:24,185 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 05:33:24,185 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:33:24,190 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 05:33:24,247 INFO L134 CoverageAnalysis]: Checked inductivity of 1104 backedges. 92 proven. 252 refuted. 0 times theorem prover too weak. 760 trivial. 0 not checked. [2018-11-10 05:33:24,247 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-10 05:33:24,247 INFO L225 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_4b8fc6d8-f1f2-4752-b24c-26b6754cc212/bin-2019/uautomizer/z3 Starting monitored process 25 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 25 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-10 05:33:24,257 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-11-10 05:33:24,296 INFO L249 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 23 check-sat command(s) [2018-11-10 05:33:24,296 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-10 05:33:24,298 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 05:33:24,504 INFO L134 CoverageAnalysis]: Checked inductivity of 1104 backedges. 904 proven. 198 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-10 05:33:24,520 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-10 05:33:24,520 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 25] total 30 [2018-11-10 05:33:24,552 INFO L214 LassoAnalysis]: Preferences: [2018-11-10 05:33:24,552 INFO L124 ssoRankerPreferences]: Compute integeral hull: false [2018-11-10 05:33:24,552 INFO L125 ssoRankerPreferences]: Enable LassoPartitioneer: true [2018-11-10 05:33:24,552 INFO L126 ssoRankerPreferences]: Term annotations enabled: false [2018-11-10 05:33:24,552 INFO L127 ssoRankerPreferences]: Use exernal solver: true [2018-11-10 05:33:24,552 INFO L128 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2018-11-10 05:33:24,552 INFO L129 ssoRankerPreferences]: Dump SMT script to file: false [2018-11-10 05:33:24,552 INFO L130 ssoRankerPreferences]: Path of dumped script: [2018-11-10 05:33:24,552 INFO L131 ssoRankerPreferences]: Filename of dumped script: NarrowKonv_false-termination_true-no-overflow.c_Iteration17_Loop [2018-11-10 05:33:24,552 INFO L132 ssoRankerPreferences]: MapElimAlgo: Frank [2018-11-10 05:33:24,552 INFO L280 LassoAnalysis]: Starting lasso preprocessing... [2018-11-10 05:33:24,553 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-10 05:33:24,556 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-10 05:33:24,558 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-10 05:33:24,594 INFO L298 LassoAnalysis]: Preprocessing complete. [2018-11-10 05:33:24,594 INFO L410 LassoAnalysis]: Checking for nontermination... No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_4b8fc6d8-f1f2-4752-b24c-26b6754cc212/bin-2019/uautomizer/z3 Starting monitored process 26 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 26 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2018-11-10 05:33:24,597 INFO L151 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2018-11-10 05:33:24,597 INFO L163 nArgumentSynthesizer]: Using integer mode. [2018-11-10 05:33:24,612 INFO L443 LassoAnalysis]: Proved nontermination for one component. [2018-11-10 05:33:24,612 INFO L446 LassoAnalysis]: Non-Termination argument consisting of: Initial state: {v_rep~unnamed0~0~true_7=1} Honda state: {v_rep~unnamed0~0~true_7=1} Generalized eigenvectors: [] Lambdas: [] Nus: [] No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_4b8fc6d8-f1f2-4752-b24c-26b6754cc212/bin-2019/uautomizer/z3 Starting monitored process 27 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 27 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2018-11-10 05:33:24,615 INFO L151 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2018-11-10 05:33:24,615 INFO L163 nArgumentSynthesizer]: Using integer mode. [2018-11-10 05:33:24,631 INFO L443 LassoAnalysis]: Proved nontermination for one component. [2018-11-10 05:33:24,632 INFO L446 LassoAnalysis]: Non-Termination argument consisting of: Initial state: {v_rep~unnamed0~0~false_7=0} Honda state: {v_rep~unnamed0~0~false_7=0} Generalized eigenvectors: [] Lambdas: [] Nus: [] No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_4b8fc6d8-f1f2-4752-b24c-26b6754cc212/bin-2019/uautomizer/z3 Starting monitored process 28 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 28 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2018-11-10 05:33:24,636 INFO L151 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2018-11-10 05:33:24,636 INFO L163 nArgumentSynthesizer]: Using integer mode. No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_4b8fc6d8-f1f2-4752-b24c-26b6754cc212/bin-2019/uautomizer/z3 Starting monitored process 29 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 29 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2018-11-10 05:33:24,654 INFO L151 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 3 Nilpotent components: true [2018-11-10 05:33:24,654 INFO L163 nArgumentSynthesizer]: Using integer mode. [2018-11-10 05:33:24,726 INFO L450 LassoAnalysis]: Proving nontermination failed: No geometric nontermination argument exists. [2018-11-10 05:33:24,727 INFO L214 LassoAnalysis]: Preferences: [2018-11-10 05:33:24,727 INFO L124 ssoRankerPreferences]: Compute integeral hull: false [2018-11-10 05:33:24,727 INFO L125 ssoRankerPreferences]: Enable LassoPartitioneer: true [2018-11-10 05:33:24,727 INFO L126 ssoRankerPreferences]: Term annotations enabled: false [2018-11-10 05:33:24,727 INFO L127 ssoRankerPreferences]: Use exernal solver: false [2018-11-10 05:33:24,727 INFO L128 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2018-11-10 05:33:24,728 INFO L129 ssoRankerPreferences]: Dump SMT script to file: false [2018-11-10 05:33:24,728 INFO L130 ssoRankerPreferences]: Path of dumped script: [2018-11-10 05:33:24,728 INFO L131 ssoRankerPreferences]: Filename of dumped script: NarrowKonv_false-termination_true-no-overflow.c_Iteration17_Loop [2018-11-10 05:33:24,728 INFO L132 ssoRankerPreferences]: MapElimAlgo: Frank [2018-11-10 05:33:24,728 INFO L280 LassoAnalysis]: Starting lasso preprocessing... [2018-11-10 05:33:24,728 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-10 05:33:24,730 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-10 05:33:24,731 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-10 05:33:24,773 INFO L298 LassoAnalysis]: Preprocessing complete. [2018-11-10 05:33:24,773 INFO L496 LassoAnalysis]: Using template 'affine'. [2018-11-10 05:33:24,773 INFO L122 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSES Number of strict supporting invariants: 0 Number of non-strict supporting invariants: 1 Consider only non-deceasing supporting invariants: true Simplify termination arguments: true Simplify supporting invariants: trueOverapproximate stem: false [2018-11-10 05:33:24,774 INFO L339 nArgumentSynthesizer]: Template has degree 0. [2018-11-10 05:33:24,774 INFO L205 nArgumentSynthesizer]: 1 stem disjuncts [2018-11-10 05:33:24,774 INFO L206 nArgumentSynthesizer]: 1 loop disjuncts [2018-11-10 05:33:24,774 INFO L207 nArgumentSynthesizer]: 2 template conjuncts. [2018-11-10 05:33:24,775 INFO L402 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2018-11-10 05:33:24,775 INFO L403 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2018-11-10 05:33:24,776 INFO L529 LassoAnalysis]: Proving termination failed for this template and these settings. [2018-11-10 05:33:24,776 INFO L122 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSES Number of strict supporting invariants: 0 Number of non-strict supporting invariants: 1 Consider only non-deceasing supporting invariants: true Simplify termination arguments: true Simplify supporting invariants: trueOverapproximate stem: false [2018-11-10 05:33:24,777 INFO L339 nArgumentSynthesizer]: Template has degree 0. [2018-11-10 05:33:24,777 INFO L205 nArgumentSynthesizer]: 1 stem disjuncts [2018-11-10 05:33:24,777 INFO L206 nArgumentSynthesizer]: 1 loop disjuncts [2018-11-10 05:33:24,777 INFO L207 nArgumentSynthesizer]: 2 template conjuncts. [2018-11-10 05:33:24,778 INFO L402 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2018-11-10 05:33:24,778 INFO L403 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2018-11-10 05:33:24,779 INFO L529 LassoAnalysis]: Proving termination failed for this template and these settings. [2018-11-10 05:33:24,779 INFO L122 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSES Number of strict supporting invariants: 0 Number of non-strict supporting invariants: 1 Consider only non-deceasing supporting invariants: true Simplify termination arguments: true Simplify supporting invariants: trueOverapproximate stem: false [2018-11-10 05:33:24,779 INFO L339 nArgumentSynthesizer]: Template has degree 0. [2018-11-10 05:33:24,779 INFO L352 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2018-11-10 05:33:24,780 INFO L205 nArgumentSynthesizer]: 1 stem disjuncts [2018-11-10 05:33:24,780 INFO L206 nArgumentSynthesizer]: 1 loop disjuncts [2018-11-10 05:33:24,780 INFO L207 nArgumentSynthesizer]: 2 template conjuncts. [2018-11-10 05:33:24,780 INFO L402 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2018-11-10 05:33:24,780 INFO L403 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2018-11-10 05:33:24,782 INFO L421 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2018-11-10 05:33:24,785 INFO L443 ModelExtractionUtils]: Simplification made 3 calls to the SMT solver. [2018-11-10 05:33:24,785 INFO L444 ModelExtractionUtils]: 1 out of 4 variables were initially zero. Simplification set additionally 1 variables to zero. [2018-11-10 05:33:24,785 INFO L437 nArgumentSynthesizer]: Simplifying supporting invariants... [2018-11-10 05:33:24,785 INFO L440 nArgumentSynthesizer]: Removed 0 redundant supporting invariants from a total of 0. [2018-11-10 05:33:24,785 INFO L517 LassoAnalysis]: Proved termination. [2018-11-10 05:33:24,785 INFO L519 LassoAnalysis]: Termination argument consisting of: Ranking function f(ULTIMATE.start_main_~range~0) = 1*ULTIMATE.start_main_~range~0 Supporting invariants [] [2018-11-10 05:33:24,785 INFO L297 tatePredicateManager]: 0 out of 0 supporting invariants were superfluous and have been removed [2018-11-10 05:33:24,821 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 05:33:24,837 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 05:33:24,839 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 05:33:24,844 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 05:33:24,845 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 05:33:24,860 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 05:33:24,861 INFO L152 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.1 stem predicates 3 loop predicates [2018-11-10 05:33:24,861 INFO L72 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand 173 states and 194 transitions. cyclomatic complexity: 24 Second operand 5 states. [2018-11-10 05:33:24,881 INFO L76 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand 173 states and 194 transitions. cyclomatic complexity: 24. Second operand 5 states. Result 359 states and 404 transitions. Complement of second has 6 states. [2018-11-10 05:33:24,881 INFO L142 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 4 states 1 stem states 2 non-accepting loop states 1 accepting loop states [2018-11-10 05:33:24,882 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5 states. [2018-11-10 05:33:24,882 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 18 transitions. [2018-11-10 05:33:24,882 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 4 states and 18 transitions. Stem has 90 letters. Loop has 8 letters. [2018-11-10 05:33:24,882 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2018-11-10 05:33:24,882 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 4 states and 18 transitions. Stem has 98 letters. Loop has 8 letters. [2018-11-10 05:33:24,883 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2018-11-10 05:33:24,883 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 4 states and 18 transitions. Stem has 90 letters. Loop has 16 letters. [2018-11-10 05:33:24,883 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2018-11-10 05:33:24,883 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 359 states and 404 transitions. [2018-11-10 05:33:24,886 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3 [2018-11-10 05:33:24,887 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 359 states to 189 states and 211 transitions. [2018-11-10 05:33:24,887 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 15 [2018-11-10 05:33:24,887 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 19 [2018-11-10 05:33:24,887 INFO L73 IsDeterministic]: Start isDeterministic. Operand 189 states and 211 transitions. [2018-11-10 05:33:24,888 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2018-11-10 05:33:24,888 INFO L705 BuchiCegarLoop]: Abstraction has 189 states and 211 transitions. [2018-11-10 05:33:24,888 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 189 states and 211 transitions. [2018-11-10 05:33:24,890 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 189 to 181. [2018-11-10 05:33:24,890 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 181 states. [2018-11-10 05:33:24,890 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 181 states to 181 states and 202 transitions. [2018-11-10 05:33:24,890 INFO L728 BuchiCegarLoop]: Abstraction has 181 states and 202 transitions. [2018-11-10 05:33:24,890 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 30 interpolants. [2018-11-10 05:33:24,891 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=263, Invalid=607, Unknown=0, NotChecked=0, Total=870 [2018-11-10 05:33:24,891 INFO L87 Difference]: Start difference. First operand 181 states and 202 transitions. Second operand 30 states. [2018-11-10 05:33:25,595 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 05:33:25,595 INFO L93 Difference]: Finished difference Result 390 states and 429 transitions. [2018-11-10 05:33:25,595 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 68 states. [2018-11-10 05:33:25,595 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 390 states and 429 transitions. [2018-11-10 05:33:25,597 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3 [2018-11-10 05:33:25,598 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 390 states to 381 states and 420 transitions. [2018-11-10 05:33:25,598 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 33 [2018-11-10 05:33:25,598 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 33 [2018-11-10 05:33:25,598 INFO L73 IsDeterministic]: Start isDeterministic. Operand 381 states and 420 transitions. [2018-11-10 05:33:25,598 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2018-11-10 05:33:25,598 INFO L705 BuchiCegarLoop]: Abstraction has 381 states and 420 transitions. [2018-11-10 05:33:25,599 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 381 states and 420 transitions. [2018-11-10 05:33:25,601 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 381 to 201. [2018-11-10 05:33:25,601 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 201 states. [2018-11-10 05:33:25,602 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 201 states to 201 states and 222 transitions. [2018-11-10 05:33:25,602 INFO L728 BuchiCegarLoop]: Abstraction has 201 states and 222 transitions. [2018-11-10 05:33:25,602 INFO L608 BuchiCegarLoop]: Abstraction has 201 states and 222 transitions. [2018-11-10 05:33:25,602 INFO L442 BuchiCegarLoop]: ======== Iteration 18============ [2018-11-10 05:33:25,602 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 201 states and 222 transitions. [2018-11-10 05:33:25,603 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3 [2018-11-10 05:33:25,603 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2018-11-10 05:33:25,603 INFO L119 BuchiIsEmpty]: Starting construction of run [2018-11-10 05:33:25,604 INFO L866 BuchiCegarLoop]: Counterexample stem histogram [28, 28, 27, 23, 4, 1, 1, 1] [2018-11-10 05:33:25,604 INFO L867 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1] [2018-11-10 05:33:25,604 INFO L793 eck$LassoCheckResult]: Stem: 8877#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true; 8871#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res;havoc main_#t~nondet0, main_~i~0, main_~range~0;havoc main_~i~0;havoc main_~range~0;main_~i~0 := main_#t~nondet0;havoc main_#t~nondet0;main_~range~0 := 20; 8872#L12-1 assume true; 8903#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 8904#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 8884#L13 assume main_~i~0 == main_~range~0;main_~i~0 := 0;main_~range~0 := main_~range~0 - 1; 8885#L12-1 assume true; 8905#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 8886#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 8887#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 8878#L12-1 assume true; 8879#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 9065#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 9064#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 9063#L12-1 assume true; 9062#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 9061#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 9060#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 9059#L12-1 assume true; 9058#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 9057#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 9056#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 9055#L12-1 assume true; 9054#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 9053#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 9052#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 9051#L12-1 assume true; 9050#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 9049#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 9048#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 9047#L12-1 assume true; 9046#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 9045#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 9044#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 9043#L12-1 assume true; 9042#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 9041#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 9040#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 9039#L12-1 assume true; 9038#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 9037#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 9036#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 9035#L12-1 assume true; 9034#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 9033#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 9032#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 9031#L12-1 assume true; 9030#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 9029#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 9028#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 9027#L12-1 assume true; 9026#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 9025#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 9024#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 9023#L12-1 assume true; 9022#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 9021#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 9020#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 9019#L12-1 assume true; 9018#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 9017#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 9016#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 9015#L12-1 assume true; 9014#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 9013#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 9012#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 9011#L12-1 assume true; 9010#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 9009#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 9008#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 9007#L12-1 assume true; 9006#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 9005#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 9004#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 9003#L12-1 assume true; 9002#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 9001#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 9000#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 8999#L12-1 assume true; 8998#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 8997#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 8996#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 8995#L12-1 assume true; 8994#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 8993#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 8991#L13 assume main_~i~0 == main_~range~0;main_~i~0 := 0;main_~range~0 := main_~range~0 - 1; 8989#L12-1 assume true; 8987#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 8985#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 8983#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 8981#L12-1 assume true; 8979#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 8975#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 8976#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 8914#L12-1 assume true; 8913#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 8972#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 8971#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 8970#L12-1 assume true; 8907#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 8906#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 8902#L13 assume main_~i~0 == main_~range~0;main_~i~0 := 0;main_~range~0 := main_~range~0 - 1; 8901#L12-1 assume true; 8900#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 8899#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 8898#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 8890#L12-1 assume true; 8896#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 8895#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 8894#L13 assume main_~i~0 == main_~range~0;main_~i~0 := 0;main_~range~0 := main_~range~0 - 1; 8893#L12-1 assume true; 8892#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 8891#L12 assume !!(0 == main_~i~0 && main_~i~0 == main_~range~0); 8882#L12-1 [2018-11-10 05:33:25,604 INFO L795 eck$LassoCheckResult]: Loop: 8882#L12-1 assume true; 8888#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 8881#L12 assume !!(0 == main_~i~0 && main_~i~0 == main_~range~0); 8882#L12-1 [2018-11-10 05:33:25,604 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 05:33:25,604 INFO L82 PathProgramCache]: Analyzing trace with hash -2138499251, now seen corresponding path program 3 times [2018-11-10 05:33:25,605 INFO L225 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-10 05:33:25,605 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-10 05:33:25,605 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:33:25,605 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-10 05:33:25,606 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:33:25,612 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 05:33:25,676 INFO L134 CoverageAnalysis]: Checked inductivity of 1485 backedges. 275 proven. 440 refuted. 0 times theorem prover too weak. 770 trivial. 0 not checked. [2018-11-10 05:33:25,676 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-10 05:33:25,676 INFO L225 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_4b8fc6d8-f1f2-4752-b24c-26b6754cc212/bin-2019/uautomizer/z3 Starting monitored process 30 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 30 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-10 05:33:25,699 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-11-10 05:33:25,721 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 9 check-sat command(s) [2018-11-10 05:33:25,721 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-10 05:33:25,722 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 05:33:25,782 INFO L134 CoverageAnalysis]: Checked inductivity of 1485 backedges. 555 proven. 44 refuted. 0 times theorem prover too weak. 886 trivial. 0 not checked. [2018-11-10 05:33:25,799 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-10 05:33:25,800 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 7] total 16 [2018-11-10 05:33:25,800 INFO L798 eck$LassoCheckResult]: stem already infeasible [2018-11-10 05:33:25,800 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 05:33:25,800 INFO L82 PathProgramCache]: Analyzing trace with hash 35952, now seen corresponding path program 14 times [2018-11-10 05:33:25,800 INFO L225 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-10 05:33:25,800 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-10 05:33:25,801 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:33:25,801 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-10 05:33:25,801 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:33:25,802 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-10 05:33:25,802 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-10 05:33:25,812 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-11-10 05:33:25,812 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=59, Invalid=181, Unknown=0, NotChecked=0, Total=240 [2018-11-10 05:33:25,812 INFO L87 Difference]: Start difference. First operand 201 states and 222 transitions. cyclomatic complexity: 24 Second operand 16 states. [2018-11-10 05:33:26,092 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 05:33:26,092 INFO L93 Difference]: Finished difference Result 259 states and 285 transitions. [2018-11-10 05:33:26,093 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2018-11-10 05:33:26,094 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 259 states and 285 transitions. [2018-11-10 05:33:26,095 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3 [2018-11-10 05:33:26,095 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 259 states to 253 states and 279 transitions. [2018-11-10 05:33:26,096 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 17 [2018-11-10 05:33:26,096 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 17 [2018-11-10 05:33:26,096 INFO L73 IsDeterministic]: Start isDeterministic. Operand 253 states and 279 transitions. [2018-11-10 05:33:26,096 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2018-11-10 05:33:26,096 INFO L705 BuchiCegarLoop]: Abstraction has 253 states and 279 transitions. [2018-11-10 05:33:26,096 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 253 states and 279 transitions. [2018-11-10 05:33:26,098 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 253 to 217. [2018-11-10 05:33:26,098 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 217 states. [2018-11-10 05:33:26,099 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 217 states to 217 states and 239 transitions. [2018-11-10 05:33:26,099 INFO L728 BuchiCegarLoop]: Abstraction has 217 states and 239 transitions. [2018-11-10 05:33:26,099 INFO L608 BuchiCegarLoop]: Abstraction has 217 states and 239 transitions. [2018-11-10 05:33:26,099 INFO L442 BuchiCegarLoop]: ======== Iteration 19============ [2018-11-10 05:33:26,099 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 217 states and 239 transitions. [2018-11-10 05:33:26,100 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3 [2018-11-10 05:33:26,100 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2018-11-10 05:33:26,100 INFO L119 BuchiIsEmpty]: Starting construction of run [2018-11-10 05:33:26,101 INFO L866 BuchiCegarLoop]: Counterexample stem histogram [32, 32, 31, 26, 5, 1, 1, 1] [2018-11-10 05:33:26,101 INFO L867 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1] [2018-11-10 05:33:26,101 INFO L793 eck$LassoCheckResult]: Stem: 9736#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true; 9730#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res;havoc main_#t~nondet0, main_~i~0, main_~range~0;havoc main_~i~0;havoc main_~range~0;main_~i~0 := main_#t~nondet0;havoc main_#t~nondet0;main_~range~0 := 20; 9731#L12-1 assume true; 9757#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 9758#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 9744#L13 assume main_~i~0 == main_~range~0;main_~i~0 := 0;main_~range~0 := main_~range~0 - 1; 9745#L12-1 assume true; 9760#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 9746#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 9747#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 9737#L12-1 assume true; 9738#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 9943#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 9942#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 9941#L12-1 assume true; 9940#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 9939#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 9938#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 9937#L12-1 assume true; 9936#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 9935#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 9934#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 9933#L12-1 assume true; 9932#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 9931#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 9930#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 9929#L12-1 assume true; 9928#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 9927#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 9926#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 9925#L12-1 assume true; 9924#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 9923#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 9922#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 9921#L12-1 assume true; 9920#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 9919#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 9918#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 9917#L12-1 assume true; 9916#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 9915#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 9914#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 9913#L12-1 assume true; 9912#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 9911#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 9910#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 9909#L12-1 assume true; 9908#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 9907#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 9906#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 9905#L12-1 assume true; 9904#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 9903#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 9902#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 9901#L12-1 assume true; 9900#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 9899#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 9898#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 9897#L12-1 assume true; 9896#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 9895#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 9894#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 9893#L12-1 assume true; 9892#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 9891#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 9890#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 9889#L12-1 assume true; 9888#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 9887#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 9886#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 9885#L12-1 assume true; 9884#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 9883#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 9882#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 9881#L12-1 assume true; 9880#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 9879#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 9878#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 9877#L12-1 assume true; 9876#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 9875#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 9874#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 9873#L12-1 assume true; 9872#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 9871#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 9870#L13 assume main_~i~0 == main_~range~0;main_~i~0 := 0;main_~range~0 := main_~range~0 - 1; 9869#L12-1 assume true; 9868#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 9867#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 9866#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 9865#L12-1 assume true; 9864#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 9863#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 9862#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 9861#L12-1 assume true; 9860#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 9859#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 9858#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 9857#L12-1 assume true; 9856#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 9855#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 9854#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 9853#L12-1 assume true; 9851#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 9848#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 9845#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 9844#L12-1 assume true; 9785#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 9783#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 9781#L13 assume main_~i~0 == main_~range~0;main_~i~0 := 0;main_~range~0 := main_~range~0 - 1; 9779#L12-1 assume true; 9778#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 9777#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 9776#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 9775#L12-1 assume true; 9767#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 9766#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 9765#L13 assume main_~i~0 == main_~range~0;main_~i~0 := 0;main_~range~0 := main_~range~0 - 1; 9764#L12-1 assume true; 9763#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 9762#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 9761#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 9750#L12-1 assume true; 9756#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 9755#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 9754#L13 assume main_~i~0 == main_~range~0;main_~i~0 := 0;main_~range~0 := main_~range~0 - 1; 9753#L12-1 assume true; 9752#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 9751#L12 assume !!(0 == main_~i~0 && main_~i~0 == main_~range~0); 9742#L12-1 [2018-11-10 05:33:26,101 INFO L795 eck$LassoCheckResult]: Loop: 9742#L12-1 assume true; 9748#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 9741#L12 assume !!(0 == main_~i~0 && main_~i~0 == main_~range~0); 9742#L12-1 [2018-11-10 05:33:26,102 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 05:33:26,102 INFO L82 PathProgramCache]: Analyzing trace with hash 388167523, now seen corresponding path program 4 times [2018-11-10 05:33:26,102 INFO L225 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-10 05:33:26,102 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-10 05:33:26,102 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:33:26,103 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-10 05:33:26,103 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:33:26,109 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 05:33:26,158 INFO L134 CoverageAnalysis]: Checked inductivity of 1953 backedges. 540 proven. 6 refuted. 0 times theorem prover too weak. 1407 trivial. 0 not checked. [2018-11-10 05:33:26,158 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-10 05:33:26,158 INFO L225 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_4b8fc6d8-f1f2-4752-b24c-26b6754cc212/bin-2019/uautomizer/z3 Starting monitored process 31 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 31 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-10 05:33:26,166 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-11-10 05:33:26,186 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-11-10 05:33:26,186 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-10 05:33:26,188 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 05:33:26,474 INFO L134 CoverageAnalysis]: Checked inductivity of 1953 backedges. 1265 proven. 650 refuted. 0 times theorem prover too weak. 38 trivial. 0 not checked. [2018-11-10 05:33:26,490 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-10 05:33:26,490 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 28] total 35 [2018-11-10 05:33:26,491 INFO L798 eck$LassoCheckResult]: stem already infeasible [2018-11-10 05:33:26,491 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 05:33:26,491 INFO L82 PathProgramCache]: Analyzing trace with hash 35952, now seen corresponding path program 15 times [2018-11-10 05:33:26,491 INFO L225 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-10 05:33:26,491 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-10 05:33:26,491 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:33:26,491 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-10 05:33:26,492 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:33:26,492 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-10 05:33:26,493 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-10 05:33:26,500 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 35 interpolants. [2018-11-10 05:33:26,501 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=281, Invalid=909, Unknown=0, NotChecked=0, Total=1190 [2018-11-10 05:33:26,501 INFO L87 Difference]: Start difference. First operand 217 states and 239 transitions. cyclomatic complexity: 25 Second operand 35 states. [2018-11-10 05:33:27,028 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 05:33:27,028 INFO L93 Difference]: Finished difference Result 424 states and 460 transitions. [2018-11-10 05:33:27,028 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 49 states. [2018-11-10 05:33:27,029 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 424 states and 460 transitions. [2018-11-10 05:33:27,030 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3 [2018-11-10 05:33:27,031 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 424 states to 403 states and 439 transitions. [2018-11-10 05:33:27,032 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 32 [2018-11-10 05:33:27,032 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 38 [2018-11-10 05:33:27,032 INFO L73 IsDeterministic]: Start isDeterministic. Operand 403 states and 439 transitions. [2018-11-10 05:33:27,032 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2018-11-10 05:33:27,032 INFO L705 BuchiCegarLoop]: Abstraction has 403 states and 439 transitions. [2018-11-10 05:33:27,032 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 403 states and 439 transitions. [2018-11-10 05:33:27,035 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 403 to 209. [2018-11-10 05:33:27,035 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 209 states. [2018-11-10 05:33:27,036 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 209 states to 209 states and 228 transitions. [2018-11-10 05:33:27,036 INFO L728 BuchiCegarLoop]: Abstraction has 209 states and 228 transitions. [2018-11-10 05:33:27,036 INFO L608 BuchiCegarLoop]: Abstraction has 209 states and 228 transitions. [2018-11-10 05:33:27,036 INFO L442 BuchiCegarLoop]: ======== Iteration 20============ [2018-11-10 05:33:27,036 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 209 states and 228 transitions. [2018-11-10 05:33:27,037 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3 [2018-11-10 05:33:27,037 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2018-11-10 05:33:27,037 INFO L119 BuchiIsEmpty]: Starting construction of run [2018-11-10 05:33:27,038 INFO L866 BuchiCegarLoop]: Counterexample stem histogram [34, 34, 34, 29, 5, 1, 1] [2018-11-10 05:33:27,038 INFO L867 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1] [2018-11-10 05:33:27,038 INFO L793 eck$LassoCheckResult]: Stem: 10853#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true; 10847#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res;havoc main_#t~nondet0, main_~i~0, main_~range~0;havoc main_~i~0;havoc main_~range~0;main_~i~0 := main_#t~nondet0;havoc main_#t~nondet0;main_~range~0 := 20; 10848#L12-1 assume true; 10889#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 10861#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 10862#L13 assume main_~i~0 == main_~range~0;main_~i~0 := 0;main_~range~0 := main_~range~0 - 1; 10888#L12-1 assume true; 10863#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 10864#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 10860#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 10854#L12-1 assume true; 10855#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 11049#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 11048#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 11047#L12-1 assume true; 11046#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 11045#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 11044#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 11043#L12-1 assume true; 11042#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 11041#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 11040#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 11039#L12-1 assume true; 11038#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 11037#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 11036#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 11035#L12-1 assume true; 11034#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 11033#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 11032#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 11031#L12-1 assume true; 11030#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 11029#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 11028#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 11027#L12-1 assume true; 11026#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 11025#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 11024#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 11023#L12-1 assume true; 11022#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 11021#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 11020#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 11019#L12-1 assume true; 11018#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 11017#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 11016#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 11015#L12-1 assume true; 11014#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 11013#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 11012#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 11011#L12-1 assume true; 11010#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 11009#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 11008#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 11007#L12-1 assume true; 11006#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 11005#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 11004#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 11003#L12-1 assume true; 11002#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 11001#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 11000#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 10999#L12-1 assume true; 10998#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 10997#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 10996#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 10995#L12-1 assume true; 10994#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 10993#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 10992#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 10991#L12-1 assume true; 10990#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 10989#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 10988#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 10987#L12-1 assume true; 10986#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 10985#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 10984#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 10983#L12-1 assume true; 10893#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 10982#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 10981#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 10980#L12-1 assume true; 10979#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 10978#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 10977#L13 assume main_~i~0 == main_~range~0;main_~i~0 := 0;main_~range~0 := main_~range~0 - 1; 10976#L12-1 assume true; 10975#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 10974#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 10973#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 10972#L12-1 assume true; 10971#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 10970#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 10969#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 10968#L12-1 assume true; 10967#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 10966#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 10965#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 10964#L12-1 assume true; 10953#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 10952#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 10950#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 10916#L12-1 assume true; 10914#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 10912#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 10910#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 10908#L12-1 assume true; 10906#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 10904#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 10902#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 10899#L12-1 assume true; 10900#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 10951#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 10949#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 10948#L12-1 assume true; 10891#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 10890#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 10887#L13 assume main_~i~0 == main_~range~0;main_~i~0 := 0;main_~range~0 := main_~range~0 - 1; 10886#L12-1 assume true; 10885#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 10884#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 10883#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 10882#L12-1 assume true; 10870#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 10881#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 10880#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 10878#L12-1 assume true; 10877#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 10876#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 10875#L13 assume main_~i~0 == main_~range~0;main_~i~0 := 0;main_~range~0 := main_~range~0 - 1; 10874#L12-1 assume true; 10873#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 10872#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 10871#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 10869#L12-1 assume true; 10868#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 10867#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 10866#L13 assume main_~i~0 == main_~range~0;main_~i~0 := 0;main_~range~0 := main_~range~0 - 1; 10858#L12-1 [2018-11-10 05:33:27,038 INFO L795 eck$LassoCheckResult]: Loop: 10858#L12-1 assume true; 10865#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 10857#L12 assume !!(0 == main_~i~0 && main_~i~0 == main_~range~0); 10858#L12-1 [2018-11-10 05:33:27,038 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 05:33:27,039 INFO L82 PathProgramCache]: Analyzing trace with hash 580585455, now seen corresponding path program 18 times [2018-11-10 05:33:27,039 INFO L225 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-10 05:33:27,039 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-10 05:33:27,039 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:33:27,040 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-10 05:33:27,040 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:33:27,048 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 05:33:27,185 INFO L134 CoverageAnalysis]: Checked inductivity of 2244 backedges. 580 proven. 864 refuted. 0 times theorem prover too weak. 800 trivial. 0 not checked. [2018-11-10 05:33:27,186 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-10 05:33:27,186 INFO L225 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_4b8fc6d8-f1f2-4752-b24c-26b6754cc212/bin-2019/uautomizer/z3 Starting monitored process 32 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 32 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-10 05:33:27,201 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-11-10 05:33:27,246 INFO L249 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 25 check-sat command(s) [2018-11-10 05:33:27,246 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-10 05:33:27,248 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 05:33:27,326 INFO L134 CoverageAnalysis]: Checked inductivity of 2244 backedges. 962 proven. 118 refuted. 0 times theorem prover too weak. 1164 trivial. 0 not checked. [2018-11-10 05:33:27,343 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-10 05:33:27,343 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 9] total 22 [2018-11-10 05:33:27,343 INFO L798 eck$LassoCheckResult]: stem already infeasible [2018-11-10 05:33:27,343 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 05:33:27,344 INFO L82 PathProgramCache]: Analyzing trace with hash 35952, now seen corresponding path program 16 times [2018-11-10 05:33:27,344 INFO L225 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-10 05:33:27,344 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-10 05:33:27,344 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:33:27,344 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-10 05:33:27,345 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:33:27,345 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-10 05:33:27,346 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-10 05:33:27,368 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2018-11-10 05:33:27,368 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=106, Invalid=356, Unknown=0, NotChecked=0, Total=462 [2018-11-10 05:33:27,368 INFO L87 Difference]: Start difference. First operand 209 states and 228 transitions. cyclomatic complexity: 22 Second operand 22 states. [2018-11-10 05:33:27,809 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 05:33:27,809 INFO L93 Difference]: Finished difference Result 306 states and 329 transitions. [2018-11-10 05:33:27,809 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 40 states. [2018-11-10 05:33:27,810 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 306 states and 329 transitions. [2018-11-10 05:33:27,811 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3 [2018-11-10 05:33:27,812 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 306 states to 297 states and 320 transitions. [2018-11-10 05:33:27,812 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 21 [2018-11-10 05:33:27,812 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 21 [2018-11-10 05:33:27,812 INFO L73 IsDeterministic]: Start isDeterministic. Operand 297 states and 320 transitions. [2018-11-10 05:33:27,812 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2018-11-10 05:33:27,812 INFO L705 BuchiCegarLoop]: Abstraction has 297 states and 320 transitions. [2018-11-10 05:33:27,812 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 297 states and 320 transitions. [2018-11-10 05:33:27,815 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 297 to 261. [2018-11-10 05:33:27,815 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 261 states. [2018-11-10 05:33:27,816 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 261 states to 261 states and 280 transitions. [2018-11-10 05:33:27,816 INFO L728 BuchiCegarLoop]: Abstraction has 261 states and 280 transitions. [2018-11-10 05:33:27,816 INFO L608 BuchiCegarLoop]: Abstraction has 261 states and 280 transitions. [2018-11-10 05:33:27,816 INFO L442 BuchiCegarLoop]: ======== Iteration 21============ [2018-11-10 05:33:27,816 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 261 states and 280 transitions. [2018-11-10 05:33:27,817 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3 [2018-11-10 05:33:27,817 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2018-11-10 05:33:27,817 INFO L119 BuchiIsEmpty]: Starting construction of run [2018-11-10 05:33:27,818 INFO L866 BuchiCegarLoop]: Counterexample stem histogram [40, 40, 40, 34, 6, 1, 1] [2018-11-10 05:33:27,818 INFO L867 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1] [2018-11-10 05:33:27,819 INFO L793 eck$LassoCheckResult]: Stem: 11868#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true; 11862#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res;havoc main_#t~nondet0, main_~i~0, main_~range~0;havoc main_~i~0;havoc main_~range~0;main_~i~0 := main_#t~nondet0;havoc main_#t~nondet0;main_~range~0 := 20; 11863#L12-1 assume true; 11877#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 11878#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 11898#L13 assume main_~i~0 == main_~range~0;main_~i~0 := 0;main_~range~0 := main_~range~0 - 1; 11896#L12-1 assume true; 11897#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 11876#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 11875#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 11869#L12-1 assume true; 11870#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 12120#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 12119#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 12118#L12-1 assume true; 12117#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 12116#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 12115#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 12114#L12-1 assume true; 12113#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 12112#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 12111#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 12110#L12-1 assume true; 12109#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 12108#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 12107#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 12106#L12-1 assume true; 12105#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 12104#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 12103#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 12102#L12-1 assume true; 12101#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 12100#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 12099#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 12098#L12-1 assume true; 12097#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 12096#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 12095#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 12094#L12-1 assume true; 12093#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 12092#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 12091#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 12090#L12-1 assume true; 12089#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 12088#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 12087#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 12086#L12-1 assume true; 12085#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 12084#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 12083#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 12082#L12-1 assume true; 12081#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 12080#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 12079#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 12078#L12-1 assume true; 12077#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 12076#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 12075#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 12074#L12-1 assume true; 12073#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 12072#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 12071#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 12070#L12-1 assume true; 12069#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 12068#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 12067#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 12066#L12-1 assume true; 12065#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 12064#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 12063#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 12062#L12-1 assume true; 12061#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 12060#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 12059#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 12058#L12-1 assume true; 12057#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 12056#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 12055#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 12054#L12-1 assume true; 12053#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 12052#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 12051#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 12050#L12-1 assume true; 12049#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 12048#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 12047#L13 assume main_~i~0 == main_~range~0;main_~i~0 := 0;main_~range~0 := main_~range~0 - 1; 12046#L12-1 assume true; 12045#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 12044#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 12043#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 12042#L12-1 assume true; 12041#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 12040#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 12039#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 12038#L12-1 assume true; 12037#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 12036#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 12035#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 12034#L12-1 assume true; 12033#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 12032#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 12031#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 12030#L12-1 assume true; 12029#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 12027#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 12025#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 12023#L12-1 assume true; 12021#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 12019#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 12017#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 12015#L12-1 assume true; 12013#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 12011#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 12009#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 12007#L12-1 assume true; 11973#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 11971#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 11968#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 11969#L12-1 assume true; 11972#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 11970#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 11967#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 11966#L12-1 assume true; 11923#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 11922#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 11921#L13 assume main_~i~0 == main_~range~0;main_~i~0 := 0;main_~range~0 := main_~range~0 - 1; 11920#L12-1 assume true; 11919#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 11918#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 11917#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 11916#L12-1 assume true; 11915#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 11914#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 11913#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 11912#L12-1 assume true; 11893#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 11911#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 11910#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 11908#L12-1 assume true; 11907#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 11906#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 11905#L13 assume main_~i~0 == main_~range~0;main_~i~0 := 0;main_~range~0 := main_~range~0 - 1; 11904#L12-1 assume true; 11903#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 11902#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 11901#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 11900#L12-1 assume true; 11884#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 11895#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 11894#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 11892#L12-1 assume true; 11891#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 11890#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 11889#L13 assume main_~i~0 == main_~range~0;main_~i~0 := 0;main_~range~0 := main_~range~0 - 1; 11888#L12-1 assume true; 11887#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 11886#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 11885#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 11883#L12-1 assume true; 11882#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 11881#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 11880#L13 assume main_~i~0 == main_~range~0;main_~i~0 := 0;main_~range~0 := main_~range~0 - 1; 11873#L12-1 [2018-11-10 05:33:27,819 INFO L795 eck$LassoCheckResult]: Loop: 11873#L12-1 assume true; 11879#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 11872#L12 assume !!(0 == main_~i~0 && main_~i~0 == main_~range~0); 11873#L12-1 [2018-11-10 05:33:27,819 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 05:33:27,819 INFO L82 PathProgramCache]: Analyzing trace with hash -502055313, now seen corresponding path program 19 times [2018-11-10 05:33:27,819 INFO L225 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-10 05:33:27,819 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-10 05:33:27,820 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:33:27,820 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-10 05:33:27,820 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:33:27,829 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 05:33:27,941 INFO L134 CoverageAnalysis]: Checked inductivity of 3120 backedges. 1116 proven. 1100 refuted. 0 times theorem prover too weak. 904 trivial. 0 not checked. [2018-11-10 05:33:27,941 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-10 05:33:27,941 INFO L225 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_4b8fc6d8-f1f2-4752-b24c-26b6754cc212/bin-2019/uautomizer/z3 Starting monitored process 33 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 33 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-10 05:33:27,947 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 05:33:27,965 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 05:33:27,967 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 05:33:28,059 INFO L134 CoverageAnalysis]: Checked inductivity of 3120 backedges. 1116 proven. 1100 refuted. 0 times theorem prover too weak. 904 trivial. 0 not checked. [2018-11-10 05:33:28,076 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-10 05:33:28,076 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 14] total 26 [2018-11-10 05:33:28,076 INFO L798 eck$LassoCheckResult]: stem already infeasible [2018-11-10 05:33:28,077 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 05:33:28,077 INFO L82 PathProgramCache]: Analyzing trace with hash 35952, now seen corresponding path program 17 times [2018-11-10 05:33:28,077 INFO L225 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-10 05:33:28,077 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-10 05:33:28,077 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:33:28,077 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 05:33:28,078 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:33:28,078 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-10 05:33:28,079 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-10 05:33:28,090 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2018-11-10 05:33:28,090 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=236, Invalid=414, Unknown=0, NotChecked=0, Total=650 [2018-11-10 05:33:28,090 INFO L87 Difference]: Start difference. First operand 261 states and 280 transitions. cyclomatic complexity: 22 Second operand 26 states. [2018-11-10 05:33:28,267 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 05:33:28,267 INFO L93 Difference]: Finished difference Result 278 states and 297 transitions. [2018-11-10 05:33:28,267 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2018-11-10 05:33:28,267 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 278 states and 297 transitions. [2018-11-10 05:33:28,273 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3 [2018-11-10 05:33:28,274 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 278 states to 272 states and 291 transitions. [2018-11-10 05:33:28,274 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 18 [2018-11-10 05:33:28,274 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 18 [2018-11-10 05:33:28,274 INFO L73 IsDeterministic]: Start isDeterministic. Operand 272 states and 291 transitions. [2018-11-10 05:33:28,274 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2018-11-10 05:33:28,274 INFO L705 BuchiCegarLoop]: Abstraction has 272 states and 291 transitions. [2018-11-10 05:33:28,274 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 272 states and 291 transitions. [2018-11-10 05:33:28,280 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 272 to 269. [2018-11-10 05:33:28,280 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 269 states. [2018-11-10 05:33:28,281 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 269 states to 269 states and 288 transitions. [2018-11-10 05:33:28,281 INFO L728 BuchiCegarLoop]: Abstraction has 269 states and 288 transitions. [2018-11-10 05:33:28,281 INFO L608 BuchiCegarLoop]: Abstraction has 269 states and 288 transitions. [2018-11-10 05:33:28,281 INFO L442 BuchiCegarLoop]: ======== Iteration 22============ [2018-11-10 05:33:28,281 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 269 states and 288 transitions. [2018-11-10 05:33:28,282 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3 [2018-11-10 05:33:28,283 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2018-11-10 05:33:28,283 INFO L119 BuchiIsEmpty]: Starting construction of run [2018-11-10 05:33:28,283 INFO L866 BuchiCegarLoop]: Counterexample stem histogram [42, 42, 42, 36, 6, 1, 1] [2018-11-10 05:33:28,284 INFO L867 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1] [2018-11-10 05:33:28,284 INFO L793 eck$LassoCheckResult]: Stem: 12943#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true; 12937#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res;havoc main_#t~nondet0, main_~i~0, main_~range~0;havoc main_~i~0;havoc main_~range~0;main_~i~0 := main_#t~nondet0;havoc main_#t~nondet0;main_~range~0 := 20; 12938#L12-1 assume true; 12953#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 12951#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 12952#L13 assume main_~i~0 == main_~range~0;main_~i~0 := 0;main_~range~0 := main_~range~0 - 1; 12959#L12-1 assume true; 12963#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 12962#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 12950#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 12944#L12-1 assume true; 12945#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 13203#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 13202#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 13201#L12-1 assume true; 13200#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 13199#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 13198#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 13197#L12-1 assume true; 13196#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 13195#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 13194#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 13193#L12-1 assume true; 13192#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 13191#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 13190#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 13189#L12-1 assume true; 13188#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 13187#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 13186#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 13185#L12-1 assume true; 13184#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 13183#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 13182#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 13181#L12-1 assume true; 13180#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 13179#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 13178#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 13177#L12-1 assume true; 13176#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 13175#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 13174#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 13173#L12-1 assume true; 13172#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 13171#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 13170#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 13169#L12-1 assume true; 13168#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 13167#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 13166#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 13165#L12-1 assume true; 13164#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 13163#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 13162#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 13161#L12-1 assume true; 13160#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 13159#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 13158#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 13157#L12-1 assume true; 13156#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 13155#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 13154#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 13153#L12-1 assume true; 13152#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 13151#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 13150#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 13149#L12-1 assume true; 13148#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 13147#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 13146#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 13145#L12-1 assume true; 13144#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 13143#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 13142#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 13141#L12-1 assume true; 13140#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 13139#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 13138#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 13137#L12-1 assume true; 13136#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 13135#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 13134#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 13133#L12-1 assume true; 13132#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 13131#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 13130#L13 assume main_~i~0 == main_~range~0;main_~i~0 := 0;main_~range~0 := main_~range~0 - 1; 13129#L12-1 assume true; 13128#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 13127#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 13126#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 13125#L12-1 assume true; 13124#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 13123#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 13122#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 13121#L12-1 assume true; 13120#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 13119#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 13118#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 13117#L12-1 assume true; 13116#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 13115#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 13114#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 13113#L12-1 assume true; 13112#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 13111#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 13110#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 13109#L12-1 assume true; 13108#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 13107#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 13106#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 13105#L12-1 assume true; 13104#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 13103#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 13102#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 13101#L12-1 assume true; 13100#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 13099#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 13098#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 13097#L12-1 assume true; 13096#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 13095#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 13093#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 13091#L12-1 assume true; 13040#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 13038#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 13035#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 13036#L12-1 assume true; 13039#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 13037#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 13034#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 13033#L12-1 assume true; 13001#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 13000#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 12999#L13 assume main_~i~0 == main_~range~0;main_~i~0 := 0;main_~range~0 := main_~range~0 - 1; 12998#L12-1 assume true; 12997#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 12996#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 12995#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 12994#L12-1 assume true; 12993#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 12992#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 12991#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 12990#L12-1 assume true; 12975#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 12989#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 12988#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 12986#L12-1 assume true; 12985#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 12984#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 12983#L13 assume main_~i~0 == main_~range~0;main_~i~0 := 0;main_~range~0 := main_~range~0 - 1; 12982#L12-1 assume true; 12981#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 12980#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 12979#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 12978#L12-1 assume true; 12957#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 12977#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 12976#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 12974#L12-1 assume true; 12973#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 12972#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 12971#L13 assume main_~i~0 == main_~range~0;main_~i~0 := 0;main_~range~0 := main_~range~0 - 1; 12970#L12-1 assume true; 12968#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 12966#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 12965#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 12955#L12-1 assume true; 12956#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 12961#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 12960#L13 assume main_~i~0 == main_~range~0;main_~i~0 := 0;main_~range~0 := main_~range~0 - 1; 12948#L12-1 [2018-11-10 05:33:28,284 INFO L795 eck$LassoCheckResult]: Loop: 12948#L12-1 assume true; 12954#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 12947#L12 assume !!(0 == main_~i~0 && main_~i~0 == main_~range~0); 12948#L12-1 [2018-11-10 05:33:28,284 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 05:33:28,284 INFO L82 PathProgramCache]: Analyzing trace with hash -384033723, now seen corresponding path program 20 times [2018-11-10 05:33:28,284 INFO L225 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-10 05:33:28,284 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-10 05:33:28,285 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:33:28,285 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-10 05:33:28,285 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:33:28,296 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 05:33:28,449 INFO L134 CoverageAnalysis]: Checked inductivity of 3444 backedges. 1188 proven. 1352 refuted. 0 times theorem prover too weak. 904 trivial. 0 not checked. [2018-11-10 05:33:28,450 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-10 05:33:28,450 INFO L225 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_4b8fc6d8-f1f2-4752-b24c-26b6754cc212/bin-2019/uautomizer/z3 Starting monitored process 34 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 34 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-10 05:33:28,456 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-11-10 05:33:28,485 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-11-10 05:33:28,485 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-10 05:33:28,488 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 05:33:28,711 INFO L134 CoverageAnalysis]: Checked inductivity of 3444 backedges. 1188 proven. 1352 refuted. 0 times theorem prover too weak. 904 trivial. 0 not checked. [2018-11-10 05:33:28,726 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-10 05:33:28,726 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 16] total 30 [2018-11-10 05:33:28,727 INFO L798 eck$LassoCheckResult]: stem already infeasible [2018-11-10 05:33:28,727 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 05:33:28,727 INFO L82 PathProgramCache]: Analyzing trace with hash 35952, now seen corresponding path program 18 times [2018-11-10 05:33:28,727 INFO L225 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-10 05:33:28,727 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-10 05:33:28,728 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:33:28,728 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-10 05:33:28,728 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:33:28,728 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-10 05:33:28,729 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-10 05:33:28,740 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 30 interpolants. [2018-11-10 05:33:28,741 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=317, Invalid=553, Unknown=0, NotChecked=0, Total=870 [2018-11-10 05:33:28,741 INFO L87 Difference]: Start difference. First operand 269 states and 288 transitions. cyclomatic complexity: 22 Second operand 30 states. [2018-11-10 05:33:28,984 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 05:33:28,985 INFO L93 Difference]: Finished difference Result 286 states and 305 transitions. [2018-11-10 05:33:28,986 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2018-11-10 05:33:28,986 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 286 states and 305 transitions. [2018-11-10 05:33:28,987 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3 [2018-11-10 05:33:28,987 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 286 states to 280 states and 299 transitions. [2018-11-10 05:33:28,988 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 18 [2018-11-10 05:33:28,988 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 18 [2018-11-10 05:33:28,988 INFO L73 IsDeterministic]: Start isDeterministic. Operand 280 states and 299 transitions. [2018-11-10 05:33:28,988 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2018-11-10 05:33:28,988 INFO L705 BuchiCegarLoop]: Abstraction has 280 states and 299 transitions. [2018-11-10 05:33:28,988 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 280 states and 299 transitions. [2018-11-10 05:33:28,989 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 280 to 277. [2018-11-10 05:33:28,990 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 277 states. [2018-11-10 05:33:28,990 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 277 states to 277 states and 296 transitions. [2018-11-10 05:33:28,990 INFO L728 BuchiCegarLoop]: Abstraction has 277 states and 296 transitions. [2018-11-10 05:33:28,990 INFO L608 BuchiCegarLoop]: Abstraction has 277 states and 296 transitions. [2018-11-10 05:33:28,990 INFO L442 BuchiCegarLoop]: ======== Iteration 23============ [2018-11-10 05:33:28,990 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 277 states and 296 transitions. [2018-11-10 05:33:28,991 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3 [2018-11-10 05:33:28,991 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2018-11-10 05:33:28,991 INFO L119 BuchiIsEmpty]: Starting construction of run [2018-11-10 05:33:28,992 INFO L866 BuchiCegarLoop]: Counterexample stem histogram [44, 44, 44, 38, 6, 1, 1] [2018-11-10 05:33:28,992 INFO L867 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1] [2018-11-10 05:33:28,992 INFO L793 eck$LassoCheckResult]: Stem: 14066#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true; 14060#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res;havoc main_#t~nondet0, main_~i~0, main_~range~0;havoc main_~i~0;havoc main_~range~0;main_~i~0 := main_#t~nondet0;havoc main_#t~nondet0;main_~range~0 := 20; 14061#L12-1 assume true; 14077#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 14076#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 14073#L13 assume main_~i~0 == main_~range~0;main_~i~0 := 0;main_~range~0 := main_~range~0 - 1; 14074#L12-1 assume true; 14079#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 14088#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 14086#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 14067#L12-1 assume true; 14068#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 14335#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 14334#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 14333#L12-1 assume true; 14332#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 14331#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 14330#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 14329#L12-1 assume true; 14328#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 14327#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 14326#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 14325#L12-1 assume true; 14324#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 14323#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 14322#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 14321#L12-1 assume true; 14320#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 14319#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 14318#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 14317#L12-1 assume true; 14316#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 14315#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 14314#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 14313#L12-1 assume true; 14312#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 14311#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 14310#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 14309#L12-1 assume true; 14308#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 14307#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 14306#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 14305#L12-1 assume true; 14304#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 14303#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 14302#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 14301#L12-1 assume true; 14300#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 14299#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 14298#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 14297#L12-1 assume true; 14296#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 14295#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 14294#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 14293#L12-1 assume true; 14292#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 14291#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 14290#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 14289#L12-1 assume true; 14288#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 14287#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 14286#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 14285#L12-1 assume true; 14284#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 14283#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 14282#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 14281#L12-1 assume true; 14280#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 14279#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 14278#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 14277#L12-1 assume true; 14276#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 14275#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 14274#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 14273#L12-1 assume true; 14272#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 14271#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 14270#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 14269#L12-1 assume true; 14268#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 14267#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 14266#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 14265#L12-1 assume true; 14264#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 14263#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 14262#L13 assume main_~i~0 == main_~range~0;main_~i~0 := 0;main_~range~0 := main_~range~0 - 1; 14261#L12-1 assume true; 14260#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 14259#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 14258#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 14257#L12-1 assume true; 14256#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 14255#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 14254#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 14253#L12-1 assume true; 14252#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 14251#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 14250#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 14249#L12-1 assume true; 14248#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 14247#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 14246#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 14245#L12-1 assume true; 14244#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 14243#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 14242#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 14241#L12-1 assume true; 14240#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 14239#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 14238#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 14237#L12-1 assume true; 14236#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 14235#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 14234#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 14233#L12-1 assume true; 14232#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 14231#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 14230#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 14229#L12-1 assume true; 14228#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 14227#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 14226#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 14225#L12-1 assume true; 14224#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 14223#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 14222#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 14221#L12-1 assume true; 14220#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 14219#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 14218#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 14217#L12-1 assume true; 14156#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 14154#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 14151#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 14152#L12-1 assume true; 14155#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 14153#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 14150#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 14149#L12-1 assume true; 14125#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 14124#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 14123#L13 assume main_~i~0 == main_~range~0;main_~i~0 := 0;main_~range~0 := main_~range~0 - 1; 14122#L12-1 assume true; 14121#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 14120#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 14119#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 14118#L12-1 assume true; 14117#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 14116#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 14115#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 14114#L12-1 assume true; 14099#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 14113#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 14112#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 14110#L12-1 assume true; 14109#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 14108#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 14107#L13 assume main_~i~0 == main_~range~0;main_~i~0 := 0;main_~range~0 := main_~range~0 - 1; 14106#L12-1 assume true; 14105#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 14104#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 14103#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 14102#L12-1 assume true; 14082#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 14101#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 14100#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 14098#L12-1 assume true; 14097#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 14096#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 14090#L13 assume main_~i~0 == main_~range~0;main_~i~0 := 0;main_~range~0 := main_~range~0 - 1; 14089#L12-1 assume true; 14087#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 14085#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 14083#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 14080#L12-1 assume true; 14081#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 14093#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 14084#L13 assume main_~i~0 == main_~range~0;main_~i~0 := 0;main_~range~0 := main_~range~0 - 1; 14071#L12-1 [2018-11-10 05:33:28,992 INFO L795 eck$LassoCheckResult]: Loop: 14071#L12-1 assume true; 14078#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 14070#L12 assume !!(0 == main_~i~0 && main_~i~0 == main_~range~0); 14071#L12-1 [2018-11-10 05:33:28,992 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 05:33:28,993 INFO L82 PathProgramCache]: Analyzing trace with hash 1831650331, now seen corresponding path program 21 times [2018-11-10 05:33:28,993 INFO L225 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-10 05:33:28,993 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-10 05:33:28,993 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:33:28,994 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-10 05:33:28,994 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:33:29,004 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 05:33:29,201 INFO L134 CoverageAnalysis]: Checked inductivity of 3784 backedges. 1260 proven. 1620 refuted. 0 times theorem prover too weak. 904 trivial. 0 not checked. [2018-11-10 05:33:29,201 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-10 05:33:29,201 INFO L225 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_4b8fc6d8-f1f2-4752-b24c-26b6754cc212/bin-2019/uautomizer/z3 Starting monitored process 35 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 35 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-10 05:33:29,211 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-11-10 05:33:29,246 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 20 check-sat command(s) [2018-11-10 05:33:29,246 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-10 05:33:29,249 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 05:33:29,378 INFO L134 CoverageAnalysis]: Checked inductivity of 3784 backedges. 1760 proven. 306 refuted. 0 times theorem prover too weak. 1718 trivial. 0 not checked. [2018-11-10 05:33:29,394 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-10 05:33:29,394 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [20, 11] total 30 [2018-11-10 05:33:29,394 INFO L798 eck$LassoCheckResult]: stem already infeasible [2018-11-10 05:33:29,395 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 05:33:29,395 INFO L82 PathProgramCache]: Analyzing trace with hash 35952, now seen corresponding path program 19 times [2018-11-10 05:33:29,395 INFO L225 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-10 05:33:29,395 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-10 05:33:29,395 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:33:29,395 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-10 05:33:29,396 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:33:29,396 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-10 05:33:29,397 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-10 05:33:29,426 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 30 interpolants. [2018-11-10 05:33:29,426 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=206, Invalid=664, Unknown=0, NotChecked=0, Total=870 [2018-11-10 05:33:29,427 INFO L87 Difference]: Start difference. First operand 277 states and 296 transitions. cyclomatic complexity: 22 Second operand 30 states. [2018-11-10 05:33:30,219 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 05:33:30,219 INFO L93 Difference]: Finished difference Result 371 states and 397 transitions. [2018-11-10 05:33:30,220 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 59 states. [2018-11-10 05:33:30,220 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 371 states and 397 transitions. [2018-11-10 05:33:30,220 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3 [2018-11-10 05:33:30,221 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 371 states to 362 states and 388 transitions. [2018-11-10 05:33:30,221 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 22 [2018-11-10 05:33:30,221 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 22 [2018-11-10 05:33:30,221 INFO L73 IsDeterministic]: Start isDeterministic. Operand 362 states and 388 transitions. [2018-11-10 05:33:30,221 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2018-11-10 05:33:30,221 INFO L705 BuchiCegarLoop]: Abstraction has 362 states and 388 transitions. [2018-11-10 05:33:30,222 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 362 states and 388 transitions. [2018-11-10 05:33:30,224 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 362 to 301. [2018-11-10 05:33:30,224 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 301 states. [2018-11-10 05:33:30,224 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 301 states to 301 states and 321 transitions. [2018-11-10 05:33:30,224 INFO L728 BuchiCegarLoop]: Abstraction has 301 states and 321 transitions. [2018-11-10 05:33:30,224 INFO L608 BuchiCegarLoop]: Abstraction has 301 states and 321 transitions. [2018-11-10 05:33:30,224 INFO L442 BuchiCegarLoop]: ======== Iteration 24============ [2018-11-10 05:33:30,225 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 301 states and 321 transitions. [2018-11-10 05:33:30,225 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3 [2018-11-10 05:33:30,225 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2018-11-10 05:33:30,225 INFO L119 BuchiIsEmpty]: Starting construction of run [2018-11-10 05:33:30,226 INFO L866 BuchiCegarLoop]: Counterexample stem histogram [50, 50, 50, 43, 7, 1, 1] [2018-11-10 05:33:30,226 INFO L867 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1] [2018-11-10 05:33:30,227 INFO L793 eck$LassoCheckResult]: Stem: 15380#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true; 15374#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res;havoc main_#t~nondet0, main_~i~0, main_~range~0;havoc main_~i~0;havoc main_~range~0;main_~i~0 := main_#t~nondet0;havoc main_#t~nondet0;main_~range~0 := 20; 15375#L12-1 assume true; 15391#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 15392#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 15387#L13 assume main_~i~0 == main_~range~0;main_~i~0 := 0;main_~range~0 := main_~range~0 - 1; 15388#L12-1 assume true; 15409#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 15389#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 15390#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 15381#L12-1 assume true; 15382#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 15672#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 15671#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 15670#L12-1 assume true; 15669#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 15668#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 15667#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 15666#L12-1 assume true; 15665#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 15664#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 15663#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 15662#L12-1 assume true; 15661#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 15660#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 15659#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 15658#L12-1 assume true; 15657#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 15656#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 15655#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 15654#L12-1 assume true; 15653#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 15652#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 15651#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 15650#L12-1 assume true; 15649#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 15648#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 15647#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 15646#L12-1 assume true; 15645#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 15644#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 15643#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 15642#L12-1 assume true; 15641#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 15640#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 15639#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 15638#L12-1 assume true; 15637#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 15636#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 15635#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 15634#L12-1 assume true; 15633#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 15632#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 15631#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 15630#L12-1 assume true; 15629#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 15628#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 15627#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 15626#L12-1 assume true; 15625#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 15624#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 15623#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 15622#L12-1 assume true; 15621#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 15620#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 15619#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 15618#L12-1 assume true; 15617#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 15616#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 15615#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 15614#L12-1 assume true; 15613#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 15612#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 15611#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 15610#L12-1 assume true; 15609#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 15608#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 15607#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 15606#L12-1 assume true; 15605#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 15604#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 15603#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 15602#L12-1 assume true; 15601#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 15600#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 15599#L13 assume main_~i~0 == main_~range~0;main_~i~0 := 0;main_~range~0 := main_~range~0 - 1; 15598#L12-1 assume true; 15597#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 15596#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 15595#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 15594#L12-1 assume true; 15593#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 15592#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 15591#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 15590#L12-1 assume true; 15589#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 15588#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 15587#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 15586#L12-1 assume true; 15585#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 15584#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 15583#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 15582#L12-1 assume true; 15581#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 15580#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 15579#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 15578#L12-1 assume true; 15577#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 15576#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 15575#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 15574#L12-1 assume true; 15573#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 15572#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 15571#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 15570#L12-1 assume true; 15569#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 15568#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 15567#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 15566#L12-1 assume true; 15565#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 15564#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 15563#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 15562#L12-1 assume true; 15561#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 15560#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 15559#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 15558#L12-1 assume true; 15557#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 15556#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 15555#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 15554#L12-1 assume true; 15553#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 15552#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 15551#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 15550#L12-1 assume true; 15549#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 15548#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 15546#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 15544#L12-1 assume true; 15481#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 15479#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 15476#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 15477#L12-1 assume true; 15480#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 15478#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 15475#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 15474#L12-1 assume true; 15455#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 15454#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 15453#L13 assume main_~i~0 == main_~range~0;main_~i~0 := 0;main_~range~0 := main_~range~0 - 1; 15452#L12-1 assume true; 15451#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 15450#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 15449#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 15448#L12-1 assume true; 15447#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 15445#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 15443#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 15440#L12-1 assume true; 15441#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 15446#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 15444#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 15442#L12-1 assume true; 15435#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 15434#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 15433#L13 assume main_~i~0 == main_~range~0;main_~i~0 := 0;main_~range~0 := main_~range~0 - 1; 15432#L12-1 assume true; 15431#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 15430#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 15429#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 15428#L12-1 assume true; 15427#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 15426#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 15425#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 15424#L12-1 assume true; 15407#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 15423#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 15422#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 15420#L12-1 assume true; 15419#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 15418#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 15417#L13 assume main_~i~0 == main_~range~0;main_~i~0 := 0;main_~range~0 := main_~range~0 - 1; 15416#L12-1 assume true; 15415#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 15414#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 15413#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 15412#L12-1 assume true; 15398#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 15410#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 15408#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 15406#L12-1 assume true; 15405#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 15404#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 15403#L13 assume main_~i~0 == main_~range~0;main_~i~0 := 0;main_~range~0 := main_~range~0 - 1; 15402#L12-1 assume true; 15401#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 15400#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 15399#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 15397#L12-1 assume true; 15396#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 15395#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 15394#L13 assume main_~i~0 == main_~range~0;main_~i~0 := 0;main_~range~0 := main_~range~0 - 1; 15385#L12-1 [2018-11-10 05:33:30,227 INFO L795 eck$LassoCheckResult]: Loop: 15385#L12-1 assume true; 15393#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 15384#L12 assume !!(0 == main_~i~0 && main_~i~0 == main_~range~0); 15385#L12-1 [2018-11-10 05:33:30,227 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 05:33:30,227 INFO L82 PathProgramCache]: Analyzing trace with hash 1425282203, now seen corresponding path program 22 times [2018-11-10 05:33:30,227 INFO L225 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-10 05:33:30,227 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-10 05:33:30,228 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:33:30,228 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 05:33:30,228 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:33:30,237 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 05:33:30,353 INFO L134 CoverageAnalysis]: Checked inductivity of 4900 backedges. 2110 proven. 66 refuted. 0 times theorem prover too weak. 2724 trivial. 0 not checked. [2018-11-10 05:33:30,353 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-10 05:33:30,353 INFO L225 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_4b8fc6d8-f1f2-4752-b24c-26b6754cc212/bin-2019/uautomizer/z3 Starting monitored process 36 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 36 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-10 05:33:30,365 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-11-10 05:33:30,398 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-11-10 05:33:30,398 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-10 05:33:30,402 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 05:33:30,959 INFO L134 CoverageAnalysis]: Checked inductivity of 4900 backedges. 2716 proven. 1870 refuted. 0 times theorem prover too weak. 314 trivial. 0 not checked. [2018-11-10 05:33:30,975 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-10 05:33:30,975 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 38] total 49 [2018-11-10 05:33:30,976 INFO L798 eck$LassoCheckResult]: stem already infeasible [2018-11-10 05:33:30,976 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 05:33:30,976 INFO L82 PathProgramCache]: Analyzing trace with hash 35952, now seen corresponding path program 20 times [2018-11-10 05:33:30,976 INFO L225 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-10 05:33:30,976 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-10 05:33:30,976 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:33:30,976 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-10 05:33:30,977 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:33:30,977 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-10 05:33:30,977 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-10 05:33:30,985 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 49 interpolants. [2018-11-10 05:33:30,986 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=442, Invalid=1910, Unknown=0, NotChecked=0, Total=2352 [2018-11-10 05:33:30,986 INFO L87 Difference]: Start difference. First operand 301 states and 321 transitions. cyclomatic complexity: 23 Second operand 49 states. [2018-11-10 05:33:31,748 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 05:33:31,748 INFO L93 Difference]: Finished difference Result 550 states and 585 transitions. [2018-11-10 05:33:31,748 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 66 states. [2018-11-10 05:33:31,748 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 550 states and 585 transitions. [2018-11-10 05:33:31,749 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3 [2018-11-10 05:33:31,750 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 550 states to 502 states and 536 transitions. [2018-11-10 05:33:31,751 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 35 [2018-11-10 05:33:31,751 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 55 [2018-11-10 05:33:31,751 INFO L73 IsDeterministic]: Start isDeterministic. Operand 502 states and 536 transitions. [2018-11-10 05:33:31,751 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2018-11-10 05:33:31,751 INFO L705 BuchiCegarLoop]: Abstraction has 502 states and 536 transitions. [2018-11-10 05:33:31,751 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 502 states and 536 transitions. [2018-11-10 05:33:31,754 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 502 to 277. [2018-11-10 05:33:31,755 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 277 states. [2018-11-10 05:33:31,755 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 277 states to 277 states and 294 transitions. [2018-11-10 05:33:31,755 INFO L728 BuchiCegarLoop]: Abstraction has 277 states and 294 transitions. [2018-11-10 05:33:31,755 INFO L608 BuchiCegarLoop]: Abstraction has 277 states and 294 transitions. [2018-11-10 05:33:31,755 INFO L442 BuchiCegarLoop]: ======== Iteration 25============ [2018-11-10 05:33:31,756 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 277 states and 294 transitions. [2018-11-10 05:33:31,756 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3 [2018-11-10 05:33:31,756 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2018-11-10 05:33:31,756 INFO L119 BuchiIsEmpty]: Starting construction of run [2018-11-10 05:33:31,757 INFO L866 BuchiCegarLoop]: Counterexample stem histogram [53, 53, 53, 46, 7, 1, 1] [2018-11-10 05:33:31,757 INFO L867 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1] [2018-11-10 05:33:31,758 INFO L793 eck$LassoCheckResult]: Stem: 16979#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true; 16973#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res;havoc main_#t~nondet0, main_~i~0, main_~range~0;havoc main_~i~0;havoc main_~range~0;main_~i~0 := main_#t~nondet0;havoc main_#t~nondet0;main_~range~0 := 20; 16974#L12-1 assume true; 16990#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 16991#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 16986#L13 assume main_~i~0 == main_~range~0;main_~i~0 := 0;main_~range~0 := main_~range~0 - 1; 16987#L12-1 assume true; 17051#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 16988#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 16989#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 16980#L12-1 assume true; 16981#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 17243#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 17242#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 17241#L12-1 assume true; 17240#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 17239#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 17238#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 17237#L12-1 assume true; 17236#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 17235#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 17234#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 17233#L12-1 assume true; 17232#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 17231#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 17230#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 17229#L12-1 assume true; 17228#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 17227#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 17226#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 17225#L12-1 assume true; 17224#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 17223#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 17222#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 17221#L12-1 assume true; 17220#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 17219#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 17218#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 17217#L12-1 assume true; 17216#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 17215#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 17214#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 17213#L12-1 assume true; 17212#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 17211#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 17210#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 17209#L12-1 assume true; 17208#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 17207#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 17206#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 17205#L12-1 assume true; 17204#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 17203#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 17202#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 17201#L12-1 assume true; 17200#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 17199#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 17198#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 17197#L12-1 assume true; 17196#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 17195#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 17194#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 17193#L12-1 assume true; 17192#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 17191#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 17190#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 17189#L12-1 assume true; 17188#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 17187#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 17186#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 17185#L12-1 assume true; 17184#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 17183#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 17182#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 17181#L12-1 assume true; 17180#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 17179#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 17178#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 17177#L12-1 assume true; 17055#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 17176#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 17175#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 17174#L12-1 assume true; 17173#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 17172#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 17171#L13 assume main_~i~0 == main_~range~0;main_~i~0 := 0;main_~range~0 := main_~range~0 - 1; 17170#L12-1 assume true; 17169#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 17168#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 17167#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 17166#L12-1 assume true; 17165#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 17164#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 17163#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 17162#L12-1 assume true; 17161#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 17160#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 17159#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 17158#L12-1 assume true; 17157#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 17156#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 17155#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 17154#L12-1 assume true; 17153#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 17152#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 17151#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 17150#L12-1 assume true; 17149#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 17148#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 17147#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 17146#L12-1 assume true; 17145#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 17144#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 17143#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 17142#L12-1 assume true; 17141#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 17140#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 17139#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 17138#L12-1 assume true; 17137#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 17136#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 17135#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 17134#L12-1 assume true; 17133#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 17132#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 17131#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 17130#L12-1 assume true; 17129#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 17128#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 17127#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 17126#L12-1 assume true; 17125#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 17124#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 17123#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 17122#L12-1 assume true; 17121#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 17120#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 17119#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 17118#L12-1 assume true; 17117#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 17074#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 17073#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 17071#L12-1 assume true; 17070#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 17069#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 17068#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 17067#L12-1 assume true; 17066#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 17065#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 17064#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 17061#L12-1 assume true; 17062#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 17072#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 17063#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 17054#L12-1 assume true; 17053#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 17052#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 17050#L13 assume main_~i~0 == main_~range~0;main_~i~0 := 0;main_~range~0 := main_~range~0 - 1; 17049#L12-1 assume true; 17048#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 17047#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 17046#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 17045#L12-1 assume true; 17044#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 17043#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 17042#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 17041#L12-1 assume true; 17040#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 17039#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 17038#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 17037#L12-1 assume true; 17017#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 17036#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 17035#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 17033#L12-1 assume true; 17032#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 17031#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 17030#L13 assume main_~i~0 == main_~range~0;main_~i~0 := 0;main_~range~0 := main_~range~0 - 1; 17029#L12-1 assume true; 17028#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 17027#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 17026#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 17025#L12-1 assume true; 17024#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 17023#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 17022#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 17021#L12-1 assume true; 17020#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 17019#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 17018#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 17016#L12-1 assume true; 17015#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 17014#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 17013#L13 assume main_~i~0 == main_~range~0;main_~i~0 := 0;main_~range~0 := main_~range~0 - 1; 17012#L12-1 assume true; 17011#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 17010#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 17009#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 17008#L12-1 assume true; 17007#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 17006#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 17005#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 17004#L12-1 assume true; 17003#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 17002#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 17001#L13 assume main_~i~0 == main_~range~0;main_~i~0 := 0;main_~range~0 := main_~range~0 - 1; 17000#L12-1 assume true; 16999#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 16998#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 16997#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 16996#L12-1 assume true; 16995#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 16994#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 16993#L13 assume main_~i~0 == main_~range~0;main_~i~0 := 0;main_~range~0 := main_~range~0 - 1; 16984#L12-1 [2018-11-10 05:33:31,758 INFO L795 eck$LassoCheckResult]: Loop: 16984#L12-1 assume true; 16992#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 16983#L12 assume !!(0 == main_~i~0 && main_~i~0 == main_~range~0); 16984#L12-1 [2018-11-10 05:33:31,758 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 05:33:31,758 INFO L82 PathProgramCache]: Analyzing trace with hash 409069852, now seen corresponding path program 23 times [2018-11-10 05:33:31,758 INFO L225 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-10 05:33:31,758 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-10 05:33:31,759 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:33:31,759 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-10 05:33:31,759 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:33:31,770 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 05:33:32,031 INFO L134 CoverageAnalysis]: Checked inductivity of 5512 backedges. 2184 proven. 2204 refuted. 0 times theorem prover too weak. 1124 trivial. 0 not checked. [2018-11-10 05:33:32,031 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-10 05:33:32,031 INFO L225 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_4b8fc6d8-f1f2-4752-b24c-26b6754cc212/bin-2019/uautomizer/z3 Starting monitored process 37 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 37 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-10 05:33:32,038 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-11-10 05:33:32,085 INFO L249 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 42 check-sat command(s) [2018-11-10 05:33:32,086 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-10 05:33:32,088 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 05:33:32,373 INFO L134 CoverageAnalysis]: Checked inductivity of 5512 backedges. 4094 proven. 434 refuted. 0 times theorem prover too weak. 984 trivial. 0 not checked. [2018-11-10 05:33:32,389 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-10 05:33:32,389 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [24, 26] total 48 [2018-11-10 05:33:32,389 INFO L798 eck$LassoCheckResult]: stem already infeasible [2018-11-10 05:33:32,389 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 05:33:32,389 INFO L82 PathProgramCache]: Analyzing trace with hash 35952, now seen corresponding path program 21 times [2018-11-10 05:33:32,389 INFO L225 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-10 05:33:32,389 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-10 05:33:32,390 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:33:32,390 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-10 05:33:32,390 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:33:32,391 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-10 05:33:32,391 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-10 05:33:32,399 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 48 interpolants. [2018-11-10 05:33:32,400 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=531, Invalid=1725, Unknown=0, NotChecked=0, Total=2256 [2018-11-10 05:33:32,400 INFO L87 Difference]: Start difference. First operand 277 states and 294 transitions. cyclomatic complexity: 20 Second operand 48 states. [2018-11-10 05:33:36,251 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 05:33:36,251 INFO L93 Difference]: Finished difference Result 1251 states and 1284 transitions. [2018-11-10 05:33:36,252 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 214 states. [2018-11-10 05:33:36,252 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1251 states and 1284 transitions. [2018-11-10 05:33:36,254 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3 [2018-11-10 05:33:36,256 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1251 states to 1014 states and 1047 transitions. [2018-11-10 05:33:36,256 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 54 [2018-11-10 05:33:36,256 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 54 [2018-11-10 05:33:36,256 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1014 states and 1047 transitions. [2018-11-10 05:33:36,256 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2018-11-10 05:33:36,256 INFO L705 BuchiCegarLoop]: Abstraction has 1014 states and 1047 transitions. [2018-11-10 05:33:36,257 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1014 states and 1047 transitions. [2018-11-10 05:33:36,263 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1014 to 857. [2018-11-10 05:33:36,263 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 857 states. [2018-11-10 05:33:36,264 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 857 states to 857 states and 874 transitions. [2018-11-10 05:33:36,264 INFO L728 BuchiCegarLoop]: Abstraction has 857 states and 874 transitions. [2018-11-10 05:33:36,264 INFO L608 BuchiCegarLoop]: Abstraction has 857 states and 874 transitions. [2018-11-10 05:33:36,265 INFO L442 BuchiCegarLoop]: ======== Iteration 26============ [2018-11-10 05:33:36,265 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 857 states and 874 transitions. [2018-11-10 05:33:36,266 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3 [2018-11-10 05:33:36,267 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2018-11-10 05:33:36,267 INFO L119 BuchiIsEmpty]: Starting construction of run [2018-11-10 05:33:36,272 INFO L866 BuchiCegarLoop]: Counterexample stem histogram [210, 210, 210, 190, 20, 1, 1] [2018-11-10 05:33:36,272 INFO L867 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1] [2018-11-10 05:33:36,273 INFO L793 eck$LassoCheckResult]: Stem: 19581#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true; 19575#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res;havoc main_#t~nondet0, main_~i~0, main_~range~0;havoc main_~i~0;havoc main_~range~0;main_~i~0 := main_#t~nondet0;havoc main_#t~nondet0;main_~range~0 := 20; 19576#L12-1 assume true; 19592#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 19593#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 19588#L13 assume main_~i~0 == main_~range~0;main_~i~0 := 0;main_~range~0 := main_~range~0 - 1; 19589#L12-1 assume true; 19639#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 19590#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 19591#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 19582#L12-1 assume true; 19583#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 20425#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 20424#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 20423#L12-1 assume true; 20422#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 20421#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 20420#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 20419#L12-1 assume true; 20418#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 20417#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 20416#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 20415#L12-1 assume true; 20414#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 20413#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 20412#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 20411#L12-1 assume true; 20410#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 20409#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 20408#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 20407#L12-1 assume true; 20406#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 20405#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 20404#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 20403#L12-1 assume true; 20402#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 20401#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 20400#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 20399#L12-1 assume true; 20398#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 20397#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 20396#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 20395#L12-1 assume true; 20394#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 20393#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 20392#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 20391#L12-1 assume true; 20390#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 20389#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 20388#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 20387#L12-1 assume true; 20386#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 20385#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 20384#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 20383#L12-1 assume true; 20382#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 20381#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 20380#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 20379#L12-1 assume true; 20378#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 20377#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 20376#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 20375#L12-1 assume true; 20374#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 20373#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 20372#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 20371#L12-1 assume true; 20370#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 20369#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 20368#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 20367#L12-1 assume true; 20366#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 20365#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 20364#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 20363#L12-1 assume true; 20362#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 20361#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 20360#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 20359#L12-1 assume true; 20358#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 20357#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 20356#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 20355#L12-1 assume true; 20354#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 20353#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 20352#L13 assume main_~i~0 == main_~range~0;main_~i~0 := 0;main_~range~0 := main_~range~0 - 1; 20351#L12-1 assume true; 20350#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 20349#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 20348#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 20347#L12-1 assume true; 20346#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 20345#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 20344#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 20343#L12-1 assume true; 20342#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 20341#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 20340#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 20339#L12-1 assume true; 20338#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 20337#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 20336#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 20335#L12-1 assume true; 20334#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 20333#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 20332#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 20331#L12-1 assume true; 20330#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 20329#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 20328#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 20327#L12-1 assume true; 20326#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 20325#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 20324#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 20323#L12-1 assume true; 20322#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 20321#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 20320#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 20319#L12-1 assume true; 20318#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 20317#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 20316#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 20315#L12-1 assume true; 20314#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 20313#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 20312#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 20311#L12-1 assume true; 20310#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 20309#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 20308#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 20307#L12-1 assume true; 20306#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 20305#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 20304#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 20303#L12-1 assume true; 20302#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 20301#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 20300#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 20299#L12-1 assume true; 20298#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 20297#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 20296#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 20295#L12-1 assume true; 20294#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 20293#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 20292#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 20291#L12-1 assume true; 20290#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 20289#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 20288#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 20287#L12-1 assume true; 20286#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 20285#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 20284#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 20283#L12-1 assume true; 20209#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 20282#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 20281#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 20280#L12-1 assume true; 20279#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 20278#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 20277#L13 assume main_~i~0 == main_~range~0;main_~i~0 := 0;main_~range~0 := main_~range~0 - 1; 20276#L12-1 assume true; 20275#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 20274#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 20273#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 20272#L12-1 assume true; 20271#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 20270#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 20269#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 20268#L12-1 assume true; 20267#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 20266#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 20265#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 20264#L12-1 assume true; 20263#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 20262#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 20261#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 20260#L12-1 assume true; 20259#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 20258#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 20257#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 20256#L12-1 assume true; 20255#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 20254#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 20253#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 20252#L12-1 assume true; 20251#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 20250#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 20249#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 20248#L12-1 assume true; 20247#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 20246#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 20245#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 20244#L12-1 assume true; 20243#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 20242#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 20241#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 20240#L12-1 assume true; 20239#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 20238#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 20237#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 20236#L12-1 assume true; 20235#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 20234#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 20233#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 20232#L12-1 assume true; 20231#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 20230#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 20229#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 20228#L12-1 assume true; 20227#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 20226#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 20225#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 20224#L12-1 assume true; 20223#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 20222#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 20221#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 20220#L12-1 assume true; 20219#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 20218#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 20217#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 20216#L12-1 assume true; 20215#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 20214#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 20213#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 20212#L12-1 assume true; 20141#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 20211#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 20210#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 20208#L12-1 assume true; 20207#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 20206#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 20205#L13 assume main_~i~0 == main_~range~0;main_~i~0 := 0;main_~range~0 := main_~range~0 - 1; 20204#L12-1 assume true; 20203#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 20202#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 20201#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 20200#L12-1 assume true; 20199#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 20198#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 20197#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 20196#L12-1 assume true; 20195#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 20194#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 20193#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 20192#L12-1 assume true; 20191#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 20190#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 20189#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 20188#L12-1 assume true; 20187#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 20186#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 20185#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 20184#L12-1 assume true; 20183#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 20182#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 20181#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 20180#L12-1 assume true; 20179#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 20178#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 20177#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 20176#L12-1 assume true; 20175#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 20174#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 20173#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 20172#L12-1 assume true; 20171#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 20170#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 20169#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 20168#L12-1 assume true; 20167#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 20166#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 20165#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 20164#L12-1 assume true; 20163#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 20162#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 20161#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 20160#L12-1 assume true; 20159#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 20158#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 20157#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 20156#L12-1 assume true; 20155#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 20154#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 20153#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 20152#L12-1 assume true; 20151#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 20150#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 20149#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 20148#L12-1 assume true; 20147#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 20146#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 20145#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 20144#L12-1 assume true; 20077#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 20143#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 20142#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 20140#L12-1 assume true; 20139#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 20138#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 20137#L13 assume main_~i~0 == main_~range~0;main_~i~0 := 0;main_~range~0 := main_~range~0 - 1; 20136#L12-1 assume true; 20135#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 20134#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 20133#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 20132#L12-1 assume true; 20131#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 20130#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 20129#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 20128#L12-1 assume true; 20127#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 20126#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 20125#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 20124#L12-1 assume true; 20123#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 20122#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 20121#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 20120#L12-1 assume true; 20119#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 20118#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 20117#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 20116#L12-1 assume true; 20115#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 20114#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 20113#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 20112#L12-1 assume true; 20111#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 20110#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 20109#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 20108#L12-1 assume true; 20107#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 20106#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 20105#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 20104#L12-1 assume true; 20103#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 20102#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 20101#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 20100#L12-1 assume true; 20099#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 20098#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 20097#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 20096#L12-1 assume true; 20095#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 20094#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 20093#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 20092#L12-1 assume true; 20091#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 20090#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 20089#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 20088#L12-1 assume true; 20087#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 20086#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 20085#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 20084#L12-1 assume true; 20083#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 20082#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 20081#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 20080#L12-1 assume true; 20017#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 20079#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 20078#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 20076#L12-1 assume true; 20075#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 20074#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 20073#L13 assume main_~i~0 == main_~range~0;main_~i~0 := 0;main_~range~0 := main_~range~0 - 1; 20072#L12-1 assume true; 20071#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 20070#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 20069#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 20068#L12-1 assume true; 20067#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 20066#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 20065#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 20064#L12-1 assume true; 20063#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 20062#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 20061#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 20060#L12-1 assume true; 20059#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 20058#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 20057#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 20056#L12-1 assume true; 20055#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 20054#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 20053#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 20052#L12-1 assume true; 20051#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 20050#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 20049#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 20048#L12-1 assume true; 20047#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 20046#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 20045#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 20044#L12-1 assume true; 20043#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 20042#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 20041#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 20040#L12-1 assume true; 20039#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 20038#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 20037#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 20036#L12-1 assume true; 20035#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 20034#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 20033#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 20032#L12-1 assume true; 20031#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 20030#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 20029#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 20028#L12-1 assume true; 20027#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 20026#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 20025#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 20024#L12-1 assume true; 20023#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 20022#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 20021#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 20020#L12-1 assume true; 19961#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 20019#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 20018#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 20016#L12-1 assume true; 20015#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 20014#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 20013#L13 assume main_~i~0 == main_~range~0;main_~i~0 := 0;main_~range~0 := main_~range~0 - 1; 20012#L12-1 assume true; 20011#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 20010#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 20009#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 20008#L12-1 assume true; 20007#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 20006#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 20005#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 20004#L12-1 assume true; 20003#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 20002#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 20001#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 20000#L12-1 assume true; 19999#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 19998#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 19997#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 19996#L12-1 assume true; 19995#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 19994#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 19993#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 19992#L12-1 assume true; 19991#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 19990#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 19989#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 19988#L12-1 assume true; 19987#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 19986#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 19985#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 19984#L12-1 assume true; 19983#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 19982#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 19981#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 19980#L12-1 assume true; 19979#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 19978#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 19977#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 19976#L12-1 assume true; 19975#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 19974#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 19973#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 19972#L12-1 assume true; 19971#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 19970#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 19969#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 19968#L12-1 assume true; 19967#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 19966#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 19965#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 19964#L12-1 assume true; 19909#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 19963#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 19962#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 19960#L12-1 assume true; 19959#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 19958#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 19957#L13 assume main_~i~0 == main_~range~0;main_~i~0 := 0;main_~range~0 := main_~range~0 - 1; 19956#L12-1 assume true; 19955#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 19954#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 19953#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 19952#L12-1 assume true; 19951#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 19950#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 19949#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 19948#L12-1 assume true; 19947#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 19946#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 19945#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 19944#L12-1 assume true; 19943#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 19942#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 19941#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 19940#L12-1 assume true; 19939#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 19938#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 19937#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 19936#L12-1 assume true; 19935#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 19934#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 19933#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 19932#L12-1 assume true; 19931#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 19930#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 19929#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 19928#L12-1 assume true; 19927#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 19926#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 19925#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 19924#L12-1 assume true; 19923#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 19922#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 19921#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 19920#L12-1 assume true; 19919#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 19918#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 19917#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 19916#L12-1 assume true; 19915#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 19914#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 19913#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 19912#L12-1 assume true; 19861#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 19911#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 19910#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 19908#L12-1 assume true; 19907#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 19906#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 19905#L13 assume main_~i~0 == main_~range~0;main_~i~0 := 0;main_~range~0 := main_~range~0 - 1; 19904#L12-1 assume true; 19903#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 19902#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 19901#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 19900#L12-1 assume true; 19899#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 19898#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 19897#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 19896#L12-1 assume true; 19895#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 19894#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 19893#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 19892#L12-1 assume true; 19891#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 19890#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 19889#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 19888#L12-1 assume true; 19887#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 19886#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 19885#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 19884#L12-1 assume true; 19883#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 19882#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 19881#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 19880#L12-1 assume true; 19879#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 19878#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 19877#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 19876#L12-1 assume true; 19875#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 19874#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 19873#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 19872#L12-1 assume true; 19871#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 19870#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 19869#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 19868#L12-1 assume true; 19867#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 19866#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 19865#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 19864#L12-1 assume true; 19817#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 19863#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 19862#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 19860#L12-1 assume true; 19859#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 19858#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 19857#L13 assume main_~i~0 == main_~range~0;main_~i~0 := 0;main_~range~0 := main_~range~0 - 1; 19856#L12-1 assume true; 19855#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 19854#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 19853#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 19852#L12-1 assume true; 19851#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 19850#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 19849#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 19848#L12-1 assume true; 19847#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 19846#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 19845#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 19844#L12-1 assume true; 19843#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 19842#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 19841#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 19840#L12-1 assume true; 19839#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 19838#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 19837#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 19836#L12-1 assume true; 19835#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 19834#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 19833#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 19832#L12-1 assume true; 19831#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 19830#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 19829#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 19828#L12-1 assume true; 19827#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 19826#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 19825#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 19824#L12-1 assume true; 19823#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 19822#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 19821#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 19820#L12-1 assume true; 19777#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 19819#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 19818#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 19816#L12-1 assume true; 19815#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 19814#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 19813#L13 assume main_~i~0 == main_~range~0;main_~i~0 := 0;main_~range~0 := main_~range~0 - 1; 19812#L12-1 assume true; 19811#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 19810#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 19809#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 19808#L12-1 assume true; 19807#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 19806#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 19805#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 19804#L12-1 assume true; 19803#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 19802#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 19801#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 19800#L12-1 assume true; 19799#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 19798#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 19797#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 19796#L12-1 assume true; 19795#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 19794#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 19793#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 19792#L12-1 assume true; 19791#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 19790#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 19789#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 19788#L12-1 assume true; 19787#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 19786#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 19785#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 19784#L12-1 assume true; 19783#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 19782#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 19781#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 19780#L12-1 assume true; 19741#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 19779#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 19778#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 19776#L12-1 assume true; 19775#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 19774#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 19773#L13 assume main_~i~0 == main_~range~0;main_~i~0 := 0;main_~range~0 := main_~range~0 - 1; 19772#L12-1 assume true; 19771#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 19770#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 19769#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 19768#L12-1 assume true; 19767#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 19766#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 19765#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 19764#L12-1 assume true; 19763#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 19762#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 19761#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 19760#L12-1 assume true; 19759#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 19758#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 19757#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 19756#L12-1 assume true; 19755#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 19754#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 19753#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 19752#L12-1 assume true; 19751#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 19750#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 19749#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 19748#L12-1 assume true; 19747#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 19746#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 19745#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 19744#L12-1 assume true; 19709#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 19743#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 19742#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 19740#L12-1 assume true; 19739#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 19738#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 19737#L13 assume main_~i~0 == main_~range~0;main_~i~0 := 0;main_~range~0 := main_~range~0 - 1; 19736#L12-1 assume true; 19735#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 19734#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 19733#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 19732#L12-1 assume true; 19731#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 19730#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 19729#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 19728#L12-1 assume true; 19727#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 19726#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 19725#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 19724#L12-1 assume true; 19723#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 19722#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 19721#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 19720#L12-1 assume true; 19719#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 19718#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 19717#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 19716#L12-1 assume true; 19715#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 19714#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 19713#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 19712#L12-1 assume true; 19681#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 19711#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 19710#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 19708#L12-1 assume true; 19707#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 19706#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 19705#L13 assume main_~i~0 == main_~range~0;main_~i~0 := 0;main_~range~0 := main_~range~0 - 1; 19704#L12-1 assume true; 19703#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 19702#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 19701#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 19700#L12-1 assume true; 19699#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 19698#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 19697#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 19696#L12-1 assume true; 19695#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 19694#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 19693#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 19692#L12-1 assume true; 19691#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 19690#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 19689#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 19688#L12-1 assume true; 19687#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 19686#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 19685#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 19684#L12-1 assume true; 19657#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 19683#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 19682#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 19680#L12-1 assume true; 19679#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 19678#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 19677#L13 assume main_~i~0 == main_~range~0;main_~i~0 := 0;main_~range~0 := main_~range~0 - 1; 19676#L12-1 assume true; 19675#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 19674#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 19673#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 19672#L12-1 assume true; 19671#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 19670#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 19669#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 19668#L12-1 assume true; 19667#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 19666#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 19665#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 19664#L12-1 assume true; 19663#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 19662#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 19661#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 19660#L12-1 assume true; 19636#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 19659#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 19658#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 19656#L12-1 assume true; 19655#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 19654#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 19653#L13 assume main_~i~0 == main_~range~0;main_~i~0 := 0;main_~range~0 := main_~range~0 - 1; 19652#L12-1 assume true; 19651#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 19650#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 19649#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 19648#L12-1 assume true; 19647#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 19646#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 19645#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 19644#L12-1 assume true; 19643#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 19642#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 19641#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 19640#L12-1 assume true; 19619#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 19638#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 19637#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 19635#L12-1 assume true; 19634#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 19633#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 19632#L13 assume main_~i~0 == main_~range~0;main_~i~0 := 0;main_~range~0 := main_~range~0 - 1; 19631#L12-1 assume true; 19630#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 19629#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 19628#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 19627#L12-1 assume true; 19626#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 19625#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 19624#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 19623#L12-1 assume true; 19622#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 19621#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 19620#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 19618#L12-1 assume true; 19617#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 19616#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 19615#L13 assume main_~i~0 == main_~range~0;main_~i~0 := 0;main_~range~0 := main_~range~0 - 1; 19614#L12-1 assume true; 19613#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 19612#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 19611#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 19610#L12-1 assume true; 19609#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 19608#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 19607#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 19606#L12-1 assume true; 19605#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 19604#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 19603#L13 assume main_~i~0 == main_~range~0;main_~i~0 := 0;main_~range~0 := main_~range~0 - 1; 19602#L12-1 assume true; 19601#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 19600#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 19599#L13 assume !(main_~i~0 == main_~range~0);main_~i~0 := main_~i~0 + 1; 19598#L12-1 assume true; 19597#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 19596#L12 assume !(0 == main_~i~0 && main_~i~0 == main_~range~0); 19595#L13 assume main_~i~0 == main_~range~0;main_~i~0 := 0;main_~range~0 := main_~range~0 - 1; 19586#L12-1 [2018-11-10 05:33:36,273 INFO L795 eck$LassoCheckResult]: Loop: 19586#L12-1 assume true; 19594#L11-1 assume !!(0 <= main_~i~0 && main_~i~0 <= main_~range~0); 19585#L12 assume !!(0 == main_~i~0 && main_~i~0 == main_~range~0); 19586#L12-1 [2018-11-10 05:33:36,273 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 05:33:36,274 INFO L82 PathProgramCache]: Analyzing trace with hash -1852191647, now seen corresponding path program 24 times [2018-11-10 05:33:36,274 INFO L225 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-10 05:33:36,274 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-10 05:33:36,274 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:33:36,274 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-10 05:33:36,275 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:33:36,319 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-10 05:33:36,368 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-10 05:33:36,386 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 05:33:36,386 INFO L82 PathProgramCache]: Analyzing trace with hash 35952, now seen corresponding path program 22 times [2018-11-10 05:33:36,386 INFO L225 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-10 05:33:36,387 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-10 05:33:36,387 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:33:36,387 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-10 05:33:36,387 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:33:36,388 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-10 05:33:36,388 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-10 05:33:36,389 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 05:33:36,389 INFO L82 PathProgramCache]: Analyzing trace with hash -1196497904, now seen corresponding path program 5 times [2018-11-10 05:33:36,389 INFO L225 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-10 05:33:36,389 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-10 05:33:36,390 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:33:36,390 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-10 05:33:36,390 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:33:36,430 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-10 05:33:36,480 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-10 05:34:00,975 WARN L179 SmtUtils]: Spent 24.30 s on a formula simplification. DAG size of input: 2129 DAG size of output: 665 [2018-11-10 05:34:01,064 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer CFG 10.11 05:34:01 BoogieIcfgContainer [2018-11-10 05:34:01,064 INFO L132 PluginConnector]: ------------------------ END BuchiAutomizer---------------------------- [2018-11-10 05:34:01,065 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2018-11-10 05:34:01,065 INFO L271 PluginConnector]: Initializing Witness Printer... [2018-11-10 05:34:01,065 INFO L276 PluginConnector]: Witness Printer initialized [2018-11-10 05:34:01,065 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 10.11 05:33:17" (3/4) ... [2018-11-10 05:34:01,067 INFO L141 WitnessPrinter]: Generating witness for non-termination counterexample [2018-11-10 05:34:01,174 INFO L145 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/working_dir_4b8fc6d8-f1f2-4752-b24c-26b6754cc212/bin-2019/uautomizer/witness.graphml [2018-11-10 05:34:01,174 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2018-11-10 05:34:01,175 INFO L168 Benchmark]: Toolchain (without parser) took 43797.36 ms. Allocated memory was 1.0 GB in the beginning and 1.9 GB in the end (delta: 883.9 MB). Free memory was 960.3 MB in the beginning and 1.0 GB in the end (delta: -76.0 MB). Peak memory consumption was 808.0 MB. Max. memory is 11.5 GB. [2018-11-10 05:34:01,175 INFO L168 Benchmark]: CDTParser took 0.14 ms. Allocated memory is still 1.0 GB. Free memory is still 985.5 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-11-10 05:34:01,176 INFO L168 Benchmark]: CACSL2BoogieTranslator took 161.31 ms. Allocated memory is still 1.0 GB. Free memory was 960.3 MB in the beginning and 948.5 MB in the end (delta: 11.8 MB). Peak memory consumption was 11.8 MB. Max. memory is 11.5 GB. [2018-11-10 05:34:01,176 INFO L168 Benchmark]: Boogie Procedure Inliner took 25.72 ms. Allocated memory is still 1.0 GB. Free memory is still 948.5 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-11-10 05:34:01,176 INFO L168 Benchmark]: Boogie Preprocessor took 14.73 ms. Allocated memory is still 1.0 GB. Free memory was 948.5 MB in the beginning and 945.8 MB in the end (delta: 2.7 MB). Peak memory consumption was 2.7 MB. Max. memory is 11.5 GB. [2018-11-10 05:34:01,176 INFO L168 Benchmark]: RCFGBuilder took 156.60 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 140.0 MB). Free memory was 945.8 MB in the beginning and 1.1 GB in the end (delta: -183.3 MB). Peak memory consumption was 19.9 MB. Max. memory is 11.5 GB. [2018-11-10 05:34:01,176 INFO L168 Benchmark]: BuchiAutomizer took 43326.28 ms. Allocated memory was 1.2 GB in the beginning and 1.9 GB in the end (delta: 744.0 MB). Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 49.3 MB). Peak memory consumption was 1.1 GB. Max. memory is 11.5 GB. [2018-11-10 05:34:01,177 INFO L168 Benchmark]: Witness Printer took 109.70 ms. Allocated memory is still 1.9 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 43.5 MB). Peak memory consumption was 43.5 MB. Max. memory is 11.5 GB. [2018-11-10 05:34:01,178 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.14 ms. Allocated memory is still 1.0 GB. Free memory is still 985.5 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 161.31 ms. Allocated memory is still 1.0 GB. Free memory was 960.3 MB in the beginning and 948.5 MB in the end (delta: 11.8 MB). Peak memory consumption was 11.8 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 25.72 ms. Allocated memory is still 1.0 GB. Free memory is still 948.5 MB. There was no memory consumed. Max. memory is 11.5 GB. * Boogie Preprocessor took 14.73 ms. Allocated memory is still 1.0 GB. Free memory was 948.5 MB in the beginning and 945.8 MB in the end (delta: 2.7 MB). Peak memory consumption was 2.7 MB. Max. memory is 11.5 GB. * RCFGBuilder took 156.60 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 140.0 MB). Free memory was 945.8 MB in the beginning and 1.1 GB in the end (delta: -183.3 MB). Peak memory consumption was 19.9 MB. Max. memory is 11.5 GB. * BuchiAutomizer took 43326.28 ms. Allocated memory was 1.2 GB in the beginning and 1.9 GB in the end (delta: 744.0 MB). Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 49.3 MB). Peak memory consumption was 1.1 GB. Max. memory is 11.5 GB. * Witness Printer took 109.70 ms. Allocated memory is still 1.9 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 43.5 MB). Peak memory consumption was 43.5 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: Constructed decomposition of program Your program was decomposed into 27 terminating modules (23 trivial, 3 deterministic, 1 nondeterministic) and one nonterminating remainder module.One deterministic module has affine ranking function -1 * i + range and consists of 4 locations. One deterministic module has affine ranking function range + -1 * i and consists of 4 locations. One deterministic module has affine ranking function range and consists of 4 locations. One nondeterministic module has affine ranking function -1 * i + range and consists of 4 locations. 23 modules have a trivial ranking function, the largest among these consists of 49 locations. The remainder module has 857 locations. - StatisticsResult: Timing statistics BüchiAutomizer plugin needed 43.2s and 26 iterations. TraceHistogramMax:210. Analysis of lassos took 33.5s. Construction of modules took 3.0s. Büchi inclusion checks took 6.3s. Highest rank in rank-based complementation 3. Minimization of det autom 1. Minimization of nondet autom 26. Automata minimization 0.0s AutomataMinimizationTime, 27 MinimizatonAttempts, 1086 StatesRemovedByMinimization, 24 NontrivialMinimizations. Non-live state removal took 0.0s Buchi closure took 0.0s. Biggest automaton had 857 states and ocurred in iteration 25. Nontrivial modules had stage [3, 0, 1, 0, 0]. InterpolantCoveringCapabilityFinite: 0/0 InterpolantCoveringCapabilityBuchi: 4/4 HoareTripleCheckerStatistics: 321 SDtfs, 1683 SDslu, 2662 SDs, 0 SdLazy, 9131 SolverSat, 987 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 3.0s Time LassoAnalysisResults: nont1 unkn0 SFLI0 SFLT2 conc4 concLT2 SILN17 SILU0 SILI0 SILT0 lasso0 LassoPreprocessingBenchmarks: Lassos: inital17 mio100 ax167 hnf100 lsp59 ukn100 mio100 lsp100 div100 bol100 ite100 ukn100 eq166 hnf95 smp74 dnf100 smp100 tf109 neg95 sie109 LassoTerminationAnalysisBenchmarks: ConstraintsSatisfiability: unsat Degree: 0 Time: 11ms VariablesStem: 1 VariablesLoop: 0 DisjunctsStem: 1 DisjunctsLoop: 1 SupportingInvariants: 2 MotzkinApplications: 6 LassoTerminationAnalysisBenchmarks: LassoNonterminationAnalysisSatFixpoint: 6 LassoNonterminationAnalysisSatUnbounded: 0 LassoNonterminationAnalysisUnsat: 4 LassoNonterminationAnalysisUnknown: 0 LassoNonterminationAnalysisTime: 0.4s - TerminationAnalysisResult: Nontermination possible Buchi Automizer proved that your program is nonterminating for some inputs - FixpointNonTerminationResult [Line: 11]: Nontermination argument in form of an infinite program execution. Nontermination argument in form of an infinite execution State at position 0 is {} State at position 1 is {range=0, org.eclipse.cdt.internal.core.dom.parser.c.CASTFunctionCallExpression@5fce65ea=0, \result=0, i=0} - StatisticsResult: NonterminationArgumentStatistics Fixpoint - NonterminatingLassoResult [Line: 11]: Nonterminating execution Found a nonterminating execution for the following lasso shaped sequence of statements. Stem: [L6] int i; [L7] int range; [L8] i = __VERIFIER_nondet_int() [L9] range = 20 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND TRUE i == range [L14] i = 0 [L15] range = range-1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND TRUE i == range [L14] i = 0 [L15] range = range-1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND TRUE i == range [L14] i = 0 [L15] range = range-1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND TRUE i == range [L14] i = 0 [L15] range = range-1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND TRUE i == range [L14] i = 0 [L15] range = range-1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND TRUE i == range [L14] i = 0 [L15] range = range-1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND TRUE i == range [L14] i = 0 [L15] range = range-1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND TRUE i == range [L14] i = 0 [L15] range = range-1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND TRUE i == range [L14] i = 0 [L15] range = range-1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND TRUE i == range [L14] i = 0 [L15] range = range-1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND TRUE i == range [L14] i = 0 [L15] range = range-1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND TRUE i == range [L14] i = 0 [L15] range = range-1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND TRUE i == range [L14] i = 0 [L15] range = range-1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND TRUE i == range [L14] i = 0 [L15] range = range-1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND TRUE i == range [L14] i = 0 [L15] range = range-1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND TRUE i == range [L14] i = 0 [L15] range = range-1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND TRUE i == range [L14] i = 0 [L15] range = range-1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND TRUE i == range [L14] i = 0 [L15] range = range-1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND TRUE i == range [L14] i = 0 [L15] range = range-1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND TRUE i == range [L14] i = 0 [L15] range = range-1 Loop: [L11] COND TRUE 0 <= i && i <= range [L12] COND FALSE !(!(0 == i && i == range)) End of lasso representation. RESULT: Ultimate proved your program to be incorrect! Received shutdown request...