./Ultimate.py --spec ../../sv-benchmarks/c/ReachSafety.prp --file ../../sv-benchmarks/c/systemc/kundu2_false-unreach-call_false-termination.cil.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version 5842f4b8 Calling Ultimate with: java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/working_dir_4b2264b2-8dab-414d-8c8e-efc5a460bd69/bin-2019/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/working_dir_4b2264b2-8dab-414d-8c8e-efc5a460bd69/bin-2019/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/working_dir_4b2264b2-8dab-414d-8c8e-efc5a460bd69/bin-2019/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/working_dir_4b2264b2-8dab-414d-8c8e-efc5a460bd69/bin-2019/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/systemc/kundu2_false-unreach-call_false-termination.cil.c -s /tmp/vcloud-vcloud-master/worker/working_dir_4b2264b2-8dab-414d-8c8e-efc5a460bd69/bin-2019/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/working_dir_4b2264b2-8dab-414d-8c8e-efc5a460bd69/bin-2019/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 2559ce56d5bdfaeec5255956226223494fe099f5 ............................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................ Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.23-5842f4b [2018-11-18 11:43:19,124 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-11-18 11:43:19,125 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-11-18 11:43:19,133 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-11-18 11:43:19,133 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-11-18 11:43:19,134 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-11-18 11:43:19,135 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-11-18 11:43:19,136 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-11-18 11:43:19,137 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-11-18 11:43:19,138 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-11-18 11:43:19,139 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-11-18 11:43:19,139 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-11-18 11:43:19,139 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-11-18 11:43:19,141 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-11-18 11:43:19,142 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-11-18 11:43:19,142 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-11-18 11:43:19,143 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-11-18 11:43:19,144 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-11-18 11:43:19,146 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-11-18 11:43:19,147 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-11-18 11:43:19,148 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-11-18 11:43:19,149 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-11-18 11:43:19,150 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-11-18 11:43:19,150 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-11-18 11:43:19,150 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-11-18 11:43:19,151 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-11-18 11:43:19,152 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-11-18 11:43:19,152 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-11-18 11:43:19,153 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-11-18 11:43:19,154 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-11-18 11:43:19,154 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-11-18 11:43:19,154 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-11-18 11:43:19,154 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-11-18 11:43:19,154 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-11-18 11:43:19,155 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-11-18 11:43:19,156 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-11-18 11:43:19,157 INFO L98 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/working_dir_4b2264b2-8dab-414d-8c8e-efc5a460bd69/bin-2019/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2018-11-18 11:43:19,166 INFO L110 SettingsManager]: Loading preferences was successful [2018-11-18 11:43:19,166 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-11-18 11:43:19,166 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-11-18 11:43:19,167 INFO L133 SettingsManager]: * to procedures, called more than once=true [2018-11-18 11:43:19,167 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-11-18 11:43:19,167 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-11-18 11:43:19,167 INFO L133 SettingsManager]: * Use SBE=true [2018-11-18 11:43:19,167 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-11-18 11:43:19,168 INFO L133 SettingsManager]: * sizeof long=4 [2018-11-18 11:43:19,168 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-11-18 11:43:19,168 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-11-18 11:43:19,168 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-11-18 11:43:19,169 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-11-18 11:43:19,169 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-11-18 11:43:19,169 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-11-18 11:43:19,169 INFO L133 SettingsManager]: * sizeof long double=12 [2018-11-18 11:43:19,169 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-11-18 11:43:19,170 INFO L133 SettingsManager]: * Use constant arrays=true [2018-11-18 11:43:19,170 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-11-18 11:43:19,170 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-11-18 11:43:19,170 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-11-18 11:43:19,170 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-11-18 11:43:19,170 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-11-18 11:43:19,170 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-18 11:43:19,171 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-11-18 11:43:19,171 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-11-18 11:43:19,171 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-11-18 11:43:19,171 INFO L133 SettingsManager]: * Trace refinement strategy=CAMEL [2018-11-18 11:43:19,171 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-11-18 11:43:19,171 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-11-18 11:43:19,171 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/working_dir_4b2264b2-8dab-414d-8c8e-efc5a460bd69/bin-2019/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 2559ce56d5bdfaeec5255956226223494fe099f5 [2018-11-18 11:43:19,198 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-11-18 11:43:19,207 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-11-18 11:43:19,209 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-11-18 11:43:19,209 INFO L271 PluginConnector]: Initializing CDTParser... [2018-11-18 11:43:19,210 INFO L276 PluginConnector]: CDTParser initialized [2018-11-18 11:43:19,210 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/working_dir_4b2264b2-8dab-414d-8c8e-efc5a460bd69/bin-2019/uautomizer/../../sv-benchmarks/c/systemc/kundu2_false-unreach-call_false-termination.cil.c [2018-11-18 11:43:19,244 INFO L221 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_4b2264b2-8dab-414d-8c8e-efc5a460bd69/bin-2019/uautomizer/data/46fc65934/5ae13aed7c414b91a9ac1b418ac26687/FLAG4ee41b990 [2018-11-18 11:43:19,601 INFO L307 CDTParser]: Found 1 translation units. [2018-11-18 11:43:19,602 INFO L161 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/working_dir_4b2264b2-8dab-414d-8c8e-efc5a460bd69/sv-benchmarks/c/systemc/kundu2_false-unreach-call_false-termination.cil.c [2018-11-18 11:43:19,611 INFO L355 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_4b2264b2-8dab-414d-8c8e-efc5a460bd69/bin-2019/uautomizer/data/46fc65934/5ae13aed7c414b91a9ac1b418ac26687/FLAG4ee41b990 [2018-11-18 11:43:20,013 INFO L363 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/working_dir_4b2264b2-8dab-414d-8c8e-efc5a460bd69/bin-2019/uautomizer/data/46fc65934/5ae13aed7c414b91a9ac1b418ac26687 [2018-11-18 11:43:20,017 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-11-18 11:43:20,019 INFO L131 ToolchainWalker]: Walking toolchain with 5 elements. [2018-11-18 11:43:20,020 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-11-18 11:43:20,020 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-11-18 11:43:20,026 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-11-18 11:43:20,027 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 18.11 11:43:20" (1/1) ... [2018-11-18 11:43:20,030 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@6cec47f1 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 11:43:20, skipping insertion in model container [2018-11-18 11:43:20,030 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 18.11 11:43:20" (1/1) ... [2018-11-18 11:43:20,041 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-11-18 11:43:20,075 INFO L176 MainTranslator]: Built tables and reachable declarations [2018-11-18 11:43:20,212 INFO L201 PostProcessor]: Analyzing one entry point: main [2018-11-18 11:43:20,216 INFO L191 MainTranslator]: Completed pre-run [2018-11-18 11:43:20,248 INFO L201 PostProcessor]: Analyzing one entry point: main [2018-11-18 11:43:20,260 INFO L195 MainTranslator]: Completed translation [2018-11-18 11:43:20,260 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 11:43:20 WrapperNode [2018-11-18 11:43:20,260 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-11-18 11:43:20,260 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-11-18 11:43:20,261 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-11-18 11:43:20,261 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-11-18 11:43:20,268 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 11:43:20" (1/1) ... [2018-11-18 11:43:20,268 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 11:43:20" (1/1) ... [2018-11-18 11:43:20,273 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 11:43:20" (1/1) ... [2018-11-18 11:43:20,273 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 11:43:20" (1/1) ... [2018-11-18 11:43:20,278 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 11:43:20" (1/1) ... [2018-11-18 11:43:20,284 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 11:43:20" (1/1) ... [2018-11-18 11:43:20,285 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 11:43:20" (1/1) ... [2018-11-18 11:43:20,325 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-11-18 11:43:20,325 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-11-18 11:43:20,326 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-11-18 11:43:20,326 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-11-18 11:43:20,326 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 11:43:20" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_4b2264b2-8dab-414d-8c8e-efc5a460bd69/bin-2019/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-18 11:43:20,362 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-11-18 11:43:20,362 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-11-18 11:43:20,362 INFO L138 BoogieDeclarations]: Found implementation of procedure error [2018-11-18 11:43:20,362 INFO L138 BoogieDeclarations]: Found implementation of procedure read_data [2018-11-18 11:43:20,362 INFO L138 BoogieDeclarations]: Found implementation of procedure write_data [2018-11-18 11:43:20,362 INFO L138 BoogieDeclarations]: Found implementation of procedure P_1 [2018-11-18 11:43:20,363 INFO L138 BoogieDeclarations]: Found implementation of procedure is_P_1_triggered [2018-11-18 11:43:20,363 INFO L138 BoogieDeclarations]: Found implementation of procedure P_2 [2018-11-18 11:43:20,363 INFO L138 BoogieDeclarations]: Found implementation of procedure is_P_2_triggered [2018-11-18 11:43:20,363 INFO L138 BoogieDeclarations]: Found implementation of procedure C_1 [2018-11-18 11:43:20,363 INFO L138 BoogieDeclarations]: Found implementation of procedure is_C_1_triggered [2018-11-18 11:43:20,363 INFO L138 BoogieDeclarations]: Found implementation of procedure update_channels [2018-11-18 11:43:20,363 INFO L138 BoogieDeclarations]: Found implementation of procedure init_threads [2018-11-18 11:43:20,363 INFO L138 BoogieDeclarations]: Found implementation of procedure exists_runnable_thread [2018-11-18 11:43:20,364 INFO L138 BoogieDeclarations]: Found implementation of procedure eval [2018-11-18 11:43:20,364 INFO L138 BoogieDeclarations]: Found implementation of procedure fire_delta_events [2018-11-18 11:43:20,364 INFO L138 BoogieDeclarations]: Found implementation of procedure reset_delta_events [2018-11-18 11:43:20,364 INFO L138 BoogieDeclarations]: Found implementation of procedure fire_time_events [2018-11-18 11:43:20,364 INFO L138 BoogieDeclarations]: Found implementation of procedure reset_time_events [2018-11-18 11:43:20,364 INFO L138 BoogieDeclarations]: Found implementation of procedure activate_threads [2018-11-18 11:43:20,365 INFO L138 BoogieDeclarations]: Found implementation of procedure immediate_notify [2018-11-18 11:43:20,365 INFO L138 BoogieDeclarations]: Found implementation of procedure stop_simulation [2018-11-18 11:43:20,365 INFO L138 BoogieDeclarations]: Found implementation of procedure start_simulation [2018-11-18 11:43:20,365 INFO L138 BoogieDeclarations]: Found implementation of procedure init_model [2018-11-18 11:43:20,365 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2018-11-18 11:43:20,365 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_error [2018-11-18 11:43:20,365 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_int [2018-11-18 11:43:20,365 INFO L130 BoogieDeclarations]: Found specification of procedure error [2018-11-18 11:43:20,365 INFO L130 BoogieDeclarations]: Found specification of procedure immediate_notify [2018-11-18 11:43:20,366 INFO L130 BoogieDeclarations]: Found specification of procedure read_data [2018-11-18 11:43:20,366 INFO L130 BoogieDeclarations]: Found specification of procedure write_data [2018-11-18 11:43:20,366 INFO L130 BoogieDeclarations]: Found specification of procedure P_1 [2018-11-18 11:43:20,366 INFO L130 BoogieDeclarations]: Found specification of procedure is_P_1_triggered [2018-11-18 11:43:20,366 INFO L130 BoogieDeclarations]: Found specification of procedure P_2 [2018-11-18 11:43:20,366 INFO L130 BoogieDeclarations]: Found specification of procedure is_P_2_triggered [2018-11-18 11:43:20,366 INFO L130 BoogieDeclarations]: Found specification of procedure C_1 [2018-11-18 11:43:20,366 INFO L130 BoogieDeclarations]: Found specification of procedure is_C_1_triggered [2018-11-18 11:43:20,366 INFO L130 BoogieDeclarations]: Found specification of procedure update_channels [2018-11-18 11:43:20,366 INFO L130 BoogieDeclarations]: Found specification of procedure init_threads [2018-11-18 11:43:20,366 INFO L130 BoogieDeclarations]: Found specification of procedure exists_runnable_thread [2018-11-18 11:43:20,367 INFO L130 BoogieDeclarations]: Found specification of procedure eval [2018-11-18 11:43:20,367 INFO L130 BoogieDeclarations]: Found specification of procedure fire_delta_events [2018-11-18 11:43:20,367 INFO L130 BoogieDeclarations]: Found specification of procedure reset_delta_events [2018-11-18 11:43:20,367 INFO L130 BoogieDeclarations]: Found specification of procedure fire_time_events [2018-11-18 11:43:20,367 INFO L130 BoogieDeclarations]: Found specification of procedure reset_time_events [2018-11-18 11:43:20,367 INFO L130 BoogieDeclarations]: Found specification of procedure activate_threads [2018-11-18 11:43:20,367 INFO L130 BoogieDeclarations]: Found specification of procedure stop_simulation [2018-11-18 11:43:20,367 INFO L130 BoogieDeclarations]: Found specification of procedure start_simulation [2018-11-18 11:43:20,367 INFO L130 BoogieDeclarations]: Found specification of procedure init_model [2018-11-18 11:43:20,367 INFO L130 BoogieDeclarations]: Found specification of procedure main [2018-11-18 11:43:20,367 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-11-18 11:43:20,367 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-11-18 11:43:20,714 INFO L278 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-11-18 11:43:20,714 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 18.11 11:43:20 BoogieIcfgContainer [2018-11-18 11:43:20,714 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-11-18 11:43:20,715 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-11-18 11:43:20,715 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-11-18 11:43:20,717 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-11-18 11:43:20,717 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 18.11 11:43:20" (1/3) ... [2018-11-18 11:43:20,717 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@21f3e647 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 18.11 11:43:20, skipping insertion in model container [2018-11-18 11:43:20,717 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 11:43:20" (2/3) ... [2018-11-18 11:43:20,718 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@21f3e647 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 18.11 11:43:20, skipping insertion in model container [2018-11-18 11:43:20,718 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 18.11 11:43:20" (3/3) ... [2018-11-18 11:43:20,719 INFO L112 eAbstractionObserver]: Analyzing ICFG kundu2_false-unreach-call_false-termination.cil.c [2018-11-18 11:43:20,725 INFO L136 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-11-18 11:43:20,730 INFO L148 ceAbstractionStarter]: Appying trace abstraction to program that has 1 error locations. [2018-11-18 11:43:20,739 INFO L257 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2018-11-18 11:43:20,760 INFO L133 ementStrategyFactory]: Using default assertion order modulation [2018-11-18 11:43:20,761 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-11-18 11:43:20,761 INFO L383 AbstractCegarLoop]: Hoare is true [2018-11-18 11:43:20,761 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-11-18 11:43:20,761 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-11-18 11:43:20,761 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-11-18 11:43:20,761 INFO L387 AbstractCegarLoop]: Difference is false [2018-11-18 11:43:20,761 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-11-18 11:43:20,761 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-11-18 11:43:20,778 INFO L276 IsEmpty]: Start isEmpty. Operand 186 states. [2018-11-18 11:43:20,785 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 86 [2018-11-18 11:43:20,785 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 11:43:20,786 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 11:43:20,788 INFO L423 AbstractCegarLoop]: === Iteration 1 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 11:43:20,791 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 11:43:20,792 INFO L82 PathProgramCache]: Analyzing trace with hash 1543453838, now seen corresponding path program 1 times [2018-11-18 11:43:20,793 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-18 11:43:20,793 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-18 11:43:20,823 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 11:43:20,823 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 11:43:20,823 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 11:43:20,903 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 11:43:21,006 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 11:43:21,008 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 11:43:21,008 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 11:43:21,012 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 11:43:21,024 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 11:43:21,024 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 11:43:21,026 INFO L87 Difference]: Start difference. First operand 186 states. Second operand 4 states. [2018-11-18 11:43:21,331 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 11:43:21,331 INFO L93 Difference]: Finished difference Result 502 states and 705 transitions. [2018-11-18 11:43:21,331 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 11:43:21,333 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 85 [2018-11-18 11:43:21,333 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 11:43:21,343 INFO L225 Difference]: With dead ends: 502 [2018-11-18 11:43:21,344 INFO L226 Difference]: Without dead ends: 323 [2018-11-18 11:43:21,348 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 11:43:21,362 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 323 states. [2018-11-18 11:43:21,395 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 323 to 308. [2018-11-18 11:43:21,397 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 308 states. [2018-11-18 11:43:21,400 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 308 states to 308 states and 399 transitions. [2018-11-18 11:43:21,401 INFO L78 Accepts]: Start accepts. Automaton has 308 states and 399 transitions. Word has length 85 [2018-11-18 11:43:21,402 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 11:43:21,402 INFO L480 AbstractCegarLoop]: Abstraction has 308 states and 399 transitions. [2018-11-18 11:43:21,402 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 11:43:21,402 INFO L276 IsEmpty]: Start isEmpty. Operand 308 states and 399 transitions. [2018-11-18 11:43:21,405 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 87 [2018-11-18 11:43:21,405 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 11:43:21,405 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 11:43:21,406 INFO L423 AbstractCegarLoop]: === Iteration 2 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 11:43:21,406 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 11:43:21,406 INFO L82 PathProgramCache]: Analyzing trace with hash -497912226, now seen corresponding path program 1 times [2018-11-18 11:43:21,406 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-18 11:43:21,406 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-18 11:43:21,407 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 11:43:21,408 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 11:43:21,408 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 11:43:21,433 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 11:43:21,506 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 11:43:21,506 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 11:43:21,506 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 11:43:21,508 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 11:43:21,508 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 11:43:21,508 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 11:43:21,508 INFO L87 Difference]: Start difference. First operand 308 states and 399 transitions. Second operand 4 states. [2018-11-18 11:43:21,720 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 11:43:21,720 INFO L93 Difference]: Finished difference Result 747 states and 993 transitions. [2018-11-18 11:43:21,721 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 11:43:21,721 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 86 [2018-11-18 11:43:21,721 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 11:43:21,725 INFO L225 Difference]: With dead ends: 747 [2018-11-18 11:43:21,725 INFO L226 Difference]: Without dead ends: 460 [2018-11-18 11:43:21,727 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 11:43:21,728 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 460 states. [2018-11-18 11:43:21,760 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 460 to 444. [2018-11-18 11:43:21,760 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 444 states. [2018-11-18 11:43:21,763 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 444 states to 444 states and 574 transitions. [2018-11-18 11:43:21,764 INFO L78 Accepts]: Start accepts. Automaton has 444 states and 574 transitions. Word has length 86 [2018-11-18 11:43:21,764 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 11:43:21,764 INFO L480 AbstractCegarLoop]: Abstraction has 444 states and 574 transitions. [2018-11-18 11:43:21,764 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 11:43:21,765 INFO L276 IsEmpty]: Start isEmpty. Operand 444 states and 574 transitions. [2018-11-18 11:43:21,766 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 87 [2018-11-18 11:43:21,766 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 11:43:21,766 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 11:43:21,767 INFO L423 AbstractCegarLoop]: === Iteration 3 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 11:43:21,767 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 11:43:21,767 INFO L82 PathProgramCache]: Analyzing trace with hash -1454840609, now seen corresponding path program 1 times [2018-11-18 11:43:21,767 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-18 11:43:21,767 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-18 11:43:21,768 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 11:43:21,768 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 11:43:21,768 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 11:43:21,789 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 11:43:21,869 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 11:43:21,870 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 11:43:21,870 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-18 11:43:21,870 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-18 11:43:21,871 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-18 11:43:21,871 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-11-18 11:43:21,871 INFO L87 Difference]: Start difference. First operand 444 states and 574 transitions. Second operand 6 states. [2018-11-18 11:43:21,920 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 11:43:21,920 INFO L93 Difference]: Finished difference Result 906 states and 1205 transitions. [2018-11-18 11:43:21,920 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-11-18 11:43:21,921 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 86 [2018-11-18 11:43:21,921 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 11:43:21,924 INFO L225 Difference]: With dead ends: 906 [2018-11-18 11:43:21,924 INFO L226 Difference]: Without dead ends: 483 [2018-11-18 11:43:21,925 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-11-18 11:43:21,926 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 483 states. [2018-11-18 11:43:21,949 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 483 to 459. [2018-11-18 11:43:21,949 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 459 states. [2018-11-18 11:43:21,951 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 459 states to 459 states and 589 transitions. [2018-11-18 11:43:21,952 INFO L78 Accepts]: Start accepts. Automaton has 459 states and 589 transitions. Word has length 86 [2018-11-18 11:43:21,952 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 11:43:21,952 INFO L480 AbstractCegarLoop]: Abstraction has 459 states and 589 transitions. [2018-11-18 11:43:21,952 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-18 11:43:21,952 INFO L276 IsEmpty]: Start isEmpty. Operand 459 states and 589 transitions. [2018-11-18 11:43:21,953 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 87 [2018-11-18 11:43:21,953 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 11:43:21,954 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 11:43:21,954 INFO L423 AbstractCegarLoop]: === Iteration 4 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 11:43:21,954 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 11:43:21,954 INFO L82 PathProgramCache]: Analyzing trace with hash 83499421, now seen corresponding path program 1 times [2018-11-18 11:43:21,954 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-18 11:43:21,955 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-18 11:43:21,955 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 11:43:21,955 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 11:43:21,956 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 11:43:21,973 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 11:43:22,040 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 11:43:22,040 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 11:43:22,040 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-18 11:43:22,041 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-18 11:43:22,041 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-18 11:43:22,041 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-11-18 11:43:22,041 INFO L87 Difference]: Start difference. First operand 459 states and 589 transitions. Second operand 6 states. [2018-11-18 11:43:22,071 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 11:43:22,072 INFO L93 Difference]: Finished difference Result 927 states and 1220 transitions. [2018-11-18 11:43:22,072 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-11-18 11:43:22,072 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 86 [2018-11-18 11:43:22,073 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 11:43:22,075 INFO L225 Difference]: With dead ends: 927 [2018-11-18 11:43:22,075 INFO L226 Difference]: Without dead ends: 489 [2018-11-18 11:43:22,076 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-11-18 11:43:22,077 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 489 states. [2018-11-18 11:43:22,097 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 489 to 474. [2018-11-18 11:43:22,097 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 474 states. [2018-11-18 11:43:22,099 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 474 states to 474 states and 604 transitions. [2018-11-18 11:43:22,099 INFO L78 Accepts]: Start accepts. Automaton has 474 states and 604 transitions. Word has length 86 [2018-11-18 11:43:22,100 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 11:43:22,100 INFO L480 AbstractCegarLoop]: Abstraction has 474 states and 604 transitions. [2018-11-18 11:43:22,100 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-18 11:43:22,100 INFO L276 IsEmpty]: Start isEmpty. Operand 474 states and 604 transitions. [2018-11-18 11:43:22,101 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 87 [2018-11-18 11:43:22,101 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 11:43:22,101 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 11:43:22,102 INFO L423 AbstractCegarLoop]: === Iteration 5 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 11:43:22,102 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 11:43:22,102 INFO L82 PathProgramCache]: Analyzing trace with hash -813893857, now seen corresponding path program 1 times [2018-11-18 11:43:22,102 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-18 11:43:22,102 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-18 11:43:22,103 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 11:43:22,103 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 11:43:22,103 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 11:43:22,116 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 11:43:22,217 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 11:43:22,217 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 11:43:22,217 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-18 11:43:22,217 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-18 11:43:22,218 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-18 11:43:22,218 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-11-18 11:43:22,218 INFO L87 Difference]: Start difference. First operand 474 states and 604 transitions. Second operand 6 states. [2018-11-18 11:43:22,278 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 11:43:22,278 INFO L93 Difference]: Finished difference Result 941 states and 1224 transitions. [2018-11-18 11:43:22,278 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-11-18 11:43:22,279 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 86 [2018-11-18 11:43:22,279 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 11:43:22,281 INFO L225 Difference]: With dead ends: 941 [2018-11-18 11:43:22,281 INFO L226 Difference]: Without dead ends: 488 [2018-11-18 11:43:22,283 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-11-18 11:43:22,283 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 488 states. [2018-11-18 11:43:22,297 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 488 to 484. [2018-11-18 11:43:22,298 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 484 states. [2018-11-18 11:43:22,299 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 484 states to 484 states and 613 transitions. [2018-11-18 11:43:22,300 INFO L78 Accepts]: Start accepts. Automaton has 484 states and 613 transitions. Word has length 86 [2018-11-18 11:43:22,300 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 11:43:22,300 INFO L480 AbstractCegarLoop]: Abstraction has 484 states and 613 transitions. [2018-11-18 11:43:22,300 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-18 11:43:22,300 INFO L276 IsEmpty]: Start isEmpty. Operand 484 states and 613 transitions. [2018-11-18 11:43:22,301 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 87 [2018-11-18 11:43:22,301 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 11:43:22,301 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 11:43:22,302 INFO L423 AbstractCegarLoop]: === Iteration 6 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 11:43:22,302 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 11:43:22,302 INFO L82 PathProgramCache]: Analyzing trace with hash -886280415, now seen corresponding path program 1 times [2018-11-18 11:43:22,302 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-18 11:43:22,302 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-18 11:43:22,303 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 11:43:22,303 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 11:43:22,303 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 11:43:22,316 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 11:43:22,379 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 11:43:22,379 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 11:43:22,379 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-18 11:43:22,379 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-18 11:43:22,379 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-18 11:43:22,379 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-11-18 11:43:22,380 INFO L87 Difference]: Start difference. First operand 484 states and 613 transitions. Second operand 6 states. [2018-11-18 11:43:22,459 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 11:43:22,459 INFO L93 Difference]: Finished difference Result 1230 states and 1588 transitions. [2018-11-18 11:43:22,460 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-18 11:43:22,460 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 86 [2018-11-18 11:43:22,460 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 11:43:22,463 INFO L225 Difference]: With dead ends: 1230 [2018-11-18 11:43:22,463 INFO L226 Difference]: Without dead ends: 768 [2018-11-18 11:43:22,464 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 7 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=23, Invalid=49, Unknown=0, NotChecked=0, Total=72 [2018-11-18 11:43:22,465 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 768 states. [2018-11-18 11:43:22,484 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 768 to 753. [2018-11-18 11:43:22,484 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 753 states. [2018-11-18 11:43:22,486 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 753 states to 753 states and 962 transitions. [2018-11-18 11:43:22,486 INFO L78 Accepts]: Start accepts. Automaton has 753 states and 962 transitions. Word has length 86 [2018-11-18 11:43:22,486 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 11:43:22,487 INFO L480 AbstractCegarLoop]: Abstraction has 753 states and 962 transitions. [2018-11-18 11:43:22,487 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-18 11:43:22,487 INFO L276 IsEmpty]: Start isEmpty. Operand 753 states and 962 transitions. [2018-11-18 11:43:22,488 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 101 [2018-11-18 11:43:22,488 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 11:43:22,488 INFO L375 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 11:43:22,488 INFO L423 AbstractCegarLoop]: === Iteration 7 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 11:43:22,488 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 11:43:22,488 INFO L82 PathProgramCache]: Analyzing trace with hash -1427334616, now seen corresponding path program 1 times [2018-11-18 11:43:22,488 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-18 11:43:22,489 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-18 11:43:22,489 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 11:43:22,489 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 11:43:22,489 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 11:43:22,501 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 11:43:22,606 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 11:43:22,606 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 11:43:22,607 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-11-18 11:43:22,607 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-11-18 11:43:22,607 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-11-18 11:43:22,607 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=42, Unknown=0, NotChecked=0, Total=56 [2018-11-18 11:43:22,607 INFO L87 Difference]: Start difference. First operand 753 states and 962 transitions. Second operand 8 states. [2018-11-18 11:43:23,675 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 11:43:23,676 INFO L93 Difference]: Finished difference Result 2227 states and 3068 transitions. [2018-11-18 11:43:23,676 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-11-18 11:43:23,677 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 100 [2018-11-18 11:43:23,677 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 11:43:23,687 INFO L225 Difference]: With dead ends: 2227 [2018-11-18 11:43:23,687 INFO L226 Difference]: Without dead ends: 1633 [2018-11-18 11:43:23,691 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 24 GetRequests, 11 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 21 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=55, Invalid=155, Unknown=0, NotChecked=0, Total=210 [2018-11-18 11:43:23,692 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1633 states. [2018-11-18 11:43:23,785 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1633 to 1566. [2018-11-18 11:43:23,785 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1566 states. [2018-11-18 11:43:23,795 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1566 states to 1566 states and 2131 transitions. [2018-11-18 11:43:23,796 INFO L78 Accepts]: Start accepts. Automaton has 1566 states and 2131 transitions. Word has length 100 [2018-11-18 11:43:23,796 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 11:43:23,796 INFO L480 AbstractCegarLoop]: Abstraction has 1566 states and 2131 transitions. [2018-11-18 11:43:23,796 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-11-18 11:43:23,796 INFO L276 IsEmpty]: Start isEmpty. Operand 1566 states and 2131 transitions. [2018-11-18 11:43:23,797 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 106 [2018-11-18 11:43:23,797 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 11:43:23,798 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 11:43:23,798 INFO L423 AbstractCegarLoop]: === Iteration 8 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 11:43:23,798 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 11:43:23,798 INFO L82 PathProgramCache]: Analyzing trace with hash -1794198785, now seen corresponding path program 1 times [2018-11-18 11:43:23,798 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-18 11:43:23,798 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-18 11:43:23,799 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 11:43:23,799 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 11:43:23,799 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 11:43:23,811 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 11:43:23,917 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 11:43:23,918 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 11:43:23,918 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-11-18 11:43:23,918 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-11-18 11:43:23,918 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-11-18 11:43:23,918 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=43, Unknown=0, NotChecked=0, Total=56 [2018-11-18 11:43:23,919 INFO L87 Difference]: Start difference. First operand 1566 states and 2131 transitions. Second operand 8 states. [2018-11-18 11:43:25,419 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 11:43:25,420 INFO L93 Difference]: Finished difference Result 2786 states and 3969 transitions. [2018-11-18 11:43:25,420 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-11-18 11:43:25,420 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 105 [2018-11-18 11:43:25,420 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 11:43:25,426 INFO L225 Difference]: With dead ends: 2786 [2018-11-18 11:43:25,426 INFO L226 Difference]: Without dead ends: 1726 [2018-11-18 11:43:25,430 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 8 SyntacticMatches, 1 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 18 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=48, Invalid=162, Unknown=0, NotChecked=0, Total=210 [2018-11-18 11:43:25,431 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1726 states. [2018-11-18 11:43:25,481 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1726 to 1613. [2018-11-18 11:43:25,481 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1613 states. [2018-11-18 11:43:25,487 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1613 states to 1613 states and 2229 transitions. [2018-11-18 11:43:25,487 INFO L78 Accepts]: Start accepts. Automaton has 1613 states and 2229 transitions. Word has length 105 [2018-11-18 11:43:25,487 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 11:43:25,488 INFO L480 AbstractCegarLoop]: Abstraction has 1613 states and 2229 transitions. [2018-11-18 11:43:25,488 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-11-18 11:43:25,488 INFO L276 IsEmpty]: Start isEmpty. Operand 1613 states and 2229 transitions. [2018-11-18 11:43:25,489 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 109 [2018-11-18 11:43:25,489 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 11:43:25,490 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 11:43:25,490 INFO L423 AbstractCegarLoop]: === Iteration 9 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 11:43:25,490 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 11:43:25,490 INFO L82 PathProgramCache]: Analyzing trace with hash -1612231203, now seen corresponding path program 1 times [2018-11-18 11:43:25,490 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-18 11:43:25,490 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-18 11:43:25,491 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 11:43:25,491 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 11:43:25,491 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 11:43:25,499 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 11:43:25,523 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 8 proven. 3 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-11-18 11:43:25,523 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 11:43:25,523 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_4b2264b2-8dab-414d-8c8e-efc5a460bd69/bin-2019/uautomizer/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-18 11:43:25,534 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 11:43:25,596 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 11:43:25,605 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 11:43:25,622 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 11 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-11-18 11:43:25,639 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-11-18 11:43:25,639 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [3] total 3 [2018-11-18 11:43:25,640 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-18 11:43:25,640 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-18 11:43:25,640 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-18 11:43:25,640 INFO L87 Difference]: Start difference. First operand 1613 states and 2229 transitions. Second operand 3 states. [2018-11-18 11:43:25,765 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 11:43:25,765 INFO L93 Difference]: Finished difference Result 4646 states and 6907 transitions. [2018-11-18 11:43:25,766 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-18 11:43:25,766 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 108 [2018-11-18 11:43:25,766 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 11:43:25,776 INFO L225 Difference]: With dead ends: 4646 [2018-11-18 11:43:25,776 INFO L226 Difference]: Without dead ends: 3055 [2018-11-18 11:43:25,782 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 110 GetRequests, 109 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-18 11:43:25,784 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3055 states. [2018-11-18 11:43:25,872 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3055 to 3050. [2018-11-18 11:43:25,872 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3050 states. [2018-11-18 11:43:25,881 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3050 states to 3050 states and 4431 transitions. [2018-11-18 11:43:25,882 INFO L78 Accepts]: Start accepts. Automaton has 3050 states and 4431 transitions. Word has length 108 [2018-11-18 11:43:25,882 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 11:43:25,882 INFO L480 AbstractCegarLoop]: Abstraction has 3050 states and 4431 transitions. [2018-11-18 11:43:25,882 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-18 11:43:25,883 INFO L276 IsEmpty]: Start isEmpty. Operand 3050 states and 4431 transitions. [2018-11-18 11:43:25,885 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 111 [2018-11-18 11:43:25,885 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 11:43:25,885 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 11:43:25,886 INFO L423 AbstractCegarLoop]: === Iteration 10 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 11:43:25,886 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 11:43:25,886 INFO L82 PathProgramCache]: Analyzing trace with hash 709121419, now seen corresponding path program 1 times [2018-11-18 11:43:25,886 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-18 11:43:25,886 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-18 11:43:25,887 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 11:43:25,887 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 11:43:25,887 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 11:43:25,896 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 11:43:25,962 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 4 proven. 9 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2018-11-18 11:43:25,963 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 11:43:25,963 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_4b2264b2-8dab-414d-8c8e-efc5a460bd69/bin-2019/uautomizer/z3 Starting monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-18 11:43:25,978 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 11:43:26,026 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 11:43:26,030 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 11:43:26,061 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 18 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 11:43:26,078 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-11-18 11:43:26,078 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [7] total 8 [2018-11-18 11:43:26,078 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-11-18 11:43:26,079 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-11-18 11:43:26,079 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2018-11-18 11:43:26,079 INFO L87 Difference]: Start difference. First operand 3050 states and 4431 transitions. Second operand 8 states. [2018-11-18 11:43:28,598 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 11:43:28,598 INFO L93 Difference]: Finished difference Result 14377 states and 26713 transitions. [2018-11-18 11:43:28,599 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2018-11-18 11:43:28,599 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 110 [2018-11-18 11:43:28,599 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 11:43:28,675 INFO L225 Difference]: With dead ends: 14377 [2018-11-18 11:43:28,675 INFO L226 Difference]: Without dead ends: 11356 [2018-11-18 11:43:28,722 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 147 GetRequests, 126 SyntacticMatches, 0 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 120 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=146, Invalid=360, Unknown=0, NotChecked=0, Total=506 [2018-11-18 11:43:28,731 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11356 states. [2018-11-18 11:43:29,419 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11356 to 10348. [2018-11-18 11:43:29,419 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10348 states. [2018-11-18 11:43:29,483 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10348 states to 10348 states and 16507 transitions. [2018-11-18 11:43:29,486 INFO L78 Accepts]: Start accepts. Automaton has 10348 states and 16507 transitions. Word has length 110 [2018-11-18 11:43:29,487 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 11:43:29,487 INFO L480 AbstractCegarLoop]: Abstraction has 10348 states and 16507 transitions. [2018-11-18 11:43:29,487 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-11-18 11:43:29,487 INFO L276 IsEmpty]: Start isEmpty. Operand 10348 states and 16507 transitions. [2018-11-18 11:43:29,492 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 118 [2018-11-18 11:43:29,493 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 11:43:29,493 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 11:43:29,493 INFO L423 AbstractCegarLoop]: === Iteration 11 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 11:43:29,493 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 11:43:29,493 INFO L82 PathProgramCache]: Analyzing trace with hash 1300294361, now seen corresponding path program 1 times [2018-11-18 11:43:29,493 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-18 11:43:29,493 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-18 11:43:29,494 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 11:43:29,494 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 11:43:29,494 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 11:43:29,501 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 11:43:29,539 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-11-18 11:43:29,539 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 11:43:29,539 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 11:43:29,540 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 11:43:29,540 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 11:43:29,540 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 11:43:29,540 INFO L87 Difference]: Start difference. First operand 10348 states and 16507 transitions. Second operand 4 states. [2018-11-18 11:43:30,228 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 11:43:30,229 INFO L93 Difference]: Finished difference Result 20659 states and 32959 transitions. [2018-11-18 11:43:30,229 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 11:43:30,229 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 117 [2018-11-18 11:43:30,230 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 11:43:30,285 INFO L225 Difference]: With dead ends: 20659 [2018-11-18 11:43:30,285 INFO L226 Difference]: Without dead ends: 10336 [2018-11-18 11:43:30,328 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 11:43:30,336 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10336 states. [2018-11-18 11:43:30,911 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10336 to 10336. [2018-11-18 11:43:30,911 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10336 states. [2018-11-18 11:43:30,970 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10336 states to 10336 states and 16484 transitions. [2018-11-18 11:43:30,974 INFO L78 Accepts]: Start accepts. Automaton has 10336 states and 16484 transitions. Word has length 117 [2018-11-18 11:43:30,974 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 11:43:30,974 INFO L480 AbstractCegarLoop]: Abstraction has 10336 states and 16484 transitions. [2018-11-18 11:43:30,974 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 11:43:30,974 INFO L276 IsEmpty]: Start isEmpty. Operand 10336 states and 16484 transitions. [2018-11-18 11:43:30,978 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 118 [2018-11-18 11:43:30,978 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 11:43:30,978 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 11:43:30,978 INFO L423 AbstractCegarLoop]: === Iteration 12 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 11:43:30,979 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 11:43:30,979 INFO L82 PathProgramCache]: Analyzing trace with hash -1749355622, now seen corresponding path program 1 times [2018-11-18 11:43:30,979 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-18 11:43:30,979 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-18 11:43:30,979 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 11:43:30,980 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 11:43:30,980 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 11:43:30,991 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 11:43:31,049 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2018-11-18 11:43:31,049 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 11:43:31,049 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-11-18 11:43:31,049 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-11-18 11:43:31,050 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-11-18 11:43:31,050 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-11-18 11:43:31,050 INFO L87 Difference]: Start difference. First operand 10336 states and 16484 transitions. Second operand 7 states. [2018-11-18 11:43:32,254 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 11:43:32,255 INFO L93 Difference]: Finished difference Result 22530 states and 38517 transitions. [2018-11-18 11:43:32,255 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-11-18 11:43:32,255 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 117 [2018-11-18 11:43:32,255 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 11:43:32,323 INFO L225 Difference]: With dead ends: 22530 [2018-11-18 11:43:32,323 INFO L226 Difference]: Without dead ends: 14438 [2018-11-18 11:43:32,371 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 9 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=44, Invalid=88, Unknown=0, NotChecked=0, Total=132 [2018-11-18 11:43:32,382 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14438 states. [2018-11-18 11:43:33,068 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14438 to 14138. [2018-11-18 11:43:33,068 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14138 states. [2018-11-18 11:43:33,132 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14138 states to 14138 states and 21709 transitions. [2018-11-18 11:43:33,136 INFO L78 Accepts]: Start accepts. Automaton has 14138 states and 21709 transitions. Word has length 117 [2018-11-18 11:43:33,136 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 11:43:33,137 INFO L480 AbstractCegarLoop]: Abstraction has 14138 states and 21709 transitions. [2018-11-18 11:43:33,137 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-11-18 11:43:33,137 INFO L276 IsEmpty]: Start isEmpty. Operand 14138 states and 21709 transitions. [2018-11-18 11:43:33,141 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 122 [2018-11-18 11:43:33,141 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 11:43:33,141 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 11:43:33,142 INFO L423 AbstractCegarLoop]: === Iteration 13 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 11:43:33,142 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 11:43:33,142 INFO L82 PathProgramCache]: Analyzing trace with hash 996074321, now seen corresponding path program 1 times [2018-11-18 11:43:33,142 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-18 11:43:33,142 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-18 11:43:33,143 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 11:43:33,143 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 11:43:33,143 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 11:43:33,155 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 11:43:33,273 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2018-11-18 11:43:33,273 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 11:43:33,274 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-11-18 11:43:33,274 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-11-18 11:43:33,274 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-11-18 11:43:33,274 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=43, Unknown=0, NotChecked=0, Total=56 [2018-11-18 11:43:33,274 INFO L87 Difference]: Start difference. First operand 14138 states and 21709 transitions. Second operand 8 states. [2018-11-18 11:43:34,324 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 11:43:34,324 INFO L93 Difference]: Finished difference Result 27999 states and 45115 transitions. [2018-11-18 11:43:34,325 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-11-18 11:43:34,325 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 121 [2018-11-18 11:43:34,325 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 11:43:34,384 INFO L225 Difference]: With dead ends: 27999 [2018-11-18 11:43:34,384 INFO L226 Difference]: Without dead ends: 16564 [2018-11-18 11:43:34,420 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 7 SyntacticMatches, 1 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 12 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=42, Invalid=140, Unknown=0, NotChecked=0, Total=182 [2018-11-18 11:43:34,431 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16564 states. [2018-11-18 11:43:34,916 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16564 to 16353. [2018-11-18 11:43:34,916 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16353 states. [2018-11-18 11:43:35,084 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16353 states to 16353 states and 25813 transitions. [2018-11-18 11:43:35,088 INFO L78 Accepts]: Start accepts. Automaton has 16353 states and 25813 transitions. Word has length 121 [2018-11-18 11:43:35,088 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 11:43:35,088 INFO L480 AbstractCegarLoop]: Abstraction has 16353 states and 25813 transitions. [2018-11-18 11:43:35,088 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-11-18 11:43:35,088 INFO L276 IsEmpty]: Start isEmpty. Operand 16353 states and 25813 transitions. [2018-11-18 11:43:35,092 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 128 [2018-11-18 11:43:35,092 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 11:43:35,092 INFO L375 BasicCegarLoop]: trace histogram [3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 11:43:35,092 INFO L423 AbstractCegarLoop]: === Iteration 14 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 11:43:35,093 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 11:43:35,093 INFO L82 PathProgramCache]: Analyzing trace with hash 983882708, now seen corresponding path program 1 times [2018-11-18 11:43:35,093 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-18 11:43:35,093 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-18 11:43:35,094 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 11:43:35,094 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 11:43:35,094 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 11:43:35,103 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 11:43:35,167 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 14 proven. 10 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-11-18 11:43:35,168 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 11:43:35,168 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_4b2264b2-8dab-414d-8c8e-efc5a460bd69/bin-2019/uautomizer/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-18 11:43:35,175 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 11:43:35,228 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 11:43:35,232 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 11:43:35,259 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 27 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-11-18 11:43:35,275 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-11-18 11:43:35,275 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [8] total 9 [2018-11-18 11:43:35,276 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-11-18 11:43:35,276 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-11-18 11:43:35,276 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=53, Unknown=0, NotChecked=0, Total=72 [2018-11-18 11:43:35,276 INFO L87 Difference]: Start difference. First operand 16353 states and 25813 transitions. Second operand 9 states. [2018-11-18 11:43:38,346 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 11:43:38,346 INFO L93 Difference]: Finished difference Result 50403 states and 122584 transitions. [2018-11-18 11:43:38,346 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-11-18 11:43:38,346 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 127 [2018-11-18 11:43:38,346 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 11:43:38,516 INFO L225 Difference]: With dead ends: 50403 [2018-11-18 11:43:38,516 INFO L226 Difference]: Without dead ends: 34077 [2018-11-18 11:43:38,619 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 158 GetRequests, 136 SyntacticMatches, 3 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 77 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=111, Invalid=309, Unknown=0, NotChecked=0, Total=420 [2018-11-18 11:43:38,633 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34077 states. [2018-11-18 11:43:40,203 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34077 to 32830. [2018-11-18 11:43:40,203 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 32830 states. [2018-11-18 11:43:40,473 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 32830 states to 32830 states and 76883 transitions. [2018-11-18 11:43:40,481 INFO L78 Accepts]: Start accepts. Automaton has 32830 states and 76883 transitions. Word has length 127 [2018-11-18 11:43:40,481 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 11:43:40,481 INFO L480 AbstractCegarLoop]: Abstraction has 32830 states and 76883 transitions. [2018-11-18 11:43:40,481 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-11-18 11:43:40,481 INFO L276 IsEmpty]: Start isEmpty. Operand 32830 states and 76883 transitions. [2018-11-18 11:43:40,490 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 131 [2018-11-18 11:43:40,490 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 11:43:40,490 INFO L375 BasicCegarLoop]: trace histogram [3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 11:43:40,490 INFO L423 AbstractCegarLoop]: === Iteration 15 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 11:43:40,491 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 11:43:40,491 INFO L82 PathProgramCache]: Analyzing trace with hash -1054762615, now seen corresponding path program 1 times [2018-11-18 11:43:40,491 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-18 11:43:40,491 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-18 11:43:40,492 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 11:43:40,492 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 11:43:40,492 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 11:43:40,503 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 11:43:40,765 WARN L180 SmtUtils]: Spent 174.00 ms on a formula simplification that was a NOOP. DAG size: 4 [2018-11-18 11:43:40,774 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 21 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-11-18 11:43:40,775 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 11:43:40,775 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-11-18 11:43:40,775 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-11-18 11:43:40,775 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-11-18 11:43:40,775 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2018-11-18 11:43:40,776 INFO L87 Difference]: Start difference. First operand 32830 states and 76883 transitions. Second operand 8 states. [2018-11-18 11:43:46,521 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 11:43:46,521 INFO L93 Difference]: Finished difference Result 121562 states and 411318 transitions. [2018-11-18 11:43:46,521 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-11-18 11:43:46,521 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 130 [2018-11-18 11:43:46,522 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 11:43:47,033 INFO L225 Difference]: With dead ends: 121562 [2018-11-18 11:43:47,033 INFO L226 Difference]: Without dead ends: 85798 [2018-11-18 11:43:47,567 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 30 GetRequests, 12 SyntacticMatches, 0 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 65 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=92, Invalid=288, Unknown=0, NotChecked=0, Total=380 [2018-11-18 11:43:47,608 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 85798 states. [2018-11-18 11:43:54,575 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 85798 to 83493. [2018-11-18 11:43:54,575 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 83493 states. [2018-11-18 11:43:55,602 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 83493 states to 83493 states and 249426 transitions. [2018-11-18 11:43:55,618 INFO L78 Accepts]: Start accepts. Automaton has 83493 states and 249426 transitions. Word has length 130 [2018-11-18 11:43:55,618 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 11:43:55,618 INFO L480 AbstractCegarLoop]: Abstraction has 83493 states and 249426 transitions. [2018-11-18 11:43:55,618 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-11-18 11:43:55,618 INFO L276 IsEmpty]: Start isEmpty. Operand 83493 states and 249426 transitions. [2018-11-18 11:43:55,634 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 131 [2018-11-18 11:43:55,634 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 11:43:55,635 INFO L375 BasicCegarLoop]: trace histogram [3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 11:43:55,635 INFO L423 AbstractCegarLoop]: === Iteration 16 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 11:43:55,635 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 11:43:55,635 INFO L82 PathProgramCache]: Analyzing trace with hash -1136720061, now seen corresponding path program 1 times [2018-11-18 11:43:55,635 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-18 11:43:55,635 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-18 11:43:55,636 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 11:43:55,636 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 11:43:55,636 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 11:43:55,647 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 11:43:55,728 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 16 proven. 6 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-11-18 11:43:55,728 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 11:43:55,729 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_4b2264b2-8dab-414d-8c8e-efc5a460bd69/bin-2019/uautomizer/z3 Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-18 11:43:55,735 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 11:43:55,785 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 11:43:55,788 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 11:43:55,830 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 28 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 11:43:55,846 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-11-18 11:43:55,846 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [7] total 8 [2018-11-18 11:43:55,846 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-11-18 11:43:55,847 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-11-18 11:43:55,847 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2018-11-18 11:43:55,847 INFO L87 Difference]: Start difference. First operand 83493 states and 249426 transitions. Second operand 8 states. [2018-11-18 11:44:10,522 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 11:44:10,522 INFO L93 Difference]: Finished difference Result 219343 states and 897718 transitions. [2018-11-18 11:44:10,523 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-11-18 11:44:10,523 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 130 [2018-11-18 11:44:10,523 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 11:44:11,160 INFO L225 Difference]: With dead ends: 219343 [2018-11-18 11:44:11,161 INFO L226 Difference]: Without dead ends: 135879 [2018-11-18 11:44:13,484 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 161 GetRequests, 141 SyntacticMatches, 2 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 64 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=117, Invalid=263, Unknown=0, NotChecked=0, Total=380 [2018-11-18 11:44:13,540 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 135879 states. [2018-11-18 11:44:18,735 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 135879 to 124861. [2018-11-18 11:44:18,735 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 124861 states. [2018-11-18 11:44:19,318 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 124861 states to 124861 states and 201132 transitions. [2018-11-18 11:44:19,338 INFO L78 Accepts]: Start accepts. Automaton has 124861 states and 201132 transitions. Word has length 130 [2018-11-18 11:44:19,338 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 11:44:19,338 INFO L480 AbstractCegarLoop]: Abstraction has 124861 states and 201132 transitions. [2018-11-18 11:44:19,338 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-11-18 11:44:19,338 INFO L276 IsEmpty]: Start isEmpty. Operand 124861 states and 201132 transitions. [2018-11-18 11:44:19,360 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 135 [2018-11-18 11:44:19,360 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 11:44:19,361 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 11:44:19,361 INFO L423 AbstractCegarLoop]: === Iteration 17 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 11:44:19,361 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 11:44:19,361 INFO L82 PathProgramCache]: Analyzing trace with hash 2112282159, now seen corresponding path program 1 times [2018-11-18 11:44:19,361 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-18 11:44:19,361 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-18 11:44:19,362 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 11:44:19,362 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 11:44:19,362 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 11:44:19,375 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 11:44:19,433 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 8 proven. 0 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2018-11-18 11:44:19,433 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 11:44:19,434 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-18 11:44:19,434 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-18 11:44:19,434 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-18 11:44:19,434 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-11-18 11:44:19,434 INFO L87 Difference]: Start difference. First operand 124861 states and 201132 transitions. Second operand 6 states. [2018-11-18 11:44:26,678 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 11:44:26,678 INFO L93 Difference]: Finished difference Result 290992 states and 440953 transitions. [2018-11-18 11:44:26,679 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-11-18 11:44:26,679 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 134 [2018-11-18 11:44:26,679 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 11:44:27,325 INFO L225 Difference]: With dead ends: 290992 [2018-11-18 11:44:27,325 INFO L226 Difference]: Without dead ends: 166167 [2018-11-18 11:44:27,616 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=32, Invalid=78, Unknown=0, NotChecked=0, Total=110 [2018-11-18 11:44:27,699 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 166167 states. [2018-11-18 11:44:33,012 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 166167 to 156172. [2018-11-18 11:44:33,012 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 156172 states. [2018-11-18 11:44:33,394 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 156172 states to 156172 states and 210603 transitions. [2018-11-18 11:44:33,413 INFO L78 Accepts]: Start accepts. Automaton has 156172 states and 210603 transitions. Word has length 134 [2018-11-18 11:44:33,414 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 11:44:33,414 INFO L480 AbstractCegarLoop]: Abstraction has 156172 states and 210603 transitions. [2018-11-18 11:44:33,414 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-18 11:44:33,414 INFO L276 IsEmpty]: Start isEmpty. Operand 156172 states and 210603 transitions. [2018-11-18 11:44:33,422 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 134 [2018-11-18 11:44:33,422 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 11:44:33,422 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 11:44:33,423 INFO L423 AbstractCegarLoop]: === Iteration 18 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 11:44:33,423 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 11:44:33,423 INFO L82 PathProgramCache]: Analyzing trace with hash 573004108, now seen corresponding path program 1 times [2018-11-18 11:44:33,423 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-18 11:44:33,423 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-18 11:44:33,424 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 11:44:33,424 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 11:44:33,424 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 11:44:33,428 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 11:44:33,469 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2018-11-18 11:44:33,469 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 11:44:33,469 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 11:44:33,469 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 11:44:33,469 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 11:44:33,469 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 11:44:33,470 INFO L87 Difference]: Start difference. First operand 156172 states and 210603 transitions. Second operand 4 states. [2018-11-18 11:44:41,289 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 11:44:41,289 INFO L93 Difference]: Finished difference Result 311246 states and 419828 transitions. [2018-11-18 11:44:41,290 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 11:44:41,290 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 133 [2018-11-18 11:44:41,290 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 11:44:41,765 INFO L225 Difference]: With dead ends: 311246 [2018-11-18 11:44:41,765 INFO L226 Difference]: Without dead ends: 155101 [2018-11-18 11:44:41,957 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 11:44:42,032 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 155101 states. [2018-11-18 11:44:47,024 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 155101 to 155101. [2018-11-18 11:44:47,024 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 155101 states. [2018-11-18 11:44:47,403 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 155101 states to 155101 states and 209257 transitions. [2018-11-18 11:44:47,420 INFO L78 Accepts]: Start accepts. Automaton has 155101 states and 209257 transitions. Word has length 133 [2018-11-18 11:44:47,420 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 11:44:47,420 INFO L480 AbstractCegarLoop]: Abstraction has 155101 states and 209257 transitions. [2018-11-18 11:44:47,420 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 11:44:47,420 INFO L276 IsEmpty]: Start isEmpty. Operand 155101 states and 209257 transitions. [2018-11-18 11:44:47,427 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 134 [2018-11-18 11:44:47,427 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 11:44:47,428 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 11:44:47,428 INFO L423 AbstractCegarLoop]: === Iteration 19 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 11:44:47,428 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 11:44:47,428 INFO L82 PathProgramCache]: Analyzing trace with hash -1156660373, now seen corresponding path program 1 times [2018-11-18 11:44:47,428 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-18 11:44:47,428 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-18 11:44:47,429 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 11:44:47,429 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 11:44:47,429 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 11:44:47,441 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 11:44:47,567 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 10 proven. 0 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2018-11-18 11:44:47,567 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 11:44:47,567 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-11-18 11:44:47,567 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-11-18 11:44:47,567 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-11-18 11:44:47,568 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=56, Unknown=0, NotChecked=0, Total=72 [2018-11-18 11:44:47,568 INFO L87 Difference]: Start difference. First operand 155101 states and 209257 transitions. Second operand 9 states. [2018-11-18 11:44:53,667 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 11:44:53,667 INFO L93 Difference]: Finished difference Result 288684 states and 396502 transitions. [2018-11-18 11:44:53,668 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-11-18 11:44:53,668 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 133 [2018-11-18 11:44:53,668 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 11:44:54,191 INFO L225 Difference]: With dead ends: 288684 [2018-11-18 11:44:54,192 INFO L226 Difference]: Without dead ends: 174699 [2018-11-18 11:44:54,373 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 5 SyntacticMatches, 2 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=48, Invalid=162, Unknown=0, NotChecked=0, Total=210 [2018-11-18 11:44:54,460 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 174699 states. [2018-11-18 11:45:00,214 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 174699 to 174056. [2018-11-18 11:45:00,214 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 174056 states. [2018-11-18 11:45:00,664 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 174056 states to 174056 states and 236606 transitions. [2018-11-18 11:45:00,682 INFO L78 Accepts]: Start accepts. Automaton has 174056 states and 236606 transitions. Word has length 133 [2018-11-18 11:45:00,682 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 11:45:00,682 INFO L480 AbstractCegarLoop]: Abstraction has 174056 states and 236606 transitions. [2018-11-18 11:45:00,683 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-11-18 11:45:00,683 INFO L276 IsEmpty]: Start isEmpty. Operand 174056 states and 236606 transitions. [2018-11-18 11:45:00,699 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 165 [2018-11-18 11:45:00,699 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 11:45:00,699 INFO L375 BasicCegarLoop]: trace histogram [3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 11:45:00,700 INFO L423 AbstractCegarLoop]: === Iteration 20 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 11:45:00,700 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 11:45:00,700 INFO L82 PathProgramCache]: Analyzing trace with hash 845977, now seen corresponding path program 1 times [2018-11-18 11:45:00,700 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-18 11:45:00,700 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-18 11:45:00,700 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 11:45:00,700 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 11:45:00,700 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 11:45:00,711 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 11:45:00,758 INFO L134 CoverageAnalysis]: Checked inductivity of 56 backedges. 30 proven. 0 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2018-11-18 11:45:00,758 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 11:45:00,758 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 11:45:00,758 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 11:45:00,759 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 11:45:00,759 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 11:45:00,759 INFO L87 Difference]: Start difference. First operand 174056 states and 236606 transitions. Second operand 4 states. [2018-11-18 11:45:07,961 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 11:45:07,961 INFO L93 Difference]: Finished difference Result 369361 states and 502177 transitions. [2018-11-18 11:45:07,962 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 11:45:07,962 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 164 [2018-11-18 11:45:07,962 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 11:45:08,479 INFO L225 Difference]: With dead ends: 369361 [2018-11-18 11:45:08,479 INFO L226 Difference]: Without dead ends: 195334 [2018-11-18 11:45:08,715 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 11:45:08,805 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 195334 states. [2018-11-18 11:45:18,489 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 195334 to 187817. [2018-11-18 11:45:18,490 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 187817 states. [2018-11-18 11:45:18,845 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 187817 states to 187817 states and 238847 transitions. [2018-11-18 11:45:18,867 INFO L78 Accepts]: Start accepts. Automaton has 187817 states and 238847 transitions. Word has length 164 [2018-11-18 11:45:18,867 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 11:45:18,867 INFO L480 AbstractCegarLoop]: Abstraction has 187817 states and 238847 transitions. [2018-11-18 11:45:18,867 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 11:45:18,867 INFO L276 IsEmpty]: Start isEmpty. Operand 187817 states and 238847 transitions. [2018-11-18 11:45:18,890 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 193 [2018-11-18 11:45:18,890 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 11:45:18,890 INFO L375 BasicCegarLoop]: trace histogram [5, 5, 5, 5, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 11:45:18,890 INFO L423 AbstractCegarLoop]: === Iteration 21 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 11:45:18,891 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 11:45:18,891 INFO L82 PathProgramCache]: Analyzing trace with hash 1321590439, now seen corresponding path program 1 times [2018-11-18 11:45:18,891 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-18 11:45:18,891 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-18 11:45:18,891 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 11:45:18,891 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 11:45:18,891 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 11:45:18,898 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 11:45:18,961 INFO L134 CoverageAnalysis]: Checked inductivity of 113 backedges. 23 proven. 20 refuted. 0 times theorem prover too weak. 70 trivial. 0 not checked. [2018-11-18 11:45:18,961 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 11:45:18,961 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_4b2264b2-8dab-414d-8c8e-efc5a460bd69/bin-2019/uautomizer/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-18 11:45:18,974 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 11:45:19,022 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 11:45:19,025 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 11:45:19,078 INFO L134 CoverageAnalysis]: Checked inductivity of 113 backedges. 62 proven. 0 refuted. 0 times theorem prover too weak. 51 trivial. 0 not checked. [2018-11-18 11:45:19,093 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-11-18 11:45:19,094 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [8] total 10 [2018-11-18 11:45:19,094 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-11-18 11:45:19,094 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-11-18 11:45:19,094 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=71, Unknown=0, NotChecked=0, Total=90 [2018-11-18 11:45:19,095 INFO L87 Difference]: Start difference. First operand 187817 states and 238847 transitions. Second operand 10 states. [2018-11-18 11:45:27,624 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 11:45:27,624 INFO L93 Difference]: Finished difference Result 404714 states and 518687 transitions. [2018-11-18 11:45:28,037 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-11-18 11:45:28,037 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 192 [2018-11-18 11:45:28,037 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 11:45:28,589 INFO L225 Difference]: With dead ends: 404714 [2018-11-18 11:45:28,589 INFO L226 Difference]: Without dead ends: 216926 [2018-11-18 11:45:28,776 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 223 GetRequests, 198 SyntacticMatches, 3 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 89 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=124, Invalid=428, Unknown=0, NotChecked=0, Total=552 [2018-11-18 11:45:28,879 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 216926 states. [2018-11-18 11:45:35,837 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 216926 to 187700. [2018-11-18 11:45:35,837 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 187700 states. [2018-11-18 11:45:36,171 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 187700 states to 187700 states and 233931 transitions. [2018-11-18 11:45:36,195 INFO L78 Accepts]: Start accepts. Automaton has 187700 states and 233931 transitions. Word has length 192 [2018-11-18 11:45:36,195 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 11:45:36,195 INFO L480 AbstractCegarLoop]: Abstraction has 187700 states and 233931 transitions. [2018-11-18 11:45:36,195 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-11-18 11:45:36,195 INFO L276 IsEmpty]: Start isEmpty. Operand 187700 states and 233931 transitions. [2018-11-18 11:45:36,221 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 218 [2018-11-18 11:45:36,221 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 11:45:36,222 INFO L375 BasicCegarLoop]: trace histogram [5, 5, 5, 4, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 11:45:36,222 INFO L423 AbstractCegarLoop]: === Iteration 22 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 11:45:36,222 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 11:45:36,222 INFO L82 PathProgramCache]: Analyzing trace with hash -1406148064, now seen corresponding path program 1 times [2018-11-18 11:45:36,222 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-18 11:45:36,222 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-18 11:45:36,223 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 11:45:36,223 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 11:45:36,223 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 11:45:36,236 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 11:45:36,298 INFO L134 CoverageAnalysis]: Checked inductivity of 129 backedges. 47 proven. 0 refuted. 0 times theorem prover too weak. 82 trivial. 0 not checked. [2018-11-18 11:45:36,298 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 11:45:36,298 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 11:45:36,298 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 11:45:36,299 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 11:45:36,299 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 11:45:36,299 INFO L87 Difference]: Start difference. First operand 187700 states and 233931 transitions. Second operand 4 states. [2018-11-18 11:45:42,694 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 11:45:42,694 INFO L93 Difference]: Finished difference Result 332610 states and 425435 transitions. [2018-11-18 11:45:42,695 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 11:45:42,695 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 217 [2018-11-18 11:45:42,695 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 11:45:43,113 INFO L225 Difference]: With dead ends: 332610 [2018-11-18 11:45:43,113 INFO L226 Difference]: Without dead ends: 151267 [2018-11-18 11:45:43,317 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 11:45:43,388 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 151267 states. [2018-11-18 11:45:49,132 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 151267 to 150474. [2018-11-18 11:45:49,132 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 150474 states. [2018-11-18 11:45:49,377 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 150474 states to 150474 states and 184742 transitions. [2018-11-18 11:45:49,394 INFO L78 Accepts]: Start accepts. Automaton has 150474 states and 184742 transitions. Word has length 217 [2018-11-18 11:45:49,394 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 11:45:49,394 INFO L480 AbstractCegarLoop]: Abstraction has 150474 states and 184742 transitions. [2018-11-18 11:45:49,394 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 11:45:49,394 INFO L276 IsEmpty]: Start isEmpty. Operand 150474 states and 184742 transitions. [2018-11-18 11:45:49,414 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 219 [2018-11-18 11:45:49,414 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 11:45:49,414 INFO L375 BasicCegarLoop]: trace histogram [5, 5, 5, 4, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 11:45:49,414 INFO L423 AbstractCegarLoop]: === Iteration 23 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 11:45:49,414 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 11:45:49,414 INFO L82 PathProgramCache]: Analyzing trace with hash 175325733, now seen corresponding path program 1 times [2018-11-18 11:45:49,414 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-18 11:45:49,414 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-18 11:45:49,415 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 11:45:49,415 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 11:45:49,415 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 11:45:49,425 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 11:45:49,494 INFO L134 CoverageAnalysis]: Checked inductivity of 129 backedges. 38 proven. 0 refuted. 0 times theorem prover too weak. 91 trivial. 0 not checked. [2018-11-18 11:45:49,495 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 11:45:49,495 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 11:45:49,495 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 11:45:49,495 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 11:45:49,495 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 11:45:49,496 INFO L87 Difference]: Start difference. First operand 150474 states and 184742 transitions. Second operand 4 states. [2018-11-18 11:45:58,169 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 11:45:58,169 INFO L93 Difference]: Finished difference Result 288509 states and 362720 transitions. [2018-11-18 11:45:58,169 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 11:45:58,169 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 218 [2018-11-18 11:45:58,169 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 11:45:58,563 INFO L225 Difference]: With dead ends: 288509 [2018-11-18 11:45:58,563 INFO L226 Difference]: Without dead ends: 138106 [2018-11-18 11:45:58,727 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 11:45:58,793 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 138106 states. [2018-11-18 11:46:04,035 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 138106 to 138106. [2018-11-18 11:46:04,035 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 138106 states. [2018-11-18 11:46:04,262 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 138106 states to 138106 states and 167015 transitions. [2018-11-18 11:46:04,278 INFO L78 Accepts]: Start accepts. Automaton has 138106 states and 167015 transitions. Word has length 218 [2018-11-18 11:46:04,279 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 11:46:04,279 INFO L480 AbstractCegarLoop]: Abstraction has 138106 states and 167015 transitions. [2018-11-18 11:46:04,279 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 11:46:04,279 INFO L276 IsEmpty]: Start isEmpty. Operand 138106 states and 167015 transitions. [2018-11-18 11:46:04,299 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 244 [2018-11-18 11:46:04,299 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 11:46:04,299 INFO L375 BasicCegarLoop]: trace histogram [5, 5, 5, 4, 4, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 11:46:04,299 INFO L423 AbstractCegarLoop]: === Iteration 24 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 11:46:04,299 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 11:46:04,300 INFO L82 PathProgramCache]: Analyzing trace with hash -455958204, now seen corresponding path program 1 times [2018-11-18 11:46:04,300 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-18 11:46:04,300 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-18 11:46:04,300 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 11:46:04,300 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 11:46:04,300 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 11:46:04,310 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 11:46:04,358 INFO L134 CoverageAnalysis]: Checked inductivity of 134 backedges. 43 proven. 0 refuted. 0 times theorem prover too weak. 91 trivial. 0 not checked. [2018-11-18 11:46:04,358 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 11:46:04,359 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 11:46:04,359 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 11:46:04,359 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 11:46:04,359 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 11:46:04,359 INFO L87 Difference]: Start difference. First operand 138106 states and 167015 transitions. Second operand 4 states. [2018-11-18 11:46:10,723 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 11:46:10,723 INFO L93 Difference]: Finished difference Result 289650 states and 360447 transitions. [2018-11-18 11:46:10,724 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 11:46:10,724 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 243 [2018-11-18 11:46:10,724 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 11:46:11,159 INFO L225 Difference]: With dead ends: 289650 [2018-11-18 11:46:11,159 INFO L226 Difference]: Without dead ends: 149583 [2018-11-18 11:46:11,337 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 11:46:11,408 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 149583 states. [2018-11-18 11:46:17,365 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 149583 to 149166. [2018-11-18 11:46:17,365 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 149166 states. [2018-11-18 11:46:17,614 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 149166 states to 149166 states and 177926 transitions. [2018-11-18 11:46:17,634 INFO L78 Accepts]: Start accepts. Automaton has 149166 states and 177926 transitions. Word has length 243 [2018-11-18 11:46:17,635 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 11:46:17,635 INFO L480 AbstractCegarLoop]: Abstraction has 149166 states and 177926 transitions. [2018-11-18 11:46:17,635 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 11:46:17,635 INFO L276 IsEmpty]: Start isEmpty. Operand 149166 states and 177926 transitions. [2018-11-18 11:46:17,651 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 245 [2018-11-18 11:46:17,651 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 11:46:17,651 INFO L375 BasicCegarLoop]: trace histogram [5, 5, 5, 4, 4, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 11:46:17,651 INFO L423 AbstractCegarLoop]: === Iteration 25 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 11:46:17,651 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 11:46:17,651 INFO L82 PathProgramCache]: Analyzing trace with hash -2011392991, now seen corresponding path program 1 times [2018-11-18 11:46:17,652 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-18 11:46:17,652 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-18 11:46:17,652 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 11:46:17,652 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 11:46:17,652 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 11:46:17,661 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 11:46:17,736 INFO L134 CoverageAnalysis]: Checked inductivity of 134 backedges. 34 proven. 0 refuted. 0 times theorem prover too weak. 100 trivial. 0 not checked. [2018-11-18 11:46:17,736 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 11:46:17,737 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 11:46:17,737 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 11:46:17,737 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 11:46:17,737 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 11:46:17,737 INFO L87 Difference]: Start difference. First operand 149166 states and 177926 transitions. Second operand 4 states. [2018-11-18 11:46:24,456 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 11:46:24,456 INFO L93 Difference]: Finished difference Result 280681 states and 340140 transitions. [2018-11-18 11:46:24,457 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 11:46:24,457 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 244 [2018-11-18 11:46:24,457 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 11:46:24,826 INFO L225 Difference]: With dead ends: 280681 [2018-11-18 11:46:24,826 INFO L226 Difference]: Without dead ends: 134928 [2018-11-18 11:46:24,954 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 11:46:25,017 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 134928 states. [2018-11-18 11:46:30,628 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 134928 to 134924. [2018-11-18 11:46:30,628 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 134924 states. [2018-11-18 11:46:30,839 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 134924 states to 134924 states and 158085 transitions. [2018-11-18 11:46:30,860 INFO L78 Accepts]: Start accepts. Automaton has 134924 states and 158085 transitions. Word has length 244 [2018-11-18 11:46:30,860 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 11:46:30,860 INFO L480 AbstractCegarLoop]: Abstraction has 134924 states and 158085 transitions. [2018-11-18 11:46:30,860 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 11:46:30,860 INFO L276 IsEmpty]: Start isEmpty. Operand 134924 states and 158085 transitions. [2018-11-18 11:46:30,874 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 261 [2018-11-18 11:46:30,875 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 11:46:30,875 INFO L375 BasicCegarLoop]: trace histogram [5, 5, 5, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 11:46:30,875 INFO L423 AbstractCegarLoop]: === Iteration 26 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 11:46:30,875 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 11:46:30,875 INFO L82 PathProgramCache]: Analyzing trace with hash 1383088872, now seen corresponding path program 1 times [2018-11-18 11:46:30,875 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-18 11:46:30,876 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-18 11:46:30,876 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 11:46:30,876 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 11:46:30,876 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 11:46:30,889 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 11:46:30,967 INFO L134 CoverageAnalysis]: Checked inductivity of 185 backedges. 30 proven. 26 refuted. 0 times theorem prover too weak. 129 trivial. 0 not checked. [2018-11-18 11:46:30,968 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 11:46:30,968 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_4b2264b2-8dab-414d-8c8e-efc5a460bd69/bin-2019/uautomizer/z3 Starting monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-18 11:46:30,981 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 11:46:31,038 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 11:46:31,042 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 11:46:31,094 INFO L134 CoverageAnalysis]: Checked inductivity of 185 backedges. 135 proven. 0 refuted. 0 times theorem prover too weak. 50 trivial. 0 not checked. [2018-11-18 11:46:31,110 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-11-18 11:46:31,110 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [7] total 8 [2018-11-18 11:46:31,110 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-11-18 11:46:31,111 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-11-18 11:46:31,111 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=40, Unknown=0, NotChecked=0, Total=56 [2018-11-18 11:46:31,111 INFO L87 Difference]: Start difference. First operand 134924 states and 158085 transitions. Second operand 8 states. [2018-11-18 11:46:36,398 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 11:46:36,398 INFO L93 Difference]: Finished difference Result 215094 states and 255615 transitions. [2018-11-18 11:46:36,398 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-11-18 11:46:36,399 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 260 [2018-11-18 11:46:36,399 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 11:46:36,666 INFO L225 Difference]: With dead ends: 215094 [2018-11-18 11:46:36,666 INFO L226 Difference]: Without dead ends: 98426 [2018-11-18 11:46:36,770 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 279 GetRequests, 258 SyntacticMatches, 10 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 19 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=40, Invalid=116, Unknown=0, NotChecked=0, Total=156 [2018-11-18 11:46:36,812 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 98426 states. [2018-11-18 11:46:40,923 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 98426 to 98157. [2018-11-18 11:46:40,923 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 98157 states. [2018-11-18 11:46:41,072 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 98157 states to 98157 states and 114447 transitions. [2018-11-18 11:46:41,085 INFO L78 Accepts]: Start accepts. Automaton has 98157 states and 114447 transitions. Word has length 260 [2018-11-18 11:46:41,085 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 11:46:41,085 INFO L480 AbstractCegarLoop]: Abstraction has 98157 states and 114447 transitions. [2018-11-18 11:46:41,085 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-11-18 11:46:41,085 INFO L276 IsEmpty]: Start isEmpty. Operand 98157 states and 114447 transitions. [2018-11-18 11:46:41,096 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 261 [2018-11-18 11:46:41,096 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 11:46:41,096 INFO L375 BasicCegarLoop]: trace histogram [5, 5, 5, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 11:46:41,096 INFO L423 AbstractCegarLoop]: === Iteration 27 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 11:46:41,096 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 11:46:41,096 INFO L82 PathProgramCache]: Analyzing trace with hash 1883291430, now seen corresponding path program 1 times [2018-11-18 11:46:41,096 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-18 11:46:41,096 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-18 11:46:41,097 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 11:46:41,097 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 11:46:41,097 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 11:46:41,101 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 11:46:41,149 INFO L134 CoverageAnalysis]: Checked inductivity of 185 backedges. 23 proven. 0 refuted. 0 times theorem prover too weak. 162 trivial. 0 not checked. [2018-11-18 11:46:41,150 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 11:46:41,150 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 11:46:41,150 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 11:46:41,150 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 11:46:41,150 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 11:46:41,151 INFO L87 Difference]: Start difference. First operand 98157 states and 114447 transitions. Second operand 4 states. [2018-11-18 11:46:45,370 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 11:46:45,370 INFO L93 Difference]: Finished difference Result 105850 states and 122852 transitions. [2018-11-18 11:46:45,371 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 11:46:45,371 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 260 [2018-11-18 11:46:45,371 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 11:46:45,536 INFO L225 Difference]: With dead ends: 105850 [2018-11-18 11:46:45,536 INFO L226 Difference]: Without dead ends: 97929 [2018-11-18 11:46:45,561 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 11:46:45,606 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 97929 states. [2018-11-18 11:46:49,752 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 97929 to 89982. [2018-11-18 11:46:49,752 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 89982 states. [2018-11-18 11:46:49,896 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 89982 states to 89982 states and 105435 transitions. [2018-11-18 11:46:49,905 INFO L78 Accepts]: Start accepts. Automaton has 89982 states and 105435 transitions. Word has length 260 [2018-11-18 11:46:49,905 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 11:46:49,905 INFO L480 AbstractCegarLoop]: Abstraction has 89982 states and 105435 transitions. [2018-11-18 11:46:49,905 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 11:46:49,905 INFO L276 IsEmpty]: Start isEmpty. Operand 89982 states and 105435 transitions. [2018-11-18 11:46:49,914 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 270 [2018-11-18 11:46:49,914 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 11:46:49,915 INFO L375 BasicCegarLoop]: trace histogram [5, 5, 5, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 11:46:49,915 INFO L423 AbstractCegarLoop]: === Iteration 28 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 11:46:49,915 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 11:46:49,915 INFO L82 PathProgramCache]: Analyzing trace with hash 1194398283, now seen corresponding path program 1 times [2018-11-18 11:46:49,915 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-18 11:46:49,915 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-18 11:46:49,916 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 11:46:49,916 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 11:46:49,916 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 11:46:49,926 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 11:46:50,020 INFO L134 CoverageAnalysis]: Checked inductivity of 185 backedges. 32 proven. 0 refuted. 0 times theorem prover too weak. 153 trivial. 0 not checked. [2018-11-18 11:46:50,020 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 11:46:50,020 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-18 11:46:50,021 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-18 11:46:50,022 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-18 11:46:50,022 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2018-11-18 11:46:50,023 INFO L87 Difference]: Start difference. First operand 89982 states and 105435 transitions. Second operand 5 states. [2018-11-18 11:46:54,713 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 11:46:54,713 INFO L93 Difference]: Finished difference Result 173548 states and 204334 transitions. [2018-11-18 11:46:54,713 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-11-18 11:46:54,713 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 269 [2018-11-18 11:46:54,713 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 11:46:54,964 INFO L225 Difference]: With dead ends: 173548 [2018-11-18 11:46:54,965 INFO L226 Difference]: Without dead ends: 85772 [2018-11-18 11:46:55,054 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 5 SyntacticMatches, 1 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2018-11-18 11:46:55,095 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 85772 states. [2018-11-18 11:46:58,846 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 85772 to 85339. [2018-11-18 11:46:58,847 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 85339 states. [2018-11-18 11:46:58,977 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 85339 states to 85339 states and 98717 transitions. [2018-11-18 11:46:58,988 INFO L78 Accepts]: Start accepts. Automaton has 85339 states and 98717 transitions. Word has length 269 [2018-11-18 11:46:58,989 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 11:46:58,989 INFO L480 AbstractCegarLoop]: Abstraction has 85339 states and 98717 transitions. [2018-11-18 11:46:58,989 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-18 11:46:58,989 INFO L276 IsEmpty]: Start isEmpty. Operand 85339 states and 98717 transitions. [2018-11-18 11:46:58,997 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 285 [2018-11-18 11:46:58,997 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 11:46:58,997 INFO L375 BasicCegarLoop]: trace histogram [5, 5, 5, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 11:46:58,997 INFO L423 AbstractCegarLoop]: === Iteration 29 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 11:46:58,997 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 11:46:58,998 INFO L82 PathProgramCache]: Analyzing trace with hash -381045038, now seen corresponding path program 1 times [2018-11-18 11:46:58,998 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-18 11:46:58,998 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-18 11:46:58,998 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 11:46:58,998 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 11:46:58,998 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 11:46:59,008 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 11:46:59,060 INFO L134 CoverageAnalysis]: Checked inductivity of 185 backedges. 38 proven. 0 refuted. 0 times theorem prover too weak. 147 trivial. 0 not checked. [2018-11-18 11:46:59,060 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 11:46:59,060 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-18 11:46:59,060 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-18 11:46:59,060 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-18 11:46:59,060 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-18 11:46:59,061 INFO L87 Difference]: Start difference. First operand 85339 states and 98717 transitions. Second operand 3 states. [2018-11-18 11:47:01,913 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 11:47:01,913 INFO L93 Difference]: Finished difference Result 134101 states and 156990 transitions. [2018-11-18 11:47:01,913 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-18 11:47:01,913 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 284 [2018-11-18 11:47:01,914 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 11:47:02,074 INFO L225 Difference]: With dead ends: 134101 [2018-11-18 11:47:02,075 INFO L226 Difference]: Without dead ends: 57093 [2018-11-18 11:47:02,161 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-18 11:47:02,191 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 57093 states. [2018-11-18 11:47:04,768 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 57093 to 56970. [2018-11-18 11:47:04,768 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 56970 states. [2018-11-18 11:47:04,857 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 56970 states to 56970 states and 65585 transitions. [2018-11-18 11:47:04,865 INFO L78 Accepts]: Start accepts. Automaton has 56970 states and 65585 transitions. Word has length 284 [2018-11-18 11:47:04,866 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 11:47:04,866 INFO L480 AbstractCegarLoop]: Abstraction has 56970 states and 65585 transitions. [2018-11-18 11:47:04,866 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-18 11:47:04,866 INFO L276 IsEmpty]: Start isEmpty. Operand 56970 states and 65585 transitions. [2018-11-18 11:47:04,873 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 285 [2018-11-18 11:47:04,873 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 11:47:04,873 INFO L375 BasicCegarLoop]: trace histogram [5, 5, 5, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 11:47:04,873 INFO L423 AbstractCegarLoop]: === Iteration 30 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 11:47:04,873 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 11:47:04,874 INFO L82 PathProgramCache]: Analyzing trace with hash -1113012464, now seen corresponding path program 1 times [2018-11-18 11:47:04,874 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-18 11:47:04,874 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-18 11:47:04,874 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 11:47:04,874 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 11:47:04,874 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 11:47:04,884 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 11:47:04,990 INFO L134 CoverageAnalysis]: Checked inductivity of 185 backedges. 46 proven. 27 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2018-11-18 11:47:04,990 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 11:47:04,990 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_4b2264b2-8dab-414d-8c8e-efc5a460bd69/bin-2019/uautomizer/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-18 11:47:04,997 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 11:47:05,070 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 11:47:05,075 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 11:47:05,128 INFO L134 CoverageAnalysis]: Checked inductivity of 185 backedges. 91 proven. 0 refuted. 0 times theorem prover too weak. 94 trivial. 0 not checked. [2018-11-18 11:47:05,371 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-11-18 11:47:05,372 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [9] total 13 [2018-11-18 11:47:05,372 INFO L459 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-11-18 11:47:05,372 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-11-18 11:47:05,372 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=27, Invalid=129, Unknown=0, NotChecked=0, Total=156 [2018-11-18 11:47:05,373 INFO L87 Difference]: Start difference. First operand 56970 states and 65585 transitions. Second operand 13 states. [2018-11-18 11:47:08,532 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 11:47:08,532 INFO L93 Difference]: Finished difference Result 98025 states and 113545 transitions. [2018-11-18 11:47:08,532 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-11-18 11:47:08,532 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 284 [2018-11-18 11:47:08,533 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 11:47:08,666 INFO L225 Difference]: With dead ends: 98025 [2018-11-18 11:47:08,666 INFO L226 Difference]: Without dead ends: 47848 [2018-11-18 11:47:08,724 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 310 GetRequests, 289 SyntacticMatches, 0 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 41 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=104, Invalid=402, Unknown=0, NotChecked=0, Total=506 [2018-11-18 11:47:08,750 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 47848 states. [2018-11-18 11:47:10,872 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 47848 to 46662. [2018-11-18 11:47:10,872 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 46662 states. [2018-11-18 11:47:10,939 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 46662 states to 46662 states and 53628 transitions. [2018-11-18 11:47:10,945 INFO L78 Accepts]: Start accepts. Automaton has 46662 states and 53628 transitions. Word has length 284 [2018-11-18 11:47:10,945 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 11:47:10,946 INFO L480 AbstractCegarLoop]: Abstraction has 46662 states and 53628 transitions. [2018-11-18 11:47:10,946 INFO L481 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-11-18 11:47:10,946 INFO L276 IsEmpty]: Start isEmpty. Operand 46662 states and 53628 transitions. [2018-11-18 11:47:10,950 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 286 [2018-11-18 11:47:10,950 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 11:47:10,950 INFO L375 BasicCegarLoop]: trace histogram [5, 5, 5, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 11:47:10,951 INFO L423 AbstractCegarLoop]: === Iteration 31 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 11:47:10,951 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 11:47:10,951 INFO L82 PathProgramCache]: Analyzing trace with hash -1141958359, now seen corresponding path program 1 times [2018-11-18 11:47:10,951 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-18 11:47:10,951 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-18 11:47:10,951 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 11:47:10,951 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 11:47:10,952 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 11:47:10,960 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 11:47:11,034 INFO L134 CoverageAnalysis]: Checked inductivity of 186 backedges. 29 proven. 0 refuted. 0 times theorem prover too weak. 157 trivial. 0 not checked. [2018-11-18 11:47:11,034 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 11:47:11,034 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-18 11:47:11,034 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-18 11:47:11,035 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-18 11:47:11,035 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2018-11-18 11:47:11,035 INFO L87 Difference]: Start difference. First operand 46662 states and 53628 transitions. Second operand 6 states. [2018-11-18 11:47:13,312 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 11:47:13,312 INFO L93 Difference]: Finished difference Result 73820 states and 84828 transitions. [2018-11-18 11:47:13,312 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-11-18 11:47:13,312 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 285 [2018-11-18 11:47:13,313 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 11:47:13,414 INFO L225 Difference]: With dead ends: 73820 [2018-11-18 11:47:13,414 INFO L226 Difference]: Without dead ends: 46417 [2018-11-18 11:47:13,449 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=20, Invalid=36, Unknown=0, NotChecked=0, Total=56 [2018-11-18 11:47:13,473 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 46417 states. [2018-11-18 11:47:15,596 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 46417 to 46361. [2018-11-18 11:47:15,596 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 46361 states. [2018-11-18 11:47:15,659 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 46361 states to 46361 states and 53132 transitions. [2018-11-18 11:47:15,664 INFO L78 Accepts]: Start accepts. Automaton has 46361 states and 53132 transitions. Word has length 285 [2018-11-18 11:47:15,665 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 11:47:15,665 INFO L480 AbstractCegarLoop]: Abstraction has 46361 states and 53132 transitions. [2018-11-18 11:47:15,665 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-18 11:47:15,665 INFO L276 IsEmpty]: Start isEmpty. Operand 46361 states and 53132 transitions. [2018-11-18 11:47:15,669 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 287 [2018-11-18 11:47:15,669 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 11:47:15,670 INFO L375 BasicCegarLoop]: trace histogram [6, 6, 6, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 11:47:15,670 INFO L423 AbstractCegarLoop]: === Iteration 32 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 11:47:15,670 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 11:47:15,670 INFO L82 PathProgramCache]: Analyzing trace with hash -748871650, now seen corresponding path program 1 times [2018-11-18 11:47:15,670 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-18 11:47:15,670 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-18 11:47:15,670 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 11:47:15,671 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 11:47:15,671 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 11:47:15,676 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 11:47:15,745 INFO L134 CoverageAnalysis]: Checked inductivity of 233 backedges. 47 proven. 17 refuted. 0 times theorem prover too weak. 169 trivial. 0 not checked. [2018-11-18 11:47:15,745 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 11:47:15,745 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_4b2264b2-8dab-414d-8c8e-efc5a460bd69/bin-2019/uautomizer/z3 Starting monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-18 11:47:15,752 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 11:47:15,815 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 11:47:15,820 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 11:47:15,889 INFO L134 CoverageAnalysis]: Checked inductivity of 233 backedges. 160 proven. 4 refuted. 0 times theorem prover too weak. 69 trivial. 0 not checked. [2018-11-18 11:47:15,907 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-18 11:47:15,907 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 5] total 13 [2018-11-18 11:47:15,907 INFO L459 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-11-18 11:47:15,907 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-11-18 11:47:15,907 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=28, Invalid=128, Unknown=0, NotChecked=0, Total=156 [2018-11-18 11:47:15,908 INFO L87 Difference]: Start difference. First operand 46361 states and 53132 transitions. Second operand 13 states. [2018-11-18 11:47:21,227 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 11:47:21,227 INFO L93 Difference]: Finished difference Result 106072 states and 125583 transitions. [2018-11-18 11:47:21,227 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2018-11-18 11:47:21,227 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 286 [2018-11-18 11:47:21,228 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 11:47:21,423 INFO L225 Difference]: With dead ends: 106072 [2018-11-18 11:47:21,424 INFO L226 Difference]: Without dead ends: 80550 [2018-11-18 11:47:21,463 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 333 GetRequests, 297 SyntacticMatches, 0 SemanticMatches, 36 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 285 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=255, Invalid=1151, Unknown=0, NotChecked=0, Total=1406 [2018-11-18 11:47:21,500 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 80550 states. [2018-11-18 11:47:25,148 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 80550 to 73820. [2018-11-18 11:47:25,148 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 73820 states. [2018-11-18 11:47:25,275 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 73820 states to 73820 states and 86355 transitions. [2018-11-18 11:47:25,284 INFO L78 Accepts]: Start accepts. Automaton has 73820 states and 86355 transitions. Word has length 286 [2018-11-18 11:47:25,284 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 11:47:25,285 INFO L480 AbstractCegarLoop]: Abstraction has 73820 states and 86355 transitions. [2018-11-18 11:47:25,285 INFO L481 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-11-18 11:47:25,285 INFO L276 IsEmpty]: Start isEmpty. Operand 73820 states and 86355 transitions. [2018-11-18 11:47:25,289 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 290 [2018-11-18 11:47:25,289 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 11:47:25,290 INFO L375 BasicCegarLoop]: trace histogram [5, 5, 5, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 11:47:25,290 INFO L423 AbstractCegarLoop]: === Iteration 33 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 11:47:25,290 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 11:47:25,290 INFO L82 PathProgramCache]: Analyzing trace with hash 920103264, now seen corresponding path program 1 times [2018-11-18 11:47:25,290 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-18 11:47:25,290 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-18 11:47:25,291 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 11:47:25,291 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 11:47:25,291 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 11:47:25,299 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 11:47:25,407 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 32 proven. 1 refuted. 0 times theorem prover too weak. 157 trivial. 0 not checked. [2018-11-18 11:47:25,407 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 11:47:25,407 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_4b2264b2-8dab-414d-8c8e-efc5a460bd69/bin-2019/uautomizer/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-18 11:47:25,414 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 11:47:25,480 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 11:47:25,486 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 11:47:25,597 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 35 proven. 100 refuted. 0 times theorem prover too weak. 55 trivial. 0 not checked. [2018-11-18 11:47:25,613 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-18 11:47:25,613 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 10] total 12 [2018-11-18 11:47:25,614 INFO L459 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-11-18 11:47:25,614 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-11-18 11:47:25,614 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=111, Unknown=0, NotChecked=0, Total=132 [2018-11-18 11:47:25,614 INFO L87 Difference]: Start difference. First operand 73820 states and 86355 transitions. Second operand 12 states. [2018-11-18 11:47:33,124 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 11:47:33,124 INFO L93 Difference]: Finished difference Result 166094 states and 206070 transitions. [2018-11-18 11:47:33,124 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2018-11-18 11:47:33,125 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 289 [2018-11-18 11:47:33,125 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 11:47:33,626 INFO L225 Difference]: With dead ends: 166094 [2018-11-18 11:47:33,626 INFO L226 Difference]: Without dead ends: 97881 [2018-11-18 11:47:33,735 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 323 GetRequests, 298 SyntacticMatches, 2 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 73 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=87, Invalid=513, Unknown=0, NotChecked=0, Total=600 [2018-11-18 11:47:33,783 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 97881 states. [2018-11-18 11:47:43,067 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 97881 to 85554. [2018-11-18 11:47:43,067 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 85554 states. [2018-11-18 11:47:43,220 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 85554 states to 85554 states and 99791 transitions. [2018-11-18 11:47:43,234 INFO L78 Accepts]: Start accepts. Automaton has 85554 states and 99791 transitions. Word has length 289 [2018-11-18 11:47:43,234 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 11:47:43,234 INFO L480 AbstractCegarLoop]: Abstraction has 85554 states and 99791 transitions. [2018-11-18 11:47:43,234 INFO L481 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-11-18 11:47:43,234 INFO L276 IsEmpty]: Start isEmpty. Operand 85554 states and 99791 transitions. [2018-11-18 11:47:43,239 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 297 [2018-11-18 11:47:43,239 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 11:47:43,240 INFO L375 BasicCegarLoop]: trace histogram [5, 5, 5, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 11:47:43,240 INFO L423 AbstractCegarLoop]: === Iteration 34 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 11:47:43,240 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 11:47:43,240 INFO L82 PathProgramCache]: Analyzing trace with hash 1598104973, now seen corresponding path program 1 times [2018-11-18 11:47:43,240 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-18 11:47:43,240 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-18 11:47:43,240 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 11:47:43,241 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 11:47:43,241 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 11:47:43,256 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-18 11:47:43,273 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-18 11:47:43,358 INFO L442 BasicCegarLoop]: Counterexample might be feasible [2018-11-18 11:47:43,483 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 18.11 11:47:43 BoogieIcfgContainer [2018-11-18 11:47:43,483 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-11-18 11:47:43,483 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2018-11-18 11:47:43,483 INFO L271 PluginConnector]: Initializing Witness Printer... [2018-11-18 11:47:43,483 INFO L276 PluginConnector]: Witness Printer initialized [2018-11-18 11:47:43,484 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 18.11 11:43:20" (3/4) ... [2018-11-18 11:47:43,486 INFO L138 WitnessPrinter]: Generating witness for reachability counterexample [2018-11-18 11:47:43,614 INFO L145 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/working_dir_4b2264b2-8dab-414d-8c8e-efc5a460bd69/bin-2019/uautomizer/witness.graphml [2018-11-18 11:47:43,614 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2018-11-18 11:47:43,615 INFO L168 Benchmark]: Toolchain (without parser) took 263597.30 ms. Allocated memory was 1.0 GB in the beginning and 8.2 GB in the end (delta: 7.1 GB). Free memory was 958.5 MB in the beginning and 4.5 GB in the end (delta: -3.6 GB). Peak memory consumption was 3.6 GB. Max. memory is 11.5 GB. [2018-11-18 11:47:43,615 INFO L168 Benchmark]: CDTParser took 0.11 ms. Allocated memory is still 1.0 GB. Free memory is still 985.3 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-11-18 11:47:43,616 INFO L168 Benchmark]: CACSL2BoogieTranslator took 240.42 ms. Allocated memory is still 1.0 GB. Free memory was 958.5 MB in the beginning and 942.4 MB in the end (delta: 16.1 MB). Peak memory consumption was 16.1 MB. Max. memory is 11.5 GB. [2018-11-18 11:47:43,616 INFO L168 Benchmark]: Boogie Preprocessor took 64.74 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 170.9 MB). Free memory was 942.4 MB in the beginning and 1.2 GB in the end (delta: -233.3 MB). Peak memory consumption was 17.7 MB. Max. memory is 11.5 GB. [2018-11-18 11:47:43,616 INFO L168 Benchmark]: RCFGBuilder took 388.98 ms. Allocated memory is still 1.2 GB. Free memory was 1.2 GB in the beginning and 1.1 GB in the end (delta: 48.3 MB). Peak memory consumption was 48.3 MB. Max. memory is 11.5 GB. [2018-11-18 11:47:43,616 INFO L168 Benchmark]: TraceAbstraction took 262767.94 ms. Allocated memory was 1.2 GB in the beginning and 8.2 GB in the end (delta: 7.0 GB). Free memory was 1.1 GB in the beginning and 4.6 GB in the end (delta: -3.5 GB). Peak memory consumption was 3.5 GB. Max. memory is 11.5 GB. [2018-11-18 11:47:43,616 INFO L168 Benchmark]: Witness Printer took 131.45 ms. Allocated memory is still 8.2 GB. Free memory was 4.6 GB in the beginning and 4.5 GB in the end (delta: 49.4 MB). Peak memory consumption was 49.4 MB. Max. memory is 11.5 GB. [2018-11-18 11:47:43,618 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.11 ms. Allocated memory is still 1.0 GB. Free memory is still 985.3 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 240.42 ms. Allocated memory is still 1.0 GB. Free memory was 958.5 MB in the beginning and 942.4 MB in the end (delta: 16.1 MB). Peak memory consumption was 16.1 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 64.74 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 170.9 MB). Free memory was 942.4 MB in the beginning and 1.2 GB in the end (delta: -233.3 MB). Peak memory consumption was 17.7 MB. Max. memory is 11.5 GB. * RCFGBuilder took 388.98 ms. Allocated memory is still 1.2 GB. Free memory was 1.2 GB in the beginning and 1.1 GB in the end (delta: 48.3 MB). Peak memory consumption was 48.3 MB. Max. memory is 11.5 GB. * TraceAbstraction took 262767.94 ms. Allocated memory was 1.2 GB in the beginning and 8.2 GB in the end (delta: 7.0 GB). Free memory was 1.1 GB in the beginning and 4.6 GB in the end (delta: -3.5 GB). Peak memory consumption was 3.5 GB. Max. memory is 11.5 GB. * Witness Printer took 131.45 ms. Allocated memory is still 8.2 GB. Free memory was 4.6 GB in the beginning and 4.5 GB in the end (delta: 49.4 MB). Peak memory consumption was 49.4 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 9]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L15] int max_loop ; [L16] int num ; [L17] int i ; [L18] int e ; [L19] int timer ; [L20] char data_0 ; [L21] char data_1 ; [L64] int P_1_pc; [L65] int P_1_st ; [L66] int P_1_i ; [L67] int P_1_ev ; [L122] int P_2_pc ; [L123] int P_2_st ; [L124] int P_2_i ; [L125] int P_2_ev ; [L190] int C_1_pc ; [L191] int C_1_st ; [L192] int C_1_i ; [L193] int C_1_ev ; [L194] int C_1_pr ; VAL [\old(C_1_ev)=80, \old(C_1_i)=69, \old(C_1_pc)=85, \old(C_1_pr)=82, \old(C_1_st)=84, \old(data_0)=77, \old(data_1)=68, \old(e)=67, \old(i)=71, \old(max_loop)=83, \old(num)=70, \old(P_1_ev)=72, \old(P_1_i)=81, \old(P_1_pc)=74, \old(P_1_st)=78, \old(P_2_ev)=73, \old(P_2_i)=86, \old(P_2_pc)=76, \old(P_2_st)=79, \old(timer)=75, C_1_ev=0, C_1_i=0, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=0, num=0, P_1_ev=0, P_1_i=0, P_1_pc=0, P_1_st=0, P_2_ev=0, P_2_i=0, P_2_pc=0, P_2_st=0, timer=0] [L593] int count ; [L594] int __retres2 ; [L598] num = 0 [L599] i = 0 [L600] max_loop = 2 [L602] timer = 0 [L603] P_1_pc = 0 [L604] P_2_pc = 0 [L605] C_1_pc = 0 [L607] count = 0 VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=0, \old(timer)=0, C_1_ev=0, C_1_i=0, C_1_pc=0, C_1_pr=0, C_1_st=0, count=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=0, P_1_pc=0, P_1_st=0, P_2_ev=0, P_2_i=0, P_2_pc=0, P_2_st=0, timer=0] [L608] CALL init_model() VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=0, \old(timer)=0, C_1_ev=0, C_1_i=0, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=0, P_1_pc=0, P_1_st=0, P_2_ev=0, P_2_i=0, P_2_pc=0, P_2_st=0, timer=0] [L585] P_1_i = 1 [L586] P_2_i = 1 [L587] RET C_1_i = 1 VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=0, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, P_2_ev=0, P_2_i=1, P_2_pc=0, P_2_st=0, timer=0] [L608] init_model() VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=0, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, count=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, P_2_ev=0, P_2_i=1, P_2_pc=0, P_2_st=0, timer=0] [L609] CALL start_simulation() VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=0, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, P_2_ev=0, P_2_i=1, P_2_pc=0, P_2_st=0, timer=0] [L523] int kernel_st ; [L524] int tmp ; [L525] int tmp___0 ; [L529] kernel_st = 0 VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=0, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, kernel_st=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, P_2_ev=0, P_2_i=1, P_2_pc=0, P_2_st=0, timer=0] [L530] FCALL update_channels() VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=0, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, kernel_st=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, P_2_ev=0, P_2_i=1, P_2_pc=0, P_2_st=0, timer=0] [L531] CALL init_threads() VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=0, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, P_2_ev=0, P_2_i=1, P_2_pc=0, P_2_st=0, timer=0] [L294] COND TRUE (int )P_1_i == 1 [L295] P_1_st = 0 VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=0, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, P_2_ev=0, P_2_i=1, P_2_pc=0, P_2_st=0, timer=0] [L299] COND TRUE (int )P_2_i == 1 [L300] P_2_st = 0 VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=0, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, P_2_ev=0, P_2_i=1, P_2_pc=0, P_2_st=0, timer=0] [L304] COND TRUE (int )C_1_i == 1 [L305] RET C_1_st = 0 VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=0, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, P_2_ev=0, P_2_i=1, P_2_pc=0, P_2_st=0, timer=0] [L531] init_threads() VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=0, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, kernel_st=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, P_2_ev=0, P_2_i=1, P_2_pc=0, P_2_st=0, timer=0] [L532] FCALL fire_delta_events() VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=0, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, kernel_st=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, P_2_ev=0, P_2_i=1, P_2_pc=0, P_2_st=0, timer=0] [L533] CALL activate_threads() VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=0, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, P_2_ev=0, P_2_i=1, P_2_pc=0, P_2_st=0, timer=0] [L459] int tmp ; [L460] int tmp___0 ; [L461] int tmp___1 ; VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=0, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, P_2_ev=0, P_2_i=1, P_2_pc=0, P_2_st=0, timer=0] [L465] CALL, EXPR is_P_1_triggered() VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=0, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, P_2_ev=0, P_2_i=1, P_2_pc=0, P_2_st=0, timer=0] [L104] int __retres1 ; VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=0, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, P_2_ev=0, P_2_i=1, P_2_pc=0, P_2_st=0, timer=0] [L107] COND FALSE !((int )P_1_pc == 1) VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=0, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, P_2_ev=0, P_2_i=1, P_2_pc=0, P_2_st=0, timer=0] [L117] __retres1 = 0 VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=0, \old(timer)=0, __retres1=0, C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, P_2_ev=0, P_2_i=1, P_2_pc=0, P_2_st=0, timer=0] [L119] RET return (__retres1); VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=0, \old(timer)=0, \result=0, __retres1=0, C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, P_2_ev=0, P_2_i=1, P_2_pc=0, P_2_st=0, timer=0] [L465] EXPR is_P_1_triggered() VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=0, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, is_P_1_triggered()=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, P_2_ev=0, P_2_i=1, P_2_pc=0, P_2_st=0, timer=0] [L465] tmp = is_P_1_triggered() [L467] COND FALSE !(\read(tmp)) VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=0, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, P_2_ev=0, P_2_i=1, P_2_pc=0, P_2_st=0, timer=0, tmp=0] [L473] CALL, EXPR is_P_2_triggered() VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=0, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, P_2_ev=0, P_2_i=1, P_2_pc=0, P_2_st=0, timer=0] [L172] int __retres1 ; VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=0, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, P_2_ev=0, P_2_i=1, P_2_pc=0, P_2_st=0, timer=0] [L175] COND FALSE !((int )P_2_pc == 1) VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=0, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, P_2_ev=0, P_2_i=1, P_2_pc=0, P_2_st=0, timer=0] [L185] __retres1 = 0 VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=0, \old(timer)=0, __retres1=0, C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, P_2_ev=0, P_2_i=1, P_2_pc=0, P_2_st=0, timer=0] [L187] RET return (__retres1); VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=0, \old(timer)=0, \result=0, __retres1=0, C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, P_2_ev=0, P_2_i=1, P_2_pc=0, P_2_st=0, timer=0] [L473] EXPR is_P_2_triggered() VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=0, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, is_P_2_triggered()=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, P_2_ev=0, P_2_i=1, P_2_pc=0, P_2_st=0, timer=0, tmp=0] [L473] tmp___0 = is_P_2_triggered() [L475] COND FALSE !(\read(tmp___0)) VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=0, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, P_2_ev=0, P_2_i=1, P_2_pc=0, P_2_st=0, timer=0, tmp=0, tmp___0=0] [L481] CALL, EXPR is_C_1_triggered() VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=0, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, P_2_ev=0, P_2_i=1, P_2_pc=0, P_2_st=0, timer=0] [L254] int __retres1 ; VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=0, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, P_2_ev=0, P_2_i=1, P_2_pc=0, P_2_st=0, timer=0] [L257] COND FALSE !((int )C_1_pc == 1) VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=0, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, P_2_ev=0, P_2_i=1, P_2_pc=0, P_2_st=0, timer=0] [L267] COND FALSE !((int )C_1_pc == 2) VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=0, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, P_2_ev=0, P_2_i=1, P_2_pc=0, P_2_st=0, timer=0] [L277] __retres1 = 0 VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=0, \old(timer)=0, __retres1=0, C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, P_2_ev=0, P_2_i=1, P_2_pc=0, P_2_st=0, timer=0] [L279] RET return (__retres1); VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=0, \old(timer)=0, \result=0, __retres1=0, C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, P_2_ev=0, P_2_i=1, P_2_pc=0, P_2_st=0, timer=0] [L481] EXPR is_C_1_triggered() VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=0, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, is_C_1_triggered()=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, P_2_ev=0, P_2_i=1, P_2_pc=0, P_2_st=0, timer=0, tmp=0, tmp___0=0] [L481] tmp___1 = is_C_1_triggered() [L483] COND FALSE, RET !(\read(tmp___1)) VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=0, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, P_2_ev=0, P_2_i=1, P_2_pc=0, P_2_st=0, timer=0, tmp=0, tmp___0=0, tmp___1=0] [L533] activate_threads() VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=0, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, kernel_st=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, P_2_ev=0, P_2_i=1, P_2_pc=0, P_2_st=0, timer=0] [L534] FCALL reset_delta_events() VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=0, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, kernel_st=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, P_2_ev=0, P_2_i=1, P_2_pc=0, P_2_st=0, timer=0] [L537] COND TRUE 1 VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=0, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, kernel_st=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, P_2_ev=0, P_2_i=1, P_2_pc=0, P_2_st=0, timer=0] [L540] kernel_st = 1 VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=0, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, kernel_st=1, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, P_2_ev=0, P_2_i=1, P_2_pc=0, P_2_st=0, timer=0] [L541] CALL eval() VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=0, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, P_2_ev=0, P_2_i=1, P_2_pc=0, P_2_st=0, timer=0] [L339] int tmp ; [L340] int tmp___0 ; [L341] int tmp___1 ; [L342] int tmp___2 ; VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=0, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, P_2_ev=0, P_2_i=1, P_2_pc=0, P_2_st=0, timer=0] [L346] COND TRUE 1 VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=0, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, P_2_ev=0, P_2_i=1, P_2_pc=0, P_2_st=0, timer=0] [L349] CALL, EXPR exists_runnable_thread() VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=0, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, P_2_ev=0, P_2_i=1, P_2_pc=0, P_2_st=0, timer=0] [L314] int __retres1 ; VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=0, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, P_2_ev=0, P_2_i=1, P_2_pc=0, P_2_st=0, timer=0] [L317] COND TRUE (int )P_1_st == 0 [L318] __retres1 = 1 VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=0, \old(timer)=0, __retres1=1, C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, P_2_ev=0, P_2_i=1, P_2_pc=0, P_2_st=0, timer=0] [L335] RET return (__retres1); VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=0, \old(timer)=0, \result=1, __retres1=1, C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, P_2_ev=0, P_2_i=1, P_2_pc=0, P_2_st=0, timer=0] [L349] EXPR exists_runnable_thread() VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=0, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, exists_runnable_thread()=1, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, P_2_ev=0, P_2_i=1, P_2_pc=0, P_2_st=0, timer=0] [L349] tmp___2 = exists_runnable_thread() [L351] COND TRUE \read(tmp___2) VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=0, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, P_2_ev=0, P_2_i=1, P_2_pc=0, P_2_st=0, timer=0, tmp___2=1] [L356] COND TRUE (int )P_1_st == 0 [L358] tmp = __VERIFIER_nondet_int() [L360] COND TRUE \read(tmp) [L362] P_1_st = 1 VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=0, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=1, P_2_ev=0, P_2_i=1, P_2_pc=0, P_2_st=0, timer=0, tmp=1, tmp___2=1] [L363] CALL P_1() VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=1, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=0, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=1, P_2_ev=0, P_2_i=1, P_2_pc=0, P_2_st=0, timer=0] [L72] COND TRUE (int )P_1_pc == 0 VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=1, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=0, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=1, P_2_ev=0, P_2_i=1, P_2_pc=0, P_2_st=0, timer=0] [L83] COND TRUE i < max_loop VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=1, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=0, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=1, P_2_ev=0, P_2_i=1, P_2_pc=0, P_2_st=0, timer=0] [L86] CALL write_data(num, 'A') VAL [\old(c)=65, \old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(i___0)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=1, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=0, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=1, P_2_ev=0, P_2_i=1, P_2_pc=0, P_2_st=0, timer=0] [L49] COND TRUE i___0 == 0 [L50] RET data_0 = c VAL [\old(c)=65, \old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(i___0)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=1, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=0, \old(timer)=0, c=65, C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=65, data_1=0, e=0, i=0, i___0=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=1, P_2_ev=0, P_2_i=1, P_2_pc=0, P_2_st=0, timer=0] [L86] write_data(num, 'A') VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=1, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=0, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=65, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=1, P_2_ev=0, P_2_i=1, P_2_pc=0, P_2_st=0, timer=0] [L87] num += 1 [L88] P_1_pc = 1 [L89] RET P_1_st = 2 VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=1, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=0, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=65, data_1=0, e=0, i=0, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, P_2_ev=0, P_2_i=1, P_2_pc=0, P_2_st=0, timer=0] [L363] P_1() VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=0, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=65, data_1=0, e=0, i=0, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, P_2_ev=0, P_2_i=1, P_2_pc=0, P_2_st=0, timer=0, tmp=1, tmp___2=1] [L371] COND TRUE (int )P_2_st == 0 [L373] tmp___0 = __VERIFIER_nondet_int() [L375] COND TRUE \read(tmp___0) [L377] P_2_st = 1 VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=0, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=65, data_1=0, e=0, i=0, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, P_2_ev=0, P_2_i=1, P_2_pc=0, P_2_st=1, timer=0, tmp=1, tmp___0=1, tmp___2=1] [L378] CALL P_2() VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=65, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=1, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=2, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=1, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=65, data_1=0, e=0, i=0, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, P_2_ev=0, P_2_i=1, P_2_pc=0, P_2_st=1, timer=0] [L130] COND TRUE (int )P_2_pc == 0 VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=65, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=1, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=2, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=1, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=65, data_1=0, e=0, i=0, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, P_2_ev=0, P_2_i=1, P_2_pc=0, P_2_st=1, timer=0] [L141] COND TRUE i < max_loop VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=65, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=1, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=2, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=1, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=65, data_1=0, e=0, i=0, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, P_2_ev=0, P_2_i=1, P_2_pc=0, P_2_st=1, timer=0] [L144] CALL write_data(num, 'B') VAL [\old(c)=66, \old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=65, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(i___0)=1, \old(max_loop)=0, \old(num)=1, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=2, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=1, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=65, data_1=0, e=0, i=0, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, P_2_ev=0, P_2_i=1, P_2_pc=0, P_2_st=1, timer=0] [L49] COND FALSE !(i___0 == 0) VAL [\old(c)=66, \old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=65, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(i___0)=1, \old(max_loop)=0, \old(num)=1, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=2, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=1, \old(timer)=0, c=66, C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=65, data_1=0, e=0, i=0, i___0=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, P_2_ev=0, P_2_i=1, P_2_pc=0, P_2_st=1, timer=0] [L52] COND TRUE i___0 == 1 [L53] RET data_1 = c VAL [\old(c)=66, \old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=65, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(i___0)=1, \old(max_loop)=0, \old(num)=1, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=2, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=1, \old(timer)=0, c=66, C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=65, data_1=66, e=0, i=0, i___0=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, P_2_ev=0, P_2_i=1, P_2_pc=0, P_2_st=1, timer=0] [L144] write_data(num, 'B') VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=65, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=1, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=2, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=1, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=65, data_1=66, e=0, i=0, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, P_2_ev=0, P_2_i=1, P_2_pc=0, P_2_st=1, timer=0] [L145] num += 1 VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=65, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=1, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=2, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=1, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=65, data_1=66, e=0, i=0, max_loop=2, num=2, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, P_2_ev=0, P_2_i=1, P_2_pc=0, P_2_st=1, timer=0] [L147] COND FALSE !(\read(timer)) VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=65, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=1, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=2, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=1, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=65, data_1=66, e=0, i=0, max_loop=2, num=2, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, P_2_ev=0, P_2_i=1, P_2_pc=0, P_2_st=1, timer=0] [L157] P_2_pc = 1 [L158] RET P_2_st = 2 VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=65, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=1, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=2, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=1, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=65, data_1=66, e=0, i=0, max_loop=2, num=2, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, P_2_ev=0, P_2_i=1, P_2_pc=1, P_2_st=2, timer=0] [L378] P_2() VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=0, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=65, data_1=66, e=0, i=0, max_loop=2, num=2, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, P_2_ev=0, P_2_i=1, P_2_pc=1, P_2_st=2, timer=0, tmp=1, tmp___0=1, tmp___2=1] [L386] COND TRUE (int )C_1_st == 0 [L388] tmp___1 = __VERIFIER_nondet_int() [L390] COND TRUE \read(tmp___1) [L392] C_1_st = 1 VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=0, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=1, data_0=65, data_1=66, e=0, i=0, max_loop=2, num=2, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, P_2_ev=0, P_2_i=1, P_2_pc=1, P_2_st=2, timer=0, tmp=1, tmp___0=1, tmp___1=1, tmp___2=1] [L393] CALL C_1() VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=1, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=2, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=0, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=1, data_0=65, data_1=66, e=0, i=0, max_loop=2, num=2, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, P_2_ev=0, P_2_i=1, P_2_pc=1, P_2_st=2, timer=0] [L196] char c ; VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=1, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=2, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=0, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=1, data_0=65, data_1=66, e=0, i=0, max_loop=2, num=2, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, P_2_ev=0, P_2_i=1, P_2_pc=1, P_2_st=2, timer=0] [L199] COND TRUE (int )C_1_pc == 0 VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=1, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=2, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=0, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=1, data_0=65, data_1=66, e=0, i=0, max_loop=2, num=2, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, P_2_ev=0, P_2_i=1, P_2_pc=1, P_2_st=2, timer=0] [L214] COND TRUE i < max_loop VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=1, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=2, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=0, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=1, data_0=65, data_1=66, e=0, i=0, max_loop=2, num=2, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, P_2_ev=0, P_2_i=1, P_2_pc=1, P_2_st=2, timer=0] [L216] COND FALSE !(num == 0) VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=1, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=2, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=0, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=1, data_0=65, data_1=66, e=0, i=0, max_loop=2, num=2, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, P_2_ev=0, P_2_i=1, P_2_pc=1, P_2_st=2, timer=0] [L227] num -= 1 VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=1, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=2, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=0, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=1, data_0=65, data_1=66, e=0, i=0, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, P_2_ev=0, P_2_i=1, P_2_pc=1, P_2_st=2, timer=0] [L228] COND FALSE !(! (num >= 0)) VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=1, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=2, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=0, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=1, data_0=65, data_1=66, e=0, i=0, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, P_2_ev=0, P_2_i=1, P_2_pc=1, P_2_st=2, timer=0] [L236] CALL, EXPR read_data(num) VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=1, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(i___0)=1, \old(max_loop)=0, \old(num)=2, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=0, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=1, data_0=65, data_1=66, e=0, i=0, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, P_2_ev=0, P_2_i=1, P_2_pc=1, P_2_st=2, timer=0] [L23] char c ; [L24] char __retres3 ; VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=1, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(i___0)=1, \old(max_loop)=0, \old(num)=2, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=0, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=1, data_0=65, data_1=66, e=0, i=0, i___0=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, P_2_ev=0, P_2_i=1, P_2_pc=1, P_2_st=2, timer=0] [L27] COND FALSE !(i___0 == 0) VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=1, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(i___0)=1, \old(max_loop)=0, \old(num)=2, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=0, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=1, data_0=65, data_1=66, e=0, i=0, i___0=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, P_2_ev=0, P_2_i=1, P_2_pc=1, P_2_st=2, timer=0] [L31] COND TRUE i___0 == 1 [L32] __retres3 = data_1 VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=1, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(i___0)=1, \old(max_loop)=0, \old(num)=2, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=0, \old(timer)=0, __retres3=66, C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=1, data_0=65, data_1=66, e=0, i=0, i___0=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, P_2_ev=0, P_2_i=1, P_2_pc=1, P_2_st=2, timer=0] [L42] RET return (__retres3); VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=1, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(i___0)=1, \old(max_loop)=0, \old(num)=2, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=0, \old(timer)=0, \result=66, __retres3=66, C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=1, data_0=65, data_1=66, e=0, i=0, i___0=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, P_2_ev=0, P_2_i=1, P_2_pc=1, P_2_st=2, timer=0] [L236] EXPR read_data(num) VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=1, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=2, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=0, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=1, data_0=65, data_1=66, e=0, i=0, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, P_2_ev=0, P_2_i=1, P_2_pc=1, P_2_st=2, read_data(num)=66, timer=0] [L236] c = read_data(num) [L237] i += 1 [L238] C_1_pc = 2 [L239] RET C_1_st = 2 VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=1, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=2, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=0, \old(timer)=0, c=66, C_1_ev=0, C_1_i=1, C_1_pc=2, C_1_pr=0, C_1_st=2, data_0=65, data_1=66, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, P_2_ev=0, P_2_i=1, P_2_pc=1, P_2_st=2, timer=0] [L393] C_1() VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=0, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=2, C_1_pr=0, C_1_st=2, data_0=65, data_1=66, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, P_2_ev=0, P_2_i=1, P_2_pc=1, P_2_st=2, timer=0, tmp=1, tmp___0=1, tmp___1=1, tmp___2=1] [L346] COND TRUE 1 VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=0, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=2, C_1_pr=0, C_1_st=2, data_0=65, data_1=66, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, P_2_ev=0, P_2_i=1, P_2_pc=1, P_2_st=2, timer=0, tmp=1, tmp___0=1, tmp___1=1, tmp___2=1] [L349] CALL, EXPR exists_runnable_thread() VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=0, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=2, C_1_pr=0, C_1_st=2, data_0=65, data_1=66, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, P_2_ev=0, P_2_i=1, P_2_pc=1, P_2_st=2, timer=0] [L314] int __retres1 ; VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=0, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=2, C_1_pr=0, C_1_st=2, data_0=65, data_1=66, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, P_2_ev=0, P_2_i=1, P_2_pc=1, P_2_st=2, timer=0] [L317] COND FALSE !((int )P_1_st == 0) VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=0, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=2, C_1_pr=0, C_1_st=2, data_0=65, data_1=66, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, P_2_ev=0, P_2_i=1, P_2_pc=1, P_2_st=2, timer=0] [L321] COND FALSE !((int )P_2_st == 0) VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=0, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=2, C_1_pr=0, C_1_st=2, data_0=65, data_1=66, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, P_2_ev=0, P_2_i=1, P_2_pc=1, P_2_st=2, timer=0] [L325] COND FALSE !((int )C_1_st == 0) [L333] __retres1 = 0 VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=0, \old(timer)=0, __retres1=0, C_1_ev=0, C_1_i=1, C_1_pc=2, C_1_pr=0, C_1_st=2, data_0=65, data_1=66, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, P_2_ev=0, P_2_i=1, P_2_pc=1, P_2_st=2, timer=0] [L335] RET return (__retres1); VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=0, \old(timer)=0, \result=0, __retres1=0, C_1_ev=0, C_1_i=1, C_1_pc=2, C_1_pr=0, C_1_st=2, data_0=65, data_1=66, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, P_2_ev=0, P_2_i=1, P_2_pc=1, P_2_st=2, timer=0] [L349] EXPR exists_runnable_thread() VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=0, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=2, C_1_pr=0, C_1_st=2, data_0=65, data_1=66, e=0, exists_runnable_thread()=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, P_2_ev=0, P_2_i=1, P_2_pc=1, P_2_st=2, timer=0, tmp=1, tmp___0=1, tmp___1=1, tmp___2=1] [L349] tmp___2 = exists_runnable_thread() [L351] COND FALSE, RET !(\read(tmp___2)) VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=0, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=2, C_1_pr=0, C_1_st=2, data_0=65, data_1=66, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, P_2_ev=0, P_2_i=1, P_2_pc=1, P_2_st=2, timer=0, tmp=1, tmp___0=1, tmp___1=1, tmp___2=0] [L541] eval() VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=0, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=2, C_1_pr=0, C_1_st=2, data_0=65, data_1=66, e=0, i=1, kernel_st=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, P_2_ev=0, P_2_i=1, P_2_pc=1, P_2_st=2, timer=0] [L544] kernel_st = 2 VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=0, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=2, C_1_pr=0, C_1_st=2, data_0=65, data_1=66, e=0, i=1, kernel_st=2, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, P_2_ev=0, P_2_i=1, P_2_pc=1, P_2_st=2, timer=0] [L545] FCALL update_channels() VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=0, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=2, C_1_pr=0, C_1_st=2, data_0=65, data_1=66, e=0, i=1, kernel_st=2, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, P_2_ev=0, P_2_i=1, P_2_pc=1, P_2_st=2, timer=0] [L548] kernel_st = 3 VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=0, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=2, C_1_pr=0, C_1_st=2, data_0=65, data_1=66, e=0, i=1, kernel_st=3, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, P_2_ev=0, P_2_i=1, P_2_pc=1, P_2_st=2, timer=0] [L549] FCALL fire_delta_events() VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=0, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=2, C_1_pr=0, C_1_st=2, data_0=65, data_1=66, e=0, i=1, kernel_st=3, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, P_2_ev=0, P_2_i=1, P_2_pc=1, P_2_st=2, timer=0] [L550] CALL activate_threads() VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=2, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=2, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=2, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=2, C_1_pr=0, C_1_st=2, data_0=65, data_1=66, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, P_2_ev=0, P_2_i=1, P_2_pc=1, P_2_st=2, timer=0] [L459] int tmp ; [L460] int tmp___0 ; [L461] int tmp___1 ; VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=2, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=2, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=2, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=2, C_1_pr=0, C_1_st=2, data_0=65, data_1=66, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, P_2_ev=0, P_2_i=1, P_2_pc=1, P_2_st=2, timer=0] [L465] CALL, EXPR is_P_1_triggered() VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=2, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=2, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=2, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=2, C_1_pr=0, C_1_st=2, data_0=65, data_1=66, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, P_2_ev=0, P_2_i=1, P_2_pc=1, P_2_st=2, timer=0] [L104] int __retres1 ; VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=2, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=2, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=2, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=2, C_1_pr=0, C_1_st=2, data_0=65, data_1=66, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, P_2_ev=0, P_2_i=1, P_2_pc=1, P_2_st=2, timer=0] [L107] COND TRUE (int )P_1_pc == 1 VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=2, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=2, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=2, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=2, C_1_pr=0, C_1_st=2, data_0=65, data_1=66, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, P_2_ev=0, P_2_i=1, P_2_pc=1, P_2_st=2, timer=0] [L108] COND FALSE !((int )P_1_ev == 1) VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=2, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=2, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=2, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=2, C_1_pr=0, C_1_st=2, data_0=65, data_1=66, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, P_2_ev=0, P_2_i=1, P_2_pc=1, P_2_st=2, timer=0] [L117] __retres1 = 0 VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=2, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=2, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=2, \old(timer)=0, __retres1=0, C_1_ev=0, C_1_i=1, C_1_pc=2, C_1_pr=0, C_1_st=2, data_0=65, data_1=66, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, P_2_ev=0, P_2_i=1, P_2_pc=1, P_2_st=2, timer=0] [L119] RET return (__retres1); VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=2, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=2, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=2, \old(timer)=0, \result=0, __retres1=0, C_1_ev=0, C_1_i=1, C_1_pc=2, C_1_pr=0, C_1_st=2, data_0=65, data_1=66, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, P_2_ev=0, P_2_i=1, P_2_pc=1, P_2_st=2, timer=0] [L465] EXPR is_P_1_triggered() VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=2, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=2, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=2, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=2, C_1_pr=0, C_1_st=2, data_0=65, data_1=66, e=0, i=1, is_P_1_triggered()=0, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, P_2_ev=0, P_2_i=1, P_2_pc=1, P_2_st=2, timer=0] [L465] tmp = is_P_1_triggered() [L467] COND FALSE !(\read(tmp)) VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=2, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=2, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=2, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=2, C_1_pr=0, C_1_st=2, data_0=65, data_1=66, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, P_2_ev=0, P_2_i=1, P_2_pc=1, P_2_st=2, timer=0, tmp=0] [L473] CALL, EXPR is_P_2_triggered() VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=2, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=2, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=2, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=2, C_1_pr=0, C_1_st=2, data_0=65, data_1=66, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, P_2_ev=0, P_2_i=1, P_2_pc=1, P_2_st=2, timer=0] [L172] int __retres1 ; VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=2, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=2, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=2, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=2, C_1_pr=0, C_1_st=2, data_0=65, data_1=66, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, P_2_ev=0, P_2_i=1, P_2_pc=1, P_2_st=2, timer=0] [L175] COND TRUE (int )P_2_pc == 1 VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=2, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=2, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=2, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=2, C_1_pr=0, C_1_st=2, data_0=65, data_1=66, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, P_2_ev=0, P_2_i=1, P_2_pc=1, P_2_st=2, timer=0] [L176] COND FALSE !((int )P_2_ev == 1) VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=2, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=2, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=2, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=2, C_1_pr=0, C_1_st=2, data_0=65, data_1=66, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, P_2_ev=0, P_2_i=1, P_2_pc=1, P_2_st=2, timer=0] [L185] __retres1 = 0 VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=2, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=2, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=2, \old(timer)=0, __retres1=0, C_1_ev=0, C_1_i=1, C_1_pc=2, C_1_pr=0, C_1_st=2, data_0=65, data_1=66, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, P_2_ev=0, P_2_i=1, P_2_pc=1, P_2_st=2, timer=0] [L187] RET return (__retres1); VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=2, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=2, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=2, \old(timer)=0, \result=0, __retres1=0, C_1_ev=0, C_1_i=1, C_1_pc=2, C_1_pr=0, C_1_st=2, data_0=65, data_1=66, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, P_2_ev=0, P_2_i=1, P_2_pc=1, P_2_st=2, timer=0] [L473] EXPR is_P_2_triggered() VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=2, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=2, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=2, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=2, C_1_pr=0, C_1_st=2, data_0=65, data_1=66, e=0, i=1, is_P_2_triggered()=0, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, P_2_ev=0, P_2_i=1, P_2_pc=1, P_2_st=2, timer=0, tmp=0] [L473] tmp___0 = is_P_2_triggered() [L475] COND FALSE !(\read(tmp___0)) VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=2, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=2, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=2, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=2, C_1_pr=0, C_1_st=2, data_0=65, data_1=66, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, P_2_ev=0, P_2_i=1, P_2_pc=1, P_2_st=2, timer=0, tmp=0, tmp___0=0] [L481] CALL, EXPR is_C_1_triggered() VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=2, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=2, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=2, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=2, C_1_pr=0, C_1_st=2, data_0=65, data_1=66, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, P_2_ev=0, P_2_i=1, P_2_pc=1, P_2_st=2, timer=0] [L254] int __retres1 ; VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=2, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=2, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=2, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=2, C_1_pr=0, C_1_st=2, data_0=65, data_1=66, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, P_2_ev=0, P_2_i=1, P_2_pc=1, P_2_st=2, timer=0] [L257] COND FALSE !((int )C_1_pc == 1) VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=2, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=2, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=2, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=2, C_1_pr=0, C_1_st=2, data_0=65, data_1=66, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, P_2_ev=0, P_2_i=1, P_2_pc=1, P_2_st=2, timer=0] [L267] COND TRUE (int )C_1_pc == 2 VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=2, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=2, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=2, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=2, C_1_pr=0, C_1_st=2, data_0=65, data_1=66, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, P_2_ev=0, P_2_i=1, P_2_pc=1, P_2_st=2, timer=0] [L268] COND FALSE !((int )C_1_ev == 1) VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=2, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=2, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=2, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=2, C_1_pr=0, C_1_st=2, data_0=65, data_1=66, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, P_2_ev=0, P_2_i=1, P_2_pc=1, P_2_st=2, timer=0] [L277] __retres1 = 0 VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=2, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=2, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=2, \old(timer)=0, __retres1=0, C_1_ev=0, C_1_i=1, C_1_pc=2, C_1_pr=0, C_1_st=2, data_0=65, data_1=66, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, P_2_ev=0, P_2_i=1, P_2_pc=1, P_2_st=2, timer=0] [L279] RET return (__retres1); VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=2, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=2, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=2, \old(timer)=0, \result=0, __retres1=0, C_1_ev=0, C_1_i=1, C_1_pc=2, C_1_pr=0, C_1_st=2, data_0=65, data_1=66, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, P_2_ev=0, P_2_i=1, P_2_pc=1, P_2_st=2, timer=0] [L481] EXPR is_C_1_triggered() VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=2, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=2, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=2, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=2, C_1_pr=0, C_1_st=2, data_0=65, data_1=66, e=0, i=1, is_C_1_triggered()=0, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, P_2_ev=0, P_2_i=1, P_2_pc=1, P_2_st=2, timer=0, tmp=0, tmp___0=0] [L481] tmp___1 = is_C_1_triggered() [L483] COND FALSE, RET !(\read(tmp___1)) VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=2, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=2, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=2, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=2, C_1_pr=0, C_1_st=2, data_0=65, data_1=66, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, P_2_ev=0, P_2_i=1, P_2_pc=1, P_2_st=2, timer=0, tmp=0, tmp___0=0, tmp___1=0] [L550] activate_threads() VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=0, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=2, C_1_pr=0, C_1_st=2, data_0=65, data_1=66, e=0, i=1, kernel_st=3, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, P_2_ev=0, P_2_i=1, P_2_pc=1, P_2_st=2, timer=0] [L551] FCALL reset_delta_events() VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=0, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=2, C_1_pr=0, C_1_st=2, data_0=65, data_1=66, e=0, i=1, kernel_st=3, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, P_2_ev=0, P_2_i=1, P_2_pc=1, P_2_st=2, timer=0] [L554] CALL, EXPR exists_runnable_thread() VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=0, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=2, C_1_pr=0, C_1_st=2, data_0=65, data_1=66, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, P_2_ev=0, P_2_i=1, P_2_pc=1, P_2_st=2, timer=0] [L314] int __retres1 ; VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=0, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=2, C_1_pr=0, C_1_st=2, data_0=65, data_1=66, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, P_2_ev=0, P_2_i=1, P_2_pc=1, P_2_st=2, timer=0] [L317] COND FALSE !((int )P_1_st == 0) VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=0, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=2, C_1_pr=0, C_1_st=2, data_0=65, data_1=66, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, P_2_ev=0, P_2_i=1, P_2_pc=1, P_2_st=2, timer=0] [L321] COND FALSE !((int )P_2_st == 0) VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=0, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=2, C_1_pr=0, C_1_st=2, data_0=65, data_1=66, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, P_2_ev=0, P_2_i=1, P_2_pc=1, P_2_st=2, timer=0] [L325] COND FALSE !((int )C_1_st == 0) [L333] __retres1 = 0 VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=0, \old(timer)=0, __retres1=0, C_1_ev=0, C_1_i=1, C_1_pc=2, C_1_pr=0, C_1_st=2, data_0=65, data_1=66, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, P_2_ev=0, P_2_i=1, P_2_pc=1, P_2_st=2, timer=0] [L335] RET return (__retres1); VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=0, \old(timer)=0, \result=0, __retres1=0, C_1_ev=0, C_1_i=1, C_1_pc=2, C_1_pr=0, C_1_st=2, data_0=65, data_1=66, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, P_2_ev=0, P_2_i=1, P_2_pc=1, P_2_st=2, timer=0] [L554] EXPR exists_runnable_thread() VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=0, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=2, C_1_pr=0, C_1_st=2, data_0=65, data_1=66, e=0, exists_runnable_thread()=0, i=1, kernel_st=3, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, P_2_ev=0, P_2_i=1, P_2_pc=1, P_2_st=2, timer=0] [L554] tmp = exists_runnable_thread() [L556] COND TRUE tmp == 0 [L558] kernel_st = 4 VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=0, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=2, C_1_pr=0, C_1_st=2, data_0=65, data_1=66, e=0, i=1, kernel_st=4, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, P_2_ev=0, P_2_i=1, P_2_pc=1, P_2_st=2, timer=0, tmp=0] [L559] CALL fire_time_events() VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=0, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=2, C_1_pr=0, C_1_st=2, data_0=65, data_1=66, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, P_2_ev=0, P_2_i=1, P_2_pc=1, P_2_st=2, timer=0] [L428] C_1_ev = 1 [L429] P_1_ev = 1 [L430] RET P_2_ev = 1 VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=0, \old(timer)=0, C_1_ev=1, C_1_i=1, C_1_pc=2, C_1_pr=0, C_1_st=2, data_0=65, data_1=66, e=0, i=1, max_loop=2, num=1, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=2, P_2_ev=1, P_2_i=1, P_2_pc=1, P_2_st=2, timer=0] [L559] fire_time_events() VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=0, \old(timer)=0, C_1_ev=1, C_1_i=1, C_1_pc=2, C_1_pr=0, C_1_st=2, data_0=65, data_1=66, e=0, i=1, kernel_st=4, max_loop=2, num=1, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=2, P_2_ev=1, P_2_i=1, P_2_pc=1, P_2_st=2, timer=0, tmp=0] [L560] CALL activate_threads() VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=2, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=2, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=2, \old(timer)=0, C_1_ev=1, C_1_i=1, C_1_pc=2, C_1_pr=0, C_1_st=2, data_0=65, data_1=66, e=0, i=1, max_loop=2, num=1, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=2, P_2_ev=1, P_2_i=1, P_2_pc=1, P_2_st=2, timer=0] [L459] int tmp ; [L460] int tmp___0 ; [L461] int tmp___1 ; VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=2, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=2, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=2, \old(timer)=0, C_1_ev=1, C_1_i=1, C_1_pc=2, C_1_pr=0, C_1_st=2, data_0=65, data_1=66, e=0, i=1, max_loop=2, num=1, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=2, P_2_ev=1, P_2_i=1, P_2_pc=1, P_2_st=2, timer=0] [L465] CALL, EXPR is_P_1_triggered() VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=2, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=2, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=2, \old(timer)=0, C_1_ev=1, C_1_i=1, C_1_pc=2, C_1_pr=0, C_1_st=2, data_0=65, data_1=66, e=0, i=1, max_loop=2, num=1, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=2, P_2_ev=1, P_2_i=1, P_2_pc=1, P_2_st=2, timer=0] [L104] int __retres1 ; VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=2, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=2, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=2, \old(timer)=0, C_1_ev=1, C_1_i=1, C_1_pc=2, C_1_pr=0, C_1_st=2, data_0=65, data_1=66, e=0, i=1, max_loop=2, num=1, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=2, P_2_ev=1, P_2_i=1, P_2_pc=1, P_2_st=2, timer=0] [L107] COND TRUE (int )P_1_pc == 1 VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=2, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=2, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=2, \old(timer)=0, C_1_ev=1, C_1_i=1, C_1_pc=2, C_1_pr=0, C_1_st=2, data_0=65, data_1=66, e=0, i=1, max_loop=2, num=1, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=2, P_2_ev=1, P_2_i=1, P_2_pc=1, P_2_st=2, timer=0] [L108] COND TRUE (int )P_1_ev == 1 [L109] __retres1 = 1 VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=2, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=2, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=2, \old(timer)=0, __retres1=1, C_1_ev=1, C_1_i=1, C_1_pc=2, C_1_pr=0, C_1_st=2, data_0=65, data_1=66, e=0, i=1, max_loop=2, num=1, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=2, P_2_ev=1, P_2_i=1, P_2_pc=1, P_2_st=2, timer=0] [L119] RET return (__retres1); VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=2, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=2, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=2, \old(timer)=0, \result=1, __retres1=1, C_1_ev=1, C_1_i=1, C_1_pc=2, C_1_pr=0, C_1_st=2, data_0=65, data_1=66, e=0, i=1, max_loop=2, num=1, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=2, P_2_ev=1, P_2_i=1, P_2_pc=1, P_2_st=2, timer=0] [L465] EXPR is_P_1_triggered() VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=2, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=2, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=2, \old(timer)=0, C_1_ev=1, C_1_i=1, C_1_pc=2, C_1_pr=0, C_1_st=2, data_0=65, data_1=66, e=0, i=1, is_P_1_triggered()=1, max_loop=2, num=1, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=2, P_2_ev=1, P_2_i=1, P_2_pc=1, P_2_st=2, timer=0] [L465] tmp = is_P_1_triggered() [L467] COND TRUE \read(tmp) [L468] P_1_st = 0 VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=2, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=2, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=2, \old(timer)=0, C_1_ev=1, C_1_i=1, C_1_pc=2, C_1_pr=0, C_1_st=2, data_0=65, data_1=66, e=0, i=1, max_loop=2, num=1, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=0, P_2_ev=1, P_2_i=1, P_2_pc=1, P_2_st=2, timer=0, tmp=1] [L473] CALL, EXPR is_P_2_triggered() VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=2, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=2, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=2, \old(timer)=0, C_1_ev=1, C_1_i=1, C_1_pc=2, C_1_pr=0, C_1_st=2, data_0=65, data_1=66, e=0, i=1, max_loop=2, num=1, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=0, P_2_ev=1, P_2_i=1, P_2_pc=1, P_2_st=2, timer=0] [L172] int __retres1 ; VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=2, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=2, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=2, \old(timer)=0, C_1_ev=1, C_1_i=1, C_1_pc=2, C_1_pr=0, C_1_st=2, data_0=65, data_1=66, e=0, i=1, max_loop=2, num=1, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=0, P_2_ev=1, P_2_i=1, P_2_pc=1, P_2_st=2, timer=0] [L175] COND TRUE (int )P_2_pc == 1 VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=2, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=2, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=2, \old(timer)=0, C_1_ev=1, C_1_i=1, C_1_pc=2, C_1_pr=0, C_1_st=2, data_0=65, data_1=66, e=0, i=1, max_loop=2, num=1, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=0, P_2_ev=1, P_2_i=1, P_2_pc=1, P_2_st=2, timer=0] [L176] COND TRUE (int )P_2_ev == 1 [L177] __retres1 = 1 VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=2, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=2, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=2, \old(timer)=0, __retres1=1, C_1_ev=1, C_1_i=1, C_1_pc=2, C_1_pr=0, C_1_st=2, data_0=65, data_1=66, e=0, i=1, max_loop=2, num=1, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=0, P_2_ev=1, P_2_i=1, P_2_pc=1, P_2_st=2, timer=0] [L187] RET return (__retres1); VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=2, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=2, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=2, \old(timer)=0, \result=1, __retres1=1, C_1_ev=1, C_1_i=1, C_1_pc=2, C_1_pr=0, C_1_st=2, data_0=65, data_1=66, e=0, i=1, max_loop=2, num=1, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=0, P_2_ev=1, P_2_i=1, P_2_pc=1, P_2_st=2, timer=0] [L473] EXPR is_P_2_triggered() VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=2, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=2, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=2, \old(timer)=0, C_1_ev=1, C_1_i=1, C_1_pc=2, C_1_pr=0, C_1_st=2, data_0=65, data_1=66, e=0, i=1, is_P_2_triggered()=1, max_loop=2, num=1, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=0, P_2_ev=1, P_2_i=1, P_2_pc=1, P_2_st=2, timer=0, tmp=1] [L473] tmp___0 = is_P_2_triggered() [L475] COND TRUE \read(tmp___0) [L476] P_2_st = 0 VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=2, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=2, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=2, \old(timer)=0, C_1_ev=1, C_1_i=1, C_1_pc=2, C_1_pr=0, C_1_st=2, data_0=65, data_1=66, e=0, i=1, max_loop=2, num=1, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=0, P_2_ev=1, P_2_i=1, P_2_pc=1, P_2_st=0, timer=0, tmp=1, tmp___0=1] [L481] CALL, EXPR is_C_1_triggered() VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=2, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=2, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=2, \old(timer)=0, C_1_ev=1, C_1_i=1, C_1_pc=2, C_1_pr=0, C_1_st=2, data_0=65, data_1=66, e=0, i=1, max_loop=2, num=1, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=0, P_2_ev=1, P_2_i=1, P_2_pc=1, P_2_st=0, timer=0] [L254] int __retres1 ; VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=2, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=2, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=2, \old(timer)=0, C_1_ev=1, C_1_i=1, C_1_pc=2, C_1_pr=0, C_1_st=2, data_0=65, data_1=66, e=0, i=1, max_loop=2, num=1, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=0, P_2_ev=1, P_2_i=1, P_2_pc=1, P_2_st=0, timer=0] [L257] COND FALSE !((int )C_1_pc == 1) VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=2, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=2, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=2, \old(timer)=0, C_1_ev=1, C_1_i=1, C_1_pc=2, C_1_pr=0, C_1_st=2, data_0=65, data_1=66, e=0, i=1, max_loop=2, num=1, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=0, P_2_ev=1, P_2_i=1, P_2_pc=1, P_2_st=0, timer=0] [L267] COND TRUE (int )C_1_pc == 2 VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=2, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=2, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=2, \old(timer)=0, C_1_ev=1, C_1_i=1, C_1_pc=2, C_1_pr=0, C_1_st=2, data_0=65, data_1=66, e=0, i=1, max_loop=2, num=1, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=0, P_2_ev=1, P_2_i=1, P_2_pc=1, P_2_st=0, timer=0] [L268] COND TRUE (int )C_1_ev == 1 [L269] __retres1 = 1 VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=2, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=2, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=2, \old(timer)=0, __retres1=1, C_1_ev=1, C_1_i=1, C_1_pc=2, C_1_pr=0, C_1_st=2, data_0=65, data_1=66, e=0, i=1, max_loop=2, num=1, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=0, P_2_ev=1, P_2_i=1, P_2_pc=1, P_2_st=0, timer=0] [L279] RET return (__retres1); VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=2, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=2, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=2, \old(timer)=0, \result=1, __retres1=1, C_1_ev=1, C_1_i=1, C_1_pc=2, C_1_pr=0, C_1_st=2, data_0=65, data_1=66, e=0, i=1, max_loop=2, num=1, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=0, P_2_ev=1, P_2_i=1, P_2_pc=1, P_2_st=0, timer=0] [L481] EXPR is_C_1_triggered() VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=2, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=2, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=2, \old(timer)=0, C_1_ev=1, C_1_i=1, C_1_pc=2, C_1_pr=0, C_1_st=2, data_0=65, data_1=66, e=0, i=1, is_C_1_triggered()=1, max_loop=2, num=1, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=0, P_2_ev=1, P_2_i=1, P_2_pc=1, P_2_st=0, timer=0, tmp=1, tmp___0=1] [L481] tmp___1 = is_C_1_triggered() [L483] COND TRUE \read(tmp___1) [L484] RET C_1_st = 0 VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=2, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=2, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=2, \old(timer)=0, C_1_ev=1, C_1_i=1, C_1_pc=2, C_1_pr=0, C_1_st=0, data_0=65, data_1=66, e=0, i=1, max_loop=2, num=1, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=0, P_2_ev=1, P_2_i=1, P_2_pc=1, P_2_st=0, timer=0, tmp=1, tmp___0=1, tmp___1=1] [L560] activate_threads() VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=0, \old(timer)=0, C_1_ev=1, C_1_i=1, C_1_pc=2, C_1_pr=0, C_1_st=0, data_0=65, data_1=66, e=0, i=1, kernel_st=4, max_loop=2, num=1, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=0, P_2_ev=1, P_2_i=1, P_2_pc=1, P_2_st=0, timer=0, tmp=0] [L561] CALL reset_time_events() VAL [\old(C_1_ev)=1, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=1, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(P_2_ev)=1, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=0, \old(timer)=0, C_1_ev=1, C_1_i=1, C_1_pc=2, C_1_pr=0, C_1_st=0, data_0=65, data_1=66, e=0, i=1, max_loop=2, num=1, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=0, P_2_ev=1, P_2_i=1, P_2_pc=1, P_2_st=0, timer=0] [L439] COND TRUE (int )P_1_ev == 1 [L440] P_1_ev = 2 VAL [\old(C_1_ev)=1, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=1, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(P_2_ev)=1, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=0, \old(timer)=0, C_1_ev=1, C_1_i=1, C_1_pc=2, C_1_pr=0, C_1_st=0, data_0=65, data_1=66, e=0, i=1, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, P_2_ev=1, P_2_i=1, P_2_pc=1, P_2_st=0, timer=0] [L444] COND TRUE (int )P_2_ev == 1 [L445] P_2_ev = 2 VAL [\old(C_1_ev)=1, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=1, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(P_2_ev)=1, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=0, \old(timer)=0, C_1_ev=1, C_1_i=1, C_1_pc=2, C_1_pr=0, C_1_st=0, data_0=65, data_1=66, e=0, i=1, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, P_2_ev=2, P_2_i=1, P_2_pc=1, P_2_st=0, timer=0] [L449] COND TRUE (int )C_1_ev == 1 [L450] RET C_1_ev = 2 VAL [\old(C_1_ev)=1, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=1, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(P_2_ev)=1, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=0, \old(timer)=0, C_1_ev=2, C_1_i=1, C_1_pc=2, C_1_pr=0, C_1_st=0, data_0=65, data_1=66, e=0, i=1, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, P_2_ev=2, P_2_i=1, P_2_pc=1, P_2_st=0, timer=0] [L561] reset_time_events() VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=0, \old(timer)=0, C_1_ev=2, C_1_i=1, C_1_pc=2, C_1_pr=0, C_1_st=0, data_0=65, data_1=66, e=0, i=1, kernel_st=4, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, P_2_ev=2, P_2_i=1, P_2_pc=1, P_2_st=0, timer=0, tmp=0] [L567] CALL, EXPR stop_simulation() VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=0, \old(timer)=0, C_1_ev=2, C_1_i=1, C_1_pc=2, C_1_pr=0, C_1_st=0, data_0=65, data_1=66, e=0, i=1, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, P_2_ev=2, P_2_i=1, P_2_pc=1, P_2_st=0, timer=0] [L504] int tmp ; [L505] int __retres2 ; VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=0, \old(timer)=0, C_1_ev=2, C_1_i=1, C_1_pc=2, C_1_pr=0, C_1_st=0, data_0=65, data_1=66, e=0, i=1, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, P_2_ev=2, P_2_i=1, P_2_pc=1, P_2_st=0, timer=0] [L509] CALL, EXPR exists_runnable_thread() VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=0, \old(timer)=0, C_1_ev=2, C_1_i=1, C_1_pc=2, C_1_pr=0, C_1_st=0, data_0=65, data_1=66, e=0, i=1, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, P_2_ev=2, P_2_i=1, P_2_pc=1, P_2_st=0, timer=0] [L314] int __retres1 ; VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=0, \old(timer)=0, C_1_ev=2, C_1_i=1, C_1_pc=2, C_1_pr=0, C_1_st=0, data_0=65, data_1=66, e=0, i=1, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, P_2_ev=2, P_2_i=1, P_2_pc=1, P_2_st=0, timer=0] [L317] COND TRUE (int )P_1_st == 0 [L318] __retres1 = 1 VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=0, \old(timer)=0, __retres1=1, C_1_ev=2, C_1_i=1, C_1_pc=2, C_1_pr=0, C_1_st=0, data_0=65, data_1=66, e=0, i=1, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, P_2_ev=2, P_2_i=1, P_2_pc=1, P_2_st=0, timer=0] [L335] RET return (__retres1); VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=0, \old(timer)=0, \result=1, __retres1=1, C_1_ev=2, C_1_i=1, C_1_pc=2, C_1_pr=0, C_1_st=0, data_0=65, data_1=66, e=0, i=1, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, P_2_ev=2, P_2_i=1, P_2_pc=1, P_2_st=0, timer=0] [L509] EXPR exists_runnable_thread() VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=0, \old(timer)=0, C_1_ev=2, C_1_i=1, C_1_pc=2, C_1_pr=0, C_1_st=0, data_0=65, data_1=66, e=0, exists_runnable_thread()=1, i=1, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, P_2_ev=2, P_2_i=1, P_2_pc=1, P_2_st=0, timer=0] [L509] tmp = exists_runnable_thread() [L511] COND TRUE \read(tmp) [L512] __retres2 = 0 VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=0, \old(timer)=0, __retres2=0, C_1_ev=2, C_1_i=1, C_1_pc=2, C_1_pr=0, C_1_st=0, data_0=65, data_1=66, e=0, i=1, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, P_2_ev=2, P_2_i=1, P_2_pc=1, P_2_st=0, timer=0, tmp=1] [L519] RET return (__retres2); VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=0, \old(timer)=0, \result=0, __retres2=0, C_1_ev=2, C_1_i=1, C_1_pc=2, C_1_pr=0, C_1_st=0, data_0=65, data_1=66, e=0, i=1, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, P_2_ev=2, P_2_i=1, P_2_pc=1, P_2_st=0, timer=0, tmp=1] [L567] EXPR stop_simulation() VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=0, \old(timer)=0, C_1_ev=2, C_1_i=1, C_1_pc=2, C_1_pr=0, C_1_st=0, data_0=65, data_1=66, e=0, i=1, kernel_st=4, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, P_2_ev=2, P_2_i=1, P_2_pc=1, P_2_st=0, stop_simulation()=0, timer=0, tmp=0] [L567] tmp___0 = stop_simulation() [L569] COND FALSE !(\read(tmp___0)) VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=0, \old(timer)=0, C_1_ev=2, C_1_i=1, C_1_pc=2, C_1_pr=0, C_1_st=0, data_0=65, data_1=66, e=0, i=1, kernel_st=4, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, P_2_ev=2, P_2_i=1, P_2_pc=1, P_2_st=0, timer=0, tmp=0, tmp___0=0] [L537] COND TRUE 1 VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=0, \old(timer)=0, C_1_ev=2, C_1_i=1, C_1_pc=2, C_1_pr=0, C_1_st=0, data_0=65, data_1=66, e=0, i=1, kernel_st=4, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, P_2_ev=2, P_2_i=1, P_2_pc=1, P_2_st=0, timer=0, tmp=0, tmp___0=0] [L540] kernel_st = 1 VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(e)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=0, \old(P_2_st)=0, \old(timer)=0, C_1_ev=2, C_1_i=1, C_1_pc=2, C_1_pr=0, C_1_st=0, data_0=65, data_1=66, e=0, i=1, kernel_st=1, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, P_2_ev=2, P_2_i=1, P_2_pc=1, P_2_st=0, timer=0, tmp=0, tmp___0=0] [L541] CALL eval() VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=2, \old(C_1_st)=0, \old(data_0)=65, \old(data_1)=66, \old(e)=0, \old(i)=1, \old(max_loop)=0, \old(num)=1, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=1, \old(P_1_st)=0, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=1, \old(P_2_st)=0, \old(timer)=0, C_1_ev=2, C_1_i=1, C_1_pc=2, C_1_pr=0, C_1_st=0, data_0=65, data_1=66, e=0, i=1, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, P_2_ev=2, P_2_i=1, P_2_pc=1, P_2_st=0, timer=0] [L339] int tmp ; [L340] int tmp___0 ; [L341] int tmp___1 ; [L342] int tmp___2 ; VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=2, \old(C_1_st)=0, \old(data_0)=65, \old(data_1)=66, \old(e)=0, \old(i)=1, \old(max_loop)=0, \old(num)=1, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=1, \old(P_1_st)=0, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=1, \old(P_2_st)=0, \old(timer)=0, C_1_ev=2, C_1_i=1, C_1_pc=2, C_1_pr=0, C_1_st=0, data_0=65, data_1=66, e=0, i=1, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, P_2_ev=2, P_2_i=1, P_2_pc=1, P_2_st=0, timer=0] [L346] COND TRUE 1 VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=2, \old(C_1_st)=0, \old(data_0)=65, \old(data_1)=66, \old(e)=0, \old(i)=1, \old(max_loop)=0, \old(num)=1, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=1, \old(P_1_st)=0, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=1, \old(P_2_st)=0, \old(timer)=0, C_1_ev=2, C_1_i=1, C_1_pc=2, C_1_pr=0, C_1_st=0, data_0=65, data_1=66, e=0, i=1, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, P_2_ev=2, P_2_i=1, P_2_pc=1, P_2_st=0, timer=0] [L349] CALL, EXPR exists_runnable_thread() VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=2, \old(C_1_st)=0, \old(data_0)=65, \old(data_1)=66, \old(e)=0, \old(i)=1, \old(max_loop)=0, \old(num)=1, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=1, \old(P_1_st)=0, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=1, \old(P_2_st)=0, \old(timer)=0, C_1_ev=2, C_1_i=1, C_1_pc=2, C_1_pr=0, C_1_st=0, data_0=65, data_1=66, e=0, i=1, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, P_2_ev=2, P_2_i=1, P_2_pc=1, P_2_st=0, timer=0] [L314] int __retres1 ; VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=2, \old(C_1_st)=0, \old(data_0)=65, \old(data_1)=66, \old(e)=0, \old(i)=1, \old(max_loop)=0, \old(num)=1, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=1, \old(P_1_st)=0, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=1, \old(P_2_st)=0, \old(timer)=0, C_1_ev=2, C_1_i=1, C_1_pc=2, C_1_pr=0, C_1_st=0, data_0=65, data_1=66, e=0, i=1, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, P_2_ev=2, P_2_i=1, P_2_pc=1, P_2_st=0, timer=0] [L317] COND TRUE (int )P_1_st == 0 [L318] __retres1 = 1 VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=2, \old(C_1_st)=0, \old(data_0)=65, \old(data_1)=66, \old(e)=0, \old(i)=1, \old(max_loop)=0, \old(num)=1, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=1, \old(P_1_st)=0, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=1, \old(P_2_st)=0, \old(timer)=0, __retres1=1, C_1_ev=2, C_1_i=1, C_1_pc=2, C_1_pr=0, C_1_st=0, data_0=65, data_1=66, e=0, i=1, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, P_2_ev=2, P_2_i=1, P_2_pc=1, P_2_st=0, timer=0] [L335] RET return (__retres1); VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=2, \old(C_1_st)=0, \old(data_0)=65, \old(data_1)=66, \old(e)=0, \old(i)=1, \old(max_loop)=0, \old(num)=1, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=1, \old(P_1_st)=0, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=1, \old(P_2_st)=0, \old(timer)=0, \result=1, __retres1=1, C_1_ev=2, C_1_i=1, C_1_pc=2, C_1_pr=0, C_1_st=0, data_0=65, data_1=66, e=0, i=1, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, P_2_ev=2, P_2_i=1, P_2_pc=1, P_2_st=0, timer=0] [L349] EXPR exists_runnable_thread() VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=2, \old(C_1_st)=0, \old(data_0)=65, \old(data_1)=66, \old(e)=0, \old(i)=1, \old(max_loop)=0, \old(num)=1, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=1, \old(P_1_st)=0, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=1, \old(P_2_st)=0, \old(timer)=0, C_1_ev=2, C_1_i=1, C_1_pc=2, C_1_pr=0, C_1_st=0, data_0=65, data_1=66, e=0, exists_runnable_thread()=1, i=1, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, P_2_ev=2, P_2_i=1, P_2_pc=1, P_2_st=0, timer=0] [L349] tmp___2 = exists_runnable_thread() [L351] COND TRUE \read(tmp___2) VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=2, \old(C_1_st)=0, \old(data_0)=65, \old(data_1)=66, \old(e)=0, \old(i)=1, \old(max_loop)=0, \old(num)=1, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=1, \old(P_1_st)=0, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=1, \old(P_2_st)=0, \old(timer)=0, C_1_ev=2, C_1_i=1, C_1_pc=2, C_1_pr=0, C_1_st=0, data_0=65, data_1=66, e=0, i=1, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, P_2_ev=2, P_2_i=1, P_2_pc=1, P_2_st=0, timer=0, tmp___2=1] [L356] COND TRUE (int )P_1_st == 0 [L358] tmp = __VERIFIER_nondet_int() [L360] COND TRUE \read(tmp) [L362] P_1_st = 1 VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=2, \old(C_1_st)=0, \old(data_0)=65, \old(data_1)=66, \old(e)=0, \old(i)=1, \old(max_loop)=0, \old(num)=1, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=1, \old(P_1_st)=0, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=1, \old(P_2_st)=0, \old(timer)=0, C_1_ev=2, C_1_i=1, C_1_pc=2, C_1_pr=0, C_1_st=0, data_0=65, data_1=66, e=0, i=1, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=1, P_2_ev=2, P_2_i=1, P_2_pc=1, P_2_st=0, timer=0, tmp=1, tmp___2=1] [L363] CALL P_1() VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=2, \old(C_1_st)=0, \old(data_0)=65, \old(data_1)=66, \old(e)=0, \old(i)=1, \old(max_loop)=0, \old(num)=1, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=1, \old(P_1_st)=1, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=1, \old(P_2_st)=0, \old(timer)=0, C_1_ev=2, C_1_i=1, C_1_pc=2, C_1_pr=0, C_1_st=0, data_0=65, data_1=66, e=0, i=1, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=1, P_2_ev=2, P_2_i=1, P_2_pc=1, P_2_st=0, timer=0] [L72] COND FALSE !((int )P_1_pc == 0) VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=2, \old(C_1_st)=0, \old(data_0)=65, \old(data_1)=66, \old(e)=0, \old(i)=1, \old(max_loop)=0, \old(num)=1, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=1, \old(P_1_st)=1, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=1, \old(P_2_st)=0, \old(timer)=0, C_1_ev=2, C_1_i=1, C_1_pc=2, C_1_pr=0, C_1_st=0, data_0=65, data_1=66, e=0, i=1, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=1, P_2_ev=2, P_2_i=1, P_2_pc=1, P_2_st=0, timer=0] [L75] COND TRUE (int )P_1_pc == 1 VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=2, \old(C_1_st)=0, \old(data_0)=65, \old(data_1)=66, \old(e)=0, \old(i)=1, \old(max_loop)=0, \old(num)=1, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=1, \old(P_1_st)=1, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=1, \old(P_2_st)=0, \old(timer)=0, C_1_ev=2, C_1_i=1, C_1_pc=2, C_1_pr=0, C_1_st=0, data_0=65, data_1=66, e=0, i=1, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=1, P_2_ev=2, P_2_i=1, P_2_pc=1, P_2_st=0, timer=0] [L83] COND TRUE i < max_loop VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=2, \old(C_1_st)=0, \old(data_0)=65, \old(data_1)=66, \old(e)=0, \old(i)=1, \old(max_loop)=0, \old(num)=1, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=1, \old(P_1_st)=1, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=1, \old(P_2_st)=0, \old(timer)=0, C_1_ev=2, C_1_i=1, C_1_pc=2, C_1_pr=0, C_1_st=0, data_0=65, data_1=66, e=0, i=1, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=1, P_2_ev=2, P_2_i=1, P_2_pc=1, P_2_st=0, timer=0] [L86] CALL write_data(num, 'A') VAL [\old(c)=65, \old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=2, \old(C_1_st)=0, \old(data_0)=65, \old(data_1)=66, \old(e)=0, \old(i)=1, \old(i___0)=1, \old(max_loop)=0, \old(num)=1, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=1, \old(P_1_st)=1, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=1, \old(P_2_st)=0, \old(timer)=0, C_1_ev=2, C_1_i=1, C_1_pc=2, C_1_pr=0, C_1_st=0, data_0=65, data_1=66, e=0, i=1, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=1, P_2_ev=2, P_2_i=1, P_2_pc=1, P_2_st=0, timer=0] [L49] COND FALSE !(i___0 == 0) VAL [\old(c)=65, \old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=2, \old(C_1_st)=0, \old(data_0)=65, \old(data_1)=66, \old(e)=0, \old(i)=1, \old(i___0)=1, \old(max_loop)=0, \old(num)=1, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=1, \old(P_1_st)=1, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=1, \old(P_2_st)=0, \old(timer)=0, c=65, C_1_ev=2, C_1_i=1, C_1_pc=2, C_1_pr=0, C_1_st=0, data_0=65, data_1=66, e=0, i=1, i___0=1, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=1, P_2_ev=2, P_2_i=1, P_2_pc=1, P_2_st=0, timer=0] [L52] COND TRUE i___0 == 1 [L53] RET data_1 = c VAL [\old(c)=65, \old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=2, \old(C_1_st)=0, \old(data_0)=65, \old(data_1)=66, \old(e)=0, \old(i)=1, \old(i___0)=1, \old(max_loop)=0, \old(num)=1, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=1, \old(P_1_st)=1, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=1, \old(P_2_st)=0, \old(timer)=0, c=65, C_1_ev=2, C_1_i=1, C_1_pc=2, C_1_pr=0, C_1_st=0, data_0=65, data_1=65, e=0, i=1, i___0=1, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=1, P_2_ev=2, P_2_i=1, P_2_pc=1, P_2_st=0, timer=0] [L86] write_data(num, 'A') VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=2, \old(C_1_st)=0, \old(data_0)=65, \old(data_1)=66, \old(e)=0, \old(i)=1, \old(max_loop)=0, \old(num)=1, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=1, \old(P_1_st)=1, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=1, \old(P_2_st)=0, \old(timer)=0, C_1_ev=2, C_1_i=1, C_1_pc=2, C_1_pr=0, C_1_st=0, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=1, P_2_ev=2, P_2_i=1, P_2_pc=1, P_2_st=0, timer=0] [L87] num += 1 [L88] P_1_pc = 1 [L89] RET P_1_st = 2 VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=2, \old(C_1_st)=0, \old(data_0)=65, \old(data_1)=66, \old(e)=0, \old(i)=1, \old(max_loop)=0, \old(num)=1, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=1, \old(P_1_st)=1, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=1, \old(P_2_st)=0, \old(timer)=0, C_1_ev=2, C_1_i=1, C_1_pc=2, C_1_pr=0, C_1_st=0, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, P_2_ev=2, P_2_i=1, P_2_pc=1, P_2_st=0, timer=0] [L363] P_1() VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=2, \old(C_1_st)=0, \old(data_0)=65, \old(data_1)=66, \old(e)=0, \old(i)=1, \old(max_loop)=0, \old(num)=1, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=1, \old(P_1_st)=0, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=1, \old(P_2_st)=0, \old(timer)=0, C_1_ev=2, C_1_i=1, C_1_pc=2, C_1_pr=0, C_1_st=0, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, P_2_ev=2, P_2_i=1, P_2_pc=1, P_2_st=0, timer=0, tmp=1, tmp___2=1] [L371] COND TRUE (int )P_2_st == 0 [L373] tmp___0 = __VERIFIER_nondet_int() [L375] COND TRUE \read(tmp___0) [L377] P_2_st = 1 VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=2, \old(C_1_st)=0, \old(data_0)=65, \old(data_1)=66, \old(e)=0, \old(i)=1, \old(max_loop)=0, \old(num)=1, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=1, \old(P_1_st)=0, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=1, \old(P_2_st)=0, \old(timer)=0, C_1_ev=2, C_1_i=1, C_1_pc=2, C_1_pr=0, C_1_st=0, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, P_2_ev=2, P_2_i=1, P_2_pc=1, P_2_st=1, timer=0, tmp=1, tmp___0=1, tmp___2=1] [L378] CALL P_2() VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=2, \old(C_1_st)=0, \old(data_0)=65, \old(data_1)=65, \old(e)=0, \old(i)=1, \old(max_loop)=0, \old(num)=2, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=1, \old(P_1_st)=2, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=1, \old(P_2_st)=1, \old(timer)=0, C_1_ev=2, C_1_i=1, C_1_pc=2, C_1_pr=0, C_1_st=0, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, P_2_ev=2, P_2_i=1, P_2_pc=1, P_2_st=1, timer=0] [L130] COND FALSE !((int )P_2_pc == 0) VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=2, \old(C_1_st)=0, \old(data_0)=65, \old(data_1)=65, \old(e)=0, \old(i)=1, \old(max_loop)=0, \old(num)=2, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=1, \old(P_1_st)=2, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=1, \old(P_2_st)=1, \old(timer)=0, C_1_ev=2, C_1_i=1, C_1_pc=2, C_1_pr=0, C_1_st=0, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, P_2_ev=2, P_2_i=1, P_2_pc=1, P_2_st=1, timer=0] [L133] COND TRUE (int )P_2_pc == 1 VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=2, \old(C_1_st)=0, \old(data_0)=65, \old(data_1)=65, \old(e)=0, \old(i)=1, \old(max_loop)=0, \old(num)=2, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=1, \old(P_1_st)=2, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=1, \old(P_2_st)=1, \old(timer)=0, C_1_ev=2, C_1_i=1, C_1_pc=2, C_1_pr=0, C_1_st=0, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, P_2_ev=2, P_2_i=1, P_2_pc=1, P_2_st=1, timer=0] [L141] COND TRUE i < max_loop VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=2, \old(C_1_st)=0, \old(data_0)=65, \old(data_1)=65, \old(e)=0, \old(i)=1, \old(max_loop)=0, \old(num)=2, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=1, \old(P_1_st)=2, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=1, \old(P_2_st)=1, \old(timer)=0, C_1_ev=2, C_1_i=1, C_1_pc=2, C_1_pr=0, C_1_st=0, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, P_2_ev=2, P_2_i=1, P_2_pc=1, P_2_st=1, timer=0] [L144] CALL write_data(num, 'B') VAL [\old(c)=66, \old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=2, \old(C_1_st)=0, \old(data_0)=65, \old(data_1)=65, \old(e)=0, \old(i)=1, \old(i___0)=2, \old(max_loop)=0, \old(num)=2, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=1, \old(P_1_st)=2, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=1, \old(P_2_st)=1, \old(timer)=0, C_1_ev=2, C_1_i=1, C_1_pc=2, C_1_pr=0, C_1_st=0, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, P_2_ev=2, P_2_i=1, P_2_pc=1, P_2_st=1, timer=0] [L49] COND FALSE !(i___0 == 0) VAL [\old(c)=66, \old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=2, \old(C_1_st)=0, \old(data_0)=65, \old(data_1)=65, \old(e)=0, \old(i)=1, \old(i___0)=2, \old(max_loop)=0, \old(num)=2, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=1, \old(P_1_st)=2, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=1, \old(P_2_st)=1, \old(timer)=0, c=66, C_1_ev=2, C_1_i=1, C_1_pc=2, C_1_pr=0, C_1_st=0, data_0=65, data_1=65, e=0, i=1, i___0=2, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, P_2_ev=2, P_2_i=1, P_2_pc=1, P_2_st=1, timer=0] [L52] COND FALSE !(i___0 == 1) VAL [\old(c)=66, \old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=2, \old(C_1_st)=0, \old(data_0)=65, \old(data_1)=65, \old(e)=0, \old(i)=1, \old(i___0)=2, \old(max_loop)=0, \old(num)=2, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=1, \old(P_1_st)=2, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=1, \old(P_2_st)=1, \old(timer)=0, c=66, C_1_ev=2, C_1_i=1, C_1_pc=2, C_1_pr=0, C_1_st=0, data_0=65, data_1=65, e=0, i=1, i___0=2, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, P_2_ev=2, P_2_i=1, P_2_pc=1, P_2_st=1, timer=0] [L56] CALL error() VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=2, \old(C_1_st)=0, \old(data_0)=65, \old(data_1)=65, \old(e)=0, \old(i)=1, \old(max_loop)=0, \old(num)=2, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=1, \old(P_1_st)=2, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=1, \old(P_2_st)=1, \old(timer)=0, C_1_ev=2, C_1_i=1, C_1_pc=2, C_1_pr=0, C_1_st=0, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, P_2_ev=2, P_2_i=1, P_2_pc=1, P_2_st=1, timer=0] [L9] __VERIFIER_error() VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=2, \old(C_1_st)=0, \old(data_0)=65, \old(data_1)=65, \old(e)=0, \old(i)=1, \old(max_loop)=0, \old(num)=2, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=1, \old(P_1_st)=2, \old(P_2_ev)=0, \old(P_2_i)=0, \old(P_2_pc)=1, \old(P_2_st)=1, \old(timer)=0, C_1_ev=2, C_1_i=1, C_1_pc=2, C_1_pr=0, C_1_st=0, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, P_2_ev=2, P_2_i=1, P_2_pc=1, P_2_st=1, timer=0] - StatisticsResult: Ultimate Automizer benchmark data CFG has 25 procedures, 186 locations, 1 error locations. UNSAFE Result, 262.7s OverallTime, 34 OverallIterations, 6 TraceHistogramMax, 146.4s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 11810 SDtfs, 17334 SDslu, 23982 SDs, 0 SdLazy, 23760 SolverSat, 6132 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 13.0s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 2303 GetRequests, 1962 SyntacticMatches, 28 SemanticMatches, 313 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 917 ImplicationChecksByTransitivity, 2.8s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=187817occurred in iteration=20, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 110.7s AutomataMinimizationTime, 33 MinimizatonAttempts, 94029 StatesRemovedByMinimization, 30 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.2s SsaConstructionTime, 0.7s SatisfiabilityAnalysisTime, 2.7s InterpolantComputationTime, 7657 NumberOfCodeBlocks, 7657 NumberOfCodeBlocksAsserted, 43 NumberOfCheckSat, 7319 ConstructedInterpolants, 0 QuantifiedInterpolants, 2595685 SizeOfPredicates, 14 NumberOfNonLiveVariables, 8022 ConjunctsInSsa, 84 ConjunctsInUnsatCore, 42 InterpolantComputations, 31 PerfectInterpolantSequences, 3184/3407 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...