./Ultimate.py --spec ../../sv-benchmarks/c/ReachSafety.prp --file ../../sv-benchmarks/c/systemc/pc_sfifo_2_false-unreach-call_false-termination.cil.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version 5842f4b8 Calling Ultimate with: java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/working_dir_a9cf40c1-37e2-43e0-bb08-11a224bf7cbc/bin-2019/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/working_dir_a9cf40c1-37e2-43e0-bb08-11a224bf7cbc/bin-2019/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/working_dir_a9cf40c1-37e2-43e0-bb08-11a224bf7cbc/bin-2019/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/working_dir_a9cf40c1-37e2-43e0-bb08-11a224bf7cbc/bin-2019/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/systemc/pc_sfifo_2_false-unreach-call_false-termination.cil.c -s /tmp/vcloud-vcloud-master/worker/working_dir_a9cf40c1-37e2-43e0-bb08-11a224bf7cbc/bin-2019/uautomizer/config/svcomp-Reach-32bit-PetriAutomizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/working_dir_a9cf40c1-37e2-43e0-bb08-11a224bf7cbc/bin-2019/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash df684da5e5a56662a7be6091ec5bb0a21e1453c5 .................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................. Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.23-5842f4b [2018-11-18 15:07:37,801 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-11-18 15:07:37,802 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-11-18 15:07:37,809 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-11-18 15:07:37,809 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-11-18 15:07:37,809 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-11-18 15:07:37,810 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-11-18 15:07:37,811 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-11-18 15:07:37,812 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-11-18 15:07:37,813 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-11-18 15:07:37,813 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-11-18 15:07:37,813 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-11-18 15:07:37,814 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-11-18 15:07:37,815 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-11-18 15:07:37,816 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-11-18 15:07:37,816 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-11-18 15:07:37,817 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-11-18 15:07:37,818 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-11-18 15:07:37,819 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-11-18 15:07:37,820 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-11-18 15:07:37,821 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-11-18 15:07:37,822 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-11-18 15:07:37,823 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-11-18 15:07:37,824 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-11-18 15:07:37,824 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-11-18 15:07:37,824 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-11-18 15:07:37,825 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-11-18 15:07:37,826 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-11-18 15:07:37,826 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-11-18 15:07:37,827 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-11-18 15:07:37,827 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-11-18 15:07:37,828 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-11-18 15:07:37,828 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-11-18 15:07:37,828 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-11-18 15:07:37,829 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-11-18 15:07:37,829 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-11-18 15:07:37,829 INFO L98 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/working_dir_a9cf40c1-37e2-43e0-bb08-11a224bf7cbc/bin-2019/uautomizer/config/svcomp-Reach-32bit-PetriAutomizer_Default.epf [2018-11-18 15:07:37,839 INFO L110 SettingsManager]: Loading preferences was successful [2018-11-18 15:07:37,839 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-11-18 15:07:37,840 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-11-18 15:07:37,840 INFO L133 SettingsManager]: * Process only entry and re-entry procedures=false [2018-11-18 15:07:37,840 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-11-18 15:07:37,841 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-11-18 15:07:37,841 INFO L133 SettingsManager]: * Use SBE=true [2018-11-18 15:07:37,841 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-11-18 15:07:37,841 INFO L133 SettingsManager]: * sizeof long=4 [2018-11-18 15:07:37,841 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-11-18 15:07:37,841 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-11-18 15:07:37,841 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-11-18 15:07:37,842 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-11-18 15:07:37,842 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-11-18 15:07:37,842 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-11-18 15:07:37,842 INFO L133 SettingsManager]: * sizeof long double=12 [2018-11-18 15:07:37,842 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-11-18 15:07:37,842 INFO L133 SettingsManager]: * Use constant arrays=true [2018-11-18 15:07:37,842 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-11-18 15:07:37,842 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-11-18 15:07:37,842 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-11-18 15:07:37,843 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-11-18 15:07:37,843 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-11-18 15:07:37,843 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-18 15:07:37,843 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-11-18 15:07:37,843 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-11-18 15:07:37,843 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-11-18 15:07:37,843 INFO L133 SettingsManager]: * Trace refinement strategy=CAMEL [2018-11-18 15:07:37,843 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-11-18 15:07:37,843 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-11-18 15:07:37,843 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/working_dir_a9cf40c1-37e2-43e0-bb08-11a224bf7cbc/bin-2019/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> df684da5e5a56662a7be6091ec5bb0a21e1453c5 [2018-11-18 15:07:37,867 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-11-18 15:07:37,876 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-11-18 15:07:37,878 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-11-18 15:07:37,880 INFO L271 PluginConnector]: Initializing CDTParser... [2018-11-18 15:07:37,880 INFO L276 PluginConnector]: CDTParser initialized [2018-11-18 15:07:37,881 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/working_dir_a9cf40c1-37e2-43e0-bb08-11a224bf7cbc/bin-2019/uautomizer/../../sv-benchmarks/c/systemc/pc_sfifo_2_false-unreach-call_false-termination.cil.c [2018-11-18 15:07:37,927 INFO L221 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_a9cf40c1-37e2-43e0-bb08-11a224bf7cbc/bin-2019/uautomizer/data/3d3090d94/5737b5664a044556a1dae77a0c94901f/FLAGaf27aa344 [2018-11-18 15:07:38,343 INFO L307 CDTParser]: Found 1 translation units. [2018-11-18 15:07:38,344 INFO L161 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/working_dir_a9cf40c1-37e2-43e0-bb08-11a224bf7cbc/sv-benchmarks/c/systemc/pc_sfifo_2_false-unreach-call_false-termination.cil.c [2018-11-18 15:07:38,350 INFO L355 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_a9cf40c1-37e2-43e0-bb08-11a224bf7cbc/bin-2019/uautomizer/data/3d3090d94/5737b5664a044556a1dae77a0c94901f/FLAGaf27aa344 [2018-11-18 15:07:38,361 INFO L363 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/working_dir_a9cf40c1-37e2-43e0-bb08-11a224bf7cbc/bin-2019/uautomizer/data/3d3090d94/5737b5664a044556a1dae77a0c94901f [2018-11-18 15:07:38,363 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-11-18 15:07:38,364 INFO L131 ToolchainWalker]: Walking toolchain with 5 elements. [2018-11-18 15:07:38,364 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-11-18 15:07:38,364 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-11-18 15:07:38,367 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-11-18 15:07:38,367 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 18.11 03:07:38" (1/1) ... [2018-11-18 15:07:38,369 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@7217af06 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 03:07:38, skipping insertion in model container [2018-11-18 15:07:38,369 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 18.11 03:07:38" (1/1) ... [2018-11-18 15:07:38,376 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-11-18 15:07:38,399 INFO L176 MainTranslator]: Built tables and reachable declarations [2018-11-18 15:07:38,531 INFO L201 PostProcessor]: Analyzing one entry point: main [2018-11-18 15:07:38,534 INFO L191 MainTranslator]: Completed pre-run [2018-11-18 15:07:38,561 INFO L201 PostProcessor]: Analyzing one entry point: main [2018-11-18 15:07:38,573 INFO L195 MainTranslator]: Completed translation [2018-11-18 15:07:38,573 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 03:07:38 WrapperNode [2018-11-18 15:07:38,573 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-11-18 15:07:38,574 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-11-18 15:07:38,574 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-11-18 15:07:38,574 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-11-18 15:07:38,583 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 03:07:38" (1/1) ... [2018-11-18 15:07:38,583 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 03:07:38" (1/1) ... [2018-11-18 15:07:38,624 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 03:07:38" (1/1) ... [2018-11-18 15:07:38,625 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 03:07:38" (1/1) ... [2018-11-18 15:07:38,631 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 03:07:38" (1/1) ... [2018-11-18 15:07:38,637 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 03:07:38" (1/1) ... [2018-11-18 15:07:38,638 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 03:07:38" (1/1) ... [2018-11-18 15:07:38,640 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-11-18 15:07:38,640 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-11-18 15:07:38,640 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-11-18 15:07:38,640 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-11-18 15:07:38,641 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 03:07:38" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_a9cf40c1-37e2-43e0-bb08-11a224bf7cbc/bin-2019/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-18 15:07:38,673 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-11-18 15:07:38,673 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-11-18 15:07:38,673 INFO L138 BoogieDeclarations]: Found implementation of procedure error [2018-11-18 15:07:38,673 INFO L138 BoogieDeclarations]: Found implementation of procedure update_fifo_q [2018-11-18 15:07:38,673 INFO L138 BoogieDeclarations]: Found implementation of procedure is_do_write_p_triggered [2018-11-18 15:07:38,673 INFO L138 BoogieDeclarations]: Found implementation of procedure is_do_read_c_triggered [2018-11-18 15:07:38,673 INFO L138 BoogieDeclarations]: Found implementation of procedure immediate_notify_threads [2018-11-18 15:07:38,673 INFO L138 BoogieDeclarations]: Found implementation of procedure do_write_p [2018-11-18 15:07:38,674 INFO L138 BoogieDeclarations]: Found implementation of procedure do_read_c [2018-11-18 15:07:38,674 INFO L138 BoogieDeclarations]: Found implementation of procedure update_channels [2018-11-18 15:07:38,674 INFO L138 BoogieDeclarations]: Found implementation of procedure init_threads [2018-11-18 15:07:38,674 INFO L138 BoogieDeclarations]: Found implementation of procedure exists_runnable_thread [2018-11-18 15:07:38,674 INFO L138 BoogieDeclarations]: Found implementation of procedure fire_delta_events [2018-11-18 15:07:38,674 INFO L138 BoogieDeclarations]: Found implementation of procedure reset_delta_events [2018-11-18 15:07:38,674 INFO L138 BoogieDeclarations]: Found implementation of procedure activate_threads [2018-11-18 15:07:38,675 INFO L138 BoogieDeclarations]: Found implementation of procedure eval [2018-11-18 15:07:38,675 INFO L138 BoogieDeclarations]: Found implementation of procedure stop_simulation [2018-11-18 15:07:38,675 INFO L138 BoogieDeclarations]: Found implementation of procedure start_simulation [2018-11-18 15:07:38,675 INFO L138 BoogieDeclarations]: Found implementation of procedure init_model [2018-11-18 15:07:38,675 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2018-11-18 15:07:38,675 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_error [2018-11-18 15:07:38,675 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_int [2018-11-18 15:07:38,675 INFO L130 BoogieDeclarations]: Found specification of procedure error [2018-11-18 15:07:38,676 INFO L130 BoogieDeclarations]: Found specification of procedure update_fifo_q [2018-11-18 15:07:38,676 INFO L130 BoogieDeclarations]: Found specification of procedure is_do_write_p_triggered [2018-11-18 15:07:38,676 INFO L130 BoogieDeclarations]: Found specification of procedure is_do_read_c_triggered [2018-11-18 15:07:38,676 INFO L130 BoogieDeclarations]: Found specification of procedure immediate_notify_threads [2018-11-18 15:07:38,676 INFO L130 BoogieDeclarations]: Found specification of procedure do_write_p [2018-11-18 15:07:38,676 INFO L130 BoogieDeclarations]: Found specification of procedure do_read_c [2018-11-18 15:07:38,676 INFO L130 BoogieDeclarations]: Found specification of procedure update_channels [2018-11-18 15:07:38,676 INFO L130 BoogieDeclarations]: Found specification of procedure init_threads [2018-11-18 15:07:38,676 INFO L130 BoogieDeclarations]: Found specification of procedure exists_runnable_thread [2018-11-18 15:07:38,677 INFO L130 BoogieDeclarations]: Found specification of procedure fire_delta_events [2018-11-18 15:07:38,677 INFO L130 BoogieDeclarations]: Found specification of procedure reset_delta_events [2018-11-18 15:07:38,677 INFO L130 BoogieDeclarations]: Found specification of procedure activate_threads [2018-11-18 15:07:38,677 INFO L130 BoogieDeclarations]: Found specification of procedure eval [2018-11-18 15:07:38,677 INFO L130 BoogieDeclarations]: Found specification of procedure stop_simulation [2018-11-18 15:07:38,677 INFO L130 BoogieDeclarations]: Found specification of procedure start_simulation [2018-11-18 15:07:38,677 INFO L130 BoogieDeclarations]: Found specification of procedure init_model [2018-11-18 15:07:38,677 INFO L130 BoogieDeclarations]: Found specification of procedure main [2018-11-18 15:07:38,677 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-11-18 15:07:38,678 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-11-18 15:07:39,009 INFO L278 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-11-18 15:07:39,010 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 18.11 03:07:39 BoogieIcfgContainer [2018-11-18 15:07:39,010 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-11-18 15:07:39,011 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-11-18 15:07:39,011 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-11-18 15:07:39,014 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-11-18 15:07:39,014 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 18.11 03:07:38" (1/3) ... [2018-11-18 15:07:39,015 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@c99fd50 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 18.11 03:07:39, skipping insertion in model container [2018-11-18 15:07:39,015 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 03:07:38" (2/3) ... [2018-11-18 15:07:39,015 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@c99fd50 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 18.11 03:07:39, skipping insertion in model container [2018-11-18 15:07:39,015 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 18.11 03:07:39" (3/3) ... [2018-11-18 15:07:39,018 INFO L112 eAbstractionObserver]: Analyzing ICFG pc_sfifo_2_false-unreach-call_false-termination.cil.c [2018-11-18 15:07:39,026 INFO L136 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-11-18 15:07:39,031 INFO L148 ceAbstractionStarter]: Appying trace abstraction to program that has 1 error locations. [2018-11-18 15:07:39,040 INFO L257 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2018-11-18 15:07:39,063 INFO L133 ementStrategyFactory]: Using default assertion order modulation [2018-11-18 15:07:39,063 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-11-18 15:07:39,063 INFO L383 AbstractCegarLoop]: Hoare is true [2018-11-18 15:07:39,063 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-11-18 15:07:39,063 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-11-18 15:07:39,063 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-11-18 15:07:39,064 INFO L387 AbstractCegarLoop]: Difference is false [2018-11-18 15:07:39,064 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-11-18 15:07:39,064 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-11-18 15:07:39,076 INFO L276 IsEmpty]: Start isEmpty. Operand 142 states. [2018-11-18 15:07:39,081 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2018-11-18 15:07:39,081 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 15:07:39,082 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 15:07:39,084 INFO L423 AbstractCegarLoop]: === Iteration 1 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 15:07:39,088 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 15:07:39,089 INFO L82 PathProgramCache]: Analyzing trace with hash -685793979, now seen corresponding path program 1 times [2018-11-18 15:07:39,090 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-18 15:07:39,090 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-18 15:07:39,129 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 15:07:39,129 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 15:07:39,129 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 15:07:39,191 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 15:07:39,287 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 15:07:39,289 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 15:07:39,289 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-18 15:07:39,293 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-18 15:07:39,304 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-18 15:07:39,305 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-18 15:07:39,307 INFO L87 Difference]: Start difference. First operand 142 states. Second operand 5 states. [2018-11-18 15:07:39,781 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 15:07:39,781 INFO L93 Difference]: Finished difference Result 395 states and 564 transitions. [2018-11-18 15:07:39,781 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-11-18 15:07:39,782 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 72 [2018-11-18 15:07:39,783 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 15:07:39,791 INFO L225 Difference]: With dead ends: 395 [2018-11-18 15:07:39,791 INFO L226 Difference]: Without dead ends: 263 [2018-11-18 15:07:39,794 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 6 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-11-18 15:07:39,805 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 263 states. [2018-11-18 15:07:39,840 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 263 to 242. [2018-11-18 15:07:39,841 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 242 states. [2018-11-18 15:07:39,843 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 242 states to 242 states and 314 transitions. [2018-11-18 15:07:39,844 INFO L78 Accepts]: Start accepts. Automaton has 242 states and 314 transitions. Word has length 72 [2018-11-18 15:07:39,844 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 15:07:39,844 INFO L480 AbstractCegarLoop]: Abstraction has 242 states and 314 transitions. [2018-11-18 15:07:39,844 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-18 15:07:39,844 INFO L276 IsEmpty]: Start isEmpty. Operand 242 states and 314 transitions. [2018-11-18 15:07:39,846 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2018-11-18 15:07:39,846 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 15:07:39,847 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 15:07:39,847 INFO L423 AbstractCegarLoop]: === Iteration 2 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 15:07:39,847 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 15:07:39,847 INFO L82 PathProgramCache]: Analyzing trace with hash -832859676, now seen corresponding path program 1 times [2018-11-18 15:07:39,847 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-18 15:07:39,848 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-18 15:07:39,848 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 15:07:39,849 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 15:07:39,849 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 15:07:39,870 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 15:07:39,946 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 15:07:39,946 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 15:07:39,946 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-18 15:07:39,948 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-18 15:07:39,948 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-18 15:07:39,948 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-11-18 15:07:39,949 INFO L87 Difference]: Start difference. First operand 242 states and 314 transitions. Second operand 6 states. [2018-11-18 15:07:40,446 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 15:07:40,446 INFO L93 Difference]: Finished difference Result 653 states and 868 transitions. [2018-11-18 15:07:40,447 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-11-18 15:07:40,447 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 72 [2018-11-18 15:07:40,447 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 15:07:40,450 INFO L225 Difference]: With dead ends: 653 [2018-11-18 15:07:40,450 INFO L226 Difference]: Without dead ends: 438 [2018-11-18 15:07:40,451 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=24, Invalid=48, Unknown=0, NotChecked=0, Total=72 [2018-11-18 15:07:40,452 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 438 states. [2018-11-18 15:07:40,489 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 438 to 372. [2018-11-18 15:07:40,490 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 372 states. [2018-11-18 15:07:40,492 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 372 states to 372 states and 488 transitions. [2018-11-18 15:07:40,493 INFO L78 Accepts]: Start accepts. Automaton has 372 states and 488 transitions. Word has length 72 [2018-11-18 15:07:40,493 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 15:07:40,493 INFO L480 AbstractCegarLoop]: Abstraction has 372 states and 488 transitions. [2018-11-18 15:07:40,493 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-18 15:07:40,493 INFO L276 IsEmpty]: Start isEmpty. Operand 372 states and 488 transitions. [2018-11-18 15:07:40,496 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2018-11-18 15:07:40,496 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 15:07:40,497 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 15:07:40,497 INFO L423 AbstractCegarLoop]: === Iteration 3 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 15:07:40,497 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 15:07:40,498 INFO L82 PathProgramCache]: Analyzing trace with hash -848378394, now seen corresponding path program 1 times [2018-11-18 15:07:40,498 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-18 15:07:40,498 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-18 15:07:40,499 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 15:07:40,499 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 15:07:40,499 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 15:07:40,513 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 15:07:40,566 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 15:07:40,567 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 15:07:40,567 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-18 15:07:40,567 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-18 15:07:40,567 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-18 15:07:40,567 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-11-18 15:07:40,568 INFO L87 Difference]: Start difference. First operand 372 states and 488 transitions. Second operand 6 states. [2018-11-18 15:07:40,614 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 15:07:40,614 INFO L93 Difference]: Finished difference Result 711 states and 934 transitions. [2018-11-18 15:07:40,616 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-11-18 15:07:40,616 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 72 [2018-11-18 15:07:40,617 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 15:07:40,619 INFO L225 Difference]: With dead ends: 711 [2018-11-18 15:07:40,619 INFO L226 Difference]: Without dead ends: 382 [2018-11-18 15:07:40,620 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-11-18 15:07:40,621 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 382 states. [2018-11-18 15:07:40,639 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 382 to 377. [2018-11-18 15:07:40,640 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 377 states. [2018-11-18 15:07:40,641 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 377 states to 377 states and 491 transitions. [2018-11-18 15:07:40,642 INFO L78 Accepts]: Start accepts. Automaton has 377 states and 491 transitions. Word has length 72 [2018-11-18 15:07:40,642 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 15:07:40,642 INFO L480 AbstractCegarLoop]: Abstraction has 377 states and 491 transitions. [2018-11-18 15:07:40,642 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-18 15:07:40,642 INFO L276 IsEmpty]: Start isEmpty. Operand 377 states and 491 transitions. [2018-11-18 15:07:40,644 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2018-11-18 15:07:40,644 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 15:07:40,644 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 15:07:40,644 INFO L423 AbstractCegarLoop]: === Iteration 4 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 15:07:40,645 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 15:07:40,645 INFO L82 PathProgramCache]: Analyzing trace with hash -1242745180, now seen corresponding path program 1 times [2018-11-18 15:07:40,645 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-18 15:07:40,645 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-18 15:07:40,646 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 15:07:40,646 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 15:07:40,646 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 15:07:40,658 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 15:07:40,722 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 15:07:40,722 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 15:07:40,722 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 15:07:40,723 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 15:07:40,723 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 15:07:40,723 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 15:07:40,723 INFO L87 Difference]: Start difference. First operand 377 states and 491 transitions. Second operand 4 states. [2018-11-18 15:07:40,838 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 15:07:40,839 INFO L93 Difference]: Finished difference Result 1030 states and 1358 transitions. [2018-11-18 15:07:40,839 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 15:07:40,839 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 72 [2018-11-18 15:07:40,839 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 15:07:40,842 INFO L225 Difference]: With dead ends: 1030 [2018-11-18 15:07:40,842 INFO L226 Difference]: Without dead ends: 696 [2018-11-18 15:07:40,843 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 15:07:40,844 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 696 states. [2018-11-18 15:07:40,870 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 696 to 673. [2018-11-18 15:07:40,870 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 673 states. [2018-11-18 15:07:40,873 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 673 states to 673 states and 856 transitions. [2018-11-18 15:07:40,873 INFO L78 Accepts]: Start accepts. Automaton has 673 states and 856 transitions. Word has length 72 [2018-11-18 15:07:40,873 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 15:07:40,874 INFO L480 AbstractCegarLoop]: Abstraction has 673 states and 856 transitions. [2018-11-18 15:07:40,874 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 15:07:40,874 INFO L276 IsEmpty]: Start isEmpty. Operand 673 states and 856 transitions. [2018-11-18 15:07:40,875 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2018-11-18 15:07:40,875 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 15:07:40,875 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 15:07:40,875 INFO L423 AbstractCegarLoop]: === Iteration 5 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 15:07:40,877 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 15:07:40,877 INFO L82 PathProgramCache]: Analyzing trace with hash 1475664357, now seen corresponding path program 1 times [2018-11-18 15:07:40,877 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-18 15:07:40,877 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-18 15:07:40,878 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 15:07:40,878 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 15:07:40,878 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 15:07:40,890 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 15:07:40,931 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 15:07:40,931 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 15:07:40,931 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-18 15:07:40,932 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-18 15:07:40,932 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-18 15:07:40,932 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-11-18 15:07:40,932 INFO L87 Difference]: Start difference. First operand 673 states and 856 transitions. Second operand 6 states. [2018-11-18 15:07:40,992 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 15:07:40,992 INFO L93 Difference]: Finished difference Result 1324 states and 1683 transitions. [2018-11-18 15:07:40,993 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-11-18 15:07:40,993 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 72 [2018-11-18 15:07:40,993 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 15:07:40,996 INFO L225 Difference]: With dead ends: 1324 [2018-11-18 15:07:40,996 INFO L226 Difference]: Without dead ends: 694 [2018-11-18 15:07:40,998 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-11-18 15:07:40,999 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 694 states. [2018-11-18 15:07:41,029 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 694 to 688. [2018-11-18 15:07:41,029 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 688 states. [2018-11-18 15:07:41,032 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 688 states to 688 states and 868 transitions. [2018-11-18 15:07:41,033 INFO L78 Accepts]: Start accepts. Automaton has 688 states and 868 transitions. Word has length 72 [2018-11-18 15:07:41,033 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 15:07:41,033 INFO L480 AbstractCegarLoop]: Abstraction has 688 states and 868 transitions. [2018-11-18 15:07:41,033 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-18 15:07:41,033 INFO L276 IsEmpty]: Start isEmpty. Operand 688 states and 868 transitions. [2018-11-18 15:07:41,034 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2018-11-18 15:07:41,034 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 15:07:41,034 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 15:07:41,035 INFO L423 AbstractCegarLoop]: === Iteration 6 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 15:07:41,035 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 15:07:41,035 INFO L82 PathProgramCache]: Analyzing trace with hash -896074905, now seen corresponding path program 1 times [2018-11-18 15:07:41,035 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-18 15:07:41,035 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-18 15:07:41,036 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 15:07:41,036 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 15:07:41,036 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 15:07:41,046 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 15:07:41,102 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 15:07:41,102 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 15:07:41,102 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-18 15:07:41,103 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-18 15:07:41,103 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-18 15:07:41,103 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-11-18 15:07:41,103 INFO L87 Difference]: Start difference. First operand 688 states and 868 transitions. Second operand 6 states. [2018-11-18 15:07:41,718 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 15:07:41,718 INFO L93 Difference]: Finished difference Result 1403 states and 1758 transitions. [2018-11-18 15:07:41,720 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-11-18 15:07:41,720 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 72 [2018-11-18 15:07:41,720 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 15:07:41,724 INFO L225 Difference]: With dead ends: 1403 [2018-11-18 15:07:41,724 INFO L226 Difference]: Without dead ends: 856 [2018-11-18 15:07:41,726 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 11 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=60, Unknown=0, NotChecked=0, Total=90 [2018-11-18 15:07:41,726 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 856 states. [2018-11-18 15:07:41,761 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 856 to 704. [2018-11-18 15:07:41,762 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 704 states. [2018-11-18 15:07:41,764 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 704 states to 704 states and 877 transitions. [2018-11-18 15:07:41,765 INFO L78 Accepts]: Start accepts. Automaton has 704 states and 877 transitions. Word has length 72 [2018-11-18 15:07:41,765 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 15:07:41,765 INFO L480 AbstractCegarLoop]: Abstraction has 704 states and 877 transitions. [2018-11-18 15:07:41,765 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-18 15:07:41,766 INFO L276 IsEmpty]: Start isEmpty. Operand 704 states and 877 transitions. [2018-11-18 15:07:41,766 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2018-11-18 15:07:41,767 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 15:07:41,767 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 15:07:41,767 INFO L423 AbstractCegarLoop]: === Iteration 7 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 15:07:41,767 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 15:07:41,767 INFO L82 PathProgramCache]: Analyzing trace with hash -677220187, now seen corresponding path program 1 times [2018-11-18 15:07:41,767 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-18 15:07:41,767 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-18 15:07:41,768 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 15:07:41,768 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 15:07:41,768 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 15:07:41,784 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-18 15:07:41,796 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-18 15:07:41,823 INFO L442 BasicCegarLoop]: Counterexample might be feasible [2018-11-18 15:07:41,880 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 18.11 03:07:41 BoogieIcfgContainer [2018-11-18 15:07:41,880 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-11-18 15:07:41,880 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2018-11-18 15:07:41,881 INFO L271 PluginConnector]: Initializing Witness Printer... [2018-11-18 15:07:41,881 INFO L276 PluginConnector]: Witness Printer initialized [2018-11-18 15:07:41,881 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 18.11 03:07:39" (3/4) ... [2018-11-18 15:07:41,883 INFO L138 WitnessPrinter]: Generating witness for reachability counterexample [2018-11-18 15:07:41,953 INFO L145 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/working_dir_a9cf40c1-37e2-43e0-bb08-11a224bf7cbc/bin-2019/uautomizer/witness.graphml [2018-11-18 15:07:41,953 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2018-11-18 15:07:41,954 INFO L168 Benchmark]: Toolchain (without parser) took 3590.71 ms. Allocated memory was 1.0 GB in the beginning and 1.3 GB in the end (delta: 240.6 MB). Free memory was 959.2 MB in the beginning and 892.4 MB in the end (delta: 66.8 MB). Peak memory consumption was 307.5 MB. Max. memory is 11.5 GB. [2018-11-18 15:07:41,955 INFO L168 Benchmark]: CDTParser took 0.15 ms. Allocated memory is still 1.0 GB. Free memory is still 985.5 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-11-18 15:07:41,955 INFO L168 Benchmark]: CACSL2BoogieTranslator took 209.32 ms. Allocated memory is still 1.0 GB. Free memory was 959.2 MB in the beginning and 943.1 MB in the end (delta: 16.1 MB). Peak memory consumption was 16.1 MB. Max. memory is 11.5 GB. [2018-11-18 15:07:41,956 INFO L168 Benchmark]: Boogie Preprocessor took 65.95 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 173.5 MB). Free memory was 943.1 MB in the beginning and 1.2 GB in the end (delta: -225.6 MB). Peak memory consumption was 14.2 MB. Max. memory is 11.5 GB. [2018-11-18 15:07:41,956 INFO L168 Benchmark]: RCFGBuilder took 370.21 ms. Allocated memory is still 1.2 GB. Free memory was 1.2 GB in the beginning and 1.1 GB in the end (delta: 40.4 MB). Peak memory consumption was 40.4 MB. Max. memory is 11.5 GB. [2018-11-18 15:07:41,956 INFO L168 Benchmark]: TraceAbstraction took 2869.37 ms. Allocated memory was 1.2 GB in the beginning and 1.3 GB in the end (delta: 67.1 MB). Free memory was 1.1 GB in the beginning and 902.6 MB in the end (delta: 225.6 MB). Peak memory consumption was 292.7 MB. Max. memory is 11.5 GB. [2018-11-18 15:07:41,956 INFO L168 Benchmark]: Witness Printer took 72.53 ms. Allocated memory is still 1.3 GB. Free memory was 902.6 MB in the beginning and 892.4 MB in the end (delta: 10.2 MB). Peak memory consumption was 10.2 MB. Max. memory is 11.5 GB. [2018-11-18 15:07:41,958 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.15 ms. Allocated memory is still 1.0 GB. Free memory is still 985.5 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 209.32 ms. Allocated memory is still 1.0 GB. Free memory was 959.2 MB in the beginning and 943.1 MB in the end (delta: 16.1 MB). Peak memory consumption was 16.1 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 65.95 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 173.5 MB). Free memory was 943.1 MB in the beginning and 1.2 GB in the end (delta: -225.6 MB). Peak memory consumption was 14.2 MB. Max. memory is 11.5 GB. * RCFGBuilder took 370.21 ms. Allocated memory is still 1.2 GB. Free memory was 1.2 GB in the beginning and 1.1 GB in the end (delta: 40.4 MB). Peak memory consumption was 40.4 MB. Max. memory is 11.5 GB. * TraceAbstraction took 2869.37 ms. Allocated memory was 1.2 GB in the beginning and 1.3 GB in the end (delta: 67.1 MB). Free memory was 1.1 GB in the beginning and 902.6 MB in the end (delta: 225.6 MB). Peak memory consumption was 292.7 MB. Max. memory is 11.5 GB. * Witness Printer took 72.53 ms. Allocated memory is still 1.3 GB. Free memory was 902.6 MB in the beginning and 892.4 MB in the end (delta: 10.2 MB). Peak memory consumption was 10.2 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 10]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L15] int q_buf_0 ; [L16] int q_free ; [L17] int q_read_ev ; [L18] int q_write_ev ; [L19] int q_req_up ; [L20] int q_ev ; [L41] int p_num_write ; [L42] int p_last_write ; [L43] int p_dw_st ; [L44] int p_dw_pc ; [L45] int p_dw_i ; [L46] int c_num_read ; [L47] int c_last_read ; [L48] int c_dr_st ; [L49] int c_dr_pc ; [L50] int c_dr_i ; [L154] static int a_t ; VAL [\old(a_t)=11, \old(c_dr_i)=3, \old(c_dr_pc)=13, \old(c_dr_st)=17, \old(c_last_read)=5, \old(c_num_read)=6, \old(p_dw_i)=4, \old(p_dw_pc)=15, \old(p_dw_st)=9, \old(p_last_write)=19, \old(p_num_write)=7, \old(q_buf_0)=10, \old(q_ev)=16, \old(q_free)=18, \old(q_read_ev)=14, \old(q_req_up)=12, \old(q_write_ev)=8, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0] [L456] int __retres1 ; VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=0, \old(q_read_ev)=0, \old(q_req_up)=0, \old(q_write_ev)=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0] [L460] CALL init_model() VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=0, \old(q_read_ev)=0, \old(q_req_up)=0, \old(q_write_ev)=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0] [L442] q_free = 1 [L443] q_write_ev = 2 [L444] q_read_ev = q_write_ev [L445] p_num_write = 0 [L446] p_dw_pc = 0 [L447] p_dw_i = 1 [L448] c_num_read = 0 [L449] c_dr_pc = 0 [L450] RET c_dr_i = 1 VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=0, \old(q_read_ev)=0, \old(q_req_up)=0, \old(q_write_ev)=0, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L460] init_model() VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=0, \old(q_read_ev)=0, \old(q_req_up)=0, \old(q_write_ev)=0, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L461] CALL start_simulation() VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L396] int kernel_st ; [L397] int tmp ; [L401] kernel_st = 0 VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, kernel_st=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L402] CALL update_channels() VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L212] COND FALSE, RET !((int )q_req_up == 1) VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L402] update_channels() VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, kernel_st=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L403] CALL init_threads() VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L227] COND TRUE (int )p_dw_i == 1 [L228] p_dw_st = 0 VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L232] COND TRUE (int )c_dr_i == 1 [L233] RET c_dr_st = 0 VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L403] init_threads() VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, kernel_st=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L404] CALL fire_delta_events() VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L265] COND FALSE !((int )q_read_ev == 0) VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L270] COND FALSE, RET !((int )q_write_ev == 0) VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L404] fire_delta_events() VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, kernel_st=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L405] CALL activate_threads() VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L298] int tmp ; [L299] int tmp___0 ; VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L303] CALL, EXPR is_do_write_p_triggered() VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L52] int __retres1 ; VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L55] COND FALSE !((int )p_dw_pc == 1) VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L65] __retres1 = 0 VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, __retres1=0, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L67] RET return (__retres1); VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, \result=0, __retres1=0, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L303] EXPR is_do_write_p_triggered() VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, is_do_write_p_triggered()=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L303] tmp = is_do_write_p_triggered() [L305] COND FALSE !(\read(tmp)) VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2, tmp=0] [L311] CALL, EXPR is_do_read_c_triggered() VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L71] int __retres1 ; VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L74] COND FALSE !((int )c_dr_pc == 1) VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L84] __retres1 = 0 VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, __retres1=0, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L86] RET return (__retres1); VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, \result=0, __retres1=0, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L311] EXPR is_do_read_c_triggered() VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, is_do_read_c_triggered()=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2, tmp=0] [L311] tmp___0 = is_do_read_c_triggered() [L313] COND FALSE, RET !(\read(tmp___0)) VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2, tmp=0, tmp___0=0] [L405] activate_threads() VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, kernel_st=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L406] CALL reset_delta_events() VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L283] COND FALSE !((int )q_read_ev == 1) VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L288] COND FALSE, RET !((int )q_write_ev == 1) VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L406] reset_delta_events() VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, kernel_st=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L409] COND TRUE 1 VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, kernel_st=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L412] kernel_st = 1 VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, kernel_st=1, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L413] CALL eval() VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L323] int tmp ; [L324] int tmp___0 ; [L325] int tmp___1 ; VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L329] COND TRUE 1 VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L332] CALL, EXPR exists_runnable_thread() VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L242] int __retres1 ; VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L245] COND TRUE (int )p_dw_st == 0 [L246] __retres1 = 1 VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, __retres1=1, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L258] RET return (__retres1); VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, \result=1, __retres1=1, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L332] EXPR exists_runnable_thread() VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, exists_runnable_thread()=1, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L332] tmp___1 = exists_runnable_thread() [L334] COND TRUE \read(tmp___1) VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2, tmp___1=1] [L339] COND TRUE (int )p_dw_st == 0 [L341] tmp = __VERIFIER_nondet_int() [L343] COND FALSE !(\read(tmp)) VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2, tmp=0, tmp___1=1] [L349] CALL error() VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] [L10] __VERIFIER_error() VAL [\old(a_t)=0, \old(c_dr_i)=0, \old(c_dr_pc)=0, \old(c_dr_st)=0, \old(c_last_read)=0, \old(c_num_read)=0, \old(p_dw_i)=0, \old(p_dw_pc)=0, \old(p_dw_st)=0, \old(p_last_write)=0, \old(p_num_write)=0, \old(q_buf_0)=0, \old(q_ev)=0, \old(q_free)=1, \old(q_read_ev)=2, \old(q_req_up)=0, \old(q_write_ev)=2, a_t=0, c_dr_i=1, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, p_dw_i=1, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=1, q_read_ev=2, q_req_up=0, q_write_ev=2] - StatisticsResult: Ultimate Automizer benchmark data CFG has 20 procedures, 144 locations, 1 error locations. UNSAFE Result, 2.8s OverallTime, 7 OverallIterations, 1 TraceHistogramMax, 1.8s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 1218 SDtfs, 1426 SDslu, 1972 SDs, 0 SdLazy, 1733 SolverSat, 408 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 1.2s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 63 GetRequests, 31 SyntacticMatches, 1 SemanticMatches, 31 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.2s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=704occurred in iteration=6, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 0.2s AutomataMinimizationTime, 6 MinimizatonAttempts, 273 StatesRemovedByMinimization, 6 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.0s SsaConstructionTime, 0.1s SatisfiabilityAnalysisTime, 0.3s InterpolantComputationTime, 504 NumberOfCodeBlocks, 504 NumberOfCodeBlocksAsserted, 7 NumberOfCheckSat, 426 ConstructedInterpolants, 0 QuantifiedInterpolants, 45724 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 6 InterpolantComputations, 6 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...