./Ultimate.py --spec ../../sv-benchmarks/c/ReachSafety.prp --file ../../sv-benchmarks/c/bitvector-loops/verisec_sendmail__tTflag_arr_one_loop_false-unreach-call_true-termination.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version 5842f4b8 Calling Ultimate with: java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/working_dir_25613ec6-6372-4c42-84f3-7cd4aa8f4d83/bin-2019/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/working_dir_25613ec6-6372-4c42-84f3-7cd4aa8f4d83/bin-2019/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/working_dir_25613ec6-6372-4c42-84f3-7cd4aa8f4d83/bin-2019/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/working_dir_25613ec6-6372-4c42-84f3-7cd4aa8f4d83/bin-2019/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/bitvector-loops/verisec_sendmail__tTflag_arr_one_loop_false-unreach-call_true-termination.i -s /tmp/vcloud-vcloud-master/worker/working_dir_25613ec6-6372-4c42-84f3-7cd4aa8f4d83/bin-2019/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/working_dir_25613ec6-6372-4c42-84f3-7cd4aa8f4d83/bin-2019/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash eda42c9201fdedd9f50669e53ef2af5b1d7cb675 ...................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.23-5842f4b [2018-11-18 14:33:49,355 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-11-18 14:33:49,356 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-11-18 14:33:49,363 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-11-18 14:33:49,364 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-11-18 14:33:49,364 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-11-18 14:33:49,365 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-11-18 14:33:49,366 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-11-18 14:33:49,367 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-11-18 14:33:49,368 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-11-18 14:33:49,368 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-11-18 14:33:49,368 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-11-18 14:33:49,369 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-11-18 14:33:49,370 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-11-18 14:33:49,370 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-11-18 14:33:49,371 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-11-18 14:33:49,371 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-11-18 14:33:49,373 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-11-18 14:33:49,374 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-11-18 14:33:49,375 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-11-18 14:33:49,376 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-11-18 14:33:49,376 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-11-18 14:33:49,378 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-11-18 14:33:49,378 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-11-18 14:33:49,378 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-11-18 14:33:49,379 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-11-18 14:33:49,380 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-11-18 14:33:49,380 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-11-18 14:33:49,381 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-11-18 14:33:49,381 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-11-18 14:33:49,381 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-11-18 14:33:49,382 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-11-18 14:33:49,382 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-11-18 14:33:49,382 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-11-18 14:33:49,383 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-11-18 14:33:49,383 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-11-18 14:33:49,383 INFO L98 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/working_dir_25613ec6-6372-4c42-84f3-7cd4aa8f4d83/bin-2019/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2018-11-18 14:33:49,393 INFO L110 SettingsManager]: Loading preferences was successful [2018-11-18 14:33:49,393 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-11-18 14:33:49,394 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-11-18 14:33:49,394 INFO L133 SettingsManager]: * to procedures, called more than once=true [2018-11-18 14:33:49,395 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-11-18 14:33:49,395 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-11-18 14:33:49,395 INFO L133 SettingsManager]: * Use SBE=true [2018-11-18 14:33:49,395 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-11-18 14:33:49,395 INFO L133 SettingsManager]: * sizeof long=4 [2018-11-18 14:33:49,395 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-11-18 14:33:49,396 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-11-18 14:33:49,396 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-11-18 14:33:49,396 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-11-18 14:33:49,396 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-11-18 14:33:49,396 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-11-18 14:33:49,396 INFO L133 SettingsManager]: * sizeof long double=12 [2018-11-18 14:33:49,396 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-11-18 14:33:49,396 INFO L133 SettingsManager]: * Use constant arrays=true [2018-11-18 14:33:49,396 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-11-18 14:33:49,397 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-11-18 14:33:49,397 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-11-18 14:33:49,397 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-11-18 14:33:49,397 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-11-18 14:33:49,397 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-18 14:33:49,397 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-11-18 14:33:49,397 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-11-18 14:33:49,397 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-11-18 14:33:49,398 INFO L133 SettingsManager]: * Trace refinement strategy=CAMEL [2018-11-18 14:33:49,398 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-11-18 14:33:49,398 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-11-18 14:33:49,398 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/working_dir_25613ec6-6372-4c42-84f3-7cd4aa8f4d83/bin-2019/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> eda42c9201fdedd9f50669e53ef2af5b1d7cb675 [2018-11-18 14:33:49,421 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-11-18 14:33:49,429 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-11-18 14:33:49,432 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-11-18 14:33:49,433 INFO L271 PluginConnector]: Initializing CDTParser... [2018-11-18 14:33:49,433 INFO L276 PluginConnector]: CDTParser initialized [2018-11-18 14:33:49,433 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/working_dir_25613ec6-6372-4c42-84f3-7cd4aa8f4d83/bin-2019/uautomizer/../../sv-benchmarks/c/bitvector-loops/verisec_sendmail__tTflag_arr_one_loop_false-unreach-call_true-termination.i [2018-11-18 14:33:49,478 INFO L221 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_25613ec6-6372-4c42-84f3-7cd4aa8f4d83/bin-2019/uautomizer/data/10ef9b924/0990eac50e6c4f11a135dad519847a8d/FLAG7485fdeee [2018-11-18 14:33:49,797 INFO L307 CDTParser]: Found 1 translation units. [2018-11-18 14:33:49,797 INFO L161 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/working_dir_25613ec6-6372-4c42-84f3-7cd4aa8f4d83/sv-benchmarks/c/bitvector-loops/verisec_sendmail__tTflag_arr_one_loop_false-unreach-call_true-termination.i [2018-11-18 14:33:49,800 INFO L355 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_25613ec6-6372-4c42-84f3-7cd4aa8f4d83/bin-2019/uautomizer/data/10ef9b924/0990eac50e6c4f11a135dad519847a8d/FLAG7485fdeee [2018-11-18 14:33:50,234 INFO L363 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/working_dir_25613ec6-6372-4c42-84f3-7cd4aa8f4d83/bin-2019/uautomizer/data/10ef9b924/0990eac50e6c4f11a135dad519847a8d [2018-11-18 14:33:50,236 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-11-18 14:33:50,237 INFO L131 ToolchainWalker]: Walking toolchain with 5 elements. [2018-11-18 14:33:50,238 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-11-18 14:33:50,238 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-11-18 14:33:50,241 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-11-18 14:33:50,241 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 18.11 02:33:50" (1/1) ... [2018-11-18 14:33:50,243 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@4d293ee9 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 02:33:50, skipping insertion in model container [2018-11-18 14:33:50,244 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 18.11 02:33:50" (1/1) ... [2018-11-18 14:33:50,251 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-11-18 14:33:50,264 INFO L176 MainTranslator]: Built tables and reachable declarations [2018-11-18 14:33:50,364 INFO L201 PostProcessor]: Analyzing one entry point: main [2018-11-18 14:33:50,366 INFO L191 MainTranslator]: Completed pre-run [2018-11-18 14:33:50,382 INFO L201 PostProcessor]: Analyzing one entry point: main [2018-11-18 14:33:50,392 INFO L195 MainTranslator]: Completed translation [2018-11-18 14:33:50,392 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 02:33:50 WrapperNode [2018-11-18 14:33:50,392 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-11-18 14:33:50,393 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-11-18 14:33:50,393 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-11-18 14:33:50,393 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-11-18 14:33:50,403 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 02:33:50" (1/1) ... [2018-11-18 14:33:50,404 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 02:33:50" (1/1) ... [2018-11-18 14:33:50,411 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 02:33:50" (1/1) ... [2018-11-18 14:33:50,411 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 02:33:50" (1/1) ... [2018-11-18 14:33:50,416 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 02:33:50" (1/1) ... [2018-11-18 14:33:50,420 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 02:33:50" (1/1) ... [2018-11-18 14:33:50,421 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 02:33:50" (1/1) ... [2018-11-18 14:33:50,422 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-11-18 14:33:50,422 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-11-18 14:33:50,422 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-11-18 14:33:50,422 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-11-18 14:33:50,423 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 02:33:50" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_25613ec6-6372-4c42-84f3-7cd4aa8f4d83/bin-2019/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-18 14:33:50,501 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-11-18 14:33:50,501 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-11-18 14:33:50,501 INFO L138 BoogieDeclarations]: Found implementation of procedure __VERIFIER_assert [2018-11-18 14:33:50,501 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2018-11-18 14:33:50,501 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_error [2018-11-18 14:33:50,501 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_char [2018-11-18 14:33:50,502 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_assert [2018-11-18 14:33:50,502 INFO L130 BoogieDeclarations]: Found specification of procedure main [2018-11-18 14:33:50,502 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-11-18 14:33:50,502 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2018-11-18 14:33:50,502 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2018-11-18 14:33:50,502 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-11-18 14:33:50,502 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-11-18 14:33:50,502 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-11-18 14:33:50,502 INFO L130 BoogieDeclarations]: Found specification of procedure write~unchecked~int [2018-11-18 14:33:50,641 INFO L278 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-11-18 14:33:50,641 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 18.11 02:33:50 BoogieIcfgContainer [2018-11-18 14:33:50,641 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-11-18 14:33:50,642 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-11-18 14:33:50,642 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-11-18 14:33:50,644 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-11-18 14:33:50,644 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 18.11 02:33:50" (1/3) ... [2018-11-18 14:33:50,644 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@3a8dd31c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 18.11 02:33:50, skipping insertion in model container [2018-11-18 14:33:50,645 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 02:33:50" (2/3) ... [2018-11-18 14:33:50,645 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@3a8dd31c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 18.11 02:33:50, skipping insertion in model container [2018-11-18 14:33:50,645 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 18.11 02:33:50" (3/3) ... [2018-11-18 14:33:50,646 INFO L112 eAbstractionObserver]: Analyzing ICFG verisec_sendmail__tTflag_arr_one_loop_false-unreach-call_true-termination.i [2018-11-18 14:33:50,653 INFO L136 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-11-18 14:33:50,659 INFO L148 ceAbstractionStarter]: Appying trace abstraction to program that has 1 error locations. [2018-11-18 14:33:50,671 INFO L257 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2018-11-18 14:33:50,698 INFO L133 ementStrategyFactory]: Using default assertion order modulation [2018-11-18 14:33:50,699 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-11-18 14:33:50,699 INFO L383 AbstractCegarLoop]: Hoare is true [2018-11-18 14:33:50,699 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-11-18 14:33:50,699 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-11-18 14:33:50,699 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-11-18 14:33:50,699 INFO L387 AbstractCegarLoop]: Difference is false [2018-11-18 14:33:50,700 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-11-18 14:33:50,700 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-11-18 14:33:50,714 INFO L276 IsEmpty]: Start isEmpty. Operand 24 states. [2018-11-18 14:33:50,718 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2018-11-18 14:33:50,719 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 14:33:50,719 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 14:33:50,721 INFO L423 AbstractCegarLoop]: === Iteration 1 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 14:33:50,726 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 14:33:50,726 INFO L82 PathProgramCache]: Analyzing trace with hash -900586403, now seen corresponding path program 1 times [2018-11-18 14:33:50,728 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-18 14:33:50,728 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-18 14:33:50,770 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 14:33:50,770 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 14:33:50,770 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 14:33:50,795 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 14:33:50,818 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 14:33:50,820 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 14:33:50,820 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-11-18 14:33:50,822 INFO L459 AbstractCegarLoop]: Interpolant automaton has 2 states [2018-11-18 14:33:50,830 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2018-11-18 14:33:50,830 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2018-11-18 14:33:50,832 INFO L87 Difference]: Start difference. First operand 24 states. Second operand 2 states. [2018-11-18 14:33:50,843 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 14:33:50,844 INFO L93 Difference]: Finished difference Result 39 states and 46 transitions. [2018-11-18 14:33:50,844 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2018-11-18 14:33:50,845 INFO L78 Accepts]: Start accepts. Automaton has 2 states. Word has length 13 [2018-11-18 14:33:50,845 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 14:33:50,849 INFO L225 Difference]: With dead ends: 39 [2018-11-18 14:33:50,849 INFO L226 Difference]: Without dead ends: 17 [2018-11-18 14:33:50,851 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 0 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2018-11-18 14:33:50,861 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17 states. [2018-11-18 14:33:50,870 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17 to 17. [2018-11-18 14:33:50,871 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17 states. [2018-11-18 14:33:50,871 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17 states to 17 states and 18 transitions. [2018-11-18 14:33:50,872 INFO L78 Accepts]: Start accepts. Automaton has 17 states and 18 transitions. Word has length 13 [2018-11-18 14:33:50,873 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 14:33:50,873 INFO L480 AbstractCegarLoop]: Abstraction has 17 states and 18 transitions. [2018-11-18 14:33:50,873 INFO L481 AbstractCegarLoop]: Interpolant automaton has 2 states. [2018-11-18 14:33:50,873 INFO L276 IsEmpty]: Start isEmpty. Operand 17 states and 18 transitions. [2018-11-18 14:33:50,873 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2018-11-18 14:33:50,873 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 14:33:50,874 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 14:33:50,874 INFO L423 AbstractCegarLoop]: === Iteration 2 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 14:33:50,874 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 14:33:50,874 INFO L82 PathProgramCache]: Analyzing trace with hash 1574784468, now seen corresponding path program 1 times [2018-11-18 14:33:50,874 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-18 14:33:50,875 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-18 14:33:50,875 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 14:33:50,876 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 14:33:50,876 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 14:33:50,888 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 14:33:50,931 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 14:33:50,931 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 14:33:50,931 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-18 14:33:50,932 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-18 14:33:50,933 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-18 14:33:50,933 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-18 14:33:50,933 INFO L87 Difference]: Start difference. First operand 17 states and 18 transitions. Second operand 3 states. [2018-11-18 14:33:50,966 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 14:33:50,966 INFO L93 Difference]: Finished difference Result 31 states and 34 transitions. [2018-11-18 14:33:50,967 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-18 14:33:50,967 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 15 [2018-11-18 14:33:50,967 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 14:33:50,968 INFO L225 Difference]: With dead ends: 31 [2018-11-18 14:33:50,968 INFO L226 Difference]: Without dead ends: 23 [2018-11-18 14:33:50,969 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-18 14:33:50,969 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23 states. [2018-11-18 14:33:50,971 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23 to 19. [2018-11-18 14:33:50,971 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19 states. [2018-11-18 14:33:50,972 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19 states to 19 states and 20 transitions. [2018-11-18 14:33:50,972 INFO L78 Accepts]: Start accepts. Automaton has 19 states and 20 transitions. Word has length 15 [2018-11-18 14:33:50,972 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 14:33:50,972 INFO L480 AbstractCegarLoop]: Abstraction has 19 states and 20 transitions. [2018-11-18 14:33:50,972 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-18 14:33:50,972 INFO L276 IsEmpty]: Start isEmpty. Operand 19 states and 20 transitions. [2018-11-18 14:33:50,973 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2018-11-18 14:33:50,973 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 14:33:50,973 INFO L375 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 14:33:50,973 INFO L423 AbstractCegarLoop]: === Iteration 3 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 14:33:50,973 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 14:33:50,973 INFO L82 PathProgramCache]: Analyzing trace with hash -1822958319, now seen corresponding path program 1 times [2018-11-18 14:33:50,974 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-18 14:33:50,974 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-18 14:33:50,974 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 14:33:50,975 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 14:33:50,975 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 14:33:50,988 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 14:33:51,014 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 14:33:51,014 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 14:33:51,015 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_25613ec6-6372-4c42-84f3-7cd4aa8f4d83/bin-2019/uautomizer/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-18 14:33:51,021 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 14:33:51,037 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 14:33:51,042 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 14:33:51,057 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 14:33:51,071 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-18 14:33:51,072 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4] total 5 [2018-11-18 14:33:51,072 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-18 14:33:51,072 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-18 14:33:51,072 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2018-11-18 14:33:51,072 INFO L87 Difference]: Start difference. First operand 19 states and 20 transitions. Second operand 5 states. [2018-11-18 14:33:51,098 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 14:33:51,098 INFO L93 Difference]: Finished difference Result 34 states and 37 transitions. [2018-11-18 14:33:51,099 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 14:33:51,099 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 18 [2018-11-18 14:33:51,099 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 14:33:51,100 INFO L225 Difference]: With dead ends: 34 [2018-11-18 14:33:51,100 INFO L226 Difference]: Without dead ends: 26 [2018-11-18 14:33:51,100 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 21 GetRequests, 18 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2018-11-18 14:33:51,100 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26 states. [2018-11-18 14:33:51,102 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26 to 22. [2018-11-18 14:33:51,102 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22 states. [2018-11-18 14:33:51,102 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22 states to 22 states and 23 transitions. [2018-11-18 14:33:51,102 INFO L78 Accepts]: Start accepts. Automaton has 22 states and 23 transitions. Word has length 18 [2018-11-18 14:33:51,102 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 14:33:51,102 INFO L480 AbstractCegarLoop]: Abstraction has 22 states and 23 transitions. [2018-11-18 14:33:51,102 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-18 14:33:51,103 INFO L276 IsEmpty]: Start isEmpty. Operand 22 states and 23 transitions. [2018-11-18 14:33:51,103 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2018-11-18 14:33:51,103 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 14:33:51,103 INFO L375 BasicCegarLoop]: trace histogram [3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 14:33:51,103 INFO L423 AbstractCegarLoop]: === Iteration 4 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 14:33:51,103 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 14:33:51,103 INFO L82 PathProgramCache]: Analyzing trace with hash -189093708, now seen corresponding path program 2 times [2018-11-18 14:33:51,103 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-18 14:33:51,103 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-18 14:33:51,104 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 14:33:51,104 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 14:33:51,104 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 14:33:51,114 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 14:33:51,172 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 14:33:51,172 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 14:33:51,172 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_25613ec6-6372-4c42-84f3-7cd4aa8f4d83/bin-2019/uautomizer/z3 Starting monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-18 14:33:51,181 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-11-18 14:33:51,194 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2018-11-18 14:33:51,194 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-18 14:33:51,195 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 14:33:51,240 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2018-11-18 14:33:51,263 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-11-18 14:33:51,263 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [5] total 8 [2018-11-18 14:33:51,263 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-11-18 14:33:51,264 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-11-18 14:33:51,264 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2018-11-18 14:33:51,264 INFO L87 Difference]: Start difference. First operand 22 states and 23 transitions. Second operand 8 states. [2018-11-18 14:33:51,315 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 14:33:51,315 INFO L93 Difference]: Finished difference Result 42 states and 46 transitions. [2018-11-18 14:33:51,316 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-11-18 14:33:51,316 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 21 [2018-11-18 14:33:51,316 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 14:33:51,316 INFO L225 Difference]: With dead ends: 42 [2018-11-18 14:33:51,316 INFO L226 Difference]: Without dead ends: 30 [2018-11-18 14:33:51,317 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 28 GetRequests, 19 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=33, Invalid=77, Unknown=0, NotChecked=0, Total=110 [2018-11-18 14:33:51,317 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30 states. [2018-11-18 14:33:51,319 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30 to 29. [2018-11-18 14:33:51,319 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 29 states. [2018-11-18 14:33:51,320 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29 states to 29 states and 30 transitions. [2018-11-18 14:33:51,320 INFO L78 Accepts]: Start accepts. Automaton has 29 states and 30 transitions. Word has length 21 [2018-11-18 14:33:51,320 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 14:33:51,320 INFO L480 AbstractCegarLoop]: Abstraction has 29 states and 30 transitions. [2018-11-18 14:33:51,320 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-11-18 14:33:51,320 INFO L276 IsEmpty]: Start isEmpty. Operand 29 states and 30 transitions. [2018-11-18 14:33:51,321 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2018-11-18 14:33:51,321 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 14:33:51,321 INFO L375 BasicCegarLoop]: trace histogram [4, 3, 3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 14:33:51,321 INFO L423 AbstractCegarLoop]: === Iteration 5 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 14:33:51,321 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 14:33:51,321 INFO L82 PathProgramCache]: Analyzing trace with hash -301773635, now seen corresponding path program 1 times [2018-11-18 14:33:51,322 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-18 14:33:51,322 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-18 14:33:51,322 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 14:33:51,322 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-18 14:33:51,322 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 14:33:51,336 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 14:33:51,368 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-11-18 14:33:51,368 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 14:33:51,368 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_25613ec6-6372-4c42-84f3-7cd4aa8f4d83/bin-2019/uautomizer/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-18 14:33:51,381 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 14:33:51,397 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 14:33:51,399 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 14:33:51,415 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-11-18 14:33:51,430 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-18 14:33:51,430 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6] total 7 [2018-11-18 14:33:51,430 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-11-18 14:33:51,430 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-11-18 14:33:51,431 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=21, Unknown=0, NotChecked=0, Total=42 [2018-11-18 14:33:51,431 INFO L87 Difference]: Start difference. First operand 29 states and 30 transitions. Second operand 7 states. [2018-11-18 14:33:51,451 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 14:33:51,451 INFO L93 Difference]: Finished difference Result 45 states and 47 transitions. [2018-11-18 14:33:51,451 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-11-18 14:33:51,451 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 28 [2018-11-18 14:33:51,451 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 14:33:51,452 INFO L225 Difference]: With dead ends: 45 [2018-11-18 14:33:51,452 INFO L226 Difference]: Without dead ends: 33 [2018-11-18 14:33:51,452 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 33 GetRequests, 28 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=21, Unknown=0, NotChecked=0, Total=42 [2018-11-18 14:33:51,452 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 33 states. [2018-11-18 14:33:51,454 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 33 to 32. [2018-11-18 14:33:51,454 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 32 states. [2018-11-18 14:33:51,454 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 32 states to 32 states and 33 transitions. [2018-11-18 14:33:51,455 INFO L78 Accepts]: Start accepts. Automaton has 32 states and 33 transitions. Word has length 28 [2018-11-18 14:33:51,455 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 14:33:51,455 INFO L480 AbstractCegarLoop]: Abstraction has 32 states and 33 transitions. [2018-11-18 14:33:51,455 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-11-18 14:33:51,455 INFO L276 IsEmpty]: Start isEmpty. Operand 32 states and 33 transitions. [2018-11-18 14:33:51,455 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2018-11-18 14:33:51,456 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 14:33:51,456 INFO L375 BasicCegarLoop]: trace histogram [5, 4, 4, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 14:33:51,456 INFO L423 AbstractCegarLoop]: === Iteration 6 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 14:33:51,456 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 14:33:51,456 INFO L82 PathProgramCache]: Analyzing trace with hash -1539168096, now seen corresponding path program 2 times [2018-11-18 14:33:51,456 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-18 14:33:51,456 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-18 14:33:51,457 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 14:33:51,457 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 14:33:51,457 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 14:33:51,469 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 14:33:51,500 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-11-18 14:33:51,500 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 14:33:51,500 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_25613ec6-6372-4c42-84f3-7cd4aa8f4d83/bin-2019/uautomizer/z3 Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-18 14:33:51,514 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-11-18 14:33:51,536 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-11-18 14:33:51,536 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-18 14:33:51,538 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 14:33:51,548 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-11-18 14:33:51,572 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-18 14:33:51,572 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 8 [2018-11-18 14:33:51,573 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-11-18 14:33:51,573 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-11-18 14:33:51,573 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=28, Invalid=28, Unknown=0, NotChecked=0, Total=56 [2018-11-18 14:33:51,573 INFO L87 Difference]: Start difference. First operand 32 states and 33 transitions. Second operand 8 states. [2018-11-18 14:33:51,607 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 14:33:51,608 INFO L93 Difference]: Finished difference Result 48 states and 50 transitions. [2018-11-18 14:33:51,609 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-18 14:33:51,609 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 31 [2018-11-18 14:33:51,610 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 14:33:51,610 INFO L225 Difference]: With dead ends: 48 [2018-11-18 14:33:51,611 INFO L226 Difference]: Without dead ends: 36 [2018-11-18 14:33:51,612 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 37 GetRequests, 31 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=28, Invalid=28, Unknown=0, NotChecked=0, Total=56 [2018-11-18 14:33:51,612 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 36 states. [2018-11-18 14:33:51,616 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 36 to 35. [2018-11-18 14:33:51,616 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 35 states. [2018-11-18 14:33:51,616 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 35 states to 35 states and 36 transitions. [2018-11-18 14:33:51,616 INFO L78 Accepts]: Start accepts. Automaton has 35 states and 36 transitions. Word has length 31 [2018-11-18 14:33:51,617 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 14:33:51,617 INFO L480 AbstractCegarLoop]: Abstraction has 35 states and 36 transitions. [2018-11-18 14:33:51,617 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-11-18 14:33:51,617 INFO L276 IsEmpty]: Start isEmpty. Operand 35 states and 36 transitions. [2018-11-18 14:33:51,617 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-11-18 14:33:51,618 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 14:33:51,618 INFO L375 BasicCegarLoop]: trace histogram [6, 5, 5, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 14:33:51,618 INFO L423 AbstractCegarLoop]: === Iteration 7 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 14:33:51,618 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 14:33:51,618 INFO L82 PathProgramCache]: Analyzing trace with hash -1053254179, now seen corresponding path program 3 times [2018-11-18 14:33:51,618 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-18 14:33:51,619 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-18 14:33:51,619 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 14:33:51,619 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-18 14:33:51,620 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 14:33:51,633 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 14:33:51,691 INFO L134 CoverageAnalysis]: Checked inductivity of 46 backedges. 0 proven. 40 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-11-18 14:33:51,691 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 14:33:51,691 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_25613ec6-6372-4c42-84f3-7cd4aa8f4d83/bin-2019/uautomizer/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-18 14:33:51,704 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-11-18 14:33:51,726 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 3 check-sat command(s) [2018-11-18 14:33:51,726 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-18 14:33:51,729 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 14:33:51,912 INFO L134 CoverageAnalysis]: Checked inductivity of 46 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2018-11-18 14:33:51,941 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-18 14:33:51,941 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 7] total 12 [2018-11-18 14:33:51,941 INFO L459 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-11-18 14:33:51,941 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-11-18 14:33:51,942 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=39, Invalid=93, Unknown=0, NotChecked=0, Total=132 [2018-11-18 14:33:51,942 INFO L87 Difference]: Start difference. First operand 35 states and 36 transitions. Second operand 12 states. [2018-11-18 14:33:52,147 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 14:33:52,147 INFO L93 Difference]: Finished difference Result 59 states and 63 transitions. [2018-11-18 14:33:52,147 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-11-18 14:33:52,147 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 34 [2018-11-18 14:33:52,148 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 14:33:52,148 INFO L225 Difference]: With dead ends: 59 [2018-11-18 14:33:52,148 INFO L226 Difference]: Without dead ends: 44 [2018-11-18 14:33:52,148 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 47 GetRequests, 31 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 37 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=93, Invalid=213, Unknown=0, NotChecked=0, Total=306 [2018-11-18 14:33:52,149 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 44 states. [2018-11-18 14:33:52,152 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 44 to 43. [2018-11-18 14:33:52,152 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 43 states. [2018-11-18 14:33:52,152 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 43 states to 43 states and 44 transitions. [2018-11-18 14:33:52,153 INFO L78 Accepts]: Start accepts. Automaton has 43 states and 44 transitions. Word has length 34 [2018-11-18 14:33:52,153 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 14:33:52,153 INFO L480 AbstractCegarLoop]: Abstraction has 43 states and 44 transitions. [2018-11-18 14:33:52,153 INFO L481 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-11-18 14:33:52,153 INFO L276 IsEmpty]: Start isEmpty. Operand 43 states and 44 transitions. [2018-11-18 14:33:52,154 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-11-18 14:33:52,154 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 14:33:52,154 INFO L375 BasicCegarLoop]: trace histogram [8, 7, 7, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 14:33:52,155 INFO L423 AbstractCegarLoop]: === Iteration 8 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 14:33:52,155 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 14:33:52,155 INFO L82 PathProgramCache]: Analyzing trace with hash -1930025981, now seen corresponding path program 4 times [2018-11-18 14:33:52,155 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-18 14:33:52,155 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-18 14:33:52,156 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 14:33:52,156 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-18 14:33:52,156 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 14:33:52,170 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 14:33:52,248 INFO L134 CoverageAnalysis]: Checked inductivity of 89 backedges. 0 proven. 77 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-11-18 14:33:52,248 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 14:33:52,248 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_25613ec6-6372-4c42-84f3-7cd4aa8f4d83/bin-2019/uautomizer/z3 Starting monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-18 14:33:52,260 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-11-18 14:33:52,280 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-11-18 14:33:52,280 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-18 14:33:52,282 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 14:33:52,305 INFO L134 CoverageAnalysis]: Checked inductivity of 89 backedges. 0 proven. 77 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-11-18 14:33:52,320 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-18 14:33:52,320 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10] total 11 [2018-11-18 14:33:52,321 INFO L459 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-11-18 14:33:52,321 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-11-18 14:33:52,321 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=55, Invalid=55, Unknown=0, NotChecked=0, Total=110 [2018-11-18 14:33:52,321 INFO L87 Difference]: Start difference. First operand 43 states and 44 transitions. Second operand 11 states. [2018-11-18 14:33:52,368 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 14:33:52,368 INFO L93 Difference]: Finished difference Result 61 states and 63 transitions. [2018-11-18 14:33:52,369 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-11-18 14:33:52,369 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 42 [2018-11-18 14:33:52,369 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 14:33:52,370 INFO L225 Difference]: With dead ends: 61 [2018-11-18 14:33:52,370 INFO L226 Difference]: Without dead ends: 47 [2018-11-18 14:33:52,370 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 51 GetRequests, 42 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 12 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=55, Invalid=55, Unknown=0, NotChecked=0, Total=110 [2018-11-18 14:33:52,371 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 47 states. [2018-11-18 14:33:52,375 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 47 to 46. [2018-11-18 14:33:52,375 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 46 states. [2018-11-18 14:33:52,376 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 46 states to 46 states and 47 transitions. [2018-11-18 14:33:52,376 INFO L78 Accepts]: Start accepts. Automaton has 46 states and 47 transitions. Word has length 42 [2018-11-18 14:33:52,376 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 14:33:52,376 INFO L480 AbstractCegarLoop]: Abstraction has 46 states and 47 transitions. [2018-11-18 14:33:52,376 INFO L481 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-11-18 14:33:52,377 INFO L276 IsEmpty]: Start isEmpty. Operand 46 states and 47 transitions. [2018-11-18 14:33:52,377 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 46 [2018-11-18 14:33:52,377 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 14:33:52,377 INFO L375 BasicCegarLoop]: trace histogram [9, 8, 8, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 14:33:52,378 INFO L423 AbstractCegarLoop]: === Iteration 9 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 14:33:52,378 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 14:33:52,378 INFO L82 PathProgramCache]: Analyzing trace with hash -534186330, now seen corresponding path program 5 times [2018-11-18 14:33:52,378 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-18 14:33:52,378 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-18 14:33:52,379 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 14:33:52,379 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-18 14:33:52,379 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 14:33:52,391 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 14:33:52,463 INFO L134 CoverageAnalysis]: Checked inductivity of 112 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-11-18 14:33:52,464 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 14:33:52,464 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_25613ec6-6372-4c42-84f3-7cd4aa8f4d83/bin-2019/uautomizer/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-18 14:33:52,470 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-11-18 14:33:52,500 INFO L249 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 9 check-sat command(s) [2018-11-18 14:33:52,500 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-18 14:33:52,502 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 14:33:52,528 INFO L134 CoverageAnalysis]: Checked inductivity of 112 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-11-18 14:33:52,543 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-18 14:33:52,543 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11] total 12 [2018-11-18 14:33:52,544 INFO L459 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-11-18 14:33:52,544 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-11-18 14:33:52,544 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=66, Invalid=66, Unknown=0, NotChecked=0, Total=132 [2018-11-18 14:33:52,544 INFO L87 Difference]: Start difference. First operand 46 states and 47 transitions. Second operand 12 states. [2018-11-18 14:33:52,577 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 14:33:52,577 INFO L93 Difference]: Finished difference Result 64 states and 66 transitions. [2018-11-18 14:33:52,577 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-11-18 14:33:52,577 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 45 [2018-11-18 14:33:52,577 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 14:33:52,578 INFO L225 Difference]: With dead ends: 64 [2018-11-18 14:33:52,578 INFO L226 Difference]: Without dead ends: 50 [2018-11-18 14:33:52,578 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 55 GetRequests, 45 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=66, Invalid=66, Unknown=0, NotChecked=0, Total=132 [2018-11-18 14:33:52,578 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 50 states. [2018-11-18 14:33:52,582 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 50 to 49. [2018-11-18 14:33:52,582 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 49 states. [2018-11-18 14:33:52,582 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 49 states to 49 states and 50 transitions. [2018-11-18 14:33:52,582 INFO L78 Accepts]: Start accepts. Automaton has 49 states and 50 transitions. Word has length 45 [2018-11-18 14:33:52,582 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 14:33:52,583 INFO L480 AbstractCegarLoop]: Abstraction has 49 states and 50 transitions. [2018-11-18 14:33:52,583 INFO L481 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-11-18 14:33:52,583 INFO L276 IsEmpty]: Start isEmpty. Operand 49 states and 50 transitions. [2018-11-18 14:33:52,583 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2018-11-18 14:33:52,583 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 14:33:52,583 INFO L375 BasicCegarLoop]: trace histogram [10, 9, 9, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 14:33:52,584 INFO L423 AbstractCegarLoop]: === Iteration 10 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 14:33:52,584 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 14:33:52,584 INFO L82 PathProgramCache]: Analyzing trace with hash -948503261, now seen corresponding path program 6 times [2018-11-18 14:33:52,584 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-18 14:33:52,584 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-18 14:33:52,585 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 14:33:52,585 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-18 14:33:52,585 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 14:33:52,596 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 14:33:52,677 INFO L134 CoverageAnalysis]: Checked inductivity of 138 backedges. 0 proven. 126 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-11-18 14:33:52,677 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 14:33:52,677 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_25613ec6-6372-4c42-84f3-7cd4aa8f4d83/bin-2019/uautomizer/z3 Starting monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-18 14:33:52,688 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-11-18 14:33:52,750 INFO L249 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 7 check-sat command(s) [2018-11-18 14:33:52,750 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-18 14:33:52,752 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 14:33:53,543 WARN L180 SmtUtils]: Spent 512.00 ms on a formula simplification. DAG size of input: 42 DAG size of output: 26 [2018-11-18 14:33:54,900 INFO L134 CoverageAnalysis]: Checked inductivity of 138 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 126 trivial. 0 not checked. [2018-11-18 14:33:54,915 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-18 14:33:54,915 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 8] total 17 [2018-11-18 14:33:54,915 INFO L459 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-11-18 14:33:54,915 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-11-18 14:33:54,915 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=83, Invalid=189, Unknown=0, NotChecked=0, Total=272 [2018-11-18 14:33:54,915 INFO L87 Difference]: Start difference. First operand 49 states and 50 transitions. Second operand 17 states. [2018-11-18 14:33:56,795 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 14:33:56,795 INFO L93 Difference]: Finished difference Result 75 states and 79 transitions. [2018-11-18 14:33:56,796 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-11-18 14:33:56,796 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 48 [2018-11-18 14:33:56,796 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 14:33:56,796 INFO L225 Difference]: With dead ends: 75 [2018-11-18 14:33:56,796 INFO L226 Difference]: Without dead ends: 58 [2018-11-18 14:33:56,797 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 68 GetRequests, 44 SyntacticMatches, 0 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 89 ImplicationChecksByTransitivity, 2.3s TimeCoverageRelationStatistics Valid=207, Invalid=443, Unknown=0, NotChecked=0, Total=650 [2018-11-18 14:33:56,797 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 58 states. [2018-11-18 14:33:56,802 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 58 to 54. [2018-11-18 14:33:56,803 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 54 states. [2018-11-18 14:33:56,803 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 54 states to 54 states and 55 transitions. [2018-11-18 14:33:56,803 INFO L78 Accepts]: Start accepts. Automaton has 54 states and 55 transitions. Word has length 48 [2018-11-18 14:33:56,803 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 14:33:56,804 INFO L480 AbstractCegarLoop]: Abstraction has 54 states and 55 transitions. [2018-11-18 14:33:56,804 INFO L481 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-11-18 14:33:56,804 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 55 transitions. [2018-11-18 14:33:56,804 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2018-11-18 14:33:56,804 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 14:33:56,804 INFO L375 BasicCegarLoop]: trace histogram [11, 10, 10, 5, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 14:33:56,805 INFO L423 AbstractCegarLoop]: === Iteration 11 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 14:33:56,805 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 14:33:56,805 INFO L82 PathProgramCache]: Analyzing trace with hash -1962207156, now seen corresponding path program 7 times [2018-11-18 14:33:56,805 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-18 14:33:56,805 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-18 14:33:56,808 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 14:33:56,808 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-18 14:33:56,808 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 14:33:56,820 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 14:33:56,880 INFO L134 CoverageAnalysis]: Checked inductivity of 175 backedges. 0 proven. 155 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2018-11-18 14:33:56,880 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 14:33:56,880 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_25613ec6-6372-4c42-84f3-7cd4aa8f4d83/bin-2019/uautomizer/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-18 14:33:56,888 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 14:33:56,903 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 14:33:56,905 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 14:33:56,921 INFO L134 CoverageAnalysis]: Checked inductivity of 175 backedges. 0 proven. 155 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2018-11-18 14:33:56,936 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-18 14:33:56,936 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13] total 14 [2018-11-18 14:33:56,936 INFO L459 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-11-18 14:33:56,937 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-11-18 14:33:56,937 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=91, Invalid=91, Unknown=0, NotChecked=0, Total=182 [2018-11-18 14:33:56,937 INFO L87 Difference]: Start difference. First operand 54 states and 55 transitions. Second operand 14 states. [2018-11-18 14:33:56,972 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 14:33:56,972 INFO L93 Difference]: Finished difference Result 73 states and 75 transitions. [2018-11-18 14:33:56,973 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-11-18 14:33:56,973 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 53 [2018-11-18 14:33:56,973 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 14:33:56,973 INFO L225 Difference]: With dead ends: 73 [2018-11-18 14:33:56,973 INFO L226 Difference]: Without dead ends: 57 [2018-11-18 14:33:56,973 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 65 GetRequests, 53 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 18 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=91, Invalid=91, Unknown=0, NotChecked=0, Total=182 [2018-11-18 14:33:56,974 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 57 states. [2018-11-18 14:33:56,979 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 57 to 57. [2018-11-18 14:33:56,979 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 57 states. [2018-11-18 14:33:56,980 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 57 states to 57 states and 58 transitions. [2018-11-18 14:33:56,980 INFO L78 Accepts]: Start accepts. Automaton has 57 states and 58 transitions. Word has length 53 [2018-11-18 14:33:56,980 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 14:33:56,980 INFO L480 AbstractCegarLoop]: Abstraction has 57 states and 58 transitions. [2018-11-18 14:33:56,980 INFO L481 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-11-18 14:33:56,980 INFO L276 IsEmpty]: Start isEmpty. Operand 57 states and 58 transitions. [2018-11-18 14:33:56,981 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2018-11-18 14:33:56,981 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 14:33:56,981 INFO L375 BasicCegarLoop]: trace histogram [12, 11, 11, 5, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 14:33:56,983 INFO L423 AbstractCegarLoop]: === Iteration 12 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 14:33:56,983 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 14:33:56,984 INFO L82 PathProgramCache]: Analyzing trace with hash 1146966473, now seen corresponding path program 8 times [2018-11-18 14:33:56,984 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-18 14:33:56,984 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-18 14:33:56,984 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 14:33:56,984 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 14:33:56,985 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 14:33:57,017 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 14:33:57,134 INFO L134 CoverageAnalysis]: Checked inductivity of 207 backedges. 0 proven. 20 refuted. 0 times theorem prover too weak. 187 trivial. 0 not checked. [2018-11-18 14:33:57,135 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 14:33:57,135 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_25613ec6-6372-4c42-84f3-7cd4aa8f4d83/bin-2019/uautomizer/z3 Starting monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-18 14:33:57,143 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-11-18 14:33:57,497 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-11-18 14:33:57,497 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-18 14:33:57,500 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 14:33:57,536 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-11-18 14:33:57,538 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-11-18 14:33:57,538 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-18 14:33:57,540 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 14:33:57,546 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 14:33:57,546 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:31, output treesize:27 [2018-11-18 14:33:57,579 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 23 [2018-11-18 14:33:57,582 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 14:33:57,584 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 32 [2018-11-18 14:33:57,584 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-18 14:33:57,597 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 14:33:57,605 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 14:33:57,605 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:44, output treesize:43 [2018-11-18 14:33:57,651 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 50 treesize of output 39 [2018-11-18 14:33:57,655 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 14:33:57,656 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 14:33:57,657 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 14:33:57,674 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 66 [2018-11-18 14:33:57,675 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-18 14:33:57,685 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 14:33:57,697 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 14:33:57,697 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:64, output treesize:63 [2018-11-18 14:33:57,747 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 70 treesize of output 55 [2018-11-18 14:33:57,749 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 14:33:57,758 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 14:33:57,758 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 14:33:57,759 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 14:33:57,759 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 14:33:57,760 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 14:33:57,765 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 6 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 108 [2018-11-18 14:33:57,765 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-18 14:33:57,781 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 14:33:57,792 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 14:33:57,792 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:84, output treesize:83 [2018-11-18 14:33:57,846 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 90 treesize of output 71 [2018-11-18 14:33:57,852 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 14:33:57,853 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 14:33:57,854 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 14:33:57,855 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 14:33:57,857 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 14:33:57,858 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 14:33:57,859 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 14:33:57,860 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 14:33:57,861 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 14:33:57,863 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 14:33:57,876 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 10 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 71 treesize of output 158 [2018-11-18 14:33:57,877 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-18 14:33:57,910 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 14:33:57,934 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 14:33:57,934 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:96, output treesize:83 [2018-11-18 14:33:57,968 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 90 treesize of output 71 [2018-11-18 14:33:57,971 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 14:33:57,972 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 14:33:57,972 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 14:33:57,973 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 14:33:57,976 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 14:33:57,976 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 14:33:57,977 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 14:33:57,978 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 14:33:57,978 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 14:33:57,979 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 14:33:57,986 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 10 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 71 treesize of output 158 [2018-11-18 14:33:57,987 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-18 14:33:58,010 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 14:33:58,023 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 14:33:58,023 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:96, output treesize:83 [2018-11-18 14:33:58,053 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 90 treesize of output 71 [2018-11-18 14:33:58,057 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 14:33:58,058 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 14:33:58,059 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 14:33:58,060 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 14:33:58,060 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 14:33:58,061 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 14:33:58,062 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 14:33:58,062 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 14:33:58,063 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 14:33:58,064 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 14:33:58,071 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 10 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 71 treesize of output 158 [2018-11-18 14:33:58,072 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-18 14:33:58,093 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 14:33:58,112 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 14:33:58,113 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:96, output treesize:83 [2018-11-18 14:33:58,145 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 90 treesize of output 71 [2018-11-18 14:33:58,148 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 14:33:58,149 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 14:33:58,149 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 14:33:58,150 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 14:33:58,150 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 14:33:58,151 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 14:33:58,151 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 14:33:58,152 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 14:33:58,152 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 14:33:58,153 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 14:33:58,161 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 10 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 71 treesize of output 158 [2018-11-18 14:33:58,161 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-18 14:33:58,181 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 14:33:58,194 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 14:33:58,194 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:96, output treesize:83 [2018-11-18 14:33:58,239 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 90 treesize of output 71 [2018-11-18 14:33:58,242 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 14:33:58,243 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 14:33:58,243 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 14:33:58,244 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 14:33:58,244 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 14:33:58,245 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 14:33:58,245 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 14:33:58,246 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 14:33:58,246 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 14:33:58,247 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 14:33:58,254 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 10 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 71 treesize of output 158 [2018-11-18 14:33:58,255 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-18 14:33:58,271 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 14:33:58,282 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 14:33:58,283 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:96, output treesize:83 [2018-11-18 14:33:58,311 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 90 treesize of output 71 [2018-11-18 14:33:58,314 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 14:33:58,315 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 14:33:58,316 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 14:33:58,317 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 14:33:58,318 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 14:33:58,319 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 14:33:58,320 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 14:33:58,321 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 14:33:58,322 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 14:33:58,323 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 14:33:58,330 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 10 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 71 treesize of output 158 [2018-11-18 14:33:58,331 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-18 14:33:58,348 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 14:33:58,359 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 14:33:58,359 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:96, output treesize:83 [2018-11-18 14:33:58,385 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 90 treesize of output 71 [2018-11-18 14:33:58,388 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 14:33:58,389 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 14:33:58,389 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 14:33:58,390 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 14:33:58,390 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 14:33:58,391 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 14:33:58,392 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 14:33:58,392 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 14:33:58,393 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 14:33:58,393 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 14:33:58,401 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 10 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 71 treesize of output 158 [2018-11-18 14:33:58,401 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-18 14:33:58,418 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 14:33:58,428 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 14:33:58,428 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:93, output treesize:80 [2018-11-18 14:33:58,455 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 90 treesize of output 71 [2018-11-18 14:33:58,461 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 14:33:58,462 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 14:33:58,463 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 14:33:58,464 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 14:33:58,464 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 14:33:58,465 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 14:33:58,465 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 14:33:58,466 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 14:33:58,467 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 14:33:58,467 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 14:33:58,475 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 10 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 71 treesize of output 158 [2018-11-18 14:33:58,476 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-18 14:33:58,492 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 14:33:58,506 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 14:33:58,506 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:108, output treesize:104 [2018-11-18 14:33:58,776 WARN L180 SmtUtils]: Spent 110.00 ms on a formula simplification. DAG size of input: 67 DAG size of output: 59 [2018-11-18 14:33:58,787 WARN L307 Elim1Store]: Array PQE input equivalent to false [2018-11-18 14:33:58,787 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-18 14:34:02,567 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 202 treesize of output 160 [2018-11-18 14:34:02,582 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 14:34:02,583 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 14:34:02,598 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 14:34:02,630 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 13 disjoint index pairs (out of 10 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 160 treesize of output 124 [2018-11-18 14:34:02,632 INFO L267 ElimStorePlain]: Start of recursive call 4: 3 dim-0 vars, End of recursive call: 3 dim-0 vars, and 1 xjuncts. [2018-11-18 14:34:02,813 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: 3 dim-0 vars, and 1 xjuncts. [2018-11-18 14:34:03,042 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: 3 dim-0 vars, and 1 xjuncts. [2018-11-18 14:34:03,042 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 4 variables, input treesize:426, output treesize:112 [2018-11-18 14:34:07,906 WARN L854 $PredicateComparison]: unable to prove that (or (exists ((v_prenex_16 Int) (v_prenex_15 Int) (v_main_~c~0_14 Int) (v_prenex_14 Int)) (let ((.cse2 (mod v_prenex_14 256)) (.cse5 (mod v_prenex_15 256)) (.cse4 (mod v_prenex_16 256))) (let ((.cse1 (mod (+ (* 10 (mod (+ .cse2 (* 10 (mod (+ .cse5 4294967248) 4294967296)) 4294967248) 4294967296)) .cse4 4294967248) 4294967296)) (.cse0 (mod v_main_~c~0_14 256))) (let ((.cse3 (mod (+ (* 10 .cse1) .cse0 4294967248) 4294967296))) (and (<= v_main_~c~0_14 127) (<= v_prenex_15 127) (<= 0 (+ v_prenex_16 128)) (<= .cse0 57) (<= 0 (+ v_prenex_15 128)) (<= 0 (+ v_prenex_14 128)) (<= 0 (+ v_main_~c~0_14 128)) (<= .cse1 2147483647) (<= 48 .cse2) (< 2147483647 .cse3) (<= v_prenex_16 127) (<= .cse3 (+ c_main_~i~0 4294967296)) (<= 48 .cse4) (<= .cse4 57) (<= 48 .cse0) (<= v_prenex_14 127) (<= .cse2 57) (<= .cse5 57)))))) (exists ((v_main_~c~0_14 Int) (v_arrayElimCell_14 Int) (v_arrayElimCell_16 Int) (v_arrayElimCell_15 Int)) (let ((.cse9 (mod v_arrayElimCell_14 256)) (.cse7 (mod v_arrayElimCell_16 256)) (.cse10 (mod v_arrayElimCell_15 256))) (let ((.cse11 (mod (+ (* 10 (mod (+ .cse9 (* 10 (mod (+ .cse7 4294967248) 4294967296)) 4294967248) 4294967296)) .cse10 4294967248) 4294967296)) (.cse6 (mod v_main_~c~0_14 256))) (let ((.cse8 (mod (+ (* 10 .cse11) .cse6 4294967248) 4294967296))) (and (<= v_main_~c~0_14 127) (<= v_arrayElimCell_16 127) (<= .cse6 57) (<= 0 (+ v_main_~c~0_14 128)) (<= 0 (+ v_arrayElimCell_14 128)) (<= .cse7 57) (<= 0 (+ v_arrayElimCell_16 128)) (<= .cse8 c_main_~i~0) (<= .cse9 57) (<= 48 .cse10) (<= 0 (+ v_arrayElimCell_15 128)) (<= 48 .cse9) (<= .cse10 57) (<= .cse11 2147483647) (<= v_arrayElimCell_14 127) (<= .cse8 2147483647) (<= 48 .cse6) (<= v_arrayElimCell_15 127))))))) is different from true [2018-11-18 14:34:09,923 WARN L854 $PredicateComparison]: unable to prove that (or (exists ((v_prenex_16 Int) (v_prenex_15 Int) (v_main_~c~0_14 Int) (v_prenex_14 Int)) (let ((.cse2 (mod v_prenex_14 256)) (.cse5 (mod v_prenex_15 256)) (.cse4 (mod v_prenex_16 256))) (let ((.cse1 (mod (+ (* 10 (mod (+ .cse2 (* 10 (mod (+ .cse5 4294967248) 4294967296)) 4294967248) 4294967296)) .cse4 4294967248) 4294967296)) (.cse0 (mod v_main_~c~0_14 256))) (let ((.cse3 (mod (+ (* 10 .cse1) .cse0 4294967248) 4294967296))) (and (<= v_main_~c~0_14 127) (<= v_prenex_15 127) (<= 0 (+ v_prenex_16 128)) (<= .cse0 57) (<= 0 (+ v_prenex_15 128)) (<= 0 (+ v_prenex_14 128)) (<= 0 (+ v_main_~c~0_14 128)) (<= .cse1 2147483647) (<= 48 .cse2) (< 2147483647 .cse3) (<= v_prenex_16 127) (<= .cse3 (+ c_main_~i~0 4294967296)) (<= 48 .cse4) (<= .cse4 57) (<= 48 .cse0) (<= v_prenex_14 127) (<= .cse2 57) (<= .cse5 57)))))) (exists ((v_prenex_18 Int) (v_arrayElimCell_14 Int) (v_arrayElimCell_16 Int) (v_arrayElimCell_15 Int)) (let ((.cse9 (mod v_arrayElimCell_14 256)) (.cse7 (mod v_arrayElimCell_16 256)) (.cse10 (mod v_arrayElimCell_15 256))) (let ((.cse11 (mod (+ (* 10 (mod (+ .cse9 (* 10 (mod (+ .cse7 4294967248) 4294967296)) 4294967248) 4294967296)) .cse10 4294967248) 4294967296)) (.cse6 (mod v_prenex_18 256))) (let ((.cse8 (mod (+ (* 10 .cse11) .cse6 4294967248) 4294967296))) (and (<= 48 .cse6) (<= v_arrayElimCell_16 127) (<= 0 (+ v_arrayElimCell_14 128)) (<= .cse7 57) (<= 0 (+ v_arrayElimCell_16 128)) (<= .cse8 2147483647) (<= .cse8 c_main_~i~0) (<= .cse9 57) (<= 48 .cse10) (<= 0 (+ v_arrayElimCell_15 128)) (<= 48 .cse9) (<= .cse10 57) (<= .cse11 2147483647) (<= .cse6 57) (<= v_arrayElimCell_14 127) (<= v_prenex_18 127) (<= 0 (+ v_prenex_18 128)) (<= v_arrayElimCell_15 127))))))) is different from true [2018-11-18 14:34:14,104 INFO L134 CoverageAnalysis]: Checked inductivity of 207 backedges. 0 proven. 199 refuted. 0 times theorem prover too weak. 0 trivial. 8 not checked. [2018-11-18 14:34:14,120 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-18 14:34:14,120 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 26] total 31 [2018-11-18 14:34:14,120 INFO L459 AbstractCegarLoop]: Interpolant automaton has 31 states [2018-11-18 14:34:14,120 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 31 interpolants. [2018-11-18 14:34:14,120 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=160, Invalid=657, Unknown=3, NotChecked=110, Total=930 [2018-11-18 14:34:14,121 INFO L87 Difference]: Start difference. First operand 57 states and 58 transitions. Second operand 31 states. [2018-11-18 14:34:52,836 WARN L180 SmtUtils]: Spent 10.02 s on a formula simplification. DAG size of input: 144 DAG size of output: 59 [2018-11-18 14:34:54,975 WARN L832 $PredicateComparison]: unable to prove that (let ((.cse5 (select |c_#memory_int| |c_main_~#in~0.base|))) (let ((.cse0 (select .cse5 |c_main_~#in~0.offset|)) (.cse3 (select .cse5 (+ |c_main_~#in~0.offset| 1)))) (let ((.cse2 (mod .cse3 256)) (.cse4 (mod .cse0 256)) (.cse6 (select .cse5 (+ |c_main_~#in~0.offset| 3))) (.cse1 (select .cse5 (+ |c_main_~#in~0.offset| 2)))) (and (<= 0 c_main_~i~0) (<= 0 (+ c_main_~c~0 128)) (<= .cse0 127) (<= .cse1 127) (= 0 |c_main_~#in~0.offset|) (<= .cse2 57) (<= 48 .cse2) (<= .cse3 127) (<= 48 .cse4) (= c_main_~i~0 (mod (+ .cse2 (* 10 (mod (+ .cse4 4294967248) 4294967296)) 4294967248) 4294967296)) (<= 0 (+ .cse0 128)) (= c_main_~c~0 (select .cse5 (+ |c_main_~#in~0.offset| c_main_~idx_in~0))) (<= .cse6 127) (= (select .cse5 (+ |c_main_~#in~0.offset| 10)) 0) (<= c_main_~i~0 99) (or (exists ((v_prenex_16 Int) (v_prenex_15 Int) (v_main_~c~0_14 Int) (v_prenex_14 Int)) (let ((.cse9 (mod v_prenex_14 256)) (.cse12 (mod v_prenex_15 256)) (.cse11 (mod v_prenex_16 256))) (let ((.cse8 (mod (+ (* 10 (mod (+ .cse9 (* 10 (mod (+ .cse12 4294967248) 4294967296)) 4294967248) 4294967296)) .cse11 4294967248) 4294967296)) (.cse7 (mod v_main_~c~0_14 256))) (let ((.cse10 (mod (+ (* 10 .cse8) .cse7 4294967248) 4294967296))) (and (<= v_main_~c~0_14 127) (<= v_prenex_15 127) (<= 0 (+ v_prenex_16 128)) (<= .cse7 57) (<= 0 (+ v_prenex_15 128)) (<= 0 (+ v_prenex_14 128)) (<= 0 (+ v_main_~c~0_14 128)) (<= .cse8 2147483647) (<= 48 .cse9) (< 2147483647 .cse10) (<= v_prenex_16 127) (<= .cse10 (+ c_main_~i~0 4294967296)) (<= 48 .cse11) (<= .cse11 57) (<= 48 .cse7) (<= v_prenex_14 127) (<= .cse9 57) (<= .cse12 57)))))) (exists ((v_prenex_18 Int) (v_arrayElimCell_14 Int) (v_arrayElimCell_16 Int) (v_arrayElimCell_15 Int)) (let ((.cse16 (mod v_arrayElimCell_14 256)) (.cse14 (mod v_arrayElimCell_16 256)) (.cse17 (mod v_arrayElimCell_15 256))) (let ((.cse18 (mod (+ (* 10 (mod (+ .cse16 (* 10 (mod (+ .cse14 4294967248) 4294967296)) 4294967248) 4294967296)) .cse17 4294967248) 4294967296)) (.cse13 (mod v_prenex_18 256))) (let ((.cse15 (mod (+ (* 10 .cse18) .cse13 4294967248) 4294967296))) (and (<= 48 .cse13) (<= v_arrayElimCell_16 127) (<= 0 (+ v_arrayElimCell_14 128)) (<= .cse14 57) (<= 0 (+ v_arrayElimCell_16 128)) (<= .cse15 2147483647) (<= .cse15 c_main_~i~0) (<= .cse16 57) (<= 48 .cse17) (<= 0 (+ v_arrayElimCell_15 128)) (<= 48 .cse16) (<= .cse17 57) (<= .cse18 2147483647) (<= .cse13 57) (<= v_arrayElimCell_14 127) (<= v_prenex_18 127) (<= 0 (+ v_prenex_18 128)) (<= v_arrayElimCell_15 127))))))) (exists ((v_arrayElimCell_14 Int) (v_arrayElimCell_16 Int) (v_arrayElimCell_15 Int)) (let ((.cse21 (mod v_arrayElimCell_14 256)) (.cse19 (mod v_arrayElimCell_16 256)) (.cse22 (mod v_arrayElimCell_15 256))) (let ((.cse20 (mod (+ (* 10 (mod (+ .cse21 (* 10 (mod (+ .cse19 4294967248) 4294967296)) 4294967248) 4294967296)) .cse22 4294967248) 4294967296))) (and (<= v_arrayElimCell_16 127) (<= 0 (+ v_arrayElimCell_14 128)) (<= .cse19 57) (<= 0 (+ v_arrayElimCell_16 128)) (= c_main_~i~0 .cse20) (<= .cse21 57) (<= 48 .cse22) (<= 0 (+ v_arrayElimCell_15 128)) (<= 48 .cse21) (<= .cse22 57) (<= .cse20 2147483647) (<= v_arrayElimCell_14 127) (<= v_arrayElimCell_15 127))))) (<= .cse4 57) (<= c_main_~c~0 127) (<= 0 (+ .cse6 128)) (<= 0 (+ .cse1 128)) (= 2 c_main_~idx_in~0) (<= 0 (+ .cse3 128)))))) is different from false [2018-11-18 14:34:56,987 WARN L832 $PredicateComparison]: unable to prove that (and (<= 0 (+ c_main_~c~0 128)) (or (exists ((v_prenex_16 Int) (v_prenex_15 Int) (v_main_~c~0_14 Int) (v_prenex_14 Int)) (let ((.cse2 (mod v_prenex_14 256)) (.cse5 (mod v_prenex_15 256)) (.cse4 (mod v_prenex_16 256))) (let ((.cse1 (mod (+ (* 10 (mod (+ .cse2 (* 10 (mod (+ .cse5 4294967248) 4294967296)) 4294967248) 4294967296)) .cse4 4294967248) 4294967296)) (.cse0 (mod v_main_~c~0_14 256))) (let ((.cse3 (mod (+ (* 10 .cse1) .cse0 4294967248) 4294967296))) (and (<= v_main_~c~0_14 127) (<= v_prenex_15 127) (<= 0 (+ v_prenex_16 128)) (<= .cse0 57) (<= 0 (+ v_prenex_15 128)) (<= 0 (+ v_prenex_14 128)) (<= 0 (+ v_main_~c~0_14 128)) (<= .cse1 2147483647) (<= 48 .cse2) (< 2147483647 .cse3) (<= v_prenex_16 127) (<= .cse3 (+ c_main_~i~0 4294967296)) (<= 48 .cse4) (<= .cse4 57) (<= 48 .cse0) (<= v_prenex_14 127) (<= .cse2 57) (<= .cse5 57)))))) (exists ((v_main_~c~0_14 Int) (v_arrayElimCell_14 Int) (v_arrayElimCell_16 Int) (v_arrayElimCell_15 Int)) (let ((.cse9 (mod v_arrayElimCell_14 256)) (.cse7 (mod v_arrayElimCell_16 256)) (.cse10 (mod v_arrayElimCell_15 256))) (let ((.cse11 (mod (+ (* 10 (mod (+ .cse9 (* 10 (mod (+ .cse7 4294967248) 4294967296)) 4294967248) 4294967296)) .cse10 4294967248) 4294967296)) (.cse6 (mod v_main_~c~0_14 256))) (let ((.cse8 (mod (+ (* 10 .cse11) .cse6 4294967248) 4294967296))) (and (<= v_main_~c~0_14 127) (<= v_arrayElimCell_16 127) (<= .cse6 57) (<= 0 (+ v_main_~c~0_14 128)) (<= 0 (+ v_arrayElimCell_14 128)) (<= .cse7 57) (<= 0 (+ v_arrayElimCell_16 128)) (<= .cse8 c_main_~i~0) (<= .cse9 57) (<= 48 .cse10) (<= 0 (+ v_arrayElimCell_15 128)) (<= 48 .cse9) (<= .cse10 57) (<= .cse11 2147483647) (<= v_arrayElimCell_14 127) (<= .cse8 2147483647) (<= 48 .cse6) (<= v_arrayElimCell_15 127))))))) (exists ((v_arrayElimCell_14 Int) (v_arrayElimCell_16 Int) (v_arrayElimCell_15 Int)) (let ((.cse14 (mod v_arrayElimCell_14 256)) (.cse12 (mod v_arrayElimCell_16 256)) (.cse15 (mod v_arrayElimCell_15 256))) (let ((.cse13 (mod (+ (* 10 (mod (+ .cse14 (* 10 (mod (+ .cse12 4294967248) 4294967296)) 4294967248) 4294967296)) .cse15 4294967248) 4294967296))) (and (<= v_arrayElimCell_16 127) (<= 0 (+ v_arrayElimCell_14 128)) (<= .cse12 57) (<= 0 (+ v_arrayElimCell_16 128)) (= c_main_~i~0 .cse13) (<= .cse14 57) (<= 48 .cse15) (<= 0 (+ v_arrayElimCell_15 128)) (<= 48 .cse14) (<= .cse15 57) (<= .cse13 2147483647) (<= v_arrayElimCell_14 127) (<= v_arrayElimCell_15 127))))) (<= c_main_~c~0 127)) is different from false [2018-11-18 14:35:23,594 WARN L180 SmtUtils]: Spent 16.76 s on a formula simplification. DAG size of input: 107 DAG size of output: 62 [2018-11-18 14:35:30,927 WARN L832 $PredicateComparison]: unable to prove that (and (<= 0 c_main_~i~0) (or (exists ((v_prenex_16 Int) (v_prenex_15 Int) (v_main_~c~0_14 Int) (v_prenex_14 Int)) (let ((.cse2 (mod v_prenex_14 256)) (.cse5 (mod v_prenex_15 256)) (.cse4 (mod v_prenex_16 256))) (let ((.cse1 (mod (+ (* 10 (mod (+ .cse2 (* 10 (mod (+ .cse5 4294967248) 4294967296)) 4294967248) 4294967296)) .cse4 4294967248) 4294967296)) (.cse0 (mod v_main_~c~0_14 256))) (let ((.cse3 (mod (+ (* 10 .cse1) .cse0 4294967248) 4294967296))) (and (<= v_main_~c~0_14 127) (<= v_prenex_15 127) (<= 0 (+ v_prenex_16 128)) (<= .cse0 57) (<= 0 (+ v_prenex_15 128)) (<= 0 (+ v_prenex_14 128)) (<= 0 (+ v_main_~c~0_14 128)) (<= .cse1 2147483647) (<= 48 .cse2) (< 2147483647 .cse3) (<= v_prenex_16 127) (<= .cse3 (+ c_main_~i~0 4294967296)) (<= 48 .cse4) (<= .cse4 57) (<= 48 .cse0) (<= v_prenex_14 127) (<= .cse2 57) (<= .cse5 57)))))) (exists ((v_prenex_18 Int) (v_arrayElimCell_14 Int) (v_arrayElimCell_16 Int) (v_arrayElimCell_15 Int)) (let ((.cse9 (mod v_arrayElimCell_14 256)) (.cse7 (mod v_arrayElimCell_16 256)) (.cse10 (mod v_arrayElimCell_15 256))) (let ((.cse11 (mod (+ (* 10 (mod (+ .cse9 (* 10 (mod (+ .cse7 4294967248) 4294967296)) 4294967248) 4294967296)) .cse10 4294967248) 4294967296)) (.cse6 (mod v_prenex_18 256))) (let ((.cse8 (mod (+ (* 10 .cse11) .cse6 4294967248) 4294967296))) (and (<= 48 .cse6) (<= v_arrayElimCell_16 127) (<= 0 (+ v_arrayElimCell_14 128)) (<= .cse7 57) (<= 0 (+ v_arrayElimCell_16 128)) (<= .cse8 2147483647) (<= .cse8 c_main_~i~0) (<= .cse9 57) (<= 48 .cse10) (<= 0 (+ v_arrayElimCell_15 128)) (<= 48 .cse9) (<= .cse10 57) (<= .cse11 2147483647) (<= .cse6 57) (<= v_arrayElimCell_14 127) (<= v_prenex_18 127) (<= 0 (+ v_prenex_18 128)) (<= v_arrayElimCell_15 127)))))))) is different from false [2018-11-18 14:35:31,165 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 14:35:31,165 INFO L93 Difference]: Finished difference Result 68 states and 70 transitions. [2018-11-18 14:35:31,165 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2018-11-18 14:35:31,165 INFO L78 Accepts]: Start accepts. Automaton has 31 states. Word has length 56 [2018-11-18 14:35:31,165 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 14:35:31,166 INFO L225 Difference]: With dead ends: 68 [2018-11-18 14:35:31,166 INFO L226 Difference]: Without dead ends: 63 [2018-11-18 14:35:31,166 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 75 GetRequests, 34 SyntacticMatches, 4 SemanticMatches, 37 ConstructedPredicates, 5 IntricatePredicates, 0 DeprecatedPredicates, 445 ImplicationChecksByTransitivity, 81.4s TimeCoverageRelationStatistics Valid=219, Invalid=910, Unknown=13, NotChecked=340, Total=1482 [2018-11-18 14:35:31,166 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 63 states. [2018-11-18 14:35:31,171 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 63 to 59. [2018-11-18 14:35:31,171 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 59 states. [2018-11-18 14:35:31,171 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 59 states to 59 states and 60 transitions. [2018-11-18 14:35:31,171 INFO L78 Accepts]: Start accepts. Automaton has 59 states and 60 transitions. Word has length 56 [2018-11-18 14:35:31,172 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 14:35:31,172 INFO L480 AbstractCegarLoop]: Abstraction has 59 states and 60 transitions. [2018-11-18 14:35:31,172 INFO L481 AbstractCegarLoop]: Interpolant automaton has 31 states. [2018-11-18 14:35:31,172 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 60 transitions. [2018-11-18 14:35:31,172 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 59 [2018-11-18 14:35:31,173 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 14:35:31,173 INFO L375 BasicCegarLoop]: trace histogram [12, 11, 11, 6, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 14:35:31,173 INFO L423 AbstractCegarLoop]: === Iteration 13 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 14:35:31,173 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 14:35:31,173 INFO L82 PathProgramCache]: Analyzing trace with hash -606381105, now seen corresponding path program 9 times [2018-11-18 14:35:31,174 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-18 14:35:31,174 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-18 14:35:31,174 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 14:35:31,174 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-18 14:35:31,174 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 14:35:31,214 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 14:35:31,381 INFO L134 CoverageAnalysis]: Checked inductivity of 217 backedges. 0 proven. 30 refuted. 0 times theorem prover too weak. 187 trivial. 0 not checked. [2018-11-18 14:35:31,381 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 14:35:31,381 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_25613ec6-6372-4c42-84f3-7cd4aa8f4d83/bin-2019/uautomizer/z3 Starting monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-18 14:35:31,397 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-11-18 14:37:02,553 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 12 check-sat command(s) [2018-11-18 14:37:02,553 INFO L250 tOrderPrioritization]: Conjunction of SSA is unknown [2018-11-18 14:37:04,503 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-11-18 14:37:04,503 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10] total 10 [2018-11-18 14:37:04,503 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-11-18 14:37:04,503 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-11-18 14:37:04,503 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=28, Invalid=62, Unknown=0, NotChecked=0, Total=90 [2018-11-18 14:37:04,503 INFO L87 Difference]: Start difference. First operand 59 states and 60 transitions. Second operand 10 states. [2018-11-18 14:37:04,555 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 14:37:04,555 INFO L93 Difference]: Finished difference Result 66 states and 67 transitions. [2018-11-18 14:37:04,556 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-11-18 14:37:04,556 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 58 [2018-11-18 14:37:04,556 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 14:37:04,557 INFO L225 Difference]: With dead ends: 66 [2018-11-18 14:37:04,557 INFO L226 Difference]: Without dead ends: 61 [2018-11-18 14:37:04,557 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=48, Invalid=108, Unknown=0, NotChecked=0, Total=156 [2018-11-18 14:37:04,557 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 61 states. [2018-11-18 14:37:04,564 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 61 to 61. [2018-11-18 14:37:04,564 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 61 states. [2018-11-18 14:37:04,564 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 61 states to 61 states and 62 transitions. [2018-11-18 14:37:04,565 INFO L78 Accepts]: Start accepts. Automaton has 61 states and 62 transitions. Word has length 58 [2018-11-18 14:37:04,565 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 14:37:04,565 INFO L480 AbstractCegarLoop]: Abstraction has 61 states and 62 transitions. [2018-11-18 14:37:04,565 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-11-18 14:37:04,565 INFO L276 IsEmpty]: Start isEmpty. Operand 61 states and 62 transitions. [2018-11-18 14:37:04,565 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2018-11-18 14:37:04,566 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 14:37:04,566 INFO L375 BasicCegarLoop]: trace histogram [12, 11, 11, 7, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 14:37:04,566 INFO L423 AbstractCegarLoop]: === Iteration 14 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 14:37:04,566 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 14:37:04,566 INFO L82 PathProgramCache]: Analyzing trace with hash -1946223531, now seen corresponding path program 10 times [2018-11-18 14:37:04,566 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-18 14:37:04,566 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-18 14:37:04,567 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 14:37:04,567 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-18 14:37:04,567 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 14:37:04,592 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 14:37:04,697 INFO L134 CoverageAnalysis]: Checked inductivity of 229 backedges. 0 proven. 42 refuted. 0 times theorem prover too weak. 187 trivial. 0 not checked. [2018-11-18 14:37:04,697 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 14:37:04,697 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_25613ec6-6372-4c42-84f3-7cd4aa8f4d83/bin-2019/uautomizer/z3 Starting monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-18 14:37:04,710 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-11-18 14:37:16,781 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-11-18 14:37:16,781 INFO L250 tOrderPrioritization]: Conjunction of SSA is unknown [2018-11-18 14:37:16,900 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-11-18 14:37:16,900 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11] total 11 [2018-11-18 14:37:16,900 INFO L459 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-11-18 14:37:16,901 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-11-18 14:37:16,901 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=33, Invalid=77, Unknown=0, NotChecked=0, Total=110 [2018-11-18 14:37:16,901 INFO L87 Difference]: Start difference. First operand 61 states and 62 transitions. Second operand 11 states. [2018-11-18 14:37:17,018 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 14:37:17,019 INFO L93 Difference]: Finished difference Result 68 states and 69 transitions. [2018-11-18 14:37:17,019 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-11-18 14:37:17,020 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 60 [2018-11-18 14:37:17,020 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 14:37:17,020 INFO L225 Difference]: With dead ends: 68 [2018-11-18 14:37:17,020 INFO L226 Difference]: Without dead ends: 63 [2018-11-18 14:37:17,020 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=55, Invalid=127, Unknown=0, NotChecked=0, Total=182 [2018-11-18 14:37:17,021 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 63 states. [2018-11-18 14:37:17,031 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 63 to 63. [2018-11-18 14:37:17,031 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 63 states. [2018-11-18 14:37:17,032 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 63 states to 63 states and 64 transitions. [2018-11-18 14:37:17,032 INFO L78 Accepts]: Start accepts. Automaton has 63 states and 64 transitions. Word has length 60 [2018-11-18 14:37:17,032 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 14:37:17,033 INFO L480 AbstractCegarLoop]: Abstraction has 63 states and 64 transitions. [2018-11-18 14:37:17,033 INFO L481 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-11-18 14:37:17,033 INFO L276 IsEmpty]: Start isEmpty. Operand 63 states and 64 transitions. [2018-11-18 14:37:17,033 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 63 [2018-11-18 14:37:17,033 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 14:37:17,033 INFO L375 BasicCegarLoop]: trace histogram [12, 11, 11, 8, 7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 14:37:17,034 INFO L423 AbstractCegarLoop]: === Iteration 15 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 14:37:17,034 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 14:37:17,034 INFO L82 PathProgramCache]: Analyzing trace with hash -1044606117, now seen corresponding path program 11 times [2018-11-18 14:37:17,034 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-18 14:37:17,034 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-18 14:37:17,034 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 14:37:17,035 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-18 14:37:17,035 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 14:37:17,058 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 14:37:17,199 INFO L134 CoverageAnalysis]: Checked inductivity of 243 backedges. 0 proven. 56 refuted. 0 times theorem prover too weak. 187 trivial. 0 not checked. [2018-11-18 14:37:17,200 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 14:37:17,200 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_25613ec6-6372-4c42-84f3-7cd4aa8f4d83/bin-2019/uautomizer/z3 Starting monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-18 14:37:17,216 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-11-18 14:38:15,704 INFO L249 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 12 check-sat command(s) [2018-11-18 14:38:15,705 INFO L250 tOrderPrioritization]: Conjunction of SSA is unknown [2018-11-18 14:38:18,517 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-11-18 14:38:18,517 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12] total 12 [2018-11-18 14:38:18,517 INFO L459 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-11-18 14:38:18,517 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-11-18 14:38:18,517 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=47, Invalid=85, Unknown=0, NotChecked=0, Total=132 [2018-11-18 14:38:18,517 INFO L87 Difference]: Start difference. First operand 63 states and 64 transitions. Second operand 12 states. [2018-11-18 14:38:18,578 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 14:38:18,578 INFO L93 Difference]: Finished difference Result 70 states and 71 transitions. [2018-11-18 14:38:18,578 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-11-18 14:38:18,578 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 62 [2018-11-18 14:38:18,578 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 14:38:18,579 INFO L225 Difference]: With dead ends: 70 [2018-11-18 14:38:18,579 INFO L226 Difference]: Without dead ends: 65 [2018-11-18 14:38:18,579 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=61, Invalid=121, Unknown=0, NotChecked=0, Total=182 [2018-11-18 14:38:18,579 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 65 states. [2018-11-18 14:38:18,589 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 65 to 65. [2018-11-18 14:38:18,590 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 65 states. [2018-11-18 14:38:18,590 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 65 states to 65 states and 66 transitions. [2018-11-18 14:38:18,590 INFO L78 Accepts]: Start accepts. Automaton has 65 states and 66 transitions. Word has length 62 [2018-11-18 14:38:18,590 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 14:38:18,590 INFO L480 AbstractCegarLoop]: Abstraction has 65 states and 66 transitions. [2018-11-18 14:38:18,591 INFO L481 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-11-18 14:38:18,591 INFO L276 IsEmpty]: Start isEmpty. Operand 65 states and 66 transitions. [2018-11-18 14:38:18,591 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 65 [2018-11-18 14:38:18,591 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 14:38:18,591 INFO L375 BasicCegarLoop]: trace histogram [12, 11, 11, 9, 8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 14:38:18,592 INFO L423 AbstractCegarLoop]: === Iteration 16 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 14:38:18,592 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 14:38:18,592 INFO L82 PathProgramCache]: Analyzing trace with hash 2121302241, now seen corresponding path program 12 times [2018-11-18 14:38:18,592 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-18 14:38:18,592 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-18 14:38:18,592 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 14:38:18,593 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-18 14:38:18,593 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 14:38:18,632 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 14:38:18,833 INFO L134 CoverageAnalysis]: Checked inductivity of 259 backedges. 0 proven. 72 refuted. 0 times theorem prover too weak. 187 trivial. 0 not checked. [2018-11-18 14:38:18,834 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 14:38:18,834 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_25613ec6-6372-4c42-84f3-7cd4aa8f4d83/bin-2019/uautomizer/z3 Starting monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-18 14:38:18,844 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-11-18 14:38:43,332 INFO L249 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 12 check-sat command(s) [2018-11-18 14:38:43,332 INFO L250 tOrderPrioritization]: Conjunction of SSA is unknown [2018-11-18 14:38:43,509 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-11-18 14:38:43,509 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13] total 13 [2018-11-18 14:38:43,509 INFO L459 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-11-18 14:38:43,510 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-11-18 14:38:43,510 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=55, Invalid=101, Unknown=0, NotChecked=0, Total=156 [2018-11-18 14:38:43,510 INFO L87 Difference]: Start difference. First operand 65 states and 66 transitions. Second operand 13 states. [2018-11-18 14:38:43,556 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 14:38:43,556 INFO L93 Difference]: Finished difference Result 72 states and 73 transitions. [2018-11-18 14:38:43,556 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-11-18 14:38:43,556 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 64 [2018-11-18 14:38:43,556 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 14:38:43,556 INFO L225 Difference]: With dead ends: 72 [2018-11-18 14:38:43,556 INFO L226 Difference]: Without dead ends: 67 [2018-11-18 14:38:43,557 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=70, Invalid=140, Unknown=0, NotChecked=0, Total=210 [2018-11-18 14:38:43,557 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 67 states. [2018-11-18 14:38:43,561 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 67 to 67. [2018-11-18 14:38:43,561 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 67 states. [2018-11-18 14:38:43,561 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 67 states to 67 states and 68 transitions. [2018-11-18 14:38:43,561 INFO L78 Accepts]: Start accepts. Automaton has 67 states and 68 transitions. Word has length 64 [2018-11-18 14:38:43,562 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 14:38:43,562 INFO L480 AbstractCegarLoop]: Abstraction has 67 states and 68 transitions. [2018-11-18 14:38:43,562 INFO L481 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-11-18 14:38:43,562 INFO L276 IsEmpty]: Start isEmpty. Operand 67 states and 68 transitions. [2018-11-18 14:38:43,563 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2018-11-18 14:38:43,563 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 14:38:43,563 INFO L375 BasicCegarLoop]: trace histogram [12, 11, 11, 10, 9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 14:38:43,563 INFO L423 AbstractCegarLoop]: === Iteration 17 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 14:38:43,564 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 14:38:43,564 INFO L82 PathProgramCache]: Analyzing trace with hash -572578585, now seen corresponding path program 13 times [2018-11-18 14:38:43,564 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-18 14:38:43,564 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-18 14:38:43,564 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 14:38:43,564 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-18 14:38:43,564 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 14:38:43,601 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 14:38:48,568 INFO L134 CoverageAnalysis]: Checked inductivity of 277 backedges. 0 proven. 88 refuted. 2 times theorem prover too weak. 187 trivial. 0 not checked. [2018-11-18 14:38:48,568 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 14:38:48,568 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_25613ec6-6372-4c42-84f3-7cd4aa8f4d83/bin-2019/uautomizer/z3 Starting monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-18 14:38:48,575 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 14:39:00,593 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unknown [2018-11-18 14:39:00,667 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-11-18 14:39:00,667 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14] total 14 [2018-11-18 14:39:00,667 INFO L459 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-11-18 14:39:00,667 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-11-18 14:39:00,667 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=58, Invalid=122, Unknown=2, NotChecked=0, Total=182 [2018-11-18 14:39:00,667 INFO L87 Difference]: Start difference. First operand 67 states and 68 transitions. Second operand 14 states. [2018-11-18 14:39:02,793 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 14:39:02,793 INFO L93 Difference]: Finished difference Result 74 states and 75 transitions. [2018-11-18 14:39:02,794 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-11-18 14:39:02,794 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 66 [2018-11-18 14:39:02,794 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 14:39:02,794 INFO L225 Difference]: With dead ends: 74 [2018-11-18 14:39:02,794 INFO L226 Difference]: Without dead ends: 69 [2018-11-18 14:39:02,795 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 32 ImplicationChecksByTransitivity, 4.9s TimeCoverageRelationStatistics Valid=98, Invalid=206, Unknown=2, NotChecked=0, Total=306 [2018-11-18 14:39:02,795 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 69 states. [2018-11-18 14:39:02,799 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 69 to 69. [2018-11-18 14:39:02,799 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 69 states. [2018-11-18 14:39:02,799 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 69 states to 69 states and 70 transitions. [2018-11-18 14:39:02,799 INFO L78 Accepts]: Start accepts. Automaton has 69 states and 70 transitions. Word has length 66 [2018-11-18 14:39:02,800 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 14:39:02,800 INFO L480 AbstractCegarLoop]: Abstraction has 69 states and 70 transitions. [2018-11-18 14:39:02,800 INFO L481 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-11-18 14:39:02,800 INFO L276 IsEmpty]: Start isEmpty. Operand 69 states and 70 transitions. [2018-11-18 14:39:02,800 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 69 [2018-11-18 14:39:02,800 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 14:39:02,800 INFO L375 BasicCegarLoop]: trace histogram [12, 11, 11, 11, 10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 14:39:02,800 INFO L423 AbstractCegarLoop]: === Iteration 18 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 14:39:02,801 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 14:39:02,801 INFO L82 PathProgramCache]: Analyzing trace with hash 473227117, now seen corresponding path program 14 times [2018-11-18 14:39:02,801 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-18 14:39:02,801 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-18 14:39:02,801 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 14:39:02,801 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 14:39:02,802 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 14:39:03,050 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-18 14:39:03,302 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-18 14:39:03,323 INFO L442 BasicCegarLoop]: Counterexample might be feasible [2018-11-18 14:39:03,350 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 18.11 02:39:03 BoogieIcfgContainer [2018-11-18 14:39:03,350 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-11-18 14:39:03,351 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2018-11-18 14:39:03,351 INFO L271 PluginConnector]: Initializing Witness Printer... [2018-11-18 14:39:03,352 INFO L276 PluginConnector]: Witness Printer initialized [2018-11-18 14:39:03,352 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 18.11 02:33:50" (3/4) ... [2018-11-18 14:39:03,354 INFO L138 WitnessPrinter]: Generating witness for reachability counterexample [2018-11-18 14:39:03,398 INFO L145 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/working_dir_25613ec6-6372-4c42-84f3-7cd4aa8f4d83/bin-2019/uautomizer/witness.graphml [2018-11-18 14:39:03,399 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2018-11-18 14:39:03,400 INFO L168 Benchmark]: Toolchain (without parser) took 313163.34 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 140.5 MB). Free memory was 959.2 MB in the beginning and 984.8 MB in the end (delta: -25.6 MB). Peak memory consumption was 114.9 MB. Max. memory is 11.5 GB. [2018-11-18 14:39:03,400 INFO L168 Benchmark]: CDTParser took 0.14 ms. Allocated memory is still 1.0 GB. Free memory is still 985.5 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-11-18 14:39:03,401 INFO L168 Benchmark]: CACSL2BoogieTranslator took 155.14 ms. Allocated memory is still 1.0 GB. Free memory was 959.2 MB in the beginning and 948.5 MB in the end (delta: 10.7 MB). Peak memory consumption was 10.7 MB. Max. memory is 11.5 GB. [2018-11-18 14:39:03,401 INFO L168 Benchmark]: Boogie Preprocessor took 29.14 ms. Allocated memory is still 1.0 GB. Free memory was 948.5 MB in the beginning and 945.8 MB in the end (delta: 2.7 MB). Peak memory consumption was 2.7 MB. Max. memory is 11.5 GB. [2018-11-18 14:39:03,401 INFO L168 Benchmark]: RCFGBuilder took 219.05 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 117.4 MB). Free memory was 945.8 MB in the beginning and 1.1 GB in the end (delta: -152.2 MB). Peak memory consumption was 14.2 MB. Max. memory is 11.5 GB. [2018-11-18 14:39:03,401 INFO L168 Benchmark]: TraceAbstraction took 312708.66 ms. Allocated memory was 1.1 GB in the beginning and 1.2 GB in the end (delta: 23.1 MB). Free memory was 1.1 GB in the beginning and 984.8 MB in the end (delta: 113.2 MB). Peak memory consumption was 136.2 MB. Max. memory is 11.5 GB. [2018-11-18 14:39:03,401 INFO L168 Benchmark]: Witness Printer took 47.28 ms. Allocated memory is still 1.2 GB. Free memory is still 984.8 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-11-18 14:39:03,403 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.14 ms. Allocated memory is still 1.0 GB. Free memory is still 985.5 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 155.14 ms. Allocated memory is still 1.0 GB. Free memory was 959.2 MB in the beginning and 948.5 MB in the end (delta: 10.7 MB). Peak memory consumption was 10.7 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 29.14 ms. Allocated memory is still 1.0 GB. Free memory was 948.5 MB in the beginning and 945.8 MB in the end (delta: 2.7 MB). Peak memory consumption was 2.7 MB. Max. memory is 11.5 GB. * RCFGBuilder took 219.05 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 117.4 MB). Free memory was 945.8 MB in the beginning and 1.1 GB in the end (delta: -152.2 MB). Peak memory consumption was 14.2 MB. Max. memory is 11.5 GB. * TraceAbstraction took 312708.66 ms. Allocated memory was 1.1 GB in the beginning and 1.2 GB in the end (delta: 23.1 MB). Free memory was 1.1 GB in the beginning and 984.8 MB in the end (delta: 113.2 MB). Peak memory consumption was 136.2 MB. Max. memory is 11.5 GB. * Witness Printer took 47.28 ms. Allocated memory is still 1.2 GB. Free memory is still 984.8 MB. There was no memory consumed. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 7]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L14] FCALL char in[11]; [L15] char *s; [L16] unsigned char c; [L17] int i, j; [L18] int idx_in; [L19] i = 0 VAL [i=0, in={3881557096:0}] [L19] COND TRUE i < 11 [L20] FCALL in[i] = __VERIFIER_nondet_char() [L19] i++ VAL [i=1, in={3881557096:0}] [L19] COND TRUE i < 11 [L20] FCALL in[i] = __VERIFIER_nondet_char() [L19] i++ VAL [i=2, in={3881557096:0}] [L19] COND TRUE i < 11 [L20] FCALL in[i] = __VERIFIER_nondet_char() [L19] i++ VAL [i=3, in={3881557096:0}] [L19] COND TRUE i < 11 [L20] FCALL in[i] = __VERIFIER_nondet_char() [L19] i++ VAL [i=4, in={3881557096:0}] [L19] COND TRUE i < 11 [L20] FCALL in[i] = __VERIFIER_nondet_char() [L19] i++ VAL [i=5, in={3881557096:0}] [L19] COND TRUE i < 11 [L20] FCALL in[i] = __VERIFIER_nondet_char() [L19] i++ VAL [i=6, in={3881557096:0}] [L19] COND TRUE i < 11 [L20] FCALL in[i] = __VERIFIER_nondet_char() [L19] i++ VAL [i=7, in={3881557096:0}] [L19] COND TRUE i < 11 [L20] FCALL in[i] = __VERIFIER_nondet_char() [L19] i++ VAL [i=8, in={3881557096:0}] [L19] COND TRUE i < 11 [L20] FCALL in[i] = __VERIFIER_nondet_char() [L19] i++ VAL [i=9, in={3881557096:0}] [L19] COND TRUE i < 11 [L20] FCALL in[i] = __VERIFIER_nondet_char() [L19] i++ VAL [i=10, in={3881557096:0}] [L19] COND TRUE i < 11 [L20] FCALL in[i] = __VERIFIER_nondet_char() [L19] i++ VAL [i=11, in={3881557096:0}] [L19] COND FALSE !(i < 11) VAL [i=11, in={3881557096:0}] [L21] FCALL in[10] = 0 [L22] idx_in = 0 [L23] s = in [L24] i = 0 [L25] EXPR, FCALL in[idx_in] [L25] c = in[idx_in] [L26] COND TRUE ('0' <= c) && (c <= '9') [L28] j = c - '0' [L29] i = i * 10U + j [L30] idx_in++ [L31] EXPR, FCALL in[idx_in] [L31] c = in[idx_in] [L26] COND TRUE ('0' <= c) && (c <= '9') [L28] j = c - '0' [L29] i = i * 10U + j [L30] idx_in++ [L31] EXPR, FCALL in[idx_in] [L31] c = in[idx_in] [L26] COND TRUE ('0' <= c) && (c <= '9') [L28] j = c - '0' [L29] i = i * 10U + j [L30] idx_in++ [L31] EXPR, FCALL in[idx_in] [L31] c = in[idx_in] [L26] COND TRUE ('0' <= c) && (c <= '9') [L28] j = c - '0' [L29] i = i * 10U + j [L30] idx_in++ [L31] EXPR, FCALL in[idx_in] [L31] c = in[idx_in] [L26] COND TRUE ('0' <= c) && (c <= '9') [L28] j = c - '0' [L29] i = i * 10U + j [L30] idx_in++ [L31] EXPR, FCALL in[idx_in] [L31] c = in[idx_in] [L26] COND TRUE ('0' <= c) && (c <= '9') [L28] j = c - '0' [L29] i = i * 10U + j [L30] idx_in++ [L31] EXPR, FCALL in[idx_in] [L31] c = in[idx_in] [L26] COND TRUE ('0' <= c) && (c <= '9') [L28] j = c - '0' [L29] i = i * 10U + j [L30] idx_in++ [L31] EXPR, FCALL in[idx_in] [L31] c = in[idx_in] [L26] COND TRUE ('0' <= c) && (c <= '9') [L28] j = c - '0' [L29] i = i * 10U + j [L30] idx_in++ [L31] EXPR, FCALL in[idx_in] [L31] c = in[idx_in] [L26] COND TRUE ('0' <= c) && (c <= '9') [L28] j = c - '0' [L29] i = i * 10U + j [L30] idx_in++ [L31] EXPR, FCALL in[idx_in] [L31] c = in[idx_in] [L26] COND TRUE ('0' <= c) && (c <= '9') [L28] j = c - '0' [L29] i = i * 10U + j [L30] idx_in++ [L31] EXPR, FCALL in[idx_in] [L31] c = in[idx_in] [L26] COND FALSE !(('0' <= c) && (c <= '9')) VAL [c=0, i=-413410202, idx_in=10, in={3881557096:0}, j=0, s={3881557096:0}] [L34] CALL __VERIFIER_assert (i >= 0) VAL [\old(cond)=0] [L6] COND TRUE !(cond) VAL [\old(cond)=0, cond=0] [L7] __VERIFIER_error() VAL [\old(cond)=0, cond=0] - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 24 locations, 1 error locations. UNSAFE Result, 312.6s OverallTime, 18 OverallIterations, 12 TraceHistogramMax, 81.8s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 258 SDtfs, 223 SDslu, 1568 SDs, 0 SdLazy, 1030 SolverSat, 158 SolverUnsat, 2 SolverUnknown, 0 SolverNotchecked, 7.3s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 563 GetRequests, 363 SyntacticMatches, 4 SemanticMatches, 196 ConstructedPredicates, 5 IntricatePredicates, 0 DeprecatedPredicates, 729 ImplicationChecksByTransitivity, 89.8s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=69occurred in iteration=17, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 0.0s AutomataMinimizationTime, 17 MinimizatonAttempts, 22 StatesRemovedByMinimization, 10 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.1s SsaConstructionTime, 199.2s SatisfiabilityAnalysisTime, 25.3s InterpolantComputationTime, 1468 NumberOfCodeBlocks, 1444 NumberOfCodeBlocksAsserted, 86 NumberOfCheckSat, 1063 ConstructedInterpolants, 17 QuantifiedInterpolants, 390451 SizeOfPredicates, 30 NumberOfNonLiveVariables, 1217 ConjunctsInSsa, 190 ConjunctsInUnsatCore, 27 InterpolantComputations, 3 PerfectInterpolantSequences, 1425/2883 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...