./Ultimate.py --spec ../../sv-benchmarks/c/Termination.prp --file ../../sv-benchmarks/c/systemc/bist_cell_true-unreach-call_false-termination.cil.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 5842f4b8 Calling Ultimate with: java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/working_dir_89f12fe3-ff39-4721-a39a-11b61e72f14e/bin-2019/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/working_dir_89f12fe3-ff39-4721-a39a-11b61e72f14e/bin-2019/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/working_dir_89f12fe3-ff39-4721-a39a-11b61e72f14e/bin-2019/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/working_dir_89f12fe3-ff39-4721-a39a-11b61e72f14e/bin-2019/uautomizer/config/AutomizerTermination.xml -i ../../sv-benchmarks/c/systemc/bist_cell_true-unreach-call_false-termination.cil.c -s /tmp/vcloud-vcloud-master/worker/working_dir_89f12fe3-ff39-4721-a39a-11b61e72f14e/bin-2019/uautomizer/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/working_dir_89f12fe3-ff39-4721-a39a-11b61e72f14e/bin-2019/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash bb52621d262b2a79ebd79f9601fb8103d2f4f11e ....................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE(TERM) --- Real Ultimate output --- This is Ultimate 0.1.23-5842f4b [2018-11-18 08:34:39,507 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-11-18 08:34:39,508 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-11-18 08:34:39,515 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-11-18 08:34:39,515 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-11-18 08:34:39,516 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-11-18 08:34:39,517 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-11-18 08:34:39,518 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-11-18 08:34:39,519 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-11-18 08:34:39,520 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-11-18 08:34:39,520 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-11-18 08:34:39,520 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-11-18 08:34:39,521 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-11-18 08:34:39,522 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-11-18 08:34:39,523 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-11-18 08:34:39,523 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-11-18 08:34:39,524 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-11-18 08:34:39,525 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-11-18 08:34:39,526 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-11-18 08:34:39,527 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-11-18 08:34:39,528 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-11-18 08:34:39,529 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-11-18 08:34:39,530 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-11-18 08:34:39,530 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-11-18 08:34:39,530 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-11-18 08:34:39,531 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-11-18 08:34:39,532 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-11-18 08:34:39,533 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-11-18 08:34:39,533 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-11-18 08:34:39,534 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-11-18 08:34:39,534 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-11-18 08:34:39,535 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-11-18 08:34:39,535 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-11-18 08:34:39,535 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-11-18 08:34:39,536 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-11-18 08:34:39,536 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-11-18 08:34:39,536 INFO L98 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/working_dir_89f12fe3-ff39-4721-a39a-11b61e72f14e/bin-2019/uautomizer/config/svcomp-Termination-32bit-Automizer_Default.epf [2018-11-18 08:34:39,546 INFO L110 SettingsManager]: Loading preferences was successful [2018-11-18 08:34:39,546 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-11-18 08:34:39,547 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-11-18 08:34:39,547 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-11-18 08:34:39,548 INFO L133 SettingsManager]: * Use SBE=true [2018-11-18 08:34:39,548 INFO L131 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2018-11-18 08:34:39,548 INFO L133 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2018-11-18 08:34:39,548 INFO L133 SettingsManager]: * Use old map elimination=false [2018-11-18 08:34:39,548 INFO L133 SettingsManager]: * Use external solver (rank synthesis)=false [2018-11-18 08:34:39,548 INFO L133 SettingsManager]: * Use only trivial implications for array writes=true [2018-11-18 08:34:39,548 INFO L133 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2018-11-18 08:34:39,549 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-11-18 08:34:39,549 INFO L133 SettingsManager]: * sizeof long=4 [2018-11-18 08:34:39,549 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-11-18 08:34:39,549 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-11-18 08:34:39,549 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-11-18 08:34:39,549 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-11-18 08:34:39,549 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2018-11-18 08:34:39,549 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2018-11-18 08:34:39,549 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2018-11-18 08:34:39,550 INFO L133 SettingsManager]: * sizeof long double=12 [2018-11-18 08:34:39,550 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-11-18 08:34:39,550 INFO L133 SettingsManager]: * Assume nondeterminstic values are in range=false [2018-11-18 08:34:39,550 INFO L133 SettingsManager]: * Use constant arrays=true [2018-11-18 08:34:39,550 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2018-11-18 08:34:39,550 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-11-18 08:34:39,550 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-11-18 08:34:39,550 INFO L133 SettingsManager]: * To the following directory=/home/matthias/ultimate/dump [2018-11-18 08:34:39,551 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-11-18 08:34:39,551 INFO L133 SettingsManager]: * Trace refinement strategy=CAMEL [2018-11-18 08:34:39,551 INFO L133 SettingsManager]: * Dump automata to the following directory=/home/matthias/ultimate/dump/auto [2018-11-18 08:34:39,552 INFO L131 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2018-11-18 08:34:39,552 INFO L133 SettingsManager]: * TransformationType=MODULO_NEIGHBOR Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/working_dir_89f12fe3-ff39-4721-a39a-11b61e72f14e/bin-2019/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> bb52621d262b2a79ebd79f9601fb8103d2f4f11e [2018-11-18 08:34:39,574 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-11-18 08:34:39,584 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-11-18 08:34:39,586 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-11-18 08:34:39,587 INFO L271 PluginConnector]: Initializing CDTParser... [2018-11-18 08:34:39,587 INFO L276 PluginConnector]: CDTParser initialized [2018-11-18 08:34:39,588 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/working_dir_89f12fe3-ff39-4721-a39a-11b61e72f14e/bin-2019/uautomizer/../../sv-benchmarks/c/systemc/bist_cell_true-unreach-call_false-termination.cil.c [2018-11-18 08:34:39,626 INFO L221 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_89f12fe3-ff39-4721-a39a-11b61e72f14e/bin-2019/uautomizer/data/9f73d0ce6/41e463946ef34ffb822bdc5573de649c/FLAG70970d1b4 [2018-11-18 08:34:39,952 INFO L307 CDTParser]: Found 1 translation units. [2018-11-18 08:34:39,952 INFO L161 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/working_dir_89f12fe3-ff39-4721-a39a-11b61e72f14e/sv-benchmarks/c/systemc/bist_cell_true-unreach-call_false-termination.cil.c [2018-11-18 08:34:39,959 INFO L355 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_89f12fe3-ff39-4721-a39a-11b61e72f14e/bin-2019/uautomizer/data/9f73d0ce6/41e463946ef34ffb822bdc5573de649c/FLAG70970d1b4 [2018-11-18 08:34:39,968 INFO L363 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/working_dir_89f12fe3-ff39-4721-a39a-11b61e72f14e/bin-2019/uautomizer/data/9f73d0ce6/41e463946ef34ffb822bdc5573de649c [2018-11-18 08:34:39,971 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-11-18 08:34:39,972 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2018-11-18 08:34:39,973 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-11-18 08:34:39,973 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-11-18 08:34:39,975 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-11-18 08:34:39,975 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 18.11 08:34:39" (1/1) ... [2018-11-18 08:34:39,977 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@469b36ec and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:34:39, skipping insertion in model container [2018-11-18 08:34:39,977 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 18.11 08:34:39" (1/1) ... [2018-11-18 08:34:39,984 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-11-18 08:34:40,006 INFO L176 MainTranslator]: Built tables and reachable declarations [2018-11-18 08:34:40,127 INFO L201 PostProcessor]: Analyzing one entry point: main [2018-11-18 08:34:40,130 INFO L191 MainTranslator]: Completed pre-run [2018-11-18 08:34:40,154 INFO L201 PostProcessor]: Analyzing one entry point: main [2018-11-18 08:34:40,164 INFO L195 MainTranslator]: Completed translation [2018-11-18 08:34:40,165 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:34:40 WrapperNode [2018-11-18 08:34:40,165 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-11-18 08:34:40,165 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-11-18 08:34:40,165 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-11-18 08:34:40,165 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-11-18 08:34:40,170 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:34:40" (1/1) ... [2018-11-18 08:34:40,175 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:34:40" (1/1) ... [2018-11-18 08:34:40,231 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-11-18 08:34:40,231 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-11-18 08:34:40,231 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-11-18 08:34:40,231 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-11-18 08:34:40,237 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:34:40" (1/1) ... [2018-11-18 08:34:40,237 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:34:40" (1/1) ... [2018-11-18 08:34:40,238 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:34:40" (1/1) ... [2018-11-18 08:34:40,239 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:34:40" (1/1) ... [2018-11-18 08:34:40,242 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:34:40" (1/1) ... [2018-11-18 08:34:40,246 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:34:40" (1/1) ... [2018-11-18 08:34:40,247 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:34:40" (1/1) ... [2018-11-18 08:34:40,249 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-11-18 08:34:40,249 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-11-18 08:34:40,250 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-11-18 08:34:40,250 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-11-18 08:34:40,250 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:34:40" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_89f12fe3-ff39-4721-a39a-11b61e72f14e/bin-2019/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2018-11-18 08:34:40,297 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-11-18 08:34:40,297 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-11-18 08:34:40,712 INFO L278 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-11-18 08:34:40,712 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 18.11 08:34:40 BoogieIcfgContainer [2018-11-18 08:34:40,712 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-11-18 08:34:40,713 INFO L113 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2018-11-18 08:34:40,713 INFO L271 PluginConnector]: Initializing BuchiAutomizer... [2018-11-18 08:34:40,716 INFO L276 PluginConnector]: BuchiAutomizer initialized [2018-11-18 08:34:40,716 INFO L102 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2018-11-18 08:34:40,717 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 18.11 08:34:39" (1/3) ... [2018-11-18 08:34:40,717 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@1f107d61 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 18.11 08:34:40, skipping insertion in model container [2018-11-18 08:34:40,717 INFO L102 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2018-11-18 08:34:40,718 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:34:40" (2/3) ... [2018-11-18 08:34:40,718 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@1f107d61 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 18.11 08:34:40, skipping insertion in model container [2018-11-18 08:34:40,718 INFO L102 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2018-11-18 08:34:40,718 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 18.11 08:34:40" (3/3) ... [2018-11-18 08:34:40,719 INFO L375 chiAutomizerObserver]: Analyzing ICFG bist_cell_true-unreach-call_false-termination.cil.c [2018-11-18 08:34:40,762 INFO L133 ementStrategyFactory]: Using default assertion order modulation [2018-11-18 08:34:40,763 INFO L374 BuchiCegarLoop]: Interprodecural is true [2018-11-18 08:34:40,763 INFO L375 BuchiCegarLoop]: Hoare is false [2018-11-18 08:34:40,763 INFO L376 BuchiCegarLoop]: Compute interpolants for ForwardPredicates [2018-11-18 08:34:40,763 INFO L377 BuchiCegarLoop]: Backedges is STRAIGHT_LINE [2018-11-18 08:34:40,763 INFO L378 BuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-11-18 08:34:40,763 INFO L379 BuchiCegarLoop]: Difference is false [2018-11-18 08:34:40,763 INFO L380 BuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-11-18 08:34:40,763 INFO L383 BuchiCegarLoop]: ======== Iteration 0==of CEGAR loop == BuchiCegarLoop======== [2018-11-18 08:34:40,777 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 127 states. [2018-11-18 08:34:40,795 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 73 [2018-11-18 08:34:40,795 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2018-11-18 08:34:40,795 INFO L119 BuchiIsEmpty]: Starting construction of run [2018-11-18 08:34:40,801 INFO L866 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 08:34:40,801 INFO L867 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 08:34:40,801 INFO L442 BuchiCegarLoop]: ======== Iteration 1============ [2018-11-18 08:34:40,801 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 127 states. [2018-11-18 08:34:40,805 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 73 [2018-11-18 08:34:40,805 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2018-11-18 08:34:40,805 INFO L119 BuchiIsEmpty]: Starting construction of run [2018-11-18 08:34:40,806 INFO L866 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 08:34:40,806 INFO L867 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 08:34:40,813 INFO L794 eck$LassoCheckResult]: Stem: 103#ULTIMATE.startENTRYtrue assume { :begin_inline_ULTIMATE.init } true;~b0_val~0 := 0;~b0_val_t~0 := 0;~b0_ev~0 := 0;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_val_t~0 := 0;~b1_ev~0 := 0;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_val_t~0 := 0;~d0_ev~0 := 0;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_val_t~0 := 0;~d1_ev~0 := 0;~d1_req_up~0 := 0;~z_val~0 := 0;~z_val_t~0 := 0;~z_ev~0 := 0;~z_req_up~0 := 0;~comp_m1_st~0 := 0;~comp_m1_i~0 := 0; 11#L-1true assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res;havoc main_~__retres1~2;havoc main_~__retres1~2;assume { :begin_inline_init_model } true;~b0_val~0 := 0;~b0_ev~0 := 2;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_ev~0 := 2;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_ev~0 := 2;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_ev~0 := 2;~d1_req_up~0 := 0;~z_val~0 := 0;~z_ev~0 := 2;~z_req_up~0 := 0;~b0_val_t~0 := 1;~b0_req_up~0 := 1;~b1_val_t~0 := 1;~b1_req_up~0 := 1;~d0_val_t~0 := 1;~d0_req_up~0 := 1;~d1_val_t~0 := 1;~d1_req_up~0 := 1;~comp_m1_i~0 := 0; 46#L480true assume { :end_inline_init_model } true;assume { :begin_inline_start_simulation } true;havoc start_simulation_#t~ret4, start_simulation_~kernel_st~0, start_simulation_~tmp~3;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;start_simulation_~kernel_st~0 := 0;assume { :begin_inline_update_channels } true; 51#L202true assume !(1 == ~b0_req_up~0); 31#L202-2true assume !(1 == ~b1_req_up~0); 92#L209-1true assume !(1 == ~d0_req_up~0); 40#L216-1true assume !(1 == ~d1_req_up~0); 80#L223-1true assume !(1 == ~z_req_up~0); 3#L230-1true assume { :end_inline_update_channels } true;assume { :begin_inline_init_threads } true; 102#L245true assume !(1 == ~comp_m1_i~0);~comp_m1_st~0 := 2; 79#L245-2true assume { :end_inline_init_threads } true;assume { :begin_inline_fire_delta_events } true; 95#L311true assume !(0 == ~b0_ev~0); 99#L311-2true assume !(0 == ~b1_ev~0); 115#L316-1true assume !(0 == ~d0_ev~0); 7#L321-1true assume 0 == ~d1_ev~0;~d1_ev~0 := 1; 42#L326-1true assume !(0 == ~z_ev~0); 63#L331-1true assume { :end_inline_fire_delta_events } true;assume { :begin_inline_activate_threads } true;havoc activate_threads_#t~ret2, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;assume { :begin_inline_is_method1_triggered } true;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 68#L97true assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 69#L119true is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 20#L120true activate_threads_#t~ret2 := is_method1_triggered_#res;assume { :end_inline_is_method1_triggered } true;activate_threads_~tmp~1 := activate_threads_#t~ret2;havoc activate_threads_#t~ret2; 86#L380true assume !(0 != activate_threads_~tmp~1); 90#L380-2true assume { :end_inline_activate_threads } true;assume { :begin_inline_reset_delta_events } true; 94#L344true assume !(1 == ~b0_ev~0); 97#L344-2true assume !(1 == ~b1_ev~0); 113#L349-1true assume !(1 == ~d0_ev~0); 5#L354-1true assume 1 == ~d1_ev~0;~d1_ev~0 := 2; 41#L359-1true assume !(1 == ~z_ev~0); 61#L364-1true assume { :end_inline_reset_delta_events } true; 43#L422-3true [2018-11-18 08:34:40,814 INFO L796 eck$LassoCheckResult]: Loop: 43#L422-3true assume true; 56#L422-1true assume !false; 125#L423true start_simulation_~kernel_st~0 := 1;assume { :begin_inline_eval } true;havoc eval_#t~ret0, eval_#t~nondet1, eval_~tmp~0, eval_~tmp___0~0;havoc eval_~tmp~0;havoc eval_~tmp___0~0; 6#L285true assume !true; 55#L301true assume { :end_inline_eval } true;start_simulation_~kernel_st~0 := 2;assume { :begin_inline_update_channels } true; 30#L202-3true assume !(1 == ~b0_req_up~0); 25#L202-5true assume !(1 == ~b1_req_up~0); 107#L209-3true assume !(1 == ~d0_req_up~0); 36#L216-3true assume !(1 == ~d1_req_up~0); 75#L223-3true assume !(1 == ~z_req_up~0); 21#L230-3true assume { :end_inline_update_channels } true;start_simulation_~kernel_st~0 := 3;assume { :begin_inline_fire_delta_events } true; 83#L311-3true assume !(0 == ~b0_ev~0); 85#L311-5true assume 0 == ~b1_ev~0;~b1_ev~0 := 1; 110#L316-3true assume 0 == ~d0_ev~0;~d0_ev~0 := 1; 122#L321-3true assume 0 == ~d1_ev~0;~d1_ev~0 := 1; 26#L326-3true assume 0 == ~z_ev~0;~z_ev~0 := 1; 54#L331-3true assume { :end_inline_fire_delta_events } true;assume { :begin_inline_activate_threads } true;havoc activate_threads_#t~ret2, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;assume { :begin_inline_is_method1_triggered } true;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 66#L97-1true assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 67#L119-1true is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 18#L120-1true activate_threads_#t~ret2 := is_method1_triggered_#res;assume { :end_inline_is_method1_triggered } true;activate_threads_~tmp~1 := activate_threads_#t~ret2;havoc activate_threads_#t~ret2; 71#L380-3true assume 0 != activate_threads_~tmp~1;~comp_m1_st~0 := 0; 76#L380-5true assume { :end_inline_activate_threads } true;assume { :begin_inline_reset_delta_events } true; 100#L344-3true assume !(1 == ~b0_ev~0); 84#L344-5true assume 1 == ~b1_ev~0;~b1_ev~0 := 2; 117#L349-3true assume 1 == ~d0_ev~0;~d0_ev~0 := 2; 10#L354-3true assume 1 == ~d1_ev~0;~d1_ev~0 := 2; 24#L359-3true assume 1 == ~z_ev~0;~z_ev~0 := 2; 52#L364-3true assume { :end_inline_reset_delta_events } true;assume { :begin_inline_stop_simulation } true;havoc stop_simulation_#res;havoc stop_simulation_#t~ret3, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;assume { :begin_inline_exists_runnable_thread } true;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 124#L258-1true assume !(0 == ~comp_m1_st~0);exists_runnable_thread_~__retres1~1 := 0; 45#L265-1true exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 121#L266-1true stop_simulation_#t~ret3 := exists_runnable_thread_#res;assume { :end_inline_exists_runnable_thread } true;stop_simulation_~tmp~2 := stop_simulation_#t~ret3;havoc stop_simulation_#t~ret3; 58#L397true assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; 112#L404true stop_simulation_#res := stop_simulation_~__retres2~0; 81#L405true start_simulation_#t~ret4 := stop_simulation_#res;assume { :end_inline_stop_simulation } true;start_simulation_~tmp~3 := start_simulation_#t~ret4;havoc start_simulation_#t~ret4; 29#L439true assume !(0 != start_simulation_~tmp~3); 43#L422-3true [2018-11-18 08:34:40,817 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 08:34:40,817 INFO L82 PathProgramCache]: Analyzing trace with hash -1345002148, now seen corresponding path program 1 times [2018-11-18 08:34:40,818 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-18 08:34:40,819 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-18 08:34:40,852 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 08:34:40,852 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 08:34:40,852 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 08:34:40,879 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 08:34:40,930 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 08:34:40,932 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 08:34:40,932 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-18 08:34:40,935 INFO L799 eck$LassoCheckResult]: stem already infeasible [2018-11-18 08:34:40,936 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 08:34:40,936 INFO L82 PathProgramCache]: Analyzing trace with hash 44127016, now seen corresponding path program 1 times [2018-11-18 08:34:40,936 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-18 08:34:40,936 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-18 08:34:40,937 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 08:34:40,937 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 08:34:40,937 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 08:34:40,940 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 08:34:40,946 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 08:34:40,946 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 08:34:40,946 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-11-18 08:34:40,947 INFO L811 eck$LassoCheckResult]: loop already infeasible [2018-11-18 08:34:40,958 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-18 08:34:40,958 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-18 08:34:40,960 INFO L87 Difference]: Start difference. First operand 127 states. Second operand 3 states. [2018-11-18 08:34:40,989 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 08:34:40,989 INFO L93 Difference]: Finished difference Result 126 states and 192 transitions. [2018-11-18 08:34:40,990 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-18 08:34:40,991 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 126 states and 192 transitions. [2018-11-18 08:34:40,993 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 73 [2018-11-18 08:34:40,996 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 126 states to 119 states and 185 transitions. [2018-11-18 08:34:40,997 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 119 [2018-11-18 08:34:40,997 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 119 [2018-11-18 08:34:40,998 INFO L73 IsDeterministic]: Start isDeterministic. Operand 119 states and 185 transitions. [2018-11-18 08:34:40,998 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2018-11-18 08:34:40,998 INFO L705 BuchiCegarLoop]: Abstraction has 119 states and 185 transitions. [2018-11-18 08:34:41,009 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 119 states and 185 transitions. [2018-11-18 08:34:41,017 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 119 to 119. [2018-11-18 08:34:41,018 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 119 states. [2018-11-18 08:34:41,018 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 119 states to 119 states and 185 transitions. [2018-11-18 08:34:41,019 INFO L728 BuchiCegarLoop]: Abstraction has 119 states and 185 transitions. [2018-11-18 08:34:41,019 INFO L608 BuchiCegarLoop]: Abstraction has 119 states and 185 transitions. [2018-11-18 08:34:41,019 INFO L442 BuchiCegarLoop]: ======== Iteration 2============ [2018-11-18 08:34:41,019 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 119 states and 185 transitions. [2018-11-18 08:34:41,020 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 73 [2018-11-18 08:34:41,021 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2018-11-18 08:34:41,021 INFO L119 BuchiIsEmpty]: Starting construction of run [2018-11-18 08:34:41,021 INFO L866 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 08:34:41,021 INFO L867 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 08:34:41,022 INFO L794 eck$LassoCheckResult]: Stem: 374#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;~b0_val~0 := 0;~b0_val_t~0 := 0;~b0_ev~0 := 0;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_val_t~0 := 0;~b1_ev~0 := 0;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_val_t~0 := 0;~d0_ev~0 := 0;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_val_t~0 := 0;~d1_ev~0 := 0;~d1_req_up~0 := 0;~z_val~0 := 0;~z_val_t~0 := 0;~z_ev~0 := 0;~z_req_up~0 := 0;~comp_m1_st~0 := 0;~comp_m1_i~0 := 0; 278#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res;havoc main_~__retres1~2;havoc main_~__retres1~2;assume { :begin_inline_init_model } true;~b0_val~0 := 0;~b0_ev~0 := 2;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_ev~0 := 2;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_ev~0 := 2;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_ev~0 := 2;~d1_req_up~0 := 0;~z_val~0 := 0;~z_ev~0 := 2;~z_req_up~0 := 0;~b0_val_t~0 := 1;~b0_req_up~0 := 1;~b1_val_t~0 := 1;~b1_req_up~0 := 1;~d0_val_t~0 := 1;~d0_req_up~0 := 1;~d1_val_t~0 := 1;~d1_req_up~0 := 1;~comp_m1_i~0 := 0; 279#L480 assume { :end_inline_init_model } true;assume { :begin_inline_start_simulation } true;havoc start_simulation_#t~ret4, start_simulation_~kernel_st~0, start_simulation_~tmp~3;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;start_simulation_~kernel_st~0 := 0;assume { :begin_inline_update_channels } true; 328#L202 assume 1 == ~b0_req_up~0;assume { :begin_inline_update_b0 } true; 333#L127 assume !(~b0_val~0 != ~b0_val_t~0); 342#L127-2 ~b0_req_up~0 := 0; 343#L135 assume { :end_inline_update_b0 } true; 313#L202-2 assume !(1 == ~b1_req_up~0); 314#L209-1 assume !(1 == ~d0_req_up~0); 322#L216-1 assume !(1 == ~d1_req_up~0); 317#L223-1 assume !(1 == ~z_req_up~0); 262#L230-1 assume { :end_inline_update_channels } true;assume { :begin_inline_init_threads } true; 263#L245 assume !(1 == ~comp_m1_i~0);~comp_m1_st~0 := 2; 358#L245-2 assume { :end_inline_init_threads } true;assume { :begin_inline_fire_delta_events } true; 359#L311 assume !(0 == ~b0_ev~0); 371#L311-2 assume !(0 == ~b1_ev~0); 373#L316-1 assume !(0 == ~d0_ev~0); 270#L321-1 assume 0 == ~d1_ev~0;~d1_ev~0 := 1; 271#L326-1 assume !(0 == ~z_ev~0); 324#L331-1 assume { :end_inline_fire_delta_events } true;assume { :begin_inline_activate_threads } true;havoc activate_threads_#t~ret2, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;assume { :begin_inline_is_method1_triggered } true;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 345#L97 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 293#L119 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 294#L120 activate_threads_#t~ret2 := is_method1_triggered_#res;assume { :end_inline_is_method1_triggered } true;activate_threads_~tmp~1 := activate_threads_#t~ret2;havoc activate_threads_#t~ret2; 295#L380 assume !(0 != activate_threads_~tmp~1); 366#L380-2 assume { :end_inline_activate_threads } true;assume { :begin_inline_reset_delta_events } true; 368#L344 assume !(1 == ~b0_ev~0); 370#L344-2 assume !(1 == ~b1_ev~0); 372#L349-1 assume !(1 == ~d0_ev~0); 266#L354-1 assume 1 == ~d1_ev~0;~d1_ev~0 := 2; 267#L359-1 assume !(1 == ~z_ev~0); 323#L364-1 assume { :end_inline_reset_delta_events } true; 310#L422-3 [2018-11-18 08:34:41,022 INFO L796 eck$LassoCheckResult]: Loop: 310#L422-3 assume true; 325#L422-1 assume !false; 337#L423 start_simulation_~kernel_st~0 := 1;assume { :begin_inline_eval } true;havoc eval_#t~ret0, eval_#t~nondet1, eval_~tmp~0, eval_~tmp___0~0;havoc eval_~tmp~0;havoc eval_~tmp___0~0; 268#L285 assume true; 269#L275-1 assume !false; 331#L276 assume { :begin_inline_exists_runnable_thread } true;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 332#L258 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 329#L265 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 280#L266 eval_#t~ret0 := exists_runnable_thread_#res;assume { :end_inline_exists_runnable_thread } true;eval_~tmp___0~0 := eval_#t~ret0;havoc eval_#t~ret0; 281#L280 assume !(0 != eval_~tmp___0~0); 336#L301 assume { :end_inline_eval } true;start_simulation_~kernel_st~0 := 2;assume { :begin_inline_update_channels } true; 311#L202-3 assume !(1 == ~b0_req_up~0); 302#L202-5 assume !(1 == ~b1_req_up~0); 303#L209-3 assume !(1 == ~d0_req_up~0); 319#L216-3 assume !(1 == ~d1_req_up~0); 315#L223-3 assume !(1 == ~z_req_up~0); 296#L230-3 assume { :end_inline_update_channels } true;start_simulation_~kernel_st~0 := 3;assume { :begin_inline_fire_delta_events } true; 297#L311-3 assume !(0 == ~b0_ev~0); 362#L311-5 assume 0 == ~b1_ev~0;~b1_ev~0 := 1; 365#L316-3 assume 0 == ~d0_ev~0;~d0_ev~0 := 1; 379#L321-3 assume 0 == ~d1_ev~0;~d1_ev~0 := 1; 304#L326-3 assume 0 == ~z_ev~0;~z_ev~0 := 1; 305#L331-3 assume { :end_inline_fire_delta_events } true;assume { :begin_inline_activate_threads } true;havoc activate_threads_#t~ret2, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;assume { :begin_inline_is_method1_triggered } true;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 335#L97-1 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 289#L119-1 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 290#L120-1 activate_threads_#t~ret2 := is_method1_triggered_#res;assume { :end_inline_is_method1_triggered } true;activate_threads_~tmp~1 := activate_threads_#t~ret2;havoc activate_threads_#t~ret2; 291#L380-3 assume 0 != activate_threads_~tmp~1;~comp_m1_st~0 := 0; 352#L380-5 assume { :end_inline_activate_threads } true;assume { :begin_inline_reset_delta_events } true; 356#L344-3 assume !(1 == ~b0_ev~0); 363#L344-5 assume 1 == ~b1_ev~0;~b1_ev~0 := 2; 364#L349-3 assume 1 == ~d0_ev~0;~d0_ev~0 := 2; 276#L354-3 assume 1 == ~d1_ev~0;~d1_ev~0 := 2; 277#L359-3 assume 1 == ~z_ev~0;~z_ev~0 := 2; 301#L364-3 assume { :end_inline_reset_delta_events } true;assume { :begin_inline_stop_simulation } true;havoc stop_simulation_#res;havoc stop_simulation_#t~ret3, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;assume { :begin_inline_exists_runnable_thread } true;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 334#L258-1 assume !(0 == ~comp_m1_st~0);exists_runnable_thread_~__retres1~1 := 0; 326#L265-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 327#L266-1 stop_simulation_#t~ret3 := exists_runnable_thread_#res;assume { :end_inline_exists_runnable_thread } true;stop_simulation_~tmp~2 := stop_simulation_#t~ret3;havoc stop_simulation_#t~ret3; 340#L397 assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; 341#L404 stop_simulation_#res := stop_simulation_~__retres2~0; 361#L405 start_simulation_#t~ret4 := stop_simulation_#res;assume { :end_inline_stop_simulation } true;start_simulation_~tmp~3 := start_simulation_#t~ret4;havoc start_simulation_#t~ret4; 309#L439 assume !(0 != start_simulation_~tmp~3); 310#L422-3 [2018-11-18 08:34:41,022 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 08:34:41,022 INFO L82 PathProgramCache]: Analyzing trace with hash -1840469421, now seen corresponding path program 1 times [2018-11-18 08:34:41,022 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-18 08:34:41,022 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-18 08:34:41,023 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 08:34:41,023 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 08:34:41,023 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 08:34:41,032 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 08:34:41,049 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 08:34:41,049 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 08:34:41,049 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-18 08:34:41,049 INFO L799 eck$LassoCheckResult]: stem already infeasible [2018-11-18 08:34:41,050 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 08:34:41,050 INFO L82 PathProgramCache]: Analyzing trace with hash -852125441, now seen corresponding path program 1 times [2018-11-18 08:34:41,050 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-18 08:34:41,050 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-18 08:34:41,051 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 08:34:41,051 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 08:34:41,051 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 08:34:41,058 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 08:34:41,077 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 08:34:41,077 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 08:34:41,077 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-18 08:34:41,078 INFO L811 eck$LassoCheckResult]: loop already infeasible [2018-11-18 08:34:41,078 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-18 08:34:41,078 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-18 08:34:41,079 INFO L87 Difference]: Start difference. First operand 119 states and 185 transitions. cyclomatic complexity: 67 Second operand 3 states. [2018-11-18 08:34:41,095 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 08:34:41,095 INFO L93 Difference]: Finished difference Result 119 states and 184 transitions. [2018-11-18 08:34:41,095 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-18 08:34:41,096 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 119 states and 184 transitions. [2018-11-18 08:34:41,097 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 73 [2018-11-18 08:34:41,098 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 119 states to 119 states and 184 transitions. [2018-11-18 08:34:41,099 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 119 [2018-11-18 08:34:41,099 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 119 [2018-11-18 08:34:41,099 INFO L73 IsDeterministic]: Start isDeterministic. Operand 119 states and 184 transitions. [2018-11-18 08:34:41,100 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2018-11-18 08:34:41,100 INFO L705 BuchiCegarLoop]: Abstraction has 119 states and 184 transitions. [2018-11-18 08:34:41,100 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 119 states and 184 transitions. [2018-11-18 08:34:41,104 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 119 to 119. [2018-11-18 08:34:41,104 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 119 states. [2018-11-18 08:34:41,105 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 119 states to 119 states and 184 transitions. [2018-11-18 08:34:41,105 INFO L728 BuchiCegarLoop]: Abstraction has 119 states and 184 transitions. [2018-11-18 08:34:41,105 INFO L608 BuchiCegarLoop]: Abstraction has 119 states and 184 transitions. [2018-11-18 08:34:41,105 INFO L442 BuchiCegarLoop]: ======== Iteration 3============ [2018-11-18 08:34:41,105 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 119 states and 184 transitions. [2018-11-18 08:34:41,106 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 73 [2018-11-18 08:34:41,106 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2018-11-18 08:34:41,107 INFO L119 BuchiIsEmpty]: Starting construction of run [2018-11-18 08:34:41,107 INFO L866 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 08:34:41,108 INFO L867 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 08:34:41,108 INFO L794 eck$LassoCheckResult]: Stem: 619#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;~b0_val~0 := 0;~b0_val_t~0 := 0;~b0_ev~0 := 0;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_val_t~0 := 0;~b1_ev~0 := 0;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_val_t~0 := 0;~d0_ev~0 := 0;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_val_t~0 := 0;~d1_ev~0 := 0;~d1_req_up~0 := 0;~z_val~0 := 0;~z_val_t~0 := 0;~z_ev~0 := 0;~z_req_up~0 := 0;~comp_m1_st~0 := 0;~comp_m1_i~0 := 0; 523#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res;havoc main_~__retres1~2;havoc main_~__retres1~2;assume { :begin_inline_init_model } true;~b0_val~0 := 0;~b0_ev~0 := 2;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_ev~0 := 2;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_ev~0 := 2;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_ev~0 := 2;~d1_req_up~0 := 0;~z_val~0 := 0;~z_ev~0 := 2;~z_req_up~0 := 0;~b0_val_t~0 := 1;~b0_req_up~0 := 1;~b1_val_t~0 := 1;~b1_req_up~0 := 1;~d0_val_t~0 := 1;~d0_req_up~0 := 1;~d1_val_t~0 := 1;~d1_req_up~0 := 1;~comp_m1_i~0 := 0; 524#L480 assume { :end_inline_init_model } true;assume { :begin_inline_start_simulation } true;havoc start_simulation_#t~ret4, start_simulation_~kernel_st~0, start_simulation_~tmp~3;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;start_simulation_~kernel_st~0 := 0;assume { :begin_inline_update_channels } true; 573#L202 assume 1 == ~b0_req_up~0;assume { :begin_inline_update_b0 } true; 578#L127 assume ~b0_val~0 != ~b0_val_t~0;~b0_val~0 := ~b0_val_t~0;~b0_ev~0 := 0; 587#L127-2 ~b0_req_up~0 := 0; 588#L135 assume { :end_inline_update_b0 } true; 558#L202-2 assume !(1 == ~b1_req_up~0); 559#L209-1 assume !(1 == ~d0_req_up~0); 567#L216-1 assume !(1 == ~d1_req_up~0); 562#L223-1 assume !(1 == ~z_req_up~0); 507#L230-1 assume { :end_inline_update_channels } true;assume { :begin_inline_init_threads } true; 508#L245 assume !(1 == ~comp_m1_i~0);~comp_m1_st~0 := 2; 603#L245-2 assume { :end_inline_init_threads } true;assume { :begin_inline_fire_delta_events } true; 604#L311 assume !(0 == ~b0_ev~0); 616#L311-2 assume !(0 == ~b1_ev~0); 618#L316-1 assume !(0 == ~d0_ev~0); 515#L321-1 assume 0 == ~d1_ev~0;~d1_ev~0 := 1; 516#L326-1 assume !(0 == ~z_ev~0); 569#L331-1 assume { :end_inline_fire_delta_events } true;assume { :begin_inline_activate_threads } true;havoc activate_threads_#t~ret2, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;assume { :begin_inline_is_method1_triggered } true;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 590#L97 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 538#L119 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 539#L120 activate_threads_#t~ret2 := is_method1_triggered_#res;assume { :end_inline_is_method1_triggered } true;activate_threads_~tmp~1 := activate_threads_#t~ret2;havoc activate_threads_#t~ret2; 540#L380 assume !(0 != activate_threads_~tmp~1); 611#L380-2 assume { :end_inline_activate_threads } true;assume { :begin_inline_reset_delta_events } true; 613#L344 assume !(1 == ~b0_ev~0); 615#L344-2 assume !(1 == ~b1_ev~0); 617#L349-1 assume !(1 == ~d0_ev~0); 511#L354-1 assume 1 == ~d1_ev~0;~d1_ev~0 := 2; 512#L359-1 assume !(1 == ~z_ev~0); 568#L364-1 assume { :end_inline_reset_delta_events } true; 555#L422-3 [2018-11-18 08:34:41,108 INFO L796 eck$LassoCheckResult]: Loop: 555#L422-3 assume true; 570#L422-1 assume !false; 582#L423 start_simulation_~kernel_st~0 := 1;assume { :begin_inline_eval } true;havoc eval_#t~ret0, eval_#t~nondet1, eval_~tmp~0, eval_~tmp___0~0;havoc eval_~tmp~0;havoc eval_~tmp___0~0; 513#L285 assume true; 514#L275-1 assume !false; 576#L276 assume { :begin_inline_exists_runnable_thread } true;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 577#L258 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 574#L265 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 525#L266 eval_#t~ret0 := exists_runnable_thread_#res;assume { :end_inline_exists_runnable_thread } true;eval_~tmp___0~0 := eval_#t~ret0;havoc eval_#t~ret0; 526#L280 assume !(0 != eval_~tmp___0~0); 581#L301 assume { :end_inline_eval } true;start_simulation_~kernel_st~0 := 2;assume { :begin_inline_update_channels } true; 556#L202-3 assume !(1 == ~b0_req_up~0); 547#L202-5 assume !(1 == ~b1_req_up~0); 548#L209-3 assume !(1 == ~d0_req_up~0); 564#L216-3 assume !(1 == ~d1_req_up~0); 560#L223-3 assume !(1 == ~z_req_up~0); 541#L230-3 assume { :end_inline_update_channels } true;start_simulation_~kernel_st~0 := 3;assume { :begin_inline_fire_delta_events } true; 542#L311-3 assume !(0 == ~b0_ev~0); 607#L311-5 assume 0 == ~b1_ev~0;~b1_ev~0 := 1; 610#L316-3 assume 0 == ~d0_ev~0;~d0_ev~0 := 1; 624#L321-3 assume 0 == ~d1_ev~0;~d1_ev~0 := 1; 549#L326-3 assume 0 == ~z_ev~0;~z_ev~0 := 1; 550#L331-3 assume { :end_inline_fire_delta_events } true;assume { :begin_inline_activate_threads } true;havoc activate_threads_#t~ret2, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;assume { :begin_inline_is_method1_triggered } true;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 580#L97-1 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 534#L119-1 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 535#L120-1 activate_threads_#t~ret2 := is_method1_triggered_#res;assume { :end_inline_is_method1_triggered } true;activate_threads_~tmp~1 := activate_threads_#t~ret2;havoc activate_threads_#t~ret2; 536#L380-3 assume 0 != activate_threads_~tmp~1;~comp_m1_st~0 := 0; 597#L380-5 assume { :end_inline_activate_threads } true;assume { :begin_inline_reset_delta_events } true; 601#L344-3 assume !(1 == ~b0_ev~0); 608#L344-5 assume 1 == ~b1_ev~0;~b1_ev~0 := 2; 609#L349-3 assume 1 == ~d0_ev~0;~d0_ev~0 := 2; 521#L354-3 assume 1 == ~d1_ev~0;~d1_ev~0 := 2; 522#L359-3 assume 1 == ~z_ev~0;~z_ev~0 := 2; 546#L364-3 assume { :end_inline_reset_delta_events } true;assume { :begin_inline_stop_simulation } true;havoc stop_simulation_#res;havoc stop_simulation_#t~ret3, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;assume { :begin_inline_exists_runnable_thread } true;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 579#L258-1 assume !(0 == ~comp_m1_st~0);exists_runnable_thread_~__retres1~1 := 0; 571#L265-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 572#L266-1 stop_simulation_#t~ret3 := exists_runnable_thread_#res;assume { :end_inline_exists_runnable_thread } true;stop_simulation_~tmp~2 := stop_simulation_#t~ret3;havoc stop_simulation_#t~ret3; 585#L397 assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; 586#L404 stop_simulation_#res := stop_simulation_~__retres2~0; 606#L405 start_simulation_#t~ret4 := stop_simulation_#res;assume { :end_inline_stop_simulation } true;start_simulation_~tmp~3 := start_simulation_#t~ret4;havoc start_simulation_#t~ret4; 554#L439 assume !(0 != start_simulation_~tmp~3); 555#L422-3 [2018-11-18 08:34:41,108 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 08:34:41,108 INFO L82 PathProgramCache]: Analyzing trace with hash 531269841, now seen corresponding path program 1 times [2018-11-18 08:34:41,108 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-18 08:34:41,109 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-18 08:34:41,109 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 08:34:41,109 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 08:34:41,110 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 08:34:41,117 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 08:34:41,132 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 08:34:41,133 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 08:34:41,133 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-18 08:34:41,133 INFO L799 eck$LassoCheckResult]: stem already infeasible [2018-11-18 08:34:41,133 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 08:34:41,133 INFO L82 PathProgramCache]: Analyzing trace with hash -852125441, now seen corresponding path program 2 times [2018-11-18 08:34:41,133 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-18 08:34:41,133 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-18 08:34:41,134 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 08:34:41,134 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 08:34:41,134 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 08:34:41,140 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 08:34:41,157 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 08:34:41,157 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 08:34:41,157 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-18 08:34:41,158 INFO L811 eck$LassoCheckResult]: loop already infeasible [2018-11-18 08:34:41,158 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-18 08:34:41,158 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-18 08:34:41,158 INFO L87 Difference]: Start difference. First operand 119 states and 184 transitions. cyclomatic complexity: 66 Second operand 3 states. [2018-11-18 08:34:41,173 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 08:34:41,173 INFO L93 Difference]: Finished difference Result 119 states and 183 transitions. [2018-11-18 08:34:41,173 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-18 08:34:41,173 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 119 states and 183 transitions. [2018-11-18 08:34:41,175 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 73 [2018-11-18 08:34:41,176 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 119 states to 119 states and 183 transitions. [2018-11-18 08:34:41,176 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 119 [2018-11-18 08:34:41,176 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 119 [2018-11-18 08:34:41,176 INFO L73 IsDeterministic]: Start isDeterministic. Operand 119 states and 183 transitions. [2018-11-18 08:34:41,177 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2018-11-18 08:34:41,177 INFO L705 BuchiCegarLoop]: Abstraction has 119 states and 183 transitions. [2018-11-18 08:34:41,178 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 119 states and 183 transitions. [2018-11-18 08:34:41,182 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 119 to 119. [2018-11-18 08:34:41,182 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 119 states. [2018-11-18 08:34:41,182 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 119 states to 119 states and 183 transitions. [2018-11-18 08:34:41,183 INFO L728 BuchiCegarLoop]: Abstraction has 119 states and 183 transitions. [2018-11-18 08:34:41,183 INFO L608 BuchiCegarLoop]: Abstraction has 119 states and 183 transitions. [2018-11-18 08:34:41,183 INFO L442 BuchiCegarLoop]: ======== Iteration 4============ [2018-11-18 08:34:41,183 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 119 states and 183 transitions. [2018-11-18 08:34:41,184 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 73 [2018-11-18 08:34:41,184 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2018-11-18 08:34:41,184 INFO L119 BuchiIsEmpty]: Starting construction of run [2018-11-18 08:34:41,185 INFO L866 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 08:34:41,185 INFO L867 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 08:34:41,185 INFO L794 eck$LassoCheckResult]: Stem: 864#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;~b0_val~0 := 0;~b0_val_t~0 := 0;~b0_ev~0 := 0;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_val_t~0 := 0;~b1_ev~0 := 0;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_val_t~0 := 0;~d0_ev~0 := 0;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_val_t~0 := 0;~d1_ev~0 := 0;~d1_req_up~0 := 0;~z_val~0 := 0;~z_val_t~0 := 0;~z_ev~0 := 0;~z_req_up~0 := 0;~comp_m1_st~0 := 0;~comp_m1_i~0 := 0; 768#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res;havoc main_~__retres1~2;havoc main_~__retres1~2;assume { :begin_inline_init_model } true;~b0_val~0 := 0;~b0_ev~0 := 2;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_ev~0 := 2;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_ev~0 := 2;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_ev~0 := 2;~d1_req_up~0 := 0;~z_val~0 := 0;~z_ev~0 := 2;~z_req_up~0 := 0;~b0_val_t~0 := 1;~b0_req_up~0 := 1;~b1_val_t~0 := 1;~b1_req_up~0 := 1;~d0_val_t~0 := 1;~d0_req_up~0 := 1;~d1_val_t~0 := 1;~d1_req_up~0 := 1;~comp_m1_i~0 := 0; 769#L480 assume { :end_inline_init_model } true;assume { :begin_inline_start_simulation } true;havoc start_simulation_#t~ret4, start_simulation_~kernel_st~0, start_simulation_~tmp~3;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;start_simulation_~kernel_st~0 := 0;assume { :begin_inline_update_channels } true; 818#L202 assume 1 == ~b0_req_up~0;assume { :begin_inline_update_b0 } true; 823#L127 assume ~b0_val~0 != ~b0_val_t~0;~b0_val~0 := ~b0_val_t~0;~b0_ev~0 := 0; 832#L127-2 ~b0_req_up~0 := 0; 833#L135 assume { :end_inline_update_b0 } true; 803#L202-2 assume 1 == ~b1_req_up~0;assume { :begin_inline_update_b1 } true; 788#L142 assume !(~b1_val~0 != ~b1_val_t~0); 776#L142-2 ~b1_req_up~0 := 0; 777#L150 assume { :end_inline_update_b1 } true; 810#L209-1 assume !(1 == ~d0_req_up~0); 812#L216-1 assume !(1 == ~d1_req_up~0); 806#L223-1 assume !(1 == ~z_req_up~0); 752#L230-1 assume { :end_inline_update_channels } true;assume { :begin_inline_init_threads } true; 753#L245 assume !(1 == ~comp_m1_i~0);~comp_m1_st~0 := 2; 848#L245-2 assume { :end_inline_init_threads } true;assume { :begin_inline_fire_delta_events } true; 849#L311 assume !(0 == ~b0_ev~0); 861#L311-2 assume !(0 == ~b1_ev~0); 863#L316-1 assume !(0 == ~d0_ev~0); 760#L321-1 assume 0 == ~d1_ev~0;~d1_ev~0 := 1; 761#L326-1 assume !(0 == ~z_ev~0); 814#L331-1 assume { :end_inline_fire_delta_events } true;assume { :begin_inline_activate_threads } true;havoc activate_threads_#t~ret2, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;assume { :begin_inline_is_method1_triggered } true;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 835#L97 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 783#L119 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 784#L120 activate_threads_#t~ret2 := is_method1_triggered_#res;assume { :end_inline_is_method1_triggered } true;activate_threads_~tmp~1 := activate_threads_#t~ret2;havoc activate_threads_#t~ret2; 785#L380 assume !(0 != activate_threads_~tmp~1); 856#L380-2 assume { :end_inline_activate_threads } true;assume { :begin_inline_reset_delta_events } true; 858#L344 assume !(1 == ~b0_ev~0); 860#L344-2 assume !(1 == ~b1_ev~0); 862#L349-1 assume !(1 == ~d0_ev~0); 756#L354-1 assume 1 == ~d1_ev~0;~d1_ev~0 := 2; 757#L359-1 assume !(1 == ~z_ev~0); 813#L364-1 assume { :end_inline_reset_delta_events } true; 800#L422-3 [2018-11-18 08:34:41,186 INFO L796 eck$LassoCheckResult]: Loop: 800#L422-3 assume true; 815#L422-1 assume !false; 827#L423 start_simulation_~kernel_st~0 := 1;assume { :begin_inline_eval } true;havoc eval_#t~ret0, eval_#t~nondet1, eval_~tmp~0, eval_~tmp___0~0;havoc eval_~tmp~0;havoc eval_~tmp___0~0; 758#L285 assume true; 759#L275-1 assume !false; 821#L276 assume { :begin_inline_exists_runnable_thread } true;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 822#L258 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 819#L265 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 770#L266 eval_#t~ret0 := exists_runnable_thread_#res;assume { :end_inline_exists_runnable_thread } true;eval_~tmp___0~0 := eval_#t~ret0;havoc eval_#t~ret0; 771#L280 assume !(0 != eval_~tmp___0~0); 826#L301 assume { :end_inline_eval } true;start_simulation_~kernel_st~0 := 2;assume { :begin_inline_update_channels } true; 801#L202-3 assume !(1 == ~b0_req_up~0); 792#L202-5 assume !(1 == ~b1_req_up~0); 793#L209-3 assume !(1 == ~d0_req_up~0); 808#L216-3 assume !(1 == ~d1_req_up~0); 804#L223-3 assume !(1 == ~z_req_up~0); 786#L230-3 assume { :end_inline_update_channels } true;start_simulation_~kernel_st~0 := 3;assume { :begin_inline_fire_delta_events } true; 787#L311-3 assume !(0 == ~b0_ev~0); 852#L311-5 assume 0 == ~b1_ev~0;~b1_ev~0 := 1; 855#L316-3 assume 0 == ~d0_ev~0;~d0_ev~0 := 1; 869#L321-3 assume 0 == ~d1_ev~0;~d1_ev~0 := 1; 794#L326-3 assume 0 == ~z_ev~0;~z_ev~0 := 1; 795#L331-3 assume { :end_inline_fire_delta_events } true;assume { :begin_inline_activate_threads } true;havoc activate_threads_#t~ret2, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;assume { :begin_inline_is_method1_triggered } true;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 825#L97-1 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 779#L119-1 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 780#L120-1 activate_threads_#t~ret2 := is_method1_triggered_#res;assume { :end_inline_is_method1_triggered } true;activate_threads_~tmp~1 := activate_threads_#t~ret2;havoc activate_threads_#t~ret2; 781#L380-3 assume 0 != activate_threads_~tmp~1;~comp_m1_st~0 := 0; 842#L380-5 assume { :end_inline_activate_threads } true;assume { :begin_inline_reset_delta_events } true; 846#L344-3 assume !(1 == ~b0_ev~0); 853#L344-5 assume 1 == ~b1_ev~0;~b1_ev~0 := 2; 854#L349-3 assume 1 == ~d0_ev~0;~d0_ev~0 := 2; 766#L354-3 assume 1 == ~d1_ev~0;~d1_ev~0 := 2; 767#L359-3 assume 1 == ~z_ev~0;~z_ev~0 := 2; 791#L364-3 assume { :end_inline_reset_delta_events } true;assume { :begin_inline_stop_simulation } true;havoc stop_simulation_#res;havoc stop_simulation_#t~ret3, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;assume { :begin_inline_exists_runnable_thread } true;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 824#L258-1 assume !(0 == ~comp_m1_st~0);exists_runnable_thread_~__retres1~1 := 0; 816#L265-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 817#L266-1 stop_simulation_#t~ret3 := exists_runnable_thread_#res;assume { :end_inline_exists_runnable_thread } true;stop_simulation_~tmp~2 := stop_simulation_#t~ret3;havoc stop_simulation_#t~ret3; 830#L397 assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; 831#L404 stop_simulation_#res := stop_simulation_~__retres2~0; 851#L405 start_simulation_#t~ret4 := stop_simulation_#res;assume { :end_inline_stop_simulation } true;start_simulation_~tmp~3 := start_simulation_#t~ret4;havoc start_simulation_#t~ret4; 799#L439 assume !(0 != start_simulation_~tmp~3); 800#L422-3 [2018-11-18 08:34:41,186 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 08:34:41,186 INFO L82 PathProgramCache]: Analyzing trace with hash 1296388927, now seen corresponding path program 1 times [2018-11-18 08:34:41,186 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-18 08:34:41,186 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-18 08:34:41,187 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 08:34:41,187 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-18 08:34:41,187 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 08:34:41,193 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 08:34:41,215 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 08:34:41,215 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 08:34:41,216 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-18 08:34:41,216 INFO L799 eck$LassoCheckResult]: stem already infeasible [2018-11-18 08:34:41,216 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 08:34:41,216 INFO L82 PathProgramCache]: Analyzing trace with hash -852125441, now seen corresponding path program 3 times [2018-11-18 08:34:41,216 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-18 08:34:41,216 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-18 08:34:41,217 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 08:34:41,217 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 08:34:41,217 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 08:34:41,222 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 08:34:41,234 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 08:34:41,234 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 08:34:41,234 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-18 08:34:41,234 INFO L811 eck$LassoCheckResult]: loop already infeasible [2018-11-18 08:34:41,235 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-18 08:34:41,235 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-18 08:34:41,235 INFO L87 Difference]: Start difference. First operand 119 states and 183 transitions. cyclomatic complexity: 65 Second operand 3 states. [2018-11-18 08:34:41,263 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 08:34:41,263 INFO L93 Difference]: Finished difference Result 119 states and 182 transitions. [2018-11-18 08:34:41,264 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-18 08:34:41,264 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 119 states and 182 transitions. [2018-11-18 08:34:41,265 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 73 [2018-11-18 08:34:41,265 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 119 states to 119 states and 182 transitions. [2018-11-18 08:34:41,265 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 119 [2018-11-18 08:34:41,266 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 119 [2018-11-18 08:34:41,266 INFO L73 IsDeterministic]: Start isDeterministic. Operand 119 states and 182 transitions. [2018-11-18 08:34:41,266 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2018-11-18 08:34:41,266 INFO L705 BuchiCegarLoop]: Abstraction has 119 states and 182 transitions. [2018-11-18 08:34:41,267 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 119 states and 182 transitions. [2018-11-18 08:34:41,270 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 119 to 119. [2018-11-18 08:34:41,270 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 119 states. [2018-11-18 08:34:41,270 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 119 states to 119 states and 182 transitions. [2018-11-18 08:34:41,270 INFO L728 BuchiCegarLoop]: Abstraction has 119 states and 182 transitions. [2018-11-18 08:34:41,271 INFO L608 BuchiCegarLoop]: Abstraction has 119 states and 182 transitions. [2018-11-18 08:34:41,271 INFO L442 BuchiCegarLoop]: ======== Iteration 5============ [2018-11-18 08:34:41,271 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 119 states and 182 transitions. [2018-11-18 08:34:41,271 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 73 [2018-11-18 08:34:41,272 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2018-11-18 08:34:41,272 INFO L119 BuchiIsEmpty]: Starting construction of run [2018-11-18 08:34:41,272 INFO L866 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 08:34:41,273 INFO L867 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 08:34:41,273 INFO L794 eck$LassoCheckResult]: Stem: 1109#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;~b0_val~0 := 0;~b0_val_t~0 := 0;~b0_ev~0 := 0;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_val_t~0 := 0;~b1_ev~0 := 0;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_val_t~0 := 0;~d0_ev~0 := 0;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_val_t~0 := 0;~d1_ev~0 := 0;~d1_req_up~0 := 0;~z_val~0 := 0;~z_val_t~0 := 0;~z_ev~0 := 0;~z_req_up~0 := 0;~comp_m1_st~0 := 0;~comp_m1_i~0 := 0; 1013#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res;havoc main_~__retres1~2;havoc main_~__retres1~2;assume { :begin_inline_init_model } true;~b0_val~0 := 0;~b0_ev~0 := 2;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_ev~0 := 2;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_ev~0 := 2;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_ev~0 := 2;~d1_req_up~0 := 0;~z_val~0 := 0;~z_ev~0 := 2;~z_req_up~0 := 0;~b0_val_t~0 := 1;~b0_req_up~0 := 1;~b1_val_t~0 := 1;~b1_req_up~0 := 1;~d0_val_t~0 := 1;~d0_req_up~0 := 1;~d1_val_t~0 := 1;~d1_req_up~0 := 1;~comp_m1_i~0 := 0; 1014#L480 assume { :end_inline_init_model } true;assume { :begin_inline_start_simulation } true;havoc start_simulation_#t~ret4, start_simulation_~kernel_st~0, start_simulation_~tmp~3;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;start_simulation_~kernel_st~0 := 0;assume { :begin_inline_update_channels } true; 1063#L202 assume 1 == ~b0_req_up~0;assume { :begin_inline_update_b0 } true; 1068#L127 assume ~b0_val~0 != ~b0_val_t~0;~b0_val~0 := ~b0_val_t~0;~b0_ev~0 := 0; 1077#L127-2 ~b0_req_up~0 := 0; 1078#L135 assume { :end_inline_update_b0 } true; 1048#L202-2 assume 1 == ~b1_req_up~0;assume { :begin_inline_update_b1 } true; 1033#L142 assume ~b1_val~0 != ~b1_val_t~0;~b1_val~0 := ~b1_val_t~0;~b1_ev~0 := 0; 1021#L142-2 ~b1_req_up~0 := 0; 1022#L150 assume { :end_inline_update_b1 } true; 1055#L209-1 assume !(1 == ~d0_req_up~0); 1057#L216-1 assume !(1 == ~d1_req_up~0); 1051#L223-1 assume !(1 == ~z_req_up~0); 997#L230-1 assume { :end_inline_update_channels } true;assume { :begin_inline_init_threads } true; 998#L245 assume !(1 == ~comp_m1_i~0);~comp_m1_st~0 := 2; 1093#L245-2 assume { :end_inline_init_threads } true;assume { :begin_inline_fire_delta_events } true; 1094#L311 assume !(0 == ~b0_ev~0); 1106#L311-2 assume !(0 == ~b1_ev~0); 1108#L316-1 assume !(0 == ~d0_ev~0); 1005#L321-1 assume 0 == ~d1_ev~0;~d1_ev~0 := 1; 1006#L326-1 assume !(0 == ~z_ev~0); 1059#L331-1 assume { :end_inline_fire_delta_events } true;assume { :begin_inline_activate_threads } true;havoc activate_threads_#t~ret2, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;assume { :begin_inline_is_method1_triggered } true;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 1080#L97 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 1028#L119 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 1029#L120 activate_threads_#t~ret2 := is_method1_triggered_#res;assume { :end_inline_is_method1_triggered } true;activate_threads_~tmp~1 := activate_threads_#t~ret2;havoc activate_threads_#t~ret2; 1030#L380 assume !(0 != activate_threads_~tmp~1); 1101#L380-2 assume { :end_inline_activate_threads } true;assume { :begin_inline_reset_delta_events } true; 1103#L344 assume !(1 == ~b0_ev~0); 1105#L344-2 assume !(1 == ~b1_ev~0); 1107#L349-1 assume !(1 == ~d0_ev~0); 1001#L354-1 assume 1 == ~d1_ev~0;~d1_ev~0 := 2; 1002#L359-1 assume !(1 == ~z_ev~0); 1058#L364-1 assume { :end_inline_reset_delta_events } true; 1045#L422-3 [2018-11-18 08:34:41,273 INFO L796 eck$LassoCheckResult]: Loop: 1045#L422-3 assume true; 1060#L422-1 assume !false; 1072#L423 start_simulation_~kernel_st~0 := 1;assume { :begin_inline_eval } true;havoc eval_#t~ret0, eval_#t~nondet1, eval_~tmp~0, eval_~tmp___0~0;havoc eval_~tmp~0;havoc eval_~tmp___0~0; 1003#L285 assume true; 1004#L275-1 assume !false; 1066#L276 assume { :begin_inline_exists_runnable_thread } true;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 1067#L258 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 1064#L265 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 1015#L266 eval_#t~ret0 := exists_runnable_thread_#res;assume { :end_inline_exists_runnable_thread } true;eval_~tmp___0~0 := eval_#t~ret0;havoc eval_#t~ret0; 1016#L280 assume !(0 != eval_~tmp___0~0); 1071#L301 assume { :end_inline_eval } true;start_simulation_~kernel_st~0 := 2;assume { :begin_inline_update_channels } true; 1046#L202-3 assume !(1 == ~b0_req_up~0); 1037#L202-5 assume !(1 == ~b1_req_up~0); 1038#L209-3 assume !(1 == ~d0_req_up~0); 1053#L216-3 assume !(1 == ~d1_req_up~0); 1049#L223-3 assume !(1 == ~z_req_up~0); 1031#L230-3 assume { :end_inline_update_channels } true;start_simulation_~kernel_st~0 := 3;assume { :begin_inline_fire_delta_events } true; 1032#L311-3 assume !(0 == ~b0_ev~0); 1097#L311-5 assume 0 == ~b1_ev~0;~b1_ev~0 := 1; 1100#L316-3 assume 0 == ~d0_ev~0;~d0_ev~0 := 1; 1114#L321-3 assume 0 == ~d1_ev~0;~d1_ev~0 := 1; 1039#L326-3 assume 0 == ~z_ev~0;~z_ev~0 := 1; 1040#L331-3 assume { :end_inline_fire_delta_events } true;assume { :begin_inline_activate_threads } true;havoc activate_threads_#t~ret2, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;assume { :begin_inline_is_method1_triggered } true;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 1070#L97-1 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 1024#L119-1 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 1025#L120-1 activate_threads_#t~ret2 := is_method1_triggered_#res;assume { :end_inline_is_method1_triggered } true;activate_threads_~tmp~1 := activate_threads_#t~ret2;havoc activate_threads_#t~ret2; 1026#L380-3 assume 0 != activate_threads_~tmp~1;~comp_m1_st~0 := 0; 1087#L380-5 assume { :end_inline_activate_threads } true;assume { :begin_inline_reset_delta_events } true; 1091#L344-3 assume !(1 == ~b0_ev~0); 1098#L344-5 assume 1 == ~b1_ev~0;~b1_ev~0 := 2; 1099#L349-3 assume 1 == ~d0_ev~0;~d0_ev~0 := 2; 1011#L354-3 assume 1 == ~d1_ev~0;~d1_ev~0 := 2; 1012#L359-3 assume 1 == ~z_ev~0;~z_ev~0 := 2; 1036#L364-3 assume { :end_inline_reset_delta_events } true;assume { :begin_inline_stop_simulation } true;havoc stop_simulation_#res;havoc stop_simulation_#t~ret3, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;assume { :begin_inline_exists_runnable_thread } true;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 1069#L258-1 assume !(0 == ~comp_m1_st~0);exists_runnable_thread_~__retres1~1 := 0; 1061#L265-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 1062#L266-1 stop_simulation_#t~ret3 := exists_runnable_thread_#res;assume { :end_inline_exists_runnable_thread } true;stop_simulation_~tmp~2 := stop_simulation_#t~ret3;havoc stop_simulation_#t~ret3; 1075#L397 assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; 1076#L404 stop_simulation_#res := stop_simulation_~__retres2~0; 1096#L405 start_simulation_#t~ret4 := stop_simulation_#res;assume { :end_inline_stop_simulation } true;start_simulation_~tmp~3 := start_simulation_#t~ret4;havoc start_simulation_#t~ret4; 1044#L439 assume !(0 != start_simulation_~tmp~3); 1045#L422-3 [2018-11-18 08:34:41,273 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 08:34:41,273 INFO L82 PathProgramCache]: Analyzing trace with hash 1234349313, now seen corresponding path program 1 times [2018-11-18 08:34:41,273 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-18 08:34:41,274 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-18 08:34:41,274 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 08:34:41,274 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-18 08:34:41,274 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 08:34:41,280 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 08:34:41,299 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 08:34:41,299 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 08:34:41,299 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-18 08:34:41,300 INFO L799 eck$LassoCheckResult]: stem already infeasible [2018-11-18 08:34:41,300 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 08:34:41,300 INFO L82 PathProgramCache]: Analyzing trace with hash -852125441, now seen corresponding path program 4 times [2018-11-18 08:34:41,300 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-18 08:34:41,300 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-18 08:34:41,301 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 08:34:41,301 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 08:34:41,301 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 08:34:41,305 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 08:34:41,320 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 08:34:41,320 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 08:34:41,320 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-18 08:34:41,321 INFO L811 eck$LassoCheckResult]: loop already infeasible [2018-11-18 08:34:41,321 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-18 08:34:41,321 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-18 08:34:41,321 INFO L87 Difference]: Start difference. First operand 119 states and 182 transitions. cyclomatic complexity: 64 Second operand 3 states. [2018-11-18 08:34:41,326 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 08:34:41,326 INFO L93 Difference]: Finished difference Result 119 states and 181 transitions. [2018-11-18 08:34:41,327 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-18 08:34:41,327 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 119 states and 181 transitions. [2018-11-18 08:34:41,328 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 73 [2018-11-18 08:34:41,328 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 119 states to 119 states and 181 transitions. [2018-11-18 08:34:41,328 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 119 [2018-11-18 08:34:41,329 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 119 [2018-11-18 08:34:41,329 INFO L73 IsDeterministic]: Start isDeterministic. Operand 119 states and 181 transitions. [2018-11-18 08:34:41,329 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2018-11-18 08:34:41,329 INFO L705 BuchiCegarLoop]: Abstraction has 119 states and 181 transitions. [2018-11-18 08:34:41,330 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 119 states and 181 transitions. [2018-11-18 08:34:41,332 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 119 to 119. [2018-11-18 08:34:41,332 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 119 states. [2018-11-18 08:34:41,333 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 119 states to 119 states and 181 transitions. [2018-11-18 08:34:41,333 INFO L728 BuchiCegarLoop]: Abstraction has 119 states and 181 transitions. [2018-11-18 08:34:41,333 INFO L608 BuchiCegarLoop]: Abstraction has 119 states and 181 transitions. [2018-11-18 08:34:41,333 INFO L442 BuchiCegarLoop]: ======== Iteration 6============ [2018-11-18 08:34:41,333 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 119 states and 181 transitions. [2018-11-18 08:34:41,334 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 73 [2018-11-18 08:34:41,334 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2018-11-18 08:34:41,334 INFO L119 BuchiIsEmpty]: Starting construction of run [2018-11-18 08:34:41,335 INFO L866 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 08:34:41,335 INFO L867 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 08:34:41,336 INFO L794 eck$LassoCheckResult]: Stem: 1354#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;~b0_val~0 := 0;~b0_val_t~0 := 0;~b0_ev~0 := 0;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_val_t~0 := 0;~b1_ev~0 := 0;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_val_t~0 := 0;~d0_ev~0 := 0;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_val_t~0 := 0;~d1_ev~0 := 0;~d1_req_up~0 := 0;~z_val~0 := 0;~z_val_t~0 := 0;~z_ev~0 := 0;~z_req_up~0 := 0;~comp_m1_st~0 := 0;~comp_m1_i~0 := 0; 1258#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res;havoc main_~__retres1~2;havoc main_~__retres1~2;assume { :begin_inline_init_model } true;~b0_val~0 := 0;~b0_ev~0 := 2;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_ev~0 := 2;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_ev~0 := 2;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_ev~0 := 2;~d1_req_up~0 := 0;~z_val~0 := 0;~z_ev~0 := 2;~z_req_up~0 := 0;~b0_val_t~0 := 1;~b0_req_up~0 := 1;~b1_val_t~0 := 1;~b1_req_up~0 := 1;~d0_val_t~0 := 1;~d0_req_up~0 := 1;~d1_val_t~0 := 1;~d1_req_up~0 := 1;~comp_m1_i~0 := 0; 1259#L480 assume { :end_inline_init_model } true;assume { :begin_inline_start_simulation } true;havoc start_simulation_#t~ret4, start_simulation_~kernel_st~0, start_simulation_~tmp~3;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;start_simulation_~kernel_st~0 := 0;assume { :begin_inline_update_channels } true; 1308#L202 assume 1 == ~b0_req_up~0;assume { :begin_inline_update_b0 } true; 1313#L127 assume ~b0_val~0 != ~b0_val_t~0;~b0_val~0 := ~b0_val_t~0;~b0_ev~0 := 0; 1322#L127-2 ~b0_req_up~0 := 0; 1323#L135 assume { :end_inline_update_b0 } true; 1293#L202-2 assume 1 == ~b1_req_up~0;assume { :begin_inline_update_b1 } true; 1278#L142 assume ~b1_val~0 != ~b1_val_t~0;~b1_val~0 := ~b1_val_t~0;~b1_ev~0 := 0; 1266#L142-2 ~b1_req_up~0 := 0; 1267#L150 assume { :end_inline_update_b1 } true; 1300#L209-1 assume 1 == ~d0_req_up~0;assume { :begin_inline_update_d0 } true; 1337#L157 assume !(~d0_val~0 != ~d0_val_t~0); 1333#L157-2 ~d0_req_up~0 := 0; 1334#L165 assume { :end_inline_update_d0 } true; 1302#L216-1 assume !(1 == ~d1_req_up~0); 1296#L223-1 assume !(1 == ~z_req_up~0); 1242#L230-1 assume { :end_inline_update_channels } true;assume { :begin_inline_init_threads } true; 1243#L245 assume !(1 == ~comp_m1_i~0);~comp_m1_st~0 := 2; 1338#L245-2 assume { :end_inline_init_threads } true;assume { :begin_inline_fire_delta_events } true; 1339#L311 assume !(0 == ~b0_ev~0); 1351#L311-2 assume !(0 == ~b1_ev~0); 1353#L316-1 assume !(0 == ~d0_ev~0); 1250#L321-1 assume 0 == ~d1_ev~0;~d1_ev~0 := 1; 1251#L326-1 assume !(0 == ~z_ev~0); 1304#L331-1 assume { :end_inline_fire_delta_events } true;assume { :begin_inline_activate_threads } true;havoc activate_threads_#t~ret2, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;assume { :begin_inline_is_method1_triggered } true;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 1325#L97 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 1273#L119 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 1274#L120 activate_threads_#t~ret2 := is_method1_triggered_#res;assume { :end_inline_is_method1_triggered } true;activate_threads_~tmp~1 := activate_threads_#t~ret2;havoc activate_threads_#t~ret2; 1275#L380 assume !(0 != activate_threads_~tmp~1); 1346#L380-2 assume { :end_inline_activate_threads } true;assume { :begin_inline_reset_delta_events } true; 1348#L344 assume !(1 == ~b0_ev~0); 1350#L344-2 assume !(1 == ~b1_ev~0); 1352#L349-1 assume !(1 == ~d0_ev~0); 1246#L354-1 assume 1 == ~d1_ev~0;~d1_ev~0 := 2; 1247#L359-1 assume !(1 == ~z_ev~0); 1303#L364-1 assume { :end_inline_reset_delta_events } true; 1290#L422-3 [2018-11-18 08:34:41,336 INFO L796 eck$LassoCheckResult]: Loop: 1290#L422-3 assume true; 1305#L422-1 assume !false; 1317#L423 start_simulation_~kernel_st~0 := 1;assume { :begin_inline_eval } true;havoc eval_#t~ret0, eval_#t~nondet1, eval_~tmp~0, eval_~tmp___0~0;havoc eval_~tmp~0;havoc eval_~tmp___0~0; 1248#L285 assume true; 1249#L275-1 assume !false; 1311#L276 assume { :begin_inline_exists_runnable_thread } true;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 1312#L258 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 1309#L265 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 1260#L266 eval_#t~ret0 := exists_runnable_thread_#res;assume { :end_inline_exists_runnable_thread } true;eval_~tmp___0~0 := eval_#t~ret0;havoc eval_#t~ret0; 1261#L280 assume !(0 != eval_~tmp___0~0); 1316#L301 assume { :end_inline_eval } true;start_simulation_~kernel_st~0 := 2;assume { :begin_inline_update_channels } true; 1291#L202-3 assume !(1 == ~b0_req_up~0); 1282#L202-5 assume !(1 == ~b1_req_up~0); 1283#L209-3 assume !(1 == ~d0_req_up~0); 1298#L216-3 assume !(1 == ~d1_req_up~0); 1294#L223-3 assume !(1 == ~z_req_up~0); 1276#L230-3 assume { :end_inline_update_channels } true;start_simulation_~kernel_st~0 := 3;assume { :begin_inline_fire_delta_events } true; 1277#L311-3 assume !(0 == ~b0_ev~0); 1342#L311-5 assume 0 == ~b1_ev~0;~b1_ev~0 := 1; 1345#L316-3 assume 0 == ~d0_ev~0;~d0_ev~0 := 1; 1359#L321-3 assume 0 == ~d1_ev~0;~d1_ev~0 := 1; 1284#L326-3 assume 0 == ~z_ev~0;~z_ev~0 := 1; 1285#L331-3 assume { :end_inline_fire_delta_events } true;assume { :begin_inline_activate_threads } true;havoc activate_threads_#t~ret2, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;assume { :begin_inline_is_method1_triggered } true;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 1315#L97-1 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 1269#L119-1 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 1270#L120-1 activate_threads_#t~ret2 := is_method1_triggered_#res;assume { :end_inline_is_method1_triggered } true;activate_threads_~tmp~1 := activate_threads_#t~ret2;havoc activate_threads_#t~ret2; 1271#L380-3 assume 0 != activate_threads_~tmp~1;~comp_m1_st~0 := 0; 1332#L380-5 assume { :end_inline_activate_threads } true;assume { :begin_inline_reset_delta_events } true; 1336#L344-3 assume !(1 == ~b0_ev~0); 1343#L344-5 assume 1 == ~b1_ev~0;~b1_ev~0 := 2; 1344#L349-3 assume 1 == ~d0_ev~0;~d0_ev~0 := 2; 1256#L354-3 assume 1 == ~d1_ev~0;~d1_ev~0 := 2; 1257#L359-3 assume 1 == ~z_ev~0;~z_ev~0 := 2; 1281#L364-3 assume { :end_inline_reset_delta_events } true;assume { :begin_inline_stop_simulation } true;havoc stop_simulation_#res;havoc stop_simulation_#t~ret3, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;assume { :begin_inline_exists_runnable_thread } true;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 1314#L258-1 assume !(0 == ~comp_m1_st~0);exists_runnable_thread_~__retres1~1 := 0; 1306#L265-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 1307#L266-1 stop_simulation_#t~ret3 := exists_runnable_thread_#res;assume { :end_inline_exists_runnable_thread } true;stop_simulation_~tmp~2 := stop_simulation_#t~ret3;havoc stop_simulation_#t~ret3; 1320#L397 assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; 1321#L404 stop_simulation_#res := stop_simulation_~__retres2~0; 1341#L405 start_simulation_#t~ret4 := stop_simulation_#res;assume { :end_inline_stop_simulation } true;start_simulation_~tmp~3 := start_simulation_#t~ret4;havoc start_simulation_#t~ret4; 1289#L439 assume !(0 != start_simulation_~tmp~3); 1290#L422-3 [2018-11-18 08:34:41,336 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 08:34:41,336 INFO L82 PathProgramCache]: Analyzing trace with hash -2115080082, now seen corresponding path program 1 times [2018-11-18 08:34:41,336 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-18 08:34:41,337 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-18 08:34:41,337 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 08:34:41,337 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-18 08:34:41,338 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 08:34:41,343 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 08:34:41,367 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 08:34:41,368 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 08:34:41,368 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-18 08:34:41,368 INFO L799 eck$LassoCheckResult]: stem already infeasible [2018-11-18 08:34:41,368 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 08:34:41,368 INFO L82 PathProgramCache]: Analyzing trace with hash -852125441, now seen corresponding path program 5 times [2018-11-18 08:34:41,368 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-18 08:34:41,368 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-18 08:34:41,369 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 08:34:41,369 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 08:34:41,369 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 08:34:41,373 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 08:34:41,383 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 08:34:41,384 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 08:34:41,384 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-18 08:34:41,384 INFO L811 eck$LassoCheckResult]: loop already infeasible [2018-11-18 08:34:41,384 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-18 08:34:41,384 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-18 08:34:41,384 INFO L87 Difference]: Start difference. First operand 119 states and 181 transitions. cyclomatic complexity: 63 Second operand 3 states. [2018-11-18 08:34:41,402 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 08:34:41,402 INFO L93 Difference]: Finished difference Result 119 states and 180 transitions. [2018-11-18 08:34:41,402 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-18 08:34:41,402 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 119 states and 180 transitions. [2018-11-18 08:34:41,403 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 73 [2018-11-18 08:34:41,404 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 119 states to 119 states and 180 transitions. [2018-11-18 08:34:41,404 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 119 [2018-11-18 08:34:41,404 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 119 [2018-11-18 08:34:41,404 INFO L73 IsDeterministic]: Start isDeterministic. Operand 119 states and 180 transitions. [2018-11-18 08:34:41,405 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2018-11-18 08:34:41,405 INFO L705 BuchiCegarLoop]: Abstraction has 119 states and 180 transitions. [2018-11-18 08:34:41,405 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 119 states and 180 transitions. [2018-11-18 08:34:41,408 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 119 to 119. [2018-11-18 08:34:41,408 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 119 states. [2018-11-18 08:34:41,408 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 119 states to 119 states and 180 transitions. [2018-11-18 08:34:41,408 INFO L728 BuchiCegarLoop]: Abstraction has 119 states and 180 transitions. [2018-11-18 08:34:41,409 INFO L608 BuchiCegarLoop]: Abstraction has 119 states and 180 transitions. [2018-11-18 08:34:41,409 INFO L442 BuchiCegarLoop]: ======== Iteration 7============ [2018-11-18 08:34:41,409 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 119 states and 180 transitions. [2018-11-18 08:34:41,410 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 73 [2018-11-18 08:34:41,410 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2018-11-18 08:34:41,410 INFO L119 BuchiIsEmpty]: Starting construction of run [2018-11-18 08:34:41,411 INFO L866 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 08:34:41,411 INFO L867 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 08:34:41,411 INFO L794 eck$LassoCheckResult]: Stem: 1599#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;~b0_val~0 := 0;~b0_val_t~0 := 0;~b0_ev~0 := 0;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_val_t~0 := 0;~b1_ev~0 := 0;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_val_t~0 := 0;~d0_ev~0 := 0;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_val_t~0 := 0;~d1_ev~0 := 0;~d1_req_up~0 := 0;~z_val~0 := 0;~z_val_t~0 := 0;~z_ev~0 := 0;~z_req_up~0 := 0;~comp_m1_st~0 := 0;~comp_m1_i~0 := 0; 1503#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res;havoc main_~__retres1~2;havoc main_~__retres1~2;assume { :begin_inline_init_model } true;~b0_val~0 := 0;~b0_ev~0 := 2;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_ev~0 := 2;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_ev~0 := 2;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_ev~0 := 2;~d1_req_up~0 := 0;~z_val~0 := 0;~z_ev~0 := 2;~z_req_up~0 := 0;~b0_val_t~0 := 1;~b0_req_up~0 := 1;~b1_val_t~0 := 1;~b1_req_up~0 := 1;~d0_val_t~0 := 1;~d0_req_up~0 := 1;~d1_val_t~0 := 1;~d1_req_up~0 := 1;~comp_m1_i~0 := 0; 1504#L480 assume { :end_inline_init_model } true;assume { :begin_inline_start_simulation } true;havoc start_simulation_#t~ret4, start_simulation_~kernel_st~0, start_simulation_~tmp~3;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;start_simulation_~kernel_st~0 := 0;assume { :begin_inline_update_channels } true; 1553#L202 assume 1 == ~b0_req_up~0;assume { :begin_inline_update_b0 } true; 1558#L127 assume ~b0_val~0 != ~b0_val_t~0;~b0_val~0 := ~b0_val_t~0;~b0_ev~0 := 0; 1567#L127-2 ~b0_req_up~0 := 0; 1568#L135 assume { :end_inline_update_b0 } true; 1538#L202-2 assume 1 == ~b1_req_up~0;assume { :begin_inline_update_b1 } true; 1523#L142 assume ~b1_val~0 != ~b1_val_t~0;~b1_val~0 := ~b1_val_t~0;~b1_ev~0 := 0; 1511#L142-2 ~b1_req_up~0 := 0; 1512#L150 assume { :end_inline_update_b1 } true; 1545#L209-1 assume 1 == ~d0_req_up~0;assume { :begin_inline_update_d0 } true; 1582#L157 assume ~d0_val~0 != ~d0_val_t~0;~d0_val~0 := ~d0_val_t~0;~d0_ev~0 := 0; 1578#L157-2 ~d0_req_up~0 := 0; 1579#L165 assume { :end_inline_update_d0 } true; 1547#L216-1 assume !(1 == ~d1_req_up~0); 1541#L223-1 assume !(1 == ~z_req_up~0); 1487#L230-1 assume { :end_inline_update_channels } true;assume { :begin_inline_init_threads } true; 1488#L245 assume !(1 == ~comp_m1_i~0);~comp_m1_st~0 := 2; 1583#L245-2 assume { :end_inline_init_threads } true;assume { :begin_inline_fire_delta_events } true; 1584#L311 assume !(0 == ~b0_ev~0); 1596#L311-2 assume !(0 == ~b1_ev~0); 1598#L316-1 assume !(0 == ~d0_ev~0); 1495#L321-1 assume 0 == ~d1_ev~0;~d1_ev~0 := 1; 1496#L326-1 assume !(0 == ~z_ev~0); 1549#L331-1 assume { :end_inline_fire_delta_events } true;assume { :begin_inline_activate_threads } true;havoc activate_threads_#t~ret2, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;assume { :begin_inline_is_method1_triggered } true;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 1570#L97 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 1518#L119 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 1519#L120 activate_threads_#t~ret2 := is_method1_triggered_#res;assume { :end_inline_is_method1_triggered } true;activate_threads_~tmp~1 := activate_threads_#t~ret2;havoc activate_threads_#t~ret2; 1520#L380 assume !(0 != activate_threads_~tmp~1); 1591#L380-2 assume { :end_inline_activate_threads } true;assume { :begin_inline_reset_delta_events } true; 1593#L344 assume !(1 == ~b0_ev~0); 1595#L344-2 assume !(1 == ~b1_ev~0); 1597#L349-1 assume !(1 == ~d0_ev~0); 1491#L354-1 assume 1 == ~d1_ev~0;~d1_ev~0 := 2; 1492#L359-1 assume !(1 == ~z_ev~0); 1548#L364-1 assume { :end_inline_reset_delta_events } true; 1535#L422-3 [2018-11-18 08:34:41,411 INFO L796 eck$LassoCheckResult]: Loop: 1535#L422-3 assume true; 1550#L422-1 assume !false; 1562#L423 start_simulation_~kernel_st~0 := 1;assume { :begin_inline_eval } true;havoc eval_#t~ret0, eval_#t~nondet1, eval_~tmp~0, eval_~tmp___0~0;havoc eval_~tmp~0;havoc eval_~tmp___0~0; 1493#L285 assume true; 1494#L275-1 assume !false; 1556#L276 assume { :begin_inline_exists_runnable_thread } true;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 1557#L258 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 1554#L265 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 1505#L266 eval_#t~ret0 := exists_runnable_thread_#res;assume { :end_inline_exists_runnable_thread } true;eval_~tmp___0~0 := eval_#t~ret0;havoc eval_#t~ret0; 1506#L280 assume !(0 != eval_~tmp___0~0); 1561#L301 assume { :end_inline_eval } true;start_simulation_~kernel_st~0 := 2;assume { :begin_inline_update_channels } true; 1536#L202-3 assume !(1 == ~b0_req_up~0); 1527#L202-5 assume !(1 == ~b1_req_up~0); 1528#L209-3 assume !(1 == ~d0_req_up~0); 1543#L216-3 assume !(1 == ~d1_req_up~0); 1539#L223-3 assume !(1 == ~z_req_up~0); 1521#L230-3 assume { :end_inline_update_channels } true;start_simulation_~kernel_st~0 := 3;assume { :begin_inline_fire_delta_events } true; 1522#L311-3 assume !(0 == ~b0_ev~0); 1587#L311-5 assume 0 == ~b1_ev~0;~b1_ev~0 := 1; 1590#L316-3 assume 0 == ~d0_ev~0;~d0_ev~0 := 1; 1604#L321-3 assume 0 == ~d1_ev~0;~d1_ev~0 := 1; 1529#L326-3 assume 0 == ~z_ev~0;~z_ev~0 := 1; 1530#L331-3 assume { :end_inline_fire_delta_events } true;assume { :begin_inline_activate_threads } true;havoc activate_threads_#t~ret2, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;assume { :begin_inline_is_method1_triggered } true;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 1560#L97-1 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 1514#L119-1 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 1515#L120-1 activate_threads_#t~ret2 := is_method1_triggered_#res;assume { :end_inline_is_method1_triggered } true;activate_threads_~tmp~1 := activate_threads_#t~ret2;havoc activate_threads_#t~ret2; 1516#L380-3 assume 0 != activate_threads_~tmp~1;~comp_m1_st~0 := 0; 1577#L380-5 assume { :end_inline_activate_threads } true;assume { :begin_inline_reset_delta_events } true; 1581#L344-3 assume !(1 == ~b0_ev~0); 1588#L344-5 assume 1 == ~b1_ev~0;~b1_ev~0 := 2; 1589#L349-3 assume 1 == ~d0_ev~0;~d0_ev~0 := 2; 1501#L354-3 assume 1 == ~d1_ev~0;~d1_ev~0 := 2; 1502#L359-3 assume 1 == ~z_ev~0;~z_ev~0 := 2; 1526#L364-3 assume { :end_inline_reset_delta_events } true;assume { :begin_inline_stop_simulation } true;havoc stop_simulation_#res;havoc stop_simulation_#t~ret3, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;assume { :begin_inline_exists_runnable_thread } true;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 1559#L258-1 assume !(0 == ~comp_m1_st~0);exists_runnable_thread_~__retres1~1 := 0; 1551#L265-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 1552#L266-1 stop_simulation_#t~ret3 := exists_runnable_thread_#res;assume { :end_inline_exists_runnable_thread } true;stop_simulation_~tmp~2 := stop_simulation_#t~ret3;havoc stop_simulation_#t~ret3; 1565#L397 assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; 1566#L404 stop_simulation_#res := stop_simulation_~__retres2~0; 1586#L405 start_simulation_#t~ret4 := stop_simulation_#res;assume { :end_inline_stop_simulation } true;start_simulation_~tmp~3 := start_simulation_#t~ret4;havoc start_simulation_#t~ret4; 1534#L439 assume !(0 != start_simulation_~tmp~3); 1535#L422-3 [2018-11-18 08:34:41,411 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 08:34:41,412 INFO L82 PathProgramCache]: Analyzing trace with hash 2039338604, now seen corresponding path program 1 times [2018-11-18 08:34:41,412 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-18 08:34:41,412 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-18 08:34:41,412 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 08:34:41,413 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-18 08:34:41,413 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 08:34:41,417 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 08:34:41,440 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 08:34:41,440 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 08:34:41,440 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-18 08:34:41,441 INFO L799 eck$LassoCheckResult]: stem already infeasible [2018-11-18 08:34:41,441 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 08:34:41,441 INFO L82 PathProgramCache]: Analyzing trace with hash -852125441, now seen corresponding path program 6 times [2018-11-18 08:34:41,441 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-18 08:34:41,441 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-18 08:34:41,442 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 08:34:41,442 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 08:34:41,442 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 08:34:41,445 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 08:34:41,460 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 08:34:41,460 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 08:34:41,460 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-18 08:34:41,461 INFO L811 eck$LassoCheckResult]: loop already infeasible [2018-11-18 08:34:41,461 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-18 08:34:41,461 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-18 08:34:41,461 INFO L87 Difference]: Start difference. First operand 119 states and 180 transitions. cyclomatic complexity: 62 Second operand 3 states. [2018-11-18 08:34:41,487 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 08:34:41,488 INFO L93 Difference]: Finished difference Result 119 states and 179 transitions. [2018-11-18 08:34:41,489 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-18 08:34:41,489 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 119 states and 179 transitions. [2018-11-18 08:34:41,490 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 73 [2018-11-18 08:34:41,490 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 119 states to 119 states and 179 transitions. [2018-11-18 08:34:41,491 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 119 [2018-11-18 08:34:41,491 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 119 [2018-11-18 08:34:41,491 INFO L73 IsDeterministic]: Start isDeterministic. Operand 119 states and 179 transitions. [2018-11-18 08:34:41,491 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2018-11-18 08:34:41,491 INFO L705 BuchiCegarLoop]: Abstraction has 119 states and 179 transitions. [2018-11-18 08:34:41,492 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 119 states and 179 transitions. [2018-11-18 08:34:41,494 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 119 to 119. [2018-11-18 08:34:41,494 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 119 states. [2018-11-18 08:34:41,495 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 119 states to 119 states and 179 transitions. [2018-11-18 08:34:41,495 INFO L728 BuchiCegarLoop]: Abstraction has 119 states and 179 transitions. [2018-11-18 08:34:41,495 INFO L608 BuchiCegarLoop]: Abstraction has 119 states and 179 transitions. [2018-11-18 08:34:41,495 INFO L442 BuchiCegarLoop]: ======== Iteration 8============ [2018-11-18 08:34:41,495 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 119 states and 179 transitions. [2018-11-18 08:34:41,496 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 73 [2018-11-18 08:34:41,496 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2018-11-18 08:34:41,496 INFO L119 BuchiIsEmpty]: Starting construction of run [2018-11-18 08:34:41,497 INFO L866 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 08:34:41,497 INFO L867 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 08:34:41,497 INFO L794 eck$LassoCheckResult]: Stem: 1844#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;~b0_val~0 := 0;~b0_val_t~0 := 0;~b0_ev~0 := 0;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_val_t~0 := 0;~b1_ev~0 := 0;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_val_t~0 := 0;~d0_ev~0 := 0;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_val_t~0 := 0;~d1_ev~0 := 0;~d1_req_up~0 := 0;~z_val~0 := 0;~z_val_t~0 := 0;~z_ev~0 := 0;~z_req_up~0 := 0;~comp_m1_st~0 := 0;~comp_m1_i~0 := 0; 1748#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res;havoc main_~__retres1~2;havoc main_~__retres1~2;assume { :begin_inline_init_model } true;~b0_val~0 := 0;~b0_ev~0 := 2;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_ev~0 := 2;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_ev~0 := 2;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_ev~0 := 2;~d1_req_up~0 := 0;~z_val~0 := 0;~z_ev~0 := 2;~z_req_up~0 := 0;~b0_val_t~0 := 1;~b0_req_up~0 := 1;~b1_val_t~0 := 1;~b1_req_up~0 := 1;~d0_val_t~0 := 1;~d0_req_up~0 := 1;~d1_val_t~0 := 1;~d1_req_up~0 := 1;~comp_m1_i~0 := 0; 1749#L480 assume { :end_inline_init_model } true;assume { :begin_inline_start_simulation } true;havoc start_simulation_#t~ret4, start_simulation_~kernel_st~0, start_simulation_~tmp~3;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;start_simulation_~kernel_st~0 := 0;assume { :begin_inline_update_channels } true; 1798#L202 assume 1 == ~b0_req_up~0;assume { :begin_inline_update_b0 } true; 1803#L127 assume ~b0_val~0 != ~b0_val_t~0;~b0_val~0 := ~b0_val_t~0;~b0_ev~0 := 0; 1812#L127-2 ~b0_req_up~0 := 0; 1813#L135 assume { :end_inline_update_b0 } true; 1783#L202-2 assume 1 == ~b1_req_up~0;assume { :begin_inline_update_b1 } true; 1768#L142 assume ~b1_val~0 != ~b1_val_t~0;~b1_val~0 := ~b1_val_t~0;~b1_ev~0 := 0; 1756#L142-2 ~b1_req_up~0 := 0; 1757#L150 assume { :end_inline_update_b1 } true; 1790#L209-1 assume 1 == ~d0_req_up~0;assume { :begin_inline_update_d0 } true; 1827#L157 assume ~d0_val~0 != ~d0_val_t~0;~d0_val~0 := ~d0_val_t~0;~d0_ev~0 := 0; 1823#L157-2 ~d0_req_up~0 := 0; 1824#L165 assume { :end_inline_update_d0 } true; 1792#L216-1 assume 1 == ~d1_req_up~0;assume { :begin_inline_update_d1 } true; 1791#L172 assume !(~d1_val~0 != ~d1_val_t~0); 1787#L172-2 ~d1_req_up~0 := 0; 1785#L180 assume { :end_inline_update_d1 } true; 1786#L223-1 assume !(1 == ~z_req_up~0); 1732#L230-1 assume { :end_inline_update_channels } true;assume { :begin_inline_init_threads } true; 1733#L245 assume !(1 == ~comp_m1_i~0);~comp_m1_st~0 := 2; 1828#L245-2 assume { :end_inline_init_threads } true;assume { :begin_inline_fire_delta_events } true; 1829#L311 assume !(0 == ~b0_ev~0); 1841#L311-2 assume !(0 == ~b1_ev~0); 1843#L316-1 assume !(0 == ~d0_ev~0); 1740#L321-1 assume 0 == ~d1_ev~0;~d1_ev~0 := 1; 1741#L326-1 assume !(0 == ~z_ev~0); 1794#L331-1 assume { :end_inline_fire_delta_events } true;assume { :begin_inline_activate_threads } true;havoc activate_threads_#t~ret2, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;assume { :begin_inline_is_method1_triggered } true;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 1815#L97 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 1763#L119 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 1764#L120 activate_threads_#t~ret2 := is_method1_triggered_#res;assume { :end_inline_is_method1_triggered } true;activate_threads_~tmp~1 := activate_threads_#t~ret2;havoc activate_threads_#t~ret2; 1765#L380 assume !(0 != activate_threads_~tmp~1); 1836#L380-2 assume { :end_inline_activate_threads } true;assume { :begin_inline_reset_delta_events } true; 1838#L344 assume !(1 == ~b0_ev~0); 1840#L344-2 assume !(1 == ~b1_ev~0); 1842#L349-1 assume !(1 == ~d0_ev~0); 1736#L354-1 assume 1 == ~d1_ev~0;~d1_ev~0 := 2; 1737#L359-1 assume !(1 == ~z_ev~0); 1793#L364-1 assume { :end_inline_reset_delta_events } true; 1780#L422-3 [2018-11-18 08:34:41,497 INFO L796 eck$LassoCheckResult]: Loop: 1780#L422-3 assume true; 1795#L422-1 assume !false; 1807#L423 start_simulation_~kernel_st~0 := 1;assume { :begin_inline_eval } true;havoc eval_#t~ret0, eval_#t~nondet1, eval_~tmp~0, eval_~tmp___0~0;havoc eval_~tmp~0;havoc eval_~tmp___0~0; 1738#L285 assume true; 1739#L275-1 assume !false; 1801#L276 assume { :begin_inline_exists_runnable_thread } true;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 1802#L258 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 1799#L265 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 1750#L266 eval_#t~ret0 := exists_runnable_thread_#res;assume { :end_inline_exists_runnable_thread } true;eval_~tmp___0~0 := eval_#t~ret0;havoc eval_#t~ret0; 1751#L280 assume !(0 != eval_~tmp___0~0); 1806#L301 assume { :end_inline_eval } true;start_simulation_~kernel_st~0 := 2;assume { :begin_inline_update_channels } true; 1781#L202-3 assume !(1 == ~b0_req_up~0); 1772#L202-5 assume !(1 == ~b1_req_up~0); 1773#L209-3 assume !(1 == ~d0_req_up~0); 1788#L216-3 assume !(1 == ~d1_req_up~0); 1784#L223-3 assume !(1 == ~z_req_up~0); 1766#L230-3 assume { :end_inline_update_channels } true;start_simulation_~kernel_st~0 := 3;assume { :begin_inline_fire_delta_events } true; 1767#L311-3 assume !(0 == ~b0_ev~0); 1832#L311-5 assume 0 == ~b1_ev~0;~b1_ev~0 := 1; 1835#L316-3 assume 0 == ~d0_ev~0;~d0_ev~0 := 1; 1849#L321-3 assume 0 == ~d1_ev~0;~d1_ev~0 := 1; 1774#L326-3 assume 0 == ~z_ev~0;~z_ev~0 := 1; 1775#L331-3 assume { :end_inline_fire_delta_events } true;assume { :begin_inline_activate_threads } true;havoc activate_threads_#t~ret2, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;assume { :begin_inline_is_method1_triggered } true;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 1805#L97-1 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 1759#L119-1 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 1760#L120-1 activate_threads_#t~ret2 := is_method1_triggered_#res;assume { :end_inline_is_method1_triggered } true;activate_threads_~tmp~1 := activate_threads_#t~ret2;havoc activate_threads_#t~ret2; 1761#L380-3 assume 0 != activate_threads_~tmp~1;~comp_m1_st~0 := 0; 1822#L380-5 assume { :end_inline_activate_threads } true;assume { :begin_inline_reset_delta_events } true; 1826#L344-3 assume !(1 == ~b0_ev~0); 1833#L344-5 assume 1 == ~b1_ev~0;~b1_ev~0 := 2; 1834#L349-3 assume 1 == ~d0_ev~0;~d0_ev~0 := 2; 1746#L354-3 assume 1 == ~d1_ev~0;~d1_ev~0 := 2; 1747#L359-3 assume 1 == ~z_ev~0;~z_ev~0 := 2; 1771#L364-3 assume { :end_inline_reset_delta_events } true;assume { :begin_inline_stop_simulation } true;havoc stop_simulation_#res;havoc stop_simulation_#t~ret3, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;assume { :begin_inline_exists_runnable_thread } true;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 1804#L258-1 assume !(0 == ~comp_m1_st~0);exists_runnable_thread_~__retres1~1 := 0; 1796#L265-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 1797#L266-1 stop_simulation_#t~ret3 := exists_runnable_thread_#res;assume { :end_inline_exists_runnable_thread } true;stop_simulation_~tmp~2 := stop_simulation_#t~ret3;havoc stop_simulation_#t~ret3; 1810#L397 assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; 1811#L404 stop_simulation_#res := stop_simulation_~__retres2~0; 1831#L405 start_simulation_#t~ret4 := stop_simulation_#res;assume { :end_inline_stop_simulation } true;start_simulation_~tmp~3 := start_simulation_#t~ret4;havoc start_simulation_#t~ret4; 1779#L439 assume !(0 != start_simulation_~tmp~3); 1780#L422-3 [2018-11-18 08:34:41,497 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 08:34:41,498 INFO L82 PathProgramCache]: Analyzing trace with hash -525437980, now seen corresponding path program 1 times [2018-11-18 08:34:41,498 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-18 08:34:41,498 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-18 08:34:41,499 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 08:34:41,499 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-18 08:34:41,499 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 08:34:41,503 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 08:34:41,521 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 08:34:41,521 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 08:34:41,522 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-18 08:34:41,522 INFO L799 eck$LassoCheckResult]: stem already infeasible [2018-11-18 08:34:41,522 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 08:34:41,522 INFO L82 PathProgramCache]: Analyzing trace with hash -852125441, now seen corresponding path program 7 times [2018-11-18 08:34:41,522 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-18 08:34:41,522 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-18 08:34:41,523 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 08:34:41,523 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 08:34:41,523 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 08:34:41,526 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 08:34:41,544 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 08:34:41,545 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 08:34:41,545 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-18 08:34:41,545 INFO L811 eck$LassoCheckResult]: loop already infeasible [2018-11-18 08:34:41,545 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-18 08:34:41,545 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-18 08:34:41,546 INFO L87 Difference]: Start difference. First operand 119 states and 179 transitions. cyclomatic complexity: 61 Second operand 3 states. [2018-11-18 08:34:41,566 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 08:34:41,566 INFO L93 Difference]: Finished difference Result 119 states and 178 transitions. [2018-11-18 08:34:41,567 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-18 08:34:41,567 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 119 states and 178 transitions. [2018-11-18 08:34:41,568 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 73 [2018-11-18 08:34:41,568 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 119 states to 119 states and 178 transitions. [2018-11-18 08:34:41,569 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 119 [2018-11-18 08:34:41,569 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 119 [2018-11-18 08:34:41,569 INFO L73 IsDeterministic]: Start isDeterministic. Operand 119 states and 178 transitions. [2018-11-18 08:34:41,569 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2018-11-18 08:34:41,569 INFO L705 BuchiCegarLoop]: Abstraction has 119 states and 178 transitions. [2018-11-18 08:34:41,570 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 119 states and 178 transitions. [2018-11-18 08:34:41,572 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 119 to 119. [2018-11-18 08:34:41,572 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 119 states. [2018-11-18 08:34:41,572 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 119 states to 119 states and 178 transitions. [2018-11-18 08:34:41,572 INFO L728 BuchiCegarLoop]: Abstraction has 119 states and 178 transitions. [2018-11-18 08:34:41,573 INFO L608 BuchiCegarLoop]: Abstraction has 119 states and 178 transitions. [2018-11-18 08:34:41,573 INFO L442 BuchiCegarLoop]: ======== Iteration 9============ [2018-11-18 08:34:41,573 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 119 states and 178 transitions. [2018-11-18 08:34:41,573 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 73 [2018-11-18 08:34:41,574 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2018-11-18 08:34:41,574 INFO L119 BuchiIsEmpty]: Starting construction of run [2018-11-18 08:34:41,574 INFO L866 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 08:34:41,574 INFO L867 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 08:34:41,575 INFO L794 eck$LassoCheckResult]: Stem: 2089#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;~b0_val~0 := 0;~b0_val_t~0 := 0;~b0_ev~0 := 0;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_val_t~0 := 0;~b1_ev~0 := 0;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_val_t~0 := 0;~d0_ev~0 := 0;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_val_t~0 := 0;~d1_ev~0 := 0;~d1_req_up~0 := 0;~z_val~0 := 0;~z_val_t~0 := 0;~z_ev~0 := 0;~z_req_up~0 := 0;~comp_m1_st~0 := 0;~comp_m1_i~0 := 0; 1993#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res;havoc main_~__retres1~2;havoc main_~__retres1~2;assume { :begin_inline_init_model } true;~b0_val~0 := 0;~b0_ev~0 := 2;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_ev~0 := 2;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_ev~0 := 2;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_ev~0 := 2;~d1_req_up~0 := 0;~z_val~0 := 0;~z_ev~0 := 2;~z_req_up~0 := 0;~b0_val_t~0 := 1;~b0_req_up~0 := 1;~b1_val_t~0 := 1;~b1_req_up~0 := 1;~d0_val_t~0 := 1;~d0_req_up~0 := 1;~d1_val_t~0 := 1;~d1_req_up~0 := 1;~comp_m1_i~0 := 0; 1994#L480 assume { :end_inline_init_model } true;assume { :begin_inline_start_simulation } true;havoc start_simulation_#t~ret4, start_simulation_~kernel_st~0, start_simulation_~tmp~3;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;start_simulation_~kernel_st~0 := 0;assume { :begin_inline_update_channels } true; 2043#L202 assume 1 == ~b0_req_up~0;assume { :begin_inline_update_b0 } true; 2048#L127 assume ~b0_val~0 != ~b0_val_t~0;~b0_val~0 := ~b0_val_t~0;~b0_ev~0 := 0; 2057#L127-2 ~b0_req_up~0 := 0; 2058#L135 assume { :end_inline_update_b0 } true; 2028#L202-2 assume 1 == ~b1_req_up~0;assume { :begin_inline_update_b1 } true; 2013#L142 assume ~b1_val~0 != ~b1_val_t~0;~b1_val~0 := ~b1_val_t~0;~b1_ev~0 := 0; 2001#L142-2 ~b1_req_up~0 := 0; 2002#L150 assume { :end_inline_update_b1 } true; 2035#L209-1 assume 1 == ~d0_req_up~0;assume { :begin_inline_update_d0 } true; 2072#L157 assume ~d0_val~0 != ~d0_val_t~0;~d0_val~0 := ~d0_val_t~0;~d0_ev~0 := 0; 2068#L157-2 ~d0_req_up~0 := 0; 2069#L165 assume { :end_inline_update_d0 } true; 2037#L216-1 assume 1 == ~d1_req_up~0;assume { :begin_inline_update_d1 } true; 2036#L172 assume ~d1_val~0 != ~d1_val_t~0;~d1_val~0 := ~d1_val_t~0;~d1_ev~0 := 0; 2032#L172-2 ~d1_req_up~0 := 0; 2030#L180 assume { :end_inline_update_d1 } true; 2031#L223-1 assume !(1 == ~z_req_up~0); 1977#L230-1 assume { :end_inline_update_channels } true;assume { :begin_inline_init_threads } true; 1978#L245 assume !(1 == ~comp_m1_i~0);~comp_m1_st~0 := 2; 2073#L245-2 assume { :end_inline_init_threads } true;assume { :begin_inline_fire_delta_events } true; 2074#L311 assume !(0 == ~b0_ev~0); 2086#L311-2 assume !(0 == ~b1_ev~0); 2088#L316-1 assume !(0 == ~d0_ev~0); 1985#L321-1 assume 0 == ~d1_ev~0;~d1_ev~0 := 1; 1986#L326-1 assume !(0 == ~z_ev~0); 2039#L331-1 assume { :end_inline_fire_delta_events } true;assume { :begin_inline_activate_threads } true;havoc activate_threads_#t~ret2, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;assume { :begin_inline_is_method1_triggered } true;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 2060#L97 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 2008#L119 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 2009#L120 activate_threads_#t~ret2 := is_method1_triggered_#res;assume { :end_inline_is_method1_triggered } true;activate_threads_~tmp~1 := activate_threads_#t~ret2;havoc activate_threads_#t~ret2; 2010#L380 assume !(0 != activate_threads_~tmp~1); 2081#L380-2 assume { :end_inline_activate_threads } true;assume { :begin_inline_reset_delta_events } true; 2083#L344 assume !(1 == ~b0_ev~0); 2085#L344-2 assume !(1 == ~b1_ev~0); 2087#L349-1 assume !(1 == ~d0_ev~0); 1981#L354-1 assume 1 == ~d1_ev~0;~d1_ev~0 := 2; 1982#L359-1 assume !(1 == ~z_ev~0); 2038#L364-1 assume { :end_inline_reset_delta_events } true; 2025#L422-3 [2018-11-18 08:34:41,575 INFO L796 eck$LassoCheckResult]: Loop: 2025#L422-3 assume true; 2040#L422-1 assume !false; 2052#L423 start_simulation_~kernel_st~0 := 1;assume { :begin_inline_eval } true;havoc eval_#t~ret0, eval_#t~nondet1, eval_~tmp~0, eval_~tmp___0~0;havoc eval_~tmp~0;havoc eval_~tmp___0~0; 1983#L285 assume true; 1984#L275-1 assume !false; 2046#L276 assume { :begin_inline_exists_runnable_thread } true;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 2047#L258 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 2044#L265 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 1995#L266 eval_#t~ret0 := exists_runnable_thread_#res;assume { :end_inline_exists_runnable_thread } true;eval_~tmp___0~0 := eval_#t~ret0;havoc eval_#t~ret0; 1996#L280 assume !(0 != eval_~tmp___0~0); 2051#L301 assume { :end_inline_eval } true;start_simulation_~kernel_st~0 := 2;assume { :begin_inline_update_channels } true; 2026#L202-3 assume !(1 == ~b0_req_up~0); 2017#L202-5 assume !(1 == ~b1_req_up~0); 2018#L209-3 assume !(1 == ~d0_req_up~0); 2033#L216-3 assume !(1 == ~d1_req_up~0); 2029#L223-3 assume !(1 == ~z_req_up~0); 2011#L230-3 assume { :end_inline_update_channels } true;start_simulation_~kernel_st~0 := 3;assume { :begin_inline_fire_delta_events } true; 2012#L311-3 assume !(0 == ~b0_ev~0); 2077#L311-5 assume 0 == ~b1_ev~0;~b1_ev~0 := 1; 2080#L316-3 assume 0 == ~d0_ev~0;~d0_ev~0 := 1; 2094#L321-3 assume 0 == ~d1_ev~0;~d1_ev~0 := 1; 2019#L326-3 assume 0 == ~z_ev~0;~z_ev~0 := 1; 2020#L331-3 assume { :end_inline_fire_delta_events } true;assume { :begin_inline_activate_threads } true;havoc activate_threads_#t~ret2, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;assume { :begin_inline_is_method1_triggered } true;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 2050#L97-1 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 2004#L119-1 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 2005#L120-1 activate_threads_#t~ret2 := is_method1_triggered_#res;assume { :end_inline_is_method1_triggered } true;activate_threads_~tmp~1 := activate_threads_#t~ret2;havoc activate_threads_#t~ret2; 2006#L380-3 assume 0 != activate_threads_~tmp~1;~comp_m1_st~0 := 0; 2067#L380-5 assume { :end_inline_activate_threads } true;assume { :begin_inline_reset_delta_events } true; 2071#L344-3 assume !(1 == ~b0_ev~0); 2078#L344-5 assume 1 == ~b1_ev~0;~b1_ev~0 := 2; 2079#L349-3 assume 1 == ~d0_ev~0;~d0_ev~0 := 2; 1991#L354-3 assume 1 == ~d1_ev~0;~d1_ev~0 := 2; 1992#L359-3 assume 1 == ~z_ev~0;~z_ev~0 := 2; 2016#L364-3 assume { :end_inline_reset_delta_events } true;assume { :begin_inline_stop_simulation } true;havoc stop_simulation_#res;havoc stop_simulation_#t~ret3, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;assume { :begin_inline_exists_runnable_thread } true;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 2049#L258-1 assume !(0 == ~comp_m1_st~0);exists_runnable_thread_~__retres1~1 := 0; 2041#L265-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 2042#L266-1 stop_simulation_#t~ret3 := exists_runnable_thread_#res;assume { :end_inline_exists_runnable_thread } true;stop_simulation_~tmp~2 := stop_simulation_#t~ret3;havoc stop_simulation_#t~ret3; 2055#L397 assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; 2056#L404 stop_simulation_#res := stop_simulation_~__retres2~0; 2076#L405 start_simulation_#t~ret4 := stop_simulation_#res;assume { :end_inline_stop_simulation } true;start_simulation_~tmp~3 := start_simulation_#t~ret4;havoc start_simulation_#t~ret4; 2024#L439 assume !(0 != start_simulation_~tmp~3); 2025#L422-3 [2018-11-18 08:34:41,575 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 08:34:41,575 INFO L82 PathProgramCache]: Analyzing trace with hash -391424474, now seen corresponding path program 1 times [2018-11-18 08:34:41,575 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-18 08:34:41,575 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-18 08:34:41,576 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 08:34:41,576 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 08:34:41,576 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 08:34:41,580 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 08:34:41,601 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 08:34:41,601 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 08:34:41,602 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-18 08:34:41,602 INFO L799 eck$LassoCheckResult]: stem already infeasible [2018-11-18 08:34:41,602 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 08:34:41,602 INFO L82 PathProgramCache]: Analyzing trace with hash -852125441, now seen corresponding path program 8 times [2018-11-18 08:34:41,602 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-18 08:34:41,602 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-18 08:34:41,603 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 08:34:41,603 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 08:34:41,603 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 08:34:41,605 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 08:34:41,636 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 08:34:41,637 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 08:34:41,637 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-18 08:34:41,637 INFO L811 eck$LassoCheckResult]: loop already infeasible [2018-11-18 08:34:41,637 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-18 08:34:41,637 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-18 08:34:41,638 INFO L87 Difference]: Start difference. First operand 119 states and 178 transitions. cyclomatic complexity: 60 Second operand 3 states. [2018-11-18 08:34:41,663 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 08:34:41,663 INFO L93 Difference]: Finished difference Result 139 states and 205 transitions. [2018-11-18 08:34:41,663 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-18 08:34:41,663 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 139 states and 205 transitions. [2018-11-18 08:34:41,664 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 93 [2018-11-18 08:34:41,665 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 139 states to 139 states and 205 transitions. [2018-11-18 08:34:41,665 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 139 [2018-11-18 08:34:41,665 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 139 [2018-11-18 08:34:41,666 INFO L73 IsDeterministic]: Start isDeterministic. Operand 139 states and 205 transitions. [2018-11-18 08:34:41,666 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2018-11-18 08:34:41,666 INFO L705 BuchiCegarLoop]: Abstraction has 139 states and 205 transitions. [2018-11-18 08:34:41,666 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 139 states and 205 transitions. [2018-11-18 08:34:41,668 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 139 to 139. [2018-11-18 08:34:41,669 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 139 states. [2018-11-18 08:34:41,669 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 139 states to 139 states and 205 transitions. [2018-11-18 08:34:41,669 INFO L728 BuchiCegarLoop]: Abstraction has 139 states and 205 transitions. [2018-11-18 08:34:41,669 INFO L608 BuchiCegarLoop]: Abstraction has 139 states and 205 transitions. [2018-11-18 08:34:41,670 INFO L442 BuchiCegarLoop]: ======== Iteration 10============ [2018-11-18 08:34:41,670 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 139 states and 205 transitions. [2018-11-18 08:34:41,670 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 93 [2018-11-18 08:34:41,671 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2018-11-18 08:34:41,671 INFO L119 BuchiIsEmpty]: Starting construction of run [2018-11-18 08:34:41,671 INFO L866 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 08:34:41,671 INFO L867 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 08:34:41,672 INFO L794 eck$LassoCheckResult]: Stem: 2356#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;~b0_val~0 := 0;~b0_val_t~0 := 0;~b0_ev~0 := 0;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_val_t~0 := 0;~b1_ev~0 := 0;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_val_t~0 := 0;~d0_ev~0 := 0;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_val_t~0 := 0;~d1_ev~0 := 0;~d1_req_up~0 := 0;~z_val~0 := 0;~z_val_t~0 := 0;~z_ev~0 := 0;~z_req_up~0 := 0;~comp_m1_st~0 := 0;~comp_m1_i~0 := 0; 2258#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res;havoc main_~__retres1~2;havoc main_~__retres1~2;assume { :begin_inline_init_model } true;~b0_val~0 := 0;~b0_ev~0 := 2;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_ev~0 := 2;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_ev~0 := 2;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_ev~0 := 2;~d1_req_up~0 := 0;~z_val~0 := 0;~z_ev~0 := 2;~z_req_up~0 := 0;~b0_val_t~0 := 1;~b0_req_up~0 := 1;~b1_val_t~0 := 1;~b1_req_up~0 := 1;~d0_val_t~0 := 1;~d0_req_up~0 := 1;~d1_val_t~0 := 1;~d1_req_up~0 := 1;~comp_m1_i~0 := 0; 2259#L480 assume { :end_inline_init_model } true;assume { :begin_inline_start_simulation } true;havoc start_simulation_#t~ret4, start_simulation_~kernel_st~0, start_simulation_~tmp~3;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;start_simulation_~kernel_st~0 := 0;assume { :begin_inline_update_channels } true; 2309#L202 assume 1 == ~b0_req_up~0;assume { :begin_inline_update_b0 } true; 2314#L127 assume ~b0_val~0 != ~b0_val_t~0;~b0_val~0 := ~b0_val_t~0;~b0_ev~0 := 0; 2324#L127-2 ~b0_req_up~0 := 0; 2325#L135 assume { :end_inline_update_b0 } true; 2294#L202-2 assume 1 == ~b1_req_up~0;assume { :begin_inline_update_b1 } true; 2278#L142 assume ~b1_val~0 != ~b1_val_t~0;~b1_val~0 := ~b1_val_t~0;~b1_ev~0 := 0; 2266#L142-2 ~b1_req_up~0 := 0; 2267#L150 assume { :end_inline_update_b1 } true; 2301#L209-1 assume 1 == ~d0_req_up~0;assume { :begin_inline_update_d0 } true; 2339#L157 assume ~d0_val~0 != ~d0_val_t~0;~d0_val~0 := ~d0_val_t~0;~d0_ev~0 := 0; 2335#L157-2 ~d0_req_up~0 := 0; 2336#L165 assume { :end_inline_update_d0 } true; 2303#L216-1 assume 1 == ~d1_req_up~0;assume { :begin_inline_update_d1 } true; 2302#L172 assume ~d1_val~0 != ~d1_val_t~0;~d1_val~0 := ~d1_val_t~0;~d1_ev~0 := 0; 2298#L172-2 ~d1_req_up~0 := 0; 2296#L180 assume { :end_inline_update_d1 } true; 2297#L223-1 assume !(1 == ~z_req_up~0); 2242#L230-1 assume { :end_inline_update_channels } true;assume { :begin_inline_init_threads } true; 2243#L245 assume !(1 == ~comp_m1_i~0);~comp_m1_st~0 := 2; 2340#L245-2 assume { :end_inline_init_threads } true;assume { :begin_inline_fire_delta_events } true; 2341#L311 assume 0 == ~b0_ev~0;~b0_ev~0 := 1; 2353#L311-2 assume !(0 == ~b1_ev~0); 2355#L316-1 assume !(0 == ~d0_ev~0); 2250#L321-1 assume 0 == ~d1_ev~0;~d1_ev~0 := 1; 2251#L326-1 assume !(0 == ~z_ev~0); 2305#L331-1 assume { :end_inline_fire_delta_events } true;assume { :begin_inline_activate_threads } true;havoc activate_threads_#t~ret2, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;assume { :begin_inline_is_method1_triggered } true;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 2327#L97 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 2273#L119 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 2274#L120 activate_threads_#t~ret2 := is_method1_triggered_#res;assume { :end_inline_is_method1_triggered } true;activate_threads_~tmp~1 := activate_threads_#t~ret2;havoc activate_threads_#t~ret2; 2275#L380 assume !(0 != activate_threads_~tmp~1); 2348#L380-2 assume { :end_inline_activate_threads } true;assume { :begin_inline_reset_delta_events } true; 2350#L344 assume !(1 == ~b0_ev~0); 2352#L344-2 assume !(1 == ~b1_ev~0); 2354#L349-1 assume !(1 == ~d0_ev~0); 2246#L354-1 assume 1 == ~d1_ev~0;~d1_ev~0 := 2; 2247#L359-1 assume !(1 == ~z_ev~0); 2304#L364-1 assume { :end_inline_reset_delta_events } true; 2290#L422-3 [2018-11-18 08:34:41,672 INFO L796 eck$LassoCheckResult]: Loop: 2290#L422-3 assume true; 2306#L422-1 assume !false; 2318#L423 start_simulation_~kernel_st~0 := 1;assume { :begin_inline_eval } true;havoc eval_#t~ret0, eval_#t~nondet1, eval_~tmp~0, eval_~tmp___0~0;havoc eval_~tmp~0;havoc eval_~tmp___0~0; 2248#L285 assume true; 2249#L275-1 assume !false; 2312#L276 assume { :begin_inline_exists_runnable_thread } true;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 2313#L258 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 2310#L265 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 2260#L266 eval_#t~ret0 := exists_runnable_thread_#res;assume { :end_inline_exists_runnable_thread } true;eval_~tmp___0~0 := eval_#t~ret0;havoc eval_#t~ret0; 2261#L280 assume !(0 != eval_~tmp___0~0); 2317#L301 assume { :end_inline_eval } true;start_simulation_~kernel_st~0 := 2;assume { :begin_inline_update_channels } true; 2291#L202-3 assume !(1 == ~b0_req_up~0); 2293#L202-5 assume !(1 == ~b1_req_up~0); 2373#L209-3 assume !(1 == ~d0_req_up~0); 2369#L216-3 assume !(1 == ~d1_req_up~0); 2366#L223-3 assume !(1 == ~z_req_up~0); 2364#L230-3 assume { :end_inline_update_channels } true;start_simulation_~kernel_st~0 := 3;assume { :begin_inline_fire_delta_events } true; 2363#L311-3 assume !(0 == ~b0_ev~0); 2344#L311-5 assume 0 == ~b1_ev~0;~b1_ev~0 := 1; 2347#L316-3 assume 0 == ~d0_ev~0;~d0_ev~0 := 1; 2361#L321-3 assume 0 == ~d1_ev~0;~d1_ev~0 := 1; 2284#L326-3 assume 0 == ~z_ev~0;~z_ev~0 := 1; 2285#L331-3 assume { :end_inline_fire_delta_events } true;assume { :begin_inline_activate_threads } true;havoc activate_threads_#t~ret2, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;assume { :begin_inline_is_method1_triggered } true;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 2316#L97-1 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 2269#L119-1 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 2270#L120-1 activate_threads_#t~ret2 := is_method1_triggered_#res;assume { :end_inline_is_method1_triggered } true;activate_threads_~tmp~1 := activate_threads_#t~ret2;havoc activate_threads_#t~ret2; 2271#L380-3 assume 0 != activate_threads_~tmp~1;~comp_m1_st~0 := 0; 2334#L380-5 assume { :end_inline_activate_threads } true;assume { :begin_inline_reset_delta_events } true; 2338#L344-3 assume !(1 == ~b0_ev~0); 2345#L344-5 assume 1 == ~b1_ev~0;~b1_ev~0 := 2; 2346#L349-3 assume 1 == ~d0_ev~0;~d0_ev~0 := 2; 2256#L354-3 assume 1 == ~d1_ev~0;~d1_ev~0 := 2; 2257#L359-3 assume 1 == ~z_ev~0;~z_ev~0 := 2; 2281#L364-3 assume { :end_inline_reset_delta_events } true;assume { :begin_inline_stop_simulation } true;havoc stop_simulation_#res;havoc stop_simulation_#t~ret3, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;assume { :begin_inline_exists_runnable_thread } true;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 2315#L258-1 assume !(0 == ~comp_m1_st~0);exists_runnable_thread_~__retres1~1 := 0; 2307#L265-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 2308#L266-1 stop_simulation_#t~ret3 := exists_runnable_thread_#res;assume { :end_inline_exists_runnable_thread } true;stop_simulation_~tmp~2 := stop_simulation_#t~ret3;havoc stop_simulation_#t~ret3; 2321#L397 assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; 2322#L404 stop_simulation_#res := stop_simulation_~__retres2~0; 2343#L405 start_simulation_#t~ret4 := stop_simulation_#res;assume { :end_inline_stop_simulation } true;start_simulation_~tmp~3 := start_simulation_#t~ret4;havoc start_simulation_#t~ret4; 2289#L439 assume !(0 != start_simulation_~tmp~3); 2290#L422-3 [2018-11-18 08:34:41,672 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 08:34:41,672 INFO L82 PathProgramCache]: Analyzing trace with hash 1196923428, now seen corresponding path program 1 times [2018-11-18 08:34:41,672 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-18 08:34:41,672 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-18 08:34:41,673 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 08:34:41,673 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-18 08:34:41,673 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 08:34:41,677 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 08:34:41,693 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 08:34:41,693 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 08:34:41,694 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-18 08:34:41,694 INFO L799 eck$LassoCheckResult]: stem already infeasible [2018-11-18 08:34:41,694 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 08:34:41,694 INFO L82 PathProgramCache]: Analyzing trace with hash -852125441, now seen corresponding path program 9 times [2018-11-18 08:34:41,694 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-18 08:34:41,694 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-18 08:34:41,695 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 08:34:41,695 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 08:34:41,695 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 08:34:41,697 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 08:34:41,708 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 08:34:41,708 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 08:34:41,709 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-18 08:34:41,709 INFO L811 eck$LassoCheckResult]: loop already infeasible [2018-11-18 08:34:41,709 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-18 08:34:41,709 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-18 08:34:41,709 INFO L87 Difference]: Start difference. First operand 139 states and 205 transitions. cyclomatic complexity: 67 Second operand 3 states. [2018-11-18 08:34:41,727 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 08:34:41,727 INFO L93 Difference]: Finished difference Result 172 states and 250 transitions. [2018-11-18 08:34:41,727 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-18 08:34:41,727 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 172 states and 250 transitions. [2018-11-18 08:34:41,728 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 126 [2018-11-18 08:34:41,729 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 172 states to 172 states and 250 transitions. [2018-11-18 08:34:41,729 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 172 [2018-11-18 08:34:41,729 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 172 [2018-11-18 08:34:41,729 INFO L73 IsDeterministic]: Start isDeterministic. Operand 172 states and 250 transitions. [2018-11-18 08:34:41,729 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2018-11-18 08:34:41,729 INFO L705 BuchiCegarLoop]: Abstraction has 172 states and 250 transitions. [2018-11-18 08:34:41,729 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 172 states and 250 transitions. [2018-11-18 08:34:41,731 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 172 to 172. [2018-11-18 08:34:41,731 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 172 states. [2018-11-18 08:34:41,731 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 172 states to 172 states and 250 transitions. [2018-11-18 08:34:41,732 INFO L728 BuchiCegarLoop]: Abstraction has 172 states and 250 transitions. [2018-11-18 08:34:41,732 INFO L608 BuchiCegarLoop]: Abstraction has 172 states and 250 transitions. [2018-11-18 08:34:41,732 INFO L442 BuchiCegarLoop]: ======== Iteration 11============ [2018-11-18 08:34:41,732 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 172 states and 250 transitions. [2018-11-18 08:34:41,732 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 126 [2018-11-18 08:34:41,732 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2018-11-18 08:34:41,732 INFO L119 BuchiIsEmpty]: Starting construction of run [2018-11-18 08:34:41,733 INFO L866 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 08:34:41,733 INFO L867 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 08:34:41,733 INFO L794 eck$LassoCheckResult]: Stem: 2677#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;~b0_val~0 := 0;~b0_val_t~0 := 0;~b0_ev~0 := 0;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_val_t~0 := 0;~b1_ev~0 := 0;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_val_t~0 := 0;~d0_ev~0 := 0;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_val_t~0 := 0;~d1_ev~0 := 0;~d1_req_up~0 := 0;~z_val~0 := 0;~z_val_t~0 := 0;~z_ev~0 := 0;~z_req_up~0 := 0;~comp_m1_st~0 := 0;~comp_m1_i~0 := 0; 2576#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res;havoc main_~__retres1~2;havoc main_~__retres1~2;assume { :begin_inline_init_model } true;~b0_val~0 := 0;~b0_ev~0 := 2;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_ev~0 := 2;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_ev~0 := 2;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_ev~0 := 2;~d1_req_up~0 := 0;~z_val~0 := 0;~z_ev~0 := 2;~z_req_up~0 := 0;~b0_val_t~0 := 1;~b0_req_up~0 := 1;~b1_val_t~0 := 1;~b1_req_up~0 := 1;~d0_val_t~0 := 1;~d0_req_up~0 := 1;~d1_val_t~0 := 1;~d1_req_up~0 := 1;~comp_m1_i~0 := 0; 2577#L480 assume { :end_inline_init_model } true;assume { :begin_inline_start_simulation } true;havoc start_simulation_#t~ret4, start_simulation_~kernel_st~0, start_simulation_~tmp~3;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;start_simulation_~kernel_st~0 := 0;assume { :begin_inline_update_channels } true; 2629#L202 assume 1 == ~b0_req_up~0;assume { :begin_inline_update_b0 } true; 2634#L127 assume ~b0_val~0 != ~b0_val_t~0;~b0_val~0 := ~b0_val_t~0;~b0_ev~0 := 0; 2644#L127-2 ~b0_req_up~0 := 0; 2645#L135 assume { :end_inline_update_b0 } true; 2613#L202-2 assume 1 == ~b1_req_up~0;assume { :begin_inline_update_b1 } true; 2597#L142 assume ~b1_val~0 != ~b1_val_t~0;~b1_val~0 := ~b1_val_t~0;~b1_ev~0 := 0; 2585#L142-2 ~b1_req_up~0 := 0; 2586#L150 assume { :end_inline_update_b1 } true; 2621#L209-1 assume 1 == ~d0_req_up~0;assume { :begin_inline_update_d0 } true; 2659#L157 assume ~d0_val~0 != ~d0_val_t~0;~d0_val~0 := ~d0_val_t~0;~d0_ev~0 := 0; 2655#L157-2 ~d0_req_up~0 := 0; 2656#L165 assume { :end_inline_update_d0 } true; 2623#L216-1 assume 1 == ~d1_req_up~0;assume { :begin_inline_update_d1 } true; 2622#L172 assume ~d1_val~0 != ~d1_val_t~0;~d1_val~0 := ~d1_val_t~0;~d1_ev~0 := 0; 2617#L172-2 ~d1_req_up~0 := 0; 2615#L180 assume { :end_inline_update_d1 } true; 2616#L223-1 assume !(1 == ~z_req_up~0); 2560#L230-1 assume { :end_inline_update_channels } true;assume { :begin_inline_init_threads } true; 2561#L245 assume !(1 == ~comp_m1_i~0);~comp_m1_st~0 := 2; 2660#L245-2 assume { :end_inline_init_threads } true;assume { :begin_inline_fire_delta_events } true; 2661#L311 assume 0 == ~b0_ev~0;~b0_ev~0 := 1; 2674#L311-2 assume 0 == ~b1_ev~0;~b1_ev~0 := 1; 2676#L316-1 assume !(0 == ~d0_ev~0); 2568#L321-1 assume 0 == ~d1_ev~0;~d1_ev~0 := 1; 2569#L326-1 assume !(0 == ~z_ev~0); 2625#L331-1 assume { :end_inline_fire_delta_events } true;assume { :begin_inline_activate_threads } true;havoc activate_threads_#t~ret2, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;assume { :begin_inline_is_method1_triggered } true;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 2647#L97 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 2592#L119 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 2593#L120 activate_threads_#t~ret2 := is_method1_triggered_#res;assume { :end_inline_is_method1_triggered } true;activate_threads_~tmp~1 := activate_threads_#t~ret2;havoc activate_threads_#t~ret2; 2594#L380 assume !(0 != activate_threads_~tmp~1); 2669#L380-2 assume { :end_inline_activate_threads } true;assume { :begin_inline_reset_delta_events } true; 2671#L344 assume !(1 == ~b0_ev~0); 2673#L344-2 assume !(1 == ~b1_ev~0); 2675#L349-1 assume !(1 == ~d0_ev~0); 2564#L354-1 assume 1 == ~d1_ev~0;~d1_ev~0 := 2; 2565#L359-1 assume !(1 == ~z_ev~0); 2624#L364-1 assume { :end_inline_reset_delta_events } true; 2610#L422-3 [2018-11-18 08:34:41,733 INFO L796 eck$LassoCheckResult]: Loop: 2610#L422-3 assume true; 2626#L422-1 assume !false; 2638#L423 start_simulation_~kernel_st~0 := 1;assume { :begin_inline_eval } true;havoc eval_#t~ret0, eval_#t~nondet1, eval_~tmp~0, eval_~tmp___0~0;havoc eval_~tmp~0;havoc eval_~tmp___0~0; 2566#L285 assume true; 2567#L275-1 assume !false; 2632#L276 assume { :begin_inline_exists_runnable_thread } true;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 2633#L258 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 2630#L265 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 2578#L266 eval_#t~ret0 := exists_runnable_thread_#res;assume { :end_inline_exists_runnable_thread } true;eval_~tmp___0~0 := eval_#t~ret0;havoc eval_#t~ret0; 2579#L280 assume !(0 != eval_~tmp___0~0); 2637#L301 assume { :end_inline_eval } true;start_simulation_~kernel_st~0 := 2;assume { :begin_inline_update_channels } true; 2611#L202-3 assume !(1 == ~b0_req_up~0); 2601#L202-5 assume !(1 == ~b1_req_up~0); 2603#L209-3 assume !(1 == ~d0_req_up~0); 2702#L216-3 assume !(1 == ~d1_req_up~0); 2696#L223-3 assume !(1 == ~z_req_up~0); 2691#L230-3 assume { :end_inline_update_channels } true;start_simulation_~kernel_st~0 := 3;assume { :begin_inline_fire_delta_events } true; 2688#L311-3 assume !(0 == ~b0_ev~0); 2687#L311-5 assume 0 == ~b1_ev~0;~b1_ev~0 := 1; 2668#L316-3 assume 0 == ~d0_ev~0;~d0_ev~0 := 1; 2683#L321-3 assume 0 == ~d1_ev~0;~d1_ev~0 := 1; 2604#L326-3 assume 0 == ~z_ev~0;~z_ev~0 := 1; 2605#L331-3 assume { :end_inline_fire_delta_events } true;assume { :begin_inline_activate_threads } true;havoc activate_threads_#t~ret2, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;assume { :begin_inline_is_method1_triggered } true;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 2636#L97-1 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 2588#L119-1 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 2589#L120-1 activate_threads_#t~ret2 := is_method1_triggered_#res;assume { :end_inline_is_method1_triggered } true;activate_threads_~tmp~1 := activate_threads_#t~ret2;havoc activate_threads_#t~ret2; 2590#L380-3 assume 0 != activate_threads_~tmp~1;~comp_m1_st~0 := 0; 2654#L380-5 assume { :end_inline_activate_threads } true;assume { :begin_inline_reset_delta_events } true; 2658#L344-3 assume !(1 == ~b0_ev~0); 2666#L344-5 assume 1 == ~b1_ev~0;~b1_ev~0 := 2; 2667#L349-3 assume 1 == ~d0_ev~0;~d0_ev~0 := 2; 2574#L354-3 assume 1 == ~d1_ev~0;~d1_ev~0 := 2; 2575#L359-3 assume 1 == ~z_ev~0;~z_ev~0 := 2; 2600#L364-3 assume { :end_inline_reset_delta_events } true;assume { :begin_inline_stop_simulation } true;havoc stop_simulation_#res;havoc stop_simulation_#t~ret3, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;assume { :begin_inline_exists_runnable_thread } true;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 2635#L258-1 assume !(0 == ~comp_m1_st~0);exists_runnable_thread_~__retres1~1 := 0; 2627#L265-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 2628#L266-1 stop_simulation_#t~ret3 := exists_runnable_thread_#res;assume { :end_inline_exists_runnable_thread } true;stop_simulation_~tmp~2 := stop_simulation_#t~ret3;havoc stop_simulation_#t~ret3; 2641#L397 assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; 2642#L404 stop_simulation_#res := stop_simulation_~__retres2~0; 2663#L405 start_simulation_#t~ret4 := stop_simulation_#res;assume { :end_inline_stop_simulation } true;start_simulation_~tmp~3 := start_simulation_#t~ret4;havoc start_simulation_#t~ret4; 2609#L439 assume !(0 != start_simulation_~tmp~3); 2610#L422-3 [2018-11-18 08:34:41,734 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 08:34:41,734 INFO L82 PathProgramCache]: Analyzing trace with hash -2076975514, now seen corresponding path program 1 times [2018-11-18 08:34:41,734 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-18 08:34:41,734 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-18 08:34:41,735 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 08:34:41,735 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-18 08:34:41,735 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 08:34:41,739 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 08:34:41,764 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 08:34:41,764 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 08:34:41,764 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-18 08:34:41,765 INFO L799 eck$LassoCheckResult]: stem already infeasible [2018-11-18 08:34:41,765 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 08:34:41,765 INFO L82 PathProgramCache]: Analyzing trace with hash -852125441, now seen corresponding path program 10 times [2018-11-18 08:34:41,765 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-18 08:34:41,765 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-18 08:34:41,766 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 08:34:41,766 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 08:34:41,766 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 08:34:41,768 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 08:34:41,781 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 08:34:41,782 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 08:34:41,782 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-18 08:34:41,782 INFO L811 eck$LassoCheckResult]: loop already infeasible [2018-11-18 08:34:41,782 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-18 08:34:41,782 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-18 08:34:41,782 INFO L87 Difference]: Start difference. First operand 172 states and 250 transitions. cyclomatic complexity: 79 Second operand 3 states. [2018-11-18 08:34:41,805 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 08:34:41,806 INFO L93 Difference]: Finished difference Result 223 states and 319 transitions. [2018-11-18 08:34:41,806 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-18 08:34:41,806 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 223 states and 319 transitions. [2018-11-18 08:34:41,807 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 177 [2018-11-18 08:34:41,809 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 223 states to 223 states and 319 transitions. [2018-11-18 08:34:41,809 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 223 [2018-11-18 08:34:41,809 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 223 [2018-11-18 08:34:41,809 INFO L73 IsDeterministic]: Start isDeterministic. Operand 223 states and 319 transitions. [2018-11-18 08:34:41,809 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2018-11-18 08:34:41,810 INFO L705 BuchiCegarLoop]: Abstraction has 223 states and 319 transitions. [2018-11-18 08:34:41,810 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 223 states and 319 transitions. [2018-11-18 08:34:41,812 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 223 to 223. [2018-11-18 08:34:41,813 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 223 states. [2018-11-18 08:34:41,813 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 223 states to 223 states and 319 transitions. [2018-11-18 08:34:41,813 INFO L728 BuchiCegarLoop]: Abstraction has 223 states and 319 transitions. [2018-11-18 08:34:41,814 INFO L608 BuchiCegarLoop]: Abstraction has 223 states and 319 transitions. [2018-11-18 08:34:41,814 INFO L442 BuchiCegarLoop]: ======== Iteration 12============ [2018-11-18 08:34:41,814 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 223 states and 319 transitions. [2018-11-18 08:34:41,815 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 177 [2018-11-18 08:34:41,815 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2018-11-18 08:34:41,815 INFO L119 BuchiIsEmpty]: Starting construction of run [2018-11-18 08:34:41,816 INFO L866 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 08:34:41,816 INFO L867 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 08:34:41,816 INFO L794 eck$LassoCheckResult]: Stem: 3078#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;~b0_val~0 := 0;~b0_val_t~0 := 0;~b0_ev~0 := 0;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_val_t~0 := 0;~b1_ev~0 := 0;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_val_t~0 := 0;~d0_ev~0 := 0;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_val_t~0 := 0;~d1_ev~0 := 0;~d1_req_up~0 := 0;~z_val~0 := 0;~z_val_t~0 := 0;~z_ev~0 := 0;~z_req_up~0 := 0;~comp_m1_st~0 := 0;~comp_m1_i~0 := 0; 2978#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res;havoc main_~__retres1~2;havoc main_~__retres1~2;assume { :begin_inline_init_model } true;~b0_val~0 := 0;~b0_ev~0 := 2;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_ev~0 := 2;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_ev~0 := 2;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_ev~0 := 2;~d1_req_up~0 := 0;~z_val~0 := 0;~z_ev~0 := 2;~z_req_up~0 := 0;~b0_val_t~0 := 1;~b0_req_up~0 := 1;~b1_val_t~0 := 1;~b1_req_up~0 := 1;~d0_val_t~0 := 1;~d0_req_up~0 := 1;~d1_val_t~0 := 1;~d1_req_up~0 := 1;~comp_m1_i~0 := 0; 2979#L480 assume { :end_inline_init_model } true;assume { :begin_inline_start_simulation } true;havoc start_simulation_#t~ret4, start_simulation_~kernel_st~0, start_simulation_~tmp~3;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;start_simulation_~kernel_st~0 := 0;assume { :begin_inline_update_channels } true; 3029#L202 assume 1 == ~b0_req_up~0;assume { :begin_inline_update_b0 } true; 3034#L127 assume ~b0_val~0 != ~b0_val_t~0;~b0_val~0 := ~b0_val_t~0;~b0_ev~0 := 0; 3044#L127-2 ~b0_req_up~0 := 0; 3045#L135 assume { :end_inline_update_b0 } true; 3014#L202-2 assume 1 == ~b1_req_up~0;assume { :begin_inline_update_b1 } true; 2999#L142 assume ~b1_val~0 != ~b1_val_t~0;~b1_val~0 := ~b1_val_t~0;~b1_ev~0 := 0; 2987#L142-2 ~b1_req_up~0 := 0; 2988#L150 assume { :end_inline_update_b1 } true; 3021#L209-1 assume 1 == ~d0_req_up~0;assume { :begin_inline_update_d0 } true; 3060#L157 assume ~d0_val~0 != ~d0_val_t~0;~d0_val~0 := ~d0_val_t~0;~d0_ev~0 := 0; 3056#L157-2 ~d0_req_up~0 := 0; 3057#L165 assume { :end_inline_update_d0 } true; 3023#L216-1 assume 1 == ~d1_req_up~0;assume { :begin_inline_update_d1 } true; 3022#L172 assume ~d1_val~0 != ~d1_val_t~0;~d1_val~0 := ~d1_val_t~0;~d1_ev~0 := 0; 3018#L172-2 ~d1_req_up~0 := 0; 3016#L180 assume { :end_inline_update_d1 } true; 3017#L223-1 assume !(1 == ~z_req_up~0); 2962#L230-1 assume { :end_inline_update_channels } true;assume { :begin_inline_init_threads } true; 2963#L245 assume !(1 == ~comp_m1_i~0);~comp_m1_st~0 := 2; 3061#L245-2 assume { :end_inline_init_threads } true;assume { :begin_inline_fire_delta_events } true; 3062#L311 assume 0 == ~b0_ev~0;~b0_ev~0 := 1; 3075#L311-2 assume 0 == ~b1_ev~0;~b1_ev~0 := 1; 3077#L316-1 assume 0 == ~d0_ev~0;~d0_ev~0 := 1; 2970#L321-1 assume 0 == ~d1_ev~0;~d1_ev~0 := 1; 2971#L326-1 assume !(0 == ~z_ev~0); 3025#L331-1 assume { :end_inline_fire_delta_events } true;assume { :begin_inline_activate_threads } true;havoc activate_threads_#t~ret2, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;assume { :begin_inline_is_method1_triggered } true;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 3047#L97 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 2994#L119 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 2995#L120 activate_threads_#t~ret2 := is_method1_triggered_#res;assume { :end_inline_is_method1_triggered } true;activate_threads_~tmp~1 := activate_threads_#t~ret2;havoc activate_threads_#t~ret2; 2996#L380 assume !(0 != activate_threads_~tmp~1); 3069#L380-2 assume { :end_inline_activate_threads } true;assume { :begin_inline_reset_delta_events } true; 3072#L344 assume !(1 == ~b0_ev~0); 3074#L344-2 assume !(1 == ~b1_ev~0); 3076#L349-1 assume !(1 == ~d0_ev~0); 2966#L354-1 assume 1 == ~d1_ev~0;~d1_ev~0 := 2; 2967#L359-1 assume !(1 == ~z_ev~0); 3024#L364-1 assume { :end_inline_reset_delta_events } true; 3011#L422-3 [2018-11-18 08:34:41,816 INFO L796 eck$LassoCheckResult]: Loop: 3011#L422-3 assume true; 3026#L422-1 assume !false; 3038#L423 start_simulation_~kernel_st~0 := 1;assume { :begin_inline_eval } true;havoc eval_#t~ret0, eval_#t~nondet1, eval_~tmp~0, eval_~tmp___0~0;havoc eval_~tmp~0;havoc eval_~tmp___0~0; 2968#L285 assume true; 2969#L275-1 assume !false; 3032#L276 assume { :begin_inline_exists_runnable_thread } true;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 3033#L258 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 3030#L265 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 2980#L266 eval_#t~ret0 := exists_runnable_thread_#res;assume { :end_inline_exists_runnable_thread } true;eval_~tmp___0~0 := eval_#t~ret0;havoc eval_#t~ret0; 2981#L280 assume !(0 != eval_~tmp___0~0); 3037#L301 assume { :end_inline_eval } true;start_simulation_~kernel_st~0 := 2;assume { :begin_inline_update_channels } true; 3012#L202-3 assume !(1 == ~b0_req_up~0); 3003#L202-5 assume !(1 == ~b1_req_up~0); 3004#L209-3 assume !(1 == ~d0_req_up~0); 3082#L216-3 assume !(1 == ~d1_req_up~0); 3137#L223-3 assume !(1 == ~z_req_up~0); 3132#L230-3 assume { :end_inline_update_channels } true;start_simulation_~kernel_st~0 := 3;assume { :begin_inline_fire_delta_events } true; 3090#L311-3 assume !(0 == ~b0_ev~0); 3089#L311-5 assume 0 == ~b1_ev~0;~b1_ev~0 := 1; 3087#L316-3 assume 0 == ~d0_ev~0;~d0_ev~0 := 1; 3085#L321-3 assume 0 == ~d1_ev~0;~d1_ev~0 := 1; 3005#L326-3 assume 0 == ~z_ev~0;~z_ev~0 := 1; 3006#L331-3 assume { :end_inline_fire_delta_events } true;assume { :begin_inline_activate_threads } true;havoc activate_threads_#t~ret2, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;assume { :begin_inline_is_method1_triggered } true;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 3036#L97-1 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 2990#L119-1 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 2991#L120-1 activate_threads_#t~ret2 := is_method1_triggered_#res;assume { :end_inline_is_method1_triggered } true;activate_threads_~tmp~1 := activate_threads_#t~ret2;havoc activate_threads_#t~ret2; 2992#L380-3 assume 0 != activate_threads_~tmp~1;~comp_m1_st~0 := 0; 3055#L380-5 assume { :end_inline_activate_threads } true;assume { :begin_inline_reset_delta_events } true; 3059#L344-3 assume !(1 == ~b0_ev~0); 3066#L344-5 assume 1 == ~b1_ev~0;~b1_ev~0 := 2; 3067#L349-3 assume 1 == ~d0_ev~0;~d0_ev~0 := 2; 2976#L354-3 assume 1 == ~d1_ev~0;~d1_ev~0 := 2; 2977#L359-3 assume 1 == ~z_ev~0;~z_ev~0 := 2; 3002#L364-3 assume { :end_inline_reset_delta_events } true;assume { :begin_inline_stop_simulation } true;havoc stop_simulation_#res;havoc stop_simulation_#t~ret3, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;assume { :begin_inline_exists_runnable_thread } true;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 3035#L258-1 assume !(0 == ~comp_m1_st~0);exists_runnable_thread_~__retres1~1 := 0; 3027#L265-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 3028#L266-1 stop_simulation_#t~ret3 := exists_runnable_thread_#res;assume { :end_inline_exists_runnable_thread } true;stop_simulation_~tmp~2 := stop_simulation_#t~ret3;havoc stop_simulation_#t~ret3; 3041#L397 assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; 3042#L404 stop_simulation_#res := stop_simulation_~__retres2~0; 3064#L405 start_simulation_#t~ret4 := stop_simulation_#res;assume { :end_inline_stop_simulation } true;start_simulation_~tmp~3 := start_simulation_#t~ret4;havoc start_simulation_#t~ret4; 3010#L439 assume !(0 != start_simulation_~tmp~3); 3011#L422-3 [2018-11-18 08:34:41,816 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 08:34:41,817 INFO L82 PathProgramCache]: Analyzing trace with hash -797111836, now seen corresponding path program 1 times [2018-11-18 08:34:41,817 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-18 08:34:41,817 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-18 08:34:41,817 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 08:34:41,817 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-18 08:34:41,818 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 08:34:41,821 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 08:34:41,840 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 08:34:41,840 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 08:34:41,840 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-18 08:34:41,841 INFO L799 eck$LassoCheckResult]: stem already infeasible [2018-11-18 08:34:41,841 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 08:34:41,841 INFO L82 PathProgramCache]: Analyzing trace with hash -852125441, now seen corresponding path program 11 times [2018-11-18 08:34:41,841 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-18 08:34:41,841 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-18 08:34:41,842 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 08:34:41,842 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 08:34:41,842 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 08:34:41,844 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 08:34:41,856 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 08:34:41,856 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 08:34:41,856 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-18 08:34:41,856 INFO L811 eck$LassoCheckResult]: loop already infeasible [2018-11-18 08:34:41,857 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-18 08:34:41,857 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-18 08:34:41,857 INFO L87 Difference]: Start difference. First operand 223 states and 319 transitions. cyclomatic complexity: 97 Second operand 3 states. [2018-11-18 08:34:41,890 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 08:34:41,890 INFO L93 Difference]: Finished difference Result 235 states and 332 transitions. [2018-11-18 08:34:41,890 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-18 08:34:41,890 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 235 states and 332 transitions. [2018-11-18 08:34:41,892 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 192 [2018-11-18 08:34:41,893 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 235 states to 235 states and 332 transitions. [2018-11-18 08:34:41,893 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 235 [2018-11-18 08:34:41,893 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 235 [2018-11-18 08:34:41,893 INFO L73 IsDeterministic]: Start isDeterministic. Operand 235 states and 332 transitions. [2018-11-18 08:34:41,894 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2018-11-18 08:34:41,894 INFO L705 BuchiCegarLoop]: Abstraction has 235 states and 332 transitions. [2018-11-18 08:34:41,894 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 235 states and 332 transitions. [2018-11-18 08:34:41,897 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 235 to 235. [2018-11-18 08:34:41,897 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 235 states. [2018-11-18 08:34:41,898 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 235 states to 235 states and 332 transitions. [2018-11-18 08:34:41,898 INFO L728 BuchiCegarLoop]: Abstraction has 235 states and 332 transitions. [2018-11-18 08:34:41,898 INFO L608 BuchiCegarLoop]: Abstraction has 235 states and 332 transitions. [2018-11-18 08:34:41,899 INFO L442 BuchiCegarLoop]: ======== Iteration 13============ [2018-11-18 08:34:41,899 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 235 states and 332 transitions. [2018-11-18 08:34:41,900 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 192 [2018-11-18 08:34:41,900 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2018-11-18 08:34:41,900 INFO L119 BuchiIsEmpty]: Starting construction of run [2018-11-18 08:34:41,901 INFO L866 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 08:34:41,901 INFO L867 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 08:34:41,901 INFO L794 eck$LassoCheckResult]: Stem: 3545#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;~b0_val~0 := 0;~b0_val_t~0 := 0;~b0_ev~0 := 0;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_val_t~0 := 0;~b1_ev~0 := 0;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_val_t~0 := 0;~d0_ev~0 := 0;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_val_t~0 := 0;~d1_ev~0 := 0;~d1_req_up~0 := 0;~z_val~0 := 0;~z_val_t~0 := 0;~z_ev~0 := 0;~z_req_up~0 := 0;~comp_m1_st~0 := 0;~comp_m1_i~0 := 0; 3443#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res;havoc main_~__retres1~2;havoc main_~__retres1~2;assume { :begin_inline_init_model } true;~b0_val~0 := 0;~b0_ev~0 := 2;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_ev~0 := 2;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_ev~0 := 2;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_ev~0 := 2;~d1_req_up~0 := 0;~z_val~0 := 0;~z_ev~0 := 2;~z_req_up~0 := 0;~b0_val_t~0 := 1;~b0_req_up~0 := 1;~b1_val_t~0 := 1;~b1_req_up~0 := 1;~d0_val_t~0 := 1;~d0_req_up~0 := 1;~d1_val_t~0 := 1;~d1_req_up~0 := 1;~comp_m1_i~0 := 0; 3444#L480 assume { :end_inline_init_model } true;assume { :begin_inline_start_simulation } true;havoc start_simulation_#t~ret4, start_simulation_~kernel_st~0, start_simulation_~tmp~3;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;start_simulation_~kernel_st~0 := 0;assume { :begin_inline_update_channels } true; 3496#L202 assume 1 == ~b0_req_up~0;assume { :begin_inline_update_b0 } true; 3501#L127 assume ~b0_val~0 != ~b0_val_t~0;~b0_val~0 := ~b0_val_t~0;~b0_ev~0 := 0; 3511#L127-2 ~b0_req_up~0 := 0; 3512#L135 assume { :end_inline_update_b0 } true; 3478#L202-2 assume 1 == ~b1_req_up~0;assume { :begin_inline_update_b1 } true; 3462#L142 assume ~b1_val~0 != ~b1_val_t~0;~b1_val~0 := ~b1_val_t~0;~b1_ev~0 := 0; 3452#L142-2 ~b1_req_up~0 := 0; 3453#L150 assume { :end_inline_update_b1 } true; 3488#L209-1 assume 1 == ~d0_req_up~0;assume { :begin_inline_update_d0 } true; 3527#L157 assume ~d0_val~0 != ~d0_val_t~0;~d0_val~0 := ~d0_val_t~0;~d0_ev~0 := 0; 3523#L157-2 ~d0_req_up~0 := 0; 3524#L165 assume { :end_inline_update_d0 } true; 3490#L216-1 assume 1 == ~d1_req_up~0;assume { :begin_inline_update_d1 } true; 3489#L172 assume ~d1_val~0 != ~d1_val_t~0;~d1_val~0 := ~d1_val_t~0;~d1_ev~0 := 0; 3483#L172-2 ~d1_req_up~0 := 0; 3481#L180 assume { :end_inline_update_d1 } true; 3482#L223-1 assume !(1 == ~z_req_up~0); 3427#L230-1 assume { :end_inline_update_channels } true;assume { :begin_inline_init_threads } true; 3428#L245 assume !(1 == ~comp_m1_i~0);~comp_m1_st~0 := 2; 3528#L245-2 assume { :end_inline_init_threads } true;assume { :begin_inline_fire_delta_events } true; 3529#L311 assume 0 == ~b0_ev~0;~b0_ev~0 := 1; 3542#L311-2 assume 0 == ~b1_ev~0;~b1_ev~0 := 1; 3544#L316-1 assume 0 == ~d0_ev~0;~d0_ev~0 := 1; 3435#L321-1 assume 0 == ~d1_ev~0;~d1_ev~0 := 1; 3436#L326-1 assume !(0 == ~z_ev~0); 3492#L331-1 assume { :end_inline_fire_delta_events } true;assume { :begin_inline_activate_threads } true;havoc activate_threads_#t~ret2, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;assume { :begin_inline_is_method1_triggered } true;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 3514#L97 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 3518#L119 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 3458#L120 activate_threads_#t~ret2 := is_method1_triggered_#res;assume { :end_inline_is_method1_triggered } true;activate_threads_~tmp~1 := activate_threads_#t~ret2;havoc activate_threads_#t~ret2; 3459#L380 assume !(0 != activate_threads_~tmp~1); 3537#L380-2 assume { :end_inline_activate_threads } true;assume { :begin_inline_reset_delta_events } true; 3539#L344 assume 1 == ~b0_ev~0;~b0_ev~0 := 2; 3541#L344-2 assume !(1 == ~b1_ev~0); 3543#L349-1 assume !(1 == ~d0_ev~0); 3431#L354-1 assume 1 == ~d1_ev~0;~d1_ev~0 := 2; 3432#L359-1 assume !(1 == ~z_ev~0); 3491#L364-1 assume { :end_inline_reset_delta_events } true; 3474#L422-3 [2018-11-18 08:34:41,901 INFO L796 eck$LassoCheckResult]: Loop: 3474#L422-3 assume true; 3493#L422-1 assume !false; 3505#L423 start_simulation_~kernel_st~0 := 1;assume { :begin_inline_eval } true;havoc eval_#t~ret0, eval_#t~nondet1, eval_~tmp~0, eval_~tmp___0~0;havoc eval_~tmp~0;havoc eval_~tmp___0~0; 3433#L285 assume true; 3434#L275-1 assume !false; 3499#L276 assume { :begin_inline_exists_runnable_thread } true;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 3500#L258 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 3497#L265 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 3445#L266 eval_#t~ret0 := exists_runnable_thread_#res;assume { :end_inline_exists_runnable_thread } true;eval_~tmp___0~0 := eval_#t~ret0;havoc eval_#t~ret0; 3446#L280 assume !(0 != eval_~tmp___0~0); 3504#L301 assume { :end_inline_eval } true;start_simulation_~kernel_st~0 := 2;assume { :begin_inline_update_channels } true; 3475#L202-3 assume !(1 == ~b0_req_up~0); 3477#L202-5 assume !(1 == ~b1_req_up~0); 3588#L209-3 assume !(1 == ~d0_req_up~0); 3582#L216-3 assume !(1 == ~d1_req_up~0); 3576#L223-3 assume !(1 == ~z_req_up~0); 3573#L230-3 assume { :end_inline_update_channels } true;start_simulation_~kernel_st~0 := 3;assume { :begin_inline_fire_delta_events } true; 3570#L311-3 assume 0 == ~b0_ev~0;~b0_ev~0 := 1; 3532#L311-5 assume 0 == ~b1_ev~0;~b1_ev~0 := 1; 3536#L316-3 assume 0 == ~d0_ev~0;~d0_ev~0 := 1; 3554#L321-3 assume 0 == ~d1_ev~0;~d1_ev~0 := 1; 3468#L326-3 assume 0 == ~z_ev~0;~z_ev~0 := 1; 3469#L331-3 assume { :end_inline_fire_delta_events } true;assume { :begin_inline_activate_threads } true;havoc activate_threads_#t~ret2, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;assume { :begin_inline_is_method1_triggered } true;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 3503#L97-1 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 3516#L119-1 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 3456#L120-1 activate_threads_#t~ret2 := is_method1_triggered_#res;assume { :end_inline_is_method1_triggered } true;activate_threads_~tmp~1 := activate_threads_#t~ret2;havoc activate_threads_#t~ret2; 3457#L380-3 assume 0 != activate_threads_~tmp~1;~comp_m1_st~0 := 0; 3522#L380-5 assume { :end_inline_activate_threads } true;assume { :begin_inline_reset_delta_events } true; 3526#L344-3 assume 1 == ~b0_ev~0;~b0_ev~0 := 2; 3533#L344-5 assume 1 == ~b1_ev~0;~b1_ev~0 := 2; 3534#L349-3 assume 1 == ~d0_ev~0;~d0_ev~0 := 2; 3441#L354-3 assume 1 == ~d1_ev~0;~d1_ev~0 := 2; 3442#L359-3 assume 1 == ~z_ev~0;~z_ev~0 := 2; 3465#L364-3 assume { :end_inline_reset_delta_events } true;assume { :begin_inline_stop_simulation } true;havoc stop_simulation_#res;havoc stop_simulation_#t~ret3, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;assume { :begin_inline_exists_runnable_thread } true;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 3502#L258-1 assume !(0 == ~comp_m1_st~0);exists_runnable_thread_~__retres1~1 := 0; 3494#L265-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 3495#L266-1 stop_simulation_#t~ret3 := exists_runnable_thread_#res;assume { :end_inline_exists_runnable_thread } true;stop_simulation_~tmp~2 := stop_simulation_#t~ret3;havoc stop_simulation_#t~ret3; 3508#L397 assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; 3509#L404 stop_simulation_#res := stop_simulation_~__retres2~0; 3531#L405 start_simulation_#t~ret4 := stop_simulation_#res;assume { :end_inline_stop_simulation } true;start_simulation_~tmp~3 := start_simulation_#t~ret4;havoc start_simulation_#t~ret4; 3473#L439 assume !(0 != start_simulation_~tmp~3); 3474#L422-3 [2018-11-18 08:34:41,901 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 08:34:41,901 INFO L82 PathProgramCache]: Analyzing trace with hash -854370138, now seen corresponding path program 1 times [2018-11-18 08:34:41,902 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-18 08:34:41,902 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-18 08:34:41,902 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 08:34:41,902 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-18 08:34:41,902 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 08:34:41,908 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 08:34:41,929 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 08:34:41,929 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 08:34:41,929 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-18 08:34:41,930 INFO L799 eck$LassoCheckResult]: stem already infeasible [2018-11-18 08:34:41,930 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 08:34:41,930 INFO L82 PathProgramCache]: Analyzing trace with hash -131305921, now seen corresponding path program 1 times [2018-11-18 08:34:41,930 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-18 08:34:41,930 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-18 08:34:41,931 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 08:34:41,931 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 08:34:41,931 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 08:34:41,934 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 08:34:41,960 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 08:34:41,960 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 08:34:41,960 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-18 08:34:41,961 INFO L811 eck$LassoCheckResult]: loop already infeasible [2018-11-18 08:34:41,961 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-18 08:34:41,961 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-18 08:34:41,961 INFO L87 Difference]: Start difference. First operand 235 states and 332 transitions. cyclomatic complexity: 98 Second operand 3 states. [2018-11-18 08:34:41,997 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 08:34:41,997 INFO L93 Difference]: Finished difference Result 259 states and 365 transitions. [2018-11-18 08:34:41,998 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-18 08:34:41,998 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 259 states and 365 transitions. [2018-11-18 08:34:41,999 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 216 [2018-11-18 08:34:42,000 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 259 states to 259 states and 365 transitions. [2018-11-18 08:34:42,001 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 259 [2018-11-18 08:34:42,001 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 259 [2018-11-18 08:34:42,001 INFO L73 IsDeterministic]: Start isDeterministic. Operand 259 states and 365 transitions. [2018-11-18 08:34:42,001 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2018-11-18 08:34:42,002 INFO L705 BuchiCegarLoop]: Abstraction has 259 states and 365 transitions. [2018-11-18 08:34:42,002 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 259 states and 365 transitions. [2018-11-18 08:34:42,005 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 259 to 259. [2018-11-18 08:34:42,005 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 259 states. [2018-11-18 08:34:42,006 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 259 states to 259 states and 365 transitions. [2018-11-18 08:34:42,006 INFO L728 BuchiCegarLoop]: Abstraction has 259 states and 365 transitions. [2018-11-18 08:34:42,006 INFO L608 BuchiCegarLoop]: Abstraction has 259 states and 365 transitions. [2018-11-18 08:34:42,006 INFO L442 BuchiCegarLoop]: ======== Iteration 14============ [2018-11-18 08:34:42,006 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 259 states and 365 transitions. [2018-11-18 08:34:42,007 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 216 [2018-11-18 08:34:42,007 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2018-11-18 08:34:42,007 INFO L119 BuchiIsEmpty]: Starting construction of run [2018-11-18 08:34:42,008 INFO L866 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 08:34:42,008 INFO L867 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 08:34:42,008 INFO L794 eck$LassoCheckResult]: Stem: 4049#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;~b0_val~0 := 0;~b0_val_t~0 := 0;~b0_ev~0 := 0;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_val_t~0 := 0;~b1_ev~0 := 0;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_val_t~0 := 0;~d0_ev~0 := 0;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_val_t~0 := 0;~d1_ev~0 := 0;~d1_req_up~0 := 0;~z_val~0 := 0;~z_val_t~0 := 0;~z_ev~0 := 0;~z_req_up~0 := 0;~comp_m1_st~0 := 0;~comp_m1_i~0 := 0; 3944#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res;havoc main_~__retres1~2;havoc main_~__retres1~2;assume { :begin_inline_init_model } true;~b0_val~0 := 0;~b0_ev~0 := 2;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_ev~0 := 2;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_ev~0 := 2;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_ev~0 := 2;~d1_req_up~0 := 0;~z_val~0 := 0;~z_ev~0 := 2;~z_req_up~0 := 0;~b0_val_t~0 := 1;~b0_req_up~0 := 1;~b1_val_t~0 := 1;~b1_req_up~0 := 1;~d0_val_t~0 := 1;~d0_req_up~0 := 1;~d1_val_t~0 := 1;~d1_req_up~0 := 1;~comp_m1_i~0 := 0; 3945#L480 assume { :end_inline_init_model } true;assume { :begin_inline_start_simulation } true;havoc start_simulation_#t~ret4, start_simulation_~kernel_st~0, start_simulation_~tmp~3;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;start_simulation_~kernel_st~0 := 0;assume { :begin_inline_update_channels } true; 3996#L202 assume 1 == ~b0_req_up~0;assume { :begin_inline_update_b0 } true; 4001#L127 assume ~b0_val~0 != ~b0_val_t~0;~b0_val~0 := ~b0_val_t~0;~b0_ev~0 := 0; 4011#L127-2 ~b0_req_up~0 := 0; 4012#L135 assume { :end_inline_update_b0 } true; 3979#L202-2 assume 1 == ~b1_req_up~0;assume { :begin_inline_update_b1 } true; 3963#L142 assume ~b1_val~0 != ~b1_val_t~0;~b1_val~0 := ~b1_val_t~0;~b1_ev~0 := 0; 3953#L142-2 ~b1_req_up~0 := 0; 3954#L150 assume { :end_inline_update_b1 } true; 3988#L209-1 assume 1 == ~d0_req_up~0;assume { :begin_inline_update_d0 } true; 4029#L157 assume ~d0_val~0 != ~d0_val_t~0;~d0_val~0 := ~d0_val_t~0;~d0_ev~0 := 0; 4024#L157-2 ~d0_req_up~0 := 0; 4025#L165 assume { :end_inline_update_d0 } true; 3990#L216-1 assume 1 == ~d1_req_up~0;assume { :begin_inline_update_d1 } true; 3989#L172 assume ~d1_val~0 != ~d1_val_t~0;~d1_val~0 := ~d1_val_t~0;~d1_ev~0 := 0; 3984#L172-2 ~d1_req_up~0 := 0; 3982#L180 assume { :end_inline_update_d1 } true; 3983#L223-1 assume !(1 == ~z_req_up~0); 3928#L230-1 assume { :end_inline_update_channels } true;assume { :begin_inline_init_threads } true; 3929#L245 assume !(1 == ~comp_m1_i~0);~comp_m1_st~0 := 2; 4030#L245-2 assume { :end_inline_init_threads } true;assume { :begin_inline_fire_delta_events } true; 4031#L311 assume 0 == ~b0_ev~0;~b0_ev~0 := 1; 4045#L311-2 assume 0 == ~b1_ev~0;~b1_ev~0 := 1; 4047#L316-1 assume 0 == ~d0_ev~0;~d0_ev~0 := 1; 3936#L321-1 assume 0 == ~d1_ev~0;~d1_ev~0 := 1; 3937#L326-1 assume !(0 == ~z_ev~0); 3992#L331-1 assume { :end_inline_fire_delta_events } true;assume { :begin_inline_activate_threads } true;havoc activate_threads_#t~ret2, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;assume { :begin_inline_is_method1_triggered } true;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 4014#L97 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 4019#L119 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 3959#L120 activate_threads_#t~ret2 := is_method1_triggered_#res;assume { :end_inline_is_method1_triggered } true;activate_threads_~tmp~1 := activate_threads_#t~ret2;havoc activate_threads_#t~ret2; 3960#L380 assume !(0 != activate_threads_~tmp~1); 4040#L380-2 assume { :end_inline_activate_threads } true;assume { :begin_inline_reset_delta_events } true; 4042#L344 assume 1 == ~b0_ev~0;~b0_ev~0 := 2; 4044#L344-2 assume 1 == ~b1_ev~0;~b1_ev~0 := 2; 4046#L349-1 assume !(1 == ~d0_ev~0); 3932#L354-1 assume 1 == ~d1_ev~0;~d1_ev~0 := 2; 3933#L359-1 assume !(1 == ~z_ev~0); 3991#L364-1 assume { :end_inline_reset_delta_events } true; 3975#L422-3 [2018-11-18 08:34:42,008 INFO L796 eck$LassoCheckResult]: Loop: 3975#L422-3 assume true; 3993#L422-1 assume !false; 4005#L423 start_simulation_~kernel_st~0 := 1;assume { :begin_inline_eval } true;havoc eval_#t~ret0, eval_#t~nondet1, eval_~tmp~0, eval_~tmp___0~0;havoc eval_~tmp~0;havoc eval_~tmp___0~0; 3934#L285 assume true; 3935#L275-1 assume !false; 3999#L276 assume { :begin_inline_exists_runnable_thread } true;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 4000#L258 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 3997#L265 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 3946#L266 eval_#t~ret0 := exists_runnable_thread_#res;assume { :end_inline_exists_runnable_thread } true;eval_~tmp___0~0 := eval_#t~ret0;havoc eval_#t~ret0; 3947#L280 assume !(0 != eval_~tmp___0~0); 4004#L301 assume { :end_inline_eval } true;start_simulation_~kernel_st~0 := 2;assume { :begin_inline_update_channels } true; 3976#L202-3 assume !(1 == ~b0_req_up~0); 3978#L202-5 assume !(1 == ~b1_req_up~0); 4104#L209-3 assume !(1 == ~d0_req_up~0); 4098#L216-3 assume !(1 == ~d1_req_up~0); 4092#L223-3 assume !(1 == ~z_req_up~0); 4089#L230-3 assume { :end_inline_update_channels } true;start_simulation_~kernel_st~0 := 3;assume { :begin_inline_fire_delta_events } true; 4085#L311-3 assume !(0 == ~b0_ev~0); 4083#L311-5 assume !(0 == ~b1_ev~0); 4082#L316-3 assume 0 == ~d0_ev~0;~d0_ev~0 := 1; 4080#L321-3 assume 0 == ~d1_ev~0;~d1_ev~0 := 1; 4079#L326-3 assume 0 == ~z_ev~0;~z_ev~0 := 1; 4078#L331-3 assume { :end_inline_fire_delta_events } true;assume { :begin_inline_activate_threads } true;havoc activate_threads_#t~ret2, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;assume { :begin_inline_is_method1_triggered } true;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 4077#L97-1 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 4071#L119-1 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 4069#L120-1 activate_threads_#t~ret2 := is_method1_triggered_#res;assume { :end_inline_is_method1_triggered } true;activate_threads_~tmp~1 := activate_threads_#t~ret2;havoc activate_threads_#t~ret2; 4067#L380-3 assume 0 != activate_threads_~tmp~1;~comp_m1_st~0 := 0; 4065#L380-5 assume { :end_inline_activate_threads } true;assume { :begin_inline_reset_delta_events } true; 4064#L344-3 assume 1 == ~b0_ev~0;~b0_ev~0 := 2; 4062#L344-5 assume 1 == ~b1_ev~0;~b1_ev~0 := 2; 4037#L349-3 assume 1 == ~d0_ev~0;~d0_ev~0 := 2; 3942#L354-3 assume 1 == ~d1_ev~0;~d1_ev~0 := 2; 3943#L359-3 assume 1 == ~z_ev~0;~z_ev~0 := 2; 3966#L364-3 assume { :end_inline_reset_delta_events } true;assume { :begin_inline_stop_simulation } true;havoc stop_simulation_#res;havoc stop_simulation_#t~ret3, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;assume { :begin_inline_exists_runnable_thread } true;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 4002#L258-1 assume !(0 == ~comp_m1_st~0);exists_runnable_thread_~__retres1~1 := 0; 3994#L265-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 3995#L266-1 stop_simulation_#t~ret3 := exists_runnable_thread_#res;assume { :end_inline_exists_runnable_thread } true;stop_simulation_~tmp~2 := stop_simulation_#t~ret3;havoc stop_simulation_#t~ret3; 4008#L397 assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; 4009#L404 stop_simulation_#res := stop_simulation_~__retres2~0; 4033#L405 start_simulation_#t~ret4 := stop_simulation_#res;assume { :end_inline_stop_simulation } true;start_simulation_~tmp~3 := start_simulation_#t~ret4;havoc start_simulation_#t~ret4; 3974#L439 assume !(0 != start_simulation_~tmp~3); 3975#L422-3 [2018-11-18 08:34:42,008 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 08:34:42,009 INFO L82 PathProgramCache]: Analyzing trace with hash -856217180, now seen corresponding path program 1 times [2018-11-18 08:34:42,009 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-18 08:34:42,009 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-18 08:34:42,009 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 08:34:42,009 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 08:34:42,010 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 08:34:42,013 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 08:34:42,032 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 08:34:42,032 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 08:34:42,032 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-18 08:34:42,032 INFO L799 eck$LassoCheckResult]: stem already infeasible [2018-11-18 08:34:42,032 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 08:34:42,032 INFO L82 PathProgramCache]: Analyzing trace with hash -2070757761, now seen corresponding path program 1 times [2018-11-18 08:34:42,033 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-18 08:34:42,033 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-18 08:34:42,033 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 08:34:42,033 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 08:34:42,033 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 08:34:42,035 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 08:34:42,042 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 08:34:42,042 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 08:34:42,042 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-18 08:34:42,042 INFO L811 eck$LassoCheckResult]: loop already infeasible [2018-11-18 08:34:42,042 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-18 08:34:42,042 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-18 08:34:42,042 INFO L87 Difference]: Start difference. First operand 259 states and 365 transitions. cyclomatic complexity: 107 Second operand 3 states. [2018-11-18 08:34:42,091 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 08:34:42,091 INFO L93 Difference]: Finished difference Result 301 states and 424 transitions. [2018-11-18 08:34:42,092 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-18 08:34:42,092 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 301 states and 424 transitions. [2018-11-18 08:34:42,093 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 258 [2018-11-18 08:34:42,095 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 301 states to 301 states and 424 transitions. [2018-11-18 08:34:42,095 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 301 [2018-11-18 08:34:42,095 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 301 [2018-11-18 08:34:42,095 INFO L73 IsDeterministic]: Start isDeterministic. Operand 301 states and 424 transitions. [2018-11-18 08:34:42,095 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2018-11-18 08:34:42,096 INFO L705 BuchiCegarLoop]: Abstraction has 301 states and 424 transitions. [2018-11-18 08:34:42,096 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 301 states and 424 transitions. [2018-11-18 08:34:42,099 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 301 to 301. [2018-11-18 08:34:42,099 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 301 states. [2018-11-18 08:34:42,100 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 301 states to 301 states and 424 transitions. [2018-11-18 08:34:42,100 INFO L728 BuchiCegarLoop]: Abstraction has 301 states and 424 transitions. [2018-11-18 08:34:42,100 INFO L608 BuchiCegarLoop]: Abstraction has 301 states and 424 transitions. [2018-11-18 08:34:42,100 INFO L442 BuchiCegarLoop]: ======== Iteration 15============ [2018-11-18 08:34:42,100 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 301 states and 424 transitions. [2018-11-18 08:34:42,102 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 258 [2018-11-18 08:34:42,102 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2018-11-18 08:34:42,102 INFO L119 BuchiIsEmpty]: Starting construction of run [2018-11-18 08:34:42,102 INFO L866 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 08:34:42,103 INFO L867 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 08:34:42,103 INFO L794 eck$LassoCheckResult]: Stem: 4615#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;~b0_val~0 := 0;~b0_val_t~0 := 0;~b0_ev~0 := 0;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_val_t~0 := 0;~b1_ev~0 := 0;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_val_t~0 := 0;~d0_ev~0 := 0;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_val_t~0 := 0;~d1_ev~0 := 0;~d1_req_up~0 := 0;~z_val~0 := 0;~z_val_t~0 := 0;~z_ev~0 := 0;~z_req_up~0 := 0;~comp_m1_st~0 := 0;~comp_m1_i~0 := 0; 4511#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res;havoc main_~__retres1~2;havoc main_~__retres1~2;assume { :begin_inline_init_model } true;~b0_val~0 := 0;~b0_ev~0 := 2;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_ev~0 := 2;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_ev~0 := 2;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_ev~0 := 2;~d1_req_up~0 := 0;~z_val~0 := 0;~z_ev~0 := 2;~z_req_up~0 := 0;~b0_val_t~0 := 1;~b0_req_up~0 := 1;~b1_val_t~0 := 1;~b1_req_up~0 := 1;~d0_val_t~0 := 1;~d0_req_up~0 := 1;~d1_val_t~0 := 1;~d1_req_up~0 := 1;~comp_m1_i~0 := 0; 4512#L480 assume { :end_inline_init_model } true;assume { :begin_inline_start_simulation } true;havoc start_simulation_#t~ret4, start_simulation_~kernel_st~0, start_simulation_~tmp~3;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;start_simulation_~kernel_st~0 := 0;assume { :begin_inline_update_channels } true; 4564#L202 assume 1 == ~b0_req_up~0;assume { :begin_inline_update_b0 } true; 4569#L127 assume ~b0_val~0 != ~b0_val_t~0;~b0_val~0 := ~b0_val_t~0;~b0_ev~0 := 0; 4579#L127-2 ~b0_req_up~0 := 0; 4580#L135 assume { :end_inline_update_b0 } true; 4546#L202-2 assume 1 == ~b1_req_up~0;assume { :begin_inline_update_b1 } true; 4530#L142 assume ~b1_val~0 != ~b1_val_t~0;~b1_val~0 := ~b1_val_t~0;~b1_ev~0 := 0; 4520#L142-2 ~b1_req_up~0 := 0; 4521#L150 assume { :end_inline_update_b1 } true; 4556#L209-1 assume 1 == ~d0_req_up~0;assume { :begin_inline_update_d0 } true; 4596#L157 assume ~d0_val~0 != ~d0_val_t~0;~d0_val~0 := ~d0_val_t~0;~d0_ev~0 := 0; 4592#L157-2 ~d0_req_up~0 := 0; 4593#L165 assume { :end_inline_update_d0 } true; 4558#L216-1 assume 1 == ~d1_req_up~0;assume { :begin_inline_update_d1 } true; 4557#L172 assume ~d1_val~0 != ~d1_val_t~0;~d1_val~0 := ~d1_val_t~0;~d1_ev~0 := 0; 4551#L172-2 ~d1_req_up~0 := 0; 4549#L180 assume { :end_inline_update_d1 } true; 4550#L223-1 assume !(1 == ~z_req_up~0); 4495#L230-1 assume { :end_inline_update_channels } true;assume { :begin_inline_init_threads } true; 4496#L245 assume !(1 == ~comp_m1_i~0);~comp_m1_st~0 := 2; 4597#L245-2 assume { :end_inline_init_threads } true;assume { :begin_inline_fire_delta_events } true; 4598#L311 assume 0 == ~b0_ev~0;~b0_ev~0 := 1; 4612#L311-2 assume 0 == ~b1_ev~0;~b1_ev~0 := 1; 4614#L316-1 assume 0 == ~d0_ev~0;~d0_ev~0 := 1; 4503#L321-1 assume 0 == ~d1_ev~0;~d1_ev~0 := 1; 4504#L326-1 assume !(0 == ~z_ev~0); 4560#L331-1 assume { :end_inline_fire_delta_events } true;assume { :begin_inline_activate_threads } true;havoc activate_threads_#t~ret2, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;assume { :begin_inline_is_method1_triggered } true;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 4583#L97 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 4587#L119 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 4526#L120 activate_threads_#t~ret2 := is_method1_triggered_#res;assume { :end_inline_is_method1_triggered } true;activate_threads_~tmp~1 := activate_threads_#t~ret2;havoc activate_threads_#t~ret2; 4527#L380 assume !(0 != activate_threads_~tmp~1); 4606#L380-2 assume { :end_inline_activate_threads } true;assume { :begin_inline_reset_delta_events } true; 4609#L344 assume 1 == ~b0_ev~0;~b0_ev~0 := 2; 4611#L344-2 assume 1 == ~b1_ev~0;~b1_ev~0 := 2; 4613#L349-1 assume 1 == ~d0_ev~0;~d0_ev~0 := 2; 4499#L354-1 assume 1 == ~d1_ev~0;~d1_ev~0 := 2; 4500#L359-1 assume !(1 == ~z_ev~0); 4559#L364-1 assume { :end_inline_reset_delta_events } true; 4542#L422-3 [2018-11-18 08:34:42,103 INFO L796 eck$LassoCheckResult]: Loop: 4542#L422-3 assume true; 4561#L422-1 assume !false; 4573#L423 start_simulation_~kernel_st~0 := 1;assume { :begin_inline_eval } true;havoc eval_#t~ret0, eval_#t~nondet1, eval_~tmp~0, eval_~tmp___0~0;havoc eval_~tmp~0;havoc eval_~tmp___0~0; 4501#L285 assume true; 4502#L275-1 assume !false; 4567#L276 assume { :begin_inline_exists_runnable_thread } true;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 4568#L258 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 4565#L265 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 4513#L266 eval_#t~ret0 := exists_runnable_thread_#res;assume { :end_inline_exists_runnable_thread } true;eval_~tmp___0~0 := eval_#t~ret0;havoc eval_#t~ret0; 4514#L280 assume !(0 != eval_~tmp___0~0); 4572#L301 assume { :end_inline_eval } true;start_simulation_~kernel_st~0 := 2;assume { :begin_inline_update_channels } true; 4543#L202-3 assume !(1 == ~b0_req_up~0); 4545#L202-5 assume !(1 == ~b1_req_up~0); 4735#L209-3 assume !(1 == ~d0_req_up~0); 4731#L216-3 assume !(1 == ~d1_req_up~0); 4710#L223-3 assume !(1 == ~z_req_up~0); 4702#L230-3 assume { :end_inline_update_channels } true;start_simulation_~kernel_st~0 := 3;assume { :begin_inline_fire_delta_events } true; 4698#L311-3 assume 0 == ~b0_ev~0;~b0_ev~0 := 1; 4691#L311-5 assume !(0 == ~b1_ev~0); 4685#L316-3 assume !(0 == ~d0_ev~0); 4681#L321-3 assume 0 == ~d1_ev~0;~d1_ev~0 := 1; 4677#L326-3 assume 0 == ~z_ev~0;~z_ev~0 := 1; 4673#L331-3 assume { :end_inline_fire_delta_events } true;assume { :begin_inline_activate_threads } true;havoc activate_threads_#t~ret2, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;assume { :begin_inline_is_method1_triggered } true;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 4643#L97-1 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 4641#L119-1 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 4639#L120-1 activate_threads_#t~ret2 := is_method1_triggered_#res;assume { :end_inline_is_method1_triggered } true;activate_threads_~tmp~1 := activate_threads_#t~ret2;havoc activate_threads_#t~ret2; 4637#L380-3 assume 0 != activate_threads_~tmp~1;~comp_m1_st~0 := 0; 4635#L380-5 assume { :end_inline_activate_threads } true;assume { :begin_inline_reset_delta_events } true; 4632#L344-3 assume 1 == ~b0_ev~0;~b0_ev~0 := 2; 4630#L344-5 assume 1 == ~b1_ev~0;~b1_ev~0 := 2; 4628#L349-3 assume 1 == ~d0_ev~0;~d0_ev~0 := 2; 4509#L354-3 assume 1 == ~d1_ev~0;~d1_ev~0 := 2; 4510#L359-3 assume 1 == ~z_ev~0;~z_ev~0 := 2; 4533#L364-3 assume { :end_inline_reset_delta_events } true;assume { :begin_inline_stop_simulation } true;havoc stop_simulation_#res;havoc stop_simulation_#t~ret3, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;assume { :begin_inline_exists_runnable_thread } true;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 4570#L258-1 assume !(0 == ~comp_m1_st~0);exists_runnable_thread_~__retres1~1 := 0; 4562#L265-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 4563#L266-1 stop_simulation_#t~ret3 := exists_runnable_thread_#res;assume { :end_inline_exists_runnable_thread } true;stop_simulation_~tmp~2 := stop_simulation_#t~ret3;havoc stop_simulation_#t~ret3; 4576#L397 assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; 4577#L404 stop_simulation_#res := stop_simulation_~__retres2~0; 4600#L405 start_simulation_#t~ret4 := stop_simulation_#res;assume { :end_inline_stop_simulation } true;start_simulation_~tmp~3 := start_simulation_#t~ret4;havoc start_simulation_#t~ret4; 4541#L439 assume !(0 != start_simulation_~tmp~3); 4542#L422-3 [2018-11-18 08:34:42,103 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 08:34:42,103 INFO L82 PathProgramCache]: Analyzing trace with hash -856276762, now seen corresponding path program 1 times [2018-11-18 08:34:42,103 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-18 08:34:42,103 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-18 08:34:42,104 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 08:34:42,104 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 08:34:42,104 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 08:34:42,108 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 08:34:42,171 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 08:34:42,171 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 08:34:42,171 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-18 08:34:42,171 INFO L799 eck$LassoCheckResult]: stem already infeasible [2018-11-18 08:34:42,171 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 08:34:42,172 INFO L82 PathProgramCache]: Analyzing trace with hash -1717889537, now seen corresponding path program 1 times [2018-11-18 08:34:42,172 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-18 08:34:42,172 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-18 08:34:42,172 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 08:34:42,173 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 08:34:42,173 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 08:34:42,177 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 08:34:42,186 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 08:34:42,186 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 08:34:42,186 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-18 08:34:42,186 INFO L811 eck$LassoCheckResult]: loop already infeasible [2018-11-18 08:34:42,187 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-18 08:34:42,187 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-18 08:34:42,187 INFO L87 Difference]: Start difference. First operand 301 states and 424 transitions. cyclomatic complexity: 124 Second operand 5 states. [2018-11-18 08:34:42,251 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 08:34:42,252 INFO L93 Difference]: Finished difference Result 505 states and 715 transitions. [2018-11-18 08:34:42,253 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-18 08:34:42,253 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 505 states and 715 transitions. [2018-11-18 08:34:42,255 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 462 [2018-11-18 08:34:42,257 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 505 states to 505 states and 715 transitions. [2018-11-18 08:34:42,258 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 505 [2018-11-18 08:34:42,258 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 505 [2018-11-18 08:34:42,258 INFO L73 IsDeterministic]: Start isDeterministic. Operand 505 states and 715 transitions. [2018-11-18 08:34:42,259 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2018-11-18 08:34:42,259 INFO L705 BuchiCegarLoop]: Abstraction has 505 states and 715 transitions. [2018-11-18 08:34:42,260 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 505 states and 715 transitions. [2018-11-18 08:34:42,264 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 505 to 304. [2018-11-18 08:34:42,264 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 304 states. [2018-11-18 08:34:42,265 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 304 states to 304 states and 419 transitions. [2018-11-18 08:34:42,265 INFO L728 BuchiCegarLoop]: Abstraction has 304 states and 419 transitions. [2018-11-18 08:34:42,265 INFO L608 BuchiCegarLoop]: Abstraction has 304 states and 419 transitions. [2018-11-18 08:34:42,265 INFO L442 BuchiCegarLoop]: ======== Iteration 16============ [2018-11-18 08:34:42,265 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 304 states and 419 transitions. [2018-11-18 08:34:42,267 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 261 [2018-11-18 08:34:42,267 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2018-11-18 08:34:42,268 INFO L119 BuchiIsEmpty]: Starting construction of run [2018-11-18 08:34:42,268 INFO L866 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 08:34:42,268 INFO L867 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 08:34:42,269 INFO L794 eck$LassoCheckResult]: Stem: 5432#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;~b0_val~0 := 0;~b0_val_t~0 := 0;~b0_ev~0 := 0;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_val_t~0 := 0;~b1_ev~0 := 0;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_val_t~0 := 0;~d0_ev~0 := 0;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_val_t~0 := 0;~d1_ev~0 := 0;~d1_req_up~0 := 0;~z_val~0 := 0;~z_val_t~0 := 0;~z_ev~0 := 0;~z_req_up~0 := 0;~comp_m1_st~0 := 0;~comp_m1_i~0 := 0; 5330#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res;havoc main_~__retres1~2;havoc main_~__retres1~2;assume { :begin_inline_init_model } true;~b0_val~0 := 0;~b0_ev~0 := 2;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_ev~0 := 2;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_ev~0 := 2;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_ev~0 := 2;~d1_req_up~0 := 0;~z_val~0 := 0;~z_ev~0 := 2;~z_req_up~0 := 0;~b0_val_t~0 := 1;~b0_req_up~0 := 1;~b1_val_t~0 := 1;~b1_req_up~0 := 1;~d0_val_t~0 := 1;~d0_req_up~0 := 1;~d1_val_t~0 := 1;~d1_req_up~0 := 1;~comp_m1_i~0 := 0; 5331#L480 assume { :end_inline_init_model } true;assume { :begin_inline_start_simulation } true;havoc start_simulation_#t~ret4, start_simulation_~kernel_st~0, start_simulation_~tmp~3;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;start_simulation_~kernel_st~0 := 0;assume { :begin_inline_update_channels } true; 5381#L202 assume 1 == ~b0_req_up~0;assume { :begin_inline_update_b0 } true; 5386#L127 assume ~b0_val~0 != ~b0_val_t~0;~b0_val~0 := ~b0_val_t~0;~b0_ev~0 := 0; 5396#L127-2 ~b0_req_up~0 := 0; 5397#L135 assume { :end_inline_update_b0 } true; 5365#L202-2 assume 1 == ~b1_req_up~0;assume { :begin_inline_update_b1 } true; 5350#L142 assume ~b1_val~0 != ~b1_val_t~0;~b1_val~0 := ~b1_val_t~0;~b1_ev~0 := 0; 5339#L142-2 ~b1_req_up~0 := 0; 5340#L150 assume { :end_inline_update_b1 } true; 5373#L209-1 assume 1 == ~d0_req_up~0;assume { :begin_inline_update_d0 } true; 5413#L157 assume ~d0_val~0 != ~d0_val_t~0;~d0_val~0 := ~d0_val_t~0;~d0_ev~0 := 0; 5408#L157-2 ~d0_req_up~0 := 0; 5409#L165 assume { :end_inline_update_d0 } true; 5375#L216-1 assume 1 == ~d1_req_up~0;assume { :begin_inline_update_d1 } true; 5374#L172 assume ~d1_val~0 != ~d1_val_t~0;~d1_val~0 := ~d1_val_t~0;~d1_ev~0 := 0; 5369#L172-2 ~d1_req_up~0 := 0; 5367#L180 assume { :end_inline_update_d1 } true; 5368#L223-1 assume !(1 == ~z_req_up~0); 5314#L230-1 assume { :end_inline_update_channels } true;assume { :begin_inline_init_threads } true; 5315#L245 assume !(1 == ~comp_m1_i~0);~comp_m1_st~0 := 2; 5414#L245-2 assume { :end_inline_init_threads } true;assume { :begin_inline_fire_delta_events } true; 5415#L311 assume 0 == ~b0_ev~0;~b0_ev~0 := 1; 5428#L311-2 assume 0 == ~b1_ev~0;~b1_ev~0 := 1; 5430#L316-1 assume 0 == ~d0_ev~0;~d0_ev~0 := 1; 5325#L321-1 assume 0 == ~d1_ev~0;~d1_ev~0 := 1; 5326#L326-1 assume !(0 == ~z_ev~0); 5377#L331-1 assume { :end_inline_fire_delta_events } true;assume { :begin_inline_activate_threads } true;havoc activate_threads_#t~ret2, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;assume { :begin_inline_is_method1_triggered } true;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 5400#L97 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 5403#L119 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 5346#L120 activate_threads_#t~ret2 := is_method1_triggered_#res;assume { :end_inline_is_method1_triggered } true;activate_threads_~tmp~1 := activate_threads_#t~ret2;havoc activate_threads_#t~ret2; 5347#L380 assume 0 != activate_threads_~tmp~1;~comp_m1_st~0 := 0; 5422#L380-2 assume { :end_inline_activate_threads } true;assume { :begin_inline_reset_delta_events } true; 5425#L344 assume 1 == ~b0_ev~0;~b0_ev~0 := 2; 5427#L344-2 assume 1 == ~b1_ev~0;~b1_ev~0 := 2; 5429#L349-1 assume 1 == ~d0_ev~0;~d0_ev~0 := 2; 5318#L354-1 assume 1 == ~d1_ev~0;~d1_ev~0 := 2; 5319#L359-1 assume !(1 == ~z_ev~0); 5376#L364-1 assume { :end_inline_reset_delta_events } true; 5362#L422-3 [2018-11-18 08:34:42,269 INFO L796 eck$LassoCheckResult]: Loop: 5362#L422-3 assume true; 5378#L422-1 assume !false; 5390#L423 start_simulation_~kernel_st~0 := 1;assume { :begin_inline_eval } true;havoc eval_#t~ret0, eval_#t~nondet1, eval_~tmp~0, eval_~tmp___0~0;havoc eval_~tmp~0;havoc eval_~tmp___0~0; 5320#L285 assume true; 5321#L275-1 assume !false; 5384#L276 assume { :begin_inline_exists_runnable_thread } true;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 5385#L258 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 5382#L265 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 5332#L266 eval_#t~ret0 := exists_runnable_thread_#res;assume { :end_inline_exists_runnable_thread } true;eval_~tmp___0~0 := eval_#t~ret0;havoc eval_#t~ret0; 5333#L280 assume !(0 != eval_~tmp___0~0); 5389#L301 assume { :end_inline_eval } true;start_simulation_~kernel_st~0 := 2;assume { :begin_inline_update_channels } true; 5363#L202-3 assume !(1 == ~b0_req_up~0); 5354#L202-5 assume !(1 == ~b1_req_up~0); 5355#L209-3 assume !(1 == ~d0_req_up~0); 5547#L216-3 assume !(1 == ~d1_req_up~0); 5543#L223-3 assume !(1 == ~z_req_up~0); 5540#L230-3 assume { :end_inline_update_channels } true;start_simulation_~kernel_st~0 := 3;assume { :begin_inline_fire_delta_events } true; 5538#L311-3 assume 0 == ~b0_ev~0;~b0_ev~0 := 1; 5522#L311-5 assume !(0 == ~b1_ev~0); 5521#L316-3 assume !(0 == ~d0_ev~0); 5520#L321-3 assume 0 == ~d1_ev~0;~d1_ev~0 := 1; 5356#L326-3 assume 0 == ~z_ev~0;~z_ev~0 := 1; 5357#L331-3 assume { :end_inline_fire_delta_events } true;assume { :begin_inline_activate_threads } true;havoc activate_threads_#t~ret2, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;assume { :begin_inline_is_method1_triggered } true;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 5388#L97-1 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 5402#L119-1 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 5344#L120-1 activate_threads_#t~ret2 := is_method1_triggered_#res;assume { :end_inline_is_method1_triggered } true;activate_threads_~tmp~1 := activate_threads_#t~ret2;havoc activate_threads_#t~ret2; 5345#L380-3 assume 0 != activate_threads_~tmp~1;~comp_m1_st~0 := 0; 5407#L380-5 assume { :end_inline_activate_threads } true;assume { :begin_inline_reset_delta_events } true; 5412#L344-3 assume 1 == ~b0_ev~0;~b0_ev~0 := 2; 5431#L344-5 assume 1 == ~b1_ev~0;~b1_ev~0 := 2; 5420#L349-3 assume 1 == ~d0_ev~0;~d0_ev~0 := 2; 5328#L354-3 assume 1 == ~d1_ev~0;~d1_ev~0 := 2; 5329#L359-3 assume 1 == ~z_ev~0;~z_ev~0 := 2; 5353#L364-3 assume { :end_inline_reset_delta_events } true;assume { :begin_inline_stop_simulation } true;havoc stop_simulation_#res;havoc stop_simulation_#t~ret3, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;assume { :begin_inline_exists_runnable_thread } true;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 5387#L258-1 assume !(0 == ~comp_m1_st~0);exists_runnable_thread_~__retres1~1 := 0; 5379#L265-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 5380#L266-1 stop_simulation_#t~ret3 := exists_runnable_thread_#res;assume { :end_inline_exists_runnable_thread } true;stop_simulation_~tmp~2 := stop_simulation_#t~ret3;havoc stop_simulation_#t~ret3; 5393#L397 assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; 5394#L404 stop_simulation_#res := stop_simulation_~__retres2~0; 5416#L405 start_simulation_#t~ret4 := stop_simulation_#res;assume { :end_inline_stop_simulation } true;start_simulation_~tmp~3 := start_simulation_#t~ret4;havoc start_simulation_#t~ret4; 5361#L439 assume !(0 != start_simulation_~tmp~3); 5362#L422-3 [2018-11-18 08:34:42,269 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 08:34:42,269 INFO L82 PathProgramCache]: Analyzing trace with hash -46930136, now seen corresponding path program 1 times [2018-11-18 08:34:42,269 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-18 08:34:42,270 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-18 08:34:42,270 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 08:34:42,270 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 08:34:42,270 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 08:34:42,275 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-18 08:34:42,279 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-18 08:34:42,300 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 08:34:42,300 INFO L82 PathProgramCache]: Analyzing trace with hash -1717889537, now seen corresponding path program 2 times [2018-11-18 08:34:42,300 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-18 08:34:42,301 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-18 08:34:42,301 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 08:34:42,301 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 08:34:42,302 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 08:34:42,304 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 08:34:42,329 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 08:34:42,330 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 08:34:42,330 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-18 08:34:42,330 INFO L811 eck$LassoCheckResult]: loop already infeasible [2018-11-18 08:34:42,330 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-18 08:34:42,330 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-18 08:34:42,331 INFO L87 Difference]: Start difference. First operand 304 states and 419 transitions. cyclomatic complexity: 116 Second operand 3 states. [2018-11-18 08:34:42,361 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 08:34:42,361 INFO L93 Difference]: Finished difference Result 545 states and 752 transitions. [2018-11-18 08:34:42,362 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-18 08:34:42,363 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 545 states and 752 transitions. [2018-11-18 08:34:42,365 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 491 [2018-11-18 08:34:42,368 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 545 states to 545 states and 752 transitions. [2018-11-18 08:34:42,368 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 545 [2018-11-18 08:34:42,368 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 545 [2018-11-18 08:34:42,368 INFO L73 IsDeterministic]: Start isDeterministic. Operand 545 states and 752 transitions. [2018-11-18 08:34:42,369 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2018-11-18 08:34:42,369 INFO L705 BuchiCegarLoop]: Abstraction has 545 states and 752 transitions. [2018-11-18 08:34:42,370 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 545 states and 752 transitions. [2018-11-18 08:34:42,375 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 545 to 364. [2018-11-18 08:34:42,375 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 364 states. [2018-11-18 08:34:42,376 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 364 states to 364 states and 506 transitions. [2018-11-18 08:34:42,376 INFO L728 BuchiCegarLoop]: Abstraction has 364 states and 506 transitions. [2018-11-18 08:34:42,376 INFO L608 BuchiCegarLoop]: Abstraction has 364 states and 506 transitions. [2018-11-18 08:34:42,376 INFO L442 BuchiCegarLoop]: ======== Iteration 17============ [2018-11-18 08:34:42,376 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 364 states and 506 transitions. [2018-11-18 08:34:42,378 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 321 [2018-11-18 08:34:42,378 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2018-11-18 08:34:42,378 INFO L119 BuchiIsEmpty]: Starting construction of run [2018-11-18 08:34:42,379 INFO L866 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 08:34:42,379 INFO L867 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 08:34:42,379 INFO L794 eck$LassoCheckResult]: Stem: 6292#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;~b0_val~0 := 0;~b0_val_t~0 := 0;~b0_ev~0 := 0;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_val_t~0 := 0;~b1_ev~0 := 0;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_val_t~0 := 0;~d0_ev~0 := 0;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_val_t~0 := 0;~d1_ev~0 := 0;~d1_req_up~0 := 0;~z_val~0 := 0;~z_val_t~0 := 0;~z_ev~0 := 0;~z_req_up~0 := 0;~comp_m1_st~0 := 0;~comp_m1_i~0 := 0; 6185#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res;havoc main_~__retres1~2;havoc main_~__retres1~2;assume { :begin_inline_init_model } true;~b0_val~0 := 0;~b0_ev~0 := 2;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_ev~0 := 2;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_ev~0 := 2;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_ev~0 := 2;~d1_req_up~0 := 0;~z_val~0 := 0;~z_ev~0 := 2;~z_req_up~0 := 0;~b0_val_t~0 := 1;~b0_req_up~0 := 1;~b1_val_t~0 := 1;~b1_req_up~0 := 1;~d0_val_t~0 := 1;~d0_req_up~0 := 1;~d1_val_t~0 := 1;~d1_req_up~0 := 1;~comp_m1_i~0 := 0; 6186#L480 assume { :end_inline_init_model } true;assume { :begin_inline_start_simulation } true;havoc start_simulation_#t~ret4, start_simulation_~kernel_st~0, start_simulation_~tmp~3;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;start_simulation_~kernel_st~0 := 0;assume { :begin_inline_update_channels } true; 6238#L202 assume 1 == ~b0_req_up~0;assume { :begin_inline_update_b0 } true; 6244#L127 assume ~b0_val~0 != ~b0_val_t~0;~b0_val~0 := ~b0_val_t~0;~b0_ev~0 := 0; 6255#L127-2 ~b0_req_up~0 := 0; 6256#L135 assume { :end_inline_update_b0 } true; 6221#L202-2 assume 1 == ~b1_req_up~0;assume { :begin_inline_update_b1 } true; 6205#L142 assume ~b1_val~0 != ~b1_val_t~0;~b1_val~0 := ~b1_val_t~0;~b1_ev~0 := 0; 6194#L142-2 ~b1_req_up~0 := 0; 6195#L150 assume { :end_inline_update_b1 } true; 6229#L209-1 assume 1 == ~d0_req_up~0;assume { :begin_inline_update_d0 } true; 6272#L157 assume ~d0_val~0 != ~d0_val_t~0;~d0_val~0 := ~d0_val_t~0;~d0_ev~0 := 0; 6268#L157-2 ~d0_req_up~0 := 0; 6269#L165 assume { :end_inline_update_d0 } true; 6231#L216-1 assume 1 == ~d1_req_up~0;assume { :begin_inline_update_d1 } true; 6230#L172 assume ~d1_val~0 != ~d1_val_t~0;~d1_val~0 := ~d1_val_t~0;~d1_ev~0 := 0; 6225#L172-2 ~d1_req_up~0 := 0; 6223#L180 assume { :end_inline_update_d1 } true; 6224#L223-1 assume !(1 == ~z_req_up~0); 6169#L230-1 assume { :end_inline_update_channels } true;assume { :begin_inline_init_threads } true; 6170#L245 assume !(1 == ~comp_m1_i~0);~comp_m1_st~0 := 2; 6273#L245-2 assume { :end_inline_init_threads } true;assume { :begin_inline_fire_delta_events } true; 6274#L311 assume 0 == ~b0_ev~0;~b0_ev~0 := 1; 6289#L311-2 assume 0 == ~b1_ev~0;~b1_ev~0 := 1; 6291#L316-1 assume 0 == ~d0_ev~0;~d0_ev~0 := 1; 6177#L321-1 assume 0 == ~d1_ev~0;~d1_ev~0 := 1; 6178#L326-1 assume !(0 == ~z_ev~0); 6233#L331-1 assume { :end_inline_fire_delta_events } true;assume { :begin_inline_activate_threads } true;havoc activate_threads_#t~ret2, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;assume { :begin_inline_is_method1_triggered } true;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 6259#L97 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 6262#L119 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 6201#L120 activate_threads_#t~ret2 := is_method1_triggered_#res;assume { :end_inline_is_method1_triggered } true;activate_threads_~tmp~1 := activate_threads_#t~ret2;havoc activate_threads_#t~ret2; 6202#L380 assume 0 != activate_threads_~tmp~1;~comp_m1_st~0 := 0; 6283#L380-2 assume { :end_inline_activate_threads } true;assume { :begin_inline_reset_delta_events } true; 6286#L344 assume 1 == ~b0_ev~0;~b0_ev~0 := 2; 6288#L344-2 assume 1 == ~b1_ev~0;~b1_ev~0 := 2; 6290#L349-1 assume 1 == ~d0_ev~0;~d0_ev~0 := 2; 6173#L354-1 assume 1 == ~d1_ev~0;~d1_ev~0 := 2; 6174#L359-1 assume !(1 == ~z_ev~0); 6232#L364-1 assume { :end_inline_reset_delta_events } true; 6217#L422-3 [2018-11-18 08:34:42,380 INFO L796 eck$LassoCheckResult]: Loop: 6217#L422-3 assume true; 6318#L422-1 assume !false; 6317#L423 start_simulation_~kernel_st~0 := 1;assume { :begin_inline_eval } true;havoc eval_#t~ret0, eval_#t~nondet1, eval_~tmp~0, eval_~tmp___0~0;havoc eval_~tmp~0;havoc eval_~tmp___0~0; 6175#L285 assume true; 6176#L275-1 assume !false; 6241#L276 assume { :begin_inline_exists_runnable_thread } true;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 6242#L258 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 6239#L265 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 6187#L266 eval_#t~ret0 := exists_runnable_thread_#res;assume { :end_inline_exists_runnable_thread } true;eval_~tmp___0~0 := eval_#t~ret0;havoc eval_#t~ret0; 6188#L280 assume !(0 != eval_~tmp___0~0); 6311#L301 assume { :end_inline_eval } true;start_simulation_~kernel_st~0 := 2;assume { :begin_inline_update_channels } true; 6218#L202-3 assume !(1 == ~b0_req_up~0); 6220#L202-5 assume !(1 == ~b1_req_up~0); 6411#L209-3 assume !(1 == ~d0_req_up~0); 6407#L216-3 assume !(1 == ~d1_req_up~0); 6404#L223-3 assume !(1 == ~z_req_up~0); 6402#L230-3 assume { :end_inline_update_channels } true;start_simulation_~kernel_st~0 := 3;assume { :begin_inline_fire_delta_events } true; 6400#L311-3 assume 0 == ~b0_ev~0;~b0_ev~0 := 1; 6366#L311-5 assume 0 == ~b1_ev~0;~b1_ev~0 := 1; 6437#L316-3 assume !(0 == ~d0_ev~0); 6435#L321-3 assume 0 == ~d1_ev~0;~d1_ev~0 := 1; 6433#L326-3 assume 0 == ~z_ev~0;~z_ev~0 := 1; 6432#L331-3 assume { :end_inline_fire_delta_events } true;assume { :begin_inline_activate_threads } true;havoc activate_threads_#t~ret2, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;assume { :begin_inline_is_method1_triggered } true;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 6430#L97-1 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 6423#L119-1 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 6426#L120-1 activate_threads_#t~ret2 := is_method1_triggered_#res;assume { :end_inline_is_method1_triggered } true;activate_threads_~tmp~1 := activate_threads_#t~ret2;havoc activate_threads_#t~ret2; 6263#L380-3 assume 0 != activate_threads_~tmp~1;~comp_m1_st~0 := 0; 6264#L380-5 assume { :end_inline_activate_threads } true;assume { :begin_inline_reset_delta_events } true; 6270#L344-3 assume 1 == ~b0_ev~0;~b0_ev~0 := 2; 6279#L344-5 assume 1 == ~b1_ev~0;~b1_ev~0 := 2; 6280#L349-3 assume 1 == ~d0_ev~0;~d0_ev~0 := 2; 6302#L354-3 assume 1 == ~d1_ev~0;~d1_ev~0 := 2; 6324#L359-3 assume 1 == ~z_ev~0;~z_ev~0 := 2; 6323#L364-3 assume { :end_inline_reset_delta_events } true;assume { :begin_inline_stop_simulation } true;havoc stop_simulation_#res;havoc stop_simulation_#t~ret3, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;assume { :begin_inline_exists_runnable_thread } true;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 6305#L258-1 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 6236#L265-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 6237#L266-1 stop_simulation_#t~ret3 := exists_runnable_thread_#res;assume { :end_inline_exists_runnable_thread } true;stop_simulation_~tmp~2 := stop_simulation_#t~ret3;havoc stop_simulation_#t~ret3; 6252#L397 assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; 6253#L404 stop_simulation_#res := stop_simulation_~__retres2~0; 6300#L405 start_simulation_#t~ret4 := stop_simulation_#res;assume { :end_inline_stop_simulation } true;start_simulation_~tmp~3 := start_simulation_#t~ret4;havoc start_simulation_#t~ret4; 6216#L439 assume !(0 != start_simulation_~tmp~3); 6217#L422-3 [2018-11-18 08:34:42,380 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 08:34:42,380 INFO L82 PathProgramCache]: Analyzing trace with hash -46930136, now seen corresponding path program 2 times [2018-11-18 08:34:42,380 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-18 08:34:42,380 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-18 08:34:42,381 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 08:34:42,381 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-18 08:34:42,381 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 08:34:42,385 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-18 08:34:42,390 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-18 08:34:42,395 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 08:34:42,396 INFO L82 PathProgramCache]: Analyzing trace with hash -1687458565, now seen corresponding path program 1 times [2018-11-18 08:34:42,396 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-18 08:34:42,396 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-18 08:34:42,396 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 08:34:42,397 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-18 08:34:42,397 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 08:34:42,399 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 08:34:42,438 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 08:34:42,439 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 08:34:42,439 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-18 08:34:42,439 INFO L811 eck$LassoCheckResult]: loop already infeasible [2018-11-18 08:34:42,439 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-18 08:34:42,439 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-18 08:34:42,440 INFO L87 Difference]: Start difference. First operand 364 states and 506 transitions. cyclomatic complexity: 143 Second operand 5 states. [2018-11-18 08:34:42,527 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 08:34:42,527 INFO L93 Difference]: Finished difference Result 360 states and 493 transitions. [2018-11-18 08:34:42,527 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-18 08:34:42,527 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 360 states and 493 transitions. [2018-11-18 08:34:42,529 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 314 [2018-11-18 08:34:42,530 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 360 states to 360 states and 493 transitions. [2018-11-18 08:34:42,531 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 360 [2018-11-18 08:34:42,531 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 360 [2018-11-18 08:34:42,531 INFO L73 IsDeterministic]: Start isDeterministic. Operand 360 states and 493 transitions. [2018-11-18 08:34:42,531 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2018-11-18 08:34:42,532 INFO L705 BuchiCegarLoop]: Abstraction has 360 states and 493 transitions. [2018-11-18 08:34:42,532 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 360 states and 493 transitions. [2018-11-18 08:34:42,535 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 360 to 329. [2018-11-18 08:34:42,535 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 329 states. [2018-11-18 08:34:42,536 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 329 states to 329 states and 450 transitions. [2018-11-18 08:34:42,536 INFO L728 BuchiCegarLoop]: Abstraction has 329 states and 450 transitions. [2018-11-18 08:34:42,536 INFO L608 BuchiCegarLoop]: Abstraction has 329 states and 450 transitions. [2018-11-18 08:34:42,536 INFO L442 BuchiCegarLoop]: ======== Iteration 18============ [2018-11-18 08:34:42,536 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 329 states and 450 transitions. [2018-11-18 08:34:42,538 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 286 [2018-11-18 08:34:42,538 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2018-11-18 08:34:42,538 INFO L119 BuchiIsEmpty]: Starting construction of run [2018-11-18 08:34:42,539 INFO L866 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 08:34:42,539 INFO L867 BuchiCegarLoop]: Counterexample loop histogram [2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 08:34:42,539 INFO L794 eck$LassoCheckResult]: Stem: 7034#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;~b0_val~0 := 0;~b0_val_t~0 := 0;~b0_ev~0 := 0;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_val_t~0 := 0;~b1_ev~0 := 0;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_val_t~0 := 0;~d0_ev~0 := 0;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_val_t~0 := 0;~d1_ev~0 := 0;~d1_req_up~0 := 0;~z_val~0 := 0;~z_val_t~0 := 0;~z_ev~0 := 0;~z_req_up~0 := 0;~comp_m1_st~0 := 0;~comp_m1_i~0 := 0; 6926#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res;havoc main_~__retres1~2;havoc main_~__retres1~2;assume { :begin_inline_init_model } true;~b0_val~0 := 0;~b0_ev~0 := 2;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_ev~0 := 2;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_ev~0 := 2;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_ev~0 := 2;~d1_req_up~0 := 0;~z_val~0 := 0;~z_ev~0 := 2;~z_req_up~0 := 0;~b0_val_t~0 := 1;~b0_req_up~0 := 1;~b1_val_t~0 := 1;~b1_req_up~0 := 1;~d0_val_t~0 := 1;~d0_req_up~0 := 1;~d1_val_t~0 := 1;~d1_req_up~0 := 1;~comp_m1_i~0 := 0; 6927#L480 assume { :end_inline_init_model } true;assume { :begin_inline_start_simulation } true;havoc start_simulation_#t~ret4, start_simulation_~kernel_st~0, start_simulation_~tmp~3;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;start_simulation_~kernel_st~0 := 0;assume { :begin_inline_update_channels } true; 6979#L202 assume 1 == ~b0_req_up~0;assume { :begin_inline_update_b0 } true; 6986#L127 assume ~b0_val~0 != ~b0_val_t~0;~b0_val~0 := ~b0_val_t~0;~b0_ev~0 := 0; 6996#L127-2 ~b0_req_up~0 := 0; 6997#L135 assume { :end_inline_update_b0 } true; 6962#L202-2 assume 1 == ~b1_req_up~0;assume { :begin_inline_update_b1 } true; 6946#L142 assume ~b1_val~0 != ~b1_val_t~0;~b1_val~0 := ~b1_val_t~0;~b1_ev~0 := 0; 6938#L142-2 ~b1_req_up~0 := 0; 6939#L150 assume { :end_inline_update_b1 } true; 6971#L209-1 assume 1 == ~d0_req_up~0;assume { :begin_inline_update_d0 } true; 7014#L157 assume ~d0_val~0 != ~d0_val_t~0;~d0_val~0 := ~d0_val_t~0;~d0_ev~0 := 0; 7009#L157-2 ~d0_req_up~0 := 0; 7010#L165 assume { :end_inline_update_d0 } true; 6973#L216-1 assume 1 == ~d1_req_up~0;assume { :begin_inline_update_d1 } true; 6972#L172 assume ~d1_val~0 != ~d1_val_t~0;~d1_val~0 := ~d1_val_t~0;~d1_ev~0 := 0; 6966#L172-2 ~d1_req_up~0 := 0; 6964#L180 assume { :end_inline_update_d1 } true; 6965#L223-1 assume !(1 == ~z_req_up~0); 6909#L230-1 assume { :end_inline_update_channels } true;assume { :begin_inline_init_threads } true; 6910#L245 assume !(1 == ~comp_m1_i~0);~comp_m1_st~0 := 2; 7015#L245-2 assume { :end_inline_init_threads } true;assume { :begin_inline_fire_delta_events } true; 7016#L311 assume 0 == ~b0_ev~0;~b0_ev~0 := 1; 7030#L311-2 assume 0 == ~b1_ev~0;~b1_ev~0 := 1; 7033#L316-1 assume 0 == ~d0_ev~0;~d0_ev~0 := 1; 6917#L321-1 assume 0 == ~d1_ev~0;~d1_ev~0 := 1; 6918#L326-1 assume !(0 == ~z_ev~0); 6975#L331-1 assume { :end_inline_fire_delta_events } true;assume { :begin_inline_activate_threads } true;havoc activate_threads_#t~ret2, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;assume { :begin_inline_is_method1_triggered } true;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 7000#L97 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 7004#L119 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 6942#L120 activate_threads_#t~ret2 := is_method1_triggered_#res;assume { :end_inline_is_method1_triggered } true;activate_threads_~tmp~1 := activate_threads_#t~ret2;havoc activate_threads_#t~ret2; 6943#L380 assume 0 != activate_threads_~tmp~1;~comp_m1_st~0 := 0; 7024#L380-2 assume { :end_inline_activate_threads } true;assume { :begin_inline_reset_delta_events } true; 7027#L344 assume 1 == ~b0_ev~0;~b0_ev~0 := 2; 7029#L344-2 assume 1 == ~b1_ev~0;~b1_ev~0 := 2; 7031#L349-1 assume 1 == ~d0_ev~0;~d0_ev~0 := 2; 6913#L354-1 assume 1 == ~d1_ev~0;~d1_ev~0 := 2; 6914#L359-1 assume !(1 == ~z_ev~0); 6974#L364-1 assume { :end_inline_reset_delta_events } true; 6958#L422-3 [2018-11-18 08:34:42,539 INFO L796 eck$LassoCheckResult]: Loop: 6958#L422-3 assume true; 6976#L422-1 assume !false; 6990#L423 start_simulation_~kernel_st~0 := 1;assume { :begin_inline_eval } true;havoc eval_#t~ret0, eval_#t~nondet1, eval_~tmp~0, eval_~tmp___0~0;havoc eval_~tmp~0;havoc eval_~tmp___0~0; 6915#L285 assume true; 6916#L275-1 assume !false; 6983#L276 assume { :begin_inline_exists_runnable_thread } true;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 6984#L258 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 7049#L265 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 6928#L266 eval_#t~ret0 := exists_runnable_thread_#res;assume { :end_inline_exists_runnable_thread } true;eval_~tmp___0~0 := eval_#t~ret0;havoc eval_#t~ret0; 6929#L280 assume 0 != eval_~tmp___0~0; 7048#L280-1 assume 0 == ~comp_m1_st~0;eval_~tmp~0 := eval_#t~nondet1;havoc eval_#t~nondet1; 7037#L289 assume 0 != eval_~tmp~0;~comp_m1_st~0 := 1;assume { :begin_inline_method1 } true;havoc method1_~s1~0, method1_~s2~0, method1_~s3~0;havoc method1_~s1~0;havoc method1_~s2~0;havoc method1_~s3~0; 7001#L42 assume !(0 != ~b0_val~0);method1_~s1~0 := 1; 6934#L42-1 assume !(0 != ~d0_val~0);method1_~s2~0 := 1; 6919#L51 assume 0 != method1_~s2~0;method1_~s3~0 := 0; 6920#L63-2 assume !(0 != method1_~s2~0);method1_~s2~0 := 0; 6955#L69 assume 0 != method1_~s2~0;~z_val_t~0 := 0; 6947#L81-2 ~z_req_up~0 := 1;~comp_m1_st~0 := 2; 6948#L90 assume { :end_inline_method1 } true; 7044#L285 assume true; 7233#L275-1 assume !false; 7232#L276 assume { :begin_inline_exists_runnable_thread } true;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 7231#L258 assume !(0 == ~comp_m1_st~0);exists_runnable_thread_~__retres1~1 := 0; 6980#L265 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 6981#L266 eval_#t~ret0 := exists_runnable_thread_#res;assume { :end_inline_exists_runnable_thread } true;eval_~tmp___0~0 := eval_#t~ret0;havoc eval_#t~ret0; 7052#L280 assume !(0 != eval_~tmp___0~0); 6989#L301 assume { :end_inline_eval } true;start_simulation_~kernel_st~0 := 2;assume { :begin_inline_update_channels } true; 6959#L202-3 assume !(1 == ~b0_req_up~0); 6961#L202-5 assume !(1 == ~b1_req_up~0); 7083#L209-3 assume !(1 == ~d0_req_up~0); 7078#L216-3 assume !(1 == ~d1_req_up~0); 7074#L223-3 assume !(1 == ~z_req_up~0); 7071#L230-3 assume { :end_inline_update_channels } true;start_simulation_~kernel_st~0 := 3;assume { :begin_inline_fire_delta_events } true; 7068#L311-3 assume !(0 == ~b0_ev~0); 7065#L311-5 assume !(0 == ~b1_ev~0); 7062#L316-3 assume !(0 == ~d0_ev~0); 7061#L321-3 assume 0 == ~d1_ev~0;~d1_ev~0 := 1; 7060#L326-3 assume 0 == ~z_ev~0;~z_ev~0 := 1; 7059#L331-3 assume { :end_inline_fire_delta_events } true;assume { :begin_inline_activate_threads } true;havoc activate_threads_#t~ret2, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;assume { :begin_inline_is_method1_triggered } true;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 7057#L97-1 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 7058#L119-1 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 7124#L120-1 activate_threads_#t~ret2 := is_method1_triggered_#res;assume { :end_inline_is_method1_triggered } true;activate_threads_~tmp~1 := activate_threads_#t~ret2;havoc activate_threads_#t~ret2; 7121#L380-3 assume 0 != activate_threads_~tmp~1;~comp_m1_st~0 := 0; 7118#L380-5 assume { :end_inline_activate_threads } true;assume { :begin_inline_reset_delta_events } true; 7115#L344-3 assume 1 == ~b0_ev~0;~b0_ev~0 := 2; 7112#L344-5 assume 1 == ~b1_ev~0;~b1_ev~0 := 2; 7109#L349-3 assume 1 == ~d0_ev~0;~d0_ev~0 := 2; 6924#L354-3 assume 1 == ~d1_ev~0;~d1_ev~0 := 2; 6925#L359-3 assume 1 == ~z_ev~0;~z_ev~0 := 2; 6949#L364-3 assume { :end_inline_reset_delta_events } true;assume { :begin_inline_stop_simulation } true;havoc stop_simulation_#res;havoc stop_simulation_#t~ret3, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;assume { :begin_inline_exists_runnable_thread } true;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 6985#L258-1 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 6977#L265-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 6978#L266-1 stop_simulation_#t~ret3 := exists_runnable_thread_#res;assume { :end_inline_exists_runnable_thread } true;stop_simulation_~tmp~2 := stop_simulation_#t~ret3;havoc stop_simulation_#t~ret3; 6993#L397 assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; 6994#L404 stop_simulation_#res := stop_simulation_~__retres2~0; 7043#L405 start_simulation_#t~ret4 := stop_simulation_#res;assume { :end_inline_stop_simulation } true;start_simulation_~tmp~3 := start_simulation_#t~ret4;havoc start_simulation_#t~ret4; 6957#L439 assume !(0 != start_simulation_~tmp~3); 6958#L422-3 [2018-11-18 08:34:42,539 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 08:34:42,539 INFO L82 PathProgramCache]: Analyzing trace with hash -46930136, now seen corresponding path program 3 times [2018-11-18 08:34:42,539 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-18 08:34:42,540 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-18 08:34:42,540 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 08:34:42,540 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 08:34:42,540 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 08:34:42,544 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-18 08:34:42,547 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-18 08:34:42,552 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 08:34:42,552 INFO L82 PathProgramCache]: Analyzing trace with hash 1388087939, now seen corresponding path program 1 times [2018-11-18 08:34:42,552 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-18 08:34:42,552 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-18 08:34:42,553 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 08:34:42,553 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-18 08:34:42,553 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 08:34:42,555 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 08:34:42,592 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 7 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 08:34:42,592 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 08:34:42,592 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-18 08:34:42,592 INFO L811 eck$LassoCheckResult]: loop already infeasible [2018-11-18 08:34:42,592 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-18 08:34:42,593 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-18 08:34:42,593 INFO L87 Difference]: Start difference. First operand 329 states and 450 transitions. cyclomatic complexity: 122 Second operand 3 states. [2018-11-18 08:34:42,628 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 08:34:42,628 INFO L93 Difference]: Finished difference Result 608 states and 833 transitions. [2018-11-18 08:34:42,629 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-18 08:34:42,630 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 608 states and 833 transitions. [2018-11-18 08:34:42,632 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 565 [2018-11-18 08:34:42,634 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 608 states to 608 states and 833 transitions. [2018-11-18 08:34:42,634 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 608 [2018-11-18 08:34:42,634 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 608 [2018-11-18 08:34:42,634 INFO L73 IsDeterministic]: Start isDeterministic. Operand 608 states and 833 transitions. [2018-11-18 08:34:42,635 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2018-11-18 08:34:42,635 INFO L705 BuchiCegarLoop]: Abstraction has 608 states and 833 transitions. [2018-11-18 08:34:42,636 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 608 states and 833 transitions. [2018-11-18 08:34:42,640 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 608 to 332. [2018-11-18 08:34:42,640 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 332 states. [2018-11-18 08:34:42,641 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 332 states to 332 states and 453 transitions. [2018-11-18 08:34:42,641 INFO L728 BuchiCegarLoop]: Abstraction has 332 states and 453 transitions. [2018-11-18 08:34:42,641 INFO L608 BuchiCegarLoop]: Abstraction has 332 states and 453 transitions. [2018-11-18 08:34:42,641 INFO L442 BuchiCegarLoop]: ======== Iteration 19============ [2018-11-18 08:34:42,641 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 332 states and 453 transitions. [2018-11-18 08:34:42,642 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 289 [2018-11-18 08:34:42,642 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2018-11-18 08:34:42,642 INFO L119 BuchiIsEmpty]: Starting construction of run [2018-11-18 08:34:42,643 INFO L866 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 08:34:42,643 INFO L867 BuchiCegarLoop]: Counterexample loop histogram [2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 08:34:42,643 INFO L794 eck$LassoCheckResult]: Stem: 7977#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;~b0_val~0 := 0;~b0_val_t~0 := 0;~b0_ev~0 := 0;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_val_t~0 := 0;~b1_ev~0 := 0;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_val_t~0 := 0;~d0_ev~0 := 0;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_val_t~0 := 0;~d1_ev~0 := 0;~d1_req_up~0 := 0;~z_val~0 := 0;~z_val_t~0 := 0;~z_ev~0 := 0;~z_req_up~0 := 0;~comp_m1_st~0 := 0;~comp_m1_i~0 := 0; 7868#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res;havoc main_~__retres1~2;havoc main_~__retres1~2;assume { :begin_inline_init_model } true;~b0_val~0 := 0;~b0_ev~0 := 2;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_ev~0 := 2;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_ev~0 := 2;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_ev~0 := 2;~d1_req_up~0 := 0;~z_val~0 := 0;~z_ev~0 := 2;~z_req_up~0 := 0;~b0_val_t~0 := 1;~b0_req_up~0 := 1;~b1_val_t~0 := 1;~b1_req_up~0 := 1;~d0_val_t~0 := 1;~d0_req_up~0 := 1;~d1_val_t~0 := 1;~d1_req_up~0 := 1;~comp_m1_i~0 := 0; 7869#L480 assume { :end_inline_init_model } true;assume { :begin_inline_start_simulation } true;havoc start_simulation_#t~ret4, start_simulation_~kernel_st~0, start_simulation_~tmp~3;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;start_simulation_~kernel_st~0 := 0;assume { :begin_inline_update_channels } true; 7923#L202 assume 1 == ~b0_req_up~0;assume { :begin_inline_update_b0 } true; 7928#L127 assume ~b0_val~0 != ~b0_val_t~0;~b0_val~0 := ~b0_val_t~0;~b0_ev~0 := 0; 7938#L127-2 ~b0_req_up~0 := 0; 7939#L135 assume { :end_inline_update_b0 } true; 7906#L202-2 assume 1 == ~b1_req_up~0;assume { :begin_inline_update_b1 } true; 7888#L142 assume ~b1_val~0 != ~b1_val_t~0;~b1_val~0 := ~b1_val_t~0;~b1_ev~0 := 0; 7877#L142-2 ~b1_req_up~0 := 0; 7878#L150 assume { :end_inline_update_b1 } true; 7915#L209-1 assume 1 == ~d0_req_up~0;assume { :begin_inline_update_d0 } true; 7957#L157 assume ~d0_val~0 != ~d0_val_t~0;~d0_val~0 := ~d0_val_t~0;~d0_ev~0 := 0; 7951#L157-2 ~d0_req_up~0 := 0; 7952#L165 assume { :end_inline_update_d0 } true; 7917#L216-1 assume 1 == ~d1_req_up~0;assume { :begin_inline_update_d1 } true; 7916#L172 assume ~d1_val~0 != ~d1_val_t~0;~d1_val~0 := ~d1_val_t~0;~d1_ev~0 := 0; 7911#L172-2 ~d1_req_up~0 := 0; 7909#L180 assume { :end_inline_update_d1 } true; 7910#L223-1 assume !(1 == ~z_req_up~0); 7852#L230-1 assume { :end_inline_update_channels } true;assume { :begin_inline_init_threads } true; 7853#L245 assume !(1 == ~comp_m1_i~0);~comp_m1_st~0 := 2; 7958#L245-2 assume { :end_inline_init_threads } true;assume { :begin_inline_fire_delta_events } true; 7959#L311 assume 0 == ~b0_ev~0;~b0_ev~0 := 1; 7972#L311-2 assume 0 == ~b1_ev~0;~b1_ev~0 := 1; 7974#L316-1 assume 0 == ~d0_ev~0;~d0_ev~0 := 1; 7860#L321-1 assume 0 == ~d1_ev~0;~d1_ev~0 := 1; 7861#L326-1 assume !(0 == ~z_ev~0); 7919#L331-1 assume { :end_inline_fire_delta_events } true;assume { :begin_inline_activate_threads } true;havoc activate_threads_#t~ret2, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;assume { :begin_inline_is_method1_triggered } true;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 7943#L97 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 7946#L119 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 7884#L120 activate_threads_#t~ret2 := is_method1_triggered_#res;assume { :end_inline_is_method1_triggered } true;activate_threads_~tmp~1 := activate_threads_#t~ret2;havoc activate_threads_#t~ret2; 7885#L380 assume 0 != activate_threads_~tmp~1;~comp_m1_st~0 := 0; 7966#L380-2 assume { :end_inline_activate_threads } true;assume { :begin_inline_reset_delta_events } true; 7969#L344 assume 1 == ~b0_ev~0;~b0_ev~0 := 2; 7971#L344-2 assume 1 == ~b1_ev~0;~b1_ev~0 := 2; 7973#L349-1 assume 1 == ~d0_ev~0;~d0_ev~0 := 2; 7856#L354-1 assume 1 == ~d1_ev~0;~d1_ev~0 := 2; 7857#L359-1 assume !(1 == ~z_ev~0); 7918#L364-1 assume { :end_inline_reset_delta_events } true; 7940#L422-3 [2018-11-18 08:34:42,643 INFO L796 eck$LassoCheckResult]: Loop: 7940#L422-3 assume true; 8024#L422-1 assume !false; 8019#L423 start_simulation_~kernel_st~0 := 1;assume { :begin_inline_eval } true;havoc eval_#t~ret0, eval_#t~nondet1, eval_~tmp~0, eval_~tmp___0~0;havoc eval_~tmp~0;havoc eval_~tmp___0~0; 7981#L285 assume true; 8014#L275-1 assume !false; 8011#L276 assume { :begin_inline_exists_runnable_thread } true;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 7994#L258 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 7995#L265 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 8000#L266 eval_#t~ret0 := exists_runnable_thread_#res;assume { :end_inline_exists_runnable_thread } true;eval_~tmp___0~0 := eval_#t~ret0;havoc eval_#t~ret0; 7996#L280 assume 0 != eval_~tmp___0~0; 7993#L280-1 assume 0 == ~comp_m1_st~0;eval_~tmp~0 := eval_#t~nondet1;havoc eval_#t~nondet1; 7980#L289 assume 0 != eval_~tmp~0;~comp_m1_st~0 := 1;assume { :begin_inline_method1 } true;havoc method1_~s1~0, method1_~s2~0, method1_~s3~0;havoc method1_~s1~0;havoc method1_~s2~0;havoc method1_~s3~0; 7944#L42 assume !(0 != ~b0_val~0);method1_~s1~0 := 1; 7873#L42-1 assume !(0 != ~d0_val~0);method1_~s2~0 := 1; 7862#L51 assume 0 != method1_~s2~0;method1_~s3~0 := 0; 7863#L63-2 assume 0 != method1_~s2~0; 7897#L70 assume !(0 != method1_~s1~0);method1_~s2~0 := 0; 7898#L69 assume 0 != method1_~s2~0;~z_val_t~0 := 0; 7889#L81-2 ~z_req_up~0 := 1;~comp_m1_st~0 := 2; 7890#L90 assume { :end_inline_method1 } true; 7858#L285 assume true; 7859#L275-1 assume !false; 7926#L276 assume { :begin_inline_exists_runnable_thread } true;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 7927#L258 assume !(0 == ~comp_m1_st~0);exists_runnable_thread_~__retres1~1 := 0; 7924#L265 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 7870#L266 eval_#t~ret0 := exists_runnable_thread_#res;assume { :end_inline_exists_runnable_thread } true;eval_~tmp___0~0 := eval_#t~ret0;havoc eval_#t~ret0; 7871#L280 assume !(0 != eval_~tmp___0~0); 7931#L301 assume { :end_inline_eval } true;start_simulation_~kernel_st~0 := 2;assume { :begin_inline_update_channels } true; 7903#L202-3 assume !(1 == ~b0_req_up~0); 7905#L202-5 assume !(1 == ~b1_req_up~0); 8105#L209-3 assume !(1 == ~d0_req_up~0); 8102#L216-3 assume !(1 == ~d1_req_up~0); 8033#L223-3 assume !(1 == ~z_req_up~0); 8029#L230-3 assume { :end_inline_update_channels } true;start_simulation_~kernel_st~0 := 3;assume { :begin_inline_fire_delta_events } true; 8025#L311-3 assume !(0 == ~b0_ev~0); 8020#L311-5 assume !(0 == ~b1_ev~0); 8017#L316-3 assume 0 == ~d0_ev~0;~d0_ev~0 := 1; 8016#L321-3 assume 0 == ~d1_ev~0;~d1_ev~0 := 1; 8013#L326-3 assume 0 == ~z_ev~0;~z_ev~0 := 1; 8010#L331-3 assume { :end_inline_fire_delta_events } true;assume { :begin_inline_activate_threads } true;havoc activate_threads_#t~ret2, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;assume { :begin_inline_is_method1_triggered } true;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 8007#L97-1 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 8008#L119-1 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 8147#L120-1 activate_threads_#t~ret2 := is_method1_triggered_#res;assume { :end_inline_is_method1_triggered } true;activate_threads_~tmp~1 := activate_threads_#t~ret2;havoc activate_threads_#t~ret2; 8145#L380-3 assume 0 != activate_threads_~tmp~1;~comp_m1_st~0 := 0; 7955#L380-5 assume { :end_inline_activate_threads } true;assume { :begin_inline_reset_delta_events } true; 7956#L344-3 assume 1 == ~b0_ev~0;~b0_ev~0 := 2; 7975#L344-5 assume 1 == ~b1_ev~0;~b1_ev~0 := 2; 7964#L349-3 assume 1 == ~d0_ev~0;~d0_ev~0 := 2; 8050#L354-3 assume 1 == ~d1_ev~0;~d1_ev~0 := 2; 7891#L359-3 assume 1 == ~z_ev~0;~z_ev~0 := 2; 7892#L364-3 assume { :end_inline_reset_delta_events } true;assume { :begin_inline_stop_simulation } true;havoc stop_simulation_#res;havoc stop_simulation_#t~ret3, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;assume { :begin_inline_exists_runnable_thread } true;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 7929#L258-1 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 7992#L265-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 8045#L266-1 stop_simulation_#t~ret3 := exists_runnable_thread_#res;assume { :end_inline_exists_runnable_thread } true;stop_simulation_~tmp~2 := stop_simulation_#t~ret3;havoc stop_simulation_#t~ret3; 8044#L397 assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; 8042#L404 stop_simulation_#res := stop_simulation_~__retres2~0; 8038#L405 start_simulation_#t~ret4 := stop_simulation_#res;assume { :end_inline_stop_simulation } true;start_simulation_~tmp~3 := start_simulation_#t~ret4;havoc start_simulation_#t~ret4; 8031#L439 assume !(0 != start_simulation_~tmp~3); 7940#L422-3 [2018-11-18 08:34:42,644 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 08:34:42,644 INFO L82 PathProgramCache]: Analyzing trace with hash -46930136, now seen corresponding path program 4 times [2018-11-18 08:34:42,644 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-18 08:34:42,644 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-18 08:34:42,644 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 08:34:42,645 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 08:34:42,645 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 08:34:42,648 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-18 08:34:42,652 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-18 08:34:42,656 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 08:34:42,656 INFO L82 PathProgramCache]: Analyzing trace with hash 1353122552, now seen corresponding path program 1 times [2018-11-18 08:34:42,656 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-18 08:34:42,656 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-18 08:34:42,657 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 08:34:42,657 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-18 08:34:42,657 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 08:34:42,659 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 08:34:42,669 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 7 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 08:34:42,669 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 08:34:42,669 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-18 08:34:42,669 INFO L811 eck$LassoCheckResult]: loop already infeasible [2018-11-18 08:34:42,669 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-18 08:34:42,669 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-18 08:34:42,670 INFO L87 Difference]: Start difference. First operand 332 states and 453 transitions. cyclomatic complexity: 122 Second operand 3 states. [2018-11-18 08:34:42,688 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 08:34:42,689 INFO L93 Difference]: Finished difference Result 619 states and 850 transitions. [2018-11-18 08:34:42,690 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-18 08:34:42,690 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 619 states and 850 transitions. [2018-11-18 08:34:42,692 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 576 [2018-11-18 08:34:42,696 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 619 states to 619 states and 850 transitions. [2018-11-18 08:34:42,696 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 619 [2018-11-18 08:34:42,696 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 619 [2018-11-18 08:34:42,696 INFO L73 IsDeterministic]: Start isDeterministic. Operand 619 states and 850 transitions. [2018-11-18 08:34:42,697 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2018-11-18 08:34:42,697 INFO L705 BuchiCegarLoop]: Abstraction has 619 states and 850 transitions. [2018-11-18 08:34:42,698 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 619 states and 850 transitions. [2018-11-18 08:34:42,701 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 619 to 340. [2018-11-18 08:34:42,702 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 340 states. [2018-11-18 08:34:42,702 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 340 states to 340 states and 465 transitions. [2018-11-18 08:34:42,702 INFO L728 BuchiCegarLoop]: Abstraction has 340 states and 465 transitions. [2018-11-18 08:34:42,703 INFO L608 BuchiCegarLoop]: Abstraction has 340 states and 465 transitions. [2018-11-18 08:34:42,703 INFO L442 BuchiCegarLoop]: ======== Iteration 20============ [2018-11-18 08:34:42,703 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 340 states and 465 transitions. [2018-11-18 08:34:42,704 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 297 [2018-11-18 08:34:42,704 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2018-11-18 08:34:42,704 INFO L119 BuchiIsEmpty]: Starting construction of run [2018-11-18 08:34:42,705 INFO L866 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 08:34:42,705 INFO L867 BuchiCegarLoop]: Counterexample loop histogram [2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 08:34:42,705 INFO L794 eck$LassoCheckResult]: Stem: 8935#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;~b0_val~0 := 0;~b0_val_t~0 := 0;~b0_ev~0 := 0;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_val_t~0 := 0;~b1_ev~0 := 0;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_val_t~0 := 0;~d0_ev~0 := 0;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_val_t~0 := 0;~d1_ev~0 := 0;~d1_req_up~0 := 0;~z_val~0 := 0;~z_val_t~0 := 0;~z_ev~0 := 0;~z_req_up~0 := 0;~comp_m1_st~0 := 0;~comp_m1_i~0 := 0; 8824#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res;havoc main_~__retres1~2;havoc main_~__retres1~2;assume { :begin_inline_init_model } true;~b0_val~0 := 0;~b0_ev~0 := 2;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_ev~0 := 2;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_ev~0 := 2;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_ev~0 := 2;~d1_req_up~0 := 0;~z_val~0 := 0;~z_ev~0 := 2;~z_req_up~0 := 0;~b0_val_t~0 := 1;~b0_req_up~0 := 1;~b1_val_t~0 := 1;~b1_req_up~0 := 1;~d0_val_t~0 := 1;~d0_req_up~0 := 1;~d1_val_t~0 := 1;~d1_req_up~0 := 1;~comp_m1_i~0 := 0; 8825#L480 assume { :end_inline_init_model } true;assume { :begin_inline_start_simulation } true;havoc start_simulation_#t~ret4, start_simulation_~kernel_st~0, start_simulation_~tmp~3;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;start_simulation_~kernel_st~0 := 0;assume { :begin_inline_update_channels } true; 8878#L202 assume 1 == ~b0_req_up~0;assume { :begin_inline_update_b0 } true; 8883#L127 assume ~b0_val~0 != ~b0_val_t~0;~b0_val~0 := ~b0_val_t~0;~b0_ev~0 := 0; 8893#L127-2 ~b0_req_up~0 := 0; 8894#L135 assume { :end_inline_update_b0 } true; 8862#L202-2 assume 1 == ~b1_req_up~0;assume { :begin_inline_update_b1 } true; 8845#L142 assume ~b1_val~0 != ~b1_val_t~0;~b1_val~0 := ~b1_val_t~0;~b1_ev~0 := 0; 8834#L142-2 ~b1_req_up~0 := 0; 8835#L150 assume { :end_inline_update_b1 } true; 8870#L209-1 assume 1 == ~d0_req_up~0;assume { :begin_inline_update_d0 } true; 8911#L157 assume ~d0_val~0 != ~d0_val_t~0;~d0_val~0 := ~d0_val_t~0;~d0_ev~0 := 0; 8906#L157-2 ~d0_req_up~0 := 0; 8907#L165 assume { :end_inline_update_d0 } true; 8872#L216-1 assume 1 == ~d1_req_up~0;assume { :begin_inline_update_d1 } true; 8871#L172 assume ~d1_val~0 != ~d1_val_t~0;~d1_val~0 := ~d1_val_t~0;~d1_ev~0 := 0; 8866#L172-2 ~d1_req_up~0 := 0; 8864#L180 assume { :end_inline_update_d1 } true; 8865#L223-1 assume !(1 == ~z_req_up~0); 8809#L230-1 assume { :end_inline_update_channels } true;assume { :begin_inline_init_threads } true; 8810#L245 assume !(1 == ~comp_m1_i~0);~comp_m1_st~0 := 2; 8912#L245-2 assume { :end_inline_init_threads } true;assume { :begin_inline_fire_delta_events } true; 8913#L311 assume 0 == ~b0_ev~0;~b0_ev~0 := 1; 8928#L311-2 assume 0 == ~b1_ev~0;~b1_ev~0 := 1; 8931#L316-1 assume 0 == ~d0_ev~0;~d0_ev~0 := 1; 8817#L321-1 assume 0 == ~d1_ev~0;~d1_ev~0 := 1; 8818#L326-1 assume !(0 == ~z_ev~0); 8874#L331-1 assume { :end_inline_fire_delta_events } true;assume { :begin_inline_activate_threads } true;havoc activate_threads_#t~ret2, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;assume { :begin_inline_is_method1_triggered } true;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 8897#L97 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 8900#L119 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 8841#L120 activate_threads_#t~ret2 := is_method1_triggered_#res;assume { :end_inline_is_method1_triggered } true;activate_threads_~tmp~1 := activate_threads_#t~ret2;havoc activate_threads_#t~ret2; 8842#L380 assume 0 != activate_threads_~tmp~1;~comp_m1_st~0 := 0; 8922#L380-2 assume { :end_inline_activate_threads } true;assume { :begin_inline_reset_delta_events } true; 8925#L344 assume 1 == ~b0_ev~0;~b0_ev~0 := 2; 8927#L344-2 assume 1 == ~b1_ev~0;~b1_ev~0 := 2; 8929#L349-1 assume 1 == ~d0_ev~0;~d0_ev~0 := 2; 8813#L354-1 assume 1 == ~d1_ev~0;~d1_ev~0 := 2; 8814#L359-1 assume !(1 == ~z_ev~0); 8873#L364-1 assume { :end_inline_reset_delta_events } true; 8858#L422-3 [2018-11-18 08:34:42,705 INFO L796 eck$LassoCheckResult]: Loop: 8858#L422-3 assume true; 8875#L422-1 assume !false; 8887#L423 start_simulation_~kernel_st~0 := 1;assume { :begin_inline_eval } true;havoc eval_#t~ret0, eval_#t~nondet1, eval_~tmp~0, eval_~tmp___0~0;havoc eval_~tmp~0;havoc eval_~tmp___0~0; 8815#L285 assume true; 8816#L275-1 assume !false; 8881#L276 assume { :begin_inline_exists_runnable_thread } true;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 8882#L258 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 8949#L265 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 8961#L266 eval_#t~ret0 := exists_runnable_thread_#res;assume { :end_inline_exists_runnable_thread } true;eval_~tmp___0~0 := eval_#t~ret0;havoc eval_#t~ret0; 8950#L280 assume 0 != eval_~tmp___0~0; 8948#L280-1 assume 0 == ~comp_m1_st~0;eval_~tmp~0 := eval_#t~nondet1;havoc eval_#t~nondet1; 8938#L289 assume 0 != eval_~tmp~0;~comp_m1_st~0 := 1;assume { :begin_inline_method1 } true;havoc method1_~s1~0, method1_~s2~0, method1_~s3~0;havoc method1_~s1~0;havoc method1_~s2~0;havoc method1_~s3~0; 8898#L42 assume !(0 != ~b0_val~0);method1_~s1~0 := 1; 8830#L42-1 assume !(0 != ~d0_val~0);method1_~s2~0 := 1; 8934#L51 assume 0 != method1_~s2~0;method1_~s3~0 := 0; 8963#L63-2 assume 0 != method1_~s2~0; 8854#L70 assume 0 != method1_~s1~0;method1_~s2~0 := 1; 8855#L69 assume 0 != method1_~s2~0;~z_val_t~0 := 0; 8846#L81-2 ~z_req_up~0 := 1;~comp_m1_st~0 := 2; 8847#L90 assume { :end_inline_method1 } true; 8947#L285 assume true; 8988#L275-1 assume !false; 8985#L276 assume { :begin_inline_exists_runnable_thread } true;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 8981#L258 assume !(0 == ~comp_m1_st~0);exists_runnable_thread_~__retres1~1 := 0; 8879#L265 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 8826#L266 eval_#t~ret0 := exists_runnable_thread_#res;assume { :end_inline_exists_runnable_thread } true;eval_~tmp___0~0 := eval_#t~ret0;havoc eval_#t~ret0; 8827#L280 assume !(0 != eval_~tmp___0~0); 8886#L301 assume { :end_inline_eval } true;start_simulation_~kernel_st~0 := 2;assume { :begin_inline_update_channels } true; 8859#L202-3 assume !(1 == ~b0_req_up~0); 8861#L202-5 assume !(1 == ~b1_req_up~0); 8983#L209-3 assume !(1 == ~d0_req_up~0); 8979#L216-3 assume !(1 == ~d1_req_up~0); 8975#L223-3 assume !(1 == ~z_req_up~0); 8973#L230-3 assume { :end_inline_update_channels } true;start_simulation_~kernel_st~0 := 3;assume { :begin_inline_fire_delta_events } true; 8971#L311-3 assume !(0 == ~b0_ev~0); 8969#L311-5 assume !(0 == ~b1_ev~0); 8967#L316-3 assume !(0 == ~d0_ev~0); 8966#L321-3 assume 0 == ~d1_ev~0;~d1_ev~0 := 1; 8965#L326-3 assume 0 == ~z_ev~0;~z_ev~0 := 1; 8964#L331-3 assume { :end_inline_fire_delta_events } true;assume { :begin_inline_activate_threads } true;havoc activate_threads_#t~ret2, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;assume { :begin_inline_is_method1_triggered } true;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 8959#L97-1 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 8960#L119-1 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 9068#L120-1 activate_threads_#t~ret2 := is_method1_triggered_#res;assume { :end_inline_is_method1_triggered } true;activate_threads_~tmp~1 := activate_threads_#t~ret2;havoc activate_threads_#t~ret2; 9064#L380-3 assume 0 != activate_threads_~tmp~1;~comp_m1_st~0 := 0; 9018#L380-5 assume { :end_inline_activate_threads } true;assume { :begin_inline_reset_delta_events } true; 9015#L344-3 assume 1 == ~b0_ev~0;~b0_ev~0 := 2; 9011#L344-5 assume 1 == ~b1_ev~0;~b1_ev~0 := 2; 9009#L349-3 assume 1 == ~d0_ev~0;~d0_ev~0 := 2; 9007#L354-3 assume 1 == ~d1_ev~0;~d1_ev~0 := 2; 8848#L359-3 assume 1 == ~z_ev~0;~z_ev~0 := 2; 8849#L364-3 assume { :end_inline_reset_delta_events } true;assume { :begin_inline_stop_simulation } true;havoc stop_simulation_#res;havoc stop_simulation_#t~ret3, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;assume { :begin_inline_exists_runnable_thread } true;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 8884#L258-1 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 8876#L265-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 8877#L266-1 stop_simulation_#t~ret3 := exists_runnable_thread_#res;assume { :end_inline_exists_runnable_thread } true;stop_simulation_~tmp~2 := stop_simulation_#t~ret3;havoc stop_simulation_#t~ret3; 8890#L397 assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; 8891#L404 stop_simulation_#res := stop_simulation_~__retres2~0; 8915#L405 start_simulation_#t~ret4 := stop_simulation_#res;assume { :end_inline_stop_simulation } true;start_simulation_~tmp~3 := start_simulation_#t~ret4;havoc start_simulation_#t~ret4; 8857#L439 assume !(0 != start_simulation_~tmp~3); 8858#L422-3 [2018-11-18 08:34:42,705 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 08:34:42,705 INFO L82 PathProgramCache]: Analyzing trace with hash -46930136, now seen corresponding path program 5 times [2018-11-18 08:34:42,705 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-18 08:34:42,705 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-18 08:34:42,706 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 08:34:42,707 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 08:34:42,707 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 08:34:42,714 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-18 08:34:42,718 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-18 08:34:42,725 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 08:34:42,725 INFO L82 PathProgramCache]: Analyzing trace with hash 1323830776, now seen corresponding path program 1 times [2018-11-18 08:34:42,726 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-18 08:34:42,726 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-18 08:34:42,726 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 08:34:42,726 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-18 08:34:42,726 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 08:34:42,731 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 08:34:42,749 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 7 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 08:34:42,749 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 08:34:42,749 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-18 08:34:42,750 INFO L811 eck$LassoCheckResult]: loop already infeasible [2018-11-18 08:34:42,750 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-18 08:34:42,750 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-18 08:34:42,750 INFO L87 Difference]: Start difference. First operand 340 states and 465 transitions. cyclomatic complexity: 126 Second operand 3 states. [2018-11-18 08:34:42,772 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 08:34:42,773 INFO L93 Difference]: Finished difference Result 462 states and 635 transitions. [2018-11-18 08:34:42,774 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-18 08:34:42,774 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 462 states and 635 transitions. [2018-11-18 08:34:42,776 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 419 [2018-11-18 08:34:42,778 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 462 states to 462 states and 635 transitions. [2018-11-18 08:34:42,778 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 462 [2018-11-18 08:34:42,778 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 462 [2018-11-18 08:34:42,778 INFO L73 IsDeterministic]: Start isDeterministic. Operand 462 states and 635 transitions. [2018-11-18 08:34:42,779 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2018-11-18 08:34:42,779 INFO L705 BuchiCegarLoop]: Abstraction has 462 states and 635 transitions. [2018-11-18 08:34:42,779 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 462 states and 635 transitions. [2018-11-18 08:34:42,783 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 462 to 431. [2018-11-18 08:34:42,783 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 431 states. [2018-11-18 08:34:42,784 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 431 states to 431 states and 589 transitions. [2018-11-18 08:34:42,785 INFO L728 BuchiCegarLoop]: Abstraction has 431 states and 589 transitions. [2018-11-18 08:34:42,785 INFO L608 BuchiCegarLoop]: Abstraction has 431 states and 589 transitions. [2018-11-18 08:34:42,785 INFO L442 BuchiCegarLoop]: ======== Iteration 21============ [2018-11-18 08:34:42,785 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 431 states and 589 transitions. [2018-11-18 08:34:42,786 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 388 [2018-11-18 08:34:42,786 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2018-11-18 08:34:42,786 INFO L119 BuchiIsEmpty]: Starting construction of run [2018-11-18 08:34:42,787 INFO L866 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 08:34:42,787 INFO L867 BuchiCegarLoop]: Counterexample loop histogram [2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 08:34:42,787 INFO L794 eck$LassoCheckResult]: Stem: 9747#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;~b0_val~0 := 0;~b0_val_t~0 := 0;~b0_ev~0 := 0;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_val_t~0 := 0;~b1_ev~0 := 0;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_val_t~0 := 0;~d0_ev~0 := 0;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_val_t~0 := 0;~d1_ev~0 := 0;~d1_req_up~0 := 0;~z_val~0 := 0;~z_val_t~0 := 0;~z_ev~0 := 0;~z_req_up~0 := 0;~comp_m1_st~0 := 0;~comp_m1_i~0 := 0; 9632#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res;havoc main_~__retres1~2;havoc main_~__retres1~2;assume { :begin_inline_init_model } true;~b0_val~0 := 0;~b0_ev~0 := 2;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_ev~0 := 2;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_ev~0 := 2;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_ev~0 := 2;~d1_req_up~0 := 0;~z_val~0 := 0;~z_ev~0 := 2;~z_req_up~0 := 0;~b0_val_t~0 := 1;~b0_req_up~0 := 1;~b1_val_t~0 := 1;~b1_req_up~0 := 1;~d0_val_t~0 := 1;~d0_req_up~0 := 1;~d1_val_t~0 := 1;~d1_req_up~0 := 1;~comp_m1_i~0 := 0; 9633#L480 assume { :end_inline_init_model } true;assume { :begin_inline_start_simulation } true;havoc start_simulation_#t~ret4, start_simulation_~kernel_st~0, start_simulation_~tmp~3;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;start_simulation_~kernel_st~0 := 0;assume { :begin_inline_update_channels } true; 9688#L202 assume 1 == ~b0_req_up~0;assume { :begin_inline_update_b0 } true; 9695#L127 assume ~b0_val~0 != ~b0_val_t~0;~b0_val~0 := ~b0_val_t~0;~b0_ev~0 := 0; 9708#L127-2 ~b0_req_up~0 := 0; 9709#L135 assume { :end_inline_update_b0 } true; 9671#L202-2 assume 1 == ~b1_req_up~0;assume { :begin_inline_update_b1 } true; 9653#L142 assume ~b1_val~0 != ~b1_val_t~0;~b1_val~0 := ~b1_val_t~0;~b1_ev~0 := 0; 9645#L142-2 ~b1_req_up~0 := 0; 9646#L150 assume { :end_inline_update_b1 } true; 9679#L209-1 assume 1 == ~d0_req_up~0;assume { :begin_inline_update_d0 } true; 9727#L157 assume ~d0_val~0 != ~d0_val_t~0;~d0_val~0 := ~d0_val_t~0;~d0_ev~0 := 0; 9723#L157-2 ~d0_req_up~0 := 0; 9724#L165 assume { :end_inline_update_d0 } true; 9681#L216-1 assume 1 == ~d1_req_up~0;assume { :begin_inline_update_d1 } true; 9680#L172 assume ~d1_val~0 != ~d1_val_t~0;~d1_val~0 := ~d1_val_t~0;~d1_ev~0 := 0; 9675#L172-2 ~d1_req_up~0 := 0; 9673#L180 assume { :end_inline_update_d1 } true; 9674#L223-1 assume !(1 == ~z_req_up~0); 9617#L230-1 assume { :end_inline_update_channels } true;assume { :begin_inline_init_threads } true; 9618#L245 assume !(1 == ~comp_m1_i~0);~comp_m1_st~0 := 2; 9728#L245-2 assume { :end_inline_init_threads } true;assume { :begin_inline_fire_delta_events } true; 9729#L311 assume 0 == ~b0_ev~0;~b0_ev~0 := 1; 9741#L311-2 assume 0 == ~b1_ev~0;~b1_ev~0 := 1; 9744#L316-1 assume 0 == ~d0_ev~0;~d0_ev~0 := 1; 9627#L321-1 assume 0 == ~d1_ev~0;~d1_ev~0 := 1; 9628#L326-1 assume !(0 == ~z_ev~0); 9683#L331-1 assume { :end_inline_fire_delta_events } true;assume { :begin_inline_activate_threads } true;havoc activate_threads_#t~ret2, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;assume { :begin_inline_is_method1_triggered } true;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 9712#L97 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 9717#L119 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 9649#L120 activate_threads_#t~ret2 := is_method1_triggered_#res;assume { :end_inline_is_method1_triggered } true;activate_threads_~tmp~1 := activate_threads_#t~ret2;havoc activate_threads_#t~ret2; 9650#L380 assume 0 != activate_threads_~tmp~1;~comp_m1_st~0 := 0; 9736#L380-2 assume { :end_inline_activate_threads } true;assume { :begin_inline_reset_delta_events } true; 9738#L344 assume 1 == ~b0_ev~0;~b0_ev~0 := 2; 9740#L344-2 assume 1 == ~b1_ev~0;~b1_ev~0 := 2; 9742#L349-1 assume 1 == ~d0_ev~0;~d0_ev~0 := 2; 9621#L354-1 assume 1 == ~d1_ev~0;~d1_ev~0 := 2; 9622#L359-1 assume !(1 == ~z_ev~0); 9682#L364-1 assume { :end_inline_reset_delta_events } true; 9684#L422-3 [2018-11-18 08:34:42,787 INFO L796 eck$LassoCheckResult]: Loop: 9684#L422-3 assume true; 9685#L422-1 assume !false; 9765#L423 start_simulation_~kernel_st~0 := 1;assume { :begin_inline_eval } true;havoc eval_#t~ret0, eval_#t~nondet1, eval_~tmp~0, eval_~tmp___0~0;havoc eval_~tmp~0;havoc eval_~tmp___0~0; 9623#L285 assume true; 9624#L275-1 assume !false; 9692#L276 assume { :begin_inline_exists_runnable_thread } true;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 9693#L258 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 9689#L265 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 9634#L266 eval_#t~ret0 := exists_runnable_thread_#res;assume { :end_inline_exists_runnable_thread } true;eval_~tmp___0~0 := eval_#t~ret0;havoc eval_#t~ret0; 9635#L280 assume 0 != eval_~tmp___0~0; 9766#L280-1 assume 0 == ~comp_m1_st~0;eval_~tmp~0 := eval_#t~nondet1;havoc eval_#t~nondet1; 9750#L289 assume 0 != eval_~tmp~0;~comp_m1_st~0 := 1;assume { :begin_inline_method1 } true;havoc method1_~s1~0, method1_~s2~0, method1_~s3~0;havoc method1_~s1~0;havoc method1_~s2~0;havoc method1_~s3~0; 9713#L42 assume !(0 != ~b0_val~0);method1_~s1~0 := 1; 9638#L42-1 assume !(0 != ~d0_val~0);method1_~s2~0 := 1; 9625#L51 assume 0 != method1_~s2~0;method1_~s3~0 := 0; 9626#L63-2 assume 0 != method1_~s2~0; 9663#L70 assume 0 != method1_~s1~0;method1_~s2~0 := 1; 9664#L69 assume 0 != method1_~s2~0;~z_val_t~0 := 0; 9654#L81-2 ~z_req_up~0 := 1;~comp_m1_st~0 := 2; 9655#L90 assume { :end_inline_method1 } true; 9760#L285 assume true; 9838#L275-1 assume !false; 9836#L276 assume { :begin_inline_exists_runnable_thread } true;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 9835#L258 assume !(0 == ~comp_m1_st~0);exists_runnable_thread_~__retres1~1 := 0; 9834#L265 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 9833#L266 eval_#t~ret0 := exists_runnable_thread_#res;assume { :end_inline_exists_runnable_thread } true;eval_~tmp___0~0 := eval_#t~ret0;havoc eval_#t~ret0; 9830#L280 assume !(0 != eval_~tmp___0~0); 9828#L301 assume { :end_inline_eval } true;start_simulation_~kernel_st~0 := 2;assume { :begin_inline_update_channels } true; 9668#L202-3 assume !(1 == ~b0_req_up~0); 9670#L202-5 assume !(1 == ~b1_req_up~0); 9821#L209-3 assume !(1 == ~d0_req_up~0); 9806#L216-3 assume !(1 == ~d1_req_up~0); 9799#L223-3 assume 1 == ~z_req_up~0;assume { :begin_inline_update_z } true; 9788#L187-3 assume ~z_val~0 != ~z_val_t~0;~z_val~0 := ~z_val_t~0;~z_ev~0 := 0; 9790#L187-5 ~z_req_up~0 := 0; 9786#L195-1 assume { :end_inline_update_z } true; 9783#L230-3 assume { :end_inline_update_channels } true;start_simulation_~kernel_st~0 := 3;assume { :begin_inline_fire_delta_events } true; 9779#L311-3 assume !(0 == ~b0_ev~0); 9777#L311-5 assume 0 == ~b1_ev~0;~b1_ev~0 := 1; 9778#L316-3 assume !(0 == ~d0_ev~0); 9892#L321-3 assume 0 == ~d1_ev~0;~d1_ev~0 := 1; 9890#L326-3 assume 0 == ~z_ev~0;~z_ev~0 := 1; 9888#L331-3 assume { :end_inline_fire_delta_events } true;assume { :begin_inline_activate_threads } true;havoc activate_threads_#t~ret2, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;assume { :begin_inline_is_method1_triggered } true;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 9886#L97-1 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 9714#L119-1 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 9647#L120-1 activate_threads_#t~ret2 := is_method1_triggered_#res;assume { :end_inline_is_method1_triggered } true;activate_threads_~tmp~1 := activate_threads_#t~ret2;havoc activate_threads_#t~ret2; 9648#L380-3 assume 0 != activate_threads_~tmp~1;~comp_m1_st~0 := 0; 10041#L380-5 assume { :end_inline_activate_threads } true;assume { :begin_inline_reset_delta_events } true; 9743#L344-3 assume 1 == ~b0_ev~0;~b0_ev~0 := 2; 9733#L344-5 assume 1 == ~b1_ev~0;~b1_ev~0 := 2; 9734#L349-3 assume 1 == ~d0_ev~0;~d0_ev~0 := 2; 9630#L354-3 assume 1 == ~d1_ev~0;~d1_ev~0 := 2; 9631#L359-3 assume 1 == ~z_ev~0;~z_ev~0 := 2; 9897#L364-3 assume { :end_inline_reset_delta_events } true;assume { :begin_inline_stop_simulation } true;havoc stop_simulation_#res;havoc stop_simulation_#t~ret3, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;assume { :begin_inline_exists_runnable_thread } true;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 9764#L258-1 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 9686#L265-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 9687#L266-1 stop_simulation_#t~ret3 := exists_runnable_thread_#res;assume { :end_inline_exists_runnable_thread } true;stop_simulation_~tmp~2 := stop_simulation_#t~ret3;havoc stop_simulation_#t~ret3; 9863#L397 assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; 9757#L404 stop_simulation_#res := stop_simulation_~__retres2~0; 9758#L405 start_simulation_#t~ret4 := stop_simulation_#res;assume { :end_inline_stop_simulation } true;start_simulation_~tmp~3 := start_simulation_#t~ret4;havoc start_simulation_#t~ret4; 9860#L439 assume !(0 != start_simulation_~tmp~3); 9684#L422-3 [2018-11-18 08:34:42,788 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 08:34:42,788 INFO L82 PathProgramCache]: Analyzing trace with hash -46930136, now seen corresponding path program 6 times [2018-11-18 08:34:42,788 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-18 08:34:42,788 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-18 08:34:42,788 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 08:34:42,789 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 08:34:42,789 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 08:34:42,792 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-18 08:34:42,796 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-18 08:34:42,802 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 08:34:42,802 INFO L82 PathProgramCache]: Analyzing trace with hash -99519453, now seen corresponding path program 1 times [2018-11-18 08:34:42,802 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-18 08:34:42,802 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-18 08:34:42,803 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 08:34:42,803 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-18 08:34:42,803 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 08:34:42,807 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-18 08:34:42,811 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-18 08:34:42,818 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 08:34:42,818 INFO L82 PathProgramCache]: Analyzing trace with hash 1174007388, now seen corresponding path program 1 times [2018-11-18 08:34:42,818 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-18 08:34:42,818 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-18 08:34:42,818 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 08:34:42,819 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 08:34:42,819 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 08:34:42,823 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 08:34:42,865 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 7 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 08:34:42,866 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 08:34:42,866 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 08:34:43,186 WARN L180 SmtUtils]: Spent 313.00 ms on a formula simplification. DAG size of input: 135 DAG size of output: 115 [2018-11-18 08:34:43,343 WARN L180 SmtUtils]: Spent 147.00 ms on a formula simplification that was a NOOP. DAG size: 83 [2018-11-18 08:34:43,358 INFO L216 LassoAnalysis]: Preferences: [2018-11-18 08:34:43,359 INFO L124 ssoRankerPreferences]: Compute integeral hull: false [2018-11-18 08:34:43,360 INFO L125 ssoRankerPreferences]: Enable LassoPartitioneer: true [2018-11-18 08:34:43,360 INFO L126 ssoRankerPreferences]: Term annotations enabled: false [2018-11-18 08:34:43,360 INFO L127 ssoRankerPreferences]: Use exernal solver: true [2018-11-18 08:34:43,360 INFO L128 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2018-11-18 08:34:43,360 INFO L129 ssoRankerPreferences]: Dump SMT script to file: false [2018-11-18 08:34:43,360 INFO L130 ssoRankerPreferences]: Path of dumped script: [2018-11-18 08:34:43,360 INFO L131 ssoRankerPreferences]: Filename of dumped script: bist_cell_true-unreach-call_false-termination.cil.c_Iteration21_Loop [2018-11-18 08:34:43,360 INFO L132 ssoRankerPreferences]: MapElimAlgo: Frank [2018-11-18 08:34:43,360 INFO L282 LassoAnalysis]: Starting lasso preprocessing... [2018-11-18 08:34:43,381 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:43,387 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:43,393 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:43,395 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:43,399 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:43,401 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:43,405 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:43,407 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:43,411 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:43,413 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:43,414 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:43,419 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:43,422 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:43,424 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:43,427 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:43,429 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:43,433 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:43,435 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:43,438 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:43,441 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:43,443 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:43,445 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:43,446 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:43,450 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:43,454 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:43,456 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:43,458 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:43,460 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:43,668 INFO L300 LassoAnalysis]: Preprocessing complete. [2018-11-18 08:34:43,668 INFO L412 LassoAnalysis]: Checking for nontermination... No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_89f12fe3-ff39-4721-a39a-11b61e72f14e/bin-2019/uautomizer/z3 Starting monitored process 2 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2018-11-18 08:34:43,674 INFO L151 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2018-11-18 08:34:43,674 INFO L163 nArgumentSynthesizer]: Using integer mode. [2018-11-18 08:34:43,685 INFO L445 LassoAnalysis]: Proved nontermination for one component. [2018-11-18 08:34:43,685 INFO L448 LassoAnalysis]: Non-Termination argument consisting of: Initial state: {ULTIMATE.start_eval_~tmp___0~0=0} Honda state: {ULTIMATE.start_eval_~tmp___0~0=0} Generalized eigenvectors: [] Lambdas: [] Nus: [] No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_89f12fe3-ff39-4721-a39a-11b61e72f14e/bin-2019/uautomizer/z3 Starting monitored process 3 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2018-11-18 08:34:43,711 INFO L151 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2018-11-18 08:34:43,711 INFO L163 nArgumentSynthesizer]: Using integer mode. No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_89f12fe3-ff39-4721-a39a-11b61e72f14e/bin-2019/uautomizer/z3 Starting monitored process 4 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2018-11-18 08:34:43,740 INFO L151 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 3 Nilpotent components: true [2018-11-18 08:34:43,740 INFO L163 nArgumentSynthesizer]: Using integer mode. [2018-11-18 08:34:43,758 INFO L452 LassoAnalysis]: Proving nontermination failed: No geometric nontermination argument exists. [2018-11-18 08:34:43,786 INFO L216 LassoAnalysis]: Preferences: [2018-11-18 08:34:43,787 INFO L124 ssoRankerPreferences]: Compute integeral hull: false [2018-11-18 08:34:43,787 INFO L125 ssoRankerPreferences]: Enable LassoPartitioneer: true [2018-11-18 08:34:43,787 INFO L126 ssoRankerPreferences]: Term annotations enabled: false [2018-11-18 08:34:43,787 INFO L127 ssoRankerPreferences]: Use exernal solver: false [2018-11-18 08:34:43,787 INFO L128 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2018-11-18 08:34:43,787 INFO L129 ssoRankerPreferences]: Dump SMT script to file: false [2018-11-18 08:34:43,787 INFO L130 ssoRankerPreferences]: Path of dumped script: [2018-11-18 08:34:43,787 INFO L131 ssoRankerPreferences]: Filename of dumped script: bist_cell_true-unreach-call_false-termination.cil.c_Iteration21_Loop [2018-11-18 08:34:43,787 INFO L132 ssoRankerPreferences]: MapElimAlgo: Frank [2018-11-18 08:34:43,787 INFO L282 LassoAnalysis]: Starting lasso preprocessing... [2018-11-18 08:34:43,789 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:43,829 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:43,842 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:43,856 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:43,858 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:43,860 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:43,864 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:43,866 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:43,885 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:43,887 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:43,889 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:43,890 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:43,893 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:43,897 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:43,899 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:43,902 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:43,904 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:43,908 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:43,910 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:43,913 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:43,916 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:43,918 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:43,920 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:43,922 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:43,924 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:43,926 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:43,928 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:43,931 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:44,166 INFO L300 LassoAnalysis]: Preprocessing complete. [2018-11-18 08:34:44,171 INFO L497 LassoAnalysis]: Using template 'affine'. [2018-11-18 08:34:44,173 INFO L122 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSES Number of strict supporting invariants: 0 Number of non-strict supporting invariants: 1 Consider only non-deceasing supporting invariants: true Simplify termination arguments: true Simplify supporting invariants: trueOverapproximate stem: false [2018-11-18 08:34:44,174 INFO L339 nArgumentSynthesizer]: Template has degree 0. [2018-11-18 08:34:44,174 INFO L352 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2018-11-18 08:34:44,175 INFO L205 nArgumentSynthesizer]: 1 stem disjuncts [2018-11-18 08:34:44,175 INFO L206 nArgumentSynthesizer]: 1 loop disjuncts [2018-11-18 08:34:44,175 INFO L207 nArgumentSynthesizer]: 2 template conjuncts. [2018-11-18 08:34:44,177 INFO L402 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2018-11-18 08:34:44,177 INFO L403 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2018-11-18 08:34:44,180 INFO L530 LassoAnalysis]: Proving termination failed for this template and these settings. [2018-11-18 08:34:44,180 INFO L122 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSES Number of strict supporting invariants: 0 Number of non-strict supporting invariants: 1 Consider only non-deceasing supporting invariants: true Simplify termination arguments: true Simplify supporting invariants: trueOverapproximate stem: false [2018-11-18 08:34:44,181 INFO L339 nArgumentSynthesizer]: Template has degree 0. [2018-11-18 08:34:44,181 INFO L352 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2018-11-18 08:34:44,181 INFO L205 nArgumentSynthesizer]: 1 stem disjuncts [2018-11-18 08:34:44,181 INFO L206 nArgumentSynthesizer]: 1 loop disjuncts [2018-11-18 08:34:44,181 INFO L207 nArgumentSynthesizer]: 2 template conjuncts. [2018-11-18 08:34:44,182 INFO L402 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2018-11-18 08:34:44,182 INFO L403 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2018-11-18 08:34:44,182 INFO L530 LassoAnalysis]: Proving termination failed for this template and these settings. [2018-11-18 08:34:44,183 INFO L122 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSES Number of strict supporting invariants: 0 Number of non-strict supporting invariants: 1 Consider only non-deceasing supporting invariants: true Simplify termination arguments: true Simplify supporting invariants: trueOverapproximate stem: false [2018-11-18 08:34:44,183 INFO L339 nArgumentSynthesizer]: Template has degree 0. [2018-11-18 08:34:44,183 INFO L352 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2018-11-18 08:34:44,183 INFO L205 nArgumentSynthesizer]: 1 stem disjuncts [2018-11-18 08:34:44,183 INFO L206 nArgumentSynthesizer]: 1 loop disjuncts [2018-11-18 08:34:44,184 INFO L207 nArgumentSynthesizer]: 2 template conjuncts. [2018-11-18 08:34:44,184 INFO L402 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2018-11-18 08:34:44,184 INFO L403 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2018-11-18 08:34:44,191 INFO L421 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2018-11-18 08:34:44,194 INFO L443 ModelExtractionUtils]: Simplification made 3 calls to the SMT solver. [2018-11-18 08:34:44,195 INFO L444 ModelExtractionUtils]: 0 out of 3 variables were initially zero. Simplification set additionally 0 variables to zero. [2018-11-18 08:34:44,197 INFO L437 nArgumentSynthesizer]: Simplifying supporting invariants... [2018-11-18 08:34:44,197 INFO L440 nArgumentSynthesizer]: Removed 0 redundant supporting invariants from a total of 0. [2018-11-18 08:34:44,198 INFO L518 LassoAnalysis]: Proved termination. [2018-11-18 08:34:44,198 INFO L520 LassoAnalysis]: Termination argument consisting of: Ranking function f(~d1_ev~0) = -1*~d1_ev~0 + 1 Supporting invariants [] [2018-11-18 08:34:44,199 INFO L297 tatePredicateManager]: 0 out of 0 supporting invariants were superfluous and have been removed [2018-11-18 08:34:44,232 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 08:34:44,262 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 08:34:44,266 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 08:34:44,296 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 08:34:44,299 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 08:34:44,366 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2018-11-18 08:34:44,371 INFO L152 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.1 stem predicates 3 loop predicates [2018-11-18 08:34:44,371 INFO L72 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand 431 states and 589 transitions. cyclomatic complexity: 159 Second operand 5 states. [2018-11-18 08:34:44,454 INFO L76 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand 431 states and 589 transitions. cyclomatic complexity: 159. Second operand 5 states. Result 1229 states and 1694 transitions. Complement of second has 5 states. [2018-11-18 08:34:44,456 INFO L142 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 3 states 1 stem states 1 non-accepting loop states 1 accepting loop states [2018-11-18 08:34:44,456 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5 states. [2018-11-18 08:34:44,456 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 168 transitions. [2018-11-18 08:34:44,457 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 3 states and 168 transitions. Stem has 40 letters. Loop has 61 letters. [2018-11-18 08:34:44,459 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2018-11-18 08:34:44,459 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 3 states and 168 transitions. Stem has 101 letters. Loop has 61 letters. [2018-11-18 08:34:44,460 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2018-11-18 08:34:44,460 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 3 states and 168 transitions. Stem has 40 letters. Loop has 122 letters. [2018-11-18 08:34:44,462 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2018-11-18 08:34:44,462 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1229 states and 1694 transitions. [2018-11-18 08:34:44,471 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 776 [2018-11-18 08:34:44,475 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1229 states to 1229 states and 1694 transitions. [2018-11-18 08:34:44,475 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 820 [2018-11-18 08:34:44,476 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 831 [2018-11-18 08:34:44,476 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1229 states and 1694 transitions. [2018-11-18 08:34:44,476 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2018-11-18 08:34:44,476 INFO L705 BuchiCegarLoop]: Abstraction has 1229 states and 1694 transitions. [2018-11-18 08:34:44,477 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1229 states and 1694 transitions. [2018-11-18 08:34:44,490 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1229 to 1218. [2018-11-18 08:34:44,490 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1218 states. [2018-11-18 08:34:44,492 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1218 states to 1218 states and 1683 transitions. [2018-11-18 08:34:44,493 INFO L728 BuchiCegarLoop]: Abstraction has 1218 states and 1683 transitions. [2018-11-18 08:34:44,493 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 08:34:44,493 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 08:34:44,493 INFO L87 Difference]: Start difference. First operand 1218 states and 1683 transitions. Second operand 4 states. [2018-11-18 08:34:44,553 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 08:34:44,553 INFO L93 Difference]: Finished difference Result 1218 states and 1680 transitions. [2018-11-18 08:34:44,554 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 08:34:44,555 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1218 states and 1680 transitions. [2018-11-18 08:34:44,559 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 776 [2018-11-18 08:34:44,562 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1218 states to 1218 states and 1680 transitions. [2018-11-18 08:34:44,562 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 820 [2018-11-18 08:34:44,563 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 820 [2018-11-18 08:34:44,563 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1218 states and 1680 transitions. [2018-11-18 08:34:44,563 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2018-11-18 08:34:44,563 INFO L705 BuchiCegarLoop]: Abstraction has 1218 states and 1680 transitions. [2018-11-18 08:34:44,564 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1218 states and 1680 transitions. [2018-11-18 08:34:44,573 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1218 to 1218. [2018-11-18 08:34:44,573 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1218 states. [2018-11-18 08:34:44,576 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1218 states to 1218 states and 1680 transitions. [2018-11-18 08:34:44,576 INFO L728 BuchiCegarLoop]: Abstraction has 1218 states and 1680 transitions. [2018-11-18 08:34:44,576 INFO L608 BuchiCegarLoop]: Abstraction has 1218 states and 1680 transitions. [2018-11-18 08:34:44,576 INFO L442 BuchiCegarLoop]: ======== Iteration 22============ [2018-11-18 08:34:44,576 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1218 states and 1680 transitions. [2018-11-18 08:34:44,580 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 776 [2018-11-18 08:34:44,581 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2018-11-18 08:34:44,581 INFO L119 BuchiIsEmpty]: Starting construction of run [2018-11-18 08:34:44,582 INFO L866 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 08:34:44,582 INFO L867 BuchiCegarLoop]: Counterexample loop histogram [2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 08:34:44,582 INFO L794 eck$LassoCheckResult]: Stem: 14264#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;~b0_val~0 := 0;~b0_val_t~0 := 0;~b0_ev~0 := 0;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_val_t~0 := 0;~b1_ev~0 := 0;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_val_t~0 := 0;~d0_ev~0 := 0;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_val_t~0 := 0;~d1_ev~0 := 0;~d1_req_up~0 := 0;~z_val~0 := 0;~z_val_t~0 := 0;~z_ev~0 := 0;~z_req_up~0 := 0;~comp_m1_st~0 := 0;~comp_m1_i~0 := 0; 14069#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res;havoc main_~__retres1~2;havoc main_~__retres1~2;assume { :begin_inline_init_model } true;~b0_val~0 := 0;~b0_ev~0 := 2;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_ev~0 := 2;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_ev~0 := 2;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_ev~0 := 2;~d1_req_up~0 := 0;~z_val~0 := 0;~z_ev~0 := 2;~z_req_up~0 := 0;~b0_val_t~0 := 1;~b0_req_up~0 := 1;~b1_val_t~0 := 1;~b1_req_up~0 := 1;~d0_val_t~0 := 1;~d0_req_up~0 := 1;~d1_val_t~0 := 1;~d1_req_up~0 := 1;~comp_m1_i~0 := 0; 14070#L480 assume { :end_inline_init_model } true;assume { :begin_inline_start_simulation } true;havoc start_simulation_#t~ret4, start_simulation_~kernel_st~0, start_simulation_~tmp~3;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;start_simulation_~kernel_st~0 := 0;assume { :begin_inline_update_channels } true; 14160#L202 assume 1 == ~b0_req_up~0;assume { :begin_inline_update_b0 } true; 14171#L127 assume ~b0_val~0 != ~b0_val_t~0;~b0_val~0 := ~b0_val_t~0;~b0_ev~0 := 0; 14194#L127-2 ~b0_req_up~0 := 0; 14195#L135 assume { :end_inline_update_b0 } true; 14136#L202-2 assume 1 == ~b1_req_up~0;assume { :begin_inline_update_b1 } true; 14105#L142 assume ~b1_val~0 != ~b1_val_t~0;~b1_val~0 := ~b1_val_t~0;~b1_ev~0 := 0; 14087#L142-2 ~b1_req_up~0 := 0; 14088#L150 assume { :end_inline_update_b1 } true; 14149#L209-1 assume 1 == ~d0_req_up~0;assume { :begin_inline_update_d0 } true; 14228#L157 assume ~d0_val~0 != ~d0_val_t~0;~d0_val~0 := ~d0_val_t~0;~d0_ev~0 := 0; 14219#L157-2 ~d0_req_up~0 := 0; 14220#L165 assume { :end_inline_update_d0 } true; 14151#L216-1 assume 1 == ~d1_req_up~0;assume { :begin_inline_update_d1 } true; 14150#L172 assume ~d1_val~0 != ~d1_val_t~0;~d1_val~0 := ~d1_val_t~0;~d1_ev~0 := 0; 14141#L172-2 ~d1_req_up~0 := 0; 14139#L180 assume { :end_inline_update_d1 } true; 14140#L223-1 assume !(1 == ~z_req_up~0); 14042#L230-1 assume { :end_inline_update_channels } true;assume { :begin_inline_init_threads } true; 14043#L245 assume !(1 == ~comp_m1_i~0);~comp_m1_st~0 := 2; 14229#L245-2 assume { :end_inline_init_threads } true;assume { :begin_inline_fire_delta_events } true; 14230#L311 assume 0 == ~b0_ev~0;~b0_ev~0 := 1; 14253#L311-2 assume 0 == ~b1_ev~0;~b1_ev~0 := 1; 14258#L316-1 assume 0 == ~d0_ev~0;~d0_ev~0 := 1; 14054#L321-1 assume 0 == ~d1_ev~0;~d1_ev~0 := 1; 14055#L326-1 assume !(0 == ~z_ev~0); 14153#L331-1 assume { :end_inline_fire_delta_events } true;assume { :begin_inline_activate_threads } true;havoc activate_threads_#t~ret2, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;assume { :begin_inline_is_method1_triggered } true;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 14201#L97 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 14209#L119 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 14099#L120 activate_threads_#t~ret2 := is_method1_triggered_#res;assume { :end_inline_is_method1_triggered } true;activate_threads_~tmp~1 := activate_threads_#t~ret2;havoc activate_threads_#t~ret2; 14100#L380 assume 0 != activate_threads_~tmp~1;~comp_m1_st~0 := 0; 14246#L380-2 assume { :end_inline_activate_threads } true;assume { :begin_inline_reset_delta_events } true; 14250#L344 assume 1 == ~b0_ev~0;~b0_ev~0 := 2; 14252#L344-2 assume 1 == ~b1_ev~0;~b1_ev~0 := 2; 14254#L349-1 assume 1 == ~d0_ev~0;~d0_ev~0 := 2; 14048#L354-1 assume 1 == ~d1_ev~0;~d1_ev~0 := 2; 14049#L359-1 assume !(1 == ~z_ev~0); 14152#L364-1 assume { :end_inline_reset_delta_events } true; 14196#L422-3 assume true; 14154#L422-1 [2018-11-18 08:34:44,582 INFO L796 eck$LassoCheckResult]: Loop: 14154#L422-1 assume !false; 14180#L423 start_simulation_~kernel_st~0 := 1;assume { :begin_inline_eval } true;havoc eval_#t~ret0, eval_#t~nondet1, eval_~tmp~0, eval_~tmp___0~0;havoc eval_~tmp~0;havoc eval_~tmp___0~0; 14050#L285 assume true; 14051#L275-1 assume !false; 14167#L276 assume { :begin_inline_exists_runnable_thread } true;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 14168#L258 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 14161#L265 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 14071#L266 eval_#t~ret0 := exists_runnable_thread_#res;assume { :end_inline_exists_runnable_thread } true;eval_~tmp___0~0 := eval_#t~ret0;havoc eval_#t~ret0; 14072#L280 assume 0 != eval_~tmp___0~0; 14298#L280-1 assume 0 == ~comp_m1_st~0;eval_~tmp~0 := eval_#t~nondet1;havoc eval_#t~nondet1; 14269#L289 assume 0 != eval_~tmp~0;~comp_m1_st~0 := 1;assume { :begin_inline_method1 } true;havoc method1_~s1~0, method1_~s2~0, method1_~s3~0;havoc method1_~s1~0;havoc method1_~s2~0;havoc method1_~s3~0; 14202#L42 assume 0 != ~b0_val~0; 14075#L43 assume 0 != ~d1_val~0;method1_~s1~0 := 0; 14076#L42-1 assume !(0 != ~d0_val~0);method1_~s2~0 := 1; 14262#L51 assume 0 != method1_~s2~0;method1_~s3~0 := 0; 14255#L63-2 assume 0 != method1_~s2~0; 14256#L70 assume !(0 != method1_~s1~0);method1_~s2~0 := 0; 14311#L69 assume 0 != method1_~s2~0;~z_val_t~0 := 0; 14106#L81-2 ~z_req_up~0 := 1;~comp_m1_st~0 := 2; 14107#L90 assume { :end_inline_method1 } true; 14288#L285 assume true; 14985#L275-1 assume !false; 14983#L276 assume { :begin_inline_exists_runnable_thread } true;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 14982#L258 assume !(0 == ~comp_m1_st~0);exists_runnable_thread_~__retres1~1 := 0; 14980#L265 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 14978#L266 eval_#t~ret0 := exists_runnable_thread_#res;assume { :end_inline_exists_runnable_thread } true;eval_~tmp___0~0 := eval_#t~ret0;havoc eval_#t~ret0; 14966#L280 assume !(0 != eval_~tmp___0~0); 14177#L301 assume { :end_inline_eval } true;start_simulation_~kernel_st~0 := 2;assume { :begin_inline_update_channels } true; 14130#L202-3 assume !(1 == ~b0_req_up~0); 14132#L202-5 assume !(1 == ~b1_req_up~0); 14719#L209-3 assume !(1 == ~d0_req_up~0); 14713#L216-3 assume !(1 == ~d1_req_up~0); 14708#L223-3 assume 1 == ~z_req_up~0;assume { :begin_inline_update_z } true; 14594#L187-3 assume ~z_val~0 != ~z_val_t~0;~z_val~0 := ~z_val_t~0;~z_ev~0 := 0; 14703#L187-5 ~z_req_up~0 := 0; 14592#L195-1 assume { :end_inline_update_z } true; 14590#L230-3 assume { :end_inline_update_channels } true;start_simulation_~kernel_st~0 := 3;assume { :begin_inline_fire_delta_events } true; 14586#L311-3 assume !(0 == ~b0_ev~0); 14582#L311-5 assume !(0 == ~b1_ev~0); 14578#L316-3 assume !(0 == ~d0_ev~0); 14577#L321-3 assume !(0 == ~d1_ev~0); 14574#L326-3 assume 0 == ~z_ev~0;~z_ev~0 := 1; 14573#L331-3 assume { :end_inline_fire_delta_events } true;assume { :begin_inline_activate_threads } true;havoc activate_threads_#t~ret2, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;assume { :begin_inline_is_method1_triggered } true;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 14568#L97-1 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 14570#L119-1 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 15112#L120-1 activate_threads_#t~ret2 := is_method1_triggered_#res;assume { :end_inline_is_method1_triggered } true;activate_threads_~tmp~1 := activate_threads_#t~ret2;havoc activate_threads_#t~ret2; 15109#L380-3 assume 0 != activate_threads_~tmp~1;~comp_m1_st~0 := 0; 15107#L380-5 assume { :end_inline_activate_threads } true;assume { :begin_inline_reset_delta_events } true; 15057#L344-3 assume 1 == ~b0_ev~0;~b0_ev~0 := 2; 15054#L344-5 assume 1 == ~b1_ev~0;~b1_ev~0 := 2; 15050#L349-3 assume 1 == ~d0_ev~0;~d0_ev~0 := 2; 14064#L354-3 assume !(1 == ~d1_ev~0); 14065#L359-3 assume 1 == ~z_ev~0;~z_ev~0 := 2; 14110#L364-3 assume { :end_inline_reset_delta_events } true;assume { :begin_inline_stop_simulation } true;havoc stop_simulation_#res;havoc stop_simulation_#t~ret3, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;assume { :begin_inline_exists_runnable_thread } true;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 14172#L258-1 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 14156#L265-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 14157#L266-1 stop_simulation_#t~ret3 := exists_runnable_thread_#res;assume { :end_inline_exists_runnable_thread } true;stop_simulation_~tmp~2 := stop_simulation_#t~ret3;havoc stop_simulation_#t~ret3; 14186#L397 assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; 14187#L404 stop_simulation_#res := stop_simulation_~__retres2~0; 14232#L405 start_simulation_#t~ret4 := stop_simulation_#res;assume { :end_inline_stop_simulation } true;start_simulation_~tmp~3 := start_simulation_#t~ret4;havoc start_simulation_#t~ret4; 14126#L439 assume !(0 != start_simulation_~tmp~3); 14127#L422-3 assume true; 14154#L422-1 [2018-11-18 08:34:44,582 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 08:34:44,582 INFO L82 PathProgramCache]: Analyzing trace with hash -1454834027, now seen corresponding path program 1 times [2018-11-18 08:34:44,582 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-18 08:34:44,583 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-18 08:34:44,583 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 08:34:44,583 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 08:34:44,583 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 08:34:44,588 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-18 08:34:44,591 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-18 08:34:44,595 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 08:34:44,595 INFO L82 PathProgramCache]: Analyzing trace with hash 1883097947, now seen corresponding path program 1 times [2018-11-18 08:34:44,596 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-18 08:34:44,596 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-18 08:34:44,596 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 08:34:44,596 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 08:34:44,596 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 08:34:44,599 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 08:34:44,616 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 7 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 08:34:44,616 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 08:34:44,616 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-18 08:34:44,616 INFO L811 eck$LassoCheckResult]: loop already infeasible [2018-11-18 08:34:44,616 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-18 08:34:44,616 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-18 08:34:44,617 INFO L87 Difference]: Start difference. First operand 1218 states and 1680 transitions. cyclomatic complexity: 465 Second operand 3 states. [2018-11-18 08:34:44,653 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 08:34:44,654 INFO L93 Difference]: Finished difference Result 2329 states and 3191 transitions. [2018-11-18 08:34:44,655 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-18 08:34:44,655 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 2329 states and 3191 transitions. [2018-11-18 08:34:44,663 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 1510 [2018-11-18 08:34:44,670 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 2329 states to 2329 states and 3191 transitions. [2018-11-18 08:34:44,670 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1554 [2018-11-18 08:34:44,671 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1554 [2018-11-18 08:34:44,671 INFO L73 IsDeterministic]: Start isDeterministic. Operand 2329 states and 3191 transitions. [2018-11-18 08:34:44,672 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2018-11-18 08:34:44,672 INFO L705 BuchiCegarLoop]: Abstraction has 2329 states and 3191 transitions. [2018-11-18 08:34:44,674 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2329 states and 3191 transitions. [2018-11-18 08:34:44,685 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2329 to 1215. [2018-11-18 08:34:44,685 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1215 states. [2018-11-18 08:34:44,688 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1215 states to 1215 states and 1662 transitions. [2018-11-18 08:34:44,688 INFO L728 BuchiCegarLoop]: Abstraction has 1215 states and 1662 transitions. [2018-11-18 08:34:44,688 INFO L608 BuchiCegarLoop]: Abstraction has 1215 states and 1662 transitions. [2018-11-18 08:34:44,688 INFO L442 BuchiCegarLoop]: ======== Iteration 23============ [2018-11-18 08:34:44,688 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1215 states and 1662 transitions. [2018-11-18 08:34:44,692 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 774 [2018-11-18 08:34:44,692 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2018-11-18 08:34:44,692 INFO L119 BuchiIsEmpty]: Starting construction of run [2018-11-18 08:34:44,693 INFO L866 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 08:34:44,693 INFO L867 BuchiCegarLoop]: Counterexample loop histogram [2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 08:34:44,693 INFO L794 eck$LassoCheckResult]: Stem: 17817#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;~b0_val~0 := 0;~b0_val_t~0 := 0;~b0_ev~0 := 0;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_val_t~0 := 0;~b1_ev~0 := 0;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_val_t~0 := 0;~d0_ev~0 := 0;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_val_t~0 := 0;~d1_ev~0 := 0;~d1_req_up~0 := 0;~z_val~0 := 0;~z_val_t~0 := 0;~z_ev~0 := 0;~z_req_up~0 := 0;~comp_m1_st~0 := 0;~comp_m1_i~0 := 0; 17622#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res;havoc main_~__retres1~2;havoc main_~__retres1~2;assume { :begin_inline_init_model } true;~b0_val~0 := 0;~b0_ev~0 := 2;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_ev~0 := 2;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_ev~0 := 2;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_ev~0 := 2;~d1_req_up~0 := 0;~z_val~0 := 0;~z_ev~0 := 2;~z_req_up~0 := 0;~b0_val_t~0 := 1;~b0_req_up~0 := 1;~b1_val_t~0 := 1;~b1_req_up~0 := 1;~d0_val_t~0 := 1;~d0_req_up~0 := 1;~d1_val_t~0 := 1;~d1_req_up~0 := 1;~comp_m1_i~0 := 0; 17623#L480 assume { :end_inline_init_model } true;assume { :begin_inline_start_simulation } true;havoc start_simulation_#t~ret4, start_simulation_~kernel_st~0, start_simulation_~tmp~3;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;start_simulation_~kernel_st~0 := 0;assume { :begin_inline_update_channels } true; 17717#L202 assume 1 == ~b0_req_up~0;assume { :begin_inline_update_b0 } true; 17732#L127 assume ~b0_val~0 != ~b0_val_t~0;~b0_val~0 := ~b0_val_t~0;~b0_ev~0 := 0; 17754#L127-2 ~b0_req_up~0 := 0; 17755#L135 assume { :end_inline_update_b0 } true; 17689#L202-2 assume 1 == ~b1_req_up~0;assume { :begin_inline_update_b1 } true; 17658#L142 assume ~b1_val~0 != ~b1_val_t~0;~b1_val~0 := ~b1_val_t~0;~b1_ev~0 := 0; 17646#L142-2 ~b1_req_up~0 := 0; 17647#L150 assume { :end_inline_update_b1 } true; 17705#L209-1 assume 1 == ~d0_req_up~0;assume { :begin_inline_update_d0 } true; 17785#L157 assume ~d0_val~0 != ~d0_val_t~0;~d0_val~0 := ~d0_val_t~0;~d0_ev~0 := 0; 17777#L157-2 ~d0_req_up~0 := 0; 17778#L165 assume { :end_inline_update_d0 } true; 17707#L216-1 assume 1 == ~d1_req_up~0;assume { :begin_inline_update_d1 } true; 17706#L172 assume ~d1_val~0 != ~d1_val_t~0;~d1_val~0 := ~d1_val_t~0;~d1_ev~0 := 0; 17695#L172-2 ~d1_req_up~0 := 0; 17693#L180 assume { :end_inline_update_d1 } true; 17694#L223-1 assume !(1 == ~z_req_up~0); 17595#L230-1 assume { :end_inline_update_channels } true;assume { :begin_inline_init_threads } true; 17596#L245 assume !(1 == ~comp_m1_i~0);~comp_m1_st~0 := 2; 17786#L245-2 assume { :end_inline_init_threads } true;assume { :begin_inline_fire_delta_events } true; 17787#L311 assume 0 == ~b0_ev~0;~b0_ev~0 := 1; 17809#L311-2 assume 0 == ~b1_ev~0;~b1_ev~0 := 1; 17815#L316-1 assume 0 == ~d0_ev~0;~d0_ev~0 := 1; 17611#L321-1 assume 0 == ~d1_ev~0;~d1_ev~0 := 1; 17612#L326-1 assume !(0 == ~z_ev~0); 17709#L331-1 assume { :end_inline_fire_delta_events } true;assume { :begin_inline_activate_threads } true;havoc activate_threads_#t~ret2, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;assume { :begin_inline_is_method1_triggered } true;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 17761#L97 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 17767#L119 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 17652#L120 activate_threads_#t~ret2 := is_method1_triggered_#res;assume { :end_inline_is_method1_triggered } true;activate_threads_~tmp~1 := activate_threads_#t~ret2;havoc activate_threads_#t~ret2; 17653#L380 assume 0 != activate_threads_~tmp~1;~comp_m1_st~0 := 0; 17801#L380-2 assume { :end_inline_activate_threads } true;assume { :begin_inline_reset_delta_events } true; 17806#L344 assume 1 == ~b0_ev~0;~b0_ev~0 := 2; 17808#L344-2 assume 1 == ~b1_ev~0;~b1_ev~0 := 2; 17813#L349-1 assume 1 == ~d0_ev~0;~d0_ev~0 := 2; 17601#L354-1 assume 1 == ~d1_ev~0;~d1_ev~0 := 2; 17602#L359-1 assume !(1 == ~z_ev~0); 17708#L364-1 assume { :end_inline_reset_delta_events } true; 17760#L422-3 assume true; 17887#L422-1 [2018-11-18 08:34:44,693 INFO L796 eck$LassoCheckResult]: Loop: 17887#L422-1 assume !false; 18370#L423 start_simulation_~kernel_st~0 := 1;assume { :begin_inline_eval } true;havoc eval_#t~ret0, eval_#t~nondet1, eval_~tmp~0, eval_~tmp___0~0;havoc eval_~tmp~0;havoc eval_~tmp___0~0; 18159#L285 assume true; 18365#L275-1 assume !false; 18362#L276 assume { :begin_inline_exists_runnable_thread } true;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 18358#L258 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 18130#L265 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 18357#L266 eval_#t~ret0 := exists_runnable_thread_#res;assume { :end_inline_exists_runnable_thread } true;eval_~tmp___0~0 := eval_#t~ret0;havoc eval_#t~ret0; 18307#L280 assume 0 != eval_~tmp___0~0; 18160#L280-1 assume 0 == ~comp_m1_st~0;eval_~tmp~0 := eval_#t~nondet1;havoc eval_#t~nondet1; 18149#L289 assume 0 != eval_~tmp~0;~comp_m1_st~0 := 1;assume { :begin_inline_method1 } true;havoc method1_~s1~0, method1_~s2~0, method1_~s3~0;havoc method1_~s1~0;havoc method1_~s2~0;havoc method1_~s3~0; 17762#L42 assume 0 != ~b0_val~0; 17763#L43 assume !(0 != ~d1_val~0);method1_~s1~0 := 1; 17721#L42-1 assume !(0 != ~d0_val~0);method1_~s2~0 := 1; 17723#L51 assume 0 != method1_~s2~0;method1_~s3~0 := 0; 17873#L63-2 assume 0 != method1_~s2~0; 17673#L70 assume 0 != method1_~s1~0;method1_~s2~0 := 1; 17674#L69 assume 0 != method1_~s2~0;~z_val_t~0 := 0; 18152#L81-2 ~z_req_up~0 := 1;~comp_m1_st~0 := 2; 18148#L90 assume { :end_inline_method1 } true; 18147#L285 assume true; 18145#L275-1 assume !false; 18142#L276 assume { :begin_inline_exists_runnable_thread } true;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 18129#L258 assume !(0 == ~comp_m1_st~0);exists_runnable_thread_~__retres1~1 := 0; 18122#L265 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 18121#L266 eval_#t~ret0 := exists_runnable_thread_#res;assume { :end_inline_exists_runnable_thread } true;eval_~tmp___0~0 := eval_#t~ret0;havoc eval_#t~ret0; 18116#L280 assume !(0 != eval_~tmp___0~0); 18112#L301 assume { :end_inline_eval } true;start_simulation_~kernel_st~0 := 2;assume { :begin_inline_update_channels } true; 18110#L202-3 assume !(1 == ~b0_req_up~0); 18107#L202-5 assume !(1 == ~b1_req_up~0); 18093#L209-3 assume !(1 == ~d0_req_up~0); 18086#L216-3 assume !(1 == ~d1_req_up~0); 18082#L223-3 assume 1 == ~z_req_up~0;assume { :begin_inline_update_z } true; 18042#L187-3 assume ~z_val~0 != ~z_val_t~0;~z_val~0 := ~z_val_t~0;~z_ev~0 := 0; 18074#L187-5 ~z_req_up~0 := 0; 18040#L195-1 assume { :end_inline_update_z } true; 18037#L230-3 assume { :end_inline_update_channels } true;start_simulation_~kernel_st~0 := 3;assume { :begin_inline_fire_delta_events } true; 18034#L311-3 assume 0 == ~b0_ev~0;~b0_ev~0 := 1; 18035#L311-5 assume 0 == ~b1_ev~0;~b1_ev~0 := 1; 18608#L316-3 assume 0 == ~d0_ev~0;~d0_ev~0 := 1; 18609#L321-3 assume !(0 == ~d1_ev~0); 18709#L326-3 assume 0 == ~z_ev~0;~z_ev~0 := 1; 18603#L331-3 assume { :end_inline_fire_delta_events } true;assume { :begin_inline_activate_threads } true;havoc activate_threads_#t~ret2, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;assume { :begin_inline_is_method1_triggered } true;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 18468#L97-1 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 18466#L119-1 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 18464#L120-1 activate_threads_#t~ret2 := is_method1_triggered_#res;assume { :end_inline_is_method1_triggered } true;activate_threads_~tmp~1 := activate_threads_#t~ret2;havoc activate_threads_#t~ret2; 18463#L380-3 assume 0 != activate_threads_~tmp~1;~comp_m1_st~0 := 0; 18461#L380-5 assume { :end_inline_activate_threads } true;assume { :begin_inline_reset_delta_events } true; 18459#L344-3 assume 1 == ~b0_ev~0;~b0_ev~0 := 2; 18403#L344-5 assume 1 == ~b1_ev~0;~b1_ev~0 := 2; 18363#L349-3 assume 1 == ~d0_ev~0;~d0_ev~0 := 2; 18360#L354-3 assume !(1 == ~d1_ev~0); 18361#L359-3 assume 1 == ~z_ev~0;~z_ev~0 := 2; 18356#L364-3 assume { :end_inline_reset_delta_events } true;assume { :begin_inline_stop_simulation } true;havoc stop_simulation_#res;havoc stop_simulation_#t~ret3, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;assume { :begin_inline_exists_runnable_thread } true;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 18396#L258-1 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 18351#L265-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 18393#L266-1 stop_simulation_#t~ret3 := exists_runnable_thread_#res;assume { :end_inline_exists_runnable_thread } true;stop_simulation_~tmp~2 := stop_simulation_#t~ret3;havoc stop_simulation_#t~ret3; 18392#L397 assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; 18391#L404 stop_simulation_#res := stop_simulation_~__retres2~0; 18390#L405 start_simulation_#t~ret4 := stop_simulation_#res;assume { :end_inline_stop_simulation } true;start_simulation_~tmp~3 := start_simulation_#t~ret4;havoc start_simulation_#t~ret4; 18389#L439 assume !(0 != start_simulation_~tmp~3); 18387#L422-3 assume true; 17887#L422-1 [2018-11-18 08:34:44,694 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 08:34:44,694 INFO L82 PathProgramCache]: Analyzing trace with hash -1454834027, now seen corresponding path program 2 times [2018-11-18 08:34:44,694 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-18 08:34:44,694 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-18 08:34:44,695 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 08:34:44,695 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 08:34:44,695 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 08:34:44,698 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-18 08:34:44,702 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-18 08:34:44,705 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 08:34:44,705 INFO L82 PathProgramCache]: Analyzing trace with hash 1272648217, now seen corresponding path program 1 times [2018-11-18 08:34:44,705 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-18 08:34:44,705 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-18 08:34:44,706 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 08:34:44,706 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-18 08:34:44,706 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 08:34:44,710 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-18 08:34:44,714 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-18 08:34:44,718 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 08:34:44,718 INFO L82 PathProgramCache]: Analyzing trace with hash -1688992339, now seen corresponding path program 1 times [2018-11-18 08:34:44,718 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-18 08:34:44,719 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-18 08:34:44,719 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 08:34:44,719 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 08:34:44,719 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 08:34:44,724 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 08:34:44,758 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 8 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 08:34:44,758 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 08:34:44,758 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 08:34:45,026 WARN L180 SmtUtils]: Spent 264.00 ms on a formula simplification. DAG size of input: 137 DAG size of output: 121 [2018-11-18 08:34:45,087 INFO L216 LassoAnalysis]: Preferences: [2018-11-18 08:34:45,088 INFO L124 ssoRankerPreferences]: Compute integeral hull: false [2018-11-18 08:34:45,088 INFO L125 ssoRankerPreferences]: Enable LassoPartitioneer: true [2018-11-18 08:34:45,088 INFO L126 ssoRankerPreferences]: Term annotations enabled: false [2018-11-18 08:34:45,088 INFO L127 ssoRankerPreferences]: Use exernal solver: true [2018-11-18 08:34:45,088 INFO L128 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2018-11-18 08:34:45,088 INFO L129 ssoRankerPreferences]: Dump SMT script to file: false [2018-11-18 08:34:45,088 INFO L130 ssoRankerPreferences]: Path of dumped script: [2018-11-18 08:34:45,088 INFO L131 ssoRankerPreferences]: Filename of dumped script: bist_cell_true-unreach-call_false-termination.cil.c_Iteration23_Loop [2018-11-18 08:34:45,088 INFO L132 ssoRankerPreferences]: MapElimAlgo: Frank [2018-11-18 08:34:45,088 INFO L282 LassoAnalysis]: Starting lasso preprocessing... [2018-11-18 08:34:45,090 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:45,099 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:45,102 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:45,104 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:45,106 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:45,109 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:45,112 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:45,114 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:45,119 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:45,123 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:45,125 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:45,127 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:45,131 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:45,135 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:45,140 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:45,142 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:45,146 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:45,149 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:45,155 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:45,157 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:45,162 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:45,164 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:45,166 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:45,168 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:45,170 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:45,174 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:45,177 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:45,179 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:45,183 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:45,416 INFO L300 LassoAnalysis]: Preprocessing complete. [2018-11-18 08:34:45,416 INFO L412 LassoAnalysis]: Checking for nontermination... No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_89f12fe3-ff39-4721-a39a-11b61e72f14e/bin-2019/uautomizer/z3 Starting monitored process 5 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2018-11-18 08:34:45,419 INFO L151 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2018-11-18 08:34:45,419 INFO L163 nArgumentSynthesizer]: Using integer mode. No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_89f12fe3-ff39-4721-a39a-11b61e72f14e/bin-2019/uautomizer/z3 Starting monitored process 6 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2018-11-18 08:34:45,447 INFO L151 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 3 Nilpotent components: true [2018-11-18 08:34:45,447 INFO L163 nArgumentSynthesizer]: Using integer mode. [2018-11-18 08:34:46,314 INFO L452 LassoAnalysis]: Proving nontermination failed: No geometric nontermination argument exists. [2018-11-18 08:34:46,316 INFO L216 LassoAnalysis]: Preferences: [2018-11-18 08:34:46,316 INFO L124 ssoRankerPreferences]: Compute integeral hull: false [2018-11-18 08:34:46,316 INFO L125 ssoRankerPreferences]: Enable LassoPartitioneer: true [2018-11-18 08:34:46,317 INFO L126 ssoRankerPreferences]: Term annotations enabled: false [2018-11-18 08:34:46,317 INFO L127 ssoRankerPreferences]: Use exernal solver: false [2018-11-18 08:34:46,317 INFO L128 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2018-11-18 08:34:46,317 INFO L129 ssoRankerPreferences]: Dump SMT script to file: false [2018-11-18 08:34:46,317 INFO L130 ssoRankerPreferences]: Path of dumped script: [2018-11-18 08:34:46,317 INFO L131 ssoRankerPreferences]: Filename of dumped script: bist_cell_true-unreach-call_false-termination.cil.c_Iteration23_Loop [2018-11-18 08:34:46,317 INFO L132 ssoRankerPreferences]: MapElimAlgo: Frank [2018-11-18 08:34:46,317 INFO L282 LassoAnalysis]: Starting lasso preprocessing... [2018-11-18 08:34:46,319 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:46,327 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:46,329 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:46,335 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:46,337 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:46,338 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:46,339 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:46,342 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:46,344 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:46,346 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:46,348 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:46,349 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:46,352 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:46,353 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:46,354 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:46,358 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:46,367 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:46,370 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:46,372 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:46,375 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:46,376 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:46,378 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:46,379 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:46,381 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:46,382 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:46,384 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:46,390 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:46,392 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:46,393 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:46,550 INFO L300 LassoAnalysis]: Preprocessing complete. [2018-11-18 08:34:46,551 INFO L497 LassoAnalysis]: Using template 'affine'. [2018-11-18 08:34:46,551 INFO L122 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSES Number of strict supporting invariants: 0 Number of non-strict supporting invariants: 1 Consider only non-deceasing supporting invariants: true Simplify termination arguments: true Simplify supporting invariants: trueOverapproximate stem: false [2018-11-18 08:34:46,551 INFO L339 nArgumentSynthesizer]: Template has degree 0. [2018-11-18 08:34:46,551 INFO L352 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2018-11-18 08:34:46,551 INFO L205 nArgumentSynthesizer]: 1 stem disjuncts [2018-11-18 08:34:46,551 INFO L206 nArgumentSynthesizer]: 2 loop disjuncts [2018-11-18 08:34:46,551 INFO L207 nArgumentSynthesizer]: 2 template conjuncts. [2018-11-18 08:34:46,552 INFO L402 nArgumentSynthesizer]: We have 4 Motzkin's Theorem applications. [2018-11-18 08:34:46,552 INFO L403 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2018-11-18 08:34:46,554 INFO L530 LassoAnalysis]: Proving termination failed for this template and these settings. [2018-11-18 08:34:46,555 INFO L122 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSES Number of strict supporting invariants: 0 Number of non-strict supporting invariants: 1 Consider only non-deceasing supporting invariants: true Simplify termination arguments: true Simplify supporting invariants: trueOverapproximate stem: false [2018-11-18 08:34:46,555 INFO L339 nArgumentSynthesizer]: Template has degree 0. [2018-11-18 08:34:46,555 INFO L352 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2018-11-18 08:34:46,555 INFO L205 nArgumentSynthesizer]: 1 stem disjuncts [2018-11-18 08:34:46,555 INFO L206 nArgumentSynthesizer]: 1 loop disjuncts [2018-11-18 08:34:46,555 INFO L207 nArgumentSynthesizer]: 2 template conjuncts. [2018-11-18 08:34:46,556 INFO L402 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2018-11-18 08:34:46,556 INFO L403 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2018-11-18 08:34:46,557 INFO L530 LassoAnalysis]: Proving termination failed for this template and these settings. [2018-11-18 08:34:46,557 INFO L122 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSES Number of strict supporting invariants: 0 Number of non-strict supporting invariants: 1 Consider only non-deceasing supporting invariants: true Simplify termination arguments: true Simplify supporting invariants: trueOverapproximate stem: false [2018-11-18 08:34:46,558 INFO L339 nArgumentSynthesizer]: Template has degree 0. [2018-11-18 08:34:46,558 INFO L352 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2018-11-18 08:34:46,558 INFO L205 nArgumentSynthesizer]: 1 stem disjuncts [2018-11-18 08:34:46,558 INFO L206 nArgumentSynthesizer]: 1 loop disjuncts [2018-11-18 08:34:46,558 INFO L207 nArgumentSynthesizer]: 2 template conjuncts. [2018-11-18 08:34:46,558 INFO L402 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2018-11-18 08:34:46,559 INFO L403 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2018-11-18 08:34:46,559 INFO L530 LassoAnalysis]: Proving termination failed for this template and these settings. [2018-11-18 08:34:46,559 INFO L122 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSES Number of strict supporting invariants: 0 Number of non-strict supporting invariants: 1 Consider only non-deceasing supporting invariants: true Simplify termination arguments: true Simplify supporting invariants: trueOverapproximate stem: false [2018-11-18 08:34:46,560 INFO L339 nArgumentSynthesizer]: Template has degree 0. [2018-11-18 08:34:46,560 INFO L352 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2018-11-18 08:34:46,560 INFO L205 nArgumentSynthesizer]: 1 stem disjuncts [2018-11-18 08:34:46,560 INFO L206 nArgumentSynthesizer]: 1 loop disjuncts [2018-11-18 08:34:46,560 INFO L207 nArgumentSynthesizer]: 2 template conjuncts. [2018-11-18 08:34:46,560 INFO L402 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2018-11-18 08:34:46,560 INFO L403 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2018-11-18 08:34:46,561 INFO L530 LassoAnalysis]: Proving termination failed for this template and these settings. [2018-11-18 08:34:46,561 INFO L122 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSES Number of strict supporting invariants: 0 Number of non-strict supporting invariants: 1 Consider only non-deceasing supporting invariants: true Simplify termination arguments: true Simplify supporting invariants: trueOverapproximate stem: false [2018-11-18 08:34:46,561 INFO L339 nArgumentSynthesizer]: Template has degree 0. [2018-11-18 08:34:46,562 INFO L352 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2018-11-18 08:34:46,562 INFO L205 nArgumentSynthesizer]: 1 stem disjuncts [2018-11-18 08:34:46,562 INFO L206 nArgumentSynthesizer]: 1 loop disjuncts [2018-11-18 08:34:46,562 INFO L207 nArgumentSynthesizer]: 2 template conjuncts. [2018-11-18 08:34:46,562 INFO L402 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2018-11-18 08:34:46,562 INFO L403 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2018-11-18 08:34:46,563 INFO L530 LassoAnalysis]: Proving termination failed for this template and these settings. [2018-11-18 08:34:46,563 INFO L122 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSES Number of strict supporting invariants: 0 Number of non-strict supporting invariants: 1 Consider only non-deceasing supporting invariants: true Simplify termination arguments: true Simplify supporting invariants: trueOverapproximate stem: false [2018-11-18 08:34:46,563 INFO L339 nArgumentSynthesizer]: Template has degree 0. [2018-11-18 08:34:46,563 INFO L352 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2018-11-18 08:34:46,564 INFO L205 nArgumentSynthesizer]: 1 stem disjuncts [2018-11-18 08:34:46,564 INFO L206 nArgumentSynthesizer]: 1 loop disjuncts [2018-11-18 08:34:46,564 INFO L207 nArgumentSynthesizer]: 2 template conjuncts. [2018-11-18 08:34:46,564 INFO L402 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2018-11-18 08:34:46,564 INFO L403 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2018-11-18 08:34:46,565 INFO L530 LassoAnalysis]: Proving termination failed for this template and these settings. [2018-11-18 08:34:46,565 INFO L122 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSES Number of strict supporting invariants: 0 Number of non-strict supporting invariants: 1 Consider only non-deceasing supporting invariants: true Simplify termination arguments: true Simplify supporting invariants: trueOverapproximate stem: false [2018-11-18 08:34:46,565 INFO L339 nArgumentSynthesizer]: Template has degree 0. [2018-11-18 08:34:46,565 INFO L352 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2018-11-18 08:34:46,565 INFO L205 nArgumentSynthesizer]: 1 stem disjuncts [2018-11-18 08:34:46,566 INFO L206 nArgumentSynthesizer]: 1 loop disjuncts [2018-11-18 08:34:46,566 INFO L207 nArgumentSynthesizer]: 2 template conjuncts. [2018-11-18 08:34:46,566 INFO L402 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2018-11-18 08:34:46,566 INFO L403 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2018-11-18 08:34:46,574 INFO L421 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2018-11-18 08:34:46,575 INFO L443 ModelExtractionUtils]: Simplification made 3 calls to the SMT solver. [2018-11-18 08:34:46,576 INFO L444 ModelExtractionUtils]: 0 out of 3 variables were initially zero. Simplification set additionally 0 variables to zero. [2018-11-18 08:34:46,576 INFO L437 nArgumentSynthesizer]: Simplifying supporting invariants... [2018-11-18 08:34:46,576 INFO L440 nArgumentSynthesizer]: Removed 0 redundant supporting invariants from a total of 0. [2018-11-18 08:34:46,576 INFO L518 LassoAnalysis]: Proved termination. [2018-11-18 08:34:46,576 INFO L520 LassoAnalysis]: Termination argument consisting of: Ranking function f(~d0_ev~0) = -1*~d0_ev~0 + 1 Supporting invariants [] [2018-11-18 08:34:46,576 INFO L297 tatePredicateManager]: 0 out of 0 supporting invariants were superfluous and have been removed [2018-11-18 08:34:46,623 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 08:34:46,643 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 08:34:46,645 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 08:34:46,661 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 08:34:46,663 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 08:34:46,678 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2018-11-18 08:34:46,678 INFO L152 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.1 stem predicates 3 loop predicates [2018-11-18 08:34:46,679 INFO L72 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand 1215 states and 1662 transitions. cyclomatic complexity: 450 Second operand 5 states. [2018-11-18 08:34:46,717 INFO L76 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand 1215 states and 1662 transitions. cyclomatic complexity: 450. Second operand 5 states. Result 3064 states and 4224 transitions. Complement of second has 5 states. [2018-11-18 08:34:46,718 INFO L142 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 3 states 1 stem states 1 non-accepting loop states 1 accepting loop states [2018-11-18 08:34:46,718 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5 states. [2018-11-18 08:34:46,718 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 168 transitions. [2018-11-18 08:34:46,719 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 3 states and 168 transitions. Stem has 41 letters. Loop has 62 letters. [2018-11-18 08:34:46,719 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2018-11-18 08:34:46,719 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 3 states and 168 transitions. Stem has 103 letters. Loop has 62 letters. [2018-11-18 08:34:46,719 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2018-11-18 08:34:46,720 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 3 states and 168 transitions. Stem has 41 letters. Loop has 124 letters. [2018-11-18 08:34:46,720 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2018-11-18 08:34:46,720 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 3064 states and 4224 transitions. [2018-11-18 08:34:46,732 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 1296 [2018-11-18 08:34:46,740 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 3064 states to 2946 states and 4044 transitions. [2018-11-18 08:34:46,740 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1351 [2018-11-18 08:34:46,741 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1356 [2018-11-18 08:34:46,741 INFO L73 IsDeterministic]: Start isDeterministic. Operand 2946 states and 4044 transitions. [2018-11-18 08:34:46,741 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2018-11-18 08:34:46,741 INFO L705 BuchiCegarLoop]: Abstraction has 2946 states and 4044 transitions. [2018-11-18 08:34:46,743 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2946 states and 4044 transitions. [2018-11-18 08:34:46,764 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2946 to 2941. [2018-11-18 08:34:46,764 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2941 states. [2018-11-18 08:34:46,769 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2941 states to 2941 states and 4035 transitions. [2018-11-18 08:34:46,769 INFO L728 BuchiCegarLoop]: Abstraction has 2941 states and 4035 transitions. [2018-11-18 08:34:46,769 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 08:34:46,769 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 08:34:46,769 INFO L87 Difference]: Start difference. First operand 2941 states and 4035 transitions. Second operand 4 states. [2018-11-18 08:34:46,802 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 08:34:46,803 INFO L93 Difference]: Finished difference Result 2878 states and 3945 transitions. [2018-11-18 08:34:46,804 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 08:34:46,804 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 2878 states and 3945 transitions. [2018-11-18 08:34:46,812 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 1268 [2018-11-18 08:34:46,819 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 2878 states to 2878 states and 3945 transitions. [2018-11-18 08:34:46,819 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1323 [2018-11-18 08:34:46,820 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1323 [2018-11-18 08:34:46,820 INFO L73 IsDeterministic]: Start isDeterministic. Operand 2878 states and 3945 transitions. [2018-11-18 08:34:46,820 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2018-11-18 08:34:46,820 INFO L705 BuchiCegarLoop]: Abstraction has 2878 states and 3945 transitions. [2018-11-18 08:34:46,822 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2878 states and 3945 transitions. [2018-11-18 08:34:46,842 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2878 to 2878. [2018-11-18 08:34:46,843 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2878 states. [2018-11-18 08:34:46,847 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2878 states to 2878 states and 3945 transitions. [2018-11-18 08:34:46,847 INFO L728 BuchiCegarLoop]: Abstraction has 2878 states and 3945 transitions. [2018-11-18 08:34:46,847 INFO L608 BuchiCegarLoop]: Abstraction has 2878 states and 3945 transitions. [2018-11-18 08:34:46,847 INFO L442 BuchiCegarLoop]: ======== Iteration 24============ [2018-11-18 08:34:46,847 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 2878 states and 3945 transitions. [2018-11-18 08:34:46,855 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 1268 [2018-11-18 08:34:46,855 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2018-11-18 08:34:46,855 INFO L119 BuchiIsEmpty]: Starting construction of run [2018-11-18 08:34:46,856 INFO L866 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 08:34:46,856 INFO L867 BuchiCegarLoop]: Counterexample loop histogram [2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 08:34:46,856 INFO L794 eck$LassoCheckResult]: Stem: 28243#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;~b0_val~0 := 0;~b0_val_t~0 := 0;~b0_ev~0 := 0;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_val_t~0 := 0;~b1_ev~0 := 0;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_val_t~0 := 0;~d0_ev~0 := 0;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_val_t~0 := 0;~d1_ev~0 := 0;~d1_req_up~0 := 0;~z_val~0 := 0;~z_val_t~0 := 0;~z_ev~0 := 0;~z_req_up~0 := 0;~comp_m1_st~0 := 0;~comp_m1_i~0 := 0; 28052#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res;havoc main_~__retres1~2;havoc main_~__retres1~2;assume { :begin_inline_init_model } true;~b0_val~0 := 0;~b0_ev~0 := 2;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_ev~0 := 2;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_ev~0 := 2;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_ev~0 := 2;~d1_req_up~0 := 0;~z_val~0 := 0;~z_ev~0 := 2;~z_req_up~0 := 0;~b0_val_t~0 := 1;~b0_req_up~0 := 1;~b1_val_t~0 := 1;~b1_req_up~0 := 1;~d0_val_t~0 := 1;~d0_req_up~0 := 1;~d1_val_t~0 := 1;~d1_req_up~0 := 1;~comp_m1_i~0 := 0; 28053#L480 assume { :end_inline_init_model } true;assume { :begin_inline_start_simulation } true;havoc start_simulation_#t~ret4, start_simulation_~kernel_st~0, start_simulation_~tmp~3;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;start_simulation_~kernel_st~0 := 0;assume { :begin_inline_update_channels } true; 28143#L202 assume 1 == ~b0_req_up~0;assume { :begin_inline_update_b0 } true; 28153#L127 assume ~b0_val~0 != ~b0_val_t~0;~b0_val~0 := ~b0_val_t~0;~b0_ev~0 := 0; 28178#L127-2 ~b0_req_up~0 := 0; 28179#L135 assume { :end_inline_update_b0 } true; 28120#L202-2 assume 1 == ~b1_req_up~0;assume { :begin_inline_update_b1 } true; 28086#L142 assume ~b1_val~0 != ~b1_val_t~0;~b1_val~0 := ~b1_val_t~0;~b1_ev~0 := 0; 28068#L142-2 ~b1_req_up~0 := 0; 28069#L150 assume { :end_inline_update_b1 } true; 28132#L209-1 assume 1 == ~d0_req_up~0;assume { :begin_inline_update_d0 } true; 28211#L157 assume ~d0_val~0 != ~d0_val_t~0;~d0_val~0 := ~d0_val_t~0;~d0_ev~0 := 0; 28201#L157-2 ~d0_req_up~0 := 0; 28202#L165 assume { :end_inline_update_d0 } true; 28134#L216-1 assume 1 == ~d1_req_up~0;assume { :begin_inline_update_d1 } true; 28133#L172 assume ~d1_val~0 != ~d1_val_t~0;~d1_val~0 := ~d1_val_t~0;~d1_ev~0 := 0; 28125#L172-2 ~d1_req_up~0 := 0; 28123#L180 assume { :end_inline_update_d1 } true; 28124#L223-1 assume !(1 == ~z_req_up~0); 28028#L230-1 assume { :end_inline_update_channels } true;assume { :begin_inline_init_threads } true; 28029#L245 assume !(1 == ~comp_m1_i~0);~comp_m1_st~0 := 2; 28212#L245-2 assume { :end_inline_init_threads } true;assume { :begin_inline_fire_delta_events } true; 28213#L311 assume 0 == ~b0_ev~0;~b0_ev~0 := 1; 28235#L311-2 assume 0 == ~b1_ev~0;~b1_ev~0 := 1; 28239#L316-1 assume 0 == ~d0_ev~0;~d0_ev~0 := 1; 28040#L321-1 assume 0 == ~d1_ev~0;~d1_ev~0 := 1; 28041#L326-1 assume !(0 == ~z_ev~0); 28136#L331-1 assume { :end_inline_fire_delta_events } true;assume { :begin_inline_activate_threads } true;havoc activate_threads_#t~ret2, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;assume { :begin_inline_is_method1_triggered } true;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 28185#L97 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 28193#L119 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 28080#L120 activate_threads_#t~ret2 := is_method1_triggered_#res;assume { :end_inline_is_method1_triggered } true;activate_threads_~tmp~1 := activate_threads_#t~ret2;havoc activate_threads_#t~ret2; 28081#L380 assume 0 != activate_threads_~tmp~1;~comp_m1_st~0 := 0; 28227#L380-2 assume { :end_inline_activate_threads } true;assume { :begin_inline_reset_delta_events } true; 28232#L344 assume 1 == ~b0_ev~0;~b0_ev~0 := 2; 28234#L344-2 assume 1 == ~b1_ev~0;~b1_ev~0 := 2; 28236#L349-1 assume 1 == ~d0_ev~0;~d0_ev~0 := 2; 28034#L354-1 assume 1 == ~d1_ev~0;~d1_ev~0 := 2; 28035#L359-1 assume !(1 == ~z_ev~0); 28135#L364-1 assume { :end_inline_reset_delta_events } true; 28180#L422-3 assume true; 30035#L422-1 assume !false; 28162#L423 [2018-11-18 08:34:46,856 INFO L796 eck$LassoCheckResult]: Loop: 28162#L423 start_simulation_~kernel_st~0 := 1;assume { :begin_inline_eval } true;havoc eval_#t~ret0, eval_#t~nondet1, eval_~tmp~0, eval_~tmp___0~0;havoc eval_~tmp~0;havoc eval_~tmp___0~0; 28036#L285 assume true; 28037#L275-1 assume !false; 28149#L276 assume { :begin_inline_exists_runnable_thread } true;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 28150#L258 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 28144#L265 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 28054#L266 eval_#t~ret0 := exists_runnable_thread_#res;assume { :end_inline_exists_runnable_thread } true;eval_~tmp___0~0 := eval_#t~ret0;havoc eval_#t~ret0; 28055#L280 assume 0 != eval_~tmp___0~0; 28273#L280-1 assume 0 == ~comp_m1_st~0;eval_~tmp~0 := eval_#t~nondet1;havoc eval_#t~nondet1; 28248#L289 assume 0 != eval_~tmp~0;~comp_m1_st~0 := 1;assume { :begin_inline_method1 } true;havoc method1_~s1~0, method1_~s2~0, method1_~s3~0;havoc method1_~s1~0;havoc method1_~s2~0;havoc method1_~s3~0; 28186#L42 assume 0 != ~b0_val~0; 28058#L43 assume 0 != ~d1_val~0;method1_~s1~0 := 0; 28059#L42-1 assume !(0 != ~d0_val~0);method1_~s2~0 := 1; 28042#L51 assume 0 != method1_~s2~0;method1_~s3~0 := 0; 28043#L63-2 assume 0 != method1_~s2~0; 28102#L70 assume 0 != method1_~s1~0;method1_~s2~0 := 1; 28104#L69 assume 0 != method1_~s2~0;~z_val_t~0 := 0; 28087#L81-2 ~z_req_up~0 := 1;~comp_m1_st~0 := 2; 28088#L90 assume { :end_inline_method1 } true; 28265#L285 assume true; 29111#L275-1 assume !false; 29101#L276 assume { :begin_inline_exists_runnable_thread } true;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 29093#L258 assume !(0 == ~comp_m1_st~0);exists_runnable_thread_~__retres1~1 := 0; 29090#L265 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 29089#L266 eval_#t~ret0 := exists_runnable_thread_#res;assume { :end_inline_exists_runnable_thread } true;eval_~tmp___0~0 := eval_#t~ret0;havoc eval_#t~ret0; 29087#L280 assume !(0 != eval_~tmp___0~0); 28160#L301 assume { :end_inline_eval } true;start_simulation_~kernel_st~0 := 2;assume { :begin_inline_update_channels } true; 28114#L202-3 assume !(1 == ~b0_req_up~0); 28116#L202-5 assume !(1 == ~b1_req_up~0); 28678#L209-3 assume !(1 == ~d0_req_up~0); 28679#L216-3 assume !(1 == ~d1_req_up~0); 28742#L223-3 assume 1 == ~z_req_up~0;assume { :begin_inline_update_z } true; 28729#L187-3 assume ~z_val~0 != ~z_val_t~0;~z_val~0 := ~z_val_t~0;~z_ev~0 := 0; 28740#L187-5 ~z_req_up~0 := 0; 28727#L195-1 assume { :end_inline_update_z } true; 28723#L230-3 assume { :end_inline_update_channels } true;start_simulation_~kernel_st~0 := 3;assume { :begin_inline_fire_delta_events } true; 28718#L311-3 assume !(0 == ~b0_ev~0); 28715#L311-5 assume !(0 == ~b1_ev~0); 28712#L316-3 assume !(0 == ~d0_ev~0); 28709#L321-3 assume !(0 == ~d1_ev~0); 28702#L326-3 assume 0 == ~z_ev~0;~z_ev~0 := 1; 28699#L331-3 assume { :end_inline_fire_delta_events } true;assume { :begin_inline_activate_threads } true;havoc activate_threads_#t~ret2, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;assume { :begin_inline_is_method1_triggered } true;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 28697#L97-1 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 28698#L119-1 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 29438#L120-1 activate_threads_#t~ret2 := is_method1_triggered_#res;assume { :end_inline_is_method1_triggered } true;activate_threads_~tmp~1 := activate_threads_#t~ret2;havoc activate_threads_#t~ret2; 29436#L380-3 assume 0 != activate_threads_~tmp~1;~comp_m1_st~0 := 0; 29433#L380-5 assume { :end_inline_activate_threads } true;assume { :begin_inline_reset_delta_events } true; 29431#L344-3 assume 1 == ~b0_ev~0;~b0_ev~0 := 2; 29429#L344-5 assume 1 == ~b1_ev~0;~b1_ev~0 := 2; 29426#L349-3 assume !(1 == ~d0_ev~0); 29414#L354-3 assume !(1 == ~d1_ev~0); 29413#L359-3 assume 1 == ~z_ev~0;~z_ev~0 := 2; 29410#L364-3 assume { :end_inline_reset_delta_events } true;assume { :begin_inline_stop_simulation } true;havoc stop_simulation_#res;havoc stop_simulation_#t~ret3, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;assume { :begin_inline_exists_runnable_thread } true;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 28270#L258-1 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 28139#L265-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 28140#L266-1 stop_simulation_#t~ret3 := exists_runnable_thread_#res;assume { :end_inline_exists_runnable_thread } true;stop_simulation_~tmp~2 := stop_simulation_#t~ret3;havoc stop_simulation_#t~ret3; 28168#L397 assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; 28169#L404 stop_simulation_#res := stop_simulation_~__retres2~0; 28215#L405 start_simulation_#t~ret4 := stop_simulation_#res;assume { :end_inline_stop_simulation } true;start_simulation_~tmp~3 := start_simulation_#t~ret4;havoc start_simulation_#t~ret4; 28110#L439 assume !(0 != start_simulation_~tmp~3); 28111#L422-3 assume true; 28137#L422-1 assume !false; 28162#L423 [2018-11-18 08:34:46,856 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 08:34:46,857 INFO L82 PathProgramCache]: Analyzing trace with hash 2144785614, now seen corresponding path program 1 times [2018-11-18 08:34:46,857 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-18 08:34:46,857 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-18 08:34:46,857 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 08:34:46,857 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 08:34:46,858 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 08:34:46,861 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-18 08:34:46,865 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-18 08:34:46,868 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 08:34:46,868 INFO L82 PathProgramCache]: Analyzing trace with hash 2020221991, now seen corresponding path program 1 times [2018-11-18 08:34:46,868 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-18 08:34:46,868 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-18 08:34:46,869 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 08:34:46,869 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 08:34:46,869 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 08:34:46,871 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 08:34:46,893 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 7 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 08:34:46,893 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 08:34:46,894 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-18 08:34:46,894 INFO L811 eck$LassoCheckResult]: loop already infeasible [2018-11-18 08:34:46,894 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-18 08:34:46,894 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-18 08:34:46,894 INFO L87 Difference]: Start difference. First operand 2878 states and 3945 transitions. cyclomatic complexity: 1076 Second operand 3 states. [2018-11-18 08:34:46,921 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 08:34:46,921 INFO L93 Difference]: Finished difference Result 2909 states and 3962 transitions. [2018-11-18 08:34:46,923 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-18 08:34:46,923 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 2909 states and 3962 transitions. [2018-11-18 08:34:46,933 INFO L131 ngComponentsAnalysis]: Automaton has 5 accepting balls. 1273 [2018-11-18 08:34:46,940 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 2909 states to 2909 states and 3962 transitions. [2018-11-18 08:34:46,940 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1329 [2018-11-18 08:34:46,941 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1329 [2018-11-18 08:34:46,941 INFO L73 IsDeterministic]: Start isDeterministic. Operand 2909 states and 3962 transitions. [2018-11-18 08:34:46,942 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2018-11-18 08:34:46,942 INFO L705 BuchiCegarLoop]: Abstraction has 2909 states and 3962 transitions. [2018-11-18 08:34:46,944 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2909 states and 3962 transitions. [2018-11-18 08:34:46,985 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2909 to 2869. [2018-11-18 08:34:46,985 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2869 states. [2018-11-18 08:34:46,989 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2869 states to 2869 states and 3918 transitions. [2018-11-18 08:34:46,990 INFO L728 BuchiCegarLoop]: Abstraction has 2869 states and 3918 transitions. [2018-11-18 08:34:46,990 INFO L608 BuchiCegarLoop]: Abstraction has 2869 states and 3918 transitions. [2018-11-18 08:34:46,990 INFO L442 BuchiCegarLoop]: ======== Iteration 25============ [2018-11-18 08:34:46,990 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 2869 states and 3918 transitions. [2018-11-18 08:34:46,996 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 1264 [2018-11-18 08:34:46,997 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2018-11-18 08:34:46,997 INFO L119 BuchiIsEmpty]: Starting construction of run [2018-11-18 08:34:46,997 INFO L866 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 08:34:46,997 INFO L867 BuchiCegarLoop]: Counterexample loop histogram [2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 08:34:46,998 INFO L794 eck$LassoCheckResult]: Stem: 34034#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;~b0_val~0 := 0;~b0_val_t~0 := 0;~b0_ev~0 := 0;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_val_t~0 := 0;~b1_ev~0 := 0;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_val_t~0 := 0;~d0_ev~0 := 0;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_val_t~0 := 0;~d1_ev~0 := 0;~d1_req_up~0 := 0;~z_val~0 := 0;~z_val_t~0 := 0;~z_ev~0 := 0;~z_req_up~0 := 0;~comp_m1_st~0 := 0;~comp_m1_i~0 := 0; 33846#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res;havoc main_~__retres1~2;havoc main_~__retres1~2;assume { :begin_inline_init_model } true;~b0_val~0 := 0;~b0_ev~0 := 2;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_ev~0 := 2;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_ev~0 := 2;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_ev~0 := 2;~d1_req_up~0 := 0;~z_val~0 := 0;~z_ev~0 := 2;~z_req_up~0 := 0;~b0_val_t~0 := 1;~b0_req_up~0 := 1;~b1_val_t~0 := 1;~b1_req_up~0 := 1;~d0_val_t~0 := 1;~d0_req_up~0 := 1;~d1_val_t~0 := 1;~d1_req_up~0 := 1;~comp_m1_i~0 := 0; 33847#L480 assume { :end_inline_init_model } true;assume { :begin_inline_start_simulation } true;havoc start_simulation_#t~ret4, start_simulation_~kernel_st~0, start_simulation_~tmp~3;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;start_simulation_~kernel_st~0 := 0;assume { :begin_inline_update_channels } true; 33939#L202 assume 1 == ~b0_req_up~0;assume { :begin_inline_update_b0 } true; 33951#L127 assume ~b0_val~0 != ~b0_val_t~0;~b0_val~0 := ~b0_val_t~0;~b0_ev~0 := 0; 33971#L127-2 ~b0_req_up~0 := 0; 33972#L135 assume { :end_inline_update_b0 } true; 33913#L202-2 assume 1 == ~b1_req_up~0;assume { :begin_inline_update_b1 } true; 33880#L142 assume ~b1_val~0 != ~b1_val_t~0;~b1_val~0 := ~b1_val_t~0;~b1_ev~0 := 0; 33868#L142-2 ~b1_req_up~0 := 0; 33869#L150 assume { :end_inline_update_b1 } true; 33928#L209-1 assume 1 == ~d0_req_up~0;assume { :begin_inline_update_d0 } true; 34001#L157 assume ~d0_val~0 != ~d0_val_t~0;~d0_val~0 := ~d0_val_t~0;~d0_ev~0 := 0; 33994#L157-2 ~d0_req_up~0 := 0; 33995#L165 assume { :end_inline_update_d0 } true; 33930#L216-1 assume 1 == ~d1_req_up~0;assume { :begin_inline_update_d1 } true; 33929#L172 assume ~d1_val~0 != ~d1_val_t~0;~d1_val~0 := ~d1_val_t~0;~d1_ev~0 := 0; 33919#L172-2 ~d1_req_up~0 := 0; 33917#L180 assume { :end_inline_update_d1 } true; 33918#L223-1 assume !(1 == ~z_req_up~0); 33821#L230-1 assume { :end_inline_update_channels } true;assume { :begin_inline_init_threads } true; 33822#L245 assume !(1 == ~comp_m1_i~0);~comp_m1_st~0 := 2; 34002#L245-2 assume { :end_inline_init_threads } true;assume { :begin_inline_fire_delta_events } true; 34003#L311 assume 0 == ~b0_ev~0;~b0_ev~0 := 1; 34026#L311-2 assume 0 == ~b1_ev~0;~b1_ev~0 := 1; 34032#L316-1 assume 0 == ~d0_ev~0;~d0_ev~0 := 1; 33837#L321-1 assume 0 == ~d1_ev~0;~d1_ev~0 := 1; 33838#L326-1 assume !(0 == ~z_ev~0); 33932#L331-1 assume { :end_inline_fire_delta_events } true;assume { :begin_inline_activate_threads } true;havoc activate_threads_#t~ret2, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;assume { :begin_inline_is_method1_triggered } true;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 33978#L97 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 33986#L119 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 33874#L120 activate_threads_#t~ret2 := is_method1_triggered_#res;assume { :end_inline_is_method1_triggered } true;activate_threads_~tmp~1 := activate_threads_#t~ret2;havoc activate_threads_#t~ret2; 33875#L380 assume 0 != activate_threads_~tmp~1;~comp_m1_st~0 := 0; 34018#L380-2 assume { :end_inline_activate_threads } true;assume { :begin_inline_reset_delta_events } true; 34023#L344 assume 1 == ~b0_ev~0;~b0_ev~0 := 2; 34025#L344-2 assume 1 == ~b1_ev~0;~b1_ev~0 := 2; 34029#L349-1 assume 1 == ~d0_ev~0;~d0_ev~0 := 2; 33827#L354-1 assume 1 == ~d1_ev~0;~d1_ev~0 := 2; 33828#L359-1 assume !(1 == ~z_ev~0); 33931#L364-1 assume { :end_inline_reset_delta_events } true; 33977#L422-3 assume true; 34651#L422-1 assume !false; 33957#L423 [2018-11-18 08:34:46,998 INFO L796 eck$LassoCheckResult]: Loop: 33957#L423 start_simulation_~kernel_st~0 := 1;assume { :begin_inline_eval } true;havoc eval_#t~ret0, eval_#t~nondet1, eval_~tmp~0, eval_~tmp___0~0;havoc eval_~tmp~0;havoc eval_~tmp___0~0; 33829#L285 assume true; 33830#L275-1 assume !false; 33945#L276 assume { :begin_inline_exists_runnable_thread } true;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 33946#L258 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 33940#L265 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 33848#L266 eval_#t~ret0 := exists_runnable_thread_#res;assume { :end_inline_exists_runnable_thread } true;eval_~tmp___0~0 := eval_#t~ret0;havoc eval_#t~ret0; 33849#L280 assume 0 != eval_~tmp___0~0; 34060#L280-1 assume 0 == ~comp_m1_st~0;eval_~tmp~0 := eval_#t~nondet1;havoc eval_#t~nondet1; 34061#L289 assume 0 != eval_~tmp~0;~comp_m1_st~0 := 1;assume { :begin_inline_method1 } true;havoc method1_~s1~0, method1_~s2~0, method1_~s3~0;havoc method1_~s1~0;havoc method1_~s2~0;havoc method1_~s3~0; 35575#L42 assume 0 != ~b0_val~0; 35574#L43 assume 0 != ~d1_val~0;method1_~s1~0 := 0; 35570#L42-1 assume !(0 != ~d0_val~0);method1_~s2~0 := 1; 35565#L51 assume 0 != method1_~s2~0;method1_~s3~0 := 0; 35563#L63-2 assume 0 != method1_~s2~0; 35560#L70 assume !(0 != method1_~s1~0);method1_~s2~0 := 0; 35558#L69 assume !(0 != method1_~s2~0); 35556#L81 assume 0 != method1_~s3~0;~z_val_t~0 := 0; 35554#L81-2 ~z_req_up~0 := 1;~comp_m1_st~0 := 2; 35550#L90 assume { :end_inline_method1 } true; 35548#L285 assume true; 35545#L275-1 assume !false; 35542#L276 assume { :begin_inline_exists_runnable_thread } true;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 35536#L258 assume !(0 == ~comp_m1_st~0);exists_runnable_thread_~__retres1~1 := 0; 35528#L265 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 35519#L266 eval_#t~ret0 := exists_runnable_thread_#res;assume { :end_inline_exists_runnable_thread } true;eval_~tmp___0~0 := eval_#t~ret0;havoc eval_#t~ret0; 35508#L280 assume !(0 != eval_~tmp___0~0); 35504#L301 assume { :end_inline_eval } true;start_simulation_~kernel_st~0 := 2;assume { :begin_inline_update_channels } true; 35113#L202-3 assume !(1 == ~b0_req_up~0); 35108#L202-5 assume !(1 == ~b1_req_up~0); 35104#L209-3 assume !(1 == ~d0_req_up~0); 35100#L216-3 assume !(1 == ~d1_req_up~0); 35098#L223-3 assume 1 == ~z_req_up~0;assume { :begin_inline_update_z } true; 35088#L187-3 assume ~z_val~0 != ~z_val_t~0;~z_val~0 := ~z_val_t~0;~z_ev~0 := 0; 35096#L187-5 ~z_req_up~0 := 0; 35086#L195-1 assume { :end_inline_update_z } true; 35085#L230-3 assume { :end_inline_update_channels } true;start_simulation_~kernel_st~0 := 3;assume { :begin_inline_fire_delta_events } true; 35081#L311-3 assume !(0 == ~b0_ev~0); 35077#L311-5 assume !(0 == ~b1_ev~0); 35074#L316-3 assume !(0 == ~d0_ev~0); 35071#L321-3 assume !(0 == ~d1_ev~0); 34075#L326-3 assume 0 == ~z_ev~0;~z_ev~0 := 1; 34074#L331-3 assume { :end_inline_fire_delta_events } true;assume { :begin_inline_activate_threads } true;havoc activate_threads_#t~ret2, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;assume { :begin_inline_is_method1_triggered } true;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 34072#L97-1 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 34073#L119-1 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 35863#L120-1 activate_threads_#t~ret2 := is_method1_triggered_#res;assume { :end_inline_is_method1_triggered } true;activate_threads_~tmp~1 := activate_threads_#t~ret2;havoc activate_threads_#t~ret2; 35861#L380-3 assume 0 != activate_threads_~tmp~1;~comp_m1_st~0 := 0; 35860#L380-5 assume { :end_inline_activate_threads } true;assume { :begin_inline_reset_delta_events } true; 35859#L344-3 assume 1 == ~b0_ev~0;~b0_ev~0 := 2; 35834#L344-5 assume 1 == ~b1_ev~0;~b1_ev~0 := 2; 35826#L349-3 assume !(1 == ~d0_ev~0); 35817#L354-3 assume !(1 == ~d1_ev~0); 33885#L359-3 assume 1 == ~z_ev~0;~z_ev~0 := 2; 33886#L364-3 assume { :end_inline_reset_delta_events } true;assume { :begin_inline_stop_simulation } true;havoc stop_simulation_#res;havoc stop_simulation_#t~ret3, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;assume { :begin_inline_exists_runnable_thread } true;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 33949#L258-1 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 33935#L265-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 33936#L266-1 stop_simulation_#t~ret3 := exists_runnable_thread_#res;assume { :end_inline_exists_runnable_thread } true;stop_simulation_~tmp~2 := stop_simulation_#t~ret3;havoc stop_simulation_#t~ret3; 33963#L397 assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; 33964#L404 stop_simulation_#res := stop_simulation_~__retres2~0; 34004#L405 start_simulation_#t~ret4 := stop_simulation_#res;assume { :end_inline_stop_simulation } true;start_simulation_~tmp~3 := start_simulation_#t~ret4;havoc start_simulation_#t~ret4; 33903#L439 assume !(0 != start_simulation_~tmp~3); 33904#L422-3 assume true; 33933#L422-1 assume !false; 33957#L423 [2018-11-18 08:34:46,998 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 08:34:46,998 INFO L82 PathProgramCache]: Analyzing trace with hash 2144785614, now seen corresponding path program 2 times [2018-11-18 08:34:46,998 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-18 08:34:46,998 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-18 08:34:46,999 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 08:34:46,999 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 08:34:46,999 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 08:34:47,002 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-18 08:34:47,005 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-18 08:34:47,008 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 08:34:47,008 INFO L82 PathProgramCache]: Analyzing trace with hash 1659793668, now seen corresponding path program 1 times [2018-11-18 08:34:47,008 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-18 08:34:47,008 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-18 08:34:47,009 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 08:34:47,009 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-18 08:34:47,009 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 08:34:47,011 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 08:34:47,029 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 7 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 08:34:47,029 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 08:34:47,030 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-18 08:34:47,030 INFO L811 eck$LassoCheckResult]: loop already infeasible [2018-11-18 08:34:47,030 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-18 08:34:47,030 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-18 08:34:47,030 INFO L87 Difference]: Start difference. First operand 2869 states and 3918 transitions. cyclomatic complexity: 1058 Second operand 3 states. [2018-11-18 08:34:47,078 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 08:34:47,078 INFO L93 Difference]: Finished difference Result 5602 states and 7663 transitions. [2018-11-18 08:34:47,078 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-18 08:34:47,079 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 5602 states and 7663 transitions. [2018-11-18 08:34:47,094 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 2488 [2018-11-18 08:34:47,113 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 5602 states to 5602 states and 7663 transitions. [2018-11-18 08:34:47,114 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 2553 [2018-11-18 08:34:47,115 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 2553 [2018-11-18 08:34:47,116 INFO L73 IsDeterministic]: Start isDeterministic. Operand 5602 states and 7663 transitions. [2018-11-18 08:34:47,116 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2018-11-18 08:34:47,116 INFO L705 BuchiCegarLoop]: Abstraction has 5602 states and 7663 transitions. [2018-11-18 08:34:47,120 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5602 states and 7663 transitions. [2018-11-18 08:34:47,155 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5602 to 2887. [2018-11-18 08:34:47,155 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2887 states. [2018-11-18 08:34:47,160 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2887 states to 2887 states and 3936 transitions. [2018-11-18 08:34:47,160 INFO L728 BuchiCegarLoop]: Abstraction has 2887 states and 3936 transitions. [2018-11-18 08:34:47,160 INFO L608 BuchiCegarLoop]: Abstraction has 2887 states and 3936 transitions. [2018-11-18 08:34:47,160 INFO L442 BuchiCegarLoop]: ======== Iteration 26============ [2018-11-18 08:34:47,161 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 2887 states and 3936 transitions. [2018-11-18 08:34:47,166 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 1272 [2018-11-18 08:34:47,166 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2018-11-18 08:34:47,166 INFO L119 BuchiIsEmpty]: Starting construction of run [2018-11-18 08:34:47,167 INFO L866 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 08:34:47,167 INFO L867 BuchiCegarLoop]: Counterexample loop histogram [2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 08:34:47,167 INFO L794 eck$LassoCheckResult]: Stem: 42516#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;~b0_val~0 := 0;~b0_val_t~0 := 0;~b0_ev~0 := 0;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_val_t~0 := 0;~b1_ev~0 := 0;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_val_t~0 := 0;~d0_ev~0 := 0;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_val_t~0 := 0;~d1_ev~0 := 0;~d1_req_up~0 := 0;~z_val~0 := 0;~z_val_t~0 := 0;~z_ev~0 := 0;~z_req_up~0 := 0;~comp_m1_st~0 := 0;~comp_m1_i~0 := 0; 42322#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res;havoc main_~__retres1~2;havoc main_~__retres1~2;assume { :begin_inline_init_model } true;~b0_val~0 := 0;~b0_ev~0 := 2;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_ev~0 := 2;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_ev~0 := 2;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_ev~0 := 2;~d1_req_up~0 := 0;~z_val~0 := 0;~z_ev~0 := 2;~z_req_up~0 := 0;~b0_val_t~0 := 1;~b0_req_up~0 := 1;~b1_val_t~0 := 1;~b1_req_up~0 := 1;~d0_val_t~0 := 1;~d0_req_up~0 := 1;~d1_val_t~0 := 1;~d1_req_up~0 := 1;~comp_m1_i~0 := 0; 42323#L480 assume { :end_inline_init_model } true;assume { :begin_inline_start_simulation } true;havoc start_simulation_#t~ret4, start_simulation_~kernel_st~0, start_simulation_~tmp~3;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;start_simulation_~kernel_st~0 := 0;assume { :begin_inline_update_channels } true; 42411#L202 assume 1 == ~b0_req_up~0;assume { :begin_inline_update_b0 } true; 42428#L127 assume ~b0_val~0 != ~b0_val_t~0;~b0_val~0 := ~b0_val_t~0;~b0_ev~0 := 0; 42448#L127-2 ~b0_req_up~0 := 0; 42449#L135 assume { :end_inline_update_b0 } true; 42388#L202-2 assume 1 == ~b1_req_up~0;assume { :begin_inline_update_b1 } true; 42356#L142 assume ~b1_val~0 != ~b1_val_t~0;~b1_val~0 := ~b1_val_t~0;~b1_ev~0 := 0; 42344#L142-2 ~b1_req_up~0 := 0; 42345#L150 assume { :end_inline_update_b1 } true; 42400#L209-1 assume 1 == ~d0_req_up~0;assume { :begin_inline_update_d0 } true; 42483#L157 assume ~d0_val~0 != ~d0_val_t~0;~d0_val~0 := ~d0_val_t~0;~d0_ev~0 := 0; 42476#L157-2 ~d0_req_up~0 := 0; 42477#L165 assume { :end_inline_update_d0 } true; 42402#L216-1 assume 1 == ~d1_req_up~0;assume { :begin_inline_update_d1 } true; 42401#L172 assume ~d1_val~0 != ~d1_val_t~0;~d1_val~0 := ~d1_val_t~0;~d1_ev~0 := 0; 42393#L172-2 ~d1_req_up~0 := 0; 42391#L180 assume { :end_inline_update_d1 } true; 42392#L223-1 assume !(1 == ~z_req_up~0); 42298#L230-1 assume { :end_inline_update_channels } true;assume { :begin_inline_init_threads } true; 42299#L245 assume !(1 == ~comp_m1_i~0);~comp_m1_st~0 := 2; 42484#L245-2 assume { :end_inline_init_threads } true;assume { :begin_inline_fire_delta_events } true; 42485#L311 assume 0 == ~b0_ev~0;~b0_ev~0 := 1; 42506#L311-2 assume 0 == ~b1_ev~0;~b1_ev~0 := 1; 42513#L316-1 assume 0 == ~d0_ev~0;~d0_ev~0 := 1; 42310#L321-1 assume 0 == ~d1_ev~0;~d1_ev~0 := 1; 42311#L326-1 assume !(0 == ~z_ev~0); 42404#L331-1 assume { :end_inline_fire_delta_events } true;assume { :begin_inline_activate_threads } true;havoc activate_threads_#t~ret2, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;assume { :begin_inline_is_method1_triggered } true;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 42455#L97 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 42465#L119 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 42350#L120 activate_threads_#t~ret2 := is_method1_triggered_#res;assume { :end_inline_is_method1_triggered } true;activate_threads_~tmp~1 := activate_threads_#t~ret2;havoc activate_threads_#t~ret2; 42351#L380 assume 0 != activate_threads_~tmp~1;~comp_m1_st~0 := 0; 42500#L380-2 assume { :end_inline_activate_threads } true;assume { :begin_inline_reset_delta_events } true; 42503#L344 assume 1 == ~b0_ev~0;~b0_ev~0 := 2; 42505#L344-2 assume 1 == ~b1_ev~0;~b1_ev~0 := 2; 42507#L349-1 assume 1 == ~d0_ev~0;~d0_ev~0 := 2; 42304#L354-1 assume 1 == ~d1_ev~0;~d1_ev~0 := 2; 42305#L359-1 assume !(1 == ~z_ev~0); 42403#L364-1 assume { :end_inline_reset_delta_events } true; 42454#L422-3 assume true; 42823#L422-1 assume !false; 43673#L423 [2018-11-18 08:34:47,167 INFO L796 eck$LassoCheckResult]: Loop: 43673#L423 start_simulation_~kernel_st~0 := 1;assume { :begin_inline_eval } true;havoc eval_#t~ret0, eval_#t~nondet1, eval_~tmp~0, eval_~tmp___0~0;havoc eval_~tmp~0;havoc eval_~tmp___0~0; 43652#L285 assume true; 43670#L275-1 assume !false; 43667#L276 assume { :begin_inline_exists_runnable_thread } true;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 43665#L258 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 43281#L265 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 43658#L266 eval_#t~ret0 := exists_runnable_thread_#res;assume { :end_inline_exists_runnable_thread } true;eval_~tmp___0~0 := eval_#t~ret0;havoc eval_#t~ret0; 43654#L280 assume 0 != eval_~tmp___0~0; 43653#L280-1 assume 0 == ~comp_m1_st~0;eval_~tmp~0 := eval_#t~nondet1;havoc eval_#t~nondet1; 43290#L289 assume 0 != eval_~tmp~0;~comp_m1_st~0 := 1;assume { :begin_inline_method1 } true;havoc method1_~s1~0, method1_~s2~0, method1_~s3~0;havoc method1_~s1~0;havoc method1_~s2~0;havoc method1_~s3~0; 43651#L42 assume 0 != ~b0_val~0; 43650#L43 assume 0 != ~d1_val~0;method1_~s1~0 := 0; 43649#L42-1 assume !(0 != ~d0_val~0);method1_~s2~0 := 1; 43647#L51 assume 0 != method1_~s2~0;method1_~s3~0 := 0; 43645#L63-2 assume 0 != method1_~s2~0; 43643#L70 assume !(0 != method1_~s1~0);method1_~s2~0 := 0; 43641#L69 assume !(0 != method1_~s2~0); 43639#L81 assume !(0 != method1_~s3~0);~z_val_t~0 := 1; 43637#L81-2 ~z_req_up~0 := 1;~comp_m1_st~0 := 2; 43634#L90 assume { :end_inline_method1 } true; 43633#L285 assume true; 43631#L275-1 assume !false; 43629#L276 assume { :begin_inline_exists_runnable_thread } true;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 43628#L258 assume !(0 == ~comp_m1_st~0);exists_runnable_thread_~__retres1~1 := 0; 43626#L265 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 43624#L266 eval_#t~ret0 := exists_runnable_thread_#res;assume { :end_inline_exists_runnable_thread } true;eval_~tmp___0~0 := eval_#t~ret0;havoc eval_#t~ret0; 43622#L280 assume !(0 != eval_~tmp___0~0); 43620#L301 assume { :end_inline_eval } true;start_simulation_~kernel_st~0 := 2;assume { :begin_inline_update_channels } true; 43617#L202-3 assume !(1 == ~b0_req_up~0); 43614#L202-5 assume !(1 == ~b1_req_up~0); 43610#L209-3 assume !(1 == ~d0_req_up~0); 43606#L216-3 assume !(1 == ~d1_req_up~0); 43604#L223-3 assume 1 == ~z_req_up~0;assume { :begin_inline_update_z } true; 43599#L187-3 assume ~z_val~0 != ~z_val_t~0;~z_val~0 := ~z_val_t~0;~z_ev~0 := 0; 43602#L187-5 ~z_req_up~0 := 0; 43597#L195-1 assume { :end_inline_update_z } true; 43596#L230-3 assume { :end_inline_update_channels } true;start_simulation_~kernel_st~0 := 3;assume { :begin_inline_fire_delta_events } true; 43594#L311-3 assume !(0 == ~b0_ev~0); 43592#L311-5 assume !(0 == ~b1_ev~0); 43591#L316-3 assume !(0 == ~d0_ev~0); 43590#L321-3 assume !(0 == ~d1_ev~0); 43589#L326-3 assume 0 == ~z_ev~0;~z_ev~0 := 1; 42580#L331-3 assume { :end_inline_fire_delta_events } true;assume { :begin_inline_activate_threads } true;havoc activate_threads_#t~ret2, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;assume { :begin_inline_is_method1_triggered } true;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 43480#L97-1 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 43481#L119-1 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 44116#L120-1 activate_threads_#t~ret2 := is_method1_triggered_#res;assume { :end_inline_is_method1_triggered } true;activate_threads_~tmp~1 := activate_threads_#t~ret2;havoc activate_threads_#t~ret2; 44113#L380-3 assume 0 != activate_threads_~tmp~1;~comp_m1_st~0 := 0; 44109#L380-5 assume { :end_inline_activate_threads } true;assume { :begin_inline_reset_delta_events } true; 44107#L344-3 assume 1 == ~b0_ev~0;~b0_ev~0 := 2; 44103#L344-5 assume 1 == ~b1_ev~0;~b1_ev~0 := 2; 44100#L349-3 assume !(1 == ~d0_ev~0); 44099#L354-3 assume !(1 == ~d1_ev~0); 44095#L359-3 assume 1 == ~z_ev~0;~z_ev~0 := 2; 44093#L364-3 assume { :end_inline_reset_delta_events } true;assume { :begin_inline_stop_simulation } true;havoc stop_simulation_#res;havoc stop_simulation_#t~ret3, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;assume { :begin_inline_exists_runnable_thread } true;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 44091#L258-1 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 43311#L265-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 44088#L266-1 stop_simulation_#t~ret3 := exists_runnable_thread_#res;assume { :end_inline_exists_runnable_thread } true;stop_simulation_~tmp~2 := stop_simulation_#t~ret3;havoc stop_simulation_#t~ret3; 44085#L397 assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; 44083#L404 stop_simulation_#res := stop_simulation_~__retres2~0; 44082#L405 start_simulation_#t~ret4 := stop_simulation_#res;assume { :end_inline_stop_simulation } true;start_simulation_~tmp~3 := start_simulation_#t~ret4;havoc start_simulation_#t~ret4; 44080#L439 assume !(0 != start_simulation_~tmp~3); 44075#L422-3 assume true; 43675#L422-1 assume !false; 43673#L423 [2018-11-18 08:34:47,167 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 08:34:47,167 INFO L82 PathProgramCache]: Analyzing trace with hash 2144785614, now seen corresponding path program 3 times [2018-11-18 08:34:47,168 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-18 08:34:47,168 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-18 08:34:47,168 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 08:34:47,168 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 08:34:47,168 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 08:34:47,171 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-18 08:34:47,174 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-18 08:34:47,177 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 08:34:47,177 INFO L82 PathProgramCache]: Analyzing trace with hash -706900926, now seen corresponding path program 1 times [2018-11-18 08:34:47,177 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-18 08:34:47,177 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-18 08:34:47,177 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 08:34:47,178 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-18 08:34:47,178 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 08:34:47,180 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-18 08:34:47,184 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-18 08:34:47,187 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 08:34:47,187 INFO L82 PathProgramCache]: Analyzing trace with hash 1043091925, now seen corresponding path program 1 times [2018-11-18 08:34:47,187 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-18 08:34:47,187 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-18 08:34:47,188 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 08:34:47,188 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 08:34:47,188 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 08:34:47,192 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 08:34:47,219 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 9 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 08:34:47,219 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 08:34:47,219 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 08:34:47,506 WARN L180 SmtUtils]: Spent 284.00 ms on a formula simplification. DAG size of input: 133 DAG size of output: 117 [2018-11-18 08:34:47,583 INFO L216 LassoAnalysis]: Preferences: [2018-11-18 08:34:47,584 INFO L124 ssoRankerPreferences]: Compute integeral hull: false [2018-11-18 08:34:47,584 INFO L125 ssoRankerPreferences]: Enable LassoPartitioneer: true [2018-11-18 08:34:47,584 INFO L126 ssoRankerPreferences]: Term annotations enabled: false [2018-11-18 08:34:47,584 INFO L127 ssoRankerPreferences]: Use exernal solver: true [2018-11-18 08:34:47,584 INFO L128 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2018-11-18 08:34:47,584 INFO L129 ssoRankerPreferences]: Dump SMT script to file: false [2018-11-18 08:34:47,584 INFO L130 ssoRankerPreferences]: Path of dumped script: [2018-11-18 08:34:47,584 INFO L131 ssoRankerPreferences]: Filename of dumped script: bist_cell_true-unreach-call_false-termination.cil.c_Iteration26_Loop [2018-11-18 08:34:47,584 INFO L132 ssoRankerPreferences]: MapElimAlgo: Frank [2018-11-18 08:34:47,584 INFO L282 LassoAnalysis]: Starting lasso preprocessing... [2018-11-18 08:34:47,586 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:47,601 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:47,607 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:47,609 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:47,615 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:47,618 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:47,632 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:47,640 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:47,646 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:47,662 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:47,669 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:47,690 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:47,692 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:47,694 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:47,702 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:47,709 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:47,710 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:47,713 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:47,714 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:47,716 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:47,718 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:47,720 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:47,721 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:47,725 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:47,728 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:47,730 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:47,732 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:47,733 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:47,735 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:47,736 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:47,915 INFO L300 LassoAnalysis]: Preprocessing complete. [2018-11-18 08:34:47,915 INFO L412 LassoAnalysis]: Checking for nontermination... No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_89f12fe3-ff39-4721-a39a-11b61e72f14e/bin-2019/uautomizer/z3 Starting monitored process 7 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2018-11-18 08:34:47,919 INFO L151 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2018-11-18 08:34:47,919 INFO L163 nArgumentSynthesizer]: Using integer mode. [2018-11-18 08:34:47,922 INFO L445 LassoAnalysis]: Proved nontermination for one component. [2018-11-18 08:34:47,922 INFO L448 LassoAnalysis]: Non-Termination argument consisting of: Initial state: {ULTIMATE.start_activate_threads_~tmp~1=1, ULTIMATE.start_is_method1_triggered_#res=1, ULTIMATE.start_is_method1_triggered_~__retres1~0=1} Honda state: {ULTIMATE.start_activate_threads_~tmp~1=1, ULTIMATE.start_is_method1_triggered_#res=1, ULTIMATE.start_is_method1_triggered_~__retres1~0=1} Generalized eigenvectors: [] Lambdas: [] Nus: [] No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_89f12fe3-ff39-4721-a39a-11b61e72f14e/bin-2019/uautomizer/z3 Starting monitored process 8 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2018-11-18 08:34:47,952 INFO L151 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2018-11-18 08:34:47,952 INFO L163 nArgumentSynthesizer]: Using integer mode. [2018-11-18 08:34:47,955 INFO L445 LassoAnalysis]: Proved nontermination for one component. [2018-11-18 08:34:47,955 INFO L448 LassoAnalysis]: Non-Termination argument consisting of: Initial state: {ULTIMATE.start_method1_~s2~0=0} Honda state: {ULTIMATE.start_method1_~s2~0=0} Generalized eigenvectors: [] Lambdas: [] Nus: [] No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_89f12fe3-ff39-4721-a39a-11b61e72f14e/bin-2019/uautomizer/z3 Starting monitored process 9 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2018-11-18 08:34:47,984 INFO L151 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2018-11-18 08:34:47,984 INFO L163 nArgumentSynthesizer]: Using integer mode. [2018-11-18 08:34:47,986 INFO L445 LassoAnalysis]: Proved nontermination for one component. [2018-11-18 08:34:47,987 INFO L448 LassoAnalysis]: Non-Termination argument consisting of: Initial state: {ULTIMATE.start_eval_#t~nondet1=0} Honda state: {ULTIMATE.start_eval_#t~nondet1=0} Generalized eigenvectors: [] Lambdas: [] Nus: [] No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_89f12fe3-ff39-4721-a39a-11b61e72f14e/bin-2019/uautomizer/z3 Starting monitored process 10 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2018-11-18 08:34:48,008 INFO L151 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2018-11-18 08:34:48,009 INFO L163 nArgumentSynthesizer]: Using integer mode. [2018-11-18 08:34:48,011 INFO L445 LassoAnalysis]: Proved nontermination for one component. [2018-11-18 08:34:48,011 INFO L448 LassoAnalysis]: Non-Termination argument consisting of: Initial state: {~comp_m1_st~0=0} Honda state: {~comp_m1_st~0=0} Generalized eigenvectors: [] Lambdas: [] Nus: [] No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_89f12fe3-ff39-4721-a39a-11b61e72f14e/bin-2019/uautomizer/z3 Starting monitored process 11 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2018-11-18 08:34:48,027 INFO L151 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2018-11-18 08:34:48,027 INFO L163 nArgumentSynthesizer]: Using integer mode. [2018-11-18 08:34:48,029 INFO L445 LassoAnalysis]: Proved nontermination for one component. [2018-11-18 08:34:48,029 INFO L448 LassoAnalysis]: Non-Termination argument consisting of: Initial state: {ULTIMATE.start_method1_~s3~0=0} Honda state: {ULTIMATE.start_method1_~s3~0=0} Generalized eigenvectors: [] Lambdas: [] Nus: [] No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_89f12fe3-ff39-4721-a39a-11b61e72f14e/bin-2019/uautomizer/z3 Starting monitored process 12 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2018-11-18 08:34:48,046 INFO L151 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2018-11-18 08:34:48,046 INFO L163 nArgumentSynthesizer]: Using integer mode. [2018-11-18 08:34:48,049 INFO L445 LassoAnalysis]: Proved nontermination for one component. [2018-11-18 08:34:48,049 INFO L448 LassoAnalysis]: Non-Termination argument consisting of: Initial state: {ULTIMATE.start_stop_simulation_#res=0, ULTIMATE.start_start_simulation_~tmp~3=0} Honda state: {ULTIMATE.start_stop_simulation_#res=0, ULTIMATE.start_start_simulation_~tmp~3=0} Generalized eigenvectors: [] Lambdas: [] Nus: [] No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_89f12fe3-ff39-4721-a39a-11b61e72f14e/bin-2019/uautomizer/z3 Starting monitored process 13 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2018-11-18 08:34:48,068 INFO L151 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2018-11-18 08:34:48,069 INFO L163 nArgumentSynthesizer]: Using integer mode. No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_89f12fe3-ff39-4721-a39a-11b61e72f14e/bin-2019/uautomizer/z3 Starting monitored process 14 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2018-11-18 08:34:48,088 INFO L151 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 3 Nilpotent components: true [2018-11-18 08:34:48,088 INFO L163 nArgumentSynthesizer]: Using integer mode. [2018-11-18 08:34:48,091 INFO L452 LassoAnalysis]: Proving nontermination failed: No geometric nontermination argument exists. [2018-11-18 08:34:48,105 INFO L216 LassoAnalysis]: Preferences: [2018-11-18 08:34:48,105 INFO L124 ssoRankerPreferences]: Compute integeral hull: false [2018-11-18 08:34:48,105 INFO L125 ssoRankerPreferences]: Enable LassoPartitioneer: true [2018-11-18 08:34:48,105 INFO L126 ssoRankerPreferences]: Term annotations enabled: false [2018-11-18 08:34:48,105 INFO L127 ssoRankerPreferences]: Use exernal solver: false [2018-11-18 08:34:48,105 INFO L128 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2018-11-18 08:34:48,105 INFO L129 ssoRankerPreferences]: Dump SMT script to file: false [2018-11-18 08:34:48,105 INFO L130 ssoRankerPreferences]: Path of dumped script: [2018-11-18 08:34:48,105 INFO L131 ssoRankerPreferences]: Filename of dumped script: bist_cell_true-unreach-call_false-termination.cil.c_Iteration26_Loop [2018-11-18 08:34:48,105 INFO L132 ssoRankerPreferences]: MapElimAlgo: Frank [2018-11-18 08:34:48,105 INFO L282 LassoAnalysis]: Starting lasso preprocessing... [2018-11-18 08:34:48,107 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:48,111 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:48,112 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:48,114 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:48,126 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:48,138 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:48,141 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:48,147 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:48,158 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:48,159 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:48,162 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:48,171 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:48,172 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:48,174 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:48,175 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:48,177 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:48,178 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:48,179 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:48,181 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:48,183 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:48,188 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:48,198 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:48,200 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:48,202 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:48,204 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:48,205 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:48,207 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:48,210 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:48,212 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:48,213 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-11-18 08:34:48,388 INFO L300 LassoAnalysis]: Preprocessing complete. [2018-11-18 08:34:48,389 INFO L497 LassoAnalysis]: Using template 'affine'. [2018-11-18 08:34:48,389 INFO L122 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSES Number of strict supporting invariants: 0 Number of non-strict supporting invariants: 1 Consider only non-deceasing supporting invariants: true Simplify termination arguments: true Simplify supporting invariants: trueOverapproximate stem: false [2018-11-18 08:34:48,389 INFO L339 nArgumentSynthesizer]: Template has degree 0. [2018-11-18 08:34:48,389 INFO L352 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2018-11-18 08:34:48,389 INFO L205 nArgumentSynthesizer]: 1 stem disjuncts [2018-11-18 08:34:48,389 INFO L206 nArgumentSynthesizer]: 1 loop disjuncts [2018-11-18 08:34:48,389 INFO L207 nArgumentSynthesizer]: 2 template conjuncts. [2018-11-18 08:34:48,390 INFO L402 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2018-11-18 08:34:48,390 INFO L403 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2018-11-18 08:34:48,391 INFO L530 LassoAnalysis]: Proving termination failed for this template and these settings. [2018-11-18 08:34:48,391 INFO L122 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSES Number of strict supporting invariants: 0 Number of non-strict supporting invariants: 1 Consider only non-deceasing supporting invariants: true Simplify termination arguments: true Simplify supporting invariants: trueOverapproximate stem: false [2018-11-18 08:34:48,392 INFO L339 nArgumentSynthesizer]: Template has degree 0. [2018-11-18 08:34:48,392 INFO L352 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2018-11-18 08:34:48,392 INFO L205 nArgumentSynthesizer]: 1 stem disjuncts [2018-11-18 08:34:48,392 INFO L206 nArgumentSynthesizer]: 1 loop disjuncts [2018-11-18 08:34:48,392 INFO L207 nArgumentSynthesizer]: 2 template conjuncts. [2018-11-18 08:34:48,392 INFO L402 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2018-11-18 08:34:48,393 INFO L403 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2018-11-18 08:34:48,393 INFO L530 LassoAnalysis]: Proving termination failed for this template and these settings. [2018-11-18 08:34:48,393 INFO L122 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSES Number of strict supporting invariants: 0 Number of non-strict supporting invariants: 1 Consider only non-deceasing supporting invariants: true Simplify termination arguments: true Simplify supporting invariants: trueOverapproximate stem: false [2018-11-18 08:34:48,394 INFO L339 nArgumentSynthesizer]: Template has degree 0. [2018-11-18 08:34:48,394 INFO L352 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2018-11-18 08:34:48,394 INFO L205 nArgumentSynthesizer]: 1 stem disjuncts [2018-11-18 08:34:48,394 INFO L206 nArgumentSynthesizer]: 1 loop disjuncts [2018-11-18 08:34:48,394 INFO L207 nArgumentSynthesizer]: 2 template conjuncts. [2018-11-18 08:34:48,394 INFO L402 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2018-11-18 08:34:48,395 INFO L403 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2018-11-18 08:34:48,395 INFO L530 LassoAnalysis]: Proving termination failed for this template and these settings. [2018-11-18 08:34:48,395 INFO L122 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSES Number of strict supporting invariants: 0 Number of non-strict supporting invariants: 1 Consider only non-deceasing supporting invariants: true Simplify termination arguments: true Simplify supporting invariants: trueOverapproximate stem: false [2018-11-18 08:34:48,396 INFO L339 nArgumentSynthesizer]: Template has degree 0. [2018-11-18 08:34:48,396 INFO L352 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2018-11-18 08:34:48,396 INFO L205 nArgumentSynthesizer]: 1 stem disjuncts [2018-11-18 08:34:48,396 INFO L206 nArgumentSynthesizer]: 1 loop disjuncts [2018-11-18 08:34:48,396 INFO L207 nArgumentSynthesizer]: 2 template conjuncts. [2018-11-18 08:34:48,397 INFO L402 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2018-11-18 08:34:48,397 INFO L403 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2018-11-18 08:34:48,397 INFO L530 LassoAnalysis]: Proving termination failed for this template and these settings. [2018-11-18 08:34:48,397 INFO L122 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSES Number of strict supporting invariants: 0 Number of non-strict supporting invariants: 1 Consider only non-deceasing supporting invariants: true Simplify termination arguments: true Simplify supporting invariants: trueOverapproximate stem: false [2018-11-18 08:34:48,398 INFO L339 nArgumentSynthesizer]: Template has degree 0. [2018-11-18 08:34:48,398 INFO L352 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2018-11-18 08:34:48,398 INFO L205 nArgumentSynthesizer]: 1 stem disjuncts [2018-11-18 08:34:48,398 INFO L206 nArgumentSynthesizer]: 1 loop disjuncts [2018-11-18 08:34:48,398 INFO L207 nArgumentSynthesizer]: 2 template conjuncts. [2018-11-18 08:34:48,398 INFO L402 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2018-11-18 08:34:48,399 INFO L403 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2018-11-18 08:34:48,399 INFO L530 LassoAnalysis]: Proving termination failed for this template and these settings. [2018-11-18 08:34:48,399 INFO L122 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSES Number of strict supporting invariants: 0 Number of non-strict supporting invariants: 1 Consider only non-deceasing supporting invariants: true Simplify termination arguments: true Simplify supporting invariants: trueOverapproximate stem: false [2018-11-18 08:34:48,400 INFO L339 nArgumentSynthesizer]: Template has degree 0. [2018-11-18 08:34:48,400 INFO L352 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2018-11-18 08:34:48,400 INFO L205 nArgumentSynthesizer]: 1 stem disjuncts [2018-11-18 08:34:48,400 INFO L206 nArgumentSynthesizer]: 1 loop disjuncts [2018-11-18 08:34:48,400 INFO L207 nArgumentSynthesizer]: 2 template conjuncts. [2018-11-18 08:34:48,400 INFO L402 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2018-11-18 08:34:48,400 INFO L403 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2018-11-18 08:34:48,401 INFO L530 LassoAnalysis]: Proving termination failed for this template and these settings. [2018-11-18 08:34:48,401 INFO L122 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSES Number of strict supporting invariants: 0 Number of non-strict supporting invariants: 1 Consider only non-deceasing supporting invariants: true Simplify termination arguments: true Simplify supporting invariants: trueOverapproximate stem: false [2018-11-18 08:34:48,401 INFO L339 nArgumentSynthesizer]: Template has degree 0. [2018-11-18 08:34:48,402 INFO L352 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2018-11-18 08:34:48,402 INFO L205 nArgumentSynthesizer]: 1 stem disjuncts [2018-11-18 08:34:48,402 INFO L206 nArgumentSynthesizer]: 1 loop disjuncts [2018-11-18 08:34:48,402 INFO L207 nArgumentSynthesizer]: 2 template conjuncts. [2018-11-18 08:34:48,402 INFO L402 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2018-11-18 08:34:48,402 INFO L403 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2018-11-18 08:34:48,403 INFO L530 LassoAnalysis]: Proving termination failed for this template and these settings. [2018-11-18 08:34:48,403 INFO L122 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSES Number of strict supporting invariants: 0 Number of non-strict supporting invariants: 1 Consider only non-deceasing supporting invariants: true Simplify termination arguments: true Simplify supporting invariants: trueOverapproximate stem: false [2018-11-18 08:34:48,404 INFO L339 nArgumentSynthesizer]: Template has degree 0. [2018-11-18 08:34:48,404 INFO L352 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2018-11-18 08:34:48,404 INFO L205 nArgumentSynthesizer]: 1 stem disjuncts [2018-11-18 08:34:48,404 INFO L206 nArgumentSynthesizer]: 1 loop disjuncts [2018-11-18 08:34:48,404 INFO L207 nArgumentSynthesizer]: 2 template conjuncts. [2018-11-18 08:34:48,404 INFO L402 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2018-11-18 08:34:48,404 INFO L403 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2018-11-18 08:34:48,406 INFO L421 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2018-11-18 08:34:48,407 INFO L443 ModelExtractionUtils]: Simplification made 3 calls to the SMT solver. [2018-11-18 08:34:48,408 INFO L444 ModelExtractionUtils]: 0 out of 3 variables were initially zero. Simplification set additionally 0 variables to zero. [2018-11-18 08:34:48,408 INFO L437 nArgumentSynthesizer]: Simplifying supporting invariants... [2018-11-18 08:34:48,408 INFO L440 nArgumentSynthesizer]: Removed 0 redundant supporting invariants from a total of 0. [2018-11-18 08:34:48,408 INFO L518 LassoAnalysis]: Proved termination. [2018-11-18 08:34:48,408 INFO L520 LassoAnalysis]: Termination argument consisting of: Ranking function f(~b0_ev~0) = -2*~b0_ev~0 + 3 Supporting invariants [] [2018-11-18 08:34:48,408 INFO L297 tatePredicateManager]: 0 out of 0 supporting invariants were superfluous and have been removed [2018-11-18 08:34:48,533 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 08:34:48,552 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 08:34:48,554 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 08:34:48,576 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 08:34:48,578 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 08:34:48,644 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2018-11-18 08:34:48,644 INFO L152 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.1 stem predicates 3 loop predicates [2018-11-18 08:34:48,644 INFO L72 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand 2887 states and 3936 transitions. cyclomatic complexity: 1058 Second operand 5 states. [2018-11-18 08:34:48,705 INFO L76 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand 2887 states and 3936 transitions. cyclomatic complexity: 1058. Second operand 5 states. Result 7769 states and 10658 transitions. Complement of second has 7 states. [2018-11-18 08:34:48,706 INFO L142 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 4 states 1 stem states 2 non-accepting loop states 1 accepting loop states [2018-11-18 08:34:48,706 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5 states. [2018-11-18 08:34:48,706 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 170 transitions. [2018-11-18 08:34:48,706 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 4 states and 170 transitions. Stem has 42 letters. Loop has 63 letters. [2018-11-18 08:34:48,707 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2018-11-18 08:34:48,707 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 4 states and 170 transitions. Stem has 105 letters. Loop has 63 letters. [2018-11-18 08:34:48,707 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2018-11-18 08:34:48,707 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 4 states and 170 transitions. Stem has 42 letters. Loop has 126 letters. [2018-11-18 08:34:48,708 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2018-11-18 08:34:48,708 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 7769 states and 10658 transitions. [2018-11-18 08:34:48,753 INFO L131 ngComponentsAnalysis]: Automaton has 8 accepting balls. 2088 [2018-11-18 08:34:48,779 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 7769 states to 7457 states and 10208 transitions. [2018-11-18 08:34:48,779 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 2180 [2018-11-18 08:34:48,781 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 2191 [2018-11-18 08:34:48,781 INFO L73 IsDeterministic]: Start isDeterministic. Operand 7457 states and 10208 transitions. [2018-11-18 08:34:48,783 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2018-11-18 08:34:48,783 INFO L705 BuchiCegarLoop]: Abstraction has 7457 states and 10208 transitions. [2018-11-18 08:34:48,787 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7457 states and 10208 transitions. [2018-11-18 08:34:48,837 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7457 to 7440. [2018-11-18 08:34:48,837 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7440 states. [2018-11-18 08:34:48,846 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7440 states to 7440 states and 10183 transitions. [2018-11-18 08:34:48,846 INFO L728 BuchiCegarLoop]: Abstraction has 7440 states and 10183 transitions. [2018-11-18 08:34:48,846 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 08:34:48,846 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 08:34:48,847 INFO L87 Difference]: Start difference. First operand 7440 states and 10183 transitions. Second operand 4 states. [2018-11-18 08:34:48,895 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 08:34:48,895 INFO L93 Difference]: Finished difference Result 7440 states and 10154 transitions. [2018-11-18 08:34:48,896 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 08:34:48,897 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 7440 states and 10154 transitions. [2018-11-18 08:34:48,913 INFO L131 ngComponentsAnalysis]: Automaton has 8 accepting balls. 2088 [2018-11-18 08:34:48,927 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 7440 states to 7440 states and 10154 transitions. [2018-11-18 08:34:48,928 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 2180 [2018-11-18 08:34:48,929 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 2180 [2018-11-18 08:34:48,930 INFO L73 IsDeterministic]: Start isDeterministic. Operand 7440 states and 10154 transitions. [2018-11-18 08:34:48,930 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2018-11-18 08:34:48,930 INFO L705 BuchiCegarLoop]: Abstraction has 7440 states and 10154 transitions. [2018-11-18 08:34:48,935 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7440 states and 10154 transitions. [2018-11-18 08:34:48,976 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7440 to 7440. [2018-11-18 08:34:48,976 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7440 states. [2018-11-18 08:34:48,985 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7440 states to 7440 states and 10154 transitions. [2018-11-18 08:34:48,985 INFO L728 BuchiCegarLoop]: Abstraction has 7440 states and 10154 transitions. [2018-11-18 08:34:48,985 INFO L608 BuchiCegarLoop]: Abstraction has 7440 states and 10154 transitions. [2018-11-18 08:34:48,985 INFO L442 BuchiCegarLoop]: ======== Iteration 27============ [2018-11-18 08:34:48,986 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 7440 states and 10154 transitions. [2018-11-18 08:34:48,999 INFO L131 ngComponentsAnalysis]: Automaton has 8 accepting balls. 2088 [2018-11-18 08:34:49,000 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2018-11-18 08:34:49,000 INFO L119 BuchiIsEmpty]: Starting construction of run [2018-11-18 08:34:49,000 INFO L866 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 08:34:49,000 INFO L867 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 08:34:49,000 INFO L794 eck$LassoCheckResult]: Stem: 68378#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;~b0_val~0 := 0;~b0_val_t~0 := 0;~b0_ev~0 := 0;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_val_t~0 := 0;~b1_ev~0 := 0;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_val_t~0 := 0;~d0_ev~0 := 0;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_val_t~0 := 0;~d1_ev~0 := 0;~d1_req_up~0 := 0;~z_val~0 := 0;~z_val_t~0 := 0;~z_ev~0 := 0;~z_req_up~0 := 0;~comp_m1_st~0 := 0;~comp_m1_i~0 := 0; 68203#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res;havoc main_~__retres1~2;havoc main_~__retres1~2;assume { :begin_inline_init_model } true;~b0_val~0 := 0;~b0_ev~0 := 2;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_ev~0 := 2;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_ev~0 := 2;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_ev~0 := 2;~d1_req_up~0 := 0;~z_val~0 := 0;~z_ev~0 := 2;~z_req_up~0 := 0;~b0_val_t~0 := 1;~b0_req_up~0 := 1;~b1_val_t~0 := 1;~b1_req_up~0 := 1;~d0_val_t~0 := 1;~d0_req_up~0 := 1;~d1_val_t~0 := 1;~d1_req_up~0 := 1;~comp_m1_i~0 := 0; 68204#L480 assume { :end_inline_init_model } true;assume { :begin_inline_start_simulation } true;havoc start_simulation_#t~ret4, start_simulation_~kernel_st~0, start_simulation_~tmp~3;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;start_simulation_~kernel_st~0 := 0;assume { :begin_inline_update_channels } true; 68291#L202 assume 1 == ~b0_req_up~0;assume { :begin_inline_update_b0 } true; 68302#L127 assume ~b0_val~0 != ~b0_val_t~0;~b0_val~0 := ~b0_val_t~0;~b0_ev~0 := 0; 68320#L127-2 ~b0_req_up~0 := 0; 68321#L135 assume { :end_inline_update_b0 } true; 68268#L202-2 assume 1 == ~b1_req_up~0;assume { :begin_inline_update_b1 } true; 68237#L142 assume ~b1_val~0 != ~b1_val_t~0;~b1_val~0 := ~b1_val_t~0;~b1_ev~0 := 0; 68225#L142-2 ~b1_req_up~0 := 0; 68226#L150 assume { :end_inline_update_b1 } true; 68280#L209-1 assume 1 == ~d0_req_up~0;assume { :begin_inline_update_d0 } true; 68347#L157 assume ~d0_val~0 != ~d0_val_t~0;~d0_val~0 := ~d0_val_t~0;~d0_ev~0 := 0; 68341#L157-2 ~d0_req_up~0 := 0; 68342#L165 assume { :end_inline_update_d0 } true; 68282#L216-1 assume 1 == ~d1_req_up~0;assume { :begin_inline_update_d1 } true; 68281#L172 assume ~d1_val~0 != ~d1_val_t~0;~d1_val~0 := ~d1_val_t~0;~d1_ev~0 := 0; 68273#L172-2 ~d1_req_up~0 := 0; 68271#L180 assume { :end_inline_update_d1 } true; 68272#L223-1 assume !(1 == ~z_req_up~0); 68179#L230-1 assume { :end_inline_update_channels } true;assume { :begin_inline_init_threads } true; 68180#L245 assume !(1 == ~comp_m1_i~0);~comp_m1_st~0 := 2; 68348#L245-2 assume { :end_inline_init_threads } true;assume { :begin_inline_fire_delta_events } true; 68349#L311 assume 0 == ~b0_ev~0;~b0_ev~0 := 1; 68367#L311-2 assume 0 == ~b1_ev~0;~b1_ev~0 := 1; 68375#L316-1 assume 0 == ~d0_ev~0;~d0_ev~0 := 1; 68195#L321-1 assume 0 == ~d1_ev~0;~d1_ev~0 := 1; 68196#L326-1 assume !(0 == ~z_ev~0); 68284#L331-1 assume { :end_inline_fire_delta_events } true;assume { :begin_inline_activate_threads } true;havoc activate_threads_#t~ret2, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;assume { :begin_inline_is_method1_triggered } true;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 68327#L97 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 68333#L119 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 68231#L120 activate_threads_#t~ret2 := is_method1_triggered_#res;assume { :end_inline_is_method1_triggered } true;activate_threads_~tmp~1 := activate_threads_#t~ret2;havoc activate_threads_#t~ret2; 68232#L380 assume 0 != activate_threads_~tmp~1;~comp_m1_st~0 := 0; 68361#L380-2 assume { :end_inline_activate_threads } true;assume { :begin_inline_reset_delta_events } true; 68364#L344 assume 1 == ~b0_ev~0;~b0_ev~0 := 2; 68366#L344-2 assume 1 == ~b1_ev~0;~b1_ev~0 := 2; 68372#L349-1 assume 1 == ~d0_ev~0;~d0_ev~0 := 2; 68185#L354-1 assume 1 == ~d1_ev~0;~d1_ev~0 := 2; 68186#L359-1 assume !(1 == ~z_ev~0); 68283#L364-1 assume { :end_inline_reset_delta_events } true; 68326#L422-3 assume true; 70120#L422-1 assume !false; 71355#L423 start_simulation_~kernel_st~0 := 1;assume { :begin_inline_eval } true;havoc eval_#t~ret0, eval_#t~nondet1, eval_~tmp~0, eval_~tmp___0~0;havoc eval_~tmp~0;havoc eval_~tmp___0~0; 71356#L285 [2018-11-18 08:34:49,000 INFO L796 eck$LassoCheckResult]: Loop: 71356#L285 assume true; 72028#L275-1 assume !false; 72024#L276 assume { :begin_inline_exists_runnable_thread } true;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 72022#L258 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 69850#L265 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 72021#L266 eval_#t~ret0 := exists_runnable_thread_#res;assume { :end_inline_exists_runnable_thread } true;eval_~tmp___0~0 := eval_#t~ret0;havoc eval_#t~ret0; 72020#L280 assume 0 != eval_~tmp___0~0; 72019#L280-1 assume 0 == ~comp_m1_st~0;eval_~tmp~0 := eval_#t~nondet1;havoc eval_#t~nondet1; 69859#L289 assume !(0 != eval_~tmp~0); 71356#L285 [2018-11-18 08:34:49,001 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 08:34:49,001 INFO L82 PathProgramCache]: Analyzing trace with hash 2063844791, now seen corresponding path program 1 times [2018-11-18 08:34:49,001 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-18 08:34:49,001 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-18 08:34:49,001 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 08:34:49,002 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 08:34:49,002 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 08:34:49,005 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-18 08:34:49,008 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-18 08:34:49,011 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 08:34:49,012 INFO L82 PathProgramCache]: Analyzing trace with hash 52161779, now seen corresponding path program 1 times [2018-11-18 08:34:49,012 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-18 08:34:49,012 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-18 08:34:49,012 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 08:34:49,013 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 08:34:49,013 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 08:34:49,013 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-18 08:34:49,014 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-18 08:34:49,015 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 08:34:49,015 INFO L82 PathProgramCache]: Analyzing trace with hash 1807496189, now seen corresponding path program 1 times [2018-11-18 08:34:49,016 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-18 08:34:49,016 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-18 08:34:49,016 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 08:34:49,016 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 08:34:49,016 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 08:34:49,020 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-18 08:34:49,024 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-18 08:34:49,381 WARN L180 SmtUtils]: Spent 306.00 ms on a formula simplification. DAG size of input: 160 DAG size of output: 142 [2018-11-18 08:34:49,448 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer CFG 18.11 08:34:49 BoogieIcfgContainer [2018-11-18 08:34:49,449 INFO L132 PluginConnector]: ------------------------ END BuchiAutomizer---------------------------- [2018-11-18 08:34:49,449 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2018-11-18 08:34:49,449 INFO L271 PluginConnector]: Initializing Witness Printer... [2018-11-18 08:34:49,449 INFO L276 PluginConnector]: Witness Printer initialized [2018-11-18 08:34:49,449 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 18.11 08:34:40" (3/4) ... [2018-11-18 08:34:49,452 INFO L141 WitnessPrinter]: Generating witness for non-termination counterexample [2018-11-18 08:34:49,505 INFO L145 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/working_dir_89f12fe3-ff39-4721-a39a-11b61e72f14e/bin-2019/uautomizer/witness.graphml [2018-11-18 08:34:49,505 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2018-11-18 08:34:49,506 INFO L168 Benchmark]: Toolchain (without parser) took 9534.37 ms. Allocated memory was 1.0 GB in the beginning and 1.4 GB in the end (delta: 396.4 MB). Free memory was 958.5 MB in the beginning and 1.1 GB in the end (delta: -126.6 MB). Peak memory consumption was 269.8 MB. Max. memory is 11.5 GB. [2018-11-18 08:34:49,506 INFO L168 Benchmark]: CDTParser took 0.13 ms. Allocated memory is still 1.0 GB. Free memory is still 985.3 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-11-18 08:34:49,507 INFO L168 Benchmark]: CACSL2BoogieTranslator took 192.35 ms. Allocated memory is still 1.0 GB. Free memory was 958.5 MB in the beginning and 942.4 MB in the end (delta: 16.1 MB). Peak memory consumption was 16.1 MB. Max. memory is 11.5 GB. [2018-11-18 08:34:49,507 INFO L168 Benchmark]: Boogie Procedure Inliner took 66.00 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 129.5 MB). Free memory was 942.4 MB in the beginning and 1.1 GB in the end (delta: -185.0 MB). Peak memory consumption was 14.6 MB. Max. memory is 11.5 GB. [2018-11-18 08:34:49,507 INFO L168 Benchmark]: Boogie Preprocessor took 17.99 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 3.4 MB). Peak memory consumption was 3.4 MB. Max. memory is 11.5 GB. [2018-11-18 08:34:49,507 INFO L168 Benchmark]: RCFGBuilder took 462.96 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 45.6 MB). Peak memory consumption was 45.6 MB. Max. memory is 11.5 GB. [2018-11-18 08:34:49,508 INFO L168 Benchmark]: BuchiAutomizer took 8735.81 ms. Allocated memory was 1.2 GB in the beginning and 1.4 GB in the end (delta: 266.9 MB). Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: -6.7 MB). Peak memory consumption was 260.1 MB. Max. memory is 11.5 GB. [2018-11-18 08:34:49,508 INFO L168 Benchmark]: Witness Printer took 56.11 ms. Allocated memory is still 1.4 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2018-11-18 08:34:49,509 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.13 ms. Allocated memory is still 1.0 GB. Free memory is still 985.3 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 192.35 ms. Allocated memory is still 1.0 GB. Free memory was 958.5 MB in the beginning and 942.4 MB in the end (delta: 16.1 MB). Peak memory consumption was 16.1 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 66.00 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 129.5 MB). Free memory was 942.4 MB in the beginning and 1.1 GB in the end (delta: -185.0 MB). Peak memory consumption was 14.6 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 17.99 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 3.4 MB). Peak memory consumption was 3.4 MB. Max. memory is 11.5 GB. * RCFGBuilder took 462.96 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 45.6 MB). Peak memory consumption was 45.6 MB. Max. memory is 11.5 GB. * BuchiAutomizer took 8735.81 ms. Allocated memory was 1.2 GB in the beginning and 1.4 GB in the end (delta: 266.9 MB). Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: -6.7 MB). Peak memory consumption was 260.1 MB. Max. memory is 11.5 GB. * Witness Printer took 56.11 ms. Allocated memory is still 1.4 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: Constructed decomposition of program Your program was decomposed into 29 terminating modules (26 trivial, 3 deterministic, 0 nondeterministic) and one nonterminating remainder module.One deterministic module has affine ranking function -1 * d1_ev + 1 and consists of 3 locations. One deterministic module has affine ranking function -1 * d0_ev + 1 and consists of 3 locations. One deterministic module has affine ranking function -2 * b0_ev + 3 and consists of 4 locations. 26 modules have a trivial ranking function, the largest among these consists of 5 locations. The remainder module has 7440 locations. - StatisticsResult: Timing statistics BüchiAutomizer plugin needed 8.6s and 27 iterations. TraceHistogramMax:2. Analysis of lassos took 6.2s. Construction of modules took 0.5s. Büchi inclusion checks took 0.9s. Highest rank in rank-based complementation 3. Minimization of det autom 20. Minimization of nondet autom 9. Automata minimization 0.4s AutomataMinimizationTime, 29 MinimizatonAttempts, 4901 StatesRemovedByMinimization, 12 NontrivialMinimizations. Non-live state removal took 0.2s Buchi closure took 0.0s. Biggest automaton had 7440 states and ocurred in iteration 26. Nontrivial modules had stage [3, 0, 0, 0, 0]. InterpolantCoveringCapabilityFinite: 0/0 InterpolantCoveringCapabilityBuchi: 21/21 HoareTripleCheckerStatistics: 5103 SDtfs, 2548 SDslu, 4679 SDs, 0 SdLazy, 303 SolverSat, 75 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 0.5s Time LassoAnalysisResults: nont1 unkn0 SFLI8 SFLT0 conc0 concLT3 SILN0 SILU0 SILI15 SILT0 lasso0 LassoPreprocessingBenchmarks: Lassos: inital121 mio100 ax100 hnf100 lsp9 ukn100 mio100 lsp100 div100 bol100 ite100 ukn100 eq200 hnf91 smp100 dnf169 smp96 tf105 neg94 sie111 LassoTerminationAnalysisBenchmarks: ConstraintsSatisfiability: unsat Degree: 0 Time: 3ms VariablesStem: 0 VariablesLoop: 3 DisjunctsStem: 1 DisjunctsLoop: 2 SupportingInvariants: 0 MotzkinApplications: 4 LassoTerminationAnalysisBenchmarks: LassoNonterminationAnalysisSatFixpoint: 7 LassoNonterminationAnalysisSatUnbounded: 0 LassoNonterminationAnalysisUnsat: 3 LassoNonterminationAnalysisUnknown: 0 LassoNonterminationAnalysisTime: 1.0s - TerminationAnalysisResult: Nontermination possible Buchi Automizer proved that your program is nonterminating for some inputs - FixpointNonTerminationResult [Line: 275]: Nontermination argument in form of an infinite program execution. Nontermination argument in form of an infinite execution State at position 0 is {} State at position 1 is {org.eclipse.cdt.internal.core.dom.parser.c.CASTFunctionCallExpression@51ea9f51=0, b1_val_t=1, \result=0, d0_val=1, org.eclipse.cdt.internal.core.dom.parser.c.CASTFunctionCallExpression@5fe1b6d6=0, __retres1=1, z_val=0, tmp=0, b0_val_t=1, kernel_st=1, d1_ev=2, comp_m1_i=0, b1_val=1, d1_req_up=0, tmp___0=1, org.eclipse.cdt.internal.core.dom.parser.c.CASTFunctionCallExpression@de9eff7=0, z_val_t=0, b1_req_up=0, __retres1=1, d0_ev=2, z_ev=2, tmp=0, org.eclipse.cdt.internal.core.dom.parser.c.CASTFunctionCallExpression@664692ce=0, b1_ev=2, comp_m1_st=0, b0_req_up=0, z_req_up=0, \result=1, d1_val=1, b0_ev=2, tmp=1, d0_val_t=1, d1_val_t=1, b0_val=1, __retres1=0, d0_req_up=0, \result=1} - StatisticsResult: NonterminationArgumentStatistics Fixpoint - NonterminatingLassoResult [Line: 275]: Nonterminating execution Found a nonterminating execution for the following lasso shaped sequence of statements. Stem: [L14] int b0_val ; [L15] int b0_val_t ; [L16] int b0_ev ; [L17] int b0_req_up ; [L18] int b1_val ; [L19] int b1_val_t ; [L20] int b1_ev ; [L21] int b1_req_up ; [L22] int d0_val ; [L23] int d0_val_t ; [L24] int d0_ev ; [L25] int d0_req_up ; [L26] int d1_val ; [L27] int d1_val_t ; [L28] int d1_ev ; [L29] int d1_req_up ; [L30] int z_val ; [L31] int z_val_t ; [L32] int z_ev ; [L33] int z_req_up ; [L34] int comp_m1_st ; [L35] int comp_m1_i ; [L484] int __retres1 ; [L488] CALL init_model() [L455] b0_val = 0 [L456] b0_ev = 2 [L457] b0_req_up = 0 [L458] b1_val = 0 [L459] b1_ev = 2 [L460] b1_req_up = 0 [L461] d0_val = 0 [L462] d0_ev = 2 [L463] d0_req_up = 0 [L464] d1_val = 0 [L465] d1_ev = 2 [L466] d1_req_up = 0 [L467] z_val = 0 [L468] z_ev = 2 [L469] z_req_up = 0 [L470] b0_val_t = 1 [L471] b0_req_up = 1 [L472] b1_val_t = 1 [L473] b1_req_up = 1 [L474] d0_val_t = 1 [L475] d0_req_up = 1 [L476] d1_val_t = 1 [L477] d1_req_up = 1 [L478] RET comp_m1_i = 0 [L488] init_model() [L489] CALL start_simulation() [L409] int kernel_st ; [L410] int tmp ; [L414] kernel_st = 0 [L415] CALL update_channels() [L202] COND TRUE (int )b0_req_up == 1 [L204] CALL update_b0() [L127] COND TRUE (int )b0_val != (int )b0_val_t [L128] b0_val = b0_val_t [L129] b0_ev = 0 [L133] RET b0_req_up = 0 [L204] update_b0() [L209] COND TRUE (int )b1_req_up == 1 [L211] CALL update_b1() [L142] COND TRUE (int )b1_val != (int )b1_val_t [L143] b1_val = b1_val_t [L144] b1_ev = 0 [L148] RET b1_req_up = 0 [L211] update_b1() [L216] COND TRUE (int )d0_req_up == 1 [L218] CALL update_d0() [L157] COND TRUE (int )d0_val != (int )d0_val_t [L158] d0_val = d0_val_t [L159] d0_ev = 0 [L163] RET d0_req_up = 0 [L218] update_d0() [L223] COND TRUE (int )d1_req_up == 1 [L225] CALL update_d1() [L172] COND TRUE (int )d1_val != (int )d1_val_t [L173] d1_val = d1_val_t [L174] d1_ev = 0 [L178] RET d1_req_up = 0 [L225] update_d1() [L230] COND FALSE, RET !((int )z_req_up == 1) [L415] update_channels() [L416] CALL init_threads() [L245] COND FALSE !((int )comp_m1_i == 1) [L248] RET comp_m1_st = 2 [L416] init_threads() [L417] CALL fire_delta_events() [L311] COND TRUE (int )b0_ev == 0 [L312] b0_ev = 1 [L316] COND TRUE (int )b1_ev == 0 [L317] b1_ev = 1 [L321] COND TRUE (int )d0_ev == 0 [L322] d0_ev = 1 [L326] COND TRUE (int )d1_ev == 0 [L327] d1_ev = 1 [L331] COND FALSE, RET !((int )z_ev == 0) [L417] fire_delta_events() [L418] CALL activate_threads() [L374] int tmp ; [L378] CALL, EXPR is_method1_triggered() [L94] int __retres1 ; [L97] COND TRUE (int )b0_ev == 1 [L98] __retres1 = 1 [L120] RET return (__retres1); [L378] EXPR is_method1_triggered() [L378] tmp = is_method1_triggered() [L380] COND TRUE \read(tmp) [L381] RET comp_m1_st = 0 [L418] activate_threads() [L419] CALL reset_delta_events() [L344] COND TRUE (int )b0_ev == 1 [L345] b0_ev = 2 [L349] COND TRUE (int )b1_ev == 1 [L350] b1_ev = 2 [L354] COND TRUE (int )d0_ev == 1 [L355] d0_ev = 2 [L359] COND TRUE (int )d1_ev == 1 [L360] d1_ev = 2 [L364] COND FALSE, RET !((int )z_ev == 1) [L419] reset_delta_events() [L422] COND TRUE 1 [L425] kernel_st = 1 [L426] CALL eval() [L270] int tmp ; [L271] int tmp___0 ; Loop: [L275] COND TRUE 1 [L278] CALL, EXPR exists_runnable_thread() [L255] int __retres1 ; [L258] COND TRUE (int )comp_m1_st == 0 [L259] __retres1 = 1 [L266] RET return (__retres1); [L278] EXPR exists_runnable_thread() [L278] tmp___0 = exists_runnable_thread() [L280] COND TRUE \read(tmp___0) [L285] COND TRUE (int )comp_m1_st == 0 [L287] tmp = __VERIFIER_nondet_int() [L289] COND FALSE !(\read(tmp)) End of lasso representation. RESULT: Ultimate proved your program to be incorrect! Received shutdown request...