./Ultimate.py --spec ../../sv-benchmarks/c/properties/no-overflow.prp --file ../../sv-benchmarks/c/termination-crafted/NonTermination4_false-no-overflow.c --full-output --architecture 64bit -------------------------------------------------------------------------------- Checking for overflows Using default analysis Version aa418289 Calling Ultimate with: java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/working_dir_5db53c6b-9103-46d2-b960-4341706e456a/bin-2019/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/working_dir_5db53c6b-9103-46d2-b960-4341706e456a/bin-2019/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/working_dir_5db53c6b-9103-46d2-b960-4341706e456a/bin-2019/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/working_dir_5db53c6b-9103-46d2-b960-4341706e456a/bin-2019/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/termination-crafted/NonTermination4_false-no-overflow.c -s /tmp/vcloud-vcloud-master/worker/working_dir_5db53c6b-9103-46d2-b960-4341706e456a/bin-2019/uautomizer/config/svcomp-Overflow-64bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/working_dir_5db53c6b-9103-46d2-b960-4341706e456a/bin-2019/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! overflow) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash 94b61e96441ca10668b436b4ef10dfd9464f0863 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Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE(OVERFLOW) --- Real Ultimate output --- This is Ultimate 0.1.23-aa41828 [2018-11-23 14:31:26,064 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-11-23 14:31:26,065 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-11-23 14:31:26,074 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-11-23 14:31:26,074 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-11-23 14:31:26,075 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-11-23 14:31:26,076 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-11-23 14:31:26,077 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-11-23 14:31:26,078 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-11-23 14:31:26,079 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-11-23 14:31:26,080 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-11-23 14:31:26,080 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-11-23 14:31:26,081 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-11-23 14:31:26,082 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-11-23 14:31:26,083 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-11-23 14:31:26,083 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-11-23 14:31:26,084 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-11-23 14:31:26,086 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-11-23 14:31:26,087 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-11-23 14:31:26,088 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-11-23 14:31:26,089 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-11-23 14:31:26,090 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-11-23 14:31:26,092 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-11-23 14:31:26,092 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-11-23 14:31:26,093 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-11-23 14:31:26,093 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-11-23 14:31:26,094 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-11-23 14:31:26,095 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-11-23 14:31:26,096 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-11-23 14:31:26,096 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-11-23 14:31:26,097 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-11-23 14:31:26,097 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-11-23 14:31:26,097 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-11-23 14:31:26,097 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-11-23 14:31:26,098 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-11-23 14:31:26,099 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-11-23 14:31:26,100 INFO L98 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/working_dir_5db53c6b-9103-46d2-b960-4341706e456a/bin-2019/uautomizer/config/svcomp-Overflow-64bit-Automizer_Default.epf [2018-11-23 14:31:26,111 INFO L110 SettingsManager]: Loading preferences was successful [2018-11-23 14:31:26,112 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-11-23 14:31:26,112 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-11-23 14:31:26,112 INFO L133 SettingsManager]: * ... calls to implemented procedures=ONLY_FOR_CONCURRENT_PROGRAMS [2018-11-23 14:31:26,113 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-11-23 14:31:26,113 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-11-23 14:31:26,113 INFO L133 SettingsManager]: * Use SBE=true [2018-11-23 14:31:26,113 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-11-23 14:31:26,114 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-11-23 14:31:26,114 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-11-23 14:31:26,114 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-11-23 14:31:26,114 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-11-23 14:31:26,114 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-11-23 14:31:26,114 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-11-23 14:31:26,114 INFO L133 SettingsManager]: * Check absence of signed integer overflows=true [2018-11-23 14:31:26,114 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-11-23 14:31:26,115 INFO L133 SettingsManager]: * Use constant arrays=true [2018-11-23 14:31:26,115 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-11-23 14:31:26,115 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-11-23 14:31:26,115 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-11-23 14:31:26,115 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-11-23 14:31:26,116 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-11-23 14:31:26,116 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-23 14:31:26,116 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-11-23 14:31:26,116 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-11-23 14:31:26,116 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-11-23 14:31:26,116 INFO L133 SettingsManager]: * Trace refinement strategy=CAMEL [2018-11-23 14:31:26,116 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-11-23 14:31:26,116 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-11-23 14:31:26,116 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/working_dir_5db53c6b-9103-46d2-b960-4341706e456a/bin-2019/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! overflow) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 94b61e96441ca10668b436b4ef10dfd9464f0863 [2018-11-23 14:31:26,143 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-11-23 14:31:26,153 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-11-23 14:31:26,155 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-11-23 14:31:26,156 INFO L271 PluginConnector]: Initializing CDTParser... [2018-11-23 14:31:26,157 INFO L276 PluginConnector]: CDTParser initialized [2018-11-23 14:31:26,157 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/working_dir_5db53c6b-9103-46d2-b960-4341706e456a/bin-2019/uautomizer/../../sv-benchmarks/c/termination-crafted/NonTermination4_false-no-overflow.c [2018-11-23 14:31:26,200 INFO L221 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_5db53c6b-9103-46d2-b960-4341706e456a/bin-2019/uautomizer/data/7a9566d3b/7e9887382ef743df8c81ddf09b6ee878/FLAG5e5abc22d [2018-11-23 14:31:26,552 INFO L307 CDTParser]: Found 1 translation units. [2018-11-23 14:31:26,552 INFO L161 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/working_dir_5db53c6b-9103-46d2-b960-4341706e456a/sv-benchmarks/c/termination-crafted/NonTermination4_false-no-overflow.c [2018-11-23 14:31:26,558 INFO L355 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_5db53c6b-9103-46d2-b960-4341706e456a/bin-2019/uautomizer/data/7a9566d3b/7e9887382ef743df8c81ddf09b6ee878/FLAG5e5abc22d [2018-11-23 14:31:26,972 INFO L363 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/working_dir_5db53c6b-9103-46d2-b960-4341706e456a/bin-2019/uautomizer/data/7a9566d3b/7e9887382ef743df8c81ddf09b6ee878 [2018-11-23 14:31:26,975 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-11-23 14:31:26,976 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2018-11-23 14:31:26,976 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-11-23 14:31:26,976 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-11-23 14:31:26,980 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-11-23 14:31:26,981 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 23.11 02:31:26" (1/1) ... [2018-11-23 14:31:26,983 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@346a68e0 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 02:31:26, skipping insertion in model container [2018-11-23 14:31:26,984 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 23.11 02:31:26" (1/1) ... [2018-11-23 14:31:26,993 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-11-23 14:31:27,009 INFO L176 MainTranslator]: Built tables and reachable declarations [2018-11-23 14:31:27,145 INFO L201 PostProcessor]: Analyzing one entry point: main [2018-11-23 14:31:27,148 INFO L191 MainTranslator]: Completed pre-run [2018-11-23 14:31:27,158 INFO L201 PostProcessor]: Analyzing one entry point: main [2018-11-23 14:31:27,167 INFO L195 MainTranslator]: Completed translation [2018-11-23 14:31:27,168 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 02:31:27 WrapperNode [2018-11-23 14:31:27,168 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-11-23 14:31:27,168 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-11-23 14:31:27,168 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-11-23 14:31:27,169 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-11-23 14:31:27,174 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 02:31:27" (1/1) ... [2018-11-23 14:31:27,178 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 02:31:27" (1/1) ... [2018-11-23 14:31:27,183 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-11-23 14:31:27,183 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-11-23 14:31:27,183 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-11-23 14:31:27,183 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-11-23 14:31:27,189 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 02:31:27" (1/1) ... [2018-11-23 14:31:27,190 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 02:31:27" (1/1) ... [2018-11-23 14:31:27,190 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 02:31:27" (1/1) ... [2018-11-23 14:31:27,190 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 02:31:27" (1/1) ... [2018-11-23 14:31:27,192 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 02:31:27" (1/1) ... [2018-11-23 14:31:27,195 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 02:31:27" (1/1) ... [2018-11-23 14:31:27,196 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 02:31:27" (1/1) ... [2018-11-23 14:31:27,197 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-11-23 14:31:27,197 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-11-23 14:31:27,197 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-11-23 14:31:27,197 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-11-23 14:31:27,198 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 02:31:27" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_5db53c6b-9103-46d2-b960-4341706e456a/bin-2019/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-23 14:31:27,281 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-11-23 14:31:27,281 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-11-23 14:31:27,281 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-11-23 14:31:27,282 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-11-23 14:31:27,282 INFO L130 BoogieDeclarations]: Found specification of procedure main [2018-11-23 14:31:27,282 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2018-11-23 14:31:27,375 INFO L275 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-11-23 14:31:27,375 INFO L280 CfgBuilder]: Removed 1 assue(true) statements. [2018-11-23 14:31:27,375 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 23.11 02:31:27 BoogieIcfgContainer [2018-11-23 14:31:27,375 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-11-23 14:31:27,376 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-11-23 14:31:27,376 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-11-23 14:31:27,378 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-11-23 14:31:27,378 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 23.11 02:31:26" (1/3) ... [2018-11-23 14:31:27,379 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@7b46c49 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 23.11 02:31:27, skipping insertion in model container [2018-11-23 14:31:27,379 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 02:31:27" (2/3) ... [2018-11-23 14:31:27,379 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@7b46c49 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 23.11 02:31:27, skipping insertion in model container [2018-11-23 14:31:27,379 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 23.11 02:31:27" (3/3) ... [2018-11-23 14:31:27,381 INFO L112 eAbstractionObserver]: Analyzing ICFG NonTermination4_false-no-overflow.c [2018-11-23 14:31:27,387 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-11-23 14:31:27,392 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 4 error locations. [2018-11-23 14:31:27,404 INFO L257 AbstractCegarLoop]: Starting to check reachability of 4 error locations. [2018-11-23 14:31:27,431 INFO L133 ementStrategyFactory]: Using default assertion order modulation [2018-11-23 14:31:27,432 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-11-23 14:31:27,432 INFO L383 AbstractCegarLoop]: Hoare is true [2018-11-23 14:31:27,432 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-11-23 14:31:27,432 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-11-23 14:31:27,432 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-11-23 14:31:27,432 INFO L387 AbstractCegarLoop]: Difference is false [2018-11-23 14:31:27,432 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-11-23 14:31:27,432 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-11-23 14:31:27,443 INFO L276 IsEmpty]: Start isEmpty. Operand 19 states. [2018-11-23 14:31:27,446 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 8 [2018-11-23 14:31:27,447 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 14:31:27,447 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1] [2018-11-23 14:31:27,449 INFO L423 AbstractCegarLoop]: === Iteration 1 === [mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2018-11-23 14:31:27,454 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 14:31:27,454 INFO L82 PathProgramCache]: Analyzing trace with hash -37667266, now seen corresponding path program 1 times [2018-11-23 14:31:27,456 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 14:31:27,457 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 14:31:27,500 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 14:31:27,501 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 14:31:27,501 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 14:31:27,515 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 14:31:27,544 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 14:31:27,545 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 14:31:27,546 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-11-23 14:31:27,548 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-23 14:31:27,558 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-23 14:31:27,559 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-23 14:31:27,561 INFO L87 Difference]: Start difference. First operand 19 states. Second operand 3 states. [2018-11-23 14:31:27,598 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 14:31:27,598 INFO L93 Difference]: Finished difference Result 28 states and 31 transitions. [2018-11-23 14:31:27,599 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-23 14:31:27,600 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 7 [2018-11-23 14:31:27,600 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 14:31:27,605 INFO L225 Difference]: With dead ends: 28 [2018-11-23 14:31:27,605 INFO L226 Difference]: Without dead ends: 17 [2018-11-23 14:31:27,607 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-23 14:31:27,617 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17 states. [2018-11-23 14:31:27,627 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17 to 16. [2018-11-23 14:31:27,628 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16 states. [2018-11-23 14:31:27,628 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16 states to 16 states and 16 transitions. [2018-11-23 14:31:27,629 INFO L78 Accepts]: Start accepts. Automaton has 16 states and 16 transitions. Word has length 7 [2018-11-23 14:31:27,629 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 14:31:27,629 INFO L480 AbstractCegarLoop]: Abstraction has 16 states and 16 transitions. [2018-11-23 14:31:27,629 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-23 14:31:27,630 INFO L276 IsEmpty]: Start isEmpty. Operand 16 states and 16 transitions. [2018-11-23 14:31:27,630 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 9 [2018-11-23 14:31:27,630 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 14:31:27,630 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 14:31:27,630 INFO L423 AbstractCegarLoop]: === Iteration 2 === [mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2018-11-23 14:31:27,630 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 14:31:27,630 INFO L82 PathProgramCache]: Analyzing trace with hash -1167685199, now seen corresponding path program 1 times [2018-11-23 14:31:27,630 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 14:31:27,631 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 14:31:27,631 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 14:31:27,632 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 14:31:27,632 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 14:31:27,634 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 14:31:27,652 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 14:31:27,652 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 14:31:27,652 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-11-23 14:31:27,654 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-23 14:31:27,654 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-23 14:31:27,654 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-23 14:31:27,654 INFO L87 Difference]: Start difference. First operand 16 states and 16 transitions. Second operand 3 states. [2018-11-23 14:31:27,675 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 14:31:27,675 INFO L93 Difference]: Finished difference Result 16 states and 16 transitions. [2018-11-23 14:31:27,676 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-23 14:31:27,676 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 8 [2018-11-23 14:31:27,676 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 14:31:27,676 INFO L225 Difference]: With dead ends: 16 [2018-11-23 14:31:27,676 INFO L226 Difference]: Without dead ends: 15 [2018-11-23 14:31:27,677 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-23 14:31:27,677 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15 states. [2018-11-23 14:31:27,678 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15 to 15. [2018-11-23 14:31:27,678 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15 states. [2018-11-23 14:31:27,678 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15 states to 15 states and 15 transitions. [2018-11-23 14:31:27,679 INFO L78 Accepts]: Start accepts. Automaton has 15 states and 15 transitions. Word has length 8 [2018-11-23 14:31:27,679 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 14:31:27,679 INFO L480 AbstractCegarLoop]: Abstraction has 15 states and 15 transitions. [2018-11-23 14:31:27,679 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-23 14:31:27,679 INFO L276 IsEmpty]: Start isEmpty. Operand 15 states and 15 transitions. [2018-11-23 14:31:27,679 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 10 [2018-11-23 14:31:27,679 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 14:31:27,679 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 14:31:27,679 INFO L423 AbstractCegarLoop]: === Iteration 3 === [mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2018-11-23 14:31:27,680 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 14:31:27,680 INFO L82 PathProgramCache]: Analyzing trace with hash -1838502752, now seen corresponding path program 1 times [2018-11-23 14:31:27,680 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 14:31:27,680 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 14:31:27,681 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 14:31:27,681 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 14:31:27,681 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 14:31:27,686 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 14:31:27,705 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 14:31:27,706 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 14:31:27,706 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-11-23 14:31:27,706 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-23 14:31:27,706 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-23 14:31:27,706 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-23 14:31:27,707 INFO L87 Difference]: Start difference. First operand 15 states and 15 transitions. Second operand 3 states. [2018-11-23 14:31:27,726 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 14:31:27,726 INFO L93 Difference]: Finished difference Result 19 states and 20 transitions. [2018-11-23 14:31:27,726 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-23 14:31:27,726 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 9 [2018-11-23 14:31:27,727 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 14:31:27,727 INFO L225 Difference]: With dead ends: 19 [2018-11-23 14:31:27,727 INFO L226 Difference]: Without dead ends: 18 [2018-11-23 14:31:27,728 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-23 14:31:27,728 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18 states. [2018-11-23 14:31:27,729 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18 to 17. [2018-11-23 14:31:27,729 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17 states. [2018-11-23 14:31:27,730 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17 states to 17 states and 17 transitions. [2018-11-23 14:31:27,730 INFO L78 Accepts]: Start accepts. Automaton has 17 states and 17 transitions. Word has length 9 [2018-11-23 14:31:27,730 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 14:31:27,730 INFO L480 AbstractCegarLoop]: Abstraction has 17 states and 17 transitions. [2018-11-23 14:31:27,730 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-23 14:31:27,730 INFO L276 IsEmpty]: Start isEmpty. Operand 17 states and 17 transitions. [2018-11-23 14:31:27,730 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 11 [2018-11-23 14:31:27,730 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 14:31:27,730 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 14:31:27,731 INFO L423 AbstractCegarLoop]: === Iteration 4 === [mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2018-11-23 14:31:27,731 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 14:31:27,731 INFO L82 PathProgramCache]: Analyzing trace with hash -1159010413, now seen corresponding path program 1 times [2018-11-23 14:31:27,731 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 14:31:27,731 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 14:31:27,732 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 14:31:27,732 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 14:31:27,733 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 14:31:27,736 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 14:31:27,746 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 14:31:27,746 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 14:31:27,747 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-11-23 14:31:27,747 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-23 14:31:27,747 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-23 14:31:27,747 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-23 14:31:27,747 INFO L87 Difference]: Start difference. First operand 17 states and 17 transitions. Second operand 3 states. [2018-11-23 14:31:27,759 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 14:31:27,760 INFO L93 Difference]: Finished difference Result 17 states and 17 transitions. [2018-11-23 14:31:27,760 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-23 14:31:27,760 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 10 [2018-11-23 14:31:27,760 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 14:31:27,761 INFO L225 Difference]: With dead ends: 17 [2018-11-23 14:31:27,761 INFO L226 Difference]: Without dead ends: 16 [2018-11-23 14:31:27,761 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-23 14:31:27,761 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16 states. [2018-11-23 14:31:27,763 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16 to 16. [2018-11-23 14:31:27,763 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16 states. [2018-11-23 14:31:27,763 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16 states to 16 states and 16 transitions. [2018-11-23 14:31:27,763 INFO L78 Accepts]: Start accepts. Automaton has 16 states and 16 transitions. Word has length 10 [2018-11-23 14:31:27,763 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 14:31:27,763 INFO L480 AbstractCegarLoop]: Abstraction has 16 states and 16 transitions. [2018-11-23 14:31:27,763 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-23 14:31:27,763 INFO L276 IsEmpty]: Start isEmpty. Operand 16 states and 16 transitions. [2018-11-23 14:31:27,763 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 13 [2018-11-23 14:31:27,764 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 14:31:27,764 INFO L402 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 14:31:27,764 INFO L423 AbstractCegarLoop]: === Iteration 5 === [mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2018-11-23 14:31:27,764 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 14:31:27,764 INFO L82 PathProgramCache]: Analyzing trace with hash -1412475851, now seen corresponding path program 1 times [2018-11-23 14:31:27,764 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 14:31:27,764 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 14:31:27,765 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 14:31:27,765 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 14:31:27,765 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 14:31:27,769 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 14:31:27,799 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 14:31:27,799 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-23 14:31:27,799 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_5db53c6b-9103-46d2-b960-4341706e456a/bin-2019/uautomizer/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-23 14:31:27,806 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 14:31:27,813 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 14:31:27,817 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 14:31:27,839 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 14:31:27,853 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 14:31:27,853 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [3, 3] total 3 [2018-11-23 14:31:27,853 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-23 14:31:27,854 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-23 14:31:27,854 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2018-11-23 14:31:27,854 INFO L87 Difference]: Start difference. First operand 16 states and 16 transitions. Second operand 4 states. [2018-11-23 14:31:27,877 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 14:31:27,877 INFO L93 Difference]: Finished difference Result 21 states and 21 transitions. [2018-11-23 14:31:27,877 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-23 14:31:27,877 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 12 [2018-11-23 14:31:27,877 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 14:31:27,877 INFO L225 Difference]: With dead ends: 21 [2018-11-23 14:31:27,878 INFO L226 Difference]: Without dead ends: 20 [2018-11-23 14:31:27,878 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 11 SyntacticMatches, 1 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2018-11-23 14:31:27,878 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20 states. [2018-11-23 14:31:27,879 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20 to 19. [2018-11-23 14:31:27,879 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19 states. [2018-11-23 14:31:27,880 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19 states to 19 states and 19 transitions. [2018-11-23 14:31:27,880 INFO L78 Accepts]: Start accepts. Automaton has 19 states and 19 transitions. Word has length 12 [2018-11-23 14:31:27,880 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 14:31:27,880 INFO L480 AbstractCegarLoop]: Abstraction has 19 states and 19 transitions. [2018-11-23 14:31:27,880 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-23 14:31:27,880 INFO L276 IsEmpty]: Start isEmpty. Operand 19 states and 19 transitions. [2018-11-23 14:31:27,880 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2018-11-23 14:31:27,880 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 14:31:27,880 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 14:31:27,881 INFO L423 AbstractCegarLoop]: === Iteration 6 === [mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2018-11-23 14:31:27,881 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 14:31:27,881 INFO L82 PathProgramCache]: Analyzing trace with hash -179625769, now seen corresponding path program 1 times [2018-11-23 14:31:27,881 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 14:31:27,881 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 14:31:27,882 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 14:31:27,882 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 14:31:27,882 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 14:31:27,885 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 14:31:27,902 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 14:31:27,902 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-23 14:31:27,902 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_5db53c6b-9103-46d2-b960-4341706e456a/bin-2019/uautomizer/z3 Starting monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-23 14:31:27,922 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 14:31:27,929 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 14:31:27,930 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 14:31:27,941 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 14:31:27,959 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 14:31:27,959 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [3, 3] total 3 [2018-11-23 14:31:27,959 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-23 14:31:27,959 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-23 14:31:27,959 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2018-11-23 14:31:27,959 INFO L87 Difference]: Start difference. First operand 19 states and 19 transitions. Second operand 4 states. [2018-11-23 14:31:27,970 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 14:31:27,971 INFO L93 Difference]: Finished difference Result 23 states and 23 transitions. [2018-11-23 14:31:27,971 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-23 14:31:27,971 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 14 [2018-11-23 14:31:27,971 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 14:31:27,971 INFO L225 Difference]: With dead ends: 23 [2018-11-23 14:31:27,971 INFO L226 Difference]: Without dead ends: 22 [2018-11-23 14:31:27,972 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 13 SyntacticMatches, 1 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2018-11-23 14:31:27,972 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22 states. [2018-11-23 14:31:27,973 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22 to 21. [2018-11-23 14:31:27,974 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21 states. [2018-11-23 14:31:27,974 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21 states to 21 states and 21 transitions. [2018-11-23 14:31:27,974 INFO L78 Accepts]: Start accepts. Automaton has 21 states and 21 transitions. Word has length 14 [2018-11-23 14:31:27,974 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 14:31:27,974 INFO L480 AbstractCegarLoop]: Abstraction has 21 states and 21 transitions. [2018-11-23 14:31:27,975 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-23 14:31:27,975 INFO L276 IsEmpty]: Start isEmpty. Operand 21 states and 21 transitions. [2018-11-23 14:31:27,975 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2018-11-23 14:31:27,975 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 14:31:27,975 INFO L402 BasicCegarLoop]: trace histogram [3, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1] [2018-11-23 14:31:27,975 INFO L423 AbstractCegarLoop]: === Iteration 7 === [mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2018-11-23 14:31:27,976 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 14:31:27,976 INFO L82 PathProgramCache]: Analyzing trace with hash 298016926, now seen corresponding path program 2 times [2018-11-23 14:31:27,976 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 14:31:27,976 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 14:31:27,977 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 14:31:27,977 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 14:31:27,977 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 14:31:27,980 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 14:31:28,024 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 9 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 14:31:28,025 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-23 14:31:28,025 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_5db53c6b-9103-46d2-b960-4341706e456a/bin-2019/uautomizer/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-23 14:31:28,039 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-11-23 14:31:28,045 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-11-23 14:31:28,045 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-23 14:31:28,046 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 14:31:28,064 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 9 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 14:31:28,091 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 14:31:28,091 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4] total 4 [2018-11-23 14:31:28,091 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-23 14:31:28,092 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-23 14:31:28,092 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2018-11-23 14:31:28,092 INFO L87 Difference]: Start difference. First operand 21 states and 21 transitions. Second operand 5 states. [2018-11-23 14:31:28,117 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 14:31:28,117 INFO L93 Difference]: Finished difference Result 26 states and 26 transitions. [2018-11-23 14:31:28,117 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-23 14:31:28,118 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 17 [2018-11-23 14:31:28,118 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 14:31:28,118 INFO L225 Difference]: With dead ends: 26 [2018-11-23 14:31:28,118 INFO L226 Difference]: Without dead ends: 25 [2018-11-23 14:31:28,120 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 15 SyntacticMatches, 2 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2018-11-23 14:31:28,120 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25 states. [2018-11-23 14:31:28,124 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25 to 24. [2018-11-23 14:31:28,124 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24 states. [2018-11-23 14:31:28,125 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24 states to 24 states and 24 transitions. [2018-11-23 14:31:28,125 INFO L78 Accepts]: Start accepts. Automaton has 24 states and 24 transitions. Word has length 17 [2018-11-23 14:31:28,125 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 14:31:28,125 INFO L480 AbstractCegarLoop]: Abstraction has 24 states and 24 transitions. [2018-11-23 14:31:28,125 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-23 14:31:28,125 INFO L276 IsEmpty]: Start isEmpty. Operand 24 states and 24 transitions. [2018-11-23 14:31:28,126 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2018-11-23 14:31:28,126 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 14:31:28,126 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1] [2018-11-23 14:31:28,126 INFO L423 AbstractCegarLoop]: === Iteration 8 === [mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2018-11-23 14:31:28,127 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 14:31:28,127 INFO L82 PathProgramCache]: Analyzing trace with hash -1368541440, now seen corresponding path program 2 times [2018-11-23 14:31:28,127 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 14:31:28,127 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 14:31:28,128 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 14:31:28,128 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-23 14:31:28,129 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 14:31:28,136 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 14:31:28,160 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 13 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 14:31:28,160 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-23 14:31:28,160 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_5db53c6b-9103-46d2-b960-4341706e456a/bin-2019/uautomizer/z3 Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-23 14:31:28,168 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-11-23 14:31:28,177 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-11-23 14:31:28,177 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-23 14:31:28,178 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 14:31:28,192 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 13 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 14:31:28,210 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 14:31:28,210 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4] total 4 [2018-11-23 14:31:28,211 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-23 14:31:28,211 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-23 14:31:28,211 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2018-11-23 14:31:28,211 INFO L87 Difference]: Start difference. First operand 24 states and 24 transitions. Second operand 5 states. [2018-11-23 14:31:28,224 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 14:31:28,224 INFO L93 Difference]: Finished difference Result 28 states and 28 transitions. [2018-11-23 14:31:28,224 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-23 14:31:28,224 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 19 [2018-11-23 14:31:28,224 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 14:31:28,225 INFO L225 Difference]: With dead ends: 28 [2018-11-23 14:31:28,225 INFO L226 Difference]: Without dead ends: 27 [2018-11-23 14:31:28,225 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 17 SyntacticMatches, 2 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2018-11-23 14:31:28,226 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27 states. [2018-11-23 14:31:28,228 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27 to 26. [2018-11-23 14:31:28,228 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 26 states. [2018-11-23 14:31:28,229 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26 states to 26 states and 26 transitions. [2018-11-23 14:31:28,229 INFO L78 Accepts]: Start accepts. Automaton has 26 states and 26 transitions. Word has length 19 [2018-11-23 14:31:28,229 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 14:31:28,229 INFO L480 AbstractCegarLoop]: Abstraction has 26 states and 26 transitions. [2018-11-23 14:31:28,229 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-23 14:31:28,230 INFO L276 IsEmpty]: Start isEmpty. Operand 26 states and 26 transitions. [2018-11-23 14:31:28,230 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2018-11-23 14:31:28,230 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 14:31:28,230 INFO L402 BasicCegarLoop]: trace histogram [4, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1] [2018-11-23 14:31:28,230 INFO L423 AbstractCegarLoop]: === Iteration 9 === [mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2018-11-23 14:31:28,231 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 14:31:28,231 INFO L82 PathProgramCache]: Analyzing trace with hash 1906552277, now seen corresponding path program 3 times [2018-11-23 14:31:28,231 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 14:31:28,231 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 14:31:28,232 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 14:31:28,232 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-23 14:31:28,232 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 14:31:28,236 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 14:31:28,265 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 14:31:28,265 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-23 14:31:28,265 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_5db53c6b-9103-46d2-b960-4341706e456a/bin-2019/uautomizer/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-23 14:31:28,281 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-11-23 14:31:28,288 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 4 check-sat command(s) [2018-11-23 14:31:28,288 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-23 14:31:28,289 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 14:31:28,329 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 14:31:28,346 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 14:31:28,347 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 5 [2018-11-23 14:31:28,347 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-23 14:31:28,347 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-23 14:31:28,347 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=15, Unknown=0, NotChecked=0, Total=30 [2018-11-23 14:31:28,347 INFO L87 Difference]: Start difference. First operand 26 states and 26 transitions. Second operand 6 states. [2018-11-23 14:31:28,364 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 14:31:28,364 INFO L93 Difference]: Finished difference Result 31 states and 31 transitions. [2018-11-23 14:31:28,364 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-11-23 14:31:28,364 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 22 [2018-11-23 14:31:28,365 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 14:31:28,365 INFO L225 Difference]: With dead ends: 31 [2018-11-23 14:31:28,365 INFO L226 Difference]: Without dead ends: 30 [2018-11-23 14:31:28,365 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 19 SyntacticMatches, 3 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=15, Unknown=0, NotChecked=0, Total=30 [2018-11-23 14:31:28,366 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30 states. [2018-11-23 14:31:28,368 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30 to 29. [2018-11-23 14:31:28,368 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 29 states. [2018-11-23 14:31:28,368 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29 states to 29 states and 29 transitions. [2018-11-23 14:31:28,368 INFO L78 Accepts]: Start accepts. Automaton has 29 states and 29 transitions. Word has length 22 [2018-11-23 14:31:28,369 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 14:31:28,369 INFO L480 AbstractCegarLoop]: Abstraction has 29 states and 29 transitions. [2018-11-23 14:31:28,369 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-23 14:31:28,369 INFO L276 IsEmpty]: Start isEmpty. Operand 29 states and 29 transitions. [2018-11-23 14:31:28,369 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2018-11-23 14:31:28,369 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 14:31:28,370 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 4, 3, 3, 1, 1, 1, 1, 1, 1] [2018-11-23 14:31:28,370 INFO L423 AbstractCegarLoop]: === Iteration 10 === [mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2018-11-23 14:31:28,370 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 14:31:28,370 INFO L82 PathProgramCache]: Analyzing trace with hash -1754295689, now seen corresponding path program 3 times [2018-11-23 14:31:28,370 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 14:31:28,370 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 14:31:28,371 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 14:31:28,371 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-23 14:31:28,371 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 14:31:28,376 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 14:31:28,407 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 0 proven. 27 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 14:31:28,407 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-23 14:31:28,407 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_5db53c6b-9103-46d2-b960-4341706e456a/bin-2019/uautomizer/z3 Starting monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-23 14:31:28,413 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-11-23 14:31:28,420 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 4 check-sat command(s) [2018-11-23 14:31:28,420 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-23 14:31:28,422 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 14:31:28,450 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 0 proven. 27 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 14:31:28,468 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 14:31:28,468 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 5 [2018-11-23 14:31:28,469 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-23 14:31:28,469 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-23 14:31:28,469 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=15, Unknown=0, NotChecked=0, Total=30 [2018-11-23 14:31:28,469 INFO L87 Difference]: Start difference. First operand 29 states and 29 transitions. Second operand 6 states. [2018-11-23 14:31:28,505 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 14:31:28,505 INFO L93 Difference]: Finished difference Result 33 states and 33 transitions. [2018-11-23 14:31:28,506 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-11-23 14:31:28,506 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 24 [2018-11-23 14:31:28,506 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 14:31:28,506 INFO L225 Difference]: With dead ends: 33 [2018-11-23 14:31:28,506 INFO L226 Difference]: Without dead ends: 32 [2018-11-23 14:31:28,507 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 28 GetRequests, 21 SyntacticMatches, 3 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=15, Unknown=0, NotChecked=0, Total=30 [2018-11-23 14:31:28,507 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32 states. [2018-11-23 14:31:28,509 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32 to 31. [2018-11-23 14:31:28,509 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 31 states. [2018-11-23 14:31:28,510 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 31 states to 31 states and 31 transitions. [2018-11-23 14:31:28,510 INFO L78 Accepts]: Start accepts. Automaton has 31 states and 31 transitions. Word has length 24 [2018-11-23 14:31:28,510 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 14:31:28,511 INFO L480 AbstractCegarLoop]: Abstraction has 31 states and 31 transitions. [2018-11-23 14:31:28,511 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-23 14:31:28,511 INFO L276 IsEmpty]: Start isEmpty. Operand 31 states and 31 transitions. [2018-11-23 14:31:28,511 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2018-11-23 14:31:28,511 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 14:31:28,512 INFO L402 BasicCegarLoop]: trace histogram [5, 4, 4, 4, 4, 1, 1, 1, 1, 1, 1] [2018-11-23 14:31:28,512 INFO L423 AbstractCegarLoop]: === Iteration 11 === [mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2018-11-23 14:31:28,512 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 14:31:28,512 INFO L82 PathProgramCache]: Analyzing trace with hash -1060762882, now seen corresponding path program 4 times [2018-11-23 14:31:28,513 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 14:31:28,513 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 14:31:28,514 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 14:31:28,514 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-23 14:31:28,514 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 14:31:28,521 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 14:31:28,576 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 0 proven. 38 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 14:31:28,576 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-23 14:31:28,576 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_5db53c6b-9103-46d2-b960-4341706e456a/bin-2019/uautomizer/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-23 14:31:28,586 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-11-23 14:31:28,595 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-11-23 14:31:28,596 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-23 14:31:28,598 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 14:31:28,636 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 0 proven. 38 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 14:31:28,660 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 14:31:28,660 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6] total 6 [2018-11-23 14:31:28,661 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-11-23 14:31:28,661 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-11-23 14:31:28,661 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=21, Unknown=0, NotChecked=0, Total=42 [2018-11-23 14:31:28,661 INFO L87 Difference]: Start difference. First operand 31 states and 31 transitions. Second operand 7 states. [2018-11-23 14:31:28,690 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 14:31:28,690 INFO L93 Difference]: Finished difference Result 36 states and 36 transitions. [2018-11-23 14:31:28,691 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-23 14:31:28,691 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 27 [2018-11-23 14:31:28,691 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 14:31:28,692 INFO L225 Difference]: With dead ends: 36 [2018-11-23 14:31:28,692 INFO L226 Difference]: Without dead ends: 35 [2018-11-23 14:31:28,692 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 32 GetRequests, 23 SyntacticMatches, 4 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=21, Unknown=0, NotChecked=0, Total=42 [2018-11-23 14:31:28,692 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 35 states. [2018-11-23 14:31:28,694 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 35 to 34. [2018-11-23 14:31:28,694 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 34 states. [2018-11-23 14:31:28,695 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34 states to 34 states and 34 transitions. [2018-11-23 14:31:28,697 INFO L78 Accepts]: Start accepts. Automaton has 34 states and 34 transitions. Word has length 27 [2018-11-23 14:31:28,697 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 14:31:28,698 INFO L480 AbstractCegarLoop]: Abstraction has 34 states and 34 transitions. [2018-11-23 14:31:28,698 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-11-23 14:31:28,698 INFO L276 IsEmpty]: Start isEmpty. Operand 34 states and 34 transitions. [2018-11-23 14:31:28,698 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-11-23 14:31:28,698 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 14:31:28,699 INFO L402 BasicCegarLoop]: trace histogram [5, 5, 5, 4, 4, 1, 1, 1, 1, 1, 1] [2018-11-23 14:31:28,699 INFO L423 AbstractCegarLoop]: === Iteration 12 === [mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2018-11-23 14:31:28,699 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 14:31:28,699 INFO L82 PathProgramCache]: Analyzing trace with hash -1485878944, now seen corresponding path program 4 times [2018-11-23 14:31:28,699 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 14:31:28,700 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 14:31:28,701 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 14:31:28,701 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-23 14:31:28,701 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 14:31:28,708 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 14:31:28,754 INFO L134 CoverageAnalysis]: Checked inductivity of 46 backedges. 0 proven. 46 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 14:31:28,755 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-23 14:31:28,755 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_5db53c6b-9103-46d2-b960-4341706e456a/bin-2019/uautomizer/z3 Starting monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-23 14:31:28,773 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-11-23 14:31:28,803 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-11-23 14:31:28,804 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-23 14:31:28,805 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 14:31:28,848 INFO L134 CoverageAnalysis]: Checked inductivity of 46 backedges. 0 proven. 46 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 14:31:28,865 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 14:31:28,865 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6] total 6 [2018-11-23 14:31:28,865 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-11-23 14:31:28,866 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-11-23 14:31:28,866 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=21, Unknown=0, NotChecked=0, Total=42 [2018-11-23 14:31:28,866 INFO L87 Difference]: Start difference. First operand 34 states and 34 transitions. Second operand 7 states. [2018-11-23 14:31:28,888 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 14:31:28,889 INFO L93 Difference]: Finished difference Result 38 states and 38 transitions. [2018-11-23 14:31:28,889 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-23 14:31:28,889 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 29 [2018-11-23 14:31:28,890 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 14:31:28,890 INFO L225 Difference]: With dead ends: 38 [2018-11-23 14:31:28,890 INFO L226 Difference]: Without dead ends: 37 [2018-11-23 14:31:28,891 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 34 GetRequests, 25 SyntacticMatches, 4 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=21, Unknown=0, NotChecked=0, Total=42 [2018-11-23 14:31:28,891 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 37 states. [2018-11-23 14:31:28,894 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 37 to 36. [2018-11-23 14:31:28,894 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 36 states. [2018-11-23 14:31:28,895 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 36 states to 36 states and 36 transitions. [2018-11-23 14:31:28,895 INFO L78 Accepts]: Start accepts. Automaton has 36 states and 36 transitions. Word has length 29 [2018-11-23 14:31:28,895 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 14:31:28,895 INFO L480 AbstractCegarLoop]: Abstraction has 36 states and 36 transitions. [2018-11-23 14:31:28,895 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-11-23 14:31:28,895 INFO L276 IsEmpty]: Start isEmpty. Operand 36 states and 36 transitions. [2018-11-23 14:31:28,896 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-11-23 14:31:28,896 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 14:31:28,896 INFO L402 BasicCegarLoop]: trace histogram [6, 5, 5, 5, 5, 1, 1, 1, 1, 1, 1] [2018-11-23 14:31:28,897 INFO L423 AbstractCegarLoop]: === Iteration 13 === [mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2018-11-23 14:31:28,897 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 14:31:28,897 INFO L82 PathProgramCache]: Analyzing trace with hash -1886617739, now seen corresponding path program 5 times [2018-11-23 14:31:28,897 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 14:31:28,897 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 14:31:28,898 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 14:31:28,898 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-23 14:31:28,898 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 14:31:28,902 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 14:31:28,955 INFO L134 CoverageAnalysis]: Checked inductivity of 60 backedges. 0 proven. 60 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 14:31:28,955 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-23 14:31:28,955 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_5db53c6b-9103-46d2-b960-4341706e456a/bin-2019/uautomizer/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-23 14:31:28,962 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-11-23 14:31:28,973 INFO L249 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 6 check-sat command(s) [2018-11-23 14:31:28,973 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-23 14:31:28,974 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 14:31:29,012 INFO L134 CoverageAnalysis]: Checked inductivity of 60 backedges. 0 proven. 60 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 14:31:29,027 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 14:31:29,027 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 7 [2018-11-23 14:31:29,028 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-11-23 14:31:29,028 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-11-23 14:31:29,028 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=28, Invalid=28, Unknown=0, NotChecked=0, Total=56 [2018-11-23 14:31:29,028 INFO L87 Difference]: Start difference. First operand 36 states and 36 transitions. Second operand 8 states. [2018-11-23 14:31:29,056 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 14:31:29,056 INFO L93 Difference]: Finished difference Result 41 states and 41 transitions. [2018-11-23 14:31:29,056 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-11-23 14:31:29,056 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 32 [2018-11-23 14:31:29,057 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 14:31:29,057 INFO L225 Difference]: With dead ends: 41 [2018-11-23 14:31:29,057 INFO L226 Difference]: Without dead ends: 40 [2018-11-23 14:31:29,057 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 38 GetRequests, 27 SyntacticMatches, 5 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=28, Invalid=28, Unknown=0, NotChecked=0, Total=56 [2018-11-23 14:31:29,058 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 40 states. [2018-11-23 14:31:29,060 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 40 to 39. [2018-11-23 14:31:29,060 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 39 states. [2018-11-23 14:31:29,060 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39 states to 39 states and 39 transitions. [2018-11-23 14:31:29,060 INFO L78 Accepts]: Start accepts. Automaton has 39 states and 39 transitions. Word has length 32 [2018-11-23 14:31:29,060 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 14:31:29,061 INFO L480 AbstractCegarLoop]: Abstraction has 39 states and 39 transitions. [2018-11-23 14:31:29,061 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-11-23 14:31:29,061 INFO L276 IsEmpty]: Start isEmpty. Operand 39 states and 39 transitions. [2018-11-23 14:31:29,061 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-11-23 14:31:29,061 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 14:31:29,061 INFO L402 BasicCegarLoop]: trace histogram [6, 6, 6, 5, 5, 1, 1, 1, 1, 1, 1] [2018-11-23 14:31:29,061 INFO L423 AbstractCegarLoop]: === Iteration 14 === [mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2018-11-23 14:31:29,061 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 14:31:29,062 INFO L82 PathProgramCache]: Analyzing trace with hash -563446761, now seen corresponding path program 5 times [2018-11-23 14:31:29,062 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 14:31:29,062 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 14:31:29,062 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 14:31:29,062 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-23 14:31:29,063 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 14:31:29,066 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 14:31:29,116 INFO L134 CoverageAnalysis]: Checked inductivity of 70 backedges. 0 proven. 70 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 14:31:29,116 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-23 14:31:29,116 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_5db53c6b-9103-46d2-b960-4341706e456a/bin-2019/uautomizer/z3 Starting monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-23 14:31:29,123 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-11-23 14:31:29,145 INFO L249 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 6 check-sat command(s) [2018-11-23 14:31:29,145 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-23 14:31:29,147 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 14:31:29,182 INFO L134 CoverageAnalysis]: Checked inductivity of 70 backedges. 0 proven. 70 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 14:31:29,198 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 14:31:29,198 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 7 [2018-11-23 14:31:29,199 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-11-23 14:31:29,199 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-11-23 14:31:29,199 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=28, Invalid=28, Unknown=0, NotChecked=0, Total=56 [2018-11-23 14:31:29,199 INFO L87 Difference]: Start difference. First operand 39 states and 39 transitions. Second operand 8 states. [2018-11-23 14:31:29,231 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 14:31:29,231 INFO L93 Difference]: Finished difference Result 43 states and 43 transitions. [2018-11-23 14:31:29,231 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-11-23 14:31:29,231 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 34 [2018-11-23 14:31:29,231 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 14:31:29,231 INFO L225 Difference]: With dead ends: 43 [2018-11-23 14:31:29,232 INFO L226 Difference]: Without dead ends: 42 [2018-11-23 14:31:29,232 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 40 GetRequests, 29 SyntacticMatches, 5 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=28, Invalid=28, Unknown=0, NotChecked=0, Total=56 [2018-11-23 14:31:29,232 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 42 states. [2018-11-23 14:31:29,235 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 42 to 41. [2018-11-23 14:31:29,235 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 41 states. [2018-11-23 14:31:29,235 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 41 states to 41 states and 41 transitions. [2018-11-23 14:31:29,235 INFO L78 Accepts]: Start accepts. Automaton has 41 states and 41 transitions. Word has length 34 [2018-11-23 14:31:29,236 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 14:31:29,236 INFO L480 AbstractCegarLoop]: Abstraction has 41 states and 41 transitions. [2018-11-23 14:31:29,236 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-11-23 14:31:29,236 INFO L276 IsEmpty]: Start isEmpty. Operand 41 states and 41 transitions. [2018-11-23 14:31:29,236 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2018-11-23 14:31:29,236 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 14:31:29,236 INFO L402 BasicCegarLoop]: trace histogram [7, 6, 6, 6, 6, 1, 1, 1, 1, 1, 1] [2018-11-23 14:31:29,237 INFO L423 AbstractCegarLoop]: === Iteration 15 === [mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2018-11-23 14:31:29,237 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 14:31:29,237 INFO L82 PathProgramCache]: Analyzing trace with hash -910213794, now seen corresponding path program 6 times [2018-11-23 14:31:29,237 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 14:31:29,237 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 14:31:29,238 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 14:31:29,238 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-23 14:31:29,238 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 14:31:29,243 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 14:31:29,304 INFO L134 CoverageAnalysis]: Checked inductivity of 87 backedges. 0 proven. 87 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 14:31:29,304 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-23 14:31:29,304 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_5db53c6b-9103-46d2-b960-4341706e456a/bin-2019/uautomizer/z3 Starting monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-23 14:31:29,315 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-11-23 14:31:29,327 INFO L249 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 7 check-sat command(s) [2018-11-23 14:31:29,327 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-23 14:31:29,329 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 14:31:29,391 INFO L134 CoverageAnalysis]: Checked inductivity of 87 backedges. 0 proven. 87 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 14:31:29,410 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 14:31:29,410 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8] total 8 [2018-11-23 14:31:29,410 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-11-23 14:31:29,410 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-11-23 14:31:29,410 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=36, Invalid=36, Unknown=0, NotChecked=0, Total=72 [2018-11-23 14:31:29,411 INFO L87 Difference]: Start difference. First operand 41 states and 41 transitions. Second operand 9 states. [2018-11-23 14:31:29,440 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 14:31:29,440 INFO L93 Difference]: Finished difference Result 46 states and 46 transitions. [2018-11-23 14:31:29,440 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-11-23 14:31:29,440 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 37 [2018-11-23 14:31:29,441 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 14:31:29,441 INFO L225 Difference]: With dead ends: 46 [2018-11-23 14:31:29,441 INFO L226 Difference]: Without dead ends: 45 [2018-11-23 14:31:29,442 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 44 GetRequests, 31 SyntacticMatches, 6 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=36, Invalid=36, Unknown=0, NotChecked=0, Total=72 [2018-11-23 14:31:29,442 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 45 states. [2018-11-23 14:31:29,444 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 45 to 44. [2018-11-23 14:31:29,444 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 44 states. [2018-11-23 14:31:29,445 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 44 states to 44 states and 44 transitions. [2018-11-23 14:31:29,445 INFO L78 Accepts]: Start accepts. Automaton has 44 states and 44 transitions. Word has length 37 [2018-11-23 14:31:29,445 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 14:31:29,445 INFO L480 AbstractCegarLoop]: Abstraction has 44 states and 44 transitions. [2018-11-23 14:31:29,446 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-11-23 14:31:29,446 INFO L276 IsEmpty]: Start isEmpty. Operand 44 states and 44 transitions. [2018-11-23 14:31:29,446 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2018-11-23 14:31:29,447 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 14:31:29,447 INFO L402 BasicCegarLoop]: trace histogram [7, 7, 7, 6, 6, 1, 1, 1, 1, 1, 1] [2018-11-23 14:31:29,447 INFO L423 AbstractCegarLoop]: === Iteration 16 === [mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2018-11-23 14:31:29,447 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 14:31:29,447 INFO L82 PathProgramCache]: Analyzing trace with hash 1457873856, now seen corresponding path program 6 times [2018-11-23 14:31:29,448 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 14:31:29,448 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 14:31:29,449 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 14:31:29,449 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-23 14:31:29,449 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 14:31:29,455 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 14:31:29,508 INFO L134 CoverageAnalysis]: Checked inductivity of 99 backedges. 0 proven. 99 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 14:31:29,509 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-23 14:31:29,509 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_5db53c6b-9103-46d2-b960-4341706e456a/bin-2019/uautomizer/z3 Starting monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-23 14:31:29,516 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-11-23 14:31:29,543 INFO L249 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 7 check-sat command(s) [2018-11-23 14:31:29,544 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-23 14:31:29,546 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 14:31:29,602 INFO L134 CoverageAnalysis]: Checked inductivity of 99 backedges. 0 proven. 99 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 14:31:29,619 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 14:31:29,619 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8] total 8 [2018-11-23 14:31:29,620 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-11-23 14:31:29,620 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-11-23 14:31:29,620 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=36, Invalid=36, Unknown=0, NotChecked=0, Total=72 [2018-11-23 14:31:29,620 INFO L87 Difference]: Start difference. First operand 44 states and 44 transitions. Second operand 9 states. [2018-11-23 14:31:29,641 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 14:31:29,641 INFO L93 Difference]: Finished difference Result 48 states and 48 transitions. [2018-11-23 14:31:29,641 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-11-23 14:31:29,641 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 39 [2018-11-23 14:31:29,641 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 14:31:29,641 INFO L225 Difference]: With dead ends: 48 [2018-11-23 14:31:29,641 INFO L226 Difference]: Without dead ends: 47 [2018-11-23 14:31:29,642 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 46 GetRequests, 33 SyntacticMatches, 6 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=36, Invalid=36, Unknown=0, NotChecked=0, Total=72 [2018-11-23 14:31:29,642 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 47 states. [2018-11-23 14:31:29,644 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 47 to 46. [2018-11-23 14:31:29,644 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 46 states. [2018-11-23 14:31:29,644 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 46 states to 46 states and 46 transitions. [2018-11-23 14:31:29,644 INFO L78 Accepts]: Start accepts. Automaton has 46 states and 46 transitions. Word has length 39 [2018-11-23 14:31:29,644 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 14:31:29,644 INFO L480 AbstractCegarLoop]: Abstraction has 46 states and 46 transitions. [2018-11-23 14:31:29,645 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-11-23 14:31:29,645 INFO L276 IsEmpty]: Start isEmpty. Operand 46 states and 46 transitions. [2018-11-23 14:31:29,645 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-11-23 14:31:29,645 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 14:31:29,645 INFO L402 BasicCegarLoop]: trace histogram [8, 7, 7, 7, 7, 1, 1, 1, 1, 1, 1] [2018-11-23 14:31:29,646 INFO L423 AbstractCegarLoop]: === Iteration 17 === [mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2018-11-23 14:31:29,646 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 14:31:29,646 INFO L82 PathProgramCache]: Analyzing trace with hash 810797333, now seen corresponding path program 7 times [2018-11-23 14:31:29,646 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 14:31:29,646 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 14:31:29,647 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 14:31:29,647 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-23 14:31:29,647 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 14:31:29,652 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 14:31:29,707 INFO L134 CoverageAnalysis]: Checked inductivity of 119 backedges. 0 proven. 119 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 14:31:29,708 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-23 14:31:29,708 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_5db53c6b-9103-46d2-b960-4341706e456a/bin-2019/uautomizer/z3 Starting monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-23 14:31:29,715 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 14:31:29,722 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 14:31:29,724 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 14:31:29,834 INFO L134 CoverageAnalysis]: Checked inductivity of 119 backedges. 0 proven. 119 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 14:31:29,850 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 14:31:29,851 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9] total 9 [2018-11-23 14:31:29,851 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-11-23 14:31:29,851 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-11-23 14:31:29,851 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=45, Invalid=45, Unknown=0, NotChecked=0, Total=90 [2018-11-23 14:31:29,851 INFO L87 Difference]: Start difference. First operand 46 states and 46 transitions. Second operand 10 states. [2018-11-23 14:31:29,885 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 14:31:29,885 INFO L93 Difference]: Finished difference Result 51 states and 51 transitions. [2018-11-23 14:31:29,885 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-11-23 14:31:29,885 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 42 [2018-11-23 14:31:29,885 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 14:31:29,886 INFO L225 Difference]: With dead ends: 51 [2018-11-23 14:31:29,886 INFO L226 Difference]: Without dead ends: 50 [2018-11-23 14:31:29,886 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 50 GetRequests, 35 SyntacticMatches, 7 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 21 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=45, Invalid=45, Unknown=0, NotChecked=0, Total=90 [2018-11-23 14:31:29,886 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 50 states. [2018-11-23 14:31:29,889 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 50 to 49. [2018-11-23 14:31:29,889 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 49 states. [2018-11-23 14:31:29,890 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 49 states to 49 states and 49 transitions. [2018-11-23 14:31:29,890 INFO L78 Accepts]: Start accepts. Automaton has 49 states and 49 transitions. Word has length 42 [2018-11-23 14:31:29,890 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 14:31:29,891 INFO L480 AbstractCegarLoop]: Abstraction has 49 states and 49 transitions. [2018-11-23 14:31:29,891 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-11-23 14:31:29,891 INFO L276 IsEmpty]: Start isEmpty. Operand 49 states and 49 transitions. [2018-11-23 14:31:29,891 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2018-11-23 14:31:29,891 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 14:31:29,891 INFO L402 BasicCegarLoop]: trace histogram [8, 8, 8, 7, 7, 1, 1, 1, 1, 1, 1] [2018-11-23 14:31:29,892 INFO L423 AbstractCegarLoop]: === Iteration 18 === [mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2018-11-23 14:31:29,892 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 14:31:29,892 INFO L82 PathProgramCache]: Analyzing trace with hash 1787157943, now seen corresponding path program 7 times [2018-11-23 14:31:29,892 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 14:31:29,892 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 14:31:29,893 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 14:31:29,893 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 14:31:29,893 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 14:31:29,898 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 14:31:29,962 INFO L134 CoverageAnalysis]: Checked inductivity of 133 backedges. 0 proven. 133 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 14:31:29,962 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-23 14:31:29,962 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_5db53c6b-9103-46d2-b960-4341706e456a/bin-2019/uautomizer/z3 Starting monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-23 14:31:29,975 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 14:31:29,986 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 14:31:29,988 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 14:31:30,054 INFO L134 CoverageAnalysis]: Checked inductivity of 133 backedges. 0 proven. 133 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 14:31:30,072 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 14:31:30,073 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9] total 9 [2018-11-23 14:31:30,073 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-11-23 14:31:30,073 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-11-23 14:31:30,073 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=45, Invalid=45, Unknown=0, NotChecked=0, Total=90 [2018-11-23 14:31:30,073 INFO L87 Difference]: Start difference. First operand 49 states and 49 transitions. Second operand 10 states. [2018-11-23 14:31:30,096 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 14:31:30,097 INFO L93 Difference]: Finished difference Result 53 states and 53 transitions. [2018-11-23 14:31:30,097 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-11-23 14:31:30,097 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 44 [2018-11-23 14:31:30,097 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 14:31:30,098 INFO L225 Difference]: With dead ends: 53 [2018-11-23 14:31:30,098 INFO L226 Difference]: Without dead ends: 52 [2018-11-23 14:31:30,098 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 52 GetRequests, 37 SyntacticMatches, 7 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 21 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=45, Invalid=45, Unknown=0, NotChecked=0, Total=90 [2018-11-23 14:31:30,098 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 52 states. [2018-11-23 14:31:30,102 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 52 to 51. [2018-11-23 14:31:30,102 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 51 states. [2018-11-23 14:31:30,103 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 51 states to 51 states and 51 transitions. [2018-11-23 14:31:30,103 INFO L78 Accepts]: Start accepts. Automaton has 51 states and 51 transitions. Word has length 44 [2018-11-23 14:31:30,103 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 14:31:30,103 INFO L480 AbstractCegarLoop]: Abstraction has 51 states and 51 transitions. [2018-11-23 14:31:30,103 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-11-23 14:31:30,103 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 51 transitions. [2018-11-23 14:31:30,104 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-11-23 14:31:30,104 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 14:31:30,104 INFO L402 BasicCegarLoop]: trace histogram [9, 8, 8, 8, 8, 1, 1, 1, 1, 1, 1] [2018-11-23 14:31:30,104 INFO L423 AbstractCegarLoop]: === Iteration 19 === [mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2018-11-23 14:31:30,104 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 14:31:30,105 INFO L82 PathProgramCache]: Analyzing trace with hash 807729086, now seen corresponding path program 8 times [2018-11-23 14:31:30,105 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 14:31:30,105 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 14:31:30,106 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 14:31:30,106 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 14:31:30,106 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 14:31:30,111 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 14:31:30,184 INFO L134 CoverageAnalysis]: Checked inductivity of 156 backedges. 0 proven. 156 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 14:31:30,184 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-23 14:31:30,185 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_5db53c6b-9103-46d2-b960-4341706e456a/bin-2019/uautomizer/z3 Starting monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-23 14:31:30,194 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-11-23 14:31:30,206 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-11-23 14:31:30,206 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-23 14:31:30,208 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 14:31:30,304 INFO L134 CoverageAnalysis]: Checked inductivity of 156 backedges. 0 proven. 156 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 14:31:30,333 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 14:31:30,333 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10] total 10 [2018-11-23 14:31:30,333 INFO L459 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-11-23 14:31:30,333 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-11-23 14:31:30,334 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=55, Invalid=55, Unknown=0, NotChecked=0, Total=110 [2018-11-23 14:31:30,334 INFO L87 Difference]: Start difference. First operand 51 states and 51 transitions. Second operand 11 states. [2018-11-23 14:31:30,373 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 14:31:30,374 INFO L93 Difference]: Finished difference Result 56 states and 56 transitions. [2018-11-23 14:31:30,374 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-11-23 14:31:30,374 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 47 [2018-11-23 14:31:30,374 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 14:31:30,375 INFO L225 Difference]: With dead ends: 56 [2018-11-23 14:31:30,375 INFO L226 Difference]: Without dead ends: 55 [2018-11-23 14:31:30,375 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 56 GetRequests, 39 SyntacticMatches, 8 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 28 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=55, Invalid=55, Unknown=0, NotChecked=0, Total=110 [2018-11-23 14:31:30,375 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 55 states. [2018-11-23 14:31:30,378 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 55 to 54. [2018-11-23 14:31:30,378 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 54 states. [2018-11-23 14:31:30,378 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 54 states to 54 states and 54 transitions. [2018-11-23 14:31:30,379 INFO L78 Accepts]: Start accepts. Automaton has 54 states and 54 transitions. Word has length 47 [2018-11-23 14:31:30,379 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 14:31:30,379 INFO L480 AbstractCegarLoop]: Abstraction has 54 states and 54 transitions. [2018-11-23 14:31:30,379 INFO L481 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-11-23 14:31:30,379 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 54 transitions. [2018-11-23 14:31:30,380 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2018-11-23 14:31:30,380 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 14:31:30,380 INFO L402 BasicCegarLoop]: trace histogram [9, 9, 9, 8, 8, 1, 1, 1, 1, 1, 1] [2018-11-23 14:31:30,381 INFO L423 AbstractCegarLoop]: === Iteration 20 === [mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2018-11-23 14:31:30,381 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 14:31:30,381 INFO L82 PathProgramCache]: Analyzing trace with hash -1161427424, now seen corresponding path program 8 times [2018-11-23 14:31:30,381 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 14:31:30,381 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 14:31:30,382 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 14:31:30,382 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-23 14:31:30,382 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 14:31:30,390 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 14:31:30,452 INFO L134 CoverageAnalysis]: Checked inductivity of 172 backedges. 0 proven. 172 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 14:31:30,452 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-23 14:31:30,452 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_5db53c6b-9103-46d2-b960-4341706e456a/bin-2019/uautomizer/z3 Starting monitored process 17 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 17 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-23 14:31:30,460 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-11-23 14:31:30,477 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-11-23 14:31:30,477 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-23 14:31:30,479 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 14:31:30,563 INFO L134 CoverageAnalysis]: Checked inductivity of 172 backedges. 0 proven. 172 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 14:31:30,581 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 14:31:30,581 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10] total 10 [2018-11-23 14:31:30,582 INFO L459 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-11-23 14:31:30,582 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-11-23 14:31:30,582 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=55, Invalid=55, Unknown=0, NotChecked=0, Total=110 [2018-11-23 14:31:30,582 INFO L87 Difference]: Start difference. First operand 54 states and 54 transitions. Second operand 11 states. [2018-11-23 14:31:30,609 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 14:31:30,609 INFO L93 Difference]: Finished difference Result 58 states and 58 transitions. [2018-11-23 14:31:30,609 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-11-23 14:31:30,609 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 49 [2018-11-23 14:31:30,610 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 14:31:30,610 INFO L225 Difference]: With dead ends: 58 [2018-11-23 14:31:30,610 INFO L226 Difference]: Without dead ends: 57 [2018-11-23 14:31:30,610 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 58 GetRequests, 41 SyntacticMatches, 8 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 28 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=55, Invalid=55, Unknown=0, NotChecked=0, Total=110 [2018-11-23 14:31:30,610 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 57 states. [2018-11-23 14:31:30,613 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 57 to 56. [2018-11-23 14:31:30,613 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 56 states. [2018-11-23 14:31:30,614 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 56 states to 56 states and 56 transitions. [2018-11-23 14:31:30,614 INFO L78 Accepts]: Start accepts. Automaton has 56 states and 56 transitions. Word has length 49 [2018-11-23 14:31:30,614 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 14:31:30,614 INFO L480 AbstractCegarLoop]: Abstraction has 56 states and 56 transitions. [2018-11-23 14:31:30,614 INFO L481 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-11-23 14:31:30,615 INFO L276 IsEmpty]: Start isEmpty. Operand 56 states and 56 transitions. [2018-11-23 14:31:30,615 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2018-11-23 14:31:30,615 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 14:31:30,615 INFO L402 BasicCegarLoop]: trace histogram [10, 9, 9, 9, 9, 1, 1, 1, 1, 1, 1] [2018-11-23 14:31:30,616 INFO L423 AbstractCegarLoop]: === Iteration 21 === [mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2018-11-23 14:31:30,616 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 14:31:30,616 INFO L82 PathProgramCache]: Analyzing trace with hash 172198581, now seen corresponding path program 9 times [2018-11-23 14:31:30,616 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 14:31:30,616 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 14:31:30,617 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 14:31:30,617 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-23 14:31:30,617 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 14:31:30,622 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 14:31:30,687 INFO L134 CoverageAnalysis]: Checked inductivity of 198 backedges. 0 proven. 198 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 14:31:30,687 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-23 14:31:30,687 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_5db53c6b-9103-46d2-b960-4341706e456a/bin-2019/uautomizer/z3 Starting monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-23 14:31:30,695 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-11-23 14:31:30,705 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 10 check-sat command(s) [2018-11-23 14:31:30,705 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-23 14:31:30,707 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 14:31:30,810 INFO L134 CoverageAnalysis]: Checked inductivity of 198 backedges. 0 proven. 198 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 14:31:30,827 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 14:31:30,827 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11] total 11 [2018-11-23 14:31:30,828 INFO L459 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-11-23 14:31:30,828 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-11-23 14:31:30,828 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=66, Invalid=66, Unknown=0, NotChecked=0, Total=132 [2018-11-23 14:31:30,828 INFO L87 Difference]: Start difference. First operand 56 states and 56 transitions. Second operand 12 states. [2018-11-23 14:31:30,857 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 14:31:30,858 INFO L93 Difference]: Finished difference Result 61 states and 61 transitions. [2018-11-23 14:31:30,858 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-11-23 14:31:30,859 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 52 [2018-11-23 14:31:30,859 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 14:31:30,859 INFO L225 Difference]: With dead ends: 61 [2018-11-23 14:31:30,859 INFO L226 Difference]: Without dead ends: 60 [2018-11-23 14:31:30,860 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 62 GetRequests, 43 SyntacticMatches, 9 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 36 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=66, Invalid=66, Unknown=0, NotChecked=0, Total=132 [2018-11-23 14:31:30,860 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 60 states. [2018-11-23 14:31:30,863 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 60 to 59. [2018-11-23 14:31:30,863 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 59 states. [2018-11-23 14:31:30,863 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 59 states to 59 states and 59 transitions. [2018-11-23 14:31:30,863 INFO L78 Accepts]: Start accepts. Automaton has 59 states and 59 transitions. Word has length 52 [2018-11-23 14:31:30,864 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 14:31:30,864 INFO L480 AbstractCegarLoop]: Abstraction has 59 states and 59 transitions. [2018-11-23 14:31:30,864 INFO L481 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-11-23 14:31:30,864 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 59 transitions. [2018-11-23 14:31:30,864 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2018-11-23 14:31:30,865 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 14:31:30,865 INFO L402 BasicCegarLoop]: trace histogram [10, 10, 10, 9, 9, 1, 1, 1, 1, 1, 1] [2018-11-23 14:31:30,865 INFO L423 AbstractCegarLoop]: === Iteration 22 === [mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2018-11-23 14:31:30,865 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 14:31:30,865 INFO L82 PathProgramCache]: Analyzing trace with hash -2020886697, now seen corresponding path program 9 times [2018-11-23 14:31:30,865 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 14:31:30,865 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 14:31:30,866 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 14:31:30,866 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-23 14:31:30,866 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 14:31:30,871 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 14:31:30,948 INFO L134 CoverageAnalysis]: Checked inductivity of 216 backedges. 0 proven. 216 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 14:31:30,949 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-23 14:31:30,949 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_5db53c6b-9103-46d2-b960-4341706e456a/bin-2019/uautomizer/z3 Starting monitored process 19 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 19 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-23 14:31:30,958 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-11-23 14:31:30,982 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 10 check-sat command(s) [2018-11-23 14:31:30,982 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-23 14:31:30,984 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 14:31:31,068 INFO L134 CoverageAnalysis]: Checked inductivity of 216 backedges. 0 proven. 216 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 14:31:31,085 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 14:31:31,085 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11] total 11 [2018-11-23 14:31:31,085 INFO L459 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-11-23 14:31:31,085 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-11-23 14:31:31,086 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=66, Invalid=66, Unknown=0, NotChecked=0, Total=132 [2018-11-23 14:31:31,086 INFO L87 Difference]: Start difference. First operand 59 states and 59 transitions. Second operand 12 states. [2018-11-23 14:31:31,113 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 14:31:31,113 INFO L93 Difference]: Finished difference Result 63 states and 63 transitions. [2018-11-23 14:31:31,114 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-11-23 14:31:31,114 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 54 [2018-11-23 14:31:31,114 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 14:31:31,115 INFO L225 Difference]: With dead ends: 63 [2018-11-23 14:31:31,115 INFO L226 Difference]: Without dead ends: 62 [2018-11-23 14:31:31,115 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 64 GetRequests, 45 SyntacticMatches, 9 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 36 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=66, Invalid=66, Unknown=0, NotChecked=0, Total=132 [2018-11-23 14:31:31,115 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 62 states. [2018-11-23 14:31:31,118 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 62 to 61. [2018-11-23 14:31:31,118 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 61 states. [2018-11-23 14:31:31,119 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 61 states to 61 states and 61 transitions. [2018-11-23 14:31:31,119 INFO L78 Accepts]: Start accepts. Automaton has 61 states and 61 transitions. Word has length 54 [2018-11-23 14:31:31,119 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 14:31:31,119 INFO L480 AbstractCegarLoop]: Abstraction has 61 states and 61 transitions. [2018-11-23 14:31:31,119 INFO L481 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-11-23 14:31:31,119 INFO L276 IsEmpty]: Start isEmpty. Operand 61 states and 61 transitions. [2018-11-23 14:31:31,120 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2018-11-23 14:31:31,120 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 14:31:31,120 INFO L402 BasicCegarLoop]: trace histogram [11, 10, 10, 10, 10, 1, 1, 1, 1, 1, 1] [2018-11-23 14:31:31,120 INFO L423 AbstractCegarLoop]: === Iteration 23 === [mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2018-11-23 14:31:31,120 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 14:31:31,121 INFO L82 PathProgramCache]: Analyzing trace with hash -1678951906, now seen corresponding path program 10 times [2018-11-23 14:31:31,121 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 14:31:31,121 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 14:31:31,122 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 14:31:31,122 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-23 14:31:31,122 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 14:31:31,127 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 14:31:31,191 INFO L134 CoverageAnalysis]: Checked inductivity of 245 backedges. 0 proven. 245 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 14:31:31,191 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-23 14:31:31,191 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_5db53c6b-9103-46d2-b960-4341706e456a/bin-2019/uautomizer/z3 Starting monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-23 14:31:31,210 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-11-23 14:31:31,226 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-11-23 14:31:31,226 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-23 14:31:31,228 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 14:31:31,347 INFO L134 CoverageAnalysis]: Checked inductivity of 245 backedges. 0 proven. 245 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 14:31:31,374 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 14:31:31,374 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12] total 12 [2018-11-23 14:31:31,374 INFO L459 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-11-23 14:31:31,375 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-11-23 14:31:31,375 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=78, Invalid=78, Unknown=0, NotChecked=0, Total=156 [2018-11-23 14:31:31,375 INFO L87 Difference]: Start difference. First operand 61 states and 61 transitions. Second operand 13 states. [2018-11-23 14:31:31,413 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 14:31:31,413 INFO L93 Difference]: Finished difference Result 66 states and 66 transitions. [2018-11-23 14:31:31,413 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-11-23 14:31:31,413 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 57 [2018-11-23 14:31:31,413 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 14:31:31,414 INFO L225 Difference]: With dead ends: 66 [2018-11-23 14:31:31,414 INFO L226 Difference]: Without dead ends: 65 [2018-11-23 14:31:31,414 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 68 GetRequests, 47 SyntacticMatches, 10 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 45 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=78, Invalid=78, Unknown=0, NotChecked=0, Total=156 [2018-11-23 14:31:31,414 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 65 states. [2018-11-23 14:31:31,417 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 65 to 64. [2018-11-23 14:31:31,417 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 64 states. [2018-11-23 14:31:31,417 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 64 states to 64 states and 64 transitions. [2018-11-23 14:31:31,417 INFO L78 Accepts]: Start accepts. Automaton has 64 states and 64 transitions. Word has length 57 [2018-11-23 14:31:31,418 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 14:31:31,418 INFO L480 AbstractCegarLoop]: Abstraction has 64 states and 64 transitions. [2018-11-23 14:31:31,418 INFO L481 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-11-23 14:31:31,418 INFO L276 IsEmpty]: Start isEmpty. Operand 64 states and 64 transitions. [2018-11-23 14:31:31,418 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2018-11-23 14:31:31,418 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 14:31:31,418 INFO L402 BasicCegarLoop]: trace histogram [11, 11, 11, 10, 10, 1, 1, 1, 1, 1, 1] [2018-11-23 14:31:31,419 INFO L423 AbstractCegarLoop]: === Iteration 24 === [mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2018-11-23 14:31:31,419 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 14:31:31,419 INFO L82 PathProgramCache]: Analyzing trace with hash 1434923136, now seen corresponding path program 10 times [2018-11-23 14:31:31,419 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 14:31:31,419 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 14:31:31,420 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 14:31:31,420 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-23 14:31:31,420 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 14:31:31,425 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 14:31:31,503 INFO L134 CoverageAnalysis]: Checked inductivity of 265 backedges. 0 proven. 265 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 14:31:31,503 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-23 14:31:31,503 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_5db53c6b-9103-46d2-b960-4341706e456a/bin-2019/uautomizer/z3 Starting monitored process 21 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 21 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-23 14:31:31,514 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-11-23 14:31:31,525 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-11-23 14:31:31,525 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-23 14:31:31,526 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 14:31:31,625 INFO L134 CoverageAnalysis]: Checked inductivity of 265 backedges. 0 proven. 265 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 14:31:31,642 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 14:31:31,642 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12] total 12 [2018-11-23 14:31:31,642 INFO L459 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-11-23 14:31:31,642 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-11-23 14:31:31,642 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=78, Invalid=78, Unknown=0, NotChecked=0, Total=156 [2018-11-23 14:31:31,643 INFO L87 Difference]: Start difference. First operand 64 states and 64 transitions. Second operand 13 states. [2018-11-23 14:31:31,678 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 14:31:31,678 INFO L93 Difference]: Finished difference Result 68 states and 68 transitions. [2018-11-23 14:31:31,679 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-11-23 14:31:31,679 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 59 [2018-11-23 14:31:31,679 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 14:31:31,680 INFO L225 Difference]: With dead ends: 68 [2018-11-23 14:31:31,680 INFO L226 Difference]: Without dead ends: 67 [2018-11-23 14:31:31,680 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 70 GetRequests, 49 SyntacticMatches, 10 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 45 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=78, Invalid=78, Unknown=0, NotChecked=0, Total=156 [2018-11-23 14:31:31,680 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 67 states. [2018-11-23 14:31:31,683 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 67 to 66. [2018-11-23 14:31:31,683 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 66 states. [2018-11-23 14:31:31,683 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 66 states to 66 states and 66 transitions. [2018-11-23 14:31:31,683 INFO L78 Accepts]: Start accepts. Automaton has 66 states and 66 transitions. Word has length 59 [2018-11-23 14:31:31,684 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 14:31:31,684 INFO L480 AbstractCegarLoop]: Abstraction has 66 states and 66 transitions. [2018-11-23 14:31:31,684 INFO L481 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-11-23 14:31:31,684 INFO L276 IsEmpty]: Start isEmpty. Operand 66 states and 66 transitions. [2018-11-23 14:31:31,684 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 63 [2018-11-23 14:31:31,684 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 14:31:31,685 INFO L402 BasicCegarLoop]: trace histogram [12, 11, 11, 11, 11, 1, 1, 1, 1, 1, 1] [2018-11-23 14:31:31,685 INFO L423 AbstractCegarLoop]: === Iteration 25 === [mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2018-11-23 14:31:31,685 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 14:31:31,685 INFO L82 PathProgramCache]: Analyzing trace with hash -14302123, now seen corresponding path program 11 times [2018-11-23 14:31:31,685 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 14:31:31,685 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 14:31:31,686 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 14:31:31,686 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-23 14:31:31,687 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 14:31:31,695 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 14:31:31,775 INFO L134 CoverageAnalysis]: Checked inductivity of 297 backedges. 0 proven. 297 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 14:31:31,775 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-23 14:31:31,775 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_5db53c6b-9103-46d2-b960-4341706e456a/bin-2019/uautomizer/z3 Starting monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-23 14:31:31,783 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-11-23 14:31:31,816 INFO L249 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 12 check-sat command(s) [2018-11-23 14:31:31,816 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-23 14:31:31,817 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 14:31:31,946 INFO L134 CoverageAnalysis]: Checked inductivity of 297 backedges. 0 proven. 297 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 14:31:31,963 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 14:31:31,963 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13] total 13 [2018-11-23 14:31:31,963 INFO L459 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-11-23 14:31:31,963 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-11-23 14:31:31,963 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=91, Invalid=91, Unknown=0, NotChecked=0, Total=182 [2018-11-23 14:31:31,964 INFO L87 Difference]: Start difference. First operand 66 states and 66 transitions. Second operand 14 states. [2018-11-23 14:31:32,001 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 14:31:32,001 INFO L93 Difference]: Finished difference Result 71 states and 71 transitions. [2018-11-23 14:31:32,001 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-11-23 14:31:32,001 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 62 [2018-11-23 14:31:32,002 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 14:31:32,002 INFO L225 Difference]: With dead ends: 71 [2018-11-23 14:31:32,002 INFO L226 Difference]: Without dead ends: 70 [2018-11-23 14:31:32,002 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 74 GetRequests, 51 SyntacticMatches, 11 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 55 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=91, Invalid=91, Unknown=0, NotChecked=0, Total=182 [2018-11-23 14:31:32,003 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 70 states. [2018-11-23 14:31:32,005 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 70 to 69. [2018-11-23 14:31:32,005 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 69 states. [2018-11-23 14:31:32,005 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 69 states to 69 states and 69 transitions. [2018-11-23 14:31:32,006 INFO L78 Accepts]: Start accepts. Automaton has 69 states and 69 transitions. Word has length 62 [2018-11-23 14:31:32,006 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 14:31:32,006 INFO L480 AbstractCegarLoop]: Abstraction has 69 states and 69 transitions. [2018-11-23 14:31:32,006 INFO L481 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-11-23 14:31:32,006 INFO L276 IsEmpty]: Start isEmpty. Operand 69 states and 69 transitions. [2018-11-23 14:31:32,007 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 65 [2018-11-23 14:31:32,007 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 14:31:32,007 INFO L402 BasicCegarLoop]: trace histogram [12, 12, 12, 11, 11, 1, 1, 1, 1, 1, 1] [2018-11-23 14:31:32,007 INFO L423 AbstractCegarLoop]: === Iteration 26 === [mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2018-11-23 14:31:32,007 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 14:31:32,007 INFO L82 PathProgramCache]: Analyzing trace with hash -859436809, now seen corresponding path program 11 times [2018-11-23 14:31:32,008 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 14:31:32,008 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 14:31:32,009 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 14:31:32,009 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-23 14:31:32,009 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 14:31:32,013 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 14:31:32,077 INFO L134 CoverageAnalysis]: Checked inductivity of 319 backedges. 0 proven. 319 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 14:31:32,077 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-23 14:31:32,077 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_5db53c6b-9103-46d2-b960-4341706e456a/bin-2019/uautomizer/z3 Starting monitored process 23 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 23 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-23 14:31:32,085 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-11-23 14:31:32,127 INFO L249 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 12 check-sat command(s) [2018-11-23 14:31:32,127 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-23 14:31:32,129 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 14:31:32,263 INFO L134 CoverageAnalysis]: Checked inductivity of 319 backedges. 0 proven. 319 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 14:31:32,285 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 14:31:32,285 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13] total 13 [2018-11-23 14:31:32,285 INFO L459 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-11-23 14:31:32,285 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-11-23 14:31:32,286 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=91, Invalid=91, Unknown=0, NotChecked=0, Total=182 [2018-11-23 14:31:32,286 INFO L87 Difference]: Start difference. First operand 69 states and 69 transitions. Second operand 14 states. [2018-11-23 14:31:32,317 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 14:31:32,317 INFO L93 Difference]: Finished difference Result 73 states and 73 transitions. [2018-11-23 14:31:32,318 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-11-23 14:31:32,318 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 64 [2018-11-23 14:31:32,318 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 14:31:32,319 INFO L225 Difference]: With dead ends: 73 [2018-11-23 14:31:32,319 INFO L226 Difference]: Without dead ends: 72 [2018-11-23 14:31:32,319 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 76 GetRequests, 53 SyntacticMatches, 11 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 55 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=91, Invalid=91, Unknown=0, NotChecked=0, Total=182 [2018-11-23 14:31:32,319 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 72 states. [2018-11-23 14:31:32,321 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 72 to 71. [2018-11-23 14:31:32,321 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 71 states. [2018-11-23 14:31:32,322 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 71 states to 71 states and 71 transitions. [2018-11-23 14:31:32,322 INFO L78 Accepts]: Start accepts. Automaton has 71 states and 71 transitions. Word has length 64 [2018-11-23 14:31:32,322 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 14:31:32,322 INFO L480 AbstractCegarLoop]: Abstraction has 71 states and 71 transitions. [2018-11-23 14:31:32,322 INFO L481 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-11-23 14:31:32,322 INFO L276 IsEmpty]: Start isEmpty. Operand 71 states and 71 transitions. [2018-11-23 14:31:32,323 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2018-11-23 14:31:32,323 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 14:31:32,323 INFO L402 BasicCegarLoop]: trace histogram [13, 12, 12, 12, 12, 1, 1, 1, 1, 1, 1] [2018-11-23 14:31:32,323 INFO L423 AbstractCegarLoop]: === Iteration 27 === [mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2018-11-23 14:31:32,323 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 14:31:32,324 INFO L82 PathProgramCache]: Analyzing trace with hash -1181875074, now seen corresponding path program 12 times [2018-11-23 14:31:32,324 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 14:31:32,324 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 14:31:32,324 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 14:31:32,324 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-23 14:31:32,325 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 14:31:32,329 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 14:31:32,405 INFO L134 CoverageAnalysis]: Checked inductivity of 354 backedges. 0 proven. 354 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 14:31:32,405 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-23 14:31:32,405 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_5db53c6b-9103-46d2-b960-4341706e456a/bin-2019/uautomizer/z3 Starting monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-23 14:31:32,412 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-11-23 14:31:32,423 INFO L249 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 13 check-sat command(s) [2018-11-23 14:31:32,423 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-23 14:31:32,424 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 14:31:32,538 INFO L134 CoverageAnalysis]: Checked inductivity of 354 backedges. 0 proven. 354 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 14:31:32,552 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 14:31:32,552 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 14] total 14 [2018-11-23 14:31:32,553 INFO L459 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-11-23 14:31:32,553 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-11-23 14:31:32,553 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=105, Invalid=105, Unknown=0, NotChecked=0, Total=210 [2018-11-23 14:31:32,553 INFO L87 Difference]: Start difference. First operand 71 states and 71 transitions. Second operand 15 states. [2018-11-23 14:31:32,579 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 14:31:32,580 INFO L93 Difference]: Finished difference Result 76 states and 76 transitions. [2018-11-23 14:31:32,580 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-11-23 14:31:32,580 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 67 [2018-11-23 14:31:32,580 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 14:31:32,580 INFO L225 Difference]: With dead ends: 76 [2018-11-23 14:31:32,581 INFO L226 Difference]: Without dead ends: 75 [2018-11-23 14:31:32,581 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 80 GetRequests, 55 SyntacticMatches, 12 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 66 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=105, Invalid=105, Unknown=0, NotChecked=0, Total=210 [2018-11-23 14:31:32,581 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 75 states. [2018-11-23 14:31:32,583 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 75 to 74. [2018-11-23 14:31:32,583 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 74 states. [2018-11-23 14:31:32,583 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 74 states to 74 states and 74 transitions. [2018-11-23 14:31:32,583 INFO L78 Accepts]: Start accepts. Automaton has 74 states and 74 transitions. Word has length 67 [2018-11-23 14:31:32,583 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 14:31:32,583 INFO L480 AbstractCegarLoop]: Abstraction has 74 states and 74 transitions. [2018-11-23 14:31:32,584 INFO L481 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-11-23 14:31:32,584 INFO L276 IsEmpty]: Start isEmpty. Operand 74 states and 74 transitions. [2018-11-23 14:31:32,584 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 70 [2018-11-23 14:31:32,584 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 14:31:32,584 INFO L402 BasicCegarLoop]: trace histogram [13, 13, 13, 12, 12, 1, 1, 1, 1, 1, 1] [2018-11-23 14:31:32,584 INFO L423 AbstractCegarLoop]: === Iteration 28 === [mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2018-11-23 14:31:32,584 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 14:31:32,585 INFO L82 PathProgramCache]: Analyzing trace with hash -1910578464, now seen corresponding path program 12 times [2018-11-23 14:31:32,585 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 14:31:32,585 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 14:31:32,585 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 14:31:32,585 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-23 14:31:32,586 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 14:31:32,589 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 14:31:32,669 INFO L134 CoverageAnalysis]: Checked inductivity of 378 backedges. 0 proven. 378 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 14:31:32,670 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-23 14:31:32,670 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_5db53c6b-9103-46d2-b960-4341706e456a/bin-2019/uautomizer/z3 Starting monitored process 25 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 25 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-23 14:31:32,677 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-11-23 14:31:32,688 INFO L249 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 13 check-sat command(s) [2018-11-23 14:31:32,689 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-23 14:31:32,690 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 14:31:32,795 INFO L134 CoverageAnalysis]: Checked inductivity of 378 backedges. 0 proven. 378 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 14:31:32,809 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 14:31:32,810 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 14] total 14 [2018-11-23 14:31:32,810 INFO L459 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-11-23 14:31:32,810 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-11-23 14:31:32,810 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=105, Invalid=105, Unknown=0, NotChecked=0, Total=210 [2018-11-23 14:31:32,810 INFO L87 Difference]: Start difference. First operand 74 states and 74 transitions. Second operand 15 states. [2018-11-23 14:31:32,841 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 14:31:32,841 INFO L93 Difference]: Finished difference Result 78 states and 78 transitions. [2018-11-23 14:31:32,841 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-11-23 14:31:32,841 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 69 [2018-11-23 14:31:32,841 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 14:31:32,842 INFO L225 Difference]: With dead ends: 78 [2018-11-23 14:31:32,842 INFO L226 Difference]: Without dead ends: 77 [2018-11-23 14:31:32,842 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 82 GetRequests, 57 SyntacticMatches, 12 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 66 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=105, Invalid=105, Unknown=0, NotChecked=0, Total=210 [2018-11-23 14:31:32,842 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 77 states. [2018-11-23 14:31:32,844 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 77 to 76. [2018-11-23 14:31:32,844 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 76 states. [2018-11-23 14:31:32,844 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 76 states to 76 states and 76 transitions. [2018-11-23 14:31:32,844 INFO L78 Accepts]: Start accepts. Automaton has 76 states and 76 transitions. Word has length 69 [2018-11-23 14:31:32,845 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 14:31:32,845 INFO L480 AbstractCegarLoop]: Abstraction has 76 states and 76 transitions. [2018-11-23 14:31:32,845 INFO L481 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-11-23 14:31:32,845 INFO L276 IsEmpty]: Start isEmpty. Operand 76 states and 76 transitions. [2018-11-23 14:31:32,845 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2018-11-23 14:31:32,845 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 14:31:32,845 INFO L402 BasicCegarLoop]: trace histogram [14, 13, 13, 13, 13, 1, 1, 1, 1, 1, 1] [2018-11-23 14:31:32,846 INFO L423 AbstractCegarLoop]: === Iteration 29 === [mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2018-11-23 14:31:32,846 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 14:31:32,846 INFO L82 PathProgramCache]: Analyzing trace with hash -1136364043, now seen corresponding path program 13 times [2018-11-23 14:31:32,846 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 14:31:32,846 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 14:31:32,847 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 14:31:32,847 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-23 14:31:32,847 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 14:31:32,851 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 14:31:32,922 INFO L134 CoverageAnalysis]: Checked inductivity of 416 backedges. 0 proven. 416 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 14:31:32,922 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-23 14:31:32,922 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_5db53c6b-9103-46d2-b960-4341706e456a/bin-2019/uautomizer/z3 Starting monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-23 14:31:32,929 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 14:31:32,936 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 14:31:32,937 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 14:31:33,041 INFO L134 CoverageAnalysis]: Checked inductivity of 416 backedges. 0 proven. 416 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 14:31:33,056 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 14:31:33,056 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 15] total 15 [2018-11-23 14:31:33,056 INFO L459 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-11-23 14:31:33,057 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-11-23 14:31:33,057 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=120, Invalid=120, Unknown=0, NotChecked=0, Total=240 [2018-11-23 14:31:33,057 INFO L87 Difference]: Start difference. First operand 76 states and 76 transitions. Second operand 16 states. [2018-11-23 14:31:33,089 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 14:31:33,089 INFO L93 Difference]: Finished difference Result 81 states and 81 transitions. [2018-11-23 14:31:33,089 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-11-23 14:31:33,090 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 72 [2018-11-23 14:31:33,090 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 14:31:33,090 INFO L225 Difference]: With dead ends: 81 [2018-11-23 14:31:33,090 INFO L226 Difference]: Without dead ends: 80 [2018-11-23 14:31:33,091 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 86 GetRequests, 59 SyntacticMatches, 13 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 78 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=120, Invalid=120, Unknown=0, NotChecked=0, Total=240 [2018-11-23 14:31:33,091 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 80 states. [2018-11-23 14:31:33,093 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 80 to 79. [2018-11-23 14:31:33,094 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 79 states. [2018-11-23 14:31:33,094 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 79 states to 79 states and 79 transitions. [2018-11-23 14:31:33,094 INFO L78 Accepts]: Start accepts. Automaton has 79 states and 79 transitions. Word has length 72 [2018-11-23 14:31:33,094 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 14:31:33,094 INFO L480 AbstractCegarLoop]: Abstraction has 79 states and 79 transitions. [2018-11-23 14:31:33,094 INFO L481 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-11-23 14:31:33,094 INFO L276 IsEmpty]: Start isEmpty. Operand 79 states and 79 transitions. [2018-11-23 14:31:33,095 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 75 [2018-11-23 14:31:33,095 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 14:31:33,095 INFO L402 BasicCegarLoop]: trace histogram [14, 14, 14, 13, 13, 1, 1, 1, 1, 1, 1] [2018-11-23 14:31:33,095 INFO L423 AbstractCegarLoop]: === Iteration 30 === [mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2018-11-23 14:31:33,095 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 14:31:33,096 INFO L82 PathProgramCache]: Analyzing trace with hash -1124150633, now seen corresponding path program 13 times [2018-11-23 14:31:33,096 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 14:31:33,096 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 14:31:33,097 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 14:31:33,097 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 14:31:33,097 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 14:31:33,103 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 14:31:33,228 INFO L134 CoverageAnalysis]: Checked inductivity of 442 backedges. 0 proven. 442 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 14:31:33,228 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-23 14:31:33,228 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_5db53c6b-9103-46d2-b960-4341706e456a/bin-2019/uautomizer/z3 Starting monitored process 27 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 27 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-23 14:31:33,237 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 14:31:33,247 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 14:31:33,249 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 14:31:33,388 INFO L134 CoverageAnalysis]: Checked inductivity of 442 backedges. 0 proven. 442 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 14:31:33,404 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 14:31:33,404 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 15] total 15 [2018-11-23 14:31:33,405 INFO L459 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-11-23 14:31:33,405 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-11-23 14:31:33,405 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=120, Invalid=120, Unknown=0, NotChecked=0, Total=240 [2018-11-23 14:31:33,405 INFO L87 Difference]: Start difference. First operand 79 states and 79 transitions. Second operand 16 states. [2018-11-23 14:31:33,433 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 14:31:33,433 INFO L93 Difference]: Finished difference Result 83 states and 83 transitions. [2018-11-23 14:31:33,433 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-11-23 14:31:33,433 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 74 [2018-11-23 14:31:33,434 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 14:31:33,434 INFO L225 Difference]: With dead ends: 83 [2018-11-23 14:31:33,434 INFO L226 Difference]: Without dead ends: 82 [2018-11-23 14:31:33,435 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 88 GetRequests, 61 SyntacticMatches, 13 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 78 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=120, Invalid=120, Unknown=0, NotChecked=0, Total=240 [2018-11-23 14:31:33,435 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 82 states. [2018-11-23 14:31:33,437 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 82 to 81. [2018-11-23 14:31:33,437 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 81 states. [2018-11-23 14:31:33,438 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 81 states to 81 states and 81 transitions. [2018-11-23 14:31:33,438 INFO L78 Accepts]: Start accepts. Automaton has 81 states and 81 transitions. Word has length 74 [2018-11-23 14:31:33,438 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 14:31:33,438 INFO L480 AbstractCegarLoop]: Abstraction has 81 states and 81 transitions. [2018-11-23 14:31:33,438 INFO L481 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-11-23 14:31:33,438 INFO L276 IsEmpty]: Start isEmpty. Operand 81 states and 81 transitions. [2018-11-23 14:31:33,439 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 78 [2018-11-23 14:31:33,439 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 14:31:33,439 INFO L402 BasicCegarLoop]: trace histogram [15, 14, 14, 14, 14, 1, 1, 1, 1, 1, 1] [2018-11-23 14:31:33,439 INFO L423 AbstractCegarLoop]: === Iteration 31 === [mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2018-11-23 14:31:33,440 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 14:31:33,440 INFO L82 PathProgramCache]: Analyzing trace with hash -1711450402, now seen corresponding path program 14 times [2018-11-23 14:31:33,440 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 14:31:33,440 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 14:31:33,441 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 14:31:33,441 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 14:31:33,441 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 14:31:33,446 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 14:31:33,579 INFO L134 CoverageAnalysis]: Checked inductivity of 483 backedges. 0 proven. 483 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 14:31:33,579 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-23 14:31:33,579 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_5db53c6b-9103-46d2-b960-4341706e456a/bin-2019/uautomizer/z3 Starting monitored process 28 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 28 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-23 14:31:33,589 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-11-23 14:31:33,600 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-11-23 14:31:33,600 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-23 14:31:33,601 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 14:31:33,744 INFO L134 CoverageAnalysis]: Checked inductivity of 483 backedges. 0 proven. 483 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 14:31:33,758 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 14:31:33,758 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 16] total 16 [2018-11-23 14:31:33,759 INFO L459 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-11-23 14:31:33,759 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-11-23 14:31:33,759 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=136, Invalid=136, Unknown=0, NotChecked=0, Total=272 [2018-11-23 14:31:33,759 INFO L87 Difference]: Start difference. First operand 81 states and 81 transitions. Second operand 17 states. [2018-11-23 14:31:33,789 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 14:31:33,789 INFO L93 Difference]: Finished difference Result 86 states and 86 transitions. [2018-11-23 14:31:33,789 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-11-23 14:31:33,789 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 77 [2018-11-23 14:31:33,790 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 14:31:33,790 INFO L225 Difference]: With dead ends: 86 [2018-11-23 14:31:33,790 INFO L226 Difference]: Without dead ends: 85 [2018-11-23 14:31:33,790 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 92 GetRequests, 63 SyntacticMatches, 14 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 91 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=136, Invalid=136, Unknown=0, NotChecked=0, Total=272 [2018-11-23 14:31:33,790 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 85 states. [2018-11-23 14:31:33,792 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 85 to 84. [2018-11-23 14:31:33,792 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 84 states. [2018-11-23 14:31:33,792 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 84 states to 84 states and 84 transitions. [2018-11-23 14:31:33,792 INFO L78 Accepts]: Start accepts. Automaton has 84 states and 84 transitions. Word has length 77 [2018-11-23 14:31:33,792 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 14:31:33,792 INFO L480 AbstractCegarLoop]: Abstraction has 84 states and 84 transitions. [2018-11-23 14:31:33,792 INFO L481 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-11-23 14:31:33,792 INFO L276 IsEmpty]: Start isEmpty. Operand 84 states and 84 transitions. [2018-11-23 14:31:33,792 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 80 [2018-11-23 14:31:33,793 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 14:31:33,793 INFO L402 BasicCegarLoop]: trace histogram [15, 15, 15, 14, 14, 1, 1, 1, 1, 1, 1] [2018-11-23 14:31:33,793 INFO L423 AbstractCegarLoop]: === Iteration 32 === [mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2018-11-23 14:31:33,793 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 14:31:33,793 INFO L82 PathProgramCache]: Analyzing trace with hash 268639552, now seen corresponding path program 14 times [2018-11-23 14:31:33,793 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 14:31:33,793 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 14:31:33,793 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 14:31:33,794 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-23 14:31:33,794 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 14:31:33,797 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 14:31:33,900 INFO L134 CoverageAnalysis]: Checked inductivity of 511 backedges. 0 proven. 511 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 14:31:33,900 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-23 14:31:33,900 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_5db53c6b-9103-46d2-b960-4341706e456a/bin-2019/uautomizer/z3 Starting monitored process 29 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 29 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-23 14:31:33,907 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-11-23 14:31:33,917 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-11-23 14:31:33,917 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-23 14:31:33,918 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 14:31:34,034 INFO L134 CoverageAnalysis]: Checked inductivity of 511 backedges. 0 proven. 511 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 14:31:34,049 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 14:31:34,049 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 16] total 16 [2018-11-23 14:31:34,049 INFO L459 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-11-23 14:31:34,049 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-11-23 14:31:34,049 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=136, Invalid=136, Unknown=0, NotChecked=0, Total=272 [2018-11-23 14:31:34,049 INFO L87 Difference]: Start difference. First operand 84 states and 84 transitions. Second operand 17 states. [2018-11-23 14:31:34,071 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 14:31:34,072 INFO L93 Difference]: Finished difference Result 88 states and 88 transitions. [2018-11-23 14:31:34,072 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-11-23 14:31:34,072 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 79 [2018-11-23 14:31:34,072 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 14:31:34,072 INFO L225 Difference]: With dead ends: 88 [2018-11-23 14:31:34,072 INFO L226 Difference]: Without dead ends: 87 [2018-11-23 14:31:34,072 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 94 GetRequests, 65 SyntacticMatches, 14 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 91 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=136, Invalid=136, Unknown=0, NotChecked=0, Total=272 [2018-11-23 14:31:34,073 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 87 states. [2018-11-23 14:31:34,074 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 87 to 86. [2018-11-23 14:31:34,074 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 86 states. [2018-11-23 14:31:34,074 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 86 states to 86 states and 86 transitions. [2018-11-23 14:31:34,074 INFO L78 Accepts]: Start accepts. Automaton has 86 states and 86 transitions. Word has length 79 [2018-11-23 14:31:34,074 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 14:31:34,074 INFO L480 AbstractCegarLoop]: Abstraction has 86 states and 86 transitions. [2018-11-23 14:31:34,074 INFO L481 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-11-23 14:31:34,074 INFO L276 IsEmpty]: Start isEmpty. Operand 86 states and 86 transitions. [2018-11-23 14:31:34,075 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 83 [2018-11-23 14:31:34,075 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 14:31:34,075 INFO L402 BasicCegarLoop]: trace histogram [16, 15, 15, 15, 15, 1, 1, 1, 1, 1, 1] [2018-11-23 14:31:34,075 INFO L423 AbstractCegarLoop]: === Iteration 33 === [mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2018-11-23 14:31:34,075 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 14:31:34,075 INFO L82 PathProgramCache]: Analyzing trace with hash 1516871573, now seen corresponding path program 15 times [2018-11-23 14:31:34,075 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 14:31:34,075 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 14:31:34,076 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 14:31:34,076 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-23 14:31:34,076 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 14:31:34,079 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 14:31:34,191 INFO L134 CoverageAnalysis]: Checked inductivity of 555 backedges. 0 proven. 555 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 14:31:34,191 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-23 14:31:34,191 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_5db53c6b-9103-46d2-b960-4341706e456a/bin-2019/uautomizer/z3 Starting monitored process 30 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 30 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-23 14:31:34,198 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-11-23 14:31:34,215 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 16 check-sat command(s) [2018-11-23 14:31:34,215 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-23 14:31:34,216 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 14:31:34,377 INFO L134 CoverageAnalysis]: Checked inductivity of 555 backedges. 0 proven. 555 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 14:31:34,392 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 14:31:34,392 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 17] total 17 [2018-11-23 14:31:34,392 INFO L459 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-11-23 14:31:34,392 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-11-23 14:31:34,392 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=153, Invalid=153, Unknown=0, NotChecked=0, Total=306 [2018-11-23 14:31:34,392 INFO L87 Difference]: Start difference. First operand 86 states and 86 transitions. Second operand 18 states. [2018-11-23 14:31:34,452 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 14:31:34,452 INFO L93 Difference]: Finished difference Result 91 states and 91 transitions. [2018-11-23 14:31:34,452 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-11-23 14:31:34,452 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 82 [2018-11-23 14:31:34,452 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 14:31:34,453 INFO L225 Difference]: With dead ends: 91 [2018-11-23 14:31:34,453 INFO L226 Difference]: Without dead ends: 90 [2018-11-23 14:31:34,453 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 98 GetRequests, 67 SyntacticMatches, 15 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 105 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=153, Invalid=153, Unknown=0, NotChecked=0, Total=306 [2018-11-23 14:31:34,454 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 90 states. [2018-11-23 14:31:34,456 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 90 to 89. [2018-11-23 14:31:34,456 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 89 states. [2018-11-23 14:31:34,456 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 89 states to 89 states and 89 transitions. [2018-11-23 14:31:34,456 INFO L78 Accepts]: Start accepts. Automaton has 89 states and 89 transitions. Word has length 82 [2018-11-23 14:31:34,457 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 14:31:34,457 INFO L480 AbstractCegarLoop]: Abstraction has 89 states and 89 transitions. [2018-11-23 14:31:34,457 INFO L481 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-11-23 14:31:34,457 INFO L276 IsEmpty]: Start isEmpty. Operand 89 states and 89 transitions. [2018-11-23 14:31:34,457 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 85 [2018-11-23 14:31:34,457 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 14:31:34,457 INFO L402 BasicCegarLoop]: trace histogram [16, 16, 16, 15, 15, 1, 1, 1, 1, 1, 1] [2018-11-23 14:31:34,458 INFO L423 AbstractCegarLoop]: === Iteration 34 === [mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2018-11-23 14:31:34,458 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 14:31:34,458 INFO L82 PathProgramCache]: Analyzing trace with hash 1719669815, now seen corresponding path program 15 times [2018-11-23 14:31:34,458 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 14:31:34,458 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 14:31:34,459 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 14:31:34,459 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-23 14:31:34,459 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 14:31:34,464 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 14:31:34,570 INFO L134 CoverageAnalysis]: Checked inductivity of 585 backedges. 0 proven. 585 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 14:31:34,570 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-23 14:31:34,570 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_5db53c6b-9103-46d2-b960-4341706e456a/bin-2019/uautomizer/z3 Starting monitored process 31 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 31 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-23 14:31:34,578 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-11-23 14:31:34,595 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 16 check-sat command(s) [2018-11-23 14:31:34,595 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-23 14:31:34,596 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 14:31:34,744 INFO L134 CoverageAnalysis]: Checked inductivity of 585 backedges. 0 proven. 585 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 14:31:34,759 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 14:31:34,759 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 17] total 17 [2018-11-23 14:31:34,759 INFO L459 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-11-23 14:31:34,759 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-11-23 14:31:34,759 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=153, Invalid=153, Unknown=0, NotChecked=0, Total=306 [2018-11-23 14:31:34,760 INFO L87 Difference]: Start difference. First operand 89 states and 89 transitions. Second operand 18 states. [2018-11-23 14:31:34,786 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 14:31:34,786 INFO L93 Difference]: Finished difference Result 93 states and 93 transitions. [2018-11-23 14:31:34,787 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-11-23 14:31:34,787 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 84 [2018-11-23 14:31:34,787 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 14:31:34,787 INFO L225 Difference]: With dead ends: 93 [2018-11-23 14:31:34,787 INFO L226 Difference]: Without dead ends: 92 [2018-11-23 14:31:34,788 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 100 GetRequests, 69 SyntacticMatches, 15 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 105 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=153, Invalid=153, Unknown=0, NotChecked=0, Total=306 [2018-11-23 14:31:34,788 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 92 states. [2018-11-23 14:31:34,790 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 92 to 91. [2018-11-23 14:31:34,790 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 91 states. [2018-11-23 14:31:34,791 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 91 states to 91 states and 91 transitions. [2018-11-23 14:31:34,791 INFO L78 Accepts]: Start accepts. Automaton has 91 states and 91 transitions. Word has length 84 [2018-11-23 14:31:34,791 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 14:31:34,791 INFO L480 AbstractCegarLoop]: Abstraction has 91 states and 91 transitions. [2018-11-23 14:31:34,791 INFO L481 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-11-23 14:31:34,791 INFO L276 IsEmpty]: Start isEmpty. Operand 91 states and 91 transitions. [2018-11-23 14:31:34,792 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 88 [2018-11-23 14:31:34,792 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 14:31:34,792 INFO L402 BasicCegarLoop]: trace histogram [17, 16, 16, 16, 16, 1, 1, 1, 1, 1, 1] [2018-11-23 14:31:34,792 INFO L423 AbstractCegarLoop]: === Iteration 35 === [mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2018-11-23 14:31:34,792 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 14:31:34,792 INFO L82 PathProgramCache]: Analyzing trace with hash 313602366, now seen corresponding path program 16 times [2018-11-23 14:31:34,792 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 14:31:34,792 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 14:31:34,793 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 14:31:34,793 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-23 14:31:34,793 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 14:31:34,798 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 14:31:34,931 INFO L134 CoverageAnalysis]: Checked inductivity of 632 backedges. 0 proven. 632 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 14:31:34,931 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-23 14:31:34,931 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_5db53c6b-9103-46d2-b960-4341706e456a/bin-2019/uautomizer/z3 Starting monitored process 32 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 32 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-23 14:31:34,941 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-11-23 14:31:34,958 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-11-23 14:31:34,958 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-23 14:31:34,960 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 14:31:35,198 INFO L134 CoverageAnalysis]: Checked inductivity of 632 backedges. 0 proven. 632 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 14:31:35,216 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 14:31:35,216 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 18] total 18 [2018-11-23 14:31:35,217 INFO L459 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-11-23 14:31:35,217 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-11-23 14:31:35,217 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=171, Invalid=171, Unknown=0, NotChecked=0, Total=342 [2018-11-23 14:31:35,217 INFO L87 Difference]: Start difference. First operand 91 states and 91 transitions. Second operand 19 states. [2018-11-23 14:31:35,259 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 14:31:35,259 INFO L93 Difference]: Finished difference Result 96 states and 96 transitions. [2018-11-23 14:31:35,259 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-11-23 14:31:35,260 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 87 [2018-11-23 14:31:35,260 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 14:31:35,260 INFO L225 Difference]: With dead ends: 96 [2018-11-23 14:31:35,260 INFO L226 Difference]: Without dead ends: 95 [2018-11-23 14:31:35,260 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 104 GetRequests, 71 SyntacticMatches, 16 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 120 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=171, Invalid=171, Unknown=0, NotChecked=0, Total=342 [2018-11-23 14:31:35,260 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 95 states. [2018-11-23 14:31:35,262 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 95 to 94. [2018-11-23 14:31:35,262 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 94 states. [2018-11-23 14:31:35,262 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 94 states to 94 states and 94 transitions. [2018-11-23 14:31:35,262 INFO L78 Accepts]: Start accepts. Automaton has 94 states and 94 transitions. Word has length 87 [2018-11-23 14:31:35,262 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 14:31:35,263 INFO L480 AbstractCegarLoop]: Abstraction has 94 states and 94 transitions. [2018-11-23 14:31:35,263 INFO L481 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-11-23 14:31:35,263 INFO L276 IsEmpty]: Start isEmpty. Operand 94 states and 94 transitions. [2018-11-23 14:31:35,263 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 90 [2018-11-23 14:31:35,263 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 14:31:35,263 INFO L402 BasicCegarLoop]: trace histogram [17, 17, 17, 16, 16, 1, 1, 1, 1, 1, 1] [2018-11-23 14:31:35,263 INFO L423 AbstractCegarLoop]: === Iteration 36 === [mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2018-11-23 14:31:35,263 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 14:31:35,263 INFO L82 PathProgramCache]: Analyzing trace with hash 724164512, now seen corresponding path program 16 times [2018-11-23 14:31:35,264 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 14:31:35,264 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 14:31:35,264 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 14:31:35,264 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-23 14:31:35,264 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 14:31:35,268 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 14:31:35,376 INFO L134 CoverageAnalysis]: Checked inductivity of 664 backedges. 0 proven. 664 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 14:31:35,376 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-23 14:31:35,376 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_5db53c6b-9103-46d2-b960-4341706e456a/bin-2019/uautomizer/z3 Starting monitored process 33 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 33 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-23 14:31:35,382 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-11-23 14:31:35,393 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-11-23 14:31:35,393 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-23 14:31:35,394 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 14:31:35,571 INFO L134 CoverageAnalysis]: Checked inductivity of 664 backedges. 0 proven. 664 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 14:31:35,599 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 14:31:35,599 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 18] total 18 [2018-11-23 14:31:35,599 INFO L459 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-11-23 14:31:35,600 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-11-23 14:31:35,600 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=171, Invalid=171, Unknown=0, NotChecked=0, Total=342 [2018-11-23 14:31:35,600 INFO L87 Difference]: Start difference. First operand 94 states and 94 transitions. Second operand 19 states. [2018-11-23 14:31:35,639 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 14:31:35,639 INFO L93 Difference]: Finished difference Result 98 states and 98 transitions. [2018-11-23 14:31:35,639 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-11-23 14:31:35,639 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 89 [2018-11-23 14:31:35,639 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 14:31:35,640 INFO L225 Difference]: With dead ends: 98 [2018-11-23 14:31:35,640 INFO L226 Difference]: Without dead ends: 97 [2018-11-23 14:31:35,640 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 106 GetRequests, 73 SyntacticMatches, 16 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 120 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=171, Invalid=171, Unknown=0, NotChecked=0, Total=342 [2018-11-23 14:31:35,641 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 97 states. [2018-11-23 14:31:35,643 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 97 to 96. [2018-11-23 14:31:35,643 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 96 states. [2018-11-23 14:31:35,644 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 96 states to 96 states and 96 transitions. [2018-11-23 14:31:35,644 INFO L78 Accepts]: Start accepts. Automaton has 96 states and 96 transitions. Word has length 89 [2018-11-23 14:31:35,644 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 14:31:35,644 INFO L480 AbstractCegarLoop]: Abstraction has 96 states and 96 transitions. [2018-11-23 14:31:35,644 INFO L481 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-11-23 14:31:35,644 INFO L276 IsEmpty]: Start isEmpty. Operand 96 states and 96 transitions. [2018-11-23 14:31:35,645 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 93 [2018-11-23 14:31:35,645 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 14:31:35,645 INFO L402 BasicCegarLoop]: trace histogram [18, 17, 17, 17, 17, 1, 1, 1, 1, 1, 1] [2018-11-23 14:31:35,645 INFO L423 AbstractCegarLoop]: === Iteration 37 === [mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2018-11-23 14:31:35,645 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 14:31:35,645 INFO L82 PathProgramCache]: Analyzing trace with hash -35700427, now seen corresponding path program 17 times [2018-11-23 14:31:35,645 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 14:31:35,645 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 14:31:35,646 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 14:31:35,646 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-23 14:31:35,646 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 14:31:35,651 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 14:31:35,811 INFO L134 CoverageAnalysis]: Checked inductivity of 714 backedges. 0 proven. 714 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 14:31:35,812 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-23 14:31:35,812 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_5db53c6b-9103-46d2-b960-4341706e456a/bin-2019/uautomizer/z3 Starting monitored process 34 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 34 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-23 14:31:35,827 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-11-23 14:31:35,867 INFO L249 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 18 check-sat command(s) [2018-11-23 14:31:35,867 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-23 14:31:35,869 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 14:31:36,051 INFO L134 CoverageAnalysis]: Checked inductivity of 714 backedges. 0 proven. 714 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 14:31:36,067 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 14:31:36,067 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 19] total 19 [2018-11-23 14:31:36,067 INFO L459 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-11-23 14:31:36,068 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-11-23 14:31:36,068 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=190, Invalid=190, Unknown=0, NotChecked=0, Total=380 [2018-11-23 14:31:36,068 INFO L87 Difference]: Start difference. First operand 96 states and 96 transitions. Second operand 20 states. [2018-11-23 14:31:36,114 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 14:31:36,114 INFO L93 Difference]: Finished difference Result 101 states and 101 transitions. [2018-11-23 14:31:36,114 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-11-23 14:31:36,114 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 92 [2018-11-23 14:31:36,115 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 14:31:36,115 INFO L225 Difference]: With dead ends: 101 [2018-11-23 14:31:36,115 INFO L226 Difference]: Without dead ends: 100 [2018-11-23 14:31:36,115 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 110 GetRequests, 75 SyntacticMatches, 17 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 136 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=190, Invalid=190, Unknown=0, NotChecked=0, Total=380 [2018-11-23 14:31:36,115 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 100 states. [2018-11-23 14:31:36,118 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 100 to 99. [2018-11-23 14:31:36,118 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 99 states. [2018-11-23 14:31:36,118 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 99 states to 99 states and 99 transitions. [2018-11-23 14:31:36,118 INFO L78 Accepts]: Start accepts. Automaton has 99 states and 99 transitions. Word has length 92 [2018-11-23 14:31:36,118 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 14:31:36,118 INFO L480 AbstractCegarLoop]: Abstraction has 99 states and 99 transitions. [2018-11-23 14:31:36,118 INFO L481 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-11-23 14:31:36,119 INFO L276 IsEmpty]: Start isEmpty. Operand 99 states and 99 transitions. [2018-11-23 14:31:36,119 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2018-11-23 14:31:36,119 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 14:31:36,119 INFO L402 BasicCegarLoop]: trace histogram [18, 18, 18, 17, 17, 1, 1, 1, 1, 1, 1] [2018-11-23 14:31:36,119 INFO L423 AbstractCegarLoop]: === Iteration 38 === [mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2018-11-23 14:31:36,119 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 14:31:36,119 INFO L82 PathProgramCache]: Analyzing trace with hash 51629527, now seen corresponding path program 17 times [2018-11-23 14:31:36,119 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 14:31:36,119 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 14:31:36,120 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 14:31:36,120 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-23 14:31:36,120 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 14:31:36,126 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 14:31:36,307 INFO L134 CoverageAnalysis]: Checked inductivity of 748 backedges. 0 proven. 748 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 14:31:36,308 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-23 14:31:36,308 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_5db53c6b-9103-46d2-b960-4341706e456a/bin-2019/uautomizer/z3 Starting monitored process 35 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 35 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-23 14:31:36,320 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-11-23 14:31:36,369 INFO L249 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 18 check-sat command(s) [2018-11-23 14:31:36,369 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-23 14:31:36,372 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 14:31:36,703 INFO L134 CoverageAnalysis]: Checked inductivity of 748 backedges. 0 proven. 748 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 14:31:36,719 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 14:31:36,719 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 19] total 19 [2018-11-23 14:31:36,719 INFO L459 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-11-23 14:31:36,719 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-11-23 14:31:36,719 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=190, Invalid=190, Unknown=0, NotChecked=0, Total=380 [2018-11-23 14:31:36,720 INFO L87 Difference]: Start difference. First operand 99 states and 99 transitions. Second operand 20 states. [2018-11-23 14:31:36,750 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 14:31:36,750 INFO L93 Difference]: Finished difference Result 103 states and 103 transitions. [2018-11-23 14:31:36,750 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-11-23 14:31:36,750 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 94 [2018-11-23 14:31:36,751 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 14:31:36,751 INFO L225 Difference]: With dead ends: 103 [2018-11-23 14:31:36,751 INFO L226 Difference]: Without dead ends: 102 [2018-11-23 14:31:36,751 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 112 GetRequests, 77 SyntacticMatches, 17 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 136 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=190, Invalid=190, Unknown=0, NotChecked=0, Total=380 [2018-11-23 14:31:36,752 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 102 states. [2018-11-23 14:31:36,754 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 102 to 101. [2018-11-23 14:31:36,754 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 101 states. [2018-11-23 14:31:36,755 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 101 states to 101 states and 101 transitions. [2018-11-23 14:31:36,755 INFO L78 Accepts]: Start accepts. Automaton has 101 states and 101 transitions. Word has length 94 [2018-11-23 14:31:36,755 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 14:31:36,755 INFO L480 AbstractCegarLoop]: Abstraction has 101 states and 101 transitions. [2018-11-23 14:31:36,755 INFO L481 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-11-23 14:31:36,755 INFO L276 IsEmpty]: Start isEmpty. Operand 101 states and 101 transitions. [2018-11-23 14:31:36,756 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 98 [2018-11-23 14:31:36,756 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 14:31:36,756 INFO L402 BasicCegarLoop]: trace histogram [19, 18, 18, 18, 18, 1, 1, 1, 1, 1, 1] [2018-11-23 14:31:36,756 INFO L423 AbstractCegarLoop]: === Iteration 39 === [mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2018-11-23 14:31:36,756 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 14:31:36,757 INFO L82 PathProgramCache]: Analyzing trace with hash 496997278, now seen corresponding path program 18 times [2018-11-23 14:31:36,757 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 14:31:36,757 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 14:31:36,757 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 14:31:36,758 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-23 14:31:36,758 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 14:31:36,763 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 14:31:36,966 INFO L134 CoverageAnalysis]: Checked inductivity of 801 backedges. 0 proven. 801 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 14:31:36,966 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-23 14:31:36,966 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_5db53c6b-9103-46d2-b960-4341706e456a/bin-2019/uautomizer/z3 Starting monitored process 36 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 36 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-23 14:31:36,972 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-11-23 14:31:36,992 INFO L249 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 19 check-sat command(s) [2018-11-23 14:31:36,992 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-23 14:31:36,994 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 14:31:37,209 INFO L134 CoverageAnalysis]: Checked inductivity of 801 backedges. 0 proven. 801 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 14:31:37,223 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 14:31:37,223 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [20, 20] total 20 [2018-11-23 14:31:37,223 INFO L459 AbstractCegarLoop]: Interpolant automaton has 21 states [2018-11-23 14:31:37,223 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2018-11-23 14:31:37,223 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=210, Invalid=210, Unknown=0, NotChecked=0, Total=420 [2018-11-23 14:31:37,224 INFO L87 Difference]: Start difference. First operand 101 states and 101 transitions. Second operand 21 states. [2018-11-23 14:31:37,259 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 14:31:37,259 INFO L93 Difference]: Finished difference Result 106 states and 106 transitions. [2018-11-23 14:31:37,259 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2018-11-23 14:31:37,259 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 97 [2018-11-23 14:31:37,259 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 14:31:37,260 INFO L225 Difference]: With dead ends: 106 [2018-11-23 14:31:37,260 INFO L226 Difference]: Without dead ends: 105 [2018-11-23 14:31:37,260 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 116 GetRequests, 79 SyntacticMatches, 18 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 153 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=210, Invalid=210, Unknown=0, NotChecked=0, Total=420 [2018-11-23 14:31:37,260 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 105 states. [2018-11-23 14:31:37,263 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 105 to 104. [2018-11-23 14:31:37,263 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 104 states. [2018-11-23 14:31:37,263 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 104 states to 104 states and 104 transitions. [2018-11-23 14:31:37,263 INFO L78 Accepts]: Start accepts. Automaton has 104 states and 104 transitions. Word has length 97 [2018-11-23 14:31:37,264 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 14:31:37,264 INFO L480 AbstractCegarLoop]: Abstraction has 104 states and 104 transitions. [2018-11-23 14:31:37,264 INFO L481 AbstractCegarLoop]: Interpolant automaton has 21 states. [2018-11-23 14:31:37,264 INFO L276 IsEmpty]: Start isEmpty. Operand 104 states and 104 transitions. [2018-11-23 14:31:37,264 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 100 [2018-11-23 14:31:37,264 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 14:31:37,264 INFO L402 BasicCegarLoop]: trace histogram [19, 19, 19, 18, 18, 1, 1, 1, 1, 1, 1] [2018-11-23 14:31:37,265 INFO L423 AbstractCegarLoop]: === Iteration 40 === [mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2018-11-23 14:31:37,265 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 14:31:37,265 INFO L82 PathProgramCache]: Analyzing trace with hash 873015808, now seen corresponding path program 18 times [2018-11-23 14:31:37,265 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 14:31:37,265 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 14:31:37,266 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 14:31:37,266 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-23 14:31:37,266 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 14:31:37,270 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 14:31:37,377 INFO L134 CoverageAnalysis]: Checked inductivity of 837 backedges. 0 proven. 837 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 14:31:37,378 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-23 14:31:37,378 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_5db53c6b-9103-46d2-b960-4341706e456a/bin-2019/uautomizer/z3 Starting monitored process 37 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 37 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-23 14:31:37,384 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-11-23 14:31:37,401 INFO L249 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 19 check-sat command(s) [2018-11-23 14:31:37,401 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-23 14:31:37,402 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 14:31:37,584 INFO L134 CoverageAnalysis]: Checked inductivity of 837 backedges. 0 proven. 837 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 14:31:37,598 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 14:31:37,598 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [20, 20] total 20 [2018-11-23 14:31:37,598 INFO L459 AbstractCegarLoop]: Interpolant automaton has 21 states [2018-11-23 14:31:37,598 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2018-11-23 14:31:37,598 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=210, Invalid=210, Unknown=0, NotChecked=0, Total=420 [2018-11-23 14:31:37,599 INFO L87 Difference]: Start difference. First operand 104 states and 104 transitions. Second operand 21 states. [2018-11-23 14:31:37,629 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 14:31:37,629 INFO L93 Difference]: Finished difference Result 108 states and 108 transitions. [2018-11-23 14:31:37,630 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2018-11-23 14:31:37,630 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 99 [2018-11-23 14:31:37,630 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 14:31:37,631 INFO L225 Difference]: With dead ends: 108 [2018-11-23 14:31:37,631 INFO L226 Difference]: Without dead ends: 107 [2018-11-23 14:31:37,631 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 118 GetRequests, 81 SyntacticMatches, 18 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 153 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=210, Invalid=210, Unknown=0, NotChecked=0, Total=420 [2018-11-23 14:31:37,631 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 107 states. [2018-11-23 14:31:37,634 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 107 to 106. [2018-11-23 14:31:37,634 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 106 states. [2018-11-23 14:31:37,634 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 106 states to 106 states and 106 transitions. [2018-11-23 14:31:37,634 INFO L78 Accepts]: Start accepts. Automaton has 106 states and 106 transitions. Word has length 99 [2018-11-23 14:31:37,634 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 14:31:37,635 INFO L480 AbstractCegarLoop]: Abstraction has 106 states and 106 transitions. [2018-11-23 14:31:37,635 INFO L481 AbstractCegarLoop]: Interpolant automaton has 21 states. [2018-11-23 14:31:37,635 INFO L276 IsEmpty]: Start isEmpty. Operand 106 states and 106 transitions. [2018-11-23 14:31:37,635 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 103 [2018-11-23 14:31:37,635 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 14:31:37,635 INFO L402 BasicCegarLoop]: trace histogram [20, 19, 19, 19, 19, 1, 1, 1, 1, 1, 1] [2018-11-23 14:31:37,635 INFO L423 AbstractCegarLoop]: === Iteration 41 === [mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2018-11-23 14:31:37,636 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 14:31:37,636 INFO L82 PathProgramCache]: Analyzing trace with hash 1987009237, now seen corresponding path program 19 times [2018-11-23 14:31:37,636 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 14:31:37,636 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 14:31:37,636 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 14:31:37,636 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-23 14:31:37,637 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 14:31:37,640 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 14:31:37,789 INFO L134 CoverageAnalysis]: Checked inductivity of 893 backedges. 0 proven. 893 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 14:31:37,790 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-23 14:31:37,790 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_5db53c6b-9103-46d2-b960-4341706e456a/bin-2019/uautomizer/z3 Starting monitored process 38 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 38 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-23 14:31:37,796 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 14:31:37,809 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 14:31:37,811 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 14:31:38,036 INFO L134 CoverageAnalysis]: Checked inductivity of 893 backedges. 0 proven. 893 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 14:31:38,060 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 14:31:38,060 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [21, 21] total 21 [2018-11-23 14:31:38,061 INFO L459 AbstractCegarLoop]: Interpolant automaton has 22 states [2018-11-23 14:31:38,061 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2018-11-23 14:31:38,061 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=231, Invalid=231, Unknown=0, NotChecked=0, Total=462 [2018-11-23 14:31:38,061 INFO L87 Difference]: Start difference. First operand 106 states and 106 transitions. Second operand 22 states. [2018-11-23 14:31:38,115 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 14:31:38,115 INFO L93 Difference]: Finished difference Result 111 states and 111 transitions. [2018-11-23 14:31:38,117 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2018-11-23 14:31:38,117 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 102 [2018-11-23 14:31:38,117 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 14:31:38,117 INFO L225 Difference]: With dead ends: 111 [2018-11-23 14:31:38,117 INFO L226 Difference]: Without dead ends: 110 [2018-11-23 14:31:38,118 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 122 GetRequests, 83 SyntacticMatches, 19 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 171 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=231, Invalid=231, Unknown=0, NotChecked=0, Total=462 [2018-11-23 14:31:38,118 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 110 states. [2018-11-23 14:31:38,121 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 110 to 109. [2018-11-23 14:31:38,121 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 109 states. [2018-11-23 14:31:38,121 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 109 states to 109 states and 109 transitions. [2018-11-23 14:31:38,122 INFO L78 Accepts]: Start accepts. Automaton has 109 states and 109 transitions. Word has length 102 [2018-11-23 14:31:38,122 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 14:31:38,122 INFO L480 AbstractCegarLoop]: Abstraction has 109 states and 109 transitions. [2018-11-23 14:31:38,122 INFO L481 AbstractCegarLoop]: Interpolant automaton has 22 states. [2018-11-23 14:31:38,122 INFO L276 IsEmpty]: Start isEmpty. Operand 109 states and 109 transitions. [2018-11-23 14:31:38,123 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 105 [2018-11-23 14:31:38,123 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 14:31:38,123 INFO L402 BasicCegarLoop]: trace histogram [20, 20, 20, 19, 19, 1, 1, 1, 1, 1, 1] [2018-11-23 14:31:38,123 INFO L423 AbstractCegarLoop]: === Iteration 42 === [mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2018-11-23 14:31:38,123 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 14:31:38,123 INFO L82 PathProgramCache]: Analyzing trace with hash -1744568457, now seen corresponding path program 19 times [2018-11-23 14:31:38,124 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 14:31:38,124 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 14:31:38,124 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 14:31:38,124 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 14:31:38,125 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 14:31:38,129 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-23 14:31:38,138 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-23 14:31:38,155 INFO L469 BasicCegarLoop]: Counterexample might be feasible ----- class de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder.RCFGBacktranslator [?] CALL call ULTIMATE.init(); [?] assume true; [?] RET #28#return; [?] CALL call #t~ret0 := main(); [?] havoc ~x~0;havoc ~y~0;~x~0 := 1;~y~0 := 1; VAL [main_~x~0=1, main_~y~0=1] [?] assume !!(~x~0 >= 0); VAL [main_~x~0=1, main_~y~0=1] [?] assume 2 * ~x~0 <= 2147483647; VAL [main_~x~0=1, main_~y~0=1] [?] assume 2 * ~x~0 >= -2147483648;~x~0 := 2 * ~x~0; VAL [main_~x~0=2, main_~y~0=1] [?] assume 3 * ~y~0 <= 2147483647; VAL [main_~x~0=2, main_~y~0=1] [?] assume 3 * ~y~0 >= -2147483648;~y~0 := 3 * ~y~0; VAL [main_~x~0=2, main_~y~0=3] [?] assume !!(~x~0 >= 0); VAL [main_~x~0=2, main_~y~0=3] [?] assume 2 * ~x~0 <= 2147483647; VAL [main_~x~0=2, main_~y~0=3] [?] assume 2 * ~x~0 >= -2147483648;~x~0 := 2 * ~x~0; VAL [main_~x~0=4, main_~y~0=3] [?] assume 3 * ~y~0 <= 2147483647; VAL [main_~x~0=4, main_~y~0=3] [?] assume 3 * ~y~0 >= -2147483648;~y~0 := 3 * ~y~0; VAL [main_~x~0=4, main_~y~0=9] [?] assume !!(~x~0 >= 0); VAL [main_~x~0=4, main_~y~0=9] [?] assume 2 * ~x~0 <= 2147483647; VAL [main_~x~0=4, main_~y~0=9] [?] assume 2 * ~x~0 >= -2147483648;~x~0 := 2 * ~x~0; VAL [main_~x~0=8, main_~y~0=9] [?] assume 3 * ~y~0 <= 2147483647; VAL [main_~x~0=8, main_~y~0=9] [?] assume 3 * ~y~0 >= -2147483648;~y~0 := 3 * ~y~0; VAL [main_~x~0=8, main_~y~0=27] [?] assume !!(~x~0 >= 0); VAL [main_~x~0=8, main_~y~0=27] [?] assume 2 * ~x~0 <= 2147483647; VAL [main_~x~0=8, main_~y~0=27] [?] assume 2 * ~x~0 >= -2147483648;~x~0 := 2 * ~x~0; VAL [main_~x~0=16, main_~y~0=27] [?] assume 3 * ~y~0 <= 2147483647; VAL [main_~x~0=16, main_~y~0=27] [?] assume 3 * ~y~0 >= -2147483648;~y~0 := 3 * ~y~0; VAL [main_~x~0=16, main_~y~0=81] [?] assume !!(~x~0 >= 0); VAL [main_~x~0=16, main_~y~0=81] [?] assume 2 * ~x~0 <= 2147483647; VAL [main_~x~0=16, main_~y~0=81] [?] assume 2 * ~x~0 >= -2147483648;~x~0 := 2 * ~x~0; VAL [main_~x~0=32, main_~y~0=81] [?] assume 3 * ~y~0 <= 2147483647; VAL [main_~x~0=32, main_~y~0=81] [?] assume 3 * ~y~0 >= -2147483648;~y~0 := 3 * ~y~0; VAL [main_~x~0=32, main_~y~0=243] [?] assume !!(~x~0 >= 0); VAL [main_~x~0=32, main_~y~0=243] [?] assume 2 * ~x~0 <= 2147483647; VAL [main_~x~0=32, main_~y~0=243] [?] assume 2 * ~x~0 >= -2147483648;~x~0 := 2 * ~x~0; VAL [main_~x~0=64, main_~y~0=243] [?] assume 3 * ~y~0 <= 2147483647; VAL [main_~x~0=64, main_~y~0=243] [?] assume 3 * ~y~0 >= -2147483648;~y~0 := 3 * ~y~0; VAL [main_~x~0=64, main_~y~0=729] [?] assume !!(~x~0 >= 0); VAL [main_~x~0=64, main_~y~0=729] [?] assume 2 * ~x~0 <= 2147483647; VAL [main_~x~0=64, main_~y~0=729] [?] assume 2 * ~x~0 >= -2147483648;~x~0 := 2 * ~x~0; VAL [main_~x~0=128, main_~y~0=729] [?] assume 3 * ~y~0 <= 2147483647; VAL [main_~x~0=128, main_~y~0=729] [?] assume 3 * ~y~0 >= -2147483648;~y~0 := 3 * ~y~0; VAL [main_~x~0=128, main_~y~0=2187] [?] assume !!(~x~0 >= 0); VAL [main_~x~0=128, main_~y~0=2187] [?] assume 2 * ~x~0 <= 2147483647; VAL [main_~x~0=128, main_~y~0=2187] [?] assume 2 * ~x~0 >= -2147483648;~x~0 := 2 * ~x~0; VAL [main_~x~0=256, main_~y~0=2187] [?] assume 3 * ~y~0 <= 2147483647; VAL [main_~x~0=256, main_~y~0=2187] [?] assume 3 * ~y~0 >= -2147483648;~y~0 := 3 * ~y~0; VAL [main_~x~0=256, main_~y~0=6561] [?] assume !!(~x~0 >= 0); VAL [main_~x~0=256, main_~y~0=6561] [?] assume 2 * ~x~0 <= 2147483647; VAL [main_~x~0=256, main_~y~0=6561] [?] assume 2 * ~x~0 >= -2147483648;~x~0 := 2 * ~x~0; VAL [main_~x~0=512, main_~y~0=6561] [?] assume 3 * ~y~0 <= 2147483647; VAL [main_~x~0=512, main_~y~0=6561] [?] assume 3 * ~y~0 >= -2147483648;~y~0 := 3 * ~y~0; VAL [main_~x~0=512, main_~y~0=19683] [?] assume !!(~x~0 >= 0); VAL [main_~x~0=512, main_~y~0=19683] [?] assume 2 * ~x~0 <= 2147483647; VAL [main_~x~0=512, main_~y~0=19683] [?] assume 2 * ~x~0 >= -2147483648;~x~0 := 2 * ~x~0; VAL [main_~x~0=1024, main_~y~0=19683] [?] assume 3 * ~y~0 <= 2147483647; VAL [main_~x~0=1024, main_~y~0=19683] [?] assume 3 * ~y~0 >= -2147483648;~y~0 := 3 * ~y~0; VAL [main_~x~0=1024, main_~y~0=59049] [?] assume !!(~x~0 >= 0); VAL [main_~x~0=1024, main_~y~0=59049] [?] assume 2 * ~x~0 <= 2147483647; VAL [main_~x~0=1024, main_~y~0=59049] [?] assume 2 * ~x~0 >= -2147483648;~x~0 := 2 * ~x~0; VAL [main_~x~0=2048, main_~y~0=59049] [?] assume 3 * ~y~0 <= 2147483647; VAL [main_~x~0=2048, main_~y~0=59049] [?] assume 3 * ~y~0 >= -2147483648;~y~0 := 3 * ~y~0; VAL [main_~x~0=2048, main_~y~0=177147] [?] assume !!(~x~0 >= 0); VAL [main_~x~0=2048, main_~y~0=177147] [?] assume 2 * ~x~0 <= 2147483647; VAL [main_~x~0=2048, main_~y~0=177147] [?] assume 2 * ~x~0 >= -2147483648;~x~0 := 2 * ~x~0; VAL [main_~x~0=4096, main_~y~0=177147] [?] assume 3 * ~y~0 <= 2147483647; VAL [main_~x~0=4096, main_~y~0=177147] [?] assume 3 * ~y~0 >= -2147483648;~y~0 := 3 * ~y~0; VAL [main_~x~0=4096, main_~y~0=531441] [?] assume !!(~x~0 >= 0); VAL [main_~x~0=4096, main_~y~0=531441] [?] assume 2 * ~x~0 <= 2147483647; VAL [main_~x~0=4096, main_~y~0=531441] [?] assume 2 * ~x~0 >= -2147483648;~x~0 := 2 * ~x~0; VAL [main_~x~0=8192, main_~y~0=531441] [?] assume 3 * ~y~0 <= 2147483647; VAL [main_~x~0=8192, main_~y~0=531441] [?] assume 3 * ~y~0 >= -2147483648;~y~0 := 3 * ~y~0; VAL [main_~x~0=8192, main_~y~0=1594323] [?] assume !!(~x~0 >= 0); VAL [main_~x~0=8192, main_~y~0=1594323] [?] assume 2 * ~x~0 <= 2147483647; VAL [main_~x~0=8192, main_~y~0=1594323] [?] assume 2 * ~x~0 >= -2147483648;~x~0 := 2 * ~x~0; VAL [main_~x~0=16384, main_~y~0=1594323] [?] assume 3 * ~y~0 <= 2147483647; VAL [main_~x~0=16384, main_~y~0=1594323] [?] assume 3 * ~y~0 >= -2147483648;~y~0 := 3 * ~y~0; VAL [main_~x~0=16384, main_~y~0=4782969] [?] assume !!(~x~0 >= 0); VAL [main_~x~0=16384, main_~y~0=4782969] [?] assume 2 * ~x~0 <= 2147483647; VAL [main_~x~0=16384, main_~y~0=4782969] [?] assume 2 * ~x~0 >= -2147483648;~x~0 := 2 * ~x~0; VAL [main_~x~0=32768, main_~y~0=4782969] [?] assume 3 * ~y~0 <= 2147483647; VAL [main_~x~0=32768, main_~y~0=4782969] [?] assume 3 * ~y~0 >= -2147483648;~y~0 := 3 * ~y~0; VAL [main_~x~0=32768, main_~y~0=14348907] [?] assume !!(~x~0 >= 0); VAL [main_~x~0=32768, main_~y~0=14348907] [?] assume 2 * ~x~0 <= 2147483647; VAL [main_~x~0=32768, main_~y~0=14348907] [?] assume 2 * ~x~0 >= -2147483648;~x~0 := 2 * ~x~0; VAL [main_~x~0=65536, main_~y~0=14348907] [?] assume 3 * ~y~0 <= 2147483647; VAL [main_~x~0=65536, main_~y~0=14348907] [?] assume 3 * ~y~0 >= -2147483648;~y~0 := 3 * ~y~0; VAL [main_~x~0=65536, main_~y~0=43046721] [?] assume !!(~x~0 >= 0); VAL [main_~x~0=65536, main_~y~0=43046721] [?] assume 2 * ~x~0 <= 2147483647; VAL [main_~x~0=65536, main_~y~0=43046721] [?] assume 2 * ~x~0 >= -2147483648;~x~0 := 2 * ~x~0; VAL [main_~x~0=131072, main_~y~0=43046721] [?] assume 3 * ~y~0 <= 2147483647; VAL [main_~x~0=131072, main_~y~0=43046721] [?] assume 3 * ~y~0 >= -2147483648;~y~0 := 3 * ~y~0; VAL [main_~x~0=131072, main_~y~0=129140163] [?] assume !!(~x~0 >= 0); VAL [main_~x~0=131072, main_~y~0=129140163] [?] assume 2 * ~x~0 <= 2147483647; VAL [main_~x~0=131072, main_~y~0=129140163] [?] assume 2 * ~x~0 >= -2147483648;~x~0 := 2 * ~x~0; VAL [main_~x~0=262144, main_~y~0=129140163] [?] assume 3 * ~y~0 <= 2147483647; VAL [main_~x~0=262144, main_~y~0=129140163] [?] assume 3 * ~y~0 >= -2147483648;~y~0 := 3 * ~y~0; VAL [main_~x~0=262144, main_~y~0=387420489] [?] assume !!(~x~0 >= 0); VAL [main_~x~0=262144, main_~y~0=387420489] [?] assume 2 * ~x~0 <= 2147483647; VAL [main_~x~0=262144, main_~y~0=387420489] [?] assume 2 * ~x~0 >= -2147483648;~x~0 := 2 * ~x~0; VAL [main_~x~0=524288, main_~y~0=387420489] [?] assume 3 * ~y~0 <= 2147483647; VAL [main_~x~0=524288, main_~y~0=387420489] [?] assume 3 * ~y~0 >= -2147483648;~y~0 := 3 * ~y~0; VAL [main_~x~0=524288, main_~y~0=1162261467] [?] assume !!(~x~0 >= 0); VAL [main_~x~0=524288, main_~y~0=1162261467] [?] assume 2 * ~x~0 <= 2147483647; VAL [main_~x~0=524288, main_~y~0=1162261467] [?] assume 2 * ~x~0 >= -2147483648;~x~0 := 2 * ~x~0; VAL [main_~x~0=1048576, main_~y~0=1162261467] [?] assume !(3 * ~y~0 <= 2147483647); VAL [main_~x~0=1048576, main_~y~0=1162261467] [?] CALL call ULTIMATE.init(); [?] ensures true; [?] RET call ULTIMATE.init(); [?] CALL call #t~ret0 := main(); [L15] havoc ~x~0; [L15] havoc ~y~0; [L16] ~x~0 := 1; [L17] ~y~0 := 1; VAL [~x~0=1, ~y~0=1] [L18-L21] assume !!(~x~0 >= 0); VAL [~x~0=1, ~y~0=1] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=1, ~y~0=1] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=2, ~y~0=1] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=2, ~y~0=1] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=2, ~y~0=3] [L18-L21] assume !!(~x~0 >= 0); VAL [~x~0=2, ~y~0=3] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=2, ~y~0=3] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=4, ~y~0=3] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=4, ~y~0=3] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=4, ~y~0=9] [L18-L21] assume !!(~x~0 >= 0); VAL [~x~0=4, ~y~0=9] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=4, ~y~0=9] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=8, ~y~0=9] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=8, ~y~0=9] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=8, ~y~0=27] [L18-L21] assume !!(~x~0 >= 0); VAL [~x~0=8, ~y~0=27] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=8, ~y~0=27] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=16, ~y~0=27] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=16, ~y~0=27] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=16, ~y~0=81] [L18-L21] assume !!(~x~0 >= 0); VAL [~x~0=16, ~y~0=81] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=16, ~y~0=81] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=32, ~y~0=81] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=32, ~y~0=81] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=32, ~y~0=243] [L18-L21] assume !!(~x~0 >= 0); VAL [~x~0=32, ~y~0=243] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=32, ~y~0=243] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=64, ~y~0=243] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=64, ~y~0=243] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=64, ~y~0=729] [L18-L21] assume !!(~x~0 >= 0); VAL [~x~0=64, ~y~0=729] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=64, ~y~0=729] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=128, ~y~0=729] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=128, ~y~0=729] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=128, ~y~0=2187] [L18-L21] assume !!(~x~0 >= 0); VAL [~x~0=128, ~y~0=2187] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=128, ~y~0=2187] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=256, ~y~0=2187] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=256, ~y~0=2187] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=256, ~y~0=6561] [L18-L21] assume !!(~x~0 >= 0); VAL [~x~0=256, ~y~0=6561] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=256, ~y~0=6561] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=512, ~y~0=6561] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=512, ~y~0=6561] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=512, ~y~0=19683] [L18-L21] assume !!(~x~0 >= 0); VAL [~x~0=512, ~y~0=19683] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=512, ~y~0=19683] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=1024, ~y~0=19683] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=1024, ~y~0=19683] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=1024, ~y~0=59049] [L18-L21] assume !!(~x~0 >= 0); VAL [~x~0=1024, ~y~0=59049] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=1024, ~y~0=59049] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=2048, ~y~0=59049] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=2048, ~y~0=59049] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=2048, ~y~0=177147] [L18-L21] assume !!(~x~0 >= 0); VAL [~x~0=2048, ~y~0=177147] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=2048, ~y~0=177147] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=4096, ~y~0=177147] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=4096, ~y~0=177147] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=4096, ~y~0=531441] [L18-L21] assume !!(~x~0 >= 0); VAL [~x~0=4096, ~y~0=531441] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=4096, ~y~0=531441] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=8192, ~y~0=531441] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=8192, ~y~0=531441] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=8192, ~y~0=1594323] [L18-L21] assume !!(~x~0 >= 0); VAL [~x~0=8192, ~y~0=1594323] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=8192, ~y~0=1594323] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=16384, ~y~0=1594323] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=16384, ~y~0=1594323] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=16384, ~y~0=4782969] [L18-L21] assume !!(~x~0 >= 0); VAL [~x~0=16384, ~y~0=4782969] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=16384, ~y~0=4782969] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=32768, ~y~0=4782969] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=32768, ~y~0=4782969] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=32768, ~y~0=14348907] [L18-L21] assume !!(~x~0 >= 0); VAL [~x~0=32768, ~y~0=14348907] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=32768, ~y~0=14348907] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=65536, ~y~0=14348907] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=65536, ~y~0=14348907] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=65536, ~y~0=43046721] [L18-L21] assume !!(~x~0 >= 0); VAL [~x~0=65536, ~y~0=43046721] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=65536, ~y~0=43046721] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=131072, ~y~0=43046721] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=131072, ~y~0=43046721] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=131072, ~y~0=129140163] [L18-L21] assume !!(~x~0 >= 0); VAL [~x~0=131072, ~y~0=129140163] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=131072, ~y~0=129140163] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=262144, ~y~0=129140163] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=262144, ~y~0=129140163] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=262144, ~y~0=387420489] [L18-L21] assume !!(~x~0 >= 0); VAL [~x~0=262144, ~y~0=387420489] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=262144, ~y~0=387420489] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=524288, ~y~0=387420489] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=524288, ~y~0=387420489] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=524288, ~y~0=1162261467] [L18-L21] assume !!(~x~0 >= 0); VAL [~x~0=524288, ~y~0=1162261467] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=524288, ~y~0=1162261467] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=1048576, ~y~0=1162261467] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=1048576, ~y~0=1162261467] ----- ----- class de.uni_freiburg.informatik.ultimate.boogie.preprocessor.BoogiePreprocessorBacktranslator [?] CALL call ULTIMATE.init(); [?] ensures true; [?] RET call ULTIMATE.init(); [?] CALL call #t~ret0 := main(); [L15] havoc ~x~0; [L15] havoc ~y~0; [L16] ~x~0 := 1; [L17] ~y~0 := 1; VAL [~x~0=1, ~y~0=1] [L18-L21] assume !!(~x~0 >= 0); VAL [~x~0=1, ~y~0=1] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=1, ~y~0=1] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=2, ~y~0=1] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=2, ~y~0=1] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=2, ~y~0=3] [L18-L21] assume !!(~x~0 >= 0); VAL [~x~0=2, ~y~0=3] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=2, ~y~0=3] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=4, ~y~0=3] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=4, ~y~0=3] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=4, ~y~0=9] [L18-L21] assume !!(~x~0 >= 0); VAL [~x~0=4, ~y~0=9] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=4, ~y~0=9] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=8, ~y~0=9] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=8, ~y~0=9] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=8, ~y~0=27] [L18-L21] assume !!(~x~0 >= 0); VAL [~x~0=8, ~y~0=27] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=8, ~y~0=27] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=16, ~y~0=27] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=16, ~y~0=27] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=16, ~y~0=81] [L18-L21] assume !!(~x~0 >= 0); VAL [~x~0=16, ~y~0=81] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=16, ~y~0=81] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=32, ~y~0=81] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=32, ~y~0=81] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=32, ~y~0=243] [L18-L21] assume !!(~x~0 >= 0); VAL [~x~0=32, ~y~0=243] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=32, ~y~0=243] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=64, ~y~0=243] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=64, ~y~0=243] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=64, ~y~0=729] [L18-L21] assume !!(~x~0 >= 0); VAL [~x~0=64, ~y~0=729] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=64, ~y~0=729] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=128, ~y~0=729] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=128, ~y~0=729] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=128, ~y~0=2187] [L18-L21] assume !!(~x~0 >= 0); VAL [~x~0=128, ~y~0=2187] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=128, ~y~0=2187] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=256, ~y~0=2187] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=256, ~y~0=2187] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=256, ~y~0=6561] [L18-L21] assume !!(~x~0 >= 0); VAL [~x~0=256, ~y~0=6561] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=256, ~y~0=6561] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=512, ~y~0=6561] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=512, ~y~0=6561] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=512, ~y~0=19683] [L18-L21] assume !!(~x~0 >= 0); VAL [~x~0=512, ~y~0=19683] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=512, ~y~0=19683] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=1024, ~y~0=19683] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=1024, ~y~0=19683] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=1024, ~y~0=59049] [L18-L21] assume !!(~x~0 >= 0); VAL [~x~0=1024, ~y~0=59049] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=1024, ~y~0=59049] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=2048, ~y~0=59049] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=2048, ~y~0=59049] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=2048, ~y~0=177147] [L18-L21] assume !!(~x~0 >= 0); VAL [~x~0=2048, ~y~0=177147] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=2048, ~y~0=177147] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=4096, ~y~0=177147] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=4096, ~y~0=177147] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=4096, ~y~0=531441] [L18-L21] assume !!(~x~0 >= 0); VAL [~x~0=4096, ~y~0=531441] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=4096, ~y~0=531441] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=8192, ~y~0=531441] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=8192, ~y~0=531441] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=8192, ~y~0=1594323] [L18-L21] assume !!(~x~0 >= 0); VAL [~x~0=8192, ~y~0=1594323] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=8192, ~y~0=1594323] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=16384, ~y~0=1594323] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=16384, ~y~0=1594323] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=16384, ~y~0=4782969] [L18-L21] assume !!(~x~0 >= 0); VAL [~x~0=16384, ~y~0=4782969] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=16384, ~y~0=4782969] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=32768, ~y~0=4782969] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=32768, ~y~0=4782969] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=32768, ~y~0=14348907] [L18-L21] assume !!(~x~0 >= 0); VAL [~x~0=32768, ~y~0=14348907] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=32768, ~y~0=14348907] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=65536, ~y~0=14348907] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=65536, ~y~0=14348907] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=65536, ~y~0=43046721] [L18-L21] assume !!(~x~0 >= 0); VAL [~x~0=65536, ~y~0=43046721] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=65536, ~y~0=43046721] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=131072, ~y~0=43046721] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=131072, ~y~0=43046721] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=131072, ~y~0=129140163] [L18-L21] assume !!(~x~0 >= 0); VAL [~x~0=131072, ~y~0=129140163] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=131072, ~y~0=129140163] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=262144, ~y~0=129140163] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=262144, ~y~0=129140163] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=262144, ~y~0=387420489] [L18-L21] assume !!(~x~0 >= 0); VAL [~x~0=262144, ~y~0=387420489] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=262144, ~y~0=387420489] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=524288, ~y~0=387420489] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=524288, ~y~0=387420489] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=524288, ~y~0=1162261467] [L18-L21] assume !!(~x~0 >= 0); VAL [~x~0=524288, ~y~0=1162261467] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=524288, ~y~0=1162261467] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=1048576, ~y~0=1162261467] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=1048576, ~y~0=1162261467] [?] CALL call ULTIMATE.init(); [?] RET call ULTIMATE.init(); [?] CALL call #t~ret0 := main(); [L15] havoc ~x~0; [L15] havoc ~y~0; [L16] ~x~0 := 1; [L17] ~y~0 := 1; VAL [~x~0=1, ~y~0=1] [L18-L21] COND FALSE !(!(~x~0 >= 0)) VAL [~x~0=1, ~y~0=1] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=1, ~y~0=1] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=2, ~y~0=1] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=2, ~y~0=1] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=2, ~y~0=3] [L18-L21] COND FALSE !(!(~x~0 >= 0)) VAL [~x~0=2, ~y~0=3] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=2, ~y~0=3] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=4, ~y~0=3] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=4, ~y~0=3] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=4, ~y~0=9] [L18-L21] COND FALSE !(!(~x~0 >= 0)) VAL [~x~0=4, ~y~0=9] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=4, ~y~0=9] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=8, ~y~0=9] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=8, ~y~0=9] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=8, ~y~0=27] [L18-L21] COND FALSE !(!(~x~0 >= 0)) VAL [~x~0=8, ~y~0=27] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=8, ~y~0=27] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=16, ~y~0=27] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=16, ~y~0=27] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=16, ~y~0=81] [L18-L21] COND FALSE !(!(~x~0 >= 0)) VAL [~x~0=16, ~y~0=81] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=16, ~y~0=81] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=32, ~y~0=81] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=32, ~y~0=81] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=32, ~y~0=243] [L18-L21] COND FALSE !(!(~x~0 >= 0)) VAL [~x~0=32, ~y~0=243] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=32, ~y~0=243] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=64, ~y~0=243] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=64, ~y~0=243] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=64, ~y~0=729] [L18-L21] COND FALSE !(!(~x~0 >= 0)) VAL [~x~0=64, ~y~0=729] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=64, ~y~0=729] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=128, ~y~0=729] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=128, ~y~0=729] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=128, ~y~0=2187] [L18-L21] COND FALSE !(!(~x~0 >= 0)) VAL [~x~0=128, ~y~0=2187] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=128, ~y~0=2187] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=256, ~y~0=2187] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=256, ~y~0=2187] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=256, ~y~0=6561] [L18-L21] COND FALSE !(!(~x~0 >= 0)) VAL [~x~0=256, ~y~0=6561] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=256, ~y~0=6561] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=512, ~y~0=6561] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=512, ~y~0=6561] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=512, ~y~0=19683] [L18-L21] COND FALSE !(!(~x~0 >= 0)) VAL [~x~0=512, ~y~0=19683] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=512, ~y~0=19683] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=1024, ~y~0=19683] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=1024, ~y~0=19683] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=1024, ~y~0=59049] [L18-L21] COND FALSE !(!(~x~0 >= 0)) VAL [~x~0=1024, ~y~0=59049] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=1024, ~y~0=59049] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=2048, ~y~0=59049] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=2048, ~y~0=59049] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=2048, ~y~0=177147] [L18-L21] COND FALSE !(!(~x~0 >= 0)) VAL [~x~0=2048, ~y~0=177147] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=2048, ~y~0=177147] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=4096, ~y~0=177147] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=4096, ~y~0=177147] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=4096, ~y~0=531441] [L18-L21] COND FALSE !(!(~x~0 >= 0)) VAL [~x~0=4096, ~y~0=531441] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=4096, ~y~0=531441] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=8192, ~y~0=531441] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=8192, ~y~0=531441] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=8192, ~y~0=1594323] [L18-L21] COND FALSE !(!(~x~0 >= 0)) VAL [~x~0=8192, ~y~0=1594323] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=8192, ~y~0=1594323] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=16384, ~y~0=1594323] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=16384, ~y~0=1594323] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=16384, ~y~0=4782969] [L18-L21] COND FALSE !(!(~x~0 >= 0)) VAL [~x~0=16384, ~y~0=4782969] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=16384, ~y~0=4782969] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=32768, ~y~0=4782969] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=32768, ~y~0=4782969] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=32768, ~y~0=14348907] [L18-L21] COND FALSE !(!(~x~0 >= 0)) VAL [~x~0=32768, ~y~0=14348907] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=32768, ~y~0=14348907] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=65536, ~y~0=14348907] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=65536, ~y~0=14348907] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=65536, ~y~0=43046721] [L18-L21] COND FALSE !(!(~x~0 >= 0)) VAL [~x~0=65536, ~y~0=43046721] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=65536, ~y~0=43046721] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=131072, ~y~0=43046721] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=131072, ~y~0=43046721] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=131072, ~y~0=129140163] [L18-L21] COND FALSE !(!(~x~0 >= 0)) VAL [~x~0=131072, ~y~0=129140163] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=131072, ~y~0=129140163] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=262144, ~y~0=129140163] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=262144, ~y~0=129140163] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=262144, ~y~0=387420489] [L18-L21] COND FALSE !(!(~x~0 >= 0)) VAL [~x~0=262144, ~y~0=387420489] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=262144, ~y~0=387420489] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=524288, ~y~0=387420489] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=524288, ~y~0=387420489] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=524288, ~y~0=1162261467] [L18-L21] COND FALSE !(!(~x~0 >= 0)) VAL [~x~0=524288, ~y~0=1162261467] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=524288, ~y~0=1162261467] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=1048576, ~y~0=1162261467] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=1048576, ~y~0=1162261467] ----- ----- class de.uni_freiburg.informatik.ultimate.boogie.procedureinliner.backtranslation.InlinerBacktranslator [?] CALL call ULTIMATE.init(); [?] RET call ULTIMATE.init(); [?] CALL call #t~ret0 := main(); [L15] havoc ~x~0; [L15] havoc ~y~0; [L16] ~x~0 := 1; [L17] ~y~0 := 1; VAL [~x~0=1, ~y~0=1] [L18-L21] COND FALSE !(!(~x~0 >= 0)) VAL [~x~0=1, ~y~0=1] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=1, ~y~0=1] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=2, ~y~0=1] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=2, ~y~0=1] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=2, ~y~0=3] [L18-L21] COND FALSE !(!(~x~0 >= 0)) VAL [~x~0=2, ~y~0=3] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=2, ~y~0=3] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=4, ~y~0=3] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=4, ~y~0=3] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=4, ~y~0=9] [L18-L21] COND FALSE !(!(~x~0 >= 0)) VAL [~x~0=4, ~y~0=9] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=4, ~y~0=9] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=8, ~y~0=9] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=8, ~y~0=9] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=8, ~y~0=27] [L18-L21] COND FALSE !(!(~x~0 >= 0)) VAL [~x~0=8, ~y~0=27] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=8, ~y~0=27] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=16, ~y~0=27] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=16, ~y~0=27] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=16, ~y~0=81] [L18-L21] COND FALSE !(!(~x~0 >= 0)) VAL [~x~0=16, ~y~0=81] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=16, ~y~0=81] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=32, ~y~0=81] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=32, ~y~0=81] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=32, ~y~0=243] [L18-L21] COND FALSE !(!(~x~0 >= 0)) VAL [~x~0=32, ~y~0=243] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=32, ~y~0=243] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=64, ~y~0=243] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=64, ~y~0=243] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=64, ~y~0=729] [L18-L21] COND FALSE !(!(~x~0 >= 0)) VAL [~x~0=64, ~y~0=729] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=64, ~y~0=729] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=128, ~y~0=729] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=128, ~y~0=729] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=128, ~y~0=2187] [L18-L21] COND FALSE !(!(~x~0 >= 0)) VAL [~x~0=128, ~y~0=2187] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=128, ~y~0=2187] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=256, ~y~0=2187] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=256, ~y~0=2187] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=256, ~y~0=6561] [L18-L21] COND FALSE !(!(~x~0 >= 0)) VAL [~x~0=256, ~y~0=6561] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=256, ~y~0=6561] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=512, ~y~0=6561] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=512, ~y~0=6561] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=512, ~y~0=19683] [L18-L21] COND FALSE !(!(~x~0 >= 0)) VAL [~x~0=512, ~y~0=19683] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=512, ~y~0=19683] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=1024, ~y~0=19683] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=1024, ~y~0=19683] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=1024, ~y~0=59049] [L18-L21] COND FALSE !(!(~x~0 >= 0)) VAL [~x~0=1024, ~y~0=59049] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=1024, ~y~0=59049] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=2048, ~y~0=59049] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=2048, ~y~0=59049] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=2048, ~y~0=177147] [L18-L21] COND FALSE !(!(~x~0 >= 0)) VAL [~x~0=2048, ~y~0=177147] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=2048, ~y~0=177147] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=4096, ~y~0=177147] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=4096, ~y~0=177147] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=4096, ~y~0=531441] [L18-L21] COND FALSE !(!(~x~0 >= 0)) VAL [~x~0=4096, ~y~0=531441] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=4096, ~y~0=531441] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=8192, ~y~0=531441] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=8192, ~y~0=531441] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=8192, ~y~0=1594323] [L18-L21] COND FALSE !(!(~x~0 >= 0)) VAL [~x~0=8192, ~y~0=1594323] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=8192, ~y~0=1594323] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=16384, ~y~0=1594323] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=16384, ~y~0=1594323] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=16384, ~y~0=4782969] [L18-L21] COND FALSE !(!(~x~0 >= 0)) VAL [~x~0=16384, ~y~0=4782969] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=16384, ~y~0=4782969] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=32768, ~y~0=4782969] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=32768, ~y~0=4782969] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=32768, ~y~0=14348907] [L18-L21] COND FALSE !(!(~x~0 >= 0)) VAL [~x~0=32768, ~y~0=14348907] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=32768, ~y~0=14348907] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=65536, ~y~0=14348907] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=65536, ~y~0=14348907] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=65536, ~y~0=43046721] [L18-L21] COND FALSE !(!(~x~0 >= 0)) VAL [~x~0=65536, ~y~0=43046721] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=65536, ~y~0=43046721] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=131072, ~y~0=43046721] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=131072, ~y~0=43046721] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=131072, ~y~0=129140163] [L18-L21] COND FALSE !(!(~x~0 >= 0)) VAL [~x~0=131072, ~y~0=129140163] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=131072, ~y~0=129140163] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=262144, ~y~0=129140163] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=262144, ~y~0=129140163] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=262144, ~y~0=387420489] [L18-L21] COND FALSE !(!(~x~0 >= 0)) VAL [~x~0=262144, ~y~0=387420489] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=262144, ~y~0=387420489] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=524288, ~y~0=387420489] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=524288, ~y~0=387420489] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=524288, ~y~0=1162261467] [L18-L21] COND FALSE !(!(~x~0 >= 0)) VAL [~x~0=524288, ~y~0=1162261467] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=524288, ~y~0=1162261467] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=1048576, ~y~0=1162261467] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=1048576, ~y~0=1162261467] [?] CALL call ULTIMATE.init(); [?] RET call ULTIMATE.init(); [?] CALL call #t~ret0 := main(); [L15] havoc ~x~0; [L15] havoc ~y~0; [L16] ~x~0 := 1; [L17] ~y~0 := 1; VAL [~x~0=1, ~y~0=1] [L18-L21] COND FALSE !(!(~x~0 >= 0)) VAL [~x~0=1, ~y~0=1] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=1, ~y~0=1] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=2, ~y~0=1] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=2, ~y~0=1] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=2, ~y~0=3] [L18-L21] COND FALSE !(!(~x~0 >= 0)) VAL [~x~0=2, ~y~0=3] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=2, ~y~0=3] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=4, ~y~0=3] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=4, ~y~0=3] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=4, ~y~0=9] [L18-L21] COND FALSE !(!(~x~0 >= 0)) VAL [~x~0=4, ~y~0=9] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=4, ~y~0=9] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=8, ~y~0=9] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=8, ~y~0=9] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=8, ~y~0=27] [L18-L21] COND FALSE !(!(~x~0 >= 0)) VAL [~x~0=8, ~y~0=27] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=8, ~y~0=27] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=16, ~y~0=27] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=16, ~y~0=27] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=16, ~y~0=81] [L18-L21] COND FALSE !(!(~x~0 >= 0)) VAL [~x~0=16, ~y~0=81] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=16, ~y~0=81] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=32, ~y~0=81] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=32, ~y~0=81] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=32, ~y~0=243] [L18-L21] COND FALSE !(!(~x~0 >= 0)) VAL [~x~0=32, ~y~0=243] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=32, ~y~0=243] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=64, ~y~0=243] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=64, ~y~0=243] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=64, ~y~0=729] [L18-L21] COND FALSE !(!(~x~0 >= 0)) VAL [~x~0=64, ~y~0=729] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=64, ~y~0=729] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=128, ~y~0=729] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=128, ~y~0=729] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=128, ~y~0=2187] [L18-L21] COND FALSE !(!(~x~0 >= 0)) VAL [~x~0=128, ~y~0=2187] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=128, ~y~0=2187] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=256, ~y~0=2187] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=256, ~y~0=2187] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=256, ~y~0=6561] [L18-L21] COND FALSE !(!(~x~0 >= 0)) VAL [~x~0=256, ~y~0=6561] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=256, ~y~0=6561] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=512, ~y~0=6561] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=512, ~y~0=6561] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=512, ~y~0=19683] [L18-L21] COND FALSE !(!(~x~0 >= 0)) VAL [~x~0=512, ~y~0=19683] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=512, ~y~0=19683] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=1024, ~y~0=19683] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=1024, ~y~0=19683] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=1024, ~y~0=59049] [L18-L21] COND FALSE !(!(~x~0 >= 0)) VAL [~x~0=1024, ~y~0=59049] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=1024, ~y~0=59049] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=2048, ~y~0=59049] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=2048, ~y~0=59049] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=2048, ~y~0=177147] [L18-L21] COND FALSE !(!(~x~0 >= 0)) VAL [~x~0=2048, ~y~0=177147] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=2048, ~y~0=177147] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=4096, ~y~0=177147] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=4096, ~y~0=177147] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=4096, ~y~0=531441] [L18-L21] COND FALSE !(!(~x~0 >= 0)) VAL [~x~0=4096, ~y~0=531441] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=4096, ~y~0=531441] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=8192, ~y~0=531441] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=8192, ~y~0=531441] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=8192, ~y~0=1594323] [L18-L21] COND FALSE !(!(~x~0 >= 0)) VAL [~x~0=8192, ~y~0=1594323] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=8192, ~y~0=1594323] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=16384, ~y~0=1594323] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=16384, ~y~0=1594323] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=16384, ~y~0=4782969] [L18-L21] COND FALSE !(!(~x~0 >= 0)) VAL [~x~0=16384, ~y~0=4782969] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=16384, ~y~0=4782969] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=32768, ~y~0=4782969] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=32768, ~y~0=4782969] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=32768, ~y~0=14348907] [L18-L21] COND FALSE !(!(~x~0 >= 0)) VAL [~x~0=32768, ~y~0=14348907] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=32768, ~y~0=14348907] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=65536, ~y~0=14348907] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=65536, ~y~0=14348907] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=65536, ~y~0=43046721] [L18-L21] COND FALSE !(!(~x~0 >= 0)) VAL [~x~0=65536, ~y~0=43046721] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=65536, ~y~0=43046721] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=131072, ~y~0=43046721] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=131072, ~y~0=43046721] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=131072, ~y~0=129140163] [L18-L21] COND FALSE !(!(~x~0 >= 0)) VAL [~x~0=131072, ~y~0=129140163] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=131072, ~y~0=129140163] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=262144, ~y~0=129140163] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=262144, ~y~0=129140163] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=262144, ~y~0=387420489] [L18-L21] COND FALSE !(!(~x~0 >= 0)) VAL [~x~0=262144, ~y~0=387420489] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=262144, ~y~0=387420489] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=524288, ~y~0=387420489] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=524288, ~y~0=387420489] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=524288, ~y~0=1162261467] [L18-L21] COND FALSE !(!(~x~0 >= 0)) VAL [~x~0=524288, ~y~0=1162261467] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=524288, ~y~0=1162261467] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=1048576, ~y~0=1162261467] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=1048576, ~y~0=1162261467] ----- ----- class de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.CACSL2BoogieBacktranslator [?] CALL call ULTIMATE.init(); [?] RET call ULTIMATE.init(); [?] CALL call #t~ret0 := main(); [L15] havoc ~x~0; [L15] havoc ~y~0; [L16] ~x~0 := 1; [L17] ~y~0 := 1; VAL [~x~0=1, ~y~0=1] [L18-L21] COND FALSE !(!(~x~0 >= 0)) VAL [~x~0=1, ~y~0=1] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=1, ~y~0=1] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=2, ~y~0=1] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=2, ~y~0=1] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=2, ~y~0=3] [L18-L21] COND FALSE !(!(~x~0 >= 0)) VAL [~x~0=2, ~y~0=3] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=2, ~y~0=3] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=4, ~y~0=3] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=4, ~y~0=3] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=4, ~y~0=9] [L18-L21] COND FALSE !(!(~x~0 >= 0)) VAL [~x~0=4, ~y~0=9] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=4, ~y~0=9] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=8, ~y~0=9] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=8, ~y~0=9] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=8, ~y~0=27] [L18-L21] COND FALSE !(!(~x~0 >= 0)) VAL [~x~0=8, ~y~0=27] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=8, ~y~0=27] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=16, ~y~0=27] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=16, ~y~0=27] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=16, ~y~0=81] [L18-L21] COND FALSE !(!(~x~0 >= 0)) VAL [~x~0=16, ~y~0=81] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=16, ~y~0=81] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=32, ~y~0=81] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=32, ~y~0=81] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=32, ~y~0=243] [L18-L21] COND FALSE !(!(~x~0 >= 0)) VAL [~x~0=32, ~y~0=243] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=32, ~y~0=243] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=64, ~y~0=243] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=64, ~y~0=243] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=64, ~y~0=729] [L18-L21] COND FALSE !(!(~x~0 >= 0)) VAL [~x~0=64, ~y~0=729] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=64, ~y~0=729] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=128, ~y~0=729] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=128, ~y~0=729] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=128, ~y~0=2187] [L18-L21] COND FALSE !(!(~x~0 >= 0)) VAL [~x~0=128, ~y~0=2187] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=128, ~y~0=2187] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=256, ~y~0=2187] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=256, ~y~0=2187] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=256, ~y~0=6561] [L18-L21] COND FALSE !(!(~x~0 >= 0)) VAL [~x~0=256, ~y~0=6561] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=256, ~y~0=6561] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=512, ~y~0=6561] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=512, ~y~0=6561] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=512, ~y~0=19683] [L18-L21] COND FALSE !(!(~x~0 >= 0)) VAL [~x~0=512, ~y~0=19683] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=512, ~y~0=19683] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=1024, ~y~0=19683] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=1024, ~y~0=19683] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=1024, ~y~0=59049] [L18-L21] COND FALSE !(!(~x~0 >= 0)) VAL [~x~0=1024, ~y~0=59049] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=1024, ~y~0=59049] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=2048, ~y~0=59049] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=2048, ~y~0=59049] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=2048, ~y~0=177147] [L18-L21] COND FALSE !(!(~x~0 >= 0)) VAL [~x~0=2048, ~y~0=177147] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=2048, ~y~0=177147] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=4096, ~y~0=177147] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=4096, ~y~0=177147] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=4096, ~y~0=531441] [L18-L21] COND FALSE !(!(~x~0 >= 0)) VAL [~x~0=4096, ~y~0=531441] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=4096, ~y~0=531441] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=8192, ~y~0=531441] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=8192, ~y~0=531441] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=8192, ~y~0=1594323] [L18-L21] COND FALSE !(!(~x~0 >= 0)) VAL [~x~0=8192, ~y~0=1594323] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=8192, ~y~0=1594323] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=16384, ~y~0=1594323] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=16384, ~y~0=1594323] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=16384, ~y~0=4782969] [L18-L21] COND FALSE !(!(~x~0 >= 0)) VAL [~x~0=16384, ~y~0=4782969] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=16384, ~y~0=4782969] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=32768, ~y~0=4782969] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=32768, ~y~0=4782969] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=32768, ~y~0=14348907] [L18-L21] COND FALSE !(!(~x~0 >= 0)) VAL [~x~0=32768, ~y~0=14348907] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=32768, ~y~0=14348907] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=65536, ~y~0=14348907] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=65536, ~y~0=14348907] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=65536, ~y~0=43046721] [L18-L21] COND FALSE !(!(~x~0 >= 0)) VAL [~x~0=65536, ~y~0=43046721] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=65536, ~y~0=43046721] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=131072, ~y~0=43046721] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=131072, ~y~0=43046721] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=131072, ~y~0=129140163] [L18-L21] COND FALSE !(!(~x~0 >= 0)) VAL [~x~0=131072, ~y~0=129140163] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=131072, ~y~0=129140163] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=262144, ~y~0=129140163] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=262144, ~y~0=129140163] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=262144, ~y~0=387420489] [L18-L21] COND FALSE !(!(~x~0 >= 0)) VAL [~x~0=262144, ~y~0=387420489] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=262144, ~y~0=387420489] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=524288, ~y~0=387420489] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=524288, ~y~0=387420489] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=524288, ~y~0=1162261467] [L18-L21] COND FALSE !(!(~x~0 >= 0)) VAL [~x~0=524288, ~y~0=1162261467] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=524288, ~y~0=1162261467] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=1048576, ~y~0=1162261467] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=1048576, ~y~0=1162261467] [L15] int x, y; [L16] x = 1 [L17] y = 1 VAL [x=1, y=1] [L18] COND TRUE x >= 0 VAL [x=1, y=1] [L19] EXPR 2*x [L19] x = 2*x VAL [x=2, y=1] [L20] EXPR 3*y [L20] y = 3*y VAL [x=2, y=3] [L18] COND TRUE x >= 0 VAL [x=2, y=3] [L19] EXPR 2*x [L19] x = 2*x VAL [x=4, y=3] [L20] EXPR 3*y [L20] y = 3*y VAL [x=4, y=9] [L18] COND TRUE x >= 0 VAL [x=4, y=9] [L19] EXPR 2*x [L19] x = 2*x VAL [x=8, y=9] [L20] EXPR 3*y [L20] y = 3*y VAL [x=8, y=27] [L18] COND TRUE x >= 0 VAL [x=8, y=27] [L19] EXPR 2*x [L19] x = 2*x VAL [x=16, y=27] [L20] EXPR 3*y [L20] y = 3*y VAL [x=16, y=81] [L18] COND TRUE x >= 0 VAL [x=16, y=81] [L19] EXPR 2*x [L19] x = 2*x VAL [x=32, y=81] [L20] EXPR 3*y [L20] y = 3*y VAL [x=32, y=243] [L18] COND TRUE x >= 0 VAL [x=32, y=243] [L19] EXPR 2*x [L19] x = 2*x VAL [x=64, y=243] [L20] EXPR 3*y [L20] y = 3*y VAL [x=64, y=729] [L18] COND TRUE x >= 0 VAL [x=64, y=729] [L19] EXPR 2*x [L19] x = 2*x VAL [x=128, y=729] [L20] EXPR 3*y [L20] y = 3*y VAL [x=128, y=2187] [L18] COND TRUE x >= 0 VAL [x=128, y=2187] [L19] EXPR 2*x [L19] x = 2*x VAL [x=256, y=2187] [L20] EXPR 3*y [L20] y = 3*y VAL [x=256, y=6561] [L18] COND TRUE x >= 0 VAL [x=256, y=6561] [L19] EXPR 2*x [L19] x = 2*x VAL [x=512, y=6561] [L20] EXPR 3*y [L20] y = 3*y VAL [x=512, y=19683] [L18] COND TRUE x >= 0 VAL [x=512, y=19683] [L19] EXPR 2*x [L19] x = 2*x VAL [x=1024, y=19683] [L20] EXPR 3*y [L20] y = 3*y VAL [x=1024, y=59049] [L18] COND TRUE x >= 0 VAL [x=1024, y=59049] [L19] EXPR 2*x [L19] x = 2*x VAL [x=2048, y=59049] [L20] EXPR 3*y [L20] y = 3*y VAL [x=2048, y=177147] [L18] COND TRUE x >= 0 VAL [x=2048, y=177147] [L19] EXPR 2*x [L19] x = 2*x VAL [x=4096, y=177147] [L20] EXPR 3*y [L20] y = 3*y VAL [x=4096, y=531441] [L18] COND TRUE x >= 0 VAL [x=4096, y=531441] [L19] EXPR 2*x [L19] x = 2*x VAL [x=8192, y=531441] [L20] EXPR 3*y [L20] y = 3*y VAL [x=8192, y=1594323] [L18] COND TRUE x >= 0 VAL [x=8192, y=1594323] [L19] EXPR 2*x [L19] x = 2*x VAL [x=16384, y=1594323] [L20] EXPR 3*y [L20] y = 3*y VAL [x=16384, y=4782969] [L18] COND TRUE x >= 0 VAL [x=16384, y=4782969] [L19] EXPR 2*x [L19] x = 2*x VAL [x=32768, y=4782969] [L20] EXPR 3*y [L20] y = 3*y VAL [x=32768, y=14348907] [L18] COND TRUE x >= 0 VAL [x=32768, y=14348907] [L19] EXPR 2*x [L19] x = 2*x VAL [x=65536, y=14348907] [L20] EXPR 3*y [L20] y = 3*y VAL [x=65536, y=43046721] [L18] COND TRUE x >= 0 VAL [x=65536, y=43046721] [L19] EXPR 2*x [L19] x = 2*x VAL [x=131072, y=43046721] [L20] EXPR 3*y [L20] y = 3*y VAL [x=131072, y=129140163] [L18] COND TRUE x >= 0 VAL [x=131072, y=129140163] [L19] EXPR 2*x [L19] x = 2*x VAL [x=262144, y=129140163] [L20] EXPR 3*y [L20] y = 3*y VAL [x=262144, y=387420489] [L18] COND TRUE x >= 0 VAL [x=262144, y=387420489] [L19] EXPR 2*x [L19] x = 2*x VAL [x=524288, y=387420489] [L20] EXPR 3*y [L20] y = 3*y VAL [x=524288, y=1162261467] [L18] COND TRUE x >= 0 VAL [x=524288, y=1162261467] [L19] EXPR 2*x [L19] x = 2*x VAL [x=1048576, y=1162261467] [L20] 3*y VAL [x=1048576, y=1162261467] ----- [2018-11-23 14:31:38,438 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 23.11 02:31:38 BoogieIcfgContainer [2018-11-23 14:31:38,438 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-11-23 14:31:38,438 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2018-11-23 14:31:38,438 INFO L271 PluginConnector]: Initializing Witness Printer... [2018-11-23 14:31:38,439 INFO L276 PluginConnector]: Witness Printer initialized [2018-11-23 14:31:38,439 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 23.11 02:31:27" (3/4) ... [2018-11-23 14:31:38,443 INFO L138 WitnessPrinter]: Generating witness for reachability counterexample ----- class de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder.RCFGBacktranslator [?] CALL call ULTIMATE.init(); [?] assume true; [?] RET #28#return; [?] CALL call #t~ret0 := main(); [?] havoc ~x~0;havoc ~y~0;~x~0 := 1;~y~0 := 1; VAL [main_~x~0=1, main_~y~0=1] [?] assume !!(~x~0 >= 0); VAL [main_~x~0=1, main_~y~0=1] [?] assume 2 * ~x~0 <= 2147483647; VAL [main_~x~0=1, main_~y~0=1] [?] assume 2 * ~x~0 >= -2147483648;~x~0 := 2 * ~x~0; VAL [main_~x~0=2, main_~y~0=1] [?] assume 3 * ~y~0 <= 2147483647; VAL [main_~x~0=2, main_~y~0=1] [?] assume 3 * ~y~0 >= -2147483648;~y~0 := 3 * ~y~0; VAL [main_~x~0=2, main_~y~0=3] [?] assume !!(~x~0 >= 0); VAL [main_~x~0=2, main_~y~0=3] [?] assume 2 * ~x~0 <= 2147483647; VAL [main_~x~0=2, main_~y~0=3] [?] assume 2 * ~x~0 >= -2147483648;~x~0 := 2 * ~x~0; VAL [main_~x~0=4, main_~y~0=3] [?] assume 3 * ~y~0 <= 2147483647; VAL [main_~x~0=4, main_~y~0=3] [?] assume 3 * ~y~0 >= -2147483648;~y~0 := 3 * ~y~0; VAL [main_~x~0=4, main_~y~0=9] [?] assume !!(~x~0 >= 0); VAL [main_~x~0=4, main_~y~0=9] [?] assume 2 * ~x~0 <= 2147483647; VAL [main_~x~0=4, main_~y~0=9] [?] assume 2 * ~x~0 >= -2147483648;~x~0 := 2 * ~x~0; VAL [main_~x~0=8, main_~y~0=9] [?] assume 3 * ~y~0 <= 2147483647; VAL [main_~x~0=8, main_~y~0=9] [?] assume 3 * ~y~0 >= -2147483648;~y~0 := 3 * ~y~0; VAL [main_~x~0=8, main_~y~0=27] [?] assume !!(~x~0 >= 0); VAL [main_~x~0=8, main_~y~0=27] [?] assume 2 * ~x~0 <= 2147483647; VAL [main_~x~0=8, main_~y~0=27] [?] assume 2 * ~x~0 >= -2147483648;~x~0 := 2 * ~x~0; VAL [main_~x~0=16, main_~y~0=27] [?] assume 3 * ~y~0 <= 2147483647; VAL [main_~x~0=16, main_~y~0=27] [?] assume 3 * ~y~0 >= -2147483648;~y~0 := 3 * ~y~0; VAL [main_~x~0=16, main_~y~0=81] [?] assume !!(~x~0 >= 0); VAL [main_~x~0=16, main_~y~0=81] [?] assume 2 * ~x~0 <= 2147483647; VAL [main_~x~0=16, main_~y~0=81] [?] assume 2 * ~x~0 >= -2147483648;~x~0 := 2 * ~x~0; VAL [main_~x~0=32, main_~y~0=81] [?] assume 3 * ~y~0 <= 2147483647; VAL [main_~x~0=32, main_~y~0=81] [?] assume 3 * ~y~0 >= -2147483648;~y~0 := 3 * ~y~0; VAL [main_~x~0=32, main_~y~0=243] [?] assume !!(~x~0 >= 0); VAL [main_~x~0=32, main_~y~0=243] [?] assume 2 * ~x~0 <= 2147483647; VAL [main_~x~0=32, main_~y~0=243] [?] assume 2 * ~x~0 >= -2147483648;~x~0 := 2 * ~x~0; VAL [main_~x~0=64, main_~y~0=243] [?] assume 3 * ~y~0 <= 2147483647; VAL [main_~x~0=64, main_~y~0=243] [?] assume 3 * ~y~0 >= -2147483648;~y~0 := 3 * ~y~0; VAL [main_~x~0=64, main_~y~0=729] [?] assume !!(~x~0 >= 0); VAL [main_~x~0=64, main_~y~0=729] [?] assume 2 * ~x~0 <= 2147483647; VAL [main_~x~0=64, main_~y~0=729] [?] assume 2 * ~x~0 >= -2147483648;~x~0 := 2 * ~x~0; VAL [main_~x~0=128, main_~y~0=729] [?] assume 3 * ~y~0 <= 2147483647; VAL [main_~x~0=128, main_~y~0=729] [?] assume 3 * ~y~0 >= -2147483648;~y~0 := 3 * ~y~0; VAL [main_~x~0=128, main_~y~0=2187] [?] assume !!(~x~0 >= 0); VAL [main_~x~0=128, main_~y~0=2187] [?] assume 2 * ~x~0 <= 2147483647; VAL [main_~x~0=128, main_~y~0=2187] [?] assume 2 * ~x~0 >= -2147483648;~x~0 := 2 * ~x~0; VAL [main_~x~0=256, main_~y~0=2187] [?] assume 3 * ~y~0 <= 2147483647; VAL [main_~x~0=256, main_~y~0=2187] [?] assume 3 * ~y~0 >= -2147483648;~y~0 := 3 * ~y~0; VAL [main_~x~0=256, main_~y~0=6561] [?] assume !!(~x~0 >= 0); VAL [main_~x~0=256, main_~y~0=6561] [?] assume 2 * ~x~0 <= 2147483647; VAL [main_~x~0=256, main_~y~0=6561] [?] assume 2 * ~x~0 >= -2147483648;~x~0 := 2 * ~x~0; VAL [main_~x~0=512, main_~y~0=6561] [?] assume 3 * ~y~0 <= 2147483647; VAL [main_~x~0=512, main_~y~0=6561] [?] assume 3 * ~y~0 >= -2147483648;~y~0 := 3 * ~y~0; VAL [main_~x~0=512, main_~y~0=19683] [?] assume !!(~x~0 >= 0); VAL [main_~x~0=512, main_~y~0=19683] [?] assume 2 * ~x~0 <= 2147483647; VAL [main_~x~0=512, main_~y~0=19683] [?] assume 2 * ~x~0 >= -2147483648;~x~0 := 2 * ~x~0; VAL [main_~x~0=1024, main_~y~0=19683] [?] assume 3 * ~y~0 <= 2147483647; VAL [main_~x~0=1024, main_~y~0=19683] [?] assume 3 * ~y~0 >= -2147483648;~y~0 := 3 * ~y~0; VAL [main_~x~0=1024, main_~y~0=59049] [?] assume !!(~x~0 >= 0); VAL [main_~x~0=1024, main_~y~0=59049] [?] assume 2 * ~x~0 <= 2147483647; VAL [main_~x~0=1024, main_~y~0=59049] [?] assume 2 * ~x~0 >= -2147483648;~x~0 := 2 * ~x~0; VAL [main_~x~0=2048, main_~y~0=59049] [?] assume 3 * ~y~0 <= 2147483647; VAL [main_~x~0=2048, main_~y~0=59049] [?] assume 3 * ~y~0 >= -2147483648;~y~0 := 3 * ~y~0; VAL [main_~x~0=2048, main_~y~0=177147] [?] assume !!(~x~0 >= 0); VAL [main_~x~0=2048, main_~y~0=177147] [?] assume 2 * ~x~0 <= 2147483647; VAL [main_~x~0=2048, main_~y~0=177147] [?] assume 2 * ~x~0 >= -2147483648;~x~0 := 2 * ~x~0; VAL [main_~x~0=4096, main_~y~0=177147] [?] assume 3 * ~y~0 <= 2147483647; VAL [main_~x~0=4096, main_~y~0=177147] [?] assume 3 * ~y~0 >= -2147483648;~y~0 := 3 * ~y~0; VAL [main_~x~0=4096, main_~y~0=531441] [?] assume !!(~x~0 >= 0); VAL [main_~x~0=4096, main_~y~0=531441] [?] assume 2 * ~x~0 <= 2147483647; VAL [main_~x~0=4096, main_~y~0=531441] [?] assume 2 * ~x~0 >= -2147483648;~x~0 := 2 * ~x~0; VAL [main_~x~0=8192, main_~y~0=531441] [?] assume 3 * ~y~0 <= 2147483647; VAL [main_~x~0=8192, main_~y~0=531441] [?] assume 3 * ~y~0 >= -2147483648;~y~0 := 3 * ~y~0; VAL [main_~x~0=8192, main_~y~0=1594323] [?] assume !!(~x~0 >= 0); VAL [main_~x~0=8192, main_~y~0=1594323] [?] assume 2 * ~x~0 <= 2147483647; VAL [main_~x~0=8192, main_~y~0=1594323] [?] assume 2 * ~x~0 >= -2147483648;~x~0 := 2 * ~x~0; VAL [main_~x~0=16384, main_~y~0=1594323] [?] assume 3 * ~y~0 <= 2147483647; VAL [main_~x~0=16384, main_~y~0=1594323] [?] assume 3 * ~y~0 >= -2147483648;~y~0 := 3 * ~y~0; VAL [main_~x~0=16384, main_~y~0=4782969] [?] assume !!(~x~0 >= 0); VAL [main_~x~0=16384, main_~y~0=4782969] [?] assume 2 * ~x~0 <= 2147483647; VAL [main_~x~0=16384, main_~y~0=4782969] [?] assume 2 * ~x~0 >= -2147483648;~x~0 := 2 * ~x~0; VAL [main_~x~0=32768, main_~y~0=4782969] [?] assume 3 * ~y~0 <= 2147483647; VAL [main_~x~0=32768, main_~y~0=4782969] [?] assume 3 * ~y~0 >= -2147483648;~y~0 := 3 * ~y~0; VAL [main_~x~0=32768, main_~y~0=14348907] [?] assume !!(~x~0 >= 0); VAL [main_~x~0=32768, main_~y~0=14348907] [?] assume 2 * ~x~0 <= 2147483647; VAL [main_~x~0=32768, main_~y~0=14348907] [?] assume 2 * ~x~0 >= -2147483648;~x~0 := 2 * ~x~0; VAL [main_~x~0=65536, main_~y~0=14348907] [?] assume 3 * ~y~0 <= 2147483647; VAL [main_~x~0=65536, main_~y~0=14348907] [?] assume 3 * ~y~0 >= -2147483648;~y~0 := 3 * ~y~0; VAL [main_~x~0=65536, main_~y~0=43046721] [?] assume !!(~x~0 >= 0); VAL [main_~x~0=65536, main_~y~0=43046721] [?] assume 2 * ~x~0 <= 2147483647; VAL [main_~x~0=65536, main_~y~0=43046721] [?] assume 2 * ~x~0 >= -2147483648;~x~0 := 2 * ~x~0; VAL [main_~x~0=131072, main_~y~0=43046721] [?] assume 3 * ~y~0 <= 2147483647; VAL [main_~x~0=131072, main_~y~0=43046721] [?] assume 3 * ~y~0 >= -2147483648;~y~0 := 3 * ~y~0; VAL [main_~x~0=131072, main_~y~0=129140163] [?] assume !!(~x~0 >= 0); VAL [main_~x~0=131072, main_~y~0=129140163] [?] assume 2 * ~x~0 <= 2147483647; VAL [main_~x~0=131072, main_~y~0=129140163] [?] assume 2 * ~x~0 >= -2147483648;~x~0 := 2 * ~x~0; VAL [main_~x~0=262144, main_~y~0=129140163] [?] assume 3 * ~y~0 <= 2147483647; VAL [main_~x~0=262144, main_~y~0=129140163] [?] assume 3 * ~y~0 >= -2147483648;~y~0 := 3 * ~y~0; VAL [main_~x~0=262144, main_~y~0=387420489] [?] assume !!(~x~0 >= 0); VAL [main_~x~0=262144, main_~y~0=387420489] [?] assume 2 * ~x~0 <= 2147483647; VAL [main_~x~0=262144, main_~y~0=387420489] [?] assume 2 * ~x~0 >= -2147483648;~x~0 := 2 * ~x~0; VAL [main_~x~0=524288, main_~y~0=387420489] [?] assume 3 * ~y~0 <= 2147483647; VAL [main_~x~0=524288, main_~y~0=387420489] [?] assume 3 * ~y~0 >= -2147483648;~y~0 := 3 * ~y~0; VAL [main_~x~0=524288, main_~y~0=1162261467] [?] assume !!(~x~0 >= 0); VAL [main_~x~0=524288, main_~y~0=1162261467] [?] assume 2 * ~x~0 <= 2147483647; VAL [main_~x~0=524288, main_~y~0=1162261467] [?] assume 2 * ~x~0 >= -2147483648;~x~0 := 2 * ~x~0; VAL [main_~x~0=1048576, main_~y~0=1162261467] [?] assume !(3 * ~y~0 <= 2147483647); VAL [main_~x~0=1048576, main_~y~0=1162261467] [?] CALL call ULTIMATE.init(); [?] ensures true; [?] RET call ULTIMATE.init(); [?] CALL call #t~ret0 := main(); [L15] havoc ~x~0; [L15] havoc ~y~0; [L16] ~x~0 := 1; [L17] ~y~0 := 1; VAL [~x~0=1, ~y~0=1] [L18-L21] assume !!(~x~0 >= 0); VAL [~x~0=1, ~y~0=1] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=1, ~y~0=1] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=2, ~y~0=1] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=2, ~y~0=1] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=2, ~y~0=3] [L18-L21] assume !!(~x~0 >= 0); VAL [~x~0=2, ~y~0=3] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=2, ~y~0=3] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=4, ~y~0=3] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=4, ~y~0=3] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=4, ~y~0=9] [L18-L21] assume !!(~x~0 >= 0); VAL [~x~0=4, ~y~0=9] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=4, ~y~0=9] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=8, ~y~0=9] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=8, ~y~0=9] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=8, ~y~0=27] [L18-L21] assume !!(~x~0 >= 0); VAL [~x~0=8, ~y~0=27] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=8, ~y~0=27] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=16, ~y~0=27] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=16, ~y~0=27] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=16, ~y~0=81] [L18-L21] assume !!(~x~0 >= 0); VAL [~x~0=16, ~y~0=81] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=16, ~y~0=81] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=32, ~y~0=81] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=32, ~y~0=81] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=32, ~y~0=243] [L18-L21] assume !!(~x~0 >= 0); VAL [~x~0=32, ~y~0=243] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=32, ~y~0=243] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=64, ~y~0=243] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=64, ~y~0=243] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=64, ~y~0=729] [L18-L21] assume !!(~x~0 >= 0); VAL [~x~0=64, ~y~0=729] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=64, ~y~0=729] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=128, ~y~0=729] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=128, ~y~0=729] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=128, ~y~0=2187] [L18-L21] assume !!(~x~0 >= 0); VAL [~x~0=128, ~y~0=2187] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=128, ~y~0=2187] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=256, ~y~0=2187] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=256, ~y~0=2187] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=256, ~y~0=6561] [L18-L21] assume !!(~x~0 >= 0); VAL [~x~0=256, ~y~0=6561] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=256, ~y~0=6561] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=512, ~y~0=6561] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=512, ~y~0=6561] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=512, ~y~0=19683] [L18-L21] assume !!(~x~0 >= 0); VAL [~x~0=512, ~y~0=19683] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=512, ~y~0=19683] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=1024, ~y~0=19683] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=1024, ~y~0=19683] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=1024, ~y~0=59049] [L18-L21] assume !!(~x~0 >= 0); VAL [~x~0=1024, ~y~0=59049] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=1024, ~y~0=59049] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=2048, ~y~0=59049] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=2048, ~y~0=59049] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=2048, ~y~0=177147] [L18-L21] assume !!(~x~0 >= 0); VAL [~x~0=2048, ~y~0=177147] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=2048, ~y~0=177147] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=4096, ~y~0=177147] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=4096, ~y~0=177147] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=4096, ~y~0=531441] [L18-L21] assume !!(~x~0 >= 0); VAL [~x~0=4096, ~y~0=531441] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=4096, ~y~0=531441] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=8192, ~y~0=531441] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=8192, ~y~0=531441] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=8192, ~y~0=1594323] [L18-L21] assume !!(~x~0 >= 0); VAL [~x~0=8192, ~y~0=1594323] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=8192, ~y~0=1594323] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=16384, ~y~0=1594323] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=16384, ~y~0=1594323] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=16384, ~y~0=4782969] [L18-L21] assume !!(~x~0 >= 0); VAL [~x~0=16384, ~y~0=4782969] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=16384, ~y~0=4782969] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=32768, ~y~0=4782969] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=32768, ~y~0=4782969] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=32768, ~y~0=14348907] [L18-L21] assume !!(~x~0 >= 0); VAL [~x~0=32768, ~y~0=14348907] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=32768, ~y~0=14348907] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=65536, ~y~0=14348907] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=65536, ~y~0=14348907] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=65536, ~y~0=43046721] [L18-L21] assume !!(~x~0 >= 0); VAL [~x~0=65536, ~y~0=43046721] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=65536, ~y~0=43046721] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=131072, ~y~0=43046721] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=131072, ~y~0=43046721] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=131072, ~y~0=129140163] [L18-L21] assume !!(~x~0 >= 0); VAL [~x~0=131072, ~y~0=129140163] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=131072, ~y~0=129140163] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=262144, ~y~0=129140163] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=262144, ~y~0=129140163] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=262144, ~y~0=387420489] [L18-L21] assume !!(~x~0 >= 0); VAL [~x~0=262144, ~y~0=387420489] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=262144, ~y~0=387420489] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=524288, ~y~0=387420489] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=524288, ~y~0=387420489] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=524288, ~y~0=1162261467] [L18-L21] assume !!(~x~0 >= 0); VAL [~x~0=524288, ~y~0=1162261467] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=524288, ~y~0=1162261467] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=1048576, ~y~0=1162261467] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=1048576, ~y~0=1162261467] ----- ----- class de.uni_freiburg.informatik.ultimate.boogie.preprocessor.BoogiePreprocessorBacktranslator [?] CALL call ULTIMATE.init(); [?] ensures true; [?] RET call ULTIMATE.init(); [?] CALL call #t~ret0 := main(); [L15] havoc ~x~0; [L15] havoc ~y~0; [L16] ~x~0 := 1; [L17] ~y~0 := 1; VAL [~x~0=1, ~y~0=1] [L18-L21] assume !!(~x~0 >= 0); VAL [~x~0=1, ~y~0=1] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=1, ~y~0=1] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=2, ~y~0=1] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=2, ~y~0=1] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=2, ~y~0=3] [L18-L21] assume !!(~x~0 >= 0); VAL [~x~0=2, ~y~0=3] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=2, ~y~0=3] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=4, ~y~0=3] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=4, ~y~0=3] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=4, ~y~0=9] [L18-L21] assume !!(~x~0 >= 0); VAL [~x~0=4, ~y~0=9] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=4, ~y~0=9] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=8, ~y~0=9] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=8, ~y~0=9] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=8, ~y~0=27] [L18-L21] assume !!(~x~0 >= 0); VAL [~x~0=8, ~y~0=27] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=8, ~y~0=27] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=16, ~y~0=27] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=16, ~y~0=27] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=16, ~y~0=81] [L18-L21] assume !!(~x~0 >= 0); VAL [~x~0=16, ~y~0=81] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=16, ~y~0=81] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=32, ~y~0=81] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=32, ~y~0=81] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=32, ~y~0=243] [L18-L21] assume !!(~x~0 >= 0); VAL [~x~0=32, ~y~0=243] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=32, ~y~0=243] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=64, ~y~0=243] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=64, ~y~0=243] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=64, ~y~0=729] [L18-L21] assume !!(~x~0 >= 0); VAL [~x~0=64, ~y~0=729] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=64, ~y~0=729] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=128, ~y~0=729] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=128, ~y~0=729] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=128, ~y~0=2187] [L18-L21] assume !!(~x~0 >= 0); VAL [~x~0=128, ~y~0=2187] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=128, ~y~0=2187] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=256, ~y~0=2187] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=256, ~y~0=2187] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=256, ~y~0=6561] [L18-L21] assume !!(~x~0 >= 0); VAL [~x~0=256, ~y~0=6561] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=256, ~y~0=6561] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=512, ~y~0=6561] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=512, ~y~0=6561] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=512, ~y~0=19683] [L18-L21] assume !!(~x~0 >= 0); VAL [~x~0=512, ~y~0=19683] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=512, ~y~0=19683] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=1024, ~y~0=19683] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=1024, ~y~0=19683] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=1024, ~y~0=59049] [L18-L21] assume !!(~x~0 >= 0); VAL [~x~0=1024, ~y~0=59049] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=1024, ~y~0=59049] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=2048, ~y~0=59049] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=2048, ~y~0=59049] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=2048, ~y~0=177147] [L18-L21] assume !!(~x~0 >= 0); VAL [~x~0=2048, ~y~0=177147] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=2048, ~y~0=177147] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=4096, ~y~0=177147] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=4096, ~y~0=177147] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=4096, ~y~0=531441] [L18-L21] assume !!(~x~0 >= 0); VAL [~x~0=4096, ~y~0=531441] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=4096, ~y~0=531441] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=8192, ~y~0=531441] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=8192, ~y~0=531441] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=8192, ~y~0=1594323] [L18-L21] assume !!(~x~0 >= 0); VAL [~x~0=8192, ~y~0=1594323] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=8192, ~y~0=1594323] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=16384, ~y~0=1594323] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=16384, ~y~0=1594323] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=16384, ~y~0=4782969] [L18-L21] assume !!(~x~0 >= 0); VAL [~x~0=16384, ~y~0=4782969] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=16384, ~y~0=4782969] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=32768, ~y~0=4782969] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=32768, ~y~0=4782969] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=32768, ~y~0=14348907] [L18-L21] assume !!(~x~0 >= 0); VAL [~x~0=32768, ~y~0=14348907] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=32768, ~y~0=14348907] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=65536, ~y~0=14348907] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=65536, ~y~0=14348907] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=65536, ~y~0=43046721] [L18-L21] assume !!(~x~0 >= 0); VAL [~x~0=65536, ~y~0=43046721] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=65536, ~y~0=43046721] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=131072, ~y~0=43046721] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=131072, ~y~0=43046721] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=131072, ~y~0=129140163] [L18-L21] assume !!(~x~0 >= 0); VAL [~x~0=131072, ~y~0=129140163] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=131072, ~y~0=129140163] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=262144, ~y~0=129140163] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=262144, ~y~0=129140163] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=262144, ~y~0=387420489] [L18-L21] assume !!(~x~0 >= 0); VAL [~x~0=262144, ~y~0=387420489] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=262144, ~y~0=387420489] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=524288, ~y~0=387420489] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=524288, ~y~0=387420489] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=524288, ~y~0=1162261467] [L18-L21] assume !!(~x~0 >= 0); VAL [~x~0=524288, ~y~0=1162261467] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=524288, ~y~0=1162261467] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=1048576, ~y~0=1162261467] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=1048576, ~y~0=1162261467] [?] CALL call ULTIMATE.init(); [?] RET call ULTIMATE.init(); [?] CALL call #t~ret0 := main(); [L15] havoc ~x~0; [L15] havoc ~y~0; [L16] ~x~0 := 1; [L17] ~y~0 := 1; VAL [~x~0=1, ~y~0=1] [L18-L21] COND FALSE !(!(~x~0 >= 0)) VAL [~x~0=1, ~y~0=1] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=1, ~y~0=1] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=2, ~y~0=1] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=2, ~y~0=1] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=2, ~y~0=3] [L18-L21] COND FALSE !(!(~x~0 >= 0)) VAL [~x~0=2, ~y~0=3] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=2, ~y~0=3] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=4, ~y~0=3] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=4, ~y~0=3] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=4, ~y~0=9] [L18-L21] COND FALSE !(!(~x~0 >= 0)) VAL [~x~0=4, ~y~0=9] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=4, ~y~0=9] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=8, ~y~0=9] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=8, ~y~0=9] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=8, ~y~0=27] [L18-L21] COND FALSE !(!(~x~0 >= 0)) VAL [~x~0=8, ~y~0=27] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=8, ~y~0=27] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=16, ~y~0=27] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=16, ~y~0=27] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=16, ~y~0=81] [L18-L21] COND FALSE !(!(~x~0 >= 0)) VAL [~x~0=16, ~y~0=81] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=16, ~y~0=81] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=32, ~y~0=81] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=32, ~y~0=81] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=32, ~y~0=243] [L18-L21] COND FALSE !(!(~x~0 >= 0)) VAL [~x~0=32, ~y~0=243] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=32, ~y~0=243] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=64, ~y~0=243] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=64, ~y~0=243] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=64, ~y~0=729] [L18-L21] COND FALSE !(!(~x~0 >= 0)) VAL [~x~0=64, ~y~0=729] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=64, ~y~0=729] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=128, ~y~0=729] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=128, ~y~0=729] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=128, ~y~0=2187] [L18-L21] COND FALSE !(!(~x~0 >= 0)) VAL [~x~0=128, ~y~0=2187] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=128, ~y~0=2187] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=256, ~y~0=2187] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=256, ~y~0=2187] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=256, ~y~0=6561] [L18-L21] COND FALSE !(!(~x~0 >= 0)) VAL [~x~0=256, ~y~0=6561] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=256, ~y~0=6561] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=512, ~y~0=6561] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=512, ~y~0=6561] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=512, ~y~0=19683] [L18-L21] COND FALSE !(!(~x~0 >= 0)) VAL [~x~0=512, ~y~0=19683] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=512, ~y~0=19683] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=1024, ~y~0=19683] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=1024, ~y~0=19683] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=1024, ~y~0=59049] [L18-L21] COND FALSE !(!(~x~0 >= 0)) VAL [~x~0=1024, ~y~0=59049] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=1024, ~y~0=59049] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=2048, ~y~0=59049] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=2048, ~y~0=59049] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=2048, ~y~0=177147] [L18-L21] COND FALSE !(!(~x~0 >= 0)) VAL [~x~0=2048, ~y~0=177147] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=2048, ~y~0=177147] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=4096, ~y~0=177147] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=4096, ~y~0=177147] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=4096, ~y~0=531441] [L18-L21] COND FALSE !(!(~x~0 >= 0)) VAL [~x~0=4096, ~y~0=531441] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=4096, ~y~0=531441] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=8192, ~y~0=531441] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=8192, ~y~0=531441] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=8192, ~y~0=1594323] [L18-L21] COND FALSE !(!(~x~0 >= 0)) VAL [~x~0=8192, ~y~0=1594323] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=8192, ~y~0=1594323] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=16384, ~y~0=1594323] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=16384, ~y~0=1594323] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=16384, ~y~0=4782969] [L18-L21] COND FALSE !(!(~x~0 >= 0)) VAL [~x~0=16384, ~y~0=4782969] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=16384, ~y~0=4782969] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=32768, ~y~0=4782969] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=32768, ~y~0=4782969] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=32768, ~y~0=14348907] [L18-L21] COND FALSE !(!(~x~0 >= 0)) VAL [~x~0=32768, ~y~0=14348907] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=32768, ~y~0=14348907] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=65536, ~y~0=14348907] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=65536, ~y~0=14348907] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=65536, ~y~0=43046721] [L18-L21] COND FALSE !(!(~x~0 >= 0)) VAL [~x~0=65536, ~y~0=43046721] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=65536, ~y~0=43046721] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=131072, ~y~0=43046721] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=131072, ~y~0=43046721] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=131072, ~y~0=129140163] [L18-L21] COND FALSE !(!(~x~0 >= 0)) VAL [~x~0=131072, ~y~0=129140163] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=131072, ~y~0=129140163] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=262144, ~y~0=129140163] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=262144, ~y~0=129140163] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=262144, ~y~0=387420489] [L18-L21] COND FALSE !(!(~x~0 >= 0)) VAL [~x~0=262144, ~y~0=387420489] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=262144, ~y~0=387420489] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=524288, ~y~0=387420489] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=524288, ~y~0=387420489] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=524288, ~y~0=1162261467] [L18-L21] COND FALSE !(!(~x~0 >= 0)) VAL [~x~0=524288, ~y~0=1162261467] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=524288, ~y~0=1162261467] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=1048576, ~y~0=1162261467] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=1048576, ~y~0=1162261467] ----- ----- class de.uni_freiburg.informatik.ultimate.boogie.procedureinliner.backtranslation.InlinerBacktranslator [?] CALL call ULTIMATE.init(); [?] RET call ULTIMATE.init(); [?] CALL call #t~ret0 := main(); [L15] havoc ~x~0; [L15] havoc ~y~0; [L16] ~x~0 := 1; [L17] ~y~0 := 1; VAL [~x~0=1, ~y~0=1] [L18-L21] COND FALSE !(!(~x~0 >= 0)) VAL [~x~0=1, ~y~0=1] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=1, ~y~0=1] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=2, ~y~0=1] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=2, ~y~0=1] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=2, ~y~0=3] [L18-L21] COND FALSE !(!(~x~0 >= 0)) VAL [~x~0=2, ~y~0=3] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=2, ~y~0=3] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=4, ~y~0=3] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=4, ~y~0=3] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=4, ~y~0=9] [L18-L21] COND FALSE !(!(~x~0 >= 0)) VAL [~x~0=4, ~y~0=9] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=4, ~y~0=9] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=8, ~y~0=9] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=8, ~y~0=9] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=8, ~y~0=27] [L18-L21] COND FALSE !(!(~x~0 >= 0)) VAL [~x~0=8, ~y~0=27] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=8, ~y~0=27] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=16, ~y~0=27] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=16, ~y~0=27] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=16, ~y~0=81] [L18-L21] COND FALSE !(!(~x~0 >= 0)) VAL [~x~0=16, ~y~0=81] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=16, ~y~0=81] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=32, ~y~0=81] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=32, ~y~0=81] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=32, ~y~0=243] [L18-L21] COND FALSE !(!(~x~0 >= 0)) VAL [~x~0=32, ~y~0=243] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=32, ~y~0=243] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=64, ~y~0=243] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=64, ~y~0=243] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=64, ~y~0=729] [L18-L21] COND FALSE !(!(~x~0 >= 0)) VAL [~x~0=64, ~y~0=729] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=64, ~y~0=729] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=128, ~y~0=729] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=128, ~y~0=729] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=128, ~y~0=2187] [L18-L21] COND FALSE !(!(~x~0 >= 0)) VAL [~x~0=128, ~y~0=2187] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=128, ~y~0=2187] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=256, ~y~0=2187] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=256, ~y~0=2187] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=256, ~y~0=6561] [L18-L21] COND FALSE !(!(~x~0 >= 0)) VAL [~x~0=256, ~y~0=6561] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=256, ~y~0=6561] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=512, ~y~0=6561] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=512, ~y~0=6561] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=512, ~y~0=19683] [L18-L21] COND FALSE !(!(~x~0 >= 0)) VAL [~x~0=512, ~y~0=19683] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=512, ~y~0=19683] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=1024, ~y~0=19683] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=1024, ~y~0=19683] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=1024, ~y~0=59049] [L18-L21] COND FALSE !(!(~x~0 >= 0)) VAL [~x~0=1024, ~y~0=59049] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=1024, ~y~0=59049] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=2048, ~y~0=59049] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=2048, ~y~0=59049] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=2048, ~y~0=177147] [L18-L21] COND FALSE !(!(~x~0 >= 0)) VAL [~x~0=2048, ~y~0=177147] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=2048, ~y~0=177147] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=4096, ~y~0=177147] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=4096, ~y~0=177147] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=4096, ~y~0=531441] [L18-L21] COND FALSE !(!(~x~0 >= 0)) VAL [~x~0=4096, ~y~0=531441] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=4096, ~y~0=531441] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=8192, ~y~0=531441] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=8192, ~y~0=531441] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=8192, ~y~0=1594323] [L18-L21] COND FALSE !(!(~x~0 >= 0)) VAL [~x~0=8192, ~y~0=1594323] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=8192, ~y~0=1594323] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=16384, ~y~0=1594323] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=16384, ~y~0=1594323] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=16384, ~y~0=4782969] [L18-L21] COND FALSE !(!(~x~0 >= 0)) VAL [~x~0=16384, ~y~0=4782969] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=16384, ~y~0=4782969] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=32768, ~y~0=4782969] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=32768, ~y~0=4782969] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=32768, ~y~0=14348907] [L18-L21] COND FALSE !(!(~x~0 >= 0)) VAL [~x~0=32768, ~y~0=14348907] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=32768, ~y~0=14348907] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=65536, ~y~0=14348907] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=65536, ~y~0=14348907] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=65536, ~y~0=43046721] [L18-L21] COND FALSE !(!(~x~0 >= 0)) VAL [~x~0=65536, ~y~0=43046721] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=65536, ~y~0=43046721] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=131072, ~y~0=43046721] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=131072, ~y~0=43046721] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=131072, ~y~0=129140163] [L18-L21] COND FALSE !(!(~x~0 >= 0)) VAL [~x~0=131072, ~y~0=129140163] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=131072, ~y~0=129140163] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=262144, ~y~0=129140163] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=262144, ~y~0=129140163] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=262144, ~y~0=387420489] [L18-L21] COND FALSE !(!(~x~0 >= 0)) VAL [~x~0=262144, ~y~0=387420489] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=262144, ~y~0=387420489] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=524288, ~y~0=387420489] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=524288, ~y~0=387420489] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=524288, ~y~0=1162261467] [L18-L21] COND FALSE !(!(~x~0 >= 0)) VAL [~x~0=524288, ~y~0=1162261467] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=524288, ~y~0=1162261467] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=1048576, ~y~0=1162261467] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=1048576, ~y~0=1162261467] [?] CALL call ULTIMATE.init(); [?] RET call ULTIMATE.init(); [?] CALL call #t~ret0 := main(); [L15] havoc ~x~0; [L15] havoc ~y~0; [L16] ~x~0 := 1; [L17] ~y~0 := 1; VAL [~x~0=1, ~y~0=1] [L18-L21] COND FALSE !(!(~x~0 >= 0)) VAL [~x~0=1, ~y~0=1] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=1, ~y~0=1] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=2, ~y~0=1] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=2, ~y~0=1] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=2, ~y~0=3] [L18-L21] COND FALSE !(!(~x~0 >= 0)) VAL [~x~0=2, ~y~0=3] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=2, ~y~0=3] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=4, ~y~0=3] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=4, ~y~0=3] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=4, ~y~0=9] [L18-L21] COND FALSE !(!(~x~0 >= 0)) VAL [~x~0=4, ~y~0=9] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=4, ~y~0=9] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=8, ~y~0=9] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=8, ~y~0=9] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=8, ~y~0=27] [L18-L21] COND FALSE !(!(~x~0 >= 0)) VAL [~x~0=8, ~y~0=27] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=8, ~y~0=27] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=16, ~y~0=27] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=16, ~y~0=27] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=16, ~y~0=81] [L18-L21] COND FALSE !(!(~x~0 >= 0)) VAL [~x~0=16, ~y~0=81] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=16, ~y~0=81] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=32, ~y~0=81] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=32, ~y~0=81] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=32, ~y~0=243] [L18-L21] COND FALSE !(!(~x~0 >= 0)) VAL [~x~0=32, ~y~0=243] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=32, ~y~0=243] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=64, ~y~0=243] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=64, ~y~0=243] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=64, ~y~0=729] [L18-L21] COND FALSE !(!(~x~0 >= 0)) VAL [~x~0=64, ~y~0=729] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=64, ~y~0=729] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=128, ~y~0=729] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=128, ~y~0=729] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=128, ~y~0=2187] [L18-L21] COND FALSE !(!(~x~0 >= 0)) VAL [~x~0=128, ~y~0=2187] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=128, ~y~0=2187] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=256, ~y~0=2187] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=256, ~y~0=2187] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=256, ~y~0=6561] [L18-L21] COND FALSE !(!(~x~0 >= 0)) VAL [~x~0=256, ~y~0=6561] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=256, ~y~0=6561] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=512, ~y~0=6561] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=512, ~y~0=6561] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=512, ~y~0=19683] [L18-L21] COND FALSE !(!(~x~0 >= 0)) VAL [~x~0=512, ~y~0=19683] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=512, ~y~0=19683] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=1024, ~y~0=19683] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=1024, ~y~0=19683] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=1024, ~y~0=59049] [L18-L21] COND FALSE !(!(~x~0 >= 0)) VAL [~x~0=1024, ~y~0=59049] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=1024, ~y~0=59049] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=2048, ~y~0=59049] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=2048, ~y~0=59049] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=2048, ~y~0=177147] [L18-L21] COND FALSE !(!(~x~0 >= 0)) VAL [~x~0=2048, ~y~0=177147] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=2048, ~y~0=177147] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=4096, ~y~0=177147] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=4096, ~y~0=177147] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=4096, ~y~0=531441] [L18-L21] COND FALSE !(!(~x~0 >= 0)) VAL [~x~0=4096, ~y~0=531441] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=4096, ~y~0=531441] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=8192, ~y~0=531441] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=8192, ~y~0=531441] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=8192, ~y~0=1594323] [L18-L21] COND FALSE !(!(~x~0 >= 0)) VAL [~x~0=8192, ~y~0=1594323] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=8192, ~y~0=1594323] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=16384, ~y~0=1594323] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=16384, ~y~0=1594323] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=16384, ~y~0=4782969] [L18-L21] COND FALSE !(!(~x~0 >= 0)) VAL [~x~0=16384, ~y~0=4782969] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=16384, ~y~0=4782969] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=32768, ~y~0=4782969] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=32768, ~y~0=4782969] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=32768, ~y~0=14348907] [L18-L21] COND FALSE !(!(~x~0 >= 0)) VAL [~x~0=32768, ~y~0=14348907] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=32768, ~y~0=14348907] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=65536, ~y~0=14348907] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=65536, ~y~0=14348907] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=65536, ~y~0=43046721] [L18-L21] COND FALSE !(!(~x~0 >= 0)) VAL [~x~0=65536, ~y~0=43046721] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=65536, ~y~0=43046721] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=131072, ~y~0=43046721] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=131072, ~y~0=43046721] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=131072, ~y~0=129140163] [L18-L21] COND FALSE !(!(~x~0 >= 0)) VAL [~x~0=131072, ~y~0=129140163] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=131072, ~y~0=129140163] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=262144, ~y~0=129140163] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=262144, ~y~0=129140163] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=262144, ~y~0=387420489] [L18-L21] COND FALSE !(!(~x~0 >= 0)) VAL [~x~0=262144, ~y~0=387420489] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=262144, ~y~0=387420489] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=524288, ~y~0=387420489] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=524288, ~y~0=387420489] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=524288, ~y~0=1162261467] [L18-L21] COND FALSE !(!(~x~0 >= 0)) VAL [~x~0=524288, ~y~0=1162261467] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=524288, ~y~0=1162261467] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=1048576, ~y~0=1162261467] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=1048576, ~y~0=1162261467] ----- ----- class de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.CACSL2BoogieBacktranslator [?] CALL call ULTIMATE.init(); [?] RET call ULTIMATE.init(); [?] CALL call #t~ret0 := main(); [L15] havoc ~x~0; [L15] havoc ~y~0; [L16] ~x~0 := 1; [L17] ~y~0 := 1; VAL [~x~0=1, ~y~0=1] [L18-L21] COND FALSE !(!(~x~0 >= 0)) VAL [~x~0=1, ~y~0=1] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=1, ~y~0=1] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=2, ~y~0=1] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=2, ~y~0=1] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=2, ~y~0=3] [L18-L21] COND FALSE !(!(~x~0 >= 0)) VAL [~x~0=2, ~y~0=3] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=2, ~y~0=3] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=4, ~y~0=3] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=4, ~y~0=3] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=4, ~y~0=9] [L18-L21] COND FALSE !(!(~x~0 >= 0)) VAL [~x~0=4, ~y~0=9] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=4, ~y~0=9] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=8, ~y~0=9] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=8, ~y~0=9] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=8, ~y~0=27] [L18-L21] COND FALSE !(!(~x~0 >= 0)) VAL [~x~0=8, ~y~0=27] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=8, ~y~0=27] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=16, ~y~0=27] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=16, ~y~0=27] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=16, ~y~0=81] [L18-L21] COND FALSE !(!(~x~0 >= 0)) VAL [~x~0=16, ~y~0=81] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=16, ~y~0=81] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=32, ~y~0=81] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=32, ~y~0=81] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=32, ~y~0=243] [L18-L21] COND FALSE !(!(~x~0 >= 0)) VAL [~x~0=32, ~y~0=243] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=32, ~y~0=243] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=64, ~y~0=243] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=64, ~y~0=243] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=64, ~y~0=729] [L18-L21] COND FALSE !(!(~x~0 >= 0)) VAL [~x~0=64, ~y~0=729] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=64, ~y~0=729] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=128, ~y~0=729] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=128, ~y~0=729] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=128, ~y~0=2187] [L18-L21] COND FALSE !(!(~x~0 >= 0)) VAL [~x~0=128, ~y~0=2187] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=128, ~y~0=2187] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=256, ~y~0=2187] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=256, ~y~0=2187] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=256, ~y~0=6561] [L18-L21] COND FALSE !(!(~x~0 >= 0)) VAL [~x~0=256, ~y~0=6561] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=256, ~y~0=6561] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=512, ~y~0=6561] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=512, ~y~0=6561] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=512, ~y~0=19683] [L18-L21] COND FALSE !(!(~x~0 >= 0)) VAL [~x~0=512, ~y~0=19683] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=512, ~y~0=19683] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=1024, ~y~0=19683] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=1024, ~y~0=19683] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=1024, ~y~0=59049] [L18-L21] COND FALSE !(!(~x~0 >= 0)) VAL [~x~0=1024, ~y~0=59049] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=1024, ~y~0=59049] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=2048, ~y~0=59049] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=2048, ~y~0=59049] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=2048, ~y~0=177147] [L18-L21] COND FALSE !(!(~x~0 >= 0)) VAL [~x~0=2048, ~y~0=177147] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=2048, ~y~0=177147] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=4096, ~y~0=177147] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=4096, ~y~0=177147] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=4096, ~y~0=531441] [L18-L21] COND FALSE !(!(~x~0 >= 0)) VAL [~x~0=4096, ~y~0=531441] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=4096, ~y~0=531441] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=8192, ~y~0=531441] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=8192, ~y~0=531441] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=8192, ~y~0=1594323] [L18-L21] COND FALSE !(!(~x~0 >= 0)) VAL [~x~0=8192, ~y~0=1594323] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=8192, ~y~0=1594323] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=16384, ~y~0=1594323] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=16384, ~y~0=1594323] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=16384, ~y~0=4782969] [L18-L21] COND FALSE !(!(~x~0 >= 0)) VAL [~x~0=16384, ~y~0=4782969] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=16384, ~y~0=4782969] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=32768, ~y~0=4782969] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=32768, ~y~0=4782969] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=32768, ~y~0=14348907] [L18-L21] COND FALSE !(!(~x~0 >= 0)) VAL [~x~0=32768, ~y~0=14348907] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=32768, ~y~0=14348907] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=65536, ~y~0=14348907] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=65536, ~y~0=14348907] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=65536, ~y~0=43046721] [L18-L21] COND FALSE !(!(~x~0 >= 0)) VAL [~x~0=65536, ~y~0=43046721] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=65536, ~y~0=43046721] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=131072, ~y~0=43046721] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=131072, ~y~0=43046721] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=131072, ~y~0=129140163] [L18-L21] COND FALSE !(!(~x~0 >= 0)) VAL [~x~0=131072, ~y~0=129140163] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=131072, ~y~0=129140163] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=262144, ~y~0=129140163] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=262144, ~y~0=129140163] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=262144, ~y~0=387420489] [L18-L21] COND FALSE !(!(~x~0 >= 0)) VAL [~x~0=262144, ~y~0=387420489] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=262144, ~y~0=387420489] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=524288, ~y~0=387420489] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=524288, ~y~0=387420489] [L20] assert 3 * ~y~0 >= -2147483648; [L20] ~y~0 := 3 * ~y~0; VAL [~x~0=524288, ~y~0=1162261467] [L18-L21] COND FALSE !(!(~x~0 >= 0)) VAL [~x~0=524288, ~y~0=1162261467] [L19] assert 2 * ~x~0 <= 2147483647; VAL [~x~0=524288, ~y~0=1162261467] [L19] assert 2 * ~x~0 >= -2147483648; [L19] ~x~0 := 2 * ~x~0; VAL [~x~0=1048576, ~y~0=1162261467] [L20] assert 3 * ~y~0 <= 2147483647; VAL [~x~0=1048576, ~y~0=1162261467] [L15] int x, y; [L16] x = 1 [L17] y = 1 VAL [x=1, y=1] [L18] COND TRUE x >= 0 VAL [x=1, y=1] [L19] EXPR 2*x [L19] x = 2*x VAL [x=2, y=1] [L20] EXPR 3*y [L20] y = 3*y VAL [x=2, y=3] [L18] COND TRUE x >= 0 VAL [x=2, y=3] [L19] EXPR 2*x [L19] x = 2*x VAL [x=4, y=3] [L20] EXPR 3*y [L20] y = 3*y VAL [x=4, y=9] [L18] COND TRUE x >= 0 VAL [x=4, y=9] [L19] EXPR 2*x [L19] x = 2*x VAL [x=8, y=9] [L20] EXPR 3*y [L20] y = 3*y VAL [x=8, y=27] [L18] COND TRUE x >= 0 VAL [x=8, y=27] [L19] EXPR 2*x [L19] x = 2*x VAL [x=16, y=27] [L20] EXPR 3*y [L20] y = 3*y VAL [x=16, y=81] [L18] COND TRUE x >= 0 VAL [x=16, y=81] [L19] EXPR 2*x [L19] x = 2*x VAL [x=32, y=81] [L20] EXPR 3*y [L20] y = 3*y VAL [x=32, y=243] [L18] COND TRUE x >= 0 VAL [x=32, y=243] [L19] EXPR 2*x [L19] x = 2*x VAL [x=64, y=243] [L20] EXPR 3*y [L20] y = 3*y VAL [x=64, y=729] [L18] COND TRUE x >= 0 VAL [x=64, y=729] [L19] EXPR 2*x [L19] x = 2*x VAL [x=128, y=729] [L20] EXPR 3*y [L20] y = 3*y VAL [x=128, y=2187] [L18] COND TRUE x >= 0 VAL [x=128, y=2187] [L19] EXPR 2*x [L19] x = 2*x VAL [x=256, y=2187] [L20] EXPR 3*y [L20] y = 3*y VAL [x=256, y=6561] [L18] COND TRUE x >= 0 VAL [x=256, y=6561] [L19] EXPR 2*x [L19] x = 2*x VAL [x=512, y=6561] [L20] EXPR 3*y [L20] y = 3*y VAL [x=512, y=19683] [L18] COND TRUE x >= 0 VAL [x=512, y=19683] [L19] EXPR 2*x [L19] x = 2*x VAL [x=1024, y=19683] [L20] EXPR 3*y [L20] y = 3*y VAL [x=1024, y=59049] [L18] COND TRUE x >= 0 VAL [x=1024, y=59049] [L19] EXPR 2*x [L19] x = 2*x VAL [x=2048, y=59049] [L20] EXPR 3*y [L20] y = 3*y VAL [x=2048, y=177147] [L18] COND TRUE x >= 0 VAL [x=2048, y=177147] [L19] EXPR 2*x [L19] x = 2*x VAL [x=4096, y=177147] [L20] EXPR 3*y [L20] y = 3*y VAL [x=4096, y=531441] [L18] COND TRUE x >= 0 VAL [x=4096, y=531441] [L19] EXPR 2*x [L19] x = 2*x VAL [x=8192, y=531441] [L20] EXPR 3*y [L20] y = 3*y VAL [x=8192, y=1594323] [L18] COND TRUE x >= 0 VAL [x=8192, y=1594323] [L19] EXPR 2*x [L19] x = 2*x VAL [x=16384, y=1594323] [L20] EXPR 3*y [L20] y = 3*y VAL [x=16384, y=4782969] [L18] COND TRUE x >= 0 VAL [x=16384, y=4782969] [L19] EXPR 2*x [L19] x = 2*x VAL [x=32768, y=4782969] [L20] EXPR 3*y [L20] y = 3*y VAL [x=32768, y=14348907] [L18] COND TRUE x >= 0 VAL [x=32768, y=14348907] [L19] EXPR 2*x [L19] x = 2*x VAL [x=65536, y=14348907] [L20] EXPR 3*y [L20] y = 3*y VAL [x=65536, y=43046721] [L18] COND TRUE x >= 0 VAL [x=65536, y=43046721] [L19] EXPR 2*x [L19] x = 2*x VAL [x=131072, y=43046721] [L20] EXPR 3*y [L20] y = 3*y VAL [x=131072, y=129140163] [L18] COND TRUE x >= 0 VAL [x=131072, y=129140163] [L19] EXPR 2*x [L19] x = 2*x VAL [x=262144, y=129140163] [L20] EXPR 3*y [L20] y = 3*y VAL [x=262144, y=387420489] [L18] COND TRUE x >= 0 VAL [x=262144, y=387420489] [L19] EXPR 2*x [L19] x = 2*x VAL [x=524288, y=387420489] [L20] EXPR 3*y [L20] y = 3*y VAL [x=524288, y=1162261467] [L18] COND TRUE x >= 0 VAL [x=524288, y=1162261467] [L19] EXPR 2*x [L19] x = 2*x VAL [x=1048576, y=1162261467] [L20] 3*y VAL [x=1048576, y=1162261467] ----- [2018-11-23 14:31:39,216 INFO L145 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/working_dir_5db53c6b-9103-46d2-b960-4341706e456a/bin-2019/uautomizer/witness.graphml [2018-11-23 14:31:39,216 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2018-11-23 14:31:39,217 INFO L168 Benchmark]: Toolchain (without parser) took 12241.96 ms. Allocated memory was 1.0 GB in the beginning and 1.4 GB in the end (delta: 360.7 MB). Free memory was 958.4 MB in the beginning and 991.4 MB in the end (delta: -32.9 MB). Peak memory consumption was 327.8 MB. Max. memory is 11.5 GB. [2018-11-23 14:31:39,218 INFO L168 Benchmark]: CDTParser took 0.13 ms. Allocated memory is still 1.0 GB. Free memory is still 985.3 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-11-23 14:31:39,219 INFO L168 Benchmark]: CACSL2BoogieTranslator took 191.70 ms. Allocated memory is still 1.0 GB. Free memory was 958.4 MB in the beginning and 947.7 MB in the end (delta: 10.7 MB). Peak memory consumption was 10.7 MB. Max. memory is 11.5 GB. [2018-11-23 14:31:39,219 INFO L168 Benchmark]: Boogie Procedure Inliner took 14.53 ms. Allocated memory is still 1.0 GB. Free memory is still 947.7 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-11-23 14:31:39,219 INFO L168 Benchmark]: Boogie Preprocessor took 13.84 ms. Allocated memory is still 1.0 GB. Free memory was 947.7 MB in the beginning and 945.0 MB in the end (delta: 2.7 MB). Peak memory consumption was 2.7 MB. Max. memory is 11.5 GB. [2018-11-23 14:31:39,219 INFO L168 Benchmark]: RCFGBuilder took 178.45 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 140.0 MB). Free memory was 945.0 MB in the beginning and 1.1 GB in the end (delta: -178.9 MB). Peak memory consumption was 14.3 MB. Max. memory is 11.5 GB. [2018-11-23 14:31:39,220 INFO L168 Benchmark]: TraceAbstraction took 11062.07 ms. Allocated memory was 1.2 GB in the beginning and 1.4 GB in the end (delta: 220.7 MB). Free memory was 1.1 GB in the beginning and 991.4 MB in the end (delta: 132.6 MB). Peak memory consumption was 353.3 MB. Max. memory is 11.5 GB. [2018-11-23 14:31:39,220 INFO L168 Benchmark]: Witness Printer took 777.91 ms. Allocated memory is still 1.4 GB. Free memory was 991.4 MB in the beginning and 991.4 MB in the end (delta: 24 B). Peak memory consumption was 24 B. Max. memory is 11.5 GB. [2018-11-23 14:31:39,222 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.13 ms. Allocated memory is still 1.0 GB. Free memory is still 985.3 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 191.70 ms. Allocated memory is still 1.0 GB. Free memory was 958.4 MB in the beginning and 947.7 MB in the end (delta: 10.7 MB). Peak memory consumption was 10.7 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 14.53 ms. Allocated memory is still 1.0 GB. Free memory is still 947.7 MB. There was no memory consumed. Max. memory is 11.5 GB. * Boogie Preprocessor took 13.84 ms. Allocated memory is still 1.0 GB. Free memory was 947.7 MB in the beginning and 945.0 MB in the end (delta: 2.7 MB). Peak memory consumption was 2.7 MB. Max. memory is 11.5 GB. * RCFGBuilder took 178.45 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 140.0 MB). Free memory was 945.0 MB in the beginning and 1.1 GB in the end (delta: -178.9 MB). Peak memory consumption was 14.3 MB. Max. memory is 11.5 GB. * TraceAbstraction took 11062.07 ms. Allocated memory was 1.2 GB in the beginning and 1.4 GB in the end (delta: 220.7 MB). Free memory was 1.1 GB in the beginning and 991.4 MB in the end (delta: 132.6 MB). Peak memory consumption was 353.3 MB. Max. memory is 11.5 GB. * Witness Printer took 777.91 ms. Allocated memory is still 1.4 GB. Free memory was 991.4 MB in the beginning and 991.4 MB in the end (delta: 24 B). Peak memory consumption was 24 B. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 20]: integer overflow possible integer overflow possible We found a FailurePath: [L15] int x, y; [L16] x = 1 [L17] y = 1 VAL [x=1, y=1] [L18] COND TRUE x >= 0 VAL [x=1, y=1] [L19] EXPR 2*x [L19] x = 2*x VAL [x=2, y=1] [L20] EXPR 3*y [L20] y = 3*y VAL [x=2, y=3] [L18] COND TRUE x >= 0 VAL [x=2, y=3] [L19] EXPR 2*x [L19] x = 2*x VAL [x=4, y=3] [L20] EXPR 3*y [L20] y = 3*y VAL [x=4, y=9] [L18] COND TRUE x >= 0 VAL [x=4, y=9] [L19] EXPR 2*x [L19] x = 2*x VAL [x=8, y=9] [L20] EXPR 3*y [L20] y = 3*y VAL [x=8, y=27] [L18] COND TRUE x >= 0 VAL [x=8, y=27] [L19] EXPR 2*x [L19] x = 2*x VAL [x=16, y=27] [L20] EXPR 3*y [L20] y = 3*y VAL [x=16, y=81] [L18] COND TRUE x >= 0 VAL [x=16, y=81] [L19] EXPR 2*x [L19] x = 2*x VAL [x=32, y=81] [L20] EXPR 3*y [L20] y = 3*y VAL [x=32, y=243] [L18] COND TRUE x >= 0 VAL [x=32, y=243] [L19] EXPR 2*x [L19] x = 2*x VAL [x=64, y=243] [L20] EXPR 3*y [L20] y = 3*y VAL [x=64, y=729] [L18] COND TRUE x >= 0 VAL [x=64, y=729] [L19] EXPR 2*x [L19] x = 2*x VAL [x=128, y=729] [L20] EXPR 3*y [L20] y = 3*y VAL [x=128, y=2187] [L18] COND TRUE x >= 0 VAL [x=128, y=2187] [L19] EXPR 2*x [L19] x = 2*x VAL [x=256, y=2187] [L20] EXPR 3*y [L20] y = 3*y VAL [x=256, y=6561] [L18] COND TRUE x >= 0 VAL [x=256, y=6561] [L19] EXPR 2*x [L19] x = 2*x VAL [x=512, y=6561] [L20] EXPR 3*y [L20] y = 3*y VAL [x=512, y=19683] [L18] COND TRUE x >= 0 VAL [x=512, y=19683] [L19] EXPR 2*x [L19] x = 2*x VAL [x=1024, y=19683] [L20] EXPR 3*y [L20] y = 3*y VAL [x=1024, y=59049] [L18] COND TRUE x >= 0 VAL [x=1024, y=59049] [L19] EXPR 2*x [L19] x = 2*x VAL [x=2048, y=59049] [L20] EXPR 3*y [L20] y = 3*y VAL [x=2048, y=177147] [L18] COND TRUE x >= 0 VAL [x=2048, y=177147] [L19] EXPR 2*x [L19] x = 2*x VAL [x=4096, y=177147] [L20] EXPR 3*y [L20] y = 3*y VAL [x=4096, y=531441] [L18] COND TRUE x >= 0 VAL [x=4096, y=531441] [L19] EXPR 2*x [L19] x = 2*x VAL [x=8192, y=531441] [L20] EXPR 3*y [L20] y = 3*y VAL [x=8192, y=1594323] [L18] COND TRUE x >= 0 VAL [x=8192, y=1594323] [L19] EXPR 2*x [L19] x = 2*x VAL [x=16384, y=1594323] [L20] EXPR 3*y [L20] y = 3*y VAL [x=16384, y=4782969] [L18] COND TRUE x >= 0 VAL [x=16384, y=4782969] [L19] EXPR 2*x [L19] x = 2*x VAL [x=32768, y=4782969] [L20] EXPR 3*y [L20] y = 3*y VAL [x=32768, y=14348907] [L18] COND TRUE x >= 0 VAL [x=32768, y=14348907] [L19] EXPR 2*x [L19] x = 2*x VAL [x=65536, y=14348907] [L20] EXPR 3*y [L20] y = 3*y VAL [x=65536, y=43046721] [L18] COND TRUE x >= 0 VAL [x=65536, y=43046721] [L19] EXPR 2*x [L19] x = 2*x VAL [x=131072, y=43046721] [L20] EXPR 3*y [L20] y = 3*y VAL [x=131072, y=129140163] [L18] COND TRUE x >= 0 VAL [x=131072, y=129140163] [L19] EXPR 2*x [L19] x = 2*x VAL [x=262144, y=129140163] [L20] EXPR 3*y [L20] y = 3*y VAL [x=262144, y=387420489] [L18] COND TRUE x >= 0 VAL [x=262144, y=387420489] [L19] EXPR 2*x [L19] x = 2*x VAL [x=524288, y=387420489] [L20] EXPR 3*y [L20] y = 3*y VAL [x=524288, y=1162261467] [L18] COND TRUE x >= 0 VAL [x=524288, y=1162261467] [L19] EXPR 2*x [L19] x = 2*x VAL [x=1048576, y=1162261467] [L20] 3*y VAL [x=1048576, y=1162261467] - StatisticsResult: Ultimate Automizer benchmark data CFG has 3 procedures, 19 locations, 4 error locations. UNSAFE Result, 11.0s OverallTime, 42 OverallIterations, 20 TraceHistogramMax, 1.3s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 393 SDtfs, 412 SDslu, 2546 SDs, 0 SdLazy, 1427 SolverSat, 57 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 0.8s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 2506 GetRequests, 1743 SyntacticMatches, 361 SemanticMatches, 402 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2109 ImplicationChecksByTransitivity, 6.1s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=109occurred in iteration=41, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 0.1s AutomataMinimizationTime, 41 MinimizatonAttempts, 39 StatesRemovedByMinimization, 39 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.0s SsaConstructionTime, 0.7s SatisfiabilityAnalysisTime, 7.0s InterpolantComputationTime, 4338 NumberOfCodeBlocks, 4338 NumberOfCodeBlocksAsserted, 283 NumberOfCheckSat, 4156 ConstructedInterpolants, 0 QuantifiedInterpolants, 815788 SizeOfPredicates, 0 NumberOfNonLiveVariables, 3913 ConjunctsInSsa, 435 ConjunctsInUnsatCore, 78 InterpolantComputations, 4 PerfectInterpolantSequences, 0/23218 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...